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authorSekhar Nori <nsekhar@ti.com>2009-11-16 06:51:34 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-02-04 16:29:35 -0500
commit7ec4b24326ec9b0467ab23b0417ec6b63e8e5524 (patch)
treec724879a4842d625a7d1432e90d5f03dd192cf32
parent9a219a9ecf49ab156df4c18267ade4d468d9930e (diff)
davinci: move DDR2 controller defines to memory.h
Move defintions of DDR2 controller registers to memory.h from cpuidle.c. The motivation behind the change is to be able to use these defintions in assembly code that puts DDR2 in self-refresh and enables the SoC to enter suspend state. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-davinci/cpuidle.c5
-rw-r--r--arch/arm/mach-davinci/include/mach/memory.h4
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 97a90f36fc92..beda3b579688 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -19,6 +19,7 @@
19#include <asm/proc-fns.h> 19#include <asm/proc-fns.h>
20 20
21#include <mach/cpuidle.h> 21#include <mach/cpuidle.h>
22#include <mach/memory.h>
22 23
23#define DAVINCI_CPUIDLE_MAX_STATES 2 24#define DAVINCI_CPUIDLE_MAX_STATES 2
24 25
@@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = {
39static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); 40static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
40static void __iomem *ddr2_reg_base; 41static void __iomem *ddr2_reg_base;
41 42
42#define DDR2_SDRCR_OFFSET 0xc
43#define DDR2_SRPD_BIT BIT(23)
44#define DDR2_LPMODEN_BIT BIT(31)
45
46static void davinci_save_ddr_power(int enter, bool pdown) 43static void davinci_save_ddr_power(int enter, bool pdown)
47{ 44{
48 u32 val; 45 u32 val;
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index 80309aed534a..7aeaf46cade0 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -31,6 +31,10 @@
31#define PHYS_OFFSET DAVINCI_DDR_BASE 31#define PHYS_OFFSET DAVINCI_DDR_BASE
32#endif 32#endif
33 33
34#define DDR2_SDRCR_OFFSET 0xc
35#define DDR2_SRPD_BIT BIT(23)
36#define DDR2_LPMODEN_BIT BIT(31)
37
34/* 38/*
35 * Increase size of DMA-consistent memory region 39 * Increase size of DMA-consistent memory region
36 */ 40 */