ia64/pv_ops: paravirtualized instruction checker.

This patch implements a checker to detect instructions which should be paravirtualized instead of direct writing raw instruction. This patch does rough check so that it doesn't fully cover all cases, but it can detects most cases of paravirtualization breakage of hand written assembly codes. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
author: Isaku Yamahata <yamahata@valinux.co.jp> 2008-10-16 22:18:13 -0400
committer: Tony Luck <tony.luck@intel.com> 2008-10-17 13:12:54 -0400
commit: f8d1f99f3958c46cdc983743d75d0b31b9accb80 (patch)
tree: ef91c20de242e67db557e831aa28f9e9597dabef
parent: 98c99d7c27973538081a809c114b8d5c6195ecfa (diff)
4 files changed, 316 insertions, 1 deletions
diff --git a/arch/ia64/include/asm/native/pvchk_inst.h b/arch/ia64/include/asm/native/pvchk_inst.h
new file mode 100644
index 000000000000..b8e6eb1090d7
--- /dev/null
+++ b/arch/ia64/include/asm/native/pvchk_inst.h
@@ -0,0 +1,263 @@
+#ifndef _ASM_NATIVE_PVCHK_INST_H
+#define _ASM_NATIVE_PVCHK_INST_H
+/******************************************************************************
+ * arch/ia64/include/asm/native/pvchk_inst.h
+ * Checker for paravirtualizations of privileged operations.
+ *
+ * Copyright (C) 2005 Hewlett-Packard Co
+ *      Dan Magenheimer <dan.magenheimer@hp.com>
+ *
+ * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *                    VA Linux Systems Japan K.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+/**********************************************
+ * Instructions paravirtualized for correctness
+ **********************************************/
+/* "fc" and "thash" are privilege-sensitive instructions, meaning they
+ *  may have different semantics depending on whether they are executed
+ *  at PL0 vs PL!=0.  When paravirtualized, these instructions mustn't
+ *  be allowed to execute directly, lest incorrect semantics result.
+ */
+#define fc      .error "fc should not be used directly."
+#define thash   .error "thash should not be used directly."
+/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
+ * is not currently used (though it may be in a long-format VHPT system!)
+ * and the semantics of cover only change if psr.ic is off which is very
+ * rare (and currently non-existent outside of assembly code
+ */
+#define ttag    .error "ttag should not be used directly."
+#define cover   .error "cover should not be used directly."
+/* There are also privilege-sensitive registers.  These registers are
+ * readable at any privilege level but only writable at PL0.
+ */
+#define cpuid   .error "cpuid should not be used directly."
+#define pmd     .error "pmd should not be used directly."
+/*
+ * mov ar.eflag =
+ * mov = ar.eflag
+ */
+/**********************************************
+ * Instructions paravirtualized for performance
+ **********************************************/
+/*
+ * Those instructions include '.' which can't be handled by cpp.
+ * or can't be handled by cpp easily.
+ * They are handled by sed instead of cpp.
+ */
+/* for .S
+ * itc.i
+ * itc.d
+ *
+ * bsw.0
+ * bsw.1
+ *
+ * ssm psr.ic | PSR_DEFAULT_BITS
+ * ssm psr.ic
+ * rsm psr.ic
+ * ssm psr.i
+ * rsm psr.i
+ * rsm psr.i | psr.ic
+ * rsm psr.dt
+ * ssm psr.dt
+ *
+ * mov = cr.ifa
+ * mov = cr.itir
+ * mov = cr.isr
+ * mov = cr.iha
+ * mov = cr.ipsr
+ * mov = cr.iim
+ * mov = cr.iip
+ * mov = cr.ivr
+ * mov = psr
+ *
+ * mov cr.ifa =
+ * mov cr.itir =
+ * mov cr.iha =
+ * mov cr.ipsr =
+ * mov cr.ifs =
+ * mov cr.iip =
+ * mov cr.kr =
+ */
+/* for intrinsics
+ * ssm psr.i
+ * rsm psr.i
+ * mov = psr
+ * mov = ivr
+ * mov = tpr
+ * mov cr.itm =
+ * mov eoi =
+ * mov rr[] =
+ * mov = rr[]
+ * mov = kr
+ * mov kr =
+ * ptc.ga
+ */
+/*************************************************************
+ * define paravirtualized instrcution macros as nop to ingore.
+ * and check whether arguments are appropriate.
+ *************************************************************/
+/* check whether reg is a regular register */
+.macro is_rreg_in reg
+        .ifc "\reg", "r0"
+                nop 0
+                .exitm
+        .endif
+        ;;
+        mov \reg = r0
+        ;;
+.endm
+#define IS_RREG_IN(reg) is_rreg_in reg ;
+#define IS_RREG_OUT(reg)                        \
+        ;;                                      \
+        mov reg = r0                            \
+        ;;
+#define IS_RREG_CLOB(reg)       IS_RREG_OUT(reg)
+/* check whether pred is a predicate register */
+#define IS_PRED_IN(pred)                        \
+        ;;                                      \
+        (pred)  nop 0                           \
+        ;;
+#define IS_PRED_OUT(pred)                       \
+        ;;                                      \
+        cmp.eq pred, p0 = r0, r0                \
+        ;;
+#define IS_PRED_CLOB(pred)      IS_PRED_OUT(pred)
+#define DO_SAVE_MIN(__COVER, SAVE_IFS, EXTRA, WORKAROUND)       \
+        nop 0
+#define MOV_FROM_IFA(reg)                       \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_ITIR(reg)                      \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_ISR(reg)                       \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_IHA(reg)                       \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_IPSR(pred, reg)                \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_IIM(reg)                       \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_IIP(reg)                       \
+        IS_RREG_OUT(reg)
+#define MOV_FROM_IVR(reg, clob)                 \
+        IS_RREG_OUT(reg)                        \
+        IS_RREG_CLOB(clob)
+#define MOV_FROM_PSR(pred, reg, clob)           \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_OUT(reg)                        \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_IFA(reg, clob)                   \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_ITIR(pred, reg, clob)            \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_IHA(pred, reg, clob)             \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_IPSR(pred, reg, clob)            \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_IFS(pred, reg, clob)             \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_IIP(reg, clob)                   \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define MOV_TO_KR(kr, reg, clob0, clob1)        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)
+#define ITC_I(pred, reg, clob)                  \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define ITC_D(pred, reg, clob)                  \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define ITC_I_AND_D(pred_i, pred_d, reg, clob)  \
+        IS_PRED_IN(pred_i)                      \
+        IS_PRED_IN(pred_d)                      \
+        IS_RREG_IN(reg)                         \
+        IS_RREG_CLOB(clob)
+#define THASH(pred, reg0, reg1, clob)           \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_OUT(reg0)                       \
+        IS_RREG_IN(reg1)                        \
+        IS_RREG_CLOB(clob)
+#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1)    \
+        IS_RREG_CLOB(clob0)                                     \
+        IS_RREG_CLOB(clob1)
+#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1)     \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)
+#define RSM_PSR_IC(clob)                        \
+        IS_RREG_CLOB(clob)
+#define SSM_PSR_I(pred, pred_clob, clob)        \
+        IS_PRED_IN(pred)                        \
+        IS_PRED_CLOB(pred_clob)                 \
+        IS_RREG_CLOB(clob)
+#define RSM_PSR_I(pred, clob0, clob1)           \
+        IS_PRED_IN(pred)                        \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)
+#define RSM_PSR_I_IC(clob0, clob1, clob2)       \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)                     \
+        IS_RREG_CLOB(clob2)
+#define RSM_PSR_DT                              \
+        nop 0
+#define SSM_PSR_DT_AND_SRLZ_I                   \
+        nop 0
+#define BSW_0(clob0, clob1, clob2)              \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)                     \
+        IS_RREG_CLOB(clob2)
+#define BSW_1(clob0, clob1)                     \
+        IS_RREG_CLOB(clob0)                     \
+        IS_RREG_CLOB(clob1)
+#define COVER                                   \
+        nop 0
+#define RFI                                     \
+        br.ret.sptk.many rp /* defining nop causes dependency error */
+#endif /* _ASM_NATIVE_PVCHK_INST_H */
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
index 87fea11aecb7..55e6ca8eebda 100644
--- a/arch/ia64/kernel/Makefile
+++ b/arch/ia64/kernel/Makefile
@@ -112,5 +112,23 @@ clean-files += $(objtree)/include/asm-ia64/nr-irqs.h
 ASM_PARAVIRT_OBJS = ivt.o entry.o
 define paravirtualized_native
 AFLAGS_$(1) += -D__IA64_ASM_PARAVIRTUALIZED_NATIVE
+AFLAGS_pvchk-sed-$(1) += -D__IA64_ASM_PARAVIRTUALIZED_PVCHECK
+extra-y += pvchk-$(1)
 endef
 $(foreach obj,$(ASM_PARAVIRT_OBJS),$(eval $(call paravirtualized_native,$(obj))))
+#
+# Checker for paravirtualizations of privileged operations.
+#
+quiet_cmd_pv_check_sed = PVCHK   $@
+define cmd_pv_check_sed
+        sed -f $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed $< > $@
+endef
+$(obj)/pvchk-sed-%.s: $(src)/%.S $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed FORCE
+        $(call if_changed_dep,as_s_S)
+$(obj)/pvchk-%.s: $(obj)/pvchk-sed-%.s FORCE
+        $(call if_changed,pv_check_sed)
+$(obj)/pvchk-%.o: $(obj)/pvchk-%.s FORCE
+        $(call if_changed,as_o_S)
+.PRECIOUS: $(obj)/pvchk-sed-%.s $(obj)/pvchk-%.s $(obj)/pvchk-%.o
diff --git a/arch/ia64/kernel/paravirt_inst.h b/arch/ia64/kernel/paravirt_inst.h
index 5cad6fb2ed19..64d6d810c64b 100644
--- a/arch/ia64/kernel/paravirt_inst.h
+++ b/arch/ia64/kernel/paravirt_inst.h
@@ -20,7 +20,9 @@
 *
 */
-#ifdef __IA64_ASM_PARAVIRTUALIZED_XEN
+#ifdef __IA64_ASM_PARAVIRTUALIZED_PVCHECK
+#include <asm/native/pvchk_inst.h>
+#elif defined(__IA64_ASM_PARAVIRTUALIZED_XEN)
 #include <asm/xen/inst.h>
 #include <asm/xen/minstate.h>
 #else
diff --git a/arch/ia64/scripts/pvcheck.sed b/arch/ia64/scripts/pvcheck.sed
new file mode 100644
index 000000000000..ba66ac2e4c60
--- /dev/null
+++ b/arch/ia64/scripts/pvcheck.sed
@@ -0,0 +1,32 @@
+#
+# Checker for paravirtualizations of privileged operations.
+#
+s/ssm.*psr\.ic.*/.warning \"ssm psr.ic should not be used directly\"/g
+s/rsm.*psr\.ic.*/.warning \"rsm psr.ic should not be used directly\"/g
+s/ssm.*psr\.i.*/.warning \"ssm psr.i should not be used directly\"/g
+s/rsm.*psr\.i.*/.warning \"rsm psr.i should not be used directly\"/g
+s/ssm.*psr\.dt.*/.warning \"ssm psr.dt should not be used directly\"/g
+s/rsm.*psr\.dt.*/.warning \"rsm psr.dt should not be used directly\"/g
+s/mov.*=.*cr\.ifa/.warning \"cr.ifa should not used directly\"/g
+s/mov.*=.*cr\.itir/.warning \"cr.itir should not used directly\"/g
+s/mov.*=.*cr\.isr/.warning \"cr.isr should not used directly\"/g
+s/mov.*=.*cr\.iha/.warning \"cr.iha should not used directly\"/g
+s/mov.*=.*cr\.ipsr/.warning \"cr.ipsr should not used directly\"/g
+s/mov.*=.*cr\.iim/.warning \"cr.iim should not used directly\"/g
+s/mov.*=.*cr\.iip/.warning \"cr.iip should not used directly\"/g
+s/mov.*=.*cr\.ivr/.warning \"cr.ivr should not used directly\"/g
+s/mov.*=[^\.]*psr/.warning \"psr should not used directly\"/g   # avoid ar.fpsr
+s/mov.*=.*ar\.eflags/.warning \"ar.eflags should not used directly\"/g
+s/mov.*cr\.ifa.*=.*/.warning \"cr.ifa should not used directly\"/g
+s/mov.*cr\.itir.*=.*/.warning \"cr.itir should not used directly\"/g
+s/mov.*cr\.iha.*=.*/.warning \"cr.iha should not used directly\"/g
+s/mov.*cr\.ipsr.*=.*/.warning \"cr.ipsr should not used directly\"/g
+s/mov.*cr\.ifs.*=.*/.warning \"cr.ifs should not used directly\"/g
+s/mov.*cr\.iip.*=.*/.warning \"cr.iip should not used directly\"/g
+s/mov.*cr\.kr.*=.*/.warning \"cr.kr should not used directly\"/g
+s/mov.*ar\.eflags.*=.*/.warning \"ar.eflags should not used directly\"/g
+s/itc\.i.*/.warning \"itc.i should not be used directly.\"/g
+s/itc\.d.*/.warning \"itc.d should not be used directly.\"/g
+s/bsw\.0/.warning \"bsw.0 should not be used directly.\"/g
+s/bsw\.1/.warning \"bsw.1 should not be used directly.\"/g
+s/ptc\.ga.*/.warning \"ptc.ga should not be used directly.\"/g
author	Isaku Yamahata <yamahata@valinux.co.jp>	2008-10-16 22:18:13 -0400
committer	Tony Luck <tony.luck@intel.com>	2008-10-17 13:12:54 -0400
commit	f8d1f99f3958c46cdc983743d75d0b31b9accb80 (patch)
tree	ef91c20de242e67db557e831aa28f9e9597dabef
parent	98c99d7c27973538081a809c114b8d5c6195ecfa (diff)

diff --git a/arch/ia64/include/asm/native/pvchk_inst.h b/arch/ia64/include/asm/native/pvchk_inst.h new file mode 100644 index 000000000000..b8e6eb1090d7 --- /dev/null +++ b/arch/ia64/include/asm/native/pvchk_inst.h
@@ -0,0 +1,263 @@
		1	#ifndef _ASM_NATIVE_PVCHK_INST_H
		2	#define _ASM_NATIVE_PVCHK_INST_H
		3
		4	/******************************************************************************
		5	* arch/ia64/include/asm/native/pvchk_inst.h
		6	* Checker for paravirtualizations of privileged operations.
		7	*
		8	* Copyright (C) 2005 Hewlett-Packard Co
		9	* Dan Magenheimer <dan.magenheimer@hp.com>
		10	*
		11	* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
		12	* VA Linux Systems Japan K.K.
		13	*
		14	* This program is free software; you can redistribute it and/or modify
		15	* it under the terms of the GNU General Public License as published by
		16	* the Free Software Foundation; either version 2 of the License, or
		17	* (at your option) any later version.
		18	*
		19	* This program is distributed in the hope that it will be useful,
		20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		22	* GNU General Public License for more details.
		23	*
		24	* You should have received a copy of the GNU General Public License
		25	* along with this program; if not, write to the Free Software
		26	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		27	*
		28	*/
		29
		30	/**********************************************
		31	* Instructions paravirtualized for correctness
		32	**********************************************/
		33
		34	/* "fc" and "thash" are privilege-sensitive instructions, meaning they
		35	* may have different semantics depending on whether they are executed
		36	* at PL0 vs PL!=0. When paravirtualized, these instructions mustn't
		37	* be allowed to execute directly, lest incorrect semantics result.
		38	*/
		39
		40	#define fc .error "fc should not be used directly."
		41	#define thash .error "thash should not be used directly."
		42
		43	/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
		44	* is not currently used (though it may be in a long-format VHPT system!)
		45	* and the semantics of cover only change if psr.ic is off which is very
		46	* rare (and currently non-existent outside of assembly code
		47	*/
		48	#define ttag .error "ttag should not be used directly."
		49	#define cover .error "cover should not be used directly."
		50
		51	/* There are also privilege-sensitive registers. These registers are
		52	* readable at any privilege level but only writable at PL0.
		53	*/
		54	#define cpuid .error "cpuid should not be used directly."
		55	#define pmd .error "pmd should not be used directly."
		56
		57	/*
		58	* mov ar.eflag =
		59	* mov = ar.eflag
		60	*/
		61
		62	/**********************************************
		63	* Instructions paravirtualized for performance
		64	**********************************************/
		65	/*
		66	* Those instructions include '.' which can't be handled by cpp.
		67	* or can't be handled by cpp easily.
		68	* They are handled by sed instead of cpp.
		69	*/
		70
		71	/* for .S
		72	* itc.i
		73	* itc.d
		74	*
		75	* bsw.0
		76	* bsw.1
		77	*
		78	* ssm psr.ic \| PSR_DEFAULT_BITS
		79	* ssm psr.ic
		80	* rsm psr.ic
		81	* ssm psr.i
		82	* rsm psr.i
		83	* rsm psr.i \| psr.ic
		84	* rsm psr.dt
		85	* ssm psr.dt
		86	*
		87	* mov = cr.ifa
		88	* mov = cr.itir
		89	* mov = cr.isr
		90	* mov = cr.iha
		91	* mov = cr.ipsr
		92	* mov = cr.iim
		93	* mov = cr.iip
		94	* mov = cr.ivr
		95	* mov = psr
		96	*
		97	* mov cr.ifa =
		98	* mov cr.itir =
		99	* mov cr.iha =
		100	* mov cr.ipsr =
		101	* mov cr.ifs =
		102	* mov cr.iip =
		103	* mov cr.kr =
		104	*/
		105
		106	/* for intrinsics
		107	* ssm psr.i
		108	* rsm psr.i
		109	* mov = psr
		110	* mov = ivr
		111	* mov = tpr
		112	* mov cr.itm =
		113	* mov eoi =
		114	* mov rr[] =
		115	* mov = rr[]
		116	* mov = kr
		117	* mov kr =
		118	* ptc.ga
		119	*/
		120
		121	/*************************************************************
		122	* define paravirtualized instrcution macros as nop to ingore.
		123	* and check whether arguments are appropriate.
		124	*************************************************************/
		125
		126	/* check whether reg is a regular register */
		127	.macro is_rreg_in reg
		128	.ifc "\reg", "r0"
		129	nop 0
		130	.exitm
		131	.endif
		132	;;
		133	mov \reg = r0
		134	;;
		135	.endm
		136	#define IS_RREG_IN(reg) is_rreg_in reg ;
		137
		138	#define IS_RREG_OUT(reg) \
		139	;; \
		140	mov reg = r0 \
		141	;;
		142
		143	#define IS_RREG_CLOB(reg) IS_RREG_OUT(reg)
		144
		145	/* check whether pred is a predicate register */
		146	#define IS_PRED_IN(pred) \
		147	;; \
		148	(pred) nop 0 \
		149	;;
		150
		151	#define IS_PRED_OUT(pred) \
		152	;; \
		153	cmp.eq pred, p0 = r0, r0 \
		154	;;
		155
		156	#define IS_PRED_CLOB(pred) IS_PRED_OUT(pred)
		157
		158
		159	#define DO_SAVE_MIN(__COVER, SAVE_IFS, EXTRA, WORKAROUND) \
		160	nop 0
		161	#define MOV_FROM_IFA(reg) \
		162	IS_RREG_OUT(reg)
		163	#define MOV_FROM_ITIR(reg) \
		164	IS_RREG_OUT(reg)
		165	#define MOV_FROM_ISR(reg) \
		166	IS_RREG_OUT(reg)
		167	#define MOV_FROM_IHA(reg) \
		168	IS_RREG_OUT(reg)
		169	#define MOV_FROM_IPSR(pred, reg) \
		170	IS_PRED_IN(pred) \
		171	IS_RREG_OUT(reg)
		172	#define MOV_FROM_IIM(reg) \
		173	IS_RREG_OUT(reg)
		174	#define MOV_FROM_IIP(reg) \
		175	IS_RREG_OUT(reg)
		176	#define MOV_FROM_IVR(reg, clob) \
		177	IS_RREG_OUT(reg) \
		178	IS_RREG_CLOB(clob)
		179	#define MOV_FROM_PSR(pred, reg, clob) \
		180	IS_PRED_IN(pred) \
		181	IS_RREG_OUT(reg) \
		182	IS_RREG_CLOB(clob)
		183	#define MOV_TO_IFA(reg, clob) \
		184	IS_RREG_IN(reg) \
		185	IS_RREG_CLOB(clob)
		186	#define MOV_TO_ITIR(pred, reg, clob) \
		187	IS_PRED_IN(pred) \
		188	IS_RREG_IN(reg) \
		189	IS_RREG_CLOB(clob)
		190	#define MOV_TO_IHA(pred, reg, clob) \
		191	IS_PRED_IN(pred) \
		192	IS_RREG_IN(reg) \
		193	IS_RREG_CLOB(clob)
		194	#define MOV_TO_IPSR(pred, reg, clob) \
		195	IS_PRED_IN(pred) \
		196	IS_RREG_IN(reg) \
		197	IS_RREG_CLOB(clob)
		198	#define MOV_TO_IFS(pred, reg, clob) \
		199	IS_PRED_IN(pred) \
		200	IS_RREG_IN(reg) \
		201	IS_RREG_CLOB(clob)
		202	#define MOV_TO_IIP(reg, clob) \
		203	IS_RREG_IN(reg) \
		204	IS_RREG_CLOB(clob)
		205	#define MOV_TO_KR(kr, reg, clob0, clob1) \
		206	IS_RREG_IN(reg) \
		207	IS_RREG_CLOB(clob0) \
		208	IS_RREG_CLOB(clob1)
		209	#define ITC_I(pred, reg, clob) \
		210	IS_PRED_IN(pred) \
		211	IS_RREG_IN(reg) \
		212	IS_RREG_CLOB(clob)
		213	#define ITC_D(pred, reg, clob) \
		214	IS_PRED_IN(pred) \
		215	IS_RREG_IN(reg) \
		216	IS_RREG_CLOB(clob)
		217	#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
		218	IS_PRED_IN(pred_i) \
		219	IS_PRED_IN(pred_d) \
		220	IS_RREG_IN(reg) \
		221	IS_RREG_CLOB(clob)
		222	#define THASH(pred, reg0, reg1, clob) \
		223	IS_PRED_IN(pred) \
		224	IS_RREG_OUT(reg0) \
		225	IS_RREG_IN(reg1) \
		226	IS_RREG_CLOB(clob)
		227	#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
		228	IS_RREG_CLOB(clob0) \
		229	IS_RREG_CLOB(clob1)
		230	#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
		231	IS_RREG_CLOB(clob0) \
		232	IS_RREG_CLOB(clob1)
		233	#define RSM_PSR_IC(clob) \
		234	IS_RREG_CLOB(clob)
		235	#define SSM_PSR_I(pred, pred_clob, clob) \
		236	IS_PRED_IN(pred) \
		237	IS_PRED_CLOB(pred_clob) \
		238	IS_RREG_CLOB(clob)
		239	#define RSM_PSR_I(pred, clob0, clob1) \
		240	IS_PRED_IN(pred) \
		241	IS_RREG_CLOB(clob0) \
		242	IS_RREG_CLOB(clob1)
		243	#define RSM_PSR_I_IC(clob0, clob1, clob2) \
		244	IS_RREG_CLOB(clob0) \
		245	IS_RREG_CLOB(clob1) \
		246	IS_RREG_CLOB(clob2)
		247	#define RSM_PSR_DT \
		248	nop 0
		249	#define SSM_PSR_DT_AND_SRLZ_I \
		250	nop 0
		251	#define BSW_0(clob0, clob1, clob2) \
		252	IS_RREG_CLOB(clob0) \
		253	IS_RREG_CLOB(clob1) \
		254	IS_RREG_CLOB(clob2)
		255	#define BSW_1(clob0, clob1) \
		256	IS_RREG_CLOB(clob0) \
		257	IS_RREG_CLOB(clob1)
		258	#define COVER \
		259	nop 0
		260	#define RFI \
		261	br.ret.sptk.many rp /* defining nop causes dependency error */
		262
		263	#endif /* _ASM_NATIVE_PVCHK_INST_H */


diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile index 87fea11aecb7..55e6ca8eebda 100644 --- a/arch/ia64/kernel/Makefile +++ b/arch/ia64/kernel/Makefile
@@ -112,5 +112,23 @@ clean-files += $(objtree)/include/asm-ia64/nr-irqs.h
112	ASM_PARAVIRT_OBJS = ivt.o entry.o	112	ASM_PARAVIRT_OBJS = ivt.o entry.o
113	define paravirtualized_native	113	define paravirtualized_native
114	AFLAGS_$(1) += -D__IA64_ASM_PARAVIRTUALIZED_NATIVE	114	AFLAGS_$(1) += -D__IA64_ASM_PARAVIRTUALIZED_NATIVE
		115	AFLAGS_pvchk-sed-$(1) += -D__IA64_ASM_PARAVIRTUALIZED_PVCHECK
		116	extra-y += pvchk-$(1)
115	endef	117	endef
116	$(foreach obj,$(ASM_PARAVIRT_OBJS),$(eval $(call paravirtualized_native,$(obj))))	118	$(foreach obj,$(ASM_PARAVIRT_OBJS),$(eval $(call paravirtualized_native,$(obj))))
		119
		120	#
		121	# Checker for paravirtualizations of privileged operations.
		122	#
		123	quiet_cmd_pv_check_sed = PVCHK $@
		124	define cmd_pv_check_sed
		125	sed -f $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed $< > $@
		126	endef
		127
		128	$(obj)/pvchk-sed-%.s: $(src)/%.S $(srctree)/arch/$(SRCARCH)/scripts/pvcheck.sed FORCE
		129	$(call if_changed_dep,as_s_S)
		130	$(obj)/pvchk-%.s: $(obj)/pvchk-sed-%.s FORCE
		131	$(call if_changed,pv_check_sed)
		132	$(obj)/pvchk-%.o: $(obj)/pvchk-%.s FORCE
		133	$(call if_changed,as_o_S)
		134	.PRECIOUS: $(obj)/pvchk-sed-%.s $(obj)/pvchk-%.s $(obj)/pvchk-%.o


diff --git a/arch/ia64/kernel/paravirt_inst.h b/arch/ia64/kernel/paravirt_inst.h index 5cad6fb2ed19..64d6d810c64b 100644 --- a/arch/ia64/kernel/paravirt_inst.h +++ b/arch/ia64/kernel/paravirt_inst.h
@@ -20,7 +20,9 @@
20	*	20	*
21	*/	21	*/
22		22
23	#ifdef __IA64_ASM_PARAVIRTUALIZED_XEN	23	#ifdef __IA64_ASM_PARAVIRTUALIZED_PVCHECK
		24	#include <asm/native/pvchk_inst.h>
		25	#elif defined(__IA64_ASM_PARAVIRTUALIZED_XEN)
24	#include <asm/xen/inst.h>	26	#include <asm/xen/inst.h>
25	#include <asm/xen/minstate.h>	27	#include <asm/xen/minstate.h>
26	#else	28	#else


diff --git a/arch/ia64/scripts/pvcheck.sed b/arch/ia64/scripts/pvcheck.sed new file mode 100644 index 000000000000..ba66ac2e4c60 --- /dev/null +++ b/arch/ia64/scripts/pvcheck.sed
@@ -0,0 +1,32 @@
		1	#
		2	# Checker for paravirtualizations of privileged operations.
		3	#
		4	s/ssm.psr\.ic./.warning \"ssm psr.ic should not be used directly\"/g
		5	s/rsm.psr\.ic./.warning \"rsm psr.ic should not be used directly\"/g
		6	s/ssm.psr\.i./.warning \"ssm psr.i should not be used directly\"/g
		7	s/rsm.psr\.i./.warning \"rsm psr.i should not be used directly\"/g
		8	s/ssm.psr\.dt./.warning \"ssm psr.dt should not be used directly\"/g
		9	s/rsm.psr\.dt./.warning \"rsm psr.dt should not be used directly\"/g
		10	s/mov.=.cr\.ifa/.warning \"cr.ifa should not used directly\"/g
		11	s/mov.=.cr\.itir/.warning \"cr.itir should not used directly\"/g
		12	s/mov.=.cr\.isr/.warning \"cr.isr should not used directly\"/g
		13	s/mov.=.cr\.iha/.warning \"cr.iha should not used directly\"/g
		14	s/mov.=.cr\.ipsr/.warning \"cr.ipsr should not used directly\"/g
		15	s/mov.=.cr\.iim/.warning \"cr.iim should not used directly\"/g
		16	s/mov.=.cr\.iip/.warning \"cr.iip should not used directly\"/g
		17	s/mov.=.cr\.ivr/.warning \"cr.ivr should not used directly\"/g
		18	s/mov.=[^\.]psr/.warning \"psr should not used directly\"/g # avoid ar.fpsr
		19	s/mov.=.ar\.eflags/.warning \"ar.eflags should not used directly\"/g
		20	s/mov.cr\.ifa.=.*/.warning \"cr.ifa should not used directly\"/g
		21	s/mov.cr\.itir.=.*/.warning \"cr.itir should not used directly\"/g
		22	s/mov.cr\.iha.=.*/.warning \"cr.iha should not used directly\"/g
		23	s/mov.cr\.ipsr.=.*/.warning \"cr.ipsr should not used directly\"/g
		24	s/mov.cr\.ifs.=.*/.warning \"cr.ifs should not used directly\"/g
		25	s/mov.cr\.iip.=.*/.warning \"cr.iip should not used directly\"/g
		26	s/mov.cr\.kr.=.*/.warning \"cr.kr should not used directly\"/g
		27	s/mov.ar\.eflags.=.*/.warning \"ar.eflags should not used directly\"/g
		28	s/itc\.i.*/.warning \"itc.i should not be used directly.\"/g
		29	s/itc\.d.*/.warning \"itc.d should not be used directly.\"/g
		30	s/bsw\.0/.warning \"bsw.0 should not be used directly.\"/g
		31	s/bsw\.1/.warning \"bsw.1 should not be used directly.\"/g
		32	s/ptc\.ga.*/.warning \"ptc.ga should not be used directly.\"/g