diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2010-03-04 11:39:02 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-03-04 11:39:02 -0500 |
commit | f341dddf1dadf64be309791f83d7904245f1261d (patch) | |
tree | 974c9e1f23da6743532162fd86cf019da497eaff | |
parent | eaa5eec739637f32f8733d528ff0b94fd62b1214 (diff) | |
parent | b02957d58a27525499ab10d272d3b44682a7ae50 (diff) |
Staging: merge staging patches into Linus's main branch
There were a number of patches that went into Linus's
tree already that conflicted with other changes in the
staging branch. This merge resolves those merge conflicts.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
478 files changed, 29061 insertions, 24373 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index fc2e963e65e9..7696a664f8a5 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig | |||
@@ -71,8 +71,6 @@ source "drivers/staging/asus_oled/Kconfig" | |||
71 | 71 | ||
72 | source "drivers/staging/panel/Kconfig" | 72 | source "drivers/staging/panel/Kconfig" |
73 | 73 | ||
74 | source "drivers/staging/altpciechdma/Kconfig" | ||
75 | |||
76 | source "drivers/staging/rtl8187se/Kconfig" | 74 | source "drivers/staging/rtl8187se/Kconfig" |
77 | 75 | ||
78 | source "drivers/staging/rtl8192su/Kconfig" | 76 | source "drivers/staging/rtl8192su/Kconfig" |
@@ -81,20 +79,14 @@ source "drivers/staging/rtl8192u/Kconfig" | |||
81 | 79 | ||
82 | source "drivers/staging/rtl8192e/Kconfig" | 80 | source "drivers/staging/rtl8192e/Kconfig" |
83 | 81 | ||
84 | source "drivers/staging/mimio/Kconfig" | ||
85 | |||
86 | source "drivers/staging/frontier/Kconfig" | 82 | source "drivers/staging/frontier/Kconfig" |
87 | 83 | ||
88 | source "drivers/staging/dream/Kconfig" | 84 | source "drivers/staging/dream/Kconfig" |
89 | 85 | ||
90 | source "drivers/staging/pohmelfs/Kconfig" | 86 | source "drivers/staging/pohmelfs/Kconfig" |
91 | 87 | ||
92 | source "drivers/staging/b3dfg/Kconfig" | ||
93 | |||
94 | source "drivers/staging/phison/Kconfig" | 88 | source "drivers/staging/phison/Kconfig" |
95 | 89 | ||
96 | source "drivers/staging/p9auth/Kconfig" | ||
97 | |||
98 | source "drivers/staging/line6/Kconfig" | 90 | source "drivers/staging/line6/Kconfig" |
99 | 91 | ||
100 | source "drivers/gpu/drm/vmwgfx/Kconfig" | 92 | source "drivers/gpu/drm/vmwgfx/Kconfig" |
@@ -117,7 +109,7 @@ source "drivers/staging/hv/Kconfig" | |||
117 | 109 | ||
118 | source "drivers/staging/vme/Kconfig" | 110 | source "drivers/staging/vme/Kconfig" |
119 | 111 | ||
120 | source "drivers/staging/rar/Kconfig" | 112 | source "drivers/staging/rar_register/Kconfig" |
121 | 113 | ||
122 | source "drivers/staging/sep/Kconfig" | 114 | source "drivers/staging/sep/Kconfig" |
123 | 115 | ||
@@ -143,5 +135,9 @@ source "drivers/staging/netwave/Kconfig" | |||
143 | 135 | ||
144 | source "drivers/staging/sm7xx/Kconfig" | 136 | source "drivers/staging/sm7xx/Kconfig" |
145 | 137 | ||
138 | source "drivers/staging/dt3155/Kconfig" | ||
139 | |||
140 | source "drivers/staging/crystalhd/Kconfig" | ||
141 | |||
146 | endif # !STAGING_EXCLUDE_BUILD | 142 | endif # !STAGING_EXCLUDE_BUILD |
147 | endif # STAGING | 143 | endif # STAGING |
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index b5e67b889f60..ea2e70e2fed4 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile | |||
@@ -18,18 +18,14 @@ obj-$(CONFIG_RT2870) += rt2870/ | |||
18 | obj-$(CONFIG_COMEDI) += comedi/ | 18 | obj-$(CONFIG_COMEDI) += comedi/ |
19 | obj-$(CONFIG_ASUS_OLED) += asus_oled/ | 19 | obj-$(CONFIG_ASUS_OLED) += asus_oled/ |
20 | obj-$(CONFIG_PANEL) += panel/ | 20 | obj-$(CONFIG_PANEL) += panel/ |
21 | obj-$(CONFIG_ALTERA_PCIE_CHDMA) += altpciechdma/ | ||
22 | obj-$(CONFIG_R8187SE) += rtl8187se/ | 21 | obj-$(CONFIG_R8187SE) += rtl8187se/ |
23 | obj-$(CONFIG_RTL8192SU) += rtl8192su/ | 22 | obj-$(CONFIG_RTL8192SU) += rtl8192su/ |
24 | obj-$(CONFIG_RTL8192U) += rtl8192u/ | 23 | obj-$(CONFIG_RTL8192U) += rtl8192u/ |
25 | obj-$(CONFIG_RTL8192E) += rtl8192e/ | 24 | obj-$(CONFIG_RTL8192E) += rtl8192e/ |
26 | obj-$(CONFIG_INPUT_MIMIO) += mimio/ | ||
27 | obj-$(CONFIG_TRANZPORT) += frontier/ | 25 | obj-$(CONFIG_TRANZPORT) += frontier/ |
28 | obj-$(CONFIG_DREAM) += dream/ | 26 | obj-$(CONFIG_DREAM) += dream/ |
29 | obj-$(CONFIG_POHMELFS) += pohmelfs/ | 27 | obj-$(CONFIG_POHMELFS) += pohmelfs/ |
30 | obj-$(CONFIG_B3DFG) += b3dfg/ | ||
31 | obj-$(CONFIG_IDE_PHISON) += phison/ | 28 | obj-$(CONFIG_IDE_PHISON) += phison/ |
32 | obj-$(CONFIG_PLAN9AUTH) += p9auth/ | ||
33 | obj-$(CONFIG_LINE6_USB) += line6/ | 29 | obj-$(CONFIG_LINE6_USB) += line6/ |
34 | obj-$(CONFIG_USB_SERIAL_QUATECH2) += serqt_usb2/ | 30 | obj-$(CONFIG_USB_SERIAL_QUATECH2) += serqt_usb2/ |
35 | obj-$(CONFIG_USB_SERIAL_QUATECH_USB2) += quatech_usb2/ | 31 | obj-$(CONFIG_USB_SERIAL_QUATECH_USB2) += quatech_usb2/ |
@@ -39,7 +35,7 @@ obj-$(CONFIG_VT6656) += vt6656/ | |||
39 | obj-$(CONFIG_FB_UDL) += udlfb/ | 35 | obj-$(CONFIG_FB_UDL) += udlfb/ |
40 | obj-$(CONFIG_HYPERV) += hv/ | 36 | obj-$(CONFIG_HYPERV) += hv/ |
41 | obj-$(CONFIG_VME_BUS) += vme/ | 37 | obj-$(CONFIG_VME_BUS) += vme/ |
42 | obj-$(CONFIG_RAR_REGISTER) += rar/ | 38 | obj-$(CONFIG_RAR_REGISTER) += rar_register/ |
43 | obj-$(CONFIG_DX_SEP) += sep/ | 39 | obj-$(CONFIG_DX_SEP) += sep/ |
44 | obj-$(CONFIG_IIO) += iio/ | 40 | obj-$(CONFIG_IIO) += iio/ |
45 | obj-$(CONFIG_RAMZSWAP) += ramzswap/ | 41 | obj-$(CONFIG_RAMZSWAP) += ramzswap/ |
@@ -53,3 +49,5 @@ obj-$(CONFIG_WAVELAN) += wavelan/ | |||
53 | obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/ | 49 | obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/ |
54 | obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/ | 50 | obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/ |
55 | obj-$(CONFIG_FB_SM7XX) += sm7xx/ | 51 | obj-$(CONFIG_FB_SM7XX) += sm7xx/ |
52 | obj-$(CONFIG_DT3155) += dt3155/ | ||
53 | obj-$(CONFIG_CRYSTALHD) += crystalhd/ | ||
diff --git a/drivers/staging/altpciechdma/Kconfig b/drivers/staging/altpciechdma/Kconfig deleted file mode 100644 index 0f4bf92cbbfb..000000000000 --- a/drivers/staging/altpciechdma/Kconfig +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | config ALTERA_PCIE_CHDMA | ||
2 | tristate "Altera PCI Express Chaining DMA driver" | ||
3 | depends on PCI | ||
4 | default N | ||
5 | ---help--- | ||
6 | A reference driver that exercises the Chaining DMA logic reference | ||
7 | design generated along the Altera FPGA PCI Express soft or hard core, | ||
8 | only if instantiated using the MegaWizard, not the SOPC builder, of | ||
9 | Quartus 8.1. | ||
10 | |||
diff --git a/drivers/staging/altpciechdma/Makefile b/drivers/staging/altpciechdma/Makefile deleted file mode 100644 index c08c8437f4db..000000000000 --- a/drivers/staging/altpciechdma/Makefile +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | obj-$(CONFIG_ALTERA_PCIE_CHDMA) += altpciechdma.o | ||
2 | |||
diff --git a/drivers/staging/altpciechdma/TODO b/drivers/staging/altpciechdma/TODO deleted file mode 100644 index 12c945fd61e1..000000000000 --- a/drivers/staging/altpciechdma/TODO +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | DONE: | ||
2 | - functionality similar to logic testbench | ||
3 | |||
4 | TODO: | ||
5 | - checkpatch.pl cleanups. | ||
6 | - keep state of DMA engines. | ||
7 | - keep data structure that keeps state of each transfer. | ||
8 | - interrupt handler should iterate over outstanding descriptor tables. | ||
9 | - complete userspace cdev to read/write using the DMA engines. | ||
10 | - split off the DMA support functions in a module, re-usable by custom | ||
11 | drivers. | ||
12 | |||
13 | Please coordinate work with, and send patches to | ||
14 | Leon Woestenberg <leon@sidebranch.com> | ||
15 | |||
diff --git a/drivers/staging/altpciechdma/altpciechdma.c b/drivers/staging/altpciechdma/altpciechdma.c deleted file mode 100644 index 2f07dd4563ac..000000000000 --- a/drivers/staging/altpciechdma/altpciechdma.c +++ /dev/null | |||
@@ -1,1182 +0,0 @@ | |||
1 | /** | ||
2 | * Driver for Altera PCIe core chaining DMA reference design. | ||
3 | * | ||
4 | * Copyright (C) 2008 Leon Woestenberg <leon.woestenberg@axon.tv> | ||
5 | * Copyright (C) 2008 Nickolas Heppermann <heppermannwdt@gmail.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along | ||
18 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
20 | * | ||
21 | * | ||
22 | * Rationale: This driver exercises the chaining DMA read and write engine | ||
23 | * in the reference design. It is meant as a complementary reference | ||
24 | * driver that can be used for testing early designs as well as a basis to | ||
25 | * write your custom driver. | ||
26 | * | ||
27 | * Status: Test results from Leon Woestenberg <leon.woestenberg@axon.tv>: | ||
28 | * | ||
29 | * Sendero Board w/ Cyclone II EP2C35F672C6N, PX1011A PCIe x1 PHY on a | ||
30 | * Dell Precision 370 PC, x86, kernel 2.6.20 from Ubuntu 7.04. | ||
31 | * | ||
32 | * Sendero Board w/ Cyclone II EP2C35F672C6N, PX1011A PCIe x1 PHY on a | ||
33 | * Freescale MPC8313E-RDB board, PowerPC, 2.6.24 w/ Freescale patches. | ||
34 | * | ||
35 | * Driver tests passed with PCIe Compiler 8.1. With PCIe 8.0 the DMA | ||
36 | * loopback test had reproducable compare errors. I assume a change | ||
37 | * in the compiler or reference design, but could not find evidence nor | ||
38 | * documentation on a change or fix in that direction. | ||
39 | * | ||
40 | * The reference design does not have readable locations and thus a | ||
41 | * dummy read, used to flush PCI posted writes, cannot be performed. | ||
42 | * | ||
43 | */ | ||
44 | |||
45 | #include <linux/kernel.h> | ||
46 | #include <linux/cdev.h> | ||
47 | #include <linux/delay.h> | ||
48 | #include <linux/dma-mapping.h> | ||
49 | #include <linux/init.h> | ||
50 | #include <linux/interrupt.h> | ||
51 | #include <linux/io.h> | ||
52 | #include <linux/jiffies.h> | ||
53 | #include <linux/module.h> | ||
54 | #include <linux/pci.h> | ||
55 | |||
56 | |||
57 | /* by default do not build the character device interface */ | ||
58 | /* XXX It is non-functional yet */ | ||
59 | #ifndef ALTPCIECHDMA_CDEV | ||
60 | # define ALTPCIECHDMA_CDEV 0 | ||
61 | #endif | ||
62 | |||
63 | /* build the character device interface? */ | ||
64 | #if ALTPCIECHDMA_CDEV | ||
65 | # define MAX_CHDMA_SIZE (8 * 1024 * 1024) | ||
66 | # include "mapper_user_to_sg.h" | ||
67 | #endif | ||
68 | |||
69 | /** driver name, mimicks Altera naming of the reference design */ | ||
70 | #define DRV_NAME "altpciechdma" | ||
71 | /** number of BARs on the device */ | ||
72 | #define APE_BAR_NUM (6) | ||
73 | /** BAR number where the RCSLAVE memory sits */ | ||
74 | #define APE_BAR_RCSLAVE (0) | ||
75 | /** BAR number where the Descriptor Header sits */ | ||
76 | #define APE_BAR_HEADER (2) | ||
77 | |||
78 | /** maximum size in bytes of the descriptor table, chdma logic limit */ | ||
79 | #define APE_CHDMA_TABLE_SIZE (4096) | ||
80 | /* single transfer must not exceed 255 table entries. worst case this can be | ||
81 | * achieved by 255 scattered pages, with only a single byte in the head and | ||
82 | * tail pages. 253 * PAGE_SIZE is a safe upper bound for the transfer size. | ||
83 | */ | ||
84 | #define APE_CHDMA_MAX_TRANSFER_LEN (253 * PAGE_SIZE) | ||
85 | |||
86 | /** | ||
87 | * Specifies those BARs to be mapped and the length of each mapping. | ||
88 | * | ||
89 | * Zero (0) means do not map, otherwise specifies the BAR lengths to be mapped. | ||
90 | * If the actual BAR length is less, this is considered an error; then | ||
91 | * reconfigure your PCIe core. | ||
92 | * | ||
93 | * @see ug_pci_express 8.0, table 7-2 at page 7-13. | ||
94 | */ | ||
95 | static const unsigned long bar_min_len[APE_BAR_NUM] = | ||
96 | { 32768, 0, 256, 0, 32768, 0 }; | ||
97 | |||
98 | /** | ||
99 | * Descriptor Header, controls the DMA read engine or write engine. | ||
100 | * | ||
101 | * The descriptor header is the main data structure for starting DMA transfers. | ||
102 | * | ||
103 | * It sits in End Point (FPGA) memory BAR[2] for 32-bit or BAR[3:2] for 64-bit. | ||
104 | * It references a descriptor table which exists in Root Complex (PC) memory. | ||
105 | * Writing the rclast field starts the DMA operation, thus all other structures | ||
106 | * and fields must be setup before doing so. | ||
107 | * | ||
108 | * @see ug_pci_express 8.0, tables 7-3, 7-4 and 7-5 at page 7-14. | ||
109 | * @note This header must be written in four 32-bit (PCI DWORD) writes. | ||
110 | */ | ||
111 | struct ape_chdma_header { | ||
112 | /** | ||
113 | * w0 consists of two 16-bit fields: | ||
114 | * lsb u16 number; number of descriptors in ape_chdma_table | ||
115 | * msb u16 control; global control flags | ||
116 | */ | ||
117 | u32 w0; | ||
118 | /* bus address to ape_chdma_table in Root Complex memory */ | ||
119 | u32 bdt_addr_h; | ||
120 | u32 bdt_addr_l; | ||
121 | /** | ||
122 | * w3 consists of two 16-bit fields: | ||
123 | * - lsb u16 rclast; last descriptor number available in Root Complex | ||
124 | * - zero (0) means the first descriptor is ready, | ||
125 | * - one (1) means two descriptors are ready, etc. | ||
126 | * - msb u16 reserved; | ||
127 | * | ||
128 | * @note writing to this memory location starts the DMA operation! | ||
129 | */ | ||
130 | u32 w3; | ||
131 | } __attribute__ ((packed)); | ||
132 | |||
133 | /** | ||
134 | * Descriptor Entry, describing a (non-scattered) single memory block transfer. | ||
135 | * | ||
136 | * There is one descriptor for each memory block involved in the transfer, a | ||
137 | * block being a contiguous address range on the bus. | ||
138 | * | ||
139 | * Multiple descriptors are chained by means of the ape_chdma_table data | ||
140 | * structure. | ||
141 | * | ||
142 | * @see ug_pci_express 8.0, tables 7-6, 7-7 and 7-8 at page 7-14 and page 7-15. | ||
143 | */ | ||
144 | struct ape_chdma_desc { | ||
145 | /** | ||
146 | * w0 consists of two 16-bit fields: | ||
147 | * number of DWORDS to transfer | ||
148 | * - lsb u16 length; | ||
149 | * global control | ||
150 | * - msb u16 control; | ||
151 | */ | ||
152 | u32 w0; | ||
153 | /* address of memory in the End Point */ | ||
154 | u32 ep_addr; | ||
155 | /* bus address of source or destination memory in the Root Complex */ | ||
156 | u32 rc_addr_h; | ||
157 | u32 rc_addr_l; | ||
158 | } __attribute__ ((packed)); | ||
159 | |||
160 | /** | ||
161 | * Descriptor Table, an array of descriptors describing a chained transfer. | ||
162 | * | ||
163 | * An array of descriptors, preceded by workspace for the End Point. | ||
164 | * It exists in Root Complex memory. | ||
165 | * | ||
166 | * The End Point can update its last completed descriptor number in the | ||
167 | * eplast field if requested by setting the EPLAST_ENA bit either | ||
168 | * globally in the header's or locally in any descriptor's control field. | ||
169 | * | ||
170 | * @note this structure may not exceed 4096 bytes. This results in a | ||
171 | * maximum of 4096 / (4 * 4) - 1 = 255 descriptors per chained transfer. | ||
172 | * | ||
173 | * @see ug_pci_express 8.0, tables 7-9, 7-10 and 7-11 at page 7-17 and page 7-18. | ||
174 | */ | ||
175 | struct ape_chdma_table { | ||
176 | /* workspace 0x00-0x0b, reserved */ | ||
177 | u32 reserved1[3]; | ||
178 | /* workspace 0x0c-0x0f, last descriptor handled by End Point */ | ||
179 | u32 w3; | ||
180 | /* the actual array of descriptors | ||
181 | * 0x10-0x1f, 0x20-0x2f, ... 0xff0-0xfff (255 entries) | ||
182 | */ | ||
183 | struct ape_chdma_desc desc[255]; | ||
184 | } __attribute__ ((packed)); | ||
185 | |||
186 | /** | ||
187 | * Altera PCI Express ('ape') board specific book keeping data | ||
188 | * | ||
189 | * Keeps state of the PCIe core and the Chaining DMA controller | ||
190 | * application. | ||
191 | */ | ||
192 | struct ape_dev { | ||
193 | /** the kernel pci device data structure provided by probe() */ | ||
194 | struct pci_dev *pci_dev; | ||
195 | /** | ||
196 | * kernel virtual address of the mapped BAR memory and IO regions of | ||
197 | * the End Point. Used by map_bars()/unmap_bars(). | ||
198 | */ | ||
199 | void * __iomem bar[APE_BAR_NUM]; | ||
200 | /** kernel virtual address for Descriptor Table in Root Complex memory */ | ||
201 | struct ape_chdma_table *table_virt; | ||
202 | /** | ||
203 | * bus address for the Descriptor Table in Root Complex memory, in | ||
204 | * CPU-native endianess | ||
205 | */ | ||
206 | dma_addr_t table_bus; | ||
207 | /* if the device regions could not be allocated, assume and remember it | ||
208 | * is in use by another driver; this driver must not disable the device. | ||
209 | */ | ||
210 | int in_use; | ||
211 | /* whether this driver enabled msi for the device */ | ||
212 | int msi_enabled; | ||
213 | /* whether this driver could obtain the regions */ | ||
214 | int got_regions; | ||
215 | /* irq line successfully requested by this driver, -1 otherwise */ | ||
216 | int irq_line; | ||
217 | /* board revision */ | ||
218 | u8 revision; | ||
219 | /* interrupt count, incremented by the interrupt handler */ | ||
220 | int irq_count; | ||
221 | #if ALTPCIECHDMA_CDEV | ||
222 | /* character device */ | ||
223 | dev_t cdevno; | ||
224 | struct cdev cdev; | ||
225 | /* user space scatter gather mapper */ | ||
226 | struct sg_mapping_t *sgm; | ||
227 | #endif | ||
228 | }; | ||
229 | |||
230 | /** | ||
231 | * Using the subsystem vendor id and subsystem id, it is possible to | ||
232 | * distinguish between different cards bases around the same | ||
233 | * (third-party) logic core. | ||
234 | * | ||
235 | * Default Altera vendor and device ID's, and some (non-reserved) | ||
236 | * ID's are now used here that are used amongst the testers/developers. | ||
237 | */ | ||
238 | static const struct pci_device_id ids[] = { | ||
239 | { PCI_DEVICE(0x1172, 0xE001), }, | ||
240 | { PCI_DEVICE(0x2071, 0x2071), }, | ||
241 | { 0, } | ||
242 | }; | ||
243 | MODULE_DEVICE_TABLE(pci, ids); | ||
244 | |||
245 | #if ALTPCIECHDMA_CDEV | ||
246 | /* prototypes for character device */ | ||
247 | static int sg_init(struct ape_dev *ape); | ||
248 | static void sg_exit(struct ape_dev *ape); | ||
249 | #endif | ||
250 | |||
251 | /** | ||
252 | * altpciechdma_isr() - Interrupt handler | ||
253 | * | ||
254 | */ | ||
255 | static irqreturn_t altpciechdma_isr(int irq, void *dev_id) | ||
256 | { | ||
257 | struct ape_dev *ape = (struct ape_dev *)dev_id; | ||
258 | if (!ape) | ||
259 | return IRQ_NONE; | ||
260 | ape->irq_count++; | ||
261 | return IRQ_HANDLED; | ||
262 | } | ||
263 | |||
264 | static int __devinit scan_bars(struct ape_dev *ape, struct pci_dev *dev) | ||
265 | { | ||
266 | int i; | ||
267 | for (i = 0; i < APE_BAR_NUM; i++) { | ||
268 | unsigned long bar_start = pci_resource_start(dev, i); | ||
269 | if (bar_start) { | ||
270 | unsigned long bar_end = pci_resource_end(dev, i); | ||
271 | unsigned long bar_flags = pci_resource_flags(dev, i); | ||
272 | printk(KERN_DEBUG "BAR%d 0x%08lx-0x%08lx flags 0x%08lx\n", | ||
273 | i, bar_start, bar_end, bar_flags); | ||
274 | } | ||
275 | } | ||
276 | return 0; | ||
277 | } | ||
278 | |||
279 | /** | ||
280 | * Unmap the BAR regions that had been mapped earlier using map_bars() | ||
281 | */ | ||
282 | static void unmap_bars(struct ape_dev *ape, struct pci_dev *dev) | ||
283 | { | ||
284 | int i; | ||
285 | for (i = 0; i < APE_BAR_NUM; i++) { | ||
286 | /* is this BAR mapped? */ | ||
287 | if (ape->bar[i]) { | ||
288 | /* unmap BAR */ | ||
289 | pci_iounmap(dev, ape->bar[i]); | ||
290 | ape->bar[i] = NULL; | ||
291 | } | ||
292 | } | ||
293 | } | ||
294 | |||
295 | /** | ||
296 | * Map the device memory regions into kernel virtual address space after | ||
297 | * verifying their sizes respect the minimum sizes needed, given by the | ||
298 | * bar_min_len[] array. | ||
299 | */ | ||
300 | static int __devinit map_bars(struct ape_dev *ape, struct pci_dev *dev) | ||
301 | { | ||
302 | int rc; | ||
303 | int i; | ||
304 | /* iterate through all the BARs */ | ||
305 | for (i = 0; i < APE_BAR_NUM; i++) { | ||
306 | unsigned long bar_start = pci_resource_start(dev, i); | ||
307 | unsigned long bar_end = pci_resource_end(dev, i); | ||
308 | unsigned long bar_length = bar_end - bar_start + 1; | ||
309 | ape->bar[i] = NULL; | ||
310 | /* do not map, and skip, BARs with length 0 */ | ||
311 | if (!bar_min_len[i]) | ||
312 | continue; | ||
313 | /* do not map BARs with address 0 */ | ||
314 | if (!bar_start || !bar_end) { | ||
315 | printk(KERN_DEBUG "BAR #%d is not present?!\n", i); | ||
316 | rc = -1; | ||
317 | goto fail; | ||
318 | } | ||
319 | bar_length = bar_end - bar_start + 1; | ||
320 | /* BAR length is less than driver requires? */ | ||
321 | if (bar_length < bar_min_len[i]) { | ||
322 | printk(KERN_DEBUG "BAR #%d length = %lu bytes but driver " | ||
323 | "requires at least %lu bytes\n", | ||
324 | i, bar_length, bar_min_len[i]); | ||
325 | rc = -1; | ||
326 | goto fail; | ||
327 | } | ||
328 | /* map the device memory or IO region into kernel virtual | ||
329 | * address space */ | ||
330 | ape->bar[i] = pci_iomap(dev, i, bar_min_len[i]); | ||
331 | if (!ape->bar[i]) { | ||
332 | printk(KERN_DEBUG "Could not map BAR #%d.\n", i); | ||
333 | rc = -1; | ||
334 | goto fail; | ||
335 | } | ||
336 | printk(KERN_DEBUG "BAR[%d] mapped at 0x%p with length %lu(/%lu).\n", i, | ||
337 | ape->bar[i], bar_min_len[i], bar_length); | ||
338 | } | ||
339 | /* successfully mapped all required BAR regions */ | ||
340 | rc = 0; | ||
341 | goto success; | ||
342 | fail: | ||
343 | /* unmap any BARs that we did map */ | ||
344 | unmap_bars(ape, dev); | ||
345 | success: | ||
346 | return rc; | ||
347 | } | ||
348 | |||
349 | #if 0 /* not yet implemented fully FIXME add opcode */ | ||
350 | static void __devinit rcslave_test(struct ape_dev *ape, struct pci_dev *dev) | ||
351 | { | ||
352 | u32 *rcslave_mem = (u32 *)ape->bar[APE_BAR_RCSLAVE]; | ||
353 | u32 result = 0; | ||
354 | /** this number is assumed to be different each time this test runs */ | ||
355 | u32 seed = (u32)jiffies; | ||
356 | u32 value = seed; | ||
357 | int i; | ||
358 | |||
359 | /* write loop */ | ||
360 | value = seed; | ||
361 | for (i = 1024; i < 32768 / 4 ; i++) { | ||
362 | printk(KERN_DEBUG "Writing 0x%08x to 0x%p.\n", | ||
363 | (u32)value, (void *)rcslave_mem + i); | ||
364 | iowrite32(value, rcslave_mem + i); | ||
365 | value++; | ||
366 | } | ||
367 | /* read-back loop */ | ||
368 | value = seed; | ||
369 | for (i = 1024; i < 32768 / 4; i++) { | ||
370 | result = ioread32(rcslave_mem + i); | ||
371 | if (result != value) { | ||
372 | printk(KERN_DEBUG "Wrote 0x%08x to 0x%p, but read back 0x%08x.\n", | ||
373 | (u32)value, (void *)rcslave_mem + i, (u32)result); | ||
374 | break; | ||
375 | } | ||
376 | value++; | ||
377 | } | ||
378 | } | ||
379 | #endif | ||
380 | |||
381 | /* obtain the 32 most significant (high) bits of a 32-bit or 64-bit address */ | ||
382 | #define pci_dma_h(addr) ((addr >> 16) >> 16) | ||
383 | /* obtain the 32 least significant (low) bits of a 32-bit or 64-bit address */ | ||
384 | #define pci_dma_l(addr) (addr & 0xffffffffUL) | ||
385 | |||
386 | /* ape_fill_chdma_desc() - Fill a Altera PCI Express Chaining DMA descriptor | ||
387 | * | ||
388 | * @desc pointer to descriptor to be filled | ||
389 | * @addr root complex address | ||
390 | * @ep_addr end point address | ||
391 | * @len number of bytes, must be a multiple of 4. | ||
392 | */ | ||
393 | static inline void ape_chdma_desc_set(struct ape_chdma_desc *desc, dma_addr_t addr, u32 ep_addr, int len) | ||
394 | { | ||
395 | BUG_ON(len & 3); | ||
396 | desc->w0 = cpu_to_le32(len / 4); | ||
397 | desc->ep_addr = cpu_to_le32(ep_addr); | ||
398 | desc->rc_addr_h = cpu_to_le32(pci_dma_h(addr)); | ||
399 | desc->rc_addr_l = cpu_to_le32(pci_dma_l(addr)); | ||
400 | } | ||
401 | |||
402 | #if ALTPCIECHDMA_CDEV | ||
403 | /* | ||
404 | * ape_sg_to_chdma_table() - Create a device descriptor table from a scatterlist. | ||
405 | * | ||
406 | * The scatterlist must have been mapped by pci_map_sg(sgm->sgl). | ||
407 | * | ||
408 | * @sgl scatterlist. | ||
409 | * @nents Number of entries in the scatterlist. | ||
410 | * @first Start index in the scatterlist sgm->sgl. | ||
411 | * @ep_addr End Point address for the scatter/gather transfer. | ||
412 | * @desc pointer to first descriptor | ||
413 | * | ||
414 | * Returns Number of entries in the table on success, -1 on error. | ||
415 | */ | ||
416 | static int ape_sg_to_chdma_table(struct scatterlist *sgl, int nents, int first, struct ape_chdma_desc *desc, u32 ep_addr) | ||
417 | { | ||
418 | int i = first, j = 0; | ||
419 | /* inspect first entry */ | ||
420 | dma_addr_t addr = sg_dma_address(&sgl[i]); | ||
421 | unsigned int len = sg_dma_len(&sgl[i]); | ||
422 | /* contiguous block */ | ||
423 | dma_addr_t cont_addr = addr; | ||
424 | unsigned int cont_len = len; | ||
425 | /* iterate over remaining entries */ | ||
426 | for (; j < 25 && i < nents - 1; i++) { | ||
427 | /* bus address of next entry i + 1 */ | ||
428 | dma_addr_t next = sg_dma_address(&sgl[i + 1]); | ||
429 | /* length of this entry i */ | ||
430 | len = sg_dma_len(&sgl[i]); | ||
431 | printk(KERN_DEBUG "%04d: addr=0x%Lx length=0x%08x\n", i, | ||
432 | (unsigned long long)addr, len); | ||
433 | /* entry i + 1 is non-contiguous with entry i? */ | ||
434 | if (next != addr + len) { | ||
435 | /* TODO create entry here (we could overwrite i) */ | ||
436 | printk(KERN_DEBUG "%4d: cont_addr=0x%Lx cont_len=0x%08x\n", j, | ||
437 | (unsigned long long)cont_addr, cont_len); | ||
438 | /* set descriptor for contiguous transfer */ | ||
439 | ape_chdma_desc_set(&desc[j], cont_addr, ep_addr, cont_len); | ||
440 | /* next end point memory address */ | ||
441 | ep_addr += cont_len; | ||
442 | /* start new contiguous block */ | ||
443 | cont_addr = next; | ||
444 | cont_len = 0; | ||
445 | j++; | ||
446 | } | ||
447 | /* add entry i + 1 to current contiguous block */ | ||
448 | cont_len += len; | ||
449 | /* goto entry i + 1 */ | ||
450 | addr = next; | ||
451 | } | ||
452 | /* TODO create entry here (we could overwrite i) */ | ||
453 | printk(KERN_DEBUG "%04d: addr=0x%Lx length=0x%08x\n", i, | ||
454 | (unsigned long long)addr, len); | ||
455 | printk(KERN_DEBUG "%4d: cont_addr=0x%Lx length=0x%08x\n", j, | ||
456 | (unsigned long long)cont_addr, cont_len); | ||
457 | j++; | ||
458 | return j; | ||
459 | } | ||
460 | #endif | ||
461 | |||
462 | /* compare buffers */ | ||
463 | static inline int compare(u32 *p, u32 *q, int len) | ||
464 | { | ||
465 | int result = -1; | ||
466 | int fail = 0; | ||
467 | int i; | ||
468 | for (i = 0; i < len / 4; i++) { | ||
469 | if (*p == *q) { | ||
470 | /* every so many u32 words, show equals */ | ||
471 | if ((i & 255) == 0) | ||
472 | printk(KERN_DEBUG "[%p] = 0x%08x [%p] = 0x%08x\n", p, *p, q, *q); | ||
473 | } else { | ||
474 | fail++; | ||
475 | /* show the first few miscompares */ | ||
476 | if (fail < 10) | ||
477 | printk(KERN_DEBUG "[%p] = 0x%08x != [%p] = 0x%08x ?!\n", p, *p, q, *q); | ||
478 | /* but stop after a while */ | ||
479 | else if (fail == 10) | ||
480 | printk(KERN_DEBUG "---more errors follow! not printed---\n"); | ||
481 | else | ||
482 | /* stop compare after this many errors */ | ||
483 | break; | ||
484 | } | ||
485 | p++; | ||
486 | q++; | ||
487 | } | ||
488 | if (!fail) | ||
489 | result = 0; | ||
490 | return result; | ||
491 | } | ||
492 | |||
493 | /* dma_test() - Perform DMA loop back test to end point and back to root complex. | ||
494 | * | ||
495 | * Allocate a cache-coherent buffer in host memory, consisting of four pages. | ||
496 | * | ||
497 | * Fill the four memory pages such that each 32-bit word contains its own address. | ||
498 | * | ||
499 | * Now perform a loop back test, have the end point device copy the first buffer | ||
500 | * half to end point memory, then have it copy back into the second half. | ||
501 | * | ||
502 | * Create a descriptor table to copy the first buffer half into End Point | ||
503 | * memory. Instruct the End Point to do a DMA read using that table. | ||
504 | * | ||
505 | * Create a descriptor table to copy End Point memory to the second buffer | ||
506 | * half. Instruct the End Point to do a DMA write using that table. | ||
507 | * | ||
508 | * Compare results, fail or pass. | ||
509 | * | ||
510 | */ | ||
511 | static int __devinit dma_test(struct ape_dev *ape, struct pci_dev *dev) | ||
512 | { | ||
513 | /* test result; guilty until proven innocent */ | ||
514 | int result = -1; | ||
515 | /* the DMA read header sits at address 0x00 of the DMA engine BAR */ | ||
516 | struct ape_chdma_header *write_header = (struct ape_chdma_header *)ape->bar[APE_BAR_HEADER]; | ||
517 | /* the write DMA header sits after the read header at address 0x10 */ | ||
518 | struct ape_chdma_header *read_header = write_header + 1; | ||
519 | /* virtual address of the allocated buffer */ | ||
520 | u8 *buffer_virt = 0; | ||
521 | /* bus address of the allocated buffer */ | ||
522 | dma_addr_t buffer_bus = 0; | ||
523 | int i, n = 0, irq_count; | ||
524 | |||
525 | /* temporary value used to construct 32-bit data words */ | ||
526 | u32 w; | ||
527 | |||
528 | printk(KERN_DEBUG "bar_tests(), PAGE_SIZE = 0x%0x\n", (int)PAGE_SIZE); | ||
529 | printk(KERN_DEBUG "write_header = 0x%p.\n", write_header); | ||
530 | printk(KERN_DEBUG "read_header = 0x%p.\n", read_header); | ||
531 | printk(KERN_DEBUG "&write_header->w3 = 0x%p\n", &write_header->w3); | ||
532 | printk(KERN_DEBUG "&read_header->w3 = 0x%p\n", &read_header->w3); | ||
533 | printk(KERN_DEBUG "ape->table_virt = 0x%p.\n", ape->table_virt); | ||
534 | |||
535 | if (!write_header || !read_header || !ape->table_virt) | ||
536 | goto fail; | ||
537 | |||
538 | /* allocate and map coherently-cached memory for a DMA-able buffer */ | ||
539 | /* @see Documentation/PCI/PCI-DMA-mapping.txt, near line 318 */ | ||
540 | buffer_virt = (u8 *)pci_alloc_consistent(dev, PAGE_SIZE * 4, &buffer_bus); | ||
541 | if (!buffer_virt) { | ||
542 | printk(KERN_DEBUG "Could not allocate coherent DMA buffer.\n"); | ||
543 | goto fail; | ||
544 | } | ||
545 | printk(KERN_DEBUG "Allocated cache-coherent DMA buffer (virtual address = %p, bus address = 0x%016llx).\n", | ||
546 | buffer_virt, (u64)buffer_bus); | ||
547 | |||
548 | /* fill first half of buffer with its virtual address as data */ | ||
549 | for (i = 0; i < 4 * PAGE_SIZE; i += 4) | ||
550 | #if 0 | ||
551 | *(u32 *)(buffer_virt + i) = i / PAGE_SIZE + 1; | ||
552 | #else | ||
553 | *(u32 *)(buffer_virt + i) = (u32)(unsigned long)(buffer_virt + i); | ||
554 | #endif | ||
555 | #if 0 | ||
556 | compare((u32 *)buffer_virt, (u32 *)(buffer_virt + 2 * PAGE_SIZE), 8192); | ||
557 | #endif | ||
558 | |||
559 | #if 0 | ||
560 | /* fill second half of buffer with zeroes */ | ||
561 | for (i = 2 * PAGE_SIZE; i < 4 * PAGE_SIZE; i += 4) | ||
562 | *(u32 *)(buffer_virt + i) = 0; | ||
563 | #endif | ||
564 | |||
565 | /* invalidate EPLAST, outside 0-255, 0xFADE is from the testbench */ | ||
566 | ape->table_virt->w3 = cpu_to_le32(0x0000FADE); | ||
567 | |||
568 | /* fill in first descriptor */ | ||
569 | n = 0; | ||
570 | /* read 8192 bytes from RC buffer to EP address 4096 */ | ||
571 | ape_chdma_desc_set(&ape->table_virt->desc[n], buffer_bus, 4096, 2 * PAGE_SIZE); | ||
572 | #if 1 | ||
573 | for (i = 0; i < 255; i++) | ||
574 | ape_chdma_desc_set(&ape->table_virt->desc[i], buffer_bus, 4096, 2 * PAGE_SIZE); | ||
575 | /* index of last descriptor */ | ||
576 | n = i - 1; | ||
577 | #endif | ||
578 | #if 0 | ||
579 | /* fill in next descriptor */ | ||
580 | n++; | ||
581 | /* read 1024 bytes from RC buffer to EP address 4096 + 1024 */ | ||
582 | ape_chdma_desc_set(&ape->table_virt->desc[n], buffer_bus + 1024, 4096 + 1024, 1024); | ||
583 | #endif | ||
584 | |||
585 | #if 1 | ||
586 | /* enable MSI after the last descriptor is completed */ | ||
587 | if (ape->msi_enabled) | ||
588 | ape->table_virt->desc[n].w0 |= cpu_to_le32(1UL << 16)/*local MSI*/; | ||
589 | #endif | ||
590 | #if 0 | ||
591 | /* dump descriptor table for debugging */ | ||
592 | printk(KERN_DEBUG "Descriptor Table (Read, in Root Complex Memory, # = %d)\n", n + 1); | ||
593 | for (i = 0; i < 4 + (n + 1) * 4; i += 4) { | ||
594 | u32 *p = (u32 *)ape->table_virt; | ||
595 | p += i; | ||
596 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (LEN=0x%x)\n", (u32)p, (u32)p & 15, *p, 4 * le32_to_cpu(*p)); | ||
597 | p++; | ||
598 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (EPA=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
599 | p++; | ||
600 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (RCH=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
601 | p++; | ||
602 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (RCL=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
603 | } | ||
604 | #endif | ||
605 | /* set available number of descriptors in table */ | ||
606 | w = (u32)(n + 1); | ||
607 | w |= (1UL << 18)/*global EPLAST_EN*/; | ||
608 | #if 0 | ||
609 | if (ape->msi_enabled) | ||
610 | w |= (1UL << 17)/*global MSI*/; | ||
611 | #endif | ||
612 | printk(KERN_DEBUG "writing 0x%08x to 0x%p\n", w, (void *)&read_header->w0); | ||
613 | iowrite32(w, &read_header->w0); | ||
614 | |||
615 | /* write table address (higher 32-bits) */ | ||
616 | printk(KERN_DEBUG "writing 0x%08x to 0x%p\n", (u32)((ape->table_bus >> 16) >> 16), (void *)&read_header->bdt_addr_h); | ||
617 | iowrite32(pci_dma_h(ape->table_bus), &read_header->bdt_addr_h); | ||
618 | |||
619 | /* write table address (lower 32-bits) */ | ||
620 | printk(KERN_DEBUG "writing 0x%08x to 0x%p\n", (u32)(ape->table_bus & 0xffffffffUL), (void *)&read_header->bdt_addr_l); | ||
621 | iowrite32(pci_dma_l(ape->table_bus), &read_header->bdt_addr_l); | ||
622 | |||
623 | /* memory write barrier */ | ||
624 | wmb(); | ||
625 | printk(KERN_DEBUG "Flush posted writes\n"); | ||
626 | /** FIXME Add dummy read to flush posted writes but need a readable location! */ | ||
627 | #if 0 | ||
628 | (void)ioread32(); | ||
629 | #endif | ||
630 | |||
631 | /* remember IRQ count before the transfer */ | ||
632 | irq_count = ape->irq_count; | ||
633 | /* write number of descriptors - this starts the DMA */ | ||
634 | printk(KERN_DEBUG "\nStart DMA read\n"); | ||
635 | printk(KERN_DEBUG "writing 0x%08x to 0x%p\n", (u32)n, (void *)&read_header->w3); | ||
636 | iowrite32(n, &read_header->w3); | ||
637 | printk(KERN_DEBUG "EPLAST = %lu\n", le32_to_cpu(*(u32 *)&ape->table_virt->w3) & 0xffffUL); | ||
638 | |||
639 | /** memory write barrier */ | ||
640 | wmb(); | ||
641 | /* dummy read to flush posted writes */ | ||
642 | /* FIXME Need a readable location! */ | ||
643 | #if 0 | ||
644 | (void)ioread32(); | ||
645 | #endif | ||
646 | printk(KERN_DEBUG "POLL FOR READ:\n"); | ||
647 | /* poll for chain completion, 1000 times 1 millisecond */ | ||
648 | for (i = 0; i < 100; i++) { | ||
649 | volatile u32 *p = &ape->table_virt->w3; | ||
650 | u32 eplast = le32_to_cpu(*p) & 0xffffUL; | ||
651 | printk(KERN_DEBUG "EPLAST = %u, n = %d\n", eplast, n); | ||
652 | if (eplast == n) { | ||
653 | printk(KERN_DEBUG "DONE\n"); | ||
654 | /* print IRQ count before the transfer */ | ||
655 | printk(KERN_DEBUG "#IRQs during transfer: %d\n", ape->irq_count - irq_count); | ||
656 | break; | ||
657 | } | ||
658 | udelay(100); | ||
659 | } | ||
660 | |||
661 | /* invalidate EPLAST, outside 0-255, 0xFADE is from the testbench */ | ||
662 | ape->table_virt->w3 = cpu_to_le32(0x0000FADE); | ||
663 | |||
664 | /* setup first descriptor */ | ||
665 | n = 0; | ||
666 | ape_chdma_desc_set(&ape->table_virt->desc[n], buffer_bus + 8192, 4096, 2 * PAGE_SIZE); | ||
667 | #if 1 | ||
668 | for (i = 0; i < 255; i++) | ||
669 | ape_chdma_desc_set(&ape->table_virt->desc[i], buffer_bus + 8192, 4096, 2 * PAGE_SIZE); | ||
670 | |||
671 | /* index of last descriptor */ | ||
672 | n = i - 1; | ||
673 | #endif | ||
674 | #if 1 /* test variable, make a module option later */ | ||
675 | if (ape->msi_enabled) | ||
676 | ape->table_virt->desc[n].w0 |= cpu_to_le32(1UL << 16)/*local MSI*/; | ||
677 | #endif | ||
678 | #if 0 | ||
679 | /* dump descriptor table for debugging */ | ||
680 | printk(KERN_DEBUG "Descriptor Table (Write, in Root Complex Memory, # = %d)\n", n + 1); | ||
681 | for (i = 0; i < 4 + (n + 1) * 4; i += 4) { | ||
682 | u32 *p = (u32 *)ape->table_virt; | ||
683 | p += i; | ||
684 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (LEN=0x%x)\n", (u32)p, (u32)p & 15, *p, 4 * le32_to_cpu(*p)); | ||
685 | p++; | ||
686 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (EPA=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
687 | p++; | ||
688 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (RCH=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
689 | p++; | ||
690 | printk(KERN_DEBUG "0x%08x/0x%02x: 0x%08x (RCL=0x%x)\n", (u32)p, (u32)p & 15, *p, le32_to_cpu(*p)); | ||
691 | } | ||
692 | #endif | ||
693 | |||
694 | /* set number of available descriptors in the table */ | ||
695 | w = (u32)(n + 1); | ||
696 | /* enable updates of eplast for each descriptor completion */ | ||
697 | w |= (u32)(1UL << 18)/*global EPLAST_EN*/; | ||
698 | #if 0 /* test variable, make a module option later */ | ||
699 | /* enable MSI for each descriptor completion */ | ||
700 | if (ape->msi_enabled) | ||
701 | w |= (1UL << 17)/*global MSI*/; | ||
702 | #endif | ||
703 | iowrite32(w, &write_header->w0); | ||
704 | iowrite32(pci_dma_h(ape->table_bus), &write_header->bdt_addr_h); | ||
705 | iowrite32(pci_dma_l(ape->table_bus), &write_header->bdt_addr_l); | ||
706 | |||
707 | /** memory write barrier and flush posted writes */ | ||
708 | wmb(); | ||
709 | /* dummy read to flush posted writes */ | ||
710 | /* FIXME Need a readable location! */ | ||
711 | #if 0 | ||
712 | (void)ioread32(); | ||
713 | #endif | ||
714 | irq_count = ape->irq_count; | ||
715 | |||
716 | printk(KERN_DEBUG "\nStart DMA write\n"); | ||
717 | iowrite32(n, &write_header->w3); | ||
718 | |||
719 | /** memory write barrier */ | ||
720 | wmb(); | ||
721 | /** dummy read to flush posted writes */ | ||
722 | /* (void) ioread32(); */ | ||
723 | |||
724 | printk(KERN_DEBUG "POLL FOR WRITE:\n"); | ||
725 | /* poll for completion, 1000 times 1 millisecond */ | ||
726 | for (i = 0; i < 100; i++) { | ||
727 | volatile u32 *p = &ape->table_virt->w3; | ||
728 | u32 eplast = le32_to_cpu(*p) & 0xffffUL; | ||
729 | printk(KERN_DEBUG "EPLAST = %u, n = %d\n", eplast, n); | ||
730 | if (eplast == n) { | ||
731 | printk(KERN_DEBUG "DONE\n"); | ||
732 | /* print IRQ count before the transfer */ | ||
733 | printk(KERN_DEBUG "#IRQs during transfer: %d\n", ape->irq_count - irq_count); | ||
734 | break; | ||
735 | } | ||
736 | udelay(100); | ||
737 | } | ||
738 | /* soft-reset DMA write engine */ | ||
739 | iowrite32(0x0000ffffUL, &write_header->w0); | ||
740 | /* soft-reset DMA read engine */ | ||
741 | iowrite32(0x0000ffffUL, &read_header->w0); | ||
742 | |||
743 | /** memory write barrier */ | ||
744 | wmb(); | ||
745 | /* dummy read to flush posted writes */ | ||
746 | /* FIXME Need a readable location! */ | ||
747 | #if 0 | ||
748 | (void)ioread32(); | ||
749 | #endif | ||
750 | /* compare first half of buffer with second half, should be identical */ | ||
751 | result = compare((u32 *)buffer_virt, (u32 *)(buffer_virt + 2 * PAGE_SIZE), 8192); | ||
752 | printk(KERN_DEBUG "DMA loop back test %s.\n", result ? "FAILED" : "PASSED"); | ||
753 | |||
754 | pci_free_consistent(dev, 4 * PAGE_SIZE, buffer_virt, buffer_bus); | ||
755 | fail: | ||
756 | printk(KERN_DEBUG "bar_tests() end, result %d\n", result); | ||
757 | return result; | ||
758 | } | ||
759 | |||
760 | /* Called when the PCI sub system thinks we can control the given device. | ||
761 | * Inspect if we can support the device and if so take control of it. | ||
762 | * | ||
763 | * Return 0 when we have taken control of the given device. | ||
764 | * | ||
765 | * - allocate board specific bookkeeping | ||
766 | * - allocate coherently-mapped memory for the descriptor table | ||
767 | * - enable the board | ||
768 | * - verify board revision | ||
769 | * - request regions | ||
770 | * - query DMA mask | ||
771 | * - obtain and request irq | ||
772 | * - map regions into kernel address space | ||
773 | */ | ||
774 | static int __devinit probe(struct pci_dev *dev, const struct pci_device_id *id) | ||
775 | { | ||
776 | int rc = 0; | ||
777 | struct ape_dev *ape = NULL; | ||
778 | u8 irq_pin, irq_line; | ||
779 | printk(KERN_DEBUG "probe(dev = 0x%p, pciid = 0x%p)\n", dev, id); | ||
780 | |||
781 | /* allocate memory for per-board book keeping */ | ||
782 | ape = kzalloc(sizeof(struct ape_dev), GFP_KERNEL); | ||
783 | if (!ape) { | ||
784 | printk(KERN_DEBUG "Could not kzalloc()ate memory.\n"); | ||
785 | goto err_ape; | ||
786 | } | ||
787 | ape->pci_dev = dev; | ||
788 | dev_set_drvdata(&dev->dev, ape); | ||
789 | printk(KERN_DEBUG "probe() ape = 0x%p\n", ape); | ||
790 | |||
791 | printk(KERN_DEBUG "sizeof(struct ape_chdma_table) = %d.\n", | ||
792 | (int)sizeof(struct ape_chdma_table)); | ||
793 | /* the reference design has a size restriction on the table size */ | ||
794 | BUG_ON(sizeof(struct ape_chdma_table) > APE_CHDMA_TABLE_SIZE); | ||
795 | |||
796 | /* allocate and map coherently-cached memory for a descriptor table */ | ||
797 | /* @see LDD3 page 446 */ | ||
798 | ape->table_virt = (struct ape_chdma_table *)pci_alloc_consistent(dev, | ||
799 | APE_CHDMA_TABLE_SIZE, &ape->table_bus); | ||
800 | /* could not allocate table? */ | ||
801 | if (!ape->table_virt) { | ||
802 | printk(KERN_DEBUG "Could not dma_alloc()ate_coherent memory.\n"); | ||
803 | goto err_table; | ||
804 | } | ||
805 | |||
806 | printk(KERN_DEBUG "table_virt = %p, table_bus = 0x%16llx.\n", | ||
807 | ape->table_virt, (u64)ape->table_bus); | ||
808 | |||
809 | /* enable device */ | ||
810 | rc = pci_enable_device(dev); | ||
811 | if (rc) { | ||
812 | printk(KERN_DEBUG "pci_enable_device() failed\n"); | ||
813 | goto err_enable; | ||
814 | } | ||
815 | |||
816 | /* enable bus master capability on device */ | ||
817 | pci_set_master(dev); | ||
818 | /* enable message signaled interrupts */ | ||
819 | rc = pci_enable_msi(dev); | ||
820 | /* could not use MSI? */ | ||
821 | if (rc) { | ||
822 | /* resort to legacy interrupts */ | ||
823 | printk(KERN_DEBUG "Could not enable MSI interrupting.\n"); | ||
824 | ape->msi_enabled = 0; | ||
825 | /* MSI enabled, remember for cleanup */ | ||
826 | } else { | ||
827 | printk(KERN_DEBUG "Enabled MSI interrupting.\n"); | ||
828 | ape->msi_enabled = 1; | ||
829 | } | ||
830 | |||
831 | pci_read_config_byte(dev, PCI_REVISION_ID, &ape->revision); | ||
832 | #if 0 /* example */ | ||
833 | /* (for example) this driver does not support revision 0x42 */ | ||
834 | if (ape->revision == 0x42) { | ||
835 | printk(KERN_DEBUG "Revision 0x42 is not supported by this driver.\n"); | ||
836 | rc = -ENODEV; | ||
837 | goto err_rev; | ||
838 | } | ||
839 | #endif | ||
840 | /** XXX check for native or legacy PCIe endpoint? */ | ||
841 | |||
842 | rc = pci_request_regions(dev, DRV_NAME); | ||
843 | /* could not request all regions? */ | ||
844 | if (rc) { | ||
845 | /* assume device is in use (and do not disable it later!) */ | ||
846 | ape->in_use = 1; | ||
847 | goto err_regions; | ||
848 | } | ||
849 | ape->got_regions = 1; | ||
850 | |||
851 | #if 1 /* @todo For now, disable 64-bit, because I do not understand the implications (DAC!) */ | ||
852 | /* query for DMA transfer */ | ||
853 | /* @see Documentation/PCI/PCI-DMA-mapping.txt */ | ||
854 | if (!pci_set_dma_mask(dev, DMA_BIT_MASK(64))) { | ||
855 | pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64)); | ||
856 | /* use 64-bit DMA */ | ||
857 | printk(KERN_DEBUG "Using a 64-bit DMA mask.\n"); | ||
858 | } else | ||
859 | #endif | ||
860 | if (!pci_set_dma_mask(dev, DMA_BIT_MASK(32))) { | ||
861 | printk(KERN_DEBUG "Could not set 64-bit DMA mask.\n"); | ||
862 | pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(32)); | ||
863 | /* use 32-bit DMA */ | ||
864 | printk(KERN_DEBUG "Using a 32-bit DMA mask.\n"); | ||
865 | } else { | ||
866 | printk(KERN_DEBUG "No suitable DMA possible.\n"); | ||
867 | /** @todo Choose proper error return code */ | ||
868 | rc = -1; | ||
869 | goto err_mask; | ||
870 | } | ||
871 | |||
872 | rc = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin); | ||
873 | /* could not read? */ | ||
874 | if (rc) | ||
875 | goto err_irq; | ||
876 | printk(KERN_DEBUG "IRQ pin #%d (0=none, 1=INTA#...4=INTD#).\n", irq_pin); | ||
877 | |||
878 | /* @see LDD3, page 318 */ | ||
879 | rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq_line); | ||
880 | /* could not read? */ | ||
881 | if (rc) { | ||
882 | printk(KERN_DEBUG "Could not query PCI_INTERRUPT_LINE, error %d\n", rc); | ||
883 | goto err_irq; | ||
884 | } | ||
885 | printk(KERN_DEBUG "IRQ line #%d.\n", irq_line); | ||
886 | #if 1 | ||
887 | irq_line = dev->irq; | ||
888 | /* @see LDD3, page 259 */ | ||
889 | rc = request_irq(irq_line, altpciechdma_isr, IRQF_SHARED, DRV_NAME, (void *)ape); | ||
890 | if (rc) { | ||
891 | printk(KERN_DEBUG "Could not request IRQ #%d, error %d\n", irq_line, rc); | ||
892 | ape->irq_line = -1; | ||
893 | goto err_irq; | ||
894 | } | ||
895 | /* remember which irq we allocated */ | ||
896 | ape->irq_line = (int)irq_line; | ||
897 | printk(KERN_DEBUG "Succesfully requested IRQ #%d with dev_id 0x%p\n", irq_line, ape); | ||
898 | #endif | ||
899 | /* show BARs */ | ||
900 | scan_bars(ape, dev); | ||
901 | /* map BARs */ | ||
902 | rc = map_bars(ape, dev); | ||
903 | if (rc) | ||
904 | goto err_map; | ||
905 | #if ALTPCIECHDMA_CDEV | ||
906 | /* initialize character device */ | ||
907 | rc = sg_init(ape); | ||
908 | if (rc) | ||
909 | goto err_cdev; | ||
910 | #endif | ||
911 | /* perform DMA engines loop back test */ | ||
912 | rc = dma_test(ape, dev); | ||
913 | (void)rc; | ||
914 | /* successfully took the device */ | ||
915 | rc = 0; | ||
916 | printk(KERN_DEBUG "probe() successful.\n"); | ||
917 | goto end; | ||
918 | #if ALTPCIECHDMA_CDEV | ||
919 | err_cdev: | ||
920 | /* unmap the BARs */ | ||
921 | unmap_bars(ape, dev); | ||
922 | #endif | ||
923 | err_map: | ||
924 | /* free allocated irq */ | ||
925 | if (ape->irq_line >= 0) | ||
926 | free_irq(ape->irq_line, (void *)ape); | ||
927 | err_irq: | ||
928 | if (ape->msi_enabled) | ||
929 | pci_disable_msi(dev); | ||
930 | /* disable the device iff it is not in use */ | ||
931 | if (!ape->in_use) | ||
932 | pci_disable_device(dev); | ||
933 | if (ape->got_regions) | ||
934 | pci_release_regions(dev); | ||
935 | err_mask: | ||
936 | err_regions: | ||
937 | /*err_rev:*/ | ||
938 | /* clean up everything before device enable() */ | ||
939 | err_enable: | ||
940 | if (ape->table_virt) | ||
941 | pci_free_consistent(dev, APE_CHDMA_TABLE_SIZE, ape->table_virt, ape->table_bus); | ||
942 | /* clean up everything before allocating descriptor table */ | ||
943 | err_table: | ||
944 | if (ape) | ||
945 | kfree(ape); | ||
946 | err_ape: | ||
947 | end: | ||
948 | return rc; | ||
949 | } | ||
950 | |||
951 | static void __devexit remove(struct pci_dev *dev) | ||
952 | { | ||
953 | struct ape_dev *ape = dev_get_drvdata(&dev->dev); | ||
954 | |||
955 | printk(KERN_DEBUG "remove(0x%p)\n", dev); | ||
956 | printk(KERN_DEBUG "remove(dev = 0x%p) where ape = 0x%p\n", dev, ape); | ||
957 | |||
958 | /* remove character device */ | ||
959 | #if ALTPCIECHDMA_CDEV | ||
960 | sg_exit(ape); | ||
961 | #endif | ||
962 | |||
963 | if (ape->table_virt) | ||
964 | pci_free_consistent(dev, APE_CHDMA_TABLE_SIZE, ape->table_virt, ape->table_bus); | ||
965 | |||
966 | /* free IRQ | ||
967 | * @see LDD3 page 279 | ||
968 | */ | ||
969 | if (ape->irq_line >= 0) { | ||
970 | printk(KERN_DEBUG "Freeing IRQ #%d for dev_id 0x%08lx.\n", | ||
971 | ape->irq_line, (unsigned long)ape); | ||
972 | free_irq(ape->irq_line, (void *)ape); | ||
973 | } | ||
974 | /* MSI was enabled? */ | ||
975 | if (ape->msi_enabled) { | ||
976 | /* Disable MSI @see Documentation/MSI-HOWTO.txt */ | ||
977 | pci_disable_msi(dev); | ||
978 | ape->msi_enabled = 0; | ||
979 | } | ||
980 | /* unmap the BARs */ | ||
981 | unmap_bars(ape, dev); | ||
982 | if (!ape->in_use) | ||
983 | pci_disable_device(dev); | ||
984 | if (ape->got_regions) | ||
985 | /* to be called after device disable */ | ||
986 | pci_release_regions(dev); | ||
987 | } | ||
988 | |||
989 | #if ALTPCIECHDMA_CDEV | ||
990 | |||
991 | /* | ||
992 | * Called when the device goes from unused to used. | ||
993 | */ | ||
994 | static int sg_open(struct inode *inode, struct file *file) | ||
995 | { | ||
996 | struct ape_dev *ape; | ||
997 | printk(KERN_DEBUG DRV_NAME "_open()\n"); | ||
998 | /* pointer to containing data structure of the character device inode */ | ||
999 | ape = container_of(inode->i_cdev, struct ape_dev, cdev); | ||
1000 | /* create a reference to our device state in the opened file */ | ||
1001 | file->private_data = ape; | ||
1002 | /* create virtual memory mapper */ | ||
1003 | ape->sgm = sg_create_mapper(MAX_CHDMA_SIZE); | ||
1004 | return 0; | ||
1005 | } | ||
1006 | |||
1007 | /* | ||
1008 | * Called when the device goes from used to unused. | ||
1009 | */ | ||
1010 | static int sg_close(struct inode *inode, struct file *file) | ||
1011 | { | ||
1012 | /* fetch device specific data stored earlier during open */ | ||
1013 | struct ape_dev *ape = (struct ape_dev *)file->private_data; | ||
1014 | printk(KERN_DEBUG DRV_NAME "_close()\n"); | ||
1015 | /* destroy virtual memory mapper */ | ||
1016 | sg_destroy_mapper(ape->sgm); | ||
1017 | return 0; | ||
1018 | } | ||
1019 | |||
1020 | static ssize_t sg_read(struct file *file, char __user *buf, size_t count, loff_t *pos) | ||
1021 | { | ||
1022 | /* fetch device specific data stored earlier during open */ | ||
1023 | struct ape_dev *ape = (struct ape_dev *)file->private_data; | ||
1024 | (void)ape; | ||
1025 | printk(KERN_DEBUG DRV_NAME "_read(buf=0x%p, count=%lld, pos=%llu)\n", buf, (s64)count, (u64)*pos); | ||
1026 | return count; | ||
1027 | } | ||
1028 | |||
1029 | /* sg_write() - Write to the device | ||
1030 | * | ||
1031 | * @buf userspace buffer | ||
1032 | * @count number of bytes in the userspace buffer | ||
1033 | * | ||
1034 | * Iterate over the userspace buffer, taking at most 255 * PAGE_SIZE bytes for | ||
1035 | * each DMA transfer. | ||
1036 | * For each transfer, get the user pages, build a sglist, map, build a | ||
1037 | * descriptor table. submit the transfer. wait for the interrupt handler | ||
1038 | * to wake us on completion. | ||
1039 | */ | ||
1040 | static ssize_t sg_write(struct file *file, const char __user *buf, size_t count, loff_t *pos) | ||
1041 | { | ||
1042 | int hwnents, tents; | ||
1043 | size_t transfer_len, remaining = count, done = 0; | ||
1044 | u64 transfer_addr = (u64)buf; | ||
1045 | /* fetch device specific data stored earlier during open */ | ||
1046 | struct ape_dev *ape = (struct ape_dev *)file->private_data; | ||
1047 | printk(KERN_DEBUG DRV_NAME "_write(buf=0x%p, count=%lld, pos=%llu)\n", | ||
1048 | buf, (s64)count, (u64)*pos); | ||
1049 | /* TODO transfer boundaries at PAGE_SIZE granularity */ | ||
1050 | while (remaining > 0) { | ||
1051 | /* limit DMA transfer size */ | ||
1052 | transfer_len = (remaining < APE_CHDMA_MAX_TRANSFER_LEN) ? remaining : | ||
1053 | APE_CHDMA_MAX_TRANSFER_LEN; | ||
1054 | /* get all user space buffer pages and create a scattergather list */ | ||
1055 | sgm_map_user_pages(ape->sgm, transfer_addr, transfer_len, 0/*read from userspace*/); | ||
1056 | printk(KERN_DEBUG DRV_NAME "mapped_pages=%d\n", ape->sgm->mapped_pages); | ||
1057 | /* map all entries in the scattergather list */ | ||
1058 | hwnents = pci_map_sg(ape->pci_dev, ape->sgm->sgl, ape->sgm->mapped_pages, DMA_TO_DEVICE); | ||
1059 | printk(KERN_DEBUG DRV_NAME "hwnents=%d\n", hwnents); | ||
1060 | /* build device descriptor tables and submit them to the DMA engine */ | ||
1061 | tents = ape_sg_to_chdma_table(ape->sgm->sgl, hwnents, 0, &ape->table_virt->desc[0], 4096); | ||
1062 | printk(KERN_DEBUG DRV_NAME "tents=%d\n", hwnents); | ||
1063 | #if 0 | ||
1064 | while (tables) { | ||
1065 | /* TODO build table */ | ||
1066 | /* TODO submit table to the device */ | ||
1067 | /* if engine stopped and unfinished work then start engine */ | ||
1068 | } | ||
1069 | put ourselves on wait queue | ||
1070 | #endif | ||
1071 | |||
1072 | dma_unmap_sg(NULL, ape->sgm->sgl, ape->sgm->mapped_pages, DMA_TO_DEVICE); | ||
1073 | /* dirty and free the pages */ | ||
1074 | sgm_unmap_user_pages(ape->sgm, 1/*dirtied*/); | ||
1075 | /* book keeping */ | ||
1076 | transfer_addr += transfer_len; | ||
1077 | remaining -= transfer_len; | ||
1078 | done += transfer_len; | ||
1079 | } | ||
1080 | return done; | ||
1081 | } | ||
1082 | |||
1083 | /* | ||
1084 | * character device file operations | ||
1085 | */ | ||
1086 | static const struct file_operations sg_fops = { | ||
1087 | .owner = THIS_MODULE, | ||
1088 | .open = sg_open, | ||
1089 | .release = sg_close, | ||
1090 | .read = sg_read, | ||
1091 | .write = sg_write, | ||
1092 | }; | ||
1093 | |||
1094 | /* sg_init() - Initialize character device | ||
1095 | * | ||
1096 | * XXX Should ideally be tied to the device, on device probe, not module init. | ||
1097 | */ | ||
1098 | static int sg_init(struct ape_dev *ape) | ||
1099 | { | ||
1100 | int rc; | ||
1101 | printk(KERN_DEBUG DRV_NAME " sg_init()\n"); | ||
1102 | /* allocate a dynamically allocated character device node */ | ||
1103 | rc = alloc_chrdev_region(&ape->cdevno, 0/*requested minor*/, 1/*count*/, DRV_NAME); | ||
1104 | /* allocation failed? */ | ||
1105 | if (rc < 0) { | ||
1106 | printk("alloc_chrdev_region() = %d\n", rc); | ||
1107 | goto fail_alloc; | ||
1108 | } | ||
1109 | /* couple the device file operations to the character device */ | ||
1110 | cdev_init(&ape->cdev, &sg_fops); | ||
1111 | ape->cdev.owner = THIS_MODULE; | ||
1112 | /* bring character device live */ | ||
1113 | rc = cdev_add(&ape->cdev, ape->cdevno, 1/*count*/); | ||
1114 | if (rc < 0) { | ||
1115 | printk("cdev_add() = %d\n", rc); | ||
1116 | goto fail_add; | ||
1117 | } | ||
1118 | printk(KERN_DEBUG "altpciechdma = %d:%d\n", MAJOR(ape->cdevno), MINOR(ape->cdevno)); | ||
1119 | return 0; | ||
1120 | fail_add: | ||
1121 | /* free the dynamically allocated character device node */ | ||
1122 | unregister_chrdev_region(ape->cdevno, 1/*count*/); | ||
1123 | fail_alloc: | ||
1124 | return -1; | ||
1125 | } | ||
1126 | |||
1127 | /* sg_exit() - Cleanup character device | ||
1128 | * | ||
1129 | * XXX Should ideally be tied to the device, on device remove, not module exit. | ||
1130 | */ | ||
1131 | |||
1132 | static void sg_exit(struct ape_dev *ape) | ||
1133 | { | ||
1134 | printk(KERN_DEBUG DRV_NAME " sg_exit()\n"); | ||
1135 | /* remove the character device */ | ||
1136 | cdev_del(&ape->cdev); | ||
1137 | /* free the dynamically allocated character device node */ | ||
1138 | unregister_chrdev_region(ape->cdevno, 1/*count*/); | ||
1139 | } | ||
1140 | |||
1141 | #endif /* ALTPCIECHDMA_CDEV */ | ||
1142 | |||
1143 | /* used to register the driver with the PCI kernel sub system | ||
1144 | * @see LDD3 page 311 | ||
1145 | */ | ||
1146 | static struct pci_driver pci_driver = { | ||
1147 | .name = DRV_NAME, | ||
1148 | .id_table = ids, | ||
1149 | .probe = probe, | ||
1150 | .remove = __devexit_p(remove), | ||
1151 | /* resume, suspend are optional */ | ||
1152 | }; | ||
1153 | |||
1154 | /** | ||
1155 | * alterapciechdma_init() - Module initialization, registers devices. | ||
1156 | */ | ||
1157 | static int __init alterapciechdma_init(void) | ||
1158 | { | ||
1159 | int rc = 0; | ||
1160 | printk(KERN_DEBUG DRV_NAME " init(), built at " __DATE__ " " __TIME__ "\n"); | ||
1161 | /* register this driver with the PCI bus driver */ | ||
1162 | rc = pci_register_driver(&pci_driver); | ||
1163 | if (rc < 0) | ||
1164 | return rc; | ||
1165 | return 0; | ||
1166 | } | ||
1167 | |||
1168 | /** | ||
1169 | * alterapciechdma_init() - Module cleanup, unregisters devices. | ||
1170 | */ | ||
1171 | static void __exit alterapciechdma_exit(void) | ||
1172 | { | ||
1173 | printk(KERN_DEBUG DRV_NAME " exit(), built at " __DATE__ " " __TIME__ "\n"); | ||
1174 | /* unregister this driver from the PCI bus driver */ | ||
1175 | pci_unregister_driver(&pci_driver); | ||
1176 | } | ||
1177 | |||
1178 | MODULE_LICENSE("GPL"); | ||
1179 | |||
1180 | module_init(alterapciechdma_init); | ||
1181 | module_exit(alterapciechdma_exit); | ||
1182 | |||
diff --git a/drivers/staging/arlan/Makefile b/drivers/staging/arlan/Makefile index 9e58e5fae7b9..5a84d4402f21 100644 --- a/drivers/staging/arlan/Makefile +++ b/drivers/staging/arlan/Makefile | |||
@@ -1,3 +1,3 @@ | |||
1 | obj-$(CONFIG_ARLAN) += arlan.o | 1 | obj-$(CONFIG_ARLAN) += arlan.o |
2 | 2 | ||
3 | arlan-objs := arlan-main.o arlan-proc.o | 3 | arlan-objs := arlan-main.o arlan-proc.o |
diff --git a/drivers/staging/arlan/arlan.h b/drivers/staging/arlan/arlan.h index fb3ad51a1caf..ffcd3ea048aa 100644 --- a/drivers/staging/arlan/arlan.h +++ b/drivers/staging/arlan/arlan.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1997 Cullen Jennings | 2 | * Copyright (C) 1997 Cullen Jennings |
3 | * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500 | 3 | * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500 |
4 | * GNU General Public License applies | 4 | * GNU General Public License applies |
5 | */ | 5 | */ |
6 | 6 | ||
@@ -20,14 +20,14 @@ | |||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
22 | #include <asm/system.h> | 22 | #include <asm/system.h> |
23 | #include <asm/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/errno.h> | 24 | #include <linux/errno.h> |
25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
26 | #include <linux/netdevice.h> | 26 | #include <linux/netdevice.h> |
27 | #include <linux/etherdevice.h> | 27 | #include <linux/etherdevice.h> |
28 | 28 | ||
29 | 29 | ||
30 | //#define ARLAN_DEBUGGING 1 | 30 | /* #define ARLAN_DEBUGGING 1 */ |
31 | 31 | ||
32 | #define ARLAN_PROC_INTERFACE | 32 | #define ARLAN_PROC_INTERFACE |
33 | #define MAX_ARLANS 4 /* not more than 4 ! */ | 33 | #define MAX_ARLANS 4 /* not more than 4 ! */ |
@@ -51,8 +51,8 @@ extern int arlan_debug; | |||
51 | extern int arlan_entry_debug; | 51 | extern int arlan_entry_debug; |
52 | extern int arlan_exit_debug; | 52 | extern int arlan_exit_debug; |
53 | extern int testMemory; | 53 | extern int testMemory; |
54 | extern int arlan_command(struct net_device * dev, int command); | 54 | extern int arlan_command(struct net_device *dev, int command); |
55 | 55 | ||
56 | #define SIDUNKNOWN -1 | 56 | #define SIDUNKNOWN -1 |
57 | #define radioNodeIdUNKNOWN -1 | 57 | #define radioNodeIdUNKNOWN -1 |
58 | #define irqUNKNOWN 0 | 58 | #define irqUNKNOWN 0 |
@@ -65,22 +65,21 @@ extern int arlan_command(struct net_device * dev, int command); | |||
65 | #define registrationModeUNKNOWN -1 | 65 | #define registrationModeUNKNOWN -1 |
66 | 66 | ||
67 | 67 | ||
68 | #define IFDEBUG( L ) if ( (L) & arlan_debug ) | 68 | #define IFDEBUG(L) if ((L) & arlan_debug) |
69 | #define ARLAN_FAKE_HDR_LEN 12 | 69 | #define ARLAN_FAKE_HDR_LEN 12 |
70 | 70 | ||
71 | #ifdef ARLAN_DEBUGGING | 71 | #ifdef ARLAN_DEBUGGING |
72 | #define DEBUG 1 | 72 | #define DEBUG 1 |
73 | #define ARLAN_ENTRY_EXIT_DEBUGGING 1 | 73 | #define ARLAN_ENTRY_EXIT_DEBUGGING 1 |
74 | #define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b) | 74 | #define ARLAN_DEBUG(a, b) printk(KERN_DEBUG a, b) |
75 | #else | 75 | #else |
76 | #define ARLAN_DEBUG(a,b) | 76 | #define ARLAN_DEBUG(a, b) |
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | #define ARLAN_SHMEM_SIZE 0x2000 | 79 | #define ARLAN_SHMEM_SIZE 0x2000 |
80 | 80 | ||
81 | struct arlan_shmem | 81 | struct arlan_shmem { |
82 | { | 82 | /* Header Signature */ |
83 | /* Header Signature */ | ||
84 | volatile char textRegion[48]; | 83 | volatile char textRegion[48]; |
85 | volatile u_char resetFlag; | 84 | volatile u_char resetFlag; |
86 | volatile u_char diagnosticInfo; | 85 | volatile u_char diagnosticInfo; |
@@ -91,10 +90,10 @@ struct arlan_shmem | |||
91 | volatile u_char hardwareType; | 90 | volatile u_char hardwareType; |
92 | volatile u_char majorHardwareVersion; | 91 | volatile u_char majorHardwareVersion; |
93 | volatile u_char minorHardwareVersion; | 92 | volatile u_char minorHardwareVersion; |
94 | volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111 | 93 | volatile u_char radioModule;/* shows EEPROM, can be overridden at 0x111 */ |
95 | volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A | 94 | volatile u_char defaultChannelSet; /* shows EEProm, can be overriiden at 0x10A */ |
96 | volatile u_char _2[47]; | 95 | volatile u_char _2[47]; |
97 | 96 | ||
98 | /* Control/Status Block - 0x0080 */ | 97 | /* Control/Status Block - 0x0080 */ |
99 | volatile u_char interruptInProgress; /* not used by lancpu */ | 98 | volatile u_char interruptInProgress; /* not used by lancpu */ |
100 | volatile u_char cntrlRegImage; /* not used by lancpu */ | 99 | volatile u_char cntrlRegImage; /* not used by lancpu */ |
@@ -113,7 +112,7 @@ struct arlan_shmem | |||
113 | volatile u_char rxQuality; | 112 | volatile u_char rxQuality; |
114 | volatile u_char scrambled; | 113 | volatile u_char scrambled; |
115 | volatile u_char _4[1]; | 114 | volatile u_char _4[1]; |
116 | 115 | ||
117 | /* Transmit Status - 0x00b0 */ | 116 | /* Transmit Status - 0x00b0 */ |
118 | volatile u_char txStatus; | 117 | volatile u_char txStatus; |
119 | volatile u_char txAckQuality; | 118 | volatile u_char txAckQuality; |
@@ -151,7 +150,7 @@ struct arlan_shmem | |||
151 | volatile u_short routerId; | 150 | volatile u_short routerId; |
152 | volatile u_char _10[9]; | 151 | volatile u_char _10[9]; |
153 | volatile u_char txAttenuation; | 152 | volatile u_char txAttenuation; |
154 | volatile u_char systemId[4]; | 153 | volatile u_char systemId[4]; |
155 | volatile u_short globalChecksum; | 154 | volatile u_short globalChecksum; |
156 | volatile u_char _11[4]; | 155 | volatile u_char _11[4]; |
157 | volatile u_short maxDatagramSize; | 156 | volatile u_short maxDatagramSize; |
@@ -207,19 +206,19 @@ struct arlan_shmem | |||
207 | volatile u_char hostcpuLock; | 206 | volatile u_char hostcpuLock; |
208 | volatile u_char lancpuLock; | 207 | volatile u_char lancpuLock; |
209 | volatile u_char resetTime[18]; | 208 | volatile u_char resetTime[18]; |
210 | 209 | ||
211 | volatile u_char numDatagramsTransmitted[4]; | 210 | volatile u_char numDatagramsTransmitted[4]; |
212 | volatile u_char numReTransmissions[4]; | 211 | volatile u_char numReTransmissions[4]; |
213 | volatile u_char numFramesDiscarded[4]; | 212 | volatile u_char numFramesDiscarded[4]; |
214 | volatile u_char numDatagramsReceived[4]; | 213 | volatile u_char numDatagramsReceived[4]; |
215 | volatile u_char numDuplicateReceivedFrames[4]; | 214 | volatile u_char numDuplicateReceivedFrames[4]; |
216 | volatile u_char numDatagramsDiscarded[4]; | 215 | volatile u_char numDatagramsDiscarded[4]; |
217 | 216 | ||
218 | volatile u_short maxNumReTransmitDatagram; | 217 | volatile u_short maxNumReTransmitDatagram; |
219 | volatile u_short maxNumReTransmitFrames; | 218 | volatile u_short maxNumReTransmitFrames; |
220 | volatile u_short maxNumConsecutiveDuplicateFrames; | 219 | volatile u_short maxNumConsecutiveDuplicateFrames; |
221 | /* misaligned here so we have to go to characters */ | 220 | /* misaligned here so we have to go to characters */ |
222 | 221 | ||
223 | volatile u_char numBytesTransmitted[4]; | 222 | volatile u_char numBytesTransmitted[4]; |
224 | volatile u_char numBytesReceived[4]; | 223 | volatile u_char numBytesReceived[4]; |
225 | volatile u_char numCRCErrors[4]; | 224 | volatile u_char numCRCErrors[4]; |
@@ -259,7 +258,7 @@ struct arlan_conf_stru { | |||
259 | int channelNumber; | 258 | int channelNumber; |
260 | int scramblingDisable; | 259 | int scramblingDisable; |
261 | int txAttenuation; | 260 | int txAttenuation; |
262 | int systemId; | 261 | int systemId; |
263 | int maxDatagramSize; | 262 | int maxDatagramSize; |
264 | int maxFrameSize; | 263 | int maxFrameSize; |
265 | int maxRetries; | 264 | int maxRetries; |
@@ -316,8 +315,7 @@ struct arlan_conf_stru { | |||
316 | 315 | ||
317 | extern struct arlan_conf_stru arlan_conf[MAX_ARLANS]; | 316 | extern struct arlan_conf_stru arlan_conf[MAX_ARLANS]; |
318 | 317 | ||
319 | struct TxParam | 318 | struct TxParam { |
320 | { | ||
321 | volatile short offset; | 319 | volatile short offset; |
322 | volatile short length; | 320 | volatile short length; |
323 | volatile u_char dest[6]; | 321 | volatile u_char dest[6]; |
@@ -330,12 +328,12 @@ struct TxParam | |||
330 | #define TX_RING_SIZE 2 | 328 | #define TX_RING_SIZE 2 |
331 | /* Information that need to be kept for each board. */ | 329 | /* Information that need to be kept for each board. */ |
332 | struct arlan_private { | 330 | struct arlan_private { |
333 | struct arlan_shmem __iomem * card; | 331 | struct arlan_shmem __iomem *card; |
334 | struct arlan_shmem * conf; | 332 | struct arlan_shmem *conf; |
335 | 333 | ||
336 | struct arlan_conf_stru * Conf; | 334 | struct arlan_conf_stru *Conf; |
337 | int bad; | 335 | int bad; |
338 | int reset; | 336 | int reset; |
339 | unsigned long lastReset; | 337 | unsigned long lastReset; |
340 | struct timer_list timer; | 338 | struct timer_list timer; |
341 | struct timer_list tx_delay_timer; | 339 | struct timer_list tx_delay_timer; |
@@ -407,38 +405,38 @@ struct arlan_private { | |||
407 | 405 | ||
408 | #define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer) | 406 | #define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer) |
409 | #define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer) | 407 | #define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer) |
410 | 408 | ||
411 | #define READSHM(to,from,atype) {\ | 409 | #define READSHM(to, from, atype) {\ |
412 | atype tmp;\ | 410 | atype tmp;\ |
413 | memcpy_fromio(&(tmp),&(from),sizeof(atype));\ | 411 | memcpy_fromio(&(tmp), &(from), sizeof(atype));\ |
414 | to = tmp;\ | 412 | to = tmp;\ |
415 | } | 413 | } |
416 | 414 | ||
417 | #define READSHMEM(from,atype)\ | 415 | #define READSHMEM(from, atype)\ |
418 | atype from; \ | 416 | atype from; \ |
419 | READSHM(from, arlan->from, atype); | 417 | READSHM(from, arlan->from, atype); |
420 | 418 | ||
421 | #define WRITESHM(to,from,atype) \ | 419 | #define WRITESHM(to, from, atype) \ |
422 | { atype tmpSHM = from;\ | 420 | { atype tmpSHM = from;\ |
423 | memcpy_toio(&(to),&tmpSHM,sizeof(atype));\ | 421 | memcpy_toio(&(to), &tmpSHM, sizeof(atype));\ |
424 | } | 422 | } |
425 | 423 | ||
426 | #define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \ | 424 | #define DEBUGSHM(levelSHM, stringSHM, stuff, atype) \ |
427 | { atype tmpSHM; \ | 425 | { atype tmpSHM; \ |
428 | memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\ | 426 | memcpy_fromio(&tmpSHM, &(stuff), sizeof(atype));\ |
429 | IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\ | 427 | IFDEBUG(levelSHM) printk(stringSHM, tmpSHM);\ |
430 | } | 428 | } |
431 | 429 | ||
432 | #define WRITESHMB(to, val) \ | 430 | #define WRITESHMB(to, val) \ |
433 | writeb(val,&(to)) | 431 | writeb(val, &(to)) |
434 | #define READSHMB(to) \ | 432 | #define READSHMB(to) \ |
435 | readb(&(to)) | 433 | readb(&(to)) |
436 | #define WRITESHMS(to, val) \ | 434 | #define WRITESHMS(to, val) \ |
437 | writew(val,&(to)) | 435 | writew(val, &(to)) |
438 | #define READSHMS(to) \ | 436 | #define READSHMS(to) \ |
439 | readw(&(to)) | 437 | readw(&(to)) |
440 | #define WRITESHMI(to, val) \ | 438 | #define WRITESHMI(to, val) \ |
441 | writel(val,&(to)) | 439 | writel(val, &(to)) |
442 | #define READSHMI(to) \ | 440 | #define READSHMI(to) \ |
443 | readl(&(to)) | 441 | readl(&(to)) |
444 | 442 | ||
@@ -447,51 +445,51 @@ struct arlan_private { | |||
447 | 445 | ||
448 | 446 | ||
449 | #define registrationBad(dev)\ | 447 | #define registrationBad(dev)\ |
450 | ( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \ | 448 | (( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \ |
451 | ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) ) | 449 | ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0)) |
452 | 450 | ||
453 | 451 | ||
454 | #define readControlRegister(dev)\ | 452 | #define readControlRegister(dev)\ |
455 | READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage) | 453 | READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage) |
456 | 454 | ||
457 | #define writeControlRegister(dev, v){\ | 455 | #define writeControlRegister(dev, v) {\ |
458 | WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\ | 456 | WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage, ((v) & 0xF));\ |
459 | WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );} | 457 | WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister, (v)); } |
460 | 458 | ||
461 | 459 | ||
462 | #define arlan_interrupt_lancpu(dev) {\ | 460 | #define arlan_interrupt_lancpu(dev) {\ |
463 | int cr; \ | 461 | int cr; \ |
464 | \ | 462 | \ |
465 | cr = readControlRegister(dev);\ | 463 | cr = readControlRegister(dev);\ |
466 | if (cr & ARLAN_CHANNEL_ATTENTION){ \ | 464 | if (cr & ARLAN_CHANNEL_ATTENTION) { \ |
467 | writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\ | 465 | writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\ |
468 | }else \ | 466 | } else \ |
469 | writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\ | 467 | writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\ |
470 | } | 468 | } |
471 | 469 | ||
472 | #define clearChannelAttention(dev){ \ | 470 | #define clearChannelAttention(dev) { \ |
473 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);} | 471 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION); } |
474 | #define setHardwareReset(dev) {\ | 472 | #define setHardwareReset(dev) {\ |
475 | writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);} | 473 | writeControlRegister(dev, readControlRegister(dev) | ARLAN_RESET); } |
476 | #define clearHardwareReset(dev) {\ | 474 | #define clearHardwareReset(dev) {\ |
477 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);} | 475 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_RESET); } |
478 | #define setInterruptEnable(dev){\ | 476 | #define setInterruptEnable(dev) {\ |
479 | writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;} | 477 | writeControlRegister(dev, readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ; } |
480 | #define clearInterruptEnable(dev){\ | 478 | #define clearInterruptEnable(dev) {\ |
481 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;} | 479 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ; } |
482 | #define setClearInterrupt(dev){\ | 480 | #define setClearInterrupt(dev) {\ |
483 | writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;} | 481 | writeControlRegister(dev, readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ; } |
484 | #define clearClearInterrupt(dev){\ | 482 | #define clearClearInterrupt(dev) {\ |
485 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);} | 483 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT); } |
486 | #define setPowerOff(dev){\ | 484 | #define setPowerOff(dev) {\ |
487 | writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\ | 485 | writeControlRegister(dev, readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\ |
488 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);} | 486 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); } |
489 | #define setPowerOn(dev){\ | 487 | #define setPowerOn(dev) {\ |
490 | writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); } | 488 | writeControlRegister(dev, readControlRegister(dev) & ~(ARLAN_POWER)); } |
491 | #define arlan_lock_card_access(dev){\ | 489 | #define arlan_lock_card_access(dev) {\ |
492 | writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);} | 490 | writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); } |
493 | #define arlan_unlock_card_access(dev){\ | 491 | #define arlan_unlock_card_access(dev) {\ |
494 | writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); } | 492 | writeControlRegister(dev, readControlRegister(dev) | ARLAN_ACCESS); } |
495 | 493 | ||
496 | 494 | ||
497 | 495 | ||
@@ -525,7 +523,6 @@ struct arlan_private { | |||
525 | | ARLAN_COMMAND_RESET) | 523 | | ARLAN_COMMAND_RESET) |
526 | 524 | ||
527 | 525 | ||
528 | |||
529 | #define ARLAN_DEBUG_CHAIN_LOCKS 0x00001 | 526 | #define ARLAN_DEBUG_CHAIN_LOCKS 0x00001 |
530 | #define ARLAN_DEBUG_RESET 0x00002 | 527 | #define ARLAN_DEBUG_RESET 0x00002 |
531 | #define ARLAN_DEBUG_TIMING 0x00004 | 528 | #define ARLAN_DEBUG_TIMING 0x00004 |
@@ -536,4 +533,3 @@ struct arlan_private { | |||
536 | #define ARLAN_DEBUG_INTERRUPT 0x00080 | 533 | #define ARLAN_DEBUG_INTERRUPT 0x00080 |
537 | #define ARLAN_DEBUG_STARTUP 0x00100 | 534 | #define ARLAN_DEBUG_STARTUP 0x00100 |
538 | #define ARLAN_DEBUG_SHUTDOWN 0x00200 | 535 | #define ARLAN_DEBUG_SHUTDOWN 0x00200 |
539 | |||
diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c index 43c57b7688ab..cadb6f7321ad 100644 --- a/drivers/staging/asus_oled/asus_oled.c +++ b/drivers/staging/asus_oled/asus_oled.c | |||
@@ -52,6 +52,10 @@ | |||
52 | #define ASUS_OLED_DISP_HEIGHT 32 | 52 | #define ASUS_OLED_DISP_HEIGHT 32 |
53 | #define ASUS_OLED_PACKET_BUF_SIZE 256 | 53 | #define ASUS_OLED_PACKET_BUF_SIZE 256 |
54 | 54 | ||
55 | #define USB_VENDOR_ID_ASUS 0x0b05 | ||
56 | #define USB_DEVICE_ID_ASUS_LCM 0x1726 | ||
57 | #define USB_DEVICE_ID_ASUS_LCM2 0x175b | ||
58 | |||
55 | MODULE_AUTHOR("Jakub Schmidtke, sjakub@gmail.com"); | 59 | MODULE_AUTHOR("Jakub Schmidtke, sjakub@gmail.com"); |
56 | MODULE_DESCRIPTION("Asus OLED Driver v" ASUS_OLED_VERSION); | 60 | MODULE_DESCRIPTION("Asus OLED Driver v" ASUS_OLED_VERSION); |
57 | MODULE_LICENSE("GPL"); | 61 | MODULE_LICENSE("GPL"); |
@@ -83,18 +87,20 @@ struct oled_dev_desc_str { | |||
83 | }; | 87 | }; |
84 | 88 | ||
85 | /* table of devices that work with this driver */ | 89 | /* table of devices that work with this driver */ |
86 | static struct usb_device_id id_table[] = { | 90 | static const struct usb_device_id id_table[] = { |
87 | /* Asus G1/G2 (and variants)*/ | 91 | /* Asus G1/G2 (and variants)*/ |
88 | { USB_DEVICE(0x0b05, 0x1726) }, | 92 | { USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM) }, |
89 | /* Asus G50V (and possibly others - G70? G71?)*/ | 93 | /* Asus G50V (and possibly others - G70? G71?)*/ |
90 | { USB_DEVICE(0x0b05, 0x175b) }, | 94 | { USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM2) }, |
91 | { }, | 95 | { }, |
92 | }; | 96 | }; |
93 | 97 | ||
94 | /* parameters of specific devices */ | 98 | /* parameters of specific devices */ |
95 | static struct oled_dev_desc_str oled_dev_desc_table[] = { | 99 | static struct oled_dev_desc_str oled_dev_desc_table[] = { |
96 | { 0x0b05, 0x1726, 128, PACK_MODE_G1, "G1/G2" }, | 100 | { USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM, 128, PACK_MODE_G1, |
97 | { 0x0b05, 0x175b, 256, PACK_MODE_G50, "G50" }, | 101 | "G1/G2" }, |
102 | { USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM2, 256, PACK_MODE_G50, | ||
103 | "G50" }, | ||
98 | { }, | 104 | { }, |
99 | }; | 105 | }; |
100 | 106 | ||
@@ -424,6 +430,11 @@ static ssize_t odev_set_picture(struct asus_oled_dev *odev, | |||
424 | 430 | ||
425 | kfree(odev->buf); | 431 | kfree(odev->buf); |
426 | odev->buf = kmalloc(odev->buf_size, GFP_KERNEL); | 432 | odev->buf = kmalloc(odev->buf_size, GFP_KERNEL); |
433 | if (odev->buf == NULL) { | ||
434 | odev->buf_size = 0; | ||
435 | printk(ASUS_OLED_ERROR "Out of memory!\n"); | ||
436 | return -ENOMEM; | ||
437 | } | ||
427 | 438 | ||
428 | memset(odev->buf, 0xff, odev->buf_size); | 439 | memset(odev->buf, 0xff, odev->buf_size); |
429 | 440 | ||
diff --git a/drivers/staging/b3dfg/Kconfig b/drivers/staging/b3dfg/Kconfig deleted file mode 100644 index 9e6573cf97d3..000000000000 --- a/drivers/staging/b3dfg/Kconfig +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | config B3DFG | ||
2 | tristate "Brontes 3d Frame Framegrabber" | ||
3 | depends on PCI | ||
4 | default n | ||
5 | ---help--- | ||
6 | This driver provides support for the Brontes 3d Framegrabber | ||
7 | PCI card. | ||
8 | |||
9 | To compile this driver as a module, choose M here. The module | ||
10 | will be called b3dfg. | ||
diff --git a/drivers/staging/b3dfg/Makefile b/drivers/staging/b3dfg/Makefile deleted file mode 100644 index 91f439ffc174..000000000000 --- a/drivers/staging/b3dfg/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-$(CONFIG_B3DFG) += b3dfg.o | ||
diff --git a/drivers/staging/b3dfg/TODO b/drivers/staging/b3dfg/TODO deleted file mode 100644 index f5a9298b9ac1..000000000000 --- a/drivers/staging/b3dfg/TODO +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | |||
2 | - queue/wait buffer presents filltime results for each frame? | ||
3 | - counting of dropped frames | ||
4 | - review endianness | ||
diff --git a/drivers/staging/b3dfg/b3dfg.c b/drivers/staging/b3dfg/b3dfg.c deleted file mode 100644 index 4a43c51c172a..000000000000 --- a/drivers/staging/b3dfg/b3dfg.c +++ /dev/null | |||
@@ -1,1100 +0,0 @@ | |||
1 | /* | ||
2 | * Brontes PCI frame grabber driver | ||
3 | * | ||
4 | * Copyright (C) 2008 3M Company | ||
5 | * Contact: Justin Bronder <jsbronder@brontes3d.com> | ||
6 | * Original Authors: Daniel Drake <ddrake@brontes3d.com> | ||
7 | * Duane Griffin <duaneg@dghda.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/device.h> | ||
25 | #include <linux/fs.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/spinlock.h> | ||
28 | #include <linux/ioctl.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/module.h> | ||
31 | #include <linux/pci.h> | ||
32 | #include <linux/types.h> | ||
33 | #include <linux/cdev.h> | ||
34 | #include <linux/list.h> | ||
35 | #include <linux/poll.h> | ||
36 | #include <linux/wait.h> | ||
37 | #include <linux/mm.h> | ||
38 | #include <linux/uaccess.h> | ||
39 | #include <linux/sched.h> | ||
40 | |||
41 | static unsigned int b3dfg_nbuf = 2; | ||
42 | |||
43 | module_param_named(buffer_count, b3dfg_nbuf, uint, 0444); | ||
44 | |||
45 | MODULE_PARM_DESC(buffer_count, "Number of buffers (min 2, default 2)"); | ||
46 | |||
47 | MODULE_AUTHOR("Daniel Drake <ddrake@brontes3d.com>"); | ||
48 | MODULE_DESCRIPTION("Brontes frame grabber driver"); | ||
49 | MODULE_LICENSE("GPL"); | ||
50 | |||
51 | #define DRIVER_NAME "b3dfg" | ||
52 | #define B3DFG_MAX_DEVS 4 | ||
53 | #define B3DFG_FRAMES_PER_BUFFER 3 | ||
54 | |||
55 | #define B3DFG_BAR_REGS 0 | ||
56 | #define B3DFG_REGS_LENGTH 0x10000 | ||
57 | |||
58 | #define B3DFG_IOC_MAGIC 0xb3 /* dfg :-) */ | ||
59 | #define B3DFG_IOCGFRMSZ _IOR(B3DFG_IOC_MAGIC, 1, int) | ||
60 | #define B3DFG_IOCTNUMBUFS _IO(B3DFG_IOC_MAGIC, 2) | ||
61 | #define B3DFG_IOCTTRANS _IO(B3DFG_IOC_MAGIC, 3) | ||
62 | #define B3DFG_IOCTQUEUEBUF _IO(B3DFG_IOC_MAGIC, 4) | ||
63 | #define B3DFG_IOCTPOLLBUF _IOWR(B3DFG_IOC_MAGIC, 5, struct b3dfg_poll) | ||
64 | #define B3DFG_IOCTWAITBUF _IOWR(B3DFG_IOC_MAGIC, 6, struct b3dfg_wait) | ||
65 | #define B3DFG_IOCGWANDSTAT _IOR(B3DFG_IOC_MAGIC, 7, int) | ||
66 | |||
67 | enum { | ||
68 | /* number of 4kb pages per frame */ | ||
69 | B3D_REG_FRM_SIZE = 0x0, | ||
70 | |||
71 | /* bit 0: set to enable interrupts | ||
72 | * bit 1: set to enable cable status change interrupts */ | ||
73 | B3D_REG_HW_CTRL = 0x4, | ||
74 | |||
75 | /* bit 0-1 - 1-based ID of next pending frame transfer (0 = none) | ||
76 | * bit 2 indicates the previous DMA transfer has completed | ||
77 | * bit 3 indicates wand cable status change | ||
78 | * bit 8:15 - counter of number of discarded triplets */ | ||
79 | B3D_REG_DMA_STS = 0x8, | ||
80 | |||
81 | /* bit 0: wand status (1 = present, 0 = disconnected) */ | ||
82 | B3D_REG_WAND_STS = 0xc, | ||
83 | |||
84 | /* bus address for DMA transfers. lower 2 bits must be zero because DMA | ||
85 | * works with 32 bit word size. */ | ||
86 | B3D_REG_EC220_DMA_ADDR = 0x8000, | ||
87 | |||
88 | /* bit 20:0 - number of 32 bit words to be transferred | ||
89 | * bit 21:31 - reserved */ | ||
90 | B3D_REG_EC220_TRF_SIZE = 0x8004, | ||
91 | |||
92 | /* bit 0 - error bit | ||
93 | * bit 1 - interrupt bit (set to generate interrupt at end of transfer) | ||
94 | * bit 2 - start bit (set to start transfer) | ||
95 | * bit 3 - direction (0 = DMA_TO_DEVICE, 1 = DMA_FROM_DEVICE | ||
96 | * bit 4:31 - reserved */ | ||
97 | B3D_REG_EC220_DMA_STS = 0x8008, | ||
98 | }; | ||
99 | |||
100 | enum b3dfg_buffer_state { | ||
101 | B3DFG_BUFFER_POLLED = 0, | ||
102 | B3DFG_BUFFER_PENDING, | ||
103 | B3DFG_BUFFER_POPULATED, | ||
104 | }; | ||
105 | |||
106 | struct b3dfg_buffer { | ||
107 | unsigned char *frame[B3DFG_FRAMES_PER_BUFFER]; | ||
108 | struct list_head list; | ||
109 | u8 state; | ||
110 | }; | ||
111 | |||
112 | struct b3dfg_dev { | ||
113 | |||
114 | /* no protection needed: all finalized at initialization time */ | ||
115 | struct pci_dev *pdev; | ||
116 | struct cdev chardev; | ||
117 | struct device *dev; | ||
118 | void __iomem *regs; | ||
119 | unsigned int frame_size; | ||
120 | |||
121 | /* | ||
122 | * Protects buffer state, including buffer_queue, triplet_ready, | ||
123 | * cur_dma_frame_idx & cur_dma_frame_addr. | ||
124 | */ | ||
125 | spinlock_t buffer_lock; | ||
126 | struct b3dfg_buffer *buffers; | ||
127 | struct list_head buffer_queue; | ||
128 | |||
129 | /* Last frame in triplet transferred (-1 if none). */ | ||
130 | int cur_dma_frame_idx; | ||
131 | |||
132 | /* Current frame's address for DMA. */ | ||
133 | dma_addr_t cur_dma_frame_addr; | ||
134 | |||
135 | /* | ||
136 | * Protects cstate_tstamp. | ||
137 | * Nests inside buffer_lock. | ||
138 | */ | ||
139 | spinlock_t cstate_lock; | ||
140 | unsigned long cstate_tstamp; | ||
141 | |||
142 | /* | ||
143 | * Protects triplets_dropped. | ||
144 | * Nests inside buffers_lock. | ||
145 | */ | ||
146 | spinlock_t triplets_dropped_lock; | ||
147 | unsigned int triplets_dropped; | ||
148 | |||
149 | wait_queue_head_t buffer_waitqueue; | ||
150 | |||
151 | unsigned int transmission_enabled:1; | ||
152 | unsigned int triplet_ready:1; | ||
153 | }; | ||
154 | |||
155 | static u8 b3dfg_devices[B3DFG_MAX_DEVS]; | ||
156 | |||
157 | static struct class *b3dfg_class; | ||
158 | static dev_t b3dfg_devt; | ||
159 | |||
160 | static const struct pci_device_id b3dfg_ids[] __devinitdata = { | ||
161 | { PCI_DEVICE(0x0b3d, 0x0001) }, | ||
162 | { }, | ||
163 | }; | ||
164 | |||
165 | MODULE_DEVICE_TABLE(pci, b3dfg_ids); | ||
166 | |||
167 | /***** user-visible types *****/ | ||
168 | |||
169 | struct b3dfg_poll { | ||
170 | int buffer_idx; | ||
171 | unsigned int triplets_dropped; | ||
172 | }; | ||
173 | |||
174 | struct b3dfg_wait { | ||
175 | int buffer_idx; | ||
176 | unsigned int timeout; | ||
177 | unsigned int triplets_dropped; | ||
178 | }; | ||
179 | |||
180 | /**** register I/O ****/ | ||
181 | |||
182 | static u32 b3dfg_read32(struct b3dfg_dev *fgdev, u16 reg) | ||
183 | { | ||
184 | return ioread32(fgdev->regs + reg); | ||
185 | } | ||
186 | |||
187 | static void b3dfg_write32(struct b3dfg_dev *fgdev, u16 reg, u32 value) | ||
188 | { | ||
189 | iowrite32(value, fgdev->regs + reg); | ||
190 | } | ||
191 | |||
192 | /**** buffer management ****/ | ||
193 | |||
194 | /* | ||
195 | * Program EC220 for transfer of a specific frame. | ||
196 | * Called with buffer_lock held. | ||
197 | */ | ||
198 | static int setup_frame_transfer(struct b3dfg_dev *fgdev, | ||
199 | struct b3dfg_buffer *buf, int frame) | ||
200 | { | ||
201 | unsigned char *frm_addr; | ||
202 | dma_addr_t frm_addr_dma; | ||
203 | unsigned int frm_size = fgdev->frame_size; | ||
204 | |||
205 | frm_addr = buf->frame[frame]; | ||
206 | frm_addr_dma = pci_map_single(fgdev->pdev, frm_addr, | ||
207 | frm_size, PCI_DMA_FROMDEVICE); | ||
208 | if (pci_dma_mapping_error(fgdev->pdev, frm_addr_dma)) | ||
209 | return -ENOMEM; | ||
210 | |||
211 | fgdev->cur_dma_frame_addr = frm_addr_dma; | ||
212 | fgdev->cur_dma_frame_idx = frame; | ||
213 | |||
214 | b3dfg_write32(fgdev, B3D_REG_EC220_DMA_ADDR, | ||
215 | cpu_to_le32(frm_addr_dma)); | ||
216 | b3dfg_write32(fgdev, B3D_REG_EC220_TRF_SIZE, | ||
217 | cpu_to_le32(frm_size >> 2)); | ||
218 | b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0xf); | ||
219 | |||
220 | return 0; | ||
221 | } | ||
222 | |||
223 | /* Caller should hold buffer lock */ | ||
224 | static void dequeue_all_buffers(struct b3dfg_dev *fgdev) | ||
225 | { | ||
226 | int i; | ||
227 | for (i = 0; i < b3dfg_nbuf; i++) { | ||
228 | struct b3dfg_buffer *buf = &fgdev->buffers[i]; | ||
229 | buf->state = B3DFG_BUFFER_POLLED; | ||
230 | list_del_init(&buf->list); | ||
231 | } | ||
232 | } | ||
233 | |||
234 | /* queue a buffer to receive data */ | ||
235 | static int queue_buffer(struct b3dfg_dev *fgdev, int bufidx) | ||
236 | { | ||
237 | struct device *dev = &fgdev->pdev->dev; | ||
238 | struct b3dfg_buffer *buf; | ||
239 | unsigned long flags; | ||
240 | int r = 0; | ||
241 | |||
242 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
243 | if (bufidx < 0 || bufidx >= b3dfg_nbuf) { | ||
244 | dev_dbg(dev, "Invalid buffer index, %d\n", bufidx); | ||
245 | r = -ENOENT; | ||
246 | goto out; | ||
247 | } | ||
248 | buf = &fgdev->buffers[bufidx]; | ||
249 | |||
250 | if (unlikely(buf->state == B3DFG_BUFFER_PENDING)) { | ||
251 | dev_dbg(dev, "buffer %d is already queued\n", bufidx); | ||
252 | r = -EINVAL; | ||
253 | goto out; | ||
254 | } | ||
255 | |||
256 | buf->state = B3DFG_BUFFER_PENDING; | ||
257 | list_add_tail(&buf->list, &fgdev->buffer_queue); | ||
258 | |||
259 | if (fgdev->transmission_enabled && fgdev->triplet_ready) { | ||
260 | dev_dbg(dev, "triplet is ready, pushing immediately\n"); | ||
261 | fgdev->triplet_ready = 0; | ||
262 | r = setup_frame_transfer(fgdev, buf, 0); | ||
263 | if (r) | ||
264 | dev_err(dev, "unable to map DMA buffer\n"); | ||
265 | } | ||
266 | |||
267 | out: | ||
268 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
269 | return r; | ||
270 | } | ||
271 | |||
272 | /* non-blocking buffer poll. returns 1 if data is present in the buffer, | ||
273 | * 0 otherwise */ | ||
274 | static int poll_buffer(struct b3dfg_dev *fgdev, void __user *arg) | ||
275 | { | ||
276 | struct device *dev = &fgdev->pdev->dev; | ||
277 | struct b3dfg_poll p; | ||
278 | struct b3dfg_buffer *buf; | ||
279 | unsigned long flags; | ||
280 | int r = 1; | ||
281 | int arg_out = 0; | ||
282 | |||
283 | if (copy_from_user(&p, arg, sizeof(p))) | ||
284 | return -EFAULT; | ||
285 | |||
286 | if (unlikely(!fgdev->transmission_enabled)) { | ||
287 | dev_dbg(dev, "cannot poll, transmission disabled\n"); | ||
288 | return -EINVAL; | ||
289 | } | ||
290 | |||
291 | if (p.buffer_idx < 0 || p.buffer_idx >= b3dfg_nbuf) | ||
292 | return -ENOENT; | ||
293 | |||
294 | buf = &fgdev->buffers[p.buffer_idx]; | ||
295 | |||
296 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
297 | |||
298 | if (likely(buf->state == B3DFG_BUFFER_POPULATED)) { | ||
299 | arg_out = 1; | ||
300 | buf->state = B3DFG_BUFFER_POLLED; | ||
301 | |||
302 | /* IRQs already disabled by spin_lock_irqsave above. */ | ||
303 | spin_lock(&fgdev->triplets_dropped_lock); | ||
304 | p.triplets_dropped = fgdev->triplets_dropped; | ||
305 | fgdev->triplets_dropped = 0; | ||
306 | spin_unlock(&fgdev->triplets_dropped_lock); | ||
307 | } else { | ||
308 | r = 0; | ||
309 | } | ||
310 | |||
311 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
312 | |||
313 | if (arg_out && copy_to_user(arg, &p, sizeof(p))) | ||
314 | r = -EFAULT; | ||
315 | |||
316 | return r; | ||
317 | } | ||
318 | |||
319 | static unsigned long get_cstate_change(struct b3dfg_dev *fgdev) | ||
320 | { | ||
321 | unsigned long flags, when; | ||
322 | |||
323 | spin_lock_irqsave(&fgdev->cstate_lock, flags); | ||
324 | when = fgdev->cstate_tstamp; | ||
325 | spin_unlock_irqrestore(&fgdev->cstate_lock, flags); | ||
326 | return when; | ||
327 | } | ||
328 | |||
329 | static int is_event_ready(struct b3dfg_dev *fgdev, struct b3dfg_buffer *buf, | ||
330 | unsigned long when) | ||
331 | { | ||
332 | int result; | ||
333 | unsigned long flags; | ||
334 | |||
335 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
336 | spin_lock(&fgdev->cstate_lock); | ||
337 | result = (!fgdev->transmission_enabled || | ||
338 | buf->state == B3DFG_BUFFER_POPULATED || | ||
339 | when != fgdev->cstate_tstamp); | ||
340 | spin_unlock(&fgdev->cstate_lock); | ||
341 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
342 | |||
343 | return result; | ||
344 | } | ||
345 | |||
346 | /* sleep until a specific buffer becomes populated */ | ||
347 | static int wait_buffer(struct b3dfg_dev *fgdev, void __user *arg) | ||
348 | { | ||
349 | struct device *dev = &fgdev->pdev->dev; | ||
350 | struct b3dfg_wait w; | ||
351 | struct b3dfg_buffer *buf; | ||
352 | unsigned long flags, when; | ||
353 | int r; | ||
354 | |||
355 | if (copy_from_user(&w, arg, sizeof(w))) | ||
356 | return -EFAULT; | ||
357 | |||
358 | if (!fgdev->transmission_enabled) { | ||
359 | dev_dbg(dev, "cannot wait, transmission disabled\n"); | ||
360 | return -EINVAL; | ||
361 | } | ||
362 | |||
363 | if (w.buffer_idx < 0 || w.buffer_idx >= b3dfg_nbuf) | ||
364 | return -ENOENT; | ||
365 | |||
366 | buf = &fgdev->buffers[w.buffer_idx]; | ||
367 | |||
368 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
369 | |||
370 | if (buf->state == B3DFG_BUFFER_POPULATED) { | ||
371 | r = w.timeout; | ||
372 | goto out_triplets_dropped; | ||
373 | } | ||
374 | |||
375 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
376 | |||
377 | when = get_cstate_change(fgdev); | ||
378 | if (w.timeout > 0) { | ||
379 | r = wait_event_interruptible_timeout(fgdev->buffer_waitqueue, | ||
380 | is_event_ready(fgdev, buf, when), | ||
381 | (w.timeout * HZ) / 1000); | ||
382 | |||
383 | if (unlikely(r < 0)) | ||
384 | goto out; | ||
385 | |||
386 | w.timeout = r * 1000 / HZ; | ||
387 | } else { | ||
388 | r = wait_event_interruptible(fgdev->buffer_waitqueue, | ||
389 | is_event_ready(fgdev, buf, when)); | ||
390 | |||
391 | if (unlikely(r)) { | ||
392 | r = -ERESTARTSYS; | ||
393 | goto out; | ||
394 | } | ||
395 | } | ||
396 | |||
397 | /* TODO: Inform the user via field(s) in w? */ | ||
398 | if (!fgdev->transmission_enabled || when != get_cstate_change(fgdev)) { | ||
399 | r = -EINVAL; | ||
400 | goto out; | ||
401 | } | ||
402 | |||
403 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
404 | |||
405 | if (buf->state != B3DFG_BUFFER_POPULATED) { | ||
406 | r = -ETIMEDOUT; | ||
407 | goto out_unlock; | ||
408 | } | ||
409 | |||
410 | buf->state = B3DFG_BUFFER_POLLED; | ||
411 | |||
412 | out_triplets_dropped: | ||
413 | |||
414 | /* IRQs already disabled by spin_lock_irqsave above. */ | ||
415 | spin_lock(&fgdev->triplets_dropped_lock); | ||
416 | w.triplets_dropped = fgdev->triplets_dropped; | ||
417 | fgdev->triplets_dropped = 0; | ||
418 | spin_unlock(&fgdev->triplets_dropped_lock); | ||
419 | |||
420 | out_unlock: | ||
421 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
422 | if (copy_to_user(arg, &w, sizeof(w))) | ||
423 | r = -EFAULT; | ||
424 | out: | ||
425 | return r; | ||
426 | } | ||
427 | |||
428 | /* mmap page fault handler */ | ||
429 | static int b3dfg_vma_fault(struct vm_area_struct *vma, | ||
430 | struct vm_fault *vmf) | ||
431 | { | ||
432 | struct b3dfg_dev *fgdev = vma->vm_file->private_data; | ||
433 | unsigned long off = vmf->pgoff << PAGE_SHIFT; | ||
434 | unsigned int frame_size = fgdev->frame_size; | ||
435 | unsigned int buf_size = frame_size * B3DFG_FRAMES_PER_BUFFER; | ||
436 | unsigned char *addr; | ||
437 | |||
438 | /* determine which buffer the offset lies within */ | ||
439 | unsigned int buf_idx = off / buf_size; | ||
440 | /* and the offset into the buffer */ | ||
441 | unsigned int buf_off = off % buf_size; | ||
442 | |||
443 | /* determine which frame inside the buffer the offset lies in */ | ||
444 | unsigned int frm_idx = buf_off / frame_size; | ||
445 | /* and the offset into the frame */ | ||
446 | unsigned int frm_off = buf_off % frame_size; | ||
447 | |||
448 | if (unlikely(buf_idx >= b3dfg_nbuf)) | ||
449 | return VM_FAULT_SIGBUS; | ||
450 | |||
451 | addr = fgdev->buffers[buf_idx].frame[frm_idx] + frm_off; | ||
452 | vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, | ||
453 | virt_to_phys(addr) >> PAGE_SHIFT); | ||
454 | |||
455 | return VM_FAULT_NOPAGE; | ||
456 | } | ||
457 | |||
458 | static struct vm_operations_struct b3dfg_vm_ops = { | ||
459 | .fault = b3dfg_vma_fault, | ||
460 | }; | ||
461 | |||
462 | static int get_wand_status(struct b3dfg_dev *fgdev, int __user *arg) | ||
463 | { | ||
464 | u32 wndstat = b3dfg_read32(fgdev, B3D_REG_WAND_STS); | ||
465 | dev_dbg(&fgdev->pdev->dev, "wand status %x\n", wndstat); | ||
466 | return __put_user(wndstat & 0x1, arg); | ||
467 | } | ||
468 | |||
469 | static int enable_transmission(struct b3dfg_dev *fgdev) | ||
470 | { | ||
471 | unsigned long flags; | ||
472 | struct device *dev = &fgdev->pdev->dev; | ||
473 | |||
474 | dev_dbg(dev, "enable transmission\n"); | ||
475 | |||
476 | /* check the cable is plugged in. */ | ||
477 | if (!b3dfg_read32(fgdev, B3D_REG_WAND_STS)) { | ||
478 | dev_dbg(dev, "cannot start transmission without wand\n"); | ||
479 | return -EINVAL; | ||
480 | } | ||
481 | |||
482 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
483 | |||
484 | /* Handle racing enable_transmission calls. */ | ||
485 | if (fgdev->transmission_enabled) { | ||
486 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
487 | goto out; | ||
488 | } | ||
489 | |||
490 | spin_lock(&fgdev->triplets_dropped_lock); | ||
491 | fgdev->triplets_dropped = 0; | ||
492 | spin_unlock(&fgdev->triplets_dropped_lock); | ||
493 | |||
494 | fgdev->triplet_ready = 0; | ||
495 | fgdev->cur_dma_frame_idx = -1; | ||
496 | fgdev->transmission_enabled = 1; | ||
497 | |||
498 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
499 | |||
500 | /* Enable DMA and cable status interrupts. */ | ||
501 | b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0x03); | ||
502 | |||
503 | out: | ||
504 | return 0; | ||
505 | } | ||
506 | |||
507 | static void disable_transmission(struct b3dfg_dev *fgdev) | ||
508 | { | ||
509 | struct device *dev = &fgdev->pdev->dev; | ||
510 | unsigned long flags; | ||
511 | u32 tmp; | ||
512 | |||
513 | dev_dbg(dev, "disable transmission\n"); | ||
514 | |||
515 | /* guarantee that no more interrupts will be serviced */ | ||
516 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
517 | fgdev->transmission_enabled = 0; | ||
518 | |||
519 | b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0); | ||
520 | |||
521 | /* FIXME: temporary debugging only. if the board stops transmitting, | ||
522 | * hitting ctrl+c and seeing this message is useful for determining | ||
523 | * the state of the board. */ | ||
524 | tmp = b3dfg_read32(fgdev, B3D_REG_DMA_STS); | ||
525 | dev_dbg(dev, "DMA_STS reads %x after TX stopped\n", tmp); | ||
526 | |||
527 | dequeue_all_buffers(fgdev); | ||
528 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
529 | |||
530 | wake_up_interruptible(&fgdev->buffer_waitqueue); | ||
531 | } | ||
532 | |||
533 | static int set_transmission(struct b3dfg_dev *fgdev, int enabled) | ||
534 | { | ||
535 | int res = 0; | ||
536 | |||
537 | if (enabled && !fgdev->transmission_enabled) | ||
538 | res = enable_transmission(fgdev); | ||
539 | else if (!enabled && fgdev->transmission_enabled) | ||
540 | disable_transmission(fgdev); | ||
541 | |||
542 | return res; | ||
543 | } | ||
544 | |||
545 | /* Called in interrupt context. */ | ||
546 | static void handle_cstate_unplug(struct b3dfg_dev *fgdev) | ||
547 | { | ||
548 | /* Disable all interrupts. */ | ||
549 | b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0); | ||
550 | |||
551 | /* Stop transmission. */ | ||
552 | spin_lock(&fgdev->buffer_lock); | ||
553 | fgdev->transmission_enabled = 0; | ||
554 | |||
555 | fgdev->cur_dma_frame_idx = -1; | ||
556 | fgdev->triplet_ready = 0; | ||
557 | if (fgdev->cur_dma_frame_addr) { | ||
558 | pci_unmap_single(fgdev->pdev, fgdev->cur_dma_frame_addr, | ||
559 | fgdev->frame_size, PCI_DMA_FROMDEVICE); | ||
560 | fgdev->cur_dma_frame_addr = 0; | ||
561 | } | ||
562 | dequeue_all_buffers(fgdev); | ||
563 | spin_unlock(&fgdev->buffer_lock); | ||
564 | } | ||
565 | |||
566 | /* Called in interrupt context. */ | ||
567 | static void handle_cstate_change(struct b3dfg_dev *fgdev) | ||
568 | { | ||
569 | u32 cstate = b3dfg_read32(fgdev, B3D_REG_WAND_STS); | ||
570 | unsigned long when; | ||
571 | struct device *dev = &fgdev->pdev->dev; | ||
572 | |||
573 | dev_dbg(dev, "cable state change: %u\n", cstate); | ||
574 | |||
575 | /* | ||
576 | * When the wand is unplugged we reset our state. The hardware will | ||
577 | * have done the same internally. | ||
578 | * | ||
579 | * Note we should never see a cable *plugged* event, as interrupts | ||
580 | * should only be enabled when transmitting, which requires the cable | ||
581 | * to be plugged. If we do see one it probably means the cable has been | ||
582 | * unplugged and re-plugged very rapidly. Possibly because it has a | ||
583 | * broken wire and is momentarily losing contact. | ||
584 | * | ||
585 | * TODO: At the moment if you plug in the cable then enable transmission | ||
586 | * the hardware will raise a couple of spurious interrupts, so | ||
587 | * just ignore them for now. | ||
588 | * | ||
589 | * Once the hardware is fixed we should complain and treat it as an | ||
590 | * unplug. Or at least track how frequently it is happening and do | ||
591 | * so if too many come in. | ||
592 | */ | ||
593 | if (cstate) { | ||
594 | dev_warn(dev, "ignoring unexpected plug event\n"); | ||
595 | return; | ||
596 | } | ||
597 | handle_cstate_unplug(fgdev); | ||
598 | |||
599 | /* | ||
600 | * Record cable state change timestamp & wake anyone waiting | ||
601 | * on a cable state change. Be paranoid about ensuring events | ||
602 | * are not missed if we somehow get two interrupts in a jiffy. | ||
603 | */ | ||
604 | spin_lock(&fgdev->cstate_lock); | ||
605 | when = jiffies_64; | ||
606 | if (when <= fgdev->cstate_tstamp) | ||
607 | when = fgdev->cstate_tstamp + 1; | ||
608 | fgdev->cstate_tstamp = when; | ||
609 | wake_up_interruptible(&fgdev->buffer_waitqueue); | ||
610 | spin_unlock(&fgdev->cstate_lock); | ||
611 | } | ||
612 | |||
613 | /* Called with buffer_lock held. */ | ||
614 | static void transfer_complete(struct b3dfg_dev *fgdev) | ||
615 | { | ||
616 | struct b3dfg_buffer *buf; | ||
617 | struct device *dev = &fgdev->pdev->dev; | ||
618 | |||
619 | pci_unmap_single(fgdev->pdev, fgdev->cur_dma_frame_addr, | ||
620 | fgdev->frame_size, PCI_DMA_FROMDEVICE); | ||
621 | fgdev->cur_dma_frame_addr = 0; | ||
622 | |||
623 | buf = list_entry(fgdev->buffer_queue.next, struct b3dfg_buffer, list); | ||
624 | |||
625 | dev_dbg(dev, "handle frame completion\n"); | ||
626 | if (fgdev->cur_dma_frame_idx == B3DFG_FRAMES_PER_BUFFER - 1) { | ||
627 | |||
628 | /* last frame of that triplet completed */ | ||
629 | dev_dbg(dev, "triplet completed\n"); | ||
630 | buf->state = B3DFG_BUFFER_POPULATED; | ||
631 | list_del_init(&buf->list); | ||
632 | wake_up_interruptible(&fgdev->buffer_waitqueue); | ||
633 | } | ||
634 | } | ||
635 | |||
636 | /* | ||
637 | * Called with buffer_lock held. | ||
638 | * | ||
639 | * Note that idx is the (1-based) *next* frame to be transferred, while | ||
640 | * cur_dma_frame_idx is the (0-based) *last* frame to have been transferred (or | ||
641 | * -1 if none). Thus there should be a difference of 2 between them. | ||
642 | */ | ||
643 | static bool setup_next_frame_transfer(struct b3dfg_dev *fgdev, int idx) | ||
644 | { | ||
645 | struct b3dfg_buffer *buf; | ||
646 | struct device *dev = &fgdev->pdev->dev; | ||
647 | bool need_ack = 1; | ||
648 | |||
649 | dev_dbg(dev, "program DMA transfer for next frame: %d\n", idx); | ||
650 | |||
651 | buf = list_entry(fgdev->buffer_queue.next, struct b3dfg_buffer, list); | ||
652 | if (idx == fgdev->cur_dma_frame_idx + 2) { | ||
653 | if (setup_frame_transfer(fgdev, buf, idx - 1)) | ||
654 | dev_err(dev, "unable to map DMA buffer\n"); | ||
655 | need_ack = 0; | ||
656 | } else { | ||
657 | dev_err(dev, "frame mismatch, got %d, expected %d\n", | ||
658 | idx, fgdev->cur_dma_frame_idx + 2); | ||
659 | |||
660 | /* FIXME: handle dropped triplets here */ | ||
661 | } | ||
662 | |||
663 | return need_ack; | ||
664 | } | ||
665 | |||
666 | static irqreturn_t b3dfg_intr(int irq, void *dev_id) | ||
667 | { | ||
668 | struct b3dfg_dev *fgdev = dev_id; | ||
669 | struct device *dev = &fgdev->pdev->dev; | ||
670 | u32 sts; | ||
671 | u8 dropped; | ||
672 | bool need_ack = 1; | ||
673 | irqreturn_t res = IRQ_HANDLED; | ||
674 | |||
675 | sts = b3dfg_read32(fgdev, B3D_REG_DMA_STS); | ||
676 | if (unlikely(sts == 0)) { | ||
677 | dev_warn(dev, "ignore interrupt, DMA status is 0\n"); | ||
678 | res = IRQ_NONE; | ||
679 | goto out; | ||
680 | } | ||
681 | |||
682 | if (unlikely(!fgdev->transmission_enabled)) { | ||
683 | dev_warn(dev, "ignore interrupt, TX disabled\n"); | ||
684 | res = IRQ_HANDLED; | ||
685 | goto out; | ||
686 | } | ||
687 | |||
688 | /* Handle dropped frames, as reported by the hardware. */ | ||
689 | dropped = (sts >> 8) & 0xff; | ||
690 | dev_dbg(dev, "intr: DMA_STS=%08x (drop=%d comp=%d next=%d)\n", | ||
691 | sts, dropped, !!(sts & 0x4), sts & 0x3); | ||
692 | if (unlikely(dropped > 0)) { | ||
693 | spin_lock(&fgdev->triplets_dropped_lock); | ||
694 | fgdev->triplets_dropped += dropped; | ||
695 | spin_unlock(&fgdev->triplets_dropped_lock); | ||
696 | } | ||
697 | |||
698 | /* Handle a cable state change (i.e. the wand being unplugged). */ | ||
699 | if (sts & 0x08) { | ||
700 | handle_cstate_change(fgdev); | ||
701 | goto out; | ||
702 | } | ||
703 | |||
704 | spin_lock(&fgdev->buffer_lock); | ||
705 | if (unlikely(list_empty(&fgdev->buffer_queue))) { | ||
706 | |||
707 | /* FIXME need more sanity checking here */ | ||
708 | dev_info(dev, "buffer not ready for next transfer\n"); | ||
709 | fgdev->triplet_ready = 1; | ||
710 | goto out_unlock; | ||
711 | } | ||
712 | |||
713 | /* Has a frame transfer been completed? */ | ||
714 | if (sts & 0x4) { | ||
715 | u32 dma_status = b3dfg_read32(fgdev, B3D_REG_EC220_DMA_STS); | ||
716 | |||
717 | /* Check for DMA errors reported by the hardware. */ | ||
718 | if (unlikely(dma_status & 0x1)) { | ||
719 | dev_err(dev, "EC220 error: %08x\n", dma_status); | ||
720 | |||
721 | /* FIXME flesh out error handling */ | ||
722 | goto out_unlock; | ||
723 | } | ||
724 | |||
725 | /* Sanity check, we should have a frame index at this point. */ | ||
726 | if (unlikely(fgdev->cur_dma_frame_idx == -1)) { | ||
727 | dev_err(dev, "completed but no last idx?\n"); | ||
728 | |||
729 | /* FIXME flesh out error handling */ | ||
730 | goto out_unlock; | ||
731 | } | ||
732 | |||
733 | transfer_complete(fgdev); | ||
734 | } | ||
735 | |||
736 | /* Is there another frame transfer pending? */ | ||
737 | if (sts & 0x3) | ||
738 | need_ack = setup_next_frame_transfer(fgdev, sts & 0x3); | ||
739 | else | ||
740 | fgdev->cur_dma_frame_idx = -1; | ||
741 | |||
742 | out_unlock: | ||
743 | spin_unlock(&fgdev->buffer_lock); | ||
744 | out: | ||
745 | if (need_ack) { | ||
746 | dev_dbg(dev, "acknowledging interrupt\n"); | ||
747 | b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0x0b); | ||
748 | } | ||
749 | return res; | ||
750 | } | ||
751 | |||
752 | static int b3dfg_open(struct inode *inode, struct file *filp) | ||
753 | { | ||
754 | struct b3dfg_dev *fgdev = | ||
755 | container_of(inode->i_cdev, struct b3dfg_dev, chardev); | ||
756 | |||
757 | dev_dbg(&fgdev->pdev->dev, "open\n"); | ||
758 | filp->private_data = fgdev; | ||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | static int b3dfg_release(struct inode *inode, struct file *filp) | ||
763 | { | ||
764 | struct b3dfg_dev *fgdev = filp->private_data; | ||
765 | dev_dbg(&fgdev->pdev->dev, "release\n"); | ||
766 | disable_transmission(fgdev); | ||
767 | return 0; | ||
768 | } | ||
769 | |||
770 | static long b3dfg_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | ||
771 | { | ||
772 | struct b3dfg_dev *fgdev = filp->private_data; | ||
773 | |||
774 | switch (cmd) { | ||
775 | case B3DFG_IOCGFRMSZ: | ||
776 | return __put_user(fgdev->frame_size, (int __user *) arg); | ||
777 | case B3DFG_IOCGWANDSTAT: | ||
778 | return get_wand_status(fgdev, (int __user *) arg); | ||
779 | case B3DFG_IOCTTRANS: | ||
780 | return set_transmission(fgdev, (int) arg); | ||
781 | case B3DFG_IOCTQUEUEBUF: | ||
782 | return queue_buffer(fgdev, (int) arg); | ||
783 | case B3DFG_IOCTPOLLBUF: | ||
784 | return poll_buffer(fgdev, (void __user *) arg); | ||
785 | case B3DFG_IOCTWAITBUF: | ||
786 | return wait_buffer(fgdev, (void __user *) arg); | ||
787 | default: | ||
788 | dev_dbg(&fgdev->pdev->dev, "unrecognised ioctl %x\n", cmd); | ||
789 | return -EINVAL; | ||
790 | } | ||
791 | } | ||
792 | |||
793 | static unsigned int b3dfg_poll(struct file *filp, poll_table *poll_table) | ||
794 | { | ||
795 | struct b3dfg_dev *fgdev = filp->private_data; | ||
796 | unsigned long flags, when; | ||
797 | int i; | ||
798 | int r = 0; | ||
799 | |||
800 | when = get_cstate_change(fgdev); | ||
801 | poll_wait(filp, &fgdev->buffer_waitqueue, poll_table); | ||
802 | |||
803 | spin_lock_irqsave(&fgdev->buffer_lock, flags); | ||
804 | for (i = 0; i < b3dfg_nbuf; i++) { | ||
805 | if (fgdev->buffers[i].state == B3DFG_BUFFER_POPULATED) { | ||
806 | r = POLLIN | POLLRDNORM; | ||
807 | break; | ||
808 | } | ||
809 | } | ||
810 | spin_unlock_irqrestore(&fgdev->buffer_lock, flags); | ||
811 | |||
812 | /* TODO: Confirm this is how we want to communicate the change. */ | ||
813 | if (!fgdev->transmission_enabled || when != get_cstate_change(fgdev)) | ||
814 | r = POLLERR; | ||
815 | |||
816 | return r; | ||
817 | } | ||
818 | |||
819 | static int b3dfg_mmap(struct file *filp, struct vm_area_struct *vma) | ||
820 | { | ||
821 | struct b3dfg_dev *fgdev = filp->private_data; | ||
822 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | ||
823 | unsigned long vsize = vma->vm_end - vma->vm_start; | ||
824 | unsigned long bufdatalen = b3dfg_nbuf * fgdev->frame_size * 3; | ||
825 | unsigned long psize = bufdatalen - offset; | ||
826 | int r = 0; | ||
827 | |||
828 | if (vsize <= psize) { | ||
829 | vma->vm_flags |= VM_IO | VM_RESERVED | VM_CAN_NONLINEAR | | ||
830 | VM_PFNMAP; | ||
831 | vma->vm_ops = &b3dfg_vm_ops; | ||
832 | } else { | ||
833 | r = -EINVAL; | ||
834 | } | ||
835 | |||
836 | return r; | ||
837 | } | ||
838 | |||
839 | static struct file_operations b3dfg_fops = { | ||
840 | .owner = THIS_MODULE, | ||
841 | .open = b3dfg_open, | ||
842 | .release = b3dfg_release, | ||
843 | .unlocked_ioctl = b3dfg_ioctl, | ||
844 | .poll = b3dfg_poll, | ||
845 | .mmap = b3dfg_mmap, | ||
846 | }; | ||
847 | |||
848 | static void free_all_frame_buffers(struct b3dfg_dev *fgdev) | ||
849 | { | ||
850 | int i, j; | ||
851 | for (i = 0; i < b3dfg_nbuf; i++) | ||
852 | for (j = 0; j < B3DFG_FRAMES_PER_BUFFER; j++) | ||
853 | kfree(fgdev->buffers[i].frame[j]); | ||
854 | kfree(fgdev->buffers); | ||
855 | } | ||
856 | |||
857 | /* initialize device and any data structures. called before any interrupts | ||
858 | * are enabled. */ | ||
859 | static int b3dfg_init_dev(struct b3dfg_dev *fgdev) | ||
860 | { | ||
861 | int i, j; | ||
862 | u32 frm_size = b3dfg_read32(fgdev, B3D_REG_FRM_SIZE); | ||
863 | |||
864 | /* Disable interrupts. In abnormal circumstances (e.g. after a crash) | ||
865 | * the board may still be transmitting from the previous session. If we | ||
866 | * ensure that interrupts are disabled before we later enable them, we | ||
867 | * are sure to capture a triplet from the start, rather than starting | ||
868 | * from frame 2 or 3. Disabling interrupts causes the FG to throw away | ||
869 | * all buffered data and stop buffering more until interrupts are | ||
870 | * enabled again. | ||
871 | */ | ||
872 | b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0); | ||
873 | |||
874 | fgdev->frame_size = frm_size * 4096; | ||
875 | fgdev->buffers = kzalloc(sizeof(struct b3dfg_buffer) * b3dfg_nbuf, | ||
876 | GFP_KERNEL); | ||
877 | if (!fgdev->buffers) | ||
878 | goto err_no_buf; | ||
879 | for (i = 0; i < b3dfg_nbuf; i++) { | ||
880 | struct b3dfg_buffer *buf = &fgdev->buffers[i]; | ||
881 | for (j = 0; j < B3DFG_FRAMES_PER_BUFFER; j++) { | ||
882 | buf->frame[j] = kmalloc(fgdev->frame_size, GFP_KERNEL); | ||
883 | if (!buf->frame[j]) | ||
884 | goto err_no_mem; | ||
885 | } | ||
886 | INIT_LIST_HEAD(&buf->list); | ||
887 | } | ||
888 | |||
889 | INIT_LIST_HEAD(&fgdev->buffer_queue); | ||
890 | init_waitqueue_head(&fgdev->buffer_waitqueue); | ||
891 | spin_lock_init(&fgdev->buffer_lock); | ||
892 | spin_lock_init(&fgdev->cstate_lock); | ||
893 | spin_lock_init(&fgdev->triplets_dropped_lock); | ||
894 | return 0; | ||
895 | |||
896 | err_no_mem: | ||
897 | free_all_frame_buffers(fgdev); | ||
898 | err_no_buf: | ||
899 | return -ENOMEM; | ||
900 | } | ||
901 | |||
902 | /* find next free minor number, returns -1 if none are availabile */ | ||
903 | static int get_free_minor(void) | ||
904 | { | ||
905 | int i; | ||
906 | for (i = 0; i < B3DFG_MAX_DEVS; i++) { | ||
907 | if (b3dfg_devices[i] == 0) | ||
908 | return i; | ||
909 | } | ||
910 | return -1; | ||
911 | } | ||
912 | |||
913 | static int __devinit b3dfg_probe(struct pci_dev *pdev, | ||
914 | const struct pci_device_id *id) | ||
915 | { | ||
916 | struct b3dfg_dev *fgdev = kzalloc(sizeof(*fgdev), GFP_KERNEL); | ||
917 | int r = 0; | ||
918 | int minor = get_free_minor(); | ||
919 | dev_t devno = MKDEV(MAJOR(b3dfg_devt), minor); | ||
920 | unsigned long res_len; | ||
921 | resource_size_t res_base; | ||
922 | |||
923 | if (fgdev == NULL) | ||
924 | return -ENOMEM; | ||
925 | |||
926 | if (minor < 0) { | ||
927 | dev_err(&pdev->dev, "too many devices found!\n"); | ||
928 | r = -EIO; | ||
929 | goto err_free; | ||
930 | } | ||
931 | |||
932 | b3dfg_devices[minor] = 1; | ||
933 | dev_info(&pdev->dev, "probe device with IRQ %d\n", pdev->irq); | ||
934 | |||
935 | cdev_init(&fgdev->chardev, &b3dfg_fops); | ||
936 | fgdev->chardev.owner = THIS_MODULE; | ||
937 | |||
938 | r = cdev_add(&fgdev->chardev, devno, 1); | ||
939 | if (r) { | ||
940 | dev_err(&pdev->dev, "cannot add char device\n"); | ||
941 | goto err_release_minor; | ||
942 | } | ||
943 | |||
944 | fgdev->dev = device_create( | ||
945 | b3dfg_class, | ||
946 | &pdev->dev, | ||
947 | devno, | ||
948 | dev_get_drvdata(&pdev->dev), | ||
949 | DRIVER_NAME "%d", minor); | ||
950 | |||
951 | if (IS_ERR(fgdev->dev)) { | ||
952 | dev_err(&pdev->dev, "cannot create device\n"); | ||
953 | r = PTR_ERR(fgdev->dev); | ||
954 | goto err_del_cdev; | ||
955 | } | ||
956 | |||
957 | r = pci_enable_device(pdev); | ||
958 | if (r) { | ||
959 | dev_err(&pdev->dev, "cannot enable PCI device\n"); | ||
960 | goto err_dev_unreg; | ||
961 | } | ||
962 | |||
963 | res_len = pci_resource_len(pdev, B3DFG_BAR_REGS); | ||
964 | if (res_len != B3DFG_REGS_LENGTH) { | ||
965 | dev_err(&pdev->dev, "invalid register resource size\n"); | ||
966 | r = -EIO; | ||
967 | goto err_disable; | ||
968 | } | ||
969 | |||
970 | if (pci_resource_flags(pdev, B3DFG_BAR_REGS) | ||
971 | != (IORESOURCE_MEM | IORESOURCE_SIZEALIGN)) { | ||
972 | dev_err(&pdev->dev, "invalid resource flags\n"); | ||
973 | r = -EIO; | ||
974 | goto err_disable; | ||
975 | } | ||
976 | r = pci_request_regions(pdev, DRIVER_NAME); | ||
977 | if (r) { | ||
978 | dev_err(&pdev->dev, "cannot obtain PCI resources\n"); | ||
979 | goto err_disable; | ||
980 | } | ||
981 | |||
982 | pci_set_master(pdev); | ||
983 | |||
984 | r = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | ||
985 | if (r) { | ||
986 | dev_err(&pdev->dev, "no usable DMA configuration\n"); | ||
987 | goto err_free_res; | ||
988 | } | ||
989 | |||
990 | res_base = pci_resource_start(pdev, B3DFG_BAR_REGS); | ||
991 | fgdev->regs = ioremap_nocache(res_base, res_len); | ||
992 | if (!fgdev->regs) { | ||
993 | dev_err(&pdev->dev, "regs ioremap failed\n"); | ||
994 | r = -EIO; | ||
995 | goto err_free_res; | ||
996 | } | ||
997 | |||
998 | fgdev->pdev = pdev; | ||
999 | pci_set_drvdata(pdev, fgdev); | ||
1000 | r = b3dfg_init_dev(fgdev); | ||
1001 | if (r < 0) { | ||
1002 | dev_err(&pdev->dev, "failed to initalize device\n"); | ||
1003 | goto err_unmap; | ||
1004 | } | ||
1005 | |||
1006 | r = request_irq(pdev->irq, b3dfg_intr, IRQF_SHARED, DRIVER_NAME, fgdev); | ||
1007 | if (r) { | ||
1008 | dev_err(&pdev->dev, "couldn't request irq %d\n", pdev->irq); | ||
1009 | goto err_free_bufs; | ||
1010 | } | ||
1011 | |||
1012 | return 0; | ||
1013 | |||
1014 | err_free_bufs: | ||
1015 | free_all_frame_buffers(fgdev); | ||
1016 | err_unmap: | ||
1017 | iounmap(fgdev->regs); | ||
1018 | err_free_res: | ||
1019 | pci_release_regions(pdev); | ||
1020 | err_disable: | ||
1021 | pci_disable_device(pdev); | ||
1022 | err_dev_unreg: | ||
1023 | device_destroy(b3dfg_class, devno); | ||
1024 | err_del_cdev: | ||
1025 | cdev_del(&fgdev->chardev); | ||
1026 | err_release_minor: | ||
1027 | b3dfg_devices[minor] = 0; | ||
1028 | err_free: | ||
1029 | kfree(fgdev); | ||
1030 | return r; | ||
1031 | } | ||
1032 | |||
1033 | static void __devexit b3dfg_remove(struct pci_dev *pdev) | ||
1034 | { | ||
1035 | struct b3dfg_dev *fgdev = pci_get_drvdata(pdev); | ||
1036 | unsigned int minor = MINOR(fgdev->chardev.dev); | ||
1037 | |||
1038 | dev_dbg(&pdev->dev, "remove\n"); | ||
1039 | |||
1040 | free_irq(pdev->irq, fgdev); | ||
1041 | iounmap(fgdev->regs); | ||
1042 | pci_release_regions(pdev); | ||
1043 | pci_disable_device(pdev); | ||
1044 | device_destroy(b3dfg_class, MKDEV(MAJOR(b3dfg_devt), minor)); | ||
1045 | cdev_del(&fgdev->chardev); | ||
1046 | free_all_frame_buffers(fgdev); | ||
1047 | kfree(fgdev); | ||
1048 | b3dfg_devices[minor] = 0; | ||
1049 | } | ||
1050 | |||
1051 | static struct pci_driver b3dfg_driver = { | ||
1052 | .name = DRIVER_NAME, | ||
1053 | .id_table = b3dfg_ids, | ||
1054 | .probe = b3dfg_probe, | ||
1055 | .remove = __devexit_p(b3dfg_remove), | ||
1056 | }; | ||
1057 | |||
1058 | static int __init b3dfg_module_init(void) | ||
1059 | { | ||
1060 | int r; | ||
1061 | |||
1062 | if (b3dfg_nbuf < 2) { | ||
1063 | printk(KERN_ERR DRIVER_NAME | ||
1064 | ": buffer_count is out of range (must be >= 2)"); | ||
1065 | return -EINVAL; | ||
1066 | } | ||
1067 | |||
1068 | printk(KERN_INFO DRIVER_NAME ": loaded\n"); | ||
1069 | |||
1070 | b3dfg_class = class_create(THIS_MODULE, DRIVER_NAME); | ||
1071 | if (IS_ERR(b3dfg_class)) | ||
1072 | return PTR_ERR(b3dfg_class); | ||
1073 | |||
1074 | r = alloc_chrdev_region(&b3dfg_devt, 0, B3DFG_MAX_DEVS, DRIVER_NAME); | ||
1075 | if (r) | ||
1076 | goto err1; | ||
1077 | |||
1078 | r = pci_register_driver(&b3dfg_driver); | ||
1079 | if (r) | ||
1080 | goto err2; | ||
1081 | |||
1082 | return r; | ||
1083 | |||
1084 | err2: | ||
1085 | unregister_chrdev_region(b3dfg_devt, B3DFG_MAX_DEVS); | ||
1086 | err1: | ||
1087 | class_destroy(b3dfg_class); | ||
1088 | return r; | ||
1089 | } | ||
1090 | |||
1091 | static void __exit b3dfg_module_exit(void) | ||
1092 | { | ||
1093 | printk(KERN_INFO DRIVER_NAME ": unloaded\n"); | ||
1094 | pci_unregister_driver(&b3dfg_driver); | ||
1095 | unregister_chrdev_region(b3dfg_devt, B3DFG_MAX_DEVS); | ||
1096 | class_destroy(b3dfg_class); | ||
1097 | } | ||
1098 | |||
1099 | module_init(b3dfg_module_init); | ||
1100 | module_exit(b3dfg_module_exit); | ||
diff --git a/drivers/staging/batman-adv/Kconfig b/drivers/staging/batman-adv/Kconfig index 1d74dabf9511..1e7e0a8dbc8b 100644 --- a/drivers/staging/batman-adv/Kconfig +++ b/drivers/staging/batman-adv/Kconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | config BATMAN_ADV | 5 | config BATMAN_ADV |
6 | tristate "B.A.T.M.A.N. Advanced Meshing Protocol" | 6 | tristate "B.A.T.M.A.N. Advanced Meshing Protocol" |
7 | depends on PROC_FS && PACKET | 7 | depends on PROC_FS && NET |
8 | default n | 8 | default n |
9 | ---help--- | 9 | ---help--- |
10 | 10 | ||
@@ -14,10 +14,10 @@ config BATMAN_ADV | |||
14 | http://www.open-mesh.org/ for more information and user space | 14 | http://www.open-mesh.org/ for more information and user space |
15 | tools. | 15 | tools. |
16 | 16 | ||
17 | config BATMAN_DEBUG | 17 | config BATMAN_ADV_DEBUG |
18 | bool "B.A.T.M.A.N. debugging" | 18 | bool "B.A.T.M.A.N. debugging" |
19 | depends on BATMAN_ADV != n | 19 | depends on BATMAN_ADV != n |
20 | help | 20 | ---help--- |
21 | 21 | ||
22 | This is an option for use by developers; most people should | 22 | This is an option for use by developers; most people should |
23 | say N here. This enables compilation of support for | 23 | say N here. This enables compilation of support for |
diff --git a/drivers/staging/batman-adv/Makefile b/drivers/staging/batman-adv/Makefile index 02da87134fce..42b4e6370263 100644 --- a/drivers/staging/batman-adv/Makefile +++ b/drivers/staging/batman-adv/Makefile | |||
@@ -19,4 +19,4 @@ | |||
19 | # | 19 | # |
20 | 20 | ||
21 | obj-m += batman-adv.o | 21 | obj-m += batman-adv.o |
22 | batman-adv-objs := main.o proc.o send.o routing.o soft-interface.o device.o translation-table.o bitarray.o hash.o ring_buffer.o vis.o hard-interface.o aggregation.o log.o | 22 | batman-adv-objs := main.o proc.o send.o routing.o soft-interface.o device.o translation-table.o bitarray.o hash.o ring_buffer.o vis.o hard-interface.o aggregation.o originator.o |
diff --git a/drivers/staging/batman-adv/README b/drivers/staging/batman-adv/README index 3aaf393ebaa7..7d666ad04359 100644 --- a/drivers/staging/batman-adv/README +++ b/drivers/staging/batman-adv/README | |||
@@ -1,4 +1,4 @@ | |||
1 | [state: 07-11-2009] | 1 | [state: 06-01-2010] |
2 | 2 | ||
3 | BATMAN-ADV | 3 | BATMAN-ADV |
4 | ---------- | 4 | ---------- |
@@ -15,19 +15,6 @@ above B.A.T.M.A.N. Advanced, prominent examples are: IPv4, IPv6, DHCP, IPX. | |||
15 | This is batman-advanced implemented as Linux kernel driver. It does not depend | 15 | This is batman-advanced implemented as Linux kernel driver. It does not depend |
16 | on any network (other) driver, and can be used on wifi as well as ethernet, | 16 | on any network (other) driver, and can be used on wifi as well as ethernet, |
17 | vpn, etc ... (anything with ethernet-style layer 2). | 17 | vpn, etc ... (anything with ethernet-style layer 2). |
18 | It compiles against and should work with Linux 2.6.20 - 2.6.31. Supporting older | ||
19 | versions is not planned, but it's probably easy to backport it. If you work on a | ||
20 | backport, feel free to contact us. :-) | ||
21 | |||
22 | COMPILE | ||
23 | ------- | ||
24 | To compile against your currently installed kernel, just type: | ||
25 | |||
26 | # make | ||
27 | |||
28 | if you want to compile against some other kernel, use: | ||
29 | |||
30 | # make KERNELPATH=/path/to/kernel | ||
31 | 18 | ||
32 | USAGE | 19 | USAGE |
33 | ----- | 20 | ----- |
@@ -73,16 +60,9 @@ When configured as server, you can get a topology snapshot of your mesh: | |||
73 | 60 | ||
74 | # cat /proc/net/batman-adv/vis | 61 | # cat /proc/net/batman-adv/vis |
75 | 62 | ||
76 | This output format is a graphviz formatted text file which can be | 63 | The output is in a generic raw format. Use the batctl tool (See below) |
77 | processed with graphviz-tools like dot. | 64 | to convert this to other formats more suitable for graphing, eg |
78 | The labels are similar/compatible to the ETX metric, 1.0 means perfect | 65 | graphviz dot, or JSON data-interchange format. |
79 | connection (100%), 2.0 means 50%, 3.0 means 33% and so on. | ||
80 | |||
81 | Alternatively, a JSON output format is available. The format can be set | ||
82 | using by writing either "dot_draw" or "json" into the vis_format file. | ||
83 | "dot_draw" is selected by default. | ||
84 | |||
85 | echo "json" > /proc/net/batman-adv/vis_format | ||
86 | 66 | ||
87 | In very mobile scenarios, you might want to adjust the originator | 67 | In very mobile scenarios, you might want to adjust the originator |
88 | interval to a lower value. This will make the mesh more responsive to | 68 | interval to a lower value. This will make the mesh more responsive to |
@@ -96,15 +76,59 @@ To deactivate batman, do: | |||
96 | 76 | ||
97 | # echo "" > /proc/net/batman-adv/interfaces | 77 | # echo "" > /proc/net/batman-adv/interfaces |
98 | 78 | ||
79 | LOGGING/DEBUGGING | ||
80 | ----------------- | ||
81 | |||
82 | All error messages, warnings and information messages are sent to the | ||
83 | kernel log. Depending on your operating system distribution this can be | ||
84 | read in one of a number of ways. Try using the commands: dmesg, | ||
85 | logread, or looking in the files /var/log/kern.log or | ||
86 | /var/log/syslog. All batman-adv messages are prefixed with | ||
87 | "batman-adv:" So to see just these messages try | ||
88 | |||
89 | dmesg | grep batman-adv | ||
90 | |||
91 | When investigating problems with your mesh network it is sometimes | ||
92 | necessary to see more detail debug messages. This must be enabled when | ||
93 | compiling the batman-adv module. Use "make menuconfig" and enable the | ||
94 | option "B.A.T.M.A.N. debugging". | ||
95 | |||
96 | The additional debug output is by default disabled. It can be enabled | ||
97 | either at kernel module load time or during run time. To enable debug | ||
98 | output at module load time, add the module parameter debug=<value>. | ||
99 | <value> can take one of four values. | ||
100 | |||
101 | 0 - All debug output disabled | ||
102 | 1 - Enable messages related to routing / flooding / broadcasting | ||
103 | 2 - Enable route or hna added / changed / deleted | ||
104 | 3 - Enable all messages | ||
105 | |||
106 | e.g. | ||
107 | |||
108 | modprobe batman-adv debug=2 | ||
109 | |||
110 | will load the module and enable debug messages for when routes or HNAs | ||
111 | change. | ||
112 | |||
113 | The debug output can also be changed at runtime using the file | ||
114 | /sys/module/batman-adv/parameters/debug. e.g. | ||
115 | |||
116 | echo 2 > /sys/module/batman-adv/parameters/debug | ||
117 | |||
118 | enables debug messages for when routes or HNAs | ||
119 | |||
120 | The debug output is sent to the kernel logs. So try dmesg, logread etc | ||
121 | to see the debug messages. | ||
122 | |||
99 | BATCTL | 123 | BATCTL |
100 | ------ | 124 | ------ |
101 | 125 | ||
102 | B.A.T.M.A.N. advanced operates on layer 2 and thus all hosts partici- | 126 | B.A.T.M.A.N. advanced operates on layer 2 and thus all hosts |
103 | pating in the virtual switch are completely transparent for all proto- | 127 | participating in the virtual switch are completely transparent for all |
104 | cols above layer 2. Therefore the common diagnosis tools do not work as | 128 | protocols above layer 2. Therefore the common diagnosis tools do not |
105 | expected. To overcome these problems batctl was created. At the moment | 129 | work as expected. To overcome these problems batctl was created. At |
106 | the batctl contains ping, traceroute, tcpdump and interfaces to the | 130 | the moment the batctl contains ping, traceroute, tcpdump and |
107 | kernel module settings. | 131 | interfaces to the kernel module settings. |
108 | 132 | ||
109 | For more information, please see the manpage (man batctl). | 133 | For more information, please see the manpage (man batctl). |
110 | 134 | ||
diff --git a/drivers/staging/batman-adv/TODO b/drivers/staging/batman-adv/TODO index ea6dcf94d661..2f15136b18e7 100644 --- a/drivers/staging/batman-adv/TODO +++ b/drivers/staging/batman-adv/TODO | |||
@@ -17,30 +17,6 @@ | |||
17 | -> transtable_global (read-only) [outputs the global translation table] | 17 | -> transtable_global (read-only) [outputs the global translation table] |
18 | -> transtable_local (read-only) [outputs the local translation table] | 18 | -> transtable_local (read-only) [outputs the local translation table] |
19 | 19 | ||
20 | => vis "raw" data output | ||
21 | * the raw format shall replace dot draw / json to offer a neutral that can | ||
22 | * be converted | ||
23 | * the format (comma seperated entries): | ||
24 | -> "mac" -> mac address of an originator (each line begins with it) | ||
25 | -> "TQ mac value" -> src mac's link quality towards mac address | ||
26 | -> "HNA mac" -> HNA announced by source mac | ||
27 | -> "PRIMARY" -> this is a primary interface | ||
28 | -> "SEC mac" -> secondary mac address of source (requires preceeding | ||
29 | -> PRIMARY) | ||
30 | |||
31 | => logging | ||
32 | * the log level LOG_TYPE_CRIT, LOG_TYPE_WARN & LOG_TYPE_NOTICE will be | ||
33 | * unified to use printk | ||
34 | * LOG_TYPE_BATMAN & LOG_TYPE_ROUTES will also use printk but only after the | ||
35 | * internal debug level has been raised | ||
36 | * the internal debug level can be modified using a module parameter (debug) | ||
37 | * or at run time via /sys/module/batman-adv/parameters/debug | ||
38 | * make use of printk %pM support instead of converting mac addresses | ||
39 | * manually | ||
40 | |||
41 | => strip out all backward compatibility support to older kernels | ||
42 | (only found in compat.h) | ||
43 | |||
44 | => fix checkpatch.pl errors | 20 | => fix checkpatch.pl errors |
45 | 21 | ||
46 | Please send all patches to: | 22 | Please send all patches to: |
diff --git a/drivers/staging/batman-adv/aggregation.c b/drivers/staging/batman-adv/aggregation.c index 9c6e681f6fb6..7917322a7e2a 100644 --- a/drivers/staging/batman-adv/aggregation.c +++ b/drivers/staging/batman-adv/aggregation.c | |||
@@ -96,6 +96,7 @@ static void new_aggregated_packet(unsigned char *packet_buff, | |||
96 | int own_packet) | 96 | int own_packet) |
97 | { | 97 | { |
98 | struct forw_packet *forw_packet_aggr; | 98 | struct forw_packet *forw_packet_aggr; |
99 | unsigned long flags; | ||
99 | 100 | ||
100 | forw_packet_aggr = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC); | 101 | forw_packet_aggr = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC); |
101 | if (!forw_packet_aggr) | 102 | if (!forw_packet_aggr) |
@@ -115,6 +116,7 @@ static void new_aggregated_packet(unsigned char *packet_buff, | |||
115 | packet_buff, | 116 | packet_buff, |
116 | forw_packet_aggr->packet_len); | 117 | forw_packet_aggr->packet_len); |
117 | 118 | ||
119 | forw_packet_aggr->skb = NULL; | ||
118 | forw_packet_aggr->own = own_packet; | 120 | forw_packet_aggr->own = own_packet; |
119 | forw_packet_aggr->if_incoming = if_incoming; | 121 | forw_packet_aggr->if_incoming = if_incoming; |
120 | forw_packet_aggr->num_packets = 0; | 122 | forw_packet_aggr->num_packets = 0; |
@@ -126,9 +128,9 @@ static void new_aggregated_packet(unsigned char *packet_buff, | |||
126 | forw_packet_aggr->direct_link_flags |= 1; | 128 | forw_packet_aggr->direct_link_flags |= 1; |
127 | 129 | ||
128 | /* add new packet to packet list */ | 130 | /* add new packet to packet list */ |
129 | spin_lock(&forw_bat_list_lock); | 131 | spin_lock_irqsave(&forw_bat_list_lock, flags); |
130 | hlist_add_head(&forw_packet_aggr->list, &forw_bat_list); | 132 | hlist_add_head(&forw_packet_aggr->list, &forw_bat_list); |
131 | spin_unlock(&forw_bat_list_lock); | 133 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
132 | 134 | ||
133 | /* start timer for this packet */ | 135 | /* start timer for this packet */ |
134 | INIT_DELAYED_WORK(&forw_packet_aggr->delayed_work, | 136 | INIT_DELAYED_WORK(&forw_packet_aggr->delayed_work, |
@@ -168,9 +170,10 @@ void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len, | |||
168 | struct batman_packet *batman_packet = | 170 | struct batman_packet *batman_packet = |
169 | (struct batman_packet *)packet_buff; | 171 | (struct batman_packet *)packet_buff; |
170 | bool direct_link = batman_packet->flags & DIRECTLINK ? 1 : 0; | 172 | bool direct_link = batman_packet->flags & DIRECTLINK ? 1 : 0; |
173 | unsigned long flags; | ||
171 | 174 | ||
172 | /* find position for the packet in the forward queue */ | 175 | /* find position for the packet in the forward queue */ |
173 | spin_lock(&forw_bat_list_lock); | 176 | spin_lock_irqsave(&forw_bat_list_lock, flags); |
174 | /* own packets are not to be aggregated */ | 177 | /* own packets are not to be aggregated */ |
175 | if ((atomic_read(&aggregation_enabled)) && (!own_packet)) { | 178 | if ((atomic_read(&aggregation_enabled)) && (!own_packet)) { |
176 | hlist_for_each_entry(forw_packet_pos, tmp_node, &forw_bat_list, | 179 | hlist_for_each_entry(forw_packet_pos, tmp_node, &forw_bat_list, |
@@ -191,7 +194,7 @@ void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len, | |||
191 | * suitable aggregation packet found */ | 194 | * suitable aggregation packet found */ |
192 | if (forw_packet_aggr == NULL) { | 195 | if (forw_packet_aggr == NULL) { |
193 | /* the following section can run without the lock */ | 196 | /* the following section can run without the lock */ |
194 | spin_unlock(&forw_bat_list_lock); | 197 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
195 | new_aggregated_packet(packet_buff, packet_len, | 198 | new_aggregated_packet(packet_buff, packet_len, |
196 | send_time, direct_link, | 199 | send_time, direct_link, |
197 | if_incoming, own_packet); | 200 | if_incoming, own_packet); |
@@ -199,7 +202,7 @@ void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len, | |||
199 | aggregate(forw_packet_aggr, | 202 | aggregate(forw_packet_aggr, |
200 | packet_buff, packet_len, | 203 | packet_buff, packet_len, |
201 | direct_link); | 204 | direct_link); |
202 | spin_unlock(&forw_bat_list_lock); | 205 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
203 | } | 206 | } |
204 | } | 207 | } |
205 | 208 | ||
diff --git a/drivers/staging/batman-adv/bitarray.c b/drivers/staging/batman-adv/bitarray.c index 3c67f5f42b2b..212eef93afe4 100644 --- a/drivers/staging/batman-adv/bitarray.c +++ b/drivers/staging/batman-adv/bitarray.c | |||
@@ -21,7 +21,6 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "bitarray.h" | 23 | #include "bitarray.h" |
24 | #include "log.h" | ||
25 | 24 | ||
26 | /* returns true if the corresponding bit in the given seq_bits indicates true | 25 | /* returns true if the corresponding bit in the given seq_bits indicates true |
27 | * and curr_seqno is within range of last_seqno */ | 26 | * and curr_seqno is within range of last_seqno */ |
@@ -80,8 +79,8 @@ void bit_shift(TYPE_OF_WORD *seq_bits, int32_t n) | |||
80 | * from. | 79 | * from. |
81 | * | 80 | * |
82 | * left is high, right is low: FEDC BA98 7654 3210 | 81 | * left is high, right is low: FEDC BA98 7654 3210 |
83 | * ^^ ^^ | 82 | * ^^ ^^ |
84 | * vvvv | 83 | * vvvv |
85 | * ^^^^ = from, vvvvv =to, we'd have word_num==1 and | 84 | * ^^^^ = from, vvvvv =to, we'd have word_num==1 and |
86 | * word_offset==WORD_BIT_SIZE/2 ????? in this example. | 85 | * word_offset==WORD_BIT_SIZE/2 ????? in this example. |
87 | * (=24 bits) | 86 | * (=24 bits) |
@@ -133,13 +132,13 @@ char bit_get_packet(TYPE_OF_WORD *seq_bits, int16_t seq_num_diff, | |||
133 | (seq_num_diff < -TQ_LOCAL_WINDOW_SIZE)) { | 132 | (seq_num_diff < -TQ_LOCAL_WINDOW_SIZE)) { |
134 | 133 | ||
135 | if (seq_num_diff > TQ_LOCAL_WINDOW_SIZE) | 134 | if (seq_num_diff > TQ_LOCAL_WINDOW_SIZE) |
136 | debug_log(LOG_TYPE_BATMAN, | 135 | bat_dbg(DBG_BATMAN, |
137 | "We missed a lot of packets (%i) !\n", | 136 | "We missed a lot of packets (%i) !\n", |
138 | seq_num_diff-1); | 137 | seq_num_diff-1); |
139 | 138 | ||
140 | if (-seq_num_diff > TQ_LOCAL_WINDOW_SIZE) | 139 | if (-seq_num_diff > TQ_LOCAL_WINDOW_SIZE) |
141 | debug_log(LOG_TYPE_BATMAN, | 140 | bat_dbg(DBG_BATMAN, |
142 | "Other host probably restarted !\n"); | 141 | "Other host probably restarted !\n"); |
143 | 142 | ||
144 | for (i = 0; i < NUM_WORDS; i++) | 143 | for (i = 0; i < NUM_WORDS; i++) |
145 | seq_bits[i] = 0; | 144 | seq_bits[i] = 0; |
diff --git a/drivers/staging/batman-adv/compat.h b/drivers/staging/batman-adv/compat.h deleted file mode 100644 index f4e0a4564ba7..000000000000 --- a/drivers/staging/batman-adv/compat.h +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: | ||
3 | * | ||
4 | * Marek Lindner, Simon Wunderlich | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of version 2 of the GNU General Public | ||
8 | * License as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
18 | * 02110-1301, USA | ||
19 | * | ||
20 | * | ||
21 | * This file contains macros for maintaining compatibility with older versions | ||
22 | * of the Linux kernel. | ||
23 | */ | ||
24 | |||
25 | #include <linux/version.h> /* LINUX_VERSION_CODE */ | ||
26 | |||
27 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 22) | ||
28 | |||
29 | #define skb_set_network_header(_skb, _offset) \ | ||
30 | do { (_skb)->nh.raw = (_skb)->data + (_offset); } while (0) | ||
31 | |||
32 | #define skb_reset_mac_header(_skb) \ | ||
33 | do { (_skb)->mac.raw = (_skb)->data; } while (0) | ||
34 | |||
35 | #define list_first_entry(ptr, type, member) \ | ||
36 | list_entry((ptr)->next, type, member) | ||
37 | |||
38 | #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 22) */ | ||
39 | |||
40 | |||
41 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26) | ||
42 | |||
43 | #define device_create(_cls, _parent, _devt, _device, _fmt) \ | ||
44 | class_device_create(_cls, _parent, _devt, _device, _fmt) | ||
45 | |||
46 | #define device_destroy(_cls, _device) \ | ||
47 | class_device_destroy(_cls, _device) | ||
48 | |||
49 | #else | ||
50 | |||
51 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) | ||
52 | |||
53 | #define device_create(_cls, _parent, _devt, _device, _fmt) \ | ||
54 | device_create_drvdata(_cls, _parent, _devt, _device, _fmt) | ||
55 | |||
56 | #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) */ | ||
57 | |||
58 | #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26) */ | ||
59 | |||
60 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) | ||
61 | |||
62 | #define cancel_delayed_work_sync(wq) cancel_rearming_delayed_work(wq) | ||
63 | |||
64 | #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) */ | ||
65 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25) | ||
66 | #define strict_strtoul(cp, base, res) \ | ||
67 | ({ \ | ||
68 | int ret = 0; \ | ||
69 | char *endp; \ | ||
70 | *res = simple_strtoul(cp, &endp, base); \ | ||
71 | if (cp == endp) \ | ||
72 | ret = -EINVAL; \ | ||
73 | ret; \ | ||
74 | }) | ||
75 | #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25) */ | ||
diff --git a/drivers/staging/batman-adv/device.c b/drivers/staging/batman-adv/device.c index 1e7d1f88674f..e7f44215b5f3 100644 --- a/drivers/staging/batman-adv/device.c +++ b/drivers/staging/batman-adv/device.c | |||
@@ -19,14 +19,13 @@ | |||
19 | * | 19 | * |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/device.h> | ||
22 | #include "main.h" | 23 | #include "main.h" |
23 | #include "device.h" | 24 | #include "device.h" |
24 | #include "log.h" | ||
25 | #include "send.h" | 25 | #include "send.h" |
26 | #include "types.h" | 26 | #include "types.h" |
27 | #include "hash.h" | 27 | #include "hash.h" |
28 | 28 | #include "hard-interface.h" | |
29 | #include "compat.h" | ||
30 | 29 | ||
31 | static struct class *batman_class; | 30 | static struct class *batman_class; |
32 | 31 | ||
@@ -60,7 +59,7 @@ int bat_device_setup(void) | |||
60 | /* register our device - kernel assigns a free major number */ | 59 | /* register our device - kernel assigns a free major number */ |
61 | tmp_major = register_chrdev(0, DRIVER_DEVICE, &fops); | 60 | tmp_major = register_chrdev(0, DRIVER_DEVICE, &fops); |
62 | if (tmp_major < 0) { | 61 | if (tmp_major < 0) { |
63 | debug_log(LOG_TYPE_WARN, "Registering the character device failed with %d\n", | 62 | printk(KERN_ERR "batman-adv:Registering the character device failed with %d\n", |
64 | tmp_major); | 63 | tmp_major); |
65 | return 0; | 64 | return 0; |
66 | } | 65 | } |
@@ -68,7 +67,7 @@ int bat_device_setup(void) | |||
68 | batman_class = class_create(THIS_MODULE, "batman-adv"); | 67 | batman_class = class_create(THIS_MODULE, "batman-adv"); |
69 | 68 | ||
70 | if (IS_ERR(batman_class)) { | 69 | if (IS_ERR(batman_class)) { |
71 | debug_log(LOG_TYPE_WARN, "Could not register class 'batman-adv' \n"); | 70 | printk(KERN_ERR "batman-adv:Could not register class 'batman-adv' \n"); |
72 | return 0; | 71 | return 0; |
73 | } | 72 | } |
74 | 73 | ||
@@ -111,7 +110,7 @@ int bat_device_open(struct inode *inode, struct file *file) | |||
111 | } | 110 | } |
112 | 111 | ||
113 | if (device_client_hash[i] != device_client) { | 112 | if (device_client_hash[i] != device_client) { |
114 | debug_log(LOG_TYPE_WARN, "Error - can't add another packet client: maximum number of clients reached \n"); | 113 | printk(KERN_ERR "batman-adv:Error - can't add another packet client: maximum number of clients reached \n"); |
115 | kfree(device_client); | 114 | kfree(device_client); |
116 | return -EXFULL; | 115 | return -EXFULL; |
117 | } | 116 | } |
@@ -119,7 +118,7 @@ int bat_device_open(struct inode *inode, struct file *file) | |||
119 | INIT_LIST_HEAD(&device_client->queue_list); | 118 | INIT_LIST_HEAD(&device_client->queue_list); |
120 | device_client->queue_len = 0; | 119 | device_client->queue_len = 0; |
121 | device_client->index = i; | 120 | device_client->index = i; |
122 | device_client->lock = __SPIN_LOCK_UNLOCKED(device_client->lock); | 121 | spin_lock_init(&device_client->lock); |
123 | init_waitqueue_head(&device_client->queue_wait); | 122 | init_waitqueue_head(&device_client->queue_wait); |
124 | 123 | ||
125 | file->private_data = device_client; | 124 | file->private_data = device_client; |
@@ -134,8 +133,9 @@ int bat_device_release(struct inode *inode, struct file *file) | |||
134 | (struct device_client *)file->private_data; | 133 | (struct device_client *)file->private_data; |
135 | struct device_packet *device_packet; | 134 | struct device_packet *device_packet; |
136 | struct list_head *list_pos, *list_pos_tmp; | 135 | struct list_head *list_pos, *list_pos_tmp; |
136 | unsigned long flags; | ||
137 | 137 | ||
138 | spin_lock(&device_client->lock); | 138 | spin_lock_irqsave(&device_client->lock, flags); |
139 | 139 | ||
140 | /* for all packets in the queue ... */ | 140 | /* for all packets in the queue ... */ |
141 | list_for_each_safe(list_pos, list_pos_tmp, &device_client->queue_list) { | 141 | list_for_each_safe(list_pos, list_pos_tmp, &device_client->queue_list) { |
@@ -147,7 +147,7 @@ int bat_device_release(struct inode *inode, struct file *file) | |||
147 | } | 147 | } |
148 | 148 | ||
149 | device_client_hash[device_client->index] = NULL; | 149 | device_client_hash[device_client->index] = NULL; |
150 | spin_unlock(&device_client->lock); | 150 | spin_unlock_irqrestore(&device_client->lock, flags); |
151 | 151 | ||
152 | kfree(device_client); | 152 | kfree(device_client); |
153 | dec_module_count(); | 153 | dec_module_count(); |
@@ -162,6 +162,7 @@ ssize_t bat_device_read(struct file *file, char __user *buf, size_t count, | |||
162 | (struct device_client *)file->private_data; | 162 | (struct device_client *)file->private_data; |
163 | struct device_packet *device_packet; | 163 | struct device_packet *device_packet; |
164 | int error; | 164 | int error; |
165 | unsigned long flags; | ||
165 | 166 | ||
166 | if ((file->f_flags & O_NONBLOCK) && (device_client->queue_len == 0)) | 167 | if ((file->f_flags & O_NONBLOCK) && (device_client->queue_len == 0)) |
167 | return -EAGAIN; | 168 | return -EAGAIN; |
@@ -178,14 +179,14 @@ ssize_t bat_device_read(struct file *file, char __user *buf, size_t count, | |||
178 | if (error) | 179 | if (error) |
179 | return error; | 180 | return error; |
180 | 181 | ||
181 | spin_lock(&device_client->lock); | 182 | spin_lock_irqsave(&device_client->lock, flags); |
182 | 183 | ||
183 | device_packet = list_first_entry(&device_client->queue_list, | 184 | device_packet = list_first_entry(&device_client->queue_list, |
184 | struct device_packet, list); | 185 | struct device_packet, list); |
185 | list_del(&device_packet->list); | 186 | list_del(&device_packet->list); |
186 | device_client->queue_len--; | 187 | device_client->queue_len--; |
187 | 188 | ||
188 | spin_unlock(&device_client->lock); | 189 | spin_unlock_irqrestore(&device_client->lock, flags); |
189 | 190 | ||
190 | error = __copy_to_user(buf, &device_packet->icmp_packet, | 191 | error = __copy_to_user(buf, &device_packet->icmp_packet, |
191 | sizeof(struct icmp_packet)); | 192 | sizeof(struct icmp_packet)); |
@@ -206,9 +207,11 @@ ssize_t bat_device_write(struct file *file, const char __user *buff, | |||
206 | struct icmp_packet icmp_packet; | 207 | struct icmp_packet icmp_packet; |
207 | struct orig_node *orig_node; | 208 | struct orig_node *orig_node; |
208 | struct batman_if *batman_if; | 209 | struct batman_if *batman_if; |
210 | uint8_t dstaddr[ETH_ALEN]; | ||
211 | unsigned long flags; | ||
209 | 212 | ||
210 | if (len < sizeof(struct icmp_packet)) { | 213 | if (len < sizeof(struct icmp_packet)) { |
211 | debug_log(LOG_TYPE_NOTICE, "Error - can't send packet from char device: invalid packet size\n"); | 214 | bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: invalid packet size\n"); |
212 | return -EINVAL; | 215 | return -EINVAL; |
213 | } | 216 | } |
214 | 217 | ||
@@ -219,12 +222,12 @@ ssize_t bat_device_write(struct file *file, const char __user *buff, | |||
219 | return -EFAULT; | 222 | return -EFAULT; |
220 | 223 | ||
221 | if (icmp_packet.packet_type != BAT_ICMP) { | 224 | if (icmp_packet.packet_type != BAT_ICMP) { |
222 | debug_log(LOG_TYPE_NOTICE, "Error - can't send packet from char device: got bogus packet type (expected: BAT_ICMP)\n"); | 225 | bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: got bogus packet type (expected: BAT_ICMP)\n"); |
223 | return -EINVAL; | 226 | return -EINVAL; |
224 | } | 227 | } |
225 | 228 | ||
226 | if (icmp_packet.msg_type != ECHO_REQUEST) { | 229 | if (icmp_packet.msg_type != ECHO_REQUEST) { |
227 | debug_log(LOG_TYPE_NOTICE, "Error - can't send packet from char device: got bogus message type (expected: ECHO_REQUEST)\n"); | 230 | bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: got bogus message type (expected: ECHO_REQUEST)\n"); |
228 | return -EINVAL; | 231 | return -EINVAL; |
229 | } | 232 | } |
230 | 233 | ||
@@ -240,7 +243,7 @@ ssize_t bat_device_write(struct file *file, const char __user *buff, | |||
240 | if (atomic_read(&module_state) != MODULE_ACTIVE) | 243 | if (atomic_read(&module_state) != MODULE_ACTIVE) |
241 | goto dst_unreach; | 244 | goto dst_unreach; |
242 | 245 | ||
243 | spin_lock(&orig_hash_lock); | 246 | spin_lock_irqsave(&orig_hash_lock, flags); |
244 | orig_node = ((struct orig_node *)hash_find(orig_hash, icmp_packet.dst)); | 247 | orig_node = ((struct orig_node *)hash_find(orig_hash, icmp_packet.dst)); |
245 | 248 | ||
246 | if (!orig_node) | 249 | if (!orig_node) |
@@ -250,9 +253,15 @@ ssize_t bat_device_write(struct file *file, const char __user *buff, | |||
250 | goto unlock; | 253 | goto unlock; |
251 | 254 | ||
252 | batman_if = orig_node->batman_if; | 255 | batman_if = orig_node->batman_if; |
256 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); | ||
257 | |||
258 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
253 | 259 | ||
254 | if (!batman_if) | 260 | if (!batman_if) |
255 | goto unlock; | 261 | goto dst_unreach; |
262 | |||
263 | if (batman_if->if_active != IF_ACTIVE) | ||
264 | goto dst_unreach; | ||
256 | 265 | ||
257 | memcpy(icmp_packet.orig, | 266 | memcpy(icmp_packet.orig, |
258 | batman_if->net_dev->dev_addr, | 267 | batman_if->net_dev->dev_addr, |
@@ -260,13 +269,12 @@ ssize_t bat_device_write(struct file *file, const char __user *buff, | |||
260 | 269 | ||
261 | send_raw_packet((unsigned char *)&icmp_packet, | 270 | send_raw_packet((unsigned char *)&icmp_packet, |
262 | sizeof(struct icmp_packet), | 271 | sizeof(struct icmp_packet), |
263 | batman_if, orig_node->router->addr); | 272 | batman_if, dstaddr); |
264 | 273 | ||
265 | spin_unlock(&orig_hash_lock); | ||
266 | goto out; | 274 | goto out; |
267 | 275 | ||
268 | unlock: | 276 | unlock: |
269 | spin_unlock(&orig_hash_lock); | 277 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
270 | dst_unreach: | 278 | dst_unreach: |
271 | icmp_packet.msg_type = DESTINATION_UNREACHABLE; | 279 | icmp_packet.msg_type = DESTINATION_UNREACHABLE; |
272 | bat_device_add_packet(device_client, &icmp_packet); | 280 | bat_device_add_packet(device_client, &icmp_packet); |
@@ -291,6 +299,7 @@ void bat_device_add_packet(struct device_client *device_client, | |||
291 | struct icmp_packet *icmp_packet) | 299 | struct icmp_packet *icmp_packet) |
292 | { | 300 | { |
293 | struct device_packet *device_packet; | 301 | struct device_packet *device_packet; |
302 | unsigned long flags; | ||
294 | 303 | ||
295 | device_packet = kmalloc(sizeof(struct device_packet), GFP_KERNEL); | 304 | device_packet = kmalloc(sizeof(struct device_packet), GFP_KERNEL); |
296 | 305 | ||
@@ -301,12 +310,12 @@ void bat_device_add_packet(struct device_client *device_client, | |||
301 | memcpy(&device_packet->icmp_packet, icmp_packet, | 310 | memcpy(&device_packet->icmp_packet, icmp_packet, |
302 | sizeof(struct icmp_packet)); | 311 | sizeof(struct icmp_packet)); |
303 | 312 | ||
304 | spin_lock(&device_client->lock); | 313 | spin_lock_irqsave(&device_client->lock, flags); |
305 | 314 | ||
306 | /* while waiting for the lock the device_client could have been | 315 | /* while waiting for the lock the device_client could have been |
307 | * deleted */ | 316 | * deleted */ |
308 | if (!device_client_hash[icmp_packet->uid]) { | 317 | if (!device_client_hash[icmp_packet->uid]) { |
309 | spin_unlock(&device_client->lock); | 318 | spin_unlock_irqrestore(&device_client->lock, flags); |
310 | kfree(device_packet); | 319 | kfree(device_packet); |
311 | return; | 320 | return; |
312 | } | 321 | } |
@@ -323,7 +332,7 @@ void bat_device_add_packet(struct device_client *device_client, | |||
323 | device_client->queue_len--; | 332 | device_client->queue_len--; |
324 | } | 333 | } |
325 | 334 | ||
326 | spin_unlock(&device_client->lock); | 335 | spin_unlock_irqrestore(&device_client->lock, flags); |
327 | 336 | ||
328 | wake_up(&device_client->queue_wait); | 337 | wake_up(&device_client->queue_wait); |
329 | } | 338 | } |
diff --git a/drivers/staging/batman-adv/hard-interface.c b/drivers/staging/batman-adv/hard-interface.c index 5ea35da5ee7a..befd48839519 100644 --- a/drivers/staging/batman-adv/hard-interface.c +++ b/drivers/staging/batman-adv/hard-interface.c | |||
@@ -21,13 +21,11 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "hard-interface.h" | 23 | #include "hard-interface.h" |
24 | #include "log.h" | ||
25 | #include "soft-interface.h" | 24 | #include "soft-interface.h" |
26 | #include "send.h" | 25 | #include "send.h" |
27 | #include "translation-table.h" | 26 | #include "translation-table.h" |
28 | #include "routing.h" | 27 | #include "routing.h" |
29 | #include "hash.h" | 28 | #include "hash.h" |
30 | #include "compat.h" | ||
31 | 29 | ||
32 | #define MIN(x, y) ((x) < (y) ? (x) : (y)) | 30 | #define MIN(x, y) ((x) < (y) ? (x) : (y)) |
33 | 31 | ||
@@ -75,7 +73,6 @@ int hardif_min_mtu(void) | |||
75 | static void check_known_mac_addr(uint8_t *addr) | 73 | static void check_known_mac_addr(uint8_t *addr) |
76 | { | 74 | { |
77 | struct batman_if *batman_if; | 75 | struct batman_if *batman_if; |
78 | char mac_string[ETH_STR_LEN]; | ||
79 | 76 | ||
80 | rcu_read_lock(); | 77 | rcu_read_lock(); |
81 | list_for_each_entry_rcu(batman_if, &if_list, list) { | 78 | list_for_each_entry_rcu(batman_if, &if_list, list) { |
@@ -86,10 +83,9 @@ static void check_known_mac_addr(uint8_t *addr) | |||
86 | if (!compare_orig(batman_if->net_dev->dev_addr, addr)) | 83 | if (!compare_orig(batman_if->net_dev->dev_addr, addr)) |
87 | continue; | 84 | continue; |
88 | 85 | ||
89 | addr_to_string(mac_string, addr); | 86 | printk(KERN_WARNING "batman-adv:The newly added mac address (%pM) already exists on: %s\n", |
90 | debug_log(LOG_TYPE_WARN, "The newly added mac address (%s) already exists on: %s\n", | 87 | addr, batman_if->dev); |
91 | mac_string, batman_if->dev); | 88 | printk(KERN_WARNING "batman-adv:It is strongly recommended to keep mac addresses unique to avoid problems!\n"); |
92 | debug_log(LOG_TYPE_WARN, "It is strongly recommended to keep mac addresses unique to avoid problems!\n"); | ||
93 | } | 89 | } |
94 | rcu_read_unlock(); | 90 | rcu_read_unlock(); |
95 | } | 91 | } |
@@ -154,9 +150,6 @@ void hardif_deactivate_interface(struct batman_if *batman_if) | |||
154 | if (batman_if->if_active != IF_ACTIVE) | 150 | if (batman_if->if_active != IF_ACTIVE) |
155 | return; | 151 | return; |
156 | 152 | ||
157 | if (batman_if->raw_sock) | ||
158 | sock_release(batman_if->raw_sock); | ||
159 | |||
160 | /** | 153 | /** |
161 | * batman_if->net_dev has been acquired by dev_get_by_name() in | 154 | * batman_if->net_dev has been acquired by dev_get_by_name() in |
162 | * proc_interfaces_write() and has to be unreferenced. | 155 | * proc_interfaces_write() and has to be unreferenced. |
@@ -165,22 +158,16 @@ void hardif_deactivate_interface(struct batman_if *batman_if) | |||
165 | if (batman_if->net_dev) | 158 | if (batman_if->net_dev) |
166 | dev_put(batman_if->net_dev); | 159 | dev_put(batman_if->net_dev); |
167 | 160 | ||
168 | batman_if->raw_sock = NULL; | ||
169 | batman_if->net_dev = NULL; | ||
170 | |||
171 | batman_if->if_active = IF_INACTIVE; | 161 | batman_if->if_active = IF_INACTIVE; |
172 | active_ifs--; | 162 | active_ifs--; |
173 | 163 | ||
174 | debug_log(LOG_TYPE_NOTICE, "Interface deactivated: %s\n", | 164 | printk(KERN_INFO "batman-adv:Interface deactivated: %s\n", |
175 | batman_if->dev); | 165 | batman_if->dev); |
176 | } | 166 | } |
177 | 167 | ||
178 | /* (re)activate given interface. */ | 168 | /* (re)activate given interface. */ |
179 | static void hardif_activate_interface(struct batman_if *batman_if) | 169 | static void hardif_activate_interface(struct batman_if *batman_if) |
180 | { | 170 | { |
181 | struct sockaddr_ll bind_addr; | ||
182 | int retval; | ||
183 | |||
184 | if (batman_if->if_active != IF_INACTIVE) | 171 | if (batman_if->if_active != IF_INACTIVE) |
185 | return; | 172 | return; |
186 | 173 | ||
@@ -192,35 +179,8 @@ static void hardif_activate_interface(struct batman_if *batman_if) | |||
192 | if (!batman_if->net_dev) | 179 | if (!batman_if->net_dev) |
193 | goto dev_err; | 180 | goto dev_err; |
194 | 181 | ||
195 | retval = sock_create_kern(PF_PACKET, SOCK_RAW, | ||
196 | __constant_htons(ETH_P_BATMAN), | ||
197 | &batman_if->raw_sock); | ||
198 | |||
199 | if (retval < 0) { | ||
200 | debug_log(LOG_TYPE_WARN, "Can't create raw socket: %i\n", | ||
201 | retval); | ||
202 | goto sock_err; | ||
203 | } | ||
204 | |||
205 | bind_addr.sll_family = AF_PACKET; | ||
206 | bind_addr.sll_ifindex = batman_if->net_dev->ifindex; | ||
207 | bind_addr.sll_protocol = 0; /* is set by the kernel */ | ||
208 | |||
209 | retval = kernel_bind(batman_if->raw_sock, | ||
210 | (struct sockaddr *)&bind_addr, sizeof(bind_addr)); | ||
211 | |||
212 | if (retval < 0) { | ||
213 | debug_log(LOG_TYPE_WARN, "Can't create bind raw socket: %i\n", | ||
214 | retval); | ||
215 | goto bind_err; | ||
216 | } | ||
217 | |||
218 | check_known_mac_addr(batman_if->net_dev->dev_addr); | 182 | check_known_mac_addr(batman_if->net_dev->dev_addr); |
219 | 183 | ||
220 | batman_if->raw_sock->sk->sk_user_data = | ||
221 | batman_if->raw_sock->sk->sk_data_ready; | ||
222 | batman_if->raw_sock->sk->sk_data_ready = batman_data_ready; | ||
223 | |||
224 | addr_to_string(batman_if->addr_str, batman_if->net_dev->dev_addr); | 184 | addr_to_string(batman_if->addr_str, batman_if->net_dev->dev_addr); |
225 | 185 | ||
226 | memcpy(((struct batman_packet *)(batman_if->packet_buff))->orig, | 186 | memcpy(((struct batman_packet *)(batman_if->packet_buff))->orig, |
@@ -235,17 +195,12 @@ static void hardif_activate_interface(struct batman_if *batman_if) | |||
235 | if (batman_if->if_num == 0) | 195 | if (batman_if->if_num == 0) |
236 | set_main_if_addr(batman_if->net_dev->dev_addr); | 196 | set_main_if_addr(batman_if->net_dev->dev_addr); |
237 | 197 | ||
238 | debug_log(LOG_TYPE_NOTICE, "Interface activated: %s\n", | 198 | printk(KERN_INFO "batman-adv:Interface activated: %s\n", |
239 | batman_if->dev); | 199 | batman_if->dev); |
240 | 200 | ||
241 | return; | 201 | return; |
242 | 202 | ||
243 | bind_err: | ||
244 | sock_release(batman_if->raw_sock); | ||
245 | sock_err: | ||
246 | dev_put(batman_if->net_dev); | ||
247 | dev_err: | 203 | dev_err: |
248 | batman_if->raw_sock = NULL; | ||
249 | batman_if->net_dev = NULL; | 204 | batman_if->net_dev = NULL; |
250 | } | 205 | } |
251 | 206 | ||
@@ -290,7 +245,7 @@ static int resize_orig(struct orig_node *orig_node, int if_num) | |||
290 | data_ptr = kmalloc((if_num + 1) * sizeof(TYPE_OF_WORD) * NUM_WORDS, | 245 | data_ptr = kmalloc((if_num + 1) * sizeof(TYPE_OF_WORD) * NUM_WORDS, |
291 | GFP_ATOMIC); | 246 | GFP_ATOMIC); |
292 | if (!data_ptr) { | 247 | if (!data_ptr) { |
293 | debug_log(LOG_TYPE_WARN, "Can't resize orig: out of memory\n"); | 248 | printk(KERN_ERR "batman-adv:Can't resize orig: out of memory\n"); |
294 | return -1; | 249 | return -1; |
295 | } | 250 | } |
296 | 251 | ||
@@ -301,7 +256,7 @@ static int resize_orig(struct orig_node *orig_node, int if_num) | |||
301 | 256 | ||
302 | data_ptr = kmalloc((if_num + 1) * sizeof(uint8_t), GFP_ATOMIC); | 257 | data_ptr = kmalloc((if_num + 1) * sizeof(uint8_t), GFP_ATOMIC); |
303 | if (!data_ptr) { | 258 | if (!data_ptr) { |
304 | debug_log(LOG_TYPE_WARN, "Can't resize orig: out of memory\n"); | 259 | printk(KERN_ERR "batman-adv:Can't resize orig: out of memory\n"); |
305 | return -1; | 260 | return -1; |
306 | } | 261 | } |
307 | 262 | ||
@@ -319,16 +274,16 @@ int hardif_add_interface(char *dev, int if_num) | |||
319 | struct batman_if *batman_if; | 274 | struct batman_if *batman_if; |
320 | struct batman_packet *batman_packet; | 275 | struct batman_packet *batman_packet; |
321 | struct orig_node *orig_node; | 276 | struct orig_node *orig_node; |
322 | struct hash_it_t *hashit = NULL; | 277 | unsigned long flags; |
278 | HASHIT(hashit); | ||
323 | 279 | ||
324 | batman_if = kmalloc(sizeof(struct batman_if), GFP_KERNEL); | 280 | batman_if = kmalloc(sizeof(struct batman_if), GFP_KERNEL); |
325 | 281 | ||
326 | if (!batman_if) { | 282 | if (!batman_if) { |
327 | debug_log(LOG_TYPE_WARN, "Can't add interface (%s): out of memory\n", dev); | 283 | printk(KERN_ERR "batman-adv:Can't add interface (%s): out of memory\n", dev); |
328 | return -1; | 284 | return -1; |
329 | } | 285 | } |
330 | 286 | ||
331 | batman_if->raw_sock = NULL; | ||
332 | batman_if->net_dev = NULL; | 287 | batman_if->net_dev = NULL; |
333 | 288 | ||
334 | if ((if_num == 0) && (num_hna > 0)) | 289 | if ((if_num == 0) && (num_hna > 0)) |
@@ -339,7 +294,7 @@ int hardif_add_interface(char *dev, int if_num) | |||
339 | batman_if->packet_buff = kmalloc(batman_if->packet_len, GFP_KERNEL); | 294 | batman_if->packet_buff = kmalloc(batman_if->packet_len, GFP_KERNEL); |
340 | 295 | ||
341 | if (!batman_if->packet_buff) { | 296 | if (!batman_if->packet_buff) { |
342 | debug_log(LOG_TYPE_WARN, "Can't add interface packet (%s): out of memory\n", dev); | 297 | printk(KERN_ERR "batman-adv:Can't add interface packet (%s): out of memory\n", dev); |
343 | goto out; | 298 | goto out; |
344 | } | 299 | } |
345 | 300 | ||
@@ -348,7 +303,7 @@ int hardif_add_interface(char *dev, int if_num) | |||
348 | batman_if->if_active = IF_INACTIVE; | 303 | batman_if->if_active = IF_INACTIVE; |
349 | INIT_RCU_HEAD(&batman_if->rcu); | 304 | INIT_RCU_HEAD(&batman_if->rcu); |
350 | 305 | ||
351 | debug_log(LOG_TYPE_NOTICE, "Adding interface: %s\n", dev); | 306 | printk(KERN_INFO "batman-adv:Adding interface: %s\n", dev); |
352 | avail_ifs++; | 307 | avail_ifs++; |
353 | 308 | ||
354 | INIT_LIST_HEAD(&batman_if->list); | 309 | INIT_LIST_HEAD(&batman_if->list); |
@@ -376,20 +331,20 @@ int hardif_add_interface(char *dev, int if_num) | |||
376 | 331 | ||
377 | /* resize all orig nodes because orig_node->bcast_own(_sum) depend on | 332 | /* resize all orig nodes because orig_node->bcast_own(_sum) depend on |
378 | * if_num */ | 333 | * if_num */ |
379 | spin_lock(&orig_hash_lock); | 334 | spin_lock_irqsave(&orig_hash_lock, flags); |
380 | 335 | ||
381 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 336 | while (hash_iterate(orig_hash, &hashit)) { |
382 | orig_node = hashit->bucket->data; | 337 | orig_node = hashit.bucket->data; |
383 | if (resize_orig(orig_node, if_num) == -1) { | 338 | if (resize_orig(orig_node, if_num) == -1) { |
384 | spin_unlock(&orig_hash_lock); | 339 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
385 | goto out; | 340 | goto out; |
386 | } | 341 | } |
387 | } | 342 | } |
388 | 343 | ||
389 | spin_unlock(&orig_hash_lock); | 344 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
390 | 345 | ||
391 | if (!hardif_is_interface_up(batman_if->dev)) | 346 | if (!hardif_is_interface_up(batman_if->dev)) |
392 | debug_log(LOG_TYPE_WARN, "Not using interface %s (retrying later): interface not active\n", batman_if->dev); | 347 | printk(KERN_ERR "batman-adv:Not using interface %s (retrying later): interface not active\n", batman_if->dev); |
393 | else | 348 | else |
394 | hardif_activate_interface(batman_if); | 349 | hardif_activate_interface(batman_if); |
395 | 350 | ||
@@ -400,8 +355,7 @@ int hardif_add_interface(char *dev, int if_num) | |||
400 | return 1; | 355 | return 1; |
401 | 356 | ||
402 | out: | 357 | out: |
403 | if (batman_if->packet_buff) | 358 | kfree(batman_if->packet_buff); |
404 | kfree(batman_if->packet_buff); | ||
405 | kfree(batman_if); | 359 | kfree(batman_if); |
406 | kfree(dev); | 360 | kfree(dev); |
407 | return -1; | 361 | return -1; |
@@ -413,7 +367,7 @@ char hardif_get_active_if_num(void) | |||
413 | } | 367 | } |
414 | 368 | ||
415 | static int hard_if_event(struct notifier_block *this, | 369 | static int hard_if_event(struct notifier_block *this, |
416 | unsigned long event, void *ptr) | 370 | unsigned long event, void *ptr) |
417 | { | 371 | { |
418 | struct net_device *dev = (struct net_device *)ptr; | 372 | struct net_device *dev = (struct net_device *)ptr; |
419 | struct batman_if *batman_if = get_batman_if_by_name(dev->name); | 373 | struct batman_if *batman_if = get_batman_if_by_name(dev->name); |
@@ -436,7 +390,6 @@ static int hard_if_event(struct notifier_block *this, | |||
436 | break; | 390 | break; |
437 | /* NETDEV_CHANGEADDR - mac address change - what are we doing here ? */ | 391 | /* NETDEV_CHANGEADDR - mac address change - what are we doing here ? */ |
438 | default: | 392 | default: |
439 | /* debug_log(LOG_TYPE_CRIT, "hard_if_event: %s %i\n", dev->name, event); */ | ||
440 | break; | 393 | break; |
441 | }; | 394 | }; |
442 | 395 | ||
@@ -446,6 +399,122 @@ out: | |||
446 | return NOTIFY_DONE; | 399 | return NOTIFY_DONE; |
447 | } | 400 | } |
448 | 401 | ||
402 | /* find batman interface by netdev. assumes rcu_read_lock on */ | ||
403 | static struct batman_if *find_batman_if(struct net_device *dev) | ||
404 | { | ||
405 | struct batman_if *batman_if; | ||
406 | |||
407 | rcu_read_lock(); | ||
408 | list_for_each_entry_rcu(batman_if, &if_list, list) { | ||
409 | if (batman_if->net_dev == dev) { | ||
410 | rcu_read_unlock(); | ||
411 | return batman_if; | ||
412 | } | ||
413 | } | ||
414 | rcu_read_unlock(); | ||
415 | return NULL; | ||
416 | } | ||
417 | |||
418 | |||
419 | /* receive a packet with the batman ethertype coming on a hard | ||
420 | * interface */ | ||
421 | int batman_skb_recv(struct sk_buff *skb, struct net_device *dev, | ||
422 | struct packet_type *ptype, struct net_device *orig_dev) | ||
423 | { | ||
424 | struct batman_packet *batman_packet; | ||
425 | struct batman_if *batman_if; | ||
426 | struct net_device_stats *stats; | ||
427 | int ret; | ||
428 | |||
429 | skb = skb_share_check(skb, GFP_ATOMIC); | ||
430 | |||
431 | /* skb was released by skb_share_check() */ | ||
432 | if (!skb) | ||
433 | goto err_out; | ||
434 | |||
435 | if (atomic_read(&module_state) != MODULE_ACTIVE) | ||
436 | goto err_free; | ||
437 | |||
438 | /* packet should hold at least type and version */ | ||
439 | if (unlikely(skb_headlen(skb) < 2)) | ||
440 | goto err_free; | ||
441 | |||
442 | /* expect a valid ethernet header here. */ | ||
443 | if (unlikely(skb->mac_len != sizeof(struct ethhdr) | ||
444 | || !skb_mac_header(skb))) | ||
445 | goto err_free; | ||
446 | |||
447 | batman_if = find_batman_if(skb->dev); | ||
448 | if (!batman_if) | ||
449 | goto err_free; | ||
450 | |||
451 | /* discard frames on not active interfaces */ | ||
452 | if (batman_if->if_active != IF_ACTIVE) | ||
453 | goto err_free; | ||
454 | |||
455 | stats = (struct net_device_stats *)dev_get_stats(skb->dev); | ||
456 | if (stats) { | ||
457 | stats->rx_packets++; | ||
458 | stats->rx_bytes += skb->len; | ||
459 | } | ||
460 | |||
461 | batman_packet = (struct batman_packet *)skb->data; | ||
462 | |||
463 | if (batman_packet->version != COMPAT_VERSION) { | ||
464 | bat_dbg(DBG_BATMAN, | ||
465 | "Drop packet: incompatible batman version (%i)\n", | ||
466 | batman_packet->version); | ||
467 | goto err_free; | ||
468 | } | ||
469 | |||
470 | /* all receive handlers return whether they received or reused | ||
471 | * the supplied skb. if not, we have to free the skb. */ | ||
472 | |||
473 | switch (batman_packet->packet_type) { | ||
474 | /* batman originator packet */ | ||
475 | case BAT_PACKET: | ||
476 | ret = recv_bat_packet(skb, batman_if); | ||
477 | break; | ||
478 | |||
479 | /* batman icmp packet */ | ||
480 | case BAT_ICMP: | ||
481 | ret = recv_icmp_packet(skb); | ||
482 | break; | ||
483 | |||
484 | /* unicast packet */ | ||
485 | case BAT_UNICAST: | ||
486 | ret = recv_unicast_packet(skb); | ||
487 | break; | ||
488 | |||
489 | /* broadcast packet */ | ||
490 | case BAT_BCAST: | ||
491 | ret = recv_bcast_packet(skb); | ||
492 | break; | ||
493 | |||
494 | /* vis packet */ | ||
495 | case BAT_VIS: | ||
496 | ret = recv_vis_packet(skb); | ||
497 | break; | ||
498 | default: | ||
499 | ret = NET_RX_DROP; | ||
500 | } | ||
501 | |||
502 | if (ret == NET_RX_DROP) | ||
503 | kfree_skb(skb); | ||
504 | |||
505 | /* return NET_RX_SUCCESS in any case as we | ||
506 | * most probably dropped the packet for | ||
507 | * routing-logical reasons. */ | ||
508 | |||
509 | return NET_RX_SUCCESS; | ||
510 | |||
511 | err_free: | ||
512 | kfree_skb(skb); | ||
513 | err_out: | ||
514 | return NET_RX_DROP; | ||
515 | } | ||
516 | |||
517 | |||
449 | struct notifier_block hard_if_notifier = { | 518 | struct notifier_block hard_if_notifier = { |
450 | .notifier_call = hard_if_event, | 519 | .notifier_call = hard_if_event, |
451 | }; | 520 | }; |
diff --git a/drivers/staging/batman-adv/hard-interface.h b/drivers/staging/batman-adv/hard-interface.h index 742358c00c0e..97c6ecb9e087 100644 --- a/drivers/staging/batman-adv/hard-interface.h +++ b/drivers/staging/batman-adv/hard-interface.h | |||
@@ -32,5 +32,9 @@ void hardif_deactivate_interface(struct batman_if *batman_if); | |||
32 | char hardif_get_active_if_num(void); | 32 | char hardif_get_active_if_num(void); |
33 | void hardif_check_interfaces_status(void); | 33 | void hardif_check_interfaces_status(void); |
34 | void hardif_check_interfaces_status_wq(struct work_struct *work); | 34 | void hardif_check_interfaces_status_wq(struct work_struct *work); |
35 | int batman_skb_recv(struct sk_buff *skb, | ||
36 | struct net_device *dev, | ||
37 | struct packet_type *ptype, | ||
38 | struct net_device *orig_dev); | ||
35 | int hardif_min_mtu(void); | 39 | int hardif_min_mtu(void); |
36 | void update_min_mtu(void); | 40 | void update_min_mtu(void); |
diff --git a/drivers/staging/batman-adv/hash.c b/drivers/staging/batman-adv/hash.c index 61cb4a20ebca..5a2018de3ff2 100644 --- a/drivers/staging/batman-adv/hash.c +++ b/drivers/staging/batman-adv/hash.c | |||
@@ -64,24 +64,18 @@ void hash_destroy(struct hashtable_t *hash) | |||
64 | kfree(hash); | 64 | kfree(hash); |
65 | } | 65 | } |
66 | 66 | ||
67 | /* iterate though the hash. first element is selected with iter_in NULL. use | 67 | /* iterate though the hash. First element is selected if an iterator |
68 | * the returned iterator to access the elements until hash_it_t returns NULL. */ | 68 | * initialized with HASHIT() is supplied as iter. Use the returned |
69 | * (or supplied) iterator to access the elements until hash_iterate returns | ||
70 | * NULL. */ | ||
71 | |||
69 | struct hash_it_t *hash_iterate(struct hashtable_t *hash, | 72 | struct hash_it_t *hash_iterate(struct hashtable_t *hash, |
70 | struct hash_it_t *iter_in) | 73 | struct hash_it_t *iter) |
71 | { | 74 | { |
72 | struct hash_it_t *iter; | ||
73 | |||
74 | if (!hash) | 75 | if (!hash) |
75 | return NULL; | 76 | return NULL; |
76 | 77 | if (!iter) | |
77 | if (iter_in == NULL) { | 78 | return NULL; |
78 | iter = kmalloc(sizeof(struct hash_it_t), GFP_ATOMIC); | ||
79 | iter->index = -1; | ||
80 | iter->bucket = NULL; | ||
81 | iter->prev_bucket = NULL; | ||
82 | } else { | ||
83 | iter = iter_in; | ||
84 | } | ||
85 | 79 | ||
86 | /* sanity checks first (if our bucket got deleted in the last | 80 | /* sanity checks first (if our bucket got deleted in the last |
87 | * iteration): */ | 81 | * iteration): */ |
@@ -139,7 +133,6 @@ struct hash_it_t *hash_iterate(struct hashtable_t *hash, | |||
139 | } | 133 | } |
140 | 134 | ||
141 | /* nothing to iterate over anymore */ | 135 | /* nothing to iterate over anymore */ |
142 | kfree(iter); | ||
143 | return NULL; | 136 | return NULL; |
144 | } | 137 | } |
145 | 138 | ||
diff --git a/drivers/staging/batman-adv/hash.h b/drivers/staging/batman-adv/hash.h index bb60f082be6a..a70d6d6e1c7a 100644 --- a/drivers/staging/batman-adv/hash.h +++ b/drivers/staging/batman-adv/hash.h | |||
@@ -21,6 +21,11 @@ | |||
21 | 21 | ||
22 | #ifndef _BATMAN_HASH_H | 22 | #ifndef _BATMAN_HASH_H |
23 | #define _BATMAN_HASH_H | 23 | #define _BATMAN_HASH_H |
24 | #define HASHIT(name) struct hash_it_t name = { \ | ||
25 | .index = -1, .bucket = NULL, \ | ||
26 | .prev_bucket = NULL, \ | ||
27 | .first_bucket = NULL } | ||
28 | |||
24 | 29 | ||
25 | typedef int (*hashdata_compare_cb)(void *, void *); | 30 | typedef int (*hashdata_compare_cb)(void *, void *); |
26 | typedef int (*hashdata_choose_cb)(void *, int); | 31 | typedef int (*hashdata_choose_cb)(void *, int); |
diff --git a/drivers/staging/batman-adv/log.c b/drivers/staging/batman-adv/log.c deleted file mode 100644 index f37c7f01a9f5..000000000000 --- a/drivers/staging/batman-adv/log.c +++ /dev/null | |||
@@ -1,179 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: | ||
3 | * | ||
4 | * Marek Lindner, Simon Wunderlich | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of version 2 of the GNU General Public | ||
8 | * License as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
18 | * 02110-1301, USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #include "main.h" | ||
23 | #include "log.h" | ||
24 | |||
25 | #define LOG_BUF_MASK (log_buf_len-1) | ||
26 | #define LOG_BUF(idx) (log_buf[(idx) & LOG_BUF_MASK]) | ||
27 | |||
28 | static char log_buf[LOG_BUF_LEN]; | ||
29 | static int log_buf_len = LOG_BUF_LEN; | ||
30 | static unsigned long log_start; | ||
31 | static unsigned long log_end; | ||
32 | uint8_t log_level; | ||
33 | |||
34 | static DEFINE_SPINLOCK(logbuf_lock); | ||
35 | |||
36 | const struct file_operations proc_log_operations = { | ||
37 | .open = log_open, | ||
38 | .release = log_release, | ||
39 | .read = log_read, | ||
40 | .write = log_write, | ||
41 | .poll = log_poll, | ||
42 | }; | ||
43 | |||
44 | static DECLARE_WAIT_QUEUE_HEAD(log_wait); | ||
45 | |||
46 | static void emit_log_char(char c) | ||
47 | { | ||
48 | LOG_BUF(log_end) = c; | ||
49 | log_end++; | ||
50 | |||
51 | if (log_end - log_start > log_buf_len) | ||
52 | log_start = log_end - log_buf_len; | ||
53 | } | ||
54 | |||
55 | static int fdebug_log(char *fmt, ...) | ||
56 | { | ||
57 | int printed_len; | ||
58 | char *p; | ||
59 | va_list args; | ||
60 | static char debug_log_buf[256]; | ||
61 | unsigned long flags; | ||
62 | |||
63 | spin_lock_irqsave(&logbuf_lock, flags); | ||
64 | va_start(args, fmt); | ||
65 | printed_len = vscnprintf(debug_log_buf, sizeof(debug_log_buf), fmt, | ||
66 | args); | ||
67 | va_end(args); | ||
68 | |||
69 | for (p = debug_log_buf; *p != 0; p++) | ||
70 | emit_log_char(*p); | ||
71 | |||
72 | spin_unlock_irqrestore(&logbuf_lock, flags); | ||
73 | |||
74 | wake_up(&log_wait); | ||
75 | |||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | int debug_log(int type, char *fmt, ...) | ||
80 | { | ||
81 | va_list args; | ||
82 | int retval = 0; | ||
83 | char tmp_log_buf[256]; | ||
84 | |||
85 | /* only critical information get into the official kernel log */ | ||
86 | if (type == LOG_TYPE_CRIT) { | ||
87 | va_start(args, fmt); | ||
88 | vscnprintf(tmp_log_buf, sizeof(tmp_log_buf), fmt, args); | ||
89 | printk(KERN_ERR "batman-adv: %s", tmp_log_buf); | ||
90 | va_end(args); | ||
91 | } | ||
92 | |||
93 | if ((type == LOG_TYPE_CRIT) || (log_level & type)) { | ||
94 | va_start(args, fmt); | ||
95 | vscnprintf(tmp_log_buf, sizeof(tmp_log_buf), fmt, args); | ||
96 | fdebug_log("[%10u] %s", (jiffies / HZ), tmp_log_buf); | ||
97 | va_end(args); | ||
98 | } | ||
99 | |||
100 | return retval; | ||
101 | } | ||
102 | |||
103 | int log_open(struct inode *inode, struct file *file) | ||
104 | { | ||
105 | inc_module_count(); | ||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | int log_release(struct inode *inode, struct file *file) | ||
110 | { | ||
111 | dec_module_count(); | ||
112 | return 0; | ||
113 | } | ||
114 | |||
115 | ssize_t log_read(struct file *file, char __user *buf, size_t count, | ||
116 | loff_t *ppos) | ||
117 | { | ||
118 | int error, i = 0; | ||
119 | char c; | ||
120 | unsigned long flags; | ||
121 | |||
122 | if ((file->f_flags & O_NONBLOCK) && !(log_end - log_start)) | ||
123 | return -EAGAIN; | ||
124 | |||
125 | if ((!buf) || (count < 0)) | ||
126 | return -EINVAL; | ||
127 | |||
128 | if (count == 0) | ||
129 | return 0; | ||
130 | |||
131 | if (!access_ok(VERIFY_WRITE, buf, count)) | ||
132 | return -EFAULT; | ||
133 | |||
134 | error = wait_event_interruptible(log_wait, (log_start - log_end)); | ||
135 | |||
136 | if (error) | ||
137 | return error; | ||
138 | |||
139 | spin_lock_irqsave(&logbuf_lock, flags); | ||
140 | |||
141 | while ((!error) && (log_start != log_end) && (i < count)) { | ||
142 | c = LOG_BUF(log_start); | ||
143 | |||
144 | log_start++; | ||
145 | |||
146 | spin_unlock_irqrestore(&logbuf_lock, flags); | ||
147 | |||
148 | error = __put_user(c, buf); | ||
149 | |||
150 | spin_lock_irqsave(&logbuf_lock, flags); | ||
151 | |||
152 | buf++; | ||
153 | i++; | ||
154 | |||
155 | } | ||
156 | |||
157 | spin_unlock_irqrestore(&logbuf_lock, flags); | ||
158 | |||
159 | if (!error) | ||
160 | return i; | ||
161 | |||
162 | return error; | ||
163 | } | ||
164 | |||
165 | ssize_t log_write(struct file *file, const char __user *buf, size_t count, | ||
166 | loff_t *ppos) | ||
167 | { | ||
168 | return count; | ||
169 | } | ||
170 | |||
171 | unsigned int log_poll(struct file *file, poll_table *wait) | ||
172 | { | ||
173 | poll_wait(file, &log_wait, wait); | ||
174 | |||
175 | if (log_end - log_start) | ||
176 | return POLLIN | POLLRDNORM; | ||
177 | |||
178 | return 0; | ||
179 | } | ||
diff --git a/drivers/staging/batman-adv/main.c b/drivers/staging/batman-adv/main.c index bb89bfc5dda6..2e0b482e710a 100644 --- a/drivers/staging/batman-adv/main.c +++ b/drivers/staging/batman-adv/main.c | |||
@@ -21,9 +21,9 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "proc.h" | 23 | #include "proc.h" |
24 | #include "log.h" | ||
25 | #include "routing.h" | 24 | #include "routing.h" |
26 | #include "send.h" | 25 | #include "send.h" |
26 | #include "originator.h" | ||
27 | #include "soft-interface.h" | 27 | #include "soft-interface.h" |
28 | #include "device.h" | 28 | #include "device.h" |
29 | #include "translation-table.h" | 29 | #include "translation-table.h" |
@@ -31,7 +31,6 @@ | |||
31 | #include "types.h" | 31 | #include "types.h" |
32 | #include "vis.h" | 32 | #include "vis.h" |
33 | #include "hash.h" | 33 | #include "hash.h" |
34 | #include "compat.h" | ||
35 | 34 | ||
36 | struct list_head if_list; | 35 | struct list_head if_list; |
37 | struct hlist_head forw_bat_list; | 36 | struct hlist_head forw_bat_list; |
@@ -44,19 +43,34 @@ DEFINE_SPINLOCK(forw_bcast_list_lock); | |||
44 | 43 | ||
45 | atomic_t originator_interval; | 44 | atomic_t originator_interval; |
46 | atomic_t vis_interval; | 45 | atomic_t vis_interval; |
46 | atomic_t vis_mode; | ||
47 | atomic_t aggregation_enabled; | 47 | atomic_t aggregation_enabled; |
48 | int16_t num_hna; | 48 | int16_t num_hna; |
49 | int16_t num_ifs; | 49 | int16_t num_ifs; |
50 | 50 | ||
51 | struct net_device *soft_device; | 51 | struct net_device *soft_device; |
52 | 52 | ||
53 | static struct task_struct *kthread_task; | ||
54 | |||
55 | unsigned char broadcastAddr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | 53 | unsigned char broadcastAddr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
56 | atomic_t module_state; | 54 | atomic_t module_state; |
57 | 55 | ||
56 | static struct packet_type batman_adv_packet_type __read_mostly = { | ||
57 | .type = __constant_htons(ETH_P_BATMAN), | ||
58 | .func = batman_skb_recv, | ||
59 | }; | ||
60 | |||
58 | struct workqueue_struct *bat_event_workqueue; | 61 | struct workqueue_struct *bat_event_workqueue; |
59 | 62 | ||
63 | #ifdef CONFIG_BATMAN_ADV_DEBUG | ||
64 | int debug; | ||
65 | |||
66 | module_param(debug, int, 0644); | ||
67 | |||
68 | int bat_debug_type(int type) | ||
69 | { | ||
70 | return debug & type; | ||
71 | } | ||
72 | #endif | ||
73 | |||
60 | int init_module(void) | 74 | int init_module(void) |
61 | { | 75 | { |
62 | int retval; | 76 | int retval; |
@@ -70,6 +84,7 @@ int init_module(void) | |||
70 | atomic_set(&originator_interval, 1000); | 84 | atomic_set(&originator_interval, 1000); |
71 | atomic_set(&vis_interval, 1000);/* TODO: raise this later, this is only | 85 | atomic_set(&vis_interval, 1000);/* TODO: raise this later, this is only |
72 | * for debugging now. */ | 86 | * for debugging now. */ |
87 | atomic_set(&vis_mode, VIS_TYPE_CLIENT_UPDATE); | ||
73 | atomic_set(&aggregation_enabled, 1); | 88 | atomic_set(&aggregation_enabled, 1); |
74 | 89 | ||
75 | /* the name should not be longer than 10 chars - see | 90 | /* the name should not be longer than 10 chars - see |
@@ -90,21 +105,22 @@ int init_module(void) | |||
90 | interface_setup); | 105 | interface_setup); |
91 | 106 | ||
92 | if (!soft_device) { | 107 | if (!soft_device) { |
93 | debug_log(LOG_TYPE_CRIT, "Unable to allocate the batman interface\n"); | 108 | printk(KERN_ERR "batman-adv:Unable to allocate the batman interface\n"); |
94 | goto end; | 109 | goto end; |
95 | } | 110 | } |
96 | 111 | ||
97 | retval = register_netdev(soft_device); | 112 | retval = register_netdev(soft_device); |
98 | 113 | ||
99 | if (retval < 0) { | 114 | if (retval < 0) { |
100 | debug_log(LOG_TYPE_CRIT, "Unable to register the batman interface: %i\n", retval); | 115 | printk(KERN_ERR "batman-adv:Unable to register the batman interface: %i\n", retval); |
101 | goto free_soft_device; | 116 | goto free_soft_device; |
102 | } | 117 | } |
103 | 118 | ||
104 | register_netdevice_notifier(&hard_if_notifier); | 119 | register_netdevice_notifier(&hard_if_notifier); |
120 | dev_add_pack(&batman_adv_packet_type); | ||
105 | 121 | ||
106 | debug_log(LOG_TYPE_CRIT, "B.A.T.M.A.N. advanced %s%s (compatibility version %i) loaded \n", | 122 | printk(KERN_INFO "batman-adv:B.A.T.M.A.N. advanced %s%s (compatibility version %i) loaded \n", |
107 | SOURCE_VERSION, REVISION_VERSION_STR, COMPAT_VERSION); | 123 | SOURCE_VERSION, REVISION_VERSION_STR, COMPAT_VERSION); |
108 | 124 | ||
109 | return 0; | 125 | return 0; |
110 | 126 | ||
@@ -124,6 +140,8 @@ void cleanup_module(void) | |||
124 | soft_device = NULL; | 140 | soft_device = NULL; |
125 | } | 141 | } |
126 | 142 | ||
143 | dev_remove_pack(&batman_adv_packet_type); | ||
144 | |||
127 | unregister_netdevice_notifier(&hard_if_notifier); | 145 | unregister_netdevice_notifier(&hard_if_notifier); |
128 | cleanup_procfs(); | 146 | cleanup_procfs(); |
129 | 147 | ||
@@ -151,22 +169,12 @@ void activate_module(void) | |||
151 | if (vis_init() < 1) | 169 | if (vis_init() < 1) |
152 | goto err; | 170 | goto err; |
153 | 171 | ||
154 | /* (re)start kernel thread for packet processing */ | ||
155 | if (!kthread_task) { | ||
156 | kthread_task = kthread_run(packet_recv_thread, NULL, "batman-adv"); | ||
157 | |||
158 | if (IS_ERR(kthread_task)) { | ||
159 | debug_log(LOG_TYPE_CRIT, "Unable to start packet receive thread\n"); | ||
160 | kthread_task = NULL; | ||
161 | } | ||
162 | } | ||
163 | |||
164 | update_min_mtu(); | 172 | update_min_mtu(); |
165 | atomic_set(&module_state, MODULE_ACTIVE); | 173 | atomic_set(&module_state, MODULE_ACTIVE); |
166 | goto end; | 174 | goto end; |
167 | 175 | ||
168 | err: | 176 | err: |
169 | debug_log(LOG_TYPE_CRIT, "Unable to allocate memory for mesh information structures: out of mem ?\n"); | 177 | printk(KERN_ERR "batman-adv:Unable to allocate memory for mesh information structures: out of mem ?\n"); |
170 | shutdown_module(); | 178 | shutdown_module(); |
171 | end: | 179 | end: |
172 | return; | 180 | return; |
@@ -182,14 +190,7 @@ void shutdown_module(void) | |||
182 | 190 | ||
183 | vis_quit(); | 191 | vis_quit(); |
184 | 192 | ||
185 | /* deactivate kernel thread for packet processing (if running) */ | 193 | /* TODO: unregister BATMAN pack */ |
186 | if (kthread_task) { | ||
187 | atomic_set(&exit_cond, 1); | ||
188 | wake_up_interruptible(&thread_wait); | ||
189 | kthread_stop(kthread_task); | ||
190 | |||
191 | kthread_task = NULL; | ||
192 | } | ||
193 | 194 | ||
194 | originator_free(); | 195 | originator_free(); |
195 | 196 | ||
diff --git a/drivers/staging/batman-adv/main.h b/drivers/staging/batman-adv/main.h index facb6b79ee52..deb41f5beda6 100644 --- a/drivers/staging/batman-adv/main.h +++ b/drivers/staging/batman-adv/main.h | |||
@@ -33,16 +33,16 @@ | |||
33 | 33 | ||
34 | #define TQ_MAX_VALUE 255 | 34 | #define TQ_MAX_VALUE 255 |
35 | #define JITTER 20 | 35 | #define JITTER 20 |
36 | #define TTL 50 /* Time To Live of broadcast messages */ | 36 | #define TTL 50 /* Time To Live of broadcast messages */ |
37 | #define MAX_ADDR 16 /* number of interfaces which can be added to | 37 | #define MAX_ADDR 16 /* number of interfaces which can be added to |
38 | * batman. */ | 38 | * batman. */ |
39 | 39 | ||
40 | #define PURGE_TIMEOUT 200000 /* purge originators after time in ms if no | 40 | #define PURGE_TIMEOUT 200000 /* purge originators after time in ms if no |
41 | * valid packet comes in -> TODO: check | 41 | * valid packet comes in -> TODO: check |
42 | * influence on TQ_LOCAL_WINDOW_SIZE */ | 42 | * influence on TQ_LOCAL_WINDOW_SIZE */ |
43 | #define LOCAL_HNA_TIMEOUT 3600000 | 43 | #define LOCAL_HNA_TIMEOUT 3600000 |
44 | 44 | ||
45 | #define TQ_LOCAL_WINDOW_SIZE 64 /* sliding packet range of received originator | 45 | #define TQ_LOCAL_WINDOW_SIZE 64 /* sliding packet range of received originator |
46 | * messages in squence numbers (should be a | 46 | * messages in squence numbers (should be a |
47 | * multiple of our word size) */ | 47 | * multiple of our word size) */ |
48 | #define TQ_GLOBAL_WINDOW_SIZE 5 | 48 | #define TQ_GLOBAL_WINDOW_SIZE 5 |
@@ -69,24 +69,27 @@ | |||
69 | 69 | ||
70 | 70 | ||
71 | /* | 71 | /* |
72 | * Logging | 72 | * Debug Messages |
73 | */ | 73 | */ |
74 | 74 | ||
75 | #define LOG_TYPE_CRIT 0 /* highest priority for fatal errors such as | 75 | #define DBG_BATMAN 1 /* all messages related to routing / flooding / |
76 | * blocked sockets / failed packet delivery / | 76 | * broadcasting / etc */ |
77 | * programming errors */ | 77 | #define DBG_ROUTES 2 /* route or hna added / changed / deleted */ |
78 | #define LOG_TYPE_WARN 1 /* warnings for small errors like wrong user | 78 | |
79 | * input / damaged packets / etc */ | 79 | #ifdef CONFIG_BATMAN_ADV_DEBUG |
80 | #define LOG_TYPE_NOTICE 2 /* notice information for new interfaces / | 80 | extern int debug; |
81 | * changed settings / new originators / etc */ | 81 | |
82 | #define LOG_TYPE_BATMAN 4 /* all messages related to routing / flooding / | 82 | extern int bat_debug_type(int type); |
83 | * broadcasting / etc */ | 83 | #define bat_dbg(type, fmt, arg...) do { \ |
84 | #define LOG_TYPE_ROUTES 8 /* route or hna added / changed / deleted */ | 84 | if (bat_debug_type(type)) \ |
85 | #define LOG_TYPE_CRIT_NAME "critical" | 85 | printk(KERN_DEBUG "batman-adv:" fmt, ## arg); \ |
86 | #define LOG_TYPE_WARN_NAME "warnings" | 86 | } \ |
87 | #define LOG_TYPE_NOTICE_NAME "notices" | 87 | while (0) |
88 | #define LOG_TYPE_BATMAN_NAME "batman" | 88 | #else /* !CONFIG_BATMAN_ADV_DEBUG */ |
89 | #define LOG_TYPE_ROUTES_NAME "routes" | 89 | #define bat_dbg(type, fmt, arg...) do { \ |
90 | } \ | ||
91 | while (0) | ||
92 | #endif | ||
90 | 93 | ||
91 | /* | 94 | /* |
92 | * Vis | 95 | * Vis |
@@ -127,6 +130,7 @@ extern spinlock_t forw_bcast_list_lock; | |||
127 | 130 | ||
128 | extern atomic_t originator_interval; | 131 | extern atomic_t originator_interval; |
129 | extern atomic_t vis_interval; | 132 | extern atomic_t vis_interval; |
133 | extern atomic_t vis_mode; | ||
130 | extern atomic_t aggregation_enabled; | 134 | extern atomic_t aggregation_enabled; |
131 | extern int16_t num_hna; | 135 | extern int16_t num_hna; |
132 | extern int16_t num_ifs; | 136 | extern int16_t num_ifs; |
@@ -147,5 +151,3 @@ int choose_orig(void *data, int32_t size); | |||
147 | int is_my_mac(uint8_t *addr); | 151 | int is_my_mac(uint8_t *addr); |
148 | int is_bcast(uint8_t *addr); | 152 | int is_bcast(uint8_t *addr); |
149 | int is_mcast(uint8_t *addr); | 153 | int is_mcast(uint8_t *addr); |
150 | |||
151 | |||
diff --git a/drivers/staging/batman-adv/originator.c b/drivers/staging/batman-adv/originator.c new file mode 100644 index 000000000000..29c241119a3b --- /dev/null +++ b/drivers/staging/batman-adv/originator.c | |||
@@ -0,0 +1,252 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 B.A.T.M.A.N. contributors: | ||
3 | * | ||
4 | * Marek Lindner, Simon Wunderlich | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of version 2 of the GNU General Public | ||
8 | * License as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
18 | * 02110-1301, USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | /* increase the reference counter for this originator */ | ||
23 | |||
24 | #include "main.h" | ||
25 | #include "originator.h" | ||
26 | #include "hash.h" | ||
27 | #include "translation-table.h" | ||
28 | #include "routing.h" | ||
29 | |||
30 | static DECLARE_DELAYED_WORK(purge_orig_wq, purge_orig); | ||
31 | |||
32 | static void start_purge_timer(void) | ||
33 | { | ||
34 | queue_delayed_work(bat_event_workqueue, &purge_orig_wq, 1 * HZ); | ||
35 | } | ||
36 | |||
37 | int originator_init(void) | ||
38 | { | ||
39 | unsigned long flags; | ||
40 | if (orig_hash) | ||
41 | return 1; | ||
42 | |||
43 | spin_lock_irqsave(&orig_hash_lock, flags); | ||
44 | orig_hash = hash_new(128, compare_orig, choose_orig); | ||
45 | |||
46 | if (!orig_hash) | ||
47 | goto err; | ||
48 | |||
49 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
50 | start_purge_timer(); | ||
51 | return 1; | ||
52 | |||
53 | err: | ||
54 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | void originator_free(void) | ||
59 | { | ||
60 | unsigned long flags; | ||
61 | |||
62 | if (!orig_hash) | ||
63 | return; | ||
64 | |||
65 | cancel_delayed_work_sync(&purge_orig_wq); | ||
66 | |||
67 | spin_lock_irqsave(&orig_hash_lock, flags); | ||
68 | hash_delete(orig_hash, free_orig_node); | ||
69 | orig_hash = NULL; | ||
70 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
71 | } | ||
72 | |||
73 | struct neigh_node * | ||
74 | create_neighbor(struct orig_node *orig_node, struct orig_node *orig_neigh_node, | ||
75 | uint8_t *neigh, struct batman_if *if_incoming) | ||
76 | { | ||
77 | struct neigh_node *neigh_node; | ||
78 | |||
79 | bat_dbg(DBG_BATMAN, "Creating new last-hop neighbor of originator\n"); | ||
80 | |||
81 | neigh_node = kzalloc(sizeof(struct neigh_node), GFP_ATOMIC); | ||
82 | if (!neigh_node) | ||
83 | return NULL; | ||
84 | |||
85 | INIT_LIST_HEAD(&neigh_node->list); | ||
86 | |||
87 | memcpy(neigh_node->addr, neigh, ETH_ALEN); | ||
88 | neigh_node->orig_node = orig_neigh_node; | ||
89 | neigh_node->if_incoming = if_incoming; | ||
90 | |||
91 | list_add_tail(&neigh_node->list, &orig_node->neigh_list); | ||
92 | return neigh_node; | ||
93 | } | ||
94 | |||
95 | void free_orig_node(void *data) | ||
96 | { | ||
97 | struct list_head *list_pos, *list_pos_tmp; | ||
98 | struct neigh_node *neigh_node; | ||
99 | struct orig_node *orig_node = (struct orig_node *)data; | ||
100 | |||
101 | /* for all neighbors towards this originator ... */ | ||
102 | list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) { | ||
103 | neigh_node = list_entry(list_pos, struct neigh_node, list); | ||
104 | |||
105 | list_del(list_pos); | ||
106 | kfree(neigh_node); | ||
107 | } | ||
108 | |||
109 | hna_global_del_orig(orig_node, "originator timed out"); | ||
110 | |||
111 | kfree(orig_node->bcast_own); | ||
112 | kfree(orig_node->bcast_own_sum); | ||
113 | kfree(orig_node); | ||
114 | } | ||
115 | |||
116 | /* this function finds or creates an originator entry for the given | ||
117 | * address if it does not exits */ | ||
118 | struct orig_node *get_orig_node(uint8_t *addr) | ||
119 | { | ||
120 | struct orig_node *orig_node; | ||
121 | struct hashtable_t *swaphash; | ||
122 | int size; | ||
123 | |||
124 | orig_node = ((struct orig_node *)hash_find(orig_hash, addr)); | ||
125 | |||
126 | if (orig_node != NULL) | ||
127 | return orig_node; | ||
128 | |||
129 | bat_dbg(DBG_BATMAN, "Creating new originator: %pM \n", addr); | ||
130 | |||
131 | orig_node = kzalloc(sizeof(struct orig_node), GFP_ATOMIC); | ||
132 | if (!orig_node) | ||
133 | return NULL; | ||
134 | |||
135 | INIT_LIST_HEAD(&orig_node->neigh_list); | ||
136 | |||
137 | memcpy(orig_node->orig, addr, ETH_ALEN); | ||
138 | orig_node->router = NULL; | ||
139 | orig_node->batman_if = NULL; | ||
140 | orig_node->hna_buff = NULL; | ||
141 | |||
142 | size = num_ifs * sizeof(TYPE_OF_WORD) * NUM_WORDS; | ||
143 | |||
144 | orig_node->bcast_own = kzalloc(size, GFP_ATOMIC); | ||
145 | if (!orig_node->bcast_own) | ||
146 | goto free_orig_node; | ||
147 | |||
148 | size = num_ifs * sizeof(uint8_t); | ||
149 | orig_node->bcast_own_sum = kzalloc(size, GFP_ATOMIC); | ||
150 | if (!orig_node->bcast_own_sum) | ||
151 | goto free_bcast_own; | ||
152 | |||
153 | if (hash_add(orig_hash, orig_node) < 0) | ||
154 | goto free_bcast_own_sum; | ||
155 | |||
156 | if (orig_hash->elements * 4 > orig_hash->size) { | ||
157 | swaphash = hash_resize(orig_hash, orig_hash->size * 2); | ||
158 | |||
159 | if (swaphash == NULL) | ||
160 | printk(KERN_ERR | ||
161 | "batman-adv:Couldn't resize orig hash table \n"); | ||
162 | else | ||
163 | orig_hash = swaphash; | ||
164 | } | ||
165 | |||
166 | return orig_node; | ||
167 | free_bcast_own_sum: | ||
168 | kfree(orig_node->bcast_own_sum); | ||
169 | free_bcast_own: | ||
170 | kfree(orig_node->bcast_own); | ||
171 | free_orig_node: | ||
172 | kfree(orig_node); | ||
173 | return NULL; | ||
174 | } | ||
175 | |||
176 | static bool purge_orig_neighbors(struct orig_node *orig_node, | ||
177 | struct neigh_node **best_neigh_node) | ||
178 | { | ||
179 | struct list_head *list_pos, *list_pos_tmp; | ||
180 | struct neigh_node *neigh_node; | ||
181 | bool neigh_purged = false; | ||
182 | |||
183 | *best_neigh_node = NULL; | ||
184 | |||
185 | |||
186 | /* for all neighbors towards this originator ... */ | ||
187 | list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) { | ||
188 | neigh_node = list_entry(list_pos, struct neigh_node, list); | ||
189 | |||
190 | if (time_after(jiffies, | ||
191 | (neigh_node->last_valid + | ||
192 | ((PURGE_TIMEOUT * HZ) / 1000)))) { | ||
193 | |||
194 | bat_dbg(DBG_BATMAN, "neighbor timeout: originator %pM, neighbor: %pM, last_valid %lu\n", orig_node->orig, neigh_node->addr, (neigh_node->last_valid / HZ)); | ||
195 | |||
196 | neigh_purged = true; | ||
197 | list_del(list_pos); | ||
198 | kfree(neigh_node); | ||
199 | } else { | ||
200 | if ((*best_neigh_node == NULL) || | ||
201 | (neigh_node->tq_avg > (*best_neigh_node)->tq_avg)) | ||
202 | *best_neigh_node = neigh_node; | ||
203 | } | ||
204 | } | ||
205 | return neigh_purged; | ||
206 | } | ||
207 | |||
208 | |||
209 | static bool purge_orig_node(struct orig_node *orig_node) | ||
210 | { | ||
211 | struct neigh_node *best_neigh_node; | ||
212 | |||
213 | if (time_after(jiffies, | ||
214 | (orig_node->last_valid + | ||
215 | ((2 * PURGE_TIMEOUT * HZ) / 1000)))) { | ||
216 | |||
217 | bat_dbg(DBG_BATMAN, | ||
218 | "Originator timeout: originator %pM, last_valid %lu\n", | ||
219 | orig_node->orig, (orig_node->last_valid / HZ)); | ||
220 | return true; | ||
221 | } else { | ||
222 | if (purge_orig_neighbors(orig_node, &best_neigh_node)) | ||
223 | update_routes(orig_node, best_neigh_node, | ||
224 | orig_node->hna_buff, | ||
225 | orig_node->hna_buff_len); | ||
226 | } | ||
227 | return false; | ||
228 | } | ||
229 | |||
230 | void purge_orig(struct work_struct *work) | ||
231 | { | ||
232 | HASHIT(hashit); | ||
233 | struct orig_node *orig_node; | ||
234 | unsigned long flags; | ||
235 | |||
236 | spin_lock_irqsave(&orig_hash_lock, flags); | ||
237 | |||
238 | /* for all origins... */ | ||
239 | while (hash_iterate(orig_hash, &hashit)) { | ||
240 | orig_node = hashit.bucket->data; | ||
241 | if (purge_orig_node(orig_node)) { | ||
242 | hash_remove_bucket(orig_hash, &hashit); | ||
243 | free_orig_node(orig_node); | ||
244 | } | ||
245 | } | ||
246 | |||
247 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
248 | |||
249 | start_purge_timer(); | ||
250 | } | ||
251 | |||
252 | |||
diff --git a/drivers/staging/batman-adv/log.h b/drivers/staging/batman-adv/originator.h index 780e3abb48f9..6ef7a054a0a9 100644 --- a/drivers/staging/batman-adv/log.h +++ b/drivers/staging/batman-adv/originator.h | |||
@@ -19,14 +19,13 @@ | |||
19 | * | 19 | * |
20 | */ | 20 | */ |
21 | 21 | ||
22 | extern const struct file_operations proc_log_operations; | 22 | int originator_init(void); |
23 | extern uint8_t log_level; | 23 | void free_orig_node(void *data); |
24 | void originator_free(void); | ||
25 | void purge_orig(struct work_struct *work); | ||
26 | struct orig_node *orig_find(char *mac); | ||
27 | struct orig_node *get_orig_node(uint8_t *addr); | ||
28 | struct neigh_node * | ||
29 | create_neighbor(struct orig_node *orig_node, struct orig_node *orig_neigh_node, | ||
30 | uint8_t *neigh, struct batman_if *if_incoming); | ||
24 | 31 | ||
25 | int debug_log(int type, char *fmt, ...); | ||
26 | int log_open(struct inode *inode, struct file *file); | ||
27 | int log_release(struct inode *inode, struct file *file); | ||
28 | ssize_t log_read(struct file *file, char __user *buf, size_t count, | ||
29 | loff_t *ppos); | ||
30 | ssize_t log_write(struct file *file, const char __user *buf, size_t count, | ||
31 | loff_t *ppos); | ||
32 | unsigned int log_poll(struct file *file, poll_table *wait); | ||
diff --git a/drivers/staging/batman-adv/packet.h b/drivers/staging/batman-adv/packet.h index 5627ca326018..ad006ce8b131 100644 --- a/drivers/staging/batman-adv/packet.h +++ b/drivers/staging/batman-adv/packet.h | |||
@@ -90,7 +90,7 @@ struct vis_packet { | |||
90 | uint8_t entries; /* number of entries behind this struct */ | 90 | uint8_t entries; /* number of entries behind this struct */ |
91 | uint8_t ttl; /* TTL */ | 91 | uint8_t ttl; /* TTL */ |
92 | uint8_t vis_orig[6]; /* originator that informs about its | 92 | uint8_t vis_orig[6]; /* originator that informs about its |
93 | * neighbours */ | 93 | * neighbors */ |
94 | uint8_t target_orig[6]; /* who should receive this packet */ | 94 | uint8_t target_orig[6]; /* who should receive this packet */ |
95 | uint8_t sender_orig[6]; /* who sent or rebroadcasted this packet */ | 95 | uint8_t sender_orig[6]; /* who sent or rebroadcasted this packet */ |
96 | } __attribute__((packed)); | 96 | } __attribute__((packed)); |
diff --git a/drivers/staging/batman-adv/proc.c b/drivers/staging/batman-adv/proc.c index aac3df7f13fb..7de60e84bc96 100644 --- a/drivers/staging/batman-adv/proc.c +++ b/drivers/staging/batman-adv/proc.c | |||
@@ -21,23 +21,18 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "proc.h" | 23 | #include "proc.h" |
24 | #include "log.h" | ||
25 | #include "routing.h" | 24 | #include "routing.h" |
26 | #include "translation-table.h" | 25 | #include "translation-table.h" |
27 | #include "hard-interface.h" | 26 | #include "hard-interface.h" |
28 | #include "types.h" | 27 | #include "types.h" |
29 | #include "hash.h" | 28 | #include "hash.h" |
30 | #include "vis.h" | 29 | #include "vis.h" |
31 | #include "compat.h" | ||
32 | |||
33 | static uint8_t vis_format = DOT_DRAW; | ||
34 | 30 | ||
35 | static struct proc_dir_entry *proc_batman_dir, *proc_interface_file; | 31 | static struct proc_dir_entry *proc_batman_dir, *proc_interface_file; |
36 | static struct proc_dir_entry *proc_orig_interval_file, *proc_originators_file; | 32 | static struct proc_dir_entry *proc_orig_interval_file, *proc_originators_file; |
37 | static struct proc_dir_entry *proc_log_file, *proc_log_level_file; | ||
38 | static struct proc_dir_entry *proc_transt_local_file; | 33 | static struct proc_dir_entry *proc_transt_local_file; |
39 | static struct proc_dir_entry *proc_transt_global_file; | 34 | static struct proc_dir_entry *proc_transt_global_file; |
40 | static struct proc_dir_entry *proc_vis_file, *proc_vis_format_file; | 35 | static struct proc_dir_entry *proc_vis_srv_file, *proc_vis_data_file; |
41 | static struct proc_dir_entry *proc_aggr_file; | 36 | static struct proc_dir_entry *proc_aggr_file; |
42 | 37 | ||
43 | static int proc_interfaces_read(struct seq_file *seq, void *offset) | 38 | static int proc_interfaces_read(struct seq_file *seq, void *offset) |
@@ -68,7 +63,7 @@ static ssize_t proc_interfaces_write(struct file *instance, | |||
68 | size_t count, loff_t *data) | 63 | size_t count, loff_t *data) |
69 | { | 64 | { |
70 | char *if_string, *colon_ptr = NULL, *cr_ptr = NULL; | 65 | char *if_string, *colon_ptr = NULL, *cr_ptr = NULL; |
71 | int not_copied = 0, if_num = 0; | 66 | int not_copied = 0, if_num = 0, add_success; |
72 | struct batman_if *batman_if = NULL; | 67 | struct batman_if *batman_if = NULL; |
73 | 68 | ||
74 | if_string = kmalloc(count, GFP_KERNEL); | 69 | if_string = kmalloc(count, GFP_KERNEL); |
@@ -77,8 +72,7 @@ static ssize_t proc_interfaces_write(struct file *instance, | |||
77 | return -ENOMEM; | 72 | return -ENOMEM; |
78 | 73 | ||
79 | if (count > IFNAMSIZ - 1) { | 74 | if (count > IFNAMSIZ - 1) { |
80 | debug_log(LOG_TYPE_WARN, | 75 | printk(KERN_WARNING "batman-adv:Can't add interface: device name is too long\n"); |
81 | "Can't add interface: device name is too long\n"); | ||
82 | goto end; | 76 | goto end; |
83 | } | 77 | } |
84 | 78 | ||
@@ -105,7 +99,7 @@ static ssize_t proc_interfaces_write(struct file *instance, | |||
105 | rcu_read_lock(); | 99 | rcu_read_lock(); |
106 | list_for_each_entry_rcu(batman_if, &if_list, list) { | 100 | list_for_each_entry_rcu(batman_if, &if_list, list) { |
107 | if (strncmp(batman_if->dev, if_string, count) == 0) { | 101 | if (strncmp(batman_if->dev, if_string, count) == 0) { |
108 | debug_log(LOG_TYPE_WARN, "Given interface is already active: %s\n", if_string); | 102 | printk(KERN_ERR "batman-adv:Given interface is already active: %s\n", if_string); |
109 | rcu_read_unlock(); | 103 | rcu_read_unlock(); |
110 | goto end; | 104 | goto end; |
111 | 105 | ||
@@ -115,22 +109,17 @@ static ssize_t proc_interfaces_write(struct file *instance, | |||
115 | } | 109 | } |
116 | rcu_read_unlock(); | 110 | rcu_read_unlock(); |
117 | 111 | ||
118 | hardif_add_interface(if_string, if_num); | 112 | add_success = hardif_add_interface(if_string, if_num); |
113 | if (add_success < 0) | ||
114 | goto end; | ||
115 | |||
116 | num_ifs = if_num + 1; | ||
119 | 117 | ||
120 | if ((atomic_read(&module_state) == MODULE_INACTIVE) && | 118 | if ((atomic_read(&module_state) == MODULE_INACTIVE) && |
121 | (hardif_get_active_if_num() > 0)) | 119 | (hardif_get_active_if_num() > 0)) |
122 | activate_module(); | 120 | activate_module(); |
123 | 121 | ||
124 | rcu_read_lock(); | ||
125 | if (list_empty(&if_list)) { | ||
126 | rcu_read_unlock(); | ||
127 | goto end; | ||
128 | } | ||
129 | rcu_read_unlock(); | ||
130 | |||
131 | num_ifs = if_num + 1; | ||
132 | return count; | 122 | return count; |
133 | |||
134 | end: | 123 | end: |
135 | kfree(if_string); | 124 | kfree(if_string); |
136 | return count; | 125 | return count; |
@@ -162,20 +151,18 @@ static ssize_t proc_orig_interval_write(struct file *file, | |||
162 | 151 | ||
163 | retval = strict_strtoul(interval_string, 10, &originator_interval_tmp); | 152 | retval = strict_strtoul(interval_string, 10, &originator_interval_tmp); |
164 | if (retval) { | 153 | if (retval) { |
165 | debug_log(LOG_TYPE_WARN, "New originator interval invalid\n"); | 154 | printk(KERN_ERR "batman-adv:New originator interval invalid\n"); |
166 | goto end; | 155 | goto end; |
167 | } | 156 | } |
168 | 157 | ||
169 | if (originator_interval_tmp <= JITTER * 2) { | 158 | if (originator_interval_tmp <= JITTER * 2) { |
170 | debug_log(LOG_TYPE_WARN, | 159 | printk(KERN_WARNING "batman-adv:New originator interval too small: %li (min: %i)\n", |
171 | "New originator interval too small: %i (min: %i)\n", | 160 | originator_interval_tmp, JITTER * 2); |
172 | originator_interval_tmp, JITTER * 2); | ||
173 | goto end; | 161 | goto end; |
174 | } | 162 | } |
175 | 163 | ||
176 | debug_log(LOG_TYPE_NOTICE, | 164 | printk(KERN_INFO "batman-adv:Changing originator interval from: %i to: %li\n", |
177 | "Changing originator interval from: %i to: %i\n", | 165 | atomic_read(&originator_interval), originator_interval_tmp); |
178 | atomic_read(&originator_interval), originator_interval_tmp); | ||
179 | 166 | ||
180 | atomic_set(&originator_interval, originator_interval_tmp); | 167 | atomic_set(&originator_interval, originator_interval_tmp); |
181 | 168 | ||
@@ -191,11 +178,12 @@ static int proc_orig_interval_open(struct inode *inode, struct file *file) | |||
191 | 178 | ||
192 | static int proc_originators_read(struct seq_file *seq, void *offset) | 179 | static int proc_originators_read(struct seq_file *seq, void *offset) |
193 | { | 180 | { |
194 | struct hash_it_t *hashit = NULL; | 181 | HASHIT(hashit); |
195 | struct orig_node *orig_node; | 182 | struct orig_node *orig_node; |
196 | struct neigh_node *neigh_node; | 183 | struct neigh_node *neigh_node; |
197 | int batman_count = 0; | 184 | int batman_count = 0; |
198 | char orig_str[ETH_STR_LEN], router_str[ETH_STR_LEN]; | 185 | char orig_str[ETH_STR_LEN], router_str[ETH_STR_LEN]; |
186 | unsigned long flags; | ||
199 | 187 | ||
200 | rcu_read_lock(); | 188 | rcu_read_lock(); |
201 | if (list_empty(&if_list)) { | 189 | if (list_empty(&if_list)) { |
@@ -218,11 +206,11 @@ static int proc_originators_read(struct seq_file *seq, void *offset) | |||
218 | ((struct batman_if *)if_list.next)->addr_str); | 206 | ((struct batman_if *)if_list.next)->addr_str); |
219 | 207 | ||
220 | rcu_read_unlock(); | 208 | rcu_read_unlock(); |
221 | spin_lock(&orig_hash_lock); | 209 | spin_lock_irqsave(&orig_hash_lock, flags); |
222 | 210 | ||
223 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 211 | while (hash_iterate(orig_hash, &hashit)) { |
224 | 212 | ||
225 | orig_node = hashit->bucket->data; | 213 | orig_node = hashit.bucket->data; |
226 | 214 | ||
227 | if (!orig_node->router) | 215 | if (!orig_node->router) |
228 | continue; | 216 | continue; |
@@ -249,7 +237,7 @@ static int proc_originators_read(struct seq_file *seq, void *offset) | |||
249 | 237 | ||
250 | } | 238 | } |
251 | 239 | ||
252 | spin_unlock(&orig_hash_lock); | 240 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
253 | 241 | ||
254 | if (batman_count == 0) | 242 | if (batman_count == 0) |
255 | seq_printf(seq, "No batman nodes in range ... \n"); | 243 | seq_printf(seq, "No batman nodes in range ... \n"); |
@@ -263,84 +251,6 @@ static int proc_originators_open(struct inode *inode, struct file *file) | |||
263 | return single_open(file, proc_originators_read, NULL); | 251 | return single_open(file, proc_originators_read, NULL); |
264 | } | 252 | } |
265 | 253 | ||
266 | static int proc_log_level_read(struct seq_file *seq, void *offset) | ||
267 | { | ||
268 | |||
269 | seq_printf(seq, "[x] %s (%d)\n", LOG_TYPE_CRIT_NAME, LOG_TYPE_CRIT); | ||
270 | seq_printf(seq, "[%c] %s (%d)\n", | ||
271 | (LOG_TYPE_WARN & log_level) ? 'x' : ' ', | ||
272 | LOG_TYPE_WARN_NAME, LOG_TYPE_WARN); | ||
273 | seq_printf(seq, "[%c] %s (%d)\n", | ||
274 | (LOG_TYPE_NOTICE & log_level) ? 'x' : ' ', | ||
275 | LOG_TYPE_NOTICE_NAME, LOG_TYPE_NOTICE); | ||
276 | seq_printf(seq, "[%c] %s (%d)\n", | ||
277 | (LOG_TYPE_BATMAN & log_level) ? 'x' : ' ', | ||
278 | LOG_TYPE_BATMAN_NAME, LOG_TYPE_BATMAN); | ||
279 | seq_printf(seq, "[%c] %s (%d)\n", | ||
280 | (LOG_TYPE_ROUTES & log_level) ? 'x' : ' ', | ||
281 | LOG_TYPE_ROUTES_NAME, LOG_TYPE_ROUTES); | ||
282 | return 0; | ||
283 | } | ||
284 | |||
285 | static int proc_log_level_open(struct inode *inode, struct file *file) | ||
286 | { | ||
287 | return single_open(file, proc_log_level_read, NULL); | ||
288 | } | ||
289 | |||
290 | static ssize_t proc_log_level_write(struct file *instance, | ||
291 | const char __user *userbuffer, | ||
292 | size_t count, loff_t *data) | ||
293 | { | ||
294 | char *log_level_string, *tokptr, *cp; | ||
295 | int finished, not_copied = 0; | ||
296 | unsigned long log_level_tmp = 0; | ||
297 | |||
298 | log_level_string = kmalloc(count, GFP_KERNEL); | ||
299 | |||
300 | if (!log_level_string) | ||
301 | return -ENOMEM; | ||
302 | |||
303 | not_copied = copy_from_user(log_level_string, userbuffer, count); | ||
304 | log_level_string[count - not_copied - 1] = 0; | ||
305 | |||
306 | if (strict_strtoul(log_level_string, 10, &log_level_tmp) < 0) { | ||
307 | /* was not a number, doing textual parsing */ | ||
308 | log_level_tmp = 0; | ||
309 | tokptr = log_level_string; | ||
310 | |||
311 | for (cp = log_level_string, finished = 0; !finished; cp++) { | ||
312 | switch (*cp) { | ||
313 | case 0: | ||
314 | finished = 1; | ||
315 | case ' ': | ||
316 | case '\n': | ||
317 | case '\t': | ||
318 | *cp = 0; | ||
319 | /* compare */ | ||
320 | if (strcmp(tokptr, LOG_TYPE_WARN_NAME) == 0) | ||
321 | log_level_tmp |= LOG_TYPE_WARN; | ||
322 | if (strcmp(tokptr, LOG_TYPE_NOTICE_NAME) == 0) | ||
323 | log_level_tmp |= LOG_TYPE_NOTICE; | ||
324 | if (strcmp(tokptr, LOG_TYPE_BATMAN_NAME) == 0) | ||
325 | log_level_tmp |= LOG_TYPE_BATMAN; | ||
326 | if (strcmp(tokptr, LOG_TYPE_ROUTES_NAME) == 0) | ||
327 | log_level_tmp |= LOG_TYPE_ROUTES; | ||
328 | tokptr = cp + 1; | ||
329 | break; | ||
330 | default: | ||
331 | ; | ||
332 | } | ||
333 | } | ||
334 | } | ||
335 | |||
336 | debug_log(LOG_TYPE_CRIT, "Changing log_level from: %i to: %i\n", | ||
337 | log_level, log_level_tmp); | ||
338 | log_level = log_level_tmp; | ||
339 | |||
340 | kfree(log_level_string); | ||
341 | return count; | ||
342 | } | ||
343 | |||
344 | static int proc_transt_local_read(struct seq_file *seq, void *offset) | 254 | static int proc_transt_local_read(struct seq_file *seq, void *offset) |
345 | { | 255 | { |
346 | char *buf; | 256 | char *buf; |
@@ -405,172 +315,8 @@ static int proc_transt_global_open(struct inode *inode, struct file *file) | |||
405 | return single_open(file, proc_transt_global_read, NULL); | 315 | return single_open(file, proc_transt_global_read, NULL); |
406 | } | 316 | } |
407 | 317 | ||
408 | /* insert interface to the list of interfaces of one originator */ | ||
409 | |||
410 | static void proc_vis_insert_interface(const uint8_t *interface, | ||
411 | struct vis_if_list **if_entry, | ||
412 | bool primary) | ||
413 | { | ||
414 | /* Did we get an empty list? (then insert imediately) */ | ||
415 | if(*if_entry == NULL) { | ||
416 | *if_entry = kmalloc(sizeof(struct vis_if_list), GFP_KERNEL); | ||
417 | if (*if_entry == NULL) | ||
418 | return; | ||
419 | |||
420 | (*if_entry)->primary = primary; | ||
421 | (*if_entry)->next = NULL; | ||
422 | memcpy((*if_entry)->addr, interface, ETH_ALEN); | ||
423 | } else { | ||
424 | struct vis_if_list *head_if_entry = *if_entry; | ||
425 | /* Do we already have this interface in our list? */ | ||
426 | while (!compare_orig((*if_entry)->addr, (void *)interface)) { | ||
427 | |||
428 | /* Or did we reach the end (then append the interface) */ | ||
429 | if ((*if_entry)->next == NULL) { | ||
430 | (*if_entry)->next = kmalloc(sizeof(struct vis_if_list), GFP_KERNEL); | ||
431 | if ((*if_entry)->next == NULL) | ||
432 | return; | ||
433 | |||
434 | memcpy((*if_entry)->next->addr, interface, ETH_ALEN); | ||
435 | (*if_entry)->next->primary = primary; | ||
436 | (*if_entry)->next->next = NULL; | ||
437 | break; | ||
438 | } | ||
439 | *if_entry = (*if_entry)->next; | ||
440 | } | ||
441 | /* Rewind the list to its head */ | ||
442 | *if_entry = head_if_entry; | ||
443 | } | ||
444 | } | ||
445 | /* read an entry */ | ||
446 | |||
447 | static void proc_vis_read_entry(struct seq_file *seq, | ||
448 | struct vis_info_entry *entry, | ||
449 | struct vis_if_list **if_entry, | ||
450 | uint8_t *vis_orig, | ||
451 | uint8_t current_format, | ||
452 | uint8_t first_line) | ||
453 | { | ||
454 | char from[40]; | ||
455 | char to[40]; | ||
456 | int int_part, frac_part; | ||
457 | |||
458 | addr_to_string(to, entry->dest); | ||
459 | if (entry->quality == 0) { | ||
460 | #ifndef VIS_SUBCLUSTERS_DISABLED | ||
461 | proc_vis_insert_interface(vis_orig, if_entry, true); | ||
462 | #endif /* VIS_SUBCLUSTERS_DISABLED */ | ||
463 | addr_to_string(from, vis_orig); | ||
464 | if (current_format == DOT_DRAW) { | ||
465 | seq_printf(seq, "\t\"%s\" -> \"%s\" [label=\"HNA\"]\n", | ||
466 | from, to); | ||
467 | } else { | ||
468 | seq_printf(seq, | ||
469 | "%s\t{ router : \"%s\", gateway : \"%s\", label : \"HNA\" }", | ||
470 | (first_line ? "" : ",\n"), from, to); | ||
471 | } | ||
472 | } else { | ||
473 | #ifndef VIS_SUBCLUSTERS_DISABLED | ||
474 | proc_vis_insert_interface(entry->src, if_entry, compare_orig(entry->src, vis_orig)); | ||
475 | #endif /* VIS_SUBCLUSTERS_DISABLED */ | ||
476 | addr_to_string(from, entry->src); | ||
477 | |||
478 | /* kernel has no printf-support for %f? it'd be better to return | ||
479 | * this in float. */ | ||
480 | |||
481 | int_part = TQ_MAX_VALUE / entry->quality; | ||
482 | frac_part = 1000 * TQ_MAX_VALUE / entry->quality - int_part * 1000; | ||
483 | |||
484 | if (current_format == DOT_DRAW) { | ||
485 | seq_printf(seq, | ||
486 | "\t\"%s\" -> \"%s\" [label=\"%d.%d\"]\n", | ||
487 | from, to, int_part, frac_part); | ||
488 | } else { | ||
489 | seq_printf(seq, | ||
490 | "%s\t{ router : \"%s\", neighbour : \"%s\", label : %d.%d }", | ||
491 | (first_line ? "" : ",\n"), from, to, int_part, frac_part); | ||
492 | } | ||
493 | } | ||
494 | } | ||
495 | |||
496 | |||
497 | static int proc_vis_read(struct seq_file *seq, void *offset) | ||
498 | { | ||
499 | struct hash_it_t *hashit = NULL; | ||
500 | struct vis_info *info; | ||
501 | struct vis_info_entry *entries; | ||
502 | struct vis_if_list *if_entries = NULL; | ||
503 | int i; | ||
504 | uint8_t current_format, first_line = 1; | ||
505 | #ifndef VIS_SUBCLUSTERS_DISABLED | ||
506 | char tmp_addr_str[ETH_STR_LEN]; | ||
507 | struct vis_if_list *tmp_if_next; | ||
508 | #endif /* VIS_SUBCLUSTERS_DISABLED */ | ||
509 | |||
510 | current_format = vis_format; | ||
511 | |||
512 | rcu_read_lock(); | ||
513 | if (list_empty(&if_list) || (!is_vis_server())) { | ||
514 | rcu_read_unlock(); | ||
515 | if (current_format == DOT_DRAW) | ||
516 | seq_printf(seq, "digraph {\n}\n"); | ||
517 | goto end; | ||
518 | } | ||
519 | |||
520 | rcu_read_unlock(); | ||
521 | |||
522 | if (current_format == DOT_DRAW) | ||
523 | seq_printf(seq, "digraph {\n"); | ||
524 | |||
525 | spin_lock(&vis_hash_lock); | ||
526 | while (NULL != (hashit = hash_iterate(vis_hash, hashit))) { | ||
527 | info = hashit->bucket->data; | ||
528 | entries = (struct vis_info_entry *) | ||
529 | ((char *)info + sizeof(struct vis_info)); | ||
530 | |||
531 | for (i = 0; i < info->packet.entries; i++) { | ||
532 | proc_vis_read_entry(seq, &entries[i], &if_entries, | ||
533 | info->packet.vis_orig, | ||
534 | current_format, first_line); | ||
535 | if (first_line) | ||
536 | first_line = 0; | ||
537 | } | ||
538 | |||
539 | #ifndef VIS_SUBCLUSTERS_DISABLED | ||
540 | /* Generate subgraphs from the collected items */ | ||
541 | if (current_format == DOT_DRAW) { | ||
542 | |||
543 | addr_to_string(tmp_addr_str, info->packet.vis_orig); | ||
544 | seq_printf(seq, "\tsubgraph \"cluster_%s\" {\n", tmp_addr_str); | ||
545 | while (if_entries != NULL) { | ||
546 | |||
547 | addr_to_string(tmp_addr_str, if_entries->addr); | ||
548 | if (if_entries->primary) | ||
549 | seq_printf(seq, "\t\t\"%s\" [peripheries=2]\n", tmp_addr_str); | ||
550 | else | ||
551 | seq_printf(seq, "\t\t\"%s\"\n", tmp_addr_str); | ||
552 | |||
553 | /* ... and empty the list while doing this */ | ||
554 | tmp_if_next = if_entries->next; | ||
555 | kfree(if_entries); | ||
556 | if_entries = tmp_if_next; | ||
557 | } | ||
558 | seq_printf(seq, "\t}\n"); | ||
559 | } | ||
560 | #endif /* VIS_SUBCLUSTERS_DISABLED */ | ||
561 | } | ||
562 | spin_unlock(&vis_hash_lock); | ||
563 | |||
564 | if (current_format == DOT_DRAW) | ||
565 | seq_printf(seq, "}\n"); | ||
566 | else | ||
567 | seq_printf(seq, "\n"); | ||
568 | end: | ||
569 | return 0; | ||
570 | } | ||
571 | |||
572 | /* setting the mode of the vis server by the user */ | 318 | /* setting the mode of the vis server by the user */ |
573 | static ssize_t proc_vis_write(struct file *file, const char __user * buffer, | 319 | static ssize_t proc_vis_srv_write(struct file *file, const char __user * buffer, |
574 | size_t count, loff_t *ppos) | 320 | size_t count, loff_t *ppos) |
575 | { | 321 | { |
576 | char *vis_mode_string; | 322 | char *vis_mode_string; |
@@ -584,72 +330,84 @@ static ssize_t proc_vis_write(struct file *file, const char __user * buffer, | |||
584 | not_copied = copy_from_user(vis_mode_string, buffer, count); | 330 | not_copied = copy_from_user(vis_mode_string, buffer, count); |
585 | vis_mode_string[count - not_copied - 1] = 0; | 331 | vis_mode_string[count - not_copied - 1] = 0; |
586 | 332 | ||
587 | if (strcmp(vis_mode_string, "client") == 0) { | 333 | if ((strcmp(vis_mode_string, "client") == 0) || |
588 | debug_log(LOG_TYPE_NOTICE, "Setting VIS mode to client\n"); | 334 | (strcmp(vis_mode_string, "disabled") == 0)) { |
589 | vis_set_mode(VIS_TYPE_CLIENT_UPDATE); | 335 | printk(KERN_INFO "batman-adv:Setting VIS mode to client (disabling vis server)\n"); |
590 | } else if (strcmp(vis_mode_string, "server") == 0) { | 336 | atomic_set(&vis_mode, VIS_TYPE_CLIENT_UPDATE); |
591 | debug_log(LOG_TYPE_NOTICE, "Setting VIS mode to server\n"); | 337 | } else if ((strcmp(vis_mode_string, "server") == 0) || |
592 | vis_set_mode(VIS_TYPE_SERVER_SYNC); | 338 | (strcmp(vis_mode_string, "enabled") == 0)) { |
339 | printk(KERN_INFO "batman-adv:Setting VIS mode to server (enabling vis server)\n"); | ||
340 | atomic_set(&vis_mode, VIS_TYPE_SERVER_SYNC); | ||
593 | } else | 341 | } else |
594 | debug_log(LOG_TYPE_WARN, "Unknown VIS mode: %s\n", | 342 | printk(KERN_ERR "batman-adv:Unknown VIS mode: %s\n", |
595 | vis_mode_string); | 343 | vis_mode_string); |
596 | 344 | ||
597 | kfree(vis_mode_string); | 345 | kfree(vis_mode_string); |
598 | return count; | 346 | return count; |
599 | } | 347 | } |
600 | 348 | ||
601 | static int proc_vis_open(struct inode *inode, struct file *file) | 349 | static int proc_vis_srv_read(struct seq_file *seq, void *offset) |
602 | { | 350 | { |
603 | return single_open(file, proc_vis_read, NULL); | 351 | int vis_server = atomic_read(&vis_mode); |
604 | } | 352 | |
353 | seq_printf(seq, "[%c] client mode (server disabled) \n", | ||
354 | (vis_server == VIS_TYPE_CLIENT_UPDATE) ? 'x' : ' '); | ||
355 | seq_printf(seq, "[%c] server mode (server enabled) \n", | ||
356 | (vis_server == VIS_TYPE_SERVER_SYNC) ? 'x' : ' '); | ||
605 | 357 | ||
606 | static int proc_vis_format_read(struct seq_file *seq, void *offset) | ||
607 | { | ||
608 | uint8_t current_format = vis_format; | ||
609 | |||
610 | seq_printf(seq, "[%c] %s\n", | ||
611 | (current_format == DOT_DRAW) ? 'x' : ' ', | ||
612 | VIS_FORMAT_DD_NAME); | ||
613 | seq_printf(seq, "[%c] %s\n", | ||
614 | (current_format == JSON) ? 'x' : ' ', | ||
615 | VIS_FORMAT_JSON_NAME); | ||
616 | return 0; | 358 | return 0; |
617 | } | 359 | } |
618 | 360 | ||
619 | static int proc_vis_format_open(struct inode *inode, struct file *file) | 361 | static int proc_vis_srv_open(struct inode *inode, struct file *file) |
620 | { | 362 | { |
621 | return single_open(file, proc_vis_format_read, NULL); | 363 | return single_open(file, proc_vis_srv_read, NULL); |
622 | } | 364 | } |
623 | 365 | ||
624 | static ssize_t proc_vis_format_write(struct file *file, | 366 | static int proc_vis_data_read(struct seq_file *seq, void *offset) |
625 | const char __user *buffer, | ||
626 | size_t count, loff_t *ppos) | ||
627 | { | 367 | { |
628 | char *vis_format_string; | 368 | HASHIT(hashit); |
629 | int not_copied = 0; | 369 | struct vis_info *info; |
370 | struct vis_info_entry *entries; | ||
371 | HLIST_HEAD(vis_if_list); | ||
372 | int i; | ||
373 | char tmp_addr_str[ETH_STR_LEN]; | ||
374 | unsigned long flags; | ||
375 | int vis_server = atomic_read(&vis_mode); | ||
376 | |||
377 | rcu_read_lock(); | ||
378 | if (list_empty(&if_list) || (vis_server == VIS_TYPE_CLIENT_UPDATE)) { | ||
379 | rcu_read_unlock(); | ||
380 | goto end; | ||
381 | } | ||
630 | 382 | ||
631 | vis_format_string = kmalloc(count, GFP_KERNEL); | 383 | rcu_read_unlock(); |
632 | 384 | ||
633 | if (!vis_format_string) | 385 | spin_lock_irqsave(&vis_hash_lock, flags); |
634 | return -ENOMEM; | 386 | while (hash_iterate(vis_hash, &hashit)) { |
387 | info = hashit.bucket->data; | ||
388 | entries = (struct vis_info_entry *) | ||
389 | ((char *)info + sizeof(struct vis_info)); | ||
390 | addr_to_string(tmp_addr_str, info->packet.vis_orig); | ||
391 | seq_printf(seq, "%s,", tmp_addr_str); | ||
635 | 392 | ||
636 | not_copied = copy_from_user(vis_format_string, buffer, count); | 393 | for (i = 0; i < info->packet.entries; i++) { |
637 | vis_format_string[count - not_copied - 1] = 0; | 394 | proc_vis_read_entry(seq, &entries[i], &vis_if_list, |
638 | 395 | info->packet.vis_orig); | |
639 | if (strcmp(vis_format_string, VIS_FORMAT_DD_NAME) == 0) { | 396 | } |
640 | debug_log(LOG_TYPE_NOTICE, "Setting VIS output format to: %s\n", | ||
641 | VIS_FORMAT_DD_NAME); | ||
642 | vis_format = DOT_DRAW; | ||
643 | } else if (strcmp(vis_format_string, VIS_FORMAT_JSON_NAME) == 0) { | ||
644 | debug_log(LOG_TYPE_NOTICE, "Setting VIS output format to: %s\n", | ||
645 | VIS_FORMAT_JSON_NAME); | ||
646 | vis_format = JSON; | ||
647 | } else | ||
648 | debug_log(LOG_TYPE_WARN, "Unknown VIS output format: %s\n", | ||
649 | vis_format_string); | ||
650 | 397 | ||
651 | kfree(vis_format_string); | 398 | /* add primary/secondary records */ |
652 | return count; | 399 | proc_vis_read_prim_sec(seq, &vis_if_list); |
400 | seq_printf(seq, "\n"); | ||
401 | } | ||
402 | spin_unlock_irqrestore(&vis_hash_lock, flags); | ||
403 | |||
404 | end: | ||
405 | return 0; | ||
406 | } | ||
407 | |||
408 | static int proc_vis_data_open(struct inode *inode, struct file *file) | ||
409 | { | ||
410 | return single_open(file, proc_vis_data_read, NULL); | ||
653 | } | 411 | } |
654 | 412 | ||
655 | static int proc_aggr_read(struct seq_file *seq, void *offset) | 413 | static int proc_aggr_read(struct seq_file *seq, void *offset) |
@@ -665,6 +423,7 @@ static ssize_t proc_aggr_write(struct file *file, const char __user *buffer, | |||
665 | char *aggr_string; | 423 | char *aggr_string; |
666 | int not_copied = 0; | 424 | int not_copied = 0; |
667 | unsigned long aggregation_enabled_tmp; | 425 | unsigned long aggregation_enabled_tmp; |
426 | int retval; | ||
668 | 427 | ||
669 | aggr_string = kmalloc(count, GFP_KERNEL); | 428 | aggr_string = kmalloc(count, GFP_KERNEL); |
670 | 429 | ||
@@ -674,22 +433,21 @@ static ssize_t proc_aggr_write(struct file *file, const char __user *buffer, | |||
674 | not_copied = copy_from_user(aggr_string, buffer, count); | 433 | not_copied = copy_from_user(aggr_string, buffer, count); |
675 | aggr_string[count - not_copied - 1] = 0; | 434 | aggr_string[count - not_copied - 1] = 0; |
676 | 435 | ||
677 | strict_strtoul(aggr_string, 10, &aggregation_enabled_tmp); | 436 | retval = strict_strtoul(aggr_string, 10, &aggregation_enabled_tmp); |
678 | 437 | ||
679 | if ((aggregation_enabled_tmp != 0) && (aggregation_enabled_tmp != 1)) { | 438 | if (retval || aggregation_enabled_tmp > 1) { |
680 | debug_log(LOG_TYPE_WARN, "Aggregation can only be enabled (1) or disabled (0), given value: %li\n", aggregation_enabled_tmp); | 439 | printk(KERN_ERR "batman-adv:Aggregation can only be enabled (1) or disabled (0), given value: %li\n", aggregation_enabled_tmp); |
681 | goto end; | 440 | } else { |
441 | printk(KERN_INFO "batman-adv:Changing aggregation from: %s (%i) to: %s (%li)\n", | ||
442 | (atomic_read(&aggregation_enabled) == 1 ? | ||
443 | "enabled" : "disabled"), | ||
444 | atomic_read(&aggregation_enabled), | ||
445 | (aggregation_enabled_tmp == 1 ? "enabled" : "disabled"), | ||
446 | aggregation_enabled_tmp); | ||
447 | atomic_set(&aggregation_enabled, | ||
448 | (unsigned)aggregation_enabled_tmp); | ||
682 | } | 449 | } |
683 | 450 | ||
684 | debug_log(LOG_TYPE_NOTICE, "Changing aggregation from: %s (%i) to: %s (%li)\n", | ||
685 | (atomic_read(&aggregation_enabled) == 1 ? | ||
686 | "enabled" : "disabled"), | ||
687 | atomic_read(&aggregation_enabled), | ||
688 | (aggregation_enabled_tmp == 1 ? "enabled" : "disabled"), | ||
689 | aggregation_enabled_tmp); | ||
690 | |||
691 | atomic_set(&aggregation_enabled, (unsigned)aggregation_enabled_tmp); | ||
692 | end: | ||
693 | kfree(aggr_string); | 451 | kfree(aggr_string); |
694 | return count; | 452 | return count; |
695 | } | 453 | } |
@@ -715,20 +473,20 @@ static const struct file_operations proc_aggr_fops = { | |||
715 | .release = single_release, | 473 | .release = single_release, |
716 | }; | 474 | }; |
717 | 475 | ||
718 | static const struct file_operations proc_vis_format_fops = { | 476 | static const struct file_operations proc_vis_srv_fops = { |
719 | .owner = THIS_MODULE, | 477 | .owner = THIS_MODULE, |
720 | .open = proc_vis_format_open, | 478 | .open = proc_vis_srv_open, |
721 | .read = seq_read, | 479 | .read = seq_read, |
722 | .write = proc_vis_format_write, | 480 | .write = proc_vis_srv_write, |
723 | .llseek = seq_lseek, | 481 | .llseek = seq_lseek, |
724 | .release = single_release, | 482 | .release = single_release, |
725 | }; | 483 | }; |
726 | 484 | ||
727 | static const struct file_operations proc_vis_fops = { | 485 | static const struct file_operations proc_vis_data_fops = { |
728 | .owner = THIS_MODULE, | 486 | .owner = THIS_MODULE, |
729 | .open = proc_vis_open, | 487 | .open = proc_vis_data_open, |
730 | .read = seq_read, | 488 | .read = seq_read, |
731 | .write = proc_vis_write, | 489 | .write = proc_dummy_write, |
732 | .llseek = seq_lseek, | 490 | .llseek = seq_lseek, |
733 | .release = single_release, | 491 | .release = single_release, |
734 | }; | 492 | }; |
@@ -760,15 +518,6 @@ static const struct file_operations proc_transt_global_fops = { | |||
760 | .release = single_release, | 518 | .release = single_release, |
761 | }; | 519 | }; |
762 | 520 | ||
763 | static const struct file_operations proc_log_level_fops = { | ||
764 | .owner = THIS_MODULE, | ||
765 | .open = proc_log_level_open, | ||
766 | .read = seq_read, | ||
767 | .write = proc_log_level_write, | ||
768 | .llseek = seq_lseek, | ||
769 | .release = single_release, | ||
770 | }; | ||
771 | |||
772 | static const struct file_operations proc_interfaces_fops = { | 521 | static const struct file_operations proc_interfaces_fops = { |
773 | .owner = THIS_MODULE, | 522 | .owner = THIS_MODULE, |
774 | .open = proc_interfaces_open, | 523 | .open = proc_interfaces_open, |
@@ -795,12 +544,6 @@ void cleanup_procfs(void) | |||
795 | if (proc_transt_local_file) | 544 | if (proc_transt_local_file) |
796 | remove_proc_entry(PROC_FILE_TRANST_LOCAL, proc_batman_dir); | 545 | remove_proc_entry(PROC_FILE_TRANST_LOCAL, proc_batman_dir); |
797 | 546 | ||
798 | if (proc_log_file) | ||
799 | remove_proc_entry(PROC_FILE_LOG, proc_batman_dir); | ||
800 | |||
801 | if (proc_log_level_file) | ||
802 | remove_proc_entry(PROC_FILE_LOG_LEVEL, proc_batman_dir); | ||
803 | |||
804 | if (proc_originators_file) | 547 | if (proc_originators_file) |
805 | remove_proc_entry(PROC_FILE_ORIGINATORS, proc_batman_dir); | 548 | remove_proc_entry(PROC_FILE_ORIGINATORS, proc_batman_dir); |
806 | 549 | ||
@@ -810,11 +553,11 @@ void cleanup_procfs(void) | |||
810 | if (proc_interface_file) | 553 | if (proc_interface_file) |
811 | remove_proc_entry(PROC_FILE_INTERFACES, proc_batman_dir); | 554 | remove_proc_entry(PROC_FILE_INTERFACES, proc_batman_dir); |
812 | 555 | ||
813 | if (proc_vis_file) | 556 | if (proc_vis_data_file) |
814 | remove_proc_entry(PROC_FILE_VIS, proc_batman_dir); | 557 | remove_proc_entry(PROC_FILE_VIS_DATA, proc_batman_dir); |
815 | 558 | ||
816 | if (proc_vis_format_file) | 559 | if (proc_vis_srv_file) |
817 | remove_proc_entry(PROC_FILE_VIS_FORMAT, proc_batman_dir); | 560 | remove_proc_entry(PROC_FILE_VIS_SRV, proc_batman_dir); |
818 | 561 | ||
819 | if (proc_aggr_file) | 562 | if (proc_aggr_file) |
820 | remove_proc_entry(PROC_FILE_AGGR, proc_batman_dir); | 563 | remove_proc_entry(PROC_FILE_AGGR, proc_batman_dir); |
@@ -862,17 +605,6 @@ int setup_procfs(void) | |||
862 | return -EFAULT; | 605 | return -EFAULT; |
863 | } | 606 | } |
864 | 607 | ||
865 | proc_log_level_file = create_proc_entry(PROC_FILE_LOG_LEVEL, | ||
866 | S_IWUSR | S_IRUGO, | ||
867 | proc_batman_dir); | ||
868 | if (proc_log_level_file) { | ||
869 | proc_log_level_file->proc_fops = &proc_log_level_fops; | ||
870 | } else { | ||
871 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_LOG_LEVEL); | ||
872 | cleanup_procfs(); | ||
873 | return -EFAULT; | ||
874 | } | ||
875 | |||
876 | proc_originators_file = create_proc_entry(PROC_FILE_ORIGINATORS, | 608 | proc_originators_file = create_proc_entry(PROC_FILE_ORIGINATORS, |
877 | S_IRUGO, proc_batman_dir); | 609 | S_IRUGO, proc_batman_dir); |
878 | if (proc_originators_file) { | 610 | if (proc_originators_file) { |
@@ -883,16 +615,6 @@ int setup_procfs(void) | |||
883 | return -EFAULT; | 615 | return -EFAULT; |
884 | } | 616 | } |
885 | 617 | ||
886 | proc_log_file = create_proc_entry(PROC_FILE_LOG, | ||
887 | S_IRUGO, proc_batman_dir); | ||
888 | if (proc_log_file) { | ||
889 | proc_log_file->proc_fops = &proc_log_operations; | ||
890 | } else { | ||
891 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_FILE_LOG, PROC_FILE_GATEWAYS); | ||
892 | cleanup_procfs(); | ||
893 | return -EFAULT; | ||
894 | } | ||
895 | |||
896 | proc_transt_local_file = create_proc_entry(PROC_FILE_TRANST_LOCAL, | 618 | proc_transt_local_file = create_proc_entry(PROC_FILE_TRANST_LOCAL, |
897 | S_IRUGO, proc_batman_dir); | 619 | S_IRUGO, proc_batman_dir); |
898 | if (proc_transt_local_file) { | 620 | if (proc_transt_local_file) { |
@@ -913,23 +635,23 @@ int setup_procfs(void) | |||
913 | return -EFAULT; | 635 | return -EFAULT; |
914 | } | 636 | } |
915 | 637 | ||
916 | proc_vis_file = create_proc_entry(PROC_FILE_VIS, S_IWUSR | S_IRUGO, | 638 | proc_vis_srv_file = create_proc_entry(PROC_FILE_VIS_SRV, |
917 | proc_batman_dir); | 639 | S_IWUSR | S_IRUGO, |
918 | if (proc_vis_file) { | 640 | proc_batman_dir); |
919 | proc_vis_file->proc_fops = &proc_vis_fops; | 641 | if (proc_vis_srv_file) { |
642 | proc_vis_srv_file->proc_fops = &proc_vis_srv_fops; | ||
920 | } else { | 643 | } else { |
921 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS); | 644 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS_SRV); |
922 | cleanup_procfs(); | 645 | cleanup_procfs(); |
923 | return -EFAULT; | 646 | return -EFAULT; |
924 | } | 647 | } |
925 | 648 | ||
926 | proc_vis_format_file = create_proc_entry(PROC_FILE_VIS_FORMAT, | 649 | proc_vis_data_file = create_proc_entry(PROC_FILE_VIS_DATA, S_IRUGO, |
927 | S_IWUSR | S_IRUGO, | 650 | proc_batman_dir); |
928 | proc_batman_dir); | 651 | if (proc_vis_data_file) { |
929 | if (proc_vis_format_file) { | 652 | proc_vis_data_file->proc_fops = &proc_vis_data_fops; |
930 | proc_vis_format_file->proc_fops = &proc_vis_format_fops; | ||
931 | } else { | 653 | } else { |
932 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS_FORMAT); | 654 | printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS_DATA); |
933 | cleanup_procfs(); | 655 | cleanup_procfs(); |
934 | return -EFAULT; | 656 | return -EFAULT; |
935 | } | 657 | } |
@@ -946,5 +668,3 @@ int setup_procfs(void) | |||
946 | 668 | ||
947 | return 0; | 669 | return 0; |
948 | } | 670 | } |
949 | |||
950 | |||
diff --git a/drivers/staging/batman-adv/proc.h b/drivers/staging/batman-adv/proc.h index 16d3efdebe52..cd690e0f3e44 100644 --- a/drivers/staging/batman-adv/proc.h +++ b/drivers/staging/batman-adv/proc.h | |||
@@ -31,19 +31,10 @@ | |||
31 | #define PROC_FILE_LOG_LEVEL "log_level" | 31 | #define PROC_FILE_LOG_LEVEL "log_level" |
32 | #define PROC_FILE_TRANST_LOCAL "transtable_local" | 32 | #define PROC_FILE_TRANST_LOCAL "transtable_local" |
33 | #define PROC_FILE_TRANST_GLOBAL "transtable_global" | 33 | #define PROC_FILE_TRANST_GLOBAL "transtable_global" |
34 | #define PROC_FILE_VIS "vis" | 34 | #define PROC_FILE_VIS_SRV "vis_server" |
35 | #define PROC_FILE_VIS_FORMAT "vis_format" | 35 | #define PROC_FILE_VIS_DATA "vis_data" |
36 | #define PROC_FILE_AGGR "aggregate_ogm" | 36 | #define PROC_FILE_AGGR "aggregate_ogm" |
37 | 37 | ||
38 | void cleanup_procfs(void); | 38 | void cleanup_procfs(void); |
39 | int setup_procfs(void); | 39 | int setup_procfs(void); |
40 | 40 | ||
41 | /* While scanning for vis-entries of a particular vis-originator | ||
42 | * this list collects its interfaces to create a subgraph/cluster | ||
43 | * out of them later | ||
44 | */ | ||
45 | struct vis_if_list { | ||
46 | uint8_t addr[ETH_ALEN]; | ||
47 | bool primary; | ||
48 | struct vis_if_list *next; | ||
49 | }; | ||
diff --git a/drivers/staging/batman-adv/routing.c b/drivers/staging/batman-adv/routing.c index 4a14c363ac2b..d89048beebe1 100644 --- a/drivers/staging/batman-adv/routing.c +++ b/drivers/staging/batman-adv/routing.c | |||
@@ -19,304 +19,226 @@ | |||
19 | * | 19 | * |
20 | */ | 20 | */ |
21 | 21 | ||
22 | |||
23 | |||
24 | |||
25 | |||
26 | #include "main.h" | 22 | #include "main.h" |
27 | #include "routing.h" | 23 | #include "routing.h" |
28 | #include "log.h" | ||
29 | #include "send.h" | 24 | #include "send.h" |
25 | #include "hash.h" | ||
30 | #include "soft-interface.h" | 26 | #include "soft-interface.h" |
31 | #include "hard-interface.h" | 27 | #include "hard-interface.h" |
32 | #include "device.h" | 28 | #include "device.h" |
33 | #include "translation-table.h" | 29 | #include "translation-table.h" |
30 | #include "originator.h" | ||
34 | #include "types.h" | 31 | #include "types.h" |
35 | #include "hash.h" | ||
36 | #include "ring_buffer.h" | 32 | #include "ring_buffer.h" |
37 | #include "vis.h" | 33 | #include "vis.h" |
38 | #include "aggregation.h" | 34 | #include "aggregation.h" |
39 | #include "compat.h" | ||
40 | |||
41 | |||
42 | 35 | ||
43 | DECLARE_WAIT_QUEUE_HEAD(thread_wait); | 36 | DECLARE_WAIT_QUEUE_HEAD(thread_wait); |
44 | static DECLARE_DELAYED_WORK(purge_orig_wq, purge_orig); | ||
45 | |||
46 | static atomic_t data_ready_cond; | ||
47 | atomic_t exit_cond; | ||
48 | |||
49 | static void start_purge_timer(void) | ||
50 | { | ||
51 | queue_delayed_work(bat_event_workqueue, &purge_orig_wq, 1 * HZ); | ||
52 | } | ||
53 | |||
54 | int originator_init(void) | ||
55 | { | ||
56 | if (orig_hash) | ||
57 | return 1; | ||
58 | |||
59 | spin_lock(&orig_hash_lock); | ||
60 | orig_hash = hash_new(128, compare_orig, choose_orig); | ||
61 | |||
62 | if (!orig_hash) | ||
63 | goto err; | ||
64 | |||
65 | spin_unlock(&orig_hash_lock); | ||
66 | start_purge_timer(); | ||
67 | return 1; | ||
68 | |||
69 | err: | ||
70 | spin_unlock(&orig_hash_lock); | ||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | void originator_free(void) | ||
75 | { | ||
76 | if (!orig_hash) | ||
77 | return; | ||
78 | |||
79 | cancel_delayed_work_sync(&purge_orig_wq); | ||
80 | |||
81 | spin_lock(&orig_hash_lock); | ||
82 | hash_delete(orig_hash, free_orig_node); | ||
83 | orig_hash = NULL; | ||
84 | spin_unlock(&orig_hash_lock); | ||
85 | } | ||
86 | 37 | ||
87 | static struct neigh_node *create_neighbor(struct orig_node *orig_node, struct orig_node *orig_neigh_node, uint8_t *neigh, struct batman_if *if_incoming) | 38 | void slide_own_bcast_window(struct batman_if *batman_if) |
88 | { | 39 | { |
89 | struct neigh_node *neigh_node; | 40 | HASHIT(hashit); |
41 | struct orig_node *orig_node; | ||
42 | TYPE_OF_WORD *word; | ||
43 | unsigned long flags; | ||
90 | 44 | ||
91 | debug_log(LOG_TYPE_BATMAN, "Creating new last-hop neighbour of originator\n"); | 45 | spin_lock_irqsave(&orig_hash_lock, flags); |
92 | 46 | ||
93 | neigh_node = kmalloc(sizeof(struct neigh_node), GFP_ATOMIC); | 47 | while (hash_iterate(orig_hash, &hashit)) { |
94 | memset(neigh_node, 0, sizeof(struct neigh_node)); | 48 | orig_node = hashit.bucket->data; |
95 | INIT_LIST_HEAD(&neigh_node->list); | 49 | word = &(orig_node->bcast_own[batman_if->if_num * NUM_WORDS]); |
96 | 50 | ||
97 | memcpy(neigh_node->addr, neigh, ETH_ALEN); | 51 | bit_get_packet(word, 1, 0); |
98 | neigh_node->orig_node = orig_neigh_node; | 52 | orig_node->bcast_own_sum[batman_if->if_num] = |
99 | neigh_node->if_incoming = if_incoming; | 53 | bit_packet_count(word); |
54 | } | ||
100 | 55 | ||
101 | list_add_tail(&neigh_node->list, &orig_node->neigh_list); | 56 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
102 | return neigh_node; | ||
103 | } | 57 | } |
104 | 58 | ||
105 | void free_orig_node(void *data) | 59 | static void update_HNA(struct orig_node *orig_node, |
60 | unsigned char *hna_buff, int hna_buff_len) | ||
106 | { | 61 | { |
107 | struct list_head *list_pos, *list_pos_tmp; | 62 | if ((hna_buff_len != orig_node->hna_buff_len) || |
108 | struct neigh_node *neigh_node; | 63 | ((hna_buff_len > 0) && |
109 | struct orig_node *orig_node = (struct orig_node *)data; | 64 | (orig_node->hna_buff_len > 0) && |
65 | (memcmp(orig_node->hna_buff, hna_buff, hna_buff_len) != 0))) { | ||
110 | 66 | ||
111 | /* for all neighbours towards this originator ... */ | 67 | if (orig_node->hna_buff_len > 0) |
112 | list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) { | 68 | hna_global_del_orig(orig_node, |
113 | neigh_node = list_entry(list_pos, struct neigh_node, list); | 69 | "originator changed hna"); |
114 | 70 | ||
115 | list_del(list_pos); | 71 | if ((hna_buff_len > 0) && (hna_buff != NULL)) |
116 | kfree(neigh_node); | 72 | hna_global_add_orig(orig_node, hna_buff, hna_buff_len); |
117 | } | 73 | } |
118 | |||
119 | hna_global_del_orig(orig_node, "originator timed out"); | ||
120 | |||
121 | kfree(orig_node->bcast_own); | ||
122 | kfree(orig_node->bcast_own_sum); | ||
123 | kfree(orig_node); | ||
124 | } | 74 | } |
125 | 75 | ||
126 | /* this function finds or creates an originator entry for the given address if it does not exits */ | 76 | static void update_route(struct orig_node *orig_node, |
127 | static struct orig_node *get_orig_node(uint8_t *addr) | 77 | struct neigh_node *neigh_node, |
78 | unsigned char *hna_buff, int hna_buff_len) | ||
128 | { | 79 | { |
129 | struct orig_node *orig_node; | 80 | /* route deleted */ |
130 | struct hashtable_t *swaphash; | 81 | if ((orig_node->router != NULL) && (neigh_node == NULL)) { |
131 | char orig_str[ETH_STR_LEN]; | ||
132 | |||
133 | orig_node = ((struct orig_node *)hash_find(orig_hash, addr)); | ||
134 | |||
135 | if (orig_node != NULL) | ||
136 | return orig_node; | ||
137 | |||
138 | addr_to_string(orig_str, addr); | ||
139 | debug_log(LOG_TYPE_BATMAN, "Creating new originator: %s \n", orig_str); | ||
140 | |||
141 | orig_node = kmalloc(sizeof(struct orig_node), GFP_ATOMIC); | ||
142 | memset(orig_node, 0, sizeof(struct orig_node)); | ||
143 | INIT_LIST_HEAD(&orig_node->neigh_list); | ||
144 | |||
145 | memcpy(orig_node->orig, addr, ETH_ALEN); | ||
146 | orig_node->router = NULL; | ||
147 | orig_node->batman_if = NULL; | ||
148 | orig_node->hna_buff = NULL; | ||
149 | 82 | ||
150 | orig_node->bcast_own = kmalloc(num_ifs * sizeof(TYPE_OF_WORD) * NUM_WORDS, GFP_ATOMIC); | 83 | bat_dbg(DBG_ROUTES, "Deleting route towards: %pM\n", |
151 | memset(orig_node->bcast_own, 0, num_ifs * sizeof(TYPE_OF_WORD) * NUM_WORDS); | 84 | orig_node->orig); |
85 | hna_global_del_orig(orig_node, "originator timed out"); | ||
152 | 86 | ||
153 | orig_node->bcast_own_sum = kmalloc(num_ifs * sizeof(uint8_t), GFP_ATOMIC); | 87 | /* route added */ |
154 | memset(orig_node->bcast_own_sum, 0, num_ifs * sizeof(uint8_t)); | 88 | } else if ((orig_node->router == NULL) && (neigh_node != NULL)) { |
155 | |||
156 | hash_add(orig_hash, orig_node); | ||
157 | 89 | ||
158 | if (orig_hash->elements * 4 > orig_hash->size) { | 90 | bat_dbg(DBG_ROUTES, |
159 | swaphash = hash_resize(orig_hash, orig_hash->size * 2); | 91 | "Adding route towards: %pM (via %pM)\n", |
92 | orig_node->orig, neigh_node->addr); | ||
93 | hna_global_add_orig(orig_node, hna_buff, hna_buff_len); | ||
160 | 94 | ||
161 | if (swaphash == NULL) | 95 | /* route changed */ |
162 | debug_log(LOG_TYPE_CRIT, "Couldn't resize orig hash table \n"); | 96 | } else { |
163 | else | 97 | bat_dbg(DBG_ROUTES, "Changing route towards: %pM (now via %pM - was via %pM)\n", orig_node->orig, neigh_node->addr, orig_node->router->addr); |
164 | orig_hash = swaphash; | ||
165 | } | 98 | } |
166 | 99 | ||
167 | return orig_node; | 100 | if (neigh_node != NULL) |
168 | } | 101 | orig_node->batman_if = neigh_node->if_incoming; |
169 | 102 | else | |
170 | void slide_own_bcast_window(struct batman_if *batman_if) | 103 | orig_node->batman_if = NULL; |
171 | { | ||
172 | struct hash_it_t *hashit = NULL; | ||
173 | struct orig_node *orig_node; | ||
174 | |||
175 | spin_lock(&orig_hash_lock); | ||
176 | |||
177 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | ||
178 | orig_node = hashit->bucket->data; | ||
179 | |||
180 | bit_get_packet((TYPE_OF_WORD *)&(orig_node->bcast_own[batman_if->if_num * NUM_WORDS]), 1, 0); | ||
181 | orig_node->bcast_own_sum[batman_if->if_num] = bit_packet_count((TYPE_OF_WORD *)&(orig_node->bcast_own[batman_if->if_num * NUM_WORDS])); | ||
182 | } | ||
183 | 104 | ||
184 | spin_unlock(&orig_hash_lock); | 105 | orig_node->router = neigh_node; |
185 | } | 106 | } |
186 | 107 | ||
187 | static void update_routes(struct orig_node *orig_node, struct neigh_node *neigh_node, unsigned char *hna_buff, int hna_buff_len) | 108 | |
109 | void update_routes(struct orig_node *orig_node, | ||
110 | struct neigh_node *neigh_node, | ||
111 | unsigned char *hna_buff, int hna_buff_len) | ||
188 | { | 112 | { |
189 | char orig_str[ETH_STR_LEN], neigh_str[ETH_STR_LEN], router_str[ETH_STR_LEN]; | ||
190 | 113 | ||
191 | if (orig_node == NULL) | 114 | if (orig_node == NULL) |
192 | return; | 115 | return; |
193 | 116 | ||
194 | if (orig_node->router != neigh_node) { | 117 | if (orig_node->router != neigh_node) |
195 | addr_to_string(orig_str, orig_node->orig); | 118 | update_route(orig_node, neigh_node, hna_buff, hna_buff_len); |
196 | |||
197 | /* route deleted */ | ||
198 | if ((orig_node->router != NULL) && (neigh_node == NULL)) { | ||
199 | |||
200 | debug_log(LOG_TYPE_ROUTES, "Deleting route towards: %s\n", orig_str); | ||
201 | hna_global_del_orig(orig_node, "originator timed out"); | ||
202 | |||
203 | /* route added */ | ||
204 | } else if ((orig_node->router == NULL) && (neigh_node != NULL)) { | ||
205 | |||
206 | addr_to_string(neigh_str, neigh_node->addr); | ||
207 | debug_log(LOG_TYPE_ROUTES, "Adding route towards: %s (via %s)\n", orig_str, neigh_str); | ||
208 | hna_global_add_orig(orig_node, hna_buff, hna_buff_len); | ||
209 | |||
210 | /* route changed */ | ||
211 | } else { | ||
212 | |||
213 | addr_to_string(neigh_str, neigh_node->addr); | ||
214 | addr_to_string(router_str, orig_node->router->addr); | ||
215 | debug_log(LOG_TYPE_ROUTES, "Changing route towards: %s (now via %s - was via %s)\n", orig_str, neigh_str, router_str); | ||
216 | |||
217 | } | ||
218 | |||
219 | if (neigh_node != NULL) | ||
220 | orig_node->batman_if = neigh_node->if_incoming; | ||
221 | else | ||
222 | orig_node->batman_if = NULL; | ||
223 | |||
224 | orig_node->router = neigh_node; | ||
225 | |||
226 | /* may be just HNA changed */ | 119 | /* may be just HNA changed */ |
227 | } else { | 120 | else |
228 | 121 | update_HNA(orig_node, hna_buff, hna_buff_len); | |
229 | if ((hna_buff_len != orig_node->hna_buff_len) || ((hna_buff_len > 0) && (orig_node->hna_buff_len > 0) && (memcmp(orig_node->hna_buff, hna_buff, hna_buff_len) != 0))) { | ||
230 | |||
231 | if (orig_node->hna_buff_len > 0) | ||
232 | hna_global_del_orig(orig_node, "originator changed hna"); | ||
233 | |||
234 | if ((hna_buff_len > 0) && (hna_buff != NULL)) | ||
235 | hna_global_add_orig(orig_node, hna_buff, hna_buff_len); | ||
236 | |||
237 | } | ||
238 | |||
239 | } | ||
240 | } | 122 | } |
241 | 123 | ||
242 | static int isBidirectionalNeigh(struct orig_node *orig_node, struct orig_node *orig_neigh_node, struct batman_packet *batman_packet, struct batman_if *if_incoming) | 124 | static int isBidirectionalNeigh(struct orig_node *orig_node, |
125 | struct orig_node *orig_neigh_node, | ||
126 | struct batman_packet *batman_packet, | ||
127 | struct batman_if *if_incoming) | ||
243 | { | 128 | { |
244 | struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL; | 129 | struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL; |
245 | char orig_str[ETH_STR_LEN], neigh_str[ETH_STR_LEN]; | ||
246 | unsigned char total_count; | 130 | unsigned char total_count; |
247 | 131 | ||
248 | addr_to_string(orig_str, orig_node->orig); | ||
249 | addr_to_string(neigh_str, orig_neigh_node->orig); | ||
250 | |||
251 | if (orig_node == orig_neigh_node) { | 132 | if (orig_node == orig_neigh_node) { |
252 | list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { | 133 | list_for_each_entry(tmp_neigh_node, |
134 | &orig_node->neigh_list, | ||
135 | list) { | ||
253 | 136 | ||
254 | if (compare_orig(tmp_neigh_node->addr, orig_neigh_node->orig) && (tmp_neigh_node->if_incoming == if_incoming)) | 137 | if (compare_orig(tmp_neigh_node->addr, |
138 | orig_neigh_node->orig) && | ||
139 | (tmp_neigh_node->if_incoming == if_incoming)) | ||
255 | neigh_node = tmp_neigh_node; | 140 | neigh_node = tmp_neigh_node; |
256 | } | 141 | } |
257 | 142 | ||
258 | if (neigh_node == NULL) | 143 | if (!neigh_node) |
259 | neigh_node = create_neighbor(orig_node, orig_neigh_node, orig_neigh_node->orig, if_incoming); | 144 | neigh_node = create_neighbor(orig_node, |
145 | orig_neigh_node, | ||
146 | orig_neigh_node->orig, | ||
147 | if_incoming); | ||
148 | /* create_neighbor failed, return 0 */ | ||
149 | if (!neigh_node) | ||
150 | return 0; | ||
260 | 151 | ||
261 | neigh_node->last_valid = jiffies; | 152 | neigh_node->last_valid = jiffies; |
262 | } else { | 153 | } else { |
263 | /* find packet count of corresponding one hop neighbor */ | 154 | /* find packet count of corresponding one hop neighbor */ |
264 | list_for_each_entry(tmp_neigh_node, &orig_neigh_node->neigh_list, list) { | 155 | list_for_each_entry(tmp_neigh_node, |
156 | &orig_neigh_node->neigh_list, list) { | ||
265 | 157 | ||
266 | if (compare_orig(tmp_neigh_node->addr, orig_neigh_node->orig) && (tmp_neigh_node->if_incoming == if_incoming)) | 158 | if (compare_orig(tmp_neigh_node->addr, |
159 | orig_neigh_node->orig) && | ||
160 | (tmp_neigh_node->if_incoming == if_incoming)) | ||
267 | neigh_node = tmp_neigh_node; | 161 | neigh_node = tmp_neigh_node; |
268 | } | 162 | } |
269 | 163 | ||
270 | if (neigh_node == NULL) | 164 | if (!neigh_node) |
271 | neigh_node = create_neighbor(orig_neigh_node, orig_neigh_node, orig_neigh_node->orig, if_incoming); | 165 | neigh_node = create_neighbor(orig_neigh_node, |
166 | orig_neigh_node, | ||
167 | orig_neigh_node->orig, | ||
168 | if_incoming); | ||
169 | /* create_neighbor failed, return 0 */ | ||
170 | if (!neigh_node) | ||
171 | return 0; | ||
272 | } | 172 | } |
273 | 173 | ||
274 | orig_node->last_valid = jiffies; | 174 | orig_node->last_valid = jiffies; |
275 | 175 | ||
276 | /* pay attention to not get a value bigger than 100 % */ | 176 | /* pay attention to not get a value bigger than 100 % */ |
277 | total_count = (orig_neigh_node->bcast_own_sum[if_incoming->if_num] > neigh_node->real_packet_count ? neigh_node->real_packet_count : orig_neigh_node->bcast_own_sum[if_incoming->if_num]); | 177 | total_count = (orig_neigh_node->bcast_own_sum[if_incoming->if_num] > |
178 | neigh_node->real_packet_count ? | ||
179 | neigh_node->real_packet_count : | ||
180 | orig_neigh_node->bcast_own_sum[if_incoming->if_num]); | ||
278 | 181 | ||
279 | /* if we have too few packets (too less data) we set tq_own to zero */ | 182 | /* if we have too few packets (too less data) we set tq_own to zero */ |
280 | /* if we receive too few packets it is not considered bidirectional */ | 183 | /* if we receive too few packets it is not considered bidirectional */ |
281 | if ((total_count < TQ_LOCAL_BIDRECT_SEND_MINIMUM) || (neigh_node->real_packet_count < TQ_LOCAL_BIDRECT_RECV_MINIMUM)) | 184 | if ((total_count < TQ_LOCAL_BIDRECT_SEND_MINIMUM) || |
185 | (neigh_node->real_packet_count < TQ_LOCAL_BIDRECT_RECV_MINIMUM)) | ||
282 | orig_neigh_node->tq_own = 0; | 186 | orig_neigh_node->tq_own = 0; |
283 | else | 187 | else |
284 | /* neigh_node->real_packet_count is never zero as we only purge old information when getting new information */ | 188 | /* neigh_node->real_packet_count is never zero as we |
285 | orig_neigh_node->tq_own = (TQ_MAX_VALUE * total_count) / neigh_node->real_packet_count; | 189 | * only purge old information when getting new |
190 | * information */ | ||
191 | orig_neigh_node->tq_own = (TQ_MAX_VALUE * total_count) / | ||
192 | neigh_node->real_packet_count; | ||
286 | 193 | ||
287 | /* | 194 | /* |
288 | * 1 - ((1-x) ** 3), normalized to TQ_MAX_VALUE | 195 | * 1 - ((1-x) ** 3), normalized to TQ_MAX_VALUE this does |
289 | * this does affect the nearly-symmetric links only a little, | 196 | * affect the nearly-symmetric links only a little, but |
290 | * but punishes asymmetric links more. | 197 | * punishes asymmetric links more. This will give a value |
291 | * this will give a value between 0 and TQ_MAX_VALUE | 198 | * between 0 and TQ_MAX_VALUE |
292 | */ | 199 | */ |
293 | orig_neigh_node->tq_asym_penalty = TQ_MAX_VALUE - (TQ_MAX_VALUE * | 200 | orig_neigh_node->tq_asym_penalty = |
294 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count) * | 201 | TQ_MAX_VALUE - |
295 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count) * | 202 | (TQ_MAX_VALUE * |
296 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count)) / | 203 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count) * |
297 | (TQ_LOCAL_WINDOW_SIZE * TQ_LOCAL_WINDOW_SIZE * TQ_LOCAL_WINDOW_SIZE); | 204 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count) * |
298 | 205 | (TQ_LOCAL_WINDOW_SIZE - neigh_node->real_packet_count)) / | |
299 | batman_packet->tq = ((batman_packet->tq * orig_neigh_node->tq_own * orig_neigh_node->tq_asym_penalty) / (TQ_MAX_VALUE * TQ_MAX_VALUE)); | 206 | (TQ_LOCAL_WINDOW_SIZE * |
300 | 207 | TQ_LOCAL_WINDOW_SIZE * | |
301 | debug_log(LOG_TYPE_BATMAN, "bidirectional: orig = %-15s neigh = %-15s => own_bcast = %2i, real recv = %2i, local tq: %3i, asym_penalty: %3i, total tq: %3i \n", | 208 | TQ_LOCAL_WINDOW_SIZE); |
302 | orig_str, neigh_str, total_count, neigh_node->real_packet_count, orig_neigh_node->tq_own, orig_neigh_node->tq_asym_penalty, batman_packet->tq); | 209 | |
303 | 210 | batman_packet->tq = ((batman_packet->tq * | |
304 | /* if link has the minimum required transmission quality consider it bidirectional */ | 211 | orig_neigh_node->tq_own * |
212 | orig_neigh_node->tq_asym_penalty) / | ||
213 | (TQ_MAX_VALUE * TQ_MAX_VALUE)); | ||
214 | |||
215 | bat_dbg(DBG_BATMAN, "bidirectional: orig = %-15pM neigh = %-15pM => own_bcast = %2i, real recv = %2i, local tq: %3i, asym_penalty: %3i, total tq: %3i \n", | ||
216 | orig_node->orig, orig_neigh_node->orig, total_count, | ||
217 | neigh_node->real_packet_count, orig_neigh_node->tq_own, | ||
218 | orig_neigh_node->tq_asym_penalty, batman_packet->tq); | ||
219 | |||
220 | /* if link has the minimum required transmission quality | ||
221 | * consider it bidirectional */ | ||
305 | if (batman_packet->tq >= TQ_TOTAL_BIDRECT_LIMIT) | 222 | if (batman_packet->tq >= TQ_TOTAL_BIDRECT_LIMIT) |
306 | return 1; | 223 | return 1; |
307 | 224 | ||
308 | return 0; | 225 | return 0; |
309 | } | 226 | } |
310 | 227 | ||
311 | static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, struct batman_packet *batman_packet, struct batman_if *if_incoming, unsigned char *hna_buff, int hna_buff_len, char is_duplicate) | 228 | static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, |
229 | struct batman_packet *batman_packet, | ||
230 | struct batman_if *if_incoming, | ||
231 | unsigned char *hna_buff, int hna_buff_len, | ||
232 | char is_duplicate) | ||
312 | { | 233 | { |
313 | struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL; | 234 | struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL; |
314 | int tmp_hna_buff_len; | 235 | int tmp_hna_buff_len; |
315 | 236 | ||
316 | debug_log(LOG_TYPE_BATMAN, "update_originator(): Searching and updating originator entry of received packet \n"); | 237 | bat_dbg(DBG_BATMAN, "update_originator(): Searching and updating originator entry of received packet \n"); |
317 | 238 | ||
318 | list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { | 239 | list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { |
319 | if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && (tmp_neigh_node->if_incoming == if_incoming)) { | 240 | if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && |
241 | (tmp_neigh_node->if_incoming == if_incoming)) { | ||
320 | neigh_node = tmp_neigh_node; | 242 | neigh_node = tmp_neigh_node; |
321 | continue; | 243 | continue; |
322 | } | 244 | } |
@@ -324,19 +246,34 @@ static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, stru | |||
324 | if (is_duplicate) | 246 | if (is_duplicate) |
325 | continue; | 247 | continue; |
326 | 248 | ||
327 | ring_buffer_set(tmp_neigh_node->tq_recv, &tmp_neigh_node->tq_index, 0); | 249 | ring_buffer_set(tmp_neigh_node->tq_recv, |
328 | tmp_neigh_node->tq_avg = ring_buffer_avg(tmp_neigh_node->tq_recv); | 250 | &tmp_neigh_node->tq_index, 0); |
251 | tmp_neigh_node->tq_avg = | ||
252 | ring_buffer_avg(tmp_neigh_node->tq_recv); | ||
329 | } | 253 | } |
330 | 254 | ||
331 | if (neigh_node == NULL) | 255 | if (!neigh_node) { |
332 | neigh_node = create_neighbor(orig_node, get_orig_node(ethhdr->h_source), ethhdr->h_source, if_incoming); | 256 | struct orig_node *orig_tmp; |
333 | else | 257 | |
334 | debug_log(LOG_TYPE_BATMAN, "Updating existing last-hop neighbour of originator\n"); | 258 | orig_tmp = get_orig_node(ethhdr->h_source); |
259 | if (!orig_tmp) | ||
260 | return; | ||
261 | |||
262 | neigh_node = create_neighbor(orig_node, | ||
263 | orig_tmp, | ||
264 | ethhdr->h_source, if_incoming); | ||
265 | if (!neigh_node) | ||
266 | return; | ||
267 | } else | ||
268 | bat_dbg(DBG_BATMAN, | ||
269 | "Updating existing last-hop neighbor of originator\n"); | ||
335 | 270 | ||
336 | orig_node->flags = batman_packet->flags; | 271 | orig_node->flags = batman_packet->flags; |
337 | neigh_node->last_valid = jiffies; | 272 | neigh_node->last_valid = jiffies; |
338 | 273 | ||
339 | ring_buffer_set(neigh_node->tq_recv, &neigh_node->tq_index, batman_packet->tq); | 274 | ring_buffer_set(neigh_node->tq_recv, |
275 | &neigh_node->tq_index, | ||
276 | batman_packet->tq); | ||
340 | neigh_node->tq_avg = ring_buffer_avg(neigh_node->tq_recv); | 277 | neigh_node->tq_avg = ring_buffer_avg(neigh_node->tq_recv); |
341 | 278 | ||
342 | if (!is_duplicate) { | 279 | if (!is_duplicate) { |
@@ -344,9 +281,11 @@ static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, stru | |||
344 | neigh_node->last_ttl = batman_packet->ttl; | 281 | neigh_node->last_ttl = batman_packet->ttl; |
345 | } | 282 | } |
346 | 283 | ||
347 | tmp_hna_buff_len = (hna_buff_len > batman_packet->num_hna * ETH_ALEN ? batman_packet->num_hna * ETH_ALEN : hna_buff_len); | 284 | tmp_hna_buff_len = (hna_buff_len > batman_packet->num_hna * ETH_ALEN ? |
285 | batman_packet->num_hna * ETH_ALEN : hna_buff_len); | ||
348 | 286 | ||
349 | /* if this neighbor already is our next hop there is nothing to change */ | 287 | /* if this neighbor already is our next hop there is nothing |
288 | * to change */ | ||
350 | if (orig_node->router == neigh_node) | 289 | if (orig_node->router == neigh_node) |
351 | goto update_hna; | 290 | goto update_hna; |
352 | 291 | ||
@@ -355,11 +294,12 @@ static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, stru | |||
355 | (orig_node->router->tq_avg > neigh_node->tq_avg)) | 294 | (orig_node->router->tq_avg > neigh_node->tq_avg)) |
356 | goto update_hna; | 295 | goto update_hna; |
357 | 296 | ||
358 | /* if the TQ is the same and the link not more symetric we won't consider it either */ | 297 | /* if the TQ is the same and the link not more symetric we |
298 | * won't consider it either */ | ||
359 | if ((orig_node->router) && | 299 | if ((orig_node->router) && |
360 | ((neigh_node->tq_avg == orig_node->router->tq_avg) && | 300 | ((neigh_node->tq_avg == orig_node->router->tq_avg) && |
361 | (orig_node->router->orig_node->bcast_own_sum[if_incoming->if_num] >= | 301 | (orig_node->router->orig_node->bcast_own_sum[if_incoming->if_num] |
362 | neigh_node->orig_node->bcast_own_sum[if_incoming->if_num]))) | 302 | >= neigh_node->orig_node->bcast_own_sum[if_incoming->if_num]))) |
363 | goto update_hna; | 303 | goto update_hna; |
364 | 304 | ||
365 | update_routes(orig_node, neigh_node, hna_buff, tmp_hna_buff_len); | 305 | update_routes(orig_node, neigh_node, hna_buff, tmp_hna_buff_len); |
@@ -367,60 +307,72 @@ static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr, stru | |||
367 | 307 | ||
368 | update_hna: | 308 | update_hna: |
369 | update_routes(orig_node, orig_node->router, hna_buff, tmp_hna_buff_len); | 309 | update_routes(orig_node, orig_node->router, hna_buff, tmp_hna_buff_len); |
370 | return; | ||
371 | } | 310 | } |
372 | 311 | ||
373 | static char count_real_packets(struct ethhdr *ethhdr, struct batman_packet *batman_packet, struct batman_if *if_incoming) | 312 | static char count_real_packets(struct ethhdr *ethhdr, |
313 | struct batman_packet *batman_packet, | ||
314 | struct batman_if *if_incoming) | ||
374 | { | 315 | { |
375 | struct orig_node *orig_node; | 316 | struct orig_node *orig_node; |
376 | struct neigh_node *tmp_neigh_node; | 317 | struct neigh_node *tmp_neigh_node; |
377 | char is_duplicate = 0; | 318 | char is_duplicate = 0; |
378 | 319 | uint16_t seq_diff; | |
379 | 320 | ||
380 | orig_node = get_orig_node(batman_packet->orig); | 321 | orig_node = get_orig_node(batman_packet->orig); |
381 | if (orig_node == NULL) | 322 | if (orig_node == NULL) |
382 | return 0; | 323 | return 0; |
383 | 324 | ||
384 | |||
385 | list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { | 325 | list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { |
386 | 326 | ||
387 | if (!is_duplicate) | 327 | if (!is_duplicate) |
388 | is_duplicate = get_bit_status(tmp_neigh_node->real_bits, orig_node->last_real_seqno, batman_packet->seqno); | 328 | is_duplicate = |
389 | 329 | get_bit_status(tmp_neigh_node->real_bits, | |
390 | if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && (tmp_neigh_node->if_incoming == if_incoming)) | 330 | orig_node->last_real_seqno, |
391 | bit_get_packet(tmp_neigh_node->real_bits, batman_packet->seqno - orig_node->last_real_seqno, 1); | 331 | batman_packet->seqno); |
332 | seq_diff = batman_packet->seqno - orig_node->last_real_seqno; | ||
333 | if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && | ||
334 | (tmp_neigh_node->if_incoming == if_incoming)) | ||
335 | bit_get_packet(tmp_neigh_node->real_bits, seq_diff, 1); | ||
392 | else | 336 | else |
393 | bit_get_packet(tmp_neigh_node->real_bits, batman_packet->seqno - orig_node->last_real_seqno, 0); | 337 | bit_get_packet(tmp_neigh_node->real_bits, seq_diff, 0); |
394 | 338 | ||
395 | tmp_neigh_node->real_packet_count = bit_packet_count(tmp_neigh_node->real_bits); | 339 | tmp_neigh_node->real_packet_count = |
340 | bit_packet_count(tmp_neigh_node->real_bits); | ||
396 | } | 341 | } |
397 | 342 | ||
398 | if (!is_duplicate) { | 343 | if (!is_duplicate) { |
399 | debug_log(LOG_TYPE_BATMAN, "updating last_seqno: old %d, new %d \n", orig_node->last_real_seqno, batman_packet->seqno); | 344 | bat_dbg(DBG_BATMAN, "updating last_seqno: old %d, new %d \n", |
345 | orig_node->last_real_seqno, batman_packet->seqno); | ||
400 | orig_node->last_real_seqno = batman_packet->seqno; | 346 | orig_node->last_real_seqno = batman_packet->seqno; |
401 | } | 347 | } |
402 | 348 | ||
403 | return is_duplicate; | 349 | return is_duplicate; |
404 | } | 350 | } |
405 | 351 | ||
406 | void receive_bat_packet(struct ethhdr *ethhdr, struct batman_packet *batman_packet, unsigned char *hna_buff, int hna_buff_len, struct batman_if *if_incoming) | 352 | void receive_bat_packet(struct ethhdr *ethhdr, |
353 | struct batman_packet *batman_packet, | ||
354 | unsigned char *hna_buff, int hna_buff_len, | ||
355 | struct batman_if *if_incoming) | ||
407 | { | 356 | { |
408 | struct batman_if *batman_if; | 357 | struct batman_if *batman_if; |
409 | struct orig_node *orig_neigh_node, *orig_node; | 358 | struct orig_node *orig_neigh_node, *orig_node; |
410 | char orig_str[ETH_STR_LEN], prev_sender_str[ETH_STR_LEN], neigh_str[ETH_STR_LEN]; | ||
411 | char has_directlink_flag; | 359 | char has_directlink_flag; |
412 | char is_my_addr = 0, is_my_orig = 0, is_my_oldorig = 0, is_broadcast = 0, is_bidirectional, is_single_hop_neigh, is_duplicate; | 360 | char is_my_addr = 0, is_my_orig = 0, is_my_oldorig = 0; |
361 | char is_broadcast = 0, is_bidirectional, is_single_hop_neigh; | ||
362 | char is_duplicate; | ||
413 | unsigned short if_incoming_seqno; | 363 | unsigned short if_incoming_seqno; |
414 | 364 | ||
415 | /* Silently drop when the batman packet is actually not a correct packet. | 365 | /* Silently drop when the batman packet is actually not a |
366 | * correct packet. | ||
416 | * | 367 | * |
417 | * This might happen if a packet is padded (e.g. Ethernet has a | 368 | * This might happen if a packet is padded (e.g. Ethernet has a |
418 | * minimum frame length of 64 byte) and the aggregation interprets | 369 | * minimum frame length of 64 byte) and the aggregation interprets |
419 | * it as an additional length. | 370 | * it as an additional length. |
420 | * | 371 | * |
421 | * TODO: A more sane solution would be to have a bit in the batman_packet | 372 | * TODO: A more sane solution would be to have a bit in the |
422 | * to detect whether the packet is the last packet in an aggregation. | 373 | * batman_packet to detect whether the packet is the last |
423 | * Here we expect that the padding is always zero (or not 0x01) | 374 | * packet in an aggregation. Here we expect that the padding |
375 | * is always zero (or not 0x01) | ||
424 | */ | 376 | */ |
425 | if (batman_packet->packet_type != BAT_PACKET) | 377 | if (batman_packet->packet_type != BAT_PACKET) |
426 | return; | 378 | return; |
@@ -428,27 +380,31 @@ void receive_bat_packet(struct ethhdr *ethhdr, struct batman_packet *batman_pack | |||
428 | /* could be changed by schedule_own_packet() */ | 380 | /* could be changed by schedule_own_packet() */ |
429 | if_incoming_seqno = atomic_read(&if_incoming->seqno); | 381 | if_incoming_seqno = atomic_read(&if_incoming->seqno); |
430 | 382 | ||
431 | addr_to_string(orig_str, batman_packet->orig); | ||
432 | addr_to_string(prev_sender_str, batman_packet->prev_sender); | ||
433 | addr_to_string(neigh_str, ethhdr->h_source); | ||
434 | |||
435 | has_directlink_flag = (batman_packet->flags & DIRECTLINK ? 1 : 0); | 383 | has_directlink_flag = (batman_packet->flags & DIRECTLINK ? 1 : 0); |
436 | 384 | ||
437 | is_single_hop_neigh = (compare_orig(ethhdr->h_source, batman_packet->orig) ? 1 : 0); | 385 | is_single_hop_neigh = (compare_orig(ethhdr->h_source, |
386 | batman_packet->orig) ? 1 : 0); | ||
438 | 387 | ||
439 | debug_log(LOG_TYPE_BATMAN, "Received BATMAN packet via NB: %s, IF: %s [%s] (from OG: %s, via prev OG: %s, seqno %d, tq %d, TTL %d, V %d, IDF %d) \n", neigh_str, if_incoming->dev, if_incoming->addr_str, orig_str, prev_sender_str, batman_packet->seqno, batman_packet->tq, batman_packet->ttl, batman_packet->version, has_directlink_flag); | 388 | bat_dbg(DBG_BATMAN, "Received BATMAN packet via NB: %pM, IF: %s [%s] (from OG: %pM, via prev OG: %pM, seqno %d, tq %d, TTL %d, V %d, IDF %d) \n", |
389 | ethhdr->h_source, if_incoming->dev, if_incoming->addr_str, | ||
390 | batman_packet->orig, batman_packet->prev_sender, | ||
391 | batman_packet->seqno, batman_packet->tq, batman_packet->ttl, | ||
392 | batman_packet->version, has_directlink_flag); | ||
440 | 393 | ||
441 | list_for_each_entry_rcu(batman_if, &if_list, list) { | 394 | list_for_each_entry_rcu(batman_if, &if_list, list) { |
442 | if (batman_if->if_active != IF_ACTIVE) | 395 | if (batman_if->if_active != IF_ACTIVE) |
443 | continue; | 396 | continue; |
444 | 397 | ||
445 | if (compare_orig(ethhdr->h_source, batman_if->net_dev->dev_addr)) | 398 | if (compare_orig(ethhdr->h_source, |
399 | batman_if->net_dev->dev_addr)) | ||
446 | is_my_addr = 1; | 400 | is_my_addr = 1; |
447 | 401 | ||
448 | if (compare_orig(batman_packet->orig, batman_if->net_dev->dev_addr)) | 402 | if (compare_orig(batman_packet->orig, |
403 | batman_if->net_dev->dev_addr)) | ||
449 | is_my_orig = 1; | 404 | is_my_orig = 1; |
450 | 405 | ||
451 | if (compare_orig(batman_packet->prev_sender, batman_if->net_dev->dev_addr)) | 406 | if (compare_orig(batman_packet->prev_sender, |
407 | batman_if->net_dev->dev_addr)) | ||
452 | is_my_oldorig = 1; | 408 | is_my_oldorig = 1; |
453 | 409 | ||
454 | if (compare_orig(ethhdr->h_source, broadcastAddr)) | 410 | if (compare_orig(ethhdr->h_source, broadcastAddr)) |
@@ -456,44 +412,61 @@ void receive_bat_packet(struct ethhdr *ethhdr, struct batman_packet *batman_pack | |||
456 | } | 412 | } |
457 | 413 | ||
458 | if (batman_packet->version != COMPAT_VERSION) { | 414 | if (batman_packet->version != COMPAT_VERSION) { |
459 | debug_log(LOG_TYPE_BATMAN, "Drop packet: incompatible batman version (%i) \n", batman_packet->version); | 415 | bat_dbg(DBG_BATMAN, |
416 | "Drop packet: incompatible batman version (%i)\n", | ||
417 | batman_packet->version); | ||
460 | return; | 418 | return; |
461 | } | 419 | } |
462 | 420 | ||
463 | if (is_my_addr) { | 421 | if (is_my_addr) { |
464 | debug_log(LOG_TYPE_BATMAN, "Drop packet: received my own broadcast (sender: %s) \n", neigh_str); | 422 | bat_dbg(DBG_BATMAN, |
423 | "Drop packet: received my own broadcast (sender: %pM)\n", | ||
424 | ethhdr->h_source); | ||
465 | return; | 425 | return; |
466 | } | 426 | } |
467 | 427 | ||
468 | if (is_broadcast) { | 428 | if (is_broadcast) { |
469 | debug_log(LOG_TYPE_BATMAN, "Drop packet: ignoring all packets with broadcast source addr (sender: %s) \n", neigh_str); | 429 | bat_dbg(DBG_BATMAN, "Drop packet: ignoring all packets with broadcast source addr (sender: %pM) \n", ethhdr->h_source); |
470 | return; | 430 | return; |
471 | } | 431 | } |
472 | 432 | ||
473 | if (is_my_orig) { | 433 | if (is_my_orig) { |
434 | TYPE_OF_WORD *word; | ||
435 | int offset; | ||
436 | |||
474 | orig_neigh_node = get_orig_node(ethhdr->h_source); | 437 | orig_neigh_node = get_orig_node(ethhdr->h_source); |
475 | 438 | ||
476 | /* neighbour has to indicate direct link and it has to come via the corresponding interface */ | 439 | if (!orig_neigh_node) |
477 | /* if received seqno equals last send seqno save new seqno for bidirectional check */ | 440 | return; |
478 | if (has_directlink_flag && compare_orig(if_incoming->net_dev->dev_addr, batman_packet->orig) && | 441 | |
479 | (batman_packet->seqno - if_incoming_seqno + 2 == 0)) { | 442 | /* neighbor has to indicate direct link and it has to |
480 | bit_mark((TYPE_OF_WORD *)&(orig_neigh_node->bcast_own[if_incoming->if_num * NUM_WORDS]), 0); | 443 | * come via the corresponding interface */ |
481 | orig_neigh_node->bcast_own_sum[if_incoming->if_num] = bit_packet_count((TYPE_OF_WORD *)&(orig_neigh_node->bcast_own[if_incoming->if_num * NUM_WORDS])); | 444 | /* if received seqno equals last send seqno save new |
445 | * seqno for bidirectional check */ | ||
446 | if (has_directlink_flag && | ||
447 | compare_orig(if_incoming->net_dev->dev_addr, | ||
448 | batman_packet->orig) && | ||
449 | (batman_packet->seqno - if_incoming_seqno + 2 == 0)) { | ||
450 | offset = if_incoming->if_num * NUM_WORDS; | ||
451 | word = &(orig_neigh_node->bcast_own[offset]); | ||
452 | bit_mark(word, 0); | ||
453 | orig_neigh_node->bcast_own_sum[if_incoming->if_num] = | ||
454 | bit_packet_count(word); | ||
482 | } | 455 | } |
483 | 456 | ||
484 | debug_log(LOG_TYPE_BATMAN, "Drop packet: originator packet from myself (via neighbour) \n"); | 457 | bat_dbg(DBG_BATMAN, "Drop packet: originator packet from myself (via neighbor) \n"); |
485 | return; | 458 | return; |
486 | } | 459 | } |
487 | 460 | ||
488 | if (batman_packet->tq == 0) { | 461 | if (batman_packet->tq == 0) { |
489 | count_real_packets(ethhdr, batman_packet, if_incoming); | 462 | count_real_packets(ethhdr, batman_packet, if_incoming); |
490 | 463 | ||
491 | debug_log(LOG_TYPE_BATMAN, "Drop packet: originator packet with tq equal 0 \n"); | 464 | bat_dbg(DBG_BATMAN, "Drop packet: originator packet with tq equal 0 \n"); |
492 | return; | 465 | return; |
493 | } | 466 | } |
494 | 467 | ||
495 | if (is_my_oldorig) { | 468 | if (is_my_oldorig) { |
496 | debug_log(LOG_TYPE_BATMAN, "Drop packet: ignoring all rebroadcast echos (sender: %s) \n", neigh_str); | 469 | bat_dbg(DBG_BATMAN, "Drop packet: ignoring all rebroadcast echos (sender: %pM) \n", ethhdr->h_source); |
497 | return; | 470 | return; |
498 | } | 471 | } |
499 | 472 | ||
@@ -504,507 +477,502 @@ void receive_bat_packet(struct ethhdr *ethhdr, struct batman_packet *batman_pack | |||
504 | return; | 477 | return; |
505 | 478 | ||
506 | /* avoid temporary routing loops */ | 479 | /* avoid temporary routing loops */ |
507 | if ((orig_node->router) && (orig_node->router->orig_node->router) && | 480 | if ((orig_node->router) && |
508 | (compare_orig(orig_node->router->addr, batman_packet->prev_sender)) && | 481 | (orig_node->router->orig_node->router) && |
482 | (compare_orig(orig_node->router->addr, | ||
483 | batman_packet->prev_sender)) && | ||
509 | !(compare_orig(batman_packet->orig, batman_packet->prev_sender)) && | 484 | !(compare_orig(batman_packet->orig, batman_packet->prev_sender)) && |
510 | (compare_orig(orig_node->router->addr, orig_node->router->orig_node->router->addr))) { | 485 | (compare_orig(orig_node->router->addr, |
511 | debug_log(LOG_TYPE_BATMAN, "Drop packet: ignoring all rebroadcast packets that may make me loop (sender: %s) \n", neigh_str); | 486 | orig_node->router->orig_node->router->addr))) { |
487 | bat_dbg(DBG_BATMAN, "Drop packet: ignoring all rebroadcast packets that may make me loop (sender: %pM) \n", ethhdr->h_source); | ||
512 | return; | 488 | return; |
513 | } | 489 | } |
514 | 490 | ||
515 | /* if sender is a direct neighbor the sender mac equals originator mac */ | 491 | /* if sender is a direct neighbor the sender mac equals |
516 | orig_neigh_node = (is_single_hop_neigh ? orig_node : get_orig_node(ethhdr->h_source)); | 492 | * originator mac */ |
493 | orig_neigh_node = (is_single_hop_neigh ? | ||
494 | orig_node : get_orig_node(ethhdr->h_source)); | ||
517 | if (orig_neigh_node == NULL) | 495 | if (orig_neigh_node == NULL) |
518 | return; | 496 | return; |
519 | 497 | ||
520 | /* drop packet if sender is not a direct neighbor and if we don't route towards it */ | 498 | /* drop packet if sender is not a direct neighbor and if we |
521 | if (!is_single_hop_neigh && (orig_neigh_node->router == NULL)) { | 499 | * don't route towards it */ |
522 | debug_log(LOG_TYPE_BATMAN, "Drop packet: OGM via unknown neighbor! \n"); | 500 | if (!is_single_hop_neigh && |
501 | (orig_neigh_node->router == NULL)) { | ||
502 | bat_dbg(DBG_BATMAN, "Drop packet: OGM via unknown neighbor!\n"); | ||
523 | return; | 503 | return; |
524 | } | 504 | } |
525 | 505 | ||
526 | is_bidirectional = isBidirectionalNeigh(orig_node, orig_neigh_node, batman_packet, if_incoming); | 506 | is_bidirectional = isBidirectionalNeigh(orig_node, orig_neigh_node, |
507 | batman_packet, if_incoming); | ||
527 | 508 | ||
528 | /* update ranking if it is not a duplicate or has the same seqno and similar ttl as the non-duplicate */ | 509 | /* update ranking if it is not a duplicate or has the same |
529 | if (is_bidirectional && (!is_duplicate || | 510 | * seqno and similar ttl as the non-duplicate */ |
530 | ((orig_node->last_real_seqno == batman_packet->seqno) && | 511 | if (is_bidirectional && |
531 | (orig_node->last_ttl - 3 <= batman_packet->ttl)))) | 512 | (!is_duplicate || |
532 | update_orig(orig_node, ethhdr, batman_packet, if_incoming, hna_buff, hna_buff_len, is_duplicate); | 513 | ((orig_node->last_real_seqno == batman_packet->seqno) && |
514 | (orig_node->last_ttl - 3 <= batman_packet->ttl)))) | ||
515 | update_orig(orig_node, ethhdr, batman_packet, | ||
516 | if_incoming, hna_buff, hna_buff_len, is_duplicate); | ||
533 | 517 | ||
534 | /* is single hop (direct) neighbour */ | 518 | /* is single hop (direct) neighbor */ |
535 | if (is_single_hop_neigh) { | 519 | if (is_single_hop_neigh) { |
536 | 520 | ||
537 | /* mark direct link on incoming interface */ | 521 | /* mark direct link on incoming interface */ |
538 | schedule_forward_packet(orig_node, ethhdr, batman_packet, 1, hna_buff_len, if_incoming); | 522 | schedule_forward_packet(orig_node, ethhdr, batman_packet, |
523 | 1, hna_buff_len, if_incoming); | ||
539 | 524 | ||
540 | debug_log(LOG_TYPE_BATMAN, "Forwarding packet: rebroadcast neighbour packet with direct link flag \n"); | 525 | bat_dbg(DBG_BATMAN, "Forwarding packet: rebroadcast neighbor packet with direct link flag\n"); |
541 | return; | 526 | return; |
542 | } | 527 | } |
543 | 528 | ||
544 | /* multihop originator */ | 529 | /* multihop originator */ |
545 | if (!is_bidirectional) { | 530 | if (!is_bidirectional) { |
546 | debug_log(LOG_TYPE_BATMAN, "Drop packet: not received via bidirectional link\n"); | 531 | bat_dbg(DBG_BATMAN, |
532 | "Drop packet: not received via bidirectional link\n"); | ||
547 | return; | 533 | return; |
548 | } | 534 | } |
549 | 535 | ||
550 | if (is_duplicate) { | 536 | if (is_duplicate) { |
551 | debug_log(LOG_TYPE_BATMAN, "Drop packet: duplicate packet received\n"); | 537 | bat_dbg(DBG_BATMAN, "Drop packet: duplicate packet received\n"); |
552 | return; | 538 | return; |
553 | } | 539 | } |
554 | 540 | ||
555 | debug_log(LOG_TYPE_BATMAN, "Forwarding packet: rebroadcast originator packet \n"); | 541 | bat_dbg(DBG_BATMAN, |
556 | schedule_forward_packet(orig_node, ethhdr, batman_packet, 0, hna_buff_len, if_incoming); | 542 | "Forwarding packet: rebroadcast originator packet\n"); |
543 | schedule_forward_packet(orig_node, ethhdr, batman_packet, | ||
544 | 0, hna_buff_len, if_incoming); | ||
557 | } | 545 | } |
558 | 546 | ||
559 | void purge_orig(struct work_struct *work) | 547 | int recv_bat_packet(struct sk_buff *skb, |
548 | struct batman_if *batman_if) | ||
560 | { | 549 | { |
561 | struct list_head *list_pos, *list_pos_tmp; | 550 | struct ethhdr *ethhdr; |
562 | struct hash_it_t *hashit = NULL; | 551 | unsigned long flags; |
563 | struct orig_node *orig_node; | 552 | |
564 | struct neigh_node *neigh_node, *best_neigh_node; | 553 | /* drop packet if it has not necessary minimum size */ |
565 | char orig_str[ETH_STR_LEN], neigh_str[ETH_STR_LEN], neigh_purged; | 554 | if (skb_headlen(skb) < sizeof(struct batman_packet)) |
566 | 555 | return NET_RX_DROP; | |
567 | spin_lock(&orig_hash_lock); | 556 | |
568 | 557 | ethhdr = (struct ethhdr *)skb_mac_header(skb); | |
569 | /* for all origins... */ | 558 | |
570 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 559 | /* packet with broadcast indication but unicast recipient */ |
571 | 560 | if (!is_bcast(ethhdr->h_dest)) | |
572 | orig_node = hashit->bucket->data; | 561 | return NET_RX_DROP; |
573 | addr_to_string(orig_str, orig_node->orig); | 562 | |
574 | 563 | /* packet with broadcast sender address */ | |
575 | if (time_after(jiffies, orig_node->last_valid + ((2 * PURGE_TIMEOUT * HZ) / 1000))) { | 564 | if (is_bcast(ethhdr->h_source)) |
576 | 565 | return NET_RX_DROP; | |
577 | debug_log(LOG_TYPE_BATMAN, "Originator timeout: originator %s, last_valid %u \n", orig_str, (orig_node->last_valid / HZ)); | 566 | |
578 | 567 | spin_lock_irqsave(&orig_hash_lock, flags); | |
579 | hash_remove_bucket(orig_hash, hashit); | 568 | /* TODO: we use headlen instead of "length", because |
580 | free_orig_node(orig_node); | 569 | * only this data is paged in. */ |
581 | 570 | /* TODO: is another skb_copy needed here? there will be | |
582 | } else { | 571 | * written on the data, but nobody (?) should further use |
583 | 572 | * this data */ | |
584 | best_neigh_node = NULL; | 573 | receive_aggr_bat_packet(ethhdr, |
585 | neigh_purged = 0; | 574 | skb->data, |
586 | 575 | skb_headlen(skb), | |
587 | /* for all neighbours towards this originator ... */ | 576 | batman_if); |
588 | list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) { | 577 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
589 | neigh_node = list_entry(list_pos, struct neigh_node, list); | 578 | |
590 | 579 | kfree_skb(skb); | |
591 | if (time_after(jiffies, neigh_node->last_valid + ((PURGE_TIMEOUT * HZ) / 1000))) { | 580 | return NET_RX_SUCCESS; |
592 | 581 | } | |
593 | addr_to_string(neigh_str, neigh_node->addr); | ||
594 | debug_log(LOG_TYPE_BATMAN, "Neighbour timeout: originator %s, neighbour: %s, last_valid %u \n", orig_str, neigh_str, (neigh_node->last_valid / HZ)); | ||
595 | |||
596 | neigh_purged = 1; | ||
597 | list_del(list_pos); | ||
598 | kfree(neigh_node); | ||
599 | |||
600 | } else { | ||
601 | |||
602 | if ((best_neigh_node == NULL) || (neigh_node->tq_avg > best_neigh_node->tq_avg)) | ||
603 | best_neigh_node = neigh_node; | ||
604 | |||
605 | } | ||
606 | |||
607 | } | ||
608 | 582 | ||
609 | if (neigh_purged) | 583 | static int recv_my_icmp_packet(struct sk_buff *skb) |
610 | update_routes(orig_node, best_neigh_node, orig_node->hna_buff, orig_node->hna_buff_len); | 584 | { |
585 | struct orig_node *orig_node; | ||
586 | struct icmp_packet *icmp_packet; | ||
587 | struct ethhdr *ethhdr; | ||
588 | struct sk_buff *skb_old; | ||
589 | struct batman_if *batman_if; | ||
590 | int ret; | ||
591 | unsigned long flags; | ||
592 | uint8_t dstaddr[ETH_ALEN]; | ||
611 | 593 | ||
612 | } | 594 | icmp_packet = (struct icmp_packet *) skb->data; |
595 | ethhdr = (struct ethhdr *) skb_mac_header(skb); | ||
613 | 596 | ||
597 | /* add data to device queue */ | ||
598 | if (icmp_packet->msg_type != ECHO_REQUEST) { | ||
599 | bat_device_receive_packet(icmp_packet); | ||
600 | return NET_RX_DROP; | ||
614 | } | 601 | } |
615 | 602 | ||
616 | spin_unlock(&orig_hash_lock); | 603 | /* answer echo request (ping) */ |
604 | /* get routing information */ | ||
605 | spin_lock_irqsave(&orig_hash_lock, flags); | ||
606 | orig_node = ((struct orig_node *)hash_find(orig_hash, | ||
607 | icmp_packet->orig)); | ||
608 | ret = NET_RX_DROP; | ||
609 | |||
610 | if ((orig_node != NULL) && | ||
611 | (orig_node->batman_if != NULL) && | ||
612 | (orig_node->router != NULL)) { | ||
613 | |||
614 | /* don't lock while sending the packets ... we therefore | ||
615 | * copy the required data before sending */ | ||
616 | batman_if = orig_node->batman_if; | ||
617 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); | ||
618 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
619 | |||
620 | /* create a copy of the skb, if needed, to modify it. */ | ||
621 | skb_old = NULL; | ||
622 | if (!skb_clone_writable(skb, sizeof(struct icmp_packet))) { | ||
623 | skb_old = skb; | ||
624 | skb = skb_copy(skb, GFP_ATOMIC); | ||
625 | if (!skb) | ||
626 | return NET_RX_DROP; | ||
627 | icmp_packet = (struct icmp_packet *) skb->data; | ||
628 | kfree_skb(skb_old); | ||
629 | } | ||
617 | 630 | ||
618 | start_purge_timer(); | 631 | memcpy(icmp_packet->dst, icmp_packet->orig, ETH_ALEN); |
619 | } | 632 | memcpy(icmp_packet->orig, ethhdr->h_dest, ETH_ALEN); |
633 | icmp_packet->msg_type = ECHO_REPLY; | ||
634 | icmp_packet->ttl = TTL; | ||
620 | 635 | ||
621 | static int receive_raw_packet(struct socket *raw_sock, unsigned char *packet_buff, int packet_buff_len) | 636 | send_skb_packet(skb, batman_if, dstaddr); |
622 | { | 637 | ret = NET_RX_SUCCESS; |
623 | struct kvec iov; | ||
624 | struct msghdr msg; | ||
625 | 638 | ||
626 | iov.iov_base = packet_buff; | 639 | } else |
627 | iov.iov_len = packet_buff_len; | 640 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
628 | 641 | ||
629 | msg.msg_flags = MSG_DONTWAIT; /* non-blocking */ | 642 | return ret; |
630 | msg.msg_name = NULL; | ||
631 | msg.msg_namelen = 0; | ||
632 | msg.msg_control = NULL; | ||
633 | |||
634 | return kernel_recvmsg(raw_sock, &msg, &iov, 1, packet_buff_len, MSG_DONTWAIT); | ||
635 | } | 643 | } |
636 | 644 | ||
637 | int packet_recv_thread(void *data) | 645 | static int recv_icmp_ttl_exceeded(struct sk_buff *skb) |
638 | { | 646 | { |
639 | struct batman_if *batman_if; | ||
640 | struct ethhdr *ethhdr; | ||
641 | struct batman_packet *batman_packet; | ||
642 | struct unicast_packet *unicast_packet; | ||
643 | struct bcast_packet *bcast_packet; | ||
644 | struct icmp_packet *icmp_packet; | ||
645 | struct vis_packet *vis_packet; | ||
646 | struct orig_node *orig_node; | 647 | struct orig_node *orig_node; |
647 | unsigned char *packet_buff, src_str[ETH_STR_LEN], dst_str[ETH_STR_LEN]; | 648 | struct icmp_packet *icmp_packet; |
648 | int vis_info_len; | 649 | struct ethhdr *ethhdr; |
649 | int result; | 650 | struct sk_buff *skb_old; |
650 | 651 | struct batman_if *batman_if; | |
651 | atomic_set(&data_ready_cond, 0); | 652 | int ret; |
652 | atomic_set(&exit_cond, 0); | 653 | unsigned long flags; |
653 | packet_buff = kmalloc(PACKBUFF_SIZE, GFP_KERNEL); | 654 | uint8_t dstaddr[ETH_ALEN]; |
654 | if (!packet_buff) { | 655 | |
655 | debug_log(LOG_TYPE_CRIT, "Could allocate memory for the packet buffer. :(\n"); | 656 | icmp_packet = (struct icmp_packet *)skb->data; |
656 | return -1; | 657 | ethhdr = (struct ethhdr *)skb_mac_header(skb); |
658 | |||
659 | /* send TTL exceeded if packet is an echo request (traceroute) */ | ||
660 | if (icmp_packet->msg_type != ECHO_REQUEST) { | ||
661 | printk(KERN_WARNING "batman-adv:Warning - can't forward icmp packet from %pM to %pM: ttl exceeded\n", | ||
662 | icmp_packet->orig, icmp_packet->dst); | ||
663 | return NET_RX_DROP; | ||
657 | } | 664 | } |
658 | 665 | ||
659 | while ((!kthread_should_stop()) && (!atomic_read(&exit_cond))) { | 666 | /* get routing information */ |
660 | 667 | spin_lock_irqsave(&orig_hash_lock, flags); | |
661 | wait_event_interruptible(thread_wait, (atomic_read(&data_ready_cond) || atomic_read(&exit_cond))); | 668 | orig_node = ((struct orig_node *) |
662 | 669 | hash_find(orig_hash, icmp_packet->orig)); | |
663 | atomic_set(&data_ready_cond, 0); | 670 | ret = NET_RX_DROP; |
664 | 671 | ||
665 | if (kthread_should_stop() || atomic_read(&exit_cond)) | 672 | if ((orig_node != NULL) && |
666 | break; | 673 | (orig_node->batman_if != NULL) && |
667 | 674 | (orig_node->router != NULL)) { | |
668 | /* we only want to safely traverse the list, hard-interfaces | 675 | |
669 | * won't be deleted anyway as long as this thread runs. */ | 676 | /* don't lock while sending the packets ... we therefore |
670 | 677 | * copy the required data before sending */ | |
671 | rcu_read_lock(); | 678 | batman_if = orig_node->batman_if; |
672 | list_for_each_entry_rcu(batman_if, &if_list, list) { | 679 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); |
673 | rcu_read_unlock(); | 680 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
674 | 681 | ||
675 | result = -1; | 682 | /* create a copy of the skb, if needed, to modify it. */ |
676 | 683 | if (!skb_clone_writable(skb, sizeof(struct icmp_packet))) { | |
677 | while (1) { | 684 | skb_old = skb; |
678 | if (batman_if->if_active != IF_ACTIVE) { | 685 | skb = skb_copy(skb, GFP_ATOMIC); |
679 | if (batman_if->if_active != IF_TO_BE_ACTIVATED) | 686 | if (!skb) |
680 | debug_log(LOG_TYPE_NOTICE, | 687 | return NET_RX_DROP; |
681 | "Could not read from deactivated interface %s!\n", | 688 | icmp_packet = (struct icmp_packet *) skb->data; |
682 | batman_if->dev); | 689 | kfree_skb(skb_old); |
683 | 690 | } | |
684 | if (batman_if->raw_sock) | ||
685 | receive_raw_packet(batman_if->raw_sock, packet_buff, PACKBUFF_SIZE); | ||
686 | result = 0; | ||
687 | break; | ||
688 | } | ||
689 | |||
690 | result = receive_raw_packet(batman_if->raw_sock, packet_buff, PACKBUFF_SIZE); | ||
691 | if (result <= 0) | ||
692 | break; | ||
693 | |||
694 | if (result < sizeof(struct ethhdr) + 2) | ||
695 | continue; | ||
696 | |||
697 | ethhdr = (struct ethhdr *)packet_buff; | ||
698 | batman_packet = (struct batman_packet *)(packet_buff + sizeof(struct ethhdr)); | ||
699 | |||
700 | if (batman_packet->version != COMPAT_VERSION) { | ||
701 | debug_log(LOG_TYPE_BATMAN, "Drop packet: incompatible batman version (%i) \n", batman_packet->version); | ||
702 | continue; | ||
703 | } | ||
704 | |||
705 | switch (batman_packet->packet_type) { | ||
706 | /* batman originator packet */ | ||
707 | case BAT_PACKET: | ||
708 | /* packet with broadcast indication but unicast recipient */ | ||
709 | if (!is_bcast(ethhdr->h_dest)) | ||
710 | continue; | ||
711 | |||
712 | /* packet with broadcast sender address */ | ||
713 | if (is_bcast(ethhdr->h_source)) | ||
714 | continue; | ||
715 | |||
716 | /* drop packet if it has not at least one batman packet as payload */ | ||
717 | if (result < sizeof(struct ethhdr) + sizeof(struct batman_packet)) | ||
718 | continue; | ||
719 | |||
720 | spin_lock(&orig_hash_lock); | ||
721 | receive_aggr_bat_packet(ethhdr, | ||
722 | packet_buff + sizeof(struct ethhdr), | ||
723 | result - sizeof(struct ethhdr), | ||
724 | batman_if); | ||
725 | spin_unlock(&orig_hash_lock); | ||
726 | |||
727 | break; | ||
728 | |||
729 | /* batman icmp packet */ | ||
730 | case BAT_ICMP: | ||
731 | /* packet with unicast indication but broadcast recipient */ | ||
732 | if (is_bcast(ethhdr->h_dest)) | ||
733 | continue; | ||
734 | |||
735 | /* packet with broadcast sender address */ | ||
736 | if (is_bcast(ethhdr->h_source)) | ||
737 | continue; | ||
738 | |||
739 | /* not for me */ | ||
740 | if (!is_my_mac(ethhdr->h_dest)) | ||
741 | continue; | ||
742 | |||
743 | /* drop packet if it has not necessary minimum size */ | ||
744 | if (result < sizeof(struct ethhdr) + sizeof(struct icmp_packet)) | ||
745 | continue; | ||
746 | |||
747 | icmp_packet = (struct icmp_packet *)(packet_buff + sizeof(struct ethhdr)); | ||
748 | |||
749 | /* packet for me */ | ||
750 | if (is_my_mac(icmp_packet->dst)) { | ||
751 | |||
752 | /* add data to device queue */ | ||
753 | if (icmp_packet->msg_type != ECHO_REQUEST) { | ||
754 | bat_device_receive_packet(icmp_packet); | ||
755 | continue; | ||
756 | } | ||
757 | |||
758 | /* answer echo request (ping) */ | ||
759 | /* get routing information */ | ||
760 | spin_lock(&orig_hash_lock); | ||
761 | orig_node = ((struct orig_node *)hash_find(orig_hash, icmp_packet->orig)); | ||
762 | |||
763 | if ((orig_node != NULL) && (orig_node->batman_if != NULL) && (orig_node->router != NULL)) { | ||
764 | |||
765 | memcpy(icmp_packet->dst, icmp_packet->orig, ETH_ALEN); | ||
766 | memcpy(icmp_packet->orig, ethhdr->h_dest, ETH_ALEN); | ||
767 | icmp_packet->msg_type = ECHO_REPLY; | ||
768 | icmp_packet->ttl = TTL; | ||
769 | |||
770 | send_raw_packet(packet_buff + sizeof(struct ethhdr), | ||
771 | result - sizeof(struct ethhdr), | ||
772 | orig_node->batman_if, | ||
773 | orig_node->router->addr); | ||
774 | |||
775 | } | ||
776 | |||
777 | spin_unlock(&orig_hash_lock); | ||
778 | continue; | ||
779 | |||
780 | } | ||
781 | |||
782 | /* TTL exceeded */ | ||
783 | if (icmp_packet->ttl < 2) { | ||
784 | |||
785 | addr_to_string(src_str, icmp_packet->orig); | ||
786 | addr_to_string(dst_str, icmp_packet->dst); | ||
787 | |||
788 | debug_log(LOG_TYPE_NOTICE, "Error - can't send packet from %s to %s: ttl exceeded\n", src_str, dst_str); | ||
789 | |||
790 | /* send TTL exceeded if packet is an echo request (traceroute) */ | ||
791 | if (icmp_packet->msg_type != ECHO_REQUEST) | ||
792 | continue; | ||
793 | |||
794 | /* get routing information */ | ||
795 | spin_lock(&orig_hash_lock); | ||
796 | orig_node = ((struct orig_node *)hash_find(orig_hash, icmp_packet->orig)); | ||
797 | |||
798 | if ((orig_node != NULL) && (orig_node->batman_if != NULL) && (orig_node->router != NULL)) { | ||
799 | |||
800 | memcpy(icmp_packet->dst, icmp_packet->orig, ETH_ALEN); | ||
801 | memcpy(icmp_packet->orig, ethhdr->h_dest, ETH_ALEN); | ||
802 | icmp_packet->msg_type = TTL_EXCEEDED; | ||
803 | icmp_packet->ttl = TTL; | ||
804 | |||
805 | send_raw_packet(packet_buff + sizeof(struct ethhdr), | ||
806 | result - sizeof(struct ethhdr), | ||
807 | orig_node->batman_if, | ||
808 | orig_node->router->addr); | ||
809 | 691 | ||
810 | } | 692 | memcpy(icmp_packet->dst, icmp_packet->orig, ETH_ALEN); |
693 | memcpy(icmp_packet->orig, ethhdr->h_dest, ETH_ALEN); | ||
694 | icmp_packet->msg_type = TTL_EXCEEDED; | ||
695 | icmp_packet->ttl = TTL; | ||
811 | 696 | ||
812 | spin_unlock(&orig_hash_lock); | 697 | send_skb_packet(skb, batman_if, dstaddr); |
813 | continue; | 698 | ret = NET_RX_SUCCESS; |
814 | 699 | ||
815 | } | 700 | } else |
701 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
816 | 702 | ||
817 | /* get routing information */ | 703 | return ret; |
818 | spin_lock(&orig_hash_lock); | 704 | } |
819 | orig_node = ((struct orig_node *)hash_find(orig_hash, icmp_packet->dst)); | ||
820 | 705 | ||
821 | if ((orig_node != NULL) && (orig_node->batman_if != NULL) && (orig_node->router != NULL)) { | ||
822 | 706 | ||
823 | /* decrement ttl */ | 707 | int recv_icmp_packet(struct sk_buff *skb) |
824 | icmp_packet->ttl--; | 708 | { |
709 | struct icmp_packet *icmp_packet; | ||
710 | struct ethhdr *ethhdr; | ||
711 | struct orig_node *orig_node; | ||
712 | struct sk_buff *skb_old; | ||
713 | struct batman_if *batman_if; | ||
714 | int hdr_size = sizeof(struct icmp_packet); | ||
715 | int ret; | ||
716 | unsigned long flags; | ||
717 | uint8_t dstaddr[ETH_ALEN]; | ||
718 | |||
719 | /* drop packet if it has not necessary minimum size */ | ||
720 | if (skb_headlen(skb) < hdr_size) | ||
721 | return NET_RX_DROP; | ||
722 | |||
723 | ethhdr = (struct ethhdr *)skb_mac_header(skb); | ||
724 | |||
725 | /* packet with unicast indication but broadcast recipient */ | ||
726 | if (is_bcast(ethhdr->h_dest)) | ||
727 | return NET_RX_DROP; | ||
728 | |||
729 | /* packet with broadcast sender address */ | ||
730 | if (is_bcast(ethhdr->h_source)) | ||
731 | return NET_RX_DROP; | ||
732 | |||
733 | /* not for me */ | ||
734 | if (!is_my_mac(ethhdr->h_dest)) | ||
735 | return NET_RX_DROP; | ||
736 | |||
737 | icmp_packet = (struct icmp_packet *) skb->data; | ||
738 | |||
739 | /* packet for me */ | ||
740 | if (is_my_mac(icmp_packet->dst)) | ||
741 | return recv_my_icmp_packet(skb); | ||
742 | |||
743 | /* TTL exceeded */ | ||
744 | if (icmp_packet->ttl < 2) | ||
745 | return recv_icmp_ttl_exceeded(skb); | ||
746 | |||
747 | ret = NET_RX_DROP; | ||
748 | |||
749 | /* get routing information */ | ||
750 | spin_lock_irqsave(&orig_hash_lock, flags); | ||
751 | orig_node = ((struct orig_node *) | ||
752 | hash_find(orig_hash, icmp_packet->dst)); | ||
753 | |||
754 | if ((orig_node != NULL) && | ||
755 | (orig_node->batman_if != NULL) && | ||
756 | (orig_node->router != NULL)) { | ||
757 | |||
758 | /* don't lock while sending the packets ... we therefore | ||
759 | * copy the required data before sending */ | ||
760 | batman_if = orig_node->batman_if; | ||
761 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); | ||
762 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
763 | |||
764 | /* create a copy of the skb, if needed, to modify it. */ | ||
765 | if (!skb_clone_writable(skb, sizeof(struct icmp_packet))) { | ||
766 | skb_old = skb; | ||
767 | skb = skb_copy(skb, GFP_ATOMIC); | ||
768 | if (!skb) | ||
769 | return NET_RX_DROP; | ||
770 | icmp_packet = (struct icmp_packet *) skb->data; | ||
771 | kfree_skb(skb_old); | ||
772 | } | ||
825 | 773 | ||
826 | /* route it */ | 774 | /* decrement ttl */ |
827 | send_raw_packet(packet_buff + sizeof(struct ethhdr), | 775 | icmp_packet->ttl--; |
828 | result - sizeof(struct ethhdr), | ||
829 | orig_node->batman_if, | ||
830 | orig_node->router->addr); | ||
831 | } | ||
832 | 776 | ||
833 | spin_unlock(&orig_hash_lock); | 777 | /* route it */ |
834 | break; | 778 | send_skb_packet(skb, batman_if, dstaddr); |
779 | ret = NET_RX_SUCCESS; | ||
835 | 780 | ||
836 | /* unicast packet */ | 781 | } else |
837 | case BAT_UNICAST: | 782 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
838 | /* packet with unicast indication but broadcast recipient */ | ||
839 | if (is_bcast(ethhdr->h_dest)) | ||
840 | continue; | ||
841 | 783 | ||
842 | /* packet with broadcast sender address */ | 784 | return ret; |
843 | if (is_bcast(ethhdr->h_source)) | 785 | } |
844 | continue; | ||
845 | 786 | ||
846 | /* not for me */ | 787 | int recv_unicast_packet(struct sk_buff *skb) |
847 | if (!is_my_mac(ethhdr->h_dest)) | 788 | { |
848 | continue; | 789 | struct unicast_packet *unicast_packet; |
790 | struct orig_node *orig_node; | ||
791 | struct ethhdr *ethhdr; | ||
792 | struct batman_if *batman_if; | ||
793 | struct sk_buff *skb_old; | ||
794 | uint8_t dstaddr[ETH_ALEN]; | ||
795 | int hdr_size = sizeof(struct unicast_packet); | ||
796 | int ret; | ||
797 | unsigned long flags; | ||
849 | 798 | ||
850 | /* drop packet if it has not necessary minimum size */ | 799 | /* drop packet if it has not necessary minimum size */ |
851 | if (result < sizeof(struct ethhdr) + sizeof(struct unicast_packet)) | 800 | if (skb_headlen(skb) < hdr_size) |
852 | continue; | 801 | return NET_RX_DROP; |
853 | 802 | ||
854 | unicast_packet = (struct unicast_packet *)(packet_buff + sizeof(struct ethhdr)); | 803 | ethhdr = (struct ethhdr *) skb_mac_header(skb); |
855 | 804 | ||
856 | /* packet for me */ | 805 | /* packet with unicast indication but broadcast recipient */ |
857 | if (is_my_mac(unicast_packet->dest)) { | 806 | if (is_bcast(ethhdr->h_dest)) |
807 | return NET_RX_DROP; | ||
858 | 808 | ||
859 | interface_rx(soft_device, packet_buff + sizeof(struct ethhdr) + sizeof(struct unicast_packet), result - sizeof(struct ethhdr) - sizeof(struct unicast_packet)); | 809 | /* packet with broadcast sender address */ |
860 | continue; | 810 | if (is_bcast(ethhdr->h_source)) |
811 | return NET_RX_DROP; | ||
861 | 812 | ||
862 | } | 813 | /* not for me */ |
814 | if (!is_my_mac(ethhdr->h_dest)) | ||
815 | return NET_RX_DROP; | ||
863 | 816 | ||
864 | /* TTL exceeded */ | 817 | unicast_packet = (struct unicast_packet *) skb->data; |
865 | if (unicast_packet->ttl < 2) { | ||
866 | addr_to_string(src_str, ((struct ethhdr *)(unicast_packet + 1))->h_source); | ||
867 | addr_to_string(dst_str, unicast_packet->dest); | ||
868 | 818 | ||
869 | debug_log(LOG_TYPE_NOTICE, "Error - can't send packet from %s to %s: ttl exceeded\n", src_str, dst_str); | 819 | /* packet for me */ |
870 | continue; | 820 | if (is_my_mac(unicast_packet->dest)) { |
871 | } | 821 | interface_rx(skb, hdr_size); |
822 | return NET_RX_SUCCESS; | ||
823 | } | ||
872 | 824 | ||
873 | /* get routing information */ | 825 | /* TTL exceeded */ |
874 | spin_lock(&orig_hash_lock); | 826 | if (unicast_packet->ttl < 2) { |
875 | orig_node = ((struct orig_node *)hash_find(orig_hash, unicast_packet->dest)); | 827 | printk(KERN_WARNING "batman-adv:Warning - can't forward unicast packet from %pM to %pM: ttl exceeded\n", |
828 | ethhdr->h_source, unicast_packet->dest); | ||
829 | return NET_RX_DROP; | ||
830 | } | ||
876 | 831 | ||
877 | if ((orig_node != NULL) && (orig_node->batman_if != NULL) && (orig_node->router != NULL)) { | 832 | ret = NET_RX_DROP; |
878 | /* decrement ttl */ | 833 | /* get routing information */ |
879 | unicast_packet->ttl--; | 834 | spin_lock_irqsave(&orig_hash_lock, flags); |
835 | orig_node = ((struct orig_node *) | ||
836 | hash_find(orig_hash, unicast_packet->dest)); | ||
837 | |||
838 | if ((orig_node != NULL) && | ||
839 | (orig_node->batman_if != NULL) && | ||
840 | (orig_node->router != NULL)) { | ||
841 | |||
842 | /* don't lock while sending the packets ... we therefore | ||
843 | * copy the required data before sending */ | ||
844 | batman_if = orig_node->batman_if; | ||
845 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); | ||
846 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
847 | |||
848 | /* create a copy of the skb, if needed, to modify it. */ | ||
849 | if (!skb_clone_writable(skb, sizeof(struct unicast_packet))) { | ||
850 | skb_old = skb; | ||
851 | skb = skb_copy(skb, GFP_ATOMIC); | ||
852 | if (!skb) | ||
853 | return NET_RX_DROP; | ||
854 | unicast_packet = (struct unicast_packet *) skb->data; | ||
855 | kfree_skb(skb_old); | ||
856 | } | ||
857 | /* decrement ttl */ | ||
858 | unicast_packet->ttl--; | ||
880 | 859 | ||
881 | /* route it */ | 860 | /* route it */ |
882 | send_raw_packet(packet_buff + sizeof(struct ethhdr), | 861 | send_skb_packet(skb, batman_if, dstaddr); |
883 | result - sizeof(struct ethhdr), | 862 | ret = NET_RX_SUCCESS; |
884 | orig_node->batman_if, | ||
885 | orig_node->router->addr); | ||
886 | } | ||
887 | 863 | ||
888 | spin_unlock(&orig_hash_lock); | 864 | } else |
889 | break; | 865 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
890 | 866 | ||
891 | /* broadcast packet */ | 867 | return ret; |
892 | case BAT_BCAST: | 868 | } |
893 | /* packet with broadcast indication but unicast recipient */ | ||
894 | if (!is_bcast(ethhdr->h_dest)) | ||
895 | continue; | ||
896 | 869 | ||
897 | /* packet with broadcast sender address */ | ||
898 | if (is_bcast(ethhdr->h_source)) | ||
899 | continue; | ||
900 | 870 | ||
901 | /* drop packet if it has not necessary minimum size */ | 871 | int recv_bcast_packet(struct sk_buff *skb) |
902 | if (result < sizeof(struct ethhdr) + sizeof(struct bcast_packet)) | 872 | { |
903 | continue; | 873 | struct orig_node *orig_node; |
874 | struct bcast_packet *bcast_packet; | ||
875 | struct ethhdr *ethhdr; | ||
876 | int hdr_size = sizeof(struct bcast_packet); | ||
877 | unsigned long flags; | ||
904 | 878 | ||
905 | /* ignore broadcasts sent by myself */ | 879 | /* drop packet if it has not necessary minimum size */ |
906 | if (is_my_mac(ethhdr->h_source)) | 880 | if (skb_headlen(skb) < hdr_size) |
907 | continue; | 881 | return NET_RX_DROP; |
908 | 882 | ||
909 | bcast_packet = (struct bcast_packet *)(packet_buff + sizeof(struct ethhdr)); | 883 | ethhdr = (struct ethhdr *)skb_mac_header(skb); |
910 | 884 | ||
911 | /* ignore broadcasts originated by myself */ | 885 | /* packet with broadcast indication but unicast recipient */ |
912 | if (is_my_mac(bcast_packet->orig)) | 886 | if (!is_bcast(ethhdr->h_dest)) |
913 | continue; | 887 | return NET_RX_DROP; |
914 | 888 | ||
915 | spin_lock(&orig_hash_lock); | 889 | /* packet with broadcast sender address */ |
916 | orig_node = ((struct orig_node *)hash_find(orig_hash, bcast_packet->orig)); | 890 | if (is_bcast(ethhdr->h_source)) |
891 | return NET_RX_DROP; | ||
917 | 892 | ||
918 | if (orig_node == NULL) { | 893 | /* ignore broadcasts sent by myself */ |
919 | spin_unlock(&orig_hash_lock); | 894 | if (is_my_mac(ethhdr->h_source)) |
920 | continue; | 895 | return NET_RX_DROP; |
921 | } | ||
922 | 896 | ||
923 | /* check flood history */ | 897 | bcast_packet = (struct bcast_packet *) skb->data; |
924 | if (get_bit_status(orig_node->bcast_bits, orig_node->last_bcast_seqno, ntohs(bcast_packet->seqno))) { | ||
925 | spin_unlock(&orig_hash_lock); | ||
926 | continue; | ||
927 | } | ||
928 | 898 | ||
929 | /* mark broadcast in flood history */ | 899 | /* ignore broadcasts originated by myself */ |
930 | if (bit_get_packet(orig_node->bcast_bits, ntohs(bcast_packet->seqno) - orig_node->last_bcast_seqno, 1)) | 900 | if (is_my_mac(bcast_packet->orig)) |
931 | orig_node->last_bcast_seqno = ntohs(bcast_packet->seqno); | 901 | return NET_RX_DROP; |
932 | 902 | ||
933 | spin_unlock(&orig_hash_lock); | 903 | spin_lock_irqsave(&orig_hash_lock, flags); |
904 | orig_node = ((struct orig_node *) | ||
905 | hash_find(orig_hash, bcast_packet->orig)); | ||
934 | 906 | ||
935 | /* broadcast for me */ | 907 | if (orig_node == NULL) { |
936 | interface_rx(soft_device, packet_buff + sizeof(struct ethhdr) + sizeof(struct bcast_packet), result - sizeof(struct ethhdr) - sizeof(struct bcast_packet)); | 908 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
909 | return NET_RX_DROP; | ||
910 | } | ||
937 | 911 | ||
938 | /* rebroadcast packet */ | 912 | /* check flood history */ |
939 | add_bcast_packet_to_list(packet_buff + sizeof(struct ethhdr), | 913 | if (get_bit_status(orig_node->bcast_bits, |
940 | result - sizeof(struct ethhdr)); | 914 | orig_node->last_bcast_seqno, |
915 | ntohs(bcast_packet->seqno))) { | ||
916 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
917 | return NET_RX_DROP; | ||
918 | } | ||
941 | 919 | ||
942 | break; | 920 | /* mark broadcast in flood history */ |
921 | if (bit_get_packet(orig_node->bcast_bits, | ||
922 | ntohs(bcast_packet->seqno) - | ||
923 | orig_node->last_bcast_seqno, 1)) | ||
924 | orig_node->last_bcast_seqno = ntohs(bcast_packet->seqno); | ||
943 | 925 | ||
944 | /* vis packet */ | 926 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
945 | case BAT_VIS: | ||
946 | /* drop if too short. */ | ||
947 | if (result < sizeof(struct ethhdr) + sizeof(struct vis_packet)) | ||
948 | continue; | ||
949 | 927 | ||
950 | /* not for me */ | 928 | /* rebroadcast packet */ |
951 | if (!is_my_mac(ethhdr->h_dest)) | 929 | add_bcast_packet_to_list(skb); |
952 | continue; | ||
953 | 930 | ||
954 | vis_packet = (struct vis_packet *)(packet_buff + sizeof(struct ethhdr)); | 931 | /* broadcast for me */ |
955 | vis_info_len = result - sizeof(struct ethhdr) - sizeof(struct vis_packet); | 932 | interface_rx(skb, hdr_size); |
956 | 933 | ||
957 | /* ignore own packets */ | 934 | return NET_RX_SUCCESS; |
958 | if (is_my_mac(vis_packet->vis_orig)) | 935 | } |
959 | continue; | ||
960 | 936 | ||
961 | if (is_my_mac(vis_packet->sender_orig)) | 937 | int recv_vis_packet(struct sk_buff *skb) |
962 | continue; | 938 | { |
939 | struct vis_packet *vis_packet; | ||
940 | struct ethhdr *ethhdr; | ||
941 | int hdr_size = sizeof(struct vis_packet); | ||
963 | 942 | ||
964 | switch (vis_packet->vis_type) { | 943 | if (skb_headlen(skb) < hdr_size) |
965 | case VIS_TYPE_SERVER_SYNC: | 944 | return NET_RX_DROP; |
966 | receive_server_sync_packet(vis_packet, vis_info_len); | ||
967 | break; | ||
968 | 945 | ||
969 | case VIS_TYPE_CLIENT_UPDATE: | 946 | vis_packet = (struct vis_packet *) skb->data; |
970 | receive_client_update_packet(vis_packet, vis_info_len); | 947 | ethhdr = (struct ethhdr *)skb_mac_header(skb); |
971 | break; | ||
972 | 948 | ||
973 | default: /* ignore unknown packet */ | 949 | /* not for me */ |
974 | break; | 950 | if (!is_my_mac(ethhdr->h_dest)) |
975 | } | 951 | return NET_RX_DROP; |
976 | 952 | ||
977 | break; | 953 | /* ignore own packets */ |
978 | } | 954 | if (is_my_mac(vis_packet->vis_orig)) |
955 | return NET_RX_DROP; | ||
979 | 956 | ||
980 | } | 957 | if (is_my_mac(vis_packet->sender_orig)) |
958 | return NET_RX_DROP; | ||
981 | 959 | ||
982 | if ((result < 0) && (result != -EAGAIN)) | 960 | switch (vis_packet->vis_type) { |
983 | debug_log(LOG_TYPE_CRIT, "Could not receive packet from interface %s: %i\n", batman_if->dev, result); | 961 | case VIS_TYPE_SERVER_SYNC: |
962 | /* TODO: handle fragmented skbs properly */ | ||
963 | receive_server_sync_packet(vis_packet, skb_headlen(skb)); | ||
964 | break; | ||
984 | 965 | ||
985 | /* lock for the next iteration */ | 966 | case VIS_TYPE_CLIENT_UPDATE: |
986 | rcu_read_lock(); | 967 | /* TODO: handle fragmented skbs properly */ |
987 | } | 968 | receive_client_update_packet(vis_packet, skb_headlen(skb)); |
988 | rcu_read_unlock(); | 969 | break; |
989 | 970 | ||
971 | default: /* ignore unknown packet */ | ||
972 | break; | ||
990 | } | 973 | } |
991 | kfree(packet_buff); | ||
992 | |||
993 | /* do not exit until kthread_stop() is actually called, otherwise it will wait for us | ||
994 | * forever. */ | ||
995 | while (!kthread_should_stop()) | ||
996 | schedule(); | ||
997 | |||
998 | return 0; | ||
999 | } | ||
1000 | |||
1001 | void batman_data_ready(struct sock *sk, int len) | ||
1002 | { | ||
1003 | void (*data_ready)(struct sock *, int) = sk->sk_user_data; | ||
1004 | |||
1005 | data_ready(sk, len); | ||
1006 | 974 | ||
1007 | atomic_set(&data_ready_cond, 1); | 975 | /* We take a copy of the data in the packet, so we should |
1008 | wake_up_interruptible(&thread_wait); | 976 | always free the skbuf. */ |
977 | return NET_RX_DROP; | ||
1009 | } | 978 | } |
1010 | |||
diff --git a/drivers/staging/batman-adv/routing.h b/drivers/staging/batman-adv/routing.h index 0123ea86debb..939b8d4f733c 100644 --- a/drivers/staging/batman-adv/routing.h +++ b/drivers/staging/batman-adv/routing.h | |||
@@ -22,13 +22,18 @@ | |||
22 | #include "types.h" | 22 | #include "types.h" |
23 | 23 | ||
24 | extern wait_queue_head_t thread_wait; | 24 | extern wait_queue_head_t thread_wait; |
25 | extern atomic_t exit_cond; | ||
26 | 25 | ||
27 | int originator_init(void); | ||
28 | void free_orig_node(void *data); | ||
29 | void originator_free(void); | ||
30 | void slide_own_bcast_window(struct batman_if *batman_if); | 26 | void slide_own_bcast_window(struct batman_if *batman_if); |
31 | void batman_data_ready(struct sock *sk, int len); | 27 | void receive_bat_packet(struct ethhdr *ethhdr, |
32 | void purge_orig(struct work_struct *work); | 28 | struct batman_packet *batman_packet, |
33 | int packet_recv_thread(void *data); | 29 | unsigned char *hna_buff, int hna_buff_len, |
34 | void receive_bat_packet(struct ethhdr *ethhdr, struct batman_packet *batman_packet, unsigned char *hna_buff, int hna_buff_len, struct batman_if *if_incoming); | 30 | struct batman_if *if_incoming); |
31 | void update_routes(struct orig_node *orig_node, | ||
32 | struct neigh_node *neigh_node, | ||
33 | unsigned char *hna_buff, int hna_buff_len); | ||
34 | int recv_icmp_packet(struct sk_buff *skb); | ||
35 | int recv_unicast_packet(struct sk_buff *skb); | ||
36 | int recv_bcast_packet(struct sk_buff *skb); | ||
37 | int recv_vis_packet(struct sk_buff *skb); | ||
38 | int recv_bat_packet(struct sk_buff *skb, | ||
39 | struct batman_if *batman_if); | ||
diff --git a/drivers/staging/batman-adv/send.c b/drivers/staging/batman-adv/send.c index eb617508cca4..2a9fac8c240e 100644 --- a/drivers/staging/batman-adv/send.c +++ b/drivers/staging/batman-adv/send.c | |||
@@ -21,16 +21,14 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "send.h" | 23 | #include "send.h" |
24 | #include "log.h" | ||
25 | #include "routing.h" | 24 | #include "routing.h" |
26 | #include "translation-table.h" | 25 | #include "translation-table.h" |
26 | #include "soft-interface.h" | ||
27 | #include "hard-interface.h" | 27 | #include "hard-interface.h" |
28 | #include "types.h" | 28 | #include "types.h" |
29 | #include "vis.h" | 29 | #include "vis.h" |
30 | #include "aggregation.h" | 30 | #include "aggregation.h" |
31 | 31 | ||
32 | #include "compat.h" | ||
33 | |||
34 | /* apply hop penalty for a normal link */ | 32 | /* apply hop penalty for a normal link */ |
35 | static uint8_t hop_penalty(const uint8_t tq) | 33 | static uint8_t hop_penalty(const uint8_t tq) |
36 | { | 34 | { |
@@ -59,51 +57,69 @@ static unsigned long forward_send_time(void) | |||
59 | return send_time; | 57 | return send_time; |
60 | } | 58 | } |
61 | 59 | ||
62 | /* sends a raw packet. */ | 60 | /* send out an already prepared packet to the given address via the |
63 | void send_raw_packet(unsigned char *pack_buff, int pack_buff_len, | 61 | * specified batman interface */ |
64 | struct batman_if *batman_if, uint8_t *dst_addr) | 62 | int send_skb_packet(struct sk_buff *skb, |
63 | struct batman_if *batman_if, | ||
64 | uint8_t *dst_addr) | ||
65 | { | 65 | { |
66 | struct ethhdr *ethhdr; | 66 | struct ethhdr *ethhdr; |
67 | struct sk_buff *skb; | ||
68 | int retval; | ||
69 | char *data; | ||
70 | 67 | ||
71 | if (batman_if->if_active != IF_ACTIVE) | 68 | if (batman_if->if_active != IF_ACTIVE) |
72 | return; | 69 | goto send_skb_err; |
70 | |||
71 | if (unlikely(!batman_if->net_dev)) | ||
72 | goto send_skb_err; | ||
73 | 73 | ||
74 | if (!(batman_if->net_dev->flags & IFF_UP)) { | 74 | if (!(batman_if->net_dev->flags & IFF_UP)) { |
75 | debug_log(LOG_TYPE_WARN, | 75 | printk(KERN_WARNING |
76 | "Interface %s is not up - can't send packet via that interface (IF_TO_BE_DEACTIVATED was here) !\n", | 76 | "batman-adv:Interface %s is not up - can't send packet via that interface!\n", |
77 | batman_if->dev); | 77 | batman_if->dev); |
78 | return; | 78 | goto send_skb_err; |
79 | } | 79 | } |
80 | 80 | ||
81 | skb = dev_alloc_skb(pack_buff_len + sizeof(struct ethhdr)); | 81 | /* push to the ethernet header. */ |
82 | if (!skb) | 82 | if (my_skb_push(skb, sizeof(struct ethhdr)) < 0) |
83 | return; | 83 | goto send_skb_err; |
84 | data = skb_put(skb, pack_buff_len + sizeof(struct ethhdr)); | ||
85 | 84 | ||
86 | memcpy(data + sizeof(struct ethhdr), pack_buff, pack_buff_len); | 85 | skb_reset_mac_header(skb); |
87 | 86 | ||
88 | ethhdr = (struct ethhdr *) data; | 87 | ethhdr = (struct ethhdr *) skb_mac_header(skb); |
89 | memcpy(ethhdr->h_source, batman_if->net_dev->dev_addr, ETH_ALEN); | 88 | memcpy(ethhdr->h_source, batman_if->net_dev->dev_addr, ETH_ALEN); |
90 | memcpy(ethhdr->h_dest, dst_addr, ETH_ALEN); | 89 | memcpy(ethhdr->h_dest, dst_addr, ETH_ALEN); |
91 | ethhdr->h_proto = __constant_htons(ETH_P_BATMAN); | 90 | ethhdr->h_proto = __constant_htons(ETH_P_BATMAN); |
92 | 91 | ||
93 | skb_reset_mac_header(skb); | ||
94 | skb_set_network_header(skb, ETH_HLEN); | 92 | skb_set_network_header(skb, ETH_HLEN); |
95 | skb->priority = TC_PRIO_CONTROL; | 93 | skb->priority = TC_PRIO_CONTROL; |
96 | skb->protocol = __constant_htons(ETH_P_BATMAN); | 94 | skb->protocol = __constant_htons(ETH_P_BATMAN); |
95 | |||
97 | skb->dev = batman_if->net_dev; | 96 | skb->dev = batman_if->net_dev; |
98 | 97 | ||
99 | /* dev_queue_xmit() returns a negative result on error. However on | 98 | /* dev_queue_xmit() returns a negative result on error. However on |
100 | * congestion and traffic shaping, it drops and returns NET_XMIT_DROP | 99 | * congestion and traffic shaping, it drops and returns NET_XMIT_DROP |
101 | * (which is > 0). This will not be treated as an error. */ | 100 | * (which is > 0). This will not be treated as an error. */ |
102 | retval = dev_queue_xmit(skb); | 101 | |
103 | if (retval < 0) | 102 | return dev_queue_xmit(skb); |
104 | debug_log(LOG_TYPE_CRIT, | 103 | send_skb_err: |
105 | "Can't write to raw socket (IF_TO_BE_DEACTIVATED was here): %i\n", | 104 | kfree_skb(skb); |
106 | retval); | 105 | return NET_XMIT_DROP; |
106 | } | ||
107 | |||
108 | /* sends a raw packet. */ | ||
109 | void send_raw_packet(unsigned char *pack_buff, int pack_buff_len, | ||
110 | struct batman_if *batman_if, uint8_t *dst_addr) | ||
111 | { | ||
112 | struct sk_buff *skb; | ||
113 | char *data; | ||
114 | |||
115 | skb = dev_alloc_skb(pack_buff_len + sizeof(struct ethhdr)); | ||
116 | if (!skb) | ||
117 | return; | ||
118 | data = skb_put(skb, pack_buff_len + sizeof(struct ethhdr)); | ||
119 | memcpy(data + sizeof(struct ethhdr), pack_buff, pack_buff_len); | ||
120 | /* pull back to the batman "network header" */ | ||
121 | skb_pull(skb, sizeof(struct ethhdr)); | ||
122 | send_skb_packet(skb, batman_if, dst_addr); | ||
107 | } | 123 | } |
108 | 124 | ||
109 | /* Send a packet to a given interface */ | 125 | /* Send a packet to a given interface */ |
@@ -114,7 +130,6 @@ static void send_packet_to_if(struct forw_packet *forw_packet, | |||
114 | uint8_t packet_num; | 130 | uint8_t packet_num; |
115 | int16_t buff_pos; | 131 | int16_t buff_pos; |
116 | struct batman_packet *batman_packet; | 132 | struct batman_packet *batman_packet; |
117 | char orig_str[ETH_STR_LEN]; | ||
118 | 133 | ||
119 | if (batman_if->if_active != IF_ACTIVE) | 134 | if (batman_if->if_active != IF_ACTIVE) |
120 | return; | 135 | return; |
@@ -136,19 +151,18 @@ static void send_packet_to_if(struct forw_packet *forw_packet, | |||
136 | else | 151 | else |
137 | batman_packet->flags &= ~DIRECTLINK; | 152 | batman_packet->flags &= ~DIRECTLINK; |
138 | 153 | ||
139 | addr_to_string(orig_str, batman_packet->orig); | ||
140 | fwd_str = (packet_num > 0 ? "Forwarding" : (forw_packet->own ? | 154 | fwd_str = (packet_num > 0 ? "Forwarding" : (forw_packet->own ? |
141 | "Sending own" : | 155 | "Sending own" : |
142 | "Forwarding")); | 156 | "Forwarding")); |
143 | debug_log(LOG_TYPE_BATMAN, | 157 | bat_dbg(DBG_BATMAN, |
144 | "%s %spacket (originator %s, seqno %d, TQ %d, TTL %d, IDF %s) on interface %s [%s]\n", | 158 | "%s %spacket (originator %pM, seqno %d, TQ %d, TTL %d, IDF %s) on interface %s [%s]\n", |
145 | fwd_str, | 159 | fwd_str, |
146 | (packet_num > 0 ? "aggregated " : ""), | 160 | (packet_num > 0 ? "aggregated " : ""), |
147 | orig_str, ntohs(batman_packet->seqno), | 161 | batman_packet->orig, ntohs(batman_packet->seqno), |
148 | batman_packet->tq, batman_packet->ttl, | 162 | batman_packet->tq, batman_packet->ttl, |
149 | (batman_packet->flags & DIRECTLINK ? | 163 | (batman_packet->flags & DIRECTLINK ? |
150 | "on" : "off"), | 164 | "on" : "off"), |
151 | batman_if->dev, batman_if->addr_str); | 165 | batman_if->dev, batman_if->addr_str); |
152 | 166 | ||
153 | buff_pos += sizeof(struct batman_packet) + | 167 | buff_pos += sizeof(struct batman_packet) + |
154 | (batman_packet->num_hna * ETH_ALEN); | 168 | (batman_packet->num_hna * ETH_ALEN); |
@@ -168,32 +182,28 @@ static void send_packet(struct forw_packet *forw_packet) | |||
168 | struct batman_if *batman_if; | 182 | struct batman_if *batman_if; |
169 | struct batman_packet *batman_packet = | 183 | struct batman_packet *batman_packet = |
170 | (struct batman_packet *)(forw_packet->packet_buff); | 184 | (struct batman_packet *)(forw_packet->packet_buff); |
171 | char orig_str[ETH_STR_LEN]; | ||
172 | unsigned char directlink = (batman_packet->flags & DIRECTLINK ? 1 : 0); | 185 | unsigned char directlink = (batman_packet->flags & DIRECTLINK ? 1 : 0); |
173 | 186 | ||
174 | if (!forw_packet->if_incoming) { | 187 | if (!forw_packet->if_incoming) { |
175 | debug_log(LOG_TYPE_CRIT, | 188 | printk(KERN_ERR "batman-adv: Error - can't forward packet: incoming iface not specified\n"); |
176 | "Error - can't forward packet: incoming iface not specified\n"); | ||
177 | return; | 189 | return; |
178 | } | 190 | } |
179 | 191 | ||
180 | if (forw_packet->if_incoming->if_active != IF_ACTIVE) | 192 | if (forw_packet->if_incoming->if_active != IF_ACTIVE) |
181 | return; | 193 | return; |
182 | 194 | ||
183 | addr_to_string(orig_str, batman_packet->orig); | ||
184 | |||
185 | /* multihomed peer assumed */ | 195 | /* multihomed peer assumed */ |
186 | /* non-primary OGMs are only broadcasted on their interface */ | 196 | /* non-primary OGMs are only broadcasted on their interface */ |
187 | if ((directlink && (batman_packet->ttl == 1)) || | 197 | if ((directlink && (batman_packet->ttl == 1)) || |
188 | (forw_packet->own && (forw_packet->if_incoming->if_num > 0))) { | 198 | (forw_packet->own && (forw_packet->if_incoming->if_num > 0))) { |
189 | 199 | ||
190 | /* FIXME: what about aggregated packets ? */ | 200 | /* FIXME: what about aggregated packets ? */ |
191 | debug_log(LOG_TYPE_BATMAN, | 201 | bat_dbg(DBG_BATMAN, |
192 | "%s packet (originator %s, seqno %d, TTL %d) on interface %s [%s]\n", | 202 | "%s packet (originator %pM, seqno %d, TTL %d) on interface %s [%s]\n", |
193 | (forw_packet->own ? "Sending own" : "Forwarding"), | 203 | (forw_packet->own ? "Sending own" : "Forwarding"), |
194 | orig_str, ntohs(batman_packet->seqno), | 204 | batman_packet->orig, ntohs(batman_packet->seqno), |
195 | batman_packet->ttl, forw_packet->if_incoming->dev, | 205 | batman_packet->ttl, forw_packet->if_incoming->dev, |
196 | forw_packet->if_incoming->addr_str); | 206 | forw_packet->if_incoming->addr_str); |
197 | 207 | ||
198 | send_raw_packet(forw_packet->packet_buff, | 208 | send_raw_packet(forw_packet->packet_buff, |
199 | forw_packet->packet_len, | 209 | forw_packet->packet_len, |
@@ -238,6 +248,7 @@ void schedule_own_packet(struct batman_if *batman_if) | |||
238 | { | 248 | { |
239 | unsigned long send_time; | 249 | unsigned long send_time; |
240 | struct batman_packet *batman_packet; | 250 | struct batman_packet *batman_packet; |
251 | int vis_server = atomic_read(&vis_mode); | ||
241 | 252 | ||
242 | /** | 253 | /** |
243 | * the interface gets activated here to avoid race conditions between | 254 | * the interface gets activated here to avoid race conditions between |
@@ -262,7 +273,7 @@ void schedule_own_packet(struct batman_if *batman_if) | |||
262 | /* change sequence number to network order */ | 273 | /* change sequence number to network order */ |
263 | batman_packet->seqno = htons((uint16_t)atomic_read(&batman_if->seqno)); | 274 | batman_packet->seqno = htons((uint16_t)atomic_read(&batman_if->seqno)); |
264 | 275 | ||
265 | if (is_vis_server()) | 276 | if (vis_server == VIS_TYPE_SERVER_SYNC) |
266 | batman_packet->flags = VIS_SERVER; | 277 | batman_packet->flags = VIS_SERVER; |
267 | else | 278 | else |
268 | batman_packet->flags = 0; | 279 | batman_packet->flags = 0; |
@@ -286,7 +297,7 @@ void schedule_forward_packet(struct orig_node *orig_node, | |||
286 | unsigned long send_time; | 297 | unsigned long send_time; |
287 | 298 | ||
288 | if (batman_packet->ttl <= 1) { | 299 | if (batman_packet->ttl <= 1) { |
289 | debug_log(LOG_TYPE_BATMAN, "ttl exceeded \n"); | 300 | bat_dbg(DBG_BATMAN, "ttl exceeded \n"); |
290 | return; | 301 | return; |
291 | } | 302 | } |
292 | 303 | ||
@@ -314,9 +325,9 @@ void schedule_forward_packet(struct orig_node *orig_node, | |||
314 | /* apply hop penalty */ | 325 | /* apply hop penalty */ |
315 | batman_packet->tq = hop_penalty(batman_packet->tq); | 326 | batman_packet->tq = hop_penalty(batman_packet->tq); |
316 | 327 | ||
317 | debug_log(LOG_TYPE_BATMAN, "Forwarding packet: tq_orig: %i, tq_avg: %i, tq_forw: %i, ttl_orig: %i, ttl_forw: %i \n", | 328 | bat_dbg(DBG_BATMAN, "Forwarding packet: tq_orig: %i, tq_avg: %i, tq_forw: %i, ttl_orig: %i, ttl_forw: %i \n", |
318 | in_tq, tq_avg, batman_packet->tq, in_ttl - 1, | 329 | in_tq, tq_avg, batman_packet->tq, in_ttl - 1, |
319 | batman_packet->ttl); | 330 | batman_packet->ttl); |
320 | 331 | ||
321 | batman_packet->seqno = htons(batman_packet->seqno); | 332 | batman_packet->seqno = htons(batman_packet->seqno); |
322 | 333 | ||
@@ -333,6 +344,8 @@ void schedule_forward_packet(struct orig_node *orig_node, | |||
333 | 344 | ||
334 | static void forw_packet_free(struct forw_packet *forw_packet) | 345 | static void forw_packet_free(struct forw_packet *forw_packet) |
335 | { | 346 | { |
347 | if (forw_packet->skb) | ||
348 | kfree_skb(forw_packet->skb); | ||
336 | kfree(forw_packet->packet_buff); | 349 | kfree(forw_packet->packet_buff); |
337 | kfree(forw_packet); | 350 | kfree(forw_packet); |
338 | } | 351 | } |
@@ -340,12 +353,13 @@ static void forw_packet_free(struct forw_packet *forw_packet) | |||
340 | static void _add_bcast_packet_to_list(struct forw_packet *forw_packet, | 353 | static void _add_bcast_packet_to_list(struct forw_packet *forw_packet, |
341 | unsigned long send_time) | 354 | unsigned long send_time) |
342 | { | 355 | { |
356 | unsigned long flags; | ||
343 | INIT_HLIST_NODE(&forw_packet->list); | 357 | INIT_HLIST_NODE(&forw_packet->list); |
344 | 358 | ||
345 | /* add new packet to packet list */ | 359 | /* add new packet to packet list */ |
346 | spin_lock(&forw_bcast_list_lock); | 360 | spin_lock_irqsave(&forw_bcast_list_lock, flags); |
347 | hlist_add_head(&forw_packet->list, &forw_bcast_list); | 361 | hlist_add_head(&forw_packet->list, &forw_bcast_list); |
348 | spin_unlock(&forw_bcast_list_lock); | 362 | spin_unlock_irqrestore(&forw_bcast_list_lock, flags); |
349 | 363 | ||
350 | /* start timer for this packet */ | 364 | /* start timer for this packet */ |
351 | INIT_DELAYED_WORK(&forw_packet->delayed_work, | 365 | INIT_DELAYED_WORK(&forw_packet->delayed_work, |
@@ -354,7 +368,7 @@ static void _add_bcast_packet_to_list(struct forw_packet *forw_packet, | |||
354 | send_time); | 368 | send_time); |
355 | } | 369 | } |
356 | 370 | ||
357 | void add_bcast_packet_to_list(unsigned char *packet_buff, int packet_len) | 371 | void add_bcast_packet_to_list(struct sk_buff *skb) |
358 | { | 372 | { |
359 | struct forw_packet *forw_packet; | 373 | struct forw_packet *forw_packet; |
360 | 374 | ||
@@ -362,14 +376,16 @@ void add_bcast_packet_to_list(unsigned char *packet_buff, int packet_len) | |||
362 | if (!forw_packet) | 376 | if (!forw_packet) |
363 | return; | 377 | return; |
364 | 378 | ||
365 | forw_packet->packet_buff = kmalloc(packet_len, GFP_ATOMIC); | 379 | skb = skb_copy(skb, GFP_ATOMIC); |
366 | if (!forw_packet->packet_buff) { | 380 | if (!skb) { |
367 | kfree(forw_packet); | 381 | kfree(forw_packet); |
368 | return; | 382 | return; |
369 | } | 383 | } |
370 | 384 | ||
371 | forw_packet->packet_len = packet_len; | 385 | skb_reset_mac_header(skb); |
372 | memcpy(forw_packet->packet_buff, packet_buff, forw_packet->packet_len); | 386 | |
387 | forw_packet->skb = skb; | ||
388 | forw_packet->packet_buff = NULL; | ||
373 | 389 | ||
374 | /* how often did we send the bcast packet ? */ | 390 | /* how often did we send the bcast packet ? */ |
375 | forw_packet->num_packets = 0; | 391 | forw_packet->num_packets = 0; |
@@ -384,16 +400,20 @@ void send_outstanding_bcast_packet(struct work_struct *work) | |||
384 | container_of(work, struct delayed_work, work); | 400 | container_of(work, struct delayed_work, work); |
385 | struct forw_packet *forw_packet = | 401 | struct forw_packet *forw_packet = |
386 | container_of(delayed_work, struct forw_packet, delayed_work); | 402 | container_of(delayed_work, struct forw_packet, delayed_work); |
403 | unsigned long flags; | ||
404 | struct sk_buff *skb1; | ||
387 | 405 | ||
388 | spin_lock(&forw_bcast_list_lock); | 406 | spin_lock_irqsave(&forw_bcast_list_lock, flags); |
389 | hlist_del(&forw_packet->list); | 407 | hlist_del(&forw_packet->list); |
390 | spin_unlock(&forw_bcast_list_lock); | 408 | spin_unlock_irqrestore(&forw_bcast_list_lock, flags); |
391 | 409 | ||
392 | /* rebroadcast packet */ | 410 | /* rebroadcast packet */ |
393 | rcu_read_lock(); | 411 | rcu_read_lock(); |
394 | list_for_each_entry_rcu(batman_if, &if_list, list) { | 412 | list_for_each_entry_rcu(batman_if, &if_list, list) { |
395 | send_raw_packet(forw_packet->packet_buff, | 413 | /* send a copy of the saved skb */ |
396 | forw_packet->packet_len, | 414 | skb1 = skb_copy(forw_packet->skb, GFP_ATOMIC); |
415 | if (skb1) | ||
416 | send_skb_packet(skb1, | ||
397 | batman_if, broadcastAddr); | 417 | batman_if, broadcastAddr); |
398 | } | 418 | } |
399 | rcu_read_unlock(); | 419 | rcu_read_unlock(); |
@@ -415,10 +435,11 @@ void send_outstanding_bat_packet(struct work_struct *work) | |||
415 | container_of(work, struct delayed_work, work); | 435 | container_of(work, struct delayed_work, work); |
416 | struct forw_packet *forw_packet = | 436 | struct forw_packet *forw_packet = |
417 | container_of(delayed_work, struct forw_packet, delayed_work); | 437 | container_of(delayed_work, struct forw_packet, delayed_work); |
438 | unsigned long flags; | ||
418 | 439 | ||
419 | spin_lock(&forw_bat_list_lock); | 440 | spin_lock_irqsave(&forw_bat_list_lock, flags); |
420 | hlist_del(&forw_packet->list); | 441 | hlist_del(&forw_packet->list); |
421 | spin_unlock(&forw_bat_list_lock); | 442 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
422 | 443 | ||
423 | send_packet(forw_packet); | 444 | send_packet(forw_packet); |
424 | 445 | ||
@@ -438,38 +459,39 @@ void purge_outstanding_packets(void) | |||
438 | { | 459 | { |
439 | struct forw_packet *forw_packet; | 460 | struct forw_packet *forw_packet; |
440 | struct hlist_node *tmp_node, *safe_tmp_node; | 461 | struct hlist_node *tmp_node, *safe_tmp_node; |
462 | unsigned long flags; | ||
441 | 463 | ||
442 | debug_log(LOG_TYPE_BATMAN, "purge_outstanding_packets()\n"); | 464 | bat_dbg(DBG_BATMAN, "purge_outstanding_packets()\n"); |
443 | 465 | ||
444 | /* free bcast list */ | 466 | /* free bcast list */ |
445 | spin_lock(&forw_bcast_list_lock); | 467 | spin_lock_irqsave(&forw_bcast_list_lock, flags); |
446 | hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, | 468 | hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, |
447 | &forw_bcast_list, list) { | 469 | &forw_bcast_list, list) { |
448 | 470 | ||
449 | spin_unlock(&forw_bcast_list_lock); | 471 | spin_unlock_irqrestore(&forw_bcast_list_lock, flags); |
450 | 472 | ||
451 | /** | 473 | /** |
452 | * send_outstanding_bcast_packet() will lock the list to | 474 | * send_outstanding_bcast_packet() will lock the list to |
453 | * delete the item from the list | 475 | * delete the item from the list |
454 | */ | 476 | */ |
455 | cancel_delayed_work_sync(&forw_packet->delayed_work); | 477 | cancel_delayed_work_sync(&forw_packet->delayed_work); |
456 | spin_lock(&forw_bcast_list_lock); | 478 | spin_lock_irqsave(&forw_bcast_list_lock, flags); |
457 | } | 479 | } |
458 | spin_unlock(&forw_bcast_list_lock); | 480 | spin_unlock_irqrestore(&forw_bcast_list_lock, flags); |
459 | 481 | ||
460 | /* free batman packet list */ | 482 | /* free batman packet list */ |
461 | spin_lock(&forw_bat_list_lock); | 483 | spin_lock_irqsave(&forw_bat_list_lock, flags); |
462 | hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, | 484 | hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, |
463 | &forw_bat_list, list) { | 485 | &forw_bat_list, list) { |
464 | 486 | ||
465 | spin_unlock(&forw_bat_list_lock); | 487 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
466 | 488 | ||
467 | /** | 489 | /** |
468 | * send_outstanding_bat_packet() will lock the list to | 490 | * send_outstanding_bat_packet() will lock the list to |
469 | * delete the item from the list | 491 | * delete the item from the list |
470 | */ | 492 | */ |
471 | cancel_delayed_work_sync(&forw_packet->delayed_work); | 493 | cancel_delayed_work_sync(&forw_packet->delayed_work); |
472 | spin_lock(&forw_bat_list_lock); | 494 | spin_lock_irqsave(&forw_bat_list_lock, flags); |
473 | } | 495 | } |
474 | spin_unlock(&forw_bat_list_lock); | 496 | spin_unlock_irqrestore(&forw_bat_list_lock, flags); |
475 | } | 497 | } |
diff --git a/drivers/staging/batman-adv/send.h b/drivers/staging/batman-adv/send.h index 59d500917a35..5fc6f3417cb6 100644 --- a/drivers/staging/batman-adv/send.h +++ b/drivers/staging/batman-adv/send.h | |||
@@ -22,6 +22,9 @@ | |||
22 | #include "types.h" | 22 | #include "types.h" |
23 | 23 | ||
24 | void send_own_packet_work(struct work_struct *work); | 24 | void send_own_packet_work(struct work_struct *work); |
25 | int send_skb_packet(struct sk_buff *skb, | ||
26 | struct batman_if *batman_if, | ||
27 | uint8_t *dst_addr); | ||
25 | void send_raw_packet(unsigned char *pack_buff, int pack_buff_len, | 28 | void send_raw_packet(unsigned char *pack_buff, int pack_buff_len, |
26 | struct batman_if *batman_if, uint8_t *dst_addr); | 29 | struct batman_if *batman_if, uint8_t *dst_addr); |
27 | void schedule_own_packet(struct batman_if *batman_if); | 30 | void schedule_own_packet(struct batman_if *batman_if); |
@@ -30,7 +33,7 @@ void schedule_forward_packet(struct orig_node *orig_node, | |||
30 | struct batman_packet *batman_packet, | 33 | struct batman_packet *batman_packet, |
31 | uint8_t directlink, int hna_buff_len, | 34 | uint8_t directlink, int hna_buff_len, |
32 | struct batman_if *if_outgoing); | 35 | struct batman_if *if_outgoing); |
33 | void add_bcast_packet_to_list(unsigned char *packet_buff, int packet_len); | 36 | void add_bcast_packet_to_list(struct sk_buff *skb); |
34 | void send_outstanding_bcast_packet(struct work_struct *work); | 37 | void send_outstanding_bcast_packet(struct work_struct *work); |
35 | void send_outstanding_bat_packet(struct work_struct *work); | 38 | void send_outstanding_bat_packet(struct work_struct *work); |
36 | void purge_outstanding_packets(void); | 39 | void purge_outstanding_packets(void); |
diff --git a/drivers/staging/batman-adv/soft-interface.c b/drivers/staging/batman-adv/soft-interface.c index d543f50b647f..c9b35d9f7991 100644 --- a/drivers/staging/batman-adv/soft-interface.c +++ b/drivers/staging/batman-adv/soft-interface.c | |||
@@ -24,18 +24,15 @@ | |||
24 | #include "hard-interface.h" | 24 | #include "hard-interface.h" |
25 | #include "send.h" | 25 | #include "send.h" |
26 | #include "translation-table.h" | 26 | #include "translation-table.h" |
27 | #include "log.h" | ||
28 | #include "types.h" | 27 | #include "types.h" |
29 | #include "hash.h" | 28 | #include "hash.h" |
30 | #include <linux/ethtool.h> | 29 | #include <linux/ethtool.h> |
31 | #include <linux/etherdevice.h> | 30 | #include <linux/etherdevice.h> |
32 | #include "compat.h" | ||
33 | 31 | ||
34 | static uint16_t bcast_seqno = 1; /* give own bcast messages seq numbers to avoid | 32 | static uint16_t bcast_seqno = 1; /* give own bcast messages seq numbers to avoid |
35 | * broadcast storms */ | 33 | * broadcast storms */ |
36 | static int32_t skb_packets; | 34 | static int32_t skb_packets; |
37 | static int32_t skb_bad_packets; | 35 | static int32_t skb_bad_packets; |
38 | static int32_t lock_dropped; | ||
39 | 36 | ||
40 | unsigned char mainIfAddr[ETH_ALEN]; | 37 | unsigned char mainIfAddr[ETH_ALEN]; |
41 | static unsigned char mainIfAddr_default[ETH_ALEN]; | 38 | static unsigned char mainIfAddr_default[ETH_ALEN]; |
@@ -68,12 +65,12 @@ int main_if_was_up(void) | |||
68 | return (memcmp(mainIfAddr, mainIfAddr_default, ETH_ALEN) != 0 ? 1 : 0); | 65 | return (memcmp(mainIfAddr, mainIfAddr_default, ETH_ALEN) != 0 ? 1 : 0); |
69 | } | 66 | } |
70 | 67 | ||
71 | static int my_skb_push(struct sk_buff *skb, unsigned int len) | 68 | int my_skb_push(struct sk_buff *skb, unsigned int len) |
72 | { | 69 | { |
73 | int result = 0; | 70 | int result = 0; |
74 | 71 | ||
75 | skb_packets++; | 72 | skb_packets++; |
76 | if (skb->data - len < skb->head) { | 73 | if (skb_headroom(skb) < len) { |
77 | skb_bad_packets++; | 74 | skb_bad_packets++; |
78 | result = pskb_expand_head(skb, len, 0, GFP_ATOMIC); | 75 | result = pskb_expand_head(skb, len, 0, GFP_ATOMIC); |
79 | 76 | ||
@@ -122,7 +119,7 @@ void interface_setup(struct net_device *dev) | |||
122 | 119 | ||
123 | /* generate random address */ | 120 | /* generate random address */ |
124 | random_ether_addr(dev_addr); | 121 | random_ether_addr(dev_addr); |
125 | memcpy(dev->dev_addr, dev_addr, sizeof(dev->dev_addr)); | 122 | memcpy(dev->dev_addr, dev_addr, ETH_ALEN); |
126 | 123 | ||
127 | SET_ETHTOOL_OPS(dev, &bat_ethtool_ops); | 124 | SET_ETHTOOL_OPS(dev, &bat_ethtool_ops); |
128 | 125 | ||
@@ -147,9 +144,18 @@ struct net_device_stats *interface_stats(struct net_device *dev) | |||
147 | return &priv->stats; | 144 | return &priv->stats; |
148 | } | 145 | } |
149 | 146 | ||
150 | int interface_set_mac_addr(struct net_device *dev, void *addr) | 147 | int interface_set_mac_addr(struct net_device *dev, void *p) |
151 | { | 148 | { |
152 | return -EBUSY; | 149 | struct sockaddr *addr = p; |
150 | |||
151 | if (!is_valid_ether_addr(addr->sa_data)) | ||
152 | return -EADDRNOTAVAIL; | ||
153 | |||
154 | hna_local_remove(dev->dev_addr, "mac address changed"); | ||
155 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | ||
156 | hna_local_add(dev->dev_addr); | ||
157 | |||
158 | return 0; | ||
153 | } | 159 | } |
154 | 160 | ||
155 | int interface_change_mtu(struct net_device *dev, int new_mtu) | 161 | int interface_change_mtu(struct net_device *dev, int new_mtu) |
@@ -170,7 +176,10 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev) | |||
170 | struct orig_node *orig_node; | 176 | struct orig_node *orig_node; |
171 | struct ethhdr *ethhdr = (struct ethhdr *)skb->data; | 177 | struct ethhdr *ethhdr = (struct ethhdr *)skb->data; |
172 | struct bat_priv *priv = netdev_priv(dev); | 178 | struct bat_priv *priv = netdev_priv(dev); |
179 | struct batman_if *batman_if; | ||
180 | uint8_t dstaddr[6]; | ||
173 | int data_len = skb->len; | 181 | int data_len = skb->len; |
182 | unsigned long flags; | ||
174 | 183 | ||
175 | if (atomic_read(&module_state) != MODULE_ACTIVE) | 184 | if (atomic_read(&module_state) != MODULE_ACTIVE) |
176 | goto dropped; | 185 | goto dropped; |
@@ -186,7 +195,6 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev) | |||
186 | goto dropped; | 195 | goto dropped; |
187 | 196 | ||
188 | bcast_packet = (struct bcast_packet *)skb->data; | 197 | bcast_packet = (struct bcast_packet *)skb->data; |
189 | |||
190 | bcast_packet->version = COMPAT_VERSION; | 198 | bcast_packet->version = COMPAT_VERSION; |
191 | 199 | ||
192 | /* batman packet type: broadcast */ | 200 | /* batman packet type: broadcast */ |
@@ -195,27 +203,21 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev) | |||
195 | /* hw address of first interface is the orig mac because only | 203 | /* hw address of first interface is the orig mac because only |
196 | * this mac is known throughout the mesh */ | 204 | * this mac is known throughout the mesh */ |
197 | memcpy(bcast_packet->orig, mainIfAddr, ETH_ALEN); | 205 | memcpy(bcast_packet->orig, mainIfAddr, ETH_ALEN); |
206 | |||
198 | /* set broadcast sequence number */ | 207 | /* set broadcast sequence number */ |
199 | bcast_packet->seqno = htons(bcast_seqno); | 208 | bcast_packet->seqno = htons(bcast_seqno); |
200 | 209 | ||
201 | bcast_seqno++; | 210 | bcast_seqno++; |
202 | 211 | ||
203 | /* broadcast packet */ | 212 | /* broadcast packet */ |
204 | add_bcast_packet_to_list(skb->data, skb->len); | 213 | add_bcast_packet_to_list(skb); |
214 | /* a copy is stored in the bcast list, therefore removing | ||
215 | * the original skb. */ | ||
216 | kfree_skb(skb); | ||
205 | 217 | ||
206 | /* unicast packet */ | 218 | /* unicast packet */ |
207 | } else { | 219 | } else { |
208 | 220 | spin_lock_irqsave(&orig_hash_lock, flags); | |
209 | /* simply spin_lock()ing can deadlock when the lock is already | ||
210 | * hold. */ | ||
211 | /* TODO: defer the work in a working queue instead of | ||
212 | * dropping */ | ||
213 | if (!spin_trylock(&orig_hash_lock)) { | ||
214 | lock_dropped++; | ||
215 | debug_log(LOG_TYPE_NOTICE, "%d packets dropped because lock was hold\n", lock_dropped); | ||
216 | goto dropped; | ||
217 | } | ||
218 | |||
219 | /* get routing information */ | 221 | /* get routing information */ |
220 | orig_node = ((struct orig_node *)hash_find(orig_hash, | 222 | orig_node = ((struct orig_node *)hash_find(orig_hash, |
221 | ethhdr->h_dest)); | 223 | ethhdr->h_dest)); |
@@ -244,14 +246,17 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev) | |||
244 | if (orig_node->batman_if->if_active != IF_ACTIVE) | 246 | if (orig_node->batman_if->if_active != IF_ACTIVE) |
245 | goto unlock; | 247 | goto unlock; |
246 | 248 | ||
247 | send_raw_packet(skb->data, skb->len, | 249 | /* don't lock while sending the packets ... we therefore |
248 | orig_node->batman_if, | 250 | * copy the required data before sending */ |
249 | orig_node->router->addr); | 251 | |
252 | batman_if = orig_node->batman_if; | ||
253 | memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); | ||
254 | spin_unlock_irqrestore(&orig_hash_lock, flags); | ||
255 | |||
256 | send_skb_packet(skb, batman_if, dstaddr); | ||
250 | } else { | 257 | } else { |
251 | goto unlock; | 258 | goto unlock; |
252 | } | 259 | } |
253 | |||
254 | spin_unlock(&orig_hash_lock); | ||
255 | } | 260 | } |
256 | 261 | ||
257 | priv->stats.tx_packets++; | 262 | priv->stats.tx_packets++; |
@@ -259,42 +264,44 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev) | |||
259 | goto end; | 264 | goto end; |
260 | 265 | ||
261 | unlock: | 266 | unlock: |
262 | spin_unlock(&orig_hash_lock); | 267 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
263 | dropped: | 268 | dropped: |
264 | priv->stats.tx_dropped++; | 269 | priv->stats.tx_dropped++; |
265 | end: | 270 | end: |
266 | kfree_skb(skb); | 271 | return NETDEV_TX_OK; |
267 | return 0; | ||
268 | } | 272 | } |
269 | 273 | ||
270 | void interface_rx(struct net_device *dev, void *packet, int packet_len) | 274 | void interface_rx(struct sk_buff *skb, int hdr_size) |
271 | { | 275 | { |
272 | struct sk_buff *skb; | 276 | struct net_device *dev = soft_device; |
273 | struct bat_priv *priv = netdev_priv(dev); | 277 | struct bat_priv *priv = netdev_priv(dev); |
274 | 278 | ||
275 | skb = dev_alloc_skb(packet_len); | 279 | /* check if enough space is available for pulling, and pull */ |
276 | 280 | if (!pskb_may_pull(skb, hdr_size)) { | |
277 | if (!skb) { | 281 | kfree_skb(skb); |
278 | priv->stats.rx_dropped++; | 282 | return; |
279 | goto out; | ||
280 | } | 283 | } |
284 | skb_pull_rcsum(skb, hdr_size); | ||
285 | /* skb_set_mac_header(skb, -sizeof(struct ethhdr));*/ | ||
281 | 286 | ||
282 | memcpy(skb_put(skb, packet_len), packet, packet_len); | ||
283 | |||
284 | /* Write metadata, and then pass to the receive level */ | ||
285 | skb->dev = dev; | 287 | skb->dev = dev; |
286 | skb->protocol = eth_type_trans(skb, dev); | 288 | skb->protocol = eth_type_trans(skb, dev); |
287 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 289 | |
290 | /* should not be neccesary anymore as we use skb_pull_rcsum() | ||
291 | * TODO: please verify this and remove this TODO | ||
292 | * -- Dec 21st 2009, Simon Wunderlich */ | ||
293 | |||
294 | /* skb->ip_summed = CHECKSUM_UNNECESSARY;*/ | ||
295 | |||
296 | /* TODO: set skb->pkt_type to PACKET_BROADCAST, PACKET_MULTICAST, | ||
297 | * PACKET_OTHERHOST or PACKET_HOST */ | ||
288 | 298 | ||
289 | priv->stats.rx_packets++; | 299 | priv->stats.rx_packets++; |
290 | priv->stats.rx_bytes += packet_len; | 300 | priv->stats.rx_bytes += skb->len; |
291 | 301 | ||
292 | dev->last_rx = jiffies; | 302 | dev->last_rx = jiffies; |
293 | 303 | ||
294 | netif_rx(skb); | 304 | netif_rx(skb); |
295 | |||
296 | out: | ||
297 | return; | ||
298 | } | 305 | } |
299 | 306 | ||
300 | /* ethtool */ | 307 | /* ethtool */ |
@@ -330,7 +337,6 @@ static u32 bat_get_msglevel(struct net_device *dev) | |||
330 | 337 | ||
331 | static void bat_set_msglevel(struct net_device *dev, u32 value) | 338 | static void bat_set_msglevel(struct net_device *dev, u32 value) |
332 | { | 339 | { |
333 | return; | ||
334 | } | 340 | } |
335 | 341 | ||
336 | static u32 bat_get_link(struct net_device *dev) | 342 | static u32 bat_get_link(struct net_device *dev) |
diff --git a/drivers/staging/batman-adv/soft-interface.h b/drivers/staging/batman-adv/soft-interface.h index 515e276ef53d..c0cad8134b2b 100644 --- a/drivers/staging/batman-adv/soft-interface.h +++ b/drivers/staging/batman-adv/soft-interface.h | |||
@@ -28,6 +28,7 @@ struct net_device_stats *interface_stats(struct net_device *dev); | |||
28 | int interface_set_mac_addr(struct net_device *dev, void *addr); | 28 | int interface_set_mac_addr(struct net_device *dev, void *addr); |
29 | int interface_change_mtu(struct net_device *dev, int new_mtu); | 29 | int interface_change_mtu(struct net_device *dev, int new_mtu); |
30 | int interface_tx(struct sk_buff *skb, struct net_device *dev); | 30 | int interface_tx(struct sk_buff *skb, struct net_device *dev); |
31 | void interface_rx(struct net_device *dev, void *packet, int packet_len); | 31 | void interface_rx(struct sk_buff *skb, int hdr_size); |
32 | int my_skb_push(struct sk_buff *skb, unsigned int len); | ||
32 | 33 | ||
33 | extern unsigned char mainIfAddr[]; | 34 | extern unsigned char mainIfAddr[]; |
diff --git a/drivers/staging/batman-adv/translation-table.c b/drivers/staging/batman-adv/translation-table.c index c2190e177c56..d56f6654de0d 100644 --- a/drivers/staging/batman-adv/translation-table.c +++ b/drivers/staging/batman-adv/translation-table.c | |||
@@ -21,11 +21,9 @@ | |||
21 | 21 | ||
22 | #include "main.h" | 22 | #include "main.h" |
23 | #include "translation-table.h" | 23 | #include "translation-table.h" |
24 | #include "log.h" | ||
25 | #include "soft-interface.h" | 24 | #include "soft-interface.h" |
26 | #include "types.h" | 25 | #include "types.h" |
27 | #include "hash.h" | 26 | #include "hash.h" |
28 | #include "compat.h" | ||
29 | 27 | ||
30 | struct hashtable_t *hna_local_hash; | 28 | struct hashtable_t *hna_local_hash; |
31 | static struct hashtable_t *hna_global_hash; | 29 | static struct hashtable_t *hna_global_hash; |
@@ -62,7 +60,6 @@ void hna_local_add(uint8_t *addr) | |||
62 | struct hna_local_entry *hna_local_entry; | 60 | struct hna_local_entry *hna_local_entry; |
63 | struct hna_global_entry *hna_global_entry; | 61 | struct hna_global_entry *hna_global_entry; |
64 | struct hashtable_t *swaphash; | 62 | struct hashtable_t *swaphash; |
65 | char hna_str[ETH_STR_LEN]; | ||
66 | unsigned long flags; | 63 | unsigned long flags; |
67 | 64 | ||
68 | spin_lock_irqsave(&hna_local_hash_lock, flags); | 65 | spin_lock_irqsave(&hna_local_hash_lock, flags); |
@@ -75,19 +72,17 @@ void hna_local_add(uint8_t *addr) | |||
75 | return; | 72 | return; |
76 | } | 73 | } |
77 | 74 | ||
78 | addr_to_string(hna_str, addr); | ||
79 | |||
80 | /* only announce as many hosts as possible in the batman-packet and | 75 | /* only announce as many hosts as possible in the batman-packet and |
81 | space in batman_packet->num_hna That also should give a limit to | 76 | space in batman_packet->num_hna That also should give a limit to |
82 | MAC-flooding. */ | 77 | MAC-flooding. */ |
83 | if ((num_hna + 1 > (ETH_DATA_LEN - BAT_PACKET_LEN) / ETH_ALEN) || | 78 | if ((num_hna + 1 > (ETH_DATA_LEN - BAT_PACKET_LEN) / ETH_ALEN) || |
84 | (num_hna + 1 > 255)) { | 79 | (num_hna + 1 > 255)) { |
85 | debug_log(LOG_TYPE_ROUTES, "Can't add new local hna entry (%s): number of local hna entries exceeds packet size \n", hna_str); | 80 | bat_dbg(DBG_ROUTES, "Can't add new local hna entry (%pM): number of local hna entries exceeds packet size \n", addr); |
86 | return; | 81 | return; |
87 | } | 82 | } |
88 | 83 | ||
89 | debug_log(LOG_TYPE_ROUTES, "Creating new local hna entry: %s \n", | 84 | bat_dbg(DBG_ROUTES, "Creating new local hna entry: %pM \n", |
90 | hna_str); | 85 | addr); |
91 | 86 | ||
92 | hna_local_entry = kmalloc(sizeof(struct hna_local_entry), GFP_ATOMIC); | 87 | hna_local_entry = kmalloc(sizeof(struct hna_local_entry), GFP_ATOMIC); |
93 | if (!hna_local_entry) | 88 | if (!hna_local_entry) |
@@ -113,7 +108,7 @@ void hna_local_add(uint8_t *addr) | |||
113 | hna_local_hash->size * 2); | 108 | hna_local_hash->size * 2); |
114 | 109 | ||
115 | if (swaphash == NULL) | 110 | if (swaphash == NULL) |
116 | debug_log(LOG_TYPE_CRIT, "Couldn't resize local hna hash table \n"); | 111 | printk(KERN_ERR "batman-adv:Couldn't resize local hna hash table \n"); |
117 | else | 112 | else |
118 | hna_local_hash = swaphash; | 113 | hna_local_hash = swaphash; |
119 | } | 114 | } |
@@ -135,18 +130,18 @@ void hna_local_add(uint8_t *addr) | |||
135 | int hna_local_fill_buffer(unsigned char *buff, int buff_len) | 130 | int hna_local_fill_buffer(unsigned char *buff, int buff_len) |
136 | { | 131 | { |
137 | struct hna_local_entry *hna_local_entry; | 132 | struct hna_local_entry *hna_local_entry; |
138 | struct hash_it_t *hashit = NULL; | 133 | HASHIT(hashit); |
139 | int i = 0; | 134 | int i = 0; |
140 | unsigned long flags; | 135 | unsigned long flags; |
141 | 136 | ||
142 | spin_lock_irqsave(&hna_local_hash_lock, flags); | 137 | spin_lock_irqsave(&hna_local_hash_lock, flags); |
143 | 138 | ||
144 | while (NULL != (hashit = hash_iterate(hna_local_hash, hashit))) { | 139 | while (hash_iterate(hna_local_hash, &hashit)) { |
145 | 140 | ||
146 | if (buff_len < (i + 1) * ETH_ALEN) | 141 | if (buff_len < (i + 1) * ETH_ALEN) |
147 | break; | 142 | break; |
148 | 143 | ||
149 | hna_local_entry = hashit->bucket->data; | 144 | hna_local_entry = hashit.bucket->data; |
150 | memcpy(buff + (i * ETH_ALEN), hna_local_entry->addr, ETH_ALEN); | 145 | memcpy(buff + (i * ETH_ALEN), hna_local_entry->addr, ETH_ALEN); |
151 | 146 | ||
152 | i++; | 147 | i++; |
@@ -164,18 +159,18 @@ int hna_local_fill_buffer(unsigned char *buff, int buff_len) | |||
164 | int hna_local_fill_buffer_text(unsigned char *buff, int buff_len) | 159 | int hna_local_fill_buffer_text(unsigned char *buff, int buff_len) |
165 | { | 160 | { |
166 | struct hna_local_entry *hna_local_entry; | 161 | struct hna_local_entry *hna_local_entry; |
167 | struct hash_it_t *hashit = NULL; | 162 | HASHIT(hashit); |
168 | int bytes_written = 0; | 163 | int bytes_written = 0; |
169 | unsigned long flags; | 164 | unsigned long flags; |
170 | 165 | ||
171 | spin_lock_irqsave(&hna_local_hash_lock, flags); | 166 | spin_lock_irqsave(&hna_local_hash_lock, flags); |
172 | 167 | ||
173 | while (NULL != (hashit = hash_iterate(hna_local_hash, hashit))) { | 168 | while (hash_iterate(hna_local_hash, &hashit)) { |
174 | 169 | ||
175 | if (buff_len < bytes_written + ETH_STR_LEN + 4) | 170 | if (buff_len < bytes_written + ETH_STR_LEN + 4) |
176 | break; | 171 | break; |
177 | 172 | ||
178 | hna_local_entry = hashit->bucket->data; | 173 | hna_local_entry = hashit.bucket->data; |
179 | 174 | ||
180 | bytes_written += snprintf(buff + bytes_written, ETH_STR_LEN + 4, | 175 | bytes_written += snprintf(buff + bytes_written, ETH_STR_LEN + 4, |
181 | " * %02x:%02x:%02x:%02x:%02x:%02x\n", | 176 | " * %02x:%02x:%02x:%02x:%02x:%02x\n", |
@@ -202,27 +197,39 @@ static void _hna_local_del(void *data) | |||
202 | static void hna_local_del(struct hna_local_entry *hna_local_entry, | 197 | static void hna_local_del(struct hna_local_entry *hna_local_entry, |
203 | char *message) | 198 | char *message) |
204 | { | 199 | { |
205 | char hna_str[ETH_STR_LEN]; | 200 | bat_dbg(DBG_ROUTES, "Deleting local hna entry (%pM): %s \n", |
206 | 201 | hna_local_entry->addr, message); | |
207 | addr_to_string(hna_str, hna_local_entry->addr); | ||
208 | debug_log(LOG_TYPE_ROUTES, "Deleting local hna entry (%s): %s \n", | ||
209 | hna_str, message); | ||
210 | 202 | ||
211 | hash_remove(hna_local_hash, hna_local_entry->addr); | 203 | hash_remove(hna_local_hash, hna_local_entry->addr); |
212 | _hna_local_del(hna_local_entry); | 204 | _hna_local_del(hna_local_entry); |
213 | } | 205 | } |
214 | 206 | ||
207 | void hna_local_remove(uint8_t *addr, char *message) | ||
208 | { | ||
209 | struct hna_local_entry *hna_local_entry; | ||
210 | unsigned long flags; | ||
211 | |||
212 | spin_lock_irqsave(&hna_local_hash_lock, flags); | ||
213 | |||
214 | hna_local_entry = (struct hna_local_entry *) | ||
215 | hash_find(hna_local_hash, addr); | ||
216 | if (hna_local_entry) | ||
217 | hna_local_del(hna_local_entry, message); | ||
218 | |||
219 | spin_unlock_irqrestore(&hna_local_hash_lock, flags); | ||
220 | } | ||
221 | |||
215 | void hna_local_purge(struct work_struct *work) | 222 | void hna_local_purge(struct work_struct *work) |
216 | { | 223 | { |
217 | struct hna_local_entry *hna_local_entry; | 224 | struct hna_local_entry *hna_local_entry; |
218 | struct hash_it_t *hashit = NULL; | 225 | HASHIT(hashit); |
219 | unsigned long flags; | 226 | unsigned long flags; |
220 | unsigned long timeout; | 227 | unsigned long timeout; |
221 | 228 | ||
222 | spin_lock_irqsave(&hna_local_hash_lock, flags); | 229 | spin_lock_irqsave(&hna_local_hash_lock, flags); |
223 | 230 | ||
224 | while (NULL != (hashit = hash_iterate(hna_local_hash, hashit))) { | 231 | while (hash_iterate(hna_local_hash, &hashit)) { |
225 | hna_local_entry = hashit->bucket->data; | 232 | hna_local_entry = hashit.bucket->data; |
226 | 233 | ||
227 | timeout = hna_local_entry->last_seen + | 234 | timeout = hna_local_entry->last_seen + |
228 | ((LOCAL_HNA_TIMEOUT / 1000) * HZ); | 235 | ((LOCAL_HNA_TIMEOUT / 1000) * HZ); |
@@ -264,13 +271,10 @@ void hna_global_add_orig(struct orig_node *orig_node, | |||
264 | struct hna_global_entry *hna_global_entry; | 271 | struct hna_global_entry *hna_global_entry; |
265 | struct hna_local_entry *hna_local_entry; | 272 | struct hna_local_entry *hna_local_entry; |
266 | struct hashtable_t *swaphash; | 273 | struct hashtable_t *swaphash; |
267 | char hna_str[ETH_STR_LEN], orig_str[ETH_STR_LEN]; | ||
268 | int hna_buff_count = 0; | 274 | int hna_buff_count = 0; |
269 | unsigned long flags; | 275 | unsigned long flags; |
270 | unsigned char *hna_ptr; | 276 | unsigned char *hna_ptr; |
271 | 277 | ||
272 | addr_to_string(orig_str, orig_node->orig); | ||
273 | |||
274 | while ((hna_buff_count + 1) * ETH_ALEN <= hna_buff_len) { | 278 | while ((hna_buff_count + 1) * ETH_ALEN <= hna_buff_len) { |
275 | spin_lock_irqsave(&hna_global_hash_lock, flags); | 279 | spin_lock_irqsave(&hna_global_hash_lock, flags); |
276 | 280 | ||
@@ -290,8 +294,9 @@ void hna_global_add_orig(struct orig_node *orig_node, | |||
290 | 294 | ||
291 | memcpy(hna_global_entry->addr, hna_ptr, ETH_ALEN); | 295 | memcpy(hna_global_entry->addr, hna_ptr, ETH_ALEN); |
292 | 296 | ||
293 | addr_to_string(hna_str, hna_global_entry->addr); | 297 | bat_dbg(DBG_ROUTES, |
294 | debug_log(LOG_TYPE_ROUTES, "Creating new global hna entry: %s (via %s)\n", hna_str, orig_str); | 298 | "Creating new global hna entry: %pM (via %pM)\n", |
299 | hna_global_entry->addr, orig_node->orig); | ||
295 | 300 | ||
296 | spin_lock_irqsave(&hna_global_hash_lock, flags); | 301 | spin_lock_irqsave(&hna_global_hash_lock, flags); |
297 | hash_add(hna_global_hash, hna_global_entry); | 302 | hash_add(hna_global_hash, hna_global_entry); |
@@ -316,14 +321,16 @@ void hna_global_add_orig(struct orig_node *orig_node, | |||
316 | hna_buff_count++; | 321 | hna_buff_count++; |
317 | } | 322 | } |
318 | 323 | ||
319 | orig_node->hna_buff_len = hna_buff_len; | 324 | /* initialize, and overwrite if malloc succeeds */ |
325 | orig_node->hna_buff = NULL; | ||
326 | orig_node->hna_buff_len = 0; | ||
320 | 327 | ||
321 | if (orig_node->hna_buff_len > 0) { | 328 | if (hna_buff_len > 0) { |
322 | orig_node->hna_buff = kmalloc(orig_node->hna_buff_len, | 329 | orig_node->hna_buff = kmalloc(hna_buff_len, GFP_ATOMIC); |
323 | GFP_ATOMIC); | 330 | if (orig_node->hna_buff) { |
324 | memcpy(orig_node->hna_buff, hna_buff, orig_node->hna_buff_len); | 331 | memcpy(orig_node->hna_buff, hna_buff, hna_buff_len); |
325 | } else { | 332 | orig_node->hna_buff_len = hna_buff_len; |
326 | orig_node->hna_buff = NULL; | 333 | } |
327 | } | 334 | } |
328 | 335 | ||
329 | spin_lock_irqsave(&hna_global_hash_lock, flags); | 336 | spin_lock_irqsave(&hna_global_hash_lock, flags); |
@@ -333,7 +340,7 @@ void hna_global_add_orig(struct orig_node *orig_node, | |||
333 | hna_global_hash->size * 2); | 340 | hna_global_hash->size * 2); |
334 | 341 | ||
335 | if (swaphash == NULL) | 342 | if (swaphash == NULL) |
336 | debug_log(LOG_TYPE_CRIT, "Couldn't resize global hna hash table \n"); | 343 | printk(KERN_ERR "batman-adv:Couldn't resize global hna hash table \n"); |
337 | else | 344 | else |
338 | hna_global_hash = swaphash; | 345 | hna_global_hash = swaphash; |
339 | } | 346 | } |
@@ -344,17 +351,17 @@ void hna_global_add_orig(struct orig_node *orig_node, | |||
344 | int hna_global_fill_buffer_text(unsigned char *buff, int buff_len) | 351 | int hna_global_fill_buffer_text(unsigned char *buff, int buff_len) |
345 | { | 352 | { |
346 | struct hna_global_entry *hna_global_entry; | 353 | struct hna_global_entry *hna_global_entry; |
347 | struct hash_it_t *hashit = NULL; | 354 | HASHIT(hashit); |
348 | int bytes_written = 0; | 355 | int bytes_written = 0; |
349 | unsigned long flags; | 356 | unsigned long flags; |
350 | 357 | ||
351 | spin_lock_irqsave(&hna_global_hash_lock, flags); | 358 | spin_lock_irqsave(&hna_global_hash_lock, flags); |
352 | 359 | ||
353 | while (NULL != (hashit = hash_iterate(hna_global_hash, hashit))) { | 360 | while (hash_iterate(hna_global_hash, &hashit)) { |
354 | if (buff_len < bytes_written + (2 * ETH_STR_LEN) + 10) | 361 | if (buff_len < bytes_written + (2 * ETH_STR_LEN) + 10) |
355 | break; | 362 | break; |
356 | 363 | ||
357 | hna_global_entry = hashit->bucket->data; | 364 | hna_global_entry = hashit.bucket->data; |
358 | 365 | ||
359 | bytes_written += snprintf(buff + bytes_written, | 366 | bytes_written += snprintf(buff + bytes_written, |
360 | (2 * ETH_STR_LEN) + 10, | 367 | (2 * ETH_STR_LEN) + 10, |
@@ -381,12 +388,9 @@ int hna_global_fill_buffer_text(unsigned char *buff, int buff_len) | |||
381 | void _hna_global_del_orig(struct hna_global_entry *hna_global_entry, | 388 | void _hna_global_del_orig(struct hna_global_entry *hna_global_entry, |
382 | char *message) | 389 | char *message) |
383 | { | 390 | { |
384 | char hna_str[ETH_STR_LEN], orig_str[ETH_STR_LEN]; | 391 | bat_dbg(DBG_ROUTES, "Deleting global hna entry %pM (via %pM): %s \n", |
385 | 392 | hna_global_entry->addr, hna_global_entry->orig_node->orig, | |
386 | addr_to_string(orig_str, hna_global_entry->orig_node->orig); | 393 | message); |
387 | addr_to_string(hna_str, hna_global_entry->addr); | ||
388 | |||
389 | debug_log(LOG_TYPE_ROUTES, "Deleting global hna entry %s (via %s): %s \n", hna_str, orig_str, message); | ||
390 | 394 | ||
391 | hash_remove(hna_global_hash, hna_global_entry->addr); | 395 | hash_remove(hna_global_hash, hna_global_entry->addr); |
392 | kfree(hna_global_entry); | 396 | kfree(hna_global_entry); |
diff --git a/drivers/staging/batman-adv/translation-table.h b/drivers/staging/batman-adv/translation-table.h index f7da81129318..281125b729fb 100644 --- a/drivers/staging/batman-adv/translation-table.h +++ b/drivers/staging/batman-adv/translation-table.h | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | int hna_local_init(void); | 24 | int hna_local_init(void); |
25 | void hna_local_add(uint8_t *addr); | 25 | void hna_local_add(uint8_t *addr); |
26 | void hna_local_remove(uint8_t *addr, char *message); | ||
26 | int hna_local_fill_buffer(unsigned char *buff, int buff_len); | 27 | int hna_local_fill_buffer(unsigned char *buff, int buff_len); |
27 | int hna_local_fill_buffer_text(unsigned char *buff, int buff_len); | 28 | int hna_local_fill_buffer_text(unsigned char *buff, int buff_len); |
28 | void hna_local_purge(struct work_struct *work); | 29 | void hna_local_purge(struct work_struct *work); |
diff --git a/drivers/staging/batman-adv/types.h b/drivers/staging/batman-adv/types.h index 3a0ef0c38c93..dec1b54031b6 100644 --- a/drivers/staging/batman-adv/types.h +++ b/drivers/staging/batman-adv/types.h | |||
@@ -39,7 +39,6 @@ struct batman_if { | |||
39 | char if_active; | 39 | char if_active; |
40 | char addr_str[ETH_STR_LEN]; | 40 | char addr_str[ETH_STR_LEN]; |
41 | struct net_device *net_dev; | 41 | struct net_device *net_dev; |
42 | struct socket *raw_sock; | ||
43 | atomic_t seqno; | 42 | atomic_t seqno; |
44 | unsigned char *packet_buff; | 43 | unsigned char *packet_buff; |
45 | int packet_len; | 44 | int packet_len; |
@@ -75,7 +74,7 @@ struct neigh_node { | |||
75 | uint8_t tq_index; | 74 | uint8_t tq_index; |
76 | uint8_t tq_avg; | 75 | uint8_t tq_avg; |
77 | uint8_t last_ttl; | 76 | uint8_t last_ttl; |
78 | unsigned long last_valid; /* when last packet via this neighbour was received */ | 77 | unsigned long last_valid; /* when last packet via this neighbor was received */ |
79 | TYPE_OF_WORD real_bits[NUM_WORDS]; | 78 | TYPE_OF_WORD real_bits[NUM_WORDS]; |
80 | struct orig_node *orig_node; | 79 | struct orig_node *orig_node; |
81 | struct batman_if *if_incoming; | 80 | struct batman_if *if_incoming; |
@@ -113,6 +112,7 @@ struct forw_packet { /* structure for forw_list maintaining packet | |||
113 | struct hlist_node list; | 112 | struct hlist_node list; |
114 | unsigned long send_time; | 113 | unsigned long send_time; |
115 | uint8_t own; | 114 | uint8_t own; |
115 | struct sk_buff *skb; | ||
116 | unsigned char *packet_buff; | 116 | unsigned char *packet_buff; |
117 | uint16_t packet_len; | 117 | uint16_t packet_len; |
118 | uint32_t direct_link_flags; | 118 | uint32_t direct_link_flags; |
@@ -121,4 +121,14 @@ struct forw_packet { /* structure for forw_list maintaining packet | |||
121 | struct batman_if *if_incoming; | 121 | struct batman_if *if_incoming; |
122 | }; | 122 | }; |
123 | 123 | ||
124 | /* While scanning for vis-entries of a particular vis-originator | ||
125 | * this list collects its interfaces to create a subgraph/cluster | ||
126 | * out of them later | ||
127 | */ | ||
128 | struct if_list_entry { | ||
129 | uint8_t addr[ETH_ALEN]; | ||
130 | bool primary; | ||
131 | struct hlist_node list; | ||
132 | }; | ||
133 | |||
124 | #endif | 134 | #endif |
diff --git a/drivers/staging/batman-adv/vis.c b/drivers/staging/batman-adv/vis.c index f6c9acb289ed..fedec1bb3097 100644 --- a/drivers/staging/batman-adv/vis.c +++ b/drivers/staging/batman-adv/vis.c | |||
@@ -23,11 +23,9 @@ | |||
23 | #include "send.h" | 23 | #include "send.h" |
24 | #include "translation-table.h" | 24 | #include "translation-table.h" |
25 | #include "vis.h" | 25 | #include "vis.h" |
26 | #include "log.h" | ||
27 | #include "soft-interface.h" | 26 | #include "soft-interface.h" |
28 | #include "hard-interface.h" | 27 | #include "hard-interface.h" |
29 | #include "hash.h" | 28 | #include "hash.h" |
30 | #include "compat.h" | ||
31 | 29 | ||
32 | struct hashtable_t *vis_hash; | 30 | struct hashtable_t *vis_hash; |
33 | DEFINE_SPINLOCK(vis_hash_lock); | 31 | DEFINE_SPINLOCK(vis_hash_lock); |
@@ -50,39 +48,6 @@ static void free_info(void *data) | |||
50 | kfree(info); | 48 | kfree(info); |
51 | } | 49 | } |
52 | 50 | ||
53 | /* set the mode of the visualization to client or server */ | ||
54 | void vis_set_mode(int mode) | ||
55 | { | ||
56 | spin_lock(&vis_hash_lock); | ||
57 | |||
58 | if (my_vis_info != NULL) | ||
59 | my_vis_info->packet.vis_type = mode; | ||
60 | |||
61 | spin_unlock(&vis_hash_lock); | ||
62 | } | ||
63 | |||
64 | /* is_vis_server(), locked outside */ | ||
65 | static int is_vis_server_locked(void) | ||
66 | { | ||
67 | if (my_vis_info != NULL) | ||
68 | if (my_vis_info->packet.vis_type == VIS_TYPE_SERVER_SYNC) | ||
69 | return 1; | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | /* get the current set mode */ | ||
75 | int is_vis_server(void) | ||
76 | { | ||
77 | int ret = 0; | ||
78 | |||
79 | spin_lock(&vis_hash_lock); | ||
80 | ret = is_vis_server_locked(); | ||
81 | spin_unlock(&vis_hash_lock); | ||
82 | |||
83 | return ret; | ||
84 | } | ||
85 | |||
86 | /* Compare two vis packets, used by the hashing algorithm */ | 51 | /* Compare two vis packets, used by the hashing algorithm */ |
87 | static int vis_info_cmp(void *data1, void *data2) | 52 | static int vis_info_cmp(void *data1, void *data2) |
88 | { | 53 | { |
@@ -115,6 +80,68 @@ static int vis_info_choose(void *data, int size) | |||
115 | return hash % size; | 80 | return hash % size; |
116 | } | 81 | } |
117 | 82 | ||
83 | /* insert interface to the list of interfaces of one originator, if it | ||
84 | * does not already exist in the list */ | ||
85 | static void proc_vis_insert_interface(const uint8_t *interface, | ||
86 | struct hlist_head *if_list, | ||
87 | bool primary) | ||
88 | { | ||
89 | struct if_list_entry *entry; | ||
90 | struct hlist_node *pos; | ||
91 | |||
92 | hlist_for_each_entry(entry, pos, if_list, list) { | ||
93 | if (compare_orig(entry->addr, (void *)interface)) | ||
94 | return; | ||
95 | } | ||
96 | |||
97 | /* its a new address, add it to the list */ | ||
98 | entry = kmalloc(sizeof(*entry), GFP_KERNEL); | ||
99 | if (!entry) | ||
100 | return; | ||
101 | memcpy(entry->addr, interface, ETH_ALEN); | ||
102 | entry->primary = primary; | ||
103 | hlist_add_head(&entry->list, if_list); | ||
104 | } | ||
105 | |||
106 | void proc_vis_read_prim_sec(struct seq_file *seq, | ||
107 | struct hlist_head *if_list) | ||
108 | { | ||
109 | struct if_list_entry *entry; | ||
110 | struct hlist_node *pos, *n; | ||
111 | char tmp_addr_str[ETH_STR_LEN]; | ||
112 | |||
113 | hlist_for_each_entry_safe(entry, pos, n, if_list, list) { | ||
114 | if (entry->primary) { | ||
115 | seq_printf(seq, "PRIMARY, "); | ||
116 | } else { | ||
117 | addr_to_string(tmp_addr_str, entry->addr); | ||
118 | seq_printf(seq, "SEC %s, ", tmp_addr_str); | ||
119 | } | ||
120 | |||
121 | hlist_del(&entry->list); | ||
122 | kfree(entry); | ||
123 | } | ||
124 | } | ||
125 | |||
126 | /* read an entry */ | ||
127 | void proc_vis_read_entry(struct seq_file *seq, | ||
128 | struct vis_info_entry *entry, | ||
129 | struct hlist_head *if_list, | ||
130 | uint8_t *vis_orig) | ||
131 | { | ||
132 | char to[40]; | ||
133 | |||
134 | addr_to_string(to, entry->dest); | ||
135 | if (entry->quality == 0) { | ||
136 | proc_vis_insert_interface(vis_orig, if_list, true); | ||
137 | seq_printf(seq, "HNA %s, ", to); | ||
138 | } else { | ||
139 | proc_vis_insert_interface(entry->src, if_list, | ||
140 | compare_orig(entry->src, vis_orig)); | ||
141 | seq_printf(seq, "TQ %s %d, ", to, entry->quality); | ||
142 | } | ||
143 | } | ||
144 | |||
118 | /* tries to add one entry to the receive list. */ | 145 | /* tries to add one entry to the receive list. */ |
119 | static void recv_list_add(struct list_head *recv_list, char *mac) | 146 | static void recv_list_add(struct list_head *recv_list, char *mac) |
120 | { | 147 | { |
@@ -208,21 +235,23 @@ void receive_server_sync_packet(struct vis_packet *vis_packet, int vis_info_len) | |||
208 | { | 235 | { |
209 | struct vis_info *info; | 236 | struct vis_info *info; |
210 | int is_new; | 237 | int is_new; |
238 | unsigned long flags; | ||
239 | int vis_server = atomic_read(&vis_mode); | ||
211 | 240 | ||
212 | spin_lock(&vis_hash_lock); | 241 | spin_lock_irqsave(&vis_hash_lock, flags); |
213 | info = add_packet(vis_packet, vis_info_len, &is_new); | 242 | info = add_packet(vis_packet, vis_info_len, &is_new); |
214 | if (info == NULL) | 243 | if (info == NULL) |
215 | goto end; | 244 | goto end; |
216 | 245 | ||
217 | /* only if we are server ourselves and packet is newer than the one in | 246 | /* only if we are server ourselves and packet is newer than the one in |
218 | * hash.*/ | 247 | * hash.*/ |
219 | if (is_vis_server_locked() && is_new) { | 248 | if (vis_server == VIS_TYPE_SERVER_SYNC && is_new) { |
220 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); | 249 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); |
221 | if (list_empty(&info->send_list)) | 250 | if (list_empty(&info->send_list)) |
222 | list_add_tail(&info->send_list, &send_list); | 251 | list_add_tail(&info->send_list, &send_list); |
223 | } | 252 | } |
224 | end: | 253 | end: |
225 | spin_unlock(&vis_hash_lock); | 254 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
226 | } | 255 | } |
227 | 256 | ||
228 | /* handle an incoming client update packet and schedule forward if needed. */ | 257 | /* handle an incoming client update packet and schedule forward if needed. */ |
@@ -231,12 +260,14 @@ void receive_client_update_packet(struct vis_packet *vis_packet, | |||
231 | { | 260 | { |
232 | struct vis_info *info; | 261 | struct vis_info *info; |
233 | int is_new; | 262 | int is_new; |
263 | unsigned long flags; | ||
264 | int vis_server = atomic_read(&vis_mode); | ||
234 | 265 | ||
235 | /* clients shall not broadcast. */ | 266 | /* clients shall not broadcast. */ |
236 | if (is_bcast(vis_packet->target_orig)) | 267 | if (is_bcast(vis_packet->target_orig)) |
237 | return; | 268 | return; |
238 | 269 | ||
239 | spin_lock(&vis_hash_lock); | 270 | spin_lock_irqsave(&vis_hash_lock, flags); |
240 | info = add_packet(vis_packet, vis_info_len, &is_new); | 271 | info = add_packet(vis_packet, vis_info_len, &is_new); |
241 | if (info == NULL) | 272 | if (info == NULL) |
242 | goto end; | 273 | goto end; |
@@ -244,7 +275,7 @@ void receive_client_update_packet(struct vis_packet *vis_packet, | |||
244 | 275 | ||
245 | 276 | ||
246 | /* send only if we're the target server or ... */ | 277 | /* send only if we're the target server or ... */ |
247 | if (is_vis_server_locked() && | 278 | if (vis_server == VIS_TYPE_SERVER_SYNC && |
248 | is_my_mac(info->packet.target_orig) && | 279 | is_my_mac(info->packet.target_orig) && |
249 | is_new) { | 280 | is_new) { |
250 | info->packet.vis_type = VIS_TYPE_SERVER_SYNC; /* upgrade! */ | 281 | info->packet.vis_type = VIS_TYPE_SERVER_SYNC; /* upgrade! */ |
@@ -258,7 +289,7 @@ void receive_client_update_packet(struct vis_packet *vis_packet, | |||
258 | list_add_tail(&info->send_list, &send_list); | 289 | list_add_tail(&info->send_list, &send_list); |
259 | } | 290 | } |
260 | end: | 291 | end: |
261 | spin_unlock(&vis_hash_lock); | 292 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
262 | } | 293 | } |
263 | 294 | ||
264 | /* Walk the originators and find the VIS server with the best tq. Set the packet | 295 | /* Walk the originators and find the VIS server with the best tq. Set the packet |
@@ -267,12 +298,12 @@ end: | |||
267 | * Must be called with the originator hash locked */ | 298 | * Must be called with the originator hash locked */ |
268 | static int find_best_vis_server(struct vis_info *info) | 299 | static int find_best_vis_server(struct vis_info *info) |
269 | { | 300 | { |
270 | struct hash_it_t *hashit = NULL; | 301 | HASHIT(hashit); |
271 | struct orig_node *orig_node; | 302 | struct orig_node *orig_node; |
272 | int best_tq = -1; | 303 | int best_tq = -1; |
273 | 304 | ||
274 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 305 | while (hash_iterate(orig_hash, &hashit)) { |
275 | orig_node = hashit->bucket->data; | 306 | orig_node = hashit.bucket->data; |
276 | if ((orig_node != NULL) && | 307 | if ((orig_node != NULL) && |
277 | (orig_node->router != NULL) && | 308 | (orig_node->router != NULL) && |
278 | (orig_node->flags & VIS_SERVER) && | 309 | (orig_node->flags & VIS_SERVER) && |
@@ -298,7 +329,8 @@ static bool vis_packet_full(struct vis_info *info) | |||
298 | * returns 0 on success, -1 if no packet could be generated */ | 329 | * returns 0 on success, -1 if no packet could be generated */ |
299 | static int generate_vis_packet(void) | 330 | static int generate_vis_packet(void) |
300 | { | 331 | { |
301 | struct hash_it_t *hashit = NULL; | 332 | HASHIT(hashit_local); |
333 | HASHIT(hashit_global); | ||
302 | struct orig_node *orig_node; | 334 | struct orig_node *orig_node; |
303 | struct vis_info *info = (struct vis_info *)my_vis_info; | 335 | struct vis_info *info = (struct vis_info *)my_vis_info; |
304 | struct vis_info_entry *entry, *entry_array; | 336 | struct vis_info_entry *entry, *entry_array; |
@@ -307,27 +339,27 @@ static int generate_vis_packet(void) | |||
307 | unsigned long flags; | 339 | unsigned long flags; |
308 | 340 | ||
309 | info->first_seen = jiffies; | 341 | info->first_seen = jiffies; |
342 | info->packet.vis_type = atomic_read(&vis_mode); | ||
310 | 343 | ||
311 | spin_lock(&orig_hash_lock); | 344 | spin_lock_irqsave(&orig_hash_lock, flags); |
312 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); | 345 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); |
313 | info->packet.ttl = TTL; | 346 | info->packet.ttl = TTL; |
314 | info->packet.seqno++; | 347 | info->packet.seqno++; |
315 | info->packet.entries = 0; | 348 | info->packet.entries = 0; |
316 | 349 | ||
317 | if (!is_vis_server_locked()) { | 350 | if (info->packet.vis_type == VIS_TYPE_CLIENT_UPDATE) { |
318 | best_tq = find_best_vis_server(info); | 351 | best_tq = find_best_vis_server(info); |
319 | if (best_tq < 0) { | 352 | if (best_tq < 0) { |
320 | spin_unlock(&orig_hash_lock); | 353 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
321 | return -1; | 354 | return -1; |
322 | } | 355 | } |
323 | } | 356 | } |
324 | hashit = NULL; | ||
325 | 357 | ||
326 | entry_array = (struct vis_info_entry *) | 358 | entry_array = (struct vis_info_entry *) |
327 | ((char *)info + sizeof(struct vis_info)); | 359 | ((char *)info + sizeof(struct vis_info)); |
328 | 360 | ||
329 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 361 | while (hash_iterate(orig_hash, &hashit_global)) { |
330 | orig_node = hashit->bucket->data; | 362 | orig_node = hashit_global.bucket->data; |
331 | if (orig_node->router != NULL | 363 | if (orig_node->router != NULL |
332 | && compare_orig(orig_node->router->addr, orig_node->orig) | 364 | && compare_orig(orig_node->router->addr, orig_node->orig) |
333 | && orig_node->batman_if | 365 | && orig_node->batman_if |
@@ -342,18 +374,17 @@ static int generate_vis_packet(void) | |||
342 | info->packet.entries++; | 374 | info->packet.entries++; |
343 | 375 | ||
344 | if (vis_packet_full(info)) { | 376 | if (vis_packet_full(info)) { |
345 | spin_unlock(&orig_hash_lock); | 377 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
346 | return 0; | 378 | return 0; |
347 | } | 379 | } |
348 | } | 380 | } |
349 | } | 381 | } |
350 | 382 | ||
351 | spin_unlock(&orig_hash_lock); | 383 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
352 | 384 | ||
353 | hashit = NULL; | ||
354 | spin_lock_irqsave(&hna_local_hash_lock, flags); | 385 | spin_lock_irqsave(&hna_local_hash_lock, flags); |
355 | while (NULL != (hashit = hash_iterate(hna_local_hash, hashit))) { | 386 | while (hash_iterate(hna_local_hash, &hashit_local)) { |
356 | hna_local_entry = hashit->bucket->data; | 387 | hna_local_entry = hashit_local.bucket->data; |
357 | entry = &entry_array[info->packet.entries]; | 388 | entry = &entry_array[info->packet.entries]; |
358 | memset(entry->src, 0, ETH_ALEN); | 389 | memset(entry->src, 0, ETH_ALEN); |
359 | memcpy(entry->dest, hna_local_entry->addr, ETH_ALEN); | 390 | memcpy(entry->dest, hna_local_entry->addr, ETH_ALEN); |
@@ -371,16 +402,16 @@ static int generate_vis_packet(void) | |||
371 | 402 | ||
372 | static void purge_vis_packets(void) | 403 | static void purge_vis_packets(void) |
373 | { | 404 | { |
374 | struct hash_it_t *hashit = NULL; | 405 | HASHIT(hashit); |
375 | struct vis_info *info; | 406 | struct vis_info *info; |
376 | 407 | ||
377 | while (NULL != (hashit = hash_iterate(vis_hash, hashit))) { | 408 | while (hash_iterate(vis_hash, &hashit)) { |
378 | info = hashit->bucket->data; | 409 | info = hashit.bucket->data; |
379 | if (info == my_vis_info) /* never purge own data. */ | 410 | if (info == my_vis_info) /* never purge own data. */ |
380 | continue; | 411 | continue; |
381 | if (time_after(jiffies, | 412 | if (time_after(jiffies, |
382 | info->first_seen + (VIS_TIMEOUT/1000)*HZ)) { | 413 | info->first_seen + (VIS_TIMEOUT*HZ)/1000)) { |
383 | hash_remove_bucket(vis_hash, hashit); | 414 | hash_remove_bucket(vis_hash, &hashit); |
384 | free_info(info); | 415 | free_info(info); |
385 | } | 416 | } |
386 | } | 417 | } |
@@ -388,14 +419,15 @@ static void purge_vis_packets(void) | |||
388 | 419 | ||
389 | static void broadcast_vis_packet(struct vis_info *info, int packet_length) | 420 | static void broadcast_vis_packet(struct vis_info *info, int packet_length) |
390 | { | 421 | { |
391 | struct hash_it_t *hashit = NULL; | 422 | HASHIT(hashit); |
392 | struct orig_node *orig_node; | 423 | struct orig_node *orig_node; |
424 | unsigned long flags; | ||
393 | 425 | ||
394 | spin_lock(&orig_hash_lock); | 426 | spin_lock_irqsave(&orig_hash_lock, flags); |
395 | 427 | ||
396 | /* send to all routers in range. */ | 428 | /* send to all routers in range. */ |
397 | while (NULL != (hashit = hash_iterate(orig_hash, hashit))) { | 429 | while (hash_iterate(orig_hash, &hashit)) { |
398 | orig_node = hashit->bucket->data; | 430 | orig_node = hashit.bucket->data; |
399 | 431 | ||
400 | /* if it's a vis server and reachable, send it. */ | 432 | /* if it's a vis server and reachable, send it. */ |
401 | if (orig_node && | 433 | if (orig_node && |
@@ -418,14 +450,15 @@ static void broadcast_vis_packet(struct vis_info *info, int packet_length) | |||
418 | } | 450 | } |
419 | } | 451 | } |
420 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); | 452 | memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); |
421 | spin_unlock(&orig_hash_lock); | 453 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
422 | } | 454 | } |
423 | 455 | ||
424 | static void unicast_vis_packet(struct vis_info *info, int packet_length) | 456 | static void unicast_vis_packet(struct vis_info *info, int packet_length) |
425 | { | 457 | { |
426 | struct orig_node *orig_node; | 458 | struct orig_node *orig_node; |
459 | unsigned long flags; | ||
427 | 460 | ||
428 | spin_lock(&orig_hash_lock); | 461 | spin_lock_irqsave(&orig_hash_lock, flags); |
429 | orig_node = ((struct orig_node *) | 462 | orig_node = ((struct orig_node *) |
430 | hash_find(orig_hash, info->packet.target_orig)); | 463 | hash_find(orig_hash, info->packet.target_orig)); |
431 | 464 | ||
@@ -436,7 +469,7 @@ static void unicast_vis_packet(struct vis_info *info, int packet_length) | |||
436 | orig_node->batman_if, | 469 | orig_node->batman_if, |
437 | orig_node->router->addr); | 470 | orig_node->router->addr); |
438 | } | 471 | } |
439 | spin_unlock(&orig_hash_lock); | 472 | spin_unlock_irqrestore(&orig_hash_lock, flags); |
440 | } | 473 | } |
441 | 474 | ||
442 | /* only send one vis packet. called from send_vis_packets() */ | 475 | /* only send one vis packet. called from send_vis_packets() */ |
@@ -445,8 +478,7 @@ static void send_vis_packet(struct vis_info *info) | |||
445 | int packet_length; | 478 | int packet_length; |
446 | 479 | ||
447 | if (info->packet.ttl < 2) { | 480 | if (info->packet.ttl < 2) { |
448 | debug_log(LOG_TYPE_NOTICE, | 481 | printk(KERN_WARNING "batman-adv: Error - can't send vis packet: ttl exceeded\n"); |
449 | "Error - can't send vis packet: ttl exceeded\n"); | ||
450 | return; | 482 | return; |
451 | } | 483 | } |
452 | 484 | ||
@@ -467,8 +499,9 @@ static void send_vis_packet(struct vis_info *info) | |||
467 | static void send_vis_packets(struct work_struct *work) | 499 | static void send_vis_packets(struct work_struct *work) |
468 | { | 500 | { |
469 | struct vis_info *info, *temp; | 501 | struct vis_info *info, *temp; |
502 | unsigned long flags; | ||
470 | 503 | ||
471 | spin_lock(&vis_hash_lock); | 504 | spin_lock_irqsave(&vis_hash_lock, flags); |
472 | purge_vis_packets(); | 505 | purge_vis_packets(); |
473 | 506 | ||
474 | if (generate_vis_packet() == 0) | 507 | if (generate_vis_packet() == 0) |
@@ -479,7 +512,7 @@ static void send_vis_packets(struct work_struct *work) | |||
479 | list_del_init(&info->send_list); | 512 | list_del_init(&info->send_list); |
480 | send_vis_packet(info); | 513 | send_vis_packet(info); |
481 | } | 514 | } |
482 | spin_unlock(&vis_hash_lock); | 515 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
483 | start_vis_timer(); | 516 | start_vis_timer(); |
484 | } | 517 | } |
485 | static DECLARE_DELAYED_WORK(vis_timer_wq, send_vis_packets); | 518 | static DECLARE_DELAYED_WORK(vis_timer_wq, send_vis_packets); |
@@ -488,20 +521,21 @@ static DECLARE_DELAYED_WORK(vis_timer_wq, send_vis_packets); | |||
488 | * initialized (e.g. bat0 is initialized, interfaces have been added) */ | 521 | * initialized (e.g. bat0 is initialized, interfaces have been added) */ |
489 | int vis_init(void) | 522 | int vis_init(void) |
490 | { | 523 | { |
524 | unsigned long flags; | ||
491 | if (vis_hash) | 525 | if (vis_hash) |
492 | return 1; | 526 | return 1; |
493 | 527 | ||
494 | spin_lock(&vis_hash_lock); | 528 | spin_lock_irqsave(&vis_hash_lock, flags); |
495 | 529 | ||
496 | vis_hash = hash_new(256, vis_info_cmp, vis_info_choose); | 530 | vis_hash = hash_new(256, vis_info_cmp, vis_info_choose); |
497 | if (!vis_hash) { | 531 | if (!vis_hash) { |
498 | debug_log(LOG_TYPE_CRIT, "Can't initialize vis_hash\n"); | 532 | printk(KERN_ERR "batman-adv:Can't initialize vis_hash\n"); |
499 | goto err; | 533 | goto err; |
500 | } | 534 | } |
501 | 535 | ||
502 | my_vis_info = kmalloc(1000, GFP_ATOMIC); | 536 | my_vis_info = kmalloc(1000, GFP_ATOMIC); |
503 | if (!my_vis_info) { | 537 | if (!my_vis_info) { |
504 | debug_log(LOG_TYPE_CRIT, "Can't initialize vis packet\n"); | 538 | printk(KERN_ERR "batman-adv:Can't initialize vis packet\n"); |
505 | goto err; | 539 | goto err; |
506 | } | 540 | } |
507 | 541 | ||
@@ -511,7 +545,6 @@ int vis_init(void) | |||
511 | INIT_LIST_HEAD(&my_vis_info->send_list); | 545 | INIT_LIST_HEAD(&my_vis_info->send_list); |
512 | my_vis_info->packet.version = COMPAT_VERSION; | 546 | my_vis_info->packet.version = COMPAT_VERSION; |
513 | my_vis_info->packet.packet_type = BAT_VIS; | 547 | my_vis_info->packet.packet_type = BAT_VIS; |
514 | my_vis_info->packet.vis_type = VIS_TYPE_CLIENT_UPDATE; | ||
515 | my_vis_info->packet.ttl = TTL; | 548 | my_vis_info->packet.ttl = TTL; |
516 | my_vis_info->packet.seqno = 0; | 549 | my_vis_info->packet.seqno = 0; |
517 | my_vis_info->packet.entries = 0; | 550 | my_vis_info->packet.entries = 0; |
@@ -522,19 +555,19 @@ int vis_init(void) | |||
522 | memcpy(my_vis_info->packet.sender_orig, mainIfAddr, ETH_ALEN); | 555 | memcpy(my_vis_info->packet.sender_orig, mainIfAddr, ETH_ALEN); |
523 | 556 | ||
524 | if (hash_add(vis_hash, my_vis_info) < 0) { | 557 | if (hash_add(vis_hash, my_vis_info) < 0) { |
525 | debug_log(LOG_TYPE_CRIT, | 558 | printk(KERN_ERR |
526 | "Can't add own vis packet into hash\n"); | 559 | "batman-adv:Can't add own vis packet into hash\n"); |
527 | free_info(my_vis_info); /* not in hash, need to remove it | 560 | free_info(my_vis_info); /* not in hash, need to remove it |
528 | * manually. */ | 561 | * manually. */ |
529 | goto err; | 562 | goto err; |
530 | } | 563 | } |
531 | 564 | ||
532 | spin_unlock(&vis_hash_lock); | 565 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
533 | start_vis_timer(); | 566 | start_vis_timer(); |
534 | return 1; | 567 | return 1; |
535 | 568 | ||
536 | err: | 569 | err: |
537 | spin_unlock(&vis_hash_lock); | 570 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
538 | vis_quit(); | 571 | vis_quit(); |
539 | return 0; | 572 | return 0; |
540 | } | 573 | } |
@@ -542,23 +575,23 @@ err: | |||
542 | /* shutdown vis-server */ | 575 | /* shutdown vis-server */ |
543 | void vis_quit(void) | 576 | void vis_quit(void) |
544 | { | 577 | { |
578 | unsigned long flags; | ||
545 | if (!vis_hash) | 579 | if (!vis_hash) |
546 | return; | 580 | return; |
547 | 581 | ||
548 | cancel_delayed_work_sync(&vis_timer_wq); | 582 | cancel_delayed_work_sync(&vis_timer_wq); |
549 | 583 | ||
550 | spin_lock(&vis_hash_lock); | 584 | spin_lock_irqsave(&vis_hash_lock, flags); |
551 | /* properly remove, kill timers ... */ | 585 | /* properly remove, kill timers ... */ |
552 | hash_delete(vis_hash, free_info); | 586 | hash_delete(vis_hash, free_info); |
553 | vis_hash = NULL; | 587 | vis_hash = NULL; |
554 | my_vis_info = NULL; | 588 | my_vis_info = NULL; |
555 | spin_unlock(&vis_hash_lock); | 589 | spin_unlock_irqrestore(&vis_hash_lock, flags); |
556 | } | 590 | } |
557 | 591 | ||
558 | /* schedule packets for (re)transmission */ | 592 | /* schedule packets for (re)transmission */ |
559 | static void start_vis_timer(void) | 593 | static void start_vis_timer(void) |
560 | { | 594 | { |
561 | queue_delayed_work(bat_event_workqueue, &vis_timer_wq, | 595 | queue_delayed_work(bat_event_workqueue, &vis_timer_wq, |
562 | (atomic_read(&vis_interval)/1000) * HZ); | 596 | (atomic_read(&vis_interval) * HZ) / 1000); |
563 | } | 597 | } |
564 | |||
diff --git a/drivers/staging/batman-adv/vis.h b/drivers/staging/batman-adv/vis.h index 276fabab4e88..0cdafde0ec3a 100644 --- a/drivers/staging/batman-adv/vis.h +++ b/drivers/staging/batman-adv/vis.h | |||
@@ -45,16 +45,15 @@ struct recvlist_node { | |||
45 | uint8_t mac[ETH_ALEN]; | 45 | uint8_t mac[ETH_ALEN]; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | enum vis_formats { | ||
49 | DOT_DRAW, | ||
50 | JSON, | ||
51 | }; | ||
52 | |||
53 | extern struct hashtable_t *vis_hash; | 48 | extern struct hashtable_t *vis_hash; |
54 | extern spinlock_t vis_hash_lock; | 49 | extern spinlock_t vis_hash_lock; |
55 | 50 | ||
56 | void vis_set_mode(int mode); | 51 | void proc_vis_read_entry(struct seq_file *seq, |
57 | int is_vis_server(void); | 52 | struct vis_info_entry *entry, |
53 | struct hlist_head *if_list, | ||
54 | uint8_t *vis_orig); | ||
55 | void proc_vis_read_prim_sec(struct seq_file *seq, | ||
56 | struct hlist_head *if_list); | ||
58 | void receive_server_sync_packet(struct vis_packet *vis_packet, | 57 | void receive_server_sync_packet(struct vis_packet *vis_packet, |
59 | int vis_info_len); | 58 | int vis_info_len); |
60 | void receive_client_update_packet(struct vis_packet *vis_packet, | 59 | void receive_client_update_packet(struct vis_packet *vis_packet, |
diff --git a/drivers/staging/comedi/comedi_compat32.c b/drivers/staging/comedi/comedi_compat32.c index a9fdcda5db7a..581aa5fee2e3 100644 --- a/drivers/staging/comedi/comedi_compat32.c +++ b/drivers/staging/comedi/comedi_compat32.c | |||
@@ -26,7 +26,6 @@ | |||
26 | 26 | ||
27 | #define __NO_VERSION__ | 27 | #define __NO_VERSION__ |
28 | #include "comedi.h" | 28 | #include "comedi.h" |
29 | #include <linux/smp_lock.h> | ||
30 | #include <linux/uaccess.h> | 29 | #include <linux/uaccess.h> |
31 | 30 | ||
32 | #include "comedi_compat32.h" | 31 | #include "comedi_compat32.h" |
diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index 8117748ad5a5..aca96747e5e2 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c | |||
@@ -63,7 +63,7 @@ module_param(comedi_debug, int, 0644); | |||
63 | int comedi_autoconfig = 1; | 63 | int comedi_autoconfig = 1; |
64 | module_param(comedi_autoconfig, bool, 0444); | 64 | module_param(comedi_autoconfig, bool, 0444); |
65 | 65 | ||
66 | int comedi_num_legacy_minors = 0; | 66 | int comedi_num_legacy_minors; |
67 | module_param(comedi_num_legacy_minors, int, 0444); | 67 | module_param(comedi_num_legacy_minors, int, 0444); |
68 | 68 | ||
69 | static DEFINE_SPINLOCK(comedi_file_info_table_lock); | 69 | static DEFINE_SPINLOCK(comedi_file_info_table_lock); |
@@ -1510,7 +1510,7 @@ static unsigned int comedi_poll(struct file *file, poll_table * wait) | |||
1510 | } | 1510 | } |
1511 | 1511 | ||
1512 | static ssize_t comedi_write(struct file *file, const char *buf, size_t nbytes, | 1512 | static ssize_t comedi_write(struct file *file, const char *buf, size_t nbytes, |
1513 | loff_t * offset) | 1513 | loff_t *offset) |
1514 | { | 1514 | { |
1515 | struct comedi_subdevice *s; | 1515 | struct comedi_subdevice *s; |
1516 | struct comedi_async *async; | 1516 | struct comedi_async *async; |
@@ -1612,7 +1612,7 @@ done: | |||
1612 | } | 1612 | } |
1613 | 1613 | ||
1614 | static ssize_t comedi_read(struct file *file, char *buf, size_t nbytes, | 1614 | static ssize_t comedi_read(struct file *file, char *buf, size_t nbytes, |
1615 | loff_t * offset) | 1615 | loff_t *offset) |
1616 | { | 1616 | { |
1617 | struct comedi_subdevice *s; | 1617 | struct comedi_subdevice *s; |
1618 | struct comedi_async *async; | 1618 | struct comedi_async *async; |
@@ -2004,12 +2004,10 @@ void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s) | |||
2004 | if (async->cb_mask & s->async->events) { | 2004 | if (async->cb_mask & s->async->events) { |
2005 | if (comedi_get_subdevice_runflags(s) & SRF_USER) { | 2005 | if (comedi_get_subdevice_runflags(s) & SRF_USER) { |
2006 | wake_up_interruptible(&async->wait_head); | 2006 | wake_up_interruptible(&async->wait_head); |
2007 | if (s->subdev_flags & SDF_CMD_READ) { | 2007 | if (s->subdev_flags & SDF_CMD_READ) |
2008 | kill_fasync(&dev->async_queue, SIGIO, POLL_IN); | 2008 | kill_fasync(&dev->async_queue, SIGIO, POLL_IN); |
2009 | } | 2009 | if (s->subdev_flags & SDF_CMD_WRITE) |
2010 | if (s->subdev_flags & SDF_CMD_WRITE) { | ||
2011 | kill_fasync(&dev->async_queue, SIGIO, POLL_OUT); | 2010 | kill_fasync(&dev->async_queue, SIGIO, POLL_OUT); |
2012 | } | ||
2013 | } else { | 2011 | } else { |
2014 | if (async->cb_func) | 2012 | if (async->cb_func) |
2015 | async->cb_func(s->async->events, async->cb_arg); | 2013 | async->cb_func(s->async->events, async->cb_arg); |
diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index c2a632d31c61..44d6b62c230d 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c | |||
@@ -44,7 +44,7 @@ | |||
44 | #include <linux/cdev.h> | 44 | #include <linux/cdev.h> |
45 | #include <linux/dma-mapping.h> | 45 | #include <linux/dma-mapping.h> |
46 | 46 | ||
47 | #include <asm/io.h> | 47 | #include <linux/io.h> |
48 | #include <asm/system.h> | 48 | #include <asm/system.h> |
49 | 49 | ||
50 | static int postconfig(struct comedi_device *dev); | 50 | static int postconfig(struct comedi_device *dev); |
@@ -99,11 +99,10 @@ static void cleanup_device(struct comedi_device *dev) | |||
99 | static void __comedi_device_detach(struct comedi_device *dev) | 99 | static void __comedi_device_detach(struct comedi_device *dev) |
100 | { | 100 | { |
101 | dev->attached = 0; | 101 | dev->attached = 0; |
102 | if (dev->driver) { | 102 | if (dev->driver) |
103 | dev->driver->detach(dev); | 103 | dev->driver->detach(dev); |
104 | } else { | 104 | else |
105 | printk("BUG: dev->driver=NULL in comedi_device_detach()\n"); | 105 | printk("BUG: dev->driver=NULL in comedi_device_detach()\n"); |
106 | } | ||
107 | cleanup_device(dev); | 106 | cleanup_device(dev); |
108 | } | 107 | } |
109 | 108 | ||
@@ -380,9 +379,8 @@ static int insn_rw_emulate_bits(struct comedi_device *dev, | |||
380 | if (ret < 0) | 379 | if (ret < 0) |
381 | return ret; | 380 | return ret; |
382 | 381 | ||
383 | if (insn->insn == INSN_READ) { | 382 | if (insn->insn == INSN_READ) |
384 | data[0] = (new_data[1] >> (chan - base_bitfield_channel)) & 1; | 383 | data[0] = (new_data[1] >> (chan - base_bitfield_channel)) & 1; |
385 | } | ||
386 | 384 | ||
387 | return 1; | 385 | return 1; |
388 | } | 386 | } |
@@ -429,9 +427,9 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s, | |||
429 | new_size = (new_size + PAGE_SIZE - 1) & PAGE_MASK; | 427 | new_size = (new_size + PAGE_SIZE - 1) & PAGE_MASK; |
430 | 428 | ||
431 | /* if no change is required, do nothing */ | 429 | /* if no change is required, do nothing */ |
432 | if (async->prealloc_buf && async->prealloc_bufsz == new_size) { | 430 | if (async->prealloc_buf && async->prealloc_bufsz == new_size) |
433 | return 0; | 431 | return 0; |
434 | } | 432 | |
435 | /* deallocate old buffer */ | 433 | /* deallocate old buffer */ |
436 | if (async->prealloc_buf) { | 434 | if (async->prealloc_buf) { |
437 | vunmap(async->prealloc_buf); | 435 | vunmap(async->prealloc_buf); |
@@ -494,9 +492,9 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s, | |||
494 | (void *) | 492 | (void *) |
495 | get_zeroed_page(GFP_KERNEL); | 493 | get_zeroed_page(GFP_KERNEL); |
496 | } | 494 | } |
497 | if (async->buf_page_list[i].virt_addr == NULL) { | 495 | if (async->buf_page_list[i].virt_addr == NULL) |
498 | break; | 496 | break; |
499 | } | 497 | |
500 | mem_map_reserve(virt_to_page | 498 | mem_map_reserve(virt_to_page |
501 | (async->buf_page_list[i]. | 499 | (async->buf_page_list[i]. |
502 | virt_addr)); | 500 | virt_addr)); |
@@ -619,9 +617,9 @@ unsigned int comedi_buf_write_alloc(struct comedi_async *async, | |||
619 | { | 617 | { |
620 | unsigned int free_end = async->buf_read_count + async->prealloc_bufsz; | 618 | unsigned int free_end = async->buf_read_count + async->prealloc_bufsz; |
621 | 619 | ||
622 | if ((int)(async->buf_write_alloc_count + nbytes - free_end) > 0) { | 620 | if ((int)(async->buf_write_alloc_count + nbytes - free_end) > 0) |
623 | nbytes = free_end - async->buf_write_alloc_count; | 621 | nbytes = free_end - async->buf_write_alloc_count; |
624 | } | 622 | |
625 | async->buf_write_alloc_count += nbytes; | 623 | async->buf_write_alloc_count += nbytes; |
626 | /* barrier insures the read of buf_read_count above occurs before | 624 | /* barrier insures the read of buf_read_count above occurs before |
627 | we write data to the write-alloc'ed buffer space */ | 625 | we write data to the write-alloc'ed buffer space */ |
@@ -635,9 +633,9 @@ unsigned int comedi_buf_write_alloc_strict(struct comedi_async *async, | |||
635 | { | 633 | { |
636 | unsigned int free_end = async->buf_read_count + async->prealloc_bufsz; | 634 | unsigned int free_end = async->buf_read_count + async->prealloc_bufsz; |
637 | 635 | ||
638 | if ((int)(async->buf_write_alloc_count + nbytes - free_end) > 0) { | 636 | if ((int)(async->buf_write_alloc_count + nbytes - free_end) > 0) |
639 | nbytes = 0; | 637 | nbytes = 0; |
640 | } | 638 | |
641 | async->buf_write_alloc_count += nbytes; | 639 | async->buf_write_alloc_count += nbytes; |
642 | /* barrier insures the read of buf_read_count above occurs before | 640 | /* barrier insures the read of buf_read_count above occurs before |
643 | we write data to the write-alloc'ed buffer space */ | 641 | we write data to the write-alloc'ed buffer space */ |
@@ -657,9 +655,9 @@ unsigned comedi_buf_write_free(struct comedi_async *async, unsigned int nbytes) | |||
657 | async->buf_write_count += nbytes; | 655 | async->buf_write_count += nbytes; |
658 | async->buf_write_ptr += nbytes; | 656 | async->buf_write_ptr += nbytes; |
659 | comedi_buf_munge(async, async->buf_write_count - async->munge_count); | 657 | comedi_buf_munge(async, async->buf_write_count - async->munge_count); |
660 | if (async->buf_write_ptr >= async->prealloc_bufsz) { | 658 | if (async->buf_write_ptr >= async->prealloc_bufsz) |
661 | async->buf_write_ptr %= async->prealloc_bufsz; | 659 | async->buf_write_ptr %= async->prealloc_bufsz; |
662 | } | 660 | |
663 | return nbytes; | 661 | return nbytes; |
664 | } | 662 | } |
665 | 663 | ||
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c index 0af12fd2a40a..fbc26a027de4 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Chrono.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c index f3e47e5791db..a6898e4bbb62 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Dig_io.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c index a15c952c0fab..0e498e9eb080 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_INCCPT.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c index 0fc2285c9ef8..204d7987700a 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Inp_cpt.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c index 138a84f572c8..148ce6f67f0d 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Pwm.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c index a445dab50eac..6360de59e0e9 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ssi.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c index 7e1254475792..344df9462198 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Tor.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c index d3d78d37de5c..de6f77246890 100644 --- a/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c +++ b/drivers/staging/comedi/drivers/addi-data/APCI1710_Ttl.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.c b/drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.c index 6e9e7ed4dba9..97c10aaa691d 100644 --- a/drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.c +++ b/drivers/staging/comedi/drivers/addi-data/addi_amcc_S5920.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
@@ -173,11 +173,10 @@ int i_AddiHeaderRW_ReadEeprom(int i_NbOfWordsToRead, | |||
173 | } while (dw_eeprom_busy == EEPROM_BUSY); | 173 | } while (dw_eeprom_busy == EEPROM_BUSY); |
174 | 174 | ||
175 | /* Select the upper address part */ | 175 | /* Select the upper address part */ |
176 | if (i_Counter == 0) { | 176 | if (i_Counter == 0) |
177 | b_ReadLowByte = pb_ReadByte[0]; | 177 | b_ReadLowByte = pb_ReadByte[0]; |
178 | } else { | 178 | else |
179 | b_ReadHighByte = pb_ReadByte[0]; | 179 | b_ReadHighByte = pb_ReadByte[0]; |
180 | } | ||
181 | 180 | ||
182 | /* Sleep */ | 181 | /* Sleep */ |
183 | msleep(1); | 182 | msleep(1); |
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c index a56535fbcd3e..8db5ab63e363 100644 --- a/drivers/staging/comedi/drivers/addi-data/addi_common.c +++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.h b/drivers/staging/comedi/drivers/addi-data/addi_common.h index 3ab27cf0facc..caeb6fd2d9b1 100644 --- a/drivers/staging/comedi/drivers/addi-data/addi_common.h +++ b/drivers/staging/comedi/drivers/addi-data/addi_common.h | |||
@@ -77,8 +77,8 @@ struct addi_board { | |||
77 | int i_NbrAoChannel; /* num of D/A chans */ | 77 | int i_NbrAoChannel; /* num of D/A chans */ |
78 | int i_AiMaxdata; /* resolution of A/D */ | 78 | int i_AiMaxdata; /* resolution of A/D */ |
79 | int i_AoMaxdata; /* resolution of D/A */ | 79 | int i_AoMaxdata; /* resolution of D/A */ |
80 | const struct comedi_lrange *pr_AiRangelist; /* rangelist for A/D */ | 80 | const struct comedi_lrange *pr_AiRangelist; /* rangelist for A/D */ |
81 | const struct comedi_lrange *pr_AoRangelist; /* rangelist for D/A */ | 81 | const struct comedi_lrange *pr_AoRangelist; /* rangelist for D/A */ |
82 | 82 | ||
83 | int i_NbrDiChannel; /* Number of DI channels */ | 83 | int i_NbrDiChannel; /* Number of DI channels */ |
84 | int i_NbrDoChannel; /* Number of DO channels */ | 84 | int i_NbrDoChannel; /* Number of DO channels */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c b/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c index 69b427390e53..bea329f44d80 100644 --- a/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c +++ b/drivers/staging/comedi/drivers/addi-data/addi_eeprom.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c index 47517a938ec5..d7d768ee7c23 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c index 016721efdbfb..791297266fc0 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c index 723a97bab44c..fe06789699f3 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
@@ -54,7 +54,7 @@ You shoud also find the complete GPL in the COPYING file accompanying this sourc | |||
54 | #include "hwdrv_apci1032.h" | 54 | #include "hwdrv_apci1032.h" |
55 | #include <linux/delay.h> | 55 | #include <linux/delay.h> |
56 | /* Global variables */ | 56 | /* Global variables */ |
57 | unsigned int ui_InterruptStatus = 0; | 57 | unsigned int ui_InterruptStatus; |
58 | 58 | ||
59 | /* | 59 | /* |
60 | +----------------------------------------------------------------------------+ | 60 | +----------------------------------------------------------------------------+ |
@@ -108,9 +108,9 @@ int i_APCI1032_ConfigDigitalInput(struct comedi_device *dev, struct comedi_subde | |||
108 | ui_TmpValue = | 108 | ui_TmpValue = |
109 | inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); | 109 | inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); |
110 | } /* if (data[1] == ADDIDATA_OR) */ | 110 | } /* if (data[1] == ADDIDATA_OR) */ |
111 | else { | 111 | else |
112 | outl(0x6, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); | 112 | outl(0x6, devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); |
113 | } /* else if(data[1] == ADDIDATA_OR) */ | 113 | /* else if(data[1] == ADDIDATA_OR) */ |
114 | } /* if( data[0] == ADDIDATA_ENABLE) */ | 114 | } /* if( data[0] == ADDIDATA_ENABLE) */ |
115 | else { | 115 | else { |
116 | ul_Command1 = ul_Command1 & 0xFFFF0000; | 116 | ul_Command1 = ul_Command1 & 0xFFFF0000; |
@@ -221,9 +221,9 @@ int i_APCI1032_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_sub | |||
221 | } /* switch(ui_NoOfChannels) */ | 221 | } /* switch(ui_NoOfChannels) */ |
222 | } /* if(data[1]==0) */ | 222 | } /* if(data[1]==0) */ |
223 | else { | 223 | else { |
224 | if (data[1] == 1) { | 224 | if (data[1] == 1) |
225 | *data = ui_InterruptStatus; | 225 | *data = ui_InterruptStatus; |
226 | } /* if(data[1]==1) */ | 226 | /* if(data[1]==1) */ |
227 | } /* else if(data[1]==0) */ | 227 | } /* else if(data[1]==0) */ |
228 | return insn->n; | 228 | return insn->n; |
229 | } | 229 | } |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c index 36b929ffecbd..d5e06ad6acc2 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c index 866eb8d75820..7948c41f60f5 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1516.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c index 3ae663bc754e..4413279c880b 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c index 988e3fc2b857..8bc88adfbb59 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci16xx.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c index d348cd5687aa..89783b1eb0bd 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2016.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c index ec817082d170..2d325163c169 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c index aa159dccc36a..e01889c3c4fc 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2200.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c index 172fba8dbfe5..f93ddd4eb06c 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
@@ -45,7 +45,7 @@ You shoud also find the complete GPL in the COPYING file accompanying this sourc | |||
45 | */ | 45 | */ |
46 | 46 | ||
47 | #include "hwdrv_apci3120.h" | 47 | #include "hwdrv_apci3120.h" |
48 | static unsigned int ui_Temp = 0; | 48 | static unsigned int ui_Temp; |
49 | 49 | ||
50 | /* FUNCTION DEFINITIONS */ | 50 | /* FUNCTION DEFINITIONS */ |
51 | 51 | ||
@@ -98,25 +98,22 @@ int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_su | |||
98 | 98 | ||
99 | devpriv->b_InterruptMode = APCI3120_EOS_MODE; | 99 | devpriv->b_InterruptMode = APCI3120_EOS_MODE; |
100 | 100 | ||
101 | if (data[1]) { | 101 | if (data[1]) |
102 | devpriv->b_EocEosInterrupt = APCI3120_ENABLE; | 102 | devpriv->b_EocEosInterrupt = APCI3120_ENABLE; |
103 | } else | 103 | else |
104 | devpriv->b_EocEosInterrupt = APCI3120_DISABLE; | 104 | devpriv->b_EocEosInterrupt = APCI3120_DISABLE; |
105 | /* Copy channel list and Range List to devpriv */ | 105 | /* Copy channel list and Range List to devpriv */ |
106 | 106 | ||
107 | devpriv->ui_AiNbrofChannels = data[3]; | 107 | devpriv->ui_AiNbrofChannels = data[3]; |
108 | for (i = 0; i < devpriv->ui_AiNbrofChannels; i++) { | 108 | for (i = 0; i < devpriv->ui_AiNbrofChannels; i++) |
109 | devpriv->ui_AiChannelList[i] = data[4 + i]; | 109 | devpriv->ui_AiChannelList[i] = data[4 + i]; |
110 | } | ||
111 | 110 | ||
112 | } else /* EOC */ | 111 | } else { /* EOC */ |
113 | { | ||
114 | devpriv->b_InterruptMode = APCI3120_EOC_MODE; | 112 | devpriv->b_InterruptMode = APCI3120_EOC_MODE; |
115 | if (data[1]) { | 113 | if (data[1]) |
116 | devpriv->b_EocEosInterrupt = APCI3120_ENABLE; | 114 | devpriv->b_EocEosInterrupt = APCI3120_ENABLE; |
117 | } else { | 115 | else |
118 | devpriv->b_EocEosInterrupt = APCI3120_DISABLE; | 116 | devpriv->b_EocEosInterrupt = APCI3120_DISABLE; |
119 | } | ||
120 | } | 117 | } |
121 | 118 | ||
122 | return insn->n; | 119 | return insn->n; |
@@ -166,13 +163,9 @@ int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subd | |||
166 | devpriv->us_OutputRegister = 0; | 163 | devpriv->us_OutputRegister = 0; |
167 | /* devpriv->b_DigitalOutputRegister=0; */ | 164 | /* devpriv->b_DigitalOutputRegister=0; */ |
168 | 165 | ||
169 | if (insn->unused[0] == 222) /* second insn read */ | 166 | if (insn->unused[0] == 222) { /* second insn read */ |
170 | { | 167 | for (i = 0; i < insn->n; i++) |
171 | |||
172 | for (i = 0; i < insn->n; i++) { | ||
173 | data[i] = devpriv->ui_AiReadData[i]; | 168 | data[i] = devpriv->ui_AiReadData[i]; |
174 | } | ||
175 | |||
176 | } else { | 169 | } else { |
177 | devpriv->tsk_Current = current; /* Save the current process task structure */ | 170 | devpriv->tsk_Current = current; /* Save the current process task structure */ |
178 | /* | 171 | /* |
@@ -519,9 +512,8 @@ int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_s | |||
519 | 512 | ||
520 | /* step 2: make sure trigger sources are unique and mutually compatible */ | 513 | /* step 2: make sure trigger sources are unique and mutually compatible */ |
521 | 514 | ||
522 | if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT) { | 515 | if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT) |
523 | err++; | 516 | err++; |
524 | } | ||
525 | 517 | ||
526 | if (cmd->scan_begin_src != TRIG_TIMER && | 518 | if (cmd->scan_begin_src != TRIG_TIMER && |
527 | cmd->scan_begin_src != TRIG_FOLLOW) | 519 | cmd->scan_begin_src != TRIG_FOLLOW) |
@@ -548,16 +540,14 @@ int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_s | |||
548 | err++; | 540 | err++; |
549 | } | 541 | } |
550 | 542 | ||
551 | if (cmd->scan_begin_src == TRIG_TIMER) /* Test Delay timing */ | 543 | if (cmd->scan_begin_src == TRIG_TIMER) { /* Test Delay timing */ |
552 | { | ||
553 | if (cmd->scan_begin_arg < this_board->ui_MinDelaytimeNs) { | 544 | if (cmd->scan_begin_arg < this_board->ui_MinDelaytimeNs) { |
554 | cmd->scan_begin_arg = this_board->ui_MinDelaytimeNs; | 545 | cmd->scan_begin_arg = this_board->ui_MinDelaytimeNs; |
555 | err++; | 546 | err++; |
556 | } | 547 | } |
557 | } | 548 | } |
558 | 549 | ||
559 | if (cmd->convert_src == TRIG_TIMER) /* Test Acquisition timing */ | 550 | if (cmd->convert_src == TRIG_TIMER) { /* Test Acquisition timing */ |
560 | { | ||
561 | if (cmd->scan_begin_src == TRIG_TIMER) { | 551 | if (cmd->scan_begin_src == TRIG_TIMER) { |
562 | if ((cmd->convert_arg) | 552 | if ((cmd->convert_arg) |
563 | && (cmd->convert_arg < | 553 | && (cmd->convert_arg < |
@@ -653,11 +643,10 @@ int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, struct comedi_subde | |||
653 | /* UPDATE-0.7.57->0.7.68devpriv->ui_AiDataLength=s->async->data_len; */ | 643 | /* UPDATE-0.7.57->0.7.68devpriv->ui_AiDataLength=s->async->data_len; */ |
654 | devpriv->ui_AiDataLength = s->async->prealloc_bufsz; | 644 | devpriv->ui_AiDataLength = s->async->prealloc_bufsz; |
655 | 645 | ||
656 | if (cmd->stop_src == TRIG_COUNT) { | 646 | if (cmd->stop_src == TRIG_COUNT) |
657 | devpriv->ui_AiNbrofScans = cmd->stop_arg; | 647 | devpriv->ui_AiNbrofScans = cmd->stop_arg; |
658 | } else { | 648 | else |
659 | devpriv->ui_AiNbrofScans = 0; | 649 | devpriv->ui_AiNbrofScans = 0; |
660 | } | ||
661 | 650 | ||
662 | devpriv->ui_AiTimer0 = 0; /* variables changed to timer0,timer1 */ | 651 | devpriv->ui_AiTimer0 = 0; /* variables changed to timer0,timer1 */ |
663 | devpriv->ui_AiTimer1 = 0; | 652 | devpriv->ui_AiTimer1 = 0; |
@@ -849,9 +838,8 @@ int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev, | |||
849 | } | 838 | } |
850 | /*** EL241003 End ******************************************************************************/ | 839 | /*** EL241003 End ******************************************************************************/ |
851 | 840 | ||
852 | if (devpriv->b_ExttrigEnable == APCI3120_ENABLE) { | 841 | if (devpriv->b_ExttrigEnable == APCI3120_ENABLE) |
853 | i_APCI3120_ExttrigEnable(dev); /* activate EXT trigger */ | 842 | i_APCI3120_ExttrigEnable(dev); /* activate EXT trigger */ |
854 | } | ||
855 | switch (mode) { | 843 | switch (mode) { |
856 | case 1: | 844 | case 1: |
857 | /* init timer0 in mode 2 */ | 845 | /* init timer0 in mode 2 */ |
@@ -1049,12 +1037,10 @@ int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev, | |||
1049 | dmalen1 = 4; | 1037 | dmalen1 = 4; |
1050 | } | 1038 | } |
1051 | } else { /* isn't output buff smaller that our DMA buff? */ | 1039 | } else { /* isn't output buff smaller that our DMA buff? */ |
1052 | if (dmalen0 > (devpriv->ui_AiDataLength)) { | 1040 | if (dmalen0 > (devpriv->ui_AiDataLength)) |
1053 | dmalen0 = devpriv->ui_AiDataLength; | 1041 | dmalen0 = devpriv->ui_AiDataLength; |
1054 | } | 1042 | if (dmalen1 > (devpriv->ui_AiDataLength)) |
1055 | if (dmalen1 > (devpriv->ui_AiDataLength)) { | ||
1056 | dmalen1 = devpriv->ui_AiDataLength; | 1043 | dmalen1 = devpriv->ui_AiDataLength; |
1057 | } | ||
1058 | } | 1044 | } |
1059 | devpriv->ui_DmaBufferUsesize[0] = dmalen0; | 1045 | devpriv->ui_DmaBufferUsesize[0] = dmalen0; |
1060 | devpriv->ui_DmaBufferUsesize[1] = dmalen1; | 1046 | devpriv->ui_DmaBufferUsesize[1] = dmalen1; |
@@ -1356,11 +1342,10 @@ int i_APCI3120_SetupChannelList(struct comedi_device *dev, struct comedi_subdevi | |||
1356 | /* store range list to card */ | 1342 | /* store range list to card */ |
1357 | us_TmpValue = CR_CHAN(chanlist[i]); /* get channel number; */ | 1343 | us_TmpValue = CR_CHAN(chanlist[i]); /* get channel number; */ |
1358 | 1344 | ||
1359 | if (CR_RANGE(chanlist[i]) < APCI3120_BIPOLAR_RANGES) { | 1345 | if (CR_RANGE(chanlist[i]) < APCI3120_BIPOLAR_RANGES) |
1360 | us_TmpValue &= ((~APCI3120_UNIPOLAR) & 0xff); /* set bipolar */ | 1346 | us_TmpValue &= ((~APCI3120_UNIPOLAR) & 0xff); /* set bipolar */ |
1361 | } else { | 1347 | else |
1362 | us_TmpValue |= APCI3120_UNIPOLAR; /* enable unipolar...... */ | 1348 | us_TmpValue |= APCI3120_UNIPOLAR; /* enable unipolar...... */ |
1363 | } | ||
1364 | 1349 | ||
1365 | gain = CR_RANGE(chanlist[i]); /* get gain number */ | 1350 | gain = CR_RANGE(chanlist[i]); /* get gain number */ |
1366 | us_TmpValue |= ((gain & 0x03) << 4); /* <<4 for G0 and G1 bit in RAM */ | 1351 | us_TmpValue |= ((gain & 0x03) << 4); /* <<4 for G0 and G1 bit in RAM */ |
@@ -1514,8 +1499,7 @@ void v_APCI3120_Interrupt(int irq, void *d) | |||
1514 | /* Check If EOS interrupt */ | 1499 | /* Check If EOS interrupt */ |
1515 | if ((int_daq & 0x2) && (devpriv->b_InterruptMode == APCI3120_EOS_MODE)) { | 1500 | if ((int_daq & 0x2) && (devpriv->b_InterruptMode == APCI3120_EOS_MODE)) { |
1516 | 1501 | ||
1517 | if (devpriv->b_EocEosInterrupt == APCI3120_ENABLE) /* enable this in without DMA ??? */ | 1502 | if (devpriv->b_EocEosInterrupt == APCI3120_ENABLE) { /* enable this in without DMA ??? */ |
1518 | { | ||
1519 | 1503 | ||
1520 | if (devpriv->b_AiCyclicAcquisition == APCI3120_ENABLE) { | 1504 | if (devpriv->b_AiCyclicAcquisition == APCI3120_ENABLE) { |
1521 | ui_Check = 0; | 1505 | ui_Check = 0; |
@@ -1966,8 +1950,7 @@ int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevic | |||
1966 | APCI3120_DISABLE_EOS_INT; | 1950 | APCI3120_DISABLE_EOS_INT; |
1967 | outb(devpriv->b_ModeSelectRegister, | 1951 | outb(devpriv->b_ModeSelectRegister, |
1968 | devpriv->iobase + APCI3120_WRITE_MODE_SELECT); | 1952 | devpriv->iobase + APCI3120_WRITE_MODE_SELECT); |
1969 | if (data[0] == APCI3120_TIMER) /* initialize timer */ | 1953 | if (data[0] == APCI3120_TIMER) { /* initialize timer */ |
1970 | { | ||
1971 | /* devpriv->b_ModeSelectRegister=devpriv->b_ModeSelectRegister | | 1954 | /* devpriv->b_ModeSelectRegister=devpriv->b_ModeSelectRegister | |
1972 | * APCI3120_ENABLE_TIMER_INT; */ | 1955 | * APCI3120_ENABLE_TIMER_INT; */ |
1973 | 1956 | ||
@@ -2006,8 +1989,7 @@ int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevic | |||
2006 | /* timer2 in Timer mode enabled */ | 1989 | /* timer2 in Timer mode enabled */ |
2007 | devpriv->b_Timer2Mode = APCI3120_TIMER; | 1990 | devpriv->b_Timer2Mode = APCI3120_TIMER; |
2008 | 1991 | ||
2009 | } else /* Initialize Watch dog */ | 1992 | } else { /* Initialize Watch dog */ |
2010 | { | ||
2011 | 1993 | ||
2012 | /* Set the Timer 2 in mode 5(Watchdog) */ | 1994 | /* Set the Timer 2 in mode 5(Watchdog) */ |
2013 | 1995 | ||
@@ -2092,8 +2074,7 @@ int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice | |||
2092 | return -EINVAL; | 2074 | return -EINVAL; |
2093 | } | 2075 | } |
2094 | 2076 | ||
2095 | if (data[0] == 2) /* write new value */ | 2077 | if (data[0] == 2) { /* write new value */ |
2096 | { | ||
2097 | if (devpriv->b_Timer2Mode != APCI3120_TIMER) { | 2078 | if (devpriv->b_Timer2Mode != APCI3120_TIMER) { |
2098 | comedi_error(dev, | 2079 | comedi_error(dev, |
2099 | "write :timer2 not configured in TIMER MODE"); | 2080 | "write :timer2 not configured in TIMER MODE"); |
@@ -2113,13 +2094,11 @@ int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice | |||
2113 | 2094 | ||
2114 | /* Reset FC_TIMER BIT */ | 2095 | /* Reset FC_TIMER BIT */ |
2115 | inb(devpriv->iobase + APCI3120_TIMER_STATUS_REGISTER); | 2096 | inb(devpriv->iobase + APCI3120_TIMER_STATUS_REGISTER); |
2116 | if (devpriv->b_Timer2Mode == APCI3120_TIMER) /* start timer */ | 2097 | if (devpriv->b_Timer2Mode == APCI3120_TIMER) { /* start timer */ |
2117 | { | ||
2118 | /* Enable Timer */ | 2098 | /* Enable Timer */ |
2119 | devpriv->b_ModeSelectRegister = | 2099 | devpriv->b_ModeSelectRegister = |
2120 | devpriv->b_ModeSelectRegister & 0x0B; | 2100 | devpriv->b_ModeSelectRegister & 0x0B; |
2121 | } else /* start watch dog */ | 2101 | } else { /* start watch dog */ |
2122 | { | ||
2123 | /* Enable WatchDog */ | 2102 | /* Enable WatchDog */ |
2124 | devpriv->b_ModeSelectRegister = | 2103 | devpriv->b_ModeSelectRegister = |
2125 | (devpriv-> | 2104 | (devpriv-> |
@@ -2146,8 +2125,7 @@ int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice | |||
2146 | outb(devpriv->b_ModeSelectRegister, | 2125 | outb(devpriv->b_ModeSelectRegister, |
2147 | devpriv->iobase + APCI3120_WRITE_MODE_SELECT); | 2126 | devpriv->iobase + APCI3120_WRITE_MODE_SELECT); |
2148 | 2127 | ||
2149 | if (devpriv->b_Timer2Mode == APCI3120_TIMER) /* start timer */ | 2128 | if (devpriv->b_Timer2Mode == APCI3120_TIMER) { /* start timer */ |
2150 | { | ||
2151 | /* For Timer mode is Gate2 must be activated **timer started */ | 2129 | /* For Timer mode is Gate2 must be activated **timer started */ |
2152 | devpriv->us_OutputRegister = | 2130 | devpriv->us_OutputRegister = |
2153 | devpriv-> | 2131 | devpriv-> |
@@ -2299,8 +2277,7 @@ int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice | |||
2299 | /* combining both words */ | 2277 | /* combining both words */ |
2300 | data[0] = (unsigned int) ((us_TmpValue) | ((us_TmpValue_2) << 16)); | 2278 | data[0] = (unsigned int) ((us_TmpValue) | ((us_TmpValue_2) << 16)); |
2301 | 2279 | ||
2302 | } else /* Read watch dog status */ | 2280 | } else { /* Read watch dog status */ |
2303 | { | ||
2304 | 2281 | ||
2305 | us_StatusValue = inw(devpriv->iobase + APCI3120_RD_STATUS); | 2282 | us_StatusValue = inw(devpriv->iobase + APCI3120_RD_STATUS); |
2306 | us_StatusValue = | 2283 | us_StatusValue = |
@@ -2441,10 +2418,9 @@ int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev, | |||
2441 | devpriv->b_OutputMemoryStatus = APCI3120_DISABLE; | 2418 | devpriv->b_OutputMemoryStatus = APCI3120_DISABLE; |
2442 | devpriv->b_DigitalOutputRegister = 0; | 2419 | devpriv->b_DigitalOutputRegister = 0; |
2443 | } | 2420 | } |
2444 | if (!devpriv->b_OutputMemoryStatus) { | 2421 | if (!devpriv->b_OutputMemoryStatus) |
2445 | ui_Temp = 0; | 2422 | ui_Temp = 0; |
2446 | 2423 | /* if(!devpriv->b_OutputMemoryStatus ) */ | |
2447 | } /* if(!devpriv->b_OutputMemoryStatus ) */ | ||
2448 | 2424 | ||
2449 | return insn->n; | 2425 | return insn->n; |
2450 | } | 2426 | } |
@@ -2504,23 +2480,23 @@ int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev, | |||
2504 | 2480 | ||
2505 | /* | 2481 | /* |
2506 | +----------------------------------------------------------------------------+ | 2482 | +----------------------------------------------------------------------------+ |
2507 | | Function name :int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev,| | 2483 | | Function name :int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev,| |
2508 | |struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) | | 2484 | |struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) | |
2509 | | | | 2485 | | | |
2510 | +----------------------------------------------------------------------------+ | 2486 | +----------------------------------------------------------------------------+ |
2511 | | Task : Write digiatl output | | 2487 | | Task : Write digiatl output | |
2512 | | | | 2488 | | | |
2513 | +----------------------------------------------------------------------------+ | 2489 | +----------------------------------------------------------------------------+ |
2514 | | Input Parameters : struct comedi_device *dev | | 2490 | | Input Parameters : struct comedi_device *dev | |
2515 | | struct comedi_subdevice *s | | 2491 | | struct comedi_subdevice *s | |
2516 | | struct comedi_insn *insn | | 2492 | | struct comedi_insn *insn | |
2517 | | unsigned int *data | | 2493 | | unsigned int *data | |
2518 | data[0] Value to be written | 2494 | data[0] Value to be written |
2519 | data[1] :1 Set digital o/p ON | 2495 | data[1] :1 Set digital o/p ON |
2520 | data[1] 2 Set digital o/p OFF with memory ON | 2496 | data[1] 2 Set digital o/p OFF with memory ON |
2521 | +----------------------------------------------------------------------------+ | 2497 | +----------------------------------------------------------------------------+ |
2522 | | Return Value : | | 2498 | | Return Value : | |
2523 | | | | 2499 | | | |
2524 | +----------------------------------------------------------------------------+ | 2500 | +----------------------------------------------------------------------------+ |
2525 | */ | 2501 | */ |
2526 | 2502 | ||
@@ -2615,8 +2591,7 @@ int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, | |||
2615 | ui_Channel = CR_CHAN(insn->chanspec); | 2591 | ui_Channel = CR_CHAN(insn->chanspec); |
2616 | 2592 | ||
2617 | /* this_board->i_hwdrv_InsnWriteAnalogOutput(dev, ui_Range, ui_Channel,data[0]); */ | 2593 | /* this_board->i_hwdrv_InsnWriteAnalogOutput(dev, ui_Range, ui_Channel,data[0]); */ |
2618 | if (ui_Range) /* if 1 then unipolar */ | 2594 | if (ui_Range) { /* if 1 then unipolar */ |
2619 | { | ||
2620 | 2595 | ||
2621 | if (data[0] != 0) | 2596 | if (data[0] != 0) |
2622 | data[0] = | 2597 | data[0] = |
@@ -2627,8 +2602,7 @@ int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, | |||
2627 | ((((ui_Channel & 0x03) << 14) & 0xC000) | (1 << | 2602 | ((((ui_Channel & 0x03) << 14) & 0xC000) | (1 << |
2628 | 13) | 8192); | 2603 | 13) | 8192); |
2629 | 2604 | ||
2630 | } else /* if 0 then bipolar */ | 2605 | } else { /* if 0 then bipolar */ |
2631 | { | ||
2632 | data[0] = | 2606 | data[0] = |
2633 | ((((ui_Channel & 0x03) << 14) & 0xC000) | (0 << 13) | | 2607 | ((((ui_Channel & 0x03) << 14) & 0xC000) | (0 << 13) | |
2634 | data[0]); | 2608 | data[0]); |
@@ -2639,8 +2613,7 @@ int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, | |||
2639 | * out put n values at the given channel. printk("\nwaiting for | 2613 | * out put n values at the given channel. printk("\nwaiting for |
2640 | * DA_READY BIT"); | 2614 | * DA_READY BIT"); |
2641 | */ | 2615 | */ |
2642 | do /* Waiting of DA_READY BIT */ | 2616 | do { /* Waiting of DA_READY BIT */ |
2643 | { | ||
2644 | us_TmpValue = | 2617 | us_TmpValue = |
2645 | ((unsigned short) inw(devpriv->iobase + | 2618 | ((unsigned short) inw(devpriv->iobase + |
2646 | APCI3120_RD_STATUS)) & 0x0001; | 2619 | APCI3120_RD_STATUS)) & 0x0001; |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c index 98c23872e374..560c848f6258 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3200.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c index 7b38d177394b..4ed441a1adc8 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c index 1d1e5fc2ea9a..3692326d474a 100644 --- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c +++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c | |||
@@ -17,7 +17,7 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY | |||
17 | 17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | 19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | 20 | You should also find the complete GPL in the COPYING file accompanying this source code. |
21 | 21 | ||
22 | @endverbatim | 22 | @endverbatim |
23 | */ | 23 | */ |
@@ -1206,7 +1206,7 @@ int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev, | |||
1206 | 1206 | ||
1207 | if (b_Channel < 8) { | 1207 | if (b_Channel < 8) { |
1208 | /*****************************************************************************/ | 1208 | /*****************************************************************************/ |
1209 | /* Read port 0 (first digital output port) and set/reset the selcted channel */ | 1209 | /* Read port 0 (first digital output port) and set/reset the selected channel */ |
1210 | /*****************************************************************************/ | 1210 | /*****************************************************************************/ |
1211 | 1211 | ||
1212 | dw_Status = inl(devpriv->iobase + 80); | 1212 | dw_Status = inl(devpriv->iobase + 80); |
@@ -1228,7 +1228,7 @@ int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev, | |||
1228 | if ((devpriv->ul_TTLPortConfiguration[0] & 0xFF) | 1228 | if ((devpriv->ul_TTLPortConfiguration[0] & 0xFF) |
1229 | == 0xFF) { | 1229 | == 0xFF) { |
1230 | /*****************************************************************************/ | 1230 | /*****************************************************************************/ |
1231 | /* Read port 2 (first digital output port) and set/reset the selcted channel */ | 1231 | /* Read port 2 (first digital output port) and set/reset the selected channel */ |
1232 | /*****************************************************************************/ | 1232 | /*****************************************************************************/ |
1233 | 1233 | ||
1234 | dw_Status = inl(devpriv->iobase + 112); | 1234 | dw_Status = inl(devpriv->iobase + 112); |
diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c index 791ea8334e1e..9934a3cf2548 100644 --- a/drivers/staging/comedi/drivers/adl_pci9118.c +++ b/drivers/staging/comedi/drivers/adl_pci9118.c | |||
@@ -88,9 +88,9 @@ Configuration options: | |||
88 | #define IORANGE_9118 64 /* I hope */ | 88 | #define IORANGE_9118 64 /* I hope */ |
89 | #define PCI9118_CHANLEN 255 /* len of chanlist, some source say 256, but reality looks like 255 :-( */ | 89 | #define PCI9118_CHANLEN 255 /* len of chanlist, some source say 256, but reality looks like 255 :-( */ |
90 | 90 | ||
91 | #define PCI9118_CNT0 0x00 /* R/W: 8254 couter 0 */ | 91 | #define PCI9118_CNT0 0x00 /* R/W: 8254 counter 0 */ |
92 | #define PCI9118_CNT1 0x04 /* R/W: 8254 couter 0 */ | 92 | #define PCI9118_CNT1 0x04 /* R/W: 8254 counter 0 */ |
93 | #define PCI9118_CNT2 0x08 /* R/W: 8254 couter 0 */ | 93 | #define PCI9118_CNT2 0x08 /* R/W: 8254 counter 0 */ |
94 | #define PCI9118_CNTCTRL 0x0c /* W: 8254 counter control */ | 94 | #define PCI9118_CNTCTRL 0x0c /* W: 8254 counter control */ |
95 | #define PCI9118_AD_DATA 0x10 /* R: A/D data */ | 95 | #define PCI9118_AD_DATA 0x10 /* R: A/D data */ |
96 | #define PCI9118_DA1 0x10 /* W: D/A registers */ | 96 | #define PCI9118_DA1 0x10 /* W: D/A registers */ |
diff --git a/drivers/staging/comedi/drivers/adq12b.c b/drivers/staging/comedi/drivers/adq12b.c index c5ed8bb97602..f3ba645bf63b 100644 --- a/drivers/staging/comedi/drivers/adq12b.c +++ b/drivers/staging/comedi/drivers/adq12b.c | |||
@@ -42,23 +42,23 @@ If you do not specify any options, they will default to | |||
42 | option 1: I/O base address. The following table is provided as a help | 42 | option 1: I/O base address. The following table is provided as a help |
43 | of the hardware jumpers. | 43 | of the hardware jumpers. |
44 | 44 | ||
45 | address jumper JADR | 45 | address jumper JADR |
46 | 0x300 1 (factory default) | 46 | 0x300 1 (factory default) |
47 | 0x320 2 | 47 | 0x320 2 |
48 | 0x340 3 | 48 | 0x340 3 |
49 | 0x360 4 | 49 | 0x360 4 |
50 | 0x380 5 | 50 | 0x380 5 |
51 | 0x3A0 6 | 51 | 0x3A0 6 |
52 | 52 | ||
53 | option 2: unipolar/bipolar ADC selection: 0 -> bipolar, 1 -> unipolar | 53 | option 2: unipolar/bipolar ADC selection: 0 -> bipolar, 1 -> unipolar |
54 | 54 | ||
55 | selection comedi_config option JUB | 55 | selection comedi_config option JUB |
56 | bipolar 0 2-3 (factory default) | 56 | bipolar 0 2-3 (factory default) |
57 | unipolar 1 1-2 | 57 | unipolar 1 1-2 |
58 | 58 | ||
59 | option 3: single-ended/differential AI selection: 0 -> SE, 1 -> differential | 59 | option 3: single-ended/differential AI selection: 0 -> SE, 1 -> differential |
60 | 60 | ||
61 | selection comedi_config option JCHA JCHB | 61 | selection comedi_config option JCHA JCHB |
62 | single-ended 0 1-2 1-2 (factory default) | 62 | single-ended 0 1-2 1-2 (factory default) |
63 | differential 1 2-3 2-3 | 63 | differential 1 2-3 2-3 |
64 | 64 | ||
@@ -140,7 +140,7 @@ static const struct adq12b_board adq12b_boards[] = { | |||
140 | .ai_bits = 12, | 140 | .ai_bits = 12, |
141 | .di_chans = 8, | 141 | .di_chans = 8, |
142 | .do_chans = 5 | 142 | .do_chans = 5 |
143 | }*/ | 143 | }*/ |
144 | }; | 144 | }; |
145 | 145 | ||
146 | #define thisboard ((const struct adq12b_board *)dev->board_ptr) | 146 | #define thisboard ((const struct adq12b_board *)dev->board_ptr) |
@@ -164,14 +164,15 @@ struct adq12b_private { | |||
164 | static int adq12b_attach(struct comedi_device *dev, | 164 | static int adq12b_attach(struct comedi_device *dev, |
165 | struct comedi_devconfig *it); | 165 | struct comedi_devconfig *it); |
166 | static int adq12b_detach(struct comedi_device *dev); | 166 | static int adq12b_detach(struct comedi_device *dev); |
167 | |||
167 | static struct comedi_driver driver_adq12b = { | 168 | static struct comedi_driver driver_adq12b = { |
168 | driver_name:"adq12b", | 169 | .driver_name = "adq12b", |
169 | module:THIS_MODULE, | 170 | .module = THIS_MODULE, |
170 | attach:adq12b_attach, | 171 | .attach = adq12b_attach, |
171 | detach:adq12b_detach, | 172 | .detach = adq12b_detach, |
172 | board_name:&adq12b_boards[0].name, | 173 | .board_name = &adq12b_boards[0].name, |
173 | offset:sizeof(struct adq12b_board), | 174 | .offset = sizeof(struct adq12b_board), |
174 | num_names:ARRAY_SIZE(adq12b_boards), | 175 | .num_names = ARRAY_SIZE(adq12b_boards), |
175 | }; | 176 | }; |
176 | 177 | ||
177 | static int adq12b_ai_rinsn(struct comedi_device *dev, | 178 | static int adq12b_ai_rinsn(struct comedi_device *dev, |
@@ -200,15 +201,16 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
200 | unipolar = it->options[1]; | 201 | unipolar = it->options[1]; |
201 | differential = it->options[2]; | 202 | differential = it->options[2]; |
202 | 203 | ||
203 | printk("comedi%d: adq12b called with options base=0x%03lx, %s and %s\n", | 204 | printk(KERN_INFO "comedi%d: adq12b called with options base=0x%03lx, " |
204 | dev->minor, iobase, (unipolar == 1) ? "unipolar" : "bipolar", | 205 | "%s and %s\n", dev->minor, iobase, |
206 | (unipolar == 1) ? "unipolar" : "bipolar", | ||
205 | (differential == 1) ? "differential" : "single-ended"); | 207 | (differential == 1) ? "differential" : "single-ended"); |
206 | 208 | ||
207 | /* if no address was specified, try the default 0x300 */ | 209 | /* if no address was specified, try the default 0x300 */ |
208 | if (iobase == 0) { | 210 | if (iobase == 0) { |
209 | printk | 211 | printk(KERN_WARNING "comedi%d: adq12b warning: I/O base " |
210 | ("comedi%d: adq12b warning: I/O base address not specified. Trying the default 0x300.\n", | 212 | "address not specified. Trying the default 0x300.\n", |
211 | dev->minor); | 213 | dev->minor); |
212 | iobase = 0x300; | 214 | iobase = 0x300; |
213 | } | 215 | } |
214 | 216 | ||
@@ -259,11 +261,10 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
259 | s->n_chan = thisboard->ai_se_chans; | 261 | s->n_chan = thisboard->ai_se_chans; |
260 | } | 262 | } |
261 | 263 | ||
262 | if (unipolar) { | 264 | if (unipolar) |
263 | s->range_table = &range_adq12b_ai_unipolar; | 265 | s->range_table = &range_adq12b_ai_unipolar; |
264 | } else { | 266 | else |
265 | s->range_table = &range_adq12b_ai_bipolar; | 267 | s->range_table = &range_adq12b_ai_bipolar; |
266 | } | ||
267 | 268 | ||
268 | s->maxdata = (1 << thisboard->ai_bits) - 1; | 269 | s->maxdata = (1 << thisboard->ai_bits) - 1; |
269 | 270 | ||
@@ -289,7 +290,7 @@ static int adq12b_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
289 | s->range_table = &range_digital; | 290 | s->range_table = &range_digital; |
290 | s->insn_bits = adq12b_do_insn_bits; | 291 | s->insn_bits = adq12b_do_insn_bits; |
291 | 292 | ||
292 | printk("attached\n"); | 293 | printk(KERN_INFO "attached\n"); |
293 | 294 | ||
294 | return 0; | 295 | return 0; |
295 | } | 296 | } |
@@ -309,7 +310,7 @@ static int adq12b_detach(struct comedi_device *dev) | |||
309 | 310 | ||
310 | kfree(devpriv); | 311 | kfree(devpriv); |
311 | 312 | ||
312 | printk("comedi%d: adq12b: removed\n", dev->minor); | 313 | printk(KERN_INFO "comedi%d: adq12b: removed\n", dev->minor); |
313 | 314 | ||
314 | return 0; | 315 | return 0; |
315 | } | 316 | } |
@@ -344,17 +345,18 @@ static int adq12b_ai_rinsn(struct comedi_device *dev, | |||
344 | /* wait for end of convertion */ | 345 | /* wait for end of convertion */ |
345 | i = 0; | 346 | i = 0; |
346 | do { | 347 | do { |
347 | /* udelay(1); */ | 348 | /* udelay(1); */ |
348 | status = inb(dev->iobase + ADQ12B_STINR); | 349 | status = inb(dev->iobase + ADQ12B_STINR); |
349 | status = status & ADQ12B_EOC; | 350 | status = status & ADQ12B_EOC; |
350 | } while (status == 0 && ++i < TIMEOUT); | 351 | } while (status == 0 && ++i < TIMEOUT); |
351 | /* } while (++i < 10); */ | 352 | /* } while (++i < 10); */ |
352 | 353 | ||
353 | /* read data */ | 354 | /* read data */ |
354 | hi = inb(dev->iobase + ADQ12B_ADHIG); | 355 | hi = inb(dev->iobase + ADQ12B_ADHIG); |
355 | lo = inb(dev->iobase + ADQ12B_ADLOW); | 356 | lo = inb(dev->iobase + ADQ12B_ADLOW); |
356 | 357 | ||
357 | /* printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", channel, range, status, hi, lo); */ | 358 | /* printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", |
359 | channel, range, status, hi, lo); */ | ||
358 | data[n] = (hi << 8) | lo; | 360 | data[n] = (hi << 8) | lo; |
359 | 361 | ||
360 | } | 362 | } |
diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c index 951e57949f7f..394d2ea19c2e 100644 --- a/drivers/staging/comedi/drivers/adv_pci1710.c +++ b/drivers/staging/comedi/drivers/adv_pci1710.c | |||
@@ -84,9 +84,9 @@ Configuration options: | |||
84 | #define PCI171x_DAREF 14 /* W: D/A reference control */ | 84 | #define PCI171x_DAREF 14 /* W: D/A reference control */ |
85 | #define PCI171x_DI 16 /* R: digi inputs */ | 85 | #define PCI171x_DI 16 /* R: digi inputs */ |
86 | #define PCI171x_DO 16 /* R: digi inputs */ | 86 | #define PCI171x_DO 16 /* R: digi inputs */ |
87 | #define PCI171x_CNT0 24 /* R/W: 8254 couter 0 */ | 87 | #define PCI171x_CNT0 24 /* R/W: 8254 counter 0 */ |
88 | #define PCI171x_CNT1 26 /* R/W: 8254 couter 1 */ | 88 | #define PCI171x_CNT1 26 /* R/W: 8254 counter 1 */ |
89 | #define PCI171x_CNT2 28 /* R/W: 8254 couter 2 */ | 89 | #define PCI171x_CNT2 28 /* R/W: 8254 counter 2 */ |
90 | #define PCI171x_CNTCTRL 30 /* W: 8254 counter control */ | 90 | #define PCI171x_CNTCTRL 30 /* W: 8254 counter control */ |
91 | 91 | ||
92 | /* upper bits from status register (PCI171x_STATUS) (lower is same woth control reg) */ | 92 | /* upper bits from status register (PCI171x_STATUS) (lower is same woth control reg) */ |
@@ -724,6 +724,7 @@ static int move_block_from_fifo(struct comedi_device *dev, | |||
724 | devpriv->ai_act_scan++; | 724 | devpriv->ai_act_scan++; |
725 | } | 725 | } |
726 | } | 726 | } |
727 | s->async->cur_chan = j; | ||
727 | DPRINTK("adv_pci1710 EDBG: END: move_block_from_fifo(...)\n"); | 728 | DPRINTK("adv_pci1710 EDBG: END: move_block_from_fifo(...)\n"); |
728 | return 0; | 729 | return 0; |
729 | } | 730 | } |
@@ -1034,14 +1035,6 @@ static int pci171x_ai_cmdtest(struct comedi_device *dev, | |||
1034 | } | 1035 | } |
1035 | } | 1036 | } |
1036 | 1037 | ||
1037 | if (!cmd->chanlist_len) { | ||
1038 | cmd->chanlist_len = 1; | ||
1039 | err++; | ||
1040 | } | ||
1041 | if (cmd->chanlist_len > this_board->n_aichan) { | ||
1042 | cmd->chanlist_len = this_board->n_aichan; | ||
1043 | err++; | ||
1044 | } | ||
1045 | if (cmd->scan_end_arg != cmd->chanlist_len) { | 1038 | if (cmd->scan_end_arg != cmd->chanlist_len) { |
1046 | cmd->scan_end_arg = cmd->chanlist_len; | 1039 | cmd->scan_end_arg = cmd->chanlist_len; |
1047 | err++; | 1040 | err++; |
@@ -1230,6 +1223,12 @@ static void setup_channel_list(struct comedi_device *dev, | |||
1230 | DPRINTK("GS: %2d. [%4x]=%4x %4x\n", i, chanprog, range, | 1223 | DPRINTK("GS: %2d. [%4x]=%4x %4x\n", i, chanprog, range, |
1231 | devpriv->act_chanlist[i]); | 1224 | devpriv->act_chanlist[i]); |
1232 | } | 1225 | } |
1226 | #ifdef PCI171x_PARANOIDCHECK | ||
1227 | for ( ; i < n_chan; i++) { /* store remainder of channel list */ | ||
1228 | devpriv->act_chanlist[i] = | ||
1229 | (CR_CHAN(chanlist[i]) << 12) & 0xf000; | ||
1230 | } | ||
1231 | #endif | ||
1233 | 1232 | ||
1234 | devpriv->ai_et_MuxVal = | 1233 | devpriv->ai_et_MuxVal = |
1235 | CR_CHAN(chanlist[0]) | (CR_CHAN(chanlist[seglen - 1]) << 8); | 1234 | CR_CHAN(chanlist[0]) | (CR_CHAN(chanlist[seglen - 1]) << 8); |
diff --git a/drivers/staging/comedi/drivers/aio_iiro_16.c b/drivers/staging/comedi/drivers/aio_iiro_16.c index 3857fd566d21..4baef9ff932a 100644 --- a/drivers/staging/comedi/drivers/aio_iiro_16.c +++ b/drivers/staging/comedi/drivers/aio_iiro_16.c | |||
@@ -98,7 +98,7 @@ static int aio_iiro_16_attach(struct comedi_device *dev, | |||
98 | int iobase; | 98 | int iobase; |
99 | struct comedi_subdevice *s; | 99 | struct comedi_subdevice *s; |
100 | 100 | ||
101 | printk("comedi%d: aio_iiro_16: ", dev->minor); | 101 | printk(KERN_INFO "comedi%d: aio_iiro_16: ", dev->minor); |
102 | 102 | ||
103 | dev->board_name = thisboard->name; | 103 | dev->board_name = thisboard->name; |
104 | 104 | ||
@@ -140,7 +140,7 @@ static int aio_iiro_16_attach(struct comedi_device *dev, | |||
140 | 140 | ||
141 | static int aio_iiro_16_detach(struct comedi_device *dev) | 141 | static int aio_iiro_16_detach(struct comedi_device *dev) |
142 | { | 142 | { |
143 | printk("comedi%d: aio_iiro_16: remove\n", dev->minor); | 143 | printk(KERN_INFO "comedi%d: aio_iiro_16: remove\n", dev->minor); |
144 | 144 | ||
145 | if (dev->iobase) | 145 | if (dev->iobase) |
146 | release_region(dev->iobase, AIO_IIRO_16_SIZE); | 146 | release_region(dev->iobase, AIO_IIRO_16_SIZE); |
diff --git a/drivers/staging/comedi/drivers/amplc_dio200.c b/drivers/staging/comedi/drivers/amplc_dio200.c index 69ab2813dd2e..204f30ef6e96 100644 --- a/drivers/staging/comedi/drivers/amplc_dio200.c +++ b/drivers/staging/comedi/drivers/amplc_dio200.c | |||
@@ -48,8 +48,8 @@ Passing a zero for an option is the same as leaving it unspecified. | |||
48 | 48 | ||
49 | SUBDEVICES | 49 | SUBDEVICES |
50 | 50 | ||
51 | PC218E PC212E PC215E/PCI215 | 51 | PC218E PC212E PC215E/PCI215 |
52 | ------------- ------------- ------------- | 52 | ------------- ------------- ------------- |
53 | Subdevices 7 6 5 | 53 | Subdevices 7 6 5 |
54 | 0 CTR-X1 PPI-X PPI-X | 54 | 0 CTR-X1 PPI-X PPI-X |
55 | 1 CTR-X2 CTR-Y1 PPI-Y | 55 | 1 CTR-X2 CTR-Y1 PPI-Y |
@@ -59,8 +59,8 @@ SUBDEVICES | |||
59 | 5 CTR-Z2 INTERRUPT | 59 | 5 CTR-Z2 INTERRUPT |
60 | 6 INTERRUPT | 60 | 6 INTERRUPT |
61 | 61 | ||
62 | PC214E PC272E/PCI272 | 62 | PC214E PC272E/PCI272 |
63 | ------------- ------------- | 63 | ------------- ------------- |
64 | Subdevices 4 4 | 64 | Subdevices 4 4 |
65 | 0 PPI-X PPI-X | 65 | 0 PPI-X PPI-X |
66 | 1 PPI-Y PPI-Y | 66 | 1 PPI-Y PPI-Y |
@@ -96,8 +96,8 @@ instructions are supported: | |||
96 | 0 to 7 as follows: | 96 | 0 to 7 as follows: |
97 | 97 | ||
98 | 0. CLK n, the counter channel's dedicated CLK input from the SK1 | 98 | 0. CLK n, the counter channel's dedicated CLK input from the SK1 |
99 | connector. (N.B. for other values, the counter channel's CLKn | 99 | connector. (N.B. for other values, the counter channel's CLKn |
100 | pin on the SK1 connector is an output!) | 100 | pin on the SK1 connector is an output!) |
101 | 1. Internal 10 MHz clock. | 101 | 1. Internal 10 MHz clock. |
102 | 2. Internal 1 MHz clock. | 102 | 2. Internal 1 MHz clock. |
103 | 3. Internal 100 kHz clock. | 103 | 3. Internal 100 kHz clock. |
@@ -105,8 +105,8 @@ instructions are supported: | |||
105 | 5. Internal 1 kHz clock. | 105 | 5. Internal 1 kHz clock. |
106 | 6. OUT n-1, the output of counter channel n-1 (see note 1 below). | 106 | 6. OUT n-1, the output of counter channel n-1 (see note 1 below). |
107 | 7. Ext Clock, the counter chip's dedicated Ext Clock input from | 107 | 7. Ext Clock, the counter chip's dedicated Ext Clock input from |
108 | the SK1 connector. This pin is shared by all three counter | 108 | the SK1 connector. This pin is shared by all three counter |
109 | channels on the chip. | 109 | channels on the chip. |
110 | 110 | ||
111 | INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current | 111 | INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current |
112 | clock source in data[1]. For internal clock sources, data[2] is set | 112 | clock source in data[1]. For internal clock sources, data[2] is set |
@@ -120,10 +120,10 @@ instructions are supported: | |||
120 | 0. VCC (internal +5V d.c.), i.e. gate permanently enabled. | 120 | 0. VCC (internal +5V d.c.), i.e. gate permanently enabled. |
121 | 1. GND (internal 0V d.c.), i.e. gate permanently disabled. | 121 | 1. GND (internal 0V d.c.), i.e. gate permanently disabled. |
122 | 2. GAT n, the counter channel's dedicated GAT input from the SK1 | 122 | 2. GAT n, the counter channel's dedicated GAT input from the SK1 |
123 | connector. (N.B. for other values, the counter channel's GATn | 123 | connector. (N.B. for other values, the counter channel's GATn |
124 | pin on the SK1 connector is an output!) | 124 | pin on the SK1 connector is an output!) |
125 | 3. /OUT n-2, the inverted output of counter channel n-2 (see note | 125 | 3. /OUT n-2, the inverted output of counter channel n-2 (see note |
126 | 2 below). | 126 | 2 below). |
127 | 4. Reserved. | 127 | 4. Reserved. |
128 | 5. Reserved. | 128 | 5. Reserved. |
129 | 6. Reserved. | 129 | 6. Reserved. |
@@ -153,8 +153,8 @@ below. | |||
153 | 153 | ||
154 | INTERRUPT SOURCES | 154 | INTERRUPT SOURCES |
155 | 155 | ||
156 | PC218E PC212E PC215E/PCI215 | 156 | PC218E PC212E PC215E/PCI215 |
157 | ------------- ------------- ------------- | 157 | ------------- ------------- ------------- |
158 | Sources 6 6 6 | 158 | Sources 6 6 6 |
159 | 0 CTR-X1-OUT PPI-X-C0 PPI-X-C0 | 159 | 0 CTR-X1-OUT PPI-X-C0 PPI-X-C0 |
160 | 1 CTR-X2-OUT PPI-X-C3 PPI-X-C3 | 160 | 1 CTR-X2-OUT PPI-X-C3 PPI-X-C3 |
@@ -163,8 +163,8 @@ INTERRUPT SOURCES | |||
163 | 4 CTR-Z1-OUT CTR-Z1-OUT CTR-Z1-OUT | 163 | 4 CTR-Z1-OUT CTR-Z1-OUT CTR-Z1-OUT |
164 | 5 CTR-Z2-OUT CTR-Z2-OUT CTR-Z2-OUT | 164 | 5 CTR-Z2-OUT CTR-Z2-OUT CTR-Z2-OUT |
165 | 165 | ||
166 | PC214E PC272E/PCI272 | 166 | PC214E PC272E/PCI272 |
167 | ------------- ------------- | 167 | ------------- ------------- |
168 | Sources 1 6 | 168 | Sources 1 6 |
169 | 0 JUMPER-J5 PPI-X-C0 | 169 | 0 JUMPER-J5 PPI-X-C0 |
170 | 1 PPI-X-C3 | 170 | 1 PPI-X-C3 |
@@ -435,11 +435,13 @@ MODULE_DEVICE_TABLE(pci, dio200_pci_table); | |||
435 | * Useful for shorthand access to the particular board structure | 435 | * Useful for shorthand access to the particular board structure |
436 | */ | 436 | */ |
437 | #define thisboard ((const struct dio200_board *)dev->board_ptr) | 437 | #define thisboard ((const struct dio200_board *)dev->board_ptr) |
438 | #define thislayout (&dio200_layouts[((struct dio200_board *)dev->board_ptr)->layout]) | 438 | #define thislayout (&dio200_layouts[((struct dio200_board *) \ |
439 | dev->board_ptr)->layout]) | ||
439 | 440 | ||
440 | /* this structure is for data unique to this hardware driver. If | 441 | /* this structure is for data unique to this hardware driver. If |
441 | several hardware drivers keep similar information in this structure, | 442 | several hardware drivers keep similar information in this structure, |
442 | feel free to suggest moving the variable to the struct comedi_device struct. */ | 443 | feel free to suggest moving the variable to the struct comedi_device struct. |
444 | */ | ||
443 | struct dio200_private { | 445 | struct dio200_private { |
444 | #ifdef CONFIG_COMEDI_PCI | 446 | #ifdef CONFIG_COMEDI_PCI |
445 | struct pci_dev *pci_dev; /* PCI device */ | 447 | struct pci_dev *pci_dev; /* PCI device */ |
@@ -603,9 +605,8 @@ static void dio200_stop_intr(struct comedi_device *dev, | |||
603 | 605 | ||
604 | subpriv->active = 0; | 606 | subpriv->active = 0; |
605 | subpriv->enabled_isns = 0; | 607 | subpriv->enabled_isns = 0; |
606 | if (subpriv->has_int_sce) { | 608 | if (subpriv->has_int_sce) |
607 | outb(0, subpriv->iobase); | 609 | outb(0, subpriv->iobase); |
608 | } | ||
609 | } | 610 | } |
610 | 611 | ||
611 | /* | 612 | /* |
@@ -629,16 +630,14 @@ static int dio200_start_intr(struct comedi_device *dev, | |||
629 | /* Determine interrupt sources to enable. */ | 630 | /* Determine interrupt sources to enable. */ |
630 | isn_bits = 0; | 631 | isn_bits = 0; |
631 | if (cmd->chanlist) { | 632 | if (cmd->chanlist) { |
632 | for (n = 0; n < cmd->chanlist_len; n++) { | 633 | for (n = 0; n < cmd->chanlist_len; n++) |
633 | isn_bits |= (1U << CR_CHAN(cmd->chanlist[n])); | 634 | isn_bits |= (1U << CR_CHAN(cmd->chanlist[n])); |
634 | } | ||
635 | } | 635 | } |
636 | isn_bits &= subpriv->valid_isns; | 636 | isn_bits &= subpriv->valid_isns; |
637 | /* Enable interrupt sources. */ | 637 | /* Enable interrupt sources. */ |
638 | subpriv->enabled_isns = isn_bits; | 638 | subpriv->enabled_isns = isn_bits; |
639 | if (subpriv->has_int_sce) { | 639 | if (subpriv->has_int_sce) |
640 | outb(isn_bits, subpriv->iobase); | 640 | outb(isn_bits, subpriv->iobase); |
641 | } | ||
642 | } | 641 | } |
643 | 642 | ||
644 | return retval; | 643 | return retval; |
@@ -662,14 +661,13 @@ dio200_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s, | |||
662 | 661 | ||
663 | spin_lock_irqsave(&subpriv->spinlock, flags); | 662 | spin_lock_irqsave(&subpriv->spinlock, flags); |
664 | s->async->inttrig = 0; | 663 | s->async->inttrig = 0; |
665 | if (subpriv->active) { | 664 | if (subpriv->active) |
666 | event = dio200_start_intr(dev, s); | 665 | event = dio200_start_intr(dev, s); |
667 | } | 666 | |
668 | spin_unlock_irqrestore(&subpriv->spinlock, flags); | 667 | spin_unlock_irqrestore(&subpriv->spinlock, flags); |
669 | 668 | ||
670 | if (event) { | 669 | if (event) |
671 | comedi_event(dev, s); | 670 | comedi_event(dev, s); |
672 | } | ||
673 | 671 | ||
674 | return 1; | 672 | return 1; |
675 | } | 673 | } |
@@ -726,9 +724,8 @@ static int dio200_handle_read_intr(struct comedi_device *dev, | |||
726 | * Reenable them NOW to minimize the time they are disabled. | 724 | * Reenable them NOW to minimize the time they are disabled. |
727 | */ | 725 | */ |
728 | cur_enabled = subpriv->enabled_isns; | 726 | cur_enabled = subpriv->enabled_isns; |
729 | if (subpriv->has_int_sce) { | 727 | if (subpriv->has_int_sce) |
730 | outb(cur_enabled, subpriv->iobase); | 728 | outb(cur_enabled, subpriv->iobase); |
731 | } | ||
732 | 729 | ||
733 | if (subpriv->active) { | 730 | if (subpriv->active) { |
734 | /* | 731 | /* |
@@ -747,9 +744,8 @@ static int dio200_handle_read_intr(struct comedi_device *dev, | |||
747 | len = s->async->cmd.chanlist_len; | 744 | len = s->async->cmd.chanlist_len; |
748 | for (n = 0; n < len; n++) { | 745 | for (n = 0; n < len; n++) { |
749 | ch = CR_CHAN(s->async->cmd.chanlist[n]); | 746 | ch = CR_CHAN(s->async->cmd.chanlist[n]); |
750 | if (triggered & (1U << ch)) { | 747 | if (triggered & (1U << ch)) |
751 | val |= (1U << n); | 748 | val |= (1U << n); |
752 | } | ||
753 | } | 749 | } |
754 | /* Write the scan to the buffer. */ | 750 | /* Write the scan to the buffer. */ |
755 | if (comedi_buf_put(s->async, val)) { | 751 | if (comedi_buf_put(s->async, val)) { |
@@ -781,9 +777,8 @@ static int dio200_handle_read_intr(struct comedi_device *dev, | |||
781 | } | 777 | } |
782 | spin_unlock_irqrestore(&subpriv->spinlock, flags); | 778 | spin_unlock_irqrestore(&subpriv->spinlock, flags); |
783 | 779 | ||
784 | if (oldevents != s->async->events) { | 780 | if (oldevents != s->async->events) |
785 | comedi_event(dev, s); | 781 | comedi_event(dev, s); |
786 | } | ||
787 | 782 | ||
788 | return (triggered != 0); | 783 | return (triggered != 0); |
789 | } | 784 | } |
@@ -798,9 +793,9 @@ static int dio200_subdev_intr_cancel(struct comedi_device *dev, | |||
798 | unsigned long flags; | 793 | unsigned long flags; |
799 | 794 | ||
800 | spin_lock_irqsave(&subpriv->spinlock, flags); | 795 | spin_lock_irqsave(&subpriv->spinlock, flags); |
801 | if (subpriv->active) { | 796 | if (subpriv->active) |
802 | dio200_stop_intr(dev, s); | 797 | dio200_stop_intr(dev, s); |
803 | } | 798 | |
804 | spin_unlock_irqrestore(&subpriv->spinlock, flags); | 799 | spin_unlock_irqrestore(&subpriv->spinlock, flags); |
805 | 800 | ||
806 | return 0; | 801 | return 0; |
@@ -846,7 +841,8 @@ dio200_subdev_intr_cmdtest(struct comedi_device *dev, | |||
846 | if (err) | 841 | if (err) |
847 | return 1; | 842 | return 1; |
848 | 843 | ||
849 | /* step 2: make sure trigger sources are unique and mutually compatible */ | 844 | /* step 2: make sure trigger sources are unique and mutually |
845 | compatible */ | ||
850 | 846 | ||
851 | /* these tests are true if more than one _src bit is set */ | 847 | /* these tests are true if more than one _src bit is set */ |
852 | if ((cmd->start_src & (cmd->start_src - 1)) != 0) | 848 | if ((cmd->start_src & (cmd->start_src - 1)) != 0) |
@@ -952,9 +948,8 @@ static int dio200_subdev_intr_cmd(struct comedi_device *dev, | |||
952 | } | 948 | } |
953 | spin_unlock_irqrestore(&subpriv->spinlock, flags); | 949 | spin_unlock_irqrestore(&subpriv->spinlock, flags); |
954 | 950 | ||
955 | if (event) { | 951 | if (event) |
956 | comedi_event(dev, s); | 952 | comedi_event(dev, s); |
957 | } | ||
958 | 953 | ||
959 | return 0; | 954 | return 0; |
960 | } | 955 | } |
@@ -980,9 +975,8 @@ dio200_subdev_intr_init(struct comedi_device *dev, struct comedi_subdevice *s, | |||
980 | subpriv->valid_isns = valid_isns; | 975 | subpriv->valid_isns = valid_isns; |
981 | spin_lock_init(&subpriv->spinlock); | 976 | spin_lock_init(&subpriv->spinlock); |
982 | 977 | ||
983 | if (has_int_sce) { | 978 | if (has_int_sce) |
984 | outb(0, subpriv->iobase); /* Disable interrupt sources. */ | 979 | outb(0, subpriv->iobase); /* Disable interrupt sources. */ |
985 | } | ||
986 | 980 | ||
987 | s->private = subpriv; | 981 | s->private = subpriv; |
988 | s->type = COMEDI_SUBD_DI; | 982 | s->type = COMEDI_SUBD_DI; |
@@ -1013,10 +1007,7 @@ dio200_subdev_intr_cleanup(struct comedi_device *dev, | |||
1013 | struct comedi_subdevice *s) | 1007 | struct comedi_subdevice *s) |
1014 | { | 1008 | { |
1015 | struct dio200_subdev_intr *subpriv = s->private; | 1009 | struct dio200_subdev_intr *subpriv = s->private; |
1016 | 1010 | kfree(subpriv); | |
1017 | if (subpriv) { | ||
1018 | kfree(subpriv); | ||
1019 | } | ||
1020 | } | 1011 | } |
1021 | 1012 | ||
1022 | /* | 1013 | /* |
@@ -1027,9 +1018,8 @@ static irqreturn_t dio200_interrupt(int irq, void *d) | |||
1027 | struct comedi_device *dev = d; | 1018 | struct comedi_device *dev = d; |
1028 | int handled; | 1019 | int handled; |
1029 | 1020 | ||
1030 | if (!dev->attached) { | 1021 | if (!dev->attached) |
1031 | return IRQ_NONE; | 1022 | return IRQ_NONE; |
1032 | } | ||
1033 | 1023 | ||
1034 | if (devpriv->intr_sd >= 0) { | 1024 | if (devpriv->intr_sd >= 0) { |
1035 | handled = dio200_handle_read_intr(dev, | 1025 | handled = dio200_handle_read_intr(dev, |
@@ -1266,10 +1256,7 @@ dio200_subdev_8254_cleanup(struct comedi_device *dev, | |||
1266 | struct comedi_subdevice *s) | 1256 | struct comedi_subdevice *s) |
1267 | { | 1257 | { |
1268 | struct dio200_subdev_intr *subpriv = s->private; | 1258 | struct dio200_subdev_intr *subpriv = s->private; |
1269 | 1259 | kfree(subpriv); | |
1270 | if (subpriv) { | ||
1271 | kfree(subpriv); | ||
1272 | } | ||
1273 | } | 1260 | } |
1274 | 1261 | ||
1275 | /* | 1262 | /* |
@@ -1348,9 +1335,8 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1348 | #endif | 1335 | #endif |
1349 | { | 1336 | { |
1350 | ret = dio200_request_region(dev->minor, iobase, DIO200_IO_SIZE); | 1337 | ret = dio200_request_region(dev->minor, iobase, DIO200_IO_SIZE); |
1351 | if (ret < 0) { | 1338 | if (ret < 0) |
1352 | return ret; | 1339 | return ret; |
1353 | } | ||
1354 | } | 1340 | } |
1355 | dev->iobase = iobase; | 1341 | dev->iobase = iobase; |
1356 | 1342 | ||
@@ -1371,17 +1357,17 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1371 | ret = dio200_subdev_8254_init(dev, s, iobase, | 1357 | ret = dio200_subdev_8254_init(dev, s, iobase, |
1372 | layout->sdinfo[n], | 1358 | layout->sdinfo[n], |
1373 | layout->has_clk_gat_sce); | 1359 | layout->has_clk_gat_sce); |
1374 | if (ret < 0) { | 1360 | if (ret < 0) |
1375 | return ret; | 1361 | return ret; |
1376 | } | 1362 | |
1377 | break; | 1363 | break; |
1378 | case sd_8255: | 1364 | case sd_8255: |
1379 | /* digital i/o subdevice (8255) */ | 1365 | /* digital i/o subdevice (8255) */ |
1380 | ret = subdev_8255_init(dev, s, 0, | 1366 | ret = subdev_8255_init(dev, s, 0, |
1381 | iobase + layout->sdinfo[n]); | 1367 | iobase + layout->sdinfo[n]); |
1382 | if (ret < 0) { | 1368 | if (ret < 0) |
1383 | return ret; | 1369 | return ret; |
1384 | } | 1370 | |
1385 | break; | 1371 | break; |
1386 | case sd_intr: | 1372 | case sd_intr: |
1387 | /* 'INTERRUPT' subdevice */ | 1373 | /* 'INTERRUPT' subdevice */ |
@@ -1392,9 +1378,9 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1392 | layout->sdinfo[n], | 1378 | layout->sdinfo[n], |
1393 | layout-> | 1379 | layout-> |
1394 | has_int_sce); | 1380 | has_int_sce); |
1395 | if (ret < 0) { | 1381 | if (ret < 0) |
1396 | return ret; | 1382 | return ret; |
1397 | } | 1383 | |
1398 | devpriv->intr_sd = n; | 1384 | devpriv->intr_sd = n; |
1399 | } else { | 1385 | } else { |
1400 | s->type = COMEDI_SUBD_UNUSED; | 1386 | s->type = COMEDI_SUBD_UNUSED; |
@@ -1407,9 +1393,8 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1407 | } | 1393 | } |
1408 | 1394 | ||
1409 | sdx = devpriv->intr_sd; | 1395 | sdx = devpriv->intr_sd; |
1410 | if (sdx >= 0 && sdx < dev->n_subdevices) { | 1396 | if (sdx >= 0 && sdx < dev->n_subdevices) |
1411 | dev->read_subdev = &dev->subdevices[sdx]; | 1397 | dev->read_subdev = &dev->subdevices[sdx]; |
1412 | } | ||
1413 | 1398 | ||
1414 | dev->board_name = thisboard->name; | 1399 | dev->board_name = thisboard->name; |
1415 | 1400 | ||
@@ -1434,11 +1419,10 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1434 | printk("(pci %s) ", pci_name(pci_dev)); | 1419 | printk("(pci %s) ", pci_name(pci_dev)); |
1435 | #endif | 1420 | #endif |
1436 | } | 1421 | } |
1437 | if (irq) { | 1422 | if (irq) |
1438 | printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); | 1423 | printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); |
1439 | } else { | 1424 | else |
1440 | printk("(no irq) "); | 1425 | printk("(no irq) "); |
1441 | } | ||
1442 | 1426 | ||
1443 | printk("attached\n"); | 1427 | printk("attached\n"); |
1444 | 1428 | ||
@@ -1461,9 +1445,8 @@ static int dio200_detach(struct comedi_device *dev) | |||
1461 | printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, | 1445 | printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, |
1462 | DIO200_DRIVER_NAME); | 1446 | DIO200_DRIVER_NAME); |
1463 | 1447 | ||
1464 | if (dev->irq) { | 1448 | if (dev->irq) |
1465 | free_irq(dev->irq, dev); | 1449 | free_irq(dev->irq, dev); |
1466 | } | ||
1467 | if (dev->subdevices) { | 1450 | if (dev->subdevices) { |
1468 | layout = thislayout; | 1451 | layout = thislayout; |
1469 | for (n = 0; n < dev->n_subdevices; n++) { | 1452 | for (n = 0; n < dev->n_subdevices; n++) { |
@@ -1486,22 +1469,19 @@ static int dio200_detach(struct comedi_device *dev) | |||
1486 | if (devpriv) { | 1469 | if (devpriv) { |
1487 | #ifdef CONFIG_COMEDI_PCI | 1470 | #ifdef CONFIG_COMEDI_PCI |
1488 | if (devpriv->pci_dev) { | 1471 | if (devpriv->pci_dev) { |
1489 | if (dev->iobase) { | 1472 | if (dev->iobase) |
1490 | comedi_pci_disable(devpriv->pci_dev); | 1473 | comedi_pci_disable(devpriv->pci_dev); |
1491 | } | ||
1492 | pci_dev_put(devpriv->pci_dev); | 1474 | pci_dev_put(devpriv->pci_dev); |
1493 | } else | 1475 | } else |
1494 | #endif | 1476 | #endif |
1495 | { | 1477 | { |
1496 | if (dev->iobase) { | 1478 | if (dev->iobase) |
1497 | release_region(dev->iobase, DIO200_IO_SIZE); | 1479 | release_region(dev->iobase, DIO200_IO_SIZE); |
1498 | } | ||
1499 | } | 1480 | } |
1500 | } | 1481 | } |
1501 | if (dev->board_name) { | 1482 | if (dev->board_name) |
1502 | printk(KERN_INFO "comedi%d: %s removed\n", | 1483 | printk(KERN_INFO "comedi%d: %s removed\n", |
1503 | dev->minor, dev->board_name); | 1484 | dev->minor, dev->board_name); |
1504 | } | ||
1505 | 1485 | ||
1506 | return 0; | 1486 | return 0; |
1507 | } | 1487 | } |
diff --git a/drivers/staging/comedi/drivers/amplc_pc236.c b/drivers/staging/comedi/drivers/amplc_pc236.c index 1032a8110d6e..a307d68d79c6 100644 --- a/drivers/staging/comedi/drivers/amplc_pc236.c +++ b/drivers/staging/comedi/drivers/amplc_pc236.c | |||
@@ -78,18 +78,18 @@ unused. | |||
78 | */ | 78 | */ |
79 | /* Disable interrupt, also clear any interrupt there */ | 79 | /* Disable interrupt, also clear any interrupt there */ |
80 | #define PCI236_INTR_DISABLE (PLX9052_INTCSR_LI1ENAB_DISABLED \ | 80 | #define PCI236_INTR_DISABLE (PLX9052_INTCSR_LI1ENAB_DISABLED \ |
81 | | PLX9052_INTCSR_LI1POL_HIGH \ | 81 | | PLX9052_INTCSR_LI1POL_HIGH \ |
82 | | PLX9052_INTCSR_LI2POL_HIGH \ | 82 | | PLX9052_INTCSR_LI2POL_HIGH \ |
83 | | PLX9052_INTCSR_PCIENAB_DISABLED \ | 83 | | PLX9052_INTCSR_PCIENAB_DISABLED \ |
84 | | PLX9052_INTCSR_LI1SEL_EDGE \ | 84 | | PLX9052_INTCSR_LI1SEL_EDGE \ |
85 | | PLX9052_INTCSR_LI1CLRINT_ASSERTED) | 85 | | PLX9052_INTCSR_LI1CLRINT_ASSERTED) |
86 | /* Enable interrupt, also clear any interrupt there. */ | 86 | /* Enable interrupt, also clear any interrupt there. */ |
87 | #define PCI236_INTR_ENABLE (PLX9052_INTCSR_LI1ENAB_ENABLED \ | 87 | #define PCI236_INTR_ENABLE (PLX9052_INTCSR_LI1ENAB_ENABLED \ |
88 | | PLX9052_INTCSR_LI1POL_HIGH \ | 88 | | PLX9052_INTCSR_LI1POL_HIGH \ |
89 | | PLX9052_INTCSR_LI2POL_HIGH \ | 89 | | PLX9052_INTCSR_LI2POL_HIGH \ |
90 | | PLX9052_INTCSR_PCIENAB_ENABLED \ | 90 | | PLX9052_INTCSR_PCIENAB_ENABLED \ |
91 | | PLX9052_INTCSR_LI1SEL_EDGE \ | 91 | | PLX9052_INTCSR_LI1SEL_EDGE \ |
92 | | PLX9052_INTCSR_LI1CLRINT_ASSERTED) | 92 | | PLX9052_INTCSR_LI1CLRINT_ASSERTED) |
93 | 93 | ||
94 | /* | 94 | /* |
95 | * Board descriptions for Amplicon PC36AT and PCI236. | 95 | * Board descriptions for Amplicon PC36AT and PCI236. |
@@ -150,12 +150,13 @@ MODULE_DEVICE_TABLE(pci, pc236_pci_table); | |||
150 | 150 | ||
151 | /* this structure is for data unique to this hardware driver. If | 151 | /* this structure is for data unique to this hardware driver. If |
152 | several hardware drivers keep similar information in this structure, | 152 | several hardware drivers keep similar information in this structure, |
153 | feel free to suggest moving the variable to the struct comedi_device struct. */ | 153 | feel free to suggest moving the variable to the struct comedi_device struct. |
154 | */ | ||
154 | struct pc236_private { | 155 | struct pc236_private { |
155 | #ifdef CONFIG_COMEDI_PCI | 156 | #ifdef CONFIG_COMEDI_PCI |
156 | /* PCI device */ | 157 | /* PCI device */ |
157 | struct pci_dev *pci_dev; | 158 | struct pci_dev *pci_dev; |
158 | unsigned long lcr_iobase; /* PLX PCI9052 config registers in PCIBAR1 */ | 159 | unsigned long lcr_iobase; /* PLX PCI9052 config registers in PCIBAR1 */ |
159 | #endif | 160 | #endif |
160 | int enable_irq; | 161 | int enable_irq; |
161 | }; | 162 | }; |
@@ -345,9 +346,8 @@ static int pc236_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
345 | #endif | 346 | #endif |
346 | { | 347 | { |
347 | ret = pc236_request_region(dev->minor, iobase, PC236_IO_SIZE); | 348 | ret = pc236_request_region(dev->minor, iobase, PC236_IO_SIZE); |
348 | if (ret < 0) { | 349 | if (ret < 0) |
349 | return ret; | 350 | return ret; |
350 | } | ||
351 | } | 351 | } |
352 | dev->iobase = iobase; | 352 | dev->iobase = iobase; |
353 | 353 | ||
@@ -399,11 +399,10 @@ static int pc236_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
399 | printk("(pci %s) ", pci_name(pci_dev)); | 399 | printk("(pci %s) ", pci_name(pci_dev)); |
400 | #endif | 400 | #endif |
401 | } | 401 | } |
402 | if (irq) { | 402 | if (irq) |
403 | printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); | 403 | printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); |
404 | } else { | 404 | else |
405 | printk("(no irq) "); | 405 | printk("(no irq) "); |
406 | } | ||
407 | 406 | ||
408 | printk("attached\n"); | 407 | printk("attached\n"); |
409 | 408 | ||
@@ -422,27 +421,24 @@ static int pc236_detach(struct comedi_device *dev) | |||
422 | { | 421 | { |
423 | printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, | 422 | printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, |
424 | PC236_DRIVER_NAME); | 423 | PC236_DRIVER_NAME); |
425 | if (devpriv) { | 424 | if (devpriv) |
426 | pc236_intr_disable(dev); | 425 | pc236_intr_disable(dev); |
427 | } | 426 | |
428 | if (dev->irq) | 427 | if (dev->irq) |
429 | free_irq(dev->irq, dev); | 428 | free_irq(dev->irq, dev); |
430 | if (dev->subdevices) { | 429 | if (dev->subdevices) |
431 | subdev_8255_cleanup(dev, dev->subdevices + 0); | 430 | subdev_8255_cleanup(dev, dev->subdevices + 0); |
432 | } | ||
433 | if (devpriv) { | 431 | if (devpriv) { |
434 | #ifdef CONFIG_COMEDI_PCI | 432 | #ifdef CONFIG_COMEDI_PCI |
435 | if (devpriv->pci_dev) { | 433 | if (devpriv->pci_dev) { |
436 | if (dev->iobase) { | 434 | if (dev->iobase) |
437 | comedi_pci_disable(devpriv->pci_dev); | 435 | comedi_pci_disable(devpriv->pci_dev); |
438 | } | ||
439 | pci_dev_put(devpriv->pci_dev); | 436 | pci_dev_put(devpriv->pci_dev); |
440 | } else | 437 | } else |
441 | #endif | 438 | #endif |
442 | { | 439 | { |
443 | if (dev->iobase) { | 440 | if (dev->iobase) |
444 | release_region(dev->iobase, PC236_IO_SIZE); | 441 | release_region(dev->iobase, PC236_IO_SIZE); |
445 | } | ||
446 | } | 442 | } |
447 | } | 443 | } |
448 | if (dev->board_name) { | 444 | if (dev->board_name) { |
diff --git a/drivers/staging/comedi/drivers/amplc_pci224.c b/drivers/staging/comedi/drivers/amplc_pci224.c index d9836879355e..b41e5e5963aa 100644 --- a/drivers/staging/comedi/drivers/amplc_pci224.c +++ b/drivers/staging/comedi/drivers/amplc_pci224.c | |||
@@ -1536,20 +1536,12 @@ static int pci224_detach(struct comedi_device *dev) | |||
1536 | 1536 | ||
1537 | s = dev->subdevices + 0; | 1537 | s = dev->subdevices + 0; |
1538 | /* AO subdevice */ | 1538 | /* AO subdevice */ |
1539 | if (s->range_table_list) { | 1539 | kfree(s->range_table_list); |
1540 | kfree(s->range_table_list); | ||
1541 | } | ||
1542 | } | 1540 | } |
1543 | if (devpriv) { | 1541 | if (devpriv) { |
1544 | if (devpriv->ao_readback) { | 1542 | kfree(devpriv->ao_readback); |
1545 | kfree(devpriv->ao_readback); | 1543 | kfree(devpriv->ao_scan_vals); |
1546 | } | 1544 | kfree(devpriv->ao_scan_order); |
1547 | if (devpriv->ao_scan_vals) { | ||
1548 | kfree(devpriv->ao_scan_vals); | ||
1549 | } | ||
1550 | if (devpriv->ao_scan_order) { | ||
1551 | kfree(devpriv->ao_scan_order); | ||
1552 | } | ||
1553 | if (devpriv->pci_dev) { | 1545 | if (devpriv->pci_dev) { |
1554 | if (dev->iobase) { | 1546 | if (dev->iobase) { |
1555 | comedi_pci_disable(devpriv->pci_dev); | 1547 | comedi_pci_disable(devpriv->pci_dev); |
diff --git a/drivers/staging/comedi/drivers/c6xdigio.c b/drivers/staging/comedi/drivers/c6xdigio.c index abb0532182ba..fb0d5fa71765 100644 --- a/drivers/staging/comedi/drivers/c6xdigio.c +++ b/drivers/staging/comedi/drivers/c6xdigio.c | |||
@@ -45,7 +45,7 @@ http://robot0.ge.uiuc.edu/~spong/mecha/ | |||
45 | #include <linux/interrupt.h> | 45 | #include <linux/interrupt.h> |
46 | #include <linux/timex.h> | 46 | #include <linux/timex.h> |
47 | #include <linux/timer.h> | 47 | #include <linux/timer.h> |
48 | #include <asm/io.h> | 48 | #include <linux/io.h> |
49 | #include <linux/pnp.h> | 49 | #include <linux/pnp.h> |
50 | 50 | ||
51 | #include "../comedidev.h" | 51 | #include "../comedidev.h" |
@@ -220,11 +220,11 @@ static int C6X_encInput(unsigned long baseAddr, unsigned channel) | |||
220 | /* printk("Inside C6X_encInput\n"); */ | 220 | /* printk("Inside C6X_encInput\n"); */ |
221 | 221 | ||
222 | enc.value = 0; | 222 | enc.value = 0; |
223 | if (channel == 0) { | 223 | if (channel == 0) |
224 | ppcmd = 0x48; | 224 | ppcmd = 0x48; |
225 | } else { | 225 | else |
226 | ppcmd = 0x50; | 226 | ppcmd = 0x50; |
227 | } | 227 | |
228 | WriteByteToHwPort(baseAddr, ppcmd); | 228 | WriteByteToHwPort(baseAddr, ppcmd); |
229 | tmp = ReadByteFromHwPort(baseAddr + 1); | 229 | tmp = ReadByteFromHwPort(baseAddr + 1); |
230 | while (((tmp & 0x80) == 0) && (timeout < C6XDIGIO_TIME_OUT)) { | 230 | while (((tmp & 0x80) == 0) && (timeout < C6XDIGIO_TIME_OUT)) { |
@@ -391,9 +391,8 @@ static int c6xdigio_ei_insn_read(struct comedi_device *dev, | |||
391 | int n; | 391 | int n; |
392 | int chan = CR_CHAN(insn->chanspec); | 392 | int chan = CR_CHAN(insn->chanspec); |
393 | 393 | ||
394 | for (n = 0; n < insn->n; n++) { | 394 | for (n = 0; n < insn->n; n++) |
395 | data[n] = (C6X_encInput(dev->iobase, chan) & 0xffffff); | 395 | data[n] = (C6X_encInput(dev->iobase, chan) & 0xffffff); |
396 | } | ||
397 | 396 | ||
398 | return n; | 397 | return n; |
399 | } | 398 | } |
@@ -420,9 +419,9 @@ static void board_init(struct comedi_device *dev) | |||
420 | 419 | ||
421 | static const struct pnp_device_id c6xdigio_pnp_tbl[] = { | 420 | static const struct pnp_device_id c6xdigio_pnp_tbl[] = { |
422 | /* Standard LPT Printer Port */ | 421 | /* Standard LPT Printer Port */ |
423 | {.id = "PNP0400",.driver_data = 0}, | 422 | {.id = "PNP0400", .driver_data = 0}, |
424 | /* ECP Printer Port */ | 423 | /* ECP Printer Port */ |
425 | {.id = "PNP0401",.driver_data = 0}, | 424 | {.id = "PNP0401", .driver_data = 0}, |
426 | {} | 425 | {} |
427 | }; | 426 | }; |
428 | 427 | ||
@@ -452,15 +451,14 @@ static int c6xdigio_attach(struct comedi_device *dev, | |||
452 | if (result < 0) | 451 | if (result < 0) |
453 | return result; | 452 | return result; |
454 | 453 | ||
455 | /* Make sure that PnP ports gets activated */ | 454 | /* Make sure that PnP ports get activated */ |
456 | pnp_register_driver(&c6xdigio_pnp_driver); | 455 | pnp_register_driver(&c6xdigio_pnp_driver); |
457 | 456 | ||
458 | irq = it->options[1]; | 457 | irq = it->options[1]; |
459 | if (irq > 0) { | 458 | if (irq > 0) |
460 | printk("comedi%d: irq = %u ignored\n", dev->minor, irq); | 459 | printk("comedi%d: irq = %u ignored\n", dev->minor, irq); |
461 | } else if (irq == 0) { | 460 | else if (irq == 0) |
462 | printk("comedi%d: no irq\n", dev->minor); | 461 | printk("comedi%d: no irq\n", dev->minor); |
463 | } | ||
464 | 462 | ||
465 | s = dev->subdevices + 0; | 463 | s = dev->subdevices + 0; |
466 | /* pwm output subdevice */ | 464 | /* pwm output subdevice */ |
@@ -483,19 +481,19 @@ static int c6xdigio_attach(struct comedi_device *dev, | |||
483 | s->maxdata = 0xffffff; | 481 | s->maxdata = 0xffffff; |
484 | s->range_table = &range_unknown; | 482 | s->range_table = &range_unknown; |
485 | 483 | ||
486 | /* s = dev->subdevices + 2; */ | 484 | /* s = dev->subdevices + 2; */ |
487 | /* pwm output subdevice */ | 485 | /* pwm output subdevice */ |
488 | /* s->type = COMEDI_SUBD_COUNTER; // Not sure what to put here */ | 486 | /* s->type = COMEDI_SUBD_COUNTER; // Not sure what to put here */ |
489 | /* s->subdev_flags = SDF_WRITEABLE; */ | 487 | /* s->subdev_flags = SDF_WRITEABLE; */ |
490 | /* s->n_chan = 1; */ | 488 | /* s->n_chan = 1; */ |
491 | /* s->trig[0] = c6xdigio_ei_init; */ | 489 | /* s->trig[0] = c6xdigio_ei_init; */ |
492 | /* s->insn_read = c6xdigio_ei_init_insn_read; */ | 490 | /* s->insn_read = c6xdigio_ei_init_insn_read; */ |
493 | /* s->insn_write = c6xdigio_ei_init_insn_write; */ | 491 | /* s->insn_write = c6xdigio_ei_init_insn_write; */ |
494 | /* s->maxdata = 0xFFFF; // Really just a don't care */ | 492 | /* s->maxdata = 0xFFFF; // Really just a don't care */ |
495 | /* s->range_table = &range_unknown; // Not sure what to put here */ | 493 | /* s->range_table = &range_unknown; // Not sure what to put here */ |
496 | 494 | ||
497 | /* I will call this init anyway but more than likely the DSP board will not be connect */ | 495 | /* I will call this init anyway but more than likely the DSP board */ |
498 | /* when device driver is loaded. */ | 496 | /* will not be connected when device driver is loaded. */ |
499 | board_init(dev); | 497 | board_init(dev); |
500 | 498 | ||
501 | return 0; | 499 | return 0; |
@@ -503,16 +501,17 @@ static int c6xdigio_attach(struct comedi_device *dev, | |||
503 | 501 | ||
504 | static int c6xdigio_detach(struct comedi_device *dev) | 502 | static int c6xdigio_detach(struct comedi_device *dev) |
505 | { | 503 | { |
506 | /* board_halt(dev); may not need this */ | 504 | /* board_halt(dev); may not need this */ |
507 | 505 | ||
508 | printk("comedi%d: c6xdigio: remove\n", dev->minor); | 506 | printk("comedi%d: c6xdigio: remove\n", dev->minor); |
509 | 507 | ||
510 | if (dev->iobase) { | 508 | if (dev->iobase) |
511 | release_region(dev->iobase, C6XDIGIO_SIZE); | 509 | release_region(dev->iobase, C6XDIGIO_SIZE); |
512 | } | 510 | |
513 | if (dev->irq) { | 511 | /* Not using IRQ so I am not sure if I need this */ |
512 | if (dev->irq) | ||
514 | free_irq(dev->irq, dev); | 513 | free_irq(dev->irq, dev); |
515 | } /* Not using IRQ so I am not sure if I need this */ | 514 | |
516 | pnp_unregister_driver(&c6xdigio_pnp_driver); | 515 | pnp_unregister_driver(&c6xdigio_pnp_driver); |
517 | 516 | ||
518 | return 0; | 517 | return 0; |
diff --git a/drivers/staging/comedi/drivers/cb_pcidas.c b/drivers/staging/comedi/drivers/cb_pcidas.c index f3e66c440a38..434591de37c5 100644 --- a/drivers/staging/comedi/drivers/cb_pcidas.c +++ b/drivers/staging/comedi/drivers/cb_pcidas.c | |||
@@ -518,7 +518,7 @@ static int trimpot_7376_write(struct comedi_device *dev, uint8_t value); | |||
518 | static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel, | 518 | static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel, |
519 | uint8_t value); | 519 | uint8_t value); |
520 | static int nvram_read(struct comedi_device *dev, unsigned int address, | 520 | static int nvram_read(struct comedi_device *dev, unsigned int address, |
521 | uint8_t * data); | 521 | uint8_t *data); |
522 | 522 | ||
523 | static inline unsigned int cal_enable_bits(struct comedi_device *dev) | 523 | static inline unsigned int cal_enable_bits(struct comedi_device *dev) |
524 | { | 524 | { |
@@ -760,9 +760,8 @@ static int cb_pcidas_detach(struct comedi_device *dev) | |||
760 | if (dev->subdevices) | 760 | if (dev->subdevices) |
761 | subdev_8255_cleanup(dev, dev->subdevices + 2); | 761 | subdev_8255_cleanup(dev, dev->subdevices + 2); |
762 | if (devpriv && devpriv->pci_dev) { | 762 | if (devpriv && devpriv->pci_dev) { |
763 | if (devpriv->s5933_config) { | 763 | if (devpriv->s5933_config) |
764 | comedi_pci_disable(devpriv->pci_dev); | 764 | comedi_pci_disable(devpriv->pci_dev); |
765 | } | ||
766 | pci_dev_put(devpriv->pci_dev); | 765 | pci_dev_put(devpriv->pci_dev); |
767 | } | 766 | } |
768 | 767 | ||
@@ -1248,9 +1247,8 @@ static int cb_pcidas_ai_cmd(struct comedi_device *dev, | |||
1248 | cmd->flags & TRIG_ROUND_MASK); | 1247 | cmd->flags & TRIG_ROUND_MASK); |
1249 | 1248 | ||
1250 | /* set number of conversions */ | 1249 | /* set number of conversions */ |
1251 | if (cmd->stop_src == TRIG_COUNT) { | 1250 | if (cmd->stop_src == TRIG_COUNT) |
1252 | devpriv->count = cmd->chanlist_len * cmd->stop_arg; | 1251 | devpriv->count = cmd->chanlist_len * cmd->stop_arg; |
1253 | } | ||
1254 | /* enable interrupts */ | 1252 | /* enable interrupts */ |
1255 | spin_lock_irqsave(&dev->spinlock, flags); | 1253 | spin_lock_irqsave(&dev->spinlock, flags); |
1256 | devpriv->adc_fifo_bits |= INTE; | 1254 | devpriv->adc_fifo_bits |= INTE; |
@@ -1449,9 +1447,8 @@ static int cb_pcidas_ao_cmd(struct comedi_device *dev, | |||
1449 | devpriv->ao_divisor2, 2); | 1447 | devpriv->ao_divisor2, 2); |
1450 | } | 1448 | } |
1451 | /* set number of conversions */ | 1449 | /* set number of conversions */ |
1452 | if (cmd->stop_src == TRIG_COUNT) { | 1450 | if (cmd->stop_src == TRIG_COUNT) |
1453 | devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg; | 1451 | devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg; |
1454 | } | ||
1455 | /* set pacer source */ | 1452 | /* set pacer source */ |
1456 | spin_lock_irqsave(&dev->spinlock, flags); | 1453 | spin_lock_irqsave(&dev->spinlock, flags); |
1457 | switch (cmd->scan_begin_src) { | 1454 | switch (cmd->scan_begin_src) { |
@@ -1494,9 +1491,8 @@ static int cb_pcidas_ao_inttrig(struct comedi_device *dev, | |||
1494 | num_points * sizeof(short)); | 1491 | num_points * sizeof(short)); |
1495 | num_points = num_bytes / sizeof(short); | 1492 | num_points = num_bytes / sizeof(short); |
1496 | 1493 | ||
1497 | if (cmd->stop_src == TRIG_COUNT) { | 1494 | if (cmd->stop_src == TRIG_COUNT) |
1498 | devpriv->ao_count -= num_points; | 1495 | devpriv->ao_count -= num_points; |
1499 | } | ||
1500 | /* write data to board's fifo */ | 1496 | /* write data to board's fifo */ |
1501 | outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes); | 1497 | outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes); |
1502 | 1498 | ||
@@ -1534,9 +1530,8 @@ static irqreturn_t cb_pcidas_interrupt(int irq, void *d) | |||
1534 | static const int timeout = 10000; | 1530 | static const int timeout = 10000; |
1535 | unsigned long flags; | 1531 | unsigned long flags; |
1536 | 1532 | ||
1537 | if (dev->attached == 0) { | 1533 | if (dev->attached == 0) |
1538 | return IRQ_NONE; | 1534 | return IRQ_NONE; |
1539 | } | ||
1540 | 1535 | ||
1541 | async = s->async; | 1536 | async = s->async; |
1542 | async->events = 0; | 1537 | async->events = 0; |
@@ -1558,15 +1553,13 @@ static irqreturn_t cb_pcidas_interrupt(int irq, void *d) | |||
1558 | 1553 | ||
1559 | status = inw(devpriv->control_status + INT_ADCFIFO); | 1554 | status = inw(devpriv->control_status + INT_ADCFIFO); |
1560 | #ifdef CB_PCIDAS_DEBUG | 1555 | #ifdef CB_PCIDAS_DEBUG |
1561 | if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0) { | 1556 | if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0) |
1562 | comedi_error(dev, "spurious interrupt"); | 1557 | comedi_error(dev, "spurious interrupt"); |
1563 | } | ||
1564 | #endif | 1558 | #endif |
1565 | 1559 | ||
1566 | /* check for analog output interrupt */ | 1560 | /* check for analog output interrupt */ |
1567 | if (status & (DAHFI | DAEMI)) { | 1561 | if (status & (DAHFI | DAEMI)) |
1568 | handle_ao_interrupt(dev, status); | 1562 | handle_ao_interrupt(dev, status); |
1569 | } | ||
1570 | /* check for analog input interrupts */ | 1563 | /* check for analog input interrupts */ |
1571 | /* if fifo half-full */ | 1564 | /* if fifo half-full */ |
1572 | if (status & ADHFI) { | 1565 | if (status & ADHFI) { |
@@ -1675,9 +1668,8 @@ static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status) | |||
1675 | num_points * sizeof(short)); | 1668 | num_points * sizeof(short)); |
1676 | num_points = num_bytes / sizeof(short); | 1669 | num_points = num_bytes / sizeof(short); |
1677 | 1670 | ||
1678 | if (async->cmd.stop_src == TRIG_COUNT) { | 1671 | if (async->cmd.stop_src == TRIG_COUNT) |
1679 | devpriv->ao_count -= num_points; | 1672 | devpriv->ao_count -= num_points; |
1680 | } | ||
1681 | /* write data to board's fifo */ | 1673 | /* write data to board's fifo */ |
1682 | outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, | 1674 | outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, |
1683 | num_points); | 1675 | num_points); |
@@ -1852,7 +1844,7 @@ static int wait_for_nvram_ready(unsigned long s5933_base_addr) | |||
1852 | } | 1844 | } |
1853 | 1845 | ||
1854 | static int nvram_read(struct comedi_device *dev, unsigned int address, | 1846 | static int nvram_read(struct comedi_device *dev, unsigned int address, |
1855 | uint8_t * data) | 1847 | uint8_t *data) |
1856 | { | 1848 | { |
1857 | unsigned long iobase = devpriv->s5933_config; | 1849 | unsigned long iobase = devpriv->s5933_config; |
1858 | 1850 | ||
diff --git a/drivers/staging/comedi/drivers/cb_pcidda.c b/drivers/staging/comedi/drivers/cb_pcidda.c index 782357732eed..81829d6fd287 100644 --- a/drivers/staging/comedi/drivers/cb_pcidda.c +++ b/drivers/staging/comedi/drivers/cb_pcidda.c | |||
@@ -410,9 +410,8 @@ static int cb_pcidda_detach(struct comedi_device *dev) | |||
410 | */ | 410 | */ |
411 | if (devpriv) { | 411 | if (devpriv) { |
412 | if (devpriv->pci_dev) { | 412 | if (devpriv->pci_dev) { |
413 | if (devpriv->dac) { | 413 | if (devpriv->dac) |
414 | comedi_pci_disable(devpriv->pci_dev); | 414 | comedi_pci_disable(devpriv->pci_dev); |
415 | } | ||
416 | pci_dev_put(devpriv->pci_dev); | 415 | pci_dev_put(devpriv->pci_dev); |
417 | } | 416 | } |
418 | } | 417 | } |
@@ -677,9 +676,8 @@ static unsigned int cb_pcidda_serial_in(struct comedi_device *dev) | |||
677 | 676 | ||
678 | for (i = 1; i <= value_width; i++) { | 677 | for (i = 1; i <= value_width; i++) { |
679 | /* read bits most significant bit first */ | 678 | /* read bits most significant bit first */ |
680 | if (inw_p(devpriv->dac + DACALIBRATION1) & SERIAL_OUT_BIT) { | 679 | if (inw_p(devpriv->dac + DACALIBRATION1) & SERIAL_OUT_BIT) |
681 | value |= 1 << (value_width - i); | 680 | value |= 1 << (value_width - i); |
682 | } | ||
683 | } | 681 | } |
684 | 682 | ||
685 | return value; | 683 | return value; |
@@ -716,9 +714,8 @@ static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev, | |||
716 | /* send serial output stream to eeprom */ | 714 | /* send serial output stream to eeprom */ |
717 | cal2_bits = SELECT_EEPROM_BIT | DESELECT_REF_DAC_BIT | DUMMY_BIT; | 715 | cal2_bits = SELECT_EEPROM_BIT | DESELECT_REF_DAC_BIT | DUMMY_BIT; |
718 | /* deactivate caldacs (one caldac for every two channels) */ | 716 | /* deactivate caldacs (one caldac for every two channels) */ |
719 | for (i = 0; i < max_num_caldacs; i++) { | 717 | for (i = 0; i < max_num_caldacs; i++) |
720 | cal2_bits |= DESELECT_CALDAC_BIT(i); | 718 | cal2_bits |= DESELECT_CALDAC_BIT(i); |
721 | } | ||
722 | outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); | 719 | outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); |
723 | 720 | ||
724 | /* tell eeprom we want to read */ | 721 | /* tell eeprom we want to read */ |
@@ -756,9 +753,8 @@ static void cb_pcidda_write_caldac(struct comedi_device *dev, | |||
756 | */ | 753 | */ |
757 | cal2_bits = DESELECT_REF_DAC_BIT | DUMMY_BIT; | 754 | cal2_bits = DESELECT_REF_DAC_BIT | DUMMY_BIT; |
758 | /* deactivate caldacs (one caldac for every two channels) */ | 755 | /* deactivate caldacs (one caldac for every two channels) */ |
759 | for (i = 0; i < max_num_caldacs; i++) { | 756 | for (i = 0; i < max_num_caldacs; i++) |
760 | cal2_bits |= DESELECT_CALDAC_BIT(i); | 757 | cal2_bits |= DESELECT_CALDAC_BIT(i); |
761 | } | ||
762 | /* activate the caldac we want */ | 758 | /* activate the caldac we want */ |
763 | cal2_bits &= ~DESELECT_CALDAC_BIT(caldac); | 759 | cal2_bits &= ~DESELECT_CALDAC_BIT(caldac); |
764 | outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); | 760 | outw_p(cal2_bits, devpriv->dac + DACALIBRATION2); |
diff --git a/drivers/staging/comedi/drivers/cb_pcidio.c b/drivers/staging/comedi/drivers/cb_pcidio.c index 7daad0a17fb1..38ccd105fa35 100644 --- a/drivers/staging/comedi/drivers/cb_pcidio.c +++ b/drivers/staging/comedi/drivers/cb_pcidio.c | |||
@@ -283,17 +283,15 @@ static int pcidio_detach(struct comedi_device *dev) | |||
283 | printk("comedi%d: cb_pcidio: remove\n", dev->minor); | 283 | printk("comedi%d: cb_pcidio: remove\n", dev->minor); |
284 | if (devpriv) { | 284 | if (devpriv) { |
285 | if (devpriv->pci_dev) { | 285 | if (devpriv->pci_dev) { |
286 | if (devpriv->dio_reg_base) { | 286 | if (devpriv->dio_reg_base) |
287 | comedi_pci_disable(devpriv->pci_dev); | 287 | comedi_pci_disable(devpriv->pci_dev); |
288 | } | ||
289 | pci_dev_put(devpriv->pci_dev); | 288 | pci_dev_put(devpriv->pci_dev); |
290 | } | 289 | } |
291 | } | 290 | } |
292 | if (dev->subdevices) { | 291 | if (dev->subdevices) { |
293 | int i; | 292 | int i; |
294 | for (i = 0; i < thisboard->n_8255; i++) { | 293 | for (i = 0; i < thisboard->n_8255; i++) |
295 | subdev_8255_cleanup(dev, dev->subdevices + i); | 294 | subdev_8255_cleanup(dev, dev->subdevices + i); |
296 | } | ||
297 | } | 295 | } |
298 | return 0; | 296 | return 0; |
299 | } | 297 | } |
diff --git a/drivers/staging/comedi/drivers/cb_pcimdas.c b/drivers/staging/comedi/drivers/cb_pcimdas.c index cbbca05acb96..2e61727fc9a0 100644 --- a/drivers/staging/comedi/drivers/cb_pcimdas.c +++ b/drivers/staging/comedi/drivers/cb_pcimdas.c | |||
@@ -330,11 +330,10 @@ found: | |||
330 | 330 | ||
331 | s = dev->subdevices + 2; | 331 | s = dev->subdevices + 2; |
332 | /* digital i/o subdevice */ | 332 | /* digital i/o subdevice */ |
333 | if (thisboard->has_dio) { | 333 | if (thisboard->has_dio) |
334 | subdev_8255_init(dev, s, NULL, devpriv->BADR4); | 334 | subdev_8255_init(dev, s, NULL, devpriv->BADR4); |
335 | } else { | 335 | else |
336 | s->type = COMEDI_SUBD_UNUSED; | 336 | s->type = COMEDI_SUBD_UNUSED; |
337 | } | ||
338 | 337 | ||
339 | printk("attached\n"); | 338 | printk("attached\n"); |
340 | 339 | ||
@@ -365,9 +364,8 @@ static int cb_pcimdas_detach(struct comedi_device *dev) | |||
365 | free_irq(dev->irq, dev); | 364 | free_irq(dev->irq, dev); |
366 | if (devpriv) { | 365 | if (devpriv) { |
367 | if (devpriv->pci_dev) { | 366 | if (devpriv->pci_dev) { |
368 | if (devpriv->BADR0) { | 367 | if (devpriv->BADR0) |
369 | comedi_pci_disable(devpriv->pci_dev); | 368 | comedi_pci_disable(devpriv->pci_dev); |
370 | } | ||
371 | pci_dev_put(devpriv->pci_dev); | 369 | pci_dev_put(devpriv->pci_dev); |
372 | } | 370 | } |
373 | } | 371 | } |
diff --git a/drivers/staging/comedi/drivers/cb_pcimdda.c b/drivers/staging/comedi/drivers/cb_pcimdda.c index 980fa0aacf92..e32a31763d50 100644 --- a/drivers/staging/comedi/drivers/cb_pcimdda.c +++ b/drivers/staging/comedi/drivers/cb_pcimdda.c | |||
@@ -284,11 +284,10 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
284 | s->n_chan = thisboard->ao_chans; | 284 | s->n_chan = thisboard->ao_chans; |
285 | s->maxdata = figure_out_maxdata(thisboard->ao_bits); | 285 | s->maxdata = figure_out_maxdata(thisboard->ao_bits); |
286 | /* this is hard-coded here */ | 286 | /* this is hard-coded here */ |
287 | if (it->options[2]) { | 287 | if (it->options[2]) |
288 | s->range_table = &range_bipolar10; | 288 | s->range_table = &range_bipolar10; |
289 | } else { | 289 | else |
290 | s->range_table = &range_bipolar5; | 290 | s->range_table = &range_bipolar5; |
291 | } | ||
292 | s->insn_write = &ao_winsn; | 291 | s->insn_write = &ao_winsn; |
293 | s->insn_read = &ao_rinsn; | 292 | s->insn_read = &ao_rinsn; |
294 | 293 | ||
@@ -337,9 +336,8 @@ static int detach(struct comedi_device *dev) | |||
337 | } | 336 | } |
338 | 337 | ||
339 | if (devpriv->pci_dev) { | 338 | if (devpriv->pci_dev) { |
340 | if (devpriv->registers) { | 339 | if (devpriv->registers) |
341 | comedi_pci_disable(devpriv->pci_dev); | 340 | comedi_pci_disable(devpriv->pci_dev); |
342 | } | ||
343 | pci_dev_put(devpriv->pci_dev); | 341 | pci_dev_put(devpriv->pci_dev); |
344 | } | 342 | } |
345 | 343 | ||
diff --git a/drivers/staging/comedi/drivers/comedi_bond.c b/drivers/staging/comedi/drivers/comedi_bond.c index cf39a24ddd4c..d7260cc86985 100644 --- a/drivers/staging/comedi/drivers/comedi_bond.c +++ b/drivers/staging/comedi/drivers/comedi_bond.c | |||
@@ -417,7 +417,7 @@ static int doDevConfig(struct comedi_device *dev, struct comedi_devconfig *it) | |||
417 | int sdev = -1, nchans, tmp; | 417 | int sdev = -1, nchans, tmp; |
418 | struct BondedDevice *bdev = NULL; | 418 | struct BondedDevice *bdev = NULL; |
419 | 419 | ||
420 | if (minor < 0 || minor > COMEDI_NUM_BOARD_MINORS) { | 420 | if (minor < 0 || minor >= COMEDI_NUM_BOARD_MINORS) { |
421 | ERROR("Minor %d is invalid!\n", minor); | 421 | ERROR("Minor %d is invalid!\n", minor); |
422 | return 0; | 422 | return 0; |
423 | } | 423 | } |
diff --git a/drivers/staging/comedi/drivers/contec_pci_dio.c b/drivers/staging/comedi/drivers/contec_pci_dio.c index b16d652f7763..9511814e6413 100644 --- a/drivers/staging/comedi/drivers/contec_pci_dio.c +++ b/drivers/staging/comedi/drivers/contec_pci_dio.c | |||
@@ -173,9 +173,8 @@ static int contec_detach(struct comedi_device *dev) | |||
173 | printk("comedi%d: contec: remove\n", dev->minor); | 173 | printk("comedi%d: contec: remove\n", dev->minor); |
174 | 174 | ||
175 | if (devpriv && devpriv->pci_dev) { | 175 | if (devpriv && devpriv->pci_dev) { |
176 | if (dev->iobase) { | 176 | if (dev->iobase) |
177 | comedi_pci_disable(devpriv->pci_dev); | 177 | comedi_pci_disable(devpriv->pci_dev); |
178 | } | ||
179 | pci_dev_put(devpriv->pci_dev); | 178 | pci_dev_put(devpriv->pci_dev); |
180 | } | 179 | } |
181 | 180 | ||
diff --git a/drivers/staging/comedi/drivers/das08_cs.c b/drivers/staging/comedi/drivers/das08_cs.c index 9b945e5fdd32..f12ef1cd6f53 100644 --- a/drivers/staging/comedi/drivers/das08_cs.c +++ b/drivers/staging/comedi/drivers/das08_cs.c | |||
@@ -34,7 +34,7 @@ This is the PCMCIA-specific support split off from the | |||
34 | das08 driver. | 34 | das08 driver. |
35 | 35 | ||
36 | Options (for pcm-das08): | 36 | Options (for pcm-das08): |
37 | NONE | 37 | NONE |
38 | 38 | ||
39 | Command support does not exist, but could be added for this board. | 39 | Command support does not exist, but could be added for this board. |
40 | */ | 40 | */ |
@@ -52,7 +52,7 @@ Command support does not exist, but could be added for this board. | |||
52 | #include <pcmcia/cistpl.h> | 52 | #include <pcmcia/cistpl.h> |
53 | #include <pcmcia/ds.h> | 53 | #include <pcmcia/ds.h> |
54 | 54 | ||
55 | static struct pcmcia_device *cur_dev = NULL; | 55 | static struct pcmcia_device *cur_dev; |
56 | 56 | ||
57 | #define thisboard ((const struct das08_board_struct *)dev->board_ptr) | 57 | #define thisboard ((const struct das08_board_struct *)dev->board_ptr) |
58 | 58 | ||
diff --git a/drivers/staging/comedi/drivers/das6402.c b/drivers/staging/comedi/drivers/das6402.c index 92487f58fd8b..a404a1831911 100644 --- a/drivers/staging/comedi/drivers/das6402.c +++ b/drivers/staging/comedi/drivers/das6402.c | |||
@@ -45,7 +45,7 @@ This driver has suffered bitrot. | |||
45 | 45 | ||
46 | #define DAS6402_SIZE 16 | 46 | #define DAS6402_SIZE 16 |
47 | 47 | ||
48 | #define N_WORDS 3000*64 | 48 | #define N_WORDS (3000*64) |
49 | 49 | ||
50 | #define STOP 0 | 50 | #define STOP 0 |
51 | #define START 1 | 51 | #define START 1 |
diff --git a/drivers/staging/comedi/drivers/das800.c b/drivers/staging/comedi/drivers/das800.c index ecb97cdbce26..aadc4971c909 100644 --- a/drivers/staging/comedi/drivers/das800.c +++ b/drivers/staging/comedi/drivers/das800.c | |||
@@ -399,9 +399,8 @@ static irqreturn_t das800_interrupt(int irq, void *d) | |||
399 | } else { | 399 | } else { |
400 | fifo_empty = 0; /* cio-das802/16 has no fifo empty status bit */ | 400 | fifo_empty = 0; /* cio-das802/16 has no fifo empty status bit */ |
401 | } | 401 | } |
402 | if (fifo_empty) { | 402 | if (fifo_empty) |
403 | break; | 403 | break; |
404 | } | ||
405 | /* strip off extraneous bits for 12 bit cards */ | 404 | /* strip off extraneous bits for 12 bit cards */ |
406 | if (thisboard->resolution == 12) | 405 | if (thisboard->resolution == 12) |
407 | dataPoint = (dataPoint >> 4) & 0xfff; | 406 | dataPoint = (dataPoint >> 4) & 0xfff; |
@@ -457,9 +456,8 @@ static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
457 | int board; | 456 | int board; |
458 | 457 | ||
459 | printk("comedi%d: das800: io 0x%lx", dev->minor, iobase); | 458 | printk("comedi%d: das800: io 0x%lx", dev->minor, iobase); |
460 | if (irq) { | 459 | if (irq) |
461 | printk(", irq %u", irq); | 460 | printk(", irq %u", irq); |
462 | } | ||
463 | printk("\n"); | 461 | printk("\n"); |
464 | 462 | ||
465 | /* allocate and initialize dev->private */ | 463 | /* allocate and initialize dev->private */ |
diff --git a/drivers/staging/comedi/drivers/dmm32at.c b/drivers/staging/comedi/drivers/dmm32at.c index 9db9a467c8f8..d5cbd515c370 100644 --- a/drivers/staging/comedi/drivers/dmm32at.c +++ b/drivers/staging/comedi/drivers/dmm32at.c | |||
@@ -1048,11 +1048,10 @@ static int dmm32at_dio_insn_config(struct comedi_device *dev, | |||
1048 | * value COMEDI_INPUT or COMEDI_OUTPUT. */ | 1048 | * value COMEDI_INPUT or COMEDI_OUTPUT. */ |
1049 | 1049 | ||
1050 | /* if output clear the bit, otherwise set it */ | 1050 | /* if output clear the bit, otherwise set it */ |
1051 | if (data[0] == COMEDI_OUTPUT) { | 1051 | if (data[0] == COMEDI_OUTPUT) |
1052 | devpriv->dio_config &= ~chanbit; | 1052 | devpriv->dio_config &= ~chanbit; |
1053 | } else { | 1053 | else |
1054 | devpriv->dio_config |= chanbit; | 1054 | devpriv->dio_config |= chanbit; |
1055 | } | ||
1056 | /* get access to the DIO regs */ | 1055 | /* get access to the DIO regs */ |
1057 | dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC); | 1056 | dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC); |
1058 | /* set the DIO's to the new configuration setting */ | 1057 | /* set the DIO's to the new configuration setting */ |
diff --git a/drivers/staging/comedi/drivers/dt2801.c b/drivers/staging/comedi/drivers/dt2801.c index 7b9af5d755e0..3f365aee4822 100644 --- a/drivers/staging/comedi/drivers/dt2801.c +++ b/drivers/staging/comedi/drivers/dt2801.c | |||
@@ -18,10 +18,10 @@ Configuration options: | |||
18 | [1] - unused | 18 | [1] - unused |
19 | [2] - A/D reference 0=differential, 1=single-ended | 19 | [2] - A/D reference 0=differential, 1=single-ended |
20 | [3] - A/D range | 20 | [3] - A/D range |
21 | 0 = [-10,10] | 21 | 0 = [-10, 10] |
22 | 1 = [0,10] | 22 | 1 = [0,10] |
23 | [4] - D/A 0 range | 23 | [4] - D/A 0 range |
24 | 0 = [-10,10] | 24 | 0 = [-10, 10] |
25 | 1 = [-5,5] | 25 | 1 = [-5,5] |
26 | 2 = [-2.5,2.5] | 26 | 2 = [-2.5,2.5] |
27 | 3 = [0,10] | 27 | 3 = [0,10] |
@@ -279,9 +279,8 @@ static int dt2801_readdata(struct comedi_device *dev, int *data) | |||
279 | 279 | ||
280 | do { | 280 | do { |
281 | stat = inb_p(dev->iobase + DT2801_STATUS); | 281 | stat = inb_p(dev->iobase + DT2801_STATUS); |
282 | if (stat & (DT_S_COMPOSITE_ERROR | DT_S_READY)) { | 282 | if (stat & (DT_S_COMPOSITE_ERROR | DT_S_READY)) |
283 | return stat; | 283 | return stat; |
284 | } | ||
285 | if (stat & DT_S_DATA_OUT_READY) { | 284 | if (stat & DT_S_DATA_OUT_READY) { |
286 | *data = inb_p(dev->iobase + DT2801_DATA); | 285 | *data = inb_p(dev->iobase + DT2801_DATA); |
287 | return 0; | 286 | return 0; |
@@ -315,9 +314,8 @@ static int dt2801_writedata(struct comedi_device *dev, unsigned int data) | |||
315 | do { | 314 | do { |
316 | stat = inb_p(dev->iobase + DT2801_STATUS); | 315 | stat = inb_p(dev->iobase + DT2801_STATUS); |
317 | 316 | ||
318 | if (stat & DT_S_COMPOSITE_ERROR) { | 317 | if (stat & DT_S_COMPOSITE_ERROR) |
319 | return stat; | 318 | return stat; |
320 | } | ||
321 | if (!(stat & DT_S_DATA_IN_FULL)) { | 319 | if (!(stat & DT_S_DATA_IN_FULL)) { |
322 | outb_p(data & 0xff, dev->iobase + DT2801_DATA); | 320 | outb_p(data & 0xff, dev->iobase + DT2801_DATA); |
323 | return 0; | 321 | return 0; |
@@ -354,18 +352,15 @@ static int dt2801_wait_for_ready(struct comedi_device *dev) | |||
354 | int stat; | 352 | int stat; |
355 | 353 | ||
356 | stat = inb_p(dev->iobase + DT2801_STATUS); | 354 | stat = inb_p(dev->iobase + DT2801_STATUS); |
357 | if (stat & DT_S_READY) { | 355 | if (stat & DT_S_READY) |
358 | return 0; | 356 | return 0; |
359 | } | ||
360 | do { | 357 | do { |
361 | stat = inb_p(dev->iobase + DT2801_STATUS); | 358 | stat = inb_p(dev->iobase + DT2801_STATUS); |
362 | 359 | ||
363 | if (stat & DT_S_COMPOSITE_ERROR) { | 360 | if (stat & DT_S_COMPOSITE_ERROR) |
364 | return stat; | 361 | return stat; |
365 | } | 362 | if (stat & DT_S_READY) |
366 | if (stat & DT_S_READY) { | ||
367 | return 0; | 363 | return 0; |
368 | } | ||
369 | } while (--timeout > 0); | 364 | } while (--timeout > 0); |
370 | 365 | ||
371 | return -ETIME; | 366 | return -ETIME; |
@@ -382,9 +377,8 @@ static int dt2801_writecmd(struct comedi_device *dev, int command) | |||
382 | printk | 377 | printk |
383 | ("dt2801: composite-error in dt2801_writecmd(), ignoring\n"); | 378 | ("dt2801: composite-error in dt2801_writecmd(), ignoring\n"); |
384 | } | 379 | } |
385 | if (!(stat & DT_S_READY)) { | 380 | if (!(stat & DT_S_READY)) |
386 | printk("dt2801: !ready in dt2801_writecmd(), ignoring\n"); | 381 | printk("dt2801: !ready in dt2801_writecmd(), ignoring\n"); |
387 | } | ||
388 | outb_p(command, dev->iobase + DT2801_CMD); | 382 | outb_p(command, dev->iobase + DT2801_CMD); |
389 | 383 | ||
390 | return 0; | 384 | return 0; |
@@ -418,9 +412,8 @@ static int dt2801_reset(struct comedi_device *dev) | |||
418 | if (stat & DT_S_READY) | 412 | if (stat & DT_S_READY) |
419 | break; | 413 | break; |
420 | } while (timeout--); | 414 | } while (timeout--); |
421 | if (!timeout) { | 415 | if (!timeout) |
422 | printk("dt2801: timeout 1 status=0x%02x\n", stat); | 416 | printk("dt2801: timeout 1 status=0x%02x\n", stat); |
423 | } | ||
424 | 417 | ||
425 | /* printk("dt2801: reading dummy\n"); */ | 418 | /* printk("dt2801: reading dummy\n"); */ |
426 | /* dt2801_readdata(dev,&board_code); */ | 419 | /* dt2801_readdata(dev,&board_code); */ |
@@ -436,9 +429,8 @@ static int dt2801_reset(struct comedi_device *dev) | |||
436 | if (stat & DT_S_READY) | 429 | if (stat & DT_S_READY) |
437 | break; | 430 | break; |
438 | } while (timeout--); | 431 | } while (timeout--); |
439 | if (!timeout) { | 432 | if (!timeout) |
440 | printk("dt2801: timeout 2 status=0x%02x\n", stat); | 433 | printk("dt2801: timeout 2 status=0x%02x\n", stat); |
441 | } | ||
442 | 434 | ||
443 | DPRINTK("dt2801: reading code\n"); | 435 | DPRINTK("dt2801: reading code\n"); |
444 | dt2801_readdata(dev, &board_code); | 436 | dt2801_readdata(dev, &board_code); |
@@ -623,11 +615,10 @@ static int dt2801_detach(struct comedi_device *dev) | |||
623 | static int dt2801_error(struct comedi_device *dev, int stat) | 615 | static int dt2801_error(struct comedi_device *dev, int stat) |
624 | { | 616 | { |
625 | if (stat < 0) { | 617 | if (stat < 0) { |
626 | if (stat == -ETIME) { | 618 | if (stat == -ETIME) |
627 | printk("dt2801: timeout\n"); | 619 | printk("dt2801: timeout\n"); |
628 | } else { | 620 | else |
629 | printk("dt2801: error %d\n", stat); | 621 | printk("dt2801: error %d\n", stat); |
630 | } | ||
631 | return stat; | 622 | return stat; |
632 | } | 623 | } |
633 | printk("dt2801: error status 0x%02x, resetting...\n", stat); | 624 | printk("dt2801: error status 0x%02x, resetting...\n", stat); |
diff --git a/drivers/staging/comedi/drivers/dt2815.c b/drivers/staging/comedi/drivers/dt2815.c index d1db93c043a8..d1a4f7822433 100644 --- a/drivers/staging/comedi/drivers/dt2815.c +++ b/drivers/staging/comedi/drivers/dt2815.c | |||
@@ -34,19 +34,19 @@ Configuration options: | |||
34 | [0] - I/O port base base address | 34 | [0] - I/O port base base address |
35 | [1] - IRQ (unused) | 35 | [1] - IRQ (unused) |
36 | [2] - Voltage unipolar/bipolar configuration | 36 | [2] - Voltage unipolar/bipolar configuration |
37 | 0 == unipolar 5V (0V -- +5V) | 37 | 0 == unipolar 5V (0V -- +5V) |
38 | 1 == bipolar 5V (-5V -- +5V) | 38 | 1 == bipolar 5V (-5V -- +5V) |
39 | [3] - Current offset configuration | 39 | [3] - Current offset configuration |
40 | 0 == disabled (0mA -- +32mAV) | 40 | 0 == disabled (0mA -- +32mAV) |
41 | 1 == enabled (+4mA -- +20mAV) | 41 | 1 == enabled (+4mA -- +20mAV) |
42 | [4] - Firmware program configuration | 42 | [4] - Firmware program configuration |
43 | 0 == program 1 (see manual table 5-4) | 43 | 0 == program 1 (see manual table 5-4) |
44 | 1 == program 2 (see manual table 5-4) | 44 | 1 == program 2 (see manual table 5-4) |
45 | 2 == program 3 (see manual table 5-4) | 45 | 2 == program 3 (see manual table 5-4) |
46 | 3 == program 4 (see manual table 5-4) | 46 | 3 == program 4 (see manual table 5-4) |
47 | [5] - Analog output 0 range configuration | 47 | [5] - Analog output 0 range configuration |
48 | 0 == voltage | 48 | 0 == voltage |
49 | 1 == current | 49 | 1 == current |
50 | [6] - Analog output 1 range configuration (same options) | 50 | [6] - Analog output 1 range configuration (same options) |
51 | [7] - Analog output 2 range configuration (same options) | 51 | [7] - Analog output 2 range configuration (same options) |
52 | [8] - Analog output 3 range configuration (same options) | 52 | [8] - Analog output 3 range configuration (same options) |
@@ -61,17 +61,11 @@ Configuration options: | |||
61 | #include <linux/ioport.h> | 61 | #include <linux/ioport.h> |
62 | #include <linux/delay.h> | 62 | #include <linux/delay.h> |
63 | 63 | ||
64 | static const struct comedi_lrange range_dt2815_ao_32_current = { 1, { | 64 | static const struct comedi_lrange |
65 | RANGE_mA(0, | 65 | range_dt2815_ao_32_current = {1, {RANGE_mA(0, 32)} }; |
66 | 32) | ||
67 | } | ||
68 | }; | ||
69 | 66 | ||
70 | static const struct comedi_lrange range_dt2815_ao_20_current = { 1, { | 67 | static const struct comedi_lrange |
71 | RANGE_mA(4, | 68 | range_dt2815_ao_20_current = {1, {RANGE_mA(4, 20)} }; |
72 | 20) | ||
73 | } | ||
74 | }; | ||
75 | 69 | ||
76 | #define DT2815_SIZE 2 | 70 | #define DT2815_SIZE 2 |
77 | 71 | ||
@@ -118,9 +112,8 @@ static int dt2815_ao_insn_read(struct comedi_device *dev, | |||
118 | int i; | 112 | int i; |
119 | int chan = CR_CHAN(insn->chanspec); | 113 | int chan = CR_CHAN(insn->chanspec); |
120 | 114 | ||
121 | for (i = 0; i < insn->n; i++) { | 115 | for (i = 0; i < insn->n; i++) |
122 | data[i] = devpriv->ao_readback[chan]; | 116 | data[i] = devpriv->ao_readback[chan]; |
123 | } | ||
124 | 117 | ||
125 | return i; | 118 | return i; |
126 | } | 119 | } |
@@ -139,9 +132,8 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
139 | 132 | ||
140 | status = dt2815_wait_for_status(dev, 0x00); | 133 | status = dt2815_wait_for_status(dev, 0x00); |
141 | if (status != 0) { | 134 | if (status != 0) { |
142 | printk | 135 | printk(KERN_WARNING "dt2815: failed to write low byte " |
143 | ("dt2815: failed to write low byte on %d reason %x\n", | 136 | "on %d reason %x\n", chan, status); |
144 | chan, status); | ||
145 | return -EBUSY; | 137 | return -EBUSY; |
146 | } | 138 | } |
147 | 139 | ||
@@ -149,9 +141,8 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
149 | 141 | ||
150 | status = dt2815_wait_for_status(dev, 0x10); | 142 | status = dt2815_wait_for_status(dev, 0x10); |
151 | if (status != 0x10) { | 143 | if (status != 0x10) { |
152 | printk | 144 | printk(KERN_WARNING "dt2815: failed to write high byte " |
153 | ("dt2815: failed to write high byte on %d reason %x\n", | 145 | "on %d reason %x\n", chan, status); |
154 | chan, status); | ||
155 | return -EBUSY; | 146 | return -EBUSY; |
156 | } | 147 | } |
157 | devpriv->ao_readback[chan] = data[i]; | 148 | devpriv->ao_readback[chan] = data[i]; |
@@ -163,24 +154,24 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
163 | options[0] Board base address | 154 | options[0] Board base address |
164 | options[1] IRQ (not applicable) | 155 | options[1] IRQ (not applicable) |
165 | options[2] Voltage unipolar/bipolar configuration | 156 | options[2] Voltage unipolar/bipolar configuration |
166 | 0 == unipolar 5V (0V -- +5V) | 157 | 0 == unipolar 5V (0V -- +5V) |
167 | 1 == bipolar 5V (-5V -- +5V) | 158 | 1 == bipolar 5V (-5V -- +5V) |
168 | options[3] Current offset configuration | 159 | options[3] Current offset configuration |
169 | 0 == disabled (0mA -- +32mAV) | 160 | 0 == disabled (0mA -- +32mAV) |
170 | 1 == enabled (+4mA -- +20mAV) | 161 | 1 == enabled (+4mA -- +20mAV) |
171 | options[4] Firmware program configuration | 162 | options[4] Firmware program configuration |
172 | 0 == program 1 (see manual table 5-4) | 163 | 0 == program 1 (see manual table 5-4) |
173 | 1 == program 2 (see manual table 5-4) | 164 | 1 == program 2 (see manual table 5-4) |
174 | 2 == program 3 (see manual table 5-4) | 165 | 2 == program 3 (see manual table 5-4) |
175 | 3 == program 4 (see manual table 5-4) | 166 | 3 == program 4 (see manual table 5-4) |
176 | options[5] Analog output 0 range configuration | 167 | options[5] Analog output 0 range configuration |
177 | 0 == voltage | 168 | 0 == voltage |
178 | 1 == current | 169 | 1 == current |
179 | options[6] Analog output 1 range configuration | 170 | options[6] Analog output 1 range configuration |
180 | ... | 171 | ... |
181 | options[12] Analog output 7 range configuration | 172 | options[12] Analog output 7 range configuration |
182 | 0 == voltage | 173 | 0 == voltage |
183 | 1 == current | 174 | 1 == current |
184 | */ | 175 | */ |
185 | 176 | ||
186 | static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it) | 177 | static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it) |
@@ -191,9 +182,9 @@ static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
191 | unsigned long iobase; | 182 | unsigned long iobase; |
192 | 183 | ||
193 | iobase = it->options[0]; | 184 | iobase = it->options[0]; |
194 | printk("comedi%d: dt2815: 0x%04lx ", dev->minor, iobase); | 185 | printk(KERN_INFO "comedi%d: dt2815: 0x%04lx ", dev->minor, iobase); |
195 | if (!request_region(iobase, DT2815_SIZE, "dt2815")) { | 186 | if (!request_region(iobase, DT2815_SIZE, "dt2815")) { |
196 | printk("I/O port conflict\n"); | 187 | printk(KERN_WARNING "I/O port conflict\n"); |
197 | return -EIO; | 188 | return -EIO; |
198 | } | 189 | } |
199 | 190 | ||
@@ -236,19 +227,17 @@ static int dt2815_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
236 | unsigned int program; | 227 | unsigned int program; |
237 | program = (it->options[4] & 0x3) << 3 | 0x7; | 228 | program = (it->options[4] & 0x3) << 3 | 0x7; |
238 | outb(program, dev->iobase + DT2815_DATA); | 229 | outb(program, dev->iobase + DT2815_DATA); |
239 | printk(", program: 0x%x (@t=%d)\n", program, i); | 230 | printk(KERN_INFO ", program: 0x%x (@t=%d)\n", |
231 | program, i); | ||
240 | break; | 232 | break; |
241 | } else if (status != 0x00) { | 233 | } else if (status != 0x00) { |
242 | printk("dt2815: unexpected status 0x%x (@t=%d)\n", | 234 | printk(KERN_WARNING "dt2815: unexpected status 0x%x " |
243 | status, i); | 235 | "(@t=%d)\n", status, i); |
244 | if (status & 0x60) { | 236 | if (status & 0x60) |
245 | outb(0x00, dev->iobase + DT2815_STATUS); | 237 | outb(0x00, dev->iobase + DT2815_STATUS); |
246 | } | ||
247 | } | 238 | } |
248 | } | 239 | } |
249 | 240 | ||
250 | printk("\n"); | ||
251 | |||
252 | return 0; | 241 | return 0; |
253 | } | 242 | } |
254 | 243 | ||
@@ -260,7 +249,7 @@ static void dt2815_free_resources(struct comedi_device *dev) | |||
260 | 249 | ||
261 | static int dt2815_detach(struct comedi_device *dev) | 250 | static int dt2815_detach(struct comedi_device *dev) |
262 | { | 251 | { |
263 | printk("comedi%d: dt2815: remove\n", dev->minor); | 252 | printk(KERN_INFO "comedi%d: dt2815: remove\n", dev->minor); |
264 | 253 | ||
265 | dt2815_free_resources(dev); | 254 | dt2815_free_resources(dev); |
266 | 255 | ||
diff --git a/drivers/staging/comedi/drivers/dt9812.c b/drivers/staging/comedi/drivers/dt9812.c index 312f4f282bd7..96caae36279c 100644 --- a/drivers/staging/comedi/drivers/dt9812.c +++ b/drivers/staging/comedi/drivers/dt9812.c | |||
@@ -264,7 +264,7 @@ struct dt9812_usb_cmd { | |||
264 | 264 | ||
265 | static DECLARE_MUTEX(dt9812_mutex); | 265 | static DECLARE_MUTEX(dt9812_mutex); |
266 | 266 | ||
267 | static struct usb_device_id dt9812_table[] = { | 267 | static const struct usb_device_id dt9812_table[] = { |
268 | {USB_DEVICE(0x0867, 0x9812)}, | 268 | {USB_DEVICE(0x0867, 0x9812)}, |
269 | {} /* Terminating entry */ | 269 | {} /* Terminating entry */ |
270 | }; | 270 | }; |
diff --git a/drivers/staging/comedi/drivers/fl512.c b/drivers/staging/comedi/drivers/fl512.c index 8fca18043357..a10a2b070a24 100644 --- a/drivers/staging/comedi/drivers/fl512.c +++ b/drivers/staging/comedi/drivers/fl512.c | |||
@@ -76,14 +76,14 @@ static int fl512_ai_insn(struct comedi_device *dev, | |||
76 | unsigned long iobase = dev->iobase; | 76 | unsigned long iobase = dev->iobase; |
77 | 77 | ||
78 | for (n = 0; n < insn->n; n++) { /* sample n times on selected channel */ | 78 | for (n = 0; n < insn->n; n++) { /* sample n times on selected channel */ |
79 | /* XXX probably can move next step out of for() loop -- will make | 79 | /* XXX probably can move next step out of for() loop -- will |
80 | * AI a little bit faster. */ | 80 | * make AI a little bit faster. */ |
81 | outb(chan, iobase + 2); /* select chan */ | 81 | outb(chan, iobase + 2); /* select chan */ |
82 | outb(0, iobase + 3); /* start conversion */ | 82 | outb(0, iobase + 3); /* start conversion */ |
83 | /* XXX should test "done" flag instead of delay */ | 83 | /* XXX should test "done" flag instead of delay */ |
84 | udelay(30); /* sleep 30 usec */ | 84 | udelay(30); /* sleep 30 usec */ |
85 | lo_byte = inb(iobase + 2); /* low 8 byte */ | 85 | lo_byte = inb(iobase + 2); /* low 8 byte */ |
86 | hi_byte = inb(iobase + 3) & 0xf; /* high 4 bit and mask */ | 86 | hi_byte = inb(iobase + 3) & 0xf; /* high 4 bit and mask */ |
87 | data[n] = lo_byte + (hi_byte << 8); | 87 | data[n] = lo_byte + (hi_byte << 8); |
88 | } | 88 | } |
89 | return n; | 89 | return n; |
@@ -101,8 +101,10 @@ static int fl512_ao_insn(struct comedi_device *dev, | |||
101 | unsigned long iobase = dev->iobase; /* get base address */ | 101 | unsigned long iobase = dev->iobase; /* get base address */ |
102 | 102 | ||
103 | for (n = 0; n < insn->n; n++) { /* write n data set */ | 103 | for (n = 0; n < insn->n; n++) { /* write n data set */ |
104 | outb(data[n] & 0x0ff, iobase + 4 + 2 * chan); /* write low byte */ | 104 | /* write low byte */ |
105 | outb((data[n] & 0xf00) >> 8, iobase + 4 + 2 * chan); /* write high byte */ | 105 | outb(data[n] & 0x0ff, iobase + 4 + 2 * chan); |
106 | /* write high byte */ | ||
107 | outb((data[n] & 0xf00) >> 8, iobase + 4 + 2 * chan); | ||
106 | inb(iobase + 4 + 2 * chan); /* trig */ | 108 | inb(iobase + 4 + 2 * chan); /* trig */ |
107 | 109 | ||
108 | devpriv->ao_readback[chan] = data[n]; | 110 | devpriv->ao_readback[chan] = data[n]; |
@@ -121,9 +123,8 @@ static int fl512_ao_insn_readback(struct comedi_device *dev, | |||
121 | int n; | 123 | int n; |
122 | int chan = CR_CHAN(insn->chanspec); | 124 | int chan = CR_CHAN(insn->chanspec); |
123 | 125 | ||
124 | for (n = 0; n < insn->n; n++) { | 126 | for (n = 0; n < insn->n; n++) |
125 | data[n] = devpriv->ao_readback[chan]; | 127 | data[n] = devpriv->ao_readback[chan]; |
126 | } | ||
127 | 128 | ||
128 | return n; | 129 | return n; |
129 | } | 130 | } |
@@ -134,13 +135,15 @@ static int fl512_ao_insn_readback(struct comedi_device *dev, | |||
134 | static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it) | 135 | static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it) |
135 | { | 136 | { |
136 | unsigned long iobase; | 137 | unsigned long iobase; |
137 | struct comedi_subdevice *s; /* pointer to the subdevice: | 138 | |
138 | Analog in, Analog out, ( not made ->and Digital IO) */ | 139 | /* pointer to the subdevice: Analog in, Analog out, |
140 | (not made ->and Digital IO) */ | ||
141 | struct comedi_subdevice *s; | ||
139 | 142 | ||
140 | iobase = it->options[0]; | 143 | iobase = it->options[0]; |
141 | printk("comedi:%d fl512: 0x%04lx", dev->minor, iobase); | 144 | printk(KERN_INFO "comedi:%d fl512: 0x%04lx", dev->minor, iobase); |
142 | if (!request_region(iobase, FL512_SIZE, "fl512")) { | 145 | if (!request_region(iobase, FL512_SIZE, "fl512")) { |
143 | printk(" I/O port conflict\n"); | 146 | printk(KERN_WARNING " I/O port conflict\n"); |
144 | return -EIO; | 147 | return -EIO; |
145 | } | 148 | } |
146 | dev->iobase = iobase; | 149 | dev->iobase = iobase; |
@@ -149,7 +152,7 @@ static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
149 | return -ENOMEM; | 152 | return -ENOMEM; |
150 | 153 | ||
151 | #if DEBUG | 154 | #if DEBUG |
152 | printk("malloc ok\n"); | 155 | printk(KERN_DEBUG "malloc ok\n"); |
153 | #endif | 156 | #endif |
154 | 157 | ||
155 | if (alloc_subdevices(dev, 2) < 0) | 158 | if (alloc_subdevices(dev, 2) < 0) |
@@ -160,24 +163,37 @@ static int fl512_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
160 | */ | 163 | */ |
161 | /* Analog indput */ | 164 | /* Analog indput */ |
162 | s = dev->subdevices + 0; | 165 | s = dev->subdevices + 0; |
163 | s->type = COMEDI_SUBD_AI; /* define subdevice as Analog In */ | 166 | /* define subdevice as Analog In */ |
164 | s->subdev_flags = SDF_READABLE | SDF_GROUND; /* you can read it from userspace */ | 167 | s->type = COMEDI_SUBD_AI; |
165 | s->n_chan = 16; /* Number of Analog input channels */ | 168 | /* you can read it from userspace */ |
166 | s->maxdata = 0x0fff; /* accept only 12 bits of data */ | 169 | s->subdev_flags = SDF_READABLE | SDF_GROUND; |
167 | s->range_table = &range_fl512; /* device use one of the ranges */ | 170 | /* Number of Analog input channels */ |
168 | s->insn_read = fl512_ai_insn; /* function to call when read AD */ | 171 | s->n_chan = 16; |
169 | printk("comedi: fl512: subdevice 0 initialized\n"); | 172 | /* accept only 12 bits of data */ |
173 | s->maxdata = 0x0fff; | ||
174 | /* device use one of the ranges */ | ||
175 | s->range_table = &range_fl512; | ||
176 | /* function to call when read AD */ | ||
177 | s->insn_read = fl512_ai_insn; | ||
178 | printk(KERN_INFO "comedi: fl512: subdevice 0 initialized\n"); | ||
170 | 179 | ||
171 | /* Analog output */ | 180 | /* Analog output */ |
172 | s = dev->subdevices + 1; | 181 | s = dev->subdevices + 1; |
173 | s->type = COMEDI_SUBD_AO; /* define subdevice as Analog OUT */ | 182 | /* define subdevice as Analog OUT */ |
174 | s->subdev_flags = SDF_WRITABLE; /* you can write it from userspace */ | 183 | s->type = COMEDI_SUBD_AO; |
175 | s->n_chan = 2; /* Number of Analog output channels */ | 184 | /* you can write it from userspace */ |
176 | s->maxdata = 0x0fff; /* accept only 12 bits of data */ | 185 | s->subdev_flags = SDF_WRITABLE; |
177 | s->range_table = &range_fl512; /* device use one of the ranges */ | 186 | /* Number of Analog output channels */ |
178 | s->insn_write = fl512_ao_insn; /* function to call when write DA */ | 187 | s->n_chan = 2; |
179 | s->insn_read = fl512_ao_insn_readback; /* function to call when reading DA */ | 188 | /* accept only 12 bits of data */ |
180 | printk("comedi: fl512: subdevice 1 initialized\n"); | 189 | s->maxdata = 0x0fff; |
190 | /* device use one of the ranges */ | ||
191 | s->range_table = &range_fl512; | ||
192 | /* function to call when write DA */ | ||
193 | s->insn_write = fl512_ao_insn; | ||
194 | /* function to call when reading DA */ | ||
195 | s->insn_read = fl512_ao_insn_readback; | ||
196 | printk(KERN_INFO "comedi: fl512: subdevice 1 initialized\n"); | ||
181 | 197 | ||
182 | return 1; | 198 | return 1; |
183 | } | 199 | } |
@@ -186,6 +202,6 @@ static int fl512_detach(struct comedi_device *dev) | |||
186 | { | 202 | { |
187 | if (dev->iobase) | 203 | if (dev->iobase) |
188 | release_region(dev->iobase, FL512_SIZE); | 204 | release_region(dev->iobase, FL512_SIZE); |
189 | printk("comedi%d: fl512: dummy i detach\n", dev->minor); | 205 | printk(KERN_INFO "comedi%d: fl512: dummy i detach\n", dev->minor); |
190 | return 0; | 206 | return 0; |
191 | } | 207 | } |
diff --git a/drivers/staging/comedi/drivers/jr3_pci.c b/drivers/staging/comedi/drivers/jr3_pci.c index bd397840dcba..fe5b4953f7ec 100644 --- a/drivers/staging/comedi/drivers/jr3_pci.c +++ b/drivers/staging/comedi/drivers/jr3_pci.c | |||
@@ -954,6 +954,8 @@ out: | |||
954 | return result; | 954 | return result; |
955 | } | 955 | } |
956 | 956 | ||
957 | MODULE_FIRMWARE("comedi/jr3pci.idm"); | ||
958 | |||
957 | static int jr3_pci_detach(struct comedi_device *dev) | 959 | static int jr3_pci_detach(struct comedi_device *dev) |
958 | { | 960 | { |
959 | int i; | 961 | int i; |
diff --git a/drivers/staging/comedi/drivers/mpc624.c b/drivers/staging/comedi/drivers/mpc624.c index cb4da2ae8429..12e72c828157 100644 --- a/drivers/staging/comedi/drivers/mpc624.c +++ b/drivers/staging/comedi/drivers/mpc624.c | |||
@@ -284,7 +284,7 @@ static int mpc624_ai_rinsn(struct comedi_device *dev, | |||
284 | outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); | 284 | outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); |
285 | /* printk("Channel %d: \n", insn->chanspec); */ | 285 | /* printk("Channel %d: \n", insn->chanspec); */ |
286 | if (!insn->n) { | 286 | if (!insn->n) { |
287 | printk("MPC624: Warning, no data to aquire\n"); | 287 | printk("MPC624: Warning, no data to acquire\n"); |
288 | return 0; | 288 | return 0; |
289 | } | 289 | } |
290 | 290 | ||
diff --git a/drivers/staging/comedi/drivers/ni_65xx.c b/drivers/staging/comedi/drivers/ni_65xx.c index bbf75eb6d7f2..c223f76031f6 100644 --- a/drivers/staging/comedi/drivers/ni_65xx.c +++ b/drivers/staging/comedi/drivers/ni_65xx.c | |||
@@ -26,12 +26,13 @@ | |||
26 | /* | 26 | /* |
27 | Driver: ni_65xx | 27 | Driver: ni_65xx |
28 | Description: National Instruments 65xx static dio boards | 28 | Description: National Instruments 65xx static dio boards |
29 | Author: Jon Grierson <jd@renko.co.uk>, Frank Mori Hess <fmhess@users.sourceforge.net> | 29 | Author: Jon Grierson <jd@renko.co.uk>, |
30 | Frank Mori Hess <fmhess@users.sourceforge.net> | ||
30 | Status: testing | 31 | Status: testing |
31 | Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, PCI-6511, | 32 | Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, |
32 | PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, PXI-6514, PCI-6515, | 33 | PCI-6511, PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, |
33 | PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521, | 34 | PXI-6514, PCI-6515, PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, |
34 | PCI-6528, PXI-6528 | 35 | PCI-6520, PCI-6521, PXI-6521, PCI-6528, PXI-6528 |
35 | Updated: Wed Oct 18 08:59:11 EDT 2006 | 36 | Updated: Wed Oct 18 08:59:11 EDT 2006 |
36 | 37 | ||
37 | Based on the PCI-6527 driver by ds. | 38 | Based on the PCI-6527 driver by ds. |
@@ -418,9 +419,10 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev, | |||
418 | return -EINVAL; | 419 | return -EINVAL; |
419 | base_bitfield_channel = CR_CHAN(insn->chanspec); | 420 | base_bitfield_channel = CR_CHAN(insn->chanspec); |
420 | for (j = 0; j < max_ports_per_bitfield; ++j) { | 421 | for (j = 0; j < max_ports_per_bitfield; ++j) { |
421 | const unsigned port_offset = ni_65xx_port_by_channel(base_bitfield_channel) + j; | 422 | const unsigned port_offset = |
423 | ni_65xx_port_by_channel(base_bitfield_channel) + j; | ||
422 | const unsigned port = | 424 | const unsigned port = |
423 | sprivate(s)->base_port + port_offset; | 425 | sprivate(s)->base_port + port_offset; |
424 | unsigned base_port_channel; | 426 | unsigned base_port_channel; |
425 | unsigned port_mask, port_data, port_read_bits; | 427 | unsigned port_mask, port_data, port_read_bits; |
426 | int bitshift; | 428 | int bitshift; |
@@ -463,11 +465,11 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev, | |||
463 | * subdevice.) */ | 465 | * subdevice.) */ |
464 | port_read_bits ^= 0xFF; | 466 | port_read_bits ^= 0xFF; |
465 | } | 467 | } |
466 | if (bitshift > 0) { | 468 | if (bitshift > 0) |
467 | port_read_bits <<= bitshift; | 469 | port_read_bits <<= bitshift; |
468 | } else { | 470 | else |
469 | port_read_bits >>= -bitshift; | 471 | port_read_bits >>= -bitshift; |
470 | } | 472 | |
471 | read_bits |= port_read_bits; | 473 | read_bits |= port_read_bits; |
472 | } | 474 | } |
473 | data[1] = read_bits; | 475 | data[1] = read_bits; |
@@ -532,7 +534,8 @@ static int ni_65xx_intr_cmdtest(struct comedi_device *dev, | |||
532 | if (err) | 534 | if (err) |
533 | return 1; | 535 | return 1; |
534 | 536 | ||
535 | /* step 2: make sure trigger sources are unique and mutually compatible */ | 537 | /* step 2: make sure trigger sources are unique and mutually |
538 | compatible */ | ||
536 | 539 | ||
537 | if (err) | 540 | if (err) |
538 | return 2; | 541 | return 2; |
@@ -652,7 +655,7 @@ static int ni_65xx_attach(struct comedi_device *dev, | |||
652 | unsigned i; | 655 | unsigned i; |
653 | int ret; | 656 | int ret; |
654 | 657 | ||
655 | printk("comedi%d: ni_65xx:", dev->minor); | 658 | printk(KERN_INFO "comedi%d: ni_65xx:", dev->minor); |
656 | 659 | ||
657 | ret = alloc_private(dev, sizeof(struct ni_65xx_private)); | 660 | ret = alloc_private(dev, sizeof(struct ni_65xx_private)); |
658 | if (ret < 0) | 661 | if (ret < 0) |
@@ -664,15 +667,15 @@ static int ni_65xx_attach(struct comedi_device *dev, | |||
664 | 667 | ||
665 | ret = mite_setup(private(dev)->mite); | 668 | ret = mite_setup(private(dev)->mite); |
666 | if (ret < 0) { | 669 | if (ret < 0) { |
667 | printk("error setting up mite\n"); | 670 | printk(KERN_WARNING "error setting up mite\n"); |
668 | return ret; | 671 | return ret; |
669 | } | 672 | } |
670 | 673 | ||
671 | dev->board_name = board(dev)->name; | 674 | dev->board_name = board(dev)->name; |
672 | dev->irq = mite_irq(private(dev)->mite); | 675 | dev->irq = mite_irq(private(dev)->mite); |
673 | printk(" %s", dev->board_name); | 676 | printk(KERN_INFO " %s", dev->board_name); |
674 | 677 | ||
675 | printk(" ID=0x%02x", | 678 | printk(KERN_INFO " ID=0x%02x", |
676 | readb(private(dev)->mite->daq_io_addr + ID_Register)); | 679 | readb(private(dev)->mite->daq_io_addr + ID_Register)); |
677 | 680 | ||
678 | ret = alloc_subdevices(dev, 4); | 681 | ret = alloc_subdevices(dev, 4); |
@@ -773,7 +776,7 @@ static int ni_65xx_attach(struct comedi_device *dev, | |||
773 | "ni_65xx", dev); | 776 | "ni_65xx", dev); |
774 | if (ret < 0) { | 777 | if (ret < 0) { |
775 | dev->irq = 0; | 778 | dev->irq = 0; |
776 | printk(" irq not available"); | 779 | printk(KERN_WARNING " irq not available"); |
777 | } | 780 | } |
778 | 781 | ||
779 | printk("\n"); | 782 | printk("\n"); |
@@ -790,21 +793,17 @@ static int ni_65xx_detach(struct comedi_device *dev) | |||
790 | Master_Interrupt_Control); | 793 | Master_Interrupt_Control); |
791 | } | 794 | } |
792 | 795 | ||
793 | if (dev->irq) { | 796 | if (dev->irq) |
794 | free_irq(dev->irq, dev); | 797 | free_irq(dev->irq, dev); |
795 | } | ||
796 | 798 | ||
797 | if (private(dev)) { | 799 | if (private(dev)) { |
798 | unsigned i; | 800 | unsigned i; |
799 | for (i = 0; i < dev->n_subdevices; ++i) { | 801 | for (i = 0; i < dev->n_subdevices; ++i) { |
800 | if (dev->subdevices[i].private) { | 802 | kfree(dev->subdevices[i].private); |
801 | kfree(dev->subdevices[i].private); | 803 | dev->subdevices[i].private = NULL; |
802 | dev->subdevices[i].private = NULL; | ||
803 | } | ||
804 | } | 804 | } |
805 | if (private(dev)->mite) { | 805 | if (private(dev)->mite) |
806 | mite_unsetup(private(dev)->mite); | 806 | mite_unsetup(private(dev)->mite); |
807 | } | ||
808 | } | 807 | } |
809 | return 0; | 808 | return 0; |
810 | } | 809 | } |
@@ -830,7 +829,7 @@ static int ni_65xx_find_device(struct comedi_device *dev, int bus, int slot) | |||
830 | } | 829 | } |
831 | } | 830 | } |
832 | } | 831 | } |
833 | printk("no device found\n"); | 832 | printk(KERN_WARNING "no device found\n"); |
834 | mite_list_devices(); | 833 | mite_list_devices(); |
835 | return -EIO; | 834 | return -EIO; |
836 | } | 835 | } |
diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index 404d3c516ed1..017630fb2424 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c | |||
@@ -52,7 +52,8 @@ enum ni_660x_constants { | |||
52 | }; | 52 | }; |
53 | 53 | ||
54 | #define NUM_PFI_CHANNELS 40 | 54 | #define NUM_PFI_CHANNELS 40 |
55 | /* really there are only up to 3 dma channels, but the register layout allows for 4 */ | 55 | /* really there are only up to 3 dma channels, but the register layout allows |
56 | for 4 */ | ||
56 | #define MAX_DMA_CHANNEL 4 | 57 | #define MAX_DMA_CHANNEL 4 |
57 | 58 | ||
58 | /* See Register-Level Programmer Manual page 3.1 */ | 59 | /* See Register-Level Programmer Manual page 3.1 */ |
@@ -198,7 +199,7 @@ struct NI_660xRegisterData { | |||
198 | const char *name; /* Register Name */ | 199 | const char *name; /* Register Name */ |
199 | int offset; /* Offset from base address from GPCT chip */ | 200 | int offset; /* Offset from base address from GPCT chip */ |
200 | enum ni_660x_register_direction direction; | 201 | enum ni_660x_register_direction direction; |
201 | enum ni_660x_register_width size; /* 1 byte, 2 bytes, or 4 bytes */ | 202 | enum ni_660x_register_width size; /* 1 byte, 2 bytes, or 4 bytes */ |
202 | }; | 203 | }; |
203 | 204 | ||
204 | static const struct NI_660xRegisterData registerData[NumRegisters] = { | 205 | static const struct NI_660xRegisterData registerData[NumRegisters] = { |
@@ -382,8 +383,8 @@ enum global_interrupt_config_register_bits { | |||
382 | }; | 383 | }; |
383 | 384 | ||
384 | /* Offset of the GPCT chips from the base-adress of the card */ | 385 | /* Offset of the GPCT chips from the base-adress of the card */ |
385 | static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 }; /* First chip is at base-address + | 386 | /* First chip is at base-address + 0x00, etc. */ |
386 | 0x00, etc. */ | 387 | static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 }; |
387 | 388 | ||
388 | /* Board description*/ | 389 | /* Board description*/ |
389 | struct ni_660x_board { | 390 | struct ni_660x_board { |
@@ -691,13 +692,13 @@ static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg) | |||
691 | ni_660x_register = G0StatusRegister; | 692 | ni_660x_register = G0StatusRegister; |
692 | break; | 693 | break; |
693 | case NITIO_G1_Status_Reg: | 694 | case NITIO_G1_Status_Reg: |
694 | ni_660x_register = G0StatusRegister; | 695 | ni_660x_register = G1StatusRegister; |
695 | break; | 696 | break; |
696 | case NITIO_G2_Status_Reg: | 697 | case NITIO_G2_Status_Reg: |
697 | ni_660x_register = G0StatusRegister; | 698 | ni_660x_register = G2StatusRegister; |
698 | break; | 699 | break; |
699 | case NITIO_G3_Status_Reg: | 700 | case NITIO_G3_Status_Reg: |
700 | ni_660x_register = G0StatusRegister; | 701 | ni_660x_register = G3StatusRegister; |
701 | break; | 702 | break; |
702 | case NITIO_G0_Interrupt_Enable_Reg: | 703 | case NITIO_G0_Interrupt_Enable_Reg: |
703 | ni_660x_register = G0InterruptEnable; | 704 | ni_660x_register = G0InterruptEnable; |
@@ -712,7 +713,7 @@ static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg) | |||
712 | ni_660x_register = G3InterruptEnable; | 713 | ni_660x_register = G3InterruptEnable; |
713 | break; | 714 | break; |
714 | default: | 715 | default: |
715 | printk("%s: unhandled register 0x%x in switch.\n", | 716 | printk(KERN_WARNING "%s: unhandled register 0x%x in switch.\n", |
716 | __func__, reg); | 717 | __func__, reg); |
717 | BUG(); | 718 | BUG(); |
718 | return 0; | 719 | return 0; |
@@ -737,7 +738,7 @@ static inline void ni_660x_write_register(struct comedi_device *dev, | |||
737 | writel(bits, write_address); | 738 | writel(bits, write_address); |
738 | break; | 739 | break; |
739 | default: | 740 | default: |
740 | printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", | 741 | printk(KERN_WARNING "%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", |
741 | __FILE__, __func__, reg); | 742 | __FILE__, __func__, reg); |
742 | BUG(); | 743 | BUG(); |
743 | break; | 744 | break; |
@@ -760,7 +761,7 @@ static inline unsigned ni_660x_read_register(struct comedi_device *dev, | |||
760 | return readl(read_address); | 761 | return readl(read_address); |
761 | break; | 762 | break; |
762 | default: | 763 | default: |
763 | printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", | 764 | printk(KERN_WARNING "%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", |
764 | __FILE__, __func__, reg); | 765 | __FILE__, __func__, reg); |
765 | BUG(); | 766 | BUG(); |
766 | break; | 767 | break; |
@@ -993,9 +994,9 @@ static int ni_660x_allocate_private(struct comedi_device *dev) | |||
993 | spin_lock_init(&private(dev)->mite_channel_lock); | 994 | spin_lock_init(&private(dev)->mite_channel_lock); |
994 | spin_lock_init(&private(dev)->interrupt_lock); | 995 | spin_lock_init(&private(dev)->interrupt_lock); |
995 | spin_lock_init(&private(dev)->soft_reg_copy_lock); | 996 | spin_lock_init(&private(dev)->soft_reg_copy_lock); |
996 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) { | 997 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) |
997 | private(dev)->pfi_output_selects[i] = pfi_output_select_counter; | 998 | private(dev)->pfi_output_selects[i] = pfi_output_select_counter; |
998 | } | 999 | |
999 | return 0; | 1000 | return 0; |
1000 | } | 1001 | } |
1001 | 1002 | ||
@@ -1008,9 +1009,8 @@ static int ni_660x_alloc_mite_rings(struct comedi_device *dev) | |||
1008 | for (j = 0; j < counters_per_chip; ++j) { | 1009 | for (j = 0; j < counters_per_chip; ++j) { |
1009 | private(dev)->mite_rings[i][j] = | 1010 | private(dev)->mite_rings[i][j] = |
1010 | mite_alloc_ring(private(dev)->mite); | 1011 | mite_alloc_ring(private(dev)->mite); |
1011 | if (private(dev)->mite_rings[i][j] == NULL) { | 1012 | if (private(dev)->mite_rings[i][j] == NULL) |
1012 | return -ENOMEM; | 1013 | return -ENOMEM; |
1013 | } | ||
1014 | } | 1014 | } |
1015 | } | 1015 | } |
1016 | return 0; | 1016 | return 0; |
@@ -1022,9 +1022,8 @@ static void ni_660x_free_mite_rings(struct comedi_device *dev) | |||
1022 | unsigned j; | 1022 | unsigned j; |
1023 | 1023 | ||
1024 | for (i = 0; i < board(dev)->n_chips; ++i) { | 1024 | for (i = 0; i < board(dev)->n_chips; ++i) { |
1025 | for (j = 0; j < counters_per_chip; ++j) { | 1025 | for (j = 0; j < counters_per_chip; ++j) |
1026 | mite_free_ring(private(dev)->mite_rings[i][j]); | 1026 | mite_free_ring(private(dev)->mite_rings[i][j]); |
1027 | } | ||
1028 | } | 1027 | } |
1029 | } | 1028 | } |
1030 | 1029 | ||
@@ -1036,7 +1035,7 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1036 | unsigned i; | 1035 | unsigned i; |
1037 | unsigned global_interrupt_config_bits; | 1036 | unsigned global_interrupt_config_bits; |
1038 | 1037 | ||
1039 | printk("comedi%d: ni_660x: ", dev->minor); | 1038 | printk(KERN_INFO "comedi%d: ni_660x: ", dev->minor); |
1040 | 1039 | ||
1041 | ret = ni_660x_allocate_private(dev); | 1040 | ret = ni_660x_allocate_private(dev); |
1042 | if (ret < 0) | 1041 | if (ret < 0) |
@@ -1049,7 +1048,7 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1049 | 1048 | ||
1050 | ret = mite_setup2(private(dev)->mite, 1); | 1049 | ret = mite_setup2(private(dev)->mite, 1); |
1051 | if (ret < 0) { | 1050 | if (ret < 0) { |
1052 | printk("error setting up mite\n"); | 1051 | printk(KERN_WARNING "error setting up mite\n"); |
1053 | return ret; | 1052 | return ret; |
1054 | } | 1053 | } |
1055 | comedi_set_hw_dev(dev, &private(dev)->mite->pcidev->dev); | 1054 | comedi_set_hw_dev(dev, &private(dev)->mite->pcidev->dev); |
@@ -1057,7 +1056,7 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1057 | if (ret < 0) | 1056 | if (ret < 0) |
1058 | return ret; | 1057 | return ret; |
1059 | 1058 | ||
1060 | printk(" %s ", dev->board_name); | 1059 | printk(KERN_INFO " %s ", dev->board_name); |
1061 | 1060 | ||
1062 | dev->n_subdevices = 2 + NI_660X_MAX_NUM_COUNTERS; | 1061 | dev->n_subdevices = 2 + NI_660X_MAX_NUM_COUNTERS; |
1063 | 1062 | ||
@@ -1078,15 +1077,16 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1078 | s->insn_bits = ni_660x_dio_insn_bits; | 1077 | s->insn_bits = ni_660x_dio_insn_bits; |
1079 | s->insn_config = ni_660x_dio_insn_config; | 1078 | s->insn_config = ni_660x_dio_insn_config; |
1080 | s->io_bits = 0; /* all bits default to input */ | 1079 | s->io_bits = 0; /* all bits default to input */ |
1081 | /* we use the ioconfig registers to control dio direction, so zero output enables in stc dio control reg */ | 1080 | /* we use the ioconfig registers to control dio direction, so zero |
1081 | output enables in stc dio control reg */ | ||
1082 | ni_660x_write_register(dev, 0, 0, STCDIOControl); | 1082 | ni_660x_write_register(dev, 0, 0, STCDIOControl); |
1083 | 1083 | ||
1084 | private(dev)->counter_dev = ni_gpct_device_construct(dev, | 1084 | private(dev)->counter_dev = ni_gpct_device_construct(dev, |
1085 | &ni_gpct_write_register, | 1085 | &ni_gpct_write_register, |
1086 | &ni_gpct_read_register, | 1086 | &ni_gpct_read_register, |
1087 | ni_gpct_variant_660x, | 1087 | ni_gpct_variant_660x, |
1088 | ni_660x_num_counters | 1088 | ni_660x_num_counters |
1089 | (dev)); | 1089 | (dev)); |
1090 | if (private(dev)->counter_dev == NULL) | 1090 | if (private(dev)->counter_dev == NULL) |
1091 | return -ENOMEM; | 1091 | return -ENOMEM; |
1092 | for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) { | 1092 | for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) { |
@@ -1118,12 +1118,12 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1118 | s->type = COMEDI_SUBD_UNUSED; | 1118 | s->type = COMEDI_SUBD_UNUSED; |
1119 | } | 1119 | } |
1120 | } | 1120 | } |
1121 | for (i = 0; i < board(dev)->n_chips; ++i) { | 1121 | for (i = 0; i < board(dev)->n_chips; ++i) |
1122 | init_tio_chip(dev, i); | 1122 | init_tio_chip(dev, i); |
1123 | } | 1123 | |
1124 | for (i = 0; i < ni_660x_num_counters(dev); ++i) { | 1124 | for (i = 0; i < ni_660x_num_counters(dev); ++i) |
1125 | ni_tio_init_counter(&private(dev)->counter_dev->counters[i]); | 1125 | ni_tio_init_counter(&private(dev)->counter_dev->counters[i]); |
1126 | } | 1126 | |
1127 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) { | 1127 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) { |
1128 | if (i < min_counter_pfi_chan) | 1128 | if (i < min_counter_pfi_chan) |
1129 | ni_660x_set_pfi_routing(dev, i, pfi_output_select_do); | 1129 | ni_660x_set_pfi_routing(dev, i, pfi_output_select_do); |
@@ -1134,13 +1134,13 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1134 | } | 1134 | } |
1135 | /* to be safe, set counterswap bits on tio chips after all the counter | 1135 | /* to be safe, set counterswap bits on tio chips after all the counter |
1136 | outputs have been set to high impedance mode */ | 1136 | outputs have been set to high impedance mode */ |
1137 | for (i = 0; i < board(dev)->n_chips; ++i) { | 1137 | for (i = 0; i < board(dev)->n_chips; ++i) |
1138 | set_tio_counterswap(dev, i); | 1138 | set_tio_counterswap(dev, i); |
1139 | } | 1139 | |
1140 | ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt, | 1140 | ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt, |
1141 | IRQF_SHARED, "ni_660x", dev); | 1141 | IRQF_SHARED, "ni_660x", dev); |
1142 | if (ret < 0) { | 1142 | if (ret < 0) { |
1143 | printk(" irq not available\n"); | 1143 | printk(KERN_WARNING " irq not available\n"); |
1144 | return ret; | 1144 | return ret; |
1145 | } | 1145 | } |
1146 | dev->irq = mite_irq(private(dev)->mite); | 1146 | dev->irq = mite_irq(private(dev)->mite); |
@@ -1149,13 +1149,13 @@ static int ni_660x_attach(struct comedi_device *dev, | |||
1149 | global_interrupt_config_bits |= Cascade_Int_Enable_Bit; | 1149 | global_interrupt_config_bits |= Cascade_Int_Enable_Bit; |
1150 | ni_660x_write_register(dev, 0, global_interrupt_config_bits, | 1150 | ni_660x_write_register(dev, 0, global_interrupt_config_bits, |
1151 | GlobalInterruptConfigRegister); | 1151 | GlobalInterruptConfigRegister); |
1152 | printk("attached\n"); | 1152 | printk(KERN_INFO "attached\n"); |
1153 | return 0; | 1153 | return 0; |
1154 | } | 1154 | } |
1155 | 1155 | ||
1156 | static int ni_660x_detach(struct comedi_device *dev) | 1156 | static int ni_660x_detach(struct comedi_device *dev) |
1157 | { | 1157 | { |
1158 | printk("comedi%d: ni_660x: remove\n", dev->minor); | 1158 | printk(KERN_INFO "comedi%d: ni_660x: remove\n", dev->minor); |
1159 | 1159 | ||
1160 | /* Free irq */ | 1160 | /* Free irq */ |
1161 | if (dev->irq) | 1161 | if (dev->irq) |
@@ -1193,9 +1193,8 @@ static void init_tio_chip(struct comedi_device *dev, int chipset) | |||
1193 | private(dev)-> | 1193 | private(dev)-> |
1194 | dma_configuration_soft_copies[chipset], | 1194 | dma_configuration_soft_copies[chipset], |
1195 | DMAConfigRegister); | 1195 | DMAConfigRegister); |
1196 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) { | 1196 | for (i = 0; i < NUM_PFI_CHANNELS; ++i) |
1197 | ni_660x_write_register(dev, chipset, 0, IOConfigReg(i)); | 1197 | ni_660x_write_register(dev, chipset, 0, IOConfigReg(i)); |
1198 | } | ||
1199 | } | 1198 | } |
1200 | 1199 | ||
1201 | static int | 1200 | static int |
@@ -1234,7 +1233,7 @@ static int ni_660x_find_device(struct comedi_device *dev, int bus, int slot) | |||
1234 | } | 1233 | } |
1235 | } | 1234 | } |
1236 | } | 1235 | } |
1237 | printk("no device found\n"); | 1236 | printk(KERN_WARNING "no device found\n"); |
1238 | mite_list_devices(); | 1237 | mite_list_devices(); |
1239 | return -EIO; | 1238 | return -EIO; |
1240 | } | 1239 | } |
diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c index 9b43547e80a1..1e792d592f73 100644 --- a/drivers/staging/comedi/drivers/ni_670x.c +++ b/drivers/staging/comedi/drivers/ni_670x.c | |||
@@ -93,7 +93,7 @@ static DEFINE_PCI_DEVICE_TABLE(ni_670x_pci_table) = { | |||
93 | { | 93 | { |
94 | PCI_VENDOR_ID_NATINST, 0x2c90, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { | 94 | PCI_VENDOR_ID_NATINST, 0x2c90, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { |
95 | PCI_VENDOR_ID_NATINST, 0x1920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 95 | PCI_VENDOR_ID_NATINST, 0x1920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
96 | /* { PCI_VENDOR_ID_NATINST, 0x0000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, */ | 96 | /*{ PCI_VENDOR_ID_NATINST, 0x0000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },*/ |
97 | { | 97 | { |
98 | 0} | 98 | 0} |
99 | }; | 99 | }; |
@@ -151,7 +151,7 @@ static int ni_670x_attach(struct comedi_device *dev, | |||
151 | int ret; | 151 | int ret; |
152 | int i; | 152 | int i; |
153 | 153 | ||
154 | printk("comedi%d: ni_670x: ", dev->minor); | 154 | printk(KERN_INFO "comedi%d: ni_670x: ", dev->minor); |
155 | 155 | ||
156 | ret = alloc_private(dev, sizeof(struct ni_670x_private)); | 156 | ret = alloc_private(dev, sizeof(struct ni_670x_private)); |
157 | if (ret < 0) | 157 | if (ret < 0) |
@@ -163,12 +163,12 @@ static int ni_670x_attach(struct comedi_device *dev, | |||
163 | 163 | ||
164 | ret = mite_setup(devpriv->mite); | 164 | ret = mite_setup(devpriv->mite); |
165 | if (ret < 0) { | 165 | if (ret < 0) { |
166 | printk("error setting up mite\n"); | 166 | printk(KERN_WARNING "error setting up mite\n"); |
167 | return ret; | 167 | return ret; |
168 | } | 168 | } |
169 | dev->board_name = thisboard->name; | 169 | dev->board_name = thisboard->name; |
170 | dev->irq = mite_irq(devpriv->mite); | 170 | dev->irq = mite_irq(devpriv->mite); |
171 | printk(" %s", dev->board_name); | 171 | printk(KERN_INFO " %s", dev->board_name); |
172 | 172 | ||
173 | if (alloc_subdevices(dev, 2) < 0) | 173 | if (alloc_subdevices(dev, 2) < 0) |
174 | return -ENOMEM; | 174 | return -ENOMEM; |
@@ -207,21 +207,22 @@ static int ni_670x_attach(struct comedi_device *dev, | |||
207 | s->insn_bits = ni_670x_dio_insn_bits; | 207 | s->insn_bits = ni_670x_dio_insn_bits; |
208 | s->insn_config = ni_670x_dio_insn_config; | 208 | s->insn_config = ni_670x_dio_insn_config; |
209 | 209 | ||
210 | writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); /* Config of misc registers */ | 210 | /* Config of misc registers */ |
211 | writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); /* Config of ao registers */ | 211 | writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); |
212 | /* Config of ao registers */ | ||
213 | writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); | ||
212 | 214 | ||
213 | printk("attached\n"); | 215 | printk(KERN_INFO "attached\n"); |
214 | 216 | ||
215 | return 1; | 217 | return 1; |
216 | } | 218 | } |
217 | 219 | ||
218 | static int ni_670x_detach(struct comedi_device *dev) | 220 | static int ni_670x_detach(struct comedi_device *dev) |
219 | { | 221 | { |
220 | printk("comedi%d: ni_670x: remove\n", dev->minor); | 222 | printk(KERN_INFO "comedi%d: ni_670x: remove\n", dev->minor); |
223 | |||
224 | kfree(dev->subdevices[0].range_table_list); | ||
221 | 225 | ||
222 | if (dev->subdevices[0].range_table_list) { | ||
223 | kfree(dev->subdevices[0].range_table_list); | ||
224 | } | ||
225 | if (dev->private && devpriv->mite) | 226 | if (dev->private && devpriv->mite) |
226 | mite_unsetup(devpriv->mite); | 227 | mite_unsetup(devpriv->mite); |
227 | 228 | ||
@@ -250,8 +251,11 @@ static int ni_670x_ao_winsn(struct comedi_device *dev, | |||
250 | vch(15) : 30 | ich(31) : 31 */ | 251 | vch(15) : 30 | ich(31) : 31 */ |
251 | 252 | ||
252 | for (i = 0; i < insn->n; i++) { | 253 | for (i = 0; i < insn->n; i++) { |
253 | writel(((chan & 15) << 1) | ((chan & 16) >> 4), devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); /* First write in channel register which channel to use */ | 254 | /* First write in channel register which channel to use */ |
254 | writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); /* write channel value */ | 255 | writel(((chan & 15) << 1) | ((chan & 16) >> 4), |
256 | devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); | ||
257 | /* write channel value */ | ||
258 | writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); | ||
255 | devpriv->ao_readback[chan] = data[i]; | 259 | devpriv->ao_readback[chan] = data[i]; |
256 | } | 260 | } |
257 | 261 | ||
@@ -344,7 +348,7 @@ static int ni_670x_find_device(struct comedi_device *dev, int bus, int slot) | |||
344 | } | 348 | } |
345 | } | 349 | } |
346 | } | 350 | } |
347 | printk("no device found\n"); | 351 | printk(KERN_INFO "no device found\n"); |
348 | mite_list_devices(); | 352 | mite_list_devices(); |
349 | return -EIO; | 353 | return -EIO; |
350 | } | 354 | } |
diff --git a/drivers/staging/comedi/drivers/ni_atmio.c b/drivers/staging/comedi/drivers/ni_atmio.c index 8ead31164d5c..003d00b595b0 100644 --- a/drivers/staging/comedi/drivers/ni_atmio.c +++ b/drivers/staging/comedi/drivers/ni_atmio.c | |||
@@ -329,11 +329,11 @@ static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr) | |||
329 | } | 329 | } |
330 | 330 | ||
331 | static struct pnp_device_id device_ids[] = { | 331 | static struct pnp_device_id device_ids[] = { |
332 | {.id = "NIC1900",.driver_data = 0}, | 332 | {.id = "NIC1900", .driver_data = 0}, |
333 | {.id = "NIC2400",.driver_data = 0}, | 333 | {.id = "NIC2400", .driver_data = 0}, |
334 | {.id = "NIC2500",.driver_data = 0}, | 334 | {.id = "NIC2500", .driver_data = 0}, |
335 | {.id = "NIC2600",.driver_data = 0}, | 335 | {.id = "NIC2600", .driver_data = 0}, |
336 | {.id = "NIC2700",.driver_data = 0}, | 336 | {.id = "NIC2700", .driver_data = 0}, |
337 | {.id = ""} | 337 | {.id = ""} |
338 | }; | 338 | }; |
339 | 339 | ||
@@ -362,9 +362,9 @@ static int ni_atmio_detach(struct comedi_device *dev) | |||
362 | 362 | ||
363 | if (dev->iobase) | 363 | if (dev->iobase) |
364 | release_region(dev->iobase, NI_SIZE); | 364 | release_region(dev->iobase, NI_SIZE); |
365 | if (dev->irq) { | 365 | if (dev->irq) |
366 | free_irq(dev->irq, dev); | 366 | free_irq(dev->irq, dev); |
367 | } | 367 | |
368 | if (devpriv->isapnp_dev) | 368 | if (devpriv->isapnp_dev) |
369 | pnp_device_detach(devpriv->isapnp_dev); | 369 | pnp_device_detach(devpriv->isapnp_dev); |
370 | 370 | ||
@@ -387,8 +387,8 @@ static int ni_isapnp_find_board(struct pnp_dev **dev) | |||
387 | 387 | ||
388 | if (pnp_device_attach(isapnp_dev) < 0) { | 388 | if (pnp_device_attach(isapnp_dev) < 0) { |
389 | printk | 389 | printk |
390 | ("ni_atmio: %s found but already active, skipping.\n", | 390 | ("ni_atmio: %s found but already active, skipping.\n", |
391 | ni_boards[i].name); | 391 | ni_boards[i].name); |
392 | continue; | 392 | continue; |
393 | } | 393 | } |
394 | if (pnp_activate_dev(isapnp_dev) < 0) { | 394 | if (pnp_activate_dev(isapnp_dev) < 0) { |
@@ -496,9 +496,9 @@ static int ni_atmio_attach(struct comedi_device *dev, | |||
496 | /* generic E series stuff in ni_mio_common.c */ | 496 | /* generic E series stuff in ni_mio_common.c */ |
497 | 497 | ||
498 | ret = ni_E_init(dev, it); | 498 | ret = ni_E_init(dev, it); |
499 | if (ret < 0) { | 499 | if (ret < 0) |
500 | return ret; | 500 | return ret; |
501 | } | 501 | |
502 | 502 | ||
503 | return 0; | 503 | return 0; |
504 | } | 504 | } |
@@ -509,16 +509,16 @@ static int ni_getboardtype(struct comedi_device *dev) | |||
509 | int i; | 509 | int i; |
510 | 510 | ||
511 | for (i = 0; i < n_ni_boards; i++) { | 511 | for (i = 0; i < n_ni_boards; i++) { |
512 | if (ni_boards[i].device_id == device_id) { | 512 | if (ni_boards[i].device_id == device_id) |
513 | return i; | 513 | return i; |
514 | } | 514 | |
515 | } | 515 | } |
516 | if (device_id == 255) { | 516 | if (device_id == 255) |
517 | printk(" can't find board\n"); | 517 | printk(" can't find board\n"); |
518 | } else if (device_id == 0) { | 518 | else if (device_id == 0) |
519 | printk(" EEPROM read error (?) or device not found\n"); | 519 | printk(" EEPROM read error (?) or device not found\n"); |
520 | } else { | 520 | else |
521 | printk(" unknown device ID %d -- contact author\n", device_id); | 521 | printk(" unknown device ID %d -- contact author\n", device_id); |
522 | } | 522 | |
523 | return -1; | 523 | return -1; |
524 | } | 524 | } |
diff --git a/drivers/staging/comedi/drivers/ni_daq_700.c b/drivers/staging/comedi/drivers/ni_daq_700.c index ef5e1183d47d..c9b0395a6103 100644 --- a/drivers/staging/comedi/drivers/ni_daq_700.c +++ b/drivers/staging/comedi/drivers/ni_daq_700.c | |||
@@ -76,13 +76,15 @@ struct dio700_board { | |||
76 | static const struct dio700_board dio700_boards[] = { | 76 | static const struct dio700_board dio700_boards[] = { |
77 | { | 77 | { |
78 | .name = "daqcard-700", | 78 | .name = "daqcard-700", |
79 | .device_id = 0x4743, /* 0x10b is manufacturer id, 0x4743 is device id */ | 79 | /* 0x10b is manufacturer id, 0x4743 is device id */ |
80 | .device_id = 0x4743, | ||
80 | .bustype = pcmcia_bustype, | 81 | .bustype = pcmcia_bustype, |
81 | .have_dio = 1, | 82 | .have_dio = 1, |
82 | }, | 83 | }, |
83 | { | 84 | { |
84 | .name = "ni_daq_700", | 85 | .name = "ni_daq_700", |
85 | .device_id = 0x4743, /* 0x10b is manufacturer id, 0x4743 is device id */ | 86 | /* 0x10b is manufacturer id, 0x4743 is device id */ |
87 | .device_id = 0x4743, | ||
86 | .bustype = pcmcia_bustype, | 88 | .bustype = pcmcia_bustype, |
87 | .have_dio = 1, | 89 | .have_dio = 1, |
88 | }, | 90 | }, |
@@ -309,11 +311,11 @@ int subdev_700_init(struct comedi_device *dev, struct comedi_subdevice *s, | |||
309 | return -ENOMEM; | 311 | return -ENOMEM; |
310 | 312 | ||
311 | CALLBACK_ARG = arg; | 313 | CALLBACK_ARG = arg; |
312 | if (cb == NULL) { | 314 | if (cb == NULL) |
313 | CALLBACK_FUNC = subdev_700_cb; | 315 | CALLBACK_FUNC = subdev_700_cb; |
314 | } else { | 316 | else |
315 | CALLBACK_FUNC = cb; | 317 | CALLBACK_FUNC = cb; |
316 | } | 318 | |
317 | s->insn_bits = subdev_700_insn; | 319 | s->insn_bits = subdev_700_insn; |
318 | s->insn_config = subdev_700_insn_config; | 320 | s->insn_config = subdev_700_insn_config; |
319 | 321 | ||
@@ -345,12 +347,10 @@ int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s, | |||
345 | 347 | ||
346 | void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s) | 348 | void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s) |
347 | { | 349 | { |
348 | if (s->private) { | 350 | if (s->private) |
349 | if (subdevpriv->have_irq) { | 351 | if (subdevpriv->have_irq) |
350 | } | ||
351 | 352 | ||
352 | kfree(s->private); | 353 | kfree(s->private); |
353 | } | ||
354 | } | 354 | } |
355 | 355 | ||
356 | EXPORT_SYMBOL(subdev_700_init); | 356 | EXPORT_SYMBOL(subdev_700_init); |
@@ -390,9 +390,9 @@ static int dio700_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
390 | printk("comedi%d: ni_daq_700: %s, io 0x%lx", dev->minor, | 390 | printk("comedi%d: ni_daq_700: %s, io 0x%lx", dev->minor, |
391 | thisboard->name, iobase); | 391 | thisboard->name, iobase); |
392 | #ifdef incomplete | 392 | #ifdef incomplete |
393 | if (irq) { | 393 | if (irq) |
394 | printk(", irq %u", irq); | 394 | printk(", irq %u", irq); |
395 | } | 395 | |
396 | #endif | 396 | #endif |
397 | 397 | ||
398 | printk("\n"); | 398 | printk("\n"); |
diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c index dc3f398cb3ed..3c88caaa9dab 100644 --- a/drivers/staging/comedi/drivers/ni_labpc.c +++ b/drivers/staging/comedi/drivers/ni_labpc.c | |||
@@ -90,8 +90,10 @@ NI manuals: | |||
90 | 90 | ||
91 | #define DRV_NAME "ni_labpc" | 91 | #define DRV_NAME "ni_labpc" |
92 | 92 | ||
93 | #define LABPC_SIZE 32 /* size of io region used by board */ | 93 | /* size of io region used by board */ |
94 | #define LABPC_TIMER_BASE 500 /* 2 MHz master clock */ | 94 | #define LABPC_SIZE 32 |
95 | /* 2 MHz master clock */ | ||
96 | #define LABPC_TIMER_BASE 500 | ||
95 | 97 | ||
96 | /* Registers for the lab-pc+ */ | 98 | /* Registers for the lab-pc+ */ |
97 | 99 | ||
@@ -99,69 +101,110 @@ NI manuals: | |||
99 | #define COMMAND1_REG 0x0 | 101 | #define COMMAND1_REG 0x0 |
100 | #define ADC_GAIN_MASK (0x7 << 4) | 102 | #define ADC_GAIN_MASK (0x7 << 4) |
101 | #define ADC_CHAN_BITS(x) ((x) & 0x7) | 103 | #define ADC_CHAN_BITS(x) ((x) & 0x7) |
102 | #define ADC_SCAN_EN_BIT 0x80 /* enables multi channel scans */ | 104 | /* enables multi channel scans */ |
105 | #define ADC_SCAN_EN_BIT 0x80 | ||
103 | #define COMMAND2_REG 0x1 | 106 | #define COMMAND2_REG 0x1 |
104 | #define PRETRIG_BIT 0x1 /* enable pretriggering (used in conjunction with SWTRIG) */ | 107 | /* enable pretriggering (used in conjunction with SWTRIG) */ |
105 | #define HWTRIG_BIT 0x2 /* enable paced conversions on external trigger */ | 108 | #define PRETRIG_BIT 0x1 |
106 | #define SWTRIG_BIT 0x4 /* enable paced conversions */ | 109 | /* enable paced conversions on external trigger */ |
107 | #define CASCADE_BIT 0x8 /* use two cascaded counters for pacing */ | 110 | #define HWTRIG_BIT 0x2 |
111 | /* enable paced conversions */ | ||
112 | #define SWTRIG_BIT 0x4 | ||
113 | /* use two cascaded counters for pacing */ | ||
114 | #define CASCADE_BIT 0x8 | ||
108 | #define DAC_PACED_BIT(channel) (0x40 << ((channel) & 0x1)) | 115 | #define DAC_PACED_BIT(channel) (0x40 << ((channel) & 0x1)) |
109 | #define COMMAND3_REG 0x2 | 116 | #define COMMAND3_REG 0x2 |
110 | #define DMA_EN_BIT 0x1 /* enable dma transfers */ | 117 | /* enable dma transfers */ |
111 | #define DIO_INTR_EN_BIT 0x2 /* enable interrupts for 8255 */ | 118 | #define DMA_EN_BIT 0x1 |
112 | #define DMATC_INTR_EN_BIT 0x4 /* enable dma terminal count interrupt */ | 119 | /* enable interrupts for 8255 */ |
113 | #define TIMER_INTR_EN_BIT 0x8 /* enable timer interrupt */ | 120 | #define DIO_INTR_EN_BIT 0x2 |
114 | #define ERR_INTR_EN_BIT 0x10 /* enable error interrupt */ | 121 | /* enable dma terminal count interrupt */ |
115 | #define ADC_FNE_INTR_EN_BIT 0x20 /* enable fifo not empty interrupt */ | 122 | #define DMATC_INTR_EN_BIT 0x4 |
123 | /* enable timer interrupt */ | ||
124 | #define TIMER_INTR_EN_BIT 0x8 | ||
125 | /* enable error interrupt */ | ||
126 | #define ERR_INTR_EN_BIT 0x10 | ||
127 | /* enable fifo not empty interrupt */ | ||
128 | #define ADC_FNE_INTR_EN_BIT 0x20 | ||
116 | #define ADC_CONVERT_REG 0x3 | 129 | #define ADC_CONVERT_REG 0x3 |
117 | #define DAC_LSB_REG(channel) (0x4 + 2 * ((channel) & 0x1)) | 130 | #define DAC_LSB_REG(channel) (0x4 + 2 * ((channel) & 0x1)) |
118 | #define DAC_MSB_REG(channel) (0x5 + 2 * ((channel) & 0x1)) | 131 | #define DAC_MSB_REG(channel) (0x5 + 2 * ((channel) & 0x1)) |
119 | #define ADC_CLEAR_REG 0x8 | 132 | #define ADC_CLEAR_REG 0x8 |
120 | #define DMATC_CLEAR_REG 0xa | 133 | #define DMATC_CLEAR_REG 0xa |
121 | #define TIMER_CLEAR_REG 0xc | 134 | #define TIMER_CLEAR_REG 0xc |
122 | #define COMMAND6_REG 0xe /* 1200 boards only */ | 135 | /* 1200 boards only */ |
123 | #define ADC_COMMON_BIT 0x1 /* select ground or common-mode reference */ | 136 | #define COMMAND6_REG 0xe |
124 | #define ADC_UNIP_BIT 0x2 /* adc unipolar */ | 137 | /* select ground or common-mode reference */ |
125 | #define DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1)) /* dac unipolar */ | 138 | #define ADC_COMMON_BIT 0x1 |
126 | #define ADC_FHF_INTR_EN_BIT 0x20 /* enable fifo half full interrupt */ | 139 | /* adc unipolar */ |
127 | #define A1_INTR_EN_BIT 0x40 /* enable interrupt on end of hardware count */ | 140 | #define ADC_UNIP_BIT 0x2 |
128 | #define ADC_SCAN_UP_BIT 0x80 /* scan up from channel zero instead of down to zero */ | 141 | /* dac unipolar */ |
142 | #define DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1)) | ||
143 | /* enable fifo half full interrupt */ | ||
144 | #define ADC_FHF_INTR_EN_BIT 0x20 | ||
145 | /* enable interrupt on end of hardware count */ | ||
146 | #define A1_INTR_EN_BIT 0x40 | ||
147 | /* scan up from channel zero instead of down to zero */ | ||
148 | #define ADC_SCAN_UP_BIT 0x80 | ||
129 | #define COMMAND4_REG 0xf | 149 | #define COMMAND4_REG 0xf |
130 | #define INTERVAL_SCAN_EN_BIT 0x1 /* enables 'interval' scanning */ | 150 | /* enables 'interval' scanning */ |
131 | #define EXT_SCAN_EN_BIT 0x2 /* enables external signal on counter b1 output to trigger scan */ | 151 | #define INTERVAL_SCAN_EN_BIT 0x1 |
132 | #define EXT_CONVERT_OUT_BIT 0x4 /* chooses direction (output or input) for EXTCONV* line */ | 152 | /* enables external signal on counter b1 output to trigger scan */ |
133 | #define ADC_DIFF_BIT 0x8 /* chooses differential inputs for adc (in conjunction with board jumper) */ | 153 | #define EXT_SCAN_EN_BIT 0x2 |
154 | /* chooses direction (output or input) for EXTCONV* line */ | ||
155 | #define EXT_CONVERT_OUT_BIT 0x4 | ||
156 | /* chooses differential inputs for adc (in conjunction with board jumper) */ | ||
157 | #define ADC_DIFF_BIT 0x8 | ||
134 | #define EXT_CONVERT_DISABLE_BIT 0x10 | 158 | #define EXT_CONVERT_DISABLE_BIT 0x10 |
135 | #define COMMAND5_REG 0x1c /* 1200 boards only, calibration stuff */ | 159 | /* 1200 boards only, calibration stuff */ |
136 | #define EEPROM_WRITE_UNPROTECT_BIT 0x4 /* enable eeprom for write */ | 160 | #define COMMAND5_REG 0x1c |
137 | #define DITHER_EN_BIT 0x8 /* enable dithering */ | 161 | /* enable eeprom for write */ |
138 | #define CALDAC_LOAD_BIT 0x10 /* load calibration dac */ | 162 | #define EEPROM_WRITE_UNPROTECT_BIT 0x4 |
139 | #define SCLOCK_BIT 0x20 /* serial clock - rising edge writes, falling edge reads */ | 163 | /* enable dithering */ |
140 | #define SDATA_BIT 0x40 /* serial data bit for writing to eeprom or calibration dacs */ | 164 | #define DITHER_EN_BIT 0x8 |
141 | #define EEPROM_EN_BIT 0x80 /* enable eeprom for read/write */ | 165 | /* load calibration dac */ |
166 | #define CALDAC_LOAD_BIT 0x10 | ||
167 | /* serial clock - rising edge writes, falling edge reads */ | ||
168 | #define SCLOCK_BIT 0x20 | ||
169 | /* serial data bit for writing to eeprom or calibration dacs */ | ||
170 | #define SDATA_BIT 0x40 | ||
171 | /* enable eeprom for read/write */ | ||
172 | #define EEPROM_EN_BIT 0x80 | ||
142 | #define INTERVAL_COUNT_REG 0x1e | 173 | #define INTERVAL_COUNT_REG 0x1e |
143 | #define INTERVAL_LOAD_REG 0x1f | 174 | #define INTERVAL_LOAD_REG 0x1f |
144 | #define INTERVAL_LOAD_BITS 0x1 | 175 | #define INTERVAL_LOAD_BITS 0x1 |
145 | 176 | ||
146 | /* read-only registers */ | 177 | /* read-only registers */ |
147 | #define STATUS1_REG 0x0 | 178 | #define STATUS1_REG 0x0 |
148 | #define DATA_AVAIL_BIT 0x1 /* data is available in fifo */ | 179 | /* data is available in fifo */ |
149 | #define OVERRUN_BIT 0x2 /* overrun has occurred */ | 180 | #define DATA_AVAIL_BIT 0x1 |
150 | #define OVERFLOW_BIT 0x4 /* fifo overflow */ | 181 | /* overrun has occurred */ |
151 | #define TIMER_BIT 0x8 /* timer interrupt has occured */ | 182 | #define OVERRUN_BIT 0x2 |
152 | #define DMATC_BIT 0x10 /* dma terminal count has occured */ | 183 | /* fifo overflow */ |
153 | #define EXT_TRIG_BIT 0x40 /* external trigger has occured */ | 184 | #define OVERFLOW_BIT 0x4 |
154 | #define STATUS2_REG 0x1d /* 1200 boards only */ | 185 | /* timer interrupt has occured */ |
155 | #define EEPROM_OUT_BIT 0x1 /* programmable eeprom serial output */ | 186 | #define TIMER_BIT 0x8 |
156 | #define A1_TC_BIT 0x2 /* counter A1 terminal count */ | 187 | /* dma terminal count has occured */ |
157 | #define FNHF_BIT 0x4 /* fifo not half full */ | 188 | #define DMATC_BIT 0x10 |
189 | /* external trigger has occured */ | ||
190 | #define EXT_TRIG_BIT 0x40 | ||
191 | /* 1200 boards only */ | ||
192 | #define STATUS2_REG 0x1d | ||
193 | /* programmable eeprom serial output */ | ||
194 | #define EEPROM_OUT_BIT 0x1 | ||
195 | /* counter A1 terminal count */ | ||
196 | #define A1_TC_BIT 0x2 | ||
197 | /* fifo not half full */ | ||
198 | #define FNHF_BIT 0x4 | ||
158 | #define ADC_FIFO_REG 0xa | 199 | #define ADC_FIFO_REG 0xa |
159 | 200 | ||
160 | #define DIO_BASE_REG 0x10 | 201 | #define DIO_BASE_REG 0x10 |
161 | #define COUNTER_A_BASE_REG 0x14 | 202 | #define COUNTER_A_BASE_REG 0x14 |
162 | #define COUNTER_A_CONTROL_REG (COUNTER_A_BASE_REG + 0x3) | 203 | #define COUNTER_A_CONTROL_REG (COUNTER_A_BASE_REG + 0x3) |
163 | #define INIT_A0_BITS 0x14 /* check modes put conversion pacer output in harmless state (a0 mode 2) */ | 204 | /* check modes put conversion pacer output in harmless state (a0 mode 2) */ |
164 | #define INIT_A1_BITS 0x70 /* put hardware conversion counter output in harmless state (a1 mode 0) */ | 205 | #define INIT_A0_BITS 0x14 |
206 | /* put hardware conversion counter output in harmless state (a1 mode 0) */ | ||
207 | #define INIT_A1_BITS 0x70 | ||
165 | #define COUNTER_B_BASE_REG 0x18 | 208 | #define COUNTER_B_BASE_REG 0x18 |
166 | 209 | ||
167 | static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it); | 210 | static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it); |
@@ -423,7 +466,7 @@ static const struct labpc_board_struct labpc_boards[] = { | |||
423 | .ai_scan_up = 1, | 466 | .ai_scan_up = 1, |
424 | .memory_mapped_io = 1, | 467 | .memory_mapped_io = 1, |
425 | }, | 468 | }, |
426 | /* dummy entry so pci board works when comedi_config is passed driver name */ | 469 | /* dummy entry so pci board works when comedi_config is passed driver name */ |
427 | { | 470 | { |
428 | .name = DRV_NAME, | 471 | .name = DRV_NAME, |
429 | .bustype = pci_bustype, | 472 | .bustype = pci_bustype, |
@@ -436,8 +479,10 @@ static const struct labpc_board_struct labpc_boards[] = { | |||
436 | */ | 479 | */ |
437 | #define thisboard ((struct labpc_board_struct *)dev->board_ptr) | 480 | #define thisboard ((struct labpc_board_struct *)dev->board_ptr) |
438 | 481 | ||
439 | static const int dma_buffer_size = 0xff00; /* size in bytes of dma buffer */ | 482 | /* size in bytes of dma buffer */ |
440 | static const int sample_size = 2; /* 2 bytes per sample */ | 483 | static const int dma_buffer_size = 0xff00; |
484 | /* 2 bytes per sample */ | ||
485 | static const int sample_size = 2; | ||
441 | 486 | ||
442 | #define devpriv ((struct labpc_private *)dev->private) | 487 | #define devpriv ((struct labpc_private *)dev->private) |
443 | 488 | ||
@@ -483,12 +528,10 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
483 | 528 | ||
484 | printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name, | 529 | printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name, |
485 | iobase); | 530 | iobase); |
486 | if (irq) { | 531 | if (irq) |
487 | printk(", irq %u", irq); | 532 | printk(", irq %u", irq); |
488 | } | 533 | if (dma_chan) |
489 | if (dma_chan) { | ||
490 | printk(", dma %u", dma_chan); | 534 | printk(", dma %u", dma_chan); |
491 | } | ||
492 | printk("\n"); | 535 | printk("\n"); |
493 | 536 | ||
494 | if (iobase == 0) { | 537 | if (iobase == 0) { |
@@ -513,7 +556,7 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
513 | devpriv->read_byte = labpc_inb; | 556 | devpriv->read_byte = labpc_inb; |
514 | devpriv->write_byte = labpc_outb; | 557 | devpriv->write_byte = labpc_outb; |
515 | } | 558 | } |
516 | /* initialize board's command registers */ | 559 | /* initialize board's command registers */ |
517 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); | 560 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); |
518 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); | 561 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); |
519 | devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); | 562 | devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); |
@@ -538,12 +581,12 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
538 | } | 581 | } |
539 | dev->irq = irq; | 582 | dev->irq = irq; |
540 | 583 | ||
541 | /* grab dma channel */ | 584 | /* grab dma channel */ |
542 | if (dma_chan > 3) { | 585 | if (dma_chan > 3) { |
543 | printk(" invalid dma channel %u\n", dma_chan); | 586 | printk(" invalid dma channel %u\n", dma_chan); |
544 | return -EINVAL; | 587 | return -EINVAL; |
545 | } else if (dma_chan) { | 588 | } else if (dma_chan) { |
546 | /* allocate dma buffer */ | 589 | /* allocate dma buffer */ |
547 | devpriv->dma_buffer = | 590 | devpriv->dma_buffer = |
548 | kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA); | 591 | kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA); |
549 | if (devpriv->dma_buffer == NULL) { | 592 | if (devpriv->dma_buffer == NULL) { |
@@ -575,7 +618,7 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
575 | SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ; | 618 | SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ; |
576 | s->n_chan = 8; | 619 | s->n_chan = 8; |
577 | s->len_chanlist = 8; | 620 | s->len_chanlist = 8; |
578 | s->maxdata = (1 << 12) - 1; /* 12 bit resolution */ | 621 | s->maxdata = (1 << 12) - 1; /* 12 bit resolution */ |
579 | s->range_table = thisboard->ai_range_table; | 622 | s->range_table = thisboard->ai_range_table; |
580 | s->do_cmd = labpc_ai_cmd; | 623 | s->do_cmd = labpc_ai_cmd; |
581 | s->do_cmdtest = labpc_ai_cmdtest; | 624 | s->do_cmdtest = labpc_ai_cmdtest; |
@@ -585,8 +628,11 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
585 | /* analog output */ | 628 | /* analog output */ |
586 | s = dev->subdevices + 1; | 629 | s = dev->subdevices + 1; |
587 | if (thisboard->has_ao) { | 630 | if (thisboard->has_ao) { |
588 | /* Could provide command support, except it only has a one sample | 631 | /* |
589 | * hardware buffer for analog output and no underrun flag. */ | 632 | * Could provide command support, except it only has a |
633 | * one sample hardware buffer for analog output and no | ||
634 | * underrun flag. | ||
635 | */ | ||
590 | s->type = COMEDI_SUBD_AO; | 636 | s->type = COMEDI_SUBD_AO; |
591 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND; | 637 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND; |
592 | s->n_chan = NUM_AO_CHAN; | 638 | s->n_chan = NUM_AO_CHAN; |
@@ -608,7 +654,8 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
608 | 654 | ||
609 | /* 8255 dio */ | 655 | /* 8255 dio */ |
610 | s = dev->subdevices + 2; | 656 | s = dev->subdevices + 2; |
611 | /* if board uses io memory we have to give a custom callback function to the 8255 driver */ | 657 | /* if board uses io memory we have to give a custom callback |
658 | * function to the 8255 driver */ | ||
612 | if (thisboard->memory_mapped_io) | 659 | if (thisboard->memory_mapped_io) |
613 | subdev_8255_init(dev, s, labpc_dio_mem_callback, | 660 | subdev_8255_init(dev, s, labpc_dio_mem_callback, |
614 | (unsigned long)(dev->iobase + DIO_BASE_REG)); | 661 | (unsigned long)(dev->iobase + DIO_BASE_REG)); |
@@ -640,14 +687,12 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase, | |||
640 | s->insn_read = labpc_eeprom_read_insn; | 687 | s->insn_read = labpc_eeprom_read_insn; |
641 | s->insn_write = labpc_eeprom_write_insn; | 688 | s->insn_write = labpc_eeprom_write_insn; |
642 | 689 | ||
643 | for (i = 0; i < EEPROM_SIZE; i++) { | 690 | for (i = 0; i < EEPROM_SIZE; i++) |
644 | devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i); | 691 | devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i); |
645 | } | ||
646 | #ifdef LABPC_DEBUG | 692 | #ifdef LABPC_DEBUG |
647 | printk(" eeprom:"); | 693 | printk(" eeprom:"); |
648 | for (i = 0; i < EEPROM_SIZE; i++) { | 694 | for (i = 0; i < EEPROM_SIZE; i++) |
649 | printk(" %i:0x%x ", i, devpriv->eeprom_data[i]); | 695 | printk(" %i:0x%x ", i, devpriv->eeprom_data[i]); |
650 | } | ||
651 | printk("\n"); | 696 | printk("\n"); |
652 | #endif | 697 | #endif |
653 | } else | 698 | } else |
@@ -669,7 +714,7 @@ static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
669 | if (alloc_private(dev, sizeof(struct labpc_private)) < 0) | 714 | if (alloc_private(dev, sizeof(struct labpc_private)) < 0) |
670 | return -ENOMEM; | 715 | return -ENOMEM; |
671 | 716 | ||
672 | /* get base address, irq etc. based on bustype */ | 717 | /* get base address, irq etc. based on bustype */ |
673 | switch (thisboard->bustype) { | 718 | switch (thisboard->bustype) { |
674 | case isa_bustype: | 719 | case isa_bustype: |
675 | iobase = it->options[0]; | 720 | iobase = it->options[0]; |
@@ -679,9 +724,8 @@ static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
679 | case pci_bustype: | 724 | case pci_bustype: |
680 | #ifdef CONFIG_COMEDI_PCI | 725 | #ifdef CONFIG_COMEDI_PCI |
681 | retval = labpc_find_device(dev, it->options[0], it->options[1]); | 726 | retval = labpc_find_device(dev, it->options[0], it->options[1]); |
682 | if (retval < 0) { | 727 | if (retval < 0) |
683 | return retval; | 728 | return retval; |
684 | } | ||
685 | retval = mite_setup(devpriv->mite); | 729 | retval = mite_setup(devpriv->mite); |
686 | if (retval < 0) | 730 | if (retval < 0) |
687 | return retval; | 731 | return retval; |
@@ -715,7 +759,7 @@ static int labpc_find_device(struct comedi_device *dev, int bus, int slot) | |||
715 | for (mite = mite_devices; mite; mite = mite->next) { | 759 | for (mite = mite_devices; mite; mite = mite->next) { |
716 | if (mite->used) | 760 | if (mite->used) |
717 | continue; | 761 | continue; |
718 | /* if bus/slot are specified then make sure we have the right bus/slot */ | 762 | /* if bus/slot are specified then make sure we have the right bus/slot */ |
719 | if (bus || slot) { | 763 | if (bus || slot) { |
720 | if (bus != mite->pcidev->bus->number | 764 | if (bus != mite->pcidev->bus->number |
721 | || slot != PCI_SLOT(mite->pcidev->devfn)) | 765 | || slot != PCI_SLOT(mite->pcidev->devfn)) |
@@ -726,7 +770,7 @@ static int labpc_find_device(struct comedi_device *dev, int bus, int slot) | |||
726 | continue; | 770 | continue; |
727 | if (mite_device_id(mite) == labpc_boards[i].device_id) { | 771 | if (mite_device_id(mite) == labpc_boards[i].device_id) { |
728 | devpriv->mite = mite; | 772 | devpriv->mite = mite; |
729 | /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */ | 773 | /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */ |
730 | dev->board_ptr = &labpc_boards[i]; | 774 | dev->board_ptr = &labpc_boards[i]; |
731 | return 0; | 775 | return 0; |
732 | } | 776 | } |
@@ -994,7 +1038,7 @@ static int labpc_ai_cmdtest(struct comedi_device *dev, | |||
994 | cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE) | 1038 | cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE) |
995 | err++; | 1039 | err++; |
996 | 1040 | ||
997 | /* can't have external stop and start triggers at once */ | 1041 | /* can't have external stop and start triggers at once */ |
998 | if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT) | 1042 | if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT) |
999 | err++; | 1043 | err++; |
1000 | 1044 | ||
@@ -1008,9 +1052,9 @@ static int labpc_ai_cmdtest(struct comedi_device *dev, | |||
1008 | err++; | 1052 | err++; |
1009 | } | 1053 | } |
1010 | 1054 | ||
1011 | if (!cmd->chanlist_len) { | 1055 | if (!cmd->chanlist_len) |
1012 | err++; | 1056 | err++; |
1013 | } | 1057 | |
1014 | if (cmd->scan_end_arg != cmd->chanlist_len) { | 1058 | if (cmd->scan_end_arg != cmd->chanlist_len) { |
1015 | cmd->scan_end_arg = cmd->chanlist_len; | 1059 | cmd->scan_end_arg = cmd->chanlist_len; |
1016 | err++; | 1060 | err++; |
@@ -1022,7 +1066,7 @@ static int labpc_ai_cmdtest(struct comedi_device *dev, | |||
1022 | err++; | 1066 | err++; |
1023 | } | 1067 | } |
1024 | } | 1068 | } |
1025 | /* make sure scan timing is not too fast */ | 1069 | /* make sure scan timing is not too fast */ |
1026 | if (cmd->scan_begin_src == TRIG_TIMER) { | 1070 | if (cmd->scan_begin_src == TRIG_TIMER) { |
1027 | if (cmd->convert_src == TRIG_TIMER && | 1071 | if (cmd->convert_src == TRIG_TIMER && |
1028 | cmd->scan_begin_arg < | 1072 | cmd->scan_begin_arg < |
@@ -1038,7 +1082,7 @@ static int labpc_ai_cmdtest(struct comedi_device *dev, | |||
1038 | err++; | 1082 | err++; |
1039 | } | 1083 | } |
1040 | } | 1084 | } |
1041 | /* stop source */ | 1085 | /* stop source */ |
1042 | switch (cmd->stop_src) { | 1086 | switch (cmd->stop_src) { |
1043 | case TRIG_COUNT: | 1087 | case TRIG_COUNT: |
1044 | if (!cmd->stop_arg) { | 1088 | if (!cmd->stop_arg) { |
@@ -1095,7 +1139,7 @@ static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
1095 | range = CR_RANGE(cmd->chanlist[0]); | 1139 | range = CR_RANGE(cmd->chanlist[0]); |
1096 | aref = CR_AREF(cmd->chanlist[0]); | 1140 | aref = CR_AREF(cmd->chanlist[0]); |
1097 | 1141 | ||
1098 | /* make sure board is disabled before setting up aquisition */ | 1142 | /* make sure board is disabled before setting up aquisition */ |
1099 | spin_lock_irqsave(&dev->spinlock, flags); | 1143 | spin_lock_irqsave(&dev->spinlock, flags); |
1100 | devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT; | 1144 | devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT; |
1101 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); | 1145 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); |
@@ -1105,9 +1149,9 @@ static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
1105 | devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); | 1149 | devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); |
1106 | 1150 | ||
1107 | /* initialize software conversion count */ | 1151 | /* initialize software conversion count */ |
1108 | if (cmd->stop_src == TRIG_COUNT) { | 1152 | if (cmd->stop_src == TRIG_COUNT) |
1109 | devpriv->count = cmd->stop_arg * cmd->chanlist_len; | 1153 | devpriv->count = cmd->stop_arg * cmd->chanlist_len; |
1110 | } | 1154 | |
1111 | /* setup hardware conversion counter */ | 1155 | /* setup hardware conversion counter */ |
1112 | if (cmd->stop_src == TRIG_EXT) { | 1156 | if (cmd->stop_src == TRIG_EXT) { |
1113 | /* load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */ | 1157 | /* load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0 */ |
@@ -1176,17 +1220,18 @@ static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
1176 | channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]); | 1220 | channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]); |
1177 | else | 1221 | else |
1178 | channel = CR_CHAN(cmd->chanlist[0]); | 1222 | channel = CR_CHAN(cmd->chanlist[0]); |
1179 | /* munge channel bits for differential / scan disabled mode */ | 1223 | /* munge channel bits for differential / scan disabled mode */ |
1180 | if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF) | 1224 | if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF) |
1181 | channel *= 2; | 1225 | channel *= 2; |
1182 | devpriv->command1_bits |= ADC_CHAN_BITS(channel); | 1226 | devpriv->command1_bits |= ADC_CHAN_BITS(channel); |
1183 | devpriv->command1_bits |= thisboard->ai_range_code[range]; | 1227 | devpriv->command1_bits |= thisboard->ai_range_code[range]; |
1184 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); | 1228 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); |
1185 | /* manual says to set scan enable bit on second pass */ | 1229 | /* manual says to set scan enable bit on second pass */ |
1186 | if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP || | 1230 | if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP || |
1187 | labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) { | 1231 | labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) { |
1188 | devpriv->command1_bits |= ADC_SCAN_EN_BIT; | 1232 | devpriv->command1_bits |= ADC_SCAN_EN_BIT; |
1189 | /* need a brief delay before enabling scan, or scan list will get screwed when you switch | 1233 | /* need a brief delay before enabling scan, or scan |
1234 | * list will get screwed when you switch | ||
1190 | * between scan up to scan down mode - dunno why */ | 1235 | * between scan up to scan down mode - dunno why */ |
1191 | udelay(1); | 1236 | udelay(1); |
1192 | devpriv->write_byte(devpriv->command1_bits, | 1237 | devpriv->write_byte(devpriv->command1_bits, |
@@ -1338,7 +1383,7 @@ static irqreturn_t labpc_interrupt(int irq, void *d) | |||
1338 | cmd = &async->cmd; | 1383 | cmd = &async->cmd; |
1339 | async->events = 0; | 1384 | async->events = 0; |
1340 | 1385 | ||
1341 | /* read board status */ | 1386 | /* read board status */ |
1342 | devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG); | 1387 | devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG); |
1343 | if (thisboard->register_layout == labpc_1200_layout) | 1388 | if (thisboard->register_layout == labpc_1200_layout) |
1344 | devpriv->status2_bits = | 1389 | devpriv->status2_bits = |
@@ -1352,7 +1397,7 @@ static irqreturn_t labpc_interrupt(int irq, void *d) | |||
1352 | } | 1397 | } |
1353 | 1398 | ||
1354 | if (devpriv->status1_bits & OVERRUN_BIT) { | 1399 | if (devpriv->status1_bits & OVERRUN_BIT) { |
1355 | /* clear error interrupt */ | 1400 | /* clear error interrupt */ |
1356 | devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG); | 1401 | devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG); |
1357 | async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; | 1402 | async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; |
1358 | comedi_event(dev, s); | 1403 | comedi_event(dev, s); |
@@ -1361,7 +1406,10 @@ static irqreturn_t labpc_interrupt(int irq, void *d) | |||
1361 | } | 1406 | } |
1362 | 1407 | ||
1363 | if (devpriv->current_transfer == isa_dma_transfer) { | 1408 | if (devpriv->current_transfer == isa_dma_transfer) { |
1364 | /* if a dma terminal count of external stop trigger has occurred */ | 1409 | /* |
1410 | * if a dma terminal count of external stop trigger | ||
1411 | * has occurred | ||
1412 | */ | ||
1365 | if (devpriv->status1_bits & DMATC_BIT || | 1413 | if (devpriv->status1_bits & DMATC_BIT || |
1366 | (thisboard->register_layout == labpc_1200_layout | 1414 | (thisboard->register_layout == labpc_1200_layout |
1367 | && devpriv->status2_bits & A1_TC_BIT)) { | 1415 | && devpriv->status2_bits & A1_TC_BIT)) { |
@@ -1479,9 +1527,9 @@ static void labpc_drain_dma(struct comedi_device *dev) | |||
1479 | } | 1527 | } |
1480 | 1528 | ||
1481 | /* write data to comedi buffer */ | 1529 | /* write data to comedi buffer */ |
1482 | for (i = 0; i < num_points; i++) { | 1530 | for (i = 0; i < num_points; i++) |
1483 | cfc_write_to_buffer(s, devpriv->dma_buffer[i]); | 1531 | cfc_write_to_buffer(s, devpriv->dma_buffer[i]); |
1484 | } | 1532 | |
1485 | if (async->cmd.stop_src == TRIG_COUNT) | 1533 | if (async->cmd.stop_src == TRIG_COUNT) |
1486 | devpriv->count -= num_points; | 1534 | devpriv->count -= num_points; |
1487 | 1535 | ||
@@ -1503,7 +1551,7 @@ static void handle_isa_dma(struct comedi_device *dev) | |||
1503 | devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG); | 1551 | devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG); |
1504 | } | 1552 | } |
1505 | 1553 | ||
1506 | /* makes sure all data aquired by board is transfered to comedi (used | 1554 | /* makes sure all data acquired by board is transfered to comedi (used |
1507 | * when aquisition is terminated by stop_src == TRIG_EXT). */ | 1555 | * when aquisition is terminated by stop_src == TRIG_EXT). */ |
1508 | static void labpc_drain_dregs(struct comedi_device *dev) | 1556 | static void labpc_drain_dregs(struct comedi_device *dev) |
1509 | { | 1557 | { |
@@ -1537,41 +1585,41 @@ static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
1537 | chan = CR_CHAN(insn->chanspec); | 1585 | chan = CR_CHAN(insn->chanspec); |
1538 | range = CR_RANGE(insn->chanspec); | 1586 | range = CR_RANGE(insn->chanspec); |
1539 | devpriv->command1_bits |= thisboard->ai_range_code[range]; | 1587 | devpriv->command1_bits |= thisboard->ai_range_code[range]; |
1540 | /* munge channel bits for differential/scan disabled mode */ | 1588 | /* munge channel bits for differential/scan disabled mode */ |
1541 | if (CR_AREF(insn->chanspec) == AREF_DIFF) | 1589 | if (CR_AREF(insn->chanspec) == AREF_DIFF) |
1542 | chan *= 2; | 1590 | chan *= 2; |
1543 | devpriv->command1_bits |= ADC_CHAN_BITS(chan); | 1591 | devpriv->command1_bits |= ADC_CHAN_BITS(chan); |
1544 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); | 1592 | devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG); |
1545 | 1593 | ||
1546 | /* setup command6 register for 1200 boards */ | 1594 | /* setup command6 register for 1200 boards */ |
1547 | if (thisboard->register_layout == labpc_1200_layout) { | 1595 | if (thisboard->register_layout == labpc_1200_layout) { |
1548 | /* reference inputs to ground or common? */ | 1596 | /* reference inputs to ground or common? */ |
1549 | if (CR_AREF(insn->chanspec) != AREF_GROUND) | 1597 | if (CR_AREF(insn->chanspec) != AREF_GROUND) |
1550 | devpriv->command6_bits |= ADC_COMMON_BIT; | 1598 | devpriv->command6_bits |= ADC_COMMON_BIT; |
1551 | else | 1599 | else |
1552 | devpriv->command6_bits &= ~ADC_COMMON_BIT; | 1600 | devpriv->command6_bits &= ~ADC_COMMON_BIT; |
1553 | /* bipolar or unipolar range? */ | 1601 | /* bipolar or unipolar range? */ |
1554 | if (thisboard->ai_range_is_unipolar[range]) | 1602 | if (thisboard->ai_range_is_unipolar[range]) |
1555 | devpriv->command6_bits |= ADC_UNIP_BIT; | 1603 | devpriv->command6_bits |= ADC_UNIP_BIT; |
1556 | else | 1604 | else |
1557 | devpriv->command6_bits &= ~ADC_UNIP_BIT; | 1605 | devpriv->command6_bits &= ~ADC_UNIP_BIT; |
1558 | /* don't interrupt on fifo half full */ | 1606 | /* don't interrupt on fifo half full */ |
1559 | devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT; | 1607 | devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT; |
1560 | /* don't enable interrupt on counter a1 terminal count? */ | 1608 | /* don't enable interrupt on counter a1 terminal count? */ |
1561 | devpriv->command6_bits &= ~A1_INTR_EN_BIT; | 1609 | devpriv->command6_bits &= ~A1_INTR_EN_BIT; |
1562 | /* write to register */ | 1610 | /* write to register */ |
1563 | devpriv->write_byte(devpriv->command6_bits, | 1611 | devpriv->write_byte(devpriv->command6_bits, |
1564 | dev->iobase + COMMAND6_REG); | 1612 | dev->iobase + COMMAND6_REG); |
1565 | } | 1613 | } |
1566 | /* setup command4 register */ | 1614 | /* setup command4 register */ |
1567 | devpriv->command4_bits = 0; | 1615 | devpriv->command4_bits = 0; |
1568 | devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT; | 1616 | devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT; |
1569 | /* single-ended/differential */ | 1617 | /* single-ended/differential */ |
1570 | if (CR_AREF(insn->chanspec) == AREF_DIFF) | 1618 | if (CR_AREF(insn->chanspec) == AREF_DIFF) |
1571 | devpriv->command4_bits |= ADC_DIFF_BIT; | 1619 | devpriv->command4_bits |= ADC_DIFF_BIT; |
1572 | devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG); | 1620 | devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG); |
1573 | 1621 | ||
1574 | /* initialize pacer counter output to make sure it doesn't cause any problems */ | 1622 | /* initialize pacer counter output to make sure it doesn't cause any problems */ |
1575 | devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG); | 1623 | devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG); |
1576 | 1624 | ||
1577 | labpc_clear_adc_fifo(dev); | 1625 | labpc_clear_adc_fifo(dev); |
@@ -1608,7 +1656,7 @@ static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
1608 | 1656 | ||
1609 | channel = CR_CHAN(insn->chanspec); | 1657 | channel = CR_CHAN(insn->chanspec); |
1610 | 1658 | ||
1611 | /* turn off pacing of analog output channel */ | 1659 | /* turn off pacing of analog output channel */ |
1612 | /* note: hardware bug in daqcard-1200 means pacing cannot | 1660 | /* note: hardware bug in daqcard-1200 means pacing cannot |
1613 | * be independently enabled/disabled for its the two channels */ | 1661 | * be independently enabled/disabled for its the two channels */ |
1614 | spin_lock_irqsave(&dev->spinlock, flags); | 1662 | spin_lock_irqsave(&dev->spinlock, flags); |
@@ -1616,7 +1664,7 @@ static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
1616 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); | 1664 | devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); |
1617 | spin_unlock_irqrestore(&dev->spinlock, flags); | 1665 | spin_unlock_irqrestore(&dev->spinlock, flags); |
1618 | 1666 | ||
1619 | /* set range */ | 1667 | /* set range */ |
1620 | if (thisboard->register_layout == labpc_1200_layout) { | 1668 | if (thisboard->register_layout == labpc_1200_layout) { |
1621 | range = CR_RANGE(insn->chanspec); | 1669 | range = CR_RANGE(insn->chanspec); |
1622 | if (range & AO_RANGE_IS_UNIPOLAR) | 1670 | if (range & AO_RANGE_IS_UNIPOLAR) |
@@ -1627,13 +1675,13 @@ static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
1627 | devpriv->write_byte(devpriv->command6_bits, | 1675 | devpriv->write_byte(devpriv->command6_bits, |
1628 | dev->iobase + COMMAND6_REG); | 1676 | dev->iobase + COMMAND6_REG); |
1629 | } | 1677 | } |
1630 | /* send data */ | 1678 | /* send data */ |
1631 | lsb = data[0] & 0xff; | 1679 | lsb = data[0] & 0xff; |
1632 | msb = (data[0] >> 8) & 0xff; | 1680 | msb = (data[0] >> 8) & 0xff; |
1633 | devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel)); | 1681 | devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel)); |
1634 | devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel)); | 1682 | devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel)); |
1635 | 1683 | ||
1636 | /* remember value for readback */ | 1684 | /* remember value for readback */ |
1637 | devpriv->ao_value[channel] = data[0]; | 1685 | devpriv->ao_value[channel] = data[0]; |
1638 | 1686 | ||
1639 | return 1; | 1687 | return 1; |
@@ -1705,14 +1753,14 @@ static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd) | |||
1705 | 1753 | ||
1706 | if (cmd.convert_src == TRIG_TIMER) | 1754 | if (cmd.convert_src == TRIG_TIMER) |
1707 | freq = 1000000000 / cmd.convert_arg; | 1755 | freq = 1000000000 / cmd.convert_arg; |
1708 | /* return some default value */ | 1756 | /* return some default value */ |
1709 | else | 1757 | else |
1710 | freq = 0xffffffff; | 1758 | freq = 0xffffffff; |
1711 | 1759 | ||
1712 | /* make buffer fill in no more than 1/3 second */ | 1760 | /* make buffer fill in no more than 1/3 second */ |
1713 | size = (freq / 3) * sample_size; | 1761 | size = (freq / 3) * sample_size; |
1714 | 1762 | ||
1715 | /* set a minimum and maximum size allowed */ | 1763 | /* set a minimum and maximum size allowed */ |
1716 | if (size > dma_buffer_size) | 1764 | if (size > dma_buffer_size) |
1717 | size = dma_buffer_size - dma_buffer_size % sample_size; | 1765 | size = dma_buffer_size - dma_buffer_size % sample_size; |
1718 | else if (size < sample_size) | 1766 | else if (size < sample_size) |
@@ -1724,13 +1772,21 @@ static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd) | |||
1724 | /* figures out what counter values to use based on command */ | 1772 | /* figures out what counter values to use based on command */ |
1725 | static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd) | 1773 | static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd) |
1726 | { | 1774 | { |
1727 | const int max_counter_value = 0x10000; /* max value for 16 bit counter in mode 2 */ | 1775 | /* max value for 16 bit counter in mode 2 */ |
1728 | const int min_counter_value = 2; /* min value for 16 bit counter in mode 2 */ | 1776 | const int max_counter_value = 0x10000; |
1777 | /* min value for 16 bit counter in mode 2 */ | ||
1778 | const int min_counter_value = 2; | ||
1729 | unsigned int base_period; | 1779 | unsigned int base_period; |
1730 | 1780 | ||
1731 | /* if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0 */ | 1781 | /* |
1782 | * if both convert and scan triggers are TRIG_TIMER, then they | ||
1783 | * both rely on counter b0 | ||
1784 | */ | ||
1732 | if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) { | 1785 | if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) { |
1733 | /* pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters) */ | 1786 | /* |
1787 | * pick the lowest b0 divisor value we can (for maximum input | ||
1788 | * clock speed on convert and scan counters) | ||
1789 | */ | ||
1734 | devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) / | 1790 | devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) / |
1735 | (LABPC_TIMER_BASE * max_counter_value) + 1; | 1791 | (LABPC_TIMER_BASE * max_counter_value) + 1; |
1736 | if (devpriv->divisor_b0 < min_counter_value) | 1792 | if (devpriv->divisor_b0 < min_counter_value) |
@@ -1780,7 +1836,10 @@ static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd) | |||
1780 | base_period * devpriv->divisor_a0); | 1836 | base_period * devpriv->divisor_a0); |
1781 | labpc_set_ai_scan_period(cmd, | 1837 | labpc_set_ai_scan_period(cmd, |
1782 | base_period * devpriv->divisor_b1); | 1838 | base_period * devpriv->divisor_b1); |
1783 | /* if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions */ | 1839 | /* |
1840 | * if only one TRIG_TIMER is used, we can employ the generic | ||
1841 | * cascaded timing functions | ||
1842 | */ | ||
1784 | } else if (labpc_ai_scan_period(cmd)) { | 1843 | } else if (labpc_ai_scan_period(cmd)) { |
1785 | unsigned int scan_period; | 1844 | unsigned int scan_period; |
1786 | 1845 | ||
@@ -1864,9 +1923,8 @@ static unsigned int labpc_serial_in(struct comedi_device *dev) | |||
1864 | udelay(1); | 1923 | udelay(1); |
1865 | devpriv->status2_bits = | 1924 | devpriv->status2_bits = |
1866 | devpriv->read_byte(dev->iobase + STATUS2_REG); | 1925 | devpriv->read_byte(dev->iobase + STATUS2_REG); |
1867 | if (devpriv->status2_bits & EEPROM_OUT_BIT) { | 1926 | if (devpriv->status2_bits & EEPROM_OUT_BIT) |
1868 | value |= 1 << (value_width - i); | 1927 | value |= 1 << (value_width - i); |
1869 | } | ||
1870 | } | 1928 | } |
1871 | 1929 | ||
1872 | return value; | 1930 | return value; |
@@ -1876,8 +1934,10 @@ static unsigned int labpc_eeprom_read(struct comedi_device *dev, | |||
1876 | unsigned int address) | 1934 | unsigned int address) |
1877 | { | 1935 | { |
1878 | unsigned int value; | 1936 | unsigned int value; |
1879 | const int read_instruction = 0x3; /* bits to tell eeprom to expect a read */ | 1937 | /* bits to tell eeprom to expect a read */ |
1880 | const int write_length = 8; /* 8 bit write lengths to eeprom */ | 1938 | const int read_instruction = 0x3; |
1939 | /* 8 bit write lengths to eeprom */ | ||
1940 | const int write_length = 8; | ||
1881 | 1941 | ||
1882 | /* enable read/write to eeprom */ | 1942 | /* enable read/write to eeprom */ |
1883 | devpriv->command5_bits &= ~EEPROM_EN_BIT; | 1943 | devpriv->command5_bits &= ~EEPROM_EN_BIT; |
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index d6d49c3bbf1c..bd16f913af23 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c | |||
@@ -3795,7 +3795,7 @@ static int ni_cdo_inttrig(struct comedi_device *dev, struct comedi_subdevice *s, | |||
3795 | #endif | 3795 | #endif |
3796 | int retval = 0; | 3796 | int retval = 0; |
3797 | unsigned i; | 3797 | unsigned i; |
3798 | const unsigned timeout = 100; | 3798 | const unsigned timeout = 1000; |
3799 | 3799 | ||
3800 | s->async->inttrig = NULL; | 3800 | s->async->inttrig = NULL; |
3801 | 3801 | ||
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index 2d88a5be65ff..9d337516409d 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | comedi/drivers/ni_pcidio.c | 2 | comedi/drivers/ni_pcidio.c |
3 | driver for National Instruments PCI-DIO-96/PCI-6508 | 3 | driver for National Instruments PCI-DIO-96/PCI-6508 |
4 | National Instruments PCI-DIO-32HS | 4 | National Instruments PCI-DIO-32HS |
5 | National Instruments PCI-6503 | 5 | National Instruments PCI-6503 |
6 | 6 | ||
7 | COMEDI - Linux Control and Measurement Device Interface | 7 | COMEDI - Linux Control and Measurement Device Interface |
8 | Copyright (C) 1999,2002 David A. Schleef <ds@schleef.org> | 8 | Copyright (C) 1999,2002 David A. Schleef <ds@schleef.org> |
@@ -518,7 +518,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d) | |||
518 | ni_pcidio_print_status(status); | 518 | ni_pcidio_print_status(status); |
519 | 519 | ||
520 | /* printk("buf[0]=%08x\n",*(unsigned int *)async->prealloc_buf); */ | 520 | /* printk("buf[0]=%08x\n",*(unsigned int *)async->prealloc_buf); */ |
521 | /* printk("buf[4096]=%08x\n",*(unsigned int *)(async->prealloc_buf+4096)); */ | 521 | /* printk("buf[4096]=%08x\n", |
522 | *(unsigned int *)(async->prealloc_buf+4096)); */ | ||
522 | 523 | ||
523 | spin_lock_irqsave(&devpriv->mite_channel_lock, irq_flags); | 524 | spin_lock_irqsave(&devpriv->mite_channel_lock, irq_flags); |
524 | if (devpriv->di_mite_chan) | 525 | if (devpriv->di_mite_chan) |
@@ -526,7 +527,9 @@ static irqreturn_t nidio_interrupt(int irq, void *d) | |||
526 | #ifdef MITE_DEBUG | 527 | #ifdef MITE_DEBUG |
527 | mite_print_chsr(m_status); | 528 | mite_print_chsr(m_status); |
528 | #endif | 529 | #endif |
529 | /* printk("mite_bytes_transferred: %d\n",mite_bytes_transferred(mite,DI_DMA_CHAN)); */ | 530 | /* printk("mite_bytes_transferred: %d\n", |
531 | mite_bytes_transferred(mite,DI_DMA_CHAN)); */ | ||
532 | |||
530 | /* mite_dump_regs(mite); */ | 533 | /* mite_dump_regs(mite); */ |
531 | if (m_status & CHSR_INT) { | 534 | if (m_status & CHSR_INT) { |
532 | if (m_status & CHSR_LINKC) { | 535 | if (m_status & CHSR_LINKC) { |
@@ -565,7 +568,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d) | |||
565 | DPRINTK("too much work in interrupt\n"); | 568 | DPRINTK("too much work in interrupt\n"); |
566 | writeb(0x00, | 569 | writeb(0x00, |
567 | devpriv->mite->daq_io_addr + | 570 | devpriv->mite->daq_io_addr + |
568 | Master_DMA_And_Interrupt_Control); | 571 | Master_DMA_And_Interrupt_Control |
572 | ); | ||
569 | goto out; | 573 | goto out; |
570 | } | 574 | } |
571 | AuxData = | 575 | AuxData = |
@@ -579,8 +583,10 @@ static irqreturn_t nidio_interrupt(int irq, void *d) | |||
579 | flags = readb(devpriv->mite->daq_io_addr + | 583 | flags = readb(devpriv->mite->daq_io_addr + |
580 | Group_1_Flags); | 584 | Group_1_Flags); |
581 | } | 585 | } |
582 | /* DPRINTK("buf_int_count: %d\n",async->buf_int_count); */ | 586 | /* DPRINTK("buf_int_count: %d\n", |
583 | /* DPRINTK("1) IntEn=%d,flags=%d,status=%d\n",IntEn,flags,status); */ | 587 | async->buf_int_count); */ |
588 | /* DPRINTK("1) IntEn=%d,flags=%d,status=%d\n", | ||
589 | IntEn,flags,status); */ | ||
584 | /* ni_pcidio_print_flags(flags); */ | 590 | /* ni_pcidio_print_flags(flags); */ |
585 | /* ni_pcidio_print_status(status); */ | 591 | /* ni_pcidio_print_status(status); */ |
586 | async->events |= COMEDI_CB_BLOCK; | 592 | async->events |= COMEDI_CB_BLOCK; |
@@ -627,8 +633,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d) | |||
627 | flags = readb(devpriv->mite->daq_io_addr + Group_1_Flags); | 633 | flags = readb(devpriv->mite->daq_io_addr + Group_1_Flags); |
628 | status = readb(devpriv->mite->daq_io_addr + | 634 | status = readb(devpriv->mite->daq_io_addr + |
629 | Interrupt_And_Window_Status); | 635 | Interrupt_And_Window_Status); |
630 | /* DPRINTK("loop end: IntEn=0x%02x,flags=0x%02x,status=0x%02x\n", */ | 636 | /* DPRINTK("loop end: IntEn=0x%02x,flags=0x%02x," |
631 | /* IntEn,flags,status); */ | 637 | "status=0x%02x\n", IntEn, flags, status); */ |
632 | /* ni_pcidio_print_flags(flags); */ | 638 | /* ni_pcidio_print_flags(flags); */ |
633 | /* ni_pcidio_print_status(status); */ | 639 | /* ni_pcidio_print_status(status); */ |
634 | } | 640 | } |
@@ -655,11 +661,10 @@ static void ni_pcidio_print_flags(unsigned int flags) | |||
655 | { | 661 | { |
656 | int i; | 662 | int i; |
657 | 663 | ||
658 | printk("group_1_flags:"); | 664 | printk(KERN_INFO "group_1_flags:"); |
659 | for (i = 7; i >= 0; i--) { | 665 | for (i = 7; i >= 0; i--) { |
660 | if (flags & (1 << i)) { | 666 | if (flags & (1 << i)) |
661 | printk(" %s", flags_strings[i]); | 667 | printk(" %s", flags_strings[i]); |
662 | } | ||
663 | } | 668 | } |
664 | printk("\n"); | 669 | printk("\n"); |
665 | } | 670 | } |
@@ -673,11 +678,10 @@ static void ni_pcidio_print_status(unsigned int flags) | |||
673 | { | 678 | { |
674 | int i; | 679 | int i; |
675 | 680 | ||
676 | printk("group_status:"); | 681 | printk(KERN_INFO "group_status:"); |
677 | for (i = 7; i >= 0; i--) { | 682 | for (i = 7; i >= 0; i--) { |
678 | if (flags & (1 << i)) { | 683 | if (flags & (1 << i)) |
679 | printk(" %s", status_strings[i]); | 684 | printk(" %s", status_strings[i]); |
680 | } | ||
681 | } | 685 | } |
682 | printk("\n"); | 686 | printk("\n"); |
683 | } | 687 | } |
@@ -793,7 +797,8 @@ static int ni_pcidio_cmdtest(struct comedi_device *dev, | |||
793 | if (err) | 797 | if (err) |
794 | return 1; | 798 | return 1; |
795 | 799 | ||
796 | /* step 2: make sure trigger sources are unique and mutually compatible */ | 800 | /* step 2: make sure trigger sources are unique and mutually |
801 | compatible */ | ||
797 | 802 | ||
798 | /* note that mutual compatibility is not an issue here */ | 803 | /* note that mutual compatibility is not an issue here */ |
799 | if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_INT) | 804 | if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_INT) |
@@ -974,7 +979,8 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
974 | 979 | ||
975 | /* clear and enable interrupts */ | 980 | /* clear and enable interrupts */ |
976 | writeb(0xff, devpriv->mite->daq_io_addr + Group_1_First_Clear); | 981 | writeb(0xff, devpriv->mite->daq_io_addr + Group_1_First_Clear); |
977 | /* writeb(ClearExpired,devpriv->mite->daq_io_addr+Group_1_Second_Clear); */ | 982 | /* writeb(ClearExpired, |
983 | devpriv->mite->daq_io_addr+Group_1_Second_Clear); */ | ||
978 | 984 | ||
979 | writeb(IntEn, devpriv->mite->daq_io_addr + Interrupt_Control); | 985 | writeb(IntEn, devpriv->mite->daq_io_addr + Interrupt_Control); |
980 | writeb(0x03, | 986 | writeb(0x03, |
@@ -1052,7 +1058,7 @@ static int ni_pcidio_change(struct comedi_device *dev, | |||
1052 | } | 1058 | } |
1053 | 1059 | ||
1054 | static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index, | 1060 | static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index, |
1055 | u8 * data, int data_len) | 1061 | u8 *data, int data_len) |
1056 | { | 1062 | { |
1057 | static const int timeout = 1000; | 1063 | static const int timeout = 1000; |
1058 | int i, j; | 1064 | int i, j; |
@@ -1066,9 +1072,8 @@ static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index, | |||
1066 | udelay(1); | 1072 | udelay(1); |
1067 | } | 1073 | } |
1068 | if (i == timeout) { | 1074 | if (i == timeout) { |
1069 | printk | 1075 | printk(KERN_WARNING "ni_pcidio: failed to load fpga %i, " |
1070 | ("ni_pcidio: failed to load fpga %i, waiting for status 0x2\n", | 1076 | "waiting for status 0x2\n", fpga_index); |
1071 | fpga_index); | ||
1072 | return -EIO; | 1077 | return -EIO; |
1073 | } | 1078 | } |
1074 | writew(0x80 | fpga_index, | 1079 | writew(0x80 | fpga_index, |
@@ -1079,9 +1084,8 @@ static int pci_6534_load_fpga(struct comedi_device *dev, int fpga_index, | |||
1079 | udelay(1); | 1084 | udelay(1); |
1080 | } | 1085 | } |
1081 | if (i == timeout) { | 1086 | if (i == timeout) { |
1082 | printk | 1087 | printk(KERN_WARNING "ni_pcidio: failed to load fpga %i, " |
1083 | ("ni_pcidio: failed to load fpga %i, waiting for status 0x3\n", | 1088 | "waiting for status 0x3\n", fpga_index); |
1084 | fpga_index); | ||
1085 | return -EIO; | 1089 | return -EIO; |
1086 | } | 1090 | } |
1087 | for (j = 0; j + 1 < data_len;) { | 1091 | for (j = 0; j + 1 < data_len;) { |
@@ -1174,9 +1178,10 @@ static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1174 | int n_subdevices; | 1178 | int n_subdevices; |
1175 | unsigned int irq; | 1179 | unsigned int irq; |
1176 | 1180 | ||
1177 | printk("comedi%d: nidio:", dev->minor); | 1181 | printk(KERN_INFO "comedi%d: nidio:", dev->minor); |
1178 | 1182 | ||
1179 | if ((ret = alloc_private(dev, sizeof(struct nidio96_private))) < 0) | 1183 | ret = alloc_private(dev, sizeof(struct nidio96_private)); |
1184 | if (ret < 0) | ||
1180 | return ret; | 1185 | return ret; |
1181 | spin_lock_init(&devpriv->mite_channel_lock); | 1186 | spin_lock_init(&devpriv->mite_channel_lock); |
1182 | 1187 | ||
@@ -1186,7 +1191,7 @@ static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1186 | 1191 | ||
1187 | ret = mite_setup(devpriv->mite); | 1192 | ret = mite_setup(devpriv->mite); |
1188 | if (ret < 0) { | 1193 | if (ret < 0) { |
1189 | printk("error setting up mite\n"); | 1194 | printk(KERN_WARNING "error setting up mite\n"); |
1190 | return ret; | 1195 | return ret; |
1191 | } | 1196 | } |
1192 | comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev); | 1197 | comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev); |
@@ -1196,18 +1201,19 @@ static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1196 | 1201 | ||
1197 | dev->board_name = this_board->name; | 1202 | dev->board_name = this_board->name; |
1198 | irq = mite_irq(devpriv->mite); | 1203 | irq = mite_irq(devpriv->mite); |
1199 | printk(" %s", dev->board_name); | 1204 | printk(KERN_INFO " %s", dev->board_name); |
1200 | if (this_board->uses_firmware) { | 1205 | if (this_board->uses_firmware) { |
1201 | ret = pci_6534_upload_firmware(dev, it->options); | 1206 | ret = pci_6534_upload_firmware(dev, it->options); |
1202 | if (ret < 0) | 1207 | if (ret < 0) |
1203 | return ret; | 1208 | return ret; |
1204 | } | 1209 | } |
1205 | if (!this_board->is_diodaq) { | 1210 | if (!this_board->is_diodaq) |
1206 | n_subdevices = this_board->n_8255; | 1211 | n_subdevices = this_board->n_8255; |
1207 | } else { | 1212 | else |
1208 | n_subdevices = 1; | 1213 | n_subdevices = 1; |
1209 | } | 1214 | |
1210 | if ((ret = alloc_subdevices(dev, n_subdevices)) < 0) | 1215 | ret = alloc_subdevices(dev, n_subdevices); |
1216 | if (ret < 0) | ||
1211 | return ret; | 1217 | return ret; |
1212 | 1218 | ||
1213 | if (!this_board->is_diodaq) { | 1219 | if (!this_board->is_diodaq) { |
@@ -1220,7 +1226,7 @@ static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1220 | } | 1226 | } |
1221 | } else { | 1227 | } else { |
1222 | 1228 | ||
1223 | printk(" rev=%d", | 1229 | printk(KERN_INFO " rev=%d", |
1224 | readb(devpriv->mite->daq_io_addr + Chip_Version)); | 1230 | readb(devpriv->mite->daq_io_addr + Chip_Version)); |
1225 | 1231 | ||
1226 | s = dev->subdevices + 0; | 1232 | s = dev->subdevices + 0; |
@@ -1253,9 +1259,9 @@ static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
1253 | 1259 | ||
1254 | ret = request_irq(irq, nidio_interrupt, IRQF_SHARED, | 1260 | ret = request_irq(irq, nidio_interrupt, IRQF_SHARED, |
1255 | "ni_pcidio", dev); | 1261 | "ni_pcidio", dev); |
1256 | if (ret < 0) { | 1262 | if (ret < 0) |
1257 | printk(" irq not available"); | 1263 | printk(KERN_WARNING " irq not available"); |
1258 | } | 1264 | |
1259 | dev->irq = irq; | 1265 | dev->irq = irq; |
1260 | } | 1266 | } |
1261 | 1267 | ||
@@ -1269,9 +1275,8 @@ static int nidio_detach(struct comedi_device *dev) | |||
1269 | int i; | 1275 | int i; |
1270 | 1276 | ||
1271 | if (this_board && !this_board->is_diodaq) { | 1277 | if (this_board && !this_board->is_diodaq) { |
1272 | for (i = 0; i < this_board->n_8255; i++) { | 1278 | for (i = 0; i < this_board->n_8255; i++) |
1273 | subdev_8255_cleanup(dev, dev->subdevices + i); | 1279 | subdev_8255_cleanup(dev, dev->subdevices + i); |
1274 | } | ||
1275 | } | 1280 | } |
1276 | 1281 | ||
1277 | if (dev->irq) | 1282 | if (dev->irq) |
@@ -1310,7 +1315,7 @@ static int nidio_find_device(struct comedi_device *dev, int bus, int slot) | |||
1310 | } | 1315 | } |
1311 | } | 1316 | } |
1312 | } | 1317 | } |
1313 | printk("no device found\n"); | 1318 | printk(KERN_WARNING "no device found\n"); |
1314 | mite_list_devices(); | 1319 | mite_list_devices(); |
1315 | return -EIO; | 1320 | return -EIO; |
1316 | } | 1321 | } |
diff --git a/drivers/staging/comedi/drivers/pcl711.c b/drivers/staging/comedi/drivers/pcl711.c index 4914784f6995..a499f7070f72 100644 --- a/drivers/staging/comedi/drivers/pcl711.c +++ b/drivers/staging/comedi/drivers/pcl711.c | |||
@@ -207,11 +207,10 @@ static irqreturn_t pcl711_interrupt(int irq, void *d) | |||
207 | 207 | ||
208 | /* FIXME! Nothing else sets ntrig! */ | 208 | /* FIXME! Nothing else sets ntrig! */ |
209 | if (!(--devpriv->ntrig)) { | 209 | if (!(--devpriv->ntrig)) { |
210 | if (this_board->is_8112) { | 210 | if (this_board->is_8112) |
211 | outb(1, dev->iobase + PCL711_MODE); | 211 | outb(1, dev->iobase + PCL711_MODE); |
212 | } else { | 212 | else |
213 | outb(0, dev->iobase + PCL711_MODE); | 213 | outb(0, dev->iobase + PCL711_MODE); |
214 | } | ||
215 | 214 | ||
216 | s->async->events |= COMEDI_CB_EOA; | 215 | s->async->events |= COMEDI_CB_EOA; |
217 | } | 216 | } |
@@ -232,15 +231,15 @@ static void pcl711_set_changain(struct comedi_device *dev, int chan) | |||
232 | /* | 231 | /* |
233 | * Set the correct channel. The two channel banks are switched | 232 | * Set the correct channel. The two channel banks are switched |
234 | * using the mask value. | 233 | * using the mask value. |
235 | * NB: To use differential channels, you should use mask = 0x30, | 234 | * NB: To use differential channels, you should use |
236 | * but I haven't written the support for this yet. /JJ | 235 | * mask = 0x30, but I haven't written the support for this |
236 | * yet. /JJ | ||
237 | */ | 237 | */ |
238 | 238 | ||
239 | if (chan_register >= 8) { | 239 | if (chan_register >= 8) |
240 | chan_register = 0x20 | (chan_register & 0x7); | 240 | chan_register = 0x20 | (chan_register & 0x7); |
241 | } else { | 241 | else |
242 | chan_register |= 0x10; | 242 | chan_register |= 0x10; |
243 | } | ||
244 | } else { | 243 | } else { |
245 | outb(chan_register, dev->iobase + PCL711_MUX); | 244 | outb(chan_register, dev->iobase + PCL711_MUX); |
246 | } | 245 | } |
@@ -256,15 +255,13 @@ static int pcl711_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s, | |||
256 | 255 | ||
257 | for (n = 0; n < insn->n; n++) { | 256 | for (n = 0; n < insn->n; n++) { |
258 | /* | 257 | /* |
259 | * Write the correct mode (software polling) and start polling by writing | 258 | * Write the correct mode (software polling) and start polling |
260 | * to the trigger register | 259 | * by writing to the trigger register |
261 | */ | 260 | */ |
262 | outb(1, dev->iobase + PCL711_MODE); | 261 | outb(1, dev->iobase + PCL711_MODE); |
263 | 262 | ||
264 | if (this_board->is_8112) { | 263 | if (!this_board->is_8112) |
265 | } else { | ||
266 | outb(0, dev->iobase + PCL711_SOFTTRIG); | 264 | outb(0, dev->iobase + PCL711_SOFTTRIG); |
267 | } | ||
268 | 265 | ||
269 | i = PCL711_TIMEOUT; | 266 | i = PCL711_TIMEOUT; |
270 | while (--i) { | 267 | while (--i) { |
@@ -462,9 +459,8 @@ static int pcl711_ao_insn_read(struct comedi_device *dev, | |||
462 | int n; | 459 | int n; |
463 | int chan = CR_CHAN(insn->chanspec); | 460 | int chan = CR_CHAN(insn->chanspec); |
464 | 461 | ||
465 | for (n = 0; n < insn->n; n++) { | 462 | for (n = 0; n < insn->n; n++) |
466 | data[n] = devpriv->ao_readback[chan]; | 463 | data[n] = devpriv->ao_readback[chan]; |
467 | } | ||
468 | 464 | ||
469 | return n; | 465 | return n; |
470 | 466 | ||
@@ -619,9 +615,8 @@ static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
619 | this is the "base value" for the mode register, which is | 615 | this is the "base value" for the mode register, which is |
620 | used for the irq on the PCL711 | 616 | used for the irq on the PCL711 |
621 | */ | 617 | */ |
622 | if (this_board->is_pcl711b) { | 618 | if (this_board->is_pcl711b) |
623 | devpriv->mode = (dev->irq << 4); | 619 | devpriv->mode = (dev->irq << 4); |
624 | } | ||
625 | 620 | ||
626 | /* clear DAC */ | 621 | /* clear DAC */ |
627 | outb(0, dev->iobase + PCL711_DA0_LO); | 622 | outb(0, dev->iobase + PCL711_DA0_LO); |
diff --git a/drivers/staging/comedi/drivers/pcl724.c b/drivers/staging/comedi/drivers/pcl724.c index df1f4ef14616..0f103c328064 100644 --- a/drivers/staging/comedi/drivers/pcl724.c +++ b/drivers/staging/comedi/drivers/pcl724.c | |||
@@ -17,7 +17,7 @@ | |||
17 | [0] - IO Base | 17 | [0] - IO Base |
18 | [1] - IRQ (0=disable IRQ) IRQ isn't supported at this time! | 18 | [1] - IRQ (0=disable IRQ) IRQ isn't supported at this time! |
19 | [2] -number of DIO: | 19 | [2] -number of DIO: |
20 | 0, 144: 144 DIO configuration | 20 | 0, 144: 144 DIO configuration |
21 | 1, 96: 96 DIO configuration | 21 | 1, 96: 96 DIO configuration |
22 | */ | 22 | */ |
23 | /* | 23 | /* |
@@ -137,8 +137,8 @@ static int pcl724_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
137 | iorange = this_board->io_range; | 137 | iorange = this_board->io_range; |
138 | if ((this_board->can_have96) && ((it->options[1] == 1) | 138 | if ((this_board->can_have96) && ((it->options[1] == 1) |
139 | || (it->options[1] == 96))) | 139 | || (it->options[1] == 96))) |
140 | iorange = PCL722_96_SIZE; /* PCL-724 in 96 DIO configuration */ | 140 | iorange = PCL722_96_SIZE; /* PCL-724 in 96 DIO configuration */ |
141 | printk("comedi%d: pcl724: board=%s, 0x%03lx ", dev->minor, | 141 | printk(KERN_INFO "comedi%d: pcl724: board=%s, 0x%03lx ", dev->minor, |
142 | this_board->name, iobase); | 142 | this_board->name, iobase); |
143 | if (!request_region(iobase, iorange, "pcl724")) { | 143 | if (!request_region(iobase, iorange, "pcl724")) { |
144 | printk("I/O port conflict\n"); | 144 | printk("I/O port conflict\n"); |
@@ -155,16 +155,16 @@ static int pcl724_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
155 | irq = it->options[1]; | 155 | irq = it->options[1]; |
156 | if (irq) { /* we want to use IRQ */ | 156 | if (irq) { /* we want to use IRQ */ |
157 | if (((1 << irq) & this_board->IRQbits) == 0) { | 157 | if (((1 << irq) & this_board->IRQbits) == 0) { |
158 | printk | 158 | printk(KERN_WARNING |
159 | (", IRQ %u is out of allowed range, DISABLING IT", | 159 | ", IRQ %u is out of allowed range, " |
160 | irq); | 160 | "DISABLING IT", irq); |
161 | irq = 0; /* Bad IRQ */ | 161 | irq = 0; /* Bad IRQ */ |
162 | } else { | 162 | } else { |
163 | if (request_irq | 163 | if (request_irq |
164 | (irq, interrupt_pcl724, 0, "pcl724", dev)) { | 164 | (irq, interrupt_pcl724, 0, "pcl724", dev)) { |
165 | printk | 165 | printk(KERN_WARNING |
166 | (", unable to allocate IRQ %u, DISABLING IT", | 166 | ", unable to allocate IRQ %u, " |
167 | irq); | 167 | "DISABLING IT", irq); |
168 | irq = 0; /* Can't use IRQ */ | 168 | irq = 0; /* Can't use IRQ */ |
169 | } else { | 169 | } else { |
170 | printk(", irq=%u", irq); | 170 | printk(", irq=%u", irq); |
@@ -207,16 +207,14 @@ static int pcl724_detach(struct comedi_device *dev) | |||
207 | { | 207 | { |
208 | int i; | 208 | int i; |
209 | 209 | ||
210 | /* printk("comedi%d: pcl724: remove\n",dev->minor); */ | 210 | /* printk("comedi%d: pcl724: remove\n",dev->minor); */ |
211 | 211 | ||
212 | for (i = 0; i < dev->n_subdevices; i++) { | 212 | for (i = 0; i < dev->n_subdevices; i++) |
213 | subdev_8255_cleanup(dev, dev->subdevices + i); | 213 | subdev_8255_cleanup(dev, dev->subdevices + i); |
214 | } | ||
215 | 214 | ||
216 | #ifdef PCL724_IRQ | 215 | #ifdef PCL724_IRQ |
217 | if (dev->irq) { | 216 | if (dev->irq) |
218 | free_irq(dev->irq, dev); | 217 | free_irq(dev->irq, dev); |
219 | } | ||
220 | #endif | 218 | #endif |
221 | 219 | ||
222 | release_region(dev->iobase, this_board->io_range); | 220 | release_region(dev->iobase, this_board->io_range); |
diff --git a/drivers/staging/comedi/drivers/pcl725.c b/drivers/staging/comedi/drivers/pcl725.c index 1da4941fce49..60261f4ba5b4 100644 --- a/drivers/staging/comedi/drivers/pcl725.c +++ b/drivers/staging/comedi/drivers/pcl725.c | |||
@@ -66,7 +66,7 @@ static int pcl725_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
66 | unsigned long iobase; | 66 | unsigned long iobase; |
67 | 67 | ||
68 | iobase = it->options[0]; | 68 | iobase = it->options[0]; |
69 | printk("comedi%d: pcl725: 0x%04lx ", dev->minor, iobase); | 69 | printk(KERN_INFO "comedi%d: pcl725: 0x%04lx ", dev->minor, iobase); |
70 | if (!request_region(iobase, PCL725_SIZE, "pcl725")) { | 70 | if (!request_region(iobase, PCL725_SIZE, "pcl725")) { |
71 | printk("I/O port conflict\n"); | 71 | printk("I/O port conflict\n"); |
72 | return -EIO; | 72 | return -EIO; |
@@ -96,14 +96,14 @@ static int pcl725_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
96 | s->insn_bits = pcl725_di_insn; | 96 | s->insn_bits = pcl725_di_insn; |
97 | s->range_table = &range_digital; | 97 | s->range_table = &range_digital; |
98 | 98 | ||
99 | printk("\n"); | 99 | printk(KERN_INFO "\n"); |
100 | 100 | ||
101 | return 0; | 101 | return 0; |
102 | } | 102 | } |
103 | 103 | ||
104 | static int pcl725_detach(struct comedi_device *dev) | 104 | static int pcl725_detach(struct comedi_device *dev) |
105 | { | 105 | { |
106 | printk("comedi%d: pcl725: remove\n", dev->minor); | 106 | printk(KERN_INFO "comedi%d: pcl725: remove\n", dev->minor); |
107 | 107 | ||
108 | if (dev->iobase) | 108 | if (dev->iobase) |
109 | release_region(dev->iobase, PCL725_SIZE); | 109 | release_region(dev->iobase, PCL725_SIZE); |
diff --git a/drivers/staging/comedi/drivers/pcl730.c b/drivers/staging/comedi/drivers/pcl730.c index c9859c90c152..e5e7bed21de0 100644 --- a/drivers/staging/comedi/drivers/pcl730.c +++ b/drivers/staging/comedi/drivers/pcl730.c | |||
@@ -99,7 +99,7 @@ static int pcl730_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
99 | 99 | ||
100 | iobase = it->options[0]; | 100 | iobase = it->options[0]; |
101 | iorange = this_board->io_range; | 101 | iorange = this_board->io_range; |
102 | printk("comedi%d: pcl730: board=%s 0x%04lx ", dev->minor, | 102 | printk(KERN_INFO "comedi%d: pcl730: board=%s 0x%04lx ", dev->minor, |
103 | this_board->name, iobase); | 103 | this_board->name, iobase); |
104 | if (!request_region(iobase, iorange, "pcl730")) { | 104 | if (!request_region(iobase, iorange, "pcl730")) { |
105 | printk("I/O port conflict\n"); | 105 | printk("I/O port conflict\n"); |
@@ -152,14 +152,14 @@ static int pcl730_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
152 | s->range_table = &range_digital; | 152 | s->range_table = &range_digital; |
153 | s->private = (void *)PCL730_DIO_LO; | 153 | s->private = (void *)PCL730_DIO_LO; |
154 | 154 | ||
155 | printk("\n"); | 155 | printk(KERN_INFO "\n"); |
156 | 156 | ||
157 | return 0; | 157 | return 0; |
158 | } | 158 | } |
159 | 159 | ||
160 | static int pcl730_detach(struct comedi_device *dev) | 160 | static int pcl730_detach(struct comedi_device *dev) |
161 | { | 161 | { |
162 | printk("comedi%d: pcl730: remove\n", dev->minor); | 162 | printk(KERN_INFO "comedi%d: pcl730: remove\n", dev->minor); |
163 | 163 | ||
164 | if (dev->iobase) | 164 | if (dev->iobase) |
165 | release_region(dev->iobase, this_board->io_range); | 165 | release_region(dev->iobase, this_board->io_range); |
diff --git a/drivers/staging/comedi/drivers/pcl812.c b/drivers/staging/comedi/drivers/pcl812.c index 0a5bc3d6da8c..d4634c4f02dc 100644 --- a/drivers/staging/comedi/drivers/pcl812.c +++ b/drivers/staging/comedi/drivers/pcl812.c | |||
@@ -955,6 +955,7 @@ static irqreturn_t interrupt_pcl812_ai_int(int irq, void *d) | |||
955 | unsigned int mask, timeout; | 955 | unsigned int mask, timeout; |
956 | struct comedi_device *dev = d; | 956 | struct comedi_device *dev = d; |
957 | struct comedi_subdevice *s = dev->subdevices + 0; | 957 | struct comedi_subdevice *s = dev->subdevices + 0; |
958 | unsigned int next_chan; | ||
958 | 959 | ||
959 | s->async->events = 0; | 960 | s->async->events = 0; |
960 | 961 | ||
@@ -993,9 +994,18 @@ static irqreturn_t interrupt_pcl812_ai_int(int irq, void *d) | |||
993 | ((inb(dev->iobase + PCL812_AD_HI) << 8) | | 994 | ((inb(dev->iobase + PCL812_AD_HI) << 8) | |
994 | inb(dev->iobase + PCL812_AD_LO)) & mask); | 995 | inb(dev->iobase + PCL812_AD_LO)) & mask); |
995 | 996 | ||
997 | /* Set up next channel. Added by abbotti 2010-01-20, but untested. */ | ||
998 | next_chan = s->async->cur_chan + 1; | ||
999 | if (next_chan >= devpriv->ai_n_chan) | ||
1000 | next_chan = 0; | ||
1001 | if (devpriv->ai_chanlist[s->async->cur_chan] != | ||
1002 | devpriv->ai_chanlist[next_chan]) | ||
1003 | setup_range_channel(dev, s, devpriv->ai_chanlist[next_chan], 0); | ||
1004 | |||
996 | outb(0, dev->iobase + PCL812_CLRINT); /* clear INT request */ | 1005 | outb(0, dev->iobase + PCL812_CLRINT); /* clear INT request */ |
997 | 1006 | ||
998 | if (s->async->cur_chan == 0) { /* one scan done */ | 1007 | s->async->cur_chan = next_chan; |
1008 | if (next_chan == 0) { /* one scan done */ | ||
999 | devpriv->ai_act_scan++; | 1009 | devpriv->ai_act_scan++; |
1000 | if (!(devpriv->ai_neverending)) | 1010 | if (!(devpriv->ai_neverending)) |
1001 | if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ | 1011 | if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ |
@@ -1021,7 +1031,9 @@ static void transfer_from_dma_buf(struct comedi_device *dev, | |||
1021 | for (i = len; i; i--) { | 1031 | for (i = len; i; i--) { |
1022 | comedi_buf_put(s->async, ptr[bufptr++]); /* get one sample */ | 1032 | comedi_buf_put(s->async, ptr[bufptr++]); /* get one sample */ |
1023 | 1033 | ||
1024 | if (s->async->cur_chan == 0) { | 1034 | s->async->cur_chan++; |
1035 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
1036 | s->async->cur_chan = 0; | ||
1025 | devpriv->ai_act_scan++; | 1037 | devpriv->ai_act_scan++; |
1026 | if (!devpriv->ai_neverending) | 1038 | if (!devpriv->ai_neverending) |
1027 | if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ | 1039 | if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ |
diff --git a/drivers/staging/comedi/drivers/pcl816.c b/drivers/staging/comedi/drivers/pcl816.c index 852fe2458fdc..9820759ec54f 100644 --- a/drivers/staging/comedi/drivers/pcl816.c +++ b/drivers/staging/comedi/drivers/pcl816.c | |||
@@ -202,6 +202,7 @@ struct pcl816_private { | |||
202 | unsigned int ai_act_chanlist[16]; /* MUX setting for actual AI operations */ | 202 | unsigned int ai_act_chanlist[16]; /* MUX setting for actual AI operations */ |
203 | unsigned int ai_act_chanlist_len; /* how long is actual MUX list */ | 203 | unsigned int ai_act_chanlist_len; /* how long is actual MUX list */ |
204 | unsigned int ai_act_chanlist_pos; /* actual position in MUX list */ | 204 | unsigned int ai_act_chanlist_pos; /* actual position in MUX list */ |
205 | unsigned int ai_n_chan; /* how many channels per scan */ | ||
205 | unsigned int ai_poll_ptr; /* how many sampes transfer poll */ | 206 | unsigned int ai_poll_ptr; /* how many sampes transfer poll */ |
206 | struct comedi_subdevice *sub_ai; /* ptr to AI subdevice */ | 207 | struct comedi_subdevice *sub_ai; /* ptr to AI subdevice */ |
207 | #ifdef unused | 208 | #ifdef unused |
@@ -213,9 +214,12 @@ struct pcl816_private { | |||
213 | /* | 214 | /* |
214 | ============================================================================== | 215 | ============================================================================== |
215 | */ | 216 | */ |
216 | static int check_and_setup_channel_list(struct comedi_device *dev, | 217 | static int check_channel_list(struct comedi_device *dev, |
217 | struct comedi_subdevice *s, | 218 | struct comedi_subdevice *s, |
218 | unsigned int *chanlist, int chanlen); | 219 | unsigned int *chanlist, unsigned int chanlen); |
220 | static void setup_channel_list(struct comedi_device *dev, | ||
221 | struct comedi_subdevice *s, | ||
222 | unsigned int *chanlist, unsigned int seglen); | ||
219 | static int pcl816_ai_cancel(struct comedi_device *dev, | 223 | static int pcl816_ai_cancel(struct comedi_device *dev, |
220 | struct comedi_subdevice *s); | 224 | struct comedi_subdevice *s); |
221 | static void start_pacer(struct comedi_device *dev, int mode, | 225 | static void start_pacer(struct comedi_device *dev, int mode, |
@@ -320,7 +324,9 @@ static irqreturn_t interrupt_pcl816_ai_mode13_int(int irq, void *d) | |||
320 | if (++devpriv->ai_act_chanlist_pos >= devpriv->ai_act_chanlist_len) | 324 | if (++devpriv->ai_act_chanlist_pos >= devpriv->ai_act_chanlist_len) |
321 | devpriv->ai_act_chanlist_pos = 0; | 325 | devpriv->ai_act_chanlist_pos = 0; |
322 | 326 | ||
323 | if (s->async->cur_chan == 0) { | 327 | s->async->cur_chan++; |
328 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
329 | s->async->cur_chan = 0; | ||
324 | devpriv->ai_act_scan++; | 330 | devpriv->ai_act_scan++; |
325 | } | 331 | } |
326 | 332 | ||
@@ -353,6 +359,11 @@ static void transfer_from_dma_buf(struct comedi_device *dev, | |||
353 | if (++devpriv->ai_act_chanlist_pos >= | 359 | if (++devpriv->ai_act_chanlist_pos >= |
354 | devpriv->ai_act_chanlist_len) { | 360 | devpriv->ai_act_chanlist_len) { |
355 | devpriv->ai_act_chanlist_pos = 0; | 361 | devpriv->ai_act_chanlist_pos = 0; |
362 | } | ||
363 | |||
364 | s->async->cur_chan++; | ||
365 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
366 | s->async->cur_chan = 0; | ||
356 | devpriv->ai_act_scan++; | 367 | devpriv->ai_act_scan++; |
357 | } | 368 | } |
358 | 369 | ||
@@ -558,14 +569,6 @@ static int pcl816_ai_cmdtest(struct comedi_device *dev, | |||
558 | } | 569 | } |
559 | } | 570 | } |
560 | 571 | ||
561 | if (!cmd->chanlist_len) { | ||
562 | cmd->chanlist_len = 1; | ||
563 | err++; | ||
564 | } | ||
565 | if (cmd->chanlist_len > this_board->n_aichan) { | ||
566 | cmd->chanlist_len = this_board->n_aichan; | ||
567 | err++; | ||
568 | } | ||
569 | if (cmd->scan_end_arg != cmd->chanlist_len) { | 572 | if (cmd->scan_end_arg != cmd->chanlist_len) { |
570 | cmd->scan_end_arg = cmd->chanlist_len; | 573 | cmd->scan_end_arg = cmd->chanlist_len; |
571 | err++; | 574 | err++; |
@@ -603,6 +606,14 @@ static int pcl816_ai_cmdtest(struct comedi_device *dev, | |||
603 | return 4; | 606 | return 4; |
604 | } | 607 | } |
605 | 608 | ||
609 | /* step 5: complain about special chanlist considerations */ | ||
610 | |||
611 | if (cmd->chanlist) { | ||
612 | if (!check_channel_list(dev, s, cmd->chanlist, | ||
613 | cmd->chanlist_len)) | ||
614 | return 5; /* incorrect channels list */ | ||
615 | } | ||
616 | |||
606 | return 0; | 617 | return 0; |
607 | } | 618 | } |
608 | 619 | ||
@@ -610,6 +621,7 @@ static int pcl816_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
610 | { | 621 | { |
611 | unsigned int divisor1 = 0, divisor2 = 0, dma_flags, bytes, dmairq; | 622 | unsigned int divisor1 = 0, divisor2 = 0, dma_flags, bytes, dmairq; |
612 | struct comedi_cmd *cmd = &s->async->cmd; | 623 | struct comedi_cmd *cmd = &s->async->cmd; |
624 | unsigned int seglen; | ||
613 | 625 | ||
614 | if (cmd->start_src != TRIG_NOW) | 626 | if (cmd->start_src != TRIG_NOW) |
615 | return -EINVAL; | 627 | return -EINVAL; |
@@ -642,11 +654,13 @@ static int pcl816_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |||
642 | 654 | ||
643 | start_pacer(dev, -1, 0, 0); /* stop pacer */ | 655 | start_pacer(dev, -1, 0, 0); /* stop pacer */ |
644 | 656 | ||
645 | if (!check_and_setup_channel_list(dev, s, cmd->chanlist, | 657 | seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len); |
646 | cmd->chanlist_len)) | 658 | if (seglen < 1) |
647 | return -EINVAL; | 659 | return -EINVAL; |
660 | setup_channel_list(dev, s, cmd->chanlist, seglen); | ||
648 | udelay(1); | 661 | udelay(1); |
649 | 662 | ||
663 | devpriv->ai_n_chan = cmd->chanlist_len; | ||
650 | devpriv->ai_act_scan = 0; | 664 | devpriv->ai_act_scan = 0; |
651 | s->async->cur_chan = 0; | 665 | s->async->cur_chan = 0; |
652 | devpriv->irq_blocked = 1; | 666 | devpriv->irq_blocked = 1; |
@@ -871,12 +885,12 @@ start_pacer(struct comedi_device *dev, int mode, unsigned int divisor1, | |||
871 | /* | 885 | /* |
872 | ============================================================================== | 886 | ============================================================================== |
873 | Check if channel list from user is builded correctly | 887 | Check if channel list from user is builded correctly |
874 | If it's ok, then program scan/gain logic | 888 | If it's ok, then return non-zero length of repeated segment of channel list |
875 | */ | 889 | */ |
876 | static int | 890 | static int |
877 | check_and_setup_channel_list(struct comedi_device *dev, | 891 | check_channel_list(struct comedi_device *dev, |
878 | struct comedi_subdevice *s, unsigned int *chanlist, | 892 | struct comedi_subdevice *s, unsigned int *chanlist, |
879 | int chanlen) | 893 | unsigned int chanlen) |
880 | { | 894 | { |
881 | unsigned int chansegment[16]; | 895 | unsigned int chansegment[16]; |
882 | unsigned int i, nowmustbechan, seglen, segpos; | 896 | unsigned int i, nowmustbechan, seglen, segpos; |
@@ -930,6 +944,20 @@ check_and_setup_channel_list(struct comedi_device *dev, | |||
930 | seglen = 1; | 944 | seglen = 1; |
931 | } | 945 | } |
932 | 946 | ||
947 | return seglen; /* we can serve this with MUX logic */ | ||
948 | } | ||
949 | |||
950 | /* | ||
951 | ============================================================================== | ||
952 | Program scan/gain logic with channel list. | ||
953 | */ | ||
954 | static void | ||
955 | setup_channel_list(struct comedi_device *dev, | ||
956 | struct comedi_subdevice *s, unsigned int *chanlist, | ||
957 | unsigned int seglen) | ||
958 | { | ||
959 | unsigned int i; | ||
960 | |||
933 | devpriv->ai_act_chanlist_len = seglen; | 961 | devpriv->ai_act_chanlist_len = seglen; |
934 | devpriv->ai_act_chanlist_pos = 0; | 962 | devpriv->ai_act_chanlist_pos = 0; |
935 | 963 | ||
@@ -942,8 +970,6 @@ check_and_setup_channel_list(struct comedi_device *dev, | |||
942 | udelay(1); | 970 | udelay(1); |
943 | 971 | ||
944 | outb(devpriv->ai_act_chanlist[0] | (devpriv->ai_act_chanlist[seglen - 1] << 4), dev->iobase + PCL816_MUX); /* select channel interval to scan */ | 972 | outb(devpriv->ai_act_chanlist[0] | (devpriv->ai_act_chanlist[seglen - 1] << 4), dev->iobase + PCL816_MUX); /* select channel interval to scan */ |
945 | |||
946 | return 1; /* we can serve this with MUX logic */ | ||
947 | } | 973 | } |
948 | 974 | ||
949 | #ifdef unused | 975 | #ifdef unused |
diff --git a/drivers/staging/comedi/drivers/pcl818.c b/drivers/staging/comedi/drivers/pcl818.c index d0481013a837..c9d75385755d 100644 --- a/drivers/staging/comedi/drivers/pcl818.c +++ b/drivers/staging/comedi/drivers/pcl818.c | |||
@@ -557,8 +557,14 @@ conv_finish: | |||
557 | comedi_event(dev, s); | 557 | comedi_event(dev, s); |
558 | return IRQ_HANDLED; | 558 | return IRQ_HANDLED; |
559 | } | 559 | } |
560 | if (s->async->cur_chan == 0) { | 560 | devpriv->act_chanlist_pos++; |
561 | if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { | ||
562 | devpriv->act_chanlist_pos = 0; | ||
563 | } | ||
564 | s->async->cur_chan++; | ||
565 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
561 | /* printk("E"); */ | 566 | /* printk("E"); */ |
567 | s->async->cur_chan = 0; | ||
562 | devpriv->ai_act_scan--; | 568 | devpriv->ai_act_scan--; |
563 | } | 569 | } |
564 | 570 | ||
@@ -627,9 +633,13 @@ static irqreturn_t interrupt_pcl818_ai_mode13_dma(int irq, void *d) | |||
627 | 633 | ||
628 | devpriv->act_chanlist_pos++; | 634 | devpriv->act_chanlist_pos++; |
629 | if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { | 635 | if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { |
630 | devpriv->ai_act_scan--; | ||
631 | devpriv->act_chanlist_pos = 0; | 636 | devpriv->act_chanlist_pos = 0; |
632 | } | 637 | } |
638 | s->async->cur_chan++; | ||
639 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
640 | s->async->cur_chan = 0; | ||
641 | devpriv->ai_act_scan--; | ||
642 | } | ||
633 | 643 | ||
634 | if (!devpriv->neverending_ai) | 644 | if (!devpriv->neverending_ai) |
635 | if (devpriv->ai_act_scan == 0) { /* all data sampled */ | 645 | if (devpriv->ai_act_scan == 0) { /* all data sampled */ |
@@ -717,7 +727,14 @@ static irqreturn_t interrupt_pcl818_ai_mode13_dma_rtc(int irq, void *d) | |||
717 | comedi_buf_put(s->async, dmabuf[bufptr++] >> 4); /* get one sample */ | 727 | comedi_buf_put(s->async, dmabuf[bufptr++] >> 4); /* get one sample */ |
718 | bufptr &= (devpriv->dmasamplsize - 1); | 728 | bufptr &= (devpriv->dmasamplsize - 1); |
719 | 729 | ||
720 | if (s->async->cur_chan == 0) { | 730 | devpriv->act_chanlist_pos++; |
731 | if (devpriv->act_chanlist_pos >= | ||
732 | devpriv->act_chanlist_len) { | ||
733 | devpriv->act_chanlist_pos = 0; | ||
734 | } | ||
735 | s->async->cur_chan++; | ||
736 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
737 | s->async->cur_chan = 0; | ||
721 | devpriv->ai_act_scan--; | 738 | devpriv->ai_act_scan--; |
722 | } | 739 | } |
723 | 740 | ||
@@ -796,7 +813,13 @@ static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d) | |||
796 | 813 | ||
797 | comedi_buf_put(s->async, (lo >> 4) | (inb(dev->iobase + PCL818_FI_DATAHI) << 4)); /* get one sample */ | 814 | comedi_buf_put(s->async, (lo >> 4) | (inb(dev->iobase + PCL818_FI_DATAHI) << 4)); /* get one sample */ |
798 | 815 | ||
799 | if (s->async->cur_chan == 0) { | 816 | devpriv->act_chanlist_pos++; |
817 | if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { | ||
818 | devpriv->act_chanlist_pos = 0; | ||
819 | } | ||
820 | s->async->cur_chan++; | ||
821 | if (s->async->cur_chan >= devpriv->ai_n_chan) { | ||
822 | s->async->cur_chan = 0; | ||
800 | devpriv->ai_act_scan--; | 823 | devpriv->ai_act_scan--; |
801 | } | 824 | } |
802 | 825 | ||
@@ -1369,14 +1392,6 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, | |||
1369 | } | 1392 | } |
1370 | } | 1393 | } |
1371 | 1394 | ||
1372 | if (!cmd->chanlist_len) { | ||
1373 | cmd->chanlist_len = 1; | ||
1374 | err++; | ||
1375 | } | ||
1376 | if (cmd->chanlist_len > s->n_chan) { | ||
1377 | cmd->chanlist_len = s->n_chan; | ||
1378 | err++; | ||
1379 | } | ||
1380 | if (cmd->scan_end_arg != cmd->chanlist_len) { | 1395 | if (cmd->scan_end_arg != cmd->chanlist_len) { |
1381 | cmd->scan_end_arg = cmd->chanlist_len; | 1396 | cmd->scan_end_arg = cmd->chanlist_len; |
1382 | err++; | 1397 | err++; |
diff --git a/drivers/staging/comedi/drivers/pcm3724.c b/drivers/staging/comedi/drivers/pcm3724.c index 52811824b05a..ed6103079232 100644 --- a/drivers/staging/comedi/drivers/pcm3724.c +++ b/drivers/staging/comedi/drivers/pcm3724.c | |||
@@ -121,25 +121,22 @@ static int compute_buffer(int config, int devno, struct comedi_subdevice *s) | |||
121 | { | 121 | { |
122 | /* 1 in io_bits indicates output */ | 122 | /* 1 in io_bits indicates output */ |
123 | if (s->io_bits & 0x0000ff) { | 123 | if (s->io_bits & 0x0000ff) { |
124 | if (devno == 0) { | 124 | if (devno == 0) |
125 | config |= BUF_A0; | 125 | config |= BUF_A0; |
126 | } else { | 126 | else |
127 | config |= BUF_A1; | 127 | config |= BUF_A1; |
128 | } | ||
129 | } | 128 | } |
130 | if (s->io_bits & 0x00ff00) { | 129 | if (s->io_bits & 0x00ff00) { |
131 | if (devno == 0) { | 130 | if (devno == 0) |
132 | config |= BUF_B0; | 131 | config |= BUF_B0; |
133 | } else { | 132 | else |
134 | config |= BUF_B1; | 133 | config |= BUF_B1; |
135 | } | ||
136 | } | 134 | } |
137 | if (s->io_bits & 0xff0000) { | 135 | if (s->io_bits & 0xff0000) { |
138 | if (devno == 0) { | 136 | if (devno == 0) |
139 | config |= BUF_C0; | 137 | config |= BUF_C0; |
140 | } else { | 138 | else |
141 | config |= BUF_C1; | 139 | config |= BUF_C1; |
142 | } | ||
143 | } | 140 | } |
144 | return config; | 141 | return config; |
145 | } | 142 | } |
@@ -155,26 +152,27 @@ static void do_3724_config(struct comedi_device *dev, | |||
155 | buffer_config = 0; | 152 | buffer_config = 0; |
156 | 153 | ||
157 | /* 1 in io_bits indicates output, 1 in config indicates input */ | 154 | /* 1 in io_bits indicates output, 1 in config indicates input */ |
158 | if (!(s->io_bits & 0x0000ff)) { | 155 | if (!(s->io_bits & 0x0000ff)) |
159 | config |= CR_A_IO; | 156 | config |= CR_A_IO; |
160 | } | 157 | |
161 | if (!(s->io_bits & 0x00ff00)) { | 158 | if (!(s->io_bits & 0x00ff00)) |
162 | config |= CR_B_IO; | 159 | config |= CR_B_IO; |
163 | } | 160 | |
164 | if (!(s->io_bits & 0xff0000)) { | 161 | if (!(s->io_bits & 0xff0000)) |
165 | config |= CR_C_IO; | 162 | config |= CR_C_IO; |
166 | } | ||
167 | 163 | ||
168 | buffer_config = compute_buffer(0, 0, dev->subdevices); | 164 | buffer_config = compute_buffer(0, 0, dev->subdevices); |
169 | buffer_config = compute_buffer(buffer_config, 1, (dev->subdevices) + 1); | 165 | buffer_config = compute_buffer(buffer_config, 1, (dev->subdevices) + 1); |
170 | 166 | ||
171 | if (s == dev->subdevices) { | 167 | if (s == dev->subdevices) |
172 | port_8255_cfg = dev->iobase + _8255_CR; | 168 | port_8255_cfg = dev->iobase + _8255_CR; |
173 | } else { | 169 | else |
174 | port_8255_cfg = dev->iobase + SIZE_8255 + _8255_CR; | 170 | port_8255_cfg = dev->iobase + SIZE_8255 + _8255_CR; |
175 | } | 171 | |
176 | outb(buffer_config, dev->iobase + 8); /* update buffer register */ | 172 | outb(buffer_config, dev->iobase + 8); /* update buffer register */ |
177 | /* printk("pcm3724 buffer_config (%lx) %d, %x\n", dev->iobase + _8255_CR, chanspec, buffer_config); */ | 173 | /* printk("pcm3724 buffer_config (%lx) %d, %x\n", |
174 | dev->iobase + _8255_CR, chanspec, buffer_config); */ | ||
175 | |||
178 | outb(config, port_8255_cfg); | 176 | outb(config, port_8255_cfg); |
179 | } | 177 | } |
180 | 178 | ||
@@ -189,29 +187,29 @@ static void enable_chan(struct comedi_device *dev, struct comedi_subdevice *s, | |||
189 | priv = (struct priv_pcm3724 *)(dev->private); | 187 | priv = (struct priv_pcm3724 *)(dev->private); |
190 | 188 | ||
191 | mask = 1 << CR_CHAN(chanspec); | 189 | mask = 1 << CR_CHAN(chanspec); |
192 | if (s == dev->subdevices) { /* subdev 0 */ | 190 | if (s == dev->subdevices) /* subdev 0 */ |
193 | priv->dio_1 |= mask; | 191 | priv->dio_1 |= mask; |
194 | } else { /* subdev 1 */ | 192 | else /* subdev 1 */ |
195 | priv->dio_2 |= mask; | 193 | priv->dio_2 |= mask; |
196 | } | 194 | |
197 | if (priv->dio_1 & 0xff0000) { | 195 | if (priv->dio_1 & 0xff0000) |
198 | gatecfg |= GATE_C0; | 196 | gatecfg |= GATE_C0; |
199 | } | 197 | |
200 | if (priv->dio_1 & 0xff00) { | 198 | if (priv->dio_1 & 0xff00) |
201 | gatecfg |= GATE_B0; | 199 | gatecfg |= GATE_B0; |
202 | } | 200 | |
203 | if (priv->dio_1 & 0xff) { | 201 | if (priv->dio_1 & 0xff) |
204 | gatecfg |= GATE_A0; | 202 | gatecfg |= GATE_A0; |
205 | } | 203 | |
206 | if (priv->dio_2 & 0xff0000) { | 204 | if (priv->dio_2 & 0xff0000) |
207 | gatecfg |= GATE_C1; | 205 | gatecfg |= GATE_C1; |
208 | } | 206 | |
209 | if (priv->dio_2 & 0xff00) { | 207 | if (priv->dio_2 & 0xff00) |
210 | gatecfg |= GATE_B1; | 208 | gatecfg |= GATE_B1; |
211 | } | 209 | |
212 | if (priv->dio_2 & 0xff) { | 210 | if (priv->dio_2 & 0xff) |
213 | gatecfg |= GATE_A1; | 211 | gatecfg |= GATE_A1; |
214 | } | 212 | |
215 | /* printk("gate control %x\n", gatecfg); */ | 213 | /* printk("gate control %x\n", gatecfg); */ |
216 | outb(gatecfg, dev->iobase + 9); | 214 | outb(gatecfg, dev->iobase + 9); |
217 | } | 215 | } |
@@ -225,15 +223,14 @@ static int subdev_3724_insn_config(struct comedi_device *dev, | |||
225 | unsigned int bits; | 223 | unsigned int bits; |
226 | 224 | ||
227 | mask = 1 << CR_CHAN(insn->chanspec); | 225 | mask = 1 << CR_CHAN(insn->chanspec); |
228 | if (mask & 0x0000ff) { | 226 | if (mask & 0x0000ff) |
229 | bits = 0x0000ff; | 227 | bits = 0x0000ff; |
230 | } else if (mask & 0x00ff00) { | 228 | else if (mask & 0x00ff00) |
231 | bits = 0x00ff00; | 229 | bits = 0x00ff00; |
232 | } else if (mask & 0x0f0000) { | 230 | else if (mask & 0x0f0000) |
233 | bits = 0x0f0000; | 231 | bits = 0x0f0000; |
234 | } else { | 232 | else |
235 | bits = 0xf00000; | 233 | bits = 0xf00000; |
236 | } | ||
237 | 234 | ||
238 | switch (data[0]) { | 235 | switch (data[0]) { |
239 | case INSN_CONFIG_DIO_INPUT: | 236 | case INSN_CONFIG_DIO_INPUT: |
@@ -272,7 +269,7 @@ static int pcm3724_attach(struct comedi_device *dev, | |||
272 | ((struct priv_pcm3724 *)(dev->private))->dio_1 = 0; | 269 | ((struct priv_pcm3724 *)(dev->private))->dio_1 = 0; |
273 | ((struct priv_pcm3724 *)(dev->private))->dio_2 = 0; | 270 | ((struct priv_pcm3724 *)(dev->private))->dio_2 = 0; |
274 | 271 | ||
275 | printk("comedi%d: pcm3724: board=%s, 0x%03lx ", dev->minor, | 272 | printk(KERN_INFO "comedi%d: pcm3724: board=%s, 0x%03lx ", dev->minor, |
276 | this_board->name, iobase); | 273 | this_board->name, iobase); |
277 | if (!iobase || !request_region(iobase, iorange, "pcm3724")) { | 274 | if (!iobase || !request_region(iobase, iorange, "pcm3724")) { |
278 | printk("I/O port conflict\n"); | 275 | printk("I/O port conflict\n"); |
@@ -281,7 +278,7 @@ static int pcm3724_attach(struct comedi_device *dev, | |||
281 | 278 | ||
282 | dev->iobase = iobase; | 279 | dev->iobase = iobase; |
283 | dev->board_name = this_board->name; | 280 | dev->board_name = this_board->name; |
284 | printk("\n"); | 281 | printk(KERN_INFO "\n"); |
285 | 282 | ||
286 | n_subdevices = this_board->numofports; | 283 | n_subdevices = this_board->numofports; |
287 | 284 | ||
@@ -302,13 +299,11 @@ static int pcm3724_detach(struct comedi_device *dev) | |||
302 | int i; | 299 | int i; |
303 | 300 | ||
304 | if (dev->subdevices) { | 301 | if (dev->subdevices) { |
305 | for (i = 0; i < dev->n_subdevices; i++) { | 302 | for (i = 0; i < dev->n_subdevices; i++) |
306 | subdev_8255_cleanup(dev, dev->subdevices + i); | 303 | subdev_8255_cleanup(dev, dev->subdevices + i); |
307 | } | ||
308 | } | 304 | } |
309 | if (dev->iobase) { | 305 | if (dev->iobase) |
310 | release_region(dev->iobase, this_board->io_range); | 306 | release_region(dev->iobase, this_board->io_range); |
311 | } | ||
312 | 307 | ||
313 | return 0; | 308 | return 0; |
314 | } | 309 | } |
diff --git a/drivers/staging/comedi/drivers/pcm3730.c b/drivers/staging/comedi/drivers/pcm3730.c index 9e4adbd89dda..22b7aae63add 100644 --- a/drivers/staging/comedi/drivers/pcm3730.c +++ b/drivers/staging/comedi/drivers/pcm3730.c | |||
@@ -73,7 +73,7 @@ static int pcm3730_attach(struct comedi_device *dev, | |||
73 | unsigned long iobase; | 73 | unsigned long iobase; |
74 | 74 | ||
75 | iobase = it->options[0]; | 75 | iobase = it->options[0]; |
76 | printk("comedi%d: pcm3730: 0x%04lx ", dev->minor, iobase); | 76 | printk(KERN_INFO "comedi%d: pcm3730: 0x%04lx ", dev->minor, iobase); |
77 | if (!request_region(iobase, PCM3730_SIZE, "pcm3730")) { | 77 | if (!request_region(iobase, PCM3730_SIZE, "pcm3730")) { |
78 | printk("I/O port conflict\n"); | 78 | printk("I/O port conflict\n"); |
79 | return -EIO; | 79 | return -EIO; |
@@ -140,14 +140,14 @@ static int pcm3730_attach(struct comedi_device *dev, | |||
140 | s->range_table = &range_digital; | 140 | s->range_table = &range_digital; |
141 | s->private = (void *)PCM3730_DIC; | 141 | s->private = (void *)PCM3730_DIC; |
142 | 142 | ||
143 | printk("\n"); | 143 | printk(KERN_INFO "\n"); |
144 | 144 | ||
145 | return 0; | 145 | return 0; |
146 | } | 146 | } |
147 | 147 | ||
148 | static int pcm3730_detach(struct comedi_device *dev) | 148 | static int pcm3730_detach(struct comedi_device *dev) |
149 | { | 149 | { |
150 | printk("comedi%d: pcm3730: remove\n", dev->minor); | 150 | printk(KERN_INFO "comedi%d: pcm3730: remove\n", dev->minor); |
151 | 151 | ||
152 | if (dev->iobase) | 152 | if (dev->iobase) |
153 | release_region(dev->iobase, PCM3730_SIZE); | 153 | release_region(dev->iobase, PCM3730_SIZE); |
diff --git a/drivers/staging/comedi/drivers/pcmad.c b/drivers/staging/comedi/drivers/pcmad.c index acac67090810..fab8092bd7aa 100644 --- a/drivers/staging/comedi/drivers/pcmad.c +++ b/drivers/staging/comedi/drivers/pcmad.c | |||
@@ -34,11 +34,11 @@ Configuration options: | |||
34 | [0] - I/O port base | 34 | [0] - I/O port base |
35 | [1] - unused | 35 | [1] - unused |
36 | [2] - Analog input reference | 36 | [2] - Analog input reference |
37 | 0 = single ended | 37 | 0 = single ended |
38 | 1 = differential | 38 | 1 = differential |
39 | [3] - Analog input encoding (must match jumpers) | 39 | [3] - Analog input encoding (must match jumpers) |
40 | 0 = straight binary | 40 | 0 = straight binary |
41 | 1 = two's complement | 41 | 1 = two's complement |
42 | */ | 42 | */ |
43 | 43 | ||
44 | #include <linux/interrupt.h> | 44 | #include <linux/interrupt.h> |
@@ -113,9 +113,8 @@ static int pcmad_ai_insn_read(struct comedi_device *dev, | |||
113 | data[n] = inb(dev->iobase + PCMAD_LSB); | 113 | data[n] = inb(dev->iobase + PCMAD_LSB); |
114 | data[n] |= (inb(dev->iobase + PCMAD_MSB) << 8); | 114 | data[n] |= (inb(dev->iobase + PCMAD_MSB) << 8); |
115 | 115 | ||
116 | if (devpriv->twos_comp) { | 116 | if (devpriv->twos_comp) |
117 | data[n] ^= (1 << (this_board->n_ai_bits - 1)); | 117 | data[n] ^= (1 << (this_board->n_ai_bits - 1)); |
118 | } | ||
119 | } | 118 | } |
120 | 119 | ||
121 | return n; | 120 | return n; |
@@ -135,11 +134,12 @@ static int pcmad_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
135 | unsigned long iobase; | 134 | unsigned long iobase; |
136 | 135 | ||
137 | iobase = it->options[0]; | 136 | iobase = it->options[0]; |
138 | printk("comedi%d: pcmad: 0x%04lx ", dev->minor, iobase); | 137 | printk(KERN_INFO "comedi%d: pcmad: 0x%04lx ", dev->minor, iobase); |
139 | if (!request_region(iobase, PCMAD_SIZE, "pcmad")) { | 138 | if (!request_region(iobase, PCMAD_SIZE, "pcmad")) { |
140 | printk("I/O port conflict\n"); | 139 | printk(KERN_CONT "I/O port conflict\n"); |
141 | return -EIO; | 140 | return -EIO; |
142 | } | 141 | } |
142 | printk(KERN_CONT "\n"); | ||
143 | dev->iobase = iobase; | 143 | dev->iobase = iobase; |
144 | 144 | ||
145 | ret = alloc_subdevices(dev, 1); | 145 | ret = alloc_subdevices(dev, 1); |
@@ -166,11 +166,11 @@ static int pcmad_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
166 | 166 | ||
167 | static int pcmad_detach(struct comedi_device *dev) | 167 | static int pcmad_detach(struct comedi_device *dev) |
168 | { | 168 | { |
169 | printk("comedi%d: pcmad: remove\n", dev->minor); | 169 | printk(KERN_INFO "comedi%d: pcmad: remove\n", dev->minor); |
170 | 170 | ||
171 | if (dev->irq) { | 171 | if (dev->irq) |
172 | free_irq(dev->irq, dev); | 172 | free_irq(dev->irq, dev); |
173 | } | 173 | |
174 | if (dev->iobase) | 174 | if (dev->iobase) |
175 | release_region(dev->iobase, PCMAD_SIZE); | 175 | release_region(dev->iobase, PCMAD_SIZE); |
176 | 176 | ||
diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c index 35ba93989a36..6ca4105610c1 100644 --- a/drivers/staging/comedi/drivers/pcmmio.c +++ b/drivers/staging/comedi/drivers/pcmmio.c | |||
@@ -550,7 +550,7 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
550 | 550 | ||
551 | if (irq[0]) { | 551 | if (irq[0]) { |
552 | printk("irq: %u ", irq[0]); | 552 | printk("irq: %u ", irq[0]); |
553 | if (irq[1] && thisboard->dio_num_asics == 2) | 553 | if (thisboard->dio_num_asics == 2 && irq[1]) |
554 | printk("second ASIC irq: %u ", irq[1]); | 554 | printk("second ASIC irq: %u ", irq[1]); |
555 | } else { | 555 | } else { |
556 | printk("(IRQ mode disabled) "); | 556 | printk("(IRQ mode disabled) "); |
diff --git a/drivers/staging/comedi/drivers/poc.c b/drivers/staging/comedi/drivers/poc.c index d23e588d0632..1ebc356ce40e 100644 --- a/drivers/staging/comedi/drivers/poc.c +++ b/drivers/staging/comedi/drivers/poc.c | |||
@@ -122,22 +122,21 @@ static int poc_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
122 | unsigned int iosize; | 122 | unsigned int iosize; |
123 | 123 | ||
124 | iobase = it->options[0]; | 124 | iobase = it->options[0]; |
125 | printk("comedi%d: poc: using %s iobase 0x%lx\n", dev->minor, | 125 | printk(KERN_INFO "comedi%d: poc: using %s iobase 0x%lx\n", dev->minor, |
126 | this_board->name, iobase); | 126 | this_board->name, iobase); |
127 | 127 | ||
128 | dev->board_name = this_board->name; | 128 | dev->board_name = this_board->name; |
129 | 129 | ||
130 | if (iobase == 0) { | 130 | if (iobase == 0) { |
131 | printk("io base address required\n"); | 131 | printk(KERN_ERR "io base address required\n"); |
132 | return -EINVAL; | 132 | return -EINVAL; |
133 | } | 133 | } |
134 | 134 | ||
135 | iosize = this_board->iosize; | 135 | iosize = this_board->iosize; |
136 | /* check if io addresses are available */ | 136 | /* check if io addresses are available */ |
137 | if (!request_region(iobase, iosize, "dac02")) { | 137 | if (!request_region(iobase, iosize, "dac02")) { |
138 | printk | 138 | printk(KERN_ERR "I/O port conflict: failed to allocate ports " |
139 | ("I/O port conflict: failed to allocate ports 0x%lx to 0x%lx\n", | 139 | "0x%lx to 0x%lx\n", iobase, iobase + iosize - 1); |
140 | iobase, iobase + iosize - 1); | ||
141 | return -EIO; | 140 | return -EIO; |
142 | } | 141 | } |
143 | dev->iobase = iobase; | 142 | dev->iobase = iobase; |
@@ -156,9 +155,8 @@ static int poc_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
156 | s->insn_write = this_board->winsn; | 155 | s->insn_write = this_board->winsn; |
157 | s->insn_read = this_board->rinsn; | 156 | s->insn_read = this_board->rinsn; |
158 | s->insn_bits = this_board->insnbits; | 157 | s->insn_bits = this_board->insnbits; |
159 | if (s->type == COMEDI_SUBD_AO || s->type == COMEDI_SUBD_DO) { | 158 | if (s->type == COMEDI_SUBD_AO || s->type == COMEDI_SUBD_DO) |
160 | s->subdev_flags = SDF_WRITABLE; | 159 | s->subdev_flags = SDF_WRITABLE; |
161 | } | ||
162 | 160 | ||
163 | return 0; | 161 | return 0; |
164 | } | 162 | } |
@@ -169,7 +167,7 @@ static int poc_detach(struct comedi_device *dev) | |||
169 | if (dev->iobase) | 167 | if (dev->iobase) |
170 | release_region(dev->iobase, this_board->iosize); | 168 | release_region(dev->iobase, this_board->iosize); |
171 | 169 | ||
172 | printk("comedi%d: dac02: remove\n", dev->minor); | 170 | printk(KERN_INFO "comedi%d: dac02: remove\n", dev->minor); |
173 | 171 | ||
174 | return 0; | 172 | return 0; |
175 | } | 173 | } |
diff --git a/drivers/staging/comedi/drivers/rti800.c b/drivers/staging/comedi/drivers/rti800.c index 2c9d05bd288c..028ed6f89c4c 100644 --- a/drivers/staging/comedi/drivers/rti800.c +++ b/drivers/staging/comedi/drivers/rti800.c | |||
@@ -32,22 +32,22 @@ Configuration options: | |||
32 | [0] - I/O port base address | 32 | [0] - I/O port base address |
33 | [1] - IRQ | 33 | [1] - IRQ |
34 | [2] - A/D reference | 34 | [2] - A/D reference |
35 | 0 = differential | 35 | 0 = differential |
36 | 1 = pseudodifferential (common) | 36 | 1 = pseudodifferential (common) |
37 | 2 = single-ended | 37 | 2 = single-ended |
38 | [3] - A/D range | 38 | [3] - A/D range |
39 | 0 = [-10,10] | 39 | 0 = [-10,10] |
40 | 1 = [-5,5] | 40 | 1 = [-5,5] |
41 | 2 = [0,10] | 41 | 2 = [0,10] |
42 | [4] - A/D encoding | 42 | [4] - A/D encoding |
43 | 0 = two's complement | 43 | 0 = two's complement |
44 | 1 = straight binary | 44 | 1 = straight binary |
45 | [5] - DAC 0 range | 45 | [5] - DAC 0 range |
46 | 0 = [-10,10] | 46 | 0 = [-10,10] |
47 | 1 = [0,10] | 47 | 1 = [0,10] |
48 | [6] - DAC 0 encoding | 48 | [6] - DAC 0 encoding |
49 | 0 = two's complement | 49 | 0 = two's complement |
50 | 1 = straight binary | 50 | 1 = straight binary |
51 | [7] - DAC 1 range (same as DAC 0) | 51 | [7] - DAC 1 range (same as DAC 0) |
52 | [8] - DAC 1 encoding (same as DAC 0) | 52 | [8] - DAC 1 encoding (same as DAC 0) |
53 | */ | 53 | */ |
@@ -225,7 +225,7 @@ static int rti800_ai_insn_read(struct comedi_device *dev, | |||
225 | for (t = RTI800_TIMEOUT; t; t--) { | 225 | for (t = RTI800_TIMEOUT; t; t--) { |
226 | status = inb(dev->iobase + RTI800_CSR); | 226 | status = inb(dev->iobase + RTI800_CSR); |
227 | if (status & RTI800_OVERRUN) { | 227 | if (status & RTI800_OVERRUN) { |
228 | printk("rti800: a/d overrun\n"); | 228 | printk(KERN_WARNING "rti800: a/d overrun\n"); |
229 | outb(0, dev->iobase + RTI800_CLRFLAGS); | 229 | outb(0, dev->iobase + RTI800_CLRFLAGS); |
230 | return -EIO; | 230 | return -EIO; |
231 | } | 231 | } |
@@ -234,15 +234,14 @@ static int rti800_ai_insn_read(struct comedi_device *dev, | |||
234 | udelay(1); | 234 | udelay(1); |
235 | } | 235 | } |
236 | if (t == 0) { | 236 | if (t == 0) { |
237 | printk("rti800: timeout\n"); | 237 | printk(KERN_WARNING "rti800: timeout\n"); |
238 | return -ETIME; | 238 | return -ETIME; |
239 | } | 239 | } |
240 | data[i] = inb(dev->iobase + RTI800_ADCLO); | 240 | data[i] = inb(dev->iobase + RTI800_ADCLO); |
241 | data[i] |= (0xf & inb(dev->iobase + RTI800_ADCHI)) << 8; | 241 | data[i] |= (0xf & inb(dev->iobase + RTI800_ADCHI)) << 8; |
242 | 242 | ||
243 | if (devpriv->adc_coding == adc_2comp) { | 243 | if (devpriv->adc_coding == adc_2comp) |
244 | data[i] ^= 0x800; | 244 | data[i] ^= 0x800; |
245 | } | ||
246 | } | 245 | } |
247 | 246 | ||
248 | return i; | 247 | return i; |
@@ -271,9 +270,9 @@ static int rti800_ao_insn_write(struct comedi_device *dev, | |||
271 | 270 | ||
272 | for (i = 0; i < insn->n; i++) { | 271 | for (i = 0; i < insn->n; i++) { |
273 | devpriv->ao_readback[chan] = d = data[i]; | 272 | devpriv->ao_readback[chan] = d = data[i]; |
274 | if (devpriv->dac0_coding == dac_2comp) { | 273 | if (devpriv->dac0_coding == dac_2comp) |
275 | d ^= 0x800; | 274 | d ^= 0x800; |
276 | } | 275 | |
277 | outb(d & 0xff, | 276 | outb(d & 0xff, |
278 | dev->iobase + (chan ? RTI800_DAC1LO : RTI800_DAC0LO)); | 277 | dev->iobase + (chan ? RTI800_DAC1LO : RTI800_DAC0LO)); |
279 | outb(d >> 8, | 278 | outb(d >> 8, |
@@ -315,15 +314,15 @@ static int rti800_do_insn_bits(struct comedi_device *dev, | |||
315 | options[0] - I/O port | 314 | options[0] - I/O port |
316 | options[1] - irq | 315 | options[1] - irq |
317 | options[2] - a/d mux | 316 | options[2] - a/d mux |
318 | 0=differential, 1=pseudodiff, 2=single | 317 | 0=differential, 1=pseudodiff, 2=single |
319 | options[3] - a/d range | 318 | options[3] - a/d range |
320 | 0=bipolar10, 1=bipolar5, 2=unipolar10 | 319 | 0=bipolar10, 1=bipolar5, 2=unipolar10 |
321 | options[4] - a/d coding | 320 | options[4] - a/d coding |
322 | 0=2's comp, 1=straight binary | 321 | 0=2's comp, 1=straight binary |
323 | options[5] - dac0 range | 322 | options[5] - dac0 range |
324 | 0=bipolar10, 1=unipolar10 | 323 | 0=bipolar10, 1=unipolar10 |
325 | options[6] - dac0 coding | 324 | options[6] - dac0 coding |
326 | 0=2's comp, 1=straight binary | 325 | 0=2's comp, 1=straight binary |
327 | options[7] - dac1 range | 326 | options[7] - dac1 range |
328 | options[8] - dac1 coding | 327 | options[8] - dac1 coding |
329 | */ | 328 | */ |
@@ -336,15 +335,15 @@ static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
336 | struct comedi_subdevice *s; | 335 | struct comedi_subdevice *s; |
337 | 336 | ||
338 | iobase = it->options[0]; | 337 | iobase = it->options[0]; |
339 | printk("comedi%d: rti800: 0x%04lx ", dev->minor, iobase); | 338 | printk(KERN_INFO "comedi%d: rti800: 0x%04lx\n", dev->minor, iobase); |
340 | if (!request_region(iobase, RTI800_SIZE, "rti800")) { | 339 | if (!request_region(iobase, RTI800_SIZE, "rti800")) { |
341 | printk("I/O port conflict\n"); | 340 | printk(KERN_WARNING "I/O port conflict\n"); |
342 | return -EIO; | 341 | return -EIO; |
343 | } | 342 | } |
344 | dev->iobase = iobase; | 343 | dev->iobase = iobase; |
345 | 344 | ||
346 | #ifdef DEBUG | 345 | #ifdef DEBUG |
347 | printk("fingerprint=%x,%x,%x,%x,%x ", | 346 | printk(KERN_DEBUG "fingerprint=%x,%x,%x,%x,%x ", |
348 | inb(dev->iobase + 0), | 347 | inb(dev->iobase + 0), |
349 | inb(dev->iobase + 1), | 348 | inb(dev->iobase + 1), |
350 | inb(dev->iobase + 2), | 349 | inb(dev->iobase + 2), |
@@ -357,15 +356,15 @@ static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
357 | 356 | ||
358 | irq = it->options[1]; | 357 | irq = it->options[1]; |
359 | if (irq) { | 358 | if (irq) { |
360 | printk("( irq = %u )", irq); | 359 | printk(KERN_INFO "( irq = %u )\n", irq); |
361 | ret = request_irq(irq, rti800_interrupt, 0, "rti800", dev); | 360 | ret = request_irq(irq, rti800_interrupt, 0, "rti800", dev); |
362 | if (ret < 0) { | 361 | if (ret < 0) { |
363 | printk(" Failed to allocate IRQ\n"); | 362 | printk(KERN_WARNING " Failed to allocate IRQ\n"); |
364 | return ret; | 363 | return ret; |
365 | } | 364 | } |
366 | dev->irq = irq; | 365 | dev->irq = irq; |
367 | } else { | 366 | } else { |
368 | printk("( no irq )"); | 367 | printk(KERN_INFO "( no irq )\n"); |
369 | } | 368 | } |
370 | 369 | ||
371 | dev->board_name = this_board->name; | 370 | dev->board_name = this_board->name; |
@@ -461,14 +460,12 @@ static int rti800_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
461 | s->type = COMEDI_SUBD_TIMER; | 460 | s->type = COMEDI_SUBD_TIMER; |
462 | #endif | 461 | #endif |
463 | 462 | ||
464 | printk("\n"); | ||
465 | |||
466 | return 0; | 463 | return 0; |
467 | } | 464 | } |
468 | 465 | ||
469 | static int rti800_detach(struct comedi_device *dev) | 466 | static int rti800_detach(struct comedi_device *dev) |
470 | { | 467 | { |
471 | printk("comedi%d: rti800: remove\n", dev->minor); | 468 | printk(KERN_INFO "comedi%d: rti800: remove\n", dev->minor); |
472 | 469 | ||
473 | if (dev->iobase) | 470 | if (dev->iobase) |
474 | release_region(dev->iobase, RTI800_SIZE); | 471 | release_region(dev->iobase, RTI800_SIZE); |
diff --git a/drivers/staging/comedi/drivers/rti802.c b/drivers/staging/comedi/drivers/rti802.c index 2f75c737ea15..2157edcf7997 100644 --- a/drivers/staging/comedi/drivers/rti802.c +++ b/drivers/staging/comedi/drivers/rti802.c | |||
@@ -106,9 +106,9 @@ static int rti802_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
106 | unsigned long iobase; | 106 | unsigned long iobase; |
107 | 107 | ||
108 | iobase = it->options[0]; | 108 | iobase = it->options[0]; |
109 | printk("comedi%d: rti802: 0x%04lx ", dev->minor, iobase); | 109 | printk(KERN_INFO "comedi%d: rti802: 0x%04lx ", dev->minor, iobase); |
110 | if (!request_region(iobase, RTI802_SIZE, "rti802")) { | 110 | if (!request_region(iobase, RTI802_SIZE, "rti802")) { |
111 | printk("I/O port conflict\n"); | 111 | printk(KERN_WARNING "I/O port conflict\n"); |
112 | return -EIO; | 112 | return -EIO; |
113 | } | 113 | } |
114 | dev->iobase = iobase; | 114 | dev->iobase = iobase; |
@@ -138,14 +138,12 @@ static int rti802_attach(struct comedi_device *dev, struct comedi_devconfig *it) | |||
138 | ? &range_unipolar10 : &range_bipolar10; | 138 | ? &range_unipolar10 : &range_bipolar10; |
139 | } | 139 | } |
140 | 140 | ||
141 | printk("\n"); | ||
142 | |||
143 | return 0; | 141 | return 0; |
144 | } | 142 | } |
145 | 143 | ||
146 | static int rti802_detach(struct comedi_device *dev) | 144 | static int rti802_detach(struct comedi_device *dev) |
147 | { | 145 | { |
148 | printk("comedi%d: rti802: remove\n", dev->minor); | 146 | printk(KERN_INFO "comedi%d: rti802: remove\n", dev->minor); |
149 | 147 | ||
150 | if (dev->iobase) | 148 | if (dev->iobase) |
151 | release_region(dev->iobase, RTI802_SIZE); | 149 | release_region(dev->iobase, RTI802_SIZE); |
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c index fdd7ab954d8c..a3cc93362ec2 100644 --- a/drivers/staging/comedi/drivers/s626.c +++ b/drivers/staging/comedi/drivers/s626.c | |||
@@ -140,7 +140,7 @@ struct s626_private { | |||
140 | short allocatedBuf; | 140 | short allocatedBuf; |
141 | uint8_t ai_cmd_running; /* ai_cmd is running */ | 141 | uint8_t ai_cmd_running; /* ai_cmd is running */ |
142 | uint8_t ai_continous; /* continous aquisition */ | 142 | uint8_t ai_continous; /* continous aquisition */ |
143 | int ai_sample_count; /* number of samples to aquire */ | 143 | int ai_sample_count; /* number of samples to acquire */ |
144 | unsigned int ai_sample_timer; | 144 | unsigned int ai_sample_timer; |
145 | /* time between samples in units of the timer */ | 145 | /* time between samples in units of the timer */ |
146 | int ai_convert_count; /* conversion counter */ | 146 | int ai_convert_count; /* conversion counter */ |
diff --git a/drivers/staging/comedi/drivers/serial2002.c b/drivers/staging/comedi/drivers/serial2002.c index db37dcdd98b6..dd2b90372794 100644 --- a/drivers/staging/comedi/drivers/serial2002.c +++ b/drivers/staging/comedi/drivers/serial2002.c | |||
@@ -397,7 +397,7 @@ static void serial_2002_open(struct comedi_device *dev) | |||
397 | char port[20]; | 397 | char port[20]; |
398 | 398 | ||
399 | sprintf(port, "/dev/ttyS%d", devpriv->port); | 399 | sprintf(port, "/dev/ttyS%d", devpriv->port); |
400 | devpriv->tty = filp_open(port, 0, O_RDWR); | 400 | devpriv->tty = filp_open(port, O_RDWR, 0); |
401 | if (IS_ERR(devpriv->tty)) { | 401 | if (IS_ERR(devpriv->tty)) { |
402 | printk("serial_2002: file open error = %ld\n", | 402 | printk("serial_2002: file open error = %ld\n", |
403 | PTR_ERR(devpriv->tty)); | 403 | PTR_ERR(devpriv->tty)); |
diff --git a/drivers/staging/comedi/drivers/ssv_dnp.c b/drivers/staging/comedi/drivers/ssv_dnp.c index 4918fbfab5e8..17c92a57b0dd 100644 --- a/drivers/staging/comedi/drivers/ssv_dnp.c +++ b/drivers/staging/comedi/drivers/ssv_dnp.c | |||
@@ -300,11 +300,11 @@ static int dnp_dio_insn_config(struct comedi_device *dev, | |||
300 | 300 | ||
301 | /* read 'old' direction of the port and set bits (out=1, in=0) */ | 301 | /* read 'old' direction of the port and set bits (out=1, in=0) */ |
302 | register_buffer = inb(CSCDR); | 302 | register_buffer = inb(CSCDR); |
303 | if (data[0] == COMEDI_OUTPUT) { | 303 | if (data[0] == COMEDI_OUTPUT) |
304 | register_buffer |= (1 << chan); | 304 | register_buffer |= (1 << chan); |
305 | } else { | 305 | else |
306 | register_buffer &= ~(1 << chan); | 306 | register_buffer &= ~(1 << chan); |
307 | } | 307 | |
308 | outb(register_buffer, CSCDR); | 308 | outb(register_buffer, CSCDR); |
309 | 309 | ||
310 | return 1; | 310 | return 1; |
diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c index 9a1b559c4b0d..8942ae45708d 100644 --- a/drivers/staging/comedi/drivers/usbdux.c +++ b/drivers/staging/comedi/drivers/usbdux.c | |||
@@ -95,7 +95,6 @@ sampling rate. If you sample two channels you get 4kHz and so on. | |||
95 | #include <linux/slab.h> | 95 | #include <linux/slab.h> |
96 | #include <linux/input.h> | 96 | #include <linux/input.h> |
97 | #include <linux/usb.h> | 97 | #include <linux/usb.h> |
98 | #include <linux/smp_lock.h> | ||
99 | #include <linux/fcntl.h> | 98 | #include <linux/fcntl.h> |
100 | #include <linux/compiler.h> | 99 | #include <linux/compiler.h> |
101 | #include <linux/firmware.h> | 100 | #include <linux/firmware.h> |
@@ -289,7 +288,7 @@ struct usbduxsub { | |||
289 | /* continous aquisition */ | 288 | /* continous aquisition */ |
290 | short int ai_continous; | 289 | short int ai_continous; |
291 | short int ao_continous; | 290 | short int ao_continous; |
292 | /* number of samples to aquire */ | 291 | /* number of samples to acquire */ |
293 | int ai_sample_count; | 292 | int ai_sample_count; |
294 | int ao_sample_count; | 293 | int ao_sample_count; |
295 | /* time between samples in units of the timer */ | 294 | /* time between samples in units of the timer */ |
@@ -2833,7 +2832,7 @@ static struct comedi_driver driver_usbdux = { | |||
2833 | }; | 2832 | }; |
2834 | 2833 | ||
2835 | /* Table with the USB-devices: just now only testing IDs */ | 2834 | /* Table with the USB-devices: just now only testing IDs */ |
2836 | static struct usb_device_id usbduxsub_table[] = { | 2835 | static const struct usb_device_id usbduxsub_table[] = { |
2837 | {USB_DEVICE(0x13d8, 0x0001)}, | 2836 | {USB_DEVICE(0x13d8, 0x0001)}, |
2838 | {USB_DEVICE(0x13d8, 0x0002)}, | 2837 | {USB_DEVICE(0x13d8, 0x0002)}, |
2839 | {} /* Terminating entry */ | 2838 | {} /* Terminating entry */ |
diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c index 2e675cce7dbf..e89b81812538 100644 --- a/drivers/staging/comedi/drivers/usbduxfast.c +++ b/drivers/staging/comedi/drivers/usbduxfast.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <linux/slab.h> | 44 | #include <linux/slab.h> |
45 | #include <linux/input.h> | 45 | #include <linux/input.h> |
46 | #include <linux/usb.h> | 46 | #include <linux/usb.h> |
47 | #include <linux/smp_lock.h> | ||
48 | #include <linux/fcntl.h> | 47 | #include <linux/fcntl.h> |
49 | #include <linux/compiler.h> | 48 | #include <linux/compiler.h> |
50 | #include "comedi_fc.h" | 49 | #include "comedi_fc.h" |
@@ -182,7 +181,7 @@ struct usbduxfastsub_s { | |||
182 | context */ | 181 | context */ |
183 | short int ai_cmd_running; /* asynchronous command is running */ | 182 | short int ai_cmd_running; /* asynchronous command is running */ |
184 | short int ai_continous; /* continous aquisition */ | 183 | short int ai_continous; /* continous aquisition */ |
185 | long int ai_sample_count; /* number of samples to aquire */ | 184 | long int ai_sample_count; /* number of samples to acquire */ |
186 | uint8_t *dux_commands; /* commands */ | 185 | uint8_t *dux_commands; /* commands */ |
187 | int ignore; /* counter which ignores the first | 186 | int ignore; /* counter which ignores the first |
188 | buffers */ | 187 | buffers */ |
@@ -1769,7 +1768,7 @@ static struct comedi_driver driver_usbduxfast = { | |||
1769 | /* | 1768 | /* |
1770 | * Table with the USB-devices: just now only testing IDs | 1769 | * Table with the USB-devices: just now only testing IDs |
1771 | */ | 1770 | */ |
1772 | static struct usb_device_id usbduxfastsub_table[] = { | 1771 | static const struct usb_device_id usbduxfastsub_table[] = { |
1773 | /* { USB_DEVICE(0x4b4, 0x8613) }, testing */ | 1772 | /* { USB_DEVICE(0x4b4, 0x8613) }, testing */ |
1774 | {USB_DEVICE(0x13d8, 0x0010)}, /* real ID */ | 1773 | {USB_DEVICE(0x13d8, 0x0010)}, /* real ID */ |
1775 | {USB_DEVICE(0x13d8, 0x0011)}, /* real ID */ | 1774 | {USB_DEVICE(0x13d8, 0x0011)}, /* real ID */ |
diff --git a/drivers/staging/comedi/drivers/vmk80xx.c b/drivers/staging/comedi/drivers/vmk80xx.c index c34a0b9141e2..6479c38d0278 100644 --- a/drivers/staging/comedi/drivers/vmk80xx.c +++ b/drivers/staging/comedi/drivers/vmk80xx.c | |||
@@ -75,7 +75,7 @@ enum { | |||
75 | DEVICE_VMK8061 | 75 | DEVICE_VMK8061 |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static struct usb_device_id vmk80xx_id_table[] = { | 78 | static const struct usb_device_id vmk80xx_id_table[] = { |
79 | {USB_DEVICE(0x10cf, 0x5500), .driver_info = DEVICE_VMK8055}, | 79 | {USB_DEVICE(0x10cf, 0x5500), .driver_info = DEVICE_VMK8055}, |
80 | {USB_DEVICE(0x10cf, 0x5501), .driver_info = DEVICE_VMK8055}, | 80 | {USB_DEVICE(0x10cf, 0x5501), .driver_info = DEVICE_VMK8055}, |
81 | {USB_DEVICE(0x10cf, 0x5502), .driver_info = DEVICE_VMK8055}, | 81 | {USB_DEVICE(0x10cf, 0x5502), .driver_info = DEVICE_VMK8055}, |
diff --git a/drivers/staging/crystalhd/Kconfig b/drivers/staging/crystalhd/Kconfig new file mode 100644 index 000000000000..56b414bca1a1 --- /dev/null +++ b/drivers/staging/crystalhd/Kconfig | |||
@@ -0,0 +1,6 @@ | |||
1 | config CRYSTALHD | ||
2 | tristate "Broadcom Crystal HD video decoder support" | ||
3 | depends on PCI | ||
4 | default n | ||
5 | help | ||
6 | Support for the Broadcom Crystal HD video decoder chipset | ||
diff --git a/drivers/staging/crystalhd/Makefile b/drivers/staging/crystalhd/Makefile new file mode 100644 index 000000000000..e2af0ce2e792 --- /dev/null +++ b/drivers/staging/crystalhd/Makefile | |||
@@ -0,0 +1,6 @@ | |||
1 | obj-$(CONFIG_CRYSTALHD) += crystalhd.o | ||
2 | |||
3 | crystalhd-objs := crystalhd_cmds.o \ | ||
4 | crystalhd_hw.o \ | ||
5 | crystalhd_lnx.o \ | ||
6 | crystalhd_misc.o | ||
diff --git a/drivers/staging/crystalhd/TODO b/drivers/staging/crystalhd/TODO new file mode 100644 index 000000000000..69be5d0cb80c --- /dev/null +++ b/drivers/staging/crystalhd/TODO | |||
@@ -0,0 +1,16 @@ | |||
1 | - Testing | ||
2 | - Cleanup return codes | ||
3 | - Cleanup typedefs | ||
4 | - Cleanup all WIN* references | ||
5 | - Allocate an Accelerator device class specific Major number, | ||
6 | since we don't have any other open sourced accelerators, it is the only | ||
7 | one in that category for now. | ||
8 | A somewhat similar device is the DXR2/3 | ||
9 | |||
10 | Please send patches to: | ||
11 | Greg Kroah-Hartman <greg@kroah.com> | ||
12 | Naren Sankar <nsankar@broadcom.com> | ||
13 | Jarod Wilson <jarod@wilsonet.com> | ||
14 | Scott Davilla <davilla@4pi.com> | ||
15 | Manu Abraham <abraham.manu@gmail.com> | ||
16 | |||
diff --git a/drivers/staging/crystalhd/bc_dts_defs.h b/drivers/staging/crystalhd/bc_dts_defs.h new file mode 100644 index 000000000000..c34cc07127b8 --- /dev/null +++ b/drivers/staging/crystalhd/bc_dts_defs.h | |||
@@ -0,0 +1,498 @@ | |||
1 | /******************************************************************** | ||
2 | * Copyright(c) 2006-2009 Broadcom Corporation. | ||
3 | * | ||
4 | * Name: bc_dts_defs.h | ||
5 | * | ||
6 | * Description: Common definitions for all components. Only types | ||
7 | * is allowed to be included from this file. | ||
8 | * | ||
9 | * AU | ||
10 | * | ||
11 | * HISTORY: | ||
12 | * | ||
13 | ******************************************************************** | ||
14 | * This header is free software: you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU Lesser General Public License as published | ||
16 | * by the Free Software Foundation, either version 2.1 of the License. | ||
17 | * | ||
18 | * This header is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU Lesser General Public License for more details. | ||
22 | * You should have received a copy of the GNU Lesser General Public License | ||
23 | * along with this header. If not, see <http://www.gnu.org/licenses/>. | ||
24 | *******************************************************************/ | ||
25 | |||
26 | #ifndef _BC_DTS_DEFS_H_ | ||
27 | #define _BC_DTS_DEFS_H_ | ||
28 | |||
29 | #include "bc_dts_types.h" | ||
30 | |||
31 | /* BIT Mask */ | ||
32 | #define BC_BIT(_x) (1 << (_x)) | ||
33 | |||
34 | typedef enum _BC_STATUS { | ||
35 | BC_STS_SUCCESS = 0, | ||
36 | BC_STS_INV_ARG = 1, | ||
37 | BC_STS_BUSY = 2, | ||
38 | BC_STS_NOT_IMPL = 3, | ||
39 | BC_STS_PGM_QUIT = 4, | ||
40 | BC_STS_NO_ACCESS = 5, | ||
41 | BC_STS_INSUFF_RES = 6, | ||
42 | BC_STS_IO_ERROR = 7, | ||
43 | BC_STS_NO_DATA = 8, | ||
44 | BC_STS_VER_MISMATCH = 9, | ||
45 | BC_STS_TIMEOUT = 10, | ||
46 | BC_STS_FW_CMD_ERR = 11, | ||
47 | BC_STS_DEC_NOT_OPEN = 12, | ||
48 | BC_STS_ERR_USAGE = 13, | ||
49 | BC_STS_IO_USER_ABORT = 14, | ||
50 | BC_STS_IO_XFR_ERROR = 15, | ||
51 | BC_STS_DEC_NOT_STARTED = 16, | ||
52 | BC_STS_FWHEX_NOT_FOUND = 17, | ||
53 | BC_STS_FMT_CHANGE = 18, | ||
54 | BC_STS_HIF_ACCESS = 19, | ||
55 | BC_STS_CMD_CANCELLED = 20, | ||
56 | BC_STS_FW_AUTH_FAILED = 21, | ||
57 | BC_STS_BOOTLOADER_FAILED = 22, | ||
58 | BC_STS_CERT_VERIFY_ERROR = 23, | ||
59 | BC_STS_DEC_EXIST_OPEN = 24, | ||
60 | BC_STS_PENDING = 25, | ||
61 | BC_STS_CLK_NOCHG = 26, | ||
62 | |||
63 | /* Must be the last one.*/ | ||
64 | BC_STS_ERROR = -1 | ||
65 | } BC_STATUS; | ||
66 | |||
67 | /*------------------------------------------------------* | ||
68 | * Registry Key Definitions * | ||
69 | *------------------------------------------------------*/ | ||
70 | #define BC_REG_KEY_MAIN_PATH "Software\\Broadcom\\MediaPC\\70010" | ||
71 | #define BC_REG_KEY_FWPATH "FirmwareFilePath" | ||
72 | #define BC_REG_KEY_SEC_OPT "DbgOptions" | ||
73 | |||
74 | /* | ||
75 | * Options: | ||
76 | * | ||
77 | * b[5] = Enable RSA KEY in EEPROM Support | ||
78 | * b[6] = Enable Old PIB scheme. (0 = Use PIB with video scheme) | ||
79 | * | ||
80 | * b[12] = Enable send message to NotifyIcon | ||
81 | * | ||
82 | */ | ||
83 | |||
84 | typedef enum _BC_SW_OPTIONS { | ||
85 | BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3), | ||
86 | BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29), | ||
87 | } BC_SW_OPTIONS; | ||
88 | |||
89 | typedef struct _BC_REG_CONFIG{ | ||
90 | uint32_t DbgOptions; | ||
91 | } BC_REG_CONFIG; | ||
92 | |||
93 | #if defined(__KERNEL__) || defined(__LINUX_USER__) | ||
94 | #else | ||
95 | /* Align data structures */ | ||
96 | #define ALIGN(x) __declspec(align(x)) | ||
97 | #endif | ||
98 | |||
99 | /* mode | ||
100 | * b[0]..b[7] = _DtsDeviceOpenMode | ||
101 | * b[8] = Load new FW | ||
102 | * b[9] = Load file play back FW | ||
103 | * b[10] = Disk format (0 for HD DVD and 1 for BLU ray) | ||
104 | * b[11]-b[15] = default output resolution | ||
105 | * b[16] = Skip TX CPB Buffer Check | ||
106 | * b[17] = Adaptive Output Encrypt/Scramble Scheme | ||
107 | * b[18]-b[31] = reserved for future use | ||
108 | */ | ||
109 | |||
110 | /* To allow multiple apps to open the device. */ | ||
111 | enum _DtsDeviceOpenMode { | ||
112 | DTS_PLAYBACK_MODE = 0, | ||
113 | DTS_DIAG_MODE, | ||
114 | DTS_MONITOR_MODE, | ||
115 | DTS_HWINIT_MODE | ||
116 | }; | ||
117 | |||
118 | /* To enable the filter to selectively enable/disable fixes or erratas */ | ||
119 | enum _DtsDeviceFixMode { | ||
120 | DTS_LOAD_NEW_FW = BC_BIT(8), | ||
121 | DTS_LOAD_FILE_PLAY_FW = BC_BIT(9), | ||
122 | DTS_DISK_FMT_BD = BC_BIT(10), | ||
123 | /* b[11]-b[15] : Default output resolution */ | ||
124 | DTS_SKIP_TX_CHK_CPB = BC_BIT(16), | ||
125 | DTS_ADAPTIVE_OUTPUT_PER = BC_BIT(17), | ||
126 | DTS_INTELLIMAP = BC_BIT(18), | ||
127 | /* b[19]-b[21] : select clock frequency */ | ||
128 | DTS_PLAYBACK_DROP_RPT_MODE = BC_BIT(22) | ||
129 | }; | ||
130 | |||
131 | #define DTS_DFLT_RESOLUTION(x) (x<<11) | ||
132 | |||
133 | #define DTS_DFLT_CLOCK(x) (x<<19) | ||
134 | |||
135 | /* F/W File Version corresponding to S/W Releases */ | ||
136 | enum _FW_FILE_VER { | ||
137 | /* S/W release: 02.04.02 F/W release 2.12.2.0 */ | ||
138 | BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0)) | ||
139 | }; | ||
140 | |||
141 | /*------------------------------------------------------* | ||
142 | * Stream Types for DtsOpenDecoder() * | ||
143 | *------------------------------------------------------*/ | ||
144 | enum _DtsOpenDecStreamTypes { | ||
145 | BC_STREAM_TYPE_ES = 0, | ||
146 | BC_STREAM_TYPE_PES = 1, | ||
147 | BC_STREAM_TYPE_TS = 2, | ||
148 | BC_STREAM_TYPE_ES_TSTAMP = 6, | ||
149 | }; | ||
150 | |||
151 | /*------------------------------------------------------* | ||
152 | * Video Algorithms for DtsSetVideoParams() * | ||
153 | *------------------------------------------------------*/ | ||
154 | enum _DtsSetVideoParamsAlgo { | ||
155 | BC_VID_ALGO_H264 = 0, | ||
156 | BC_VID_ALGO_MPEG2 = 1, | ||
157 | BC_VID_ALGO_VC1 = 4, | ||
158 | BC_VID_ALGO_VC1MP = 7, | ||
159 | }; | ||
160 | |||
161 | /*------------------------------------------------------* | ||
162 | * MPEG Extension to the PPB * | ||
163 | *------------------------------------------------------*/ | ||
164 | #define BC_MPEG_VALID_PANSCAN (1) | ||
165 | |||
166 | typedef struct _BC_PIB_EXT_MPEG { | ||
167 | uint32_t valid; | ||
168 | /* Always valid, defaults to picture size if no | ||
169 | * sequence display extension in the stream. */ | ||
170 | uint32_t display_horizontal_size; | ||
171 | uint32_t display_vertical_size; | ||
172 | |||
173 | /* MPEG_VALID_PANSCAN | ||
174 | * Offsets are a copy values from the MPEG stream. */ | ||
175 | uint32_t offset_count; | ||
176 | int32_t horizontal_offset[3]; | ||
177 | int32_t vertical_offset[3]; | ||
178 | |||
179 | } BC_PIB_EXT_MPEG; | ||
180 | |||
181 | /*------------------------------------------------------* | ||
182 | * H.264 Extension to the PPB * | ||
183 | *------------------------------------------------------*/ | ||
184 | /* Bit definitions for 'other.h264.valid' field */ | ||
185 | #define H264_VALID_PANSCAN (1) | ||
186 | #define H264_VALID_SPS_CROP (2) | ||
187 | #define H264_VALID_VUI (4) | ||
188 | |||
189 | typedef struct _BC_PIB_EXT_H264 { | ||
190 | /* 'valid' specifies which fields (or sets of | ||
191 | * fields) below are valid. If the corresponding | ||
192 | * bit in 'valid' is NOT set then that field(s) | ||
193 | * is (are) not initialized. */ | ||
194 | uint32_t valid; | ||
195 | |||
196 | /* H264_VALID_PANSCAN */ | ||
197 | uint32_t pan_scan_count; | ||
198 | int32_t pan_scan_left[3]; | ||
199 | int32_t pan_scan_right[3]; | ||
200 | int32_t pan_scan_top[3]; | ||
201 | int32_t pan_scan_bottom[3]; | ||
202 | |||
203 | /* H264_VALID_SPS_CROP */ | ||
204 | int32_t sps_crop_left; | ||
205 | int32_t sps_crop_right; | ||
206 | int32_t sps_crop_top; | ||
207 | int32_t sps_crop_bottom; | ||
208 | |||
209 | /* H264_VALID_VUI */ | ||
210 | uint32_t chroma_top; | ||
211 | uint32_t chroma_bottom; | ||
212 | |||
213 | } BC_PIB_EXT_H264; | ||
214 | |||
215 | /*------------------------------------------------------* | ||
216 | * VC1 Extension to the PPB * | ||
217 | *------------------------------------------------------*/ | ||
218 | #define VC1_VALID_PANSCAN (1) | ||
219 | |||
220 | typedef struct _BC_PIB_EXT_VC1 { | ||
221 | uint32_t valid; | ||
222 | |||
223 | /* Always valid, defaults to picture size if no | ||
224 | * sequence display extension in the stream. */ | ||
225 | uint32_t display_horizontal_size; | ||
226 | uint32_t display_vertical_size; | ||
227 | |||
228 | /* VC1 pan scan windows */ | ||
229 | uint32_t num_panscan_windows; | ||
230 | int32_t ps_horiz_offset[4]; | ||
231 | int32_t ps_vert_offset[4]; | ||
232 | int32_t ps_width[4]; | ||
233 | int32_t ps_height[4]; | ||
234 | |||
235 | } BC_PIB_EXT_VC1; | ||
236 | |||
237 | |||
238 | /*------------------------------------------------------* | ||
239 | * Picture Information Block * | ||
240 | *------------------------------------------------------*/ | ||
241 | #if defined(_WIN32) || defined(_WIN64) || defined(__LINUX_USER__) | ||
242 | /* Values for 'pulldown' field. '0' means no pulldown information | ||
243 | * was present for this picture. */ | ||
244 | enum { | ||
245 | vdecNoPulldownInfo = 0, | ||
246 | vdecTop = 1, | ||
247 | vdecBottom = 2, | ||
248 | vdecTopBottom = 3, | ||
249 | vdecBottomTop = 4, | ||
250 | vdecTopBottomTop = 5, | ||
251 | vdecBottomTopBottom = 6, | ||
252 | vdecFrame_X2 = 7, | ||
253 | vdecFrame_X3 = 8, | ||
254 | vdecFrame_X1 = 9, | ||
255 | vdecFrame_X4 = 10, | ||
256 | }; | ||
257 | |||
258 | /* Values for the 'frame_rate' field. */ | ||
259 | enum { | ||
260 | vdecFrameRateUnknown = 0, | ||
261 | vdecFrameRate23_97, | ||
262 | vdecFrameRate24, | ||
263 | vdecFrameRate25, | ||
264 | vdecFrameRate29_97, | ||
265 | vdecFrameRate30, | ||
266 | vdecFrameRate50, | ||
267 | vdecFrameRate59_94, | ||
268 | vdecFrameRate60, | ||
269 | }; | ||
270 | |||
271 | /* Values for the 'aspect_ratio' field. */ | ||
272 | enum { | ||
273 | vdecAspectRatioUnknown = 0, | ||
274 | vdecAspectRatioSquare, | ||
275 | vdecAspectRatio12_11, | ||
276 | vdecAspectRatio10_11, | ||
277 | vdecAspectRatio16_11, | ||
278 | vdecAspectRatio40_33, | ||
279 | vdecAspectRatio24_11, | ||
280 | vdecAspectRatio20_11, | ||
281 | vdecAspectRatio32_11, | ||
282 | vdecAspectRatio80_33, | ||
283 | vdecAspectRatio18_11, | ||
284 | vdecAspectRatio15_11, | ||
285 | vdecAspectRatio64_33, | ||
286 | vdecAspectRatio160_99, | ||
287 | vdecAspectRatio4_3, | ||
288 | vdecAspectRatio16_9, | ||
289 | vdecAspectRatio221_1, | ||
290 | vdecAspectRatioOther = 255, | ||
291 | }; | ||
292 | |||
293 | /* Values for the 'colour_primaries' field. */ | ||
294 | enum { | ||
295 | vdecColourPrimariesUnknown = 0, | ||
296 | vdecColourPrimariesBT709, | ||
297 | vdecColourPrimariesUnspecified, | ||
298 | vdecColourPrimariesReserved, | ||
299 | vdecColourPrimariesBT470_2M = 4, | ||
300 | vdecColourPrimariesBT470_2BG, | ||
301 | vdecColourPrimariesSMPTE170M, | ||
302 | vdecColourPrimariesSMPTE240M, | ||
303 | vdecColourPrimariesGenericFilm, | ||
304 | }; | ||
305 | |||
306 | enum { | ||
307 | vdecRESOLUTION_CUSTOM = 0x00000000, /* custom */ | ||
308 | vdecRESOLUTION_480i = 0x00000001, /* 480i */ | ||
309 | vdecRESOLUTION_1080i = 0x00000002, /* 1080i (1920x1080, 60i) */ | ||
310 | vdecRESOLUTION_NTSC = 0x00000003, /* NTSC (720x483, 60i) */ | ||
311 | vdecRESOLUTION_480p = 0x00000004, /* 480p (720x480, 60p) */ | ||
312 | vdecRESOLUTION_720p = 0x00000005, /* 720p (1280x720, 60p) */ | ||
313 | vdecRESOLUTION_PAL1 = 0x00000006, /* PAL_1 (720x576, 50i) */ | ||
314 | vdecRESOLUTION_1080i25 = 0x00000007, /* 1080i25 (1920x1080, 50i) */ | ||
315 | vdecRESOLUTION_720p50 = 0x00000008, /* 720p50 (1280x720, 50p) */ | ||
316 | vdecRESOLUTION_576p = 0x00000009, /* 576p (720x576, 50p) */ | ||
317 | vdecRESOLUTION_1080i29_97 = 0x0000000A, /* 1080i (1920x1080, 59.94i) */ | ||
318 | vdecRESOLUTION_720p59_94 = 0x0000000B, /* 720p (1280x720, 59.94p) */ | ||
319 | vdecRESOLUTION_SD_DVD = 0x0000000C, /* SD DVD (720x483, 60i) */ | ||
320 | vdecRESOLUTION_480p656 = 0x0000000D, /* 480p (720x480, 60p), output bus width 8 bit, clock 74.25MHz */ | ||
321 | vdecRESOLUTION_1080p23_976 = 0x0000000E, /* 1080p23_976 (1920x1080, 23.976p) */ | ||
322 | vdecRESOLUTION_720p23_976 = 0x0000000F, /* 720p23_976 (1280x720p, 23.976p) */ | ||
323 | vdecRESOLUTION_240p29_97 = 0x00000010, /* 240p (1440x240, 29.97p ) */ | ||
324 | vdecRESOLUTION_240p30 = 0x00000011, /* 240p (1440x240, 30p) */ | ||
325 | vdecRESOLUTION_288p25 = 0x00000012, /* 288p (1440x288p, 25p) */ | ||
326 | vdecRESOLUTION_1080p29_97 = 0x00000013, /* 1080p29_97 (1920x1080, 29.97p) */ | ||
327 | vdecRESOLUTION_1080p30 = 0x00000014, /* 1080p30 (1920x1080, 30p) */ | ||
328 | vdecRESOLUTION_1080p24 = 0x00000015, /* 1080p24 (1920x1080, 24p) */ | ||
329 | vdecRESOLUTION_1080p25 = 0x00000016, /* 1080p25 (1920x1080, 25p) */ | ||
330 | vdecRESOLUTION_720p24 = 0x00000017, /* 720p24 (1280x720, 25p) */ | ||
331 | vdecRESOLUTION_720p29_97 = 0x00000018, /* 720p29.97 (1280x720, 29.97p) */ | ||
332 | vdecRESOLUTION_480p23_976 = 0x00000019, /* 480p23.976 (720*480, 23.976) */ | ||
333 | vdecRESOLUTION_480p29_97 = 0x0000001A, /* 480p29.976 (720*480, 29.97p) */ | ||
334 | vdecRESOLUTION_576p25 = 0x0000001B, /* 576p25 (720*576, 25p) */ | ||
335 | /* For Zero Frame Rate */ | ||
336 | vdecRESOLUTION_480p0 = 0x0000001C, /* 480p (720x480, 0p) */ | ||
337 | vdecRESOLUTION_480i0 = 0x0000001D, /* 480i (720x480, 0i) */ | ||
338 | vdecRESOLUTION_576p0 = 0x0000001E, /* 576p (720x576, 0p) */ | ||
339 | vdecRESOLUTION_720p0 = 0x0000001F, /* 720p (1280x720, 0p) */ | ||
340 | vdecRESOLUTION_1080p0 = 0x00000020, /* 1080p (1920x1080, 0p) */ | ||
341 | vdecRESOLUTION_1080i0 = 0x00000021, /* 1080i (1920x1080, 0i) */ | ||
342 | }; | ||
343 | |||
344 | /* Bit definitions for 'flags' field */ | ||
345 | #define VDEC_FLAG_EOS (0x0004) | ||
346 | |||
347 | #define VDEC_FLAG_FRAME (0x0000) | ||
348 | #define VDEC_FLAG_FIELDPAIR (0x0008) | ||
349 | #define VDEC_FLAG_TOPFIELD (0x0010) | ||
350 | #define VDEC_FLAG_BOTTOMFIELD (0x0018) | ||
351 | |||
352 | #define VDEC_FLAG_PROGRESSIVE_SRC (0x0000) | ||
353 | #define VDEC_FLAG_INTERLACED_SRC (0x0020) | ||
354 | #define VDEC_FLAG_UNKNOWN_SRC (0x0040) | ||
355 | |||
356 | #define VDEC_FLAG_BOTTOM_FIRST (0x0080) | ||
357 | #define VDEC_FLAG_LAST_PICTURE (0x0100) | ||
358 | |||
359 | #define VDEC_FLAG_PICTURE_META_DATA_PRESENT (0x40000) | ||
360 | |||
361 | #endif /* _WIN32 || _WIN64 */ | ||
362 | |||
363 | enum _BC_OUTPUT_FORMAT { | ||
364 | MODE420 = 0x0, | ||
365 | MODE422_YUY2 = 0x1, | ||
366 | MODE422_UYVY = 0x2, | ||
367 | }; | ||
368 | |||
369 | typedef struct _BC_PIC_INFO_BLOCK { | ||
370 | /* Common fields. */ | ||
371 | uint64_t timeStamp; /* Timestamp */ | ||
372 | uint32_t picture_number; /* Ordinal display number */ | ||
373 | uint32_t width; /* pixels */ | ||
374 | uint32_t height; /* pixels */ | ||
375 | uint32_t chroma_format; /* 0x420, 0x422 or 0x444 */ | ||
376 | uint32_t pulldown; | ||
377 | uint32_t flags; | ||
378 | uint32_t frame_rate; | ||
379 | uint32_t aspect_ratio; | ||
380 | uint32_t colour_primaries; | ||
381 | uint32_t picture_meta_payload; | ||
382 | uint32_t sess_num; | ||
383 | uint32_t ycom; | ||
384 | uint32_t custom_aspect_ratio_width_height; | ||
385 | uint32_t n_drop; /* number of non-reference frames remaining to be dropped */ | ||
386 | |||
387 | /* Protocol-specific extensions. */ | ||
388 | union { | ||
389 | BC_PIB_EXT_H264 h264; | ||
390 | BC_PIB_EXT_MPEG mpeg; | ||
391 | BC_PIB_EXT_VC1 vc1; | ||
392 | } other; | ||
393 | |||
394 | } BC_PIC_INFO_BLOCK, *PBC_PIC_INFO_BLOCK; | ||
395 | |||
396 | /*------------------------------------------------------* | ||
397 | * ProcOut Info * | ||
398 | *------------------------------------------------------*/ | ||
399 | /* Optional flags for ProcOut Interface.*/ | ||
400 | enum _POUT_OPTIONAL_IN_FLAGS_{ | ||
401 | /* Flags from App to Device */ | ||
402 | BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */ | ||
403 | BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */ | ||
404 | BC_POUT_FLAGS_SIZE = 0x04, /* Take size information from Application */ | ||
405 | BC_POUT_FLAGS_INTERLACED = 0x08, /* copy only half the bytes */ | ||
406 | BC_POUT_FLAGS_INTERLEAVED = 0x10, /* interleaved frame */ | ||
407 | |||
408 | /* Flags from Device to APP */ | ||
409 | BC_POUT_FLAGS_FMT_CHANGE = 0x10000, /* Data is not VALID when this flag is set */ | ||
410 | BC_POUT_FLAGS_PIB_VALID = 0x20000, /* PIB Information valid */ | ||
411 | BC_POUT_FLAGS_ENCRYPTED = 0x40000, /* Data is encrypted. */ | ||
412 | BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */ | ||
413 | }; | ||
414 | |||
415 | #if defined(__KERNEL__) || defined(__LINUX_USER__) | ||
416 | typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut); | ||
417 | #else | ||
418 | typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, struct _BC_DTS_PROC_OUT *pOut); | ||
419 | #endif | ||
420 | |||
421 | /* Line 21 Closed Caption */ | ||
422 | /* User Data */ | ||
423 | #define MAX_UD_SIZE 1792 /* 1920 - 128 */ | ||
424 | |||
425 | typedef struct _BC_DTS_PROC_OUT { | ||
426 | uint8_t *Ybuff; /* Caller Supplied buffer for Y data */ | ||
427 | uint32_t YbuffSz; /* Caller Supplied Y buffer size */ | ||
428 | uint32_t YBuffDoneSz; /* Transferred Y datasize */ | ||
429 | |||
430 | uint8_t *UVbuff; /* Caller Supplied buffer for UV data */ | ||
431 | uint32_t UVbuffSz; /* Caller Supplied UV buffer size */ | ||
432 | uint32_t UVBuffDoneSz; /* Transferred UV data size */ | ||
433 | |||
434 | uint32_t StrideSz; /* Caller supplied Stride Size */ | ||
435 | uint32_t PoutFlags; /* Call IN Flags */ | ||
436 | |||
437 | uint32_t discCnt; /* Picture discontinuity count */ | ||
438 | |||
439 | BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */ | ||
440 | |||
441 | /* Line 21 Closed Caption */ | ||
442 | /* User Data */ | ||
443 | uint32_t UserDataSz; | ||
444 | uint8_t UserData[MAX_UD_SIZE]; | ||
445 | |||
446 | void *hnd; | ||
447 | dts_pout_callback AppCallBack; | ||
448 | uint8_t DropFrames; | ||
449 | uint8_t b422Mode; /* Picture output Mode */ | ||
450 | uint8_t bPibEnc; /* PIB encrypted */ | ||
451 | uint8_t bRevertScramble; | ||
452 | |||
453 | } BC_DTS_PROC_OUT; | ||
454 | |||
455 | typedef struct _BC_DTS_STATUS { | ||
456 | uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */ | ||
457 | uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */ | ||
458 | uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */ | ||
459 | uint8_t reserved_[1]; | ||
460 | |||
461 | uint32_t FramesDropped; /* Number of frames dropped. (reported by DIL) */ | ||
462 | uint32_t FramesCaptured; /* Number of frames captured. (reported by DIL) */ | ||
463 | uint32_t FramesRepeated; /* Number of frames repeated. (reported by DIL) */ | ||
464 | |||
465 | uint32_t InputCount; /* Times compressed video has been sent to the HW. | ||
466 | * i.e. Successful DtsProcInput() calls (reported by DIL) */ | ||
467 | uint64_t InputTotalSize; /* Amount of compressed video that has been sent to the HW. | ||
468 | * (reported by DIL) */ | ||
469 | uint32_t InputBusyCount; /* Times compressed video has attempted to be sent to the HW | ||
470 | * but the input FIFO was full. (reported by DIL) */ | ||
471 | |||
472 | uint32_t PIBMissCount; /* Amount of times a PIB is invalid. (reported by DIL) */ | ||
473 | |||
474 | uint32_t cpbEmptySize; /* supported only for H.264, specifically changed for | ||
475 | * Adobe. Report size of CPB buffer available. | ||
476 | * Reported by DIL */ | ||
477 | uint64_t NextTimeStamp; /* TimeStamp of the next picture that will be returned | ||
478 | * by a call to ProcOutput. Added for Adobe. Reported | ||
479 | * back from the driver */ | ||
480 | uint8_t reserved__[16]; | ||
481 | |||
482 | } BC_DTS_STATUS; | ||
483 | |||
484 | #define BC_SWAP32(_v) \ | ||
485 | ((((_v) & 0xFF000000)>>24)| \ | ||
486 | (((_v) & 0x00FF0000)>>8)| \ | ||
487 | (((_v) & 0x0000FF00)<<8)| \ | ||
488 | (((_v) & 0x000000FF)<<24)) | ||
489 | |||
490 | #define WM_AGENT_TRAYICON_DECODER_OPEN 10001 | ||
491 | #define WM_AGENT_TRAYICON_DECODER_CLOSE 10002 | ||
492 | #define WM_AGENT_TRAYICON_DECODER_START 10003 | ||
493 | #define WM_AGENT_TRAYICON_DECODER_STOP 10004 | ||
494 | #define WM_AGENT_TRAYICON_DECODER_RUN 10005 | ||
495 | #define WM_AGENT_TRAYICON_DECODER_PAUSE 10006 | ||
496 | |||
497 | |||
498 | #endif /* _BC_DTS_DEFS_H_ */ | ||
diff --git a/drivers/staging/crystalhd/bc_dts_glob_lnx.h b/drivers/staging/crystalhd/bc_dts_glob_lnx.h new file mode 100644 index 000000000000..b3125e3e0372 --- /dev/null +++ b/drivers/staging/crystalhd/bc_dts_glob_lnx.h | |||
@@ -0,0 +1,299 @@ | |||
1 | /******************************************************************** | ||
2 | * Copyright(c) 2006-2009 Broadcom Corporation. | ||
3 | * | ||
4 | * Name: bc_dts_glob_lnx.h | ||
5 | * | ||
6 | * Description: Wrapper to Windows dts_glob.h for Link-Linux usage. | ||
7 | * The idea is to define additional Linux related defs | ||
8 | * in this file to avoid changes to existing Windows | ||
9 | * glob file. | ||
10 | * | ||
11 | * AU | ||
12 | * | ||
13 | * HISTORY: | ||
14 | * | ||
15 | ******************************************************************** | ||
16 | * This header is free software: you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU Lesser General Public License as published | ||
18 | * by the Free Software Foundation, either version 2.1 of the License. | ||
19 | * | ||
20 | * This header is distributed in the hope that it will be useful, | ||
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
23 | * GNU Lesser General Public License for more details. | ||
24 | * You should have received a copy of the GNU Lesser General Public License | ||
25 | * along with this header. If not, see <http://www.gnu.org/licenses/>. | ||
26 | *******************************************************************/ | ||
27 | |||
28 | #ifndef _BC_DTS_GLOB_LNX_H_ | ||
29 | #define _BC_DTS_GLOB_LNX_H_ | ||
30 | |||
31 | #ifdef __LINUX_USER__ | ||
32 | #include <stdio.h> | ||
33 | #include <stdlib.h> | ||
34 | #include <unistd.h> | ||
35 | #include <fcntl.h> | ||
36 | #include <ctype.h> | ||
37 | #include <string.h> | ||
38 | #include <errno.h> | ||
39 | #include <netdb.h> | ||
40 | #include <sys/time.h> | ||
41 | #include <time.h> | ||
42 | #include <arpa/inet.h> | ||
43 | #include <asm/param.h> | ||
44 | #include <linux/ioctl.h> | ||
45 | #include <sys/select.h> | ||
46 | |||
47 | #define DRVIFLIB_INT_API | ||
48 | |||
49 | #endif | ||
50 | |||
51 | #include "bc_dts_defs.h" | ||
52 | #include "bcm_70012_regs.h" /* Link Register defs */ | ||
53 | |||
54 | #define CRYSTALHD_API_NAME "crystalhd" | ||
55 | #define CRYSTALHD_API_DEV_NAME "/dev/crystalhd" | ||
56 | |||
57 | /* | ||
58 | * These are SW stack tunable parameters shared | ||
59 | * between the driver and the application. | ||
60 | */ | ||
61 | enum _BC_DTS_GLOBALS { | ||
62 | BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */ | ||
63 | PCI_CFG_SIZE = 256, /* PCI config size buffer */ | ||
64 | BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */ | ||
65 | BC_LINK_MAX_OPENS = 3, /* Maximum simultaneous opens*/ | ||
66 | BC_LINK_MAX_SGLS = 1024, /* Maximum SG elements 4M/4K */ | ||
67 | BC_TX_LIST_CNT = 2, /* Max Tx DMA Rings */ | ||
68 | BC_RX_LIST_CNT = 8, /* Max Rx DMA Rings*/ | ||
69 | BC_PROC_OUTPUT_TIMEOUT = 3000, /* Milliseconds */ | ||
70 | BC_INFIFO_THRESHOLD = 0x10000, | ||
71 | }; | ||
72 | |||
73 | typedef struct _BC_CMD_REG_ACC { | ||
74 | uint32_t Offset; | ||
75 | uint32_t Value; | ||
76 | } BC_CMD_REG_ACC; | ||
77 | |||
78 | typedef struct _BC_CMD_DEV_MEM { | ||
79 | uint32_t StartOff; | ||
80 | uint32_t NumDwords; | ||
81 | uint32_t Rsrd; | ||
82 | } BC_CMD_DEV_MEM; | ||
83 | |||
84 | /* FW Passthrough command structure */ | ||
85 | enum _bc_fw_cmd_flags { | ||
86 | BC_FW_CMD_FLAGS_NONE = 0, | ||
87 | BC_FW_CMD_PIB_QS = 0x01, | ||
88 | }; | ||
89 | |||
90 | typedef struct _BC_FW_CMD { | ||
91 | uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ]; | ||
92 | uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ]; | ||
93 | uint32_t flags; | ||
94 | uint32_t add_data; | ||
95 | } BC_FW_CMD, *PBC_FW_CMD; | ||
96 | |||
97 | typedef struct _BC_HW_TYPE { | ||
98 | uint16_t PciDevId; | ||
99 | uint16_t PciVenId; | ||
100 | uint8_t HwRev; | ||
101 | uint8_t Align[3]; | ||
102 | } BC_HW_TYPE; | ||
103 | |||
104 | typedef struct _BC_PCI_CFG { | ||
105 | uint32_t Size; | ||
106 | uint32_t Offset; | ||
107 | uint8_t pci_cfg_space[PCI_CFG_SIZE]; | ||
108 | } BC_PCI_CFG; | ||
109 | |||
110 | typedef struct _BC_VERSION_INFO_ { | ||
111 | uint8_t DriverMajor; | ||
112 | uint8_t DriverMinor; | ||
113 | uint16_t DriverRevision; | ||
114 | } BC_VERSION_INFO; | ||
115 | |||
116 | typedef struct _BC_START_RX_CAP_ { | ||
117 | uint32_t Rsrd; | ||
118 | uint32_t StartDeliveryThsh; | ||
119 | uint32_t PauseThsh; | ||
120 | uint32_t ResumeThsh; | ||
121 | } BC_START_RX_CAP; | ||
122 | |||
123 | typedef struct _BC_FLUSH_RX_CAP_ { | ||
124 | uint32_t Rsrd; | ||
125 | uint32_t bDiscardOnly; | ||
126 | } BC_FLUSH_RX_CAP; | ||
127 | |||
128 | typedef struct _BC_DTS_STATS { | ||
129 | uint8_t drvRLL; | ||
130 | uint8_t drvFLL; | ||
131 | uint8_t eosDetected; | ||
132 | uint8_t pwr_state_change; | ||
133 | |||
134 | /* Stats from App */ | ||
135 | uint32_t opFrameDropped; | ||
136 | uint32_t opFrameCaptured; | ||
137 | uint32_t ipSampleCnt; | ||
138 | uint64_t ipTotalSize; | ||
139 | uint32_t reptdFrames; | ||
140 | uint32_t pauseCount; | ||
141 | uint32_t pibMisses; | ||
142 | uint32_t discCounter; | ||
143 | |||
144 | /* Stats from Driver */ | ||
145 | uint32_t TxFifoBsyCnt; | ||
146 | uint32_t intCount; | ||
147 | uint32_t DrvIgnIntrCnt; | ||
148 | uint32_t DrvTotalFrmDropped; | ||
149 | uint32_t DrvTotalHWErrs; | ||
150 | uint32_t DrvTotalPIBFlushCnt; | ||
151 | uint32_t DrvTotalFrmCaptured; | ||
152 | uint32_t DrvPIBMisses; | ||
153 | uint32_t DrvPauseTime; | ||
154 | uint32_t DrvRepeatedFrms; | ||
155 | uint32_t res1[13]; | ||
156 | |||
157 | } BC_DTS_STATS; | ||
158 | |||
159 | typedef struct _BC_PROC_INPUT_ { | ||
160 | uint8_t *pDmaBuff; | ||
161 | uint32_t BuffSz; | ||
162 | uint8_t Mapped; | ||
163 | uint8_t Encrypted; | ||
164 | uint8_t Rsrd[2]; | ||
165 | uint32_t DramOffset; /* For debug use only */ | ||
166 | } BC_PROC_INPUT, *PBC_PROC_INPUT; | ||
167 | |||
168 | typedef struct _BC_DEC_YUV_BUFFS { | ||
169 | uint32_t b422Mode; | ||
170 | uint8_t *YuvBuff; | ||
171 | uint32_t YuvBuffSz; | ||
172 | uint32_t UVbuffOffset; | ||
173 | uint32_t YBuffDoneSz; | ||
174 | uint32_t UVBuffDoneSz; | ||
175 | uint32_t RefCnt; | ||
176 | } BC_DEC_YUV_BUFFS; | ||
177 | |||
178 | enum _DECOUT_COMPLETION_FLAGS{ | ||
179 | COMP_FLAG_NO_INFO = 0x00, | ||
180 | COMP_FLAG_FMT_CHANGE = 0x01, | ||
181 | COMP_FLAG_PIB_VALID = 0x02, | ||
182 | COMP_FLAG_DATA_VALID = 0x04, | ||
183 | COMP_FLAG_DATA_ENC = 0x08, | ||
184 | COMP_FLAG_DATA_BOT = 0x10, | ||
185 | }; | ||
186 | |||
187 | typedef struct _BC_DEC_OUT_BUFF{ | ||
188 | BC_DEC_YUV_BUFFS OutPutBuffs; | ||
189 | BC_PIC_INFO_BLOCK PibInfo; | ||
190 | uint32_t Flags; | ||
191 | uint32_t BadFrCnt; | ||
192 | } BC_DEC_OUT_BUFF; | ||
193 | |||
194 | typedef struct _BC_NOTIFY_MODE { | ||
195 | uint32_t Mode; | ||
196 | uint32_t Rsvr[3]; | ||
197 | } BC_NOTIFY_MODE; | ||
198 | |||
199 | typedef struct _BC_CLOCK { | ||
200 | uint32_t clk; | ||
201 | uint32_t Rsvr[3]; | ||
202 | } BC_CLOCK; | ||
203 | |||
204 | typedef struct _BC_IOCTL_DATA { | ||
205 | BC_STATUS RetSts; | ||
206 | uint32_t IoctlDataSz; | ||
207 | uint32_t Timeout; | ||
208 | union { | ||
209 | BC_CMD_REG_ACC regAcc; | ||
210 | BC_CMD_DEV_MEM devMem; | ||
211 | BC_FW_CMD fwCmd; | ||
212 | BC_HW_TYPE hwType; | ||
213 | BC_PCI_CFG pciCfg; | ||
214 | BC_VERSION_INFO VerInfo; | ||
215 | BC_PROC_INPUT ProcInput; | ||
216 | BC_DEC_YUV_BUFFS RxBuffs; | ||
217 | BC_DEC_OUT_BUFF DecOutData; | ||
218 | BC_START_RX_CAP RxCap; | ||
219 | BC_FLUSH_RX_CAP FlushRxCap; | ||
220 | BC_DTS_STATS drvStat; | ||
221 | BC_NOTIFY_MODE NotifyMode; | ||
222 | BC_CLOCK clockValue; | ||
223 | } u; | ||
224 | struct _BC_IOCTL_DATA *next; | ||
225 | } BC_IOCTL_DATA; | ||
226 | |||
227 | typedef enum _BC_DRV_CMD{ | ||
228 | DRV_CMD_VERSION = 0, /* Get SW version */ | ||
229 | DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */ | ||
230 | DRV_CMD_REG_RD, /* Read Device Register */ | ||
231 | DRV_CMD_REG_WR, /* Write Device Register */ | ||
232 | DRV_CMD_FPGA_RD, /* Read FPGA Register */ | ||
233 | DRV_CMD_FPGA_WR, /* Wrtie FPGA Reister */ | ||
234 | DRV_CMD_MEM_RD, /* Read Device Memory */ | ||
235 | DRV_CMD_MEM_WR, /* Write Device Memory */ | ||
236 | DRV_CMD_RD_PCI_CFG, /* Read PCI Config Space */ | ||
237 | DRV_CMD_WR_PCI_CFG, /* Write the PCI Configuration Space*/ | ||
238 | DRV_CMD_FW_DOWNLOAD, /* Download Firmware */ | ||
239 | DRV_ISSUE_FW_CMD, /* Issue FW Cmd (pass through mode) */ | ||
240 | DRV_CMD_PROC_INPUT, /* Process Input Sample */ | ||
241 | DRV_CMD_ADD_RXBUFFS, /* Add Rx side buffers to driver pool */ | ||
242 | DRV_CMD_FETCH_RXBUFF, /* Get Rx DMAed buffer */ | ||
243 | DRV_CMD_START_RX_CAP, /* Start Rx Buffer Capture */ | ||
244 | DRV_CMD_FLUSH_RX_CAP, /* Stop the capture for now...we will enhance this later*/ | ||
245 | DRV_CMD_GET_DRV_STAT, /* Get Driver Internal Statistics */ | ||
246 | DRV_CMD_RST_DRV_STAT, /* Reset Driver Internal Statistics */ | ||
247 | DRV_CMD_NOTIFY_MODE, /* Notify the Mode to driver in which the application is Operating*/ | ||
248 | DRV_CMD_CHANGE_CLOCK, /* Change the core clock to either save power or improve performance */ | ||
249 | |||
250 | /* MUST be the last one.. */ | ||
251 | DRV_CMD_END, /* End of the List.. */ | ||
252 | } BC_DRV_CMD; | ||
253 | |||
254 | #define BC_IOC_BASE 'b' | ||
255 | #define BC_IOC_VOID _IOC_NONE | ||
256 | #define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type) | ||
257 | #define BC_IOCTL_MB BC_IOCTL_DATA | ||
258 | |||
259 | #define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB) | ||
260 | #define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB) | ||
261 | #define BCM_IOC_REG_RD BC_IOC_IOWR(DRV_CMD_REG_RD, BC_IOCTL_MB) | ||
262 | #define BCM_IOC_REG_WR BC_IOC_IOWR(DRV_CMD_REG_WR, BC_IOCTL_MB) | ||
263 | #define BCM_IOC_MEM_RD BC_IOC_IOWR(DRV_CMD_MEM_RD, BC_IOCTL_MB) | ||
264 | #define BCM_IOC_MEM_WR BC_IOC_IOWR(DRV_CMD_MEM_WR, BC_IOCTL_MB) | ||
265 | #define BCM_IOC_FPGA_RD BC_IOC_IOWR(DRV_CMD_FPGA_RD, BC_IOCTL_MB) | ||
266 | #define BCM_IOC_FPGA_WR BC_IOC_IOWR(DRV_CMD_FPGA_WR, BC_IOCTL_MB) | ||
267 | #define BCM_IOC_RD_PCI_CFG BC_IOC_IOWR(DRV_CMD_RD_PCI_CFG, BC_IOCTL_MB) | ||
268 | #define BCM_IOC_WR_PCI_CFG BC_IOC_IOWR(DRV_CMD_WR_PCI_CFG, BC_IOCTL_MB) | ||
269 | #define BCM_IOC_PROC_INPUT BC_IOC_IOWR(DRV_CMD_PROC_INPUT, BC_IOCTL_MB) | ||
270 | #define BCM_IOC_ADD_RXBUFFS BC_IOC_IOWR(DRV_CMD_ADD_RXBUFFS, BC_IOCTL_MB) | ||
271 | #define BCM_IOC_FETCH_RXBUFF BC_IOC_IOWR(DRV_CMD_FETCH_RXBUFF, BC_IOCTL_MB) | ||
272 | #define BCM_IOC_FW_CMD BC_IOC_IOWR(DRV_ISSUE_FW_CMD, BC_IOCTL_MB) | ||
273 | #define BCM_IOC_START_RX_CAP BC_IOC_IOWR(DRV_CMD_START_RX_CAP, BC_IOCTL_MB) | ||
274 | #define BCM_IOC_FLUSH_RX_CAP BC_IOC_IOWR(DRV_CMD_FLUSH_RX_CAP, BC_IOCTL_MB) | ||
275 | #define BCM_IOC_GET_DRV_STAT BC_IOC_IOWR(DRV_CMD_GET_DRV_STAT, BC_IOCTL_MB) | ||
276 | #define BCM_IOC_RST_DRV_STAT BC_IOC_IOWR(DRV_CMD_RST_DRV_STAT, BC_IOCTL_MB) | ||
277 | #define BCM_IOC_NOTIFY_MODE BC_IOC_IOWR(DRV_CMD_NOTIFY_MODE, BC_IOCTL_MB) | ||
278 | #define BCM_IOC_FW_DOWNLOAD BC_IOC_IOWR(DRV_CMD_FW_DOWNLOAD, BC_IOCTL_MB) | ||
279 | #define BCM_IOC_CHG_CLK BC_IOC_IOWR(DRV_CMD_CHANGE_CLOCK, BC_IOCTL_MB) | ||
280 | #define BCM_IOC_END BC_IOC_VOID | ||
281 | |||
282 | /* Wrapper for main IOCTL data */ | ||
283 | typedef struct _crystalhd_ioctl_data { | ||
284 | BC_IOCTL_DATA udata; /* IOCTL from App..*/ | ||
285 | uint32_t u_id; /* Driver specific user ID */ | ||
286 | uint32_t cmd; /* Cmd ID for driver's use. */ | ||
287 | void *add_cdata; /* Additional command specific data..*/ | ||
288 | uint32_t add_cdata_sz; /* Additional command specific data size */ | ||
289 | struct _crystalhd_ioctl_data *next; /* List/Fifo management */ | ||
290 | } crystalhd_ioctl_data; | ||
291 | |||
292 | |||
293 | enum _crystalhd_kmod_ver{ | ||
294 | crystalhd_kmod_major = 0, | ||
295 | crystalhd_kmod_minor = 9, | ||
296 | crystalhd_kmod_rev = 27, | ||
297 | }; | ||
298 | |||
299 | #endif | ||
diff --git a/drivers/staging/crystalhd/bc_dts_types.h b/drivers/staging/crystalhd/bc_dts_types.h new file mode 100644 index 000000000000..ac0c81717385 --- /dev/null +++ b/drivers/staging/crystalhd/bc_dts_types.h | |||
@@ -0,0 +1,121 @@ | |||
1 | /******************************************************************** | ||
2 | * Copyright(c) 2006-2009 Broadcom Corporation. | ||
3 | * | ||
4 | * Name: bc_dts_types.h | ||
5 | * | ||
6 | * Description: Data types | ||
7 | * | ||
8 | * AU | ||
9 | * | ||
10 | * HISTORY: | ||
11 | * | ||
12 | ******************************************************************** | ||
13 | * This header is free software: you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU Lesser General Public License as published | ||
15 | * by the Free Software Foundation, either version 2.1 of the License. | ||
16 | * | ||
17 | * This header is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU Lesser General Public License for more details. | ||
21 | * You should have received a copy of the GNU Lesser General Public License | ||
22 | * along with this header. If not, see <http://www.gnu.org/licenses/>. | ||
23 | *******************************************************************/ | ||
24 | |||
25 | #ifndef _BC_DTS_TYPES_H_ | ||
26 | #define _BC_DTS_TYPES_H_ | ||
27 | |||
28 | #ifdef __LINUX_USER__ // Don't include these for KERNEL.. | ||
29 | #include <stdint.h> | ||
30 | #endif | ||
31 | |||
32 | #if defined(_WIN64) || defined(_WIN32) | ||
33 | typedef uint32_t U32; | ||
34 | typedef int32_t S32; | ||
35 | typedef uint16_t U16; | ||
36 | typedef int16_t S16; | ||
37 | typedef unsigned char U8; | ||
38 | typedef char S8; | ||
39 | #endif | ||
40 | |||
41 | #ifndef PVOID | ||
42 | typedef void *PVOID; | ||
43 | #endif | ||
44 | |||
45 | #ifndef BOOL | ||
46 | typedef int BOOL; | ||
47 | #endif | ||
48 | |||
49 | #ifdef WIN32 | ||
50 | typedef unsigned __int64 U64; | ||
51 | #elif defined(_WIN64) | ||
52 | typedef uint64_t U64; | ||
53 | #endif | ||
54 | |||
55 | #ifdef _WIN64 | ||
56 | #if !(defined(POINTER_32)) | ||
57 | #define POINTER_32 __ptr32 | ||
58 | #endif | ||
59 | #else /* _WIN32 */ | ||
60 | #define POINTER_32 | ||
61 | #endif | ||
62 | |||
63 | #if defined(__KERNEL__) || defined(__LINUX_USER__) | ||
64 | |||
65 | #ifdef __LINUX_USER__ /* Don't include these for KERNEL */ | ||
66 | typedef uint32_t ULONG; | ||
67 | typedef int32_t LONG; | ||
68 | typedef void *HANDLE; | ||
69 | #ifndef VOID | ||
70 | typedef void VOID; | ||
71 | #endif | ||
72 | typedef void *LPVOID; | ||
73 | typedef uint32_t DWORD; | ||
74 | typedef uint32_t UINT32; | ||
75 | typedef uint32_t *LPDWORD; | ||
76 | typedef unsigned char *PUCHAR; | ||
77 | |||
78 | #ifndef TRUE | ||
79 | #define TRUE 1 | ||
80 | #endif | ||
81 | |||
82 | #ifndef FALSE | ||
83 | #define FALSE 0 | ||
84 | #endif | ||
85 | |||
86 | #define TEXT | ||
87 | |||
88 | #else | ||
89 | |||
90 | /* For Kernel usage.. */ | ||
91 | typedef bool bc_bool_t; | ||
92 | #endif | ||
93 | |||
94 | #else | ||
95 | |||
96 | #ifndef uint64_t | ||
97 | typedef struct _uint64_t { | ||
98 | uint32_t low_dw; | ||
99 | uint32_t hi_dw; | ||
100 | } uint64_t; | ||
101 | #endif | ||
102 | |||
103 | #ifndef int32_t | ||
104 | typedef signed long int32_t; | ||
105 | #endif | ||
106 | |||
107 | #ifndef uint32_t | ||
108 | typedef unsigned long uint32_t; | ||
109 | #endif | ||
110 | |||
111 | #ifndef uint16_t | ||
112 | typedef unsigned short uint16_t; | ||
113 | #endif | ||
114 | |||
115 | #ifndef uint8_t | ||
116 | typedef unsigned char uint8_t; | ||
117 | #endif | ||
118 | #endif | ||
119 | |||
120 | #endif | ||
121 | |||
diff --git a/drivers/staging/crystalhd/bcm_70012_regs.h b/drivers/staging/crystalhd/bcm_70012_regs.h new file mode 100644 index 000000000000..6922f54e432f --- /dev/null +++ b/drivers/staging/crystalhd/bcm_70012_regs.h | |||
@@ -0,0 +1,757 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 1999-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: bcm_70012_regs.h | ||
5 | * | ||
6 | * Description: BCM70012 registers | ||
7 | * | ||
8 | ******************************************************************** | ||
9 | * This header is free software: you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU Lesser General Public License as published | ||
11 | * by the Free Software Foundation, either version 2.1 of the License. | ||
12 | * | ||
13 | * This header is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU Lesser General Public License for more details. | ||
17 | * You should have received a copy of the GNU Lesser General Public License | ||
18 | * along with this header. If not, see <http://www.gnu.org/licenses/>. | ||
19 | ***************************************************************************/ | ||
20 | |||
21 | #ifndef MACFILE_H__ | ||
22 | #define MACFILE_H__ | ||
23 | |||
24 | /** | ||
25 | * m = memory, c = core, r = register, f = field, d = data. | ||
26 | */ | ||
27 | #if !defined(GET_FIELD) && !defined(SET_FIELD) | ||
28 | #define BRCM_ALIGN(c,r,f) c##_##r##_##f##_ALIGN | ||
29 | #define BRCM_BITS(c,r,f) c##_##r##_##f##_BITS | ||
30 | #define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK | ||
31 | #define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT | ||
32 | |||
33 | #define GET_FIELD(m,c,r,f) \ | ||
34 | ((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f)) << BRCM_ALIGN(c,r,f)) | ||
35 | |||
36 | #define SET_FIELD(m,c,r,f,d) \ | ||
37 | ((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d) >> BRCM_ALIGN(c,r,f)) << \ | ||
38 | BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f))) \ | ||
39 | ) | ||
40 | |||
41 | #define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) | ||
42 | #define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) | ||
43 | #define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) | ||
44 | |||
45 | #endif /* GET & SET */ | ||
46 | |||
47 | /**************************************************************************** | ||
48 | * Core Enums. | ||
49 | ***************************************************************************/ | ||
50 | /**************************************************************************** | ||
51 | * Enums: AES_RGR_BRIDGE_RESET_CTRL | ||
52 | ***************************************************************************/ | ||
53 | #define AES_RGR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
54 | #define AES_RGR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
55 | |||
56 | /**************************************************************************** | ||
57 | * Enums: CCE_RGR_BRIDGE_RESET_CTRL | ||
58 | ***************************************************************************/ | ||
59 | #define CCE_RGR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
60 | #define CCE_RGR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
61 | |||
62 | /**************************************************************************** | ||
63 | * Enums: DBU_RGR_BRIDGE_RESET_CTRL | ||
64 | ***************************************************************************/ | ||
65 | #define DBU_RGR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
66 | #define DBU_RGR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
67 | |||
68 | /**************************************************************************** | ||
69 | * Enums: DCI_RGR_BRIDGE_RESET_CTRL | ||
70 | ***************************************************************************/ | ||
71 | #define DCI_RGR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
72 | #define DCI_RGR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
73 | |||
74 | /**************************************************************************** | ||
75 | * Enums: GISB_ARBITER_DEASSERT_ASSERT | ||
76 | ***************************************************************************/ | ||
77 | #define GISB_ARBITER_DEASSERT_ASSERT_DEASSERT 0 | ||
78 | #define GISB_ARBITER_DEASSERT_ASSERT_ASSERT 1 | ||
79 | |||
80 | /**************************************************************************** | ||
81 | * Enums: GISB_ARBITER_UNMASK_MASK | ||
82 | ***************************************************************************/ | ||
83 | #define GISB_ARBITER_UNMASK_MASK_UNMASK 0 | ||
84 | #define GISB_ARBITER_UNMASK_MASK_MASK 1 | ||
85 | |||
86 | /**************************************************************************** | ||
87 | * Enums: GISB_ARBITER_DISABLE_ENABLE | ||
88 | ***************************************************************************/ | ||
89 | #define GISB_ARBITER_DISABLE_ENABLE_DISABLE 0 | ||
90 | #define GISB_ARBITER_DISABLE_ENABLE_ENABLE 1 | ||
91 | |||
92 | /**************************************************************************** | ||
93 | * Enums: I2C_GR_BRIDGE_RESET_CTRL | ||
94 | ***************************************************************************/ | ||
95 | #define I2C_GR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
96 | #define I2C_GR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
97 | |||
98 | /**************************************************************************** | ||
99 | * Enums: MISC_GR_BRIDGE_RESET_CTRL | ||
100 | ***************************************************************************/ | ||
101 | #define MISC_GR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
102 | #define MISC_GR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
103 | |||
104 | /**************************************************************************** | ||
105 | * Enums: OTP_GR_BRIDGE_RESET_CTRL | ||
106 | ***************************************************************************/ | ||
107 | #define OTP_GR_BRIDGE_RESET_CTRL_DEASSERT 0 | ||
108 | #define OTP_GR_BRIDGE_RESET_CTRL_ASSERT 1 | ||
109 | |||
110 | /**************************************************************************** | ||
111 | * BCM70012_TGT_TOP_PCIE_CFG | ||
112 | ***************************************************************************/ | ||
113 | #define PCIE_CFG_DEVICE_VENDOR_ID 0x00000000 /* DEVICE_VENDOR_ID Register */ | ||
114 | #define PCIE_CFG_STATUS_COMMAND 0x00000004 /* STATUS_COMMAND Register */ | ||
115 | #define PCIE_CFG_PCI_CLASSCODE_AND_REVISION_ID 0x00000008 /* PCI_CLASSCODE_AND_REVISION_ID Register */ | ||
116 | #define PCIE_CFG_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE_SIZE 0x0000000c /* BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE_SIZE Register */ | ||
117 | #define PCIE_CFG_BASE_ADDRESS_1 0x00000010 /* BASE_ADDRESS_1 Register */ | ||
118 | #define PCIE_CFG_BASE_ADDRESS_2 0x00000014 /* BASE_ADDRESS_2 Register */ | ||
119 | #define PCIE_CFG_BASE_ADDRESS_3 0x00000018 /* BASE_ADDRESS_3 Register */ | ||
120 | #define PCIE_CFG_BASE_ADDRESS_4 0x0000001c /* BASE_ADDRESS_4 Register */ | ||
121 | #define PCIE_CFG_CARDBUS_CIS_POINTER 0x00000028 /* CARDBUS_CIS_POINTER Register */ | ||
122 | #define PCIE_CFG_SUBSYSTEM_DEVICE_VENDOR_ID 0x0000002c /* SUBSYSTEM_DEVICE_VENDOR_ID Register */ | ||
123 | #define PCIE_CFG_EXPANSION_ROM_BASE_ADDRESS 0x00000030 /* EXPANSION_ROM_BASE_ADDRESS Register */ | ||
124 | #define PCIE_CFG_CAPABILITIES_POINTER 0x00000034 /* CAPABILITIES_POINTER Register */ | ||
125 | #define PCIE_CFG_INTERRUPT 0x0000003c /* INTERRUPT Register */ | ||
126 | #define PCIE_CFG_VPD_CAPABILITIES 0x00000040 /* VPD_CAPABILITIES Register */ | ||
127 | #define PCIE_CFG_VPD_DATA 0x00000044 /* VPD_DATA Register */ | ||
128 | #define PCIE_CFG_POWER_MANAGEMENT_CAPABILITY 0x00000048 /* POWER_MANAGEMENT_CAPABILITY Register */ | ||
129 | #define PCIE_CFG_POWER_MANAGEMENT_CONTROL_STATUS 0x0000004c /* POWER_MANAGEMENT_CONTROL_STATUS Register */ | ||
130 | #define PCIE_CFG_MSI_CAPABILITY_HEADER 0x00000050 /* MSI_CAPABILITY_HEADER Register */ | ||
131 | #define PCIE_CFG_MSI_LOWER_ADDRESS 0x00000054 /* MSI_LOWER_ADDRESS Register */ | ||
132 | #define PCIE_CFG_MSI_UPPER_ADDRESS_REGISTER 0x00000058 /* MSI_UPPER_ADDRESS_REGISTER Register */ | ||
133 | #define PCIE_CFG_MSI_DATA 0x0000005c /* MSI_DATA Register */ | ||
134 | #define PCIE_CFG_BROADCOM_VENDOR_SPECIFIC_CAPABILITY_HEADER 0x00000060 /* BROADCOM_VENDOR_SPECIFIC_CAPABILITY_HEADER Register */ | ||
135 | #define PCIE_CFG_RESET_COUNTERS_INITIAL_VALUES 0x00000064 /* RESET_COUNTERS_INITIAL_VALUES Register */ | ||
136 | #define PCIE_CFG_MISCELLANEOUS_HOST_CONTROL 0x00000068 /* MISCELLANEOUS_HOST_CONTROL Register */ | ||
137 | #define PCIE_CFG_SPARE 0x0000006c /* SPARE Register */ | ||
138 | #define PCIE_CFG_PCI_STATE 0x00000070 /* PCI_STATE Register */ | ||
139 | #define PCIE_CFG_CLOCK_CONTROL 0x00000074 /* CLOCK_CONTROL Register */ | ||
140 | #define PCIE_CFG_REGISTER_BASE 0x00000078 /* REGISTER_BASE Register */ | ||
141 | #define PCIE_CFG_MEMORY_BASE 0x0000007c /* MEMORY_BASE Register */ | ||
142 | #define PCIE_CFG_REGISTER_DATA 0x00000080 /* REGISTER_DATA Register */ | ||
143 | #define PCIE_CFG_MEMORY_DATA 0x00000084 /* MEMORY_DATA Register */ | ||
144 | #define PCIE_CFG_EXPANSION_ROM_BAR_SIZE 0x00000088 /* EXPANSION_ROM_BAR_SIZE Register */ | ||
145 | #define PCIE_CFG_EXPANSION_ROM_ADDRESS 0x0000008c /* EXPANSION_ROM_ADDRESS Register */ | ||
146 | #define PCIE_CFG_EXPANSION_ROM_DATA 0x00000090 /* EXPANSION_ROM_DATA Register */ | ||
147 | #define PCIE_CFG_VPD_INTERFACE 0x00000094 /* VPD_INTERFACE Register */ | ||
148 | #define PCIE_CFG_UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_UPPER 0x00000098 /* UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_UPPER Register */ | ||
149 | #define PCIE_CFG_UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_LOWER 0x0000009c /* UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_LOWER Register */ | ||
150 | #define PCIE_CFG_UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_UPPER 0x000000a0 /* UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_UPPER Register */ | ||
151 | #define PCIE_CFG_UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_LOWER 0x000000a4 /* UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_LOWER Register */ | ||
152 | #define PCIE_CFG_UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_UPPER 0x000000a8 /* UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_UPPER Register */ | ||
153 | #define PCIE_CFG_UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_LOWER 0x000000ac /* UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_LOWER Register */ | ||
154 | #define PCIE_CFG_INT_MAILBOX_UPPER 0x000000b0 /* INT_MAILBOX_UPPER Register */ | ||
155 | #define PCIE_CFG_INT_MAILBOX_LOWER 0x000000b4 /* INT_MAILBOX_LOWER Register */ | ||
156 | #define PCIE_CFG_PRODUCT_ID_AND_ASIC_REVISION 0x000000bc /* PRODUCT_ID_AND_ASIC_REVISION Register */ | ||
157 | #define PCIE_CFG_FUNCTION_EVENT 0x000000c0 /* FUNCTION_EVENT Register */ | ||
158 | #define PCIE_CFG_FUNCTION_EVENT_MASK 0x000000c4 /* FUNCTION_EVENT_MASK Register */ | ||
159 | #define PCIE_CFG_FUNCTION_PRESENT 0x000000c8 /* FUNCTION_PRESENT Register */ | ||
160 | #define PCIE_CFG_PCIE_CAPABILITIES 0x000000cc /* PCIE_CAPABILITIES Register */ | ||
161 | #define PCIE_CFG_DEVICE_CAPABILITIES 0x000000d0 /* DEVICE_CAPABILITIES Register */ | ||
162 | #define PCIE_CFG_DEVICE_STATUS_CONTROL 0x000000d4 /* DEVICE_STATUS_CONTROL Register */ | ||
163 | #define PCIE_CFG_LINK_CAPABILITY 0x000000d8 /* LINK_CAPABILITY Register */ | ||
164 | #define PCIE_CFG_LINK_STATUS_CONTROL 0x000000dc /* LINK_STATUS_CONTROL Register */ | ||
165 | #define PCIE_CFG_DEVICE_CAPABILITIES_2 0x000000f0 /* DEVICE_CAPABILITIES_2 Register */ | ||
166 | #define PCIE_CFG_DEVICE_STATUS_CONTROL_2 0x000000f4 /* DEVICE_STATUS_CONTROL_2 Register */ | ||
167 | #define PCIE_CFG_LINK_CAPABILITIES_2 0x000000f8 /* LINK_CAPABILITIES_2 Register */ | ||
168 | #define PCIE_CFG_LINK_STATUS_CONTROL_2 0x000000fc /* LINK_STATUS_CONTROL_2 Register */ | ||
169 | #define PCIE_CFG_ADVANCED_ERROR_REPORTING_ENHANCED_CAPABILITY_HEADER 0x00000100 /* ADVANCED_ERROR_REPORTING_ENHANCED_CAPABILITY_HEADER Register */ | ||
170 | #define PCIE_CFG_UNCORRECTABLE_ERROR_STATUS 0x00000104 /* UNCORRECTABLE_ERROR_STATUS Register */ | ||
171 | #define PCIE_CFG_UNCORRECTABLE_ERROR_MASK 0x00000108 /* UNCORRECTABLE_ERROR_MASK Register */ | ||
172 | #define PCIE_CFG_UNCORRECTABLE_ERROR_SEVERITY 0x0000010c /* UNCORRECTABLE_ERROR_SEVERITY Register */ | ||
173 | #define PCIE_CFG_CORRECTABLE_ERROR_STATUS 0x00000110 /* CORRECTABLE_ERROR_STATUS Register */ | ||
174 | #define PCIE_CFG_CORRECTABLE_ERROR_MASK 0x00000114 /* CORRECTABLE_ERROR_MASK Register */ | ||
175 | #define PCIE_CFG_ADVANCED_ERROR_CAPABILITIES_AND_CONTROL 0x00000118 /* ADVANCED_ERROR_CAPABILITIES_AND_CONTROL Register */ | ||
176 | #define PCIE_CFG_HEADER_LOG_1 0x0000011c /* HEADER_LOG_1 Register */ | ||
177 | #define PCIE_CFG_HEADER_LOG_2 0x00000120 /* HEADER_LOG_2 Register */ | ||
178 | #define PCIE_CFG_HEADER_LOG_3 0x00000124 /* HEADER_LOG_3 Register */ | ||
179 | #define PCIE_CFG_HEADER_LOG_4 0x00000128 /* HEADER_LOG_4 Register */ | ||
180 | #define PCIE_CFG_VIRTUAL_CHANNEL_ENHANCED_CAPABILITY_HEADER 0x0000013c /* VIRTUAL_CHANNEL_ENHANCED_CAPABILITY_HEADER Register */ | ||
181 | #define PCIE_CFG_PORT_VC_CAPABILITY 0x00000140 /* PORT_VC_CAPABILITY Register */ | ||
182 | #define PCIE_CFG_PORT_VC_CAPABILITY_2 0x00000144 /* PORT_VC_CAPABILITY_2 Register */ | ||
183 | #define PCIE_CFG_PORT_VC_STATUS_CONTROL 0x00000148 /* PORT_VC_STATUS_CONTROL Register */ | ||
184 | #define PCIE_CFG_VC_RESOURCE_CAPABILITY 0x0000014c /* VC_RESOURCE_CAPABILITY Register */ | ||
185 | #define PCIE_CFG_VC_RESOURCE_CONTROL 0x00000150 /* VC_RESOURCE_CONTROL Register */ | ||
186 | #define PCIE_CFG_VC_RESOURCE_STATUS 0x00000154 /* VC_RESOURCE_STATUS Register */ | ||
187 | #define PCIE_CFG_DEVICE_SERIAL_NO_ENHANCED_CAPABILITY_HEADER 0x00000160 /* DEVICE_SERIAL_NO_ENHANCED_CAPABILITY_HEADER Register */ | ||
188 | #define PCIE_CFG_DEVICE_SERIAL_NO_LOWER_DW 0x00000164 /* DEVICE_SERIAL_NO_LOWER_DW Register */ | ||
189 | #define PCIE_CFG_DEVICE_SERIAL_NO_UPPER_DW 0x00000168 /* DEVICE_SERIAL_NO_UPPER_DW Register */ | ||
190 | #define PCIE_CFG_POWER_BUDGETING_ENHANCED_CAPABILITY_HEADER 0x0000016c /* POWER_BUDGETING_ENHANCED_CAPABILITY_HEADER Register */ | ||
191 | #define PCIE_CFG_POWER_BUDGETING_DATA_SELECT 0x00000170 /* POWER_BUDGETING_DATA_SELECT Register */ | ||
192 | #define PCIE_CFG_POWER_BUDGETING_DATA 0x00000174 /* POWER_BUDGETING_DATA Register */ | ||
193 | #define PCIE_CFG_POWER_BUDGETING_CAPABILITY 0x00000178 /* POWER_BUDGETING_CAPABILITY Register */ | ||
194 | #define PCIE_CFG_FIRMWARE_POWER_BUDGETING_2_1 0x0000017c /* FIRMWARE_POWER_BUDGETING_2_1 Register */ | ||
195 | #define PCIE_CFG_FIRMWARE_POWER_BUDGETING_4_3 0x00000180 /* FIRMWARE_POWER_BUDGETING_4_3 Register */ | ||
196 | #define PCIE_CFG_FIRMWARE_POWER_BUDGETING_6_5 0x00000184 /* FIRMWARE_POWER_BUDGETING_6_5 Register */ | ||
197 | #define PCIE_CFG_FIRMWARE_POWER_BUDGETING_8_7 0x00000188 /* FIRMWARE_POWER_BUDGETING_8_7 Register */ | ||
198 | #define PCIE_CFG_PCIE_1_1_ADVISORY_NON_FATAL_ERROR_MASKING 0x0000018c /* PCIE_1_1_ADVISORY_NON_FATAL_ERROR_MASKING Register */ | ||
199 | |||
200 | |||
201 | /**************************************************************************** | ||
202 | * BCM70012_TGT_TOP_PCIE_TL | ||
203 | ***************************************************************************/ | ||
204 | #define PCIE_TL_TL_CONTROL 0x00000400 /* TL_CONTROL Register */ | ||
205 | #define PCIE_TL_TRANSACTION_CONFIGURATION 0x00000404 /* TRANSACTION_CONFIGURATION Register */ | ||
206 | |||
207 | |||
208 | /**************************************************************************** | ||
209 | * BCM70012_TGT_TOP_PCIE_DLL | ||
210 | ***************************************************************************/ | ||
211 | #define PCIE_DLL_DATA_LINK_CONTROL 0x00000500 /* DATA_LINK_CONTROL Register */ | ||
212 | #define PCIE_DLL_DATA_LINK_STATUS 0x00000504 /* DATA_LINK_STATUS Register */ | ||
213 | |||
214 | |||
215 | /**************************************************************************** | ||
216 | * BCM70012_TGT_TOP_INTR | ||
217 | ***************************************************************************/ | ||
218 | #define INTR_INTR_STATUS 0x00000700 /* Interrupt Status Register */ | ||
219 | #define INTR_INTR_SET 0x00000704 /* Interrupt Set Register */ | ||
220 | #define INTR_INTR_CLR_REG 0x00000708 /* Interrupt Clear Register */ | ||
221 | #define INTR_INTR_MSK_STS_REG 0x0000070c /* Interrupt Mask Status Register */ | ||
222 | #define INTR_INTR_MSK_SET_REG 0x00000710 /* Interrupt Mask Set Register */ | ||
223 | #define INTR_INTR_MSK_CLR_REG 0x00000714 /* Interrupt Mask Clear Register */ | ||
224 | #define INTR_EOI_CTRL 0x00000720 /* End of interrupt control register */ | ||
225 | |||
226 | |||
227 | /**************************************************************************** | ||
228 | * BCM70012_MISC_TOP_MISC1 | ||
229 | ***************************************************************************/ | ||
230 | #define MISC1_TX_FIRST_DESC_L_ADDR_LIST0 0x00000c00 /* Tx DMA Descriptor List0 First Descriptor lower Address */ | ||
231 | #define MISC1_TX_FIRST_DESC_U_ADDR_LIST0 0x00000c04 /* Tx DMA Descriptor List0 First Descriptor Upper Address */ | ||
232 | #define MISC1_TX_FIRST_DESC_L_ADDR_LIST1 0x00000c08 /* Tx DMA Descriptor List1 First Descriptor Lower Address */ | ||
233 | #define MISC1_TX_FIRST_DESC_U_ADDR_LIST1 0x00000c0c /* Tx DMA Descriptor List1 First Descriptor Upper Address */ | ||
234 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS 0x00000c10 /* Tx DMA Software Descriptor List Control and Status */ | ||
235 | #define MISC1_TX_DMA_ERROR_STATUS 0x00000c18 /* Tx DMA Engine Error Status */ | ||
236 | #define MISC1_TX_DMA_LIST0_CUR_DESC_L_ADDR 0x00000c1c /* Tx DMA List0 Current Descriptor Lower Address */ | ||
237 | #define MISC1_TX_DMA_LIST0_CUR_DESC_U_ADDR 0x00000c20 /* Tx DMA List0 Current Descriptor Upper Address */ | ||
238 | #define MISC1_TX_DMA_LIST0_CUR_BYTE_CNT_REM 0x00000c24 /* Tx DMA List0 Current Descriptor Upper Address */ | ||
239 | #define MISC1_TX_DMA_LIST1_CUR_DESC_L_ADDR 0x00000c28 /* Tx DMA List1 Current Descriptor Lower Address */ | ||
240 | #define MISC1_TX_DMA_LIST1_CUR_DESC_U_ADDR 0x00000c2c /* Tx DMA List1 Current Descriptor Upper Address */ | ||
241 | #define MISC1_TX_DMA_LIST1_CUR_BYTE_CNT_REM 0x00000c30 /* Tx DMA List1 Current Descriptor Upper Address */ | ||
242 | #define MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0 0x00000c34 /* Y Rx Descriptor List0 First Descriptor Lower Address */ | ||
243 | #define MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST0 0x00000c38 /* Y Rx Descriptor List0 First Descriptor Upper Address */ | ||
244 | #define MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1 0x00000c3c /* Y Rx Descriptor List1 First Descriptor Lower Address */ | ||
245 | #define MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST1 0x00000c40 /* Y Rx Descriptor List1 First Descriptor Upper Address */ | ||
246 | #define MISC1_Y_RX_SW_DESC_LIST_CTRL_STS 0x00000c44 /* Y Rx Software Descriptor List Control and Status */ | ||
247 | #define MISC1_Y_RX_ERROR_STATUS 0x00000c4c /* Y Rx Engine Error Status */ | ||
248 | #define MISC1_Y_RX_LIST0_CUR_DESC_L_ADDR 0x00000c50 /* Y Rx List0 Current Descriptor Lower Address */ | ||
249 | #define MISC1_Y_RX_LIST0_CUR_DESC_U_ADDR 0x00000c54 /* Y Rx List0 Current Descriptor Upper Address */ | ||
250 | #define MISC1_Y_RX_LIST0_CUR_BYTE_CNT 0x00000c58 /* Y Rx List0 Current Descriptor Byte Count */ | ||
251 | #define MISC1_Y_RX_LIST1_CUR_DESC_L_ADDR 0x00000c5c /* Y Rx List1 Current Descriptor Lower address */ | ||
252 | #define MISC1_Y_RX_LIST1_CUR_DESC_U_ADDR 0x00000c60 /* Y Rx List1 Current Descriptor Upper address */ | ||
253 | #define MISC1_Y_RX_LIST1_CUR_BYTE_CNT 0x00000c64 /* Y Rx List1 Current Descriptor Byte Count */ | ||
254 | #define MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0 0x00000c68 /* UV Rx Descriptor List0 First Descriptor lower Address */ | ||
255 | #define MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST0 0x00000c6c /* UV Rx Descriptor List0 First Descriptor Upper Address */ | ||
256 | #define MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1 0x00000c70 /* UV Rx Descriptor List1 First Descriptor Lower Address */ | ||
257 | #define MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST1 0x00000c74 /* UV Rx Descriptor List1 First Descriptor Upper Address */ | ||
258 | #define MISC1_UV_RX_SW_DESC_LIST_CTRL_STS 0x00000c78 /* UV Rx Software Descriptor List Control and Status */ | ||
259 | #define MISC1_UV_RX_ERROR_STATUS 0x00000c7c /* UV Rx Engine Error Status */ | ||
260 | #define MISC1_UV_RX_LIST0_CUR_DESC_L_ADDR 0x00000c80 /* UV Rx List0 Current Descriptor Lower Address */ | ||
261 | #define MISC1_UV_RX_LIST0_CUR_DESC_U_ADDR 0x00000c84 /* UV Rx List0 Current Descriptor Upper Address */ | ||
262 | #define MISC1_UV_RX_LIST0_CUR_BYTE_CNT 0x00000c88 /* UV Rx List0 Current Descriptor Byte Count */ | ||
263 | #define MISC1_UV_RX_LIST1_CUR_DESC_L_ADDR 0x00000c8c /* UV Rx List1 Current Descriptor Lower Address */ | ||
264 | #define MISC1_UV_RX_LIST1_CUR_DESC_U_ADDR 0x00000c90 /* UV Rx List1 Current Descriptor Upper Address */ | ||
265 | #define MISC1_UV_RX_LIST1_CUR_BYTE_CNT 0x00000c94 /* UV Rx List1 Current Descriptor Byte Count */ | ||
266 | #define MISC1_DMA_DEBUG_OPTIONS_REG 0x00000c98 /* DMA Debug Options Register */ | ||
267 | #define MISC1_READ_CHANNEL_ERROR_STATUS 0x00000c9c /* Read Channel Error Status */ | ||
268 | #define MISC1_PCIE_DMA_CTRL 0x00000ca0 /* PCIE DMA Control Register */ | ||
269 | |||
270 | |||
271 | /**************************************************************************** | ||
272 | * BCM70012_MISC_TOP_MISC2 | ||
273 | ***************************************************************************/ | ||
274 | #define MISC2_GLOBAL_CTRL 0x00000d00 /* Global Control Register */ | ||
275 | #define MISC2_INTERNAL_STATUS 0x00000d04 /* Internal Status Register */ | ||
276 | #define MISC2_INTERNAL_STATUS_MUX_CTRL 0x00000d08 /* Internal Debug Mux Control */ | ||
277 | #define MISC2_DEBUG_FIFO_LENGTH 0x00000d0c /* Debug FIFO Length */ | ||
278 | |||
279 | |||
280 | /**************************************************************************** | ||
281 | * BCM70012_MISC_TOP_MISC3 | ||
282 | ***************************************************************************/ | ||
283 | #define MISC3_RESET_CTRL 0x00000e00 /* Reset Control Register */ | ||
284 | #define MISC3_BIST_CTRL 0x00000e04 /* BIST Control Register */ | ||
285 | #define MISC3_BIST_STATUS 0x00000e08 /* BIST Status Register */ | ||
286 | #define MISC3_RX_CHECKSUM 0x00000e0c /* Receive Checksum */ | ||
287 | #define MISC3_TX_CHECKSUM 0x00000e10 /* Transmit Checksum */ | ||
288 | #define MISC3_ECO_CTRL_CORE 0x00000e14 /* ECO Core Reset Control Register */ | ||
289 | #define MISC3_CSI_TEST_CTRL 0x00000e18 /* CSI Test Control Register */ | ||
290 | #define MISC3_HD_DVI_TEST_CTRL 0x00000e1c /* HD DVI Test Control Register */ | ||
291 | |||
292 | |||
293 | /**************************************************************************** | ||
294 | * BCM70012_MISC_TOP_MISC_PERST | ||
295 | ***************************************************************************/ | ||
296 | #define MISC_PERST_ECO_CTRL_PERST 0x00000e80 /* ECO PCIE Reset Control Register */ | ||
297 | #define MISC_PERST_DECODER_CTRL 0x00000e84 /* Decoder Control Register */ | ||
298 | #define MISC_PERST_CCE_STATUS 0x00000e88 /* Config Copy Engine Status */ | ||
299 | #define MISC_PERST_PCIE_DEBUG 0x00000e8c /* PCIE Debug Control Register */ | ||
300 | #define MISC_PERST_PCIE_DEBUG_STATUS 0x00000e90 /* PCIE Debug Status Register */ | ||
301 | #define MISC_PERST_VREG_CTRL 0x00000e94 /* Voltage Regulator Control Register */ | ||
302 | #define MISC_PERST_MEM_CTRL 0x00000e98 /* Memory Control Register */ | ||
303 | #define MISC_PERST_CLOCK_CTRL 0x00000e9c /* Clock Control Register */ | ||
304 | |||
305 | |||
306 | /**************************************************************************** | ||
307 | * BCM70012_MISC_TOP_GISB_ARBITER | ||
308 | ***************************************************************************/ | ||
309 | #define GISB_ARBITER_REVISION 0x00000f00 /* GISB ARBITER REVISION */ | ||
310 | #define GISB_ARBITER_SCRATCH 0x00000f04 /* GISB ARBITER Scratch Register */ | ||
311 | #define GISB_ARBITER_REQ_MASK 0x00000f08 /* GISB ARBITER Master Request Mask Register */ | ||
312 | #define GISB_ARBITER_TIMER 0x00000f0c /* GISB ARBITER Timer Value Register */ | ||
313 | |||
314 | |||
315 | /**************************************************************************** | ||
316 | * BCM70012_OTP_TOP_OTP | ||
317 | ***************************************************************************/ | ||
318 | #define OTP_CONFIG_INFO 0x00001400 /* OTP Configuration Register */ | ||
319 | #define OTP_CMD 0x00001404 /* OTP Command Register */ | ||
320 | #define OTP_STATUS 0x00001408 /* OTP Status Register */ | ||
321 | #define OTP_CONTENT_MISC 0x0000140c /* Content : Miscellaneous Register */ | ||
322 | #define OTP_CONTENT_AES_0 0x00001410 /* Content : AES Key 0 Register */ | ||
323 | #define OTP_CONTENT_AES_1 0x00001414 /* Content : AES Key 1 Register */ | ||
324 | #define OTP_CONTENT_AES_2 0x00001418 /* Content : AES Key 2 Register */ | ||
325 | #define OTP_CONTENT_AES_3 0x0000141c /* Content : AES Key 3 Register */ | ||
326 | #define OTP_CONTENT_SHA_0 0x00001420 /* Content : SHA Key 0 Register */ | ||
327 | #define OTP_CONTENT_SHA_1 0x00001424 /* Content : SHA Key 1 Register */ | ||
328 | #define OTP_CONTENT_SHA_2 0x00001428 /* Content : SHA Key 2 Register */ | ||
329 | #define OTP_CONTENT_SHA_3 0x0000142c /* Content : SHA Key 3 Register */ | ||
330 | #define OTP_CONTENT_SHA_4 0x00001430 /* Content : SHA Key 4 Register */ | ||
331 | #define OTP_CONTENT_SHA_5 0x00001434 /* Content : SHA Key 5 Register */ | ||
332 | #define OTP_CONTENT_SHA_6 0x00001438 /* Content : SHA Key 6 Register */ | ||
333 | #define OTP_CONTENT_SHA_7 0x0000143c /* Content : SHA Key 7 Register */ | ||
334 | #define OTP_CONTENT_CHECKSUM 0x00001440 /* Content : Checksum Register */ | ||
335 | #define OTP_PROG_CTRL 0x00001444 /* Programming Control Register */ | ||
336 | #define OTP_PROG_STATUS 0x00001448 /* Programming Status Register */ | ||
337 | #define OTP_PROG_PULSE 0x0000144c /* Program Pulse Width Register */ | ||
338 | #define OTP_VERIFY_PULSE 0x00001450 /* Verify Pulse Width Register */ | ||
339 | #define OTP_PROG_MASK 0x00001454 /* Program Mask Register */ | ||
340 | #define OTP_DATA_INPUT 0x00001458 /* Data Input Register */ | ||
341 | #define OTP_DATA_OUTPUT 0x0000145c /* Data Output Register */ | ||
342 | |||
343 | |||
344 | /**************************************************************************** | ||
345 | * BCM70012_AES_TOP_AES | ||
346 | ***************************************************************************/ | ||
347 | #define AES_CONFIG_INFO 0x00001800 /* AES Configuration Information Register */ | ||
348 | #define AES_CMD 0x00001804 /* AES Command Register */ | ||
349 | #define AES_STATUS 0x00001808 /* AES Status Register */ | ||
350 | #define AES_EEPROM_CONFIG 0x0000180c /* AES EEPROM Configuration Register */ | ||
351 | #define AES_EEPROM_DATA_0 0x00001810 /* AES EEPROM Data Register 0 */ | ||
352 | #define AES_EEPROM_DATA_1 0x00001814 /* AES EEPROM Data Register 1 */ | ||
353 | #define AES_EEPROM_DATA_2 0x00001818 /* AES EEPROM Data Register 2 */ | ||
354 | #define AES_EEPROM_DATA_3 0x0000181c /* AES EEPROM Data Register 3 */ | ||
355 | |||
356 | |||
357 | /**************************************************************************** | ||
358 | * BCM70012_DCI_TOP_DCI | ||
359 | ***************************************************************************/ | ||
360 | #define DCI_CMD 0x00001c00 /* DCI Command Register */ | ||
361 | #define DCI_STATUS 0x00001c04 /* DCI Status Register */ | ||
362 | #define DCI_DRAM_BASE_ADDR 0x00001c08 /* DRAM Base Address Register */ | ||
363 | #define DCI_FIRMWARE_ADDR 0x00001c0c /* Firmware Address Register */ | ||
364 | #define DCI_FIRMWARE_DATA 0x00001c10 /* Firmware Data Register */ | ||
365 | #define DCI_SIGNATURE_DATA_0 0x00001c14 /* Signature Data Register 0 */ | ||
366 | #define DCI_SIGNATURE_DATA_1 0x00001c18 /* Signature Data Register 1 */ | ||
367 | #define DCI_SIGNATURE_DATA_2 0x00001c1c /* Signature Data Register 2 */ | ||
368 | #define DCI_SIGNATURE_DATA_3 0x00001c20 /* Signature Data Register 3 */ | ||
369 | #define DCI_SIGNATURE_DATA_4 0x00001c24 /* Signature Data Register 4 */ | ||
370 | #define DCI_SIGNATURE_DATA_5 0x00001c28 /* Signature Data Register 5 */ | ||
371 | #define DCI_SIGNATURE_DATA_6 0x00001c2c /* Signature Data Register 6 */ | ||
372 | #define DCI_SIGNATURE_DATA_7 0x00001c30 /* Signature Data Register 7 */ | ||
373 | |||
374 | |||
375 | /**************************************************************************** | ||
376 | * BCM70012_TGT_TOP_INTR | ||
377 | ***************************************************************************/ | ||
378 | /**************************************************************************** | ||
379 | * INTR :: INTR_STATUS | ||
380 | ***************************************************************************/ | ||
381 | /* INTR :: INTR_STATUS :: reserved0 [31:26] */ | ||
382 | #define INTR_INTR_STATUS_reserved0_MASK 0xfc000000 | ||
383 | #define INTR_INTR_STATUS_reserved0_ALIGN 0 | ||
384 | #define INTR_INTR_STATUS_reserved0_BITS 6 | ||
385 | #define INTR_INTR_STATUS_reserved0_SHIFT 26 | ||
386 | |||
387 | /* INTR :: INTR_STATUS :: PCIE_TGT_CA_ATTN [25:25] */ | ||
388 | #define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_MASK 0x02000000 | ||
389 | #define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_ALIGN 0 | ||
390 | #define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_BITS 1 | ||
391 | #define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_SHIFT 25 | ||
392 | |||
393 | /* INTR :: INTR_STATUS :: PCIE_TGT_UR_ATTN [24:24] */ | ||
394 | #define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_MASK 0x01000000 | ||
395 | #define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_ALIGN 0 | ||
396 | #define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_BITS 1 | ||
397 | #define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_SHIFT 24 | ||
398 | |||
399 | /* INTR :: INTR_STATUS :: reserved1 [23:14] */ | ||
400 | #define INTR_INTR_STATUS_reserved1_MASK 0x00ffc000 | ||
401 | #define INTR_INTR_STATUS_reserved1_ALIGN 0 | ||
402 | #define INTR_INTR_STATUS_reserved1_BITS 10 | ||
403 | #define INTR_INTR_STATUS_reserved1_SHIFT 14 | ||
404 | |||
405 | /* INTR :: INTR_STATUS :: L1_UV_RX_DMA_ERR_INTR [13:13] */ | ||
406 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_MASK 0x00002000 | ||
407 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_ALIGN 0 | ||
408 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_BITS 1 | ||
409 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_SHIFT 13 | ||
410 | |||
411 | /* INTR :: INTR_STATUS :: L1_UV_RX_DMA_DONE_INTR [12:12] */ | ||
412 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK 0x00001000 | ||
413 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_ALIGN 0 | ||
414 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_BITS 1 | ||
415 | #define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_SHIFT 12 | ||
416 | |||
417 | /* INTR :: INTR_STATUS :: L1_Y_RX_DMA_ERR_INTR [11:11] */ | ||
418 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_MASK 0x00000800 | ||
419 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_ALIGN 0 | ||
420 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_BITS 1 | ||
421 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_SHIFT 11 | ||
422 | |||
423 | /* INTR :: INTR_STATUS :: L1_Y_RX_DMA_DONE_INTR [10:10] */ | ||
424 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK 0x00000400 | ||
425 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_ALIGN 0 | ||
426 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_BITS 1 | ||
427 | #define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_SHIFT 10 | ||
428 | |||
429 | /* INTR :: INTR_STATUS :: L1_TX_DMA_ERR_INTR [09:09] */ | ||
430 | #define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK 0x00000200 | ||
431 | #define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_ALIGN 0 | ||
432 | #define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_BITS 1 | ||
433 | #define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_SHIFT 9 | ||
434 | |||
435 | /* INTR :: INTR_STATUS :: L1_TX_DMA_DONE_INTR [08:08] */ | ||
436 | #define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_MASK 0x00000100 | ||
437 | #define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_ALIGN 0 | ||
438 | #define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_BITS 1 | ||
439 | #define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_SHIFT 8 | ||
440 | |||
441 | /* INTR :: INTR_STATUS :: reserved2 [07:06] */ | ||
442 | #define INTR_INTR_STATUS_reserved2_MASK 0x000000c0 | ||
443 | #define INTR_INTR_STATUS_reserved2_ALIGN 0 | ||
444 | #define INTR_INTR_STATUS_reserved2_BITS 2 | ||
445 | #define INTR_INTR_STATUS_reserved2_SHIFT 6 | ||
446 | |||
447 | /* INTR :: INTR_STATUS :: L0_UV_RX_DMA_ERR_INTR [05:05] */ | ||
448 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_MASK 0x00000020 | ||
449 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_ALIGN 0 | ||
450 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_BITS 1 | ||
451 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_SHIFT 5 | ||
452 | |||
453 | /* INTR :: INTR_STATUS :: L0_UV_RX_DMA_DONE_INTR [04:04] */ | ||
454 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK 0x00000010 | ||
455 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_ALIGN 0 | ||
456 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_BITS 1 | ||
457 | #define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_SHIFT 4 | ||
458 | |||
459 | /* INTR :: INTR_STATUS :: L0_Y_RX_DMA_ERR_INTR [03:03] */ | ||
460 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_MASK 0x00000008 | ||
461 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_ALIGN 0 | ||
462 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_BITS 1 | ||
463 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_SHIFT 3 | ||
464 | |||
465 | /* INTR :: INTR_STATUS :: L0_Y_RX_DMA_DONE_INTR [02:02] */ | ||
466 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK 0x00000004 | ||
467 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_ALIGN 0 | ||
468 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_BITS 1 | ||
469 | #define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_SHIFT 2 | ||
470 | |||
471 | /* INTR :: INTR_STATUS :: L0_TX_DMA_ERR_INTR [01:01] */ | ||
472 | #define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK 0x00000002 | ||
473 | #define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_ALIGN 0 | ||
474 | #define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_BITS 1 | ||
475 | #define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_SHIFT 1 | ||
476 | |||
477 | /* INTR :: INTR_STATUS :: L0_TX_DMA_DONE_INTR [00:00] */ | ||
478 | #define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_MASK 0x00000001 | ||
479 | #define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_ALIGN 0 | ||
480 | #define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_BITS 1 | ||
481 | #define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_SHIFT 0 | ||
482 | |||
483 | |||
484 | /**************************************************************************** | ||
485 | * MISC1 :: TX_SW_DESC_LIST_CTRL_STS | ||
486 | ***************************************************************************/ | ||
487 | /* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: reserved0 [31:04] */ | ||
488 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_MASK 0xfffffff0 | ||
489 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_ALIGN 0 | ||
490 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_BITS 28 | ||
491 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_SHIFT 4 | ||
492 | |||
493 | /* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: DMA_DATA_SERV_PTR [03:03] */ | ||
494 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_MASK 0x00000008 | ||
495 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_ALIGN 0 | ||
496 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_BITS 1 | ||
497 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_SHIFT 3 | ||
498 | |||
499 | /* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: DESC_SERV_PTR [02:02] */ | ||
500 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_MASK 0x00000004 | ||
501 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_ALIGN 0 | ||
502 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_BITS 1 | ||
503 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_SHIFT 2 | ||
504 | |||
505 | /* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: TX_DMA_HALT_ON_ERROR [01:01] */ | ||
506 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_MASK 0x00000002 | ||
507 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_ALIGN 0 | ||
508 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_BITS 1 | ||
509 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_SHIFT 1 | ||
510 | |||
511 | /* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: TX_DMA_RUN_STOP [00:00] */ | ||
512 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_MASK 0x00000001 | ||
513 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_ALIGN 0 | ||
514 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_BITS 1 | ||
515 | #define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_SHIFT 0 | ||
516 | |||
517 | |||
518 | /**************************************************************************** | ||
519 | * MISC1 :: TX_DMA_ERROR_STATUS | ||
520 | ***************************************************************************/ | ||
521 | /* MISC1 :: TX_DMA_ERROR_STATUS :: reserved0 [31:10] */ | ||
522 | #define MISC1_TX_DMA_ERROR_STATUS_reserved0_MASK 0xfffffc00 | ||
523 | #define MISC1_TX_DMA_ERROR_STATUS_reserved0_ALIGN 0 | ||
524 | #define MISC1_TX_DMA_ERROR_STATUS_reserved0_BITS 22 | ||
525 | #define MISC1_TX_DMA_ERROR_STATUS_reserved0_SHIFT 10 | ||
526 | |||
527 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_DESC_TX_ABORT_ERRORS [09:09] */ | ||
528 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200 | ||
529 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
530 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_BITS 1 | ||
531 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9 | ||
532 | |||
533 | /* MISC1 :: TX_DMA_ERROR_STATUS :: reserved1 [08:08] */ | ||
534 | #define MISC1_TX_DMA_ERROR_STATUS_reserved1_MASK 0x00000100 | ||
535 | #define MISC1_TX_DMA_ERROR_STATUS_reserved1_ALIGN 0 | ||
536 | #define MISC1_TX_DMA_ERROR_STATUS_reserved1_BITS 1 | ||
537 | #define MISC1_TX_DMA_ERROR_STATUS_reserved1_SHIFT 8 | ||
538 | |||
539 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_DESC_TX_ABORT_ERRORS [07:07] */ | ||
540 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080 | ||
541 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
542 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_BITS 1 | ||
543 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7 | ||
544 | |||
545 | /* MISC1 :: TX_DMA_ERROR_STATUS :: reserved2 [06:06] */ | ||
546 | #define MISC1_TX_DMA_ERROR_STATUS_reserved2_MASK 0x00000040 | ||
547 | #define MISC1_TX_DMA_ERROR_STATUS_reserved2_ALIGN 0 | ||
548 | #define MISC1_TX_DMA_ERROR_STATUS_reserved2_BITS 1 | ||
549 | #define MISC1_TX_DMA_ERROR_STATUS_reserved2_SHIFT 6 | ||
550 | |||
551 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_DMA_DATA_TX_ABORT_ERRORS [05:05] */ | ||
552 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_MASK 0x00000020 | ||
553 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_ALIGN 0 | ||
554 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_BITS 1 | ||
555 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_SHIFT 5 | ||
556 | |||
557 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_FIFO_FULL_ERRORS [04:04] */ | ||
558 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK 0x00000010 | ||
559 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_ALIGN 0 | ||
560 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_BITS 1 | ||
561 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_SHIFT 4 | ||
562 | |||
563 | /* MISC1 :: TX_DMA_ERROR_STATUS :: reserved3 [03:03] */ | ||
564 | #define MISC1_TX_DMA_ERROR_STATUS_reserved3_MASK 0x00000008 | ||
565 | #define MISC1_TX_DMA_ERROR_STATUS_reserved3_ALIGN 0 | ||
566 | #define MISC1_TX_DMA_ERROR_STATUS_reserved3_BITS 1 | ||
567 | #define MISC1_TX_DMA_ERROR_STATUS_reserved3_SHIFT 3 | ||
568 | |||
569 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_DMA_DATA_TX_ABORT_ERRORS [02:02] */ | ||
570 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_MASK 0x00000004 | ||
571 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_ALIGN 0 | ||
572 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_BITS 1 | ||
573 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_SHIFT 2 | ||
574 | |||
575 | /* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_FIFO_FULL_ERRORS [01:01] */ | ||
576 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK 0x00000002 | ||
577 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_ALIGN 0 | ||
578 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_BITS 1 | ||
579 | #define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_SHIFT 1 | ||
580 | |||
581 | /* MISC1 :: TX_DMA_ERROR_STATUS :: reserved4 [00:00] */ | ||
582 | #define MISC1_TX_DMA_ERROR_STATUS_reserved4_MASK 0x00000001 | ||
583 | #define MISC1_TX_DMA_ERROR_STATUS_reserved4_ALIGN 0 | ||
584 | #define MISC1_TX_DMA_ERROR_STATUS_reserved4_BITS 1 | ||
585 | #define MISC1_TX_DMA_ERROR_STATUS_reserved4_SHIFT 0 | ||
586 | |||
587 | |||
588 | /**************************************************************************** | ||
589 | * MISC1 :: Y_RX_ERROR_STATUS | ||
590 | ***************************************************************************/ | ||
591 | /* MISC1 :: Y_RX_ERROR_STATUS :: reserved0 [31:14] */ | ||
592 | #define MISC1_Y_RX_ERROR_STATUS_reserved0_MASK 0xffffc000 | ||
593 | #define MISC1_Y_RX_ERROR_STATUS_reserved0_ALIGN 0 | ||
594 | #define MISC1_Y_RX_ERROR_STATUS_reserved0_BITS 18 | ||
595 | #define MISC1_Y_RX_ERROR_STATUS_reserved0_SHIFT 14 | ||
596 | |||
597 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_UNDERRUN_ERROR [13:13] */ | ||
598 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK 0x00002000 | ||
599 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_ALIGN 0 | ||
600 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_BITS 1 | ||
601 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_SHIFT 13 | ||
602 | |||
603 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_OVERRUN_ERROR [12:12] */ | ||
604 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK 0x00001000 | ||
605 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_ALIGN 0 | ||
606 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_BITS 1 | ||
607 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_SHIFT 12 | ||
608 | |||
609 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_UNDERRUN_ERROR [11:11] */ | ||
610 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK 0x00000800 | ||
611 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_ALIGN 0 | ||
612 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_BITS 1 | ||
613 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_SHIFT 11 | ||
614 | |||
615 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_OVERRUN_ERROR [10:10] */ | ||
616 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK 0x00000400 | ||
617 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_ALIGN 0 | ||
618 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_BITS 1 | ||
619 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_SHIFT 10 | ||
620 | |||
621 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_DESC_TX_ABORT_ERRORS [09:09] */ | ||
622 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200 | ||
623 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
624 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_BITS 1 | ||
625 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9 | ||
626 | |||
627 | /* MISC1 :: Y_RX_ERROR_STATUS :: reserved1 [08:08] */ | ||
628 | #define MISC1_Y_RX_ERROR_STATUS_reserved1_MASK 0x00000100 | ||
629 | #define MISC1_Y_RX_ERROR_STATUS_reserved1_ALIGN 0 | ||
630 | #define MISC1_Y_RX_ERROR_STATUS_reserved1_BITS 1 | ||
631 | #define MISC1_Y_RX_ERROR_STATUS_reserved1_SHIFT 8 | ||
632 | |||
633 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_DESC_TX_ABORT_ERRORS [07:07] */ | ||
634 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080 | ||
635 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
636 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_BITS 1 | ||
637 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7 | ||
638 | |||
639 | /* MISC1 :: Y_RX_ERROR_STATUS :: reserved2 [06:05] */ | ||
640 | #define MISC1_Y_RX_ERROR_STATUS_reserved2_MASK 0x00000060 | ||
641 | #define MISC1_Y_RX_ERROR_STATUS_reserved2_ALIGN 0 | ||
642 | #define MISC1_Y_RX_ERROR_STATUS_reserved2_BITS 2 | ||
643 | #define MISC1_Y_RX_ERROR_STATUS_reserved2_SHIFT 5 | ||
644 | |||
645 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_FIFO_FULL_ERRORS [04:04] */ | ||
646 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK 0x00000010 | ||
647 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_ALIGN 0 | ||
648 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_BITS 1 | ||
649 | #define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_SHIFT 4 | ||
650 | |||
651 | /* MISC1 :: Y_RX_ERROR_STATUS :: reserved3 [03:02] */ | ||
652 | #define MISC1_Y_RX_ERROR_STATUS_reserved3_MASK 0x0000000c | ||
653 | #define MISC1_Y_RX_ERROR_STATUS_reserved3_ALIGN 0 | ||
654 | #define MISC1_Y_RX_ERROR_STATUS_reserved3_BITS 2 | ||
655 | #define MISC1_Y_RX_ERROR_STATUS_reserved3_SHIFT 2 | ||
656 | |||
657 | /* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_FIFO_FULL_ERRORS [01:01] */ | ||
658 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK 0x00000002 | ||
659 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_ALIGN 0 | ||
660 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_BITS 1 | ||
661 | #define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_SHIFT 1 | ||
662 | |||
663 | /* MISC1 :: Y_RX_ERROR_STATUS :: reserved4 [00:00] */ | ||
664 | #define MISC1_Y_RX_ERROR_STATUS_reserved4_MASK 0x00000001 | ||
665 | #define MISC1_Y_RX_ERROR_STATUS_reserved4_ALIGN 0 | ||
666 | #define MISC1_Y_RX_ERROR_STATUS_reserved4_BITS 1 | ||
667 | #define MISC1_Y_RX_ERROR_STATUS_reserved4_SHIFT 0 | ||
668 | |||
669 | |||
670 | /**************************************************************************** | ||
671 | * MISC1 :: UV_RX_ERROR_STATUS | ||
672 | ***************************************************************************/ | ||
673 | /* MISC1 :: UV_RX_ERROR_STATUS :: reserved0 [31:14] */ | ||
674 | #define MISC1_UV_RX_ERROR_STATUS_reserved0_MASK 0xffffc000 | ||
675 | #define MISC1_UV_RX_ERROR_STATUS_reserved0_ALIGN 0 | ||
676 | #define MISC1_UV_RX_ERROR_STATUS_reserved0_BITS 18 | ||
677 | #define MISC1_UV_RX_ERROR_STATUS_reserved0_SHIFT 14 | ||
678 | |||
679 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_UNDERRUN_ERROR [13:13] */ | ||
680 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK 0x00002000 | ||
681 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_ALIGN 0 | ||
682 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_BITS 1 | ||
683 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_SHIFT 13 | ||
684 | |||
685 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_OVERRUN_ERROR [12:12] */ | ||
686 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK 0x00001000 | ||
687 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_ALIGN 0 | ||
688 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_BITS 1 | ||
689 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_SHIFT 12 | ||
690 | |||
691 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_UNDERRUN_ERROR [11:11] */ | ||
692 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK 0x00000800 | ||
693 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_ALIGN 0 | ||
694 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_BITS 1 | ||
695 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_SHIFT 11 | ||
696 | |||
697 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_OVERRUN_ERROR [10:10] */ | ||
698 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK 0x00000400 | ||
699 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_ALIGN 0 | ||
700 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_BITS 1 | ||
701 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_SHIFT 10 | ||
702 | |||
703 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_DESC_TX_ABORT_ERRORS [09:09] */ | ||
704 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200 | ||
705 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
706 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_BITS 1 | ||
707 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9 | ||
708 | |||
709 | /* MISC1 :: UV_RX_ERROR_STATUS :: reserved1 [08:08] */ | ||
710 | #define MISC1_UV_RX_ERROR_STATUS_reserved1_MASK 0x00000100 | ||
711 | #define MISC1_UV_RX_ERROR_STATUS_reserved1_ALIGN 0 | ||
712 | #define MISC1_UV_RX_ERROR_STATUS_reserved1_BITS 1 | ||
713 | #define MISC1_UV_RX_ERROR_STATUS_reserved1_SHIFT 8 | ||
714 | |||
715 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_DESC_TX_ABORT_ERRORS [07:07] */ | ||
716 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080 | ||
717 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0 | ||
718 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_BITS 1 | ||
719 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7 | ||
720 | |||
721 | /* MISC1 :: UV_RX_ERROR_STATUS :: reserved2 [06:05] */ | ||
722 | #define MISC1_UV_RX_ERROR_STATUS_reserved2_MASK 0x00000060 | ||
723 | #define MISC1_UV_RX_ERROR_STATUS_reserved2_ALIGN 0 | ||
724 | #define MISC1_UV_RX_ERROR_STATUS_reserved2_BITS 2 | ||
725 | #define MISC1_UV_RX_ERROR_STATUS_reserved2_SHIFT 5 | ||
726 | |||
727 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_FIFO_FULL_ERRORS [04:04] */ | ||
728 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK 0x00000010 | ||
729 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_ALIGN 0 | ||
730 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_BITS 1 | ||
731 | #define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_SHIFT 4 | ||
732 | |||
733 | /* MISC1 :: UV_RX_ERROR_STATUS :: reserved3 [03:02] */ | ||
734 | #define MISC1_UV_RX_ERROR_STATUS_reserved3_MASK 0x0000000c | ||
735 | #define MISC1_UV_RX_ERROR_STATUS_reserved3_ALIGN 0 | ||
736 | #define MISC1_UV_RX_ERROR_STATUS_reserved3_BITS 2 | ||
737 | #define MISC1_UV_RX_ERROR_STATUS_reserved3_SHIFT 2 | ||
738 | |||
739 | /* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_FIFO_FULL_ERRORS [01:01] */ | ||
740 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK 0x00000002 | ||
741 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_ALIGN 0 | ||
742 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_BITS 1 | ||
743 | #define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_SHIFT 1 | ||
744 | |||
745 | /* MISC1 :: UV_RX_ERROR_STATUS :: reserved4 [00:00] */ | ||
746 | #define MISC1_UV_RX_ERROR_STATUS_reserved4_MASK 0x00000001 | ||
747 | #define MISC1_UV_RX_ERROR_STATUS_reserved4_ALIGN 0 | ||
748 | #define MISC1_UV_RX_ERROR_STATUS_reserved4_BITS 1 | ||
749 | #define MISC1_UV_RX_ERROR_STATUS_reserved4_SHIFT 0 | ||
750 | |||
751 | /**************************************************************************** | ||
752 | * Datatype Definitions. | ||
753 | ***************************************************************************/ | ||
754 | #endif /* #ifndef MACFILE_H__ */ | ||
755 | |||
756 | /* End of File */ | ||
757 | |||
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c b/drivers/staging/crystalhd/crystalhd_cmds.c new file mode 100644 index 000000000000..26145a8d0f78 --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_cmds.c | |||
@@ -0,0 +1,1058 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_cmds . c | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70010 Linux driver user command interfaces. | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #include "crystalhd_cmds.h" | ||
28 | #include "crystalhd_hw.h" | ||
29 | |||
30 | static struct crystalhd_user *bc_cproc_get_uid(struct crystalhd_cmd *ctx) | ||
31 | { | ||
32 | struct crystalhd_user *user = NULL; | ||
33 | int i; | ||
34 | |||
35 | for (i = 0; i < BC_LINK_MAX_OPENS; i++) { | ||
36 | if (!ctx->user[i].in_use) { | ||
37 | user = &ctx->user[i]; | ||
38 | break; | ||
39 | } | ||
40 | } | ||
41 | |||
42 | return user; | ||
43 | } | ||
44 | |||
45 | static int bc_cproc_get_user_count(struct crystalhd_cmd *ctx) | ||
46 | { | ||
47 | int i, count = 0; | ||
48 | |||
49 | for (i = 0; i < BC_LINK_MAX_OPENS; i++) { | ||
50 | if (ctx->user[i].in_use) | ||
51 | count++; | ||
52 | } | ||
53 | |||
54 | return count; | ||
55 | } | ||
56 | |||
57 | static void bc_cproc_mark_pwr_state(struct crystalhd_cmd *ctx) | ||
58 | { | ||
59 | int i; | ||
60 | |||
61 | for (i = 0; i < BC_LINK_MAX_OPENS; i++) { | ||
62 | if (!ctx->user[i].in_use) | ||
63 | continue; | ||
64 | if (ctx->user[i].mode == DTS_DIAG_MODE || | ||
65 | ctx->user[i].mode == DTS_PLAYBACK_MODE) { | ||
66 | ctx->pwr_state_change = 1; | ||
67 | break; | ||
68 | } | ||
69 | } | ||
70 | } | ||
71 | |||
72 | static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, | ||
73 | crystalhd_ioctl_data *idata) | ||
74 | { | ||
75 | int rc = 0, i = 0; | ||
76 | |||
77 | if (!ctx || !idata) { | ||
78 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
79 | return BC_STS_INV_ARG; | ||
80 | } | ||
81 | |||
82 | if (ctx->user[idata->u_id].mode != DTS_MODE_INV) { | ||
83 | BCMLOG_ERR("Close the handle first..\n"); | ||
84 | return BC_STS_ERR_USAGE; | ||
85 | } | ||
86 | if (idata->udata.u.NotifyMode.Mode == DTS_MONITOR_MODE) { | ||
87 | ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode; | ||
88 | return BC_STS_SUCCESS; | ||
89 | } | ||
90 | if (ctx->state != BC_LINK_INVALID) { | ||
91 | BCMLOG_ERR("Link invalid state %d \n", ctx->state); | ||
92 | return BC_STS_ERR_USAGE; | ||
93 | } | ||
94 | /* Check for duplicate playback sessions..*/ | ||
95 | for (i = 0; i < BC_LINK_MAX_OPENS; i++) { | ||
96 | if (ctx->user[i].mode == DTS_DIAG_MODE || | ||
97 | ctx->user[i].mode == DTS_PLAYBACK_MODE) { | ||
98 | BCMLOG_ERR("multiple playback sessions are not " | ||
99 | "supported..\n"); | ||
100 | return BC_STS_ERR_USAGE; | ||
101 | } | ||
102 | } | ||
103 | ctx->cin_wait_exit = 0; | ||
104 | ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode; | ||
105 | /* Setup mmap pool for uaddr sgl mapping..*/ | ||
106 | rc = crystalhd_create_dio_pool(ctx->adp, BC_LINK_MAX_SGLS); | ||
107 | if (rc) | ||
108 | return BC_STS_ERROR; | ||
109 | |||
110 | /* Setup Hardware DMA rings */ | ||
111 | return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx); | ||
112 | } | ||
113 | |||
114 | static BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx, | ||
115 | crystalhd_ioctl_data *idata) | ||
116 | { | ||
117 | |||
118 | if (!ctx || !idata) { | ||
119 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
120 | return BC_STS_INV_ARG; | ||
121 | } | ||
122 | idata->udata.u.VerInfo.DriverMajor = crystalhd_kmod_major; | ||
123 | idata->udata.u.VerInfo.DriverMinor = crystalhd_kmod_minor; | ||
124 | idata->udata.u.VerInfo.DriverRevision = crystalhd_kmod_rev; | ||
125 | return BC_STS_SUCCESS; | ||
126 | } | ||
127 | |||
128 | |||
129 | static BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | ||
130 | { | ||
131 | if (!ctx || !idata) { | ||
132 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
133 | return BC_STS_INV_ARG; | ||
134 | } | ||
135 | |||
136 | crystalhd_pci_cfg_rd(ctx->adp, 0, 2, | ||
137 | (uint32_t *)&idata->udata.u.hwType.PciVenId); | ||
138 | crystalhd_pci_cfg_rd(ctx->adp, 2, 2, | ||
139 | (uint32_t *)&idata->udata.u.hwType.PciDevId); | ||
140 | crystalhd_pci_cfg_rd(ctx->adp, 8, 1, | ||
141 | (uint32_t *)&idata->udata.u.hwType.HwRev); | ||
142 | |||
143 | return BC_STS_SUCCESS; | ||
144 | } | ||
145 | |||
146 | static BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx, | ||
147 | crystalhd_ioctl_data *idata) | ||
148 | { | ||
149 | if (!ctx || !idata) | ||
150 | return BC_STS_INV_ARG; | ||
151 | idata->udata.u.regAcc.Value = bc_dec_reg_rd(ctx->adp, | ||
152 | idata->udata.u.regAcc.Offset); | ||
153 | return BC_STS_SUCCESS; | ||
154 | } | ||
155 | |||
156 | static BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx, | ||
157 | crystalhd_ioctl_data *idata) | ||
158 | { | ||
159 | if (!ctx || !idata) | ||
160 | return BC_STS_INV_ARG; | ||
161 | |||
162 | bc_dec_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset, | ||
163 | idata->udata.u.regAcc.Value); | ||
164 | |||
165 | return BC_STS_SUCCESS; | ||
166 | } | ||
167 | |||
168 | static BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx, | ||
169 | crystalhd_ioctl_data *idata) | ||
170 | { | ||
171 | if (!ctx || !idata) | ||
172 | return BC_STS_INV_ARG; | ||
173 | |||
174 | idata->udata.u.regAcc.Value = crystalhd_reg_rd(ctx->adp, | ||
175 | idata->udata.u.regAcc.Offset); | ||
176 | return BC_STS_SUCCESS; | ||
177 | } | ||
178 | |||
179 | static BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx, | ||
180 | crystalhd_ioctl_data *idata) | ||
181 | { | ||
182 | if (!ctx || !idata) | ||
183 | return BC_STS_INV_ARG; | ||
184 | |||
185 | crystalhd_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset, | ||
186 | idata->udata.u.regAcc.Value); | ||
187 | |||
188 | return BC_STS_SUCCESS; | ||
189 | } | ||
190 | |||
191 | static BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx, | ||
192 | crystalhd_ioctl_data *idata) | ||
193 | { | ||
194 | BC_STATUS sts = BC_STS_SUCCESS; | ||
195 | |||
196 | if (!ctx || !idata || !idata->add_cdata) | ||
197 | return BC_STS_INV_ARG; | ||
198 | |||
199 | if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) { | ||
200 | BCMLOG_ERR("insufficient buffer\n"); | ||
201 | return BC_STS_INV_ARG; | ||
202 | } | ||
203 | sts = crystalhd_mem_rd(ctx->adp, idata->udata.u.devMem.StartOff, | ||
204 | idata->udata.u.devMem.NumDwords, | ||
205 | (uint32_t *)idata->add_cdata); | ||
206 | return sts; | ||
207 | |||
208 | } | ||
209 | |||
210 | static BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx, | ||
211 | crystalhd_ioctl_data *idata) | ||
212 | { | ||
213 | BC_STATUS sts = BC_STS_SUCCESS; | ||
214 | |||
215 | if (!ctx || !idata || !idata->add_cdata) | ||
216 | return BC_STS_INV_ARG; | ||
217 | |||
218 | if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) { | ||
219 | BCMLOG_ERR("insufficient buffer\n"); | ||
220 | return BC_STS_INV_ARG; | ||
221 | } | ||
222 | |||
223 | sts = crystalhd_mem_wr(ctx->adp, idata->udata.u.devMem.StartOff, | ||
224 | idata->udata.u.devMem.NumDwords, | ||
225 | (uint32_t *)idata->add_cdata); | ||
226 | return sts; | ||
227 | } | ||
228 | |||
229 | static BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx, | ||
230 | crystalhd_ioctl_data *idata) | ||
231 | { | ||
232 | uint32_t ix, cnt, off, len; | ||
233 | BC_STATUS sts = BC_STS_SUCCESS; | ||
234 | uint32_t *temp; | ||
235 | |||
236 | if (!ctx || !idata) | ||
237 | return BC_STS_INV_ARG; | ||
238 | |||
239 | temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space; | ||
240 | off = idata->udata.u.pciCfg.Offset; | ||
241 | len = idata->udata.u.pciCfg.Size; | ||
242 | |||
243 | if (len <= 4) | ||
244 | return crystalhd_pci_cfg_rd(ctx->adp, off, len, temp); | ||
245 | |||
246 | /* Truncate to dword alignment..*/ | ||
247 | len = 4; | ||
248 | cnt = idata->udata.u.pciCfg.Size / len; | ||
249 | for (ix = 0; ix < cnt; ix++) { | ||
250 | sts = crystalhd_pci_cfg_rd(ctx->adp, off, len, &temp[ix]); | ||
251 | if (sts != BC_STS_SUCCESS) { | ||
252 | BCMLOG_ERR("config read : %d\n", sts); | ||
253 | return sts; | ||
254 | } | ||
255 | off += len; | ||
256 | } | ||
257 | |||
258 | return sts; | ||
259 | } | ||
260 | |||
261 | static BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx, | ||
262 | crystalhd_ioctl_data *idata) | ||
263 | { | ||
264 | uint32_t ix, cnt, off, len; | ||
265 | BC_STATUS sts = BC_STS_SUCCESS; | ||
266 | uint32_t *temp; | ||
267 | |||
268 | if (!ctx || !idata) | ||
269 | return BC_STS_INV_ARG; | ||
270 | |||
271 | temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space; | ||
272 | off = idata->udata.u.pciCfg.Offset; | ||
273 | len = idata->udata.u.pciCfg.Size; | ||
274 | |||
275 | if (len <= 4) | ||
276 | return crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[0]); | ||
277 | |||
278 | /* Truncate to dword alignment..*/ | ||
279 | len = 4; | ||
280 | cnt = idata->udata.u.pciCfg.Size / len; | ||
281 | for (ix = 0; ix < cnt; ix++) { | ||
282 | sts = crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[ix]); | ||
283 | if (sts != BC_STS_SUCCESS) { | ||
284 | BCMLOG_ERR("config write : %d\n", sts); | ||
285 | return sts; | ||
286 | } | ||
287 | off += len; | ||
288 | } | ||
289 | |||
290 | return sts; | ||
291 | } | ||
292 | |||
293 | static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, | ||
294 | crystalhd_ioctl_data *idata) | ||
295 | { | ||
296 | BC_STATUS sts = BC_STS_SUCCESS; | ||
297 | |||
298 | if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) { | ||
299 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
300 | return BC_STS_INV_ARG; | ||
301 | } | ||
302 | |||
303 | if (ctx->state != BC_LINK_INVALID) { | ||
304 | BCMLOG_ERR("Link invalid state %d \n", ctx->state); | ||
305 | return BC_STS_ERR_USAGE; | ||
306 | } | ||
307 | |||
308 | sts = crystalhd_download_fw(ctx->adp, (uint8_t *)idata->add_cdata, | ||
309 | idata->add_cdata_sz); | ||
310 | |||
311 | if (sts != BC_STS_SUCCESS) { | ||
312 | BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts); | ||
313 | } else | ||
314 | ctx->state |= BC_LINK_INIT; | ||
315 | |||
316 | return sts; | ||
317 | } | ||
318 | |||
319 | /* | ||
320 | * We use the FW_CMD interface to sync up playback state with application | ||
321 | * and firmware. This function will perform the required pre and post | ||
322 | * processing of the Firmware commands. | ||
323 | * | ||
324 | * Pause - | ||
325 | * Disable capture after decoder pause. | ||
326 | * Resume - | ||
327 | * First enable capture and issue decoder resume command. | ||
328 | * Flush - | ||
329 | * Abort pending input transfers and issue decoder flush command. | ||
330 | * | ||
331 | */ | ||
332 | static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | ||
333 | { | ||
334 | BC_STATUS sts; | ||
335 | uint32_t *cmd; | ||
336 | |||
337 | if (!(ctx->state & BC_LINK_INIT)) { | ||
338 | BCMLOG_ERR("Link invalid state %d \n", ctx->state); | ||
339 | return BC_STS_ERR_USAGE; | ||
340 | } | ||
341 | |||
342 | cmd = idata->udata.u.fwCmd.cmd; | ||
343 | |||
344 | /* Pre-Process */ | ||
345 | if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) { | ||
346 | if (!cmd[3]) { | ||
347 | ctx->state &= ~BC_LINK_PAUSED; | ||
348 | crystalhd_hw_unpause(&ctx->hw_ctx); | ||
349 | } | ||
350 | } else if (cmd[0] == eCMD_C011_DEC_CHAN_FLUSH) { | ||
351 | BCMLOG(BCMLOG_INFO, "Flush issued\n"); | ||
352 | if (cmd[3]) | ||
353 | ctx->cin_wait_exit = 1; | ||
354 | } | ||
355 | |||
356 | sts = crystalhd_do_fw_cmd(&ctx->hw_ctx, &idata->udata.u.fwCmd); | ||
357 | |||
358 | if (sts != BC_STS_SUCCESS) { | ||
359 | BCMLOG(BCMLOG_INFO, "fw cmd %x failed\n", cmd[0]); | ||
360 | return sts; | ||
361 | } | ||
362 | |||
363 | /* Post-Process */ | ||
364 | if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) { | ||
365 | if (cmd[3]) { | ||
366 | ctx->state |= BC_LINK_PAUSED; | ||
367 | crystalhd_hw_pause(&ctx->hw_ctx); | ||
368 | } | ||
369 | } | ||
370 | |||
371 | return sts; | ||
372 | } | ||
373 | |||
374 | static void bc_proc_in_completion(crystalhd_dio_req *dio_hnd, | ||
375 | wait_queue_head_t *event, BC_STATUS sts) | ||
376 | { | ||
377 | if (!dio_hnd || !event) { | ||
378 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
379 | return; | ||
380 | } | ||
381 | if (sts == BC_STS_IO_USER_ABORT) | ||
382 | return; | ||
383 | |||
384 | dio_hnd->uinfo.comp_sts = sts; | ||
385 | dio_hnd->uinfo.ev_sts = 1; | ||
386 | crystalhd_set_event(event); | ||
387 | } | ||
388 | |||
389 | static BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx) | ||
390 | { | ||
391 | wait_queue_head_t sleep_ev; | ||
392 | int rc = 0; | ||
393 | |||
394 | if (ctx->state & BC_LINK_SUSPEND) | ||
395 | return BC_STS_IO_USER_ABORT; | ||
396 | |||
397 | if (ctx->cin_wait_exit) { | ||
398 | ctx->cin_wait_exit = 0; | ||
399 | return BC_STS_CMD_CANCELLED; | ||
400 | } | ||
401 | crystalhd_create_event(&sleep_ev); | ||
402 | crystalhd_wait_on_event(&sleep_ev, 0, 100, rc, 0); | ||
403 | if (rc == -EINTR) | ||
404 | return BC_STS_IO_USER_ABORT; | ||
405 | |||
406 | return BC_STS_SUCCESS; | ||
407 | } | ||
408 | |||
409 | static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, | ||
410 | crystalhd_ioctl_data *idata, | ||
411 | crystalhd_dio_req *dio) | ||
412 | { | ||
413 | uint32_t tx_listid = 0; | ||
414 | BC_STATUS sts = BC_STS_SUCCESS; | ||
415 | wait_queue_head_t event; | ||
416 | int rc = 0; | ||
417 | |||
418 | if (!ctx || !idata || !dio) { | ||
419 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
420 | return BC_STS_INV_ARG; | ||
421 | } | ||
422 | |||
423 | crystalhd_create_event(&event); | ||
424 | |||
425 | ctx->tx_list_id = 0; | ||
426 | /* msleep_interruptible(2000); */ | ||
427 | sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio, bc_proc_in_completion, | ||
428 | &event, &tx_listid, | ||
429 | idata->udata.u.ProcInput.Encrypted); | ||
430 | |||
431 | while (sts == BC_STS_BUSY) { | ||
432 | sts = bc_cproc_codein_sleep(ctx); | ||
433 | if (sts != BC_STS_SUCCESS) | ||
434 | break; | ||
435 | sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio, | ||
436 | bc_proc_in_completion, | ||
437 | &event, &tx_listid, | ||
438 | idata->udata.u.ProcInput.Encrypted); | ||
439 | } | ||
440 | if (sts != BC_STS_SUCCESS) { | ||
441 | BCMLOG(BCMLOG_DBG, "_hw_txdma returning sts:%d\n", sts); | ||
442 | return sts; | ||
443 | } | ||
444 | if (ctx->cin_wait_exit) | ||
445 | ctx->cin_wait_exit = 0; | ||
446 | |||
447 | ctx->tx_list_id = tx_listid; | ||
448 | |||
449 | /* _post() succeeded.. wait for the completion. */ | ||
450 | crystalhd_wait_on_event(&event, (dio->uinfo.ev_sts), 3000, rc, 0); | ||
451 | ctx->tx_list_id = 0; | ||
452 | if (!rc) { | ||
453 | return dio->uinfo.comp_sts; | ||
454 | } else if (rc == -EBUSY) { | ||
455 | BCMLOG(BCMLOG_DBG, "_tx_post() T/O \n"); | ||
456 | sts = BC_STS_TIMEOUT; | ||
457 | } else if (rc == -EINTR) { | ||
458 | BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n"); | ||
459 | sts = BC_STS_IO_USER_ABORT; | ||
460 | } else { | ||
461 | sts = BC_STS_IO_ERROR; | ||
462 | } | ||
463 | |||
464 | /* We are cancelling the IO from the same context as the _post(). | ||
465 | * so no need to wait on the event again.. the return itself | ||
466 | * ensures the release of our resources. | ||
467 | */ | ||
468 | crystalhd_hw_cancel_tx(&ctx->hw_ctx, tx_listid); | ||
469 | |||
470 | return sts; | ||
471 | } | ||
472 | |||
473 | /* Helper function to check on user buffers */ | ||
474 | static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, | ||
475 | uint32_t uv_off, bool en_422) | ||
476 | { | ||
477 | if (!ubuff || !ub_sz) { | ||
478 | BCMLOG_ERR("%s->Invalid Arg %p %x\n", | ||
479 | ((pin) ? "TX" : "RX"), ubuff, ub_sz); | ||
480 | return BC_STS_INV_ARG; | ||
481 | } | ||
482 | |||
483 | /* Check for alignment */ | ||
484 | if (((uintptr_t)ubuff) & 0x03) { | ||
485 | BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p \n", | ||
486 | ((pin) ? "TX" : "RX"), ubuff); | ||
487 | return BC_STS_NOT_IMPL; | ||
488 | } | ||
489 | if (pin) | ||
490 | return BC_STS_SUCCESS; | ||
491 | |||
492 | if (!en_422 && !uv_off) { | ||
493 | BCMLOG_ERR("Need UV offset for 420 mode.\n"); | ||
494 | return BC_STS_INV_ARG; | ||
495 | } | ||
496 | |||
497 | if (en_422 && uv_off) { | ||
498 | BCMLOG_ERR("UV offset in 422 mode ??\n"); | ||
499 | return BC_STS_INV_ARG; | ||
500 | } | ||
501 | |||
502 | return BC_STS_SUCCESS; | ||
503 | } | ||
504 | |||
505 | static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | ||
506 | { | ||
507 | void *ubuff; | ||
508 | uint32_t ub_sz; | ||
509 | crystalhd_dio_req *dio_hnd = NULL; | ||
510 | BC_STATUS sts = BC_STS_SUCCESS; | ||
511 | |||
512 | if (!ctx || !idata) { | ||
513 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
514 | return BC_STS_INV_ARG; | ||
515 | } | ||
516 | |||
517 | ubuff = idata->udata.u.ProcInput.pDmaBuff; | ||
518 | ub_sz = idata->udata.u.ProcInput.BuffSz; | ||
519 | |||
520 | sts = bc_cproc_check_inbuffs(1, ubuff, ub_sz, 0, 0); | ||
521 | if (sts != BC_STS_SUCCESS) | ||
522 | return sts; | ||
523 | |||
524 | sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd); | ||
525 | if (sts != BC_STS_SUCCESS) { | ||
526 | BCMLOG_ERR("dio map - %d \n", sts); | ||
527 | return sts; | ||
528 | } | ||
529 | |||
530 | if (!dio_hnd) | ||
531 | return BC_STS_ERROR; | ||
532 | |||
533 | sts = bc_cproc_hw_txdma(ctx, idata, dio_hnd); | ||
534 | |||
535 | crystalhd_unmap_dio(ctx->adp, dio_hnd); | ||
536 | |||
537 | return sts; | ||
538 | } | ||
539 | |||
540 | static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, | ||
541 | crystalhd_ioctl_data *idata) | ||
542 | { | ||
543 | void *ubuff; | ||
544 | uint32_t ub_sz, uv_off; | ||
545 | bool en_422; | ||
546 | crystalhd_dio_req *dio_hnd = NULL; | ||
547 | BC_STATUS sts = BC_STS_SUCCESS; | ||
548 | |||
549 | if (!ctx || !idata) { | ||
550 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
551 | return BC_STS_INV_ARG; | ||
552 | } | ||
553 | |||
554 | ubuff = idata->udata.u.RxBuffs.YuvBuff; | ||
555 | ub_sz = idata->udata.u.RxBuffs.YuvBuffSz; | ||
556 | uv_off = idata->udata.u.RxBuffs.UVbuffOffset; | ||
557 | en_422 = idata->udata.u.RxBuffs.b422Mode; | ||
558 | |||
559 | sts = bc_cproc_check_inbuffs(0, ubuff, ub_sz, uv_off, en_422); | ||
560 | if (sts != BC_STS_SUCCESS) | ||
561 | return sts; | ||
562 | |||
563 | sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off, | ||
564 | en_422, 0, &dio_hnd); | ||
565 | if (sts != BC_STS_SUCCESS) { | ||
566 | BCMLOG_ERR("dio map - %d \n", sts); | ||
567 | return sts; | ||
568 | } | ||
569 | |||
570 | if (!dio_hnd) | ||
571 | return BC_STS_ERROR; | ||
572 | |||
573 | sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio_hnd, (ctx->state == BC_LINK_READY)); | ||
574 | if ((sts != BC_STS_SUCCESS) && (sts != BC_STS_BUSY)) { | ||
575 | crystalhd_unmap_dio(ctx->adp, dio_hnd); | ||
576 | return sts; | ||
577 | } | ||
578 | |||
579 | return BC_STS_SUCCESS; | ||
580 | } | ||
581 | |||
582 | static BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx, | ||
583 | crystalhd_dio_req *dio) | ||
584 | { | ||
585 | BC_STATUS sts = BC_STS_SUCCESS; | ||
586 | |||
587 | sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0); | ||
588 | if (sts != BC_STS_SUCCESS) | ||
589 | return sts; | ||
590 | |||
591 | ctx->state |= BC_LINK_FMT_CHG; | ||
592 | if (ctx->state == BC_LINK_READY) | ||
593 | sts = crystalhd_hw_start_capture(&ctx->hw_ctx); | ||
594 | |||
595 | return sts; | ||
596 | } | ||
597 | |||
598 | static BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx, | ||
599 | crystalhd_ioctl_data *idata) | ||
600 | { | ||
601 | crystalhd_dio_req *dio = NULL; | ||
602 | BC_STATUS sts = BC_STS_SUCCESS; | ||
603 | BC_DEC_OUT_BUFF *frame; | ||
604 | |||
605 | if (!ctx || !idata) { | ||
606 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
607 | return BC_STS_INV_ARG; | ||
608 | } | ||
609 | |||
610 | if (!(ctx->state & BC_LINK_CAP_EN)) { | ||
611 | BCMLOG(BCMLOG_DBG, "Capture not enabled..%x\n", ctx->state); | ||
612 | return BC_STS_ERR_USAGE; | ||
613 | } | ||
614 | |||
615 | frame = &idata->udata.u.DecOutData; | ||
616 | |||
617 | sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx, &frame->PibInfo, &dio); | ||
618 | if (sts != BC_STS_SUCCESS) | ||
619 | return (ctx->state & BC_LINK_SUSPEND) ? BC_STS_IO_USER_ABORT : sts; | ||
620 | |||
621 | frame->Flags = dio->uinfo.comp_flags; | ||
622 | |||
623 | if (frame->Flags & COMP_FLAG_FMT_CHANGE) | ||
624 | return bc_cproc_fmt_change(ctx, dio); | ||
625 | |||
626 | frame->OutPutBuffs.YuvBuff = dio->uinfo.xfr_buff; | ||
627 | frame->OutPutBuffs.YuvBuffSz = dio->uinfo.xfr_len; | ||
628 | frame->OutPutBuffs.UVbuffOffset = dio->uinfo.uv_offset; | ||
629 | frame->OutPutBuffs.b422Mode = dio->uinfo.b422mode; | ||
630 | |||
631 | frame->OutPutBuffs.YBuffDoneSz = dio->uinfo.y_done_sz; | ||
632 | frame->OutPutBuffs.UVBuffDoneSz = dio->uinfo.uv_done_sz; | ||
633 | |||
634 | crystalhd_unmap_dio(ctx->adp, dio); | ||
635 | |||
636 | return BC_STS_SUCCESS; | ||
637 | } | ||
638 | |||
639 | static BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx, | ||
640 | crystalhd_ioctl_data *idata) | ||
641 | { | ||
642 | ctx->state |= BC_LINK_CAP_EN; | ||
643 | if (ctx->state == BC_LINK_READY) | ||
644 | return crystalhd_hw_start_capture(&ctx->hw_ctx); | ||
645 | |||
646 | return BC_STS_SUCCESS; | ||
647 | } | ||
648 | |||
649 | static BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx, | ||
650 | crystalhd_ioctl_data *idata) | ||
651 | { | ||
652 | crystalhd_dio_req *dio = NULL; | ||
653 | BC_STATUS sts = BC_STS_SUCCESS; | ||
654 | BC_DEC_OUT_BUFF *frame; | ||
655 | uint32_t count; | ||
656 | |||
657 | if (!ctx || !idata) { | ||
658 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
659 | return BC_STS_INV_ARG; | ||
660 | } | ||
661 | |||
662 | if (!(ctx->state & BC_LINK_CAP_EN)) | ||
663 | return BC_STS_ERR_USAGE; | ||
664 | |||
665 | /* We should ack flush even when we are in paused/suspend state */ | ||
666 | if (!(ctx->state & BC_LINK_READY)) | ||
667 | return crystalhd_hw_stop_capture(&ctx->hw_ctx); | ||
668 | |||
669 | ctx->state &= ~(BC_LINK_CAP_EN|BC_LINK_FMT_CHG); | ||
670 | |||
671 | frame = &idata->udata.u.DecOutData; | ||
672 | for (count = 0; count < BC_RX_LIST_CNT; count++) { | ||
673 | |||
674 | sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx, &frame->PibInfo, &dio); | ||
675 | if (sts != BC_STS_SUCCESS) | ||
676 | break; | ||
677 | |||
678 | crystalhd_unmap_dio(ctx->adp, dio); | ||
679 | } | ||
680 | |||
681 | return crystalhd_hw_stop_capture(&ctx->hw_ctx); | ||
682 | } | ||
683 | |||
684 | static BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx, | ||
685 | crystalhd_ioctl_data *idata) | ||
686 | { | ||
687 | BC_DTS_STATS *stats; | ||
688 | struct crystalhd_hw_stats hw_stats; | ||
689 | |||
690 | if (!ctx || !idata) { | ||
691 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
692 | return BC_STS_INV_ARG; | ||
693 | } | ||
694 | |||
695 | crystalhd_hw_stats(&ctx->hw_ctx, &hw_stats); | ||
696 | |||
697 | stats = &idata->udata.u.drvStat; | ||
698 | stats->drvRLL = hw_stats.rdyq_count; | ||
699 | stats->drvFLL = hw_stats.freeq_count; | ||
700 | stats->DrvTotalFrmDropped = hw_stats.rx_errors; | ||
701 | stats->DrvTotalHWErrs = hw_stats.rx_errors + hw_stats.tx_errors; | ||
702 | stats->intCount = hw_stats.num_interrupts; | ||
703 | stats->DrvIgnIntrCnt = hw_stats.num_interrupts - | ||
704 | hw_stats.dev_interrupts; | ||
705 | stats->TxFifoBsyCnt = hw_stats.cin_busy; | ||
706 | stats->pauseCount = hw_stats.pause_cnt; | ||
707 | |||
708 | if (ctx->pwr_state_change) | ||
709 | stats->pwr_state_change = 1; | ||
710 | if (ctx->state & BC_LINK_PAUSED) | ||
711 | stats->DrvPauseTime = 1; | ||
712 | |||
713 | return BC_STS_SUCCESS; | ||
714 | } | ||
715 | |||
716 | static BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx, | ||
717 | crystalhd_ioctl_data *idata) | ||
718 | { | ||
719 | crystalhd_hw_stats(&ctx->hw_ctx, NULL); | ||
720 | |||
721 | return BC_STS_SUCCESS; | ||
722 | } | ||
723 | |||
724 | static BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx, | ||
725 | crystalhd_ioctl_data *idata) | ||
726 | { | ||
727 | BC_CLOCK *clock; | ||
728 | uint32_t oldClk; | ||
729 | BC_STATUS sts = BC_STS_SUCCESS; | ||
730 | |||
731 | if (!ctx || !idata) { | ||
732 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
733 | return BC_STS_INV_ARG; | ||
734 | } | ||
735 | |||
736 | clock = &idata->udata.u.clockValue; | ||
737 | oldClk = ctx->hw_ctx.core_clock_mhz; | ||
738 | ctx->hw_ctx.core_clock_mhz = clock->clk; | ||
739 | |||
740 | if (ctx->state & BC_LINK_READY) { | ||
741 | sts = crystalhd_hw_set_core_clock(&ctx->hw_ctx); | ||
742 | if (sts == BC_STS_CLK_NOCHG) | ||
743 | ctx->hw_ctx.core_clock_mhz = oldClk; | ||
744 | } | ||
745 | |||
746 | clock->clk = ctx->hw_ctx.core_clock_mhz; | ||
747 | |||
748 | return sts; | ||
749 | } | ||
750 | |||
751 | /*=============== Cmd Proc Table.. ======================================*/ | ||
752 | static const crystalhd_cmd_tbl_t g_crystalhd_cproc_tbl[] = { | ||
753 | { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0}, | ||
754 | { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0}, | ||
755 | { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0}, | ||
756 | { BCM_IOC_REG_WR, bc_cproc_reg_wr, 0}, | ||
757 | { BCM_IOC_FPGA_RD, bc_cproc_link_reg_rd, 0}, | ||
758 | { BCM_IOC_FPGA_WR, bc_cproc_link_reg_wr, 0}, | ||
759 | { BCM_IOC_MEM_RD, bc_cproc_mem_rd, 0}, | ||
760 | { BCM_IOC_MEM_WR, bc_cproc_mem_wr, 0}, | ||
761 | { BCM_IOC_RD_PCI_CFG, bc_cproc_cfg_rd, 0}, | ||
762 | { BCM_IOC_WR_PCI_CFG, bc_cproc_cfg_wr, 1}, | ||
763 | { BCM_IOC_FW_DOWNLOAD, bc_cproc_download_fw, 1}, | ||
764 | { BCM_IOC_FW_CMD, bc_cproc_do_fw_cmd, 1}, | ||
765 | { BCM_IOC_PROC_INPUT, bc_cproc_proc_input, 1}, | ||
766 | { BCM_IOC_ADD_RXBUFFS, bc_cproc_add_cap_buff, 1}, | ||
767 | { BCM_IOC_FETCH_RXBUFF, bc_cproc_fetch_frame, 1}, | ||
768 | { BCM_IOC_START_RX_CAP, bc_cproc_start_capture, 1}, | ||
769 | { BCM_IOC_FLUSH_RX_CAP, bc_cproc_flush_cap_buffs, 1}, | ||
770 | { BCM_IOC_GET_DRV_STAT, bc_cproc_get_stats, 0}, | ||
771 | { BCM_IOC_RST_DRV_STAT, bc_cproc_reset_stats, 0}, | ||
772 | { BCM_IOC_NOTIFY_MODE, bc_cproc_notify_mode, 0}, | ||
773 | { BCM_IOC_CHG_CLK, bc_cproc_chg_clk, 0}, | ||
774 | { BCM_IOC_END, NULL}, | ||
775 | }; | ||
776 | |||
777 | /*=============== Cmd Proc Functions.. ===================================*/ | ||
778 | |||
779 | /** | ||
780 | * crystalhd_suspend - Power management suspend request. | ||
781 | * @ctx: Command layer context. | ||
782 | * @idata: Iodata - required for internal use. | ||
783 | * | ||
784 | * Return: | ||
785 | * status | ||
786 | * | ||
787 | * 1. Set the state to Suspend. | ||
788 | * 2. Flush the Rx Buffers it will unmap all the buffers and | ||
789 | * stop the RxDMA engine. | ||
790 | * 3. Cancel The TX Io and Stop Dma Engine. | ||
791 | * 4. Put the DDR in to deep sleep. | ||
792 | * 5. Stop the hardware putting it in to Reset State. | ||
793 | * | ||
794 | * Current gstreamer frame work does not provide any power management | ||
795 | * related notification to user mode decoder plug-in. As a work-around | ||
796 | * we pass on the power mangement notification to our plug-in by completing | ||
797 | * all outstanding requests with BC_STS_IO_USER_ABORT return code. | ||
798 | */ | ||
799 | BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | ||
800 | { | ||
801 | BC_STATUS sts = BC_STS_SUCCESS; | ||
802 | |||
803 | if (!ctx || !idata) { | ||
804 | BCMLOG_ERR("Invalid Parameters\n"); | ||
805 | return BC_STS_ERROR; | ||
806 | } | ||
807 | |||
808 | if (ctx->state & BC_LINK_SUSPEND) | ||
809 | return BC_STS_SUCCESS; | ||
810 | |||
811 | if (ctx->state == BC_LINK_INVALID) { | ||
812 | BCMLOG(BCMLOG_DBG, "Nothing To Do Suspend Success\n"); | ||
813 | return BC_STS_SUCCESS; | ||
814 | } | ||
815 | |||
816 | ctx->state |= BC_LINK_SUSPEND; | ||
817 | |||
818 | bc_cproc_mark_pwr_state(ctx); | ||
819 | |||
820 | if (ctx->state & BC_LINK_CAP_EN) { | ||
821 | sts = bc_cproc_flush_cap_buffs(ctx, idata); | ||
822 | if (sts != BC_STS_SUCCESS) | ||
823 | return sts; | ||
824 | } | ||
825 | |||
826 | if (ctx->tx_list_id) { | ||
827 | sts = crystalhd_hw_cancel_tx(&ctx->hw_ctx, ctx->tx_list_id); | ||
828 | if (sts != BC_STS_SUCCESS) | ||
829 | return sts; | ||
830 | } | ||
831 | |||
832 | sts = crystalhd_hw_suspend(&ctx->hw_ctx); | ||
833 | if (sts != BC_STS_SUCCESS) | ||
834 | return sts; | ||
835 | |||
836 | BCMLOG(BCMLOG_DBG, "BCM70012 suspend success\n"); | ||
837 | |||
838 | return BC_STS_SUCCESS; | ||
839 | } | ||
840 | |||
841 | /** | ||
842 | * crystalhd_resume - Resume frame capture. | ||
843 | * @ctx: Command layer contextx. | ||
844 | * | ||
845 | * Return: | ||
846 | * status | ||
847 | * | ||
848 | * | ||
849 | * Resume frame capture. | ||
850 | * | ||
851 | * PM_Resume can't resume the playback state back to pre-suspend state | ||
852 | * because we don't keep video clip related information within driver. | ||
853 | * To get back to the pre-suspend state App will re-open the device and | ||
854 | * start a new playback session from the pre-suspend clip position. | ||
855 | * | ||
856 | */ | ||
857 | BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx) | ||
858 | { | ||
859 | BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state); | ||
860 | |||
861 | bc_cproc_mark_pwr_state(ctx); | ||
862 | |||
863 | return BC_STS_SUCCESS; | ||
864 | } | ||
865 | |||
866 | /** | ||
867 | * crystalhd_user_open - Create application handle. | ||
868 | * @ctx: Command layer contextx. | ||
869 | * @user_ctx: User ID context. | ||
870 | * | ||
871 | * Return: | ||
872 | * status | ||
873 | * | ||
874 | * Creates an application specific UID and allocates | ||
875 | * application specific resources. HW layer initialization | ||
876 | * is done for the first open request. | ||
877 | */ | ||
878 | BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, | ||
879 | struct crystalhd_user **user_ctx) | ||
880 | { | ||
881 | struct crystalhd_user *uc; | ||
882 | |||
883 | if (!ctx || !user_ctx) { | ||
884 | BCMLOG_ERR("Invalid arg..\n"); | ||
885 | return BC_STS_INV_ARG; | ||
886 | } | ||
887 | |||
888 | uc = bc_cproc_get_uid(ctx); | ||
889 | if (!uc) { | ||
890 | BCMLOG(BCMLOG_INFO, "No free user context...\n"); | ||
891 | return BC_STS_BUSY; | ||
892 | } | ||
893 | |||
894 | BCMLOG(BCMLOG_INFO, "Opening new user[%x] handle\n", uc->uid); | ||
895 | |||
896 | crystalhd_hw_open(&ctx->hw_ctx, ctx->adp); | ||
897 | |||
898 | uc->in_use = 1; | ||
899 | |||
900 | *user_ctx = uc; | ||
901 | |||
902 | return BC_STS_SUCCESS; | ||
903 | } | ||
904 | |||
905 | /** | ||
906 | * crystalhd_user_close - Close application handle. | ||
907 | * @ctx: Command layer contextx. | ||
908 | * @uc: User ID context. | ||
909 | * | ||
910 | * Return: | ||
911 | * status | ||
912 | * | ||
913 | * Closer aplication handle and release app specific | ||
914 | * resources. | ||
915 | */ | ||
916 | BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc) | ||
917 | { | ||
918 | uint32_t mode = uc->mode; | ||
919 | |||
920 | ctx->user[uc->uid].mode = DTS_MODE_INV; | ||
921 | ctx->user[uc->uid].in_use = 0; | ||
922 | ctx->cin_wait_exit = 1; | ||
923 | ctx->pwr_state_change = 0; | ||
924 | |||
925 | BCMLOG(BCMLOG_INFO, "Closing user[%x] handle\n", uc->uid); | ||
926 | |||
927 | if ((mode == DTS_DIAG_MODE) || (mode == DTS_PLAYBACK_MODE)) { | ||
928 | crystalhd_hw_free_dma_rings(&ctx->hw_ctx); | ||
929 | crystalhd_destroy_dio_pool(ctx->adp); | ||
930 | } else if (bc_cproc_get_user_count(ctx)) { | ||
931 | return BC_STS_SUCCESS; | ||
932 | } | ||
933 | |||
934 | crystalhd_hw_close(&ctx->hw_ctx); | ||
935 | |||
936 | ctx->state = BC_LINK_INVALID; | ||
937 | |||
938 | return BC_STS_SUCCESS; | ||
939 | } | ||
940 | |||
941 | /** | ||
942 | * crystalhd_setup_cmd_context - Setup Command layer resources. | ||
943 | * @ctx: Command layer contextx. | ||
944 | * @adp: Adapter context | ||
945 | * | ||
946 | * Return: | ||
947 | * status | ||
948 | * | ||
949 | * Called at the time of driver load. | ||
950 | */ | ||
951 | BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, | ||
952 | struct crystalhd_adp *adp) | ||
953 | { | ||
954 | int i = 0; | ||
955 | |||
956 | if (!ctx || !adp) { | ||
957 | BCMLOG_ERR("Invalid arg!!\n"); | ||
958 | return BC_STS_INV_ARG; | ||
959 | } | ||
960 | |||
961 | if (ctx->adp) | ||
962 | BCMLOG(BCMLOG_DBG, "Resetting Cmd context delete missing..\n"); | ||
963 | |||
964 | ctx->adp = adp; | ||
965 | for (i = 0; i < BC_LINK_MAX_OPENS; i++) { | ||
966 | ctx->user[i].uid = i; | ||
967 | ctx->user[i].in_use = 0; | ||
968 | ctx->user[i].mode = DTS_MODE_INV; | ||
969 | } | ||
970 | |||
971 | /*Open and Close the Hardware to put it in to sleep state*/ | ||
972 | crystalhd_hw_open(&ctx->hw_ctx, ctx->adp); | ||
973 | crystalhd_hw_close(&ctx->hw_ctx); | ||
974 | return BC_STS_SUCCESS; | ||
975 | } | ||
976 | |||
977 | /** | ||
978 | * crystalhd_delete_cmd_context - Release Command layer resources. | ||
979 | * @ctx: Command layer contextx. | ||
980 | * | ||
981 | * Return: | ||
982 | * status | ||
983 | * | ||
984 | * Called at the time of driver un-load. | ||
985 | */ | ||
986 | BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) | ||
987 | { | ||
988 | BCMLOG(BCMLOG_DBG, "Deleting Command context..\n"); | ||
989 | |||
990 | ctx->adp = NULL; | ||
991 | |||
992 | return BC_STS_SUCCESS; | ||
993 | } | ||
994 | |||
995 | /** | ||
996 | * crystalhd_get_cmd_proc - Cproc table lookup. | ||
997 | * @ctx: Command layer contextx. | ||
998 | * @cmd: IOCTL command code. | ||
999 | * @uc: User ID context. | ||
1000 | * | ||
1001 | * Return: | ||
1002 | * command proc function pointer | ||
1003 | * | ||
1004 | * This function checks the process context, application's | ||
1005 | * mode of operation and returns the function pointer | ||
1006 | * from the cproc table. | ||
1007 | */ | ||
1008 | crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd, | ||
1009 | struct crystalhd_user *uc) | ||
1010 | { | ||
1011 | crystalhd_cmd_proc cproc = NULL; | ||
1012 | unsigned int i, tbl_sz; | ||
1013 | |||
1014 | if (!ctx) { | ||
1015 | BCMLOG_ERR("Invalid arg.. Cmd[%d]\n", cmd); | ||
1016 | return NULL; | ||
1017 | } | ||
1018 | |||
1019 | if ((cmd != BCM_IOC_GET_DRV_STAT) && (ctx->state & BC_LINK_SUSPEND)) { | ||
1020 | BCMLOG_ERR("Invalid State [suspend Set].. Cmd[%d]\n", cmd); | ||
1021 | return NULL; | ||
1022 | } | ||
1023 | |||
1024 | tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(crystalhd_cmd_tbl_t); | ||
1025 | for (i = 0; i < tbl_sz; i++) { | ||
1026 | if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) { | ||
1027 | if ((uc->mode == DTS_MONITOR_MODE) && | ||
1028 | (g_crystalhd_cproc_tbl[i].block_mon)) { | ||
1029 | BCMLOG(BCMLOG_INFO, "Blocking cmd %d \n", cmd); | ||
1030 | break; | ||
1031 | } | ||
1032 | cproc = g_crystalhd_cproc_tbl[i].cmd_proc; | ||
1033 | break; | ||
1034 | } | ||
1035 | } | ||
1036 | |||
1037 | return cproc; | ||
1038 | } | ||
1039 | |||
1040 | /** | ||
1041 | * crystalhd_cmd_interrupt - ISR entry point | ||
1042 | * @ctx: Command layer contextx. | ||
1043 | * | ||
1044 | * Return: | ||
1045 | * TRUE: If interrupt from bcm70012 device. | ||
1046 | * | ||
1047 | * | ||
1048 | * ISR entry point from OS layer. | ||
1049 | */ | ||
1050 | bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx) | ||
1051 | { | ||
1052 | if (!ctx) { | ||
1053 | BCMLOG_ERR("Invalid arg..\n"); | ||
1054 | return 0; | ||
1055 | } | ||
1056 | |||
1057 | return crystalhd_hw_interrupt(ctx->adp, &ctx->hw_ctx); | ||
1058 | } | ||
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.h b/drivers/staging/crystalhd/crystalhd_cmds.h new file mode 100644 index 000000000000..6b290aed8e0b --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_cmds.h | |||
@@ -0,0 +1,88 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_cmds . h | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70010 Linux driver user command interfaces. | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #ifndef _CRYSTALHD_CMDS_H_ | ||
28 | #define _CRYSTALHD_CMDS_H_ | ||
29 | |||
30 | /* | ||
31 | * NOTE:: This is the main interface file between the Linux layer | ||
32 | * and the harware layer. This file will use the definitions | ||
33 | * from _dts_glob and dts_defs etc.. which are defined for | ||
34 | * windows. | ||
35 | */ | ||
36 | #include "crystalhd_misc.h" | ||
37 | #include "crystalhd_hw.h" | ||
38 | |||
39 | enum _crystalhd_state{ | ||
40 | BC_LINK_INVALID = 0x00, | ||
41 | BC_LINK_INIT = 0x01, | ||
42 | BC_LINK_CAP_EN = 0x02, | ||
43 | BC_LINK_FMT_CHG = 0x04, | ||
44 | BC_LINK_SUSPEND = 0x10, | ||
45 | BC_LINK_PAUSED = 0x20, | ||
46 | BC_LINK_READY = (BC_LINK_INIT | BC_LINK_CAP_EN | BC_LINK_FMT_CHG), | ||
47 | }; | ||
48 | |||
49 | struct crystalhd_user { | ||
50 | uint32_t uid; | ||
51 | uint32_t in_use; | ||
52 | uint32_t mode; | ||
53 | }; | ||
54 | |||
55 | #define DTS_MODE_INV (-1) | ||
56 | |||
57 | struct crystalhd_cmd { | ||
58 | uint32_t state; | ||
59 | struct crystalhd_adp *adp; | ||
60 | struct crystalhd_user user[BC_LINK_MAX_OPENS]; | ||
61 | |||
62 | spinlock_t ctx_lock; | ||
63 | uint32_t tx_list_id; | ||
64 | uint32_t cin_wait_exit; | ||
65 | uint32_t pwr_state_change; | ||
66 | struct crystalhd_hw hw_ctx; | ||
67 | }; | ||
68 | |||
69 | typedef BC_STATUS (*crystalhd_cmd_proc)(struct crystalhd_cmd *, crystalhd_ioctl_data *); | ||
70 | |||
71 | typedef struct _crystalhd_cmd_tbl { | ||
72 | uint32_t cmd_id; | ||
73 | const crystalhd_cmd_proc cmd_proc; | ||
74 | uint32_t block_mon; | ||
75 | } crystalhd_cmd_tbl_t; | ||
76 | |||
77 | |||
78 | BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata); | ||
79 | BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx); | ||
80 | crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd, | ||
81 | struct crystalhd_user *uc); | ||
82 | BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, struct crystalhd_user **user_ctx); | ||
83 | BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc); | ||
84 | BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, struct crystalhd_adp *adp); | ||
85 | BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx); | ||
86 | bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx); | ||
87 | |||
88 | #endif | ||
diff --git a/drivers/staging/crystalhd/crystalhd_fw_if.h b/drivers/staging/crystalhd/crystalhd_fw_if.h new file mode 100644 index 000000000000..261cd19a0ee7 --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_fw_if.h | |||
@@ -0,0 +1,369 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_fw_if . h | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70012 Firmware interface definitions. | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #ifndef _CRYSTALHD_FW_IF_H_ | ||
28 | #define _CRYSTALHD_FW_IF_H_ | ||
29 | |||
30 | /* TBD: Pull in only required defs into this file.. */ | ||
31 | |||
32 | |||
33 | |||
34 | /* User Data Header */ | ||
35 | typedef struct user_data { | ||
36 | struct user_data *next; | ||
37 | uint32_t type; | ||
38 | uint32_t size; | ||
39 | } UD_HDR; | ||
40 | |||
41 | |||
42 | |||
43 | /*------------------------------------------------------* | ||
44 | * MPEG Extension to the PPB * | ||
45 | *------------------------------------------------------*/ | ||
46 | typedef struct { | ||
47 | uint32_t to_be_defined; | ||
48 | uint32_t valid; | ||
49 | |||
50 | /* Always valid, defaults to picture size if no | ||
51 | sequence display extension in the stream. */ | ||
52 | uint32_t display_horizontal_size; | ||
53 | uint32_t display_vertical_size; | ||
54 | |||
55 | /* MPEG_VALID_PANSCAN | ||
56 | Offsets are a copy values from the MPEG stream. */ | ||
57 | uint32_t offset_count; | ||
58 | int32_t horizontal_offset[3]; | ||
59 | int32_t vertical_offset[3]; | ||
60 | |||
61 | /* MPEG_VALID_USERDATA | ||
62 | User data is in the form of a linked list. */ | ||
63 | int32_t userDataSize; | ||
64 | UD_HDR *userData; | ||
65 | |||
66 | } PPB_MPEG; | ||
67 | |||
68 | |||
69 | /*------------------------------------------------------* | ||
70 | * VC1 Extension to the PPB * | ||
71 | *------------------------------------------------------*/ | ||
72 | typedef struct { | ||
73 | uint32_t to_be_defined; | ||
74 | uint32_t valid; | ||
75 | |||
76 | /* Always valid, defaults to picture size if no | ||
77 | sequence display extension in the stream. */ | ||
78 | uint32_t display_horizontal_size; | ||
79 | uint32_t display_vertical_size; | ||
80 | |||
81 | /* VC1 pan scan windows */ | ||
82 | uint32_t num_panscan_windows; | ||
83 | int32_t ps_horiz_offset[4]; | ||
84 | int32_t ps_vert_offset[4]; | ||
85 | int32_t ps_width[4]; | ||
86 | int32_t ps_height[4]; | ||
87 | |||
88 | /* VC1_VALID_USERDATA | ||
89 | User data is in the form of a linked list. */ | ||
90 | int32_t userDataSize; | ||
91 | UD_HDR *userData; | ||
92 | |||
93 | } PPB_VC1; | ||
94 | |||
95 | /*------------------------------------------------------* | ||
96 | * H.264 Extension to the PPB * | ||
97 | *------------------------------------------------------*/ | ||
98 | |||
99 | /** | ||
100 | * @brief Film grain SEI message. | ||
101 | * | ||
102 | * Content of the film grain SEI message. | ||
103 | */ | ||
104 | |||
105 | /* maximum number of model-values as for Thomson spec(standard says 5) */ | ||
106 | #define MAX_FGT_MODEL_VALUE (3) | ||
107 | |||
108 | /* maximum number of intervals(as many as 256 intervals?) */ | ||
109 | #define MAX_FGT_VALUE_INTERVAL (256) | ||
110 | |||
111 | typedef struct FGT_SEI { | ||
112 | struct FGT_SEI *next; | ||
113 | unsigned char model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE]; | ||
114 | unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL]; | ||
115 | unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL]; | ||
116 | |||
117 | unsigned char cancel_flag; /* Cancel flag: 1 no film grain. */ | ||
118 | unsigned char model_id; /* Model id. */ | ||
119 | |||
120 | /* +unused SE based on Thomson spec */ | ||
121 | unsigned char color_desc_flag; /* Separate color descrition flag. */ | ||
122 | unsigned char bit_depth_luma; /* Bit depth luma minus 8. */ | ||
123 | unsigned char bit_depth_chroma; /* Bit depth chroma minus 8. */ | ||
124 | unsigned char full_range_flag; /* Full range flag. */ | ||
125 | unsigned char color_primaries; /* Color primaries. */ | ||
126 | unsigned char transfer_charact; /* Transfer characteristics. */ | ||
127 | unsigned char matrix_coeff; /*< Matrix coefficients. */ | ||
128 | /* -unused SE based on Thomson spec */ | ||
129 | |||
130 | unsigned char blending_mode_id; /* Blending mode. */ | ||
131 | unsigned char log2_scale_factor; /* Log2 scale factor (2-7). */ | ||
132 | unsigned char comp_flag[3]; /* Components [0,2] parameters present flag. */ | ||
133 | unsigned char num_intervals_minus1[3]; /* Number of intensity level intervals. */ | ||
134 | unsigned char num_model_values[3]; /* Number of model values. */ | ||
135 | uint16_t repetition_period; /* Repetition period (0-16384) */ | ||
136 | |||
137 | } FGT_SEI; | ||
138 | |||
139 | typedef struct { | ||
140 | /* 'valid' specifies which fields (or sets of | ||
141 | * fields) below are valid. If the corresponding | ||
142 | * bit in 'valid' is NOT set then that field(s) | ||
143 | * is (are) not initialized. */ | ||
144 | uint32_t valid; | ||
145 | |||
146 | int32_t poc_top; /* POC for Top Field/Frame */ | ||
147 | int32_t poc_bottom; /* POC for Bottom Field */ | ||
148 | uint32_t idr_pic_id; | ||
149 | |||
150 | /* H264_VALID_PANSCAN */ | ||
151 | uint32_t pan_scan_count; | ||
152 | int32_t pan_scan_left[3]; | ||
153 | int32_t pan_scan_right[3]; | ||
154 | int32_t pan_scan_top[3]; | ||
155 | int32_t pan_scan_bottom[3]; | ||
156 | |||
157 | /* H264_VALID_CT_TYPE */ | ||
158 | uint32_t ct_type_count; | ||
159 | uint32_t ct_type[3]; | ||
160 | |||
161 | /* H264_VALID_SPS_CROP */ | ||
162 | int32_t sps_crop_left; | ||
163 | int32_t sps_crop_right; | ||
164 | int32_t sps_crop_top; | ||
165 | int32_t sps_crop_bottom; | ||
166 | |||
167 | /* H264_VALID_VUI */ | ||
168 | uint32_t chroma_top; | ||
169 | uint32_t chroma_bottom; | ||
170 | |||
171 | /* H264_VALID_USER */ | ||
172 | uint32_t user_data_size; | ||
173 | UD_HDR *user_data; | ||
174 | |||
175 | /* H264 VALID FGT */ | ||
176 | FGT_SEI *pfgt; | ||
177 | |||
178 | } PPB_H264; | ||
179 | |||
180 | typedef struct { | ||
181 | /* Common fields. */ | ||
182 | uint32_t picture_number; /* Ordinal display number */ | ||
183 | uint32_t video_buffer; /* Video (picbuf) number */ | ||
184 | uint32_t video_address; /* Address of picbuf Y */ | ||
185 | uint32_t video_address_uv; /* Address of picbuf UV */ | ||
186 | uint32_t video_stripe; /* Picbuf stripe */ | ||
187 | uint32_t video_width; /* Picbuf width */ | ||
188 | uint32_t video_height; /* Picbuf height */ | ||
189 | |||
190 | uint32_t channel_id; /* Decoder channel ID */ | ||
191 | uint32_t status; /* reserved */ | ||
192 | uint32_t width; /* pixels */ | ||
193 | uint32_t height; /* pixels */ | ||
194 | uint32_t chroma_format; /* see above */ | ||
195 | uint32_t pulldown; /* see above */ | ||
196 | uint32_t flags; /* see above */ | ||
197 | uint32_t pts; /* 32 LSBs of PTS */ | ||
198 | uint32_t protocol; /* protocolXXX (above) */ | ||
199 | |||
200 | uint32_t frame_rate; /* see above */ | ||
201 | uint32_t matrix_coeff; /* see above */ | ||
202 | uint32_t aspect_ratio; /* see above */ | ||
203 | uint32_t colour_primaries; /* see above */ | ||
204 | uint32_t transfer_char; /* see above */ | ||
205 | uint32_t pcr_offset; /* 45kHz if PCR type; else 27MHz */ | ||
206 | uint32_t n_drop; /* Number of pictures to be dropped */ | ||
207 | |||
208 | uint32_t custom_aspect_ratio_width_height; | ||
209 | /* upper 16-bits is Y and lower 16-bits is X */ | ||
210 | |||
211 | uint32_t picture_tag; /* Indexing tag from BUD packets */ | ||
212 | uint32_t picture_done_payload; | ||
213 | uint32_t picture_meta_payload; | ||
214 | uint32_t reserved[1]; | ||
215 | |||
216 | /* Protocol-specific extensions. */ | ||
217 | union { | ||
218 | PPB_H264 h264; | ||
219 | PPB_MPEG mpeg; | ||
220 | PPB_VC1 vc1; | ||
221 | } other; | ||
222 | |||
223 | } PPB; | ||
224 | |||
225 | typedef struct { | ||
226 | uint32_t bFormatChange; | ||
227 | uint32_t resolution; | ||
228 | uint32_t channelId; | ||
229 | uint32_t ppbPtr; | ||
230 | int32_t ptsStcOffset; | ||
231 | uint32_t zeroPanscanValid; | ||
232 | uint32_t dramOutBufAddr; | ||
233 | uint32_t yComponent; | ||
234 | PPB ppb; | ||
235 | |||
236 | } C011_PIB; | ||
237 | |||
238 | |||
239 | |||
240 | typedef struct { | ||
241 | uint32_t command; | ||
242 | uint32_t sequence; | ||
243 | uint32_t status; | ||
244 | uint32_t picBuf; | ||
245 | uint32_t picRelBuf; | ||
246 | uint32_t picInfoDeliveryQ; | ||
247 | uint32_t picInfoReleaseQ; | ||
248 | uint32_t channelStatus; | ||
249 | uint32_t userDataDeliveryQ; | ||
250 | uint32_t userDataReleaseQ; | ||
251 | uint32_t transportStreamCaptureAddr; | ||
252 | uint32_t asyncEventQ; | ||
253 | |||
254 | } DecRspChannelStartVideo; | ||
255 | |||
256 | #define eCMD_C011_CMD_BASE (0x73763000) | ||
257 | |||
258 | /* host commands */ | ||
259 | typedef enum { | ||
260 | eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */ | ||
261 | eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */ | ||
262 | eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */ | ||
263 | |||
264 | /* New API commands */ | ||
265 | /* General commands */ | ||
266 | eCMD_C011_INIT = eCMD_C011_CMD_BASE + 0x01, | ||
267 | eCMD_C011_RESET = eCMD_C011_CMD_BASE + 0x02, | ||
268 | eCMD_C011_SELF_TEST = eCMD_C011_CMD_BASE + 0x03, | ||
269 | eCMD_C011_GET_VERSION = eCMD_C011_CMD_BASE + 0x04, | ||
270 | eCMD_C011_GPIO = eCMD_C011_CMD_BASE + 0x05, | ||
271 | eCMD_C011_DEBUG_SETUP = eCMD_C011_CMD_BASE + 0x06, | ||
272 | |||
273 | /* Decoding commands */ | ||
274 | eCMD_C011_DEC_CHAN_OPEN = eCMD_C011_CMD_BASE + 0x100, | ||
275 | eCMD_C011_DEC_CHAN_CLOSE = eCMD_C011_CMD_BASE + 0x101, | ||
276 | eCMD_C011_DEC_CHAN_ACTIVATE = eCMD_C011_CMD_BASE + 0x102, | ||
277 | eCMD_C011_DEC_CHAN_STATUS = eCMD_C011_CMD_BASE + 0x103, | ||
278 | eCMD_C011_DEC_CHAN_FLUSH = eCMD_C011_CMD_BASE + 0x104, | ||
279 | eCMD_C011_DEC_CHAN_TRICK_PLAY = eCMD_C011_CMD_BASE + 0x105, | ||
280 | eCMD_C011_DEC_CHAN_TS_PIDS = eCMD_C011_CMD_BASE + 0x106, | ||
281 | eCMD_C011_DEC_CHAN_PS_STREAM_ID = eCMD_C011_CMD_BASE + 0x107, | ||
282 | eCMD_C011_DEC_CHAN_INPUT_PARAMS = eCMD_C011_CMD_BASE + 0x108, | ||
283 | eCMD_C011_DEC_CHAN_VIDEO_OUTPUT = eCMD_C011_CMD_BASE + 0x109, | ||
284 | eCMD_C011_DEC_CHAN_OUTPUT_FORMAT = eCMD_C011_CMD_BASE + 0x10A, | ||
285 | eCMD_C011_DEC_CHAN_SCALING_FILTERS = eCMD_C011_CMD_BASE + 0x10B, | ||
286 | eCMD_C011_DEC_CHAN_OSD_MODE = eCMD_C011_CMD_BASE + 0x10D, | ||
287 | eCMD_C011_DEC_CHAN_DROP = eCMD_C011_CMD_BASE + 0x10E, | ||
288 | eCMD_C011_DEC_CHAN_RELEASE = eCMD_C011_CMD_BASE + 0x10F, | ||
289 | eCMD_C011_DEC_CHAN_STREAM_SETTINGS = eCMD_C011_CMD_BASE + 0x110, | ||
290 | eCMD_C011_DEC_CHAN_PAUSE_OUTPUT = eCMD_C011_CMD_BASE + 0x111, | ||
291 | eCMD_C011_DEC_CHAN_CHANGE = eCMD_C011_CMD_BASE + 0x112, | ||
292 | eCMD_C011_DEC_CHAN_SET_STC = eCMD_C011_CMD_BASE + 0x113, | ||
293 | eCMD_C011_DEC_CHAN_SET_PTS = eCMD_C011_CMD_BASE + 0x114, | ||
294 | eCMD_C011_DEC_CHAN_CC_MODE = eCMD_C011_CMD_BASE + 0x115, | ||
295 | eCMD_C011_DEC_CREATE_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x116, | ||
296 | eCMD_C011_DEC_COPY_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x117, | ||
297 | eCMD_C011_DEC_DELETE_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x118, | ||
298 | eCMD_C011_DEC_CHAN_SET_DECYPTION = eCMD_C011_CMD_BASE + 0x119, | ||
299 | eCMD_C011_DEC_CHAN_START_VIDEO = eCMD_C011_CMD_BASE + 0x11A, | ||
300 | eCMD_C011_DEC_CHAN_STOP_VIDEO = eCMD_C011_CMD_BASE + 0x11B, | ||
301 | eCMD_C011_DEC_CHAN_PIC_CAPTURE = eCMD_C011_CMD_BASE + 0x11C, | ||
302 | eCMD_C011_DEC_CHAN_PAUSE = eCMD_C011_CMD_BASE + 0x11D, | ||
303 | eCMD_C011_DEC_CHAN_PAUSE_STATE = eCMD_C011_CMD_BASE + 0x11E, | ||
304 | eCMD_C011_DEC_CHAN_SET_SLOWM_RATE = eCMD_C011_CMD_BASE + 0x11F, | ||
305 | eCMD_C011_DEC_CHAN_GET_SLOWM_RATE = eCMD_C011_CMD_BASE + 0x120, | ||
306 | eCMD_C011_DEC_CHAN_SET_FF_RATE = eCMD_C011_CMD_BASE + 0x121, | ||
307 | eCMD_C011_DEC_CHAN_GET_FF_RATE = eCMD_C011_CMD_BASE + 0x122, | ||
308 | eCMD_C011_DEC_CHAN_FRAME_ADVANCE = eCMD_C011_CMD_BASE + 0x123, | ||
309 | eCMD_C011_DEC_CHAN_SET_SKIP_PIC_MODE = eCMD_C011_CMD_BASE + 0x124, | ||
310 | eCMD_C011_DEC_CHAN_GET_SKIP_PIC_MODE = eCMD_C011_CMD_BASE + 0x125, | ||
311 | eCMD_C011_DEC_CHAN_FILL_PIC_BUF = eCMD_C011_CMD_BASE + 0x126, | ||
312 | eCMD_C011_DEC_CHAN_SET_CONTINUITY_CHECK = eCMD_C011_CMD_BASE + 0x127, | ||
313 | eCMD_C011_DEC_CHAN_GET_CONTINUITY_CHECK = eCMD_C011_CMD_BASE + 0x128, | ||
314 | eCMD_C011_DEC_CHAN_SET_BRCM_TRICK_MODE = eCMD_C011_CMD_BASE + 0x129, | ||
315 | eCMD_C011_DEC_CHAN_GET_BRCM_TRICK_MODE = eCMD_C011_CMD_BASE + 0x12A, | ||
316 | eCMD_C011_DEC_CHAN_REVERSE_FIELD_STATUS = eCMD_C011_CMD_BASE + 0x12B, | ||
317 | eCMD_C011_DEC_CHAN_I_PICTURE_FOUND = eCMD_C011_CMD_BASE + 0x12C, | ||
318 | eCMD_C011_DEC_CHAN_SET_PARAMETER = eCMD_C011_CMD_BASE + 0x12D, | ||
319 | eCMD_C011_DEC_CHAN_SET_USER_DATA_MODE = eCMD_C011_CMD_BASE + 0x12E, | ||
320 | eCMD_C011_DEC_CHAN_SET_PAUSE_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x12F, | ||
321 | eCMD_C011_DEC_CHAN_SET_SLOW_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x130, | ||
322 | eCMD_C011_DEC_CHAN_SET_FF_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x131, | ||
323 | eCMD_C011_DEC_CHAN_SET_DISPLAY_TIMING_MODE = eCMD_C011_CMD_BASE + 0x132, | ||
324 | eCMD_C011_DEC_CHAN_SET_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x133, | ||
325 | eCMD_C011_DEC_CHAN_GET_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x134, | ||
326 | eCMD_C011_DEC_CHAN_SET_REVERSE_FIELD = eCMD_C011_CMD_BASE + 0x135, | ||
327 | eCMD_C011_DEC_CHAN_STREAM_OPEN = eCMD_C011_CMD_BASE + 0x136, | ||
328 | eCMD_C011_DEC_CHAN_SET_PCR_PID = eCMD_C011_CMD_BASE + 0x137, | ||
329 | eCMD_C011_DEC_CHAN_SET_VID_PID = eCMD_C011_CMD_BASE + 0x138, | ||
330 | eCMD_C011_DEC_CHAN_SET_PAN_SCAN_MODE = eCMD_C011_CMD_BASE + 0x139, | ||
331 | eCMD_C011_DEC_CHAN_START_DISPLAY_AT_PTS = eCMD_C011_CMD_BASE + 0x140, | ||
332 | eCMD_C011_DEC_CHAN_STOP_DISPLAY_AT_PTS = eCMD_C011_CMD_BASE + 0x141, | ||
333 | eCMD_C011_DEC_CHAN_SET_DISPLAY_ORDER = eCMD_C011_CMD_BASE + 0x142, | ||
334 | eCMD_C011_DEC_CHAN_GET_DISPLAY_ORDER = eCMD_C011_CMD_BASE + 0x143, | ||
335 | eCMD_C011_DEC_CHAN_SET_HOST_TRICK_MODE = eCMD_C011_CMD_BASE + 0x144, | ||
336 | eCMD_C011_DEC_CHAN_SET_OPERATION_MODE = eCMD_C011_CMD_BASE + 0x145, | ||
337 | eCMD_C011_DEC_CHAN_DISPLAY_PAUSE_UNTO_PTS = eCMD_C011_CMD_BASE + 0x146, | ||
338 | eCMD_C011_DEC_CHAN_SET_PTS_STC_DIFF_THRESHOLD = eCMD_C011_CMD_BASE + 0x147, | ||
339 | eCMD_C011_DEC_CHAN_SEND_COMPRESSED_BUF = eCMD_C011_CMD_BASE + 0x148, | ||
340 | eCMD_C011_DEC_CHAN_SET_CLIPPING = eCMD_C011_CMD_BASE + 0x149, | ||
341 | eCMD_C011_DEC_CHAN_SET_PARAMETERS_FOR_HARD_RESET_INTERRUPT_TO_HOST | ||
342 | = eCMD_C011_CMD_BASE + 0x150, | ||
343 | |||
344 | /* Decoder RevD commands */ | ||
345 | eCMD_C011_DEC_CHAN_SET_CSC = eCMD_C011_CMD_BASE + 0x180, /* color space conversion */ | ||
346 | eCMD_C011_DEC_CHAN_SET_RANGE_REMAP = eCMD_C011_CMD_BASE + 0x181, | ||
347 | eCMD_C011_DEC_CHAN_SET_FGT = eCMD_C011_CMD_BASE + 0x182, | ||
348 | /* Note: 0x183 not implemented yet in Rev D main */ | ||
349 | eCMD_C011_DEC_CHAN_SET_LASTPICTURE_PADDING = eCMD_C011_CMD_BASE + 0x183, | ||
350 | |||
351 | /* Decoder 7412 commands (7412-only) */ | ||
352 | eCMD_C011_DEC_CHAN_SET_CONTENT_KEY = eCMD_C011_CMD_BASE + 0x190, | ||
353 | eCMD_C011_DEC_CHAN_SET_SESSION_KEY = eCMD_C011_CMD_BASE + 0x191, | ||
354 | eCMD_C011_DEC_CHAN_FMT_CHANGE_ACK = eCMD_C011_CMD_BASE + 0x192, | ||
355 | |||
356 | eCMD_C011_DEC_CHAN_CUSTOM_VIDOUT = eCMD_C011_CMD_BASE + 0x1FF, | ||
357 | |||
358 | /* Encoding commands */ | ||
359 | eCMD_C011_ENC_CHAN_OPEN = eCMD_C011_CMD_BASE + 0x200, | ||
360 | eCMD_C011_ENC_CHAN_CLOSE = eCMD_C011_CMD_BASE + 0x201, | ||
361 | eCMD_C011_ENC_CHAN_ACTIVATE = eCMD_C011_CMD_BASE + 0x202, | ||
362 | eCMD_C011_ENC_CHAN_CONTROL = eCMD_C011_CMD_BASE + 0x203, | ||
363 | eCMD_C011_ENC_CHAN_STATISTICS = eCMD_C011_CMD_BASE + 0x204, | ||
364 | |||
365 | eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210, | ||
366 | |||
367 | } eC011_TS_CMD; | ||
368 | |||
369 | #endif | ||
diff --git a/drivers/staging/crystalhd/crystalhd_hw.c b/drivers/staging/crystalhd/crystalhd_hw.c new file mode 100644 index 000000000000..01819d34201a --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_hw.c | |||
@@ -0,0 +1,2395 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_hw . c | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70010 Linux driver HW layer. | ||
8 | * | ||
9 | ********************************************************************** | ||
10 | * This file is part of the crystalhd device driver. | ||
11 | * | ||
12 | * This driver is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation, version 2 of the License. | ||
15 | * | ||
16 | * This driver is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
23 | **********************************************************************/ | ||
24 | |||
25 | #include <linux/pci.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include "crystalhd_hw.h" | ||
28 | |||
29 | /* Functions internal to this file */ | ||
30 | |||
31 | static void crystalhd_enable_uarts(struct crystalhd_adp *adp) | ||
32 | { | ||
33 | bc_dec_reg_wr(adp, UartSelectA, BSVS_UART_STREAM); | ||
34 | bc_dec_reg_wr(adp, UartSelectB, BSVS_UART_DEC_OUTER); | ||
35 | } | ||
36 | |||
37 | |||
38 | static void crystalhd_start_dram(struct crystalhd_adp *adp) | ||
39 | { | ||
40 | bc_dec_reg_wr(adp, SDRAM_PARAM, ((40 / 5 - 1) << 0) | | ||
41 | /* tras (40ns tras)/(5ns period) -1 ((15/5 - 1) << 4) | // trcd */ | ||
42 | ((15 / 5 - 1) << 7) | /* trp */ | ||
43 | ((10 / 5 - 1) << 10) | /* trrd */ | ||
44 | ((15 / 5 + 1) << 12) | /* twr */ | ||
45 | ((2 + 1) << 16) | /* twtr */ | ||
46 | ((70 / 5 - 2) << 19) | /* trfc */ | ||
47 | (0 << 23)); | ||
48 | |||
49 | bc_dec_reg_wr(adp, SDRAM_PRECHARGE, 0); | ||
50 | bc_dec_reg_wr(adp, SDRAM_EXT_MODE, 2); | ||
51 | bc_dec_reg_wr(adp, SDRAM_MODE, 0x132); | ||
52 | bc_dec_reg_wr(adp, SDRAM_PRECHARGE, 0); | ||
53 | bc_dec_reg_wr(adp, SDRAM_REFRESH, 0); | ||
54 | bc_dec_reg_wr(adp, SDRAM_REFRESH, 0); | ||
55 | bc_dec_reg_wr(adp, SDRAM_MODE, 0x32); | ||
56 | /* setting the refresh rate here */ | ||
57 | bc_dec_reg_wr(adp, SDRAM_REF_PARAM, ((1 << 12) | 96)); | ||
58 | } | ||
59 | |||
60 | |||
61 | static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp) | ||
62 | { | ||
63 | link_misc_perst_deco_ctrl rst_deco_cntrl; | ||
64 | link_misc_perst_clk_ctrl rst_clk_cntrl; | ||
65 | uint32_t temp; | ||
66 | |||
67 | /* | ||
68 | * Link clocks: MISC_PERST_CLOCK_CTRL Clear PLL power down bit, | ||
69 | * delay to allow PLL to lock Clear alternate clock, stop clock bits | ||
70 | */ | ||
71 | rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL); | ||
72 | rst_clk_cntrl.pll_pwr_dn = 0; | ||
73 | crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg); | ||
74 | msleep_interruptible(50); | ||
75 | |||
76 | rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL); | ||
77 | rst_clk_cntrl.stop_core_clk = 0; | ||
78 | rst_clk_cntrl.sel_alt_clk = 0; | ||
79 | |||
80 | crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg); | ||
81 | msleep_interruptible(50); | ||
82 | |||
83 | /* | ||
84 | * Bus Arbiter Timeout: GISB_ARBITER_TIMER | ||
85 | * Set internal bus arbiter timeout to 40us based on core clock speed | ||
86 | * (63MHz * 40us = 0x9D8) | ||
87 | */ | ||
88 | crystalhd_reg_wr(adp, GISB_ARBITER_TIMER, 0x9D8); | ||
89 | |||
90 | /* | ||
91 | * Decoder clocks: MISC_PERST_DECODER_CTRL | ||
92 | * Enable clocks while 7412 reset is asserted, delay | ||
93 | * De-assert 7412 reset | ||
94 | */ | ||
95 | rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_DECODER_CTRL); | ||
96 | rst_deco_cntrl.stop_bcm_7412_clk = 0; | ||
97 | rst_deco_cntrl.bcm7412_rst = 1; | ||
98 | crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL, rst_deco_cntrl.whole_reg); | ||
99 | msleep_interruptible(10); | ||
100 | |||
101 | rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_DECODER_CTRL); | ||
102 | rst_deco_cntrl.bcm7412_rst = 0; | ||
103 | crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL, rst_deco_cntrl.whole_reg); | ||
104 | msleep_interruptible(50); | ||
105 | |||
106 | /* Disable OTP_CONTENT_MISC to 0 to disable all secure modes */ | ||
107 | crystalhd_reg_wr(adp, OTP_CONTENT_MISC, 0); | ||
108 | |||
109 | /* Clear bit 29 of 0x404 */ | ||
110 | temp = crystalhd_reg_rd(adp, PCIE_TL_TRANSACTION_CONFIGURATION); | ||
111 | temp &= ~BC_BIT(29); | ||
112 | crystalhd_reg_wr(adp, PCIE_TL_TRANSACTION_CONFIGURATION, temp); | ||
113 | |||
114 | /* 2.5V regulator must be set to 2.6 volts (+6%) */ | ||
115 | /* FIXME: jarod: what's the point of this reg read? */ | ||
116 | temp = crystalhd_reg_rd(adp, MISC_PERST_VREG_CTRL); | ||
117 | crystalhd_reg_wr(adp, MISC_PERST_VREG_CTRL, 0xF3); | ||
118 | |||
119 | return true; | ||
120 | } | ||
121 | |||
122 | static bool crystalhd_put_in_reset(struct crystalhd_adp *adp) | ||
123 | { | ||
124 | link_misc_perst_deco_ctrl rst_deco_cntrl; | ||
125 | link_misc_perst_clk_ctrl rst_clk_cntrl; | ||
126 | uint32_t temp; | ||
127 | |||
128 | /* | ||
129 | * Decoder clocks: MISC_PERST_DECODER_CTRL | ||
130 | * Assert 7412 reset, delay | ||
131 | * Assert 7412 stop clock | ||
132 | */ | ||
133 | rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_DECODER_CTRL); | ||
134 | rst_deco_cntrl.stop_bcm_7412_clk = 1; | ||
135 | crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL, rst_deco_cntrl.whole_reg); | ||
136 | msleep_interruptible(50); | ||
137 | |||
138 | /* Bus Arbiter Timeout: GISB_ARBITER_TIMER | ||
139 | * Set internal bus arbiter timeout to 40us based on core clock speed | ||
140 | * (6.75MHZ * 40us = 0x10E) | ||
141 | */ | ||
142 | crystalhd_reg_wr(adp, GISB_ARBITER_TIMER, 0x10E); | ||
143 | |||
144 | /* Link clocks: MISC_PERST_CLOCK_CTRL | ||
145 | * Stop core clk, delay | ||
146 | * Set alternate clk, delay, set PLL power down | ||
147 | */ | ||
148 | rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL); | ||
149 | rst_clk_cntrl.stop_core_clk = 1; | ||
150 | rst_clk_cntrl.sel_alt_clk = 1; | ||
151 | crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg); | ||
152 | msleep_interruptible(50); | ||
153 | |||
154 | rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL); | ||
155 | rst_clk_cntrl.pll_pwr_dn = 1; | ||
156 | crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg); | ||
157 | |||
158 | /* | ||
159 | * Read and restore the Transaction Configuration Register | ||
160 | * after core reset | ||
161 | */ | ||
162 | temp = crystalhd_reg_rd(adp, PCIE_TL_TRANSACTION_CONFIGURATION); | ||
163 | |||
164 | /* | ||
165 | * Link core soft reset: MISC3_RESET_CTRL | ||
166 | * - Write BIT[0]=1 and read it back for core reset to take place | ||
167 | */ | ||
168 | crystalhd_reg_wr(adp, MISC3_RESET_CTRL, 1); | ||
169 | rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC3_RESET_CTRL); | ||
170 | msleep_interruptible(50); | ||
171 | |||
172 | /* restore the transaction configuration register */ | ||
173 | crystalhd_reg_wr(adp, PCIE_TL_TRANSACTION_CONFIGURATION, temp); | ||
174 | |||
175 | return true; | ||
176 | } | ||
177 | |||
178 | static void crystalhd_disable_interrupts(struct crystalhd_adp *adp) | ||
179 | { | ||
180 | intr_mask_reg intr_mask; | ||
181 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); | ||
182 | intr_mask.mask_pcie_err = 1; | ||
183 | intr_mask.mask_pcie_rbusmast_err = 1; | ||
184 | intr_mask.mask_pcie_rgr_bridge = 1; | ||
185 | intr_mask.mask_rx_done = 1; | ||
186 | intr_mask.mask_rx_err = 1; | ||
187 | intr_mask.mask_tx_done = 1; | ||
188 | intr_mask.mask_tx_err = 1; | ||
189 | crystalhd_reg_wr(adp, INTR_INTR_MSK_SET_REG, intr_mask.whole_reg); | ||
190 | |||
191 | return; | ||
192 | } | ||
193 | |||
194 | static void crystalhd_enable_interrupts(struct crystalhd_adp *adp) | ||
195 | { | ||
196 | intr_mask_reg intr_mask; | ||
197 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); | ||
198 | intr_mask.mask_pcie_err = 1; | ||
199 | intr_mask.mask_pcie_rbusmast_err = 1; | ||
200 | intr_mask.mask_pcie_rgr_bridge = 1; | ||
201 | intr_mask.mask_rx_done = 1; | ||
202 | intr_mask.mask_rx_err = 1; | ||
203 | intr_mask.mask_tx_done = 1; | ||
204 | intr_mask.mask_tx_err = 1; | ||
205 | crystalhd_reg_wr(adp, INTR_INTR_MSK_CLR_REG, intr_mask.whole_reg); | ||
206 | |||
207 | return; | ||
208 | } | ||
209 | |||
210 | static void crystalhd_clear_errors(struct crystalhd_adp *adp) | ||
211 | { | ||
212 | uint32_t reg; | ||
213 | |||
214 | /* FIXME: jarod: wouldn't we want to write a 0 to the reg? Or does the write clear the bits specified? */ | ||
215 | reg = crystalhd_reg_rd(adp, MISC1_Y_RX_ERROR_STATUS); | ||
216 | if (reg) | ||
217 | crystalhd_reg_wr(adp, MISC1_Y_RX_ERROR_STATUS, reg); | ||
218 | |||
219 | reg = crystalhd_reg_rd(adp, MISC1_UV_RX_ERROR_STATUS); | ||
220 | if (reg) | ||
221 | crystalhd_reg_wr(adp, MISC1_UV_RX_ERROR_STATUS, reg); | ||
222 | |||
223 | reg = crystalhd_reg_rd(adp, MISC1_TX_DMA_ERROR_STATUS); | ||
224 | if (reg) | ||
225 | crystalhd_reg_wr(adp, MISC1_TX_DMA_ERROR_STATUS, reg); | ||
226 | } | ||
227 | |||
228 | static void crystalhd_clear_interrupts(struct crystalhd_adp *adp) | ||
229 | { | ||
230 | uint32_t intr_sts = crystalhd_reg_rd(adp, INTR_INTR_STATUS); | ||
231 | |||
232 | if (intr_sts) { | ||
233 | crystalhd_reg_wr(adp, INTR_INTR_CLR_REG, intr_sts); | ||
234 | |||
235 | /* Write End Of Interrupt for PCIE */ | ||
236 | crystalhd_reg_wr(adp, INTR_EOI_CTRL, 1); | ||
237 | } | ||
238 | } | ||
239 | |||
240 | static void crystalhd_soft_rst(struct crystalhd_adp *adp) | ||
241 | { | ||
242 | uint32_t val; | ||
243 | |||
244 | /* Assert c011 soft reset*/ | ||
245 | bc_dec_reg_wr(adp, DecHt_HostSwReset, 0x00000001); | ||
246 | msleep_interruptible(50); | ||
247 | |||
248 | /* Release c011 soft reset*/ | ||
249 | bc_dec_reg_wr(adp, DecHt_HostSwReset, 0x00000000); | ||
250 | |||
251 | /* Disable Stuffing..*/ | ||
252 | val = crystalhd_reg_rd(adp, MISC2_GLOBAL_CTRL); | ||
253 | val |= BC_BIT(8); | ||
254 | crystalhd_reg_wr(adp, MISC2_GLOBAL_CTRL, val); | ||
255 | } | ||
256 | |||
257 | static bool crystalhd_load_firmware_config(struct crystalhd_adp *adp) | ||
258 | { | ||
259 | uint32_t i = 0, reg; | ||
260 | |||
261 | crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (BC_DRAM_FW_CFG_ADDR >> 19)); | ||
262 | |||
263 | crystalhd_reg_wr(adp, AES_CMD, 0); | ||
264 | crystalhd_reg_wr(adp, AES_CONFIG_INFO, (BC_DRAM_FW_CFG_ADDR & 0x7FFFF)); | ||
265 | crystalhd_reg_wr(adp, AES_CMD, 0x1); | ||
266 | |||
267 | /* FIXME: jarod: I've seen this fail, and introducing extra delays helps... */ | ||
268 | for (i = 0; i < 100; ++i) { | ||
269 | reg = crystalhd_reg_rd(adp, AES_STATUS); | ||
270 | if (reg & 0x1) | ||
271 | return true; | ||
272 | msleep_interruptible(10); | ||
273 | } | ||
274 | |||
275 | return false; | ||
276 | } | ||
277 | |||
278 | |||
279 | static bool crystalhd_start_device(struct crystalhd_adp *adp) | ||
280 | { | ||
281 | uint32_t dbg_options, glb_cntrl = 0, reg_pwrmgmt = 0; | ||
282 | |||
283 | BCMLOG(BCMLOG_INFO, "Starting BCM70012 Device\n"); | ||
284 | |||
285 | reg_pwrmgmt = crystalhd_reg_rd(adp, PCIE_DLL_DATA_LINK_CONTROL); | ||
286 | reg_pwrmgmt &= ~ASPM_L1_ENABLE; | ||
287 | |||
288 | crystalhd_reg_wr(adp, PCIE_DLL_DATA_LINK_CONTROL, reg_pwrmgmt); | ||
289 | |||
290 | if (!crystalhd_bring_out_of_rst(adp)) { | ||
291 | BCMLOG_ERR("Failed To Bring Link Out Of Reset\n"); | ||
292 | return false; | ||
293 | } | ||
294 | |||
295 | crystalhd_disable_interrupts(adp); | ||
296 | |||
297 | crystalhd_clear_errors(adp); | ||
298 | |||
299 | crystalhd_clear_interrupts(adp); | ||
300 | |||
301 | crystalhd_enable_interrupts(adp); | ||
302 | |||
303 | /* Enable the option for getting the total no. of DWORDS | ||
304 | * that have been transfered by the RXDMA engine | ||
305 | */ | ||
306 | dbg_options = crystalhd_reg_rd(adp, MISC1_DMA_DEBUG_OPTIONS_REG); | ||
307 | dbg_options |= 0x10; | ||
308 | crystalhd_reg_wr(adp, MISC1_DMA_DEBUG_OPTIONS_REG, dbg_options); | ||
309 | |||
310 | /* Enable PCI Global Control options */ | ||
311 | glb_cntrl = crystalhd_reg_rd(adp, MISC2_GLOBAL_CTRL); | ||
312 | glb_cntrl |= 0x100; | ||
313 | glb_cntrl |= 0x8000; | ||
314 | crystalhd_reg_wr(adp, MISC2_GLOBAL_CTRL, glb_cntrl); | ||
315 | |||
316 | crystalhd_enable_interrupts(adp); | ||
317 | |||
318 | crystalhd_soft_rst(adp); | ||
319 | crystalhd_start_dram(adp); | ||
320 | crystalhd_enable_uarts(adp); | ||
321 | |||
322 | return true; | ||
323 | } | ||
324 | |||
325 | static bool crystalhd_stop_device(struct crystalhd_adp *adp) | ||
326 | { | ||
327 | uint32_t reg; | ||
328 | |||
329 | BCMLOG(BCMLOG_INFO, "Stopping BCM70012 Device\n"); | ||
330 | /* Clear and disable interrupts */ | ||
331 | crystalhd_disable_interrupts(adp); | ||
332 | crystalhd_clear_errors(adp); | ||
333 | crystalhd_clear_interrupts(adp); | ||
334 | |||
335 | if (!crystalhd_put_in_reset(adp)) | ||
336 | BCMLOG_ERR("Failed to Put Link To Reset State\n"); | ||
337 | |||
338 | reg = crystalhd_reg_rd(adp, PCIE_DLL_DATA_LINK_CONTROL); | ||
339 | reg |= ASPM_L1_ENABLE; | ||
340 | crystalhd_reg_wr(adp, PCIE_DLL_DATA_LINK_CONTROL, reg); | ||
341 | |||
342 | /* Set PCI Clk Req */ | ||
343 | reg = crystalhd_reg_rd(adp, PCIE_CLK_REQ_REG); | ||
344 | reg |= PCI_CLK_REQ_ENABLE; | ||
345 | crystalhd_reg_wr(adp, PCIE_CLK_REQ_REG, reg); | ||
346 | |||
347 | return true; | ||
348 | } | ||
349 | |||
350 | static crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw) | ||
351 | { | ||
352 | unsigned long flags = 0; | ||
353 | crystalhd_rx_dma_pkt *temp = NULL; | ||
354 | |||
355 | if (!hw) | ||
356 | return NULL; | ||
357 | |||
358 | spin_lock_irqsave(&hw->lock, flags); | ||
359 | temp = hw->rx_pkt_pool_head; | ||
360 | if (temp) { | ||
361 | hw->rx_pkt_pool_head = hw->rx_pkt_pool_head->next; | ||
362 | temp->dio_req = NULL; | ||
363 | temp->pkt_tag = 0; | ||
364 | temp->flags = 0; | ||
365 | } | ||
366 | spin_unlock_irqrestore(&hw->lock, flags); | ||
367 | |||
368 | return temp; | ||
369 | } | ||
370 | |||
371 | static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw, | ||
372 | crystalhd_rx_dma_pkt *pkt) | ||
373 | { | ||
374 | unsigned long flags = 0; | ||
375 | |||
376 | if (!hw || !pkt) | ||
377 | return; | ||
378 | |||
379 | spin_lock_irqsave(&hw->lock, flags); | ||
380 | pkt->next = hw->rx_pkt_pool_head; | ||
381 | hw->rx_pkt_pool_head = pkt; | ||
382 | spin_unlock_irqrestore(&hw->lock, flags); | ||
383 | } | ||
384 | |||
385 | /* | ||
386 | * Call back from TX - IOQ deletion. | ||
387 | * | ||
388 | * This routine will release the TX DMA rings allocated | ||
389 | * druing setup_dma rings interface. | ||
390 | * | ||
391 | * Memory is allocated per DMA ring basis. This is just | ||
392 | * a place holder to be able to create the dio queues. | ||
393 | */ | ||
394 | static void crystalhd_tx_desc_rel_call_back(void *context, void *data) | ||
395 | { | ||
396 | } | ||
397 | |||
398 | /* | ||
399 | * Rx Packet release callback.. | ||
400 | * | ||
401 | * Release All user mapped capture buffers and Our DMA packets | ||
402 | * back to our free pool. The actual cleanup of the DMA | ||
403 | * ring descriptors happen during dma ring release. | ||
404 | */ | ||
405 | static void crystalhd_rx_pkt_rel_call_back(void *context, void *data) | ||
406 | { | ||
407 | struct crystalhd_hw *hw = (struct crystalhd_hw *)context; | ||
408 | crystalhd_rx_dma_pkt *pkt = (crystalhd_rx_dma_pkt *)data; | ||
409 | |||
410 | if (!pkt || !hw) { | ||
411 | BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt); | ||
412 | return; | ||
413 | } | ||
414 | |||
415 | if (pkt->dio_req) | ||
416 | crystalhd_unmap_dio(hw->adp, pkt->dio_req); | ||
417 | else | ||
418 | BCMLOG_ERR("Missing dio_req: 0x%x\n", pkt->pkt_tag); | ||
419 | |||
420 | crystalhd_hw_free_rx_pkt(hw, pkt); | ||
421 | } | ||
422 | |||
423 | #define crystalhd_hw_delete_ioq(adp, q) \ | ||
424 | if (q) { \ | ||
425 | crystalhd_delete_dioq(adp, q); \ | ||
426 | q = NULL; \ | ||
427 | } | ||
428 | |||
429 | static void crystalhd_hw_delete_ioqs(struct crystalhd_hw *hw) | ||
430 | { | ||
431 | if (!hw) | ||
432 | return; | ||
433 | |||
434 | BCMLOG(BCMLOG_DBG, "Deleting IOQs \n"); | ||
435 | crystalhd_hw_delete_ioq(hw->adp, hw->tx_actq); | ||
436 | crystalhd_hw_delete_ioq(hw->adp, hw->tx_freeq); | ||
437 | crystalhd_hw_delete_ioq(hw->adp, hw->rx_actq); | ||
438 | crystalhd_hw_delete_ioq(hw->adp, hw->rx_freeq); | ||
439 | crystalhd_hw_delete_ioq(hw->adp, hw->rx_rdyq); | ||
440 | } | ||
441 | |||
442 | #define crystalhd_hw_create_ioq(sts, hw, q, cb) \ | ||
443 | do { \ | ||
444 | sts = crystalhd_create_dioq(hw->adp, &q, cb, hw); \ | ||
445 | if (sts != BC_STS_SUCCESS) \ | ||
446 | goto hw_create_ioq_err; \ | ||
447 | } while (0) | ||
448 | |||
449 | /* | ||
450 | * Create IOQs.. | ||
451 | * | ||
452 | * TX - Active & Free | ||
453 | * RX - Active, Ready and Free. | ||
454 | */ | ||
455 | static BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw) | ||
456 | { | ||
457 | BC_STATUS sts = BC_STS_SUCCESS; | ||
458 | |||
459 | if (!hw) { | ||
460 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
461 | return BC_STS_INV_ARG; | ||
462 | } | ||
463 | |||
464 | crystalhd_hw_create_ioq(sts, hw, hw->tx_freeq, | ||
465 | crystalhd_tx_desc_rel_call_back); | ||
466 | crystalhd_hw_create_ioq(sts, hw, hw->tx_actq, | ||
467 | crystalhd_tx_desc_rel_call_back); | ||
468 | |||
469 | crystalhd_hw_create_ioq(sts, hw, hw->rx_freeq, | ||
470 | crystalhd_rx_pkt_rel_call_back); | ||
471 | crystalhd_hw_create_ioq(sts, hw, hw->rx_rdyq, | ||
472 | crystalhd_rx_pkt_rel_call_back); | ||
473 | crystalhd_hw_create_ioq(sts, hw, hw->rx_actq, | ||
474 | crystalhd_rx_pkt_rel_call_back); | ||
475 | |||
476 | return sts; | ||
477 | |||
478 | hw_create_ioq_err: | ||
479 | crystalhd_hw_delete_ioqs(hw); | ||
480 | |||
481 | return sts; | ||
482 | } | ||
483 | |||
484 | |||
485 | static bool crystalhd_code_in_full(struct crystalhd_adp *adp, uint32_t needed_sz, | ||
486 | bool b_188_byte_pkts, uint8_t flags) | ||
487 | { | ||
488 | uint32_t base, end, writep, readp; | ||
489 | uint32_t cpbSize, cpbFullness, fifoSize; | ||
490 | |||
491 | if (flags & 0x02) { /* ASF Bit is set */ | ||
492 | base = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Base); | ||
493 | end = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2End); | ||
494 | writep = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Wrptr); | ||
495 | readp = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Rdptr); | ||
496 | } else if (b_188_byte_pkts) { /*Encrypted 188 byte packets*/ | ||
497 | base = bc_dec_reg_rd(adp, REG_Dec_TsUser0Base); | ||
498 | end = bc_dec_reg_rd(adp, REG_Dec_TsUser0End); | ||
499 | writep = bc_dec_reg_rd(adp, REG_Dec_TsUser0Wrptr); | ||
500 | readp = bc_dec_reg_rd(adp, REG_Dec_TsUser0Rdptr); | ||
501 | } else { | ||
502 | base = bc_dec_reg_rd(adp, REG_DecCA_RegCinBase); | ||
503 | end = bc_dec_reg_rd(adp, REG_DecCA_RegCinEnd); | ||
504 | writep = bc_dec_reg_rd(adp, REG_DecCA_RegCinWrPtr); | ||
505 | readp = bc_dec_reg_rd(adp, REG_DecCA_RegCinRdPtr); | ||
506 | } | ||
507 | |||
508 | cpbSize = end - base; | ||
509 | if (writep >= readp) | ||
510 | cpbFullness = writep - readp; | ||
511 | else | ||
512 | cpbFullness = (end - base) - (readp - writep); | ||
513 | |||
514 | fifoSize = cpbSize - cpbFullness; | ||
515 | |||
516 | if (fifoSize < BC_INFIFO_THRESHOLD) | ||
517 | return true; | ||
518 | |||
519 | if (needed_sz > (fifoSize - BC_INFIFO_THRESHOLD)) | ||
520 | return true; | ||
521 | |||
522 | return false; | ||
523 | } | ||
524 | |||
525 | static BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw, | ||
526 | uint32_t list_id, BC_STATUS cs) | ||
527 | { | ||
528 | tx_dma_pkt *tx_req; | ||
529 | |||
530 | if (!hw || !list_id) { | ||
531 | BCMLOG_ERR("Invalid Arg..\n"); | ||
532 | return BC_STS_INV_ARG; | ||
533 | } | ||
534 | |||
535 | hw->pwr_lock--; | ||
536 | |||
537 | tx_req = (tx_dma_pkt *)crystalhd_dioq_find_and_fetch(hw->tx_actq, list_id); | ||
538 | if (!tx_req) { | ||
539 | if (cs != BC_STS_IO_USER_ABORT) | ||
540 | BCMLOG_ERR("Find and Fetch Did not find req\n"); | ||
541 | return BC_STS_NO_DATA; | ||
542 | } | ||
543 | |||
544 | if (tx_req->call_back) { | ||
545 | tx_req->call_back(tx_req->dio_req, tx_req->cb_event, cs); | ||
546 | tx_req->dio_req = NULL; | ||
547 | tx_req->cb_event = NULL; | ||
548 | tx_req->call_back = NULL; | ||
549 | } else { | ||
550 | BCMLOG(BCMLOG_DBG, "Missing Tx Callback - %X\n", | ||
551 | tx_req->list_tag); | ||
552 | } | ||
553 | |||
554 | /* Now put back the tx_list back in FreeQ */ | ||
555 | tx_req->list_tag = 0; | ||
556 | |||
557 | return crystalhd_dioq_add(hw->tx_freeq, tx_req, false, 0); | ||
558 | } | ||
559 | |||
560 | static bool crystalhd_tx_list0_handler(struct crystalhd_hw *hw, uint32_t err_sts) | ||
561 | { | ||
562 | uint32_t err_mask, tmp; | ||
563 | unsigned long flags = 0; | ||
564 | |||
565 | err_mask = MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_MASK | | ||
566 | MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_MASK | | ||
567 | MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK; | ||
568 | |||
569 | if (!(err_sts & err_mask)) | ||
570 | return false; | ||
571 | |||
572 | BCMLOG_ERR("Error on Tx-L0 %x \n", err_sts); | ||
573 | |||
574 | tmp = err_mask; | ||
575 | |||
576 | if (err_sts & MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK) | ||
577 | tmp &= ~MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK; | ||
578 | |||
579 | if (tmp) { | ||
580 | spin_lock_irqsave(&hw->lock, flags); | ||
581 | /* reset list index.*/ | ||
582 | hw->tx_list_post_index = 0; | ||
583 | spin_unlock_irqrestore(&hw->lock, flags); | ||
584 | } | ||
585 | |||
586 | tmp = err_sts & err_mask; | ||
587 | crystalhd_reg_wr(hw->adp, MISC1_TX_DMA_ERROR_STATUS, tmp); | ||
588 | |||
589 | return true; | ||
590 | } | ||
591 | |||
592 | static bool crystalhd_tx_list1_handler(struct crystalhd_hw *hw, uint32_t err_sts) | ||
593 | { | ||
594 | uint32_t err_mask, tmp; | ||
595 | unsigned long flags = 0; | ||
596 | |||
597 | err_mask = MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_MASK | | ||
598 | MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_MASK | | ||
599 | MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK; | ||
600 | |||
601 | if (!(err_sts & err_mask)) | ||
602 | return false; | ||
603 | |||
604 | BCMLOG_ERR("Error on Tx-L1 %x \n", err_sts); | ||
605 | |||
606 | tmp = err_mask; | ||
607 | |||
608 | if (err_sts & MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK) | ||
609 | tmp &= ~MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK; | ||
610 | |||
611 | if (tmp) { | ||
612 | spin_lock_irqsave(&hw->lock, flags); | ||
613 | /* reset list index.*/ | ||
614 | hw->tx_list_post_index = 0; | ||
615 | spin_unlock_irqrestore(&hw->lock, flags); | ||
616 | } | ||
617 | |||
618 | tmp = err_sts & err_mask; | ||
619 | crystalhd_reg_wr(hw->adp, MISC1_TX_DMA_ERROR_STATUS, tmp); | ||
620 | |||
621 | return true; | ||
622 | } | ||
623 | |||
624 | static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts) | ||
625 | { | ||
626 | uint32_t err_sts; | ||
627 | |||
628 | if (int_sts & INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_MASK) | ||
629 | crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 0, | ||
630 | BC_STS_SUCCESS); | ||
631 | |||
632 | if (int_sts & INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_MASK) | ||
633 | crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 1, | ||
634 | BC_STS_SUCCESS); | ||
635 | |||
636 | if (!(int_sts & (INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK | | ||
637 | INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) { | ||
638 | /* No error mask set.. */ | ||
639 | return; | ||
640 | } | ||
641 | |||
642 | /* Handle Tx errors. */ | ||
643 | err_sts = crystalhd_reg_rd(hw->adp, MISC1_TX_DMA_ERROR_STATUS); | ||
644 | |||
645 | if (crystalhd_tx_list0_handler(hw, err_sts)) | ||
646 | crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 0, | ||
647 | BC_STS_ERROR); | ||
648 | |||
649 | if (crystalhd_tx_list1_handler(hw, err_sts)) | ||
650 | crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 1, | ||
651 | BC_STS_ERROR); | ||
652 | |||
653 | hw->stats.tx_errors++; | ||
654 | } | ||
655 | |||
656 | static void crystalhd_hw_dump_desc(pdma_descriptor p_dma_desc, | ||
657 | uint32_t ul_desc_index, uint32_t cnt) | ||
658 | { | ||
659 | uint32_t ix, ll = 0; | ||
660 | |||
661 | if (!p_dma_desc || !cnt) | ||
662 | return; | ||
663 | |||
664 | /* FIXME: jarod: perhaps a modparam desc_debug to enable this, rather than | ||
665 | * setting ll (log level, I presume) to non-zero? */ | ||
666 | if (!ll) | ||
667 | return; | ||
668 | |||
669 | for (ix = ul_desc_index; ix < (ul_desc_index + cnt); ix++) { | ||
670 | BCMLOG(ll, "%s[%d] Buff[%x:%x] Next:[%x:%x] XferSz:%x Intr:%x,Last:%x\n", | ||
671 | ((p_dma_desc[ul_desc_index].dma_dir) ? "TDesc" : "RDesc"), | ||
672 | ul_desc_index, | ||
673 | p_dma_desc[ul_desc_index].buff_addr_high, | ||
674 | p_dma_desc[ul_desc_index].buff_addr_low, | ||
675 | p_dma_desc[ul_desc_index].next_desc_addr_high, | ||
676 | p_dma_desc[ul_desc_index].next_desc_addr_low, | ||
677 | p_dma_desc[ul_desc_index].xfer_size, | ||
678 | p_dma_desc[ul_desc_index].intr_enable, | ||
679 | p_dma_desc[ul_desc_index].last_rec_indicator); | ||
680 | } | ||
681 | |||
682 | } | ||
683 | |||
684 | static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, | ||
685 | dma_descriptor *desc, | ||
686 | dma_addr_t desc_paddr_base, | ||
687 | uint32_t sg_cnt, uint32_t sg_st_ix, | ||
688 | uint32_t sg_st_off, uint32_t xfr_sz) | ||
689 | { | ||
690 | uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0; | ||
691 | dma_addr_t desc_phy_addr = desc_paddr_base; | ||
692 | addr_64 addr_temp; | ||
693 | |||
694 | if (!ioreq || !desc || !desc_paddr_base || !xfr_sz || | ||
695 | (!sg_cnt && !ioreq->uinfo.dir_tx)) { | ||
696 | BCMLOG_ERR("Invalid Args\n"); | ||
697 | return BC_STS_INV_ARG; | ||
698 | } | ||
699 | |||
700 | for (ix = 0; ix < sg_cnt; ix++) { | ||
701 | |||
702 | /* Setup SGLE index. */ | ||
703 | sg_ix = ix + sg_st_ix; | ||
704 | |||
705 | /* Get SGLE length */ | ||
706 | len = crystalhd_get_sgle_len(ioreq, sg_ix); | ||
707 | if (len % 4) { | ||
708 | BCMLOG_ERR(" len in sg %d %d %d\n", len, sg_ix, sg_cnt); | ||
709 | return BC_STS_NOT_IMPL; | ||
710 | } | ||
711 | /* Setup DMA desc with Phy addr & Length at current index. */ | ||
712 | addr_temp.full_addr = crystalhd_get_sgle_paddr(ioreq, sg_ix); | ||
713 | if (sg_ix == sg_st_ix) { | ||
714 | addr_temp.full_addr += sg_st_off; | ||
715 | len -= sg_st_off; | ||
716 | } | ||
717 | memset(&desc[ix], 0, sizeof(desc[ix])); | ||
718 | desc[ix].buff_addr_low = addr_temp.low_part; | ||
719 | desc[ix].buff_addr_high = addr_temp.high_part; | ||
720 | desc[ix].dma_dir = ioreq->uinfo.dir_tx; | ||
721 | |||
722 | /* Chain DMA descriptor. */ | ||
723 | addr_temp.full_addr = desc_phy_addr + sizeof(dma_descriptor); | ||
724 | desc[ix].next_desc_addr_low = addr_temp.low_part; | ||
725 | desc[ix].next_desc_addr_high = addr_temp.high_part; | ||
726 | |||
727 | if ((count + len) > xfr_sz) | ||
728 | len = xfr_sz - count; | ||
729 | |||
730 | /* Debug.. */ | ||
731 | if ((!len) || (len > crystalhd_get_sgle_len(ioreq, sg_ix))) { | ||
732 | BCMLOG_ERR("inv-len(%x) Ix(%d) count:%x xfr_sz:%x sg_cnt:%d\n", | ||
733 | len, ix, count, xfr_sz, sg_cnt); | ||
734 | return BC_STS_ERROR; | ||
735 | } | ||
736 | /* Length expects Multiple of 4 */ | ||
737 | desc[ix].xfer_size = (len / 4); | ||
738 | |||
739 | crystalhd_hw_dump_desc(desc, ix, 1); | ||
740 | |||
741 | count += len; | ||
742 | desc_phy_addr += sizeof(dma_descriptor); | ||
743 | } | ||
744 | |||
745 | last_desc_ix = ix - 1; | ||
746 | |||
747 | if (ioreq->fb_size) { | ||
748 | memset(&desc[ix], 0, sizeof(desc[ix])); | ||
749 | addr_temp.full_addr = ioreq->fb_pa; | ||
750 | desc[ix].buff_addr_low = addr_temp.low_part; | ||
751 | desc[ix].buff_addr_high = addr_temp.high_part; | ||
752 | desc[ix].dma_dir = ioreq->uinfo.dir_tx; | ||
753 | desc[ix].xfer_size = 1; | ||
754 | desc[ix].fill_bytes = 4 - ioreq->fb_size; | ||
755 | count += ioreq->fb_size; | ||
756 | last_desc_ix++; | ||
757 | } | ||
758 | |||
759 | /* setup last descriptor..*/ | ||
760 | desc[last_desc_ix].last_rec_indicator = 1; | ||
761 | desc[last_desc_ix].next_desc_addr_low = 0; | ||
762 | desc[last_desc_ix].next_desc_addr_high = 0; | ||
763 | desc[last_desc_ix].intr_enable = 1; | ||
764 | |||
765 | crystalhd_hw_dump_desc(desc, last_desc_ix, 1); | ||
766 | |||
767 | if (count != xfr_sz) { | ||
768 | BCMLOG_ERR("interal error sz curr:%x exp:%x\n", count, xfr_sz); | ||
769 | return BC_STS_ERROR; | ||
770 | } | ||
771 | |||
772 | return BC_STS_SUCCESS; | ||
773 | } | ||
774 | |||
775 | static BC_STATUS crystalhd_xlat_sgl_to_dma_desc(crystalhd_dio_req *ioreq, | ||
776 | pdma_desc_mem pdesc_mem, | ||
777 | uint32_t *uv_desc_index) | ||
778 | { | ||
779 | dma_descriptor *desc = NULL; | ||
780 | dma_addr_t desc_paddr_base = 0; | ||
781 | uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0; | ||
782 | uint32_t xfr_sz = 0; | ||
783 | BC_STATUS sts = BC_STS_SUCCESS; | ||
784 | |||
785 | /* Check params.. */ | ||
786 | if (!ioreq || !pdesc_mem || !uv_desc_index) { | ||
787 | BCMLOG_ERR("Invalid Args\n"); | ||
788 | return BC_STS_INV_ARG; | ||
789 | } | ||
790 | |||
791 | if (!pdesc_mem->sz || !pdesc_mem->pdma_desc_start || | ||
792 | !ioreq->sg || (!ioreq->sg_cnt && !ioreq->uinfo.dir_tx)) { | ||
793 | BCMLOG_ERR("Invalid Args\n"); | ||
794 | return BC_STS_INV_ARG; | ||
795 | } | ||
796 | |||
797 | if ((ioreq->uinfo.dir_tx) && (ioreq->uinfo.uv_offset)) { | ||
798 | BCMLOG_ERR("UV offset for TX??\n"); | ||
799 | return BC_STS_INV_ARG; | ||
800 | |||
801 | } | ||
802 | |||
803 | desc = pdesc_mem->pdma_desc_start; | ||
804 | desc_paddr_base = pdesc_mem->phy_addr; | ||
805 | |||
806 | if (ioreq->uinfo.dir_tx || (ioreq->uinfo.uv_offset == 0)) { | ||
807 | sg_cnt = ioreq->sg_cnt; | ||
808 | xfr_sz = ioreq->uinfo.xfr_len; | ||
809 | } else { | ||
810 | sg_cnt = ioreq->uinfo.uv_sg_ix + 1; | ||
811 | xfr_sz = ioreq->uinfo.uv_offset; | ||
812 | } | ||
813 | |||
814 | sts = crystalhd_hw_fill_desc(ioreq, desc, desc_paddr_base, sg_cnt, | ||
815 | sg_st_ix, sg_st_off, xfr_sz); | ||
816 | |||
817 | if ((sts != BC_STS_SUCCESS) || !ioreq->uinfo.uv_offset) | ||
818 | return sts; | ||
819 | |||
820 | /* Prepare for UV mapping.. */ | ||
821 | desc = &pdesc_mem->pdma_desc_start[sg_cnt]; | ||
822 | desc_paddr_base = pdesc_mem->phy_addr + | ||
823 | (sg_cnt * sizeof(dma_descriptor)); | ||
824 | |||
825 | /* Done with desc addr.. now update sg stuff.*/ | ||
826 | sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix; | ||
827 | xfr_sz = ioreq->uinfo.xfr_len - ioreq->uinfo.uv_offset; | ||
828 | sg_st_ix = ioreq->uinfo.uv_sg_ix; | ||
829 | sg_st_off = ioreq->uinfo.uv_sg_off; | ||
830 | |||
831 | sts = crystalhd_hw_fill_desc(ioreq, desc, desc_paddr_base, sg_cnt, | ||
832 | sg_st_ix, sg_st_off, xfr_sz); | ||
833 | if (sts != BC_STS_SUCCESS) | ||
834 | return sts; | ||
835 | |||
836 | *uv_desc_index = sg_st_ix; | ||
837 | |||
838 | return sts; | ||
839 | } | ||
840 | |||
841 | static void crystalhd_start_tx_dma_engine(struct crystalhd_hw *hw) | ||
842 | { | ||
843 | uint32_t dma_cntrl; | ||
844 | |||
845 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS); | ||
846 | if (!(dma_cntrl & DMA_START_BIT)) { | ||
847 | dma_cntrl |= DMA_START_BIT; | ||
848 | crystalhd_reg_wr(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS, | ||
849 | dma_cntrl); | ||
850 | } | ||
851 | |||
852 | return; | ||
853 | } | ||
854 | |||
855 | /* _CHECK_THIS_ | ||
856 | * | ||
857 | * Verify if the Stop generates a completion interrupt or not. | ||
858 | * if it does not generate an interrupt, then add polling here. | ||
859 | */ | ||
860 | static BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw) | ||
861 | { | ||
862 | uint32_t dma_cntrl, cnt = 30; | ||
863 | uint32_t l1 = 1, l2 = 1; | ||
864 | unsigned long flags = 0; | ||
865 | |||
866 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS); | ||
867 | |||
868 | BCMLOG(BCMLOG_DBG, "Stopping TX DMA Engine..\n"); | ||
869 | |||
870 | /* FIXME: jarod: invert dma_ctrl and check bit? or are there missing parens? */ | ||
871 | if (!dma_cntrl & DMA_START_BIT) { | ||
872 | BCMLOG(BCMLOG_DBG, "Already Stopped\n"); | ||
873 | return BC_STS_SUCCESS; | ||
874 | } | ||
875 | |||
876 | crystalhd_disable_interrupts(hw->adp); | ||
877 | |||
878 | /* Issue stop to HW */ | ||
879 | /* This bit when set gave problems. Please check*/ | ||
880 | dma_cntrl &= ~DMA_START_BIT; | ||
881 | crystalhd_reg_wr(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
882 | |||
883 | BCMLOG(BCMLOG_DBG, "Cleared the DMA Start bit\n"); | ||
884 | |||
885 | /* Poll for 3seconds (30 * 100ms) on both the lists..*/ | ||
886 | while ((l1 || l2) && cnt) { | ||
887 | |||
888 | if (l1) { | ||
889 | l1 = crystalhd_reg_rd(hw->adp, MISC1_TX_FIRST_DESC_L_ADDR_LIST0); | ||
890 | l1 &= DMA_START_BIT; | ||
891 | } | ||
892 | |||
893 | if (l2) { | ||
894 | l2 = crystalhd_reg_rd(hw->adp, MISC1_TX_FIRST_DESC_L_ADDR_LIST1); | ||
895 | l2 &= DMA_START_BIT; | ||
896 | } | ||
897 | |||
898 | msleep_interruptible(100); | ||
899 | |||
900 | cnt--; | ||
901 | } | ||
902 | |||
903 | if (!cnt) { | ||
904 | BCMLOG_ERR("Failed to stop TX DMA.. l1 %d, l2 %d\n", l1, l2); | ||
905 | crystalhd_enable_interrupts(hw->adp); | ||
906 | return BC_STS_ERROR; | ||
907 | } | ||
908 | |||
909 | spin_lock_irqsave(&hw->lock, flags); | ||
910 | hw->tx_list_post_index = 0; | ||
911 | spin_unlock_irqrestore(&hw->lock, flags); | ||
912 | BCMLOG(BCMLOG_DBG, "stopped TX DMA..\n"); | ||
913 | crystalhd_enable_interrupts(hw->adp); | ||
914 | |||
915 | return BC_STS_SUCCESS; | ||
916 | } | ||
917 | |||
918 | static uint32_t crystalhd_get_pib_avail_cnt(struct crystalhd_hw *hw) | ||
919 | { | ||
920 | /* | ||
921 | * Position of the PIB Entries can be found at | ||
922 | * 0th and the 1st location of the Circular list. | ||
923 | */ | ||
924 | uint32_t Q_addr; | ||
925 | uint32_t pib_cnt, r_offset, w_offset; | ||
926 | |||
927 | Q_addr = hw->pib_del_Q_addr; | ||
928 | |||
929 | /* Get the Read Pointer */ | ||
930 | crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset); | ||
931 | |||
932 | /* Get the Write Pointer */ | ||
933 | crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset); | ||
934 | |||
935 | if (r_offset == w_offset) | ||
936 | return 0; /* Queue is empty */ | ||
937 | |||
938 | if (w_offset > r_offset) | ||
939 | pib_cnt = w_offset - r_offset; | ||
940 | else | ||
941 | pib_cnt = (w_offset + MAX_PIB_Q_DEPTH) - | ||
942 | (r_offset + MIN_PIB_Q_DEPTH); | ||
943 | |||
944 | if (pib_cnt > MAX_PIB_Q_DEPTH) { | ||
945 | BCMLOG_ERR("Invalid PIB Count (%u)\n", pib_cnt); | ||
946 | return 0; | ||
947 | } | ||
948 | |||
949 | return pib_cnt; | ||
950 | } | ||
951 | |||
952 | static uint32_t crystalhd_get_addr_from_pib_Q(struct crystalhd_hw *hw) | ||
953 | { | ||
954 | uint32_t Q_addr; | ||
955 | uint32_t addr_entry, r_offset, w_offset; | ||
956 | |||
957 | Q_addr = hw->pib_del_Q_addr; | ||
958 | |||
959 | /* Get the Read Pointer 0Th Location is Read Pointer */ | ||
960 | crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset); | ||
961 | |||
962 | /* Get the Write Pointer 1st Location is Write pointer */ | ||
963 | crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset); | ||
964 | |||
965 | /* Queue is empty */ | ||
966 | if (r_offset == w_offset) | ||
967 | return 0; | ||
968 | |||
969 | if ((r_offset < MIN_PIB_Q_DEPTH) || (r_offset >= MAX_PIB_Q_DEPTH)) | ||
970 | return 0; | ||
971 | |||
972 | /* Get the Actual Address of the PIB */ | ||
973 | crystalhd_mem_rd(hw->adp, Q_addr + (r_offset * sizeof(uint32_t)), | ||
974 | 1, &addr_entry); | ||
975 | |||
976 | /* Increment the Read Pointer */ | ||
977 | r_offset++; | ||
978 | |||
979 | if (MAX_PIB_Q_DEPTH == r_offset) | ||
980 | r_offset = MIN_PIB_Q_DEPTH; | ||
981 | |||
982 | /* Write back the read pointer to It's Location */ | ||
983 | crystalhd_mem_wr(hw->adp, Q_addr, 1, &r_offset); | ||
984 | |||
985 | return addr_entry; | ||
986 | } | ||
987 | |||
988 | static bool crystalhd_rel_addr_to_pib_Q(struct crystalhd_hw *hw, uint32_t addr_to_rel) | ||
989 | { | ||
990 | uint32_t Q_addr; | ||
991 | uint32_t r_offset, w_offset, n_offset; | ||
992 | |||
993 | Q_addr = hw->pib_rel_Q_addr; | ||
994 | |||
995 | /* Get the Read Pointer */ | ||
996 | crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset); | ||
997 | |||
998 | /* Get the Write Pointer */ | ||
999 | crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset); | ||
1000 | |||
1001 | if ((r_offset < MIN_PIB_Q_DEPTH) || | ||
1002 | (r_offset >= MAX_PIB_Q_DEPTH)) | ||
1003 | return false; | ||
1004 | |||
1005 | n_offset = w_offset + 1; | ||
1006 | |||
1007 | if (MAX_PIB_Q_DEPTH == n_offset) | ||
1008 | n_offset = MIN_PIB_Q_DEPTH; | ||
1009 | |||
1010 | if (r_offset == n_offset) | ||
1011 | return false; /* should never happen */ | ||
1012 | |||
1013 | /* Write the DRAM ADDR to the Queue at Next Offset */ | ||
1014 | crystalhd_mem_wr(hw->adp, Q_addr + (w_offset * sizeof(uint32_t)), | ||
1015 | 1, &addr_to_rel); | ||
1016 | |||
1017 | /* Put the New value of the write pointer in Queue */ | ||
1018 | crystalhd_mem_wr(hw->adp, Q_addr + sizeof(uint32_t), 1, &n_offset); | ||
1019 | |||
1020 | return true; | ||
1021 | } | ||
1022 | |||
1023 | static void cpy_pib_to_app(C011_PIB *src_pib, BC_PIC_INFO_BLOCK *dst_pib) | ||
1024 | { | ||
1025 | if (!src_pib || !dst_pib) { | ||
1026 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1027 | return; | ||
1028 | } | ||
1029 | |||
1030 | dst_pib->timeStamp = 0; | ||
1031 | dst_pib->picture_number = src_pib->ppb.picture_number; | ||
1032 | dst_pib->width = src_pib->ppb.width; | ||
1033 | dst_pib->height = src_pib->ppb.height; | ||
1034 | dst_pib->chroma_format = src_pib->ppb.chroma_format; | ||
1035 | dst_pib->pulldown = src_pib->ppb.pulldown; | ||
1036 | dst_pib->flags = src_pib->ppb.flags; | ||
1037 | dst_pib->sess_num = src_pib->ptsStcOffset; | ||
1038 | dst_pib->aspect_ratio = src_pib->ppb.aspect_ratio; | ||
1039 | dst_pib->colour_primaries = src_pib->ppb.colour_primaries; | ||
1040 | dst_pib->picture_meta_payload = src_pib->ppb.picture_meta_payload; | ||
1041 | dst_pib->frame_rate = src_pib->resolution ; | ||
1042 | return; | ||
1043 | } | ||
1044 | |||
1045 | static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw) | ||
1046 | { | ||
1047 | unsigned int cnt; | ||
1048 | C011_PIB src_pib; | ||
1049 | uint32_t pib_addr, pib_cnt; | ||
1050 | BC_PIC_INFO_BLOCK *AppPib; | ||
1051 | crystalhd_rx_dma_pkt *rx_pkt = NULL; | ||
1052 | |||
1053 | pib_cnt = crystalhd_get_pib_avail_cnt(hw); | ||
1054 | |||
1055 | if (!pib_cnt) | ||
1056 | return; | ||
1057 | |||
1058 | for (cnt = 0; cnt < pib_cnt; cnt++) { | ||
1059 | |||
1060 | pib_addr = crystalhd_get_addr_from_pib_Q(hw); | ||
1061 | crystalhd_mem_rd(hw->adp, pib_addr, sizeof(C011_PIB) / 4, | ||
1062 | (uint32_t *)&src_pib); | ||
1063 | |||
1064 | if (src_pib.bFormatChange) { | ||
1065 | rx_pkt = (crystalhd_rx_dma_pkt *)crystalhd_dioq_fetch(hw->rx_freeq); | ||
1066 | if (!rx_pkt) | ||
1067 | return; | ||
1068 | rx_pkt->flags = 0; | ||
1069 | rx_pkt->flags |= COMP_FLAG_PIB_VALID | COMP_FLAG_FMT_CHANGE; | ||
1070 | AppPib = &rx_pkt->pib; | ||
1071 | cpy_pib_to_app(&src_pib, AppPib); | ||
1072 | |||
1073 | BCMLOG(BCMLOG_DBG, | ||
1074 | "App PIB:%x %x %x %x %x %x %x %x %x %x\n", | ||
1075 | rx_pkt->pib.picture_number, | ||
1076 | rx_pkt->pib.aspect_ratio, | ||
1077 | rx_pkt->pib.chroma_format, | ||
1078 | rx_pkt->pib.colour_primaries, | ||
1079 | rx_pkt->pib.frame_rate, | ||
1080 | rx_pkt->pib.height, | ||
1081 | rx_pkt->pib.height, | ||
1082 | rx_pkt->pib.n_drop, | ||
1083 | rx_pkt->pib.pulldown, | ||
1084 | rx_pkt->pib.ycom); | ||
1085 | |||
1086 | crystalhd_dioq_add(hw->rx_rdyq, (void *)rx_pkt, true, rx_pkt->pkt_tag); | ||
1087 | |||
1088 | } | ||
1089 | |||
1090 | crystalhd_rel_addr_to_pib_Q(hw, pib_addr); | ||
1091 | } | ||
1092 | } | ||
1093 | |||
1094 | static void crystalhd_start_rx_dma_engine(struct crystalhd_hw *hw) | ||
1095 | { | ||
1096 | uint32_t dma_cntrl; | ||
1097 | |||
1098 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS); | ||
1099 | if (!(dma_cntrl & DMA_START_BIT)) { | ||
1100 | dma_cntrl |= DMA_START_BIT; | ||
1101 | crystalhd_reg_wr(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1102 | } | ||
1103 | |||
1104 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS); | ||
1105 | if (!(dma_cntrl & DMA_START_BIT)) { | ||
1106 | dma_cntrl |= DMA_START_BIT; | ||
1107 | crystalhd_reg_wr(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1108 | } | ||
1109 | |||
1110 | return; | ||
1111 | } | ||
1112 | |||
1113 | static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw) | ||
1114 | { | ||
1115 | uint32_t dma_cntrl = 0, count = 30; | ||
1116 | uint32_t l0y = 1, l0uv = 1, l1y = 1, l1uv = 1; | ||
1117 | |||
1118 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS); | ||
1119 | if ((dma_cntrl & DMA_START_BIT)) { | ||
1120 | dma_cntrl &= ~DMA_START_BIT; | ||
1121 | crystalhd_reg_wr(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1122 | } | ||
1123 | |||
1124 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS); | ||
1125 | if ((dma_cntrl & DMA_START_BIT)) { | ||
1126 | dma_cntrl &= ~DMA_START_BIT; | ||
1127 | crystalhd_reg_wr(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1128 | } | ||
1129 | |||
1130 | /* Poll for 3seconds (30 * 100ms) on both the lists..*/ | ||
1131 | while ((l0y || l0uv || l1y || l1uv) && count) { | ||
1132 | |||
1133 | if (l0y) { | ||
1134 | l0y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0); | ||
1135 | l0y &= DMA_START_BIT; | ||
1136 | if (!l0y) { | ||
1137 | hw->rx_list_sts[0] &= ~rx_waiting_y_intr; | ||
1138 | } | ||
1139 | } | ||
1140 | |||
1141 | if (l1y) { | ||
1142 | l1y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1); | ||
1143 | l1y &= DMA_START_BIT; | ||
1144 | if (!l1y) { | ||
1145 | hw->rx_list_sts[1] &= ~rx_waiting_y_intr; | ||
1146 | } | ||
1147 | } | ||
1148 | |||
1149 | if (l0uv) { | ||
1150 | l0uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0); | ||
1151 | l0uv &= DMA_START_BIT; | ||
1152 | if (!l0uv) { | ||
1153 | hw->rx_list_sts[0] &= ~rx_waiting_uv_intr; | ||
1154 | } | ||
1155 | } | ||
1156 | |||
1157 | if (l1uv) { | ||
1158 | l1uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1); | ||
1159 | l1uv &= DMA_START_BIT; | ||
1160 | if (!l1uv) { | ||
1161 | hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; | ||
1162 | } | ||
1163 | } | ||
1164 | msleep_interruptible(100); | ||
1165 | count--; | ||
1166 | } | ||
1167 | |||
1168 | hw->rx_list_post_index = 0; | ||
1169 | |||
1170 | BCMLOG(BCMLOG_SSTEP, "Capture Stop: %d List0:Sts:%x List1:Sts:%x\n", | ||
1171 | count, hw->rx_list_sts[0], hw->rx_list_sts[1]); | ||
1172 | } | ||
1173 | |||
1174 | static BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, crystalhd_rx_dma_pkt *rx_pkt) | ||
1175 | { | ||
1176 | uint32_t y_low_addr_reg, y_high_addr_reg; | ||
1177 | uint32_t uv_low_addr_reg, uv_high_addr_reg; | ||
1178 | addr_64 desc_addr; | ||
1179 | unsigned long flags; | ||
1180 | |||
1181 | if (!hw || !rx_pkt) { | ||
1182 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1183 | return BC_STS_INV_ARG; | ||
1184 | } | ||
1185 | |||
1186 | if (hw->rx_list_post_index >= DMA_ENGINE_CNT) { | ||
1187 | BCMLOG_ERR("List Out Of bounds %x\n", hw->rx_list_post_index); | ||
1188 | return BC_STS_INV_ARG; | ||
1189 | } | ||
1190 | |||
1191 | spin_lock_irqsave(&hw->rx_lock, flags); | ||
1192 | /* FIXME: jarod: sts_free is an enum for 0, in crystalhd_hw.h... yuk... */ | ||
1193 | if (sts_free != hw->rx_list_sts[hw->rx_list_post_index]) { | ||
1194 | spin_unlock_irqrestore(&hw->rx_lock, flags); | ||
1195 | return BC_STS_BUSY; | ||
1196 | } | ||
1197 | |||
1198 | if (!hw->rx_list_post_index) { | ||
1199 | y_low_addr_reg = MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0; | ||
1200 | y_high_addr_reg = MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST0; | ||
1201 | uv_low_addr_reg = MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0; | ||
1202 | uv_high_addr_reg = MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST0; | ||
1203 | } else { | ||
1204 | y_low_addr_reg = MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1; | ||
1205 | y_high_addr_reg = MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST1; | ||
1206 | uv_low_addr_reg = MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1; | ||
1207 | uv_high_addr_reg = MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST1; | ||
1208 | } | ||
1209 | rx_pkt->pkt_tag = hw->rx_pkt_tag_seed + hw->rx_list_post_index; | ||
1210 | hw->rx_list_sts[hw->rx_list_post_index] |= rx_waiting_y_intr; | ||
1211 | if (rx_pkt->uv_phy_addr) | ||
1212 | hw->rx_list_sts[hw->rx_list_post_index] |= rx_waiting_uv_intr; | ||
1213 | hw->rx_list_post_index = (hw->rx_list_post_index + 1) % DMA_ENGINE_CNT; | ||
1214 | spin_unlock_irqrestore(&hw->rx_lock, flags); | ||
1215 | |||
1216 | crystalhd_dioq_add(hw->rx_actq, (void *)rx_pkt, false, rx_pkt->pkt_tag); | ||
1217 | |||
1218 | crystalhd_start_rx_dma_engine(hw); | ||
1219 | /* Program the Y descriptor */ | ||
1220 | desc_addr.full_addr = rx_pkt->desc_mem.phy_addr; | ||
1221 | crystalhd_reg_wr(hw->adp, y_high_addr_reg, desc_addr.high_part); | ||
1222 | crystalhd_reg_wr(hw->adp, y_low_addr_reg, desc_addr.low_part | 0x01); | ||
1223 | |||
1224 | if (rx_pkt->uv_phy_addr) { | ||
1225 | /* Program the UV descriptor */ | ||
1226 | desc_addr.full_addr = rx_pkt->uv_phy_addr; | ||
1227 | crystalhd_reg_wr(hw->adp, uv_high_addr_reg, desc_addr.high_part); | ||
1228 | crystalhd_reg_wr(hw->adp, uv_low_addr_reg, desc_addr.low_part | 0x01); | ||
1229 | } | ||
1230 | |||
1231 | return BC_STS_SUCCESS; | ||
1232 | } | ||
1233 | |||
1234 | static BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw, | ||
1235 | crystalhd_rx_dma_pkt *rx_pkt) | ||
1236 | { | ||
1237 | BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt); | ||
1238 | |||
1239 | if (sts == BC_STS_BUSY) | ||
1240 | crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt, | ||
1241 | false, rx_pkt->pkt_tag); | ||
1242 | |||
1243 | return sts; | ||
1244 | } | ||
1245 | |||
1246 | static void crystalhd_get_dnsz(struct crystalhd_hw *hw, uint32_t list_index, | ||
1247 | uint32_t *y_dw_dnsz, uint32_t *uv_dw_dnsz) | ||
1248 | { | ||
1249 | uint32_t y_dn_sz_reg, uv_dn_sz_reg; | ||
1250 | |||
1251 | if (!list_index) { | ||
1252 | y_dn_sz_reg = MISC1_Y_RX_LIST0_CUR_BYTE_CNT; | ||
1253 | uv_dn_sz_reg = MISC1_UV_RX_LIST0_CUR_BYTE_CNT; | ||
1254 | } else { | ||
1255 | y_dn_sz_reg = MISC1_Y_RX_LIST1_CUR_BYTE_CNT; | ||
1256 | uv_dn_sz_reg = MISC1_UV_RX_LIST1_CUR_BYTE_CNT; | ||
1257 | } | ||
1258 | |||
1259 | *y_dw_dnsz = crystalhd_reg_rd(hw->adp, y_dn_sz_reg); | ||
1260 | *uv_dw_dnsz = crystalhd_reg_rd(hw->adp, uv_dn_sz_reg); | ||
1261 | } | ||
1262 | |||
1263 | /* | ||
1264 | * This function should be called only after making sure that the two DMA | ||
1265 | * lists are free. This function does not check if DMA's are active, before | ||
1266 | * turning off the DMA. | ||
1267 | */ | ||
1268 | static void crystalhd_hw_finalize_pause(struct crystalhd_hw *hw) | ||
1269 | { | ||
1270 | uint32_t dma_cntrl, aspm; | ||
1271 | |||
1272 | hw->stop_pending = 0; | ||
1273 | |||
1274 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS); | ||
1275 | if (dma_cntrl & DMA_START_BIT) { | ||
1276 | dma_cntrl &= ~DMA_START_BIT; | ||
1277 | crystalhd_reg_wr(hw->adp, MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1278 | } | ||
1279 | |||
1280 | dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS); | ||
1281 | if (dma_cntrl & DMA_START_BIT) { | ||
1282 | dma_cntrl &= ~DMA_START_BIT; | ||
1283 | crystalhd_reg_wr(hw->adp, MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl); | ||
1284 | } | ||
1285 | hw->rx_list_post_index = 0; | ||
1286 | |||
1287 | aspm = crystalhd_reg_rd(hw->adp, PCIE_DLL_DATA_LINK_CONTROL); | ||
1288 | aspm |= ASPM_L1_ENABLE; | ||
1289 | /* NAREN BCMLOG(BCMLOG_INFO, "aspm on\n"); */ | ||
1290 | crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm); | ||
1291 | } | ||
1292 | |||
1293 | static BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw, uint32_t list_index, | ||
1294 | BC_STATUS comp_sts) | ||
1295 | { | ||
1296 | crystalhd_rx_dma_pkt *rx_pkt = NULL; | ||
1297 | uint32_t y_dw_dnsz, uv_dw_dnsz; | ||
1298 | BC_STATUS sts = BC_STS_SUCCESS; | ||
1299 | |||
1300 | if (!hw || list_index >= DMA_ENGINE_CNT) { | ||
1301 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1302 | return BC_STS_INV_ARG; | ||
1303 | } | ||
1304 | |||
1305 | rx_pkt = crystalhd_dioq_find_and_fetch(hw->rx_actq, | ||
1306 | hw->rx_pkt_tag_seed + list_index); | ||
1307 | if (!rx_pkt) { | ||
1308 | BCMLOG_ERR("Act-Q:PostIx:%x L0Sts:%x L1Sts:%x current L:%x tag:%x comp:%x\n", | ||
1309 | hw->rx_list_post_index, hw->rx_list_sts[0], | ||
1310 | hw->rx_list_sts[1], list_index, | ||
1311 | hw->rx_pkt_tag_seed + list_index, comp_sts); | ||
1312 | return BC_STS_INV_ARG; | ||
1313 | } | ||
1314 | |||
1315 | if (comp_sts == BC_STS_SUCCESS) { | ||
1316 | crystalhd_get_dnsz(hw, list_index, &y_dw_dnsz, &uv_dw_dnsz); | ||
1317 | rx_pkt->dio_req->uinfo.y_done_sz = y_dw_dnsz; | ||
1318 | rx_pkt->flags = COMP_FLAG_DATA_VALID; | ||
1319 | if (rx_pkt->uv_phy_addr) | ||
1320 | rx_pkt->dio_req->uinfo.uv_done_sz = uv_dw_dnsz; | ||
1321 | crystalhd_dioq_add(hw->rx_rdyq, rx_pkt, true, | ||
1322 | hw->rx_pkt_tag_seed + list_index); | ||
1323 | return sts; | ||
1324 | } | ||
1325 | |||
1326 | /* Check if we can post this DIO again. */ | ||
1327 | return crystalhd_hw_post_cap_buff(hw, rx_pkt); | ||
1328 | } | ||
1329 | |||
1330 | static bool crystalhd_rx_list0_handler(struct crystalhd_hw *hw, uint32_t int_sts, | ||
1331 | uint32_t y_err_sts, uint32_t uv_err_sts) | ||
1332 | { | ||
1333 | uint32_t tmp; | ||
1334 | list_sts tmp_lsts; | ||
1335 | |||
1336 | if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK)) | ||
1337 | return false; | ||
1338 | |||
1339 | tmp_lsts = hw->rx_list_sts[0]; | ||
1340 | |||
1341 | /* Y0 - DMA */ | ||
1342 | tmp = y_err_sts & GET_Y0_ERR_MSK; | ||
1343 | if (int_sts & INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK) | ||
1344 | hw->rx_list_sts[0] &= ~rx_waiting_y_intr; | ||
1345 | |||
1346 | if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK) { | ||
1347 | hw->rx_list_sts[0] &= ~rx_waiting_y_intr; | ||
1348 | tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK; | ||
1349 | } | ||
1350 | |||
1351 | if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) { | ||
1352 | hw->rx_list_sts[0] &= ~rx_y_mask; | ||
1353 | hw->rx_list_sts[0] |= rx_y_error; | ||
1354 | tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK; | ||
1355 | } | ||
1356 | |||
1357 | if (tmp) { | ||
1358 | hw->rx_list_sts[0] &= ~rx_y_mask; | ||
1359 | hw->rx_list_sts[0] |= rx_y_error; | ||
1360 | hw->rx_list_post_index = 0; | ||
1361 | } | ||
1362 | |||
1363 | /* UV0 - DMA */ | ||
1364 | tmp = uv_err_sts & GET_UV0_ERR_MSK; | ||
1365 | if (int_sts & INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK) | ||
1366 | hw->rx_list_sts[0] &= ~rx_waiting_uv_intr; | ||
1367 | |||
1368 | if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK) { | ||
1369 | hw->rx_list_sts[0] &= ~rx_waiting_uv_intr; | ||
1370 | tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK; | ||
1371 | } | ||
1372 | |||
1373 | if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) { | ||
1374 | hw->rx_list_sts[0] &= ~rx_uv_mask; | ||
1375 | hw->rx_list_sts[0] |= rx_uv_error; | ||
1376 | tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK; | ||
1377 | } | ||
1378 | |||
1379 | if (tmp) { | ||
1380 | hw->rx_list_sts[0] &= ~rx_uv_mask; | ||
1381 | hw->rx_list_sts[0] |= rx_uv_error; | ||
1382 | hw->rx_list_post_index = 0; | ||
1383 | } | ||
1384 | |||
1385 | if (y_err_sts & GET_Y0_ERR_MSK) { | ||
1386 | tmp = y_err_sts & GET_Y0_ERR_MSK; | ||
1387 | crystalhd_reg_wr(hw->adp, MISC1_Y_RX_ERROR_STATUS, tmp); | ||
1388 | } | ||
1389 | |||
1390 | if (uv_err_sts & GET_UV0_ERR_MSK) { | ||
1391 | tmp = uv_err_sts & GET_UV0_ERR_MSK; | ||
1392 | crystalhd_reg_wr(hw->adp, MISC1_UV_RX_ERROR_STATUS, tmp); | ||
1393 | } | ||
1394 | |||
1395 | return (tmp_lsts != hw->rx_list_sts[0]); | ||
1396 | } | ||
1397 | |||
1398 | static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw, uint32_t int_sts, | ||
1399 | uint32_t y_err_sts, uint32_t uv_err_sts) | ||
1400 | { | ||
1401 | uint32_t tmp; | ||
1402 | list_sts tmp_lsts; | ||
1403 | |||
1404 | if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK)) | ||
1405 | return false; | ||
1406 | |||
1407 | tmp_lsts = hw->rx_list_sts[1]; | ||
1408 | |||
1409 | /* Y1 - DMA */ | ||
1410 | tmp = y_err_sts & GET_Y1_ERR_MSK; | ||
1411 | if (int_sts & INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK) | ||
1412 | hw->rx_list_sts[1] &= ~rx_waiting_y_intr; | ||
1413 | |||
1414 | if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) { | ||
1415 | hw->rx_list_sts[1] &= ~rx_waiting_y_intr; | ||
1416 | tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK; | ||
1417 | } | ||
1418 | |||
1419 | if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) { | ||
1420 | /* Add retry-support..*/ | ||
1421 | hw->rx_list_sts[1] &= ~rx_y_mask; | ||
1422 | hw->rx_list_sts[1] |= rx_y_error; | ||
1423 | tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK; | ||
1424 | } | ||
1425 | |||
1426 | if (tmp) { | ||
1427 | hw->rx_list_sts[1] &= ~rx_y_mask; | ||
1428 | hw->rx_list_sts[1] |= rx_y_error; | ||
1429 | hw->rx_list_post_index = 0; | ||
1430 | } | ||
1431 | |||
1432 | /* UV1 - DMA */ | ||
1433 | tmp = uv_err_sts & GET_UV1_ERR_MSK; | ||
1434 | if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK) { | ||
1435 | hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; | ||
1436 | } | ||
1437 | |||
1438 | if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) { | ||
1439 | hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; | ||
1440 | tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK; | ||
1441 | } | ||
1442 | |||
1443 | if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) { | ||
1444 | /* Add retry-support*/ | ||
1445 | hw->rx_list_sts[1] &= ~rx_uv_mask; | ||
1446 | hw->rx_list_sts[1] |= rx_uv_error; | ||
1447 | tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK; | ||
1448 | } | ||
1449 | |||
1450 | if (tmp) { | ||
1451 | hw->rx_list_sts[1] &= ~rx_uv_mask; | ||
1452 | hw->rx_list_sts[1] |= rx_uv_error; | ||
1453 | hw->rx_list_post_index = 0; | ||
1454 | } | ||
1455 | |||
1456 | if (y_err_sts & GET_Y1_ERR_MSK) { | ||
1457 | tmp = y_err_sts & GET_Y1_ERR_MSK; | ||
1458 | crystalhd_reg_wr(hw->adp, MISC1_Y_RX_ERROR_STATUS, tmp); | ||
1459 | } | ||
1460 | |||
1461 | if (uv_err_sts & GET_UV1_ERR_MSK) { | ||
1462 | tmp = uv_err_sts & GET_UV1_ERR_MSK; | ||
1463 | crystalhd_reg_wr(hw->adp, MISC1_UV_RX_ERROR_STATUS, tmp); | ||
1464 | } | ||
1465 | |||
1466 | return (tmp_lsts != hw->rx_list_sts[1]); | ||
1467 | } | ||
1468 | |||
1469 | |||
1470 | static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts) | ||
1471 | { | ||
1472 | unsigned long flags; | ||
1473 | uint32_t i, list_avail = 0; | ||
1474 | BC_STATUS comp_sts = BC_STS_NO_DATA; | ||
1475 | uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0; | ||
1476 | bool ret = 0; | ||
1477 | |||
1478 | if (!hw) { | ||
1479 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1480 | return; | ||
1481 | } | ||
1482 | |||
1483 | if (!(intr_sts & GET_RX_INTR_MASK)) | ||
1484 | return; | ||
1485 | |||
1486 | y_err_sts = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_ERROR_STATUS); | ||
1487 | uv_err_sts = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_ERROR_STATUS); | ||
1488 | |||
1489 | for (i = 0; i < DMA_ENGINE_CNT; i++) { | ||
1490 | /* Update States..*/ | ||
1491 | spin_lock_irqsave(&hw->rx_lock, flags); | ||
1492 | if (i == 0) | ||
1493 | ret = crystalhd_rx_list0_handler(hw, intr_sts, y_err_sts, uv_err_sts); | ||
1494 | else | ||
1495 | ret = crystalhd_rx_list1_handler(hw, intr_sts, y_err_sts, uv_err_sts); | ||
1496 | if (ret) { | ||
1497 | switch (hw->rx_list_sts[i]) { | ||
1498 | case sts_free: | ||
1499 | comp_sts = BC_STS_SUCCESS; | ||
1500 | list_avail = 1; | ||
1501 | break; | ||
1502 | case rx_y_error: | ||
1503 | case rx_uv_error: | ||
1504 | case rx_sts_error: | ||
1505 | /* We got error on both or Y or uv. */ | ||
1506 | hw->stats.rx_errors++; | ||
1507 | crystalhd_get_dnsz(hw, i, &y_dn_sz, &uv_dn_sz); | ||
1508 | /* FIXME: jarod: this is where my mini pci-e card is tripping up */ | ||
1509 | BCMLOG(BCMLOG_DBG, "list_index:%x rx[%d] Y:%x " | ||
1510 | "UV:%x Int:%x YDnSz:%x UVDnSz:%x\n", | ||
1511 | i, hw->stats.rx_errors, y_err_sts, | ||
1512 | uv_err_sts, intr_sts, y_dn_sz, uv_dn_sz); | ||
1513 | hw->rx_list_sts[i] = sts_free; | ||
1514 | comp_sts = BC_STS_ERROR; | ||
1515 | break; | ||
1516 | default: | ||
1517 | /* Wait for completion..*/ | ||
1518 | comp_sts = BC_STS_NO_DATA; | ||
1519 | break; | ||
1520 | } | ||
1521 | } | ||
1522 | spin_unlock_irqrestore(&hw->rx_lock, flags); | ||
1523 | |||
1524 | /* handle completion...*/ | ||
1525 | if (comp_sts != BC_STS_NO_DATA) { | ||
1526 | crystalhd_rx_pkt_done(hw, i, comp_sts); | ||
1527 | comp_sts = BC_STS_NO_DATA; | ||
1528 | } | ||
1529 | } | ||
1530 | |||
1531 | if (list_avail) { | ||
1532 | if (hw->stop_pending) { | ||
1533 | if ((hw->rx_list_sts[0] == sts_free) && | ||
1534 | (hw->rx_list_sts[1] == sts_free)) | ||
1535 | crystalhd_hw_finalize_pause(hw); | ||
1536 | } else { | ||
1537 | crystalhd_hw_start_capture(hw); | ||
1538 | } | ||
1539 | } | ||
1540 | } | ||
1541 | |||
1542 | static BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw, | ||
1543 | BC_FW_CMD *fw_cmd) | ||
1544 | { | ||
1545 | BC_STATUS sts = BC_STS_SUCCESS; | ||
1546 | DecRspChannelStartVideo *st_rsp = NULL; | ||
1547 | |||
1548 | switch (fw_cmd->cmd[0]) { | ||
1549 | case eCMD_C011_DEC_CHAN_START_VIDEO: | ||
1550 | st_rsp = (DecRspChannelStartVideo *)fw_cmd->rsp; | ||
1551 | hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ; | ||
1552 | hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ; | ||
1553 | BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n", | ||
1554 | hw->pib_del_Q_addr, hw->pib_rel_Q_addr); | ||
1555 | break; | ||
1556 | case eCMD_C011_INIT: | ||
1557 | if (!(crystalhd_load_firmware_config(hw->adp))) { | ||
1558 | BCMLOG_ERR("Invalid Params.\n"); | ||
1559 | sts = BC_STS_FW_AUTH_FAILED; | ||
1560 | } | ||
1561 | break; | ||
1562 | default: | ||
1563 | break; | ||
1564 | } | ||
1565 | return sts; | ||
1566 | } | ||
1567 | |||
1568 | static BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw) | ||
1569 | { | ||
1570 | uint32_t reg; | ||
1571 | link_misc_perst_decoder_ctrl rst_cntrl_reg; | ||
1572 | |||
1573 | /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */ | ||
1574 | rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp, MISC_PERST_DECODER_CTRL); | ||
1575 | |||
1576 | rst_cntrl_reg.bcm_7412_rst = 1; | ||
1577 | crystalhd_reg_wr(hw->adp, MISC_PERST_DECODER_CTRL, rst_cntrl_reg.whole_reg); | ||
1578 | msleep_interruptible(50); | ||
1579 | |||
1580 | rst_cntrl_reg.bcm_7412_rst = 0; | ||
1581 | crystalhd_reg_wr(hw->adp, MISC_PERST_DECODER_CTRL, rst_cntrl_reg.whole_reg); | ||
1582 | |||
1583 | /* Close all banks, put DDR in idle */ | ||
1584 | bc_dec_reg_wr(hw->adp, SDRAM_PRECHARGE, 0); | ||
1585 | |||
1586 | /* Set bit 25 (drop CKE pin of DDR) */ | ||
1587 | reg = bc_dec_reg_rd(hw->adp, SDRAM_PARAM); | ||
1588 | reg |= 0x02000000; | ||
1589 | bc_dec_reg_wr(hw->adp, SDRAM_PARAM, reg); | ||
1590 | |||
1591 | /* Reset the audio block */ | ||
1592 | bc_dec_reg_wr(hw->adp, AUD_DSP_MISC_SOFT_RESET, 0x1); | ||
1593 | |||
1594 | /* Power down Raptor PLL */ | ||
1595 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllCCtl); | ||
1596 | reg |= 0x00008000; | ||
1597 | bc_dec_reg_wr(hw->adp, DecHt_PllCCtl, reg); | ||
1598 | |||
1599 | /* Power down all Audio PLL */ | ||
1600 | bc_dec_reg_wr(hw->adp, AIO_MISC_PLL_RESET, 0x1); | ||
1601 | |||
1602 | /* Power down video clock (75MHz) */ | ||
1603 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllECtl); | ||
1604 | reg |= 0x00008000; | ||
1605 | bc_dec_reg_wr(hw->adp, DecHt_PllECtl, reg); | ||
1606 | |||
1607 | /* Power down video clock (75MHz) */ | ||
1608 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllDCtl); | ||
1609 | reg |= 0x00008000; | ||
1610 | bc_dec_reg_wr(hw->adp, DecHt_PllDCtl, reg); | ||
1611 | |||
1612 | /* Power down core clock (200MHz) */ | ||
1613 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl); | ||
1614 | reg |= 0x00008000; | ||
1615 | bc_dec_reg_wr(hw->adp, DecHt_PllACtl, reg); | ||
1616 | |||
1617 | /* Power down core clock (200MHz) */ | ||
1618 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllBCtl); | ||
1619 | reg |= 0x00008000; | ||
1620 | bc_dec_reg_wr(hw->adp, DecHt_PllBCtl, reg); | ||
1621 | |||
1622 | return BC_STS_SUCCESS; | ||
1623 | } | ||
1624 | |||
1625 | /************************************************ | ||
1626 | ** | ||
1627 | *************************************************/ | ||
1628 | |||
1629 | BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_t sz) | ||
1630 | { | ||
1631 | uint32_t reg_data, cnt, *temp_buff; | ||
1632 | uint32_t fw_sig_len = 36; | ||
1633 | uint32_t dram_offset = BC_FWIMG_ST_ADDR, sig_reg; | ||
1634 | |||
1635 | BCMLOG_ENTER; | ||
1636 | |||
1637 | if (!adp || !buffer || !sz) { | ||
1638 | BCMLOG_ERR("Invalid Params.\n"); | ||
1639 | return BC_STS_INV_ARG; | ||
1640 | } | ||
1641 | |||
1642 | reg_data = crystalhd_reg_rd(adp, OTP_CMD); | ||
1643 | if (!(reg_data & 0x02)) { | ||
1644 | BCMLOG_ERR("Invalid hw config.. otp not programmed\n"); | ||
1645 | return BC_STS_ERROR; | ||
1646 | } | ||
1647 | |||
1648 | reg_data = 0; | ||
1649 | crystalhd_reg_wr(adp, DCI_CMD, 0); | ||
1650 | reg_data |= BC_BIT(0); | ||
1651 | crystalhd_reg_wr(adp, DCI_CMD, reg_data); | ||
1652 | |||
1653 | reg_data = 0; | ||
1654 | cnt = 1000; | ||
1655 | msleep_interruptible(10); | ||
1656 | |||
1657 | while (reg_data != BC_BIT(4)) { | ||
1658 | reg_data = crystalhd_reg_rd(adp, DCI_STATUS); | ||
1659 | reg_data &= BC_BIT(4); | ||
1660 | if (--cnt == 0) { | ||
1661 | BCMLOG_ERR("Firmware Download RDY Timeout.\n"); | ||
1662 | return BC_STS_TIMEOUT; | ||
1663 | } | ||
1664 | } | ||
1665 | |||
1666 | msleep_interruptible(10); | ||
1667 | /* Load the FW to the FW_ADDR field in the DCI_FIRMWARE_ADDR */ | ||
1668 | crystalhd_reg_wr(adp, DCI_FIRMWARE_ADDR, dram_offset); | ||
1669 | temp_buff = (uint32_t *)buffer; | ||
1670 | for (cnt = 0; cnt < (sz - fw_sig_len); cnt += 4) { | ||
1671 | crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (dram_offset >> 19)); | ||
1672 | crystalhd_reg_wr(adp, DCI_FIRMWARE_DATA, *temp_buff); | ||
1673 | dram_offset += 4; | ||
1674 | temp_buff++; | ||
1675 | } | ||
1676 | msleep_interruptible(10); | ||
1677 | |||
1678 | temp_buff++; | ||
1679 | |||
1680 | sig_reg = (uint32_t)DCI_SIGNATURE_DATA_7; | ||
1681 | for (cnt = 0; cnt < 8; cnt++) { | ||
1682 | uint32_t swapped_data = *temp_buff; | ||
1683 | swapped_data = bswap_32_1(swapped_data); | ||
1684 | crystalhd_reg_wr(adp, sig_reg, swapped_data); | ||
1685 | sig_reg -= 4; | ||
1686 | temp_buff++; | ||
1687 | } | ||
1688 | msleep_interruptible(10); | ||
1689 | |||
1690 | reg_data = 0; | ||
1691 | reg_data |= BC_BIT(1); | ||
1692 | crystalhd_reg_wr(adp, DCI_CMD, reg_data); | ||
1693 | msleep_interruptible(10); | ||
1694 | |||
1695 | reg_data = 0; | ||
1696 | reg_data = crystalhd_reg_rd(adp, DCI_STATUS); | ||
1697 | |||
1698 | if ((reg_data & BC_BIT(9)) == BC_BIT(9)) { | ||
1699 | cnt = 1000; | ||
1700 | while ((reg_data & BC_BIT(0)) != BC_BIT(0)) { | ||
1701 | reg_data = crystalhd_reg_rd(adp, DCI_STATUS); | ||
1702 | reg_data &= BC_BIT(0); | ||
1703 | if (!(--cnt)) | ||
1704 | break; | ||
1705 | msleep_interruptible(10); | ||
1706 | } | ||
1707 | reg_data = 0; | ||
1708 | reg_data = crystalhd_reg_rd(adp, DCI_CMD); | ||
1709 | reg_data |= BC_BIT(4); | ||
1710 | crystalhd_reg_wr(adp, DCI_CMD, reg_data); | ||
1711 | |||
1712 | } else { | ||
1713 | BCMLOG_ERR("F/w Signature mismatch\n"); | ||
1714 | return BC_STS_FW_AUTH_FAILED; | ||
1715 | } | ||
1716 | |||
1717 | BCMLOG(BCMLOG_INFO, "Firmware Downloaded Successfully\n"); | ||
1718 | return BC_STS_SUCCESS;; | ||
1719 | } | ||
1720 | |||
1721 | BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd) | ||
1722 | { | ||
1723 | uint32_t cnt = 0, cmd_res_addr; | ||
1724 | uint32_t *cmd_buff, *res_buff; | ||
1725 | wait_queue_head_t fw_cmd_event; | ||
1726 | int rc = 0; | ||
1727 | BC_STATUS sts; | ||
1728 | |||
1729 | crystalhd_create_event(&fw_cmd_event); | ||
1730 | |||
1731 | BCMLOG_ENTER; | ||
1732 | |||
1733 | if (!hw || !fw_cmd) { | ||
1734 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1735 | return BC_STS_INV_ARG; | ||
1736 | } | ||
1737 | |||
1738 | cmd_buff = fw_cmd->cmd; | ||
1739 | res_buff = fw_cmd->rsp; | ||
1740 | |||
1741 | if (!cmd_buff || !res_buff) { | ||
1742 | BCMLOG_ERR("Invalid Parameters for F/W Command \n"); | ||
1743 | return BC_STS_INV_ARG; | ||
1744 | } | ||
1745 | |||
1746 | hw->pwr_lock++; | ||
1747 | |||
1748 | hw->fwcmd_evt_sts = 0; | ||
1749 | hw->pfw_cmd_event = &fw_cmd_event; | ||
1750 | |||
1751 | /*Write the command to the memory*/ | ||
1752 | crystalhd_mem_wr(hw->adp, TS_Host2CpuSnd, FW_CMD_BUFF_SZ, cmd_buff); | ||
1753 | |||
1754 | /*Memory Read for memory arbitrator flush*/ | ||
1755 | crystalhd_mem_rd(hw->adp, TS_Host2CpuSnd, 1, &cnt); | ||
1756 | |||
1757 | /* Write the command address to mailbox */ | ||
1758 | bc_dec_reg_wr(hw->adp, Hst2CpuMbx1, TS_Host2CpuSnd); | ||
1759 | msleep_interruptible(50); | ||
1760 | |||
1761 | crystalhd_wait_on_event(&fw_cmd_event, hw->fwcmd_evt_sts, 20000, rc, 0); | ||
1762 | |||
1763 | if (!rc) { | ||
1764 | sts = BC_STS_SUCCESS; | ||
1765 | } else if (rc == -EBUSY) { | ||
1766 | BCMLOG_ERR("Firmware command T/O\n"); | ||
1767 | sts = BC_STS_TIMEOUT; | ||
1768 | } else if (rc == -EINTR) { | ||
1769 | BCMLOG(BCMLOG_DBG, "FwCmd Wait Signal int.\n"); | ||
1770 | sts = BC_STS_IO_USER_ABORT; | ||
1771 | } else { | ||
1772 | BCMLOG_ERR("FwCmd IO Error.\n"); | ||
1773 | sts = BC_STS_IO_ERROR; | ||
1774 | } | ||
1775 | |||
1776 | if (sts != BC_STS_SUCCESS) { | ||
1777 | BCMLOG_ERR("FwCmd Failed.\n"); | ||
1778 | hw->pwr_lock--; | ||
1779 | return sts; | ||
1780 | } | ||
1781 | |||
1782 | /*Get the Responce Address*/ | ||
1783 | cmd_res_addr = bc_dec_reg_rd(hw->adp, Cpu2HstMbx1); | ||
1784 | |||
1785 | /*Read the Response*/ | ||
1786 | crystalhd_mem_rd(hw->adp, cmd_res_addr, FW_CMD_BUFF_SZ, res_buff); | ||
1787 | |||
1788 | hw->pwr_lock--; | ||
1789 | |||
1790 | if (res_buff[2] != C011_RET_SUCCESS) { | ||
1791 | BCMLOG_ERR("res_buff[2] != C011_RET_SUCCESS\n"); | ||
1792 | return BC_STS_FW_CMD_ERR; | ||
1793 | } | ||
1794 | |||
1795 | sts = crystalhd_fw_cmd_post_proc(hw, fw_cmd); | ||
1796 | if (sts != BC_STS_SUCCESS) | ||
1797 | BCMLOG_ERR("crystalhd_fw_cmd_post_proc Failed.\n"); | ||
1798 | |||
1799 | return sts; | ||
1800 | } | ||
1801 | |||
1802 | bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw) | ||
1803 | { | ||
1804 | uint32_t intr_sts = 0; | ||
1805 | uint32_t deco_intr = 0; | ||
1806 | bool rc = 0; | ||
1807 | |||
1808 | if (!adp || !hw->dev_started) | ||
1809 | return rc; | ||
1810 | |||
1811 | hw->stats.num_interrupts++; | ||
1812 | hw->pwr_lock++; | ||
1813 | |||
1814 | deco_intr = bc_dec_reg_rd(adp, Stream2Host_Intr_Sts); | ||
1815 | intr_sts = crystalhd_reg_rd(adp, INTR_INTR_STATUS); | ||
1816 | |||
1817 | if (intr_sts) { | ||
1818 | /* let system know we processed interrupt..*/ | ||
1819 | rc = 1; | ||
1820 | hw->stats.dev_interrupts++; | ||
1821 | } | ||
1822 | |||
1823 | if (deco_intr && (deco_intr != 0xdeaddead)) { | ||
1824 | |||
1825 | if (deco_intr & 0x80000000) { | ||
1826 | /*Set the Event and the status flag*/ | ||
1827 | if (hw->pfw_cmd_event) { | ||
1828 | hw->fwcmd_evt_sts = 1; | ||
1829 | crystalhd_set_event(hw->pfw_cmd_event); | ||
1830 | } | ||
1831 | } | ||
1832 | |||
1833 | if (deco_intr & BC_BIT(1)) | ||
1834 | crystalhd_hw_proc_pib(hw); | ||
1835 | |||
1836 | bc_dec_reg_wr(adp, Stream2Host_Intr_Sts, deco_intr); | ||
1837 | /* FIXME: jarod: No udelay? might this be the real reason mini pci-e cards were stalling out? */ | ||
1838 | bc_dec_reg_wr(adp, Stream2Host_Intr_Sts, 0); | ||
1839 | rc = 1; | ||
1840 | } | ||
1841 | |||
1842 | /* Rx interrupts */ | ||
1843 | crystalhd_rx_isr(hw, intr_sts); | ||
1844 | |||
1845 | /* Tx interrupts*/ | ||
1846 | crystalhd_tx_isr(hw, intr_sts); | ||
1847 | |||
1848 | /* Clear interrupts */ | ||
1849 | if (rc) { | ||
1850 | if (intr_sts) | ||
1851 | crystalhd_reg_wr(adp, INTR_INTR_CLR_REG, intr_sts); | ||
1852 | |||
1853 | crystalhd_reg_wr(adp, INTR_EOI_CTRL, 1); | ||
1854 | } | ||
1855 | |||
1856 | hw->pwr_lock--; | ||
1857 | |||
1858 | return rc; | ||
1859 | } | ||
1860 | |||
1861 | BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp) | ||
1862 | { | ||
1863 | if (!hw || !adp) { | ||
1864 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1865 | return BC_STS_INV_ARG; | ||
1866 | } | ||
1867 | |||
1868 | if (hw->dev_started) | ||
1869 | return BC_STS_SUCCESS; | ||
1870 | |||
1871 | memset(hw, 0, sizeof(struct crystalhd_hw)); | ||
1872 | |||
1873 | hw->adp = adp; | ||
1874 | spin_lock_init(&hw->lock); | ||
1875 | spin_lock_init(&hw->rx_lock); | ||
1876 | /* FIXME: jarod: what are these magic numbers?!? */ | ||
1877 | hw->tx_ioq_tag_seed = 0x70023070; | ||
1878 | hw->rx_pkt_tag_seed = 0x70029070; | ||
1879 | |||
1880 | hw->stop_pending = 0; | ||
1881 | crystalhd_start_device(hw->adp); | ||
1882 | hw->dev_started = true; | ||
1883 | |||
1884 | /* set initial core clock */ | ||
1885 | hw->core_clock_mhz = CLOCK_PRESET; | ||
1886 | hw->prev_n = 0; | ||
1887 | hw->pwr_lock = 0; | ||
1888 | crystalhd_hw_set_core_clock(hw); | ||
1889 | |||
1890 | return BC_STS_SUCCESS; | ||
1891 | } | ||
1892 | |||
1893 | BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw) | ||
1894 | { | ||
1895 | if (!hw) { | ||
1896 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1897 | return BC_STS_INV_ARG; | ||
1898 | } | ||
1899 | |||
1900 | if (!hw->dev_started) | ||
1901 | return BC_STS_SUCCESS; | ||
1902 | |||
1903 | /* Stop and DDR sleep will happen in here */ | ||
1904 | crystalhd_hw_suspend(hw); | ||
1905 | hw->dev_started = false; | ||
1906 | |||
1907 | return BC_STS_SUCCESS; | ||
1908 | } | ||
1909 | |||
1910 | BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | ||
1911 | { | ||
1912 | unsigned int i; | ||
1913 | void *mem; | ||
1914 | size_t mem_len; | ||
1915 | dma_addr_t phy_addr; | ||
1916 | BC_STATUS sts = BC_STS_SUCCESS; | ||
1917 | crystalhd_rx_dma_pkt *rpkt; | ||
1918 | |||
1919 | if (!hw || !hw->adp) { | ||
1920 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1921 | return BC_STS_INV_ARG; | ||
1922 | } | ||
1923 | |||
1924 | sts = crystalhd_hw_create_ioqs(hw); | ||
1925 | if (sts != BC_STS_SUCCESS) { | ||
1926 | BCMLOG_ERR("Failed to create IOQs..\n"); | ||
1927 | return sts; | ||
1928 | } | ||
1929 | |||
1930 | mem_len = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); | ||
1931 | |||
1932 | for (i = 0; i < BC_TX_LIST_CNT; i++) { | ||
1933 | mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr); | ||
1934 | if (mem) { | ||
1935 | memset(mem, 0, mem_len); | ||
1936 | } else { | ||
1937 | BCMLOG_ERR("Insufficient Memory For TX\n"); | ||
1938 | crystalhd_hw_free_dma_rings(hw); | ||
1939 | return BC_STS_INSUFF_RES; | ||
1940 | } | ||
1941 | /* rx_pkt_pool -- static memory allocation */ | ||
1942 | hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem; | ||
1943 | hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr; | ||
1944 | hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS * | ||
1945 | sizeof(dma_descriptor); | ||
1946 | hw->tx_pkt_pool[i].list_tag = 0; | ||
1947 | |||
1948 | /* Add TX dma requests to Free Queue..*/ | ||
1949 | sts = crystalhd_dioq_add(hw->tx_freeq, | ||
1950 | &hw->tx_pkt_pool[i], false, 0); | ||
1951 | if (sts != BC_STS_SUCCESS) { | ||
1952 | crystalhd_hw_free_dma_rings(hw); | ||
1953 | return sts; | ||
1954 | } | ||
1955 | } | ||
1956 | |||
1957 | for (i = 0; i < BC_RX_LIST_CNT; i++) { | ||
1958 | rpkt = kzalloc(sizeof(*rpkt), GFP_KERNEL); | ||
1959 | if (!rpkt) { | ||
1960 | BCMLOG_ERR("Insufficient Memory For RX\n"); | ||
1961 | crystalhd_hw_free_dma_rings(hw); | ||
1962 | return BC_STS_INSUFF_RES; | ||
1963 | } | ||
1964 | |||
1965 | mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr); | ||
1966 | if (mem) { | ||
1967 | memset(mem, 0, mem_len); | ||
1968 | } else { | ||
1969 | BCMLOG_ERR("Insufficient Memory For RX\n"); | ||
1970 | crystalhd_hw_free_dma_rings(hw); | ||
1971 | return BC_STS_INSUFF_RES; | ||
1972 | } | ||
1973 | rpkt->desc_mem.pdma_desc_start = mem; | ||
1974 | rpkt->desc_mem.phy_addr = phy_addr; | ||
1975 | rpkt->desc_mem.sz = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); | ||
1976 | rpkt->pkt_tag = hw->rx_pkt_tag_seed + i; | ||
1977 | crystalhd_hw_free_rx_pkt(hw, rpkt); | ||
1978 | } | ||
1979 | |||
1980 | return BC_STS_SUCCESS; | ||
1981 | } | ||
1982 | |||
1983 | BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw) | ||
1984 | { | ||
1985 | unsigned int i; | ||
1986 | crystalhd_rx_dma_pkt *rpkt = NULL; | ||
1987 | |||
1988 | if (!hw || !hw->adp) { | ||
1989 | BCMLOG_ERR("Invalid Arguments\n"); | ||
1990 | return BC_STS_INV_ARG; | ||
1991 | } | ||
1992 | |||
1993 | /* Delete all IOQs.. */ | ||
1994 | crystalhd_hw_delete_ioqs(hw); | ||
1995 | |||
1996 | for (i = 0; i < BC_TX_LIST_CNT; i++) { | ||
1997 | if (hw->tx_pkt_pool[i].desc_mem.pdma_desc_start) { | ||
1998 | bc_kern_dma_free(hw->adp, | ||
1999 | hw->tx_pkt_pool[i].desc_mem.sz, | ||
2000 | hw->tx_pkt_pool[i].desc_mem.pdma_desc_start, | ||
2001 | hw->tx_pkt_pool[i].desc_mem.phy_addr); | ||
2002 | |||
2003 | hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = NULL; | ||
2004 | } | ||
2005 | } | ||
2006 | |||
2007 | BCMLOG(BCMLOG_DBG, "Releasing RX Pkt pool\n"); | ||
2008 | do { | ||
2009 | rpkt = crystalhd_hw_alloc_rx_pkt(hw); | ||
2010 | if (!rpkt) | ||
2011 | break; | ||
2012 | bc_kern_dma_free(hw->adp, rpkt->desc_mem.sz, | ||
2013 | rpkt->desc_mem.pdma_desc_start, | ||
2014 | rpkt->desc_mem.phy_addr); | ||
2015 | kfree(rpkt); | ||
2016 | } while (rpkt); | ||
2017 | |||
2018 | return BC_STS_SUCCESS; | ||
2019 | } | ||
2020 | |||
2021 | BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, | ||
2022 | hw_comp_callback call_back, | ||
2023 | wait_queue_head_t *cb_event, uint32_t *list_id, | ||
2024 | uint8_t data_flags) | ||
2025 | { | ||
2026 | tx_dma_pkt *tx_dma_packet = NULL; | ||
2027 | uint32_t first_desc_u_addr, first_desc_l_addr; | ||
2028 | uint32_t low_addr, high_addr; | ||
2029 | addr_64 desc_addr; | ||
2030 | BC_STATUS sts, add_sts; | ||
2031 | uint32_t dummy_index = 0; | ||
2032 | unsigned long flags; | ||
2033 | bool rc; | ||
2034 | |||
2035 | if (!hw || !ioreq || !call_back || !cb_event || !list_id) { | ||
2036 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2037 | return BC_STS_INV_ARG; | ||
2038 | } | ||
2039 | |||
2040 | /* | ||
2041 | * Since we hit code in busy condition very frequently, | ||
2042 | * we will check the code in status first before | ||
2043 | * checking the availability of free elem. | ||
2044 | * | ||
2045 | * This will avoid the Q fetch/add in normal condition. | ||
2046 | */ | ||
2047 | rc = crystalhd_code_in_full(hw->adp, ioreq->uinfo.xfr_len, | ||
2048 | false, data_flags); | ||
2049 | if (rc) { | ||
2050 | hw->stats.cin_busy++; | ||
2051 | return BC_STS_BUSY; | ||
2052 | } | ||
2053 | |||
2054 | /* Get a list from TxFreeQ */ | ||
2055 | tx_dma_packet = (tx_dma_pkt *)crystalhd_dioq_fetch(hw->tx_freeq); | ||
2056 | if (!tx_dma_packet) { | ||
2057 | BCMLOG_ERR("No empty elements..\n"); | ||
2058 | return BC_STS_ERR_USAGE; | ||
2059 | } | ||
2060 | |||
2061 | sts = crystalhd_xlat_sgl_to_dma_desc(ioreq, | ||
2062 | &tx_dma_packet->desc_mem, | ||
2063 | &dummy_index); | ||
2064 | if (sts != BC_STS_SUCCESS) { | ||
2065 | add_sts = crystalhd_dioq_add(hw->tx_freeq, tx_dma_packet, | ||
2066 | false, 0); | ||
2067 | if (add_sts != BC_STS_SUCCESS) | ||
2068 | BCMLOG_ERR("double fault..\n"); | ||
2069 | |||
2070 | return sts; | ||
2071 | } | ||
2072 | |||
2073 | hw->pwr_lock++; | ||
2074 | |||
2075 | desc_addr.full_addr = tx_dma_packet->desc_mem.phy_addr; | ||
2076 | low_addr = desc_addr.low_part; | ||
2077 | high_addr = desc_addr.high_part; | ||
2078 | |||
2079 | tx_dma_packet->call_back = call_back; | ||
2080 | tx_dma_packet->cb_event = cb_event; | ||
2081 | tx_dma_packet->dio_req = ioreq; | ||
2082 | |||
2083 | spin_lock_irqsave(&hw->lock, flags); | ||
2084 | |||
2085 | if (hw->tx_list_post_index == 0) { | ||
2086 | first_desc_u_addr = MISC1_TX_FIRST_DESC_U_ADDR_LIST0; | ||
2087 | first_desc_l_addr = MISC1_TX_FIRST_DESC_L_ADDR_LIST0; | ||
2088 | } else { | ||
2089 | first_desc_u_addr = MISC1_TX_FIRST_DESC_U_ADDR_LIST1; | ||
2090 | first_desc_l_addr = MISC1_TX_FIRST_DESC_L_ADDR_LIST1; | ||
2091 | } | ||
2092 | |||
2093 | *list_id = tx_dma_packet->list_tag = hw->tx_ioq_tag_seed + | ||
2094 | hw->tx_list_post_index; | ||
2095 | |||
2096 | hw->tx_list_post_index = (hw->tx_list_post_index + 1) % DMA_ENGINE_CNT; | ||
2097 | |||
2098 | spin_unlock_irqrestore(&hw->lock, flags); | ||
2099 | |||
2100 | |||
2101 | /* Insert in Active Q..*/ | ||
2102 | crystalhd_dioq_add(hw->tx_actq, tx_dma_packet, false, | ||
2103 | tx_dma_packet->list_tag); | ||
2104 | |||
2105 | /* | ||
2106 | * Interrupt will come as soon as you write | ||
2107 | * the valid bit. So be ready for that. All | ||
2108 | * the initialization should happen before that. | ||
2109 | */ | ||
2110 | crystalhd_start_tx_dma_engine(hw); | ||
2111 | crystalhd_reg_wr(hw->adp, first_desc_u_addr, desc_addr.high_part); | ||
2112 | |||
2113 | crystalhd_reg_wr(hw->adp, first_desc_l_addr, desc_addr.low_part | 0x01); | ||
2114 | /* Be sure we set the valid bit ^^^^ */ | ||
2115 | |||
2116 | return BC_STS_SUCCESS; | ||
2117 | } | ||
2118 | |||
2119 | /* | ||
2120 | * This is a force cancel and we are racing with ISR. | ||
2121 | * | ||
2122 | * Will try to remove the req from ActQ before ISR gets it. | ||
2123 | * If ISR gets it first then the completion happens in the | ||
2124 | * normal path and we will return _STS_NO_DATA from here. | ||
2125 | * | ||
2126 | * FIX_ME: Not Tested the actual condition.. | ||
2127 | */ | ||
2128 | BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id) | ||
2129 | { | ||
2130 | if (!hw || !list_id) { | ||
2131 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2132 | return BC_STS_INV_ARG; | ||
2133 | } | ||
2134 | |||
2135 | crystalhd_stop_tx_dma_engine(hw); | ||
2136 | crystalhd_hw_tx_req_complete(hw, list_id, BC_STS_IO_USER_ABORT); | ||
2137 | |||
2138 | return BC_STS_SUCCESS; | ||
2139 | } | ||
2140 | |||
2141 | BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | ||
2142 | crystalhd_dio_req *ioreq, bool en_post) | ||
2143 | { | ||
2144 | crystalhd_rx_dma_pkt *rpkt; | ||
2145 | uint32_t tag, uv_desc_ix = 0; | ||
2146 | BC_STATUS sts; | ||
2147 | |||
2148 | if (!hw || !ioreq) { | ||
2149 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2150 | return BC_STS_INV_ARG; | ||
2151 | } | ||
2152 | |||
2153 | rpkt = crystalhd_hw_alloc_rx_pkt(hw); | ||
2154 | if (!rpkt) { | ||
2155 | BCMLOG_ERR("Insufficient resources\n"); | ||
2156 | return BC_STS_INSUFF_RES; | ||
2157 | } | ||
2158 | |||
2159 | rpkt->dio_req = ioreq; | ||
2160 | tag = rpkt->pkt_tag; | ||
2161 | |||
2162 | sts = crystalhd_xlat_sgl_to_dma_desc(ioreq, &rpkt->desc_mem, &uv_desc_ix); | ||
2163 | if (sts != BC_STS_SUCCESS) | ||
2164 | return sts; | ||
2165 | |||
2166 | rpkt->uv_phy_addr = 0; | ||
2167 | |||
2168 | /* Store the address of UV in the rx packet for post*/ | ||
2169 | if (uv_desc_ix) | ||
2170 | rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr + | ||
2171 | (sizeof(dma_descriptor) * (uv_desc_ix + 1)); | ||
2172 | |||
2173 | if (en_post) | ||
2174 | sts = crystalhd_hw_post_cap_buff(hw, rpkt); | ||
2175 | else | ||
2176 | sts = crystalhd_dioq_add(hw->rx_freeq, rpkt, false, tag); | ||
2177 | |||
2178 | return sts; | ||
2179 | } | ||
2180 | |||
2181 | BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, | ||
2182 | BC_PIC_INFO_BLOCK *pib, | ||
2183 | crystalhd_dio_req **ioreq) | ||
2184 | { | ||
2185 | crystalhd_rx_dma_pkt *rpkt; | ||
2186 | uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000; | ||
2187 | uint32_t sig_pending = 0; | ||
2188 | |||
2189 | |||
2190 | if (!hw || !ioreq || !pib) { | ||
2191 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2192 | return BC_STS_INV_ARG; | ||
2193 | } | ||
2194 | |||
2195 | rpkt = crystalhd_dioq_fetch_wait(hw->rx_rdyq, timeout, &sig_pending); | ||
2196 | if (!rpkt) { | ||
2197 | if (sig_pending) { | ||
2198 | BCMLOG(BCMLOG_INFO, "wait on frame time out %d\n", sig_pending); | ||
2199 | return BC_STS_IO_USER_ABORT; | ||
2200 | } else { | ||
2201 | return BC_STS_TIMEOUT; | ||
2202 | } | ||
2203 | } | ||
2204 | |||
2205 | rpkt->dio_req->uinfo.comp_flags = rpkt->flags; | ||
2206 | |||
2207 | if (rpkt->flags & COMP_FLAG_PIB_VALID) | ||
2208 | memcpy(pib, &rpkt->pib, sizeof(*pib)); | ||
2209 | |||
2210 | *ioreq = rpkt->dio_req; | ||
2211 | |||
2212 | crystalhd_hw_free_rx_pkt(hw, rpkt); | ||
2213 | |||
2214 | return BC_STS_SUCCESS; | ||
2215 | } | ||
2216 | |||
2217 | BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw) | ||
2218 | { | ||
2219 | crystalhd_rx_dma_pkt *rx_pkt; | ||
2220 | BC_STATUS sts; | ||
2221 | uint32_t i; | ||
2222 | |||
2223 | if (!hw) { | ||
2224 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2225 | return BC_STS_INV_ARG; | ||
2226 | } | ||
2227 | |||
2228 | /* This is start of capture.. Post to both the lists.. */ | ||
2229 | for (i = 0; i < DMA_ENGINE_CNT; i++) { | ||
2230 | rx_pkt = crystalhd_dioq_fetch(hw->rx_freeq); | ||
2231 | if (!rx_pkt) | ||
2232 | return BC_STS_NO_DATA; | ||
2233 | sts = crystalhd_hw_post_cap_buff(hw, rx_pkt); | ||
2234 | if (BC_STS_SUCCESS != sts) | ||
2235 | break; | ||
2236 | |||
2237 | } | ||
2238 | |||
2239 | return BC_STS_SUCCESS; | ||
2240 | } | ||
2241 | |||
2242 | BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw) | ||
2243 | { | ||
2244 | void *temp = NULL; | ||
2245 | |||
2246 | if (!hw) { | ||
2247 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2248 | return BC_STS_INV_ARG; | ||
2249 | } | ||
2250 | |||
2251 | crystalhd_stop_rx_dma_engine(hw); | ||
2252 | |||
2253 | do { | ||
2254 | temp = crystalhd_dioq_fetch(hw->rx_freeq); | ||
2255 | if (temp) | ||
2256 | crystalhd_rx_pkt_rel_call_back(hw, temp); | ||
2257 | } while (temp); | ||
2258 | |||
2259 | return BC_STS_SUCCESS; | ||
2260 | } | ||
2261 | |||
2262 | BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw) | ||
2263 | { | ||
2264 | hw->stats.pause_cnt++; | ||
2265 | hw->stop_pending = 1; | ||
2266 | |||
2267 | if ((hw->rx_list_sts[0] == sts_free) && | ||
2268 | (hw->rx_list_sts[1] == sts_free)) | ||
2269 | crystalhd_hw_finalize_pause(hw); | ||
2270 | |||
2271 | return BC_STS_SUCCESS; | ||
2272 | } | ||
2273 | |||
2274 | BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw) | ||
2275 | { | ||
2276 | BC_STATUS sts; | ||
2277 | uint32_t aspm; | ||
2278 | |||
2279 | hw->stop_pending = 0; | ||
2280 | |||
2281 | aspm = crystalhd_reg_rd(hw->adp, PCIE_DLL_DATA_LINK_CONTROL); | ||
2282 | aspm &= ~ASPM_L1_ENABLE; | ||
2283 | /* NAREN BCMLOG(BCMLOG_INFO, "aspm off\n"); */ | ||
2284 | crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm); | ||
2285 | |||
2286 | sts = crystalhd_hw_start_capture(hw); | ||
2287 | return sts; | ||
2288 | } | ||
2289 | |||
2290 | BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw) | ||
2291 | { | ||
2292 | BC_STATUS sts; | ||
2293 | |||
2294 | if (!hw) { | ||
2295 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2296 | return BC_STS_INV_ARG; | ||
2297 | } | ||
2298 | |||
2299 | sts = crystalhd_put_ddr2sleep(hw); | ||
2300 | if (sts != BC_STS_SUCCESS) { | ||
2301 | BCMLOG_ERR("Failed to Put DDR To Sleep!!\n"); | ||
2302 | return BC_STS_ERROR; | ||
2303 | } | ||
2304 | |||
2305 | if (!crystalhd_stop_device(hw->adp)) { | ||
2306 | BCMLOG_ERR("Failed to Stop Device!!\n"); | ||
2307 | return BC_STS_ERROR; | ||
2308 | } | ||
2309 | |||
2310 | return BC_STS_SUCCESS; | ||
2311 | } | ||
2312 | |||
2313 | void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats) | ||
2314 | { | ||
2315 | if (!hw) { | ||
2316 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2317 | return; | ||
2318 | } | ||
2319 | |||
2320 | /* if called w/NULL stats, its a req to zero out the stats */ | ||
2321 | if (!stats) { | ||
2322 | memset(&hw->stats, 0, sizeof(hw->stats)); | ||
2323 | return; | ||
2324 | } | ||
2325 | |||
2326 | hw->stats.freeq_count = crystalhd_dioq_count(hw->rx_freeq); | ||
2327 | hw->stats.rdyq_count = crystalhd_dioq_count(hw->rx_rdyq); | ||
2328 | memcpy(stats, &hw->stats, sizeof(*stats)); | ||
2329 | } | ||
2330 | |||
2331 | BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw) | ||
2332 | { | ||
2333 | uint32_t reg, n, i; | ||
2334 | uint32_t vco_mg, refresh_reg; | ||
2335 | |||
2336 | if (!hw) { | ||
2337 | BCMLOG_ERR("Invalid Arguments\n"); | ||
2338 | return BC_STS_INV_ARG; | ||
2339 | } | ||
2340 | |||
2341 | /* FIXME: jarod: wha? */ | ||
2342 | /*n = (hw->core_clock_mhz * 3) / 20 + 1; */ | ||
2343 | n = hw->core_clock_mhz/5; | ||
2344 | |||
2345 | if (n == hw->prev_n) | ||
2346 | return BC_STS_CLK_NOCHG; | ||
2347 | |||
2348 | if (hw->pwr_lock > 0) { | ||
2349 | /* BCMLOG(BCMLOG_INFO,"pwr_lock is %u\n", hw->pwr_lock) */ | ||
2350 | return BC_STS_CLK_NOCHG; | ||
2351 | } | ||
2352 | |||
2353 | i = n * 27; | ||
2354 | if (i < 560) | ||
2355 | vco_mg = 0; | ||
2356 | else if (i < 900) | ||
2357 | vco_mg = 1; | ||
2358 | else if (i < 1030) | ||
2359 | vco_mg = 2; | ||
2360 | else | ||
2361 | vco_mg = 3; | ||
2362 | |||
2363 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl); | ||
2364 | |||
2365 | reg &= 0xFFFFCFC0; | ||
2366 | reg |= n; | ||
2367 | reg |= vco_mg << 12; | ||
2368 | |||
2369 | BCMLOG(BCMLOG_INFO, "clock is moving to %d with n %d with vco_mg %d\n", | ||
2370 | hw->core_clock_mhz, n, vco_mg); | ||
2371 | |||
2372 | /* Change the DRAM refresh rate to accomodate the new frequency */ | ||
2373 | /* refresh reg = ((refresh_rate * clock_rate)/16) - 1; rounding up*/ | ||
2374 | refresh_reg = (7 * hw->core_clock_mhz / 16); | ||
2375 | bc_dec_reg_wr(hw->adp, SDRAM_REF_PARAM, ((1 << 12) | refresh_reg)); | ||
2376 | |||
2377 | bc_dec_reg_wr(hw->adp, DecHt_PllACtl, reg); | ||
2378 | |||
2379 | i = 0; | ||
2380 | |||
2381 | for (i = 0; i < 10; i++) { | ||
2382 | reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl); | ||
2383 | |||
2384 | if (reg & 0x00020000) { | ||
2385 | hw->prev_n = n; | ||
2386 | /* FIXME: jarod: outputting a random "C" is... confusing... */ | ||
2387 | BCMLOG(BCMLOG_INFO, "C"); | ||
2388 | return BC_STS_SUCCESS; | ||
2389 | } else { | ||
2390 | msleep_interruptible(10); | ||
2391 | } | ||
2392 | } | ||
2393 | BCMLOG(BCMLOG_INFO, "clk change failed\n"); | ||
2394 | return BC_STS_CLK_NOCHG; | ||
2395 | } | ||
diff --git a/drivers/staging/crystalhd/crystalhd_hw.h b/drivers/staging/crystalhd/crystalhd_hw.h new file mode 100644 index 000000000000..1c6318e912ac --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_hw.h | |||
@@ -0,0 +1,398 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_hw . h | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70012 Linux driver hardware layer. | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #ifndef _CRYSTALHD_HW_H_ | ||
28 | #define _CRYSTALHD_HW_H_ | ||
29 | |||
30 | #include "crystalhd_misc.h" | ||
31 | #include "crystalhd_fw_if.h" | ||
32 | |||
33 | /* HW constants..*/ | ||
34 | #define DMA_ENGINE_CNT 2 | ||
35 | #define MAX_PIB_Q_DEPTH 64 | ||
36 | #define MIN_PIB_Q_DEPTH 2 | ||
37 | #define WR_POINTER_OFF 4 | ||
38 | |||
39 | #define ASPM_L1_ENABLE (BC_BIT(27)) | ||
40 | |||
41 | /************************************************* | ||
42 | 7412 Decoder Registers. | ||
43 | **************************************************/ | ||
44 | #define FW_CMD_BUFF_SZ 64 | ||
45 | #define TS_Host2CpuSnd 0x00000100 | ||
46 | #define Hst2CpuMbx1 0x00100F00 | ||
47 | #define Cpu2HstMbx1 0x00100F04 | ||
48 | #define MbxStat1 0x00100F08 | ||
49 | #define Stream2Host_Intr_Sts 0x00100F24 | ||
50 | #define C011_RET_SUCCESS 0x0 /* Reutrn status of firmware command. */ | ||
51 | |||
52 | /* TS input status register */ | ||
53 | #define TS_StreamAFIFOStatus 0x0010044C | ||
54 | #define TS_StreamBFIFOStatus 0x0010084C | ||
55 | |||
56 | /*UART Selection definitions*/ | ||
57 | #define UartSelectA 0x00100300 | ||
58 | #define UartSelectB 0x00100304 | ||
59 | |||
60 | #define BSVS_UART_DEC_NONE 0x00 | ||
61 | #define BSVS_UART_DEC_OUTER 0x01 | ||
62 | #define BSVS_UART_DEC_INNER 0x02 | ||
63 | #define BSVS_UART_STREAM 0x03 | ||
64 | |||
65 | /* Code-In fifo */ | ||
66 | #define REG_DecCA_RegCinCTL 0xa00 | ||
67 | #define REG_DecCA_RegCinBase 0xa0c | ||
68 | #define REG_DecCA_RegCinEnd 0xa10 | ||
69 | #define REG_DecCA_RegCinWrPtr 0xa04 | ||
70 | #define REG_DecCA_RegCinRdPtr 0xa08 | ||
71 | |||
72 | #define REG_Dec_TsUser0Base 0x100864 | ||
73 | #define REG_Dec_TsUser0Rdptr 0x100868 | ||
74 | #define REG_Dec_TsUser0Wrptr 0x10086C | ||
75 | #define REG_Dec_TsUser0End 0x100874 | ||
76 | |||
77 | /* ASF Case ...*/ | ||
78 | #define REG_Dec_TsAudCDB2Base 0x10036c | ||
79 | #define REG_Dec_TsAudCDB2Rdptr 0x100378 | ||
80 | #define REG_Dec_TsAudCDB2Wrptr 0x100374 | ||
81 | #define REG_Dec_TsAudCDB2End 0x100370 | ||
82 | |||
83 | /* DRAM bringup Registers */ | ||
84 | #define SDRAM_PARAM 0x00040804 | ||
85 | #define SDRAM_PRECHARGE 0x000408B0 | ||
86 | #define SDRAM_EXT_MODE 0x000408A4 | ||
87 | #define SDRAM_MODE 0x000408A0 | ||
88 | #define SDRAM_REFRESH 0x00040890 | ||
89 | #define SDRAM_REF_PARAM 0x00040808 | ||
90 | |||
91 | #define DecHt_PllACtl 0x34000C | ||
92 | #define DecHt_PllBCtl 0x340010 | ||
93 | #define DecHt_PllCCtl 0x340014 | ||
94 | #define DecHt_PllDCtl 0x340034 | ||
95 | #define DecHt_PllECtl 0x340038 | ||
96 | #define AUD_DSP_MISC_SOFT_RESET 0x00240104 | ||
97 | #define AIO_MISC_PLL_RESET 0x0026000C | ||
98 | #define PCIE_CLK_REQ_REG 0xDC | ||
99 | #define PCI_CLK_REQ_ENABLE (BC_BIT(8)) | ||
100 | |||
101 | /************************************************* | ||
102 | F/W Copy engine definitions.. | ||
103 | **************************************************/ | ||
104 | #define BC_FWIMG_ST_ADDR 0x00000000 | ||
105 | /* FIXME: jarod: there's a kernel function that'll do this for us... */ | ||
106 | #define rotr32_1(x, n) (((x) >> n) | ((x) << (32 - n))) | ||
107 | #define bswap_32_1(x) ((rotr32_1((x), 24) & 0x00ff00ff) | (rotr32_1((x), 8) & 0xff00ff00)) | ||
108 | |||
109 | #define DecHt_HostSwReset 0x340000 | ||
110 | #define BC_DRAM_FW_CFG_ADDR 0x001c2000 | ||
111 | |||
112 | typedef union _addr_64_ { | ||
113 | struct { | ||
114 | uint32_t low_part; | ||
115 | uint32_t high_part; | ||
116 | }; | ||
117 | |||
118 | uint64_t full_addr; | ||
119 | |||
120 | } addr_64; | ||
121 | |||
122 | typedef union _intr_mask_reg_ { | ||
123 | struct { | ||
124 | uint32_t mask_tx_done:1; | ||
125 | uint32_t mask_tx_err:1; | ||
126 | uint32_t mask_rx_done:1; | ||
127 | uint32_t mask_rx_err:1; | ||
128 | uint32_t mask_pcie_err:1; | ||
129 | uint32_t mask_pcie_rbusmast_err:1; | ||
130 | uint32_t mask_pcie_rgr_bridge:1; | ||
131 | uint32_t reserved:25; | ||
132 | }; | ||
133 | |||
134 | uint32_t whole_reg; | ||
135 | |||
136 | } intr_mask_reg; | ||
137 | |||
138 | typedef union _link_misc_perst_deco_ctrl_ { | ||
139 | struct { | ||
140 | uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ | ||
141 | uint32_t reserved0:3; /* Reserved.No Effect*/ | ||
142 | uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of 27MHz clk used to clk BCM7412*/ | ||
143 | uint32_t reserved1:27; /* Reseved. No Effect*/ | ||
144 | }; | ||
145 | |||
146 | uint32_t whole_reg; | ||
147 | |||
148 | } link_misc_perst_deco_ctrl; | ||
149 | |||
150 | typedef union _link_misc_perst_clk_ctrl_ { | ||
151 | struct { | ||
152 | uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */ | ||
153 | uint32_t stop_core_clk:1; /* When set, stops the branch of core_clk that is not needed for low power operation */ | ||
154 | uint32_t pll_pwr_dn:1; /* When set, powers down the main PLL. The alternate clock bit should be set | ||
155 | to select an alternate clock before setting this bit.*/ | ||
156 | uint32_t reserved0:5; /* Reserved */ | ||
157 | uint32_t pll_mult:8; /* This setting controls the multiplier for the PLL. */ | ||
158 | uint32_t pll_div:4; /* This setting controls the divider for the PLL. */ | ||
159 | uint32_t reserved1:12; /* Reserved */ | ||
160 | }; | ||
161 | |||
162 | uint32_t whole_reg; | ||
163 | |||
164 | } link_misc_perst_clk_ctrl; | ||
165 | |||
166 | |||
167 | typedef union _link_misc_perst_decoder_ctrl_ { | ||
168 | struct { | ||
169 | uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ | ||
170 | uint32_t res0:3; /* Reserved.No Effect*/ | ||
171 | uint32_t stop_7412_clk:1; /* 1 ->Stops branch of 27MHz clk used to clk BCM7412*/ | ||
172 | uint32_t res1:27; /* Reseved. No Effect */ | ||
173 | }; | ||
174 | |||
175 | uint32_t whole_reg; | ||
176 | |||
177 | } link_misc_perst_decoder_ctrl; | ||
178 | |||
179 | |||
180 | typedef union _desc_low_addr_reg_ { | ||
181 | struct { | ||
182 | uint32_t list_valid:1; | ||
183 | uint32_t reserved:4; | ||
184 | uint32_t low_addr:27; | ||
185 | }; | ||
186 | |||
187 | uint32_t whole_reg; | ||
188 | |||
189 | } desc_low_addr_reg; | ||
190 | |||
191 | typedef struct _dma_descriptor_ { /* 8 32-bit values */ | ||
192 | /* 0th u32 */ | ||
193 | uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */ | ||
194 | uint32_t res0:4; /* bits 28-31: Reserved */ | ||
195 | |||
196 | /* 1st u32 */ | ||
197 | uint32_t buff_addr_low; /* 1 buffer address low */ | ||
198 | uint32_t buff_addr_high; /* 2 buffer address high */ | ||
199 | |||
200 | /* 3rd u32 */ | ||
201 | uint32_t res2:2; /* 0-1 - Reserved */ | ||
202 | uint32_t xfer_size:23; /* 2-24 = Xfer size in words */ | ||
203 | uint32_t res3:6; /* 25-30 reserved */ | ||
204 | uint32_t intr_enable:1; /* 31 - Interrupt After this desc */ | ||
205 | |||
206 | /* 4th u32 */ | ||
207 | uint32_t endian_xlat_align:2; /* 0-1 Endian Translation */ | ||
208 | uint32_t next_desc_cont:1; /* 2 - Next desc is in contig memory */ | ||
209 | uint32_t res4:25; /* 3 - 27 Reserved bits */ | ||
210 | uint32_t fill_bytes:2; /* 28-29 Bits Fill Bytes */ | ||
211 | uint32_t dma_dir:1; /* 30 bit DMA Direction */ | ||
212 | uint32_t last_rec_indicator:1; /* 31 bit Last Record Indicator */ | ||
213 | |||
214 | /* 5th u32 */ | ||
215 | uint32_t next_desc_addr_low; /* 32-bits Next Desc Addr lower */ | ||
216 | |||
217 | /* 6th u32 */ | ||
218 | uint32_t next_desc_addr_high; /* 32-bits Next Desc Addr Higher */ | ||
219 | |||
220 | /* 7th u32 */ | ||
221 | uint32_t res8; /* Last 32bits reserved */ | ||
222 | |||
223 | } dma_descriptor, *pdma_descriptor; | ||
224 | |||
225 | /* | ||
226 | * We will allocate the memory in 4K pages | ||
227 | * the linked list will be a list of 32 byte descriptors. | ||
228 | * The virtual address will determine what should be freed. | ||
229 | */ | ||
230 | typedef struct _dma_desc_mem_ { | ||
231 | pdma_descriptor pdma_desc_start; /* 32-bytes for dma descriptor. should be first element */ | ||
232 | dma_addr_t phy_addr; /* physical address of each DMA desc */ | ||
233 | uint32_t sz; | ||
234 | struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */ | ||
235 | |||
236 | } dma_desc_mem, *pdma_desc_mem; | ||
237 | |||
238 | |||
239 | |||
240 | typedef enum _list_sts_ { | ||
241 | sts_free = 0, | ||
242 | |||
243 | /* RX-Y Bits 0:7 */ | ||
244 | rx_waiting_y_intr = 0x00000001, | ||
245 | rx_y_error = 0x00000004, | ||
246 | |||
247 | /* RX-UV Bits 8:16 */ | ||
248 | rx_waiting_uv_intr = 0x0000100, | ||
249 | rx_uv_error = 0x0000400, | ||
250 | |||
251 | rx_sts_waiting = (rx_waiting_y_intr|rx_waiting_uv_intr), | ||
252 | rx_sts_error = (rx_y_error|rx_uv_error), | ||
253 | |||
254 | rx_y_mask = 0x000000FF, | ||
255 | rx_uv_mask = 0x0000FF00, | ||
256 | |||
257 | } list_sts; | ||
258 | |||
259 | typedef struct _tx_dma_pkt_ { | ||
260 | dma_desc_mem desc_mem; | ||
261 | hw_comp_callback call_back; | ||
262 | crystalhd_dio_req *dio_req; | ||
263 | wait_queue_head_t *cb_event; | ||
264 | uint32_t list_tag; | ||
265 | |||
266 | } tx_dma_pkt; | ||
267 | |||
268 | typedef struct _crystalhd_rx_dma_pkt { | ||
269 | dma_desc_mem desc_mem; | ||
270 | crystalhd_dio_req *dio_req; | ||
271 | uint32_t pkt_tag; | ||
272 | uint32_t flags; | ||
273 | BC_PIC_INFO_BLOCK pib; | ||
274 | dma_addr_t uv_phy_addr; | ||
275 | struct _crystalhd_rx_dma_pkt *next; | ||
276 | |||
277 | } crystalhd_rx_dma_pkt; | ||
278 | |||
279 | struct crystalhd_hw_stats{ | ||
280 | uint32_t rx_errors; | ||
281 | uint32_t tx_errors; | ||
282 | uint32_t freeq_count; | ||
283 | uint32_t rdyq_count; | ||
284 | uint32_t num_interrupts; | ||
285 | uint32_t dev_interrupts; | ||
286 | uint32_t cin_busy; | ||
287 | uint32_t pause_cnt; | ||
288 | }; | ||
289 | |||
290 | struct crystalhd_hw { | ||
291 | tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT]; | ||
292 | spinlock_t lock; | ||
293 | |||
294 | uint32_t tx_ioq_tag_seed; | ||
295 | uint32_t tx_list_post_index; | ||
296 | |||
297 | crystalhd_rx_dma_pkt *rx_pkt_pool_head; | ||
298 | uint32_t rx_pkt_tag_seed; | ||
299 | |||
300 | bool dev_started; | ||
301 | void *adp; | ||
302 | |||
303 | wait_queue_head_t *pfw_cmd_event; | ||
304 | int fwcmd_evt_sts; | ||
305 | |||
306 | uint32_t pib_del_Q_addr; | ||
307 | uint32_t pib_rel_Q_addr; | ||
308 | |||
309 | crystalhd_dioq_t *tx_freeq; | ||
310 | crystalhd_dioq_t *tx_actq; | ||
311 | |||
312 | /* Rx DMA Engine Specific Locks */ | ||
313 | spinlock_t rx_lock; | ||
314 | uint32_t rx_list_post_index; | ||
315 | list_sts rx_list_sts[DMA_ENGINE_CNT]; | ||
316 | crystalhd_dioq_t *rx_rdyq; | ||
317 | crystalhd_dioq_t *rx_freeq; | ||
318 | crystalhd_dioq_t *rx_actq; | ||
319 | uint32_t stop_pending; | ||
320 | |||
321 | /* HW counters.. */ | ||
322 | struct crystalhd_hw_stats stats; | ||
323 | |||
324 | /* Core clock in MHz */ | ||
325 | uint32_t core_clock_mhz; | ||
326 | uint32_t prev_n; | ||
327 | uint32_t pwr_lock; | ||
328 | }; | ||
329 | |||
330 | /* Clock defines for power control */ | ||
331 | #define CLOCK_PRESET 175 | ||
332 | |||
333 | /* DMA engine register BIT mask wrappers.. */ | ||
334 | #define DMA_START_BIT MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_MASK | ||
335 | |||
336 | #define GET_RX_INTR_MASK (INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_MASK | \ | ||
337 | INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK | \ | ||
338 | INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_MASK | \ | ||
339 | INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK | \ | ||
340 | INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_MASK | \ | ||
341 | INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK | \ | ||
342 | INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_MASK | \ | ||
343 | INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK) | ||
344 | |||
345 | #define GET_Y0_ERR_MSK (MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK | \ | ||
346 | MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK | \ | ||
347 | MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK | \ | ||
348 | MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) | ||
349 | |||
350 | #define GET_UV0_ERR_MSK (MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK | \ | ||
351 | MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK | \ | ||
352 | MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK | \ | ||
353 | MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) | ||
354 | |||
355 | #define GET_Y1_ERR_MSK (MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK | \ | ||
356 | MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK | \ | ||
357 | MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK | \ | ||
358 | MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) | ||
359 | |||
360 | #define GET_UV1_ERR_MSK (MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK | \ | ||
361 | MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK | \ | ||
362 | MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK | \ | ||
363 | MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) | ||
364 | |||
365 | |||
366 | /**** API Exposed to the other layers ****/ | ||
367 | BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, | ||
368 | void *buffer, uint32_t sz); | ||
369 | BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd); | ||
370 | bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw); | ||
371 | BC_STATUS crystalhd_hw_open(struct crystalhd_hw *, struct crystalhd_adp *); | ||
372 | BC_STATUS crystalhd_hw_close(struct crystalhd_hw *); | ||
373 | BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *); | ||
374 | BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *); | ||
375 | |||
376 | |||
377 | BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, | ||
378 | hw_comp_callback call_back, | ||
379 | wait_queue_head_t *cb_event, | ||
380 | uint32_t *list_id, uint8_t data_flags); | ||
381 | |||
382 | BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw); | ||
383 | BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw); | ||
384 | BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw); | ||
385 | BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id); | ||
386 | BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | ||
387 | crystalhd_dio_req *ioreq, bool en_post); | ||
388 | BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, | ||
389 | BC_PIC_INFO_BLOCK *pib, | ||
390 | crystalhd_dio_req **ioreq); | ||
391 | BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw); | ||
392 | BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw); | ||
393 | void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats); | ||
394 | |||
395 | /* API to program the core clock on the decoder */ | ||
396 | BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *); | ||
397 | |||
398 | #endif | ||
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.c b/drivers/staging/crystalhd/crystalhd_lnx.c new file mode 100644 index 000000000000..3eac70aa213c --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_lnx.c | |||
@@ -0,0 +1,765 @@ | |||
1 | /*************************************************************************** | ||
2 | BCM70010 Linux driver | ||
3 | Copyright (c) 2005-2009, Broadcom Corporation. | ||
4 | |||
5 | This driver is free software; you can redistribute it and/or modify | ||
6 | it under the terms of the GNU General Public License as published by | ||
7 | the Free Software Foundation, version 2 of the License. | ||
8 | |||
9 | This driver is distributed in the hope that it will be useful, | ||
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | GNU General Public License for more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License | ||
15 | along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
16 | ***************************************************************************/ | ||
17 | |||
18 | #include <linux/version.h> | ||
19 | |||
20 | #include "crystalhd_lnx.h" | ||
21 | |||
22 | static struct class *crystalhd_class; | ||
23 | |||
24 | static struct crystalhd_adp *g_adp_info; | ||
25 | |||
26 | static irqreturn_t chd_dec_isr(int irq, void *arg) | ||
27 | { | ||
28 | struct crystalhd_adp *adp = (struct crystalhd_adp *) arg; | ||
29 | int rc = 0; | ||
30 | if (adp) | ||
31 | rc = crystalhd_cmd_interrupt(&adp->cmds); | ||
32 | |||
33 | return IRQ_RETVAL(rc); | ||
34 | } | ||
35 | |||
36 | static int chd_dec_enable_int(struct crystalhd_adp *adp) | ||
37 | { | ||
38 | int rc = 0; | ||
39 | |||
40 | if (!adp || !adp->pdev) { | ||
41 | BCMLOG_ERR("Invalid arg!!\n"); | ||
42 | return -EINVAL; | ||
43 | } | ||
44 | |||
45 | if (adp->pdev->msi_enabled) | ||
46 | adp->msi = 1; | ||
47 | else | ||
48 | adp->msi = pci_enable_msi(adp->pdev); | ||
49 | |||
50 | rc = request_irq(adp->pdev->irq, chd_dec_isr, IRQF_SHARED, | ||
51 | adp->name, (void *)adp); | ||
52 | if (rc) { | ||
53 | BCMLOG_ERR("Interrupt request failed.. \n"); | ||
54 | pci_disable_msi(adp->pdev); | ||
55 | } | ||
56 | |||
57 | return rc; | ||
58 | } | ||
59 | |||
60 | static int chd_dec_disable_int(struct crystalhd_adp *adp) | ||
61 | { | ||
62 | if (!adp || !adp->pdev) { | ||
63 | BCMLOG_ERR("Invalid arg!!\n"); | ||
64 | return -EINVAL; | ||
65 | } | ||
66 | |||
67 | free_irq(adp->pdev->irq, adp); | ||
68 | |||
69 | if (adp->msi) | ||
70 | pci_disable_msi(adp->pdev); | ||
71 | |||
72 | return 0; | ||
73 | } | ||
74 | |||
75 | crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr) | ||
76 | { | ||
77 | unsigned long flags = 0; | ||
78 | crystalhd_ioctl_data *temp; | ||
79 | |||
80 | if (!adp) | ||
81 | return NULL; | ||
82 | |||
83 | spin_lock_irqsave(&adp->lock, flags); | ||
84 | |||
85 | temp = adp->idata_free_head; | ||
86 | if (temp) { | ||
87 | adp->idata_free_head = adp->idata_free_head->next; | ||
88 | memset(temp, 0, sizeof(*temp)); | ||
89 | } | ||
90 | |||
91 | spin_unlock_irqrestore(&adp->lock, flags); | ||
92 | return temp; | ||
93 | } | ||
94 | |||
95 | void chd_dec_free_iodata(struct crystalhd_adp *adp, crystalhd_ioctl_data *iodata, | ||
96 | bool isr) | ||
97 | { | ||
98 | unsigned long flags = 0; | ||
99 | |||
100 | if (!adp || !iodata) | ||
101 | return; | ||
102 | |||
103 | spin_lock_irqsave(&adp->lock, flags); | ||
104 | iodata->next = adp->idata_free_head; | ||
105 | adp->idata_free_head = iodata; | ||
106 | spin_unlock_irqrestore(&adp->lock, flags); | ||
107 | } | ||
108 | |||
109 | static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int set) | ||
110 | { | ||
111 | int rc; | ||
112 | |||
113 | if (!ud || !dr) { | ||
114 | BCMLOG_ERR("Invalid arg \n"); | ||
115 | return -EINVAL; | ||
116 | } | ||
117 | |||
118 | if (set) | ||
119 | rc = copy_to_user((void *)ud, dr, size); | ||
120 | else | ||
121 | rc = copy_from_user(dr, (void *)ud, size); | ||
122 | |||
123 | if (rc) { | ||
124 | BCMLOG_ERR("Invalid args for command \n"); | ||
125 | rc = -EFAULT; | ||
126 | } | ||
127 | |||
128 | return rc; | ||
129 | } | ||
130 | |||
131 | static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, crystalhd_ioctl_data *io, | ||
132 | uint32_t m_sz, unsigned long ua) | ||
133 | { | ||
134 | unsigned long ua_off; | ||
135 | int rc = 0; | ||
136 | |||
137 | if (!adp || !io || !ua || !m_sz) { | ||
138 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
139 | return -EINVAL; | ||
140 | } | ||
141 | |||
142 | io->add_cdata = vmalloc(m_sz); | ||
143 | if (!io->add_cdata) { | ||
144 | BCMLOG_ERR("kalloc fail for sz:%x\n", m_sz); | ||
145 | return -ENOMEM; | ||
146 | } | ||
147 | |||
148 | io->add_cdata_sz = m_sz; | ||
149 | ua_off = ua + sizeof(io->udata); | ||
150 | rc = crystalhd_user_data(ua_off, io->add_cdata, io->add_cdata_sz, 0); | ||
151 | if (rc) { | ||
152 | BCMLOG_ERR("failed to pull add_cdata sz:%x ua_off:%x\n", | ||
153 | io->add_cdata_sz, (unsigned int)ua_off); | ||
154 | if (io->add_cdata) { | ||
155 | kfree(io->add_cdata); | ||
156 | io->add_cdata = NULL; | ||
157 | } | ||
158 | return -ENODATA; | ||
159 | } | ||
160 | |||
161 | return rc; | ||
162 | } | ||
163 | |||
164 | static int chd_dec_release_cdata(struct crystalhd_adp *adp, | ||
165 | crystalhd_ioctl_data *io, unsigned long ua) | ||
166 | { | ||
167 | unsigned long ua_off; | ||
168 | int rc; | ||
169 | |||
170 | if (!adp || !io || !ua) { | ||
171 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
172 | return -EINVAL; | ||
173 | } | ||
174 | |||
175 | if (io->cmd != BCM_IOC_FW_DOWNLOAD) { | ||
176 | ua_off = ua + sizeof(io->udata); | ||
177 | rc = crystalhd_user_data(ua_off, io->add_cdata, | ||
178 | io->add_cdata_sz, 1); | ||
179 | if (rc) { | ||
180 | BCMLOG_ERR("failed to push add_cdata sz:%x ua_off:%x\n", | ||
181 | io->add_cdata_sz, (unsigned int)ua_off); | ||
182 | return -ENODATA; | ||
183 | } | ||
184 | } | ||
185 | |||
186 | if (io->add_cdata) { | ||
187 | vfree(io->add_cdata); | ||
188 | io->add_cdata = NULL; | ||
189 | } | ||
190 | |||
191 | return 0; | ||
192 | } | ||
193 | |||
194 | static int chd_dec_proc_user_data(struct crystalhd_adp *adp, | ||
195 | crystalhd_ioctl_data *io, | ||
196 | unsigned long ua, int set) | ||
197 | { | ||
198 | int rc; | ||
199 | uint32_t m_sz = 0; | ||
200 | |||
201 | if (!adp || !io || !ua) { | ||
202 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
203 | return -EINVAL; | ||
204 | } | ||
205 | |||
206 | rc = crystalhd_user_data(ua, &io->udata, sizeof(io->udata), set); | ||
207 | if (rc) { | ||
208 | BCMLOG_ERR("failed to %s iodata \n", (set ? "set" : "get")); | ||
209 | return rc; | ||
210 | } | ||
211 | |||
212 | switch (io->cmd) { | ||
213 | case BCM_IOC_MEM_RD: | ||
214 | case BCM_IOC_MEM_WR: | ||
215 | case BCM_IOC_FW_DOWNLOAD: | ||
216 | m_sz = io->udata.u.devMem.NumDwords * 4; | ||
217 | if (set) | ||
218 | rc = chd_dec_release_cdata(adp, io, ua); | ||
219 | else | ||
220 | rc = chd_dec_fetch_cdata(adp, io, m_sz, ua); | ||
221 | break; | ||
222 | default: | ||
223 | break; | ||
224 | } | ||
225 | |||
226 | return rc; | ||
227 | } | ||
228 | |||
229 | static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua, | ||
230 | uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func) | ||
231 | { | ||
232 | int rc; | ||
233 | crystalhd_ioctl_data *temp; | ||
234 | BC_STATUS sts = BC_STS_SUCCESS; | ||
235 | |||
236 | temp = chd_dec_alloc_iodata(adp, 0); | ||
237 | if (!temp) { | ||
238 | BCMLOG_ERR("Failed to get iodata..\n"); | ||
239 | return -EINVAL; | ||
240 | } | ||
241 | |||
242 | temp->u_id = uid; | ||
243 | temp->cmd = cmd; | ||
244 | |||
245 | rc = chd_dec_proc_user_data(adp, temp, ua, 0); | ||
246 | if (!rc) { | ||
247 | sts = func(&adp->cmds, temp); | ||
248 | if (sts == BC_STS_PENDING) | ||
249 | sts = BC_STS_NOT_IMPL; | ||
250 | temp->udata.RetSts = sts; | ||
251 | rc = chd_dec_proc_user_data(adp, temp, ua, 1); | ||
252 | } | ||
253 | |||
254 | if (temp) { | ||
255 | chd_dec_free_iodata(adp, temp, 0); | ||
256 | temp = NULL; | ||
257 | } | ||
258 | |||
259 | return rc; | ||
260 | } | ||
261 | |||
262 | /* API interfaces */ | ||
263 | static int chd_dec_ioctl(struct inode *in, struct file *fd, | ||
264 | unsigned int cmd, unsigned long ua) | ||
265 | { | ||
266 | struct crystalhd_adp *adp = chd_get_adp(); | ||
267 | crystalhd_cmd_proc cproc; | ||
268 | struct crystalhd_user *uc; | ||
269 | |||
270 | if (!adp || !fd) { | ||
271 | BCMLOG_ERR("Invalid adp\n"); | ||
272 | return -EINVAL; | ||
273 | } | ||
274 | |||
275 | uc = (struct crystalhd_user *)fd->private_data; | ||
276 | if (!uc) { | ||
277 | BCMLOG_ERR("Failed to get uc\n"); | ||
278 | return -ENODATA; | ||
279 | } | ||
280 | |||
281 | cproc = crystalhd_get_cmd_proc(&adp->cmds, cmd, uc); | ||
282 | if (!cproc) { | ||
283 | BCMLOG_ERR("Unhandled command: %d\n", cmd); | ||
284 | return -EINVAL; | ||
285 | } | ||
286 | |||
287 | return chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc); | ||
288 | } | ||
289 | |||
290 | static int chd_dec_open(struct inode *in, struct file *fd) | ||
291 | { | ||
292 | struct crystalhd_adp *adp = chd_get_adp(); | ||
293 | int rc = 0; | ||
294 | BC_STATUS sts = BC_STS_SUCCESS; | ||
295 | struct crystalhd_user *uc = NULL; | ||
296 | |||
297 | BCMLOG_ENTER; | ||
298 | if (!adp) { | ||
299 | BCMLOG_ERR("Invalid adp\n"); | ||
300 | return -EINVAL; | ||
301 | } | ||
302 | |||
303 | if (adp->cfg_users >= BC_LINK_MAX_OPENS) { | ||
304 | BCMLOG(BCMLOG_INFO, "Already in use.%d\n", adp->cfg_users); | ||
305 | return -EBUSY; | ||
306 | } | ||
307 | |||
308 | sts = crystalhd_user_open(&adp->cmds, &uc); | ||
309 | if (sts != BC_STS_SUCCESS) { | ||
310 | BCMLOG_ERR("cmd_user_open - %d \n", sts); | ||
311 | rc = -EBUSY; | ||
312 | } | ||
313 | |||
314 | adp->cfg_users++; | ||
315 | |||
316 | fd->private_data = uc; | ||
317 | |||
318 | return rc; | ||
319 | } | ||
320 | |||
321 | static int chd_dec_close(struct inode *in, struct file *fd) | ||
322 | { | ||
323 | struct crystalhd_adp *adp = chd_get_adp(); | ||
324 | struct crystalhd_user *uc; | ||
325 | |||
326 | BCMLOG_ENTER; | ||
327 | if (!adp) { | ||
328 | BCMLOG_ERR("Invalid adp \n"); | ||
329 | return -EINVAL; | ||
330 | } | ||
331 | |||
332 | uc = (struct crystalhd_user *)fd->private_data; | ||
333 | if (!uc) { | ||
334 | BCMLOG_ERR("Failed to get uc\n"); | ||
335 | return -ENODATA; | ||
336 | } | ||
337 | |||
338 | crystalhd_user_close(&adp->cmds, uc); | ||
339 | |||
340 | adp->cfg_users--; | ||
341 | |||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | static const struct file_operations chd_dec_fops = { | ||
346 | .owner = THIS_MODULE, | ||
347 | .ioctl = chd_dec_ioctl, | ||
348 | .open = chd_dec_open, | ||
349 | .release = chd_dec_close, | ||
350 | }; | ||
351 | |||
352 | static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) | ||
353 | { | ||
354 | crystalhd_ioctl_data *temp; | ||
355 | struct device *dev; | ||
356 | int rc = -ENODEV, i = 0; | ||
357 | |||
358 | if (!adp) | ||
359 | goto fail; | ||
360 | |||
361 | adp->chd_dec_major = register_chrdev(0, CRYSTALHD_API_NAME, | ||
362 | &chd_dec_fops); | ||
363 | if (adp->chd_dec_major < 0) { | ||
364 | BCMLOG_ERR("Failed to create config dev\n"); | ||
365 | rc = adp->chd_dec_major; | ||
366 | goto fail; | ||
367 | } | ||
368 | |||
369 | /* register crystalhd class */ | ||
370 | crystalhd_class = class_create(THIS_MODULE, "crystalhd"); | ||
371 | if (IS_ERR(crystalhd_class)) { | ||
372 | BCMLOG_ERR("failed to create class\n"); | ||
373 | goto fail; | ||
374 | } | ||
375 | |||
376 | dev = device_create(crystalhd_class, NULL, MKDEV(adp->chd_dec_major, 0), | ||
377 | NULL, "crystalhd"); | ||
378 | if (!dev) { | ||
379 | BCMLOG_ERR("failed to create device\n"); | ||
380 | goto device_create_fail; | ||
381 | } | ||
382 | |||
383 | rc = crystalhd_create_elem_pool(adp, BC_LINK_ELEM_POOL_SZ); | ||
384 | if (rc) { | ||
385 | BCMLOG_ERR("failed to create device\n"); | ||
386 | goto elem_pool_fail; | ||
387 | } | ||
388 | |||
389 | /* Allocate general purpose ioctl pool. */ | ||
390 | for (i = 0; i < CHD_IODATA_POOL_SZ; i++) { | ||
391 | /* FIXME: jarod: why atomic? */ | ||
392 | temp = kzalloc(sizeof(crystalhd_ioctl_data), GFP_ATOMIC); | ||
393 | if (!temp) { | ||
394 | BCMLOG_ERR("ioctl data pool kzalloc failed\n"); | ||
395 | rc = -ENOMEM; | ||
396 | goto kzalloc_fail; | ||
397 | } | ||
398 | /* Add to global pool.. */ | ||
399 | chd_dec_free_iodata(adp, temp, 0); | ||
400 | } | ||
401 | |||
402 | return 0; | ||
403 | |||
404 | kzalloc_fail: | ||
405 | crystalhd_delete_elem_pool(adp); | ||
406 | elem_pool_fail: | ||
407 | device_destroy(crystalhd_class, MKDEV(adp->chd_dec_major, 0)); | ||
408 | device_create_fail: | ||
409 | class_destroy(crystalhd_class); | ||
410 | fail: | ||
411 | return rc; | ||
412 | } | ||
413 | |||
414 | static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) | ||
415 | { | ||
416 | crystalhd_ioctl_data *temp = NULL; | ||
417 | if (!adp) | ||
418 | return; | ||
419 | |||
420 | if (adp->chd_dec_major > 0) { | ||
421 | /* unregister crystalhd class */ | ||
422 | device_destroy(crystalhd_class, MKDEV(adp->chd_dec_major, 0)); | ||
423 | unregister_chrdev(adp->chd_dec_major, CRYSTALHD_API_NAME); | ||
424 | BCMLOG(BCMLOG_INFO, "released api device - %d\n", | ||
425 | adp->chd_dec_major); | ||
426 | class_destroy(crystalhd_class); | ||
427 | } | ||
428 | adp->chd_dec_major = 0; | ||
429 | |||
430 | /* Clear iodata pool.. */ | ||
431 | do { | ||
432 | temp = chd_dec_alloc_iodata(adp, 0); | ||
433 | if (temp) | ||
434 | kfree(temp); | ||
435 | } while (temp); | ||
436 | |||
437 | crystalhd_delete_elem_pool(adp); | ||
438 | } | ||
439 | |||
440 | static int __devinit chd_pci_reserve_mem(struct crystalhd_adp *pinfo) | ||
441 | { | ||
442 | int rc; | ||
443 | unsigned long bar2 = pci_resource_start(pinfo->pdev, 2); | ||
444 | uint32_t mem_len = pci_resource_len(pinfo->pdev, 2); | ||
445 | unsigned long bar0 = pci_resource_start(pinfo->pdev, 0); | ||
446 | uint32_t i2o_len = pci_resource_len(pinfo->pdev, 0); | ||
447 | |||
448 | BCMLOG(BCMLOG_SSTEP, "bar2:0x%lx-0x%08x bar0:0x%lx-0x%08x\n", | ||
449 | bar2, mem_len, bar0, i2o_len); | ||
450 | |||
451 | rc = check_mem_region(bar2, mem_len); | ||
452 | if (rc) { | ||
453 | BCMLOG_ERR("No valid mem region...\n"); | ||
454 | return -ENOMEM; | ||
455 | } | ||
456 | |||
457 | pinfo->addr = ioremap_nocache(bar2, mem_len); | ||
458 | if (!pinfo->addr) { | ||
459 | BCMLOG_ERR("Failed to remap mem region...\n"); | ||
460 | return -ENOMEM; | ||
461 | } | ||
462 | |||
463 | pinfo->pci_mem_start = bar2; | ||
464 | pinfo->pci_mem_len = mem_len; | ||
465 | |||
466 | rc = check_mem_region(bar0, i2o_len); | ||
467 | if (rc) { | ||
468 | BCMLOG_ERR("No valid mem region...\n"); | ||
469 | return -ENOMEM; | ||
470 | } | ||
471 | |||
472 | pinfo->i2o_addr = ioremap_nocache(bar0, i2o_len); | ||
473 | if (!pinfo->i2o_addr) { | ||
474 | BCMLOG_ERR("Failed to remap mem region...\n"); | ||
475 | return -ENOMEM; | ||
476 | } | ||
477 | |||
478 | pinfo->pci_i2o_start = bar0; | ||
479 | pinfo->pci_i2o_len = i2o_len; | ||
480 | |||
481 | rc = pci_request_regions(pinfo->pdev, pinfo->name); | ||
482 | if (rc < 0) { | ||
483 | BCMLOG_ERR("Region request failed: %d\n", rc); | ||
484 | return rc; | ||
485 | } | ||
486 | |||
487 | BCMLOG(BCMLOG_SSTEP, "Mapped addr:0x%08lx i2o_addr:0x%08lx\n", | ||
488 | (unsigned long)pinfo->addr, (unsigned long)pinfo->i2o_addr); | ||
489 | |||
490 | return 0; | ||
491 | } | ||
492 | |||
493 | static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo) | ||
494 | { | ||
495 | if (!pinfo) | ||
496 | return; | ||
497 | |||
498 | if (pinfo->addr) | ||
499 | iounmap(pinfo->addr); | ||
500 | |||
501 | if (pinfo->i2o_addr) | ||
502 | iounmap(pinfo->i2o_addr); | ||
503 | |||
504 | pci_release_regions(pinfo->pdev); | ||
505 | } | ||
506 | |||
507 | |||
508 | static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) | ||
509 | { | ||
510 | struct crystalhd_adp *pinfo; | ||
511 | BC_STATUS sts = BC_STS_SUCCESS; | ||
512 | |||
513 | BCMLOG_ENTER; | ||
514 | |||
515 | pinfo = (struct crystalhd_adp *) pci_get_drvdata(pdev); | ||
516 | if (!pinfo) { | ||
517 | BCMLOG_ERR("could not get adp\n"); | ||
518 | return; | ||
519 | } | ||
520 | |||
521 | sts = crystalhd_delete_cmd_context(&pinfo->cmds); | ||
522 | if (sts != BC_STS_SUCCESS) | ||
523 | BCMLOG_ERR("cmd delete :%d \n", sts); | ||
524 | |||
525 | chd_dec_release_chdev(pinfo); | ||
526 | |||
527 | chd_dec_disable_int(pinfo); | ||
528 | |||
529 | chd_pci_release_mem(pinfo); | ||
530 | pci_disable_device(pinfo->pdev); | ||
531 | |||
532 | kfree(pinfo); | ||
533 | g_adp_info = NULL; | ||
534 | } | ||
535 | |||
536 | static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, | ||
537 | const struct pci_device_id *entry) | ||
538 | { | ||
539 | struct crystalhd_adp *pinfo; | ||
540 | int rc; | ||
541 | BC_STATUS sts = BC_STS_SUCCESS; | ||
542 | |||
543 | BCMLOG(BCMLOG_DBG, "PCI_INFO: Vendor:0x%04x Device:0x%04x " | ||
544 | "s_vendor:0x%04x s_device: 0x%04x\n", | ||
545 | pdev->vendor, pdev->device, pdev->subsystem_vendor, | ||
546 | pdev->subsystem_device); | ||
547 | |||
548 | /* FIXME: jarod: why atomic? */ | ||
549 | pinfo = kzalloc(sizeof(struct crystalhd_adp), GFP_ATOMIC); | ||
550 | if (!pinfo) { | ||
551 | BCMLOG_ERR("Failed to allocate memory\n"); | ||
552 | return -ENOMEM; | ||
553 | } | ||
554 | |||
555 | pinfo->pdev = pdev; | ||
556 | |||
557 | rc = pci_enable_device(pdev); | ||
558 | if (rc) { | ||
559 | BCMLOG_ERR("Failed to enable PCI device\n"); | ||
560 | return rc; | ||
561 | } | ||
562 | |||
563 | snprintf(pinfo->name, 31, "crystalhd_pci_e:%d:%d:%d", | ||
564 | pdev->bus->number, PCI_SLOT(pdev->devfn), | ||
565 | PCI_FUNC(pdev->devfn)); | ||
566 | |||
567 | rc = chd_pci_reserve_mem(pinfo); | ||
568 | if (rc) { | ||
569 | BCMLOG_ERR("Failed to setup memory regions.\n"); | ||
570 | return -ENOMEM; | ||
571 | } | ||
572 | |||
573 | pinfo->present = 1; | ||
574 | pinfo->drv_data = entry->driver_data; | ||
575 | |||
576 | /* Setup adapter level lock.. */ | ||
577 | spin_lock_init(&pinfo->lock); | ||
578 | |||
579 | /* setup api stuff.. */ | ||
580 | chd_dec_init_chdev(pinfo); | ||
581 | rc = chd_dec_enable_int(pinfo); | ||
582 | if (rc) { | ||
583 | BCMLOG_ERR("_enable_int err:%d \n", rc); | ||
584 | pci_disable_device(pdev); | ||
585 | return -ENODEV; | ||
586 | } | ||
587 | |||
588 | /* Set dma mask... */ | ||
589 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | ||
590 | pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | ||
591 | pinfo->dmabits = 64; | ||
592 | } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { | ||
593 | pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | ||
594 | pinfo->dmabits = 32; | ||
595 | } else { | ||
596 | BCMLOG_ERR("Unabled to setup DMA %d\n", rc); | ||
597 | pci_disable_device(pdev); | ||
598 | return -ENODEV; | ||
599 | } | ||
600 | |||
601 | sts = crystalhd_setup_cmd_context(&pinfo->cmds, pinfo); | ||
602 | if (sts != BC_STS_SUCCESS) { | ||
603 | BCMLOG_ERR("cmd setup :%d \n", sts); | ||
604 | pci_disable_device(pdev); | ||
605 | return -ENODEV; | ||
606 | } | ||
607 | |||
608 | pci_set_master(pdev); | ||
609 | |||
610 | pci_set_drvdata(pdev, pinfo); | ||
611 | |||
612 | g_adp_info = pinfo; | ||
613 | |||
614 | return 0; | ||
615 | } | ||
616 | |||
617 | #ifdef CONFIG_PM | ||
618 | int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state) | ||
619 | { | ||
620 | struct crystalhd_adp *adp; | ||
621 | crystalhd_ioctl_data *temp; | ||
622 | BC_STATUS sts = BC_STS_SUCCESS; | ||
623 | |||
624 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); | ||
625 | if (!adp) { | ||
626 | BCMLOG_ERR("could not get adp\n"); | ||
627 | return -ENODEV; | ||
628 | } | ||
629 | |||
630 | temp = chd_dec_alloc_iodata(adp, false); | ||
631 | if (!temp) { | ||
632 | BCMLOG_ERR("could not get ioctl data\n"); | ||
633 | return -ENODEV; | ||
634 | } | ||
635 | |||
636 | sts = crystalhd_suspend(&adp->cmds, temp); | ||
637 | if (sts != BC_STS_SUCCESS) { | ||
638 | BCMLOG_ERR("BCM70012 Suspend %d\n", sts); | ||
639 | return -ENODEV; | ||
640 | } | ||
641 | |||
642 | chd_dec_free_iodata(adp, temp, false); | ||
643 | chd_dec_disable_int(adp); | ||
644 | pci_save_state(pdev); | ||
645 | |||
646 | /* Disable IO/bus master/irq router */ | ||
647 | pci_disable_device(pdev); | ||
648 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
649 | return 0; | ||
650 | } | ||
651 | |||
652 | int chd_dec_pci_resume(struct pci_dev *pdev) | ||
653 | { | ||
654 | struct crystalhd_adp *adp; | ||
655 | BC_STATUS sts = BC_STS_SUCCESS; | ||
656 | int rc; | ||
657 | |||
658 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); | ||
659 | if (!adp) { | ||
660 | BCMLOG_ERR("could not get adp\n"); | ||
661 | return -ENODEV; | ||
662 | } | ||
663 | |||
664 | pci_set_power_state(pdev, PCI_D0); | ||
665 | pci_restore_state(pdev); | ||
666 | |||
667 | /* device's irq possibly is changed, driver should take care */ | ||
668 | if (pci_enable_device(pdev)) { | ||
669 | BCMLOG_ERR("Failed to enable PCI device\n"); | ||
670 | return 1; | ||
671 | } | ||
672 | |||
673 | pci_set_master(pdev); | ||
674 | |||
675 | rc = chd_dec_enable_int(adp); | ||
676 | if (rc) { | ||
677 | BCMLOG_ERR("_enable_int err:%d \n", rc); | ||
678 | pci_disable_device(pdev); | ||
679 | return -ENODEV; | ||
680 | } | ||
681 | |||
682 | sts = crystalhd_resume(&adp->cmds); | ||
683 | if (sts != BC_STS_SUCCESS) { | ||
684 | BCMLOG_ERR("BCM70012 Resume %d\n", sts); | ||
685 | pci_disable_device(pdev); | ||
686 | return -ENODEV; | ||
687 | } | ||
688 | |||
689 | return 0; | ||
690 | } | ||
691 | #endif | ||
692 | |||
693 | static DEFINE_PCI_DEVICE_TABLE(chd_dec_pci_id_table) = { | ||
694 | { PCI_VDEVICE(BROADCOM, 0x1612), 8 }, | ||
695 | { 0, }, | ||
696 | }; | ||
697 | MODULE_DEVICE_TABLE(pci, chd_dec_pci_id_table); | ||
698 | |||
699 | static struct pci_driver bc_chd_70012_driver = { | ||
700 | .name = "Broadcom 70012 Decoder", | ||
701 | .probe = chd_dec_pci_probe, | ||
702 | .remove = __devexit_p(chd_dec_pci_remove), | ||
703 | .id_table = chd_dec_pci_id_table, | ||
704 | #ifdef CONFIG_PM | ||
705 | .suspend = chd_dec_pci_suspend, | ||
706 | .resume = chd_dec_pci_resume | ||
707 | #endif | ||
708 | }; | ||
709 | |||
710 | void chd_set_log_level(struct crystalhd_adp *adp, char *arg) | ||
711 | { | ||
712 | if ((!arg) || (strlen(arg) < 3)) | ||
713 | g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA; | ||
714 | else if (!strncmp(arg, "sstep", 5)) | ||
715 | g_linklog_level = BCMLOG_INFO | BCMLOG_DATA | BCMLOG_DBG | | ||
716 | BCMLOG_SSTEP | BCMLOG_ERROR; | ||
717 | else if (!strncmp(arg, "info", 4)) | ||
718 | g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA | BCMLOG_INFO; | ||
719 | else if (!strncmp(arg, "debug", 5)) | ||
720 | g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA | BCMLOG_INFO | | ||
721 | BCMLOG_DBG; | ||
722 | else if (!strncmp(arg, "pball", 5)) | ||
723 | g_linklog_level = 0xFFFFFFFF & ~(BCMLOG_SPINLOCK); | ||
724 | else if (!strncmp(arg, "silent", 6)) | ||
725 | g_linklog_level = 0; | ||
726 | else | ||
727 | g_linklog_level = 0; | ||
728 | } | ||
729 | |||
730 | struct crystalhd_adp *chd_get_adp(void) | ||
731 | { | ||
732 | return g_adp_info; | ||
733 | } | ||
734 | |||
735 | static int __init chd_dec_module_init(void) | ||
736 | { | ||
737 | int rc; | ||
738 | |||
739 | chd_set_log_level(NULL, "debug"); | ||
740 | BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d \n", | ||
741 | crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); | ||
742 | |||
743 | rc = pci_register_driver(&bc_chd_70012_driver); | ||
744 | |||
745 | if (rc < 0) | ||
746 | BCMLOG_ERR("Could not find any devices. err:%d \n", rc); | ||
747 | |||
748 | return rc; | ||
749 | } | ||
750 | module_init(chd_dec_module_init); | ||
751 | |||
752 | static void __exit chd_dec_module_cleanup(void) | ||
753 | { | ||
754 | BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d \n", | ||
755 | crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); | ||
756 | |||
757 | pci_unregister_driver(&bc_chd_70012_driver); | ||
758 | } | ||
759 | module_exit(chd_dec_module_cleanup); | ||
760 | |||
761 | MODULE_AUTHOR("Naren Sankar <nsankar@broadcom.com>"); | ||
762 | MODULE_AUTHOR("Prasad Bolisetty <prasadb@broadcom.com>"); | ||
763 | MODULE_DESCRIPTION(CRYSTAL_HD_NAME); | ||
764 | MODULE_LICENSE("GPL"); | ||
765 | MODULE_ALIAS("bcm70012"); | ||
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.h b/drivers/staging/crystalhd/crystalhd_lnx.h new file mode 100644 index 000000000000..d338ae97a4cf --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_lnx.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_lnx . c | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70012 Linux driver | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #ifndef _CRYSTALHD_LNX_H_ | ||
28 | #define _CRYSTALHD_LNX_H_ | ||
29 | |||
30 | #include <linux/module.h> | ||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/errno.h> | ||
33 | #include <linux/string.h> | ||
34 | #include <linux/mm.h> | ||
35 | #include <linux/tty.h> | ||
36 | #include <linux/slab.h> | ||
37 | #include <linux/delay.h> | ||
38 | #include <linux/fb.h> | ||
39 | #include <linux/pci.h> | ||
40 | #include <linux/init.h> | ||
41 | #include <linux/interrupt.h> | ||
42 | #include <linux/pagemap.h> | ||
43 | #include <linux/vmalloc.h> | ||
44 | |||
45 | #include <asm/io.h> | ||
46 | #include <asm/irq.h> | ||
47 | #include <asm/pgtable.h> | ||
48 | #include <asm/system.h> | ||
49 | #include <asm/uaccess.h> | ||
50 | |||
51 | #include "crystalhd_cmds.h" | ||
52 | |||
53 | #define CRYSTAL_HD_NAME "Broadcom Crystal HD Decoder (BCM70012) Driver" | ||
54 | |||
55 | |||
56 | /* OS specific PCI information structure and adapter information. */ | ||
57 | struct crystalhd_adp { | ||
58 | /* Hardware borad/PCI specifics */ | ||
59 | char name[32]; | ||
60 | struct pci_dev *pdev; | ||
61 | |||
62 | unsigned long pci_mem_start; | ||
63 | uint32_t pci_mem_len; | ||
64 | void *addr; | ||
65 | |||
66 | unsigned long pci_i2o_start; | ||
67 | uint32_t pci_i2o_len; | ||
68 | void *i2o_addr; | ||
69 | |||
70 | unsigned int drv_data; | ||
71 | unsigned int dmabits; /* 32 | 64 */ | ||
72 | unsigned int registered; | ||
73 | unsigned int present; | ||
74 | unsigned int msi; | ||
75 | |||
76 | spinlock_t lock; | ||
77 | |||
78 | /* API Related */ | ||
79 | unsigned int chd_dec_major; | ||
80 | unsigned int cfg_users; | ||
81 | |||
82 | crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */ | ||
83 | crystalhd_elem_t *elem_pool_head; /* Queue element pool */ | ||
84 | |||
85 | struct crystalhd_cmd cmds; | ||
86 | |||
87 | crystalhd_dio_req *ua_map_free_head; | ||
88 | struct pci_pool *fill_byte_pool; | ||
89 | }; | ||
90 | |||
91 | |||
92 | struct crystalhd_adp *chd_get_adp(void); | ||
93 | void chd_set_log_level(struct crystalhd_adp *adp, char *arg); | ||
94 | |||
95 | #endif | ||
96 | |||
diff --git a/drivers/staging/crystalhd/crystalhd_misc.c b/drivers/staging/crystalhd/crystalhd_misc.c new file mode 100644 index 000000000000..587dcc477865 --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_misc.c | |||
@@ -0,0 +1,1030 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_misc . c | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70012 Linux driver misc routines. | ||
8 | * | ||
9 | * HISTORY: | ||
10 | * | ||
11 | ********************************************************************** | ||
12 | * This file is part of the crystalhd device driver. | ||
13 | * | ||
14 | * This driver is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation, version 2 of the License. | ||
17 | * | ||
18 | * This driver is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
25 | **********************************************************************/ | ||
26 | |||
27 | #include "crystalhd_misc.h" | ||
28 | #include "crystalhd_lnx.h" | ||
29 | |||
30 | uint32_t g_linklog_level; | ||
31 | |||
32 | static inline uint32_t crystalhd_dram_rd(struct crystalhd_adp *adp, uint32_t mem_off) | ||
33 | { | ||
34 | crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (mem_off >> 19)); | ||
35 | return bc_dec_reg_rd(adp, (0x00380000 | (mem_off & 0x0007FFFF))); | ||
36 | } | ||
37 | |||
38 | static inline void crystalhd_dram_wr(struct crystalhd_adp *adp, uint32_t mem_off, uint32_t val) | ||
39 | { | ||
40 | crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (mem_off >> 19)); | ||
41 | bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val); | ||
42 | } | ||
43 | |||
44 | static inline BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp, uint32_t start_off, uint32_t cnt) | ||
45 | { | ||
46 | return BC_STS_SUCCESS; | ||
47 | } | ||
48 | |||
49 | static crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp) | ||
50 | { | ||
51 | unsigned long flags = 0; | ||
52 | crystalhd_dio_req *temp = NULL; | ||
53 | |||
54 | if (!adp) { | ||
55 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
56 | return temp; | ||
57 | } | ||
58 | |||
59 | spin_lock_irqsave(&adp->lock, flags); | ||
60 | temp = adp->ua_map_free_head; | ||
61 | if (temp) | ||
62 | adp->ua_map_free_head = adp->ua_map_free_head->next; | ||
63 | spin_unlock_irqrestore(&adp->lock, flags); | ||
64 | |||
65 | return temp; | ||
66 | } | ||
67 | |||
68 | static void crystalhd_free_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) | ||
69 | { | ||
70 | unsigned long flags = 0; | ||
71 | |||
72 | if (!adp || !dio) | ||
73 | return; | ||
74 | spin_lock_irqsave(&adp->lock, flags); | ||
75 | dio->sig = crystalhd_dio_inv; | ||
76 | dio->page_cnt = 0; | ||
77 | dio->fb_size = 0; | ||
78 | memset(&dio->uinfo, 0, sizeof(dio->uinfo)); | ||
79 | dio->next = adp->ua_map_free_head; | ||
80 | adp->ua_map_free_head = dio; | ||
81 | spin_unlock_irqrestore(&adp->lock, flags); | ||
82 | } | ||
83 | |||
84 | static crystalhd_elem_t *crystalhd_alloc_elem(struct crystalhd_adp *adp) | ||
85 | { | ||
86 | unsigned long flags = 0; | ||
87 | crystalhd_elem_t *temp = NULL; | ||
88 | |||
89 | if (!adp) | ||
90 | return temp; | ||
91 | spin_lock_irqsave(&adp->lock, flags); | ||
92 | temp = adp->elem_pool_head; | ||
93 | if (temp) { | ||
94 | adp->elem_pool_head = adp->elem_pool_head->flink; | ||
95 | memset(temp, 0, sizeof(*temp)); | ||
96 | } | ||
97 | spin_unlock_irqrestore(&adp->lock, flags); | ||
98 | |||
99 | return temp; | ||
100 | } | ||
101 | static void crystalhd_free_elem(struct crystalhd_adp *adp, crystalhd_elem_t *elem) | ||
102 | { | ||
103 | unsigned long flags = 0; | ||
104 | |||
105 | if (!adp || !elem) | ||
106 | return; | ||
107 | spin_lock_irqsave(&adp->lock, flags); | ||
108 | elem->flink = adp->elem_pool_head; | ||
109 | adp->elem_pool_head = elem; | ||
110 | spin_unlock_irqrestore(&adp->lock, flags); | ||
111 | } | ||
112 | |||
113 | static inline void crystalhd_set_sg(struct scatterlist *sg, struct page *page, | ||
114 | unsigned int len, unsigned int offset) | ||
115 | { | ||
116 | sg_set_page(sg, page, len, offset); | ||
117 | #ifdef CONFIG_X86_64 | ||
118 | sg->dma_length = len; | ||
119 | #endif | ||
120 | } | ||
121 | |||
122 | static inline void crystalhd_init_sg(struct scatterlist *sg, unsigned int entries) | ||
123 | { | ||
124 | /* http://lkml.org/lkml/2007/11/27/68 */ | ||
125 | sg_init_table(sg, entries); | ||
126 | } | ||
127 | |||
128 | /*========================== Extern ========================================*/ | ||
129 | /** | ||
130 | * bc_dec_reg_rd - Read 7412's device register. | ||
131 | * @adp: Adapter instance | ||
132 | * @reg_off: Register offset. | ||
133 | * | ||
134 | * Return: | ||
135 | * 32bit value read | ||
136 | * | ||
137 | * 7412's device register read routine. This interface use | ||
138 | * 7412's device access range mapped from BAR-2 (4M) of PCIe | ||
139 | * configuration space. | ||
140 | */ | ||
141 | uint32_t bc_dec_reg_rd(struct crystalhd_adp *adp, uint32_t reg_off) | ||
142 | { | ||
143 | if (!adp || (reg_off > adp->pci_mem_len)) { | ||
144 | BCMLOG_ERR("dec_rd_reg_off outof range: 0x%08x\n", reg_off); | ||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | return readl(adp->addr + reg_off); | ||
149 | } | ||
150 | |||
151 | /** | ||
152 | * bc_dec_reg_wr - Write 7412's device register | ||
153 | * @adp: Adapter instance | ||
154 | * @reg_off: Register offset. | ||
155 | * @val: Dword value to be written. | ||
156 | * | ||
157 | * Return: | ||
158 | * none. | ||
159 | * | ||
160 | * 7412's device register write routine. This interface use | ||
161 | * 7412's device access range mapped from BAR-2 (4M) of PCIe | ||
162 | * configuration space. | ||
163 | */ | ||
164 | void bc_dec_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off, uint32_t val) | ||
165 | { | ||
166 | if (!adp || (reg_off > adp->pci_mem_len)) { | ||
167 | BCMLOG_ERR("dec_wr_reg_off outof range: 0x%08x\n", reg_off); | ||
168 | return; | ||
169 | } | ||
170 | writel(val, adp->addr + reg_off); | ||
171 | udelay(8); | ||
172 | } | ||
173 | |||
174 | /** | ||
175 | * crystalhd_reg_rd - Read Link's device register. | ||
176 | * @adp: Adapter instance | ||
177 | * @reg_off: Register offset. | ||
178 | * | ||
179 | * Return: | ||
180 | * 32bit value read | ||
181 | * | ||
182 | * Link device register read routine. This interface use | ||
183 | * Link's device access range mapped from BAR-1 (64K) of PCIe | ||
184 | * configuration space. | ||
185 | * | ||
186 | */ | ||
187 | uint32_t crystalhd_reg_rd(struct crystalhd_adp *adp, uint32_t reg_off) | ||
188 | { | ||
189 | if (!adp || (reg_off > adp->pci_i2o_len)) { | ||
190 | BCMLOG_ERR("link_rd_reg_off outof range: 0x%08x\n", reg_off); | ||
191 | return 0; | ||
192 | } | ||
193 | return readl(adp->i2o_addr + reg_off); | ||
194 | } | ||
195 | |||
196 | /** | ||
197 | * crystalhd_reg_wr - Write Link's device register | ||
198 | * @adp: Adapter instance | ||
199 | * @reg_off: Register offset. | ||
200 | * @val: Dword value to be written. | ||
201 | * | ||
202 | * Return: | ||
203 | * none. | ||
204 | * | ||
205 | * Link device register write routine. This interface use | ||
206 | * Link's device access range mapped from BAR-1 (64K) of PCIe | ||
207 | * configuration space. | ||
208 | * | ||
209 | */ | ||
210 | void crystalhd_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off, uint32_t val) | ||
211 | { | ||
212 | if (!adp || (reg_off > adp->pci_i2o_len)) { | ||
213 | BCMLOG_ERR("link_wr_reg_off outof range: 0x%08x\n", reg_off); | ||
214 | return; | ||
215 | } | ||
216 | writel(val, adp->i2o_addr + reg_off); | ||
217 | } | ||
218 | |||
219 | /** | ||
220 | * crystalhd_mem_rd - Read data from 7412's DRAM area. | ||
221 | * @adp: Adapter instance | ||
222 | * @start_off: Start offset. | ||
223 | * @dw_cnt: Count in dwords. | ||
224 | * @rd_buff: Buffer to copy the data from dram. | ||
225 | * | ||
226 | * Return: | ||
227 | * Status. | ||
228 | * | ||
229 | * 7412's Dram read routine. | ||
230 | */ | ||
231 | BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, | ||
232 | uint32_t dw_cnt, uint32_t *rd_buff) | ||
233 | { | ||
234 | uint32_t ix = 0; | ||
235 | |||
236 | if (!adp || !rd_buff || | ||
237 | (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { | ||
238 | BCMLOG_ERR("Invalid arg \n"); | ||
239 | return BC_STS_INV_ARG; | ||
240 | } | ||
241 | for (ix = 0; ix < dw_cnt; ix++) | ||
242 | rd_buff[ix] = crystalhd_dram_rd(adp, (start_off + (ix * 4))); | ||
243 | |||
244 | return BC_STS_SUCCESS; | ||
245 | } | ||
246 | |||
247 | /** | ||
248 | * crystalhd_mem_wr - Write data to 7412's DRAM area. | ||
249 | * @adp: Adapter instance | ||
250 | * @start_off: Start offset. | ||
251 | * @dw_cnt: Count in dwords. | ||
252 | * @wr_buff: Data Buffer to be written. | ||
253 | * | ||
254 | * Return: | ||
255 | * Status. | ||
256 | * | ||
257 | * 7412's Dram write routine. | ||
258 | */ | ||
259 | BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, | ||
260 | uint32_t dw_cnt, uint32_t *wr_buff) | ||
261 | { | ||
262 | uint32_t ix = 0; | ||
263 | |||
264 | if (!adp || !wr_buff || | ||
265 | (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { | ||
266 | BCMLOG_ERR("Invalid arg \n"); | ||
267 | return BC_STS_INV_ARG; | ||
268 | } | ||
269 | |||
270 | for (ix = 0; ix < dw_cnt; ix++) | ||
271 | crystalhd_dram_wr(adp, (start_off + (ix * 4)), wr_buff[ix]); | ||
272 | |||
273 | return BC_STS_SUCCESS; | ||
274 | } | ||
275 | /** | ||
276 | * crystalhd_pci_cfg_rd - PCIe config read | ||
277 | * @adp: Adapter instance | ||
278 | * @off: PCI config space offset. | ||
279 | * @len: Size -- Byte, Word & dword. | ||
280 | * @val: Value read | ||
281 | * | ||
282 | * Return: | ||
283 | * Status. | ||
284 | * | ||
285 | * Get value from Link's PCIe config space. | ||
286 | */ | ||
287 | BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, | ||
288 | uint32_t len, uint32_t *val) | ||
289 | { | ||
290 | BC_STATUS sts = BC_STS_SUCCESS; | ||
291 | int rc = 0; | ||
292 | |||
293 | if (!adp || !val) { | ||
294 | BCMLOG_ERR("Invalid arg \n"); | ||
295 | return BC_STS_INV_ARG; | ||
296 | } | ||
297 | |||
298 | switch (len) { | ||
299 | case 1: | ||
300 | rc = pci_read_config_byte(adp->pdev, off, (u8 *)val); | ||
301 | break; | ||
302 | case 2: | ||
303 | rc = pci_read_config_word(adp->pdev, off, (u16 *)val); | ||
304 | break; | ||
305 | case 4: | ||
306 | rc = pci_read_config_dword(adp->pdev, off, (u32 *)val); | ||
307 | break; | ||
308 | default: | ||
309 | rc = -EINVAL; | ||
310 | sts = BC_STS_INV_ARG; | ||
311 | BCMLOG_ERR("Invalid len:%d\n", len); | ||
312 | }; | ||
313 | |||
314 | if (rc && (sts == BC_STS_SUCCESS)) | ||
315 | sts = BC_STS_ERROR; | ||
316 | |||
317 | return sts; | ||
318 | } | ||
319 | |||
320 | /** | ||
321 | * crystalhd_pci_cfg_wr - PCIe config write | ||
322 | * @adp: Adapter instance | ||
323 | * @off: PCI config space offset. | ||
324 | * @len: Size -- Byte, Word & dword. | ||
325 | * @val: Value to be written | ||
326 | * | ||
327 | * Return: | ||
328 | * Status. | ||
329 | * | ||
330 | * Set value to Link's PCIe config space. | ||
331 | */ | ||
332 | BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off, | ||
333 | uint32_t len, uint32_t val) | ||
334 | { | ||
335 | BC_STATUS sts = BC_STS_SUCCESS; | ||
336 | int rc = 0; | ||
337 | |||
338 | if (!adp || !val) { | ||
339 | BCMLOG_ERR("Invalid arg \n"); | ||
340 | return BC_STS_INV_ARG; | ||
341 | } | ||
342 | |||
343 | switch (len) { | ||
344 | case 1: | ||
345 | rc = pci_write_config_byte(adp->pdev, off, (u8)val); | ||
346 | break; | ||
347 | case 2: | ||
348 | rc = pci_write_config_word(adp->pdev, off, (u16)val); | ||
349 | break; | ||
350 | case 4: | ||
351 | rc = pci_write_config_dword(adp->pdev, off, val); | ||
352 | break; | ||
353 | default: | ||
354 | rc = -EINVAL; | ||
355 | sts = BC_STS_INV_ARG; | ||
356 | BCMLOG_ERR("Invalid len:%d\n", len); | ||
357 | }; | ||
358 | |||
359 | if (rc && (sts == BC_STS_SUCCESS)) | ||
360 | sts = BC_STS_ERROR; | ||
361 | |||
362 | return sts; | ||
363 | } | ||
364 | |||
365 | /** | ||
366 | * bc_kern_dma_alloc - Allocate memory for Dma rings | ||
367 | * @adp: Adapter instance | ||
368 | * @sz: Size of the memory to allocate. | ||
369 | * @phy_addr: Physical address of the memory allocated. | ||
370 | * Typedef to system's dma_addr_t (u64) | ||
371 | * | ||
372 | * Return: | ||
373 | * Pointer to allocated memory.. | ||
374 | * | ||
375 | * Wrapper to Linux kernel interface. | ||
376 | * | ||
377 | */ | ||
378 | void *bc_kern_dma_alloc(struct crystalhd_adp *adp, uint32_t sz, | ||
379 | dma_addr_t *phy_addr) | ||
380 | { | ||
381 | void *temp = NULL; | ||
382 | |||
383 | if (!adp || !sz || !phy_addr) { | ||
384 | BCMLOG_ERR("Invalide Arg..\n"); | ||
385 | return temp; | ||
386 | } | ||
387 | |||
388 | temp = pci_alloc_consistent(adp->pdev, sz, phy_addr); | ||
389 | if (temp) | ||
390 | memset(temp, 0, sz); | ||
391 | |||
392 | return temp; | ||
393 | } | ||
394 | |||
395 | /** | ||
396 | * bc_kern_dma_free - Release Dma ring memory. | ||
397 | * @adp: Adapter instance | ||
398 | * @sz: Size of the memory to allocate. | ||
399 | * @ka: Kernel virtual address returned during _dio_alloc() | ||
400 | * @phy_addr: Physical address of the memory allocated. | ||
401 | * Typedef to system's dma_addr_t (u64) | ||
402 | * | ||
403 | * Return: | ||
404 | * none. | ||
405 | */ | ||
406 | void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka, | ||
407 | dma_addr_t phy_addr) | ||
408 | { | ||
409 | if (!adp || !ka || !sz || !phy_addr) { | ||
410 | BCMLOG_ERR("Invalide Arg..\n"); | ||
411 | return; | ||
412 | } | ||
413 | |||
414 | pci_free_consistent(adp->pdev, sz, ka, phy_addr); | ||
415 | } | ||
416 | |||
417 | /** | ||
418 | * crystalhd_create_dioq - Create Generic DIO queue | ||
419 | * @adp: Adapter instance | ||
420 | * @dioq_hnd: Handle to the dio queue created | ||
421 | * @cb : Optional - Call back To free the element. | ||
422 | * @cbctx: Context to pass to callback. | ||
423 | * | ||
424 | * Return: | ||
425 | * status | ||
426 | * | ||
427 | * Initialize Generic DIO queue to hold any data. Callback | ||
428 | * will be used to free elements while deleting the queue. | ||
429 | */ | ||
430 | BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, | ||
431 | crystalhd_dioq_t **dioq_hnd, | ||
432 | crystalhd_data_free_cb cb, void *cbctx) | ||
433 | { | ||
434 | crystalhd_dioq_t *dioq = NULL; | ||
435 | |||
436 | if (!adp || !dioq_hnd) { | ||
437 | BCMLOG_ERR("Invalid arg!!\n"); | ||
438 | return BC_STS_INV_ARG; | ||
439 | } | ||
440 | |||
441 | dioq = kzalloc(sizeof(*dioq), GFP_KERNEL); | ||
442 | if (!dioq) | ||
443 | return BC_STS_INSUFF_RES; | ||
444 | |||
445 | spin_lock_init(&dioq->lock); | ||
446 | dioq->sig = BC_LINK_DIOQ_SIG; | ||
447 | dioq->head = (crystalhd_elem_t *)&dioq->head; | ||
448 | dioq->tail = (crystalhd_elem_t *)&dioq->head; | ||
449 | crystalhd_create_event(&dioq->event); | ||
450 | dioq->adp = adp; | ||
451 | dioq->data_rel_cb = cb; | ||
452 | dioq->cb_context = cbctx; | ||
453 | *dioq_hnd = dioq; | ||
454 | |||
455 | return BC_STS_SUCCESS; | ||
456 | } | ||
457 | |||
458 | /** | ||
459 | * crystalhd_delete_dioq - Delete Generic DIO queue | ||
460 | * @adp: Adapter instance | ||
461 | * @dioq: DIOQ instance.. | ||
462 | * | ||
463 | * Return: | ||
464 | * None. | ||
465 | * | ||
466 | * Release Generic DIO queue. This function will remove | ||
467 | * all the entries from the Queue and will release data | ||
468 | * by calling the call back provided during creation. | ||
469 | * | ||
470 | */ | ||
471 | void crystalhd_delete_dioq(struct crystalhd_adp *adp, crystalhd_dioq_t *dioq) | ||
472 | { | ||
473 | void *temp; | ||
474 | |||
475 | if (!dioq || (dioq->sig != BC_LINK_DIOQ_SIG)) | ||
476 | return; | ||
477 | |||
478 | do { | ||
479 | temp = crystalhd_dioq_fetch(dioq); | ||
480 | if (temp && dioq->data_rel_cb) | ||
481 | dioq->data_rel_cb(dioq->cb_context, temp); | ||
482 | } while (temp); | ||
483 | dioq->sig = 0; | ||
484 | kfree(dioq); | ||
485 | } | ||
486 | |||
487 | /** | ||
488 | * crystalhd_dioq_add - Add new DIO request element. | ||
489 | * @ioq: DIO queue instance | ||
490 | * @t: DIO request to be added. | ||
491 | * @wake: True - Wake up suspended process. | ||
492 | * @tag: Special tag to assign - For search and get. | ||
493 | * | ||
494 | * Return: | ||
495 | * Status. | ||
496 | * | ||
497 | * Insert new element to Q tail. | ||
498 | */ | ||
499 | BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, | ||
500 | bool wake, uint32_t tag) | ||
501 | { | ||
502 | unsigned long flags = 0; | ||
503 | crystalhd_elem_t *tmp; | ||
504 | |||
505 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) { | ||
506 | BCMLOG_ERR("Invalid arg!!\n"); | ||
507 | return BC_STS_INV_ARG; | ||
508 | } | ||
509 | |||
510 | tmp = crystalhd_alloc_elem(ioq->adp); | ||
511 | if (!tmp) { | ||
512 | BCMLOG_ERR("No free elements.\n"); | ||
513 | return BC_STS_INSUFF_RES; | ||
514 | } | ||
515 | |||
516 | tmp->data = data; | ||
517 | tmp->tag = tag; | ||
518 | spin_lock_irqsave(&ioq->lock, flags); | ||
519 | tmp->flink = (crystalhd_elem_t *)&ioq->head; | ||
520 | tmp->blink = ioq->tail; | ||
521 | tmp->flink->blink = tmp; | ||
522 | tmp->blink->flink = tmp; | ||
523 | ioq->count++; | ||
524 | spin_unlock_irqrestore(&ioq->lock, flags); | ||
525 | |||
526 | if (wake) | ||
527 | crystalhd_set_event(&ioq->event); | ||
528 | |||
529 | return BC_STS_SUCCESS; | ||
530 | } | ||
531 | |||
532 | /** | ||
533 | * crystalhd_dioq_fetch - Fetch element from head. | ||
534 | * @ioq: DIO queue instance | ||
535 | * | ||
536 | * Return: | ||
537 | * data element from the head.. | ||
538 | * | ||
539 | * Remove an element from Queue. | ||
540 | */ | ||
541 | void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq) | ||
542 | { | ||
543 | unsigned long flags = 0; | ||
544 | crystalhd_elem_t *tmp; | ||
545 | crystalhd_elem_t *ret = NULL; | ||
546 | void *data = NULL; | ||
547 | |||
548 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { | ||
549 | BCMLOG_ERR("Invalid arg!!\n"); | ||
550 | return data; | ||
551 | } | ||
552 | |||
553 | spin_lock_irqsave(&ioq->lock, flags); | ||
554 | tmp = ioq->head; | ||
555 | if (tmp != (crystalhd_elem_t *)&ioq->head) { | ||
556 | ret = tmp; | ||
557 | tmp->flink->blink = tmp->blink; | ||
558 | tmp->blink->flink = tmp->flink; | ||
559 | ioq->count--; | ||
560 | } | ||
561 | spin_unlock_irqrestore(&ioq->lock, flags); | ||
562 | if (ret) { | ||
563 | data = ret->data; | ||
564 | crystalhd_free_elem(ioq->adp, ret); | ||
565 | } | ||
566 | |||
567 | return data; | ||
568 | } | ||
569 | /** | ||
570 | * crystalhd_dioq_find_and_fetch - Search the tag and Fetch element | ||
571 | * @ioq: DIO queue instance | ||
572 | * @tag: Tag to search for. | ||
573 | * | ||
574 | * Return: | ||
575 | * element from the head.. | ||
576 | * | ||
577 | * Search TAG and remove the element. | ||
578 | */ | ||
579 | void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag) | ||
580 | { | ||
581 | unsigned long flags = 0; | ||
582 | crystalhd_elem_t *tmp; | ||
583 | crystalhd_elem_t *ret = NULL; | ||
584 | void *data = NULL; | ||
585 | |||
586 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { | ||
587 | BCMLOG_ERR("Invalid arg!!\n"); | ||
588 | return data; | ||
589 | } | ||
590 | |||
591 | spin_lock_irqsave(&ioq->lock, flags); | ||
592 | tmp = ioq->head; | ||
593 | while (tmp != (crystalhd_elem_t *)&ioq->head) { | ||
594 | if (tmp->tag == tag) { | ||
595 | ret = tmp; | ||
596 | tmp->flink->blink = tmp->blink; | ||
597 | tmp->blink->flink = tmp->flink; | ||
598 | ioq->count--; | ||
599 | break; | ||
600 | } | ||
601 | tmp = tmp->flink; | ||
602 | } | ||
603 | spin_unlock_irqrestore(&ioq->lock, flags); | ||
604 | |||
605 | if (ret) { | ||
606 | data = ret->data; | ||
607 | crystalhd_free_elem(ioq->adp, ret); | ||
608 | } | ||
609 | |||
610 | return data; | ||
611 | } | ||
612 | |||
613 | /** | ||
614 | * crystalhd_dioq_fetch_wait - Fetch element from Head. | ||
615 | * @ioq: DIO queue instance | ||
616 | * @to_secs: Wait timeout in seconds.. | ||
617 | * | ||
618 | * Return: | ||
619 | * element from the head.. | ||
620 | * | ||
621 | * Return element from head if Q is not empty. Wait for new element | ||
622 | * if Q is empty for Timeout seconds. | ||
623 | */ | ||
624 | void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, | ||
625 | uint32_t *sig_pend) | ||
626 | { | ||
627 | unsigned long flags = 0; | ||
628 | int rc = 0, count; | ||
629 | void *tmp = NULL; | ||
630 | |||
631 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !to_secs || !sig_pend) { | ||
632 | BCMLOG_ERR("Invalid arg!!\n"); | ||
633 | return tmp; | ||
634 | } | ||
635 | |||
636 | count = to_secs; | ||
637 | spin_lock_irqsave(&ioq->lock, flags); | ||
638 | while ((ioq->count == 0) && count) { | ||
639 | spin_unlock_irqrestore(&ioq->lock, flags); | ||
640 | |||
641 | crystalhd_wait_on_event(&ioq->event, (ioq->count > 0), 1000, rc, 0); | ||
642 | if (rc == 0) { | ||
643 | goto out; | ||
644 | } else if (rc == -EINTR) { | ||
645 | BCMLOG(BCMLOG_INFO, "Cancelling fetch wait\n"); | ||
646 | *sig_pend = 1; | ||
647 | return tmp; | ||
648 | } | ||
649 | spin_lock_irqsave(&ioq->lock, flags); | ||
650 | count--; | ||
651 | } | ||
652 | spin_unlock_irqrestore(&ioq->lock, flags); | ||
653 | |||
654 | out: | ||
655 | return crystalhd_dioq_fetch(ioq); | ||
656 | } | ||
657 | |||
658 | /** | ||
659 | * crystalhd_map_dio - Map user address for DMA | ||
660 | * @adp: Adapter instance | ||
661 | * @ubuff: User buffer to map. | ||
662 | * @ubuff_sz: User buffer size. | ||
663 | * @uv_offset: UV buffer offset. | ||
664 | * @en_422mode: TRUE:422 FALSE:420 Capture mode. | ||
665 | * @dir_tx: TRUE for Tx (To device from host) | ||
666 | * @dio_hnd: Handle to mapped DIO request. | ||
667 | * | ||
668 | * Return: | ||
669 | * Status. | ||
670 | * | ||
671 | * This routine maps user address and lock pages for DMA. | ||
672 | * | ||
673 | */ | ||
674 | BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, | ||
675 | uint32_t ubuff_sz, uint32_t uv_offset, | ||
676 | bool en_422mode, bool dir_tx, | ||
677 | crystalhd_dio_req **dio_hnd) | ||
678 | { | ||
679 | crystalhd_dio_req *dio; | ||
680 | /* FIXME: jarod: should some of these unsigned longs be uint32_t or uintptr_t? */ | ||
681 | unsigned long start = 0, end = 0, uaddr = 0, count = 0; | ||
682 | unsigned long spsz = 0, uv_start = 0; | ||
683 | int i = 0, rw = 0, res = 0, nr_pages = 0, skip_fb_sg = 0; | ||
684 | |||
685 | if (!adp || !ubuff || !ubuff_sz || !dio_hnd) { | ||
686 | BCMLOG_ERR("Invalid arg \n"); | ||
687 | return BC_STS_INV_ARG; | ||
688 | } | ||
689 | /* Compute pages */ | ||
690 | uaddr = (unsigned long)ubuff; | ||
691 | count = (unsigned long)ubuff_sz; | ||
692 | end = (uaddr + count + PAGE_SIZE - 1) >> PAGE_SHIFT; | ||
693 | start = uaddr >> PAGE_SHIFT; | ||
694 | nr_pages = end - start; | ||
695 | |||
696 | if (!count || ((uaddr + count) < uaddr)) { | ||
697 | BCMLOG_ERR("User addr overflow!!\n"); | ||
698 | return BC_STS_INV_ARG; | ||
699 | } | ||
700 | |||
701 | dio = crystalhd_alloc_dio(adp); | ||
702 | if (!dio) { | ||
703 | BCMLOG_ERR("dio pool empty..\n"); | ||
704 | return BC_STS_INSUFF_RES; | ||
705 | } | ||
706 | |||
707 | if (dir_tx) { | ||
708 | rw = WRITE; | ||
709 | dio->direction = DMA_TO_DEVICE; | ||
710 | } else { | ||
711 | rw = READ; | ||
712 | dio->direction = DMA_FROM_DEVICE; | ||
713 | } | ||
714 | |||
715 | if (nr_pages > dio->max_pages) { | ||
716 | BCMLOG_ERR("max_pages(%d) exceeded(%d)!!\n", | ||
717 | dio->max_pages, nr_pages); | ||
718 | crystalhd_unmap_dio(adp, dio); | ||
719 | return BC_STS_INSUFF_RES; | ||
720 | } | ||
721 | |||
722 | if (uv_offset) { | ||
723 | uv_start = (uaddr + (unsigned long)uv_offset) >> PAGE_SHIFT; | ||
724 | dio->uinfo.uv_sg_ix = uv_start - start; | ||
725 | dio->uinfo.uv_sg_off = ((uaddr + (unsigned long)uv_offset) & ~PAGE_MASK); | ||
726 | } | ||
727 | |||
728 | dio->fb_size = ubuff_sz & 0x03; | ||
729 | if (dio->fb_size) { | ||
730 | res = copy_from_user(dio->fb_va, | ||
731 | (void *)(uaddr + count - dio->fb_size), | ||
732 | dio->fb_size); | ||
733 | if (res) { | ||
734 | BCMLOG_ERR("failed %d to copy %u fill bytes from %p\n", | ||
735 | res, dio->fb_size, | ||
736 | (void *)(uaddr + count-dio->fb_size)); | ||
737 | crystalhd_unmap_dio(adp, dio); | ||
738 | return BC_STS_INSUFF_RES; | ||
739 | } | ||
740 | } | ||
741 | |||
742 | down_read(¤t->mm->mmap_sem); | ||
743 | res = get_user_pages(current, current->mm, uaddr, nr_pages, rw == READ, | ||
744 | 0, dio->pages, NULL); | ||
745 | up_read(¤t->mm->mmap_sem); | ||
746 | |||
747 | /* Save for release..*/ | ||
748 | dio->sig = crystalhd_dio_locked; | ||
749 | if (res < nr_pages) { | ||
750 | BCMLOG_ERR("get pages failed: %d-%d\n", nr_pages, res); | ||
751 | dio->page_cnt = res; | ||
752 | crystalhd_unmap_dio(adp, dio); | ||
753 | return BC_STS_ERROR; | ||
754 | } | ||
755 | |||
756 | dio->page_cnt = nr_pages; | ||
757 | /* Get scatter/gather */ | ||
758 | crystalhd_init_sg(dio->sg, dio->page_cnt); | ||
759 | crystalhd_set_sg(&dio->sg[0], dio->pages[0], 0, uaddr & ~PAGE_MASK); | ||
760 | if (nr_pages > 1) { | ||
761 | dio->sg[0].length = PAGE_SIZE - dio->sg[0].offset; | ||
762 | |||
763 | #ifdef CONFIG_X86_64 | ||
764 | dio->sg[0].dma_length = dio->sg[0].length; | ||
765 | #endif | ||
766 | count -= dio->sg[0].length; | ||
767 | for (i = 1; i < nr_pages; i++) { | ||
768 | if (count < 4) { | ||
769 | spsz = count; | ||
770 | skip_fb_sg = 1; | ||
771 | } else { | ||
772 | spsz = (count < PAGE_SIZE) ? | ||
773 | (count & ~0x03) : PAGE_SIZE; | ||
774 | } | ||
775 | crystalhd_set_sg(&dio->sg[i], dio->pages[i], spsz, 0); | ||
776 | count -= spsz; | ||
777 | } | ||
778 | } else { | ||
779 | if (count < 4) { | ||
780 | dio->sg[0].length = count; | ||
781 | skip_fb_sg = 1; | ||
782 | } else { | ||
783 | dio->sg[0].length = count - dio->fb_size; | ||
784 | } | ||
785 | #ifdef CONFIG_X86_64 | ||
786 | dio->sg[0].dma_length = dio->sg[0].length; | ||
787 | #endif | ||
788 | } | ||
789 | dio->sg_cnt = pci_map_sg(adp->pdev, dio->sg, | ||
790 | dio->page_cnt, dio->direction); | ||
791 | if (dio->sg_cnt <= 0) { | ||
792 | BCMLOG_ERR("sg map %d-%d \n", dio->sg_cnt, dio->page_cnt); | ||
793 | crystalhd_unmap_dio(adp, dio); | ||
794 | return BC_STS_ERROR; | ||
795 | } | ||
796 | if (dio->sg_cnt && skip_fb_sg) | ||
797 | dio->sg_cnt -= 1; | ||
798 | dio->sig = crystalhd_dio_sg_mapped; | ||
799 | /* Fill in User info.. */ | ||
800 | dio->uinfo.xfr_len = ubuff_sz; | ||
801 | dio->uinfo.xfr_buff = ubuff; | ||
802 | dio->uinfo.uv_offset = uv_offset; | ||
803 | dio->uinfo.b422mode = en_422mode; | ||
804 | dio->uinfo.dir_tx = dir_tx; | ||
805 | |||
806 | *dio_hnd = dio; | ||
807 | |||
808 | return BC_STS_SUCCESS; | ||
809 | } | ||
810 | |||
811 | /** | ||
812 | * crystalhd_unmap_sgl - Release mapped resources | ||
813 | * @adp: Adapter instance | ||
814 | * @dio: DIO request instance | ||
815 | * | ||
816 | * Return: | ||
817 | * Status. | ||
818 | * | ||
819 | * This routine is to unmap the user buffer pages. | ||
820 | */ | ||
821 | BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) | ||
822 | { | ||
823 | struct page *page = NULL; | ||
824 | int j = 0; | ||
825 | |||
826 | if (!adp || !dio) { | ||
827 | BCMLOG_ERR("Invalid arg \n"); | ||
828 | return BC_STS_INV_ARG; | ||
829 | } | ||
830 | |||
831 | if ((dio->page_cnt > 0) && (dio->sig != crystalhd_dio_inv)) { | ||
832 | for (j = 0; j < dio->page_cnt; j++) { | ||
833 | page = dio->pages[j]; | ||
834 | if (page) { | ||
835 | if (!PageReserved(page) && | ||
836 | (dio->direction == DMA_FROM_DEVICE)) | ||
837 | SetPageDirty(page); | ||
838 | page_cache_release(page); | ||
839 | } | ||
840 | } | ||
841 | } | ||
842 | if (dio->sig == crystalhd_dio_sg_mapped) | ||
843 | pci_unmap_sg(adp->pdev, dio->sg, dio->page_cnt, dio->direction); | ||
844 | |||
845 | crystalhd_free_dio(adp, dio); | ||
846 | |||
847 | return BC_STS_SUCCESS; | ||
848 | } | ||
849 | |||
850 | /** | ||
851 | * crystalhd_create_dio_pool - Allocate mem pool for DIO management. | ||
852 | * @adp: Adapter instance | ||
853 | * @max_pages: Max pages for size calculation. | ||
854 | * | ||
855 | * Return: | ||
856 | * system error. | ||
857 | * | ||
858 | * This routine creates a memory pool to hold dio context for | ||
859 | * for HW Direct IO operation. | ||
860 | */ | ||
861 | int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages) | ||
862 | { | ||
863 | uint32_t asz = 0, i = 0; | ||
864 | uint8_t *temp; | ||
865 | crystalhd_dio_req *dio; | ||
866 | |||
867 | if (!adp || !max_pages) { | ||
868 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
869 | return -EINVAL; | ||
870 | } | ||
871 | |||
872 | /* Get dma memory for fill byte handling..*/ | ||
873 | adp->fill_byte_pool = pci_pool_create("crystalhd_fbyte", | ||
874 | adp->pdev, 8, 8, 0); | ||
875 | if (!adp->fill_byte_pool) { | ||
876 | BCMLOG_ERR("failed to create fill byte pool\n"); | ||
877 | return -ENOMEM; | ||
878 | } | ||
879 | |||
880 | /* Get the max size from user based on 420/422 modes */ | ||
881 | asz = (sizeof(*dio->pages) * max_pages) + | ||
882 | (sizeof(*dio->sg) * max_pages) + sizeof(*dio); | ||
883 | |||
884 | BCMLOG(BCMLOG_DBG, "Initializing Dio pool %d %d %x %p\n", | ||
885 | BC_LINK_SG_POOL_SZ, max_pages, asz, adp->fill_byte_pool); | ||
886 | |||
887 | for (i = 0; i < BC_LINK_SG_POOL_SZ; i++) { | ||
888 | temp = (uint8_t *)kzalloc(asz, GFP_KERNEL); | ||
889 | if ((temp) == NULL) { | ||
890 | BCMLOG_ERR("Failed to alloc %d mem\n", asz); | ||
891 | return -ENOMEM; | ||
892 | } | ||
893 | |||
894 | dio = (crystalhd_dio_req *)temp; | ||
895 | temp += sizeof(*dio); | ||
896 | dio->pages = (struct page **)temp; | ||
897 | temp += (sizeof(*dio->pages) * max_pages); | ||
898 | dio->sg = (struct scatterlist *)temp; | ||
899 | dio->max_pages = max_pages; | ||
900 | dio->fb_va = pci_pool_alloc(adp->fill_byte_pool, GFP_KERNEL, | ||
901 | &dio->fb_pa); | ||
902 | if (!dio->fb_va) { | ||
903 | BCMLOG_ERR("fill byte alloc failed.\n"); | ||
904 | return -ENOMEM; | ||
905 | } | ||
906 | |||
907 | crystalhd_free_dio(adp, dio); | ||
908 | } | ||
909 | |||
910 | return 0; | ||
911 | } | ||
912 | |||
913 | /** | ||
914 | * crystalhd_destroy_dio_pool - Release DIO mem pool. | ||
915 | * @adp: Adapter instance | ||
916 | * | ||
917 | * Return: | ||
918 | * none. | ||
919 | * | ||
920 | * This routine releases dio memory pool during close. | ||
921 | */ | ||
922 | void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp) | ||
923 | { | ||
924 | crystalhd_dio_req *dio; | ||
925 | int count = 0; | ||
926 | |||
927 | if (!adp) { | ||
928 | BCMLOG_ERR("Invalid Arg!!\n"); | ||
929 | return; | ||
930 | } | ||
931 | |||
932 | do { | ||
933 | dio = crystalhd_alloc_dio(adp); | ||
934 | if (dio) { | ||
935 | if (dio->fb_va) | ||
936 | pci_pool_free(adp->fill_byte_pool, | ||
937 | dio->fb_va, dio->fb_pa); | ||
938 | count++; | ||
939 | kfree(dio); | ||
940 | } | ||
941 | } while (dio); | ||
942 | |||
943 | if (adp->fill_byte_pool) { | ||
944 | pci_pool_destroy(adp->fill_byte_pool); | ||
945 | adp->fill_byte_pool = NULL; | ||
946 | } | ||
947 | |||
948 | BCMLOG(BCMLOG_DBG, "Released dio pool %d \n", count); | ||
949 | } | ||
950 | |||
951 | /** | ||
952 | * crystalhd_create_elem_pool - List element pool creation. | ||
953 | * @adp: Adapter instance | ||
954 | * @pool_size: Number of elements in the pool. | ||
955 | * | ||
956 | * Return: | ||
957 | * 0 - success, <0 error | ||
958 | * | ||
959 | * Create general purpose list element pool to hold pending, | ||
960 | * and active requests. | ||
961 | */ | ||
962 | int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp, | ||
963 | uint32_t pool_size) | ||
964 | { | ||
965 | uint32_t i; | ||
966 | crystalhd_elem_t *temp; | ||
967 | |||
968 | if (!adp || !pool_size) | ||
969 | return -EINVAL; | ||
970 | |||
971 | for (i = 0; i < pool_size; i++) { | ||
972 | temp = kzalloc(sizeof(*temp), GFP_KERNEL); | ||
973 | if (!temp) { | ||
974 | BCMLOG_ERR("kalloc failed \n"); | ||
975 | return -ENOMEM; | ||
976 | } | ||
977 | crystalhd_free_elem(adp, temp); | ||
978 | } | ||
979 | BCMLOG(BCMLOG_DBG, "allocated %d elem\n", pool_size); | ||
980 | return 0; | ||
981 | } | ||
982 | |||
983 | /** | ||
984 | * crystalhd_delete_elem_pool - List element pool deletion. | ||
985 | * @adp: Adapter instance | ||
986 | * | ||
987 | * Return: | ||
988 | * none | ||
989 | * | ||
990 | * Delete general purpose list element pool. | ||
991 | */ | ||
992 | void crystalhd_delete_elem_pool(struct crystalhd_adp *adp) | ||
993 | { | ||
994 | crystalhd_elem_t *temp; | ||
995 | int dbg_cnt = 0; | ||
996 | |||
997 | if (!adp) | ||
998 | return; | ||
999 | |||
1000 | do { | ||
1001 | temp = crystalhd_alloc_elem(adp); | ||
1002 | if (temp) { | ||
1003 | kfree(temp); | ||
1004 | dbg_cnt++; | ||
1005 | } | ||
1006 | } while (temp); | ||
1007 | |||
1008 | BCMLOG(BCMLOG_DBG, "released %d elem\n", dbg_cnt); | ||
1009 | } | ||
1010 | |||
1011 | /*================ Debug support routines.. ================================*/ | ||
1012 | void crystalhd_show_buffer(uint32_t off, uint8_t *buff, uint32_t dwcount) | ||
1013 | { | ||
1014 | uint32_t i, k = 1; | ||
1015 | |||
1016 | for (i = 0; i < dwcount; i++) { | ||
1017 | if (k == 1) | ||
1018 | BCMLOG(BCMLOG_DATA, "0x%08X : ", off); | ||
1019 | |||
1020 | BCMLOG(BCMLOG_DATA, " 0x%08X ", *((uint32_t *)buff)); | ||
1021 | |||
1022 | buff += sizeof(uint32_t); | ||
1023 | off += sizeof(uint32_t); | ||
1024 | k++; | ||
1025 | if ((i == dwcount - 1) || (k > 4)) { | ||
1026 | BCMLOG(BCMLOG_DATA, "\n"); | ||
1027 | k = 1; | ||
1028 | } | ||
1029 | } | ||
1030 | } | ||
diff --git a/drivers/staging/crystalhd/crystalhd_misc.h b/drivers/staging/crystalhd/crystalhd_misc.h new file mode 100644 index 000000000000..a2aa6ad7fc81 --- /dev/null +++ b/drivers/staging/crystalhd/crystalhd_misc.h | |||
@@ -0,0 +1,229 @@ | |||
1 | /*************************************************************************** | ||
2 | * Copyright (c) 2005-2009, Broadcom Corporation. | ||
3 | * | ||
4 | * Name: crystalhd_misc . h | ||
5 | * | ||
6 | * Description: | ||
7 | * BCM70012 Linux driver general purpose routines. | ||
8 | * Includes reg/mem read and write routines. | ||
9 | * | ||
10 | * HISTORY: | ||
11 | * | ||
12 | ********************************************************************** | ||
13 | * This file is part of the crystalhd device driver. | ||
14 | * | ||
15 | * This driver is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License as published by | ||
17 | * the Free Software Foundation, version 2 of the License. | ||
18 | * | ||
19 | * This driver is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this driver. If not, see <http://www.gnu.org/licenses/>. | ||
26 | **********************************************************************/ | ||
27 | |||
28 | #ifndef _CRYSTALHD_MISC_H_ | ||
29 | #define _CRYSTALHD_MISC_H_ | ||
30 | |||
31 | #include <linux/module.h> | ||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/errno.h> | ||
34 | #include <linux/string.h> | ||
35 | #include <linux/ioctl.h> | ||
36 | #include <linux/dma-mapping.h> | ||
37 | #include <linux/version.h> | ||
38 | #include <linux/sched.h> | ||
39 | #include <asm/system.h> | ||
40 | #include "bc_dts_glob_lnx.h" | ||
41 | |||
42 | /* Global log level variable defined in crystal_misc.c file */ | ||
43 | extern uint32_t g_linklog_level; | ||
44 | |||
45 | /* Global element pool for all Queue management. | ||
46 | * TX: Active = BC_TX_LIST_CNT, Free = BC_TX_LIST_CNT. | ||
47 | * RX: Free = BC_RX_LIST_CNT, Active = 2 | ||
48 | * FW-CMD: 4 | ||
49 | */ | ||
50 | #define BC_LINK_ELEM_POOL_SZ ((BC_TX_LIST_CNT * 2) + BC_RX_LIST_CNT + 2 + 4) | ||
51 | |||
52 | /* Driver's IODATA pool count */ | ||
53 | #define CHD_IODATA_POOL_SZ (BC_IOCTL_DATA_POOL_SIZE * BC_LINK_MAX_OPENS) | ||
54 | |||
55 | /* Scatter Gather memory pool size for Tx and Rx */ | ||
56 | #define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT) | ||
57 | |||
58 | enum _crystalhd_dio_sig { | ||
59 | crystalhd_dio_inv = 0, | ||
60 | crystalhd_dio_locked, | ||
61 | crystalhd_dio_sg_mapped, | ||
62 | }; | ||
63 | |||
64 | struct crystalhd_dio_user_info { | ||
65 | void *xfr_buff; | ||
66 | uint32_t xfr_len; | ||
67 | uint32_t uv_offset; | ||
68 | bool dir_tx; | ||
69 | |||
70 | uint32_t uv_sg_ix; | ||
71 | uint32_t uv_sg_off; | ||
72 | int comp_sts; | ||
73 | int ev_sts; | ||
74 | uint32_t y_done_sz; | ||
75 | uint32_t uv_done_sz; | ||
76 | uint32_t comp_flags; | ||
77 | bool b422mode; | ||
78 | }; | ||
79 | |||
80 | typedef struct _crystalhd_dio_req { | ||
81 | uint32_t sig; | ||
82 | uint32_t max_pages; | ||
83 | struct page **pages; | ||
84 | struct scatterlist *sg; | ||
85 | int sg_cnt; | ||
86 | int page_cnt; | ||
87 | int direction; | ||
88 | struct crystalhd_dio_user_info uinfo; | ||
89 | void *fb_va; | ||
90 | uint32_t fb_size; | ||
91 | dma_addr_t fb_pa; | ||
92 | struct _crystalhd_dio_req *next; | ||
93 | } crystalhd_dio_req; | ||
94 | |||
95 | #define BC_LINK_DIOQ_SIG (0x09223280) | ||
96 | |||
97 | typedef struct _crystalhd_elem_s { | ||
98 | struct _crystalhd_elem_s *flink; | ||
99 | struct _crystalhd_elem_s *blink; | ||
100 | void *data; | ||
101 | uint32_t tag; | ||
102 | } crystalhd_elem_t; | ||
103 | |||
104 | typedef void (*crystalhd_data_free_cb)(void *context, void *data); | ||
105 | |||
106 | typedef struct _crystalhd_dioq_s { | ||
107 | uint32_t sig; | ||
108 | struct crystalhd_adp *adp; | ||
109 | crystalhd_elem_t *head; | ||
110 | crystalhd_elem_t *tail; | ||
111 | uint32_t count; | ||
112 | spinlock_t lock; | ||
113 | wait_queue_head_t event; | ||
114 | crystalhd_data_free_cb data_rel_cb; | ||
115 | void *cb_context; | ||
116 | } crystalhd_dioq_t; | ||
117 | |||
118 | typedef void (*hw_comp_callback)(crystalhd_dio_req *, | ||
119 | wait_queue_head_t *event, BC_STATUS sts); | ||
120 | |||
121 | /*========= Decoder (7412) register access routines.================= */ | ||
122 | uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t); | ||
123 | void bc_dec_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t); | ||
124 | |||
125 | /*========= Link (70012) register access routines.. =================*/ | ||
126 | uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t); | ||
127 | void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t); | ||
128 | |||
129 | /*========= Decoder (7412) memory access routines..=================*/ | ||
130 | BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | ||
131 | BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | ||
132 | |||
133 | /*==========Link (70012) PCIe Config access routines.================*/ | ||
134 | BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | ||
135 | BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t); | ||
136 | |||
137 | /*========= Linux Kernel Interface routines. ======================= */ | ||
138 | void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *); | ||
139 | void bc_kern_dma_free(struct crystalhd_adp *, uint32_t, | ||
140 | void *, dma_addr_t); | ||
141 | #define crystalhd_create_event(_ev) init_waitqueue_head(_ev) | ||
142 | #define crystalhd_set_event(_ev) wake_up_interruptible(_ev) | ||
143 | #define crystalhd_wait_on_event(ev, condition, timeout, ret, nosig) \ | ||
144 | do { \ | ||
145 | DECLARE_WAITQUEUE(entry, current); \ | ||
146 | unsigned long end = jiffies + ((timeout * HZ) / 1000); \ | ||
147 | ret = 0; \ | ||
148 | add_wait_queue(ev, &entry); \ | ||
149 | for (;;) { \ | ||
150 | __set_current_state(TASK_INTERRUPTIBLE); \ | ||
151 | if (condition) { \ | ||
152 | break; \ | ||
153 | } \ | ||
154 | if (time_after_eq(jiffies, end)) { \ | ||
155 | ret = -EBUSY; \ | ||
156 | break; \ | ||
157 | } \ | ||
158 | schedule_timeout((HZ / 100 > 1) ? HZ / 100 : 1); \ | ||
159 | if (!nosig && signal_pending(current)) { \ | ||
160 | ret = -EINTR; \ | ||
161 | break; \ | ||
162 | } \ | ||
163 | } \ | ||
164 | __set_current_state(TASK_RUNNING); \ | ||
165 | remove_wait_queue(ev, &entry); \ | ||
166 | } while (0) | ||
167 | |||
168 | /*================ Direct IO mapping routines ==================*/ | ||
169 | extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t); | ||
170 | extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *); | ||
171 | extern BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t, | ||
172 | uint32_t, bool, bool, crystalhd_dio_req**); | ||
173 | |||
174 | extern BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, crystalhd_dio_req*); | ||
175 | #define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix]))) | ||
176 | #define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix]))) | ||
177 | |||
178 | /*================ General Purpose Queues ==================*/ | ||
179 | extern BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, crystalhd_dioq_t **, crystalhd_data_free_cb , void *); | ||
180 | extern void crystalhd_delete_dioq(struct crystalhd_adp *, crystalhd_dioq_t *); | ||
181 | extern BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, bool wake, uint32_t tag); | ||
182 | extern void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq); | ||
183 | extern void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag); | ||
184 | extern void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, uint32_t *sig_pend); | ||
185 | |||
186 | #define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0) | ||
187 | |||
188 | extern int crystalhd_create_elem_pool(struct crystalhd_adp *, uint32_t); | ||
189 | extern void crystalhd_delete_elem_pool(struct crystalhd_adp *); | ||
190 | |||
191 | |||
192 | /*================ Debug routines/macros .. ================================*/ | ||
193 | extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff, uint32_t dwcount); | ||
194 | |||
195 | enum _chd_log_levels { | ||
196 | BCMLOG_ERROR = 0x80000000, /* Don't disable this option */ | ||
197 | BCMLOG_DATA = 0x40000000, /* Data, enable by default */ | ||
198 | BCMLOG_SPINLOCK = 0x20000000, /* Spcial case for Spin locks*/ | ||
199 | |||
200 | /* Following are allowed only in debug mode */ | ||
201 | BCMLOG_INFO = 0x00000001, /* Generic informational */ | ||
202 | BCMLOG_DBG = 0x00000002, /* First level Debug info */ | ||
203 | BCMLOG_SSTEP = 0x00000004, /* Stepping information */ | ||
204 | BCMLOG_ENTER_LEAVE = 0x00000008, /* stack tracking */ | ||
205 | }; | ||
206 | |||
207 | #define BCMLOG_ENTER \ | ||
208 | if (g_linklog_level & BCMLOG_ENTER_LEAVE) { \ | ||
209 | printk("Entered %s\n", __func__); \ | ||
210 | } | ||
211 | |||
212 | #define BCMLOG_LEAVE \ | ||
213 | if (g_linklog_level & BCMLOG_ENTER_LEAVE) { \ | ||
214 | printk("Leaving %s\n", __func__); \ | ||
215 | } | ||
216 | |||
217 | #define BCMLOG(trace, fmt, args...) \ | ||
218 | if (g_linklog_level & trace) { \ | ||
219 | printk(fmt, ##args); \ | ||
220 | } | ||
221 | |||
222 | #define BCMLOG_ERR(fmt, args...) \ | ||
223 | do { \ | ||
224 | if (g_linklog_level & BCMLOG_ERROR) { \ | ||
225 | printk("*ERR*:%s:%d: "fmt, __FILE__, __LINE__, ##args); \ | ||
226 | } \ | ||
227 | } while (0); | ||
228 | |||
229 | #endif | ||
diff --git a/drivers/staging/cx25821/cx25821-audups11.c b/drivers/staging/cx25821/cx25821-audups11.c index 89c8fe2997fa..46c7f78bb972 100644 --- a/drivers/staging/cx25821/cx25821-audups11.c +++ b/drivers/staging/cx25821/cx25821-audups11.c | |||
@@ -343,10 +343,11 @@ static int vidioc_s_ctrl(struct file *file, void *priv, | |||
343 | struct v4l2_control *ctl) | 343 | struct v4l2_control *ctl) |
344 | { | 344 | { |
345 | struct cx25821_fh *fh = priv; | 345 | struct cx25821_fh *fh = priv; |
346 | struct cx25821_dev *dev = fh->dev; | 346 | struct cx25821_dev *dev; |
347 | int err; | 347 | int err; |
348 | 348 | ||
349 | if (fh) { | 349 | if (fh) { |
350 | dev = fh->dev; | ||
350 | err = v4l2_prio_check(&dev->prio, &fh->prio); | 351 | err = v4l2_prio_check(&dev->prio, &fh->prio); |
351 | if (0 != err) | 352 | if (0 != err) |
352 | return err; | 353 | return err; |
diff --git a/drivers/staging/cx25821/cx25821-medusa-video.c b/drivers/staging/cx25821/cx25821-medusa-video.c index 1eb079b3d429..d6016200d699 100644 --- a/drivers/staging/cx25821/cx25821-medusa-video.c +++ b/drivers/staging/cx25821/cx25821-medusa-video.c | |||
@@ -795,10 +795,8 @@ int medusa_video_init(struct cx25821_dev *dev) | |||
795 | value &= 0xFFFFFFDF; | 795 | value &= 0xFFFFFFDF; |
796 | ret_val = cx25821_i2c_write(&dev->i2c_bus[0], MON_A_CTRL, value); | 796 | ret_val = cx25821_i2c_write(&dev->i2c_bus[0], MON_A_CTRL, value); |
797 | 797 | ||
798 | if (ret_val < 0) { | 798 | if (ret_val < 0) |
799 | mutex_unlock(&dev->lock); | ||
800 | return -EINVAL; | 799 | return -EINVAL; |
801 | } | ||
802 | 800 | ||
803 | mutex_unlock(&dev->lock); | 801 | mutex_unlock(&dev->lock); |
804 | 802 | ||
diff --git a/drivers/staging/cx25821/cx25821-video.c b/drivers/staging/cx25821/cx25821-video.c index c7c14c7698a7..8cd3986d2e5c 100644 --- a/drivers/staging/cx25821/cx25821-video.c +++ b/drivers/staging/cx25821/cx25821-video.c | |||
@@ -876,7 +876,7 @@ int cx25821_enum_input(struct cx25821_dev *dev, struct v4l2_input *i) | |||
876 | dprintk(1, "%s()\n", __func__); | 876 | dprintk(1, "%s()\n", __func__); |
877 | 877 | ||
878 | n = i->index; | 878 | n = i->index; |
879 | if (n > 2) | 879 | if (n >= 2) |
880 | return -EINVAL; | 880 | return -EINVAL; |
881 | 881 | ||
882 | if (0 == INPUT(n)->type) | 882 | if (0 == INPUT(n)->type) |
@@ -963,10 +963,11 @@ int cx25821_set_freq(struct cx25821_dev *dev, struct v4l2_frequency *f) | |||
963 | int vidioc_s_frequency(struct file *file, void *priv, struct v4l2_frequency *f) | 963 | int vidioc_s_frequency(struct file *file, void *priv, struct v4l2_frequency *f) |
964 | { | 964 | { |
965 | struct cx25821_fh *fh = priv; | 965 | struct cx25821_fh *fh = priv; |
966 | struct cx25821_dev *dev = fh->dev; | 966 | struct cx25821_dev *dev; |
967 | int err; | 967 | int err; |
968 | 968 | ||
969 | if (fh) { | 969 | if (fh) { |
970 | dev = fh->dev; | ||
970 | err = v4l2_prio_check(&dev->prio, &fh->prio); | 971 | err = v4l2_prio_check(&dev->prio, &fh->prio); |
971 | if (0 != err) | 972 | if (0 != err) |
972 | return err; | 973 | return err; |
diff --git a/drivers/staging/dream/camera/Kconfig b/drivers/staging/dream/camera/Kconfig index 0a3e903b3363..bfb6d241d807 100644 --- a/drivers/staging/dream/camera/Kconfig +++ b/drivers/staging/dream/camera/Kconfig | |||
@@ -15,7 +15,7 @@ config MSM_CAMERA_DEBUG | |||
15 | 15 | ||
16 | config MSM_CAMERA_FLASH | 16 | config MSM_CAMERA_FLASH |
17 | bool "Qualcomm MSM camera flash support" | 17 | bool "Qualcomm MSM camera flash support" |
18 | depends on MSM_CAMERA | 18 | depends on MSM_CAMERA && BROKEN |
19 | ---help--- | 19 | ---help--- |
20 | Enable support for LED flash for msm camera | 20 | Enable support for LED flash for msm camera |
21 | 21 | ||
diff --git a/drivers/staging/dream/camera/Makefile b/drivers/staging/dream/camera/Makefile index 4429ae5fcafd..db228d7d1136 100644 --- a/drivers/staging/dream/camera/Makefile +++ b/drivers/staging/dream/camera/Makefile | |||
@@ -1,3 +1,4 @@ | |||
1 | EXTRA_CFLAGS=-Idrivers/staging/dream/include | ||
1 | obj-$(CONFIG_MT9T013) += mt9t013.o mt9t013_reg.o | 2 | obj-$(CONFIG_MT9T013) += mt9t013.o mt9t013_reg.o |
2 | obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o | 3 | obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o |
3 | obj-$(CONFIG_MT9P012) += mt9p012_fox.o mt9p012_reg.o | 4 | obj-$(CONFIG_MT9P012) += mt9p012_fox.o mt9p012_reg.o |
diff --git a/drivers/staging/dream/camera/msm_camera.c b/drivers/staging/dream/camera/msm_camera.c index 7d938772eacc..dc7c603625c7 100644 --- a/drivers/staging/dream/camera/msm_camera.c +++ b/drivers/staging/dream/camera/msm_camera.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Copyright (C) 2008-2009 QUALCOMM Incorporated. | 2 | * Copyright (C) 2008-2009 QUALCOMM Incorporated. |
3 | */ | 3 | */ |
4 | 4 | ||
5 | //FIXME: most allocations need not be GFP_ATOMIC | 5 | /* FIXME: most allocations need not be GFP_ATOMIC */ |
6 | /* FIXME: management of mutexes */ | 6 | /* FIXME: management of mutexes */ |
7 | /* FIXME: msm_pmem_region_lookup return values */ | 7 | /* FIXME: msm_pmem_region_lookup return values */ |
8 | /* FIXME: way too many copy to/from user */ | 8 | /* FIXME: way too many copy to/from user */ |
@@ -76,14 +76,14 @@ static LIST_HEAD(msm_sensors); | |||
76 | list_del_init(&qcmd->list); \ | 76 | list_del_init(&qcmd->list); \ |
77 | kfree(qcmd); \ | 77 | kfree(qcmd); \ |
78 | }; \ | 78 | }; \ |
79 | } while(0) | 79 | } while (0) |
80 | 80 | ||
81 | #define MSM_DRAIN_QUEUE(sync, name) do { \ | 81 | #define MSM_DRAIN_QUEUE(sync, name) do { \ |
82 | unsigned long flags; \ | 82 | unsigned long flags; \ |
83 | spin_lock_irqsave(&(sync)->name##_lock, flags); \ | 83 | spin_lock_irqsave(&(sync)->name##_lock, flags); \ |
84 | MSM_DRAIN_QUEUE_NOSYNC(sync, name); \ | 84 | MSM_DRAIN_QUEUE_NOSYNC(sync, name); \ |
85 | spin_unlock_irqrestore(&(sync)->name##_lock, flags); \ | 85 | spin_unlock_irqrestore(&(sync)->name##_lock, flags); \ |
86 | } while(0) | 86 | } while (0) |
87 | 87 | ||
88 | static int check_overlap(struct hlist_head *ptype, | 88 | static int check_overlap(struct hlist_head *ptype, |
89 | unsigned long paddr, | 89 | unsigned long paddr, |
@@ -361,7 +361,7 @@ static int __msm_get_frame(struct msm_sync *sync, | |||
361 | if (!frame->buffer) { | 361 | if (!frame->buffer) { |
362 | pr_err("%s: cannot get frame, invalid lookup address " | 362 | pr_err("%s: cannot get frame, invalid lookup address " |
363 | "y=%x cbcr=%x offset=%d\n", | 363 | "y=%x cbcr=%x offset=%d\n", |
364 | __FUNCTION__, | 364 | __func__, |
365 | pphy->y_phy, | 365 | pphy->y_phy, |
366 | pphy->cbcr_phy, | 366 | pphy->cbcr_phy, |
367 | frame->y_off); | 367 | frame->y_off); |
@@ -455,7 +455,7 @@ static int msm_disable_vfe(struct msm_sync *sync, void __user *arg) | |||
455 | return rc; | 455 | return rc; |
456 | } | 456 | } |
457 | 457 | ||
458 | static struct msm_queue_cmd* __msm_control(struct msm_sync *sync, | 458 | static struct msm_queue_cmd *__msm_control(struct msm_sync *sync, |
459 | struct msm_control_device_queue *queue, | 459 | struct msm_control_device_queue *queue, |
460 | struct msm_queue_cmd *qcmd, | 460 | struct msm_queue_cmd *qcmd, |
461 | int timeout) | 461 | int timeout) |
@@ -592,8 +592,7 @@ end: | |||
592 | * a result of a successful completion, we are freeing the qcmd that | 592 | * a result of a successful completion, we are freeing the qcmd that |
593 | * we dequeued from queue->ctrl_status_q. | 593 | * we dequeued from queue->ctrl_status_q. |
594 | */ | 594 | */ |
595 | if (qcmd) | 595 | kfree(qcmd); |
596 | kfree(qcmd); | ||
597 | 596 | ||
598 | CDBG("msm_control: end rc = %d\n", rc); | 597 | CDBG("msm_control: end rc = %d\n", rc); |
599 | return rc; | 598 | return rc; |
@@ -670,7 +669,7 @@ static int msm_get_stats(struct msm_sync *sync, void __user *arg) | |||
670 | &(stats.fd)); | 669 | &(stats.fd)); |
671 | if (!stats.buffer) { | 670 | if (!stats.buffer) { |
672 | pr_err("%s: msm_pmem_stats_ptov_lookup error\n", | 671 | pr_err("%s: msm_pmem_stats_ptov_lookup error\n", |
673 | __FUNCTION__); | 672 | __func__); |
674 | rc = -EINVAL; | 673 | rc = -EINVAL; |
675 | goto failure; | 674 | goto failure; |
676 | } | 675 | } |
@@ -718,8 +717,7 @@ static int msm_get_stats(struct msm_sync *sync, void __user *arg) | |||
718 | buf.fmain.buffer = | 717 | buf.fmain.buffer = |
719 | (unsigned long)region.vaddr; | 718 | (unsigned long)region.vaddr; |
720 | buf.fmain.fd = region.fd; | 719 | buf.fmain.fd = region.fd; |
721 | } | 720 | } else { |
722 | else { | ||
723 | pr_err("%s: pmem lookup failed\n", | 721 | pr_err("%s: pmem lookup failed\n", |
724 | __func__); | 722 | __func__); |
725 | rc = -EINVAL; | 723 | rc = -EINVAL; |
@@ -796,8 +794,7 @@ static int msm_get_stats(struct msm_sync *sync, void __user *arg) | |||
796 | } | 794 | } |
797 | 795 | ||
798 | failure: | 796 | failure: |
799 | if (qcmd) | 797 | kfree(qcmd); |
800 | kfree(qcmd); | ||
801 | 798 | ||
802 | CDBG("msm_get_stats: %d\n", rc); | 799 | CDBG("msm_get_stats: %d\n", rc); |
803 | return rc; | 800 | return rc; |
@@ -838,8 +835,8 @@ static int msm_ctrl_cmd_done(struct msm_control_device *ctrl_pmsm, | |||
838 | kfree(qcmd); | 835 | kfree(qcmd); |
839 | goto end; | 836 | goto end; |
840 | } | 837 | } |
841 | } | 838 | } else |
842 | else ctrlcmd->value = NULL; | 839 | ctrlcmd->value = NULL; |
843 | 840 | ||
844 | end: | 841 | end: |
845 | CDBG("msm_ctrl_cmd_done: end rc = %d\n", rc); | 842 | CDBG("msm_ctrl_cmd_done: end rc = %d\n", rc); |
@@ -869,14 +866,14 @@ static int msm_config_vfe(struct msm_sync *sync, void __user *arg) | |||
869 | return -EFAULT; | 866 | return -EFAULT; |
870 | } | 867 | } |
871 | 868 | ||
872 | switch(cfgcmd.cmd_type) { | 869 | switch (cfgcmd.cmd_type) { |
873 | case CMD_STATS_ENABLE: | 870 | case CMD_STATS_ENABLE: |
874 | axi_data.bufnum1 = | 871 | axi_data.bufnum1 = |
875 | msm_pmem_region_lookup(&sync->stats, | 872 | msm_pmem_region_lookup(&sync->stats, |
876 | MSM_PMEM_AEC_AWB, ®ion[0], | 873 | MSM_PMEM_AEC_AWB, ®ion[0], |
877 | NUM_WB_EXP_STAT_OUTPUT_BUFFERS); | 874 | NUM_WB_EXP_STAT_OUTPUT_BUFFERS); |
878 | if (!axi_data.bufnum1) { | 875 | if (!axi_data.bufnum1) { |
879 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 876 | pr_err("%s: pmem region lookup error\n", __func__); |
880 | return -EINVAL; | 877 | return -EINVAL; |
881 | } | 878 | } |
882 | axi_data.region = ®ion[0]; | 879 | axi_data.region = ®ion[0]; |
@@ -888,7 +885,7 @@ static int msm_config_vfe(struct msm_sync *sync, void __user *arg) | |||
888 | MSM_PMEM_AF, ®ion[0], | 885 | MSM_PMEM_AF, ®ion[0], |
889 | NUM_AF_STAT_OUTPUT_BUFFERS); | 886 | NUM_AF_STAT_OUTPUT_BUFFERS); |
890 | if (!axi_data.bufnum1) { | 887 | if (!axi_data.bufnum1) { |
891 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 888 | pr_err("%s: pmem region lookup error\n", __func__); |
892 | return -EINVAL; | 889 | return -EINVAL; |
893 | } | 890 | } |
894 | axi_data.region = ®ion[0]; | 891 | axi_data.region = ®ion[0]; |
@@ -899,7 +896,7 @@ static int msm_config_vfe(struct msm_sync *sync, void __user *arg) | |||
899 | break; | 896 | break; |
900 | default: | 897 | default: |
901 | pr_err("%s: unknown command type %d\n", | 898 | pr_err("%s: unknown command type %d\n", |
902 | __FUNCTION__, cfgcmd.cmd_type); | 899 | __func__, cfgcmd.cmd_type); |
903 | return -EINVAL; | 900 | return -EINVAL; |
904 | } | 901 | } |
905 | 902 | ||
@@ -928,7 +925,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
928 | msm_pmem_region_lookup(&sync->frame, pmem_type, | 925 | msm_pmem_region_lookup(&sync->frame, pmem_type, |
929 | ®ion[0], 8); | 926 | ®ion[0], 8); |
930 | if (!axi_data.bufnum1) { | 927 | if (!axi_data.bufnum1) { |
931 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 928 | pr_err("%s: pmem region lookup error\n", __func__); |
932 | return -EINVAL; | 929 | return -EINVAL; |
933 | } | 930 | } |
934 | break; | 931 | break; |
@@ -939,7 +936,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
939 | msm_pmem_region_lookup(&sync->frame, pmem_type, | 936 | msm_pmem_region_lookup(&sync->frame, pmem_type, |
940 | ®ion[0], 8); | 937 | ®ion[0], 8); |
941 | if (!axi_data.bufnum2) { | 938 | if (!axi_data.bufnum2) { |
942 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 939 | pr_err("%s: pmem region lookup error\n", __func__); |
943 | return -EINVAL; | 940 | return -EINVAL; |
944 | } | 941 | } |
945 | break; | 942 | break; |
@@ -950,7 +947,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
950 | msm_pmem_region_lookup(&sync->frame, pmem_type, | 947 | msm_pmem_region_lookup(&sync->frame, pmem_type, |
951 | ®ion[0], 8); | 948 | ®ion[0], 8); |
952 | if (!axi_data.bufnum1) { | 949 | if (!axi_data.bufnum1) { |
953 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 950 | pr_err("%s: pmem region lookup error\n", __func__); |
954 | return -EINVAL; | 951 | return -EINVAL; |
955 | } | 952 | } |
956 | 953 | ||
@@ -959,7 +956,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
959 | msm_pmem_region_lookup(&sync->frame, pmem_type, | 956 | msm_pmem_region_lookup(&sync->frame, pmem_type, |
960 | ®ion[axi_data.bufnum1], 8); | 957 | ®ion[axi_data.bufnum1], 8); |
961 | if (!axi_data.bufnum2) { | 958 | if (!axi_data.bufnum2) { |
962 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 959 | pr_err("%s: pmem region lookup error\n", __func__); |
963 | return -EINVAL; | 960 | return -EINVAL; |
964 | } | 961 | } |
965 | break; | 962 | break; |
@@ -970,7 +967,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
970 | msm_pmem_region_lookup(&sync->frame, pmem_type, | 967 | msm_pmem_region_lookup(&sync->frame, pmem_type, |
971 | ®ion[0], 8); | 968 | ®ion[0], 8); |
972 | if (!axi_data.bufnum2) { | 969 | if (!axi_data.bufnum2) { |
973 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 970 | pr_err("%s: pmem region lookup error\n", __func__); |
974 | return -EINVAL; | 971 | return -EINVAL; |
975 | } | 972 | } |
976 | break; | 973 | break; |
@@ -981,7 +978,7 @@ static int msm_frame_axi_cfg(struct msm_sync *sync, | |||
981 | 978 | ||
982 | default: | 979 | default: |
983 | pr_err("%s: unknown command type %d\n", | 980 | pr_err("%s: unknown command type %d\n", |
984 | __FUNCTION__, cfgcmd->cmd_type); | 981 | __func__, cfgcmd->cmd_type); |
985 | return -EINVAL; | 982 | return -EINVAL; |
986 | } | 983 | } |
987 | 984 | ||
@@ -1047,7 +1044,7 @@ static int __msm_put_frame_buf(struct msm_sync *sync, | |||
1047 | rc = sync->vfefn.vfe_config(&cfgcmd, &pphy); | 1044 | rc = sync->vfefn.vfe_config(&cfgcmd, &pphy); |
1048 | } else { | 1045 | } else { |
1049 | pr_err("%s: msm_pmem_frame_vtop_lookup failed\n", | 1046 | pr_err("%s: msm_pmem_frame_vtop_lookup failed\n", |
1050 | __FUNCTION__); | 1047 | __func__); |
1051 | rc = -EINVAL; | 1048 | rc = -EINVAL; |
1052 | } | 1049 | } |
1053 | 1050 | ||
@@ -1131,7 +1128,7 @@ static int msm_stats_axi_cfg(struct msm_sync *sync, | |||
1131 | break; | 1128 | break; |
1132 | default: | 1129 | default: |
1133 | pr_err("%s: unknown command type %d\n", | 1130 | pr_err("%s: unknown command type %d\n", |
1134 | __FUNCTION__, cfgcmd->cmd_type); | 1131 | __func__, cfgcmd->cmd_type); |
1135 | return -EINVAL; | 1132 | return -EINVAL; |
1136 | } | 1133 | } |
1137 | 1134 | ||
@@ -1140,7 +1137,7 @@ static int msm_stats_axi_cfg(struct msm_sync *sync, | |||
1140 | msm_pmem_region_lookup(&sync->stats, pmem_type, | 1137 | msm_pmem_region_lookup(&sync->stats, pmem_type, |
1141 | ®ion[0], NUM_WB_EXP_STAT_OUTPUT_BUFFERS); | 1138 | ®ion[0], NUM_WB_EXP_STAT_OUTPUT_BUFFERS); |
1142 | if (!axi_data.bufnum1) { | 1139 | if (!axi_data.bufnum1) { |
1143 | pr_err("%s: pmem region lookup error\n", __FUNCTION__); | 1140 | pr_err("%s: pmem region lookup error\n", __func__); |
1144 | return -EINVAL; | 1141 | return -EINVAL; |
1145 | } | 1142 | } |
1146 | axi_data.region = ®ion[0]; | 1143 | axi_data.region = ®ion[0]; |
@@ -1177,7 +1174,7 @@ static int msm_put_stats_buffer(struct msm_sync *sync, void __user *arg) | |||
1177 | cfgcmd.cmd_type = CMD_STATS_AF_BUF_RELEASE; | 1174 | cfgcmd.cmd_type = CMD_STATS_AF_BUF_RELEASE; |
1178 | else { | 1175 | else { |
1179 | pr_err("%s: invalid buf type %d\n", | 1176 | pr_err("%s: invalid buf type %d\n", |
1180 | __FUNCTION__, | 1177 | __func__, |
1181 | buf.type); | 1178 | buf.type); |
1182 | rc = -EINVAL; | 1179 | rc = -EINVAL; |
1183 | goto put_done; | 1180 | goto put_done; |
@@ -1223,7 +1220,7 @@ static int msm_axi_config(struct msm_sync *sync, void __user *arg) | |||
1223 | 1220 | ||
1224 | default: | 1221 | default: |
1225 | pr_err("%s: unknown command type %d\n", | 1222 | pr_err("%s: unknown command type %d\n", |
1226 | __FUNCTION__, | 1223 | __func__, |
1227 | cfgcmd.cmd_type); | 1224 | cfgcmd.cmd_type); |
1228 | return -EINVAL; | 1225 | return -EINVAL; |
1229 | } | 1226 | } |
@@ -1622,7 +1619,8 @@ static int msm_release_control(struct inode *node, struct file *filep) | |||
1622 | int rc; | 1619 | int rc; |
1623 | struct msm_control_device *ctrl_pmsm = filep->private_data; | 1620 | struct msm_control_device *ctrl_pmsm = filep->private_data; |
1624 | struct msm_device *pmsm = ctrl_pmsm->pmsm; | 1621 | struct msm_device *pmsm = ctrl_pmsm->pmsm; |
1625 | printk("msm_camera: RELEASE %s\n", filep->f_path.dentry->d_name.name); | 1622 | printk(KERN_INFO "msm_camera: RELEASE %s\n", |
1623 | filep->f_path.dentry->d_name.name); | ||
1626 | rc = __msm_release(pmsm->sync); | 1624 | rc = __msm_release(pmsm->sync); |
1627 | if (!rc) { | 1625 | if (!rc) { |
1628 | MSM_DRAIN_QUEUE(&ctrl_pmsm->ctrl_q, ctrl_status_q); | 1626 | MSM_DRAIN_QUEUE(&ctrl_pmsm->ctrl_q, ctrl_status_q); |
@@ -1636,7 +1634,8 @@ static int msm_release_frame(struct inode *node, struct file *filep) | |||
1636 | { | 1634 | { |
1637 | int rc; | 1635 | int rc; |
1638 | struct msm_device *pmsm = filep->private_data; | 1636 | struct msm_device *pmsm = filep->private_data; |
1639 | printk("msm_camera: RELEASE %s\n", filep->f_path.dentry->d_name.name); | 1637 | printk(KERN_INFO "msm_camera: RELEASE %s\n", |
1638 | filep->f_path.dentry->d_name.name); | ||
1640 | rc = __msm_release(pmsm->sync); | 1639 | rc = __msm_release(pmsm->sync); |
1641 | if (!rc) { | 1640 | if (!rc) { |
1642 | MSM_DRAIN_QUEUE(pmsm->sync, prev_frame_q); | 1641 | MSM_DRAIN_QUEUE(pmsm->sync, prev_frame_q); |
@@ -1720,7 +1719,7 @@ static void msm_vfe_sync(struct msm_vfe_resp *vdata, | |||
1720 | qcmd->type = qtype; | 1719 | qcmd->type = qtype; |
1721 | 1720 | ||
1722 | if (qtype == MSM_CAM_Q_VFE_MSG) { | 1721 | if (qtype == MSM_CAM_Q_VFE_MSG) { |
1723 | switch(vdata->type) { | 1722 | switch (vdata->type) { |
1724 | case VFE_MSG_OUTPUT1: | 1723 | case VFE_MSG_OUTPUT1: |
1725 | case VFE_MSG_OUTPUT2: | 1724 | case VFE_MSG_OUTPUT2: |
1726 | qcmd_frame = | 1725 | qcmd_frame = |
@@ -1885,8 +1884,10 @@ static int msm_open_control(struct inode *inode, struct file *filep) | |||
1885 | return -ENOMEM; | 1884 | return -ENOMEM; |
1886 | 1885 | ||
1887 | rc = msm_open_common(inode, filep, 0); | 1886 | rc = msm_open_common(inode, filep, 0); |
1888 | if (rc < 0) | 1887 | if (rc < 0) { |
1888 | kfree(ctrl_pmsm); | ||
1889 | return rc; | 1889 | return rc; |
1890 | } | ||
1890 | 1891 | ||
1891 | ctrl_pmsm->pmsm = filep->private_data; | 1892 | ctrl_pmsm->pmsm = filep->private_data; |
1892 | filep->private_data = ctrl_pmsm; | 1893 | filep->private_data = ctrl_pmsm; |
@@ -1929,7 +1930,7 @@ static int __msm_v4l2_control(struct msm_sync *sync, | |||
1929 | memcpy(out->value, ctrl->value, ctrl->length); | 1930 | memcpy(out->value, ctrl->value, ctrl->length); |
1930 | 1931 | ||
1931 | end: | 1932 | end: |
1932 | if (rcmd) kfree(rcmd); | 1933 | kfree(rcmd); |
1933 | CDBG("__msm_v4l2_control: end rc = %d\n", rc); | 1934 | CDBG("__msm_v4l2_control: end rc = %d\n", rc); |
1934 | return rc; | 1935 | return rc; |
1935 | } | 1936 | } |
diff --git a/drivers/staging/dream/camera/msm_vfe7x.c b/drivers/staging/dream/camera/msm_vfe7x.c index 33ab3ac6ac57..62fd24d632d5 100644 --- a/drivers/staging/dream/camera/msm_vfe7x.c +++ b/drivers/staging/dream/camera/msm_vfe7x.c | |||
@@ -255,8 +255,7 @@ static int vfe_7x_init(struct msm_vfe_callback *presp, | |||
255 | 255 | ||
256 | extlen = sizeof(struct vfe_frame_extra); | 256 | extlen = sizeof(struct vfe_frame_extra); |
257 | 257 | ||
258 | extdata = | 258 | extdata = kmalloc(extlen, GFP_ATOMIC); |
259 | kmalloc(sizeof(extlen), GFP_ATOMIC); | ||
260 | if (!extdata) { | 259 | if (!extdata) { |
261 | rc = -ENOMEM; | 260 | rc = -ENOMEM; |
262 | goto init_fail; | 261 | goto init_fail; |
diff --git a/drivers/staging/dream/camera/s5k3e2fx.c b/drivers/staging/dream/camera/s5k3e2fx.c index edba19889b0f..841792e2624b 100644 --- a/drivers/staging/dream/camera/s5k3e2fx.c +++ b/drivers/staging/dream/camera/s5k3e2fx.c | |||
@@ -743,12 +743,12 @@ static int s5k3e2fx_sensor_open_init(const struct msm_camera_sensor_info *data) | |||
743 | } | 743 | } |
744 | 744 | ||
745 | /* initialize AF */ | 745 | /* initialize AF */ |
746 | if ((rc = s5k3e2fx_i2c_write_b(s5k3e2fx_client->addr, | 746 | rc = s5k3e2fx_i2c_write_b(s5k3e2fx_client->addr, 0x3146, 0x3A); |
747 | 0x3146, 0x3A)) < 0) | 747 | if (rc < 0) |
748 | goto init_fail1; | 748 | goto init_fail1; |
749 | 749 | ||
750 | if ((rc = s5k3e2fx_i2c_write_b(s5k3e2fx_client->addr, | 750 | rc = s5k3e2fx_i2c_write_b(s5k3e2fx_client->addr, 0x3130, 0x03); |
751 | 0x3130, 0x03)) < 0) | 751 | if (rc < 0) |
752 | goto init_fail1; | 752 | goto init_fail1; |
753 | 753 | ||
754 | goto init_done; | 754 | goto init_done; |
@@ -814,20 +814,20 @@ static uint16_t s5k3e2fx_get_prev_lines_pf(void) | |||
814 | 814 | ||
815 | static uint16_t s5k3e2fx_get_prev_pixels_pl(void) | 815 | static uint16_t s5k3e2fx_get_prev_pixels_pl(void) |
816 | { | 816 | { |
817 | return (s5k3e2fx_reg_pat[S_RES_PREVIEW].size_w + | 817 | return s5k3e2fx_reg_pat[S_RES_PREVIEW].size_w + |
818 | s5k3e2fx_reg_pat[S_RES_PREVIEW].blk_p); | 818 | s5k3e2fx_reg_pat[S_RES_PREVIEW].blk_p; |
819 | } | 819 | } |
820 | 820 | ||
821 | static uint16_t s5k3e2fx_get_pict_lines_pf(void) | 821 | static uint16_t s5k3e2fx_get_pict_lines_pf(void) |
822 | { | 822 | { |
823 | return (s5k3e2fx_reg_pat[S_RES_CAPTURE].size_h + | 823 | return s5k3e2fx_reg_pat[S_RES_CAPTURE].size_h + |
824 | s5k3e2fx_reg_pat[S_RES_CAPTURE].blk_l); | 824 | s5k3e2fx_reg_pat[S_RES_CAPTURE].blk_l; |
825 | } | 825 | } |
826 | 826 | ||
827 | static uint16_t s5k3e2fx_get_pict_pixels_pl(void) | 827 | static uint16_t s5k3e2fx_get_pict_pixels_pl(void) |
828 | { | 828 | { |
829 | return (s5k3e2fx_reg_pat[S_RES_CAPTURE].size_w + | 829 | return s5k3e2fx_reg_pat[S_RES_CAPTURE].size_w + |
830 | s5k3e2fx_reg_pat[S_RES_CAPTURE].blk_p); | 830 | s5k3e2fx_reg_pat[S_RES_CAPTURE].blk_p; |
831 | } | 831 | } |
832 | 832 | ||
833 | static uint32_t s5k3e2fx_get_pict_max_exp_lc(void) | 833 | static uint32_t s5k3e2fx_get_pict_max_exp_lc(void) |
@@ -1093,14 +1093,10 @@ static int32_t s5k3e2fx_move_focus(int direction, int32_t num_steps) | |||
1093 | 1093 | ||
1094 | actual_step = step_direction * (int16_t)num_steps; | 1094 | actual_step = step_direction * (int16_t)num_steps; |
1095 | pos_offset = init_code + s5k3e2fx_ctrl->curr_lens_pos; | 1095 | pos_offset = init_code + s5k3e2fx_ctrl->curr_lens_pos; |
1096 | gain = actual_step * 0x400 / 5; | 1096 | gain = ((actual_step << 10) / 5) >> 10; |
1097 | 1097 | ||
1098 | for (i = 0; i <= 4; i++) { | 1098 | for (i = 0; i <= 4; i++) |
1099 | if (actual_step >= 0) | 1099 | s_move[i] = gain; |
1100 | s_move[i] = ((((i+1)*gain+0x200) - (i*gain+0x200))/0x400); | ||
1101 | else | ||
1102 | s_move[i] = ((((i+1)*gain-0x200) - (i*gain-0x200))/0x400); | ||
1103 | } | ||
1104 | 1100 | ||
1105 | /* Ring Damping Code */ | 1101 | /* Ring Damping Code */ |
1106 | for (i = 0; i <= 4; i++) { | 1102 | for (i = 0; i <= 4; i++) { |
diff --git a/drivers/staging/dream/include/linux/android_pmem.h b/drivers/staging/dream/include/linux/android_pmem.h new file mode 100644 index 000000000000..2fc05d7d335b --- /dev/null +++ b/drivers/staging/dream/include/linux/android_pmem.h | |||
@@ -0,0 +1,80 @@ | |||
1 | /* drivers/staging/dream/include/linux/android_pmem.h | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef _ANDROID_PMEM_H_ | ||
17 | #define _ANDROID_PMEM_H_ | ||
18 | |||
19 | #define PMEM_IOCTL_MAGIC 'p' | ||
20 | #define PMEM_GET_PHYS _IOW(PMEM_IOCTL_MAGIC, 1, unsigned int) | ||
21 | #define PMEM_MAP _IOW(PMEM_IOCTL_MAGIC, 2, unsigned int) | ||
22 | #define PMEM_GET_SIZE _IOW(PMEM_IOCTL_MAGIC, 3, unsigned int) | ||
23 | #define PMEM_UNMAP _IOW(PMEM_IOCTL_MAGIC, 4, unsigned int) | ||
24 | /* This ioctl will allocate pmem space, backing the file, it will fail | ||
25 | * if the file already has an allocation, pass it the len as the argument | ||
26 | * to the ioctl */ | ||
27 | #define PMEM_ALLOCATE _IOW(PMEM_IOCTL_MAGIC, 5, unsigned int) | ||
28 | /* This will connect a one pmem file to another, pass the file that is already | ||
29 | * backed in memory as the argument to the ioctl | ||
30 | */ | ||
31 | #define PMEM_CONNECT _IOW(PMEM_IOCTL_MAGIC, 6, unsigned int) | ||
32 | /* Returns the total size of the pmem region it is sent to as a pmem_region | ||
33 | * struct (with offset set to 0). | ||
34 | */ | ||
35 | #define PMEM_GET_TOTAL_SIZE _IOW(PMEM_IOCTL_MAGIC, 7, unsigned int) | ||
36 | /* Revokes gpu registers and resets the gpu. Pass a pointer to the | ||
37 | * start of the mapped gpu regs (the vaddr returned by mmap) as the argument. | ||
38 | */ | ||
39 | #define HW3D_REVOKE_GPU _IOW(PMEM_IOCTL_MAGIC, 8, unsigned int) | ||
40 | #define HW3D_GRANT_GPU _IOW(PMEM_IOCTL_MAGIC, 9, unsigned int) | ||
41 | #define HW3D_WAIT_FOR_INTERRUPT _IOW(PMEM_IOCTL_MAGIC, 10, unsigned int) | ||
42 | |||
43 | int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart, | ||
44 | unsigned long *end, struct file **filp); | ||
45 | int get_pmem_user_addr(struct file *file, unsigned long *start, | ||
46 | unsigned long *end); | ||
47 | void put_pmem_file(struct file* file); | ||
48 | void flush_pmem_file(struct file *file, unsigned long start, unsigned long len); | ||
49 | |||
50 | struct android_pmem_platform_data | ||
51 | { | ||
52 | const char* name; | ||
53 | /* starting physical address of memory region */ | ||
54 | unsigned long start; | ||
55 | /* size of memory region */ | ||
56 | unsigned long size; | ||
57 | /* set to indicate the region should not be managed with an allocator */ | ||
58 | unsigned no_allocator; | ||
59 | /* set to indicate maps of this region should be cached, if a mix of | ||
60 | * cached and uncached is desired, set this and open the device with | ||
61 | * O_SYNC to get an uncached region */ | ||
62 | unsigned cached; | ||
63 | /* The MSM7k has bits to enable a write buffer in the bus controller*/ | ||
64 | unsigned buffered; | ||
65 | }; | ||
66 | |||
67 | struct pmem_region { | ||
68 | unsigned long offset; | ||
69 | unsigned long len; | ||
70 | }; | ||
71 | |||
72 | int pmem_setup(struct android_pmem_platform_data *pdata, | ||
73 | long (*ioctl)(struct file *, unsigned int, unsigned long), | ||
74 | int (*release)(struct inode *, struct file *)); | ||
75 | |||
76 | int pmem_remap(struct pmem_region *region, struct file *file, | ||
77 | unsigned operation); | ||
78 | |||
79 | #endif //_ANDROID_PPP_H_ | ||
80 | |||
diff --git a/drivers/staging/dream/include/linux/gpio_event.h b/drivers/staging/dream/include/linux/gpio_event.h new file mode 100644 index 000000000000..ffc5da392ad7 --- /dev/null +++ b/drivers/staging/dream/include/linux/gpio_event.h | |||
@@ -0,0 +1,154 @@ | |||
1 | /* drivers/staging/dream/include/linux/gpio_event.h | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef _LINUX_GPIO_EVENT_H | ||
17 | #define _LINUX_GPIO_EVENT_H | ||
18 | |||
19 | #include <linux/input.h> | ||
20 | |||
21 | enum { | ||
22 | GPIO_EVENT_FUNC_UNINIT = 0x0, | ||
23 | GPIO_EVENT_FUNC_INIT = 0x1, | ||
24 | GPIO_EVENT_FUNC_SUSPEND = 0x2, | ||
25 | GPIO_EVENT_FUNC_RESUME = 0x3, | ||
26 | }; | ||
27 | struct gpio_event_info { | ||
28 | int (*func)(struct input_dev *input_dev, | ||
29 | struct gpio_event_info *info, | ||
30 | void **data, int func); | ||
31 | int (*event)(struct input_dev *input_dev, | ||
32 | struct gpio_event_info *info, | ||
33 | void **data, unsigned int type, | ||
34 | unsigned int code, int value); /* out events */ | ||
35 | }; | ||
36 | |||
37 | struct gpio_event_platform_data { | ||
38 | const char *name; | ||
39 | struct gpio_event_info **info; | ||
40 | size_t info_count; | ||
41 | int (*power)(const struct gpio_event_platform_data *pdata, bool on); | ||
42 | }; | ||
43 | |||
44 | #define GPIO_EVENT_DEV_NAME "gpio-event" | ||
45 | |||
46 | /* Key matrix */ | ||
47 | |||
48 | enum gpio_event_matrix_flags { | ||
49 | /* unset: drive active output low, set: drive active output high */ | ||
50 | GPIOKPF_ACTIVE_HIGH = 1U << 0, | ||
51 | GPIOKPF_DEBOUNCE = 1U << 1, | ||
52 | GPIOKPF_REMOVE_SOME_PHANTOM_KEYS = 1U << 2, | ||
53 | GPIOKPF_REMOVE_PHANTOM_KEYS = GPIOKPF_REMOVE_SOME_PHANTOM_KEYS | | ||
54 | GPIOKPF_DEBOUNCE, | ||
55 | GPIOKPF_DRIVE_INACTIVE = 1U << 3, | ||
56 | GPIOKPF_LEVEL_TRIGGERED_IRQ = 1U << 4, | ||
57 | GPIOKPF_PRINT_UNMAPPED_KEYS = 1U << 16, | ||
58 | GPIOKPF_PRINT_MAPPED_KEYS = 1U << 17, | ||
59 | GPIOKPF_PRINT_PHANTOM_KEYS = 1U << 18, | ||
60 | }; | ||
61 | |||
62 | extern int gpio_event_matrix_func(struct input_dev *input_dev, | ||
63 | struct gpio_event_info *info, void **data, int func); | ||
64 | struct gpio_event_matrix_info { | ||
65 | /* initialize to gpio_event_matrix_func */ | ||
66 | struct gpio_event_info info; | ||
67 | /* size must be ninputs * noutputs */ | ||
68 | const unsigned short *keymap; | ||
69 | unsigned int *input_gpios; | ||
70 | unsigned int *output_gpios; | ||
71 | unsigned int ninputs; | ||
72 | unsigned int noutputs; | ||
73 | /* time to wait before reading inputs after driving each output */ | ||
74 | ktime_t settle_time; | ||
75 | /* time to wait before scanning the keypad a second time */ | ||
76 | ktime_t debounce_delay; | ||
77 | ktime_t poll_time; | ||
78 | unsigned flags; | ||
79 | }; | ||
80 | |||
81 | /* Directly connected inputs and outputs */ | ||
82 | |||
83 | enum gpio_event_direct_flags { | ||
84 | GPIOEDF_ACTIVE_HIGH = 1U << 0, | ||
85 | /* GPIOEDF_USE_DOWN_IRQ = 1U << 1, */ | ||
86 | /* GPIOEDF_USE_IRQ = (1U << 2) | GPIOIDF_USE_DOWN_IRQ, */ | ||
87 | GPIOEDF_PRINT_KEYS = 1U << 8, | ||
88 | GPIOEDF_PRINT_KEY_DEBOUNCE = 1U << 9, | ||
89 | }; | ||
90 | |||
91 | struct gpio_event_direct_entry { | ||
92 | uint32_t gpio:23; | ||
93 | uint32_t code:9; | ||
94 | }; | ||
95 | |||
96 | /* inputs */ | ||
97 | extern int gpio_event_input_func(struct input_dev *input_dev, | ||
98 | struct gpio_event_info *info, void **data, int func); | ||
99 | struct gpio_event_input_info { | ||
100 | /* initialize to gpio_event_input_func */ | ||
101 | struct gpio_event_info info; | ||
102 | ktime_t debounce_time; | ||
103 | ktime_t poll_time; | ||
104 | uint16_t flags; | ||
105 | uint16_t type; | ||
106 | const struct gpio_event_direct_entry *keymap; | ||
107 | size_t keymap_size; | ||
108 | }; | ||
109 | |||
110 | /* outputs */ | ||
111 | extern int gpio_event_output_func(struct input_dev *input_dev, | ||
112 | struct gpio_event_info *info, void **data, int func); | ||
113 | extern int gpio_event_output_event(struct input_dev *input_dev, | ||
114 | struct gpio_event_info *info, void **data, | ||
115 | unsigned int type, unsigned int code, int value); | ||
116 | struct gpio_event_output_info { | ||
117 | /* initialize to gpio_event_output_func and gpio_event_output_event */ | ||
118 | struct gpio_event_info info; | ||
119 | uint16_t flags; | ||
120 | uint16_t type; | ||
121 | const struct gpio_event_direct_entry *keymap; | ||
122 | size_t keymap_size; | ||
123 | }; | ||
124 | |||
125 | |||
126 | /* axes */ | ||
127 | |||
128 | enum gpio_event_axis_flags { | ||
129 | GPIOEAF_PRINT_UNKNOWN_DIRECTION = 1U << 16, | ||
130 | GPIOEAF_PRINT_RAW = 1U << 17, | ||
131 | GPIOEAF_PRINT_EVENT = 1U << 18, | ||
132 | }; | ||
133 | |||
134 | extern int gpio_event_axis_func(struct input_dev *input_dev, | ||
135 | struct gpio_event_info *info, void **data, int func); | ||
136 | struct gpio_event_axis_info { | ||
137 | /* initialize to gpio_event_axis_func */ | ||
138 | struct gpio_event_info info; | ||
139 | uint8_t count; | ||
140 | uint8_t type; /* EV_REL or EV_ABS */ | ||
141 | uint16_t code; | ||
142 | uint16_t decoded_size; | ||
143 | uint16_t (*map)(struct gpio_event_axis_info *info, uint16_t in); | ||
144 | uint32_t *gpio; | ||
145 | uint32_t flags; | ||
146 | }; | ||
147 | #define gpio_axis_2bit_gray_map gpio_axis_4bit_gray_map | ||
148 | #define gpio_axis_3bit_gray_map gpio_axis_4bit_gray_map | ||
149 | uint16_t gpio_axis_4bit_gray_map( | ||
150 | struct gpio_event_axis_info *info, uint16_t in); | ||
151 | uint16_t gpio_axis_5bit_singletrack_map( | ||
152 | struct gpio_event_axis_info *info, uint16_t in); | ||
153 | |||
154 | #endif | ||
diff --git a/drivers/staging/dream/include/linux/msm_adsp.h b/drivers/staging/dream/include/linux/msm_adsp.h new file mode 100644 index 000000000000..e775f3e94f1d --- /dev/null +++ b/drivers/staging/dream/include/linux/msm_adsp.h | |||
@@ -0,0 +1,84 @@ | |||
1 | /* drivers/staging/dream/include/linux/msm_adsp.h | ||
2 | * | ||
3 | * Copyright (c) QUALCOMM Incorporated | ||
4 | * Copyright (C) 2007 Google, Inc. | ||
5 | * Author: Iliyan Malchev <ibm@android.com> | ||
6 | * | ||
7 | * This software is licensed under the terms of the GNU General Public | ||
8 | * License version 2, as published by the Free Software Foundation, and | ||
9 | * may be copied, distributed, and modified under those terms. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | */ | ||
17 | #ifndef __LINUX_MSM_ADSP_H | ||
18 | #define __LINUX_MSM_ADSP_H | ||
19 | |||
20 | #include <linux/types.h> | ||
21 | #include <linux/ioctl.h> | ||
22 | |||
23 | #define ADSP_IOCTL_MAGIC 'q' | ||
24 | |||
25 | /* ADSP_IOCTL_WRITE_COMMAND */ | ||
26 | struct adsp_command_t { | ||
27 | uint16_t queue; | ||
28 | uint32_t len; /* bytes */ | ||
29 | uint8_t *data; | ||
30 | }; | ||
31 | |||
32 | /* ADSP_IOCTL_GET_EVENT */ | ||
33 | struct adsp_event_t { | ||
34 | uint16_t type; /* 1 == event (RPC), 0 == message (adsp) */ | ||
35 | uint32_t timeout_ms; /* -1 for infinite, 0 for immediate return */ | ||
36 | uint16_t msg_id; | ||
37 | uint16_t flags; /* 1 == 16--bit event, 0 == 32-bit event */ | ||
38 | uint32_t len; /* size in, number of bytes out */ | ||
39 | uint8_t *data; | ||
40 | }; | ||
41 | |||
42 | #define ADSP_IOCTL_ENABLE \ | ||
43 | _IOR(ADSP_IOCTL_MAGIC, 1, unsigned) | ||
44 | |||
45 | #define ADSP_IOCTL_DISABLE \ | ||
46 | _IOR(ADSP_IOCTL_MAGIC, 2, unsigned) | ||
47 | |||
48 | #define ADSP_IOCTL_DISABLE_ACK \ | ||
49 | _IOR(ADSP_IOCTL_MAGIC, 3, unsigned) | ||
50 | |||
51 | #define ADSP_IOCTL_WRITE_COMMAND \ | ||
52 | _IOR(ADSP_IOCTL_MAGIC, 4, struct adsp_command_t *) | ||
53 | |||
54 | #define ADSP_IOCTL_GET_EVENT \ | ||
55 | _IOWR(ADSP_IOCTL_MAGIC, 5, struct adsp_event_data_t *) | ||
56 | |||
57 | #define ADSP_IOCTL_SET_CLKRATE \ | ||
58 | _IOR(ADSP_IOCTL_MAGIC, 6, unsigned) | ||
59 | |||
60 | #define ADSP_IOCTL_DISABLE_EVENT_RSP \ | ||
61 | _IOR(ADSP_IOCTL_MAGIC, 10, unsigned) | ||
62 | |||
63 | struct adsp_pmem_info { | ||
64 | int fd; | ||
65 | void *vaddr; | ||
66 | }; | ||
67 | |||
68 | #define ADSP_IOCTL_REGISTER_PMEM \ | ||
69 | _IOW(ADSP_IOCTL_MAGIC, 13, unsigned) | ||
70 | |||
71 | #define ADSP_IOCTL_UNREGISTER_PMEM \ | ||
72 | _IOW(ADSP_IOCTL_MAGIC, 14, unsigned) | ||
73 | |||
74 | /* Cause any further GET_EVENT ioctls to fail (-ENODEV) | ||
75 | * until the device is closed and reopened. Useful for | ||
76 | * terminating event dispatch threads | ||
77 | */ | ||
78 | #define ADSP_IOCTL_ABORT_EVENT_READ \ | ||
79 | _IOW(ADSP_IOCTL_MAGIC, 15, unsigned) | ||
80 | |||
81 | #define ADSP_IOCTL_LINK_TASK \ | ||
82 | _IOW(ADSP_IOCTL_MAGIC, 16, unsigned) | ||
83 | |||
84 | #endif | ||
diff --git a/drivers/staging/dream/include/linux/msm_audio.h b/drivers/staging/dream/include/linux/msm_audio.h new file mode 100644 index 000000000000..cfbdaa0d98b2 --- /dev/null +++ b/drivers/staging/dream/include/linux/msm_audio.h | |||
@@ -0,0 +1,115 @@ | |||
1 | /* drivers/staging/dream/include/linux/msm_audio.h | ||
2 | * | ||
3 | * Copyright (C) 2008 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __LINUX_MSM_AUDIO_H | ||
17 | #define __LINUX_MSM_AUDIO_H | ||
18 | |||
19 | #include <linux/types.h> | ||
20 | #include <linux/ioctl.h> | ||
21 | #include <asm/sizes.h> | ||
22 | |||
23 | /* PCM Audio */ | ||
24 | |||
25 | #define AUDIO_IOCTL_MAGIC 'a' | ||
26 | |||
27 | #define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned) | ||
28 | #define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned) | ||
29 | #define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned) | ||
30 | #define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, unsigned) | ||
31 | #define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, unsigned) | ||
32 | #define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, unsigned) | ||
33 | #define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned) | ||
34 | #define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned) | ||
35 | #define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned) | ||
36 | #define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned) | ||
37 | #define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned) | ||
38 | #define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned) | ||
39 | #define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned) | ||
40 | #define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 13, unsigned) | ||
41 | #define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned) | ||
42 | #define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned) | ||
43 | #define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned) | ||
44 | #define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned) | ||
45 | #define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned) | ||
46 | |||
47 | #define AUDIO_MAX_COMMON_IOCTL_NUM 100 | ||
48 | |||
49 | #define AUDIO_MAX_COMMON_IOCTL_NUM 100 | ||
50 | |||
51 | struct msm_audio_config { | ||
52 | uint32_t buffer_size; | ||
53 | uint32_t buffer_count; | ||
54 | uint32_t channel_count; | ||
55 | uint32_t sample_rate; | ||
56 | uint32_t type; | ||
57 | uint32_t unused[3]; | ||
58 | }; | ||
59 | |||
60 | struct msm_audio_stats { | ||
61 | uint32_t byte_count; | ||
62 | uint32_t sample_count; | ||
63 | uint32_t unused[2]; | ||
64 | }; | ||
65 | |||
66 | /* Audio routing */ | ||
67 | |||
68 | #define SND_IOCTL_MAGIC 's' | ||
69 | |||
70 | #define SND_MUTE_UNMUTED 0 | ||
71 | #define SND_MUTE_MUTED 1 | ||
72 | |||
73 | struct msm_snd_device_config { | ||
74 | uint32_t device; | ||
75 | uint32_t ear_mute; | ||
76 | uint32_t mic_mute; | ||
77 | }; | ||
78 | |||
79 | #define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *) | ||
80 | |||
81 | #define SND_METHOD_VOICE 0 | ||
82 | |||
83 | struct msm_snd_volume_config { | ||
84 | uint32_t device; | ||
85 | uint32_t method; | ||
86 | uint32_t volume; | ||
87 | }; | ||
88 | |||
89 | #define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *) | ||
90 | |||
91 | /* Returns the number of SND endpoints supported. */ | ||
92 | |||
93 | #define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *) | ||
94 | |||
95 | struct msm_snd_endpoint { | ||
96 | int id; /* input and output */ | ||
97 | char name[64]; /* output only */ | ||
98 | }; | ||
99 | |||
100 | /* Takes an index between 0 and one less than the number returned by | ||
101 | * SND_GET_NUM_ENDPOINTS, and returns the SND index and name of a | ||
102 | * SND endpoint. On input, the .id field contains the number of the | ||
103 | * endpoint, and on exit it contains the SND index, while .name contains | ||
104 | * the description of the endpoint. | ||
105 | */ | ||
106 | |||
107 | #define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *) | ||
108 | |||
109 | struct msm_audio_pcm_config { | ||
110 | uint32_t pcm_feedback; /* 0 - disable > 0 - enable */ | ||
111 | uint32_t buffer_count; /* Number of buffers to allocate */ | ||
112 | uint32_t buffer_size; /* Size of buffer for capturing of | ||
113 | PCM samples */ | ||
114 | }; | ||
115 | #endif | ||
diff --git a/drivers/staging/dream/include/linux/msm_rpcrouter.h b/drivers/staging/dream/include/linux/msm_rpcrouter.h new file mode 100644 index 000000000000..64845fb481f1 --- /dev/null +++ b/drivers/staging/dream/include/linux/msm_rpcrouter.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* drivers/staging/dream/include/linux/msm_rpcrouter.h | ||
2 | * | ||
3 | * Copyright (c) QUALCOMM Incorporated | ||
4 | * Copyright (C) 2007 Google, Inc. | ||
5 | * Author: San Mehat <san@android.com> | ||
6 | * | ||
7 | * This software is licensed under the terms of the GNU General Public | ||
8 | * License version 2, as published by the Free Software Foundation, and | ||
9 | * may be copied, distributed, and modified under those terms. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | */ | ||
17 | #ifndef __LINUX_MSM_RPCROUTER_H | ||
18 | #define __LINUX_MSM_RPCROUTER_H | ||
19 | |||
20 | #include <linux/types.h> | ||
21 | #include <linux/ioctl.h> | ||
22 | |||
23 | #define RPC_ROUTER_VERSION_V1 0x00010000 | ||
24 | |||
25 | struct rpcrouter_ioctl_server_args { | ||
26 | uint32_t prog; | ||
27 | uint32_t vers; | ||
28 | }; | ||
29 | |||
30 | #define RPC_ROUTER_IOCTL_MAGIC (0xC1) | ||
31 | |||
32 | #define RPC_ROUTER_IOCTL_GET_VERSION \ | ||
33 | _IOR(RPC_ROUTER_IOCTL_MAGIC, 0, unsigned int) | ||
34 | |||
35 | #define RPC_ROUTER_IOCTL_GET_MTU \ | ||
36 | _IOR(RPC_ROUTER_IOCTL_MAGIC, 1, unsigned int) | ||
37 | |||
38 | #define RPC_ROUTER_IOCTL_REGISTER_SERVER \ | ||
39 | _IOWR(RPC_ROUTER_IOCTL_MAGIC, 2, unsigned int) | ||
40 | |||
41 | #define RPC_ROUTER_IOCTL_UNREGISTER_SERVER \ | ||
42 | _IOWR(RPC_ROUTER_IOCTL_MAGIC, 3, unsigned int) | ||
43 | |||
44 | #define RPC_ROUTER_IOCTL_GET_MINOR_VERSION \ | ||
45 | _IOW(RPC_ROUTER_IOCTL_MAGIC, 4, unsigned int) | ||
46 | |||
47 | #endif | ||
diff --git a/drivers/staging/dream/include/linux/wakelock.h b/drivers/staging/dream/include/linux/wakelock.h new file mode 100644 index 000000000000..93c31a4d1ca7 --- /dev/null +++ b/drivers/staging/dream/include/linux/wakelock.h | |||
@@ -0,0 +1,91 @@ | |||
1 | /* drivers/staging/dream/include/linux/wakelock.h | ||
2 | * | ||
3 | * Copyright (C) 2007-2008 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef _LINUX_WAKELOCK_H | ||
17 | #define _LINUX_WAKELOCK_H | ||
18 | |||
19 | #include <linux/list.h> | ||
20 | #include <linux/ktime.h> | ||
21 | |||
22 | /* A wake_lock prevents the system from entering suspend or other low power | ||
23 | * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock | ||
24 | * prevents a full system suspend. If the type is WAKE_LOCK_IDLE, low power | ||
25 | * states that cause large interrupt latencies or that disable a set of | ||
26 | * interrupts will not entered from idle until the wake_locks are released. | ||
27 | */ | ||
28 | |||
29 | enum { | ||
30 | WAKE_LOCK_SUSPEND, /* Prevent suspend */ | ||
31 | WAKE_LOCK_IDLE, /* Prevent low power idle */ | ||
32 | WAKE_LOCK_TYPE_COUNT | ||
33 | }; | ||
34 | |||
35 | struct wake_lock { | ||
36 | #ifdef CONFIG_HAS_WAKELOCK | ||
37 | struct list_head link; | ||
38 | int flags; | ||
39 | const char *name; | ||
40 | unsigned long expires; | ||
41 | #ifdef CONFIG_WAKELOCK_STAT | ||
42 | struct { | ||
43 | int count; | ||
44 | int expire_count; | ||
45 | int wakeup_count; | ||
46 | ktime_t total_time; | ||
47 | ktime_t prevent_suspend_time; | ||
48 | ktime_t max_time; | ||
49 | ktime_t last_time; | ||
50 | } stat; | ||
51 | #endif | ||
52 | #endif | ||
53 | }; | ||
54 | |||
55 | #ifdef CONFIG_HAS_WAKELOCK | ||
56 | |||
57 | void wake_lock_init(struct wake_lock *lock, int type, const char *name); | ||
58 | void wake_lock_destroy(struct wake_lock *lock); | ||
59 | void wake_lock(struct wake_lock *lock); | ||
60 | void wake_lock_timeout(struct wake_lock *lock, long timeout); | ||
61 | void wake_unlock(struct wake_lock *lock); | ||
62 | |||
63 | /* wake_lock_active returns a non-zero value if the wake_lock is currently | ||
64 | * locked. If the wake_lock has a timeout, it does not check the timeout | ||
65 | * but if the timeout had aready been checked it will return 0. | ||
66 | */ | ||
67 | int wake_lock_active(struct wake_lock *lock); | ||
68 | |||
69 | /* has_wake_lock returns 0 if no wake locks of the specified type are active, | ||
70 | * and non-zero if one or more wake locks are held. Specifically it returns | ||
71 | * -1 if one or more wake locks with no timeout are active or the | ||
72 | * number of jiffies until all active wake locks time out. | ||
73 | */ | ||
74 | long has_wake_lock(int type); | ||
75 | |||
76 | #else | ||
77 | |||
78 | static inline void wake_lock_init(struct wake_lock *lock, int type, | ||
79 | const char *name) {} | ||
80 | static inline void wake_lock_destroy(struct wake_lock *lock) {} | ||
81 | static inline void wake_lock(struct wake_lock *lock) {} | ||
82 | static inline void wake_lock_timeout(struct wake_lock *lock, long timeout) {} | ||
83 | static inline void wake_unlock(struct wake_lock *lock) {} | ||
84 | |||
85 | static inline int wake_lock_active(struct wake_lock *lock) { return 0; } | ||
86 | static inline long has_wake_lock(int type) { return 0; } | ||
87 | |||
88 | #endif | ||
89 | |||
90 | #endif | ||
91 | |||
diff --git a/drivers/staging/dream/include/mach/camera.h b/drivers/staging/dream/include/mach/camera.h new file mode 100644 index 000000000000..c20f0423abd4 --- /dev/null +++ b/drivers/staging/dream/include/mach/camera.h | |||
@@ -0,0 +1,279 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008-2009 QUALCOMM Incorporated. | ||
3 | */ | ||
4 | |||
5 | #ifndef __ASM__ARCH_CAMERA_H | ||
6 | #define __ASM__ARCH_CAMERA_H | ||
7 | |||
8 | #include <linux/list.h> | ||
9 | #include <linux/poll.h> | ||
10 | #include <linux/cdev.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include "linux/types.h" | ||
13 | |||
14 | #include <mach/board.h> | ||
15 | #include <media/msm_camera.h> | ||
16 | |||
17 | #ifdef CONFIG_MSM_CAMERA_DEBUG | ||
18 | #define CDBG(fmt, args...) printk(KERN_INFO "msm_camera: " fmt, ##args) | ||
19 | #else | ||
20 | #define CDBG(fmt, args...) do { } while (0) | ||
21 | #endif | ||
22 | |||
23 | #define MSM_CAMERA_MSG 0 | ||
24 | #define MSM_CAMERA_EVT 1 | ||
25 | #define NUM_WB_EXP_NEUTRAL_REGION_LINES 4 | ||
26 | #define NUM_WB_EXP_STAT_OUTPUT_BUFFERS 3 | ||
27 | #define NUM_AUTOFOCUS_MULTI_WINDOW_GRIDS 16 | ||
28 | #define NUM_AF_STAT_OUTPUT_BUFFERS 3 | ||
29 | |||
30 | enum msm_queue { | ||
31 | MSM_CAM_Q_CTRL, /* control command or control command status */ | ||
32 | MSM_CAM_Q_VFE_EVT, /* adsp event */ | ||
33 | MSM_CAM_Q_VFE_MSG, /* adsp message */ | ||
34 | MSM_CAM_Q_V4L2_REQ, /* v4l2 request */ | ||
35 | }; | ||
36 | |||
37 | enum vfe_resp_msg { | ||
38 | VFE_EVENT, | ||
39 | VFE_MSG_GENERAL, | ||
40 | VFE_MSG_SNAPSHOT, | ||
41 | VFE_MSG_OUTPUT1, | ||
42 | VFE_MSG_OUTPUT2, | ||
43 | VFE_MSG_STATS_AF, | ||
44 | VFE_MSG_STATS_WE, | ||
45 | }; | ||
46 | |||
47 | struct msm_vfe_phy_info { | ||
48 | uint32_t sbuf_phy; | ||
49 | uint32_t y_phy; | ||
50 | uint32_t cbcr_phy; | ||
51 | }; | ||
52 | |||
53 | struct msm_vfe_resp { | ||
54 | enum vfe_resp_msg type; | ||
55 | struct msm_vfe_evt_msg evt_msg; | ||
56 | struct msm_vfe_phy_info phy; | ||
57 | void *extdata; | ||
58 | int32_t extlen; | ||
59 | }; | ||
60 | |||
61 | struct msm_vfe_callback { | ||
62 | void (*vfe_resp)(struct msm_vfe_resp *, | ||
63 | enum msm_queue, void *syncdata); | ||
64 | void* (*vfe_alloc)(int, void *syncdata); | ||
65 | }; | ||
66 | |||
67 | struct msm_camvfe_fn { | ||
68 | int (*vfe_init)(struct msm_vfe_callback *, struct platform_device *); | ||
69 | int (*vfe_enable)(struct camera_enable_cmd *); | ||
70 | int (*vfe_config)(struct msm_vfe_cfg_cmd *, void *); | ||
71 | int (*vfe_disable)(struct camera_enable_cmd *, | ||
72 | struct platform_device *dev); | ||
73 | void (*vfe_release)(struct platform_device *); | ||
74 | }; | ||
75 | |||
76 | struct msm_sensor_ctrl { | ||
77 | int (*s_init)(const struct msm_camera_sensor_info *); | ||
78 | int (*s_release)(void); | ||
79 | int (*s_config)(void __user *); | ||
80 | }; | ||
81 | |||
82 | struct msm_sync { | ||
83 | /* These two queues are accessed from a process context only. */ | ||
84 | struct hlist_head frame; /* most-frequently accessed */ | ||
85 | struct hlist_head stats; | ||
86 | |||
87 | /* The message queue is used by the control thread to send commands | ||
88 | * to the config thread, and also by the DSP to send messages to the | ||
89 | * config thread. Thus it is the only queue that is accessed from | ||
90 | * both interrupt and process context. | ||
91 | */ | ||
92 | spinlock_t msg_event_q_lock; | ||
93 | struct list_head msg_event_q; | ||
94 | wait_queue_head_t msg_event_wait; | ||
95 | |||
96 | /* This queue contains preview frames. It is accessed by the DSP (in | ||
97 | * in interrupt context, and by the frame thread. | ||
98 | */ | ||
99 | spinlock_t prev_frame_q_lock; | ||
100 | struct list_head prev_frame_q; | ||
101 | wait_queue_head_t prev_frame_wait; | ||
102 | int unblock_poll_frame; | ||
103 | |||
104 | /* This queue contains snapshot frames. It is accessed by the DSP (in | ||
105 | * interrupt context, and by the control thread. | ||
106 | */ | ||
107 | spinlock_t pict_frame_q_lock; | ||
108 | struct list_head pict_frame_q; | ||
109 | wait_queue_head_t pict_frame_wait; | ||
110 | |||
111 | struct msm_camera_sensor_info *sdata; | ||
112 | struct msm_camvfe_fn vfefn; | ||
113 | struct msm_sensor_ctrl sctrl; | ||
114 | struct platform_device *pdev; | ||
115 | uint8_t opencnt; | ||
116 | void *cropinfo; | ||
117 | int croplen; | ||
118 | unsigned pict_pp; | ||
119 | |||
120 | const char *apps_id; | ||
121 | |||
122 | struct mutex lock; | ||
123 | struct list_head list; | ||
124 | }; | ||
125 | |||
126 | #define MSM_APPS_ID_V4L2 "msm_v4l2" | ||
127 | #define MSM_APPS_ID_PROP "msm_qct" | ||
128 | |||
129 | struct msm_device { | ||
130 | struct msm_sync *sync; /* most-frequently accessed */ | ||
131 | struct device *device; | ||
132 | struct cdev cdev; | ||
133 | /* opened is meaningful only for the config and frame nodes, | ||
134 | * which may be opened only once. | ||
135 | */ | ||
136 | atomic_t opened; | ||
137 | }; | ||
138 | |||
139 | struct msm_control_device_queue { | ||
140 | spinlock_t ctrl_status_q_lock; | ||
141 | struct list_head ctrl_status_q; | ||
142 | wait_queue_head_t ctrl_status_wait; | ||
143 | }; | ||
144 | |||
145 | struct msm_control_device { | ||
146 | struct msm_device *pmsm; | ||
147 | |||
148 | /* This queue used by the config thread to send responses back to the | ||
149 | * control thread. It is accessed only from a process context. | ||
150 | */ | ||
151 | struct msm_control_device_queue ctrl_q; | ||
152 | }; | ||
153 | |||
154 | /* this structure is used in kernel */ | ||
155 | struct msm_queue_cmd { | ||
156 | struct list_head list; | ||
157 | enum msm_queue type; | ||
158 | void *command; | ||
159 | }; | ||
160 | |||
161 | struct register_address_value_pair { | ||
162 | uint16_t register_address; | ||
163 | uint16_t register_value; | ||
164 | }; | ||
165 | |||
166 | struct msm_pmem_region { | ||
167 | struct hlist_node list; | ||
168 | int type; | ||
169 | void *vaddr; | ||
170 | unsigned long paddr; | ||
171 | unsigned long len; | ||
172 | struct file *file; | ||
173 | uint32_t y_off; | ||
174 | uint32_t cbcr_off; | ||
175 | int fd; | ||
176 | uint8_t active; | ||
177 | }; | ||
178 | |||
179 | struct axidata { | ||
180 | uint32_t bufnum1; | ||
181 | uint32_t bufnum2; | ||
182 | struct msm_pmem_region *region; | ||
183 | }; | ||
184 | |||
185 | #ifdef CONFIG_MSM_CAMERA_FLASH | ||
186 | int msm_camera_flash_set_led_state(unsigned led_state); | ||
187 | #else | ||
188 | static inline int msm_camera_flash_set_led_state(unsigned led_state) | ||
189 | { | ||
190 | return -ENOTSUPP; | ||
191 | } | ||
192 | #endif | ||
193 | |||
194 | /* Below functions are added for V4L2 kernel APIs */ | ||
195 | struct msm_v4l2_driver { | ||
196 | struct msm_sync *sync; | ||
197 | int (*open)(struct msm_sync *, const char *apps_id); | ||
198 | int (*release)(struct msm_sync *); | ||
199 | int (*ctrl)(struct msm_sync *, struct msm_ctrl_cmd *); | ||
200 | int (*reg_pmem)(struct msm_sync *, struct msm_pmem_info *); | ||
201 | int (*get_frame) (struct msm_sync *, struct msm_frame *); | ||
202 | int (*put_frame) (struct msm_sync *, struct msm_frame *); | ||
203 | int (*get_pict) (struct msm_sync *, struct msm_ctrl_cmd *); | ||
204 | unsigned int (*drv_poll) (struct msm_sync *, struct file *, | ||
205 | struct poll_table_struct *); | ||
206 | }; | ||
207 | |||
208 | int msm_v4l2_register(struct msm_v4l2_driver *); | ||
209 | int msm_v4l2_unregister(struct msm_v4l2_driver *); | ||
210 | |||
211 | void msm_camvfe_init(void); | ||
212 | int msm_camvfe_check(void *); | ||
213 | void msm_camvfe_fn_init(struct msm_camvfe_fn *, void *); | ||
214 | int msm_camera_drv_start(struct platform_device *dev, | ||
215 | int (*sensor_probe)(const struct msm_camera_sensor_info *, | ||
216 | struct msm_sensor_ctrl *)); | ||
217 | |||
218 | enum msm_camio_clk_type { | ||
219 | CAMIO_VFE_MDC_CLK, | ||
220 | CAMIO_MDC_CLK, | ||
221 | CAMIO_VFE_CLK, | ||
222 | CAMIO_VFE_AXI_CLK, | ||
223 | |||
224 | CAMIO_MAX_CLK | ||
225 | }; | ||
226 | |||
227 | enum msm_camio_clk_src_type { | ||
228 | MSM_CAMIO_CLK_SRC_INTERNAL, | ||
229 | MSM_CAMIO_CLK_SRC_EXTERNAL, | ||
230 | MSM_CAMIO_CLK_SRC_MAX | ||
231 | }; | ||
232 | |||
233 | enum msm_s_test_mode { | ||
234 | S_TEST_OFF, | ||
235 | S_TEST_1, | ||
236 | S_TEST_2, | ||
237 | S_TEST_3 | ||
238 | }; | ||
239 | |||
240 | enum msm_s_resolution { | ||
241 | S_QTR_SIZE, | ||
242 | S_FULL_SIZE, | ||
243 | S_INVALID_SIZE | ||
244 | }; | ||
245 | |||
246 | enum msm_s_reg_update { | ||
247 | /* Sensor egisters that need to be updated during initialization */ | ||
248 | S_REG_INIT, | ||
249 | /* Sensor egisters that needs periodic I2C writes */ | ||
250 | S_UPDATE_PERIODIC, | ||
251 | /* All the sensor Registers will be updated */ | ||
252 | S_UPDATE_ALL, | ||
253 | /* Not valid update */ | ||
254 | S_UPDATE_INVALID | ||
255 | }; | ||
256 | |||
257 | enum msm_s_setting { | ||
258 | S_RES_PREVIEW, | ||
259 | S_RES_CAPTURE | ||
260 | }; | ||
261 | |||
262 | int msm_camio_enable(struct platform_device *dev); | ||
263 | |||
264 | int msm_camio_clk_enable(enum msm_camio_clk_type clk); | ||
265 | int msm_camio_clk_disable(enum msm_camio_clk_type clk); | ||
266 | int msm_camio_clk_config(uint32_t freq); | ||
267 | void msm_camio_clk_rate_set(int rate); | ||
268 | void msm_camio_clk_axi_rate_set(int rate); | ||
269 | |||
270 | void msm_camio_camif_pad_reg_reset(void); | ||
271 | void msm_camio_camif_pad_reg_reset_2(void); | ||
272 | |||
273 | void msm_camio_vfe_blk_reset(void); | ||
274 | |||
275 | void msm_camio_clk_sel(enum msm_camio_clk_src_type); | ||
276 | void msm_camio_disable(struct platform_device *); | ||
277 | int msm_camio_probe_on(struct platform_device *); | ||
278 | int msm_camio_probe_off(struct platform_device *); | ||
279 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/msm_adsp.h b/drivers/staging/dream/include/mach/msm_adsp.h new file mode 100644 index 000000000000..a081683328a3 --- /dev/null +++ b/drivers/staging/dream/include/mach/msm_adsp.h | |||
@@ -0,0 +1,112 @@ | |||
1 | /* include/asm-arm/arch-msm/msm_adsp.h | ||
2 | * | ||
3 | * Copyright (C) 2008 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM__ARCH_MSM_ADSP_H | ||
17 | #define __ASM__ARCH_MSM_ADSP_H | ||
18 | |||
19 | struct msm_adsp_module; | ||
20 | |||
21 | struct msm_adsp_ops { | ||
22 | /* event is called from interrupt context when a message | ||
23 | * arrives from the DSP. Use the provided function pointer | ||
24 | * to copy the message into a local buffer. Do NOT call | ||
25 | * it multiple times. | ||
26 | */ | ||
27 | void (*event)(void *driver_data, unsigned id, size_t len, | ||
28 | void (*getevent)(void *ptr, size_t len)); | ||
29 | }; | ||
30 | |||
31 | /* Get, Put, Enable, and Disable are synchronous and must only | ||
32 | * be called from thread context. Enable and Disable will block | ||
33 | * up to one second in the event of a fatal DSP error but are | ||
34 | * much faster otherwise. | ||
35 | */ | ||
36 | int msm_adsp_get(const char *name, struct msm_adsp_module **module, | ||
37 | struct msm_adsp_ops *ops, void *driver_data); | ||
38 | void msm_adsp_put(struct msm_adsp_module *module); | ||
39 | int msm_adsp_enable(struct msm_adsp_module *module); | ||
40 | int msm_adsp_disable(struct msm_adsp_module *module); | ||
41 | int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate); | ||
42 | |||
43 | /* Write is safe to call from interrupt context. | ||
44 | */ | ||
45 | int msm_adsp_write(struct msm_adsp_module *module, | ||
46 | unsigned queue_id, | ||
47 | void *data, size_t len); | ||
48 | |||
49 | #if CONFIG_MSM_AMSS_VERSION >= 6350 | ||
50 | /* Command Queue Indexes */ | ||
51 | #define QDSP_lpmCommandQueue 0 | ||
52 | #define QDSP_mpuAfeQueue 1 | ||
53 | #define QDSP_mpuGraphicsCmdQueue 2 | ||
54 | #define QDSP_mpuModmathCmdQueue 3 | ||
55 | #define QDSP_mpuVDecCmdQueue 4 | ||
56 | #define QDSP_mpuVDecPktQueue 5 | ||
57 | #define QDSP_mpuVEncCmdQueue 6 | ||
58 | #define QDSP_rxMpuDecCmdQueue 7 | ||
59 | #define QDSP_rxMpuDecPktQueue 8 | ||
60 | #define QDSP_txMpuEncQueue 9 | ||
61 | #define QDSP_uPAudPPCmd1Queue 10 | ||
62 | #define QDSP_uPAudPPCmd2Queue 11 | ||
63 | #define QDSP_uPAudPPCmd3Queue 12 | ||
64 | #define QDSP_uPAudPlay0BitStreamCtrlQueue 13 | ||
65 | #define QDSP_uPAudPlay1BitStreamCtrlQueue 14 | ||
66 | #define QDSP_uPAudPlay2BitStreamCtrlQueue 15 | ||
67 | #define QDSP_uPAudPlay3BitStreamCtrlQueue 16 | ||
68 | #define QDSP_uPAudPlay4BitStreamCtrlQueue 17 | ||
69 | #define QDSP_uPAudPreProcCmdQueue 18 | ||
70 | #define QDSP_uPAudRecBitStreamQueue 19 | ||
71 | #define QDSP_uPAudRecCmdQueue 20 | ||
72 | #define QDSP_uPDiagQueue 21 | ||
73 | #define QDSP_uPJpegActionCmdQueue 22 | ||
74 | #define QDSP_uPJpegCfgCmdQueue 23 | ||
75 | #define QDSP_uPVocProcQueue 24 | ||
76 | #define QDSP_vfeCommandQueue 25 | ||
77 | #define QDSP_vfeCommandScaleQueue 26 | ||
78 | #define QDSP_vfeCommandTableQueue 27 | ||
79 | #define QDSP_MAX_NUM_QUEUES 28 | ||
80 | #else | ||
81 | /* Command Queue Indexes */ | ||
82 | #define QDSP_lpmCommandQueue 0 | ||
83 | #define QDSP_mpuAfeQueue 1 | ||
84 | #define QDSP_mpuGraphicsCmdQueue 2 | ||
85 | #define QDSP_mpuModmathCmdQueue 3 | ||
86 | #define QDSP_mpuVDecCmdQueue 4 | ||
87 | #define QDSP_mpuVDecPktQueue 5 | ||
88 | #define QDSP_mpuVEncCmdQueue 6 | ||
89 | #define QDSP_rxMpuDecCmdQueue 7 | ||
90 | #define QDSP_rxMpuDecPktQueue 8 | ||
91 | #define QDSP_txMpuEncQueue 9 | ||
92 | #define QDSP_uPAudPPCmd1Queue 10 | ||
93 | #define QDSP_uPAudPPCmd2Queue 11 | ||
94 | #define QDSP_uPAudPPCmd3Queue 12 | ||
95 | #define QDSP_uPAudPlay0BitStreamCtrlQueue 13 | ||
96 | #define QDSP_uPAudPlay1BitStreamCtrlQueue 14 | ||
97 | #define QDSP_uPAudPlay2BitStreamCtrlQueue 15 | ||
98 | #define QDSP_uPAudPlay3BitStreamCtrlQueue 16 | ||
99 | #define QDSP_uPAudPlay4BitStreamCtrlQueue 17 | ||
100 | #define QDSP_uPAudPreProcCmdQueue 18 | ||
101 | #define QDSP_uPAudRecBitStreamQueue 19 | ||
102 | #define QDSP_uPAudRecCmdQueue 20 | ||
103 | #define QDSP_uPJpegActionCmdQueue 21 | ||
104 | #define QDSP_uPJpegCfgCmdQueue 22 | ||
105 | #define QDSP_uPVocProcQueue 23 | ||
106 | #define QDSP_vfeCommandQueue 24 | ||
107 | #define QDSP_vfeCommandScaleQueue 25 | ||
108 | #define QDSP_vfeCommandTableQueue 26 | ||
109 | #define QDSP_QUEUE_MAX 26 | ||
110 | #endif | ||
111 | |||
112 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/msm_rpcrouter.h b/drivers/staging/dream/include/mach/msm_rpcrouter.h new file mode 100644 index 000000000000..9724ece1c97c --- /dev/null +++ b/drivers/staging/dream/include/mach/msm_rpcrouter.h | |||
@@ -0,0 +1,179 @@ | |||
1 | /** include/asm-arm/arch-msm/msm_rpcrouter.h | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * Copyright (c) 2007-2009 QUALCOMM Incorporated | ||
5 | * Author: San Mehat <san@android.com> | ||
6 | * | ||
7 | * This software is licensed under the terms of the GNU General Public | ||
8 | * License version 2, as published by the Free Software Foundation, and | ||
9 | * may be copied, distributed, and modified under those terms. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM__ARCH_MSM_RPCROUTER_H | ||
19 | #define __ASM__ARCH_MSM_RPCROUTER_H | ||
20 | |||
21 | #include <linux/types.h> | ||
22 | #include <linux/list.h> | ||
23 | #include <linux/platform_device.h> | ||
24 | |||
25 | #if CONFIG_MSM_AMSS_VERSION >= 6350 | ||
26 | /* RPC API version structure | ||
27 | * Version bit 31 : 1->hashkey versioning, | ||
28 | * 0->major-minor (backward compatible) versioning | ||
29 | * hashkey versioning: | ||
30 | * Version bits 31-0 hashkey | ||
31 | * major-minor (backward compatible) versioning | ||
32 | * Version bits 30-28 reserved (no match) | ||
33 | * Version bits 27-16 major (must match) | ||
34 | * Version bits 15-0 minor (greater or equal) | ||
35 | */ | ||
36 | #define RPC_VERSION_MODE_MASK 0x80000000 | ||
37 | #define RPC_VERSION_MAJOR_MASK 0x0fff0000 | ||
38 | #define RPC_VERSION_MAJOR_OFFSET 16 | ||
39 | #define RPC_VERSION_MINOR_MASK 0x0000ffff | ||
40 | |||
41 | #define MSM_RPC_VERS(major, minor) \ | ||
42 | ((uint32_t)((((major) << RPC_VERSION_MAJOR_OFFSET) & \ | ||
43 | RPC_VERSION_MAJOR_MASK) | \ | ||
44 | ((minor) & RPC_VERSION_MINOR_MASK))) | ||
45 | #define MSM_RPC_GET_MAJOR(vers) (((vers) & RPC_VERSION_MAJOR_MASK) >> \ | ||
46 | RPC_VERSION_MAJOR_OFFSET) | ||
47 | #define MSM_RPC_GET_MINOR(vers) ((vers) & RPC_VERSION_MINOR_MASK) | ||
48 | #else | ||
49 | #define MSM_RPC_VERS(major, minor) (major) | ||
50 | #define MSM_RPC_GET_MAJOR(vers) (vers) | ||
51 | #define MSM_RPC_GET_MINOR(vers) 0 | ||
52 | #endif | ||
53 | |||
54 | struct msm_rpc_endpoint; | ||
55 | |||
56 | struct rpcsvr_platform_device | ||
57 | { | ||
58 | struct platform_device base; | ||
59 | uint32_t prog; | ||
60 | uint32_t vers; | ||
61 | }; | ||
62 | |||
63 | #define RPC_DATA_IN 0 | ||
64 | /* | ||
65 | * Structures for sending / receiving direct RPC requests | ||
66 | * XXX: Any cred/verif lengths > 0 not supported | ||
67 | */ | ||
68 | |||
69 | struct rpc_request_hdr | ||
70 | { | ||
71 | uint32_t xid; | ||
72 | uint32_t type; /* 0 */ | ||
73 | uint32_t rpc_vers; /* 2 */ | ||
74 | uint32_t prog; | ||
75 | uint32_t vers; | ||
76 | uint32_t procedure; | ||
77 | uint32_t cred_flavor; | ||
78 | uint32_t cred_length; | ||
79 | uint32_t verf_flavor; | ||
80 | uint32_t verf_length; | ||
81 | }; | ||
82 | |||
83 | typedef struct | ||
84 | { | ||
85 | uint32_t low; | ||
86 | uint32_t high; | ||
87 | } rpc_reply_progmismatch_data; | ||
88 | |||
89 | typedef struct | ||
90 | { | ||
91 | } rpc_denied_reply_hdr; | ||
92 | |||
93 | typedef struct | ||
94 | { | ||
95 | uint32_t verf_flavor; | ||
96 | uint32_t verf_length; | ||
97 | uint32_t accept_stat; | ||
98 | #define RPC_ACCEPTSTAT_SUCCESS 0 | ||
99 | #define RPC_ACCEPTSTAT_PROG_UNAVAIL 1 | ||
100 | #define RPC_ACCEPTSTAT_PROG_MISMATCH 2 | ||
101 | #define RPC_ACCEPTSTAT_PROC_UNAVAIL 3 | ||
102 | #define RPC_ACCEPTSTAT_GARBAGE_ARGS 4 | ||
103 | #define RPC_ACCEPTSTAT_SYSTEM_ERR 5 | ||
104 | #define RPC_ACCEPTSTAT_PROG_LOCKED 6 | ||
105 | /* | ||
106 | * Following data is dependant on accept_stat | ||
107 | * If ACCEPTSTAT == PROG_MISMATCH then there is a | ||
108 | * 'rpc_reply_progmismatch_data' structure following the header. | ||
109 | * Otherwise the data is procedure specific | ||
110 | */ | ||
111 | } rpc_accepted_reply_hdr; | ||
112 | |||
113 | struct rpc_reply_hdr | ||
114 | { | ||
115 | uint32_t xid; | ||
116 | uint32_t type; | ||
117 | uint32_t reply_stat; | ||
118 | #define RPCMSG_REPLYSTAT_ACCEPTED 0 | ||
119 | #define RPCMSG_REPLYSTAT_DENIED 1 | ||
120 | union { | ||
121 | rpc_accepted_reply_hdr acc_hdr; | ||
122 | rpc_denied_reply_hdr dny_hdr; | ||
123 | } data; | ||
124 | }; | ||
125 | |||
126 | /* flags for msm_rpc_connect() */ | ||
127 | #define MSM_RPC_UNINTERRUPTIBLE 0x0001 | ||
128 | |||
129 | /* use IS_ERR() to check for failure */ | ||
130 | struct msm_rpc_endpoint *msm_rpc_open(void); | ||
131 | /* Connect with the specified server version */ | ||
132 | struct msm_rpc_endpoint *msm_rpc_connect(uint32_t prog, uint32_t vers, unsigned flags); | ||
133 | uint32_t msm_rpc_get_vers(struct msm_rpc_endpoint *ept); | ||
134 | /* check if server version can handle client requested version */ | ||
135 | int msm_rpc_is_compatible_version(uint32_t server_version, | ||
136 | uint32_t client_version); | ||
137 | |||
138 | int msm_rpc_close(struct msm_rpc_endpoint *ept); | ||
139 | int msm_rpc_write(struct msm_rpc_endpoint *ept, | ||
140 | void *data, int len); | ||
141 | int msm_rpc_read(struct msm_rpc_endpoint *ept, | ||
142 | void **data, unsigned len, long timeout); | ||
143 | void msm_rpc_setup_req(struct rpc_request_hdr *hdr, | ||
144 | uint32_t prog, uint32_t vers, uint32_t proc); | ||
145 | int msm_rpc_register_server(struct msm_rpc_endpoint *ept, | ||
146 | uint32_t prog, uint32_t vers); | ||
147 | int msm_rpc_unregister_server(struct msm_rpc_endpoint *ept, | ||
148 | uint32_t prog, uint32_t vers); | ||
149 | |||
150 | /* simple blocking rpc call | ||
151 | * | ||
152 | * request is mandatory and must have a rpc_request_hdr | ||
153 | * at the start. The header will be filled out for you. | ||
154 | * | ||
155 | * reply provides a buffer for replies of reply_max_size | ||
156 | */ | ||
157 | int msm_rpc_call_reply(struct msm_rpc_endpoint *ept, uint32_t proc, | ||
158 | void *request, int request_size, | ||
159 | void *reply, int reply_max_size, | ||
160 | long timeout); | ||
161 | int msm_rpc_call(struct msm_rpc_endpoint *ept, uint32_t proc, | ||
162 | void *request, int request_size, | ||
163 | long timeout); | ||
164 | |||
165 | struct msm_rpc_server | ||
166 | { | ||
167 | struct list_head list; | ||
168 | uint32_t flags; | ||
169 | |||
170 | uint32_t prog; | ||
171 | uint32_t vers; | ||
172 | |||
173 | int (*rpc_call)(struct msm_rpc_server *server, | ||
174 | struct rpc_request_hdr *req, unsigned len); | ||
175 | }; | ||
176 | |||
177 | int msm_rpc_create_server(struct msm_rpc_server *server); | ||
178 | |||
179 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/msm_smd.h b/drivers/staging/dream/include/mach/msm_smd.h new file mode 100644 index 000000000000..bdf7731ab680 --- /dev/null +++ b/drivers/staging/dream/include/mach/msm_smd.h | |||
@@ -0,0 +1,107 @@ | |||
1 | /* linux/include/asm-arm/arch-msm/msm_smd.h | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * Author: Brian Swetland <swetland@google.com> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_MSM_SMD_H | ||
18 | #define __ASM_ARCH_MSM_SMD_H | ||
19 | |||
20 | typedef struct smd_channel smd_channel_t; | ||
21 | |||
22 | /* warning: notify() may be called before open returns */ | ||
23 | int smd_open(const char *name, smd_channel_t **ch, void *priv, | ||
24 | void (*notify)(void *priv, unsigned event)); | ||
25 | |||
26 | #define SMD_EVENT_DATA 1 | ||
27 | #define SMD_EVENT_OPEN 2 | ||
28 | #define SMD_EVENT_CLOSE 3 | ||
29 | |||
30 | int smd_close(smd_channel_t *ch); | ||
31 | |||
32 | /* passing a null pointer for data reads and discards */ | ||
33 | int smd_read(smd_channel_t *ch, void *data, int len); | ||
34 | |||
35 | /* Write to stream channels may do a partial write and return | ||
36 | ** the length actually written. | ||
37 | ** Write to packet channels will never do a partial write -- | ||
38 | ** it will return the requested length written or an error. | ||
39 | */ | ||
40 | int smd_write(smd_channel_t *ch, const void *data, int len); | ||
41 | |||
42 | int smd_write_avail(smd_channel_t *ch); | ||
43 | int smd_read_avail(smd_channel_t *ch); | ||
44 | |||
45 | /* Returns the total size of the current packet being read. | ||
46 | ** Returns 0 if no packets available or a stream channel. | ||
47 | */ | ||
48 | int smd_cur_packet_size(smd_channel_t *ch); | ||
49 | |||
50 | /* used for tty unthrottling and the like -- causes the notify() | ||
51 | ** callback to be called from the same lock context as is used | ||
52 | ** when it is called from channel updates | ||
53 | */ | ||
54 | void smd_kick(smd_channel_t *ch); | ||
55 | |||
56 | |||
57 | #if 0 | ||
58 | /* these are interruptable waits which will block you until the specified | ||
59 | ** number of bytes are readable or writable. | ||
60 | */ | ||
61 | int smd_wait_until_readable(smd_channel_t *ch, int bytes); | ||
62 | int smd_wait_until_writable(smd_channel_t *ch, int bytes); | ||
63 | #endif | ||
64 | |||
65 | typedef enum | ||
66 | { | ||
67 | SMD_PORT_DS = 0, | ||
68 | SMD_PORT_DIAG, | ||
69 | SMD_PORT_RPC_CALL, | ||
70 | SMD_PORT_RPC_REPLY, | ||
71 | SMD_PORT_BT, | ||
72 | SMD_PORT_CONTROL, | ||
73 | SMD_PORT_MEMCPY_SPARE1, | ||
74 | SMD_PORT_DATA1, | ||
75 | SMD_PORT_DATA2, | ||
76 | SMD_PORT_DATA3, | ||
77 | SMD_PORT_DATA4, | ||
78 | SMD_PORT_DATA5, | ||
79 | SMD_PORT_DATA6, | ||
80 | SMD_PORT_DATA7, | ||
81 | SMD_PORT_DATA8, | ||
82 | SMD_PORT_DATA9, | ||
83 | SMD_PORT_DATA10, | ||
84 | SMD_PORT_DATA11, | ||
85 | SMD_PORT_DATA12, | ||
86 | SMD_PORT_DATA13, | ||
87 | SMD_PORT_DATA14, | ||
88 | SMD_PORT_DATA15, | ||
89 | SMD_PORT_DATA16, | ||
90 | SMD_PORT_DATA17, | ||
91 | SMD_PORT_DATA18, | ||
92 | SMD_PORT_DATA19, | ||
93 | SMD_PORT_DATA20, | ||
94 | SMD_PORT_GPS_NMEA, | ||
95 | SMD_PORT_BRIDGE_1, | ||
96 | SMD_PORT_BRIDGE_2, | ||
97 | SMD_PORT_BRIDGE_3, | ||
98 | SMD_PORT_BRIDGE_4, | ||
99 | SMD_PORT_BRIDGE_5, | ||
100 | SMD_PORT_LOOPBACK, | ||
101 | SMD_PORT_CS_APPS_MODEM, | ||
102 | SMD_PORT_CS_APPS_DSP, | ||
103 | SMD_PORT_CS_MODEM_DSP, | ||
104 | SMD_NUM_PORTS, | ||
105 | } smd_port_id_type; | ||
106 | |||
107 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h new file mode 100644 index 000000000000..0b6a31259bb0 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaycmdi.h | |||
@@ -0,0 +1,94 @@ | |||
1 | #ifndef QDSP5AUDPLAYCMDI_H | ||
2 | #define QDSP5AUDPLAYCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | Q D S P 5 A U D I O P L A Y T A S K C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | Command Interface for AUDPLAYTASK on QDSP5 | ||
10 | |||
11 | REFERENCES | ||
12 | None | ||
13 | |||
14 | EXTERNALIZED FUNCTIONS | ||
15 | |||
16 | audplay_cmd_dec_data_avail | ||
17 | Send buffer to AUDPLAY task | ||
18 | |||
19 | |||
20 | Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated. | ||
21 | |||
22 | This software is licensed under the terms of the GNU General Public | ||
23 | License version 2, as published by the Free Software Foundation, and | ||
24 | may be copied, distributed, and modified under those terms. | ||
25 | |||
26 | This program is distributed in the hope that it will be useful, | ||
27 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
28 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
29 | GNU General Public License for more details. | ||
30 | |||
31 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
32 | /*=========================================================================== | ||
33 | |||
34 | EDIT HISTORY FOR FILE | ||
35 | |||
36 | This section contains comments describing changes made to this file. | ||
37 | Notice that changes are listed in reverse chronological order. | ||
38 | |||
39 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audplaycmdi.h#2 $ | ||
40 | |||
41 | ===========================================================================*/ | ||
42 | |||
43 | #define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL 0x0000 | ||
44 | #define AUDPLAY_CMD_BITSTREAM_DATA_AVAIL_LEN \ | ||
45 | sizeof(audplay_cmd_bitstream_data_avail) | ||
46 | |||
47 | /* Type specification of dec_data_avail message sent to AUDPLAYTASK | ||
48 | */ | ||
49 | typedef struct { | ||
50 | /*command ID*/ | ||
51 | unsigned int cmd_id; | ||
52 | |||
53 | /* Decoder ID for which message is being sent */ | ||
54 | unsigned int decoder_id; | ||
55 | |||
56 | /* Start address of data in ARM global memory */ | ||
57 | unsigned int buf_ptr; | ||
58 | |||
59 | /* Number of 16-bit words of bit-stream data contiguously available at the | ||
60 | * above-mentioned address. */ | ||
61 | unsigned int buf_size; | ||
62 | |||
63 | /* Partition number used by audPlayTask to communicate with DSP's RTOS | ||
64 | * kernel */ | ||
65 | unsigned int partition_number; | ||
66 | } __attribute__((packed)) audplay_cmd_bitstream_data_avail; | ||
67 | |||
68 | #define AUDPLAY_CMD_HPCM_BUF_CFG 0x0003 | ||
69 | #define AUDPLAY_CMD_HPCM_BUF_CFG_LEN \ | ||
70 | sizeof(struct audplay_cmd_hpcm_buf_cfg) | ||
71 | |||
72 | struct audplay_cmd_hpcm_buf_cfg { | ||
73 | unsigned int cmd_id; | ||
74 | unsigned int hostpcm_config; | ||
75 | unsigned int feedback_frequency; | ||
76 | unsigned int byte_swap; | ||
77 | unsigned int max_buffers; | ||
78 | unsigned int partition_number; | ||
79 | } __attribute__((packed)); | ||
80 | |||
81 | #define AUDPLAY_CMD_BUFFER_REFRESH 0x0004 | ||
82 | #define AUDPLAY_CMD_BUFFER_REFRESH_LEN \ | ||
83 | sizeof(struct audplay_cmd_buffer_update) | ||
84 | |||
85 | struct audplay_cmd_buffer_refresh { | ||
86 | unsigned int cmd_id; | ||
87 | unsigned int num_buffers; | ||
88 | unsigned int buf_read_count; | ||
89 | unsigned int buf0_address; | ||
90 | unsigned int buf0_length; | ||
91 | unsigned int buf1_address; | ||
92 | unsigned int buf1_length; | ||
93 | } __attribute__((packed)); | ||
94 | #endif /* QDSP5AUDPLAYCMD_H */ | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h new file mode 100644 index 000000000000..c63034b8bf13 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audplaymsg.h | |||
@@ -0,0 +1,70 @@ | |||
1 | #ifndef QDSP5AUDPLAYMSG_H | ||
2 | #define QDSP5AUDPLAYMSG_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | Q D S P 5 A U D I O P L A Y T A S K M S G | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | Message sent by AUDPLAY task | ||
10 | |||
11 | REFERENCES | ||
12 | None | ||
13 | |||
14 | |||
15 | Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated. | ||
16 | |||
17 | This software is licensed under the terms of the GNU General Public | ||
18 | License version 2, as published by the Free Software Foundation, and | ||
19 | may be copied, distributed, and modified under those terms. | ||
20 | |||
21 | This program is distributed in the hope that it will be useful, | ||
22 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
23 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
24 | GNU General Public License for more details. | ||
25 | |||
26 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
27 | /*=========================================================================== | ||
28 | |||
29 | EDIT HISTORY FOR FILE | ||
30 | |||
31 | This section contains comments describing changes made to this file. | ||
32 | Notice that changes are listed in reverse chronological order. | ||
33 | |||
34 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audplaymsg.h#3 $ | ||
35 | |||
36 | ===========================================================================*/ | ||
37 | #define AUDPLAY_MSG_DEC_NEEDS_DATA 0x0001 | ||
38 | #define AUDPLAY_MSG_DEC_NEEDS_DATA_MSG_LEN \ | ||
39 | sizeof(audplay_msg_dec_needs_data) | ||
40 | |||
41 | typedef struct{ | ||
42 | /* reserved*/ | ||
43 | unsigned int dec_id; | ||
44 | |||
45 | /* The read pointer offset of external memory until which the | ||
46 | * bitstream has been DMAed in. */ | ||
47 | unsigned int adecDataReadPtrOffset; | ||
48 | |||
49 | /* The buffer size of external memory. */ | ||
50 | unsigned int adecDataBufSize; | ||
51 | |||
52 | unsigned int bitstream_free_len; | ||
53 | unsigned int bitstream_write_ptr; | ||
54 | unsigned int bitstarem_buf_start; | ||
55 | unsigned int bitstream_buf_len; | ||
56 | } __attribute__((packed)) audplay_msg_dec_needs_data; | ||
57 | |||
58 | #define AUDPLAY_MSG_BUFFER_UPDATE 0x0004 | ||
59 | #define AUDPLAY_MSG_BUFFER_UPDATE_LEN \ | ||
60 | sizeof(struct audplay_msg_buffer_update) | ||
61 | |||
62 | struct audplay_msg_buffer_update { | ||
63 | unsigned int buffer_write_count; | ||
64 | unsigned int num_of_buffer; | ||
65 | unsigned int buf0_address; | ||
66 | unsigned int buf0_length; | ||
67 | unsigned int buf1_address; | ||
68 | unsigned int buf1_length; | ||
69 | } __attribute__((packed)); | ||
70 | #endif /* QDSP5AUDPLAYMSG_H */ | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h new file mode 100644 index 000000000000..8bee9c62980b --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppcmdi.h | |||
@@ -0,0 +1,914 @@ | |||
1 | #ifndef QDSP5AUDPPCMDI_H | ||
2 | #define QDSP5AUDPPCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | A U D I O P O S T P R O C E S S I N G I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by AUDPP Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppcmdi.h#2 $ | ||
38 | |||
39 | ===========================================================================*/ | ||
40 | |||
41 | /* | ||
42 | * ARM to AUDPPTASK Commands | ||
43 | * | ||
44 | * ARM uses three command queues to communicate with AUDPPTASK | ||
45 | * 1)uPAudPPCmd1Queue : Used for more frequent and shorter length commands | ||
46 | * Location : MEMA | ||
47 | * Buffer Size : 6 words | ||
48 | * No of buffers in a queue : 20 for gaming audio and 5 for other images | ||
49 | * 2)uPAudPPCmd2Queue : Used for commands which are not much lengthier | ||
50 | * Location : MEMA | ||
51 | * Buffer Size : 23 | ||
52 | * No of buffers in a queue : 2 | ||
53 | * 3)uPAudOOCmd3Queue : Used for lengthier and more frequent commands | ||
54 | * Location : MEMA | ||
55 | * Buffer Size : 145 | ||
56 | * No of buffers in a queue : 3 | ||
57 | */ | ||
58 | |||
59 | /* | ||
60 | * Commands Related to uPAudPPCmd1Queue | ||
61 | */ | ||
62 | |||
63 | /* | ||
64 | * Command Structure to enable or disable the active decoders | ||
65 | */ | ||
66 | |||
67 | #define AUDPP_CMD_CFG_DEC_TYPE 0x0001 | ||
68 | #define AUDPP_CMD_CFG_DEC_TYPE_LEN sizeof(audpp_cmd_cfg_dec_type) | ||
69 | |||
70 | /* Enable the decoder */ | ||
71 | #define AUDPP_CMD_DEC_TYPE_M 0x000F | ||
72 | |||
73 | #define AUDPP_CMD_ENA_DEC_V 0x4000 | ||
74 | #define AUDPP_CMD_DIS_DEC_V 0x0000 | ||
75 | #define AUDPP_CMD_DEC_STATE_M 0x4000 | ||
76 | |||
77 | #define AUDPP_CMD_UPDATDE_CFG_DEC 0x8000 | ||
78 | #define AUDPP_CMD_DONT_UPDATE_CFG_DEC 0x0000 | ||
79 | |||
80 | |||
81 | /* Type specification of cmd_cfg_dec */ | ||
82 | |||
83 | typedef struct { | ||
84 | unsigned short cmd_id; | ||
85 | unsigned short dec0_cfg; | ||
86 | unsigned short dec1_cfg; | ||
87 | unsigned short dec2_cfg; | ||
88 | unsigned short dec3_cfg; | ||
89 | unsigned short dec4_cfg; | ||
90 | } __attribute__((packed)) audpp_cmd_cfg_dec_type; | ||
91 | |||
92 | /* | ||
93 | * Command Structure to Pause , Resume and flushes the selected audio decoders | ||
94 | */ | ||
95 | |||
96 | #define AUDPP_CMD_DEC_CTRL 0x0002 | ||
97 | #define AUDPP_CMD_DEC_CTRL_LEN sizeof(audpp_cmd_dec_ctrl) | ||
98 | |||
99 | /* Decoder control commands for pause, resume and flush */ | ||
100 | #define AUDPP_CMD_FLUSH_V 0x2000 | ||
101 | |||
102 | #define AUDPP_CMD_PAUSE_V 0x4000 | ||
103 | #define AUDPP_CMD_RESUME_V 0x0000 | ||
104 | |||
105 | #define AUDPP_CMD_UPDATE_V 0x8000 | ||
106 | #define AUDPP_CMD_IGNORE_V 0x0000 | ||
107 | |||
108 | |||
109 | /* Type Spec for decoder control command*/ | ||
110 | |||
111 | typedef struct { | ||
112 | unsigned short cmd_id; | ||
113 | unsigned short dec0_ctrl; | ||
114 | unsigned short dec1_ctrl; | ||
115 | unsigned short dec2_ctrl; | ||
116 | unsigned short dec3_ctrl; | ||
117 | unsigned short dec4_ctrl; | ||
118 | } __attribute__((packed)) audpp_cmd_dec_ctrl; | ||
119 | |||
120 | /* | ||
121 | * Command Structure to Configure the AVSync FeedBack Mechanism | ||
122 | */ | ||
123 | |||
124 | #define AUDPP_CMD_AVSYNC 0x0003 | ||
125 | #define AUDPP_CMD_AVSYNC_LEN sizeof(audpp_cmd_avsync) | ||
126 | |||
127 | typedef struct { | ||
128 | unsigned short cmd_id; | ||
129 | unsigned short object_number; | ||
130 | unsigned short interrupt_interval_lsw; | ||
131 | unsigned short interrupt_interval_msw; | ||
132 | } __attribute__((packed)) audpp_cmd_avsync; | ||
133 | |||
134 | /* | ||
135 | * Command Structure to enable or disable(sleep) the AUDPPTASK | ||
136 | */ | ||
137 | |||
138 | #define AUDPP_CMD_CFG 0x0004 | ||
139 | #define AUDPP_CMD_CFG_LEN sizeof(audpp_cmd_cfg) | ||
140 | |||
141 | #define AUDPP_CMD_CFG_SLEEP 0x0000 | ||
142 | #define AUDPP_CMD_CFG_ENABLE 0xFFFF | ||
143 | |||
144 | typedef struct { | ||
145 | unsigned short cmd_id; | ||
146 | unsigned short cfg; | ||
147 | } __attribute__((packed)) audpp_cmd_cfg; | ||
148 | |||
149 | /* | ||
150 | * Command Structure to Inject or drop the specified no of samples | ||
151 | */ | ||
152 | |||
153 | #define AUDPP_CMD_ADJUST_SAMP 0x0005 | ||
154 | #define AUDPP_CMD_ADJUST_SAMP_LEN sizeof(audpp_cmd_adjust_samp) | ||
155 | |||
156 | #define AUDPP_CMD_SAMP_DROP -1 | ||
157 | #define AUDPP_CMD_SAMP_INSERT 0x0001 | ||
158 | |||
159 | #define AUDPP_CMD_NUM_SAMPLES 0x0001 | ||
160 | |||
161 | typedef struct { | ||
162 | unsigned short cmd_id; | ||
163 | unsigned short object_no; | ||
164 | signed short sample_insert_or_drop; | ||
165 | unsigned short num_samples; | ||
166 | } __attribute__((packed)) audpp_cmd_adjust_samp; | ||
167 | |||
168 | /* | ||
169 | * Command Structure to Configure AVSync Feedback Mechanism | ||
170 | */ | ||
171 | |||
172 | #define AUDPP_CMD_AVSYNC_CMD_2 0x0006 | ||
173 | #define AUDPP_CMD_AVSYNC_CMD_2_LEN sizeof(audpp_cmd_avsync_cmd_2) | ||
174 | |||
175 | typedef struct { | ||
176 | unsigned short cmd_id; | ||
177 | unsigned short object_number; | ||
178 | unsigned short interrupt_interval_lsw; | ||
179 | unsigned short interrupt_interval_msw; | ||
180 | unsigned short sample_counter_dlsw; | ||
181 | unsigned short sample_counter_dmsw; | ||
182 | unsigned short sample_counter_msw; | ||
183 | unsigned short byte_counter_dlsw; | ||
184 | unsigned short byte_counter_dmsw; | ||
185 | unsigned short byte_counter_msw; | ||
186 | } __attribute__((packed)) audpp_cmd_avsync_cmd_2; | ||
187 | |||
188 | /* | ||
189 | * Command Structure to Configure AVSync Feedback Mechanism | ||
190 | */ | ||
191 | |||
192 | #define AUDPP_CMD_AVSYNC_CMD_3 0x0007 | ||
193 | #define AUDPP_CMD_AVSYNC_CMD_3_LEN sizeof(audpp_cmd_avsync_cmd_3) | ||
194 | |||
195 | typedef struct { | ||
196 | unsigned short cmd_id; | ||
197 | unsigned short object_number; | ||
198 | unsigned short interrupt_interval_lsw; | ||
199 | unsigned short interrupt_interval_msw; | ||
200 | unsigned short sample_counter_dlsw; | ||
201 | unsigned short sample_counter_dmsw; | ||
202 | unsigned short sample_counter_msw; | ||
203 | unsigned short byte_counter_dlsw; | ||
204 | unsigned short byte_counter_dmsw; | ||
205 | unsigned short byte_counter_msw; | ||
206 | } __attribute__((packed)) audpp_cmd_avsync_cmd_3; | ||
207 | |||
208 | #define AUDPP_CMD_ROUTING_MODE 0x0008 | ||
209 | #define AUDPP_CMD_ROUTING_MODE_LEN \ | ||
210 | sizeof(struct audpp_cmd_routing_mode) | ||
211 | |||
212 | struct audpp_cmd_routing_mode { | ||
213 | unsigned short cmd_id; | ||
214 | unsigned short object_number; | ||
215 | unsigned short routing_mode; | ||
216 | } __attribute__((packed)); | ||
217 | |||
218 | /* | ||
219 | * Commands Related to uPAudPPCmd2Queue | ||
220 | */ | ||
221 | |||
222 | /* | ||
223 | * Command Structure to configure Per decoder Parameters (Common) | ||
224 | */ | ||
225 | |||
226 | #define AUDPP_CMD_CFG_ADEC_PARAMS 0x0000 | ||
227 | #define AUDPP_CMD_CFG_ADEC_PARAMS_COMMON_LEN \ | ||
228 | sizeof(audpp_cmd_cfg_adec_params_common) | ||
229 | |||
230 | #define AUDPP_CMD_STATUS_MSG_FLAG_ENA_FCM 0x4000 | ||
231 | #define AUDPP_CMD_STATUS_MSG_FLAG_DIS_FCM 0x0000 | ||
232 | |||
233 | #define AUDPP_CMD_STATUS_MSG_FLAG_ENA_DCM 0x8000 | ||
234 | #define AUDPP_CMD_STATUS_MSG_FLAG_DIS_DCM 0x0000 | ||
235 | |||
236 | /* Sampling frequency*/ | ||
237 | #define AUDPP_CMD_SAMP_RATE_96000 0x0000 | ||
238 | #define AUDPP_CMD_SAMP_RATE_88200 0x0001 | ||
239 | #define AUDPP_CMD_SAMP_RATE_64000 0x0002 | ||
240 | #define AUDPP_CMD_SAMP_RATE_48000 0x0003 | ||
241 | #define AUDPP_CMD_SAMP_RATE_44100 0x0004 | ||
242 | #define AUDPP_CMD_SAMP_RATE_32000 0x0005 | ||
243 | #define AUDPP_CMD_SAMP_RATE_24000 0x0006 | ||
244 | #define AUDPP_CMD_SAMP_RATE_22050 0x0007 | ||
245 | #define AUDPP_CMD_SAMP_RATE_16000 0x0008 | ||
246 | #define AUDPP_CMD_SAMP_RATE_12000 0x0009 | ||
247 | #define AUDPP_CMD_SAMP_RATE_11025 0x000A | ||
248 | #define AUDPP_CMD_SAMP_RATE_8000 0x000B | ||
249 | |||
250 | |||
251 | /* | ||
252 | * Type specification of cmd_adec_cfg sent to all decoder | ||
253 | */ | ||
254 | |||
255 | typedef struct { | ||
256 | unsigned short cmd_id; | ||
257 | unsigned short length; | ||
258 | unsigned short dec_id; | ||
259 | unsigned short status_msg_flag; | ||
260 | unsigned short decoder_frame_counter_msg_period; | ||
261 | unsigned short input_sampling_frequency; | ||
262 | } __attribute__((packed)) audpp_cmd_cfg_adec_params_common; | ||
263 | |||
264 | /* | ||
265 | * Command Structure to configure Per decoder Parameters (Wav) | ||
266 | */ | ||
267 | |||
268 | #define AUDPP_CMD_CFG_ADEC_PARAMS_WAV_LEN \ | ||
269 | sizeof(audpp_cmd_cfg_adec_params_wav) | ||
270 | |||
271 | |||
272 | #define AUDPP_CMD_WAV_STEREO_CFG_MONO 0x0001 | ||
273 | #define AUDPP_CMD_WAV_STEREO_CFG_STEREO 0x0002 | ||
274 | |||
275 | #define AUDPP_CMD_WAV_PCM_WIDTH_8 0x0000 | ||
276 | #define AUDPP_CMD_WAV_PCM_WIDTH_16 0x0001 | ||
277 | #define AUDPP_CMD_WAV_PCM_WIDTH_32 0x0002 | ||
278 | |||
279 | typedef struct { | ||
280 | audpp_cmd_cfg_adec_params_common common; | ||
281 | unsigned short stereo_cfg; | ||
282 | unsigned short pcm_width; | ||
283 | unsigned short sign; | ||
284 | } __attribute__((packed)) audpp_cmd_cfg_adec_params_wav; | ||
285 | |||
286 | /* | ||
287 | * Command Structure to configure Per decoder Parameters (ADPCM) | ||
288 | */ | ||
289 | |||
290 | #define AUDPP_CMD_CFG_ADEC_PARAMS_ADPCM_LEN \ | ||
291 | sizeof(audpp_cmd_cfg_adec_params_adpcm) | ||
292 | |||
293 | |||
294 | #define AUDPP_CMD_ADPCM_STEREO_CFG_MONO 0x0001 | ||
295 | #define AUDPP_CMD_ADPCM_STEREO_CFG_STEREO 0x0002 | ||
296 | |||
297 | typedef struct { | ||
298 | audpp_cmd_cfg_adec_params_common common; | ||
299 | unsigned short stereo_cfg; | ||
300 | unsigned short block_size; | ||
301 | } __attribute__((packed)) audpp_cmd_cfg_adec_params_adpcm; | ||
302 | |||
303 | /* | ||
304 | * Command Structure to configure Per decoder Parameters (MP3) | ||
305 | */ | ||
306 | |||
307 | #define AUDPP_CMD_CFG_ADEC_PARAMS_MP3_LEN \ | ||
308 | sizeof(audpp_cmd_cfg_adec_params_mp3) | ||
309 | |||
310 | typedef struct { | ||
311 | audpp_cmd_cfg_adec_params_common common; | ||
312 | } __attribute__((packed)) audpp_cmd_cfg_adec_params_mp3; | ||
313 | |||
314 | |||
315 | /* | ||
316 | * Command Structure to configure Per decoder Parameters (AAC) | ||
317 | */ | ||
318 | |||
319 | #define AUDPP_CMD_CFG_ADEC_PARAMS_AAC_LEN \ | ||
320 | sizeof(audpp_cmd_cfg_adec_params_aac) | ||
321 | |||
322 | |||
323 | #define AUDPP_CMD_AAC_FORMAT_ADTS -1 | ||
324 | #define AUDPP_CMD_AAC_FORMAT_RAW 0x0000 | ||
325 | #define AUDPP_CMD_AAC_FORMAT_PSUEDO_RAW 0x0001 | ||
326 | #define AUDPP_CMD_AAC_FORMAT_LOAS 0x0002 | ||
327 | |||
328 | #define AUDPP_CMD_AAC_AUDIO_OBJECT_LC 0x0002 | ||
329 | #define AUDPP_CMD_AAC_AUDIO_OBJECT_LTP 0x0004 | ||
330 | #define AUDPP_CMD_AAC_AUDIO_OBJECT_ERLC 0x0011 | ||
331 | |||
332 | #define AUDPP_CMD_AAC_SBR_ON_FLAG_ON 0x0001 | ||
333 | #define AUDPP_CMD_AAC_SBR_ON_FLAG_OFF 0x0000 | ||
334 | |||
335 | #define AUDPP_CMD_AAC_SBR_PS_ON_FLAG_ON 0x0001 | ||
336 | #define AUDPP_CMD_AAC_SBR_PS_ON_FLAG_OFF 0x0000 | ||
337 | |||
338 | typedef struct { | ||
339 | audpp_cmd_cfg_adec_params_common common; | ||
340 | signed short format; | ||
341 | unsigned short audio_object; | ||
342 | unsigned short ep_config; | ||
343 | unsigned short aac_section_data_resilience_flag; | ||
344 | unsigned short aac_scalefactor_data_resilience_flag; | ||
345 | unsigned short aac_spectral_data_resilience_flag; | ||
346 | unsigned short sbr_on_flag; | ||
347 | unsigned short sbr_ps_on_flag; | ||
348 | unsigned short dual_mono_mode; | ||
349 | unsigned short channel_configuration; | ||
350 | } __attribute__((packed)) audpp_cmd_cfg_adec_params_aac; | ||
351 | |||
352 | /* | ||
353 | * Command Structure to configure Per decoder Parameters (V13K) | ||
354 | */ | ||
355 | |||
356 | #define AUDPP_CMD_CFG_ADEC_PARAMS_V13K_LEN \ | ||
357 | sizeof(struct audpp_cmd_cfg_adec_params_v13k) | ||
358 | |||
359 | |||
360 | #define AUDPP_CMD_STEREO_CFG_MONO 0x0001 | ||
361 | #define AUDPP_CMD_STEREO_CFG_STEREO 0x0002 | ||
362 | |||
363 | struct audpp_cmd_cfg_adec_params_v13k { | ||
364 | audpp_cmd_cfg_adec_params_common common; | ||
365 | unsigned short stereo_cfg; | ||
366 | } __attribute__((packed)); | ||
367 | |||
368 | #define AUDPP_CMD_CFG_ADEC_PARAMS_EVRC_LEN \ | ||
369 | sizeof(struct audpp_cmd_cfg_adec_params_evrc) | ||
370 | |||
371 | struct audpp_cmd_cfg_adec_params_evrc { | ||
372 | audpp_cmd_cfg_adec_params_common common; | ||
373 | unsigned short stereo_cfg; | ||
374 | } __attribute__ ((packed)); | ||
375 | |||
376 | /* | ||
377 | * Command Structure to configure the HOST PCM interface | ||
378 | */ | ||
379 | |||
380 | #define AUDPP_CMD_PCM_INTF 0x0001 | ||
381 | #define AUDPP_CMD_PCM_INTF_2 0x0002 | ||
382 | #define AUDPP_CMD_PCM_INTF_LEN sizeof(audpp_cmd_pcm_intf) | ||
383 | |||
384 | #define AUDPP_CMD_PCM_INTF_MONO_V 0x0001 | ||
385 | #define AUDPP_CMD_PCM_INTF_STEREO_V 0x0002 | ||
386 | |||
387 | /* These two values differentiate the two types of commands that could be issued | ||
388 | * Interface configuration command and Buffer update command */ | ||
389 | |||
390 | #define AUDPP_CMD_PCM_INTF_CONFIG_CMD_V 0x0000 | ||
391 | #define AUDPP_CMD_PCM_INTF_BUFFER_CMD_V -1 | ||
392 | |||
393 | #define AUDPP_CMD_PCM_INTF_RX_ENA_M 0x000F | ||
394 | #define AUDPP_CMD_PCM_INTF_RX_ENA_ARMTODSP_V 0x0008 | ||
395 | #define AUDPP_CMD_PCM_INTF_RX_ENA_DSPTOARM_V 0x0004 | ||
396 | |||
397 | /* These flags control the enabling and disabling of the interface together | ||
398 | * with host interface bit mask. */ | ||
399 | |||
400 | #define AUDPP_CMD_PCM_INTF_ENA_V -1 | ||
401 | #define AUDPP_CMD_PCM_INTF_DIS_V 0x0000 | ||
402 | |||
403 | |||
404 | #define AUDPP_CMD_PCM_INTF_FULL_DUPLEX 0x0 | ||
405 | #define AUDPP_CMD_PCM_INTF_HALF_DUPLEX_TODSP 0x1 | ||
406 | |||
407 | |||
408 | #define AUDPP_CMD_PCM_INTF_OBJECT_NUM 0x5 | ||
409 | #define AUDPP_CMD_PCM_INTF_COMMON_OBJECT_NUM 0x6 | ||
410 | |||
411 | |||
412 | typedef struct { | ||
413 | unsigned short cmd_id; | ||
414 | unsigned short object_num; | ||
415 | signed short config; | ||
416 | unsigned short intf_type; | ||
417 | |||
418 | /* DSP -> ARM Configuration */ | ||
419 | unsigned short read_buf1LSW; | ||
420 | unsigned short read_buf1MSW; | ||
421 | unsigned short read_buf1_len; | ||
422 | |||
423 | unsigned short read_buf2LSW; | ||
424 | unsigned short read_buf2MSW; | ||
425 | unsigned short read_buf2_len; | ||
426 | /* 0:HOST_PCM_INTF disable | ||
427 | ** 0xFFFF: HOST_PCM_INTF enable | ||
428 | */ | ||
429 | signed short dsp_to_arm_flag; | ||
430 | unsigned short partition_number; | ||
431 | |||
432 | /* ARM -> DSP Configuration */ | ||
433 | unsigned short write_buf1LSW; | ||
434 | unsigned short write_buf1MSW; | ||
435 | unsigned short write_buf1_len; | ||
436 | |||
437 | unsigned short write_buf2LSW; | ||
438 | unsigned short write_buf2MSW; | ||
439 | unsigned short write_buf2_len; | ||
440 | |||
441 | /* 0:HOST_PCM_INTF disable | ||
442 | ** 0xFFFF: HOST_PCM_INTF enable | ||
443 | */ | ||
444 | signed short arm_to_rx_flag; | ||
445 | unsigned short weight_decoder_to_rx; | ||
446 | unsigned short weight_arm_to_rx; | ||
447 | |||
448 | unsigned short partition_number_arm_to_dsp; | ||
449 | unsigned short sample_rate; | ||
450 | unsigned short channel_mode; | ||
451 | } __attribute__((packed)) audpp_cmd_pcm_intf; | ||
452 | |||
453 | /* | ||
454 | ** BUFFER UPDATE COMMAND | ||
455 | */ | ||
456 | #define AUDPP_CMD_PCM_INTF_SEND_BUF_PARAMS_LEN \ | ||
457 | sizeof(audpp_cmd_pcm_intf_send_buffer) | ||
458 | |||
459 | typedef struct { | ||
460 | unsigned short cmd_id; | ||
461 | unsigned short host_pcm_object; | ||
462 | /* set config = 0xFFFF for configuration*/ | ||
463 | signed short config; | ||
464 | unsigned short intf_type; | ||
465 | unsigned short dsp_to_arm_buf_id; | ||
466 | unsigned short arm_to_dsp_buf_id; | ||
467 | unsigned short arm_to_dsp_buf_len; | ||
468 | } __attribute__((packed)) audpp_cmd_pcm_intf_send_buffer; | ||
469 | |||
470 | |||
471 | /* | ||
472 | * Commands Related to uPAudPPCmd3Queue | ||
473 | */ | ||
474 | |||
475 | /* | ||
476 | * Command Structure to configure post processing params (Commmon) | ||
477 | */ | ||
478 | |||
479 | #define AUDPP_CMD_CFG_OBJECT_PARAMS 0x0000 | ||
480 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_COMMON_LEN \ | ||
481 | sizeof(audpp_cmd_cfg_object_params_common) | ||
482 | |||
483 | #define AUDPP_CMD_OBJ0_UPDATE 0x8000 | ||
484 | #define AUDPP_CMD_OBJ0_DONT_UPDATE 0x0000 | ||
485 | |||
486 | #define AUDPP_CMD_OBJ1_UPDATE 0x8000 | ||
487 | #define AUDPP_CMD_OBJ1_DONT_UPDATE 0x0000 | ||
488 | |||
489 | #define AUDPP_CMD_OBJ2_UPDATE 0x8000 | ||
490 | #define AUDPP_CMD_OBJ2_DONT_UPDATE 0x0000 | ||
491 | |||
492 | #define AUDPP_CMD_OBJ3_UPDATE 0x8000 | ||
493 | #define AUDPP_CMD_OBJ3_DONT_UPDATE 0x0000 | ||
494 | |||
495 | #define AUDPP_CMD_OBJ4_UPDATE 0x8000 | ||
496 | #define AUDPP_CMD_OBJ4_DONT_UPDATE 0x0000 | ||
497 | |||
498 | #define AUDPP_CMD_HPCM_UPDATE 0x8000 | ||
499 | #define AUDPP_CMD_HPCM_DONT_UPDATE 0x0000 | ||
500 | |||
501 | #define AUDPP_CMD_COMMON_CFG_UPDATE 0x8000 | ||
502 | #define AUDPP_CMD_COMMON_CFG_DONT_UPDATE 0x0000 | ||
503 | |||
504 | typedef struct { | ||
505 | unsigned short cmd_id; | ||
506 | unsigned short obj0_cfg; | ||
507 | unsigned short obj1_cfg; | ||
508 | unsigned short obj2_cfg; | ||
509 | unsigned short obj3_cfg; | ||
510 | unsigned short obj4_cfg; | ||
511 | unsigned short host_pcm_obj_cfg; | ||
512 | unsigned short comman_cfg; | ||
513 | unsigned short command_type; | ||
514 | } __attribute__((packed)) audpp_cmd_cfg_object_params_common; | ||
515 | |||
516 | /* | ||
517 | * Command Structure to configure post processing params (Volume) | ||
518 | */ | ||
519 | |||
520 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_VOLUME_LEN \ | ||
521 | sizeof(audpp_cmd_cfg_object_params_volume) | ||
522 | |||
523 | typedef struct { | ||
524 | audpp_cmd_cfg_object_params_common common; | ||
525 | unsigned short volume; | ||
526 | unsigned short pan; | ||
527 | } __attribute__((packed)) audpp_cmd_cfg_object_params_volume; | ||
528 | |||
529 | /* | ||
530 | * Command Structure to configure post processing params (PCM Filter) --DOUBT | ||
531 | */ | ||
532 | |||
533 | typedef struct { | ||
534 | unsigned short numerator_b0_filter_lsw; | ||
535 | unsigned short numerator_b0_filter_msw; | ||
536 | unsigned short numerator_b1_filter_lsw; | ||
537 | unsigned short numerator_b1_filter_msw; | ||
538 | unsigned short numerator_b2_filter_lsw; | ||
539 | unsigned short numerator_b2_filter_msw; | ||
540 | } __attribute__((packed)) numerator; | ||
541 | |||
542 | typedef struct { | ||
543 | unsigned short denominator_a0_filter_lsw; | ||
544 | unsigned short denominator_a0_filter_msw; | ||
545 | unsigned short denominator_a1_filter_lsw; | ||
546 | unsigned short denominator_a1_filter_msw; | ||
547 | } __attribute__((packed)) denominator; | ||
548 | |||
549 | typedef struct { | ||
550 | unsigned short shift_factor_0; | ||
551 | } __attribute__((packed)) shift_factor; | ||
552 | |||
553 | typedef struct { | ||
554 | unsigned short pan_filter_0; | ||
555 | } __attribute__((packed)) pan; | ||
556 | |||
557 | typedef struct { | ||
558 | numerator numerator_filter; | ||
559 | denominator denominator_filter; | ||
560 | shift_factor shift_factor_filter; | ||
561 | pan pan_filter; | ||
562 | } __attribute__((packed)) filter_1; | ||
563 | |||
564 | typedef struct { | ||
565 | numerator numerator_filter[2]; | ||
566 | denominator denominator_filter[2]; | ||
567 | shift_factor shift_factor_filter[2]; | ||
568 | pan pan_filter[2]; | ||
569 | } __attribute__((packed)) filter_2; | ||
570 | |||
571 | typedef struct { | ||
572 | numerator numerator_filter[3]; | ||
573 | denominator denominator_filter[3]; | ||
574 | shift_factor shift_factor_filter[3]; | ||
575 | pan pan_filter[3]; | ||
576 | } __attribute__((packed)) filter_3; | ||
577 | |||
578 | typedef struct { | ||
579 | numerator numerator_filter[4]; | ||
580 | denominator denominator_filter[4]; | ||
581 | shift_factor shift_factor_filter[4]; | ||
582 | pan pan_filter[4]; | ||
583 | } __attribute__((packed)) filter_4; | ||
584 | |||
585 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_PCM_LEN \ | ||
586 | sizeof(audpp_cmd_cfg_object_params_pcm) | ||
587 | |||
588 | |||
589 | typedef struct { | ||
590 | audpp_cmd_cfg_object_params_common common; | ||
591 | unsigned short active_flag; | ||
592 | unsigned short num_bands; | ||
593 | union { | ||
594 | filter_1 filter_1_params; | ||
595 | filter_2 filter_2_params; | ||
596 | filter_3 filter_3_params; | ||
597 | filter_4 filter_4_params; | ||
598 | } __attribute__((packed)) params_filter; | ||
599 | } __attribute__((packed)) audpp_cmd_cfg_object_params_pcm; | ||
600 | |||
601 | |||
602 | /* | ||
603 | * Command Structure to configure post processing parameters (equalizer) | ||
604 | */ | ||
605 | |||
606 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_EQALIZER_LEN \ | ||
607 | sizeof(audpp_cmd_cfg_object_params_eqalizer) | ||
608 | |||
609 | typedef struct { | ||
610 | unsigned short numerator_coeff_0_lsw; | ||
611 | unsigned short numerator_coeff_0_msw; | ||
612 | unsigned short numerator_coeff_1_lsw; | ||
613 | unsigned short numerator_coeff_1_msw; | ||
614 | unsigned short numerator_coeff_2_lsw; | ||
615 | unsigned short numerator_coeff_2_msw; | ||
616 | } __attribute__((packed)) eq_numerator; | ||
617 | |||
618 | typedef struct { | ||
619 | unsigned short denominator_coeff_0_lsw; | ||
620 | unsigned short denominator_coeff_0_msw; | ||
621 | unsigned short denominator_coeff_1_lsw; | ||
622 | unsigned short denominator_coeff_1_msw; | ||
623 | } __attribute__((packed)) eq_denominator; | ||
624 | |||
625 | typedef struct { | ||
626 | unsigned short shift_factor; | ||
627 | } __attribute__((packed)) eq_shiftfactor; | ||
628 | |||
629 | typedef struct { | ||
630 | eq_numerator numerator; | ||
631 | eq_denominator denominator; | ||
632 | eq_shiftfactor shiftfactor; | ||
633 | } __attribute__((packed)) eq_coeff_1; | ||
634 | |||
635 | typedef struct { | ||
636 | eq_numerator numerator[2]; | ||
637 | eq_denominator denominator[2]; | ||
638 | eq_shiftfactor shiftfactor[2]; | ||
639 | } __attribute__((packed)) eq_coeff_2; | ||
640 | |||
641 | typedef struct { | ||
642 | eq_numerator numerator[3]; | ||
643 | eq_denominator denominator[3]; | ||
644 | eq_shiftfactor shiftfactor[3]; | ||
645 | } __attribute__((packed)) eq_coeff_3; | ||
646 | |||
647 | typedef struct { | ||
648 | eq_numerator numerator[4]; | ||
649 | eq_denominator denominator[4]; | ||
650 | eq_shiftfactor shiftfactor[4]; | ||
651 | } __attribute__((packed)) eq_coeff_4; | ||
652 | |||
653 | typedef struct { | ||
654 | eq_numerator numerator[5]; | ||
655 | eq_denominator denominator[5]; | ||
656 | eq_shiftfactor shiftfactor[5]; | ||
657 | } __attribute__((packed)) eq_coeff_5; | ||
658 | |||
659 | typedef struct { | ||
660 | eq_numerator numerator[6]; | ||
661 | eq_denominator denominator[6]; | ||
662 | eq_shiftfactor shiftfactor[6]; | ||
663 | } __attribute__((packed)) eq_coeff_6; | ||
664 | |||
665 | typedef struct { | ||
666 | eq_numerator numerator[7]; | ||
667 | eq_denominator denominator[7]; | ||
668 | eq_shiftfactor shiftfactor[7]; | ||
669 | } __attribute__((packed)) eq_coeff_7; | ||
670 | |||
671 | typedef struct { | ||
672 | eq_numerator numerator[8]; | ||
673 | eq_denominator denominator[8]; | ||
674 | eq_shiftfactor shiftfactor[8]; | ||
675 | } __attribute__((packed)) eq_coeff_8; | ||
676 | |||
677 | typedef struct { | ||
678 | eq_numerator numerator[9]; | ||
679 | eq_denominator denominator[9]; | ||
680 | eq_shiftfactor shiftfactor[9]; | ||
681 | } __attribute__((packed)) eq_coeff_9; | ||
682 | |||
683 | typedef struct { | ||
684 | eq_numerator numerator[10]; | ||
685 | eq_denominator denominator[10]; | ||
686 | eq_shiftfactor shiftfactor[10]; | ||
687 | } __attribute__((packed)) eq_coeff_10; | ||
688 | |||
689 | typedef struct { | ||
690 | eq_numerator numerator[11]; | ||
691 | eq_denominator denominator[11]; | ||
692 | eq_shiftfactor shiftfactor[11]; | ||
693 | } __attribute__((packed)) eq_coeff_11; | ||
694 | |||
695 | typedef struct { | ||
696 | eq_numerator numerator[12]; | ||
697 | eq_denominator denominator[12]; | ||
698 | eq_shiftfactor shiftfactor[12]; | ||
699 | } __attribute__((packed)) eq_coeff_12; | ||
700 | |||
701 | |||
702 | typedef struct { | ||
703 | audpp_cmd_cfg_object_params_common common; | ||
704 | unsigned short eq_flag; | ||
705 | unsigned short num_bands; | ||
706 | union { | ||
707 | eq_coeff_1 eq_coeffs_1; | ||
708 | eq_coeff_2 eq_coeffs_2; | ||
709 | eq_coeff_3 eq_coeffs_3; | ||
710 | eq_coeff_4 eq_coeffs_4; | ||
711 | eq_coeff_5 eq_coeffs_5; | ||
712 | eq_coeff_6 eq_coeffs_6; | ||
713 | eq_coeff_7 eq_coeffs_7; | ||
714 | eq_coeff_8 eq_coeffs_8; | ||
715 | eq_coeff_9 eq_coeffs_9; | ||
716 | eq_coeff_10 eq_coeffs_10; | ||
717 | eq_coeff_11 eq_coeffs_11; | ||
718 | eq_coeff_12 eq_coeffs_12; | ||
719 | } __attribute__((packed)) eq_coeff; | ||
720 | } __attribute__((packed)) audpp_cmd_cfg_object_params_eqalizer; | ||
721 | |||
722 | |||
723 | /* | ||
724 | * Command Structure to configure post processing parameters (ADRC) | ||
725 | */ | ||
726 | |||
727 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_ADRC_LEN \ | ||
728 | sizeof(audpp_cmd_cfg_object_params_adrc) | ||
729 | |||
730 | |||
731 | #define AUDPP_CMD_ADRC_FLAG_DIS 0x0000 | ||
732 | #define AUDPP_CMD_ADRC_FLAG_ENA -1 | ||
733 | |||
734 | typedef struct { | ||
735 | audpp_cmd_cfg_object_params_common common; | ||
736 | signed short adrc_flag; | ||
737 | unsigned short compression_th; | ||
738 | unsigned short compression_slope; | ||
739 | unsigned short rms_time; | ||
740 | unsigned short attack_const_lsw; | ||
741 | unsigned short attack_const_msw; | ||
742 | unsigned short release_const_lsw; | ||
743 | unsigned short release_const_msw; | ||
744 | unsigned short adrc_system_delay; | ||
745 | } __attribute__((packed)) audpp_cmd_cfg_object_params_adrc; | ||
746 | |||
747 | /* | ||
748 | * Command Structure to configure post processing parameters(Spectrum Analizer) | ||
749 | */ | ||
750 | |||
751 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_SPECTRAM_LEN \ | ||
752 | sizeof(audpp_cmd_cfg_object_params_spectram) | ||
753 | |||
754 | |||
755 | typedef struct { | ||
756 | audpp_cmd_cfg_object_params_common common; | ||
757 | unsigned short sample_interval; | ||
758 | unsigned short num_coeff; | ||
759 | } __attribute__((packed)) audpp_cmd_cfg_object_params_spectram; | ||
760 | |||
761 | /* | ||
762 | * Command Structure to configure post processing parameters (QConcert) | ||
763 | */ | ||
764 | |||
765 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_QCONCERT_LEN \ | ||
766 | sizeof(audpp_cmd_cfg_object_params_qconcert) | ||
767 | |||
768 | |||
769 | #define AUDPP_CMD_QCON_ENA_FLAG_ENA -1 | ||
770 | #define AUDPP_CMD_QCON_ENA_FLAG_DIS 0x0000 | ||
771 | |||
772 | #define AUDPP_CMD_QCON_OP_MODE_HEADPHONE -1 | ||
773 | #define AUDPP_CMD_QCON_OP_MODE_SPEAKER_FRONT 0x0000 | ||
774 | #define AUDPP_CMD_QCON_OP_MODE_SPEAKER_SIDE 0x0001 | ||
775 | #define AUDPP_CMD_QCON_OP_MODE_SPEAKER_DESKTOP 0x0002 | ||
776 | |||
777 | #define AUDPP_CMD_QCON_GAIN_UNIT 0x7FFF | ||
778 | #define AUDPP_CMD_QCON_GAIN_SIX_DB 0x4027 | ||
779 | |||
780 | |||
781 | #define AUDPP_CMD_QCON_EXPANSION_MAX 0x7FFF | ||
782 | |||
783 | |||
784 | typedef struct { | ||
785 | audpp_cmd_cfg_object_params_common common; | ||
786 | signed short enable_flag; | ||
787 | signed short output_mode; | ||
788 | signed short gain; | ||
789 | signed short expansion; | ||
790 | signed short delay; | ||
791 | unsigned short stages_per_mode; | ||
792 | } __attribute__((packed)) audpp_cmd_cfg_object_params_qconcert; | ||
793 | |||
794 | /* | ||
795 | * Command Structure to configure post processing parameters (Side Chain) | ||
796 | */ | ||
797 | |||
798 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_SIDECHAIN_LEN \ | ||
799 | sizeof(audpp_cmd_cfg_object_params_sidechain) | ||
800 | |||
801 | |||
802 | #define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_DIS 0x0000 | ||
803 | #define AUDPP_CMD_SIDECHAIN_ACTIVE_FLAG_ENA -1 | ||
804 | |||
805 | typedef struct { | ||
806 | audpp_cmd_cfg_object_params_common common; | ||
807 | signed short active_flag; | ||
808 | unsigned short num_bands; | ||
809 | union { | ||
810 | filter_1 filter_1_params; | ||
811 | filter_2 filter_2_params; | ||
812 | filter_3 filter_3_params; | ||
813 | filter_4 filter_4_params; | ||
814 | } __attribute__((packed)) params_filter; | ||
815 | } __attribute__((packed)) audpp_cmd_cfg_object_params_sidechain; | ||
816 | |||
817 | |||
818 | /* | ||
819 | * Command Structure to configure post processing parameters (QAFX) | ||
820 | */ | ||
821 | |||
822 | #define AUDPP_CMD_CFG_OBJECT_PARAMS_QAFX_LEN \ | ||
823 | sizeof(audpp_cmd_cfg_object_params_qafx) | ||
824 | |||
825 | #define AUDPP_CMD_QAFX_ENA_DISA 0x0000 | ||
826 | #define AUDPP_CMD_QAFX_ENA_ENA_CFG -1 | ||
827 | #define AUDPP_CMD_QAFX_ENA_DIS_CFG 0x0001 | ||
828 | |||
829 | #define AUDPP_CMD_QAFX_CMD_TYPE_ENV 0x0100 | ||
830 | #define AUDPP_CMD_QAFX_CMD_TYPE_OBJ 0x0010 | ||
831 | #define AUDPP_CMD_QAFX_CMD_TYPE_QUERY 0x1000 | ||
832 | |||
833 | #define AUDPP_CMD_QAFX_CMDS_ENV_OP_MODE 0x0100 | ||
834 | #define AUDPP_CMD_QAFX_CMDS_ENV_LIS_POS 0x0101 | ||
835 | #define AUDPP_CMD_QAFX_CMDS_ENV_LIS_ORI 0x0102 | ||
836 | #define AUDPP_CMD_QAFX_CMDS_ENV_LIS_VEL 0X0103 | ||
837 | #define AUDPP_CMD_QAFX_CMDS_ENV_ENV_RES 0x0107 | ||
838 | |||
839 | #define AUDPP_CMD_QAFX_CMDS_OBJ_SAMP_FREQ 0x0010 | ||
840 | #define AUDPP_CMD_QAFX_CMDS_OBJ_VOL 0x0011 | ||
841 | #define AUDPP_CMD_QAFX_CMDS_OBJ_DIST 0x0012 | ||
842 | #define AUDPP_CMD_QAFX_CMDS_OBJ_POS 0x0013 | ||
843 | #define AUDPP_CMD_QAFX_CMDS_OBJ_VEL 0x0014 | ||
844 | |||
845 | |||
846 | typedef struct { | ||
847 | audpp_cmd_cfg_object_params_common common; | ||
848 | signed short enable; | ||
849 | unsigned short command_type; | ||
850 | unsigned short num_commands; | ||
851 | unsigned short commands; | ||
852 | } __attribute__((packed)) audpp_cmd_cfg_object_params_qafx; | ||
853 | |||
854 | /* | ||
855 | * Command Structure to enable , disable or configure the reverberation effect | ||
856 | * (Common) | ||
857 | */ | ||
858 | |||
859 | #define AUDPP_CMD_REVERB_CONFIG 0x0001 | ||
860 | #define AUDPP_CMD_REVERB_CONFIG_COMMON_LEN \ | ||
861 | sizeof(audpp_cmd_reverb_config_common) | ||
862 | |||
863 | #define AUDPP_CMD_ENA_ENA 0xFFFF | ||
864 | #define AUDPP_CMD_ENA_DIS 0x0000 | ||
865 | #define AUDPP_CMD_ENA_CFG 0x0001 | ||
866 | |||
867 | #define AUDPP_CMD_CMD_TYPE_ENV 0x0104 | ||
868 | #define AUDPP_CMD_CMD_TYPE_OBJ 0x0015 | ||
869 | #define AUDPP_CMD_CMD_TYPE_QUERY 0x1000 | ||
870 | |||
871 | |||
872 | typedef struct { | ||
873 | unsigned short cmd_id; | ||
874 | unsigned short enable; | ||
875 | unsigned short cmd_type; | ||
876 | } __attribute__((packed)) audpp_cmd_reverb_config_common; | ||
877 | |||
878 | /* | ||
879 | * Command Structure to enable , disable or configure the reverberation effect | ||
880 | * (ENV-0x0104) | ||
881 | */ | ||
882 | |||
883 | #define AUDPP_CMD_REVERB_CONFIG_ENV_104_LEN \ | ||
884 | sizeof(audpp_cmd_reverb_config_env_104) | ||
885 | |||
886 | typedef struct { | ||
887 | audpp_cmd_reverb_config_common common; | ||
888 | unsigned short env_gain; | ||
889 | unsigned short decay_msw; | ||
890 | unsigned short decay_lsw; | ||
891 | unsigned short decay_timeratio_msw; | ||
892 | unsigned short decay_timeratio_lsw; | ||
893 | unsigned short delay_time; | ||
894 | unsigned short reverb_gain; | ||
895 | unsigned short reverb_delay; | ||
896 | } __attribute__((packed)) audpp_cmd_reverb_config_env_104; | ||
897 | |||
898 | /* | ||
899 | * Command Structure to enable , disable or configure the reverberation effect | ||
900 | * (ENV-0x0015) | ||
901 | */ | ||
902 | |||
903 | #define AUDPP_CMD_REVERB_CONFIG_ENV_15_LEN \ | ||
904 | sizeof(audpp_cmd_reverb_config_env_15) | ||
905 | |||
906 | typedef struct { | ||
907 | audpp_cmd_reverb_config_common common; | ||
908 | unsigned short object_num; | ||
909 | unsigned short absolute_gain; | ||
910 | } __attribute__((packed)) audpp_cmd_reverb_config_env_15; | ||
911 | |||
912 | |||
913 | #endif /* QDSP5AUDPPCMDI_H */ | ||
914 | |||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h new file mode 100644 index 000000000000..44fea224001a --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audppmsg.h | |||
@@ -0,0 +1,318 @@ | |||
1 | #ifndef QDSP5AUDPPMSG_H | ||
2 | #define QDSP5AUDPPMSG_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | Q D S P 5 A U D I O P O S T P R O C E S S I N G M S G | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | Messages sent by AUDPPTASK to ARM | ||
10 | |||
11 | REFERENCES | ||
12 | None | ||
13 | |||
14 | EXTERNALIZED FUNCTIONS | ||
15 | None | ||
16 | |||
17 | Copyright(c) 1992 - 2009 by QUALCOMM, Incorporated. | ||
18 | |||
19 | This software is licensed under the terms of the GNU General Public | ||
20 | License version 2, as published by the Free Software Foundation, and | ||
21 | may be copied, distributed, and modified under those terms. | ||
22 | |||
23 | This program is distributed in the hope that it will be useful, | ||
24 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
25 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
26 | GNU General Public License for more details. | ||
27 | |||
28 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
29 | /*=========================================================================== | ||
30 | |||
31 | EDIT HISTORY FOR FILE | ||
32 | |||
33 | This section contains comments describing changes made to this file. | ||
34 | Notice that changes are listed in reverse chronological order. | ||
35 | |||
36 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audppmsg.h#4 $ | ||
37 | |||
38 | ===========================================================================*/ | ||
39 | |||
40 | /* | ||
41 | * AUDPPTASK uses audPPuPRlist to send messages to the ARM | ||
42 | * Location : MEMA | ||
43 | * Buffer Size : 45 | ||
44 | * No of Buffers in a queue : 5 for gaming audio and 1 for other images | ||
45 | */ | ||
46 | |||
47 | /* | ||
48 | * MSG to Informs the ARM os Success/Failure of bringing up the decoder | ||
49 | */ | ||
50 | |||
51 | #define AUDPP_MSG_STATUS_MSG 0x0001 | ||
52 | #define AUDPP_MSG_STATUS_MSG_LEN \ | ||
53 | sizeof(audpp_msg_status_msg) | ||
54 | |||
55 | #define AUDPP_MSG_STATUS_SLEEP 0x0000 | ||
56 | #define AUDPP_MSG__STATUS_INIT 0x0001 | ||
57 | #define AUDPP_MSG_MSG_STATUS_CFG 0x0002 | ||
58 | #define AUDPP_MSG_STATUS_PLAY 0x0003 | ||
59 | |||
60 | #define AUDPP_MSG_REASON_MIPS 0x0000 | ||
61 | #define AUDPP_MSG_REASON_MEM 0x0001 | ||
62 | |||
63 | typedef struct{ | ||
64 | unsigned short dec_id; | ||
65 | unsigned short status; | ||
66 | unsigned short reason; | ||
67 | } __attribute__((packed)) audpp_msg_status_msg; | ||
68 | |||
69 | /* | ||
70 | * MSG to communicate the spectrum analyzer output bands to the ARM | ||
71 | */ | ||
72 | #define AUDPP_MSG_SPA_BANDS 0x0002 | ||
73 | #define AUDPP_MSG_SPA_BANDS_LEN \ | ||
74 | sizeof(audpp_msg_spa_bands) | ||
75 | |||
76 | typedef struct { | ||
77 | unsigned short current_object; | ||
78 | unsigned short spa_band_1; | ||
79 | unsigned short spa_band_2; | ||
80 | unsigned short spa_band_3; | ||
81 | unsigned short spa_band_4; | ||
82 | unsigned short spa_band_5; | ||
83 | unsigned short spa_band_6; | ||
84 | unsigned short spa_band_7; | ||
85 | unsigned short spa_band_8; | ||
86 | unsigned short spa_band_9; | ||
87 | unsigned short spa_band_10; | ||
88 | unsigned short spa_band_11; | ||
89 | unsigned short spa_band_12; | ||
90 | unsigned short spa_band_13; | ||
91 | unsigned short spa_band_14; | ||
92 | unsigned short spa_band_15; | ||
93 | unsigned short spa_band_16; | ||
94 | unsigned short spa_band_17; | ||
95 | unsigned short spa_band_18; | ||
96 | unsigned short spa_band_19; | ||
97 | unsigned short spa_band_20; | ||
98 | unsigned short spa_band_21; | ||
99 | unsigned short spa_band_22; | ||
100 | unsigned short spa_band_23; | ||
101 | unsigned short spa_band_24; | ||
102 | unsigned short spa_band_25; | ||
103 | unsigned short spa_band_26; | ||
104 | unsigned short spa_band_27; | ||
105 | unsigned short spa_band_28; | ||
106 | unsigned short spa_band_29; | ||
107 | unsigned short spa_band_30; | ||
108 | unsigned short spa_band_31; | ||
109 | unsigned short spa_band_32; | ||
110 | } __attribute__((packed)) audpp_msg_spa_bands; | ||
111 | |||
112 | /* | ||
113 | * MSG to communicate the PCM I/O buffer status to ARM | ||
114 | */ | ||
115 | #define AUDPP_MSG_HOST_PCM_INTF_MSG 0x0003 | ||
116 | #define AUDPP_MSG_HOST_PCM_INTF_MSG_LEN \ | ||
117 | sizeof(audpp_msg_host_pcm_intf_msg) | ||
118 | |||
119 | #define AUDPP_MSG_HOSTPCM_ID_TX_ARM 0x0000 | ||
120 | #define AUDPP_MSG_HOSTPCM_ID_ARM_TX 0x0001 | ||
121 | #define AUDPP_MSG_HOSTPCM_ID_RX_ARM 0x0002 | ||
122 | #define AUDPP_MSG_HOSTPCM_ID_ARM_RX 0x0003 | ||
123 | |||
124 | #define AUDPP_MSG_SAMP_FREQ_INDX_96000 0x0000 | ||
125 | #define AUDPP_MSG_SAMP_FREQ_INDX_88200 0x0001 | ||
126 | #define AUDPP_MSG_SAMP_FREQ_INDX_64000 0x0002 | ||
127 | #define AUDPP_MSG_SAMP_FREQ_INDX_48000 0x0003 | ||
128 | #define AUDPP_MSG_SAMP_FREQ_INDX_44100 0x0004 | ||
129 | #define AUDPP_MSG_SAMP_FREQ_INDX_32000 0x0005 | ||
130 | #define AUDPP_MSG_SAMP_FREQ_INDX_24000 0x0006 | ||
131 | #define AUDPP_MSG_SAMP_FREQ_INDX_22050 0x0007 | ||
132 | #define AUDPP_MSG_SAMP_FREQ_INDX_16000 0x0008 | ||
133 | #define AUDPP_MSG_SAMP_FREQ_INDX_12000 0x0009 | ||
134 | #define AUDPP_MSG_SAMP_FREQ_INDX_11025 0x000A | ||
135 | #define AUDPP_MSG_SAMP_FREQ_INDX_8000 0x000B | ||
136 | |||
137 | #define AUDPP_MSG_CHANNEL_MODE_MONO 0x0001 | ||
138 | #define AUDPP_MSG_CHANNEL_MODE_STEREO 0x0002 | ||
139 | |||
140 | typedef struct{ | ||
141 | unsigned short obj_num; | ||
142 | unsigned short numbers_of_samples; | ||
143 | unsigned short host_pcm_id; | ||
144 | unsigned short buf_indx; | ||
145 | unsigned short samp_freq_indx; | ||
146 | unsigned short channel_mode; | ||
147 | } __attribute__((packed)) audpp_msg_host_pcm_intf_msg; | ||
148 | |||
149 | |||
150 | /* | ||
151 | * MSG to communicate 3D position of the source and listener , source volume | ||
152 | * source rolloff, source orientation | ||
153 | */ | ||
154 | |||
155 | #define AUDPP_MSG_QAFX_POS 0x0004 | ||
156 | #define AUDPP_MSG_QAFX_POS_LEN \ | ||
157 | sizeof(audpp_msg_qafx_pos) | ||
158 | |||
159 | typedef struct { | ||
160 | unsigned short current_object; | ||
161 | unsigned short x_pos_lis_msw; | ||
162 | unsigned short x_pos_lis_lsw; | ||
163 | unsigned short y_pos_lis_msw; | ||
164 | unsigned short y_pos_lis_lsw; | ||
165 | unsigned short z_pos_lis_msw; | ||
166 | unsigned short z_pos_lis_lsw; | ||
167 | unsigned short x_fwd_msw; | ||
168 | unsigned short x_fwd_lsw; | ||
169 | unsigned short y_fwd_msw; | ||
170 | unsigned short y_fwd_lsw; | ||
171 | unsigned short z_fwd_msw; | ||
172 | unsigned short z_fwd_lsw; | ||
173 | unsigned short x_up_msw; | ||
174 | unsigned short x_up_lsw; | ||
175 | unsigned short y_up_msw; | ||
176 | unsigned short y_up_lsw; | ||
177 | unsigned short z_up_msw; | ||
178 | unsigned short z_up_lsw; | ||
179 | unsigned short x_vel_lis_msw; | ||
180 | unsigned short x_vel_lis_lsw; | ||
181 | unsigned short y_vel_lis_msw; | ||
182 | unsigned short y_vel_lis_lsw; | ||
183 | unsigned short z_vel_lis_msw; | ||
184 | unsigned short z_vel_lis_lsw; | ||
185 | unsigned short threed_enable_flag; | ||
186 | unsigned short volume; | ||
187 | unsigned short x_pos_source_msw; | ||
188 | unsigned short x_pos_source_lsw; | ||
189 | unsigned short y_pos_source_msw; | ||
190 | unsigned short y_pos_source_lsw; | ||
191 | unsigned short z_pos_source_msw; | ||
192 | unsigned short z_pos_source_lsw; | ||
193 | unsigned short max_dist_0_msw; | ||
194 | unsigned short max_dist_0_lsw; | ||
195 | unsigned short min_dist_0_msw; | ||
196 | unsigned short min_dist_0_lsw; | ||
197 | unsigned short roll_off_factor; | ||
198 | unsigned short mute_after_max_flag; | ||
199 | unsigned short x_vel_source_msw; | ||
200 | unsigned short x_vel_source_lsw; | ||
201 | unsigned short y_vel_source_msw; | ||
202 | unsigned short y_vel_source_lsw; | ||
203 | unsigned short z_vel_source_msw; | ||
204 | unsigned short z_vel_source_lsw; | ||
205 | } __attribute__((packed)) audpp_msg_qafx_pos; | ||
206 | |||
207 | /* | ||
208 | * MSG to provide AVSYNC feedback from DSP to ARM | ||
209 | */ | ||
210 | |||
211 | #define AUDPP_MSG_AVSYNC_MSG 0x0005 | ||
212 | #define AUDPP_MSG_AVSYNC_MSG_LEN \ | ||
213 | sizeof(audpp_msg_avsync_msg) | ||
214 | |||
215 | typedef struct { | ||
216 | unsigned short active_flag; | ||
217 | unsigned short num_samples_counter0_HSW; | ||
218 | unsigned short num_samples_counter0_MSW; | ||
219 | unsigned short num_samples_counter0_LSW; | ||
220 | unsigned short num_bytes_counter0_HSW; | ||
221 | unsigned short num_bytes_counter0_MSW; | ||
222 | unsigned short num_bytes_counter0_LSW; | ||
223 | unsigned short samp_freq_obj_0; | ||
224 | unsigned short samp_freq_obj_1; | ||
225 | unsigned short samp_freq_obj_2; | ||
226 | unsigned short samp_freq_obj_3; | ||
227 | unsigned short samp_freq_obj_4; | ||
228 | unsigned short samp_freq_obj_5; | ||
229 | unsigned short samp_freq_obj_6; | ||
230 | unsigned short samp_freq_obj_7; | ||
231 | unsigned short samp_freq_obj_8; | ||
232 | unsigned short samp_freq_obj_9; | ||
233 | unsigned short samp_freq_obj_10; | ||
234 | unsigned short samp_freq_obj_11; | ||
235 | unsigned short samp_freq_obj_12; | ||
236 | unsigned short samp_freq_obj_13; | ||
237 | unsigned short samp_freq_obj_14; | ||
238 | unsigned short samp_freq_obj_15; | ||
239 | unsigned short num_samples_counter4_HSW; | ||
240 | unsigned short num_samples_counter4_MSW; | ||
241 | unsigned short num_samples_counter4_LSW; | ||
242 | unsigned short num_bytes_counter4_HSW; | ||
243 | unsigned short num_bytes_counter4_MSW; | ||
244 | unsigned short num_bytes_counter4_LSW; | ||
245 | } __attribute__((packed)) audpp_msg_avsync_msg; | ||
246 | |||
247 | /* | ||
248 | * MSG to provide PCM DMA Missed feedback from the DSP to ARM | ||
249 | */ | ||
250 | |||
251 | #define AUDPP_MSG_PCMDMAMISSED 0x0006 | ||
252 | #define AUDPP_MSG_PCMDMAMISSED_LEN \ | ||
253 | sizeof(audpp_msg_pcmdmamissed); | ||
254 | |||
255 | typedef struct{ | ||
256 | /* | ||
257 | ** Bit 0 0 = PCM DMA not missed for object 0 | ||
258 | ** 1 = PCM DMA missed for object0 | ||
259 | ** Bit 1 0 = PCM DMA not missed for object 1 | ||
260 | ** 1 = PCM DMA missed for object1 | ||
261 | ** Bit 2 0 = PCM DMA not missed for object 2 | ||
262 | ** 1 = PCM DMA missed for object2 | ||
263 | ** Bit 3 0 = PCM DMA not missed for object 3 | ||
264 | ** 1 = PCM DMA missed for object3 | ||
265 | ** Bit 4 0 = PCM DMA not missed for object 4 | ||
266 | ** 1 = PCM DMA missed for object4 | ||
267 | */ | ||
268 | unsigned short pcmdmamissed; | ||
269 | } __attribute__((packed)) audpp_msg_pcmdmamissed; | ||
270 | |||
271 | /* | ||
272 | * MSG to AUDPP enable or disable feedback form DSP to ARM | ||
273 | */ | ||
274 | |||
275 | #define AUDPP_MSG_CFG_MSG 0x0007 | ||
276 | #define AUDPP_MSG_CFG_MSG_LEN \ | ||
277 | sizeof(audpp_msg_cfg_msg) | ||
278 | |||
279 | #define AUDPP_MSG_ENA_ENA 0xFFFF | ||
280 | #define AUDPP_MSG_ENA_DIS 0x0000 | ||
281 | |||
282 | typedef struct{ | ||
283 | /* Enabled - 0xffff | ||
284 | ** Disabled - 0 | ||
285 | */ | ||
286 | unsigned short enabled; | ||
287 | } __attribute__((packed)) audpp_msg_cfg_msg; | ||
288 | |||
289 | /* | ||
290 | * MSG to communicate the reverb per object volume | ||
291 | */ | ||
292 | |||
293 | #define AUDPP_MSG_QREVERB_VOLUME 0x0008 | ||
294 | #define AUDPP_MSG_QREVERB_VOLUME_LEN \ | ||
295 | sizeof(audpp_msg_qreverb_volume) | ||
296 | |||
297 | |||
298 | typedef struct { | ||
299 | unsigned short obj_0_gain; | ||
300 | unsigned short obj_1_gain; | ||
301 | unsigned short obj_2_gain; | ||
302 | unsigned short obj_3_gain; | ||
303 | unsigned short obj_4_gain; | ||
304 | unsigned short hpcm_obj_volume; | ||
305 | } __attribute__((packed)) audpp_msg_qreverb_volume; | ||
306 | |||
307 | #define AUDPP_MSG_ROUTING_ACK 0x0009 | ||
308 | #define AUDPP_MSG_ROUTING_ACK_LEN \ | ||
309 | sizeof(struct audpp_msg_routing_ack) | ||
310 | |||
311 | struct audpp_msg_routing_ack { | ||
312 | unsigned short dec_id; | ||
313 | unsigned short routing_mode; | ||
314 | } __attribute__((packed)); | ||
315 | |||
316 | #define AUDPP_MSG_FLUSH_ACK 0x000A | ||
317 | |||
318 | #endif /* QDSP5AUDPPMSG_H */ | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h new file mode 100644 index 000000000000..06d33d571583 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreproccmdi.h | |||
@@ -0,0 +1,256 @@ | |||
1 | #ifndef QDSP5AUDPREPROCCMDI_H | ||
2 | #define QDSP5AUDPREPROCCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | A U D I O P R E P R O C E S S I N G I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by AUDPREPROC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreproccmdi.h#2 $ | ||
38 | |||
39 | ===========================================================================*/ | ||
40 | |||
41 | /* | ||
42 | * AUDIOPREPROC COMMANDS: | ||
43 | * ARM uses uPAudPreProcCmdQueue to communicate with AUDPREPROCTASK | ||
44 | * Location : MEMB | ||
45 | * Buffer size : 51 | ||
46 | * Number of buffers in a queue : 3 | ||
47 | */ | ||
48 | |||
49 | /* | ||
50 | * Command to configure the parameters of AGC | ||
51 | */ | ||
52 | |||
53 | #define AUDPREPROC_CMD_CFG_AGC_PARAMS 0x0000 | ||
54 | #define AUDPREPROC_CMD_CFG_AGC_PARAMS_LEN \ | ||
55 | sizeof(audpreproc_cmd_cfg_agc_params) | ||
56 | |||
57 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_SLOPE 0x0009 | ||
58 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_TH 0x000A | ||
59 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_EXP_SLOPE 0x000B | ||
60 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_EXP_TH 0x000C | ||
61 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_AIG_FLAG 0x000D | ||
62 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_COMP_STATIC_GAIN 0x000E | ||
63 | #define AUDPREPROC_CMD_TX_AGC_PARAM_MASK_TX_AGC_ENA_FLAG 0x000F | ||
64 | |||
65 | #define AUDPREPROC_CMD_TX_AGC_ENA_FLAG_ENA -1 | ||
66 | #define AUDPREPROC_CMD_TX_AGC_ENA_FLAG_DIS 0x0000 | ||
67 | |||
68 | #define AUDPREPROC_CMD_ADP_GAIN_FLAG_ENA_ADP_GAIN -1 | ||
69 | #define AUDPREPROC_CMD_ADP_GAIN_FLAG_ENA_STATIC_GAIN 0x0000 | ||
70 | |||
71 | #define AUDPREPROC_CMD_PARAM_MASK_RMS_TAY 0x0004 | ||
72 | #define AUDPREPROC_CMD_PARAM_MASK_RELEASEK 0x0005 | ||
73 | #define AUDPREPROC_CMD_PARAM_MASK_DELAY 0x0006 | ||
74 | #define AUDPREPROC_CMD_PARAM_MASK_ATTACKK 0x0007 | ||
75 | #define AUDPREPROC_CMD_PARAM_MASK_LEAKRATE_SLOW 0x0008 | ||
76 | #define AUDPREPROC_CMD_PARAM_MASK_LEAKRATE_FAST 0x0009 | ||
77 | #define AUDPREPROC_CMD_PARAM_MASK_AIG_RELEASEK 0x000A | ||
78 | #define AUDPREPROC_CMD_PARAM_MASK_AIG_MIN 0x000B | ||
79 | #define AUDPREPROC_CMD_PARAM_MASK_AIG_MAX 0x000C | ||
80 | #define AUDPREPROC_CMD_PARAM_MASK_LEAK_UP 0x000D | ||
81 | #define AUDPREPROC_CMD_PARAM_MASK_LEAK_DOWN 0x000E | ||
82 | #define AUDPREPROC_CMD_PARAM_MASK_AIG_ATTACKK 0x000F | ||
83 | |||
84 | typedef struct { | ||
85 | unsigned short cmd_id; | ||
86 | unsigned short tx_agc_param_mask; | ||
87 | unsigned short tx_agc_enable_flag; | ||
88 | unsigned short static_gain; | ||
89 | signed short adaptive_gain_flag; | ||
90 | unsigned short expander_th; | ||
91 | unsigned short expander_slope; | ||
92 | unsigned short compressor_th; | ||
93 | unsigned short compressor_slope; | ||
94 | unsigned short param_mask; | ||
95 | unsigned short aig_attackk; | ||
96 | unsigned short aig_leak_down; | ||
97 | unsigned short aig_leak_up; | ||
98 | unsigned short aig_max; | ||
99 | unsigned short aig_min; | ||
100 | unsigned short aig_releasek; | ||
101 | unsigned short aig_leakrate_fast; | ||
102 | unsigned short aig_leakrate_slow; | ||
103 | unsigned short attackk_msw; | ||
104 | unsigned short attackk_lsw; | ||
105 | unsigned short delay; | ||
106 | unsigned short releasek_msw; | ||
107 | unsigned short releasek_lsw; | ||
108 | unsigned short rms_tav; | ||
109 | } __attribute__((packed)) audpreproc_cmd_cfg_agc_params; | ||
110 | |||
111 | |||
112 | /* | ||
113 | * Command to configure the params of Advanved AGC | ||
114 | */ | ||
115 | |||
116 | #define AUDPREPROC_CMD_CFG_AGC_PARAMS_2 0x0001 | ||
117 | #define AUDPREPROC_CMD_CFG_AGC_PARAMS_2_LEN \ | ||
118 | sizeof(audpreproc_cmd_cfg_agc_params_2) | ||
119 | |||
120 | #define AUDPREPROC_CMD_2_TX_AGC_ENA_FLAG_ENA -1; | ||
121 | #define AUDPREPROC_CMD_2_TX_AGC_ENA_FLAG_DIS 0x0000; | ||
122 | |||
123 | typedef struct { | ||
124 | unsigned short cmd_id; | ||
125 | unsigned short agc_param_mask; | ||
126 | signed short tx_agc_enable_flag; | ||
127 | unsigned short comp_static_gain; | ||
128 | unsigned short exp_th; | ||
129 | unsigned short exp_slope; | ||
130 | unsigned short comp_th; | ||
131 | unsigned short comp_slope; | ||
132 | unsigned short comp_rms_tav; | ||
133 | unsigned short comp_samp_mask; | ||
134 | unsigned short comp_attackk_msw; | ||
135 | unsigned short comp_attackk_lsw; | ||
136 | unsigned short comp_releasek_msw; | ||
137 | unsigned short comp_releasek_lsw; | ||
138 | unsigned short comp_delay; | ||
139 | unsigned short comp_makeup_gain; | ||
140 | } __attribute__((packed)) audpreproc_cmd_cfg_agc_params_2; | ||
141 | |||
142 | /* | ||
143 | * Command to configure params for ns | ||
144 | */ | ||
145 | |||
146 | #define AUDPREPROC_CMD_CFG_NS_PARAMS 0x0002 | ||
147 | #define AUDPREPROC_CMD_CFG_NS_PARAMS_LEN \ | ||
148 | sizeof(audpreproc_cmd_cfg_ns_params) | ||
149 | |||
150 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLMS_ENA 0x0001 | ||
151 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLMS_DIS 0x0000 | ||
152 | #define AUDPREPROC_CMD_EC_MODE_NEW_DES_ENA 0x0002 | ||
153 | #define AUDPREPROC_CMD_EC_MODE_NEW_DES_DIS 0x0000 | ||
154 | #define AUDPREPROC_CMD_EC_MODE_NEW_NS_ENA 0x0004 | ||
155 | #define AUDPREPROC_CMD_EC_MODE_NEW_NS_DIS 0x0000 | ||
156 | #define AUDPREPROC_CMD_EC_MODE_NEW_CNI_ENA 0x0008 | ||
157 | #define AUDPREPROC_CMD_EC_MODE_NEW_CNI_DIS 0x0000 | ||
158 | |||
159 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLES_ENA 0x0010 | ||
160 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLES_DIS 0x0000 | ||
161 | #define AUDPREPROC_CMD_EC_MODE_NEW_HB_ENA 0x0020 | ||
162 | #define AUDPREPROC_CMD_EC_MODE_NEW_HB_DIS 0x0000 | ||
163 | #define AUDPREPROC_CMD_EC_MODE_NEW_VA_ENA 0x0040 | ||
164 | #define AUDPREPROC_CMD_EC_MODE_NEW_VA_DIS 0x0000 | ||
165 | #define AUDPREPROC_CMD_EC_MODE_NEW_PCD_ENA 0x0080 | ||
166 | #define AUDPREPROC_CMD_EC_MODE_NEW_PCD_DIS 0x0000 | ||
167 | #define AUDPREPROC_CMD_EC_MODE_NEW_FEHI_ENA 0x0100 | ||
168 | #define AUDPREPROC_CMD_EC_MODE_NEW_FEHI_DIS 0x0000 | ||
169 | #define AUDPREPROC_CMD_EC_MODE_NEW_NEHI_ENA 0x0200 | ||
170 | #define AUDPREPROC_CMD_EC_MODE_NEW_NEHI_DIS 0x0000 | ||
171 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLPP_ENA 0x0400 | ||
172 | #define AUDPREPROC_CMD_EC_MODE_NEW_NLPP_DIS 0x0000 | ||
173 | #define AUDPREPROC_CMD_EC_MODE_NEW_FNE_ENA 0x0800 | ||
174 | #define AUDPREPROC_CMD_EC_MODE_NEW_FNE_DIS 0x0000 | ||
175 | #define AUDPREPROC_CMD_EC_MODE_NEW_PRENLMS_ENA 0x1000 | ||
176 | #define AUDPREPROC_CMD_EC_MODE_NEW_PRENLMS_DIS 0x0000 | ||
177 | |||
178 | typedef struct { | ||
179 | unsigned short cmd_id; | ||
180 | unsigned short ec_mode_new; | ||
181 | unsigned short dens_gamma_n; | ||
182 | unsigned short dens_nfe_block_size; | ||
183 | unsigned short dens_limit_ns; | ||
184 | unsigned short dens_limit_ns_d; | ||
185 | unsigned short wb_gamma_e; | ||
186 | unsigned short wb_gamma_n; | ||
187 | } __attribute__((packed)) audpreproc_cmd_cfg_ns_params; | ||
188 | |||
189 | /* | ||
190 | * Command to configure parameters for IIR tuning filter | ||
191 | */ | ||
192 | |||
193 | #define AUDPREPROC_CMD_CFG_IIR_TUNING_FILTER_PARAMS 0x0003 | ||
194 | #define AUDPREPROC_CMD_CFG_IIR_TUNING_FILTER_PARAMS_LEN \ | ||
195 | sizeof(audpreproc_cmd_cfg_iir_tuning_filter_params) | ||
196 | |||
197 | #define AUDPREPROC_CMD_IIR_ACTIVE_FLAG_DIS 0x0000 | ||
198 | #define AUDPREPROC_CMD_IIR_ACTIVE_FLAG_ENA 0x0001 | ||
199 | |||
200 | typedef struct { | ||
201 | unsigned short cmd_id; | ||
202 | unsigned short active_flag; | ||
203 | unsigned short num_bands; | ||
204 | unsigned short numerator_coeff_b0_filter0_lsw; | ||
205 | unsigned short numerator_coeff_b0_filter0_msw; | ||
206 | unsigned short numerator_coeff_b1_filter0_lsw; | ||
207 | unsigned short numerator_coeff_b1_filter0_msw; | ||
208 | unsigned short numerator_coeff_b2_filter0_lsw; | ||
209 | unsigned short numerator_coeff_b2_filter0_msw; | ||
210 | unsigned short numerator_coeff_b0_filter1_lsw; | ||
211 | unsigned short numerator_coeff_b0_filter1_msw; | ||
212 | unsigned short numerator_coeff_b1_filter1_lsw; | ||
213 | unsigned short numerator_coeff_b1_filter1_msw; | ||
214 | unsigned short numerator_coeff_b2_filter1_lsw; | ||
215 | unsigned short numerator_coeff_b2_filter1_msw; | ||
216 | unsigned short numerator_coeff_b0_filter2_lsw; | ||
217 | unsigned short numerator_coeff_b0_filter2_msw; | ||
218 | unsigned short numerator_coeff_b1_filter2_lsw; | ||
219 | unsigned short numerator_coeff_b1_filter2_msw; | ||
220 | unsigned short numerator_coeff_b2_filter2_lsw; | ||
221 | unsigned short numerator_coeff_b2_filter2_msw; | ||
222 | unsigned short numerator_coeff_b0_filter3_lsw; | ||
223 | unsigned short numerator_coeff_b0_filter3_msw; | ||
224 | unsigned short numerator_coeff_b1_filter3_lsw; | ||
225 | unsigned short numerator_coeff_b1_filter3_msw; | ||
226 | unsigned short numerator_coeff_b2_filter3_lsw; | ||
227 | unsigned short numerator_coeff_b2_filter3_msw; | ||
228 | unsigned short denominator_coeff_a0_filter0_lsw; | ||
229 | unsigned short denominator_coeff_a0_filter0_msw; | ||
230 | unsigned short denominator_coeff_a1_filter0_lsw; | ||
231 | unsigned short denominator_coeff_a1_filter0_msw; | ||
232 | unsigned short denominator_coeff_a0_filter1_lsw; | ||
233 | unsigned short denominator_coeff_a0_filter1_msw; | ||
234 | unsigned short denominator_coeff_a1_filter1_lsw; | ||
235 | unsigned short denominator_coeff_a1_filter1_msw; | ||
236 | unsigned short denominator_coeff_a0_filter2_lsw; | ||
237 | unsigned short denominator_coeff_a0_filter2_msw; | ||
238 | unsigned short denominator_coeff_a1_filter2_lsw; | ||
239 | unsigned short denominator_coeff_a1_filter2_msw; | ||
240 | unsigned short denominator_coeff_a0_filter3_lsw; | ||
241 | unsigned short denominator_coeff_a0_filter3_msw; | ||
242 | unsigned short denominator_coeff_a1_filter3_lsw; | ||
243 | unsigned short denominator_coeff_a1_filter3_msw; | ||
244 | |||
245 | unsigned short shift_factor_filter0; | ||
246 | unsigned short shift_factor_filter1; | ||
247 | unsigned short shift_factor_filter2; | ||
248 | unsigned short shift_factor_filter3; | ||
249 | |||
250 | unsigned short channel_selected0; | ||
251 | unsigned short channel_selected1; | ||
252 | unsigned short channel_selected2; | ||
253 | unsigned short channel_selected3; | ||
254 | } __attribute__((packed))audpreproc_cmd_cfg_iir_tuning_filter_params; | ||
255 | |||
256 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h new file mode 100644 index 000000000000..f40e41e76737 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audpreprocmsg.h | |||
@@ -0,0 +1,85 @@ | |||
1 | #ifndef QDSP5AUDPREPROCMSG_H | ||
2 | #define QDSP5AUDPREPROCMSG_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | A U D I O P R E P R O C E S S I N G M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of messages | ||
10 | that are rcvd by AUDPREPROC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audpreprocmsg.h#3 $ | ||
38 | |||
39 | ===========================================================================*/ | ||
40 | |||
41 | /* | ||
42 | * ADSPREPROCTASK Messages | ||
43 | * AUDPREPROCTASK uses audPreProcUpRlist to communicate with ARM | ||
44 | * Location : MEMA | ||
45 | * Message Length : 2 | ||
46 | */ | ||
47 | |||
48 | /* | ||
49 | * Message to indicate particular feature has been enabled or disabled | ||
50 | */ | ||
51 | |||
52 | |||
53 | #define AUDPREPROC_MSG_CMD_CFG_DONE_MSG 0x0000 | ||
54 | #define AUDPREPROC_MSG_CMD_CFG_DONE_MSG_LEN \ | ||
55 | sizeof(audpreproc_msg_cmd_cfg_done_msg) | ||
56 | |||
57 | #define AUDPREPROC_MSG_TYPE_AGC 0x0000 | ||
58 | #define AUDPREPROC_MSG_TYPE_NOISE_REDUCTION 0x0001 | ||
59 | #define AUDPREPROC_MSG_TYPE_IIR_FILTER 0x0002 | ||
60 | |||
61 | |||
62 | #define AUDPREPROC_MSG_STATUS_FLAG_ENA -1 | ||
63 | #define AUDPREPROC_MSG_STATUS_FLAG_DIS 0x0000 | ||
64 | |||
65 | typedef struct { | ||
66 | unsigned short type; | ||
67 | signed short status_flag; | ||
68 | } __attribute__((packed)) audpreproc_msg_cmd_cfg_done_msg; | ||
69 | |||
70 | |||
71 | /* | ||
72 | * Message to indicate particular feature has selected for wrong samp freq | ||
73 | */ | ||
74 | |||
75 | #define AUDPREPROC_MSG_ERROR_MSG_ID 0x0001 | ||
76 | #define AUDPREPROC_MSG_ERROR_MSG_ID_LEN \ | ||
77 | sizeof(audpreproc_msg_error_msg_id) | ||
78 | |||
79 | #define AUDPREPROC_MSG_ERR_INDEX_NS 0x0000 | ||
80 | |||
81 | typedef struct { | ||
82 | unsigned short err_index; | ||
83 | } __attribute__((packed)) audpreproc_msg_error_msg_id; | ||
84 | |||
85 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h new file mode 100644 index 000000000000..d03ee024ae91 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audreccmdi.h | |||
@@ -0,0 +1,176 @@ | |||
1 | #ifndef QDSP5AUDRECCMDI_H | ||
2 | #define QDSP5AUDRECCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | A U D I O R E C O R D I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by AUDREC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | |||
31 | /*=========================================================================== | ||
32 | |||
33 | EDIT HISTORY FOR FILE | ||
34 | |||
35 | This section contains comments describing changes made to this file. | ||
36 | Notice that changes are listed in reverse chronological order. | ||
37 | |||
38 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audreccmdi.h#3 $ | ||
39 | |||
40 | ============================================================================*/ | ||
41 | |||
42 | /* | ||
43 | * AUDRECTASK COMMANDS | ||
44 | * ARM uses 2 queues to communicate with the AUDRECTASK | ||
45 | * 1.uPAudRecCmdQueue | ||
46 | * Location :MEMC | ||
47 | * Buffer Size : 8 | ||
48 | * No of Buffers in a queue : 3 | ||
49 | * 2.audRecUpBitStreamQueue | ||
50 | * Location : MEMC | ||
51 | * Buffer Size : 4 | ||
52 | * No of buffers in a queue : 2 | ||
53 | */ | ||
54 | |||
55 | /* | ||
56 | * Commands on uPAudRecCmdQueue | ||
57 | */ | ||
58 | |||
59 | /* | ||
60 | * Command to initiate and terminate the audio recording section | ||
61 | */ | ||
62 | |||
63 | #define AUDREC_CMD_CFG 0x0000 | ||
64 | #define AUDREC_CMD_CFG_LEN sizeof(audrec_cmd_cfg) | ||
65 | |||
66 | #define AUDREC_CMD_TYPE_0_INDEX_WAV 0x0000 | ||
67 | #define AUDREC_CMD_TYPE_0_INDEX_AAC 0x0001 | ||
68 | |||
69 | #define AUDREC_CMD_TYPE_0_ENA 0x4000 | ||
70 | #define AUDREC_CMD_TYPE_0_DIS 0x0000 | ||
71 | |||
72 | #define AUDREC_CMD_TYPE_0_NOUPDATE 0x0000 | ||
73 | #define AUDREC_CMD_TYPE_0_UPDATE 0x8000 | ||
74 | |||
75 | #define AUDREC_CMD_TYPE_1_INDEX_SBC 0x0002 | ||
76 | |||
77 | #define AUDREC_CMD_TYPE_1_ENA 0x4000 | ||
78 | #define AUDREC_CMD_TYPE_1_DIS 0x0000 | ||
79 | |||
80 | #define AUDREC_CMD_TYPE_1_NOUPDATE 0x0000 | ||
81 | #define AUDREC_CMD_TYPE_1_UPDATE 0x8000 | ||
82 | |||
83 | typedef struct { | ||
84 | unsigned short cmd_id; | ||
85 | unsigned short type_0; | ||
86 | unsigned short type_1; | ||
87 | } __attribute__((packed)) audrec_cmd_cfg; | ||
88 | |||
89 | |||
90 | /* | ||
91 | * Command to configure the recording parameters for RecType0(AAC/WAV) encoder | ||
92 | */ | ||
93 | |||
94 | #define AUDREC_CMD_AREC0PARAM_CFG 0x0001 | ||
95 | #define AUDREC_CMD_AREC0PARAM_CFG_LEN \ | ||
96 | sizeof(audrec_cmd_arec0param_cfg) | ||
97 | |||
98 | #define AUDREC_CMD_SAMP_RATE_INDX_8000 0x000B | ||
99 | #define AUDREC_CMD_SAMP_RATE_INDX_11025 0x000A | ||
100 | #define AUDREC_CMD_SAMP_RATE_INDX_12000 0x0009 | ||
101 | #define AUDREC_CMD_SAMP_RATE_INDX_16000 0x0008 | ||
102 | #define AUDREC_CMD_SAMP_RATE_INDX_22050 0x0007 | ||
103 | #define AUDREC_CMD_SAMP_RATE_INDX_24000 0x0006 | ||
104 | #define AUDREC_CMD_SAMP_RATE_INDX_32000 0x0005 | ||
105 | #define AUDREC_CMD_SAMP_RATE_INDX_44100 0x0004 | ||
106 | #define AUDREC_CMD_SAMP_RATE_INDX_48000 0x0003 | ||
107 | |||
108 | #define AUDREC_CMD_STEREO_MODE_MONO 0x0000 | ||
109 | #define AUDREC_CMD_STEREO_MODE_STEREO 0x0001 | ||
110 | |||
111 | typedef struct { | ||
112 | unsigned short cmd_id; | ||
113 | unsigned short ptr_to_extpkt_buffer_msw; | ||
114 | unsigned short ptr_to_extpkt_buffer_lsw; | ||
115 | unsigned short buf_len; | ||
116 | unsigned short samp_rate_index; | ||
117 | unsigned short stereo_mode; | ||
118 | unsigned short rec_quality; | ||
119 | } __attribute__((packed)) audrec_cmd_arec0param_cfg; | ||
120 | |||
121 | /* | ||
122 | * Command to configure the recording parameters for RecType1(SBC) encoder | ||
123 | */ | ||
124 | |||
125 | #define AUDREC_CMD_AREC1PARAM_CFG 0x0002 | ||
126 | #define AUDREC_CMD_AREC1PARAM_CFG_LEN \ | ||
127 | sizeof(audrec_cmd_arec1param_cfg) | ||
128 | |||
129 | #define AUDREC_CMD_PARAM_BUF_BLOCKS_4 0x0000 | ||
130 | #define AUDREC_CMD_PARAM_BUF_BLOCKS_8 0x0001 | ||
131 | #define AUDREC_CMD_PARAM_BUF_BLOCKS_12 0x0002 | ||
132 | #define AUDREC_CMD_PARAM_BUF_BLOCKS_16 0x0003 | ||
133 | |||
134 | #define AUDREC_CMD_PARAM_BUF_SUB_BANDS_8 0x0010 | ||
135 | #define AUDREC_CMD_PARAM_BUF_MODE_MONO 0x0000 | ||
136 | #define AUDREC_CMD_PARAM_BUF_MODE_DUAL 0x0040 | ||
137 | #define AUDREC_CMD_PARAM_BUF_MODE_STEREO 0x0050 | ||
138 | #define AUDREC_CMD_PARAM_BUF_MODE_JSTEREO 0x0060 | ||
139 | #define AUDREC_CMD_PARAM_BUF_LOUDNESS 0x0000 | ||
140 | #define AUDREC_CMD_PARAM_BUF_SNR 0x0100 | ||
141 | #define AUDREC_CMD_PARAM_BUF_BASIC_VER 0x0000 | ||
142 | |||
143 | typedef struct { | ||
144 | unsigned short cmd_id; | ||
145 | unsigned short ptr_to_extpkt_buffer_msw; | ||
146 | unsigned short ptr_to_extpkt_buffer_lsw; | ||
147 | unsigned short buf_len; | ||
148 | unsigned short param_buf; | ||
149 | unsigned short bit_rate_0; | ||
150 | unsigned short bit_rate_1; | ||
151 | } __attribute__((packed)) audrec_cmd_arec1param_cfg; | ||
152 | |||
153 | |||
154 | /* | ||
155 | * Commands on audRecUpBitStreamQueue | ||
156 | */ | ||
157 | |||
158 | /* | ||
159 | * Command to indicate the current packet read count | ||
160 | */ | ||
161 | |||
162 | #define AUDREC_CMD_PACKET_EXT_PTR 0x0000 | ||
163 | #define AUDREC_CMD_PACKET_EXT_PTR_LEN \ | ||
164 | sizeof(audrec_cmd_packet_ext_ptr) | ||
165 | |||
166 | #define AUDREC_CMD_TYPE_0 0x0000 | ||
167 | #define AUDREC_CMD_TYPE_1 0x0001 | ||
168 | |||
169 | typedef struct { | ||
170 | unsigned short cmd_id; | ||
171 | unsigned short type; | ||
172 | unsigned short curr_rec_count_msw; | ||
173 | unsigned short curr_rec_count_lsw; | ||
174 | } __attribute__((packed)) audrec_cmd_packet_ext_ptr; | ||
175 | |||
176 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h new file mode 100644 index 000000000000..bb6eb5093cf5 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5audrecmsg.h | |||
@@ -0,0 +1,127 @@ | |||
1 | #ifndef QDSP5AUDRECMSGI_H | ||
2 | #define QDSP5AUDRECMSGI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | A U D I O R E C O R D M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of messages | ||
10 | that are sent by AUDREC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | |||
31 | /*=========================================================================== | ||
32 | |||
33 | EDIT HISTORY FOR FILE | ||
34 | |||
35 | This section contains comments describing changes made to this file. | ||
36 | Notice that changes are listed in reverse chronological order. | ||
37 | |||
38 | $Header: //source/qcom/qct/multimedia2/Audio/drivers/QDSP5Driver/QDSP5Interface/main/latest/qdsp5audrecmsg.h#3 $ | ||
39 | |||
40 | ============================================================================*/ | ||
41 | |||
42 | /* | ||
43 | * AUDRECTASK MESSAGES | ||
44 | * AUDRECTASK uses audRecUpRlist to communicate with ARM | ||
45 | * Location : MEMC | ||
46 | * Buffer size : 4 | ||
47 | * No of buffers in a queue : 2 | ||
48 | */ | ||
49 | |||
50 | /* | ||
51 | * Message to notify that config command is done | ||
52 | */ | ||
53 | |||
54 | #define AUDREC_MSG_CMD_CFG_DONE_MSG 0x0002 | ||
55 | #define AUDREC_MSG_CMD_CFG_DONE_MSG_LEN \ | ||
56 | sizeof(audrec_msg_cmd_cfg_done_msg) | ||
57 | |||
58 | |||
59 | #define AUDREC_MSG_CFG_DONE_TYPE_0_ENA 0x4000 | ||
60 | #define AUDREC_MSG_CFG_DONE_TYPE_0_DIS 0x0000 | ||
61 | |||
62 | #define AUDREC_MSG_CFG_DONE_TYPE_0_NO_UPDATE 0x0000 | ||
63 | #define AUDREC_MSG_CFG_DONE_TYPE_0_UPDATE 0x8000 | ||
64 | |||
65 | #define AUDREC_MSG_CFG_DONE_TYPE_1_ENA 0x4000 | ||
66 | #define AUDREC_MSG_CFG_DONE_TYPE_1_DIS 0x0000 | ||
67 | |||
68 | #define AUDREC_MSG_CFG_DONE_TYPE_1_NO_UPDATE 0x0000 | ||
69 | #define AUDREC_MSG_CFG_DONE_TYPE_1_UPDATE 0x8000 | ||
70 | |||
71 | typedef struct { | ||
72 | unsigned short type_0; | ||
73 | unsigned short type_1; | ||
74 | } __attribute__((packed))audrec_msg_cmd_cfg_done_msg; | ||
75 | |||
76 | |||
77 | /* | ||
78 | * Message to notify arec0/1 cfg done and recording params revd by task | ||
79 | */ | ||
80 | |||
81 | #define AUDREC_MSG_CMD_AREC_PARAM_CFG_DONE_MSG 0x0003 | ||
82 | #define AUDREC_MSG_CMD_AREC_PARAM_CFG_DONE_MSG_LEN \ | ||
83 | sizeof(audrec_msg_cmd_arec_param_cfg_done_msg) | ||
84 | |||
85 | #define AUDREC_MSG_AREC_PARAM_TYPE_0 0x0000 | ||
86 | #define AUDREC_MSG_AREC_PARAM_TYPE_1 0x0001 | ||
87 | |||
88 | typedef struct { | ||
89 | unsigned short type; | ||
90 | } __attribute__((packed))audrec_msg_cmd_arec_param_cfg_done_msg; | ||
91 | |||
92 | |||
93 | /* | ||
94 | * Message to notify no more buffers are available in ext mem to DME | ||
95 | */ | ||
96 | |||
97 | #define AUDREC_MSG_FATAL_ERR_MSG 0x0004 | ||
98 | #define AUDREC_MSG_FATAL_ERR_MSG_LEN \ | ||
99 | sizeof(audrec_msg_fatal_err_msg) | ||
100 | |||
101 | #define AUDREC_MSG_FATAL_ERR_TYPE_0 0x0000 | ||
102 | #define AUDREC_MSG_FATAL_ERR_TYPE_1 0x0001 | ||
103 | |||
104 | typedef struct { | ||
105 | unsigned short type; | ||
106 | } __attribute__((packed))audrec_msg_fatal_err_msg; | ||
107 | |||
108 | /* | ||
109 | * Message to notify DME deliverd the encoded pkt to ext pkt buffer | ||
110 | */ | ||
111 | |||
112 | #define AUDREC_MSG_PACKET_READY_MSG 0x0005 | ||
113 | #define AUDREC_MSG_PACKET_READY_MSG_LEN \ | ||
114 | sizeof(audrec_msg_packet_ready_msg) | ||
115 | |||
116 | #define AUDREC_MSG_PACKET_READY_TYPE_0 0x0000 | ||
117 | #define AUDREC_MSG_PACKET_READY_TYPE_1 0x0001 | ||
118 | |||
119 | typedef struct { | ||
120 | unsigned short type; | ||
121 | unsigned short pkt_counter_msw; | ||
122 | unsigned short pkt_counter_lsw; | ||
123 | unsigned short pkt_read_cnt_msw; | ||
124 | unsigned short pkt_read_cnt_lsw; | ||
125 | } __attribute__((packed))audrec_msg_packet_ready_msg; | ||
126 | |||
127 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h new file mode 100644 index 000000000000..574ad6bbcade --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegcmdi.h | |||
@@ -0,0 +1,376 @@ | |||
1 | #ifndef QDSP5VIDJPEGCMDI_H | ||
2 | #define QDSP5VIDJPEGCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | J P E G I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by JPEG Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | when who what, where, why | ||
40 | -------- --- ---------------------------------------------------------- | ||
41 | 06/09/08 sv initial version | ||
42 | ===========================================================================*/ | ||
43 | |||
44 | /* | ||
45 | * ARM to JPEG configuration commands are passed through the | ||
46 | * uPJpegCfgCmdQueue | ||
47 | */ | ||
48 | |||
49 | /* | ||
50 | * Command to configure JPEG Encoder | ||
51 | */ | ||
52 | |||
53 | #define JPEG_CMD_ENC_CFG 0x0000 | ||
54 | #define JPEG_CMD_ENC_CFG_LEN sizeof(jpeg_cmd_enc_cfg) | ||
55 | |||
56 | #define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_0 0x0000 | ||
57 | #define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_90 0x0100 | ||
58 | #define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_180 0x0200 | ||
59 | #define JPEG_CMD_ENC_PROCESS_CFG_OP_ROTATION_270 0x0300 | ||
60 | #define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_M 0x0003 | ||
61 | #define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H2V2 0x0000 | ||
62 | #define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H2V1 0x0001 | ||
63 | #define JPEG_CMD_ENC_PROCESS_CFG_IP_DATA_FORMAT_H1V2 0x0002 | ||
64 | |||
65 | #define JPEG_CMD_IP_SIZE_CFG_LUMA_HEIGHT_M 0x0000FFFF | ||
66 | #define JPEG_CMD_IP_SIZE_CFG_LUMA_WIDTH_M 0xFFFF0000 | ||
67 | #define JPEG_CMD_ENC_UPSAMP_IP_SIZE_CFG_ENA 0x0001 | ||
68 | #define JPEG_CMD_ENC_UPSAMP_IP_SIZE_CFG_DIS 0x0000 | ||
69 | |||
70 | #define JPEG_CMD_FRAG_SIZE_LUMA_HEIGHT_M 0xFFFF | ||
71 | |||
72 | typedef struct { | ||
73 | unsigned int cmd_id; | ||
74 | unsigned int process_cfg; | ||
75 | unsigned int ip_size_cfg; | ||
76 | unsigned int op_size_cfg; | ||
77 | unsigned int frag_cfg; | ||
78 | unsigned int frag_cfg_part[16]; | ||
79 | |||
80 | unsigned int part_num; | ||
81 | |||
82 | unsigned int op_buf_0_cfg_part1; | ||
83 | unsigned int op_buf_0_cfg_part2; | ||
84 | unsigned int op_buf_1_cfg_part1; | ||
85 | unsigned int op_buf_1_cfg_part2; | ||
86 | |||
87 | unsigned int luma_qunt_table[32]; | ||
88 | unsigned int chroma_qunt_table[32]; | ||
89 | |||
90 | unsigned int upsamp_ip_size_cfg; | ||
91 | unsigned int upsamp_ip_frame_off; | ||
92 | unsigned int upsamp_pp_filter_coeff[64]; | ||
93 | } __attribute__((packed)) jpeg_cmd_enc_cfg; | ||
94 | |||
95 | /* | ||
96 | * Command to configure JPEG Decoder | ||
97 | */ | ||
98 | |||
99 | #define JPEG_CMD_DEC_CFG 0x0001 | ||
100 | #define JPEG_CMD_DEC_CFG_LEN sizeof(jpeg_cmd_dec_cfg) | ||
101 | |||
102 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_M 0x0001 | ||
103 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_H2V2 0x0000 | ||
104 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_H2V1 0x0001 | ||
105 | |||
106 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_8 0x000000 | ||
107 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_4 0x010000 | ||
108 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_2 0x020000 | ||
109 | #define JPEG_CMD_DEC_OP_DATA_FORMAT_SCALE_FACTOR_1 0x030000 | ||
110 | |||
111 | #define JPEG_CMD_DEC_IP_STREAM_BUF_CFG_PART3_NOT_FINAL 0x0000 | ||
112 | #define JPEG_CMD_DEC_IP_STREAM_BUF_CFG_PART3_FINAL 0x0001 | ||
113 | |||
114 | |||
115 | typedef struct { | ||
116 | unsigned int cmd_id; | ||
117 | unsigned int img_dimension_cfg; | ||
118 | unsigned int op_data_format; | ||
119 | unsigned int restart_interval; | ||
120 | unsigned int ip_buf_partition_num; | ||
121 | unsigned int ip_stream_buf_cfg_part1; | ||
122 | unsigned int ip_stream_buf_cfg_part2; | ||
123 | unsigned int ip_stream_buf_cfg_part3; | ||
124 | unsigned int op_stream_buf_0_cfg_part1; | ||
125 | unsigned int op_stream_buf_0_cfg_part2; | ||
126 | unsigned int op_stream_buf_0_cfg_part3; | ||
127 | unsigned int op_stream_buf_1_cfg_part1; | ||
128 | unsigned int op_stream_buf_1_cfg_part2; | ||
129 | unsigned int op_stream_buf_1_cfg_part3; | ||
130 | unsigned int luma_qunt_table_0_3; | ||
131 | unsigned int luma_qunt_table_4_7; | ||
132 | unsigned int luma_qunt_table_8_11; | ||
133 | unsigned int luma_qunt_table_12_15; | ||
134 | unsigned int luma_qunt_table_16_19; | ||
135 | unsigned int luma_qunt_table_20_23; | ||
136 | unsigned int luma_qunt_table_24_27; | ||
137 | unsigned int luma_qunt_table_28_31; | ||
138 | unsigned int luma_qunt_table_32_35; | ||
139 | unsigned int luma_qunt_table_36_39; | ||
140 | unsigned int luma_qunt_table_40_43; | ||
141 | unsigned int luma_qunt_table_44_47; | ||
142 | unsigned int luma_qunt_table_48_51; | ||
143 | unsigned int luma_qunt_table_52_55; | ||
144 | unsigned int luma_qunt_table_56_59; | ||
145 | unsigned int luma_qunt_table_60_63; | ||
146 | unsigned int chroma_qunt_table_0_3; | ||
147 | unsigned int chroma_qunt_table_4_7; | ||
148 | unsigned int chroma_qunt_table_8_11; | ||
149 | unsigned int chroma_qunt_table_12_15; | ||
150 | unsigned int chroma_qunt_table_16_19; | ||
151 | unsigned int chroma_qunt_table_20_23; | ||
152 | unsigned int chroma_qunt_table_24_27; | ||
153 | unsigned int chroma_qunt_table_28_31; | ||
154 | unsigned int chroma_qunt_table_32_35; | ||
155 | unsigned int chroma_qunt_table_36_39; | ||
156 | unsigned int chroma_qunt_table_40_43; | ||
157 | unsigned int chroma_qunt_table_44_47; | ||
158 | unsigned int chroma_qunt_table_48_51; | ||
159 | unsigned int chroma_qunt_table_52_55; | ||
160 | unsigned int chroma_qunt_table_56_59; | ||
161 | unsigned int chroma_qunt_table_60_63; | ||
162 | unsigned int luma_dc_hm_code_cnt_table_0_3; | ||
163 | unsigned int luma_dc_hm_code_cnt_table_4_7; | ||
164 | unsigned int luma_dc_hm_code_cnt_table_8_11; | ||
165 | unsigned int luma_dc_hm_code_cnt_table_12_15; | ||
166 | unsigned int luma_dc_hm_code_val_table_0_3; | ||
167 | unsigned int luma_dc_hm_code_val_table_4_7; | ||
168 | unsigned int luma_dc_hm_code_val_table_8_11; | ||
169 | unsigned int chroma_dc_hm_code_cnt_table_0_3; | ||
170 | unsigned int chroma_dc_hm_code_cnt_table_4_7; | ||
171 | unsigned int chroma_dc_hm_code_cnt_table_8_11; | ||
172 | unsigned int chroma_dc_hm_code_cnt_table_12_15; | ||
173 | unsigned int chroma_dc_hm_code_val_table_0_3; | ||
174 | unsigned int chroma_dc_hm_code_val_table_4_7; | ||
175 | unsigned int chroma_dc_hm_code_val_table_8_11; | ||
176 | unsigned int luma_ac_hm_code_cnt_table_0_3; | ||
177 | unsigned int luma_ac_hm_code_cnt_table_4_7; | ||
178 | unsigned int luma_ac_hm_code_cnt_table_8_11; | ||
179 | unsigned int luma_ac_hm_code_cnt_table_12_15; | ||
180 | unsigned int luma_ac_hm_code_val_table_0_3; | ||
181 | unsigned int luma_ac_hm_code_val_table_4_7; | ||
182 | unsigned int luma_ac_hm_code_val_table_8_11; | ||
183 | unsigned int luma_ac_hm_code_val_table_12_15; | ||
184 | unsigned int luma_ac_hm_code_val_table_16_19; | ||
185 | unsigned int luma_ac_hm_code_val_table_20_23; | ||
186 | unsigned int luma_ac_hm_code_val_table_24_27; | ||
187 | unsigned int luma_ac_hm_code_val_table_28_31; | ||
188 | unsigned int luma_ac_hm_code_val_table_32_35; | ||
189 | unsigned int luma_ac_hm_code_val_table_36_39; | ||
190 | unsigned int luma_ac_hm_code_val_table_40_43; | ||
191 | unsigned int luma_ac_hm_code_val_table_44_47; | ||
192 | unsigned int luma_ac_hm_code_val_table_48_51; | ||
193 | unsigned int luma_ac_hm_code_val_table_52_55; | ||
194 | unsigned int luma_ac_hm_code_val_table_56_59; | ||
195 | unsigned int luma_ac_hm_code_val_table_60_63; | ||
196 | unsigned int luma_ac_hm_code_val_table_64_67; | ||
197 | unsigned int luma_ac_hm_code_val_table_68_71; | ||
198 | unsigned int luma_ac_hm_code_val_table_72_75; | ||
199 | unsigned int luma_ac_hm_code_val_table_76_79; | ||
200 | unsigned int luma_ac_hm_code_val_table_80_83; | ||
201 | unsigned int luma_ac_hm_code_val_table_84_87; | ||
202 | unsigned int luma_ac_hm_code_val_table_88_91; | ||
203 | unsigned int luma_ac_hm_code_val_table_92_95; | ||
204 | unsigned int luma_ac_hm_code_val_table_96_99; | ||
205 | unsigned int luma_ac_hm_code_val_table_100_103; | ||
206 | unsigned int luma_ac_hm_code_val_table_104_107; | ||
207 | unsigned int luma_ac_hm_code_val_table_108_111; | ||
208 | unsigned int luma_ac_hm_code_val_table_112_115; | ||
209 | unsigned int luma_ac_hm_code_val_table_116_119; | ||
210 | unsigned int luma_ac_hm_code_val_table_120_123; | ||
211 | unsigned int luma_ac_hm_code_val_table_124_127; | ||
212 | unsigned int luma_ac_hm_code_val_table_128_131; | ||
213 | unsigned int luma_ac_hm_code_val_table_132_135; | ||
214 | unsigned int luma_ac_hm_code_val_table_136_139; | ||
215 | unsigned int luma_ac_hm_code_val_table_140_143; | ||
216 | unsigned int luma_ac_hm_code_val_table_144_147; | ||
217 | unsigned int luma_ac_hm_code_val_table_148_151; | ||
218 | unsigned int luma_ac_hm_code_val_table_152_155; | ||
219 | unsigned int luma_ac_hm_code_val_table_156_159; | ||
220 | unsigned int luma_ac_hm_code_val_table_160_161; | ||
221 | unsigned int chroma_ac_hm_code_cnt_table_0_3; | ||
222 | unsigned int chroma_ac_hm_code_cnt_table_4_7; | ||
223 | unsigned int chroma_ac_hm_code_cnt_table_8_11; | ||
224 | unsigned int chroma_ac_hm_code_cnt_table_12_15; | ||
225 | unsigned int chroma_ac_hm_code_val_table_0_3; | ||
226 | unsigned int chroma_ac_hm_code_val_table_4_7; | ||
227 | unsigned int chroma_ac_hm_code_val_table_8_11; | ||
228 | unsigned int chroma_ac_hm_code_val_table_12_15; | ||
229 | unsigned int chroma_ac_hm_code_val_table_16_19; | ||
230 | unsigned int chroma_ac_hm_code_val_table_20_23; | ||
231 | unsigned int chroma_ac_hm_code_val_table_24_27; | ||
232 | unsigned int chroma_ac_hm_code_val_table_28_31; | ||
233 | unsigned int chroma_ac_hm_code_val_table_32_35; | ||
234 | unsigned int chroma_ac_hm_code_val_table_36_39; | ||
235 | unsigned int chroma_ac_hm_code_val_table_40_43; | ||
236 | unsigned int chroma_ac_hm_code_val_table_44_47; | ||
237 | unsigned int chroma_ac_hm_code_val_table_48_51; | ||
238 | unsigned int chroma_ac_hm_code_val_table_52_55; | ||
239 | unsigned int chroma_ac_hm_code_val_table_56_59; | ||
240 | unsigned int chroma_ac_hm_code_val_table_60_63; | ||
241 | unsigned int chroma_ac_hm_code_val_table_64_67; | ||
242 | unsigned int chroma_ac_hm_code_val_table_68_71; | ||
243 | unsigned int chroma_ac_hm_code_val_table_72_75; | ||
244 | unsigned int chroma_ac_hm_code_val_table_76_79; | ||
245 | unsigned int chroma_ac_hm_code_val_table_80_83; | ||
246 | unsigned int chroma_ac_hm_code_val_table_84_87; | ||
247 | unsigned int chroma_ac_hm_code_val_table_88_91; | ||
248 | unsigned int chroma_ac_hm_code_val_table_92_95; | ||
249 | unsigned int chroma_ac_hm_code_val_table_96_99; | ||
250 | unsigned int chroma_ac_hm_code_val_table_100_103; | ||
251 | unsigned int chroma_ac_hm_code_val_table_104_107; | ||
252 | unsigned int chroma_ac_hm_code_val_table_108_111; | ||
253 | unsigned int chroma_ac_hm_code_val_table_112_115; | ||
254 | unsigned int chroma_ac_hm_code_val_table_116_119; | ||
255 | unsigned int chroma_ac_hm_code_val_table_120_123; | ||
256 | unsigned int chroma_ac_hm_code_val_table_124_127; | ||
257 | unsigned int chroma_ac_hm_code_val_table_128_131; | ||
258 | unsigned int chroma_ac_hm_code_val_table_132_135; | ||
259 | unsigned int chroma_ac_hm_code_val_table_136_139; | ||
260 | unsigned int chroma_ac_hm_code_val_table_140_143; | ||
261 | unsigned int chroma_ac_hm_code_val_table_144_147; | ||
262 | unsigned int chroma_ac_hm_code_val_table_148_151; | ||
263 | unsigned int chroma_ac_hm_code_val_table_152_155; | ||
264 | unsigned int chroma_ac_hm_code_val_table_156_159; | ||
265 | unsigned int chroma_ac_hm_code_val_table_160_161; | ||
266 | } __attribute__((packed)) jpeg_cmd_dec_cfg; | ||
267 | |||
268 | |||
269 | /* | ||
270 | * ARM to JPEG configuration commands are passed through the | ||
271 | * uPJpegActionCmdQueue | ||
272 | */ | ||
273 | |||
274 | /* | ||
275 | * Command to start the encode process | ||
276 | */ | ||
277 | |||
278 | #define JPEG_CMD_ENC_ENCODE 0x0000 | ||
279 | #define JPEG_CMD_ENC_ENCODE_LEN sizeof(jpeg_cmd_enc_encode) | ||
280 | |||
281 | |||
282 | typedef struct { | ||
283 | unsigned short cmd_id; | ||
284 | } __attribute__((packed)) jpeg_cmd_enc_encode; | ||
285 | |||
286 | |||
287 | /* | ||
288 | * Command to transition from current state of encoder to IDLE state | ||
289 | */ | ||
290 | |||
291 | #define JPEG_CMD_ENC_IDLE 0x0001 | ||
292 | #define JPEG_CMD_ENC_IDLE_LEN sizeof(jpeg_cmd_enc_idle) | ||
293 | |||
294 | |||
295 | typedef struct { | ||
296 | unsigned short cmd_id; | ||
297 | } __attribute__((packed)) jpeg_cmd_enc_idle; | ||
298 | |||
299 | |||
300 | /* | ||
301 | * Command to inform the encoder that another buffer is ready | ||
302 | */ | ||
303 | |||
304 | #define JPEG_CMD_ENC_OP_CONSUMED 0x0002 | ||
305 | #define JPEG_CMD_ENC_OP_CONSUMED_LEN sizeof(jpeg_cmd_enc_op_consumed) | ||
306 | |||
307 | |||
308 | typedef struct { | ||
309 | unsigned int cmd_id; | ||
310 | unsigned int op_buf_addr; | ||
311 | unsigned int op_buf_size; | ||
312 | } __attribute__((packed)) jpeg_cmd_enc_op_consumed; | ||
313 | |||
314 | |||
315 | /* | ||
316 | * Command to start the decoding process | ||
317 | */ | ||
318 | |||
319 | #define JPEG_CMD_DEC_DECODE 0x0003 | ||
320 | #define JPEG_CMD_DEC_DECODE_LEN sizeof(jpeg_cmd_dec_decode) | ||
321 | |||
322 | |||
323 | typedef struct { | ||
324 | unsigned short cmd_id; | ||
325 | } __attribute__((packed)) jpeg_cmd_dec_decode; | ||
326 | |||
327 | |||
328 | /* | ||
329 | * Command to transition from the current state of decoder to IDLE | ||
330 | */ | ||
331 | |||
332 | #define JPEG_CMD_DEC_IDLE 0x0004 | ||
333 | #define JPEG_CMD_DEC_IDLE_LEN sizeof(jpeg_cmd_dec_idle) | ||
334 | |||
335 | |||
336 | typedef struct { | ||
337 | unsigned short cmd_id; | ||
338 | } __attribute__((packed)) jpeg_cmd_dec_idle; | ||
339 | |||
340 | |||
341 | /* | ||
342 | * Command to inform that an op buffer is ready for use | ||
343 | */ | ||
344 | |||
345 | #define JPEG_CMD_DEC_OP_CONSUMED 0x0005 | ||
346 | #define JPEG_CMD_DEC_OP_CONSUMED_LEN sizeof(jpeg_cmd_dec_op_consumed) | ||
347 | |||
348 | |||
349 | typedef struct { | ||
350 | unsigned int cmd_id; | ||
351 | unsigned int luma_op_buf_addr; | ||
352 | unsigned int luma_op_buf_size; | ||
353 | unsigned int chroma_op_buf_addr; | ||
354 | } __attribute__((packed)) jpeg_cmd_dec_op_consumed; | ||
355 | |||
356 | |||
357 | /* | ||
358 | * Command to pass a new ip buffer to the jpeg decoder | ||
359 | */ | ||
360 | |||
361 | #define JPEG_CMD_DEC_IP 0x0006 | ||
362 | #define JPEG_CMD_DEC_IP_LEN sizeof(jpeg_cmd_dec_ip_len) | ||
363 | |||
364 | #define JPEG_CMD_EOI_INDICATOR_NOT_END 0x0000 | ||
365 | #define JPEG_CMD_EOI_INDICATOR_END 0x0001 | ||
366 | |||
367 | typedef struct { | ||
368 | unsigned int cmd_id; | ||
369 | unsigned int ip_buf_addr; | ||
370 | unsigned int ip_buf_size; | ||
371 | unsigned int eoi_indicator; | ||
372 | } __attribute__((packed)) jpeg_cmd_dec_ip; | ||
373 | |||
374 | |||
375 | |||
376 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h new file mode 100644 index 000000000000..d11aa3fbccb6 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5jpegmsg.h | |||
@@ -0,0 +1,177 @@ | |||
1 | #ifndef QDSP5VIDJPEGMSGI_H | ||
2 | #define QDSP5VIDJPEGMSGI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | J P E G I N T E R N A L M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of messages | ||
10 | that are sent by JPEG Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5jpegmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 05/10/08 sv initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | /* | ||
46 | * Messages from JPEG task to ARM through jpeguPMsgQueue | ||
47 | */ | ||
48 | |||
49 | /* | ||
50 | * Message is ACK for CMD_JPEGE_ENCODE cmd | ||
51 | */ | ||
52 | |||
53 | #define JPEG_MSG_ENC_ENCODE_ACK 0x0000 | ||
54 | #define JPEG_MSG_ENC_ENCODE_ACK_LEN \ | ||
55 | sizeof(jpeg_msg_enc_encode_ack) | ||
56 | |||
57 | typedef struct { | ||
58 | } __attribute__((packed)) jpeg_msg_enc_encode_ack; | ||
59 | |||
60 | |||
61 | /* | ||
62 | * Message informs the up when op buffer is ready for consumption and | ||
63 | * when encoding is complete or errors | ||
64 | */ | ||
65 | |||
66 | #define JPEG_MSG_ENC_OP_PRODUCED 0x0001 | ||
67 | #define JPEG_MSG_ENC_OP_PRODUCED_LEN \ | ||
68 | sizeof(jpeg_msg_enc_op_produced) | ||
69 | |||
70 | #define JPEG_MSGOP_OP_BUF_STATUS_ENC_DONE_PROGRESS 0x0000 | ||
71 | #define JPEG_MSGOP_OP_BUF_STATUS_ENC_DONE_COMPLETE 0x0001 | ||
72 | #define JPEG_MSGOP_OP_BUF_STATUS_ENC_ERR 0x10000 | ||
73 | |||
74 | typedef struct { | ||
75 | unsigned int op_buf_addr; | ||
76 | unsigned int op_buf_size; | ||
77 | unsigned int op_buf_status; | ||
78 | } __attribute__((packed)) jpeg_msg_enc_op_produced; | ||
79 | |||
80 | |||
81 | /* | ||
82 | * Message to ack CMD_JPEGE_IDLE | ||
83 | */ | ||
84 | |||
85 | #define JPEG_MSG_ENC_IDLE_ACK 0x0002 | ||
86 | #define JPEG_MSG_ENC_IDLE_ACK_LEN sizeof(jpeg_msg_enc_idle_ack) | ||
87 | |||
88 | |||
89 | typedef struct { | ||
90 | } __attribute__ ((packed)) jpeg_msg_enc_idle_ack; | ||
91 | |||
92 | |||
93 | /* | ||
94 | * Message to indicate the illegal command | ||
95 | */ | ||
96 | |||
97 | #define JPEG_MSG_ENC_ILLEGAL_COMMAND 0x0003 | ||
98 | #define JPEG_MSG_ENC_ILLEGAL_COMMAND_LEN \ | ||
99 | sizeof(jpeg_msg_enc_illegal_command) | ||
100 | |||
101 | typedef struct { | ||
102 | unsigned int status; | ||
103 | } __attribute__((packed)) jpeg_msg_enc_illegal_command; | ||
104 | |||
105 | |||
106 | /* | ||
107 | * Message to ACK CMD_JPEGD_DECODE | ||
108 | */ | ||
109 | |||
110 | #define JPEG_MSG_DEC_DECODE_ACK 0x0004 | ||
111 | #define JPEG_MSG_DEC_DECODE_ACK_LEN \ | ||
112 | sizeof(jpeg_msg_dec_decode_ack) | ||
113 | |||
114 | |||
115 | typedef struct { | ||
116 | } __attribute__((packed)) jpeg_msg_dec_decode_ack; | ||
117 | |||
118 | |||
119 | /* | ||
120 | * Message to inform up that an op buffer is ready for consumption and when | ||
121 | * decoding is complete or an error occurs | ||
122 | */ | ||
123 | |||
124 | #define JPEG_MSG_DEC_OP_PRODUCED 0x0005 | ||
125 | #define JPEG_MSG_DEC_OP_PRODUCED_LEN \ | ||
126 | sizeof(jpeg_msg_dec_op_produced) | ||
127 | |||
128 | #define JPEG_MSG_DEC_OP_BUF_STATUS_PROGRESS 0x0000 | ||
129 | #define JPEG_MSG_DEC_OP_BUF_STATUS_DONE 0x0001 | ||
130 | |||
131 | typedef struct { | ||
132 | unsigned int luma_op_buf_addr; | ||
133 | unsigned int chroma_op_buf_addr; | ||
134 | unsigned int num_mcus; | ||
135 | unsigned int op_buf_status; | ||
136 | } __attribute__((packed)) jpeg_msg_dec_op_produced; | ||
137 | |||
138 | /* | ||
139 | * Message to ack CMD_JPEGD_IDLE cmd | ||
140 | */ | ||
141 | |||
142 | #define JPEG_MSG_DEC_IDLE_ACK 0x0006 | ||
143 | #define JPEG_MSG_DEC_IDLE_ACK_LEN sizeof(jpeg_msg_dec_idle_ack) | ||
144 | |||
145 | |||
146 | typedef struct { | ||
147 | } __attribute__((packed)) jpeg_msg_dec_idle_ack; | ||
148 | |||
149 | |||
150 | /* | ||
151 | * Message to indicate illegal cmd was received | ||
152 | */ | ||
153 | |||
154 | #define JPEG_MSG_DEC_ILLEGAL_COMMAND 0x0007 | ||
155 | #define JPEG_MSG_DEC_ILLEGAL_COMMAND_LEN \ | ||
156 | sizeof(jpeg_msg_dec_illegal_command) | ||
157 | |||
158 | |||
159 | typedef struct { | ||
160 | unsigned int status; | ||
161 | } __attribute__((packed)) jpeg_msg_dec_illegal_command; | ||
162 | |||
163 | /* | ||
164 | * Message to request up for the next segment of ip bit stream | ||
165 | */ | ||
166 | |||
167 | #define JPEG_MSG_DEC_IP_REQUEST 0x0008 | ||
168 | #define JPEG_MSG_DEC_IP_REQUEST_LEN \ | ||
169 | sizeof(jpeg_msg_dec_ip_request) | ||
170 | |||
171 | |||
172 | typedef struct { | ||
173 | } __attribute__((packed)) jpeg_msg_dec_ip_request; | ||
174 | |||
175 | |||
176 | |||
177 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h new file mode 100644 index 000000000000..6c76e2c20cf4 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmcmdi.h | |||
@@ -0,0 +1,82 @@ | |||
1 | #ifndef QDSP5LPMCMDI_H | ||
2 | #define QDSP5LPMCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | L P M I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by LPM Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | |||
38 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmcmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
39 | Revision History: | ||
40 | |||
41 | when who what, where, why | ||
42 | -------- --- ---------------------------------------------------------- | ||
43 | 06/12/08 sv initial version | ||
44 | ===========================================================================*/ | ||
45 | |||
46 | |||
47 | /* | ||
48 | * Command to start LPM processing based on the config params | ||
49 | */ | ||
50 | |||
51 | #define LPM_CMD_START 0x0000 | ||
52 | #define LPM_CMD_START_LEN sizeof(lpm_cmd_start) | ||
53 | |||
54 | #define LPM_CMD_SPATIAL_FILTER_PART_OPMODE_0 0x00000000 | ||
55 | #define LPM_CMD_SPATIAL_FILTER_PART_OPMODE_1 0x00010000 | ||
56 | typedef struct { | ||
57 | unsigned int cmd_id; | ||
58 | unsigned int ip_data_cfg_part1; | ||
59 | unsigned int ip_data_cfg_part2; | ||
60 | unsigned int ip_data_cfg_part3; | ||
61 | unsigned int ip_data_cfg_part4; | ||
62 | unsigned int op_data_cfg_part1; | ||
63 | unsigned int op_data_cfg_part2; | ||
64 | unsigned int op_data_cfg_part3; | ||
65 | unsigned int spatial_filter_part[32]; | ||
66 | } __attribute__((packed)) lpm_cmd_start; | ||
67 | |||
68 | |||
69 | |||
70 | /* | ||
71 | * Command to stop LPM processing | ||
72 | */ | ||
73 | |||
74 | #define LPM_CMD_IDLE 0x0001 | ||
75 | #define LPM_CMD_IDLE_LEN sizeof(lpm_cmd_idle) | ||
76 | |||
77 | typedef struct { | ||
78 | unsigned int cmd_id; | ||
79 | } __attribute__((packed)) lpm_cmd_idle; | ||
80 | |||
81 | |||
82 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h new file mode 100644 index 000000000000..3d1039d6ba42 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5lpmmsg.h | |||
@@ -0,0 +1,80 @@ | |||
1 | #ifndef QDSP5LPMMSGI_H | ||
2 | #define QDSP5LPMMSGI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | L P M I N T E R N A L M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by LPM Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5lpmmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 06/12/08 sv initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | /* | ||
46 | * Message to acknowledge CMD_LPM_IDLE command | ||
47 | */ | ||
48 | |||
49 | #define LPM_MSG_IDLE_ACK 0x0000 | ||
50 | #define LPM_MSG_IDLE_ACK_LEN sizeof(lpm_msg_idle_ack) | ||
51 | |||
52 | typedef struct { | ||
53 | } __attribute__((packed)) lpm_msg_idle_ack; | ||
54 | |||
55 | |||
56 | /* | ||
57 | * Message to acknowledge CMD_LPM_START command | ||
58 | */ | ||
59 | |||
60 | |||
61 | #define LPM_MSG_START_ACK 0x0001 | ||
62 | #define LPM_MSG_START_ACK_LEN sizeof(lpm_msg_start_ack) | ||
63 | |||
64 | |||
65 | typedef struct { | ||
66 | } __attribute__((packed)) lpm_msg_start_ack; | ||
67 | |||
68 | |||
69 | /* | ||
70 | * Message to notify the ARM that LPM processing is complete | ||
71 | */ | ||
72 | |||
73 | #define LPM_MSG_DONE 0x0002 | ||
74 | #define LPM_MSG_DONE_LEN sizeof(lpm_msg_done) | ||
75 | |||
76 | typedef struct { | ||
77 | } __attribute__((packed)) lpm_msg_done; | ||
78 | |||
79 | |||
80 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h new file mode 100644 index 000000000000..3a32ee99c6e4 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdeccmdi.h | |||
@@ -0,0 +1,235 @@ | |||
1 | #ifndef QDSP5VIDDECCMDI_H | ||
2 | #define QDSP5VIDDECCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | V I D E O D E C O D E R I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by VIDDEC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdeccmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 05/10/08 ac initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | |||
46 | /* | ||
47 | * Command to inform VIDDEC that new subframe packet is ready | ||
48 | */ | ||
49 | |||
50 | #define VIDDEC_CMD_SUBFRAME_PKT 0x0000 | ||
51 | #define VIDDEC_CMD_SUBFRAME_PKT_LEN \ | ||
52 | sizeof(viddec_cmd_subframe_pkt) | ||
53 | |||
54 | #define VIDDEC_CMD_SF_INFO_1_DM_DMA_STATS_EXCHANGE_FLAG_DM 0x0000 | ||
55 | #define VIDDEC_CMD_SF_INFO_1_DM_DMA_STATS_EXCHANGE_FLAG_DMA 0x0001 | ||
56 | |||
57 | #define VIDDEC_CMD_SF_INFO_0_SUBFRAME_CONTI 0x0000 | ||
58 | #define VIDDEC_CMD_SF_INFO_0_SUBFRAME_FIRST 0x0001 | ||
59 | #define VIDDEC_CMD_SF_INFO_0_SUBFRAME_LAST 0x0002 | ||
60 | #define VIDDEC_CMD_SF_INFO_0_SUBFRAME_FIRST_AND_LAST 0x0003 | ||
61 | |||
62 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_MPEG_4 0x0000 | ||
63 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_H_263_P0 0x0001 | ||
64 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_H_264 0x0002 | ||
65 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_H_263_p3 0x0003 | ||
66 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_RV9 0x0004 | ||
67 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_WMV9 0x0005 | ||
68 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_SMCDB 0x0006 | ||
69 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_QFRE 0x0007 | ||
70 | #define VIDDEC_CMD_CODEC_SELECTION_WORD_VLD 0x0008 | ||
71 | |||
72 | typedef struct { | ||
73 | unsigned short cmd_id; | ||
74 | unsigned short packet_seq_number; | ||
75 | unsigned short codec_instance_id; | ||
76 | unsigned short subframe_packet_size_high; | ||
77 | unsigned short subframe_packet_size_low; | ||
78 | unsigned short subframe_packet_high; | ||
79 | unsigned short subframe_packet_low; | ||
80 | unsigned short subframe_packet_partition; | ||
81 | unsigned short statistics_packet_size_high; | ||
82 | unsigned short statistics_packet_size_low; | ||
83 | unsigned short statistics_packet_high; | ||
84 | unsigned short statistics_packet_low; | ||
85 | unsigned short statistics_partition; | ||
86 | unsigned short subframe_info_1; | ||
87 | unsigned short subframe_info_0; | ||
88 | unsigned short codec_selection_word; | ||
89 | unsigned short num_mbs; | ||
90 | } __attribute__((packed)) viddec_cmd_subframe_pkt; | ||
91 | |||
92 | |||
93 | /* | ||
94 | * Command to inform VIDDEC task that post processing is required for the frame | ||
95 | */ | ||
96 | |||
97 | #define VIDDEC_CMD_PP_ENABLE 0x0001 | ||
98 | #define VIDDEC_CMD_PP_ENABLE_LEN \ | ||
99 | sizeof(viddec_cmd_pp_enable) | ||
100 | |||
101 | #define VIDDEC_CMD_PP_INFO_0_DM_DMA_LS_EXCHANGE_FLAG_DM 0x0000 | ||
102 | #define VIDDEC_CMD_PP_INFO_0_DM_DMA_LS_EXCHANGE_FLAG_DMA 0x0001 | ||
103 | |||
104 | typedef struct { | ||
105 | unsigned short cmd_id; | ||
106 | unsigned short packet_seq_num; | ||
107 | unsigned short codec_instance_id; | ||
108 | unsigned short postproc_info_0; | ||
109 | unsigned short codec_selection_word; | ||
110 | unsigned short pp_output_addr_high; | ||
111 | unsigned short pp_output_addr_low; | ||
112 | unsigned short postproc_info_1; | ||
113 | unsigned short load_sharing_packet_size_high; | ||
114 | unsigned short load_sharing_packet_size_low; | ||
115 | unsigned short load_sharing_packet_high; | ||
116 | unsigned short load_sharing_packet_low; | ||
117 | unsigned short load_sharing_partition; | ||
118 | unsigned short pp_param_0; | ||
119 | unsigned short pp_param_1; | ||
120 | unsigned short pp_param_2; | ||
121 | unsigned short pp_param_3; | ||
122 | } __attribute__((packed)) viddec_cmd_pp_enable; | ||
123 | |||
124 | |||
125 | /* | ||
126 | * FRAME Header Packet : It is at the start of new frame | ||
127 | */ | ||
128 | |||
129 | #define VIDDEC_CMD_FRAME_HEADER_PACKET 0x0002 | ||
130 | #define VIDDEC_CMD_FRAME_HEADER_PACKET_LEN \ | ||
131 | sizeof(viddec_cmd_frame_header_packet) | ||
132 | |||
133 | #define VIDDEC_CMD_FRAME_INFO_0_ERROR_SKIP 0x0000 | ||
134 | #define VIDDEC_CMD_FRAME_INFO_0_ERROR_BLACK 0x0800 | ||
135 | |||
136 | typedef struct { | ||
137 | unsigned short packet_id; | ||
138 | unsigned short x_dimension; | ||
139 | unsigned short y_dimension; | ||
140 | unsigned short line_width; | ||
141 | unsigned short frame_info_0; | ||
142 | unsigned short frame_buffer_0_high; | ||
143 | unsigned short frame_buffer_0_low; | ||
144 | unsigned short frame_buffer_1_high; | ||
145 | unsigned short frame_buffer_1_low; | ||
146 | unsigned short frame_buffer_2_high; | ||
147 | unsigned short frame_buffer_2_low; | ||
148 | unsigned short frame_buffer_3_high; | ||
149 | unsigned short frame_buffer_3_low; | ||
150 | unsigned short frame_buffer_4_high; | ||
151 | unsigned short frame_buffer_4_low; | ||
152 | unsigned short frame_buffer_5_high; | ||
153 | unsigned short frame_buffer_5_low; | ||
154 | unsigned short frame_buffer_6_high; | ||
155 | unsigned short frame_buffer_6_low; | ||
156 | unsigned short frame_buffer_7_high; | ||
157 | unsigned short frame_buffer_7_low; | ||
158 | unsigned short frame_buffer_8_high; | ||
159 | unsigned short frame_buffer_8_low; | ||
160 | unsigned short frame_buffer_9_high; | ||
161 | unsigned short frame_buffer_9_low; | ||
162 | unsigned short frame_buffer_10_high; | ||
163 | unsigned short frame_buffer_10_low; | ||
164 | unsigned short frame_buffer_11_high; | ||
165 | unsigned short frame_buffer_11_low; | ||
166 | unsigned short frame_buffer_12_high; | ||
167 | unsigned short frame_buffer_12_low; | ||
168 | unsigned short frame_buffer_13_high; | ||
169 | unsigned short frame_buffer_13_low; | ||
170 | unsigned short frame_buffer_14_high; | ||
171 | unsigned short frame_buffer_14_low; | ||
172 | unsigned short frame_buffer_15_high; | ||
173 | unsigned short frame_buffer_15_low; | ||
174 | unsigned short output_frame_buffer_high; | ||
175 | unsigned short output_frame_buffer_low; | ||
176 | unsigned short end_of_packet_marker; | ||
177 | } __attribute__((packed)) viddec_cmd_frame_header_packet; | ||
178 | |||
179 | |||
180 | /* | ||
181 | * SLICE HEADER PACKET | ||
182 | * I-Slice and P-Slice | ||
183 | */ | ||
184 | |||
185 | #define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE 0x0003 | ||
186 | #define VIDDEC_CMD_SLICE_HEADER_PKT_ISLICE_LEN \ | ||
187 | sizeof(viddec_cmd_slice_header_pkt_islice) | ||
188 | |||
189 | #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_PSLICE 0x0000 | ||
190 | #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_BSLICE 0x0100 | ||
191 | #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_ISLICE 0x0200 | ||
192 | #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_SPSLICE 0x0300 | ||
193 | #define VIDDEC_CMD_ISLICE_INFO_1_MOD_SLICE_TYPE_SISLICE 0x0400 | ||
194 | #define VIDDEC_CMD_ISLICE_INFO_1_NOPADDING 0x0000 | ||
195 | #define VIDDEC_CMD_ISLICE_INFO_1_PADDING 0x0800 | ||
196 | |||
197 | #define VIDDEC_CMD_ISLICE_EOP_MARKER 0x7FFF | ||
198 | |||
199 | typedef struct { | ||
200 | unsigned short cmd_id; | ||
201 | unsigned short packet_id; | ||
202 | unsigned short slice_info_0; | ||
203 | unsigned short slice_info_1; | ||
204 | unsigned short slice_info_2; | ||
205 | unsigned short num_bytes_in_rbsp_high; | ||
206 | unsigned short num_bytes_in_rbsp_low; | ||
207 | unsigned short num_bytes_in_rbsp_consumed; | ||
208 | unsigned short end_of_packet_marker; | ||
209 | } __attribute__((packed)) viddec_cmd_slice_header_pkt_islice; | ||
210 | |||
211 | |||
212 | #define VIDDEC_CMD_SLICE_HEADER_PKT_PSLICE 0x0003 | ||
213 | #define VIDDEC_CMD_SLICE_HEADER_PKT_PSLICE_LEN \ | ||
214 | sizeof(viddec_cmd_slice_header_pkt_pslice) | ||
215 | |||
216 | |||
217 | typedef struct { | ||
218 | unsigned short cmd_id; | ||
219 | unsigned short packet_id; | ||
220 | unsigned short slice_info_0; | ||
221 | unsigned short slice_info_1; | ||
222 | unsigned short slice_info_2; | ||
223 | unsigned short slice_info_3; | ||
224 | unsigned short refidx_l0_map_tab_info_0; | ||
225 | unsigned short refidx_l0_map_tab_info_1; | ||
226 | unsigned short refidx_l0_map_tab_info_2; | ||
227 | unsigned short refidx_l0_map_tab_info_3; | ||
228 | unsigned short num_bytes_in_rbsp_high; | ||
229 | unsigned short num_bytes_in_rbsp_low; | ||
230 | unsigned short num_bytes_in_rbsp_consumed; | ||
231 | unsigned short end_of_packet_marker; | ||
232 | } __attribute__((packed)) viddec_cmd_slice_header_pkt_pslice; | ||
233 | |||
234 | |||
235 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h new file mode 100644 index 000000000000..c1744c1644dd --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vdecmsg.h | |||
@@ -0,0 +1,107 @@ | |||
1 | #ifndef QDSP5VIDDECMSGI_H | ||
2 | #define QDSP5VIDDECMSGI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | V I D E O D E C O D E R I N T E R N A L M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of messages | ||
10 | that are sent by VIDDEC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vdecmsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 05/10/08 ac initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | /* | ||
46 | * Message to inform ARM which VDEC_SUBFRAME_PKT_CMD processed by VIDDEC TASK | ||
47 | */ | ||
48 | |||
49 | #define VIDDEC_MSG_SUBF_DONE 0x0000 | ||
50 | #define VIDDEC_MSG_SUBF_DONE_LEN \ | ||
51 | sizeof(viddec_msg_subf_done) | ||
52 | |||
53 | typedef struct { | ||
54 | unsigned short packet_seq_number; | ||
55 | unsigned short codec_instance_id; | ||
56 | } __attribute__((packed)) viddec_msg_subf_done; | ||
57 | |||
58 | |||
59 | /* | ||
60 | * Message to inform ARM one frame has been decoded | ||
61 | */ | ||
62 | |||
63 | #define VIDDEC_MSG_FRAME_DONE 0x0001 | ||
64 | #define VIDDEC_MSG_FRAME_DONE_LEN \ | ||
65 | sizeof(viddec_msg_frame_done) | ||
66 | |||
67 | typedef struct { | ||
68 | unsigned short packet_seq_number; | ||
69 | unsigned short codec_instance_id; | ||
70 | } __attribute__((packed)) viddec_msg_frame_done; | ||
71 | |||
72 | |||
73 | /* | ||
74 | * Message to inform ARM that post processing frame has been decoded | ||
75 | */ | ||
76 | |||
77 | #define VIDDEC_MSG_PP_ENABLE_CMD_DONE 0x0002 | ||
78 | #define VIDDEC_MSG_PP_ENABLE_CMD_DONE_LEN \ | ||
79 | sizeof(viddec_msg_pp_enable_cmd_done) | ||
80 | |||
81 | typedef struct { | ||
82 | unsigned short packet_seq_number; | ||
83 | unsigned short codec_instance_id; | ||
84 | } __attribute__((packed)) viddec_msg_pp_enable_cmd_done; | ||
85 | |||
86 | |||
87 | /* | ||
88 | * Message to inform ARM that one post processing frame has been decoded | ||
89 | */ | ||
90 | |||
91 | |||
92 | #define VIDDEC_MSG_PP_FRAME_DONE 0x0003 | ||
93 | #define VIDDEC_MSG_PP_FRAME_DONE_LEN \ | ||
94 | sizeof(viddec_msg_pp_frame_done) | ||
95 | |||
96 | #define VIDDEC_MSG_DISP_WORTHY_DISP 0x0000 | ||
97 | #define VIDDEC_MSG_DISP_WORTHY_DISP_NONE 0xFFFF | ||
98 | |||
99 | |||
100 | typedef struct { | ||
101 | unsigned short packet_seq_number; | ||
102 | unsigned short codec_instance_id; | ||
103 | unsigned short display_worthy; | ||
104 | } __attribute__((packed)) viddec_msg_pp_frame_done; | ||
105 | |||
106 | |||
107 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h new file mode 100644 index 000000000000..819544d186da --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5venccmdi.h | |||
@@ -0,0 +1,212 @@ | |||
1 | #ifndef QDSP5VIDENCCMDI_H | ||
2 | #define QDSP5VIDENCCMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | V I D E O E N C O D E R I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by VIDENC Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 2008 by QUALCOMM, Incorporated. | ||
19 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
20 | /*=========================================================================== | ||
21 | |||
22 | EDIT HISTORY FOR FILE | ||
23 | |||
24 | This section contains comments describing changes made to this file. | ||
25 | Notice that changes are listed in reverse chronological order. | ||
26 | |||
27 | Revision History: | ||
28 | |||
29 | when who what, where, why | ||
30 | -------- --- ---------------------------------------------------------- | ||
31 | 09/25/08 umeshp initial version | ||
32 | ===========================================================================*/ | ||
33 | |||
34 | #define VIDENC_CMD_CFG 0x0000 | ||
35 | #define VIDENC_CMD_ACTIVE 0x0001 | ||
36 | #define VIDENC_CMD_IDLE 0x0002 | ||
37 | #define VIDENC_CMD_FRAME_START 0x0003 | ||
38 | #define VIDENC_CMD_STATUS_QUERY 0x0004 | ||
39 | #define VIDENC_CMD_RC_CFG 0x0005 | ||
40 | #define VIDENC_CMD_DIS_CFG 0x0006 | ||
41 | #define VIDENC_CMD_DIS 0x0007 | ||
42 | #define VIDENC_CMD_INTRA_REFRESH 0x0008 | ||
43 | #define VIDENC_CMD_DIGITAL_ZOOM 0x0009 | ||
44 | |||
45 | |||
46 | /* | ||
47 | * Command to pass the frame message information to VIDENC | ||
48 | */ | ||
49 | |||
50 | |||
51 | #define VIDENC_CMD_FRAME_START_LEN \ | ||
52 | sizeof(videnc_cmd_frame_start) | ||
53 | |||
54 | typedef struct { | ||
55 | unsigned short cmd_id; | ||
56 | unsigned short frame_info; | ||
57 | unsigned short frame_rho_budget_word_high; | ||
58 | unsigned short frame_rho_budget_word_low; | ||
59 | unsigned short input_luma_addr_high; | ||
60 | unsigned short input_luma_addr_low; | ||
61 | unsigned short input_chroma_addr_high; | ||
62 | unsigned short input_chroma_addr_low; | ||
63 | unsigned short ref_vop_buf_ptr_high; | ||
64 | unsigned short ref_vop_buf_ptr_low; | ||
65 | unsigned short enc_pkt_buf_ptr_high; | ||
66 | unsigned short enc_pkt_buf_ptr_low; | ||
67 | unsigned short enc_pkt_buf_size_high; | ||
68 | unsigned short enc_pkt_buf_size_low; | ||
69 | unsigned short unfilt_recon_vop_buf_ptr_high; | ||
70 | unsigned short unfilt_recon_vop_buf_ptr_low; | ||
71 | unsigned short filt_recon_vop_buf_ptr_high; | ||
72 | unsigned short filt_recon_vop_buf_ptr_low; | ||
73 | } __attribute__((packed)) videnc_cmd_frame_start; | ||
74 | |||
75 | /* | ||
76 | * Command to pass the frame-level digital stabilization parameters to VIDENC | ||
77 | */ | ||
78 | |||
79 | |||
80 | #define VIDENC_CMD_DIS_LEN \ | ||
81 | sizeof(videnc_cmd_dis) | ||
82 | |||
83 | typedef struct { | ||
84 | unsigned short cmd_id; | ||
85 | unsigned short vfe_out_prev_luma_addr_high; | ||
86 | unsigned short vfe_out_prev_luma_addr_low; | ||
87 | unsigned short stabilization_info; | ||
88 | } __attribute__((packed)) videnc_cmd_dis; | ||
89 | |||
90 | /* | ||
91 | * Command to pass the codec related parameters to VIDENC | ||
92 | */ | ||
93 | |||
94 | |||
95 | #define VIDENC_CMD_CFG_LEN \ | ||
96 | sizeof(videnc_cmd_cfg) | ||
97 | |||
98 | typedef struct { | ||
99 | unsigned short cmd_id; | ||
100 | unsigned short cfg_info_0; | ||
101 | unsigned short cfg_info_1; | ||
102 | unsigned short four_mv_threshold; | ||
103 | unsigned short ise_fse_mv_cost_fac; | ||
104 | unsigned short venc_frame_dim; | ||
105 | unsigned short venc_DM_partition; | ||
106 | } __attribute__((packed)) videnc_cmd_cfg; | ||
107 | |||
108 | /* | ||
109 | * Command to start the video encoding | ||
110 | */ | ||
111 | |||
112 | |||
113 | #define VIDENC_CMD_ACTIVE_LEN \ | ||
114 | sizeof(videnc_cmd_active) | ||
115 | |||
116 | typedef struct { | ||
117 | unsigned short cmd_id; | ||
118 | } __attribute__((packed)) videnc_cmd_active; | ||
119 | |||
120 | /* | ||
121 | * Command to stop the video encoding | ||
122 | */ | ||
123 | |||
124 | |||
125 | #define VIDENC_CMD_IDLE_LEN \ | ||
126 | sizeof(videnc_cmd_idle) | ||
127 | |||
128 | typedef struct { | ||
129 | unsigned short cmd_id; | ||
130 | } __attribute__((packed)) videnc_cmd_idle; | ||
131 | |||
132 | /* | ||
133 | * Command to query staus of VIDENC | ||
134 | */ | ||
135 | |||
136 | |||
137 | #define VIDENC_CMD_STATUS_QUERY_LEN \ | ||
138 | sizeof(videnc_cmd_status_query) | ||
139 | |||
140 | typedef struct { | ||
141 | unsigned short cmd_id; | ||
142 | } __attribute__((packed)) videnc_cmd_status_query; | ||
143 | |||
144 | /* | ||
145 | * Command to set rate control for a frame | ||
146 | */ | ||
147 | |||
148 | |||
149 | #define VIDENC_CMD_RC_CFG_LEN \ | ||
150 | sizeof(videnc_cmd_rc_cfg) | ||
151 | |||
152 | typedef struct { | ||
153 | unsigned short cmd_id; | ||
154 | unsigned short max_frame_qp_delta; | ||
155 | unsigned short max_min_frame_qp; | ||
156 | } __attribute__((packed)) videnc_cmd_rc_cfg; | ||
157 | |||
158 | /* | ||
159 | * Command to set intra-refreshing | ||
160 | */ | ||
161 | |||
162 | |||
163 | #define VIDENC_CMD_INTRA_REFRESH_LEN \ | ||
164 | sizeof(videnc_cmd_intra_refresh) | ||
165 | |||
166 | typedef struct { | ||
167 | unsigned short cmd_id; | ||
168 | unsigned short num_mb_refresh; | ||
169 | unsigned short mb_index[15]; | ||
170 | } __attribute__((packed)) videnc_cmd_intra_refresh; | ||
171 | |||
172 | /* | ||
173 | * Command to pass digital zoom information to the VIDENC | ||
174 | */ | ||
175 | #define VIDENC_CMD_DIGITAL_ZOOM_LEN \ | ||
176 | sizeof(videnc_cmd_digital_zoom) | ||
177 | |||
178 | typedef struct { | ||
179 | unsigned short cmd_id; | ||
180 | unsigned short digital_zoom_en; | ||
181 | unsigned short luma_frame_shift_X; | ||
182 | unsigned short luma_frame_shift_Y; | ||
183 | unsigned short up_ip_luma_rows; | ||
184 | unsigned short up_ip_luma_cols; | ||
185 | unsigned short up_ip_chroma_rows; | ||
186 | unsigned short up_ip_chroma_cols; | ||
187 | unsigned short luma_ph_incr_V_low; | ||
188 | unsigned short luma_ph_incr_V_high; | ||
189 | unsigned short luma_ph_incr_H_low; | ||
190 | unsigned short luma_ph_incr_H_high; | ||
191 | unsigned short chroma_ph_incr_V_low; | ||
192 | unsigned short chroma_ph_incr_V_high; | ||
193 | unsigned short chroma_ph_incr_H_low; | ||
194 | unsigned short chroma_ph_incr_H_high; | ||
195 | } __attribute__((packed)) videnc_cmd_digital_zoom; | ||
196 | |||
197 | /* | ||
198 | * Command to configure digital stabilization parameters | ||
199 | */ | ||
200 | |||
201 | #define VIDENC_CMD_DIS_CFG_LEN \ | ||
202 | sizeof(videnc_cmd_dis_cfg) | ||
203 | |||
204 | typedef struct { | ||
205 | unsigned short cmd_id; | ||
206 | unsigned short image_stab_subf_start_row_col; | ||
207 | unsigned short image_stab_subf_dim; | ||
208 | unsigned short image_stab_info_0; | ||
209 | } __attribute__((packed)) videnc_cmd_dis_cfg; | ||
210 | |||
211 | |||
212 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h new file mode 100644 index 000000000000..55e8fc2269f7 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfecmdi.h | |||
@@ -0,0 +1,910 @@ | |||
1 | #ifndef QDSP5VFECMDI_H | ||
2 | #define QDSP5VFECMDI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | V F E I N T E R N A L C O M M A N D S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are accepted by VFE Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfecmdi.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 06/12/08 sv initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | /****************************************************************************** | ||
46 | * Commands through vfeCommandScaleQueue | ||
47 | *****************************************************************************/ | ||
48 | |||
49 | /* | ||
50 | * Command to program scaler for op1 . max op of scaler is VGA | ||
51 | */ | ||
52 | |||
53 | |||
54 | #define VFE_CMD_SCALE_OP1_CFG 0x0000 | ||
55 | #define VFE_CMD_SCALE_OP1_CFG_LEN \ | ||
56 | sizeof(vfe_cmd_scale_op1_cfg) | ||
57 | |||
58 | #define VFE_CMD_SCALE_OP1_SEL_IP_SEL_Y_STANDARD 0x0000 | ||
59 | #define VFE_CMD_SCALE_OP1_SEL_IP_SEL_Y_CASCADED 0x0001 | ||
60 | #define VFE_CMD_SCALE_OP1_SEL_H_Y_SCALER_DIS 0x0000 | ||
61 | #define VFE_CMD_SCALE_OP1_SEL_H_Y_SCALER_ENA 0x0002 | ||
62 | #define VFE_CMD_SCALE_OP1_SEL_H_PP_Y_SCALER_DIS 0x0000 | ||
63 | #define VFE_CMD_SCALE_OP1_SEL_H_PP_Y_SCALER_ENA 0x0004 | ||
64 | #define VFE_CMD_SCALE_OP1_SEL_V_Y_SCALER_DIS 0x0000 | ||
65 | #define VFE_CMD_SCALE_OP1_SEL_V_Y_SCALER_ENA 0x0008 | ||
66 | #define VFE_CMD_SCALE_OP1_SEL_V_PP_Y_SCALER_DIS 0x0000 | ||
67 | #define VFE_CMD_SCALE_OP1_SEL_V_PP_Y_SCALER_ENA 0x0010 | ||
68 | #define VFE_CMD_SCALE_OP1_SEL_IP_SEL_CBCR_STANDARD 0x0000 | ||
69 | #define VFE_CMD_SCALE_OP1_SEL_IP_SEL_CBCR_CASCADED 0x0020 | ||
70 | #define VFE_CMD_SCALE_OP1_SEL_H_CBCR_SCALER_DIS 0x0000 | ||
71 | #define VFE_CMD_SCALE_OP1_SEL_H_CBCR_SCALER_ENA 0x0040 | ||
72 | #define VFE_CMD_SCALE_OP1_SEL_V_CBCR_SCALER_DIS 0x0000 | ||
73 | #define VFE_CMD_SCALE_OP1_SEL_V_CBCR_SCALER_ENA 0x0080 | ||
74 | |||
75 | #define VFE_CMD_OP1_PP_Y_SCALER_CFG_PART1_DONT_LOAD_COEFFS 0x80000000 | ||
76 | #define VFE_CMD_OP1_PP_Y_SCALER_CFG_PART1_LOAD_COEFFS 0x80000000 | ||
77 | |||
78 | typedef struct { | ||
79 | unsigned int cmd_id; | ||
80 | unsigned int scale_op1_sel; | ||
81 | unsigned int y_scaler_cfg_part1; | ||
82 | unsigned int y_scaler_cfg_part2; | ||
83 | unsigned int cbcr_scaler_cfg_part1; | ||
84 | unsigned int cbcr_scaler_cfg_part2; | ||
85 | unsigned int cbcr_scaler_cfg_part3; | ||
86 | unsigned int pp_y_scaler_cfg_part1; | ||
87 | unsigned int pp_y_scaler_cfg_part2; | ||
88 | unsigned int y_scaler_v_coeff_bank_part1[16]; | ||
89 | unsigned int y_scaler_v_coeff_bank_part2[16]; | ||
90 | unsigned int y_scaler_h_coeff_bank_part1[16]; | ||
91 | unsigned int y_scaler_h_coeff_bank_part2[16]; | ||
92 | } __attribute__((packed)) vfe_cmd_scale_op1_cfg; | ||
93 | |||
94 | |||
95 | /* | ||
96 | * Command to program scaler for op2 | ||
97 | */ | ||
98 | |||
99 | #define VFE_CMD_SCALE_OP2_CFG 0x0001 | ||
100 | #define VFE_CMD_SCALE_OP2_CFG_LEN \ | ||
101 | sizeof(vfe_cmd_scale_op2_cfg) | ||
102 | |||
103 | #define VFE_CMD_SCALE_OP2_SEL_IP_SEL_Y_STANDARD 0x0000 | ||
104 | #define VFE_CMD_SCALE_OP2_SEL_IP_SEL_Y_CASCADED 0x0001 | ||
105 | #define VFE_CMD_SCALE_OP2_SEL_H_Y_SCALER_DIS 0x0000 | ||
106 | #define VFE_CMD_SCALE_OP2_SEL_H_Y_SCALER_ENA 0x0002 | ||
107 | #define VFE_CMD_SCALE_OP2_SEL_H_PP_Y_SCALER_DIS 0x0000 | ||
108 | #define VFE_CMD_SCALE_OP2_SEL_H_PP_Y_SCALER_ENA 0x0004 | ||
109 | #define VFE_CMD_SCALE_OP2_SEL_V_Y_SCALER_DIS 0x0000 | ||
110 | #define VFE_CMD_SCALE_OP2_SEL_V_Y_SCALER_ENA 0x0008 | ||
111 | #define VFE_CMD_SCALE_OP2_SEL_V_PP_Y_SCALER_DIS 0x0000 | ||
112 | #define VFE_CMD_SCALE_OP2_SEL_V_PP_Y_SCALER_ENA 0x0010 | ||
113 | #define VFE_CMD_SCALE_OP2_SEL_IP_SEL_CBCR_STANDARD 0x0000 | ||
114 | #define VFE_CMD_SCALE_OP2_SEL_IP_SEL_CBCR_CASCADED 0x0020 | ||
115 | #define VFE_CMD_SCALE_OP2_SEL_H_CBCR_SCALER_DIS 0x0000 | ||
116 | #define VFE_CMD_SCALE_OP2_SEL_H_CBCR_SCALER_ENA 0x0040 | ||
117 | #define VFE_CMD_SCALE_OP2_SEL_V_CBCR_SCALER_DIS 0x0000 | ||
118 | #define VFE_CMD_SCALE_OP2_SEL_V_CBCR_SCALER_ENA 0x0080 | ||
119 | |||
120 | #define VFE_CMD_OP2_PP_Y_SCALER_CFG_PART1_DONT_LOAD_COEFFS 0x80000000 | ||
121 | #define VFE_CMD_OP2_PP_Y_SCALER_CFG_PART1_LOAD_COEFFS 0x80000000 | ||
122 | |||
123 | typedef struct { | ||
124 | unsigned int cmd_id; | ||
125 | unsigned int scale_op2_sel; | ||
126 | unsigned int y_scaler_cfg_part1; | ||
127 | unsigned int y_scaler_cfg_part2; | ||
128 | unsigned int cbcr_scaler_cfg_part1; | ||
129 | unsigned int cbcr_scaler_cfg_part2; | ||
130 | unsigned int cbcr_scaler_cfg_part3; | ||
131 | unsigned int pp_y_scaler_cfg_part1; | ||
132 | unsigned int pp_y_scaler_cfg_part2; | ||
133 | unsigned int y_scaler_v_coeff_bank_part1[16]; | ||
134 | unsigned int y_scaler_v_coeff_bank_part2[16]; | ||
135 | unsigned int y_scaler_h_coeff_bank_part1[16]; | ||
136 | unsigned int y_scaler_h_coeff_bank_part2[16]; | ||
137 | } __attribute__((packed)) vfe_cmd_scale_op2_cfg; | ||
138 | |||
139 | |||
140 | /****************************************************************************** | ||
141 | * Commands through vfeCommandTableQueue | ||
142 | *****************************************************************************/ | ||
143 | |||
144 | /* | ||
145 | * Command to program the AXI ip paths | ||
146 | */ | ||
147 | |||
148 | #define VFE_CMD_AXI_IP_CFG 0x0000 | ||
149 | #define VFE_CMD_AXI_IP_CFG_LEN sizeof(vfe_cmd_axi_ip_cfg) | ||
150 | |||
151 | #define VFE_CMD_IP_SEL_IP_FORMAT_8 0x0000 | ||
152 | #define VFE_CMD_IP_SEL_IP_FORMAT_10 0x0001 | ||
153 | #define VFE_CMD_IP_SEL_IP_FORMAT_12 0x0002 | ||
154 | |||
155 | typedef struct { | ||
156 | unsigned int cmd_id; | ||
157 | unsigned int ip_sel; | ||
158 | unsigned int ip_cfg_part1; | ||
159 | unsigned int ip_cfg_part2; | ||
160 | unsigned int ip_unpack_cfg_part[6]; | ||
161 | unsigned int ip_buf_addr[8]; | ||
162 | } __attribute__ ((packed)) vfe_cmd_axi_ip_cfg; | ||
163 | |||
164 | |||
165 | /* | ||
166 | * Command to program axi op paths | ||
167 | */ | ||
168 | |||
169 | #define VFE_CMD_AXI_OP_CFG 0x0001 | ||
170 | #define VFE_CMD_AXI_OP_CFG_LEN sizeof(vfe_cmd_axi_op_cfg) | ||
171 | |||
172 | #define VFE_CMD_OP_SEL_OP1 0x0000 | ||
173 | #define VFE_CMD_OP_SEL_OP2 0x0001 | ||
174 | #define VFE_CMD_OP_SEL_OP1_OP2 0x0002 | ||
175 | #define VFE_CMD_OP_SEL_CTOA 0x0003 | ||
176 | #define VFE_CMD_OP_SEL_CTOA_OP1 0x0004 | ||
177 | #define VFE_CMD_OP_SEL_CTOA_OP2 0x0005 | ||
178 | #define VFE_CMD_OP_SEL_OP_FORMAT_8 0x0000 | ||
179 | #define VFE_CMD_OP_SEL_OP_FORMAT_10 0x0008 | ||
180 | #define VFE_CMD_OP_SEL_OP_FORMAT_12 0x0010 | ||
181 | |||
182 | |||
183 | typedef struct { | ||
184 | unsigned int cmd_id; | ||
185 | unsigned int op_sel; | ||
186 | unsigned int op1_y_cfg_part1; | ||
187 | unsigned int op1_y_cfg_part2; | ||
188 | unsigned int op1_cbcr_cfg_part1; | ||
189 | unsigned int op1_cbcr_cfg_part2; | ||
190 | unsigned int op2_y_cfg_part1; | ||
191 | unsigned int op2_y_cfg_part2; | ||
192 | unsigned int op2_cbcr_cfg_part1; | ||
193 | unsigned int op2_cbcr_cfg_part2; | ||
194 | unsigned int op1_buf1_addr[16]; | ||
195 | unsigned int op2_buf1_addr[16]; | ||
196 | } __attribute__((packed)) vfe_cmd_axi_op_cfg; | ||
197 | |||
198 | |||
199 | |||
200 | |||
201 | /* | ||
202 | * Command to program the roll off correction module | ||
203 | */ | ||
204 | |||
205 | #define VFE_CMD_ROLLOFF_CFG 0x0002 | ||
206 | #define VFE_CMD_ROLLOFF_CFG_LEN \ | ||
207 | sizeof(vfe_cmd_rolloff_cfg) | ||
208 | |||
209 | |||
210 | typedef struct { | ||
211 | unsigned int cmd_id; | ||
212 | unsigned int correction_opt_center_pos; | ||
213 | unsigned int radius_square_entry[32]; | ||
214 | unsigned int red_table_entry[32]; | ||
215 | unsigned int green_table_entry[32]; | ||
216 | unsigned int blue_table_entry[32]; | ||
217 | } __attribute__((packed)) vfe_cmd_rolloff_cfg; | ||
218 | |||
219 | /* | ||
220 | * Command to program RGB gamma table | ||
221 | */ | ||
222 | |||
223 | #define VFE_CMD_RGB_GAMMA_CFG 0x0003 | ||
224 | #define VFE_CMD_RGB_GAMMA_CFG_LEN \ | ||
225 | sizeof(vfe_cmd_rgb_gamma_cfg) | ||
226 | |||
227 | #define VFE_CMD_RGB_GAMMA_SEL_LINEAR 0x0000 | ||
228 | #define VFE_CMD_RGB_GAMMA_SEL_PW_LINEAR 0x0001 | ||
229 | typedef struct { | ||
230 | unsigned int cmd_id; | ||
231 | unsigned int rgb_gamma_sel; | ||
232 | unsigned int rgb_gamma_entry[256]; | ||
233 | } __attribute__((packed)) vfe_cmd_rgb_gamma_cfg; | ||
234 | |||
235 | |||
236 | /* | ||
237 | * Command to program luma gamma table for the noise reduction path | ||
238 | */ | ||
239 | |||
240 | #define VFE_CMD_Y_GAMMA_CFG 0x0004 | ||
241 | #define VFE_CMD_Y_GAMMA_CFG_LEN \ | ||
242 | sizeof(vfe_cmd_y_gamma_cfg) | ||
243 | |||
244 | #define VFE_CMD_Y_GAMMA_SEL_LINEAR 0x0000 | ||
245 | #define VFE_CMD_Y_GAMMA_SEL_PW_LINEAR 0x0001 | ||
246 | |||
247 | typedef struct { | ||
248 | unsigned int cmd_id; | ||
249 | unsigned int y_gamma_sel; | ||
250 | unsigned int y_gamma_entry[256]; | ||
251 | } __attribute__((packed)) vfe_cmd_y_gamma_cfg; | ||
252 | |||
253 | |||
254 | |||
255 | /****************************************************************************** | ||
256 | * Commands through vfeCommandQueue | ||
257 | *****************************************************************************/ | ||
258 | |||
259 | /* | ||
260 | * Command to reset the VFE to a known good state.All previously programmed | ||
261 | * Params will be lost | ||
262 | */ | ||
263 | |||
264 | |||
265 | #define VFE_CMD_RESET 0x0000 | ||
266 | #define VFE_CMD_RESET_LEN sizeof(vfe_cmd_reset) | ||
267 | |||
268 | |||
269 | typedef struct { | ||
270 | unsigned short cmd_id; | ||
271 | } __attribute__((packed)) vfe_cmd_reset; | ||
272 | |||
273 | |||
274 | /* | ||
275 | * Command to start VFE processing based on the config params | ||
276 | */ | ||
277 | |||
278 | |||
279 | #define VFE_CMD_START 0x0001 | ||
280 | #define VFE_CMD_START_LEN sizeof(vfe_cmd_start) | ||
281 | |||
282 | #define VFE_CMD_STARTUP_PARAMS_SRC_CAMIF 0x0000 | ||
283 | #define VFE_CMD_STARTUP_PARAMS_SRC_AXI 0x0001 | ||
284 | #define VFE_CMD_STARTUP_PARAMS_MODE_CONTINUOUS 0x0000 | ||
285 | #define VFE_CMD_STARTUP_PARAMS_MODE_SNAPSHOT 0x0002 | ||
286 | |||
287 | #define VFE_CMD_IMAGE_PL_BLACK_LVL_CORR_DIS 0x0000 | ||
288 | #define VFE_CMD_IMAGE_PL_BLACK_LVL_CORR_ENA 0x0001 | ||
289 | #define VFE_CMD_IMAGE_PL_ROLLOFF_CORR_DIS 0x0000 | ||
290 | #define VFE_CMD_IMAGE_PL_ROLLOFF_CORR_ENA 0x0002 | ||
291 | #define VFE_CMD_IMAGE_PL_WHITE_BAL_DIS 0x0000 | ||
292 | #define VFE_CMD_IMAGE_PL_WHITE_BAL_ENA 0x0004 | ||
293 | #define VFE_CMD_IMAGE_PL_RGB_GAMMA_DIS 0x0000 | ||
294 | #define VFE_CMD_IMAGE_PL_RGB_GAMMA_ENA 0x0008 | ||
295 | #define VFE_CMD_IMAGE_PL_LUMA_NOISE_RED_PATH_DIS 0x0000 | ||
296 | #define VFE_CMD_IMAGE_PL_LUMA_NOISE_RED_PATH_ENA 0x0010 | ||
297 | #define VFE_CMD_IMAGE_PL_ADP_FILTER_DIS 0x0000 | ||
298 | #define VFE_CMD_IMAGE_PL_ADP_FILTER_ENA 0x0020 | ||
299 | #define VFE_CMD_IMAGE_PL_CHROMA_SAMP_DIS 0x0000 | ||
300 | #define VFE_CMD_IMAGE_PL_CHROMA_SAMP_ENA 0x0040 | ||
301 | |||
302 | |||
303 | typedef struct { | ||
304 | unsigned int cmd_id; | ||
305 | unsigned int startup_params; | ||
306 | unsigned int image_pipeline; | ||
307 | unsigned int frame_dimension; | ||
308 | } __attribute__((packed)) vfe_cmd_start; | ||
309 | |||
310 | |||
311 | /* | ||
312 | * Command to halt all processing | ||
313 | */ | ||
314 | |||
315 | #define VFE_CMD_STOP 0x0002 | ||
316 | #define VFE_CMD_STOP_LEN sizeof(vfe_cmd_stop) | ||
317 | |||
318 | typedef struct { | ||
319 | unsigned short cmd_id; | ||
320 | } __attribute__((packed)) vfe_cmd_stop; | ||
321 | |||
322 | |||
323 | /* | ||
324 | * Command to commit the params that have been programmed to take | ||
325 | * effect on the next frame | ||
326 | */ | ||
327 | |||
328 | #define VFE_CMD_UPDATE 0x0003 | ||
329 | #define VFE_CMD_UPDATE_LEN sizeof(vfe_cmd_update) | ||
330 | |||
331 | |||
332 | typedef struct { | ||
333 | unsigned short cmd_id; | ||
334 | } __attribute__((packed)) vfe_cmd_update; | ||
335 | |||
336 | |||
337 | /* | ||
338 | * Command to program CAMIF module | ||
339 | */ | ||
340 | |||
341 | #define VFE_CMD_CAMIF_CFG 0x0004 | ||
342 | #define VFE_CMD_CAMIF_CFG_LEN sizeof(vfe_cmd_camif_cfg) | ||
343 | |||
344 | #define VFE_CMD_CFG_VSYNC_SYNC_EDGE_HIGH 0x0000 | ||
345 | #define VFE_CMD_CFG_VSYNC_SYNC_EDGE_LOW 0x0002 | ||
346 | #define VFE_CMD_CFG_HSYNC_SYNC_EDGE_HIGH 0x0000 | ||
347 | #define VFE_CMD_CFG_HSYNC_SYNC_EDGE_LOW 0x0004 | ||
348 | #define VFE_CMD_CFG_SYNC_MODE_APS 0x0000 | ||
349 | #define VFE_CMD_CFG_SYNC_MODE_EFS 0X0008 | ||
350 | #define VFE_CMD_CFG_SYNC_MODE_ELS 0x0010 | ||
351 | #define VFE_CMD_CFG_SYNC_MODE_RVD 0x0018 | ||
352 | #define VFE_CMD_CFG_VFE_SUBSAMP_EN_DIS 0x0000 | ||
353 | #define VFE_CMD_CFG_VFE_SUBSAMP_EN_ENA 0x0020 | ||
354 | #define VFE_CMD_CFG_BUS_SUBSAMP_EN_DIS 0x0000 | ||
355 | #define VFE_CMD_CFG_BUS_SUBSAMP_EN_ENA 0x0080 | ||
356 | #define VFE_CMD_CFG_IRQ_SUBSAMP_EN_DIS 0x0000 | ||
357 | #define VFE_CMD_CFG_IRQ_SUBSAMP_EN_ENA 0x0800 | ||
358 | |||
359 | #define VFE_CMD_SUBSAMP2_CFG_PIXEL_SKIP_16 0x0000 | ||
360 | #define VFE_CMD_SUBSAMP2_CFG_PIXEL_SKIP_12 0x0010 | ||
361 | |||
362 | #define VFE_CMD_EPOCH_IRQ_1_DIS 0x0000 | ||
363 | #define VFE_CMD_EPOCH_IRQ_1_ENA 0x4000 | ||
364 | #define VFE_CMD_EPOCH_IRQ_2_DIS 0x0000 | ||
365 | #define VFE_CMD_EPOCH_IRQ_2_ENA 0x8000 | ||
366 | |||
367 | typedef struct { | ||
368 | unsigned int cmd_id; | ||
369 | unsigned int cfg; | ||
370 | unsigned int efs_cfg; | ||
371 | unsigned int frame_cfg; | ||
372 | unsigned int window_width_cfg; | ||
373 | unsigned int window_height_cfg; | ||
374 | unsigned int subsamp1_cfg; | ||
375 | unsigned int subsamp2_cfg; | ||
376 | unsigned int epoch_irq; | ||
377 | } __attribute__((packed)) vfe_cmd_camif_cfg; | ||
378 | |||
379 | |||
380 | |||
381 | /* | ||
382 | * Command to program the black level module | ||
383 | */ | ||
384 | |||
385 | #define VFE_CMD_BLACK_LVL_CFG 0x0005 | ||
386 | #define VFE_CMD_BLACK_LVL_CFG_LEN sizeof(vfe_cmd_black_lvl_cfg) | ||
387 | |||
388 | #define VFE_CMD_BL_SEL_MANUAL 0x0000 | ||
389 | #define VFE_CMD_BL_SEL_AUTO 0x0001 | ||
390 | |||
391 | typedef struct { | ||
392 | unsigned int cmd_id; | ||
393 | unsigned int black_lvl_sel; | ||
394 | unsigned int cfg_part[3]; | ||
395 | } __attribute__((packed)) vfe_cmd_black_lvl_cfg; | ||
396 | |||
397 | |||
398 | /* | ||
399 | * Command to program the active region by cropping the region of interest | ||
400 | */ | ||
401 | |||
402 | #define VFE_CMD_ACTIVE_REGION_CFG 0x0006 | ||
403 | #define VFE_CMD_ACTIVE_REGION_CFG_LEN \ | ||
404 | sizeof(vfe_cmd_active_region_cfg) | ||
405 | |||
406 | |||
407 | typedef struct { | ||
408 | unsigned int cmd_id; | ||
409 | unsigned int cfg_part1; | ||
410 | unsigned int cfg_part2; | ||
411 | } __attribute__((packed)) vfe_cmd_active_region_cfg; | ||
412 | |||
413 | |||
414 | |||
415 | /* | ||
416 | * Command to program the defective pixel correction(DPC) , | ||
417 | * adaptive bayer filter (ABF) and demosaic modules | ||
418 | */ | ||
419 | |||
420 | #define VFE_CMD_DEMOSAIC_CFG 0x0007 | ||
421 | #define VFE_CMD_DEMOSAIC_CFG_LEN sizeof(vfe_cmd_demosaic_cfg) | ||
422 | |||
423 | #define VFE_CMD_DEMOSAIC_PART1_ABF_EN_DIS 0x0000 | ||
424 | #define VFE_CMD_DEMOSAIC_PART1_ABF_EN_ENA 0x0001 | ||
425 | #define VFE_CMD_DEMOSAIC_PART1_DPC_EN_DIS 0x0000 | ||
426 | #define VFE_CMD_DEMOSAIC_PART1_DPC_EN_ENA 0x0002 | ||
427 | #define VFE_CMD_DEMOSAIC_PART1_FORCE_ABF_OFF 0x0000 | ||
428 | #define VFE_CMD_DEMOSAIC_PART1_FORCE_ABF_ON 0x0004 | ||
429 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1 0x00000000 | ||
430 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_2 0x10000000 | ||
431 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_4 0x20000000 | ||
432 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_8 0x30000000 | ||
433 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_2 0x50000000 | ||
434 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_4 0x60000000 | ||
435 | #define VFE_CMD_DEMOSAIC_PART1_SLOPE_SHIFT_1_8 0x70000000 | ||
436 | |||
437 | typedef struct { | ||
438 | unsigned int cmd_id; | ||
439 | unsigned int demosaic_part1; | ||
440 | unsigned int demosaic_part2; | ||
441 | unsigned int demosaic_part3; | ||
442 | unsigned int demosaic_part4; | ||
443 | unsigned int demosaic_part5; | ||
444 | } __attribute__((packed)) vfe_cmd_demosaic_cfg; | ||
445 | |||
446 | |||
447 | /* | ||
448 | * Command to program the ip format | ||
449 | */ | ||
450 | |||
451 | #define VFE_CMD_IP_FORMAT_CFG 0x0008 | ||
452 | #define VFE_CMD_IP_FORMAT_CFG_LEN \ | ||
453 | sizeof(vfe_cmd_ip_format_cfg) | ||
454 | |||
455 | #define VFE_CMD_IP_FORMAT_SEL_RGRG 0x0000 | ||
456 | #define VFE_CMD_IP_FORMAT_SEL_GRGR 0x0001 | ||
457 | #define VFE_CMD_IP_FORMAT_SEL_BGBG 0x0002 | ||
458 | #define VFE_CMD_IP_FORMAT_SEL_GBGB 0x0003 | ||
459 | #define VFE_CMD_IP_FORMAT_SEL_YCBYCR 0x0004 | ||
460 | #define VFE_CMD_IP_FORMAT_SEL_YCRYCB 0x0005 | ||
461 | #define VFE_CMD_IP_FORMAT_SEL_CBYCRY 0x0006 | ||
462 | #define VFE_CMD_IP_FORMAT_SEL_CRYCBY 0x0007 | ||
463 | #define VFE_CMD_IP_FORMAT_SEL_NO_CHROMA 0x0000 | ||
464 | #define VFE_CMD_IP_FORMAT_SEL_CHROMA 0x0008 | ||
465 | |||
466 | |||
467 | typedef struct { | ||
468 | unsigned int cmd_id; | ||
469 | unsigned int ip_format_sel; | ||
470 | unsigned int balance_gains_part1; | ||
471 | unsigned int balance_gains_part2; | ||
472 | } __attribute__((packed)) vfe_cmd_ip_format_cfg; | ||
473 | |||
474 | |||
475 | |||
476 | /* | ||
477 | * Command to program max and min allowed op values | ||
478 | */ | ||
479 | |||
480 | #define VFE_CMD_OP_CLAMP_CFG 0x0009 | ||
481 | #define VFE_CMD_OP_CLAMP_CFG_LEN \ | ||
482 | sizeof(vfe_cmd_op_clamp_cfg) | ||
483 | |||
484 | typedef struct { | ||
485 | unsigned int cmd_id; | ||
486 | unsigned int op_clamp_max; | ||
487 | unsigned int op_clamp_min; | ||
488 | } __attribute__((packed)) vfe_cmd_op_clamp_cfg; | ||
489 | |||
490 | |||
491 | /* | ||
492 | * Command to program chroma sub sample module | ||
493 | */ | ||
494 | |||
495 | #define VFE_CMD_CHROMA_SUBSAMPLE_CFG 0x000A | ||
496 | #define VFE_CMD_CHROMA_SUBSAMPLE_CFG_LEN \ | ||
497 | sizeof(vfe_cmd_chroma_subsample_cfg) | ||
498 | |||
499 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_H_INTERESTIAL_SAMPS 0x0000 | ||
500 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_H_COSITED_SAMPS 0x0001 | ||
501 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_V_INTERESTIAL_SAMPS 0x0000 | ||
502 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_V_COSITED_SAMPS 0x0002 | ||
503 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_H_SUBSAMP_DIS 0x0000 | ||
504 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_H_SUBSAMP_ENA 0x0004 | ||
505 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_V_SUBSAMP_DIS 0x0000 | ||
506 | #define VFE_CMD_CHROMA_SUBSAMP_SEL_V_SUBSAMP_ENA 0x0008 | ||
507 | |||
508 | typedef struct { | ||
509 | unsigned int cmd_id; | ||
510 | unsigned int chroma_subsamp_sel; | ||
511 | } __attribute__((packed)) vfe_cmd_chroma_subsample_cfg; | ||
512 | |||
513 | |||
514 | /* | ||
515 | * Command to program the white balance module | ||
516 | */ | ||
517 | |||
518 | #define VFE_CMD_WHITE_BALANCE_CFG 0x000B | ||
519 | #define VFE_CMD_WHITE_BALANCE_CFG_LEN \ | ||
520 | sizeof(vfe_cmd_white_balance_cfg) | ||
521 | |||
522 | typedef struct { | ||
523 | unsigned int cmd_id; | ||
524 | unsigned int white_balance_gains; | ||
525 | } __attribute__((packed)) vfe_cmd_white_balance_cfg; | ||
526 | |||
527 | |||
528 | /* | ||
529 | * Command to program the color processing module | ||
530 | */ | ||
531 | |||
532 | #define VFE_CMD_COLOR_PROCESS_CFG 0x000C | ||
533 | #define VFE_CMD_COLOR_PROCESS_CFG_LEN \ | ||
534 | sizeof(vfe_cmd_color_process_cfg) | ||
535 | |||
536 | #define VFE_CMD_COLOR_CORRE_PART7_Q7_FACTORS 0x0000 | ||
537 | #define VFE_CMD_COLOR_CORRE_PART7_Q8_FACTORS 0x0001 | ||
538 | #define VFE_CMD_COLOR_CORRE_PART7_Q9_FACTORS 0x0002 | ||
539 | #define VFE_CMD_COLOR_CORRE_PART7_Q10_FACTORS 0x0003 | ||
540 | |||
541 | typedef struct { | ||
542 | unsigned int cmd_id; | ||
543 | unsigned int color_correction_part1; | ||
544 | unsigned int color_correction_part2; | ||
545 | unsigned int color_correction_part3; | ||
546 | unsigned int color_correction_part4; | ||
547 | unsigned int color_correction_part5; | ||
548 | unsigned int color_correction_part6; | ||
549 | unsigned int color_correction_part7; | ||
550 | unsigned int chroma_enhance_part1; | ||
551 | unsigned int chroma_enhance_part2; | ||
552 | unsigned int chroma_enhance_part3; | ||
553 | unsigned int chroma_enhance_part4; | ||
554 | unsigned int chroma_enhance_part5; | ||
555 | unsigned int luma_calc_part1; | ||
556 | unsigned int luma_calc_part2; | ||
557 | } __attribute__((packed)) vfe_cmd_color_process_cfg; | ||
558 | |||
559 | |||
560 | /* | ||
561 | * Command to program adaptive filter module | ||
562 | */ | ||
563 | |||
564 | #define VFE_CMD_ADP_FILTER_CFG 0x000D | ||
565 | #define VFE_CMD_ADP_FILTER_CFG_LEN \ | ||
566 | sizeof(vfe_cmd_adp_filter_cfg) | ||
567 | |||
568 | #define VFE_CMD_ASF_CFG_PART_SMOOTH_FILTER_DIS 0x0000 | ||
569 | #define VFE_CMD_ASF_CFG_PART_SMOOTH_FILTER_ENA 0x0001 | ||
570 | #define VFE_CMD_ASF_CFG_PART_NO_SHARP_MODE 0x0000 | ||
571 | #define VFE_CMD_ASF_CFG_PART_SINGLE_FILTER 0x0002 | ||
572 | #define VFE_CMD_ASF_CFG_PART_DUAL_FILTER 0x0004 | ||
573 | #define VFE_CMD_ASF_CFG_PART_SHARP_MODE 0x0007 | ||
574 | |||
575 | typedef struct { | ||
576 | unsigned int cmd_id; | ||
577 | unsigned int asf_cfg_part[7]; | ||
578 | } __attribute__((packed)) vfe_cmd_adp_filter_cfg; | ||
579 | |||
580 | |||
581 | /* | ||
582 | * Command to program for frame skip pattern for op1 and op2 | ||
583 | */ | ||
584 | |||
585 | #define VFE_CMD_FRAME_SKIP_CFG 0x000E | ||
586 | #define VFE_CMD_FRAME_SKIP_CFG_LEN \ | ||
587 | sizeof(vfe_cmd_frame_skip_cfg) | ||
588 | |||
589 | typedef struct { | ||
590 | unsigned int cmd_id; | ||
591 | unsigned int frame_skip_pattern_op1; | ||
592 | unsigned int frame_skip_pattern_op2; | ||
593 | } __attribute__((packed)) vfe_cmd_frame_skip_cfg; | ||
594 | |||
595 | |||
596 | /* | ||
597 | * Command to program field-of-view crop for digital zoom | ||
598 | */ | ||
599 | |||
600 | #define VFE_CMD_FOV_CROP 0x000F | ||
601 | #define VFE_CMD_FOV_CROP_LEN sizeof(vfe_cmd_fov_crop) | ||
602 | |||
603 | typedef struct { | ||
604 | unsigned int cmd_id; | ||
605 | unsigned int fov_crop_part1; | ||
606 | unsigned int fov_crop_part2; | ||
607 | } __attribute__((packed)) vfe_cmd_fov_crop; | ||
608 | |||
609 | |||
610 | |||
611 | /* | ||
612 | * Command to program auto focus(AF) statistics module | ||
613 | */ | ||
614 | |||
615 | #define VFE_CMD_STATS_AUTOFOCUS_CFG 0x0010 | ||
616 | #define VFE_CMD_STATS_AUTOFOCUS_CFG_LEN \ | ||
617 | sizeof(vfe_cmd_stats_autofocus_cfg) | ||
618 | |||
619 | #define VFE_CMD_AF_STATS_SEL_STATS_DIS 0x0000 | ||
620 | #define VFE_CMD_AF_STATS_SEL_STATS_ENA 0x0001 | ||
621 | #define VFE_CMD_AF_STATS_SEL_PRI_FIXED 0x0000 | ||
622 | #define VFE_CMD_AF_STATS_SEL_PRI_VAR 0x0002 | ||
623 | #define VFE_CMD_AF_STATS_CFG_PART_METRIC_SUM 0x00000000 | ||
624 | #define VFE_CMD_AF_STATS_CFG_PART_METRIC_MAX 0x00200000 | ||
625 | |||
626 | typedef struct { | ||
627 | unsigned int cmd_id; | ||
628 | unsigned int af_stats_sel; | ||
629 | unsigned int af_stats_cfg_part[8]; | ||
630 | unsigned int af_stats_op_buf_hdr; | ||
631 | unsigned int af_stats_op_buf[3]; | ||
632 | } __attribute__((packed)) vfe_cmd_stats_autofocus_cfg; | ||
633 | |||
634 | |||
635 | /* | ||
636 | * Command to program White balance(wb) and exposure (exp) | ||
637 | * statistics module | ||
638 | */ | ||
639 | |||
640 | #define VFE_CMD_STATS_WB_EXP_CFG 0x0011 | ||
641 | #define VFE_CMD_STATS_WB_EXP_CFG_LEN \ | ||
642 | sizeof(vfe_cmd_stats_wb_exp_cfg) | ||
643 | |||
644 | #define VFE_CMD_WB_EXP_STATS_SEL_STATS_DIS 0x0000 | ||
645 | #define VFE_CMD_WB_EXP_STATS_SEL_STATS_ENA 0x0001 | ||
646 | #define VFE_CMD_WB_EXP_STATS_SEL_PRI_FIXED 0x0000 | ||
647 | #define VFE_CMD_WB_EXP_STATS_SEL_PRI_VAR 0x0002 | ||
648 | |||
649 | #define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_REG_8_8 0x0000 | ||
650 | #define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_REG_16_16 0x0001 | ||
651 | #define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_SREG_8_8 0x0000 | ||
652 | #define VFE_CMD_WB_EXP_STATS_CFG_PART1_EXP_SREG_4_4 0x0002 | ||
653 | |||
654 | typedef struct { | ||
655 | unsigned int cmd_id; | ||
656 | unsigned int wb_exp_stats_sel; | ||
657 | unsigned int wb_exp_stats_cfg_part1; | ||
658 | unsigned int wb_exp_stats_cfg_part2; | ||
659 | unsigned int wb_exp_stats_cfg_part3; | ||
660 | unsigned int wb_exp_stats_cfg_part4; | ||
661 | unsigned int wb_exp_stats_op_buf_hdr; | ||
662 | unsigned int wb_exp_stats_op_buf[3]; | ||
663 | } __attribute__((packed)) vfe_cmd_stats_wb_exp_cfg; | ||
664 | |||
665 | |||
666 | /* | ||
667 | * Command to program histogram(hg) stats module | ||
668 | */ | ||
669 | |||
670 | #define VFE_CMD_STATS_HG_CFG 0x0012 | ||
671 | #define VFE_CMD_STATS_HG_CFG_LEN \ | ||
672 | sizeof(vfe_cmd_stats_hg_cfg) | ||
673 | |||
674 | #define VFE_CMD_HG_STATS_SEL_PRI_FIXED 0x0000 | ||
675 | #define VFE_CMD_HG_STATS_SEL_PRI_VAR 0x0002 | ||
676 | |||
677 | typedef struct { | ||
678 | unsigned int cmd_id; | ||
679 | unsigned int hg_stats_sel; | ||
680 | unsigned int hg_stats_cfg_part1; | ||
681 | unsigned int hg_stats_cfg_part2; | ||
682 | unsigned int hg_stats_op_buf_hdr; | ||
683 | unsigned int hg_stats_op_buf; | ||
684 | } __attribute__((packed)) vfe_cmd_stats_hg_cfg; | ||
685 | |||
686 | |||
687 | /* | ||
688 | * Command to acknowledge last MSG_VFE_OP1 message | ||
689 | */ | ||
690 | |||
691 | #define VFE_CMD_OP1_ACK 0x0013 | ||
692 | #define VFE_CMD_OP1_ACK_LEN sizeof(vfe_cmd_op1_ack) | ||
693 | |||
694 | typedef struct { | ||
695 | unsigned int cmd_id; | ||
696 | unsigned int op1_buf_y_addr; | ||
697 | unsigned int op1_buf_cbcr_addr; | ||
698 | } __attribute__((packed)) vfe_cmd_op1_ack; | ||
699 | |||
700 | |||
701 | |||
702 | /* | ||
703 | * Command to acknowledge last MSG_VFE_OP2 message | ||
704 | */ | ||
705 | |||
706 | #define VFE_CMD_OP2_ACK 0x0014 | ||
707 | #define VFE_CMD_OP2_ACK_LEN sizeof(vfe_cmd_op2_ack) | ||
708 | |||
709 | typedef struct { | ||
710 | unsigned int cmd_id; | ||
711 | unsigned int op2_buf_y_addr; | ||
712 | unsigned int op2_buf_cbcr_addr; | ||
713 | } __attribute__((packed)) vfe_cmd_op2_ack; | ||
714 | |||
715 | |||
716 | |||
717 | /* | ||
718 | * Command to acknowledge MSG_VFE_STATS_AUTOFOCUS msg | ||
719 | */ | ||
720 | |||
721 | #define VFE_CMD_STATS_AF_ACK 0x0015 | ||
722 | #define VFE_CMD_STATS_AF_ACK_LEN sizeof(vfe_cmd_stats_af_ack) | ||
723 | |||
724 | |||
725 | typedef struct { | ||
726 | unsigned int cmd_id; | ||
727 | unsigned int af_stats_op_buf; | ||
728 | } __attribute__((packed)) vfe_cmd_stats_af_ack; | ||
729 | |||
730 | |||
731 | /* | ||
732 | * Command to acknowledge MSG_VFE_STATS_WB_EXP msg | ||
733 | */ | ||
734 | |||
735 | #define VFE_CMD_STATS_WB_EXP_ACK 0x0016 | ||
736 | #define VFE_CMD_STATS_WB_EXP_ACK_LEN sizeof(vfe_cmd_stats_wb_exp_ack) | ||
737 | |||
738 | typedef struct { | ||
739 | unsigned int cmd_id; | ||
740 | unsigned int wb_exp_stats_op_buf; | ||
741 | } __attribute__((packed)) vfe_cmd_stats_wb_exp_ack; | ||
742 | |||
743 | |||
744 | /* | ||
745 | * Command to acknowledge MSG_VFE_EPOCH1 message | ||
746 | */ | ||
747 | |||
748 | #define VFE_CMD_EPOCH1_ACK 0x0017 | ||
749 | #define VFE_CMD_EPOCH1_ACK_LEN sizeof(vfe_cmd_epoch1_ack) | ||
750 | |||
751 | typedef struct { | ||
752 | unsigned short cmd_id; | ||
753 | } __attribute__((packed)) vfe_cmd_epoch1_ack; | ||
754 | |||
755 | |||
756 | /* | ||
757 | * Command to acknowledge MSG_VFE_EPOCH2 message | ||
758 | */ | ||
759 | |||
760 | #define VFE_CMD_EPOCH2_ACK 0x0018 | ||
761 | #define VFE_CMD_EPOCH2_ACK_LEN sizeof(vfe_cmd_epoch2_ack) | ||
762 | |||
763 | typedef struct { | ||
764 | unsigned short cmd_id; | ||
765 | } __attribute__((packed)) vfe_cmd_epoch2_ack; | ||
766 | |||
767 | |||
768 | |||
769 | /* | ||
770 | * Command to configure, enable or disable synchronous timer1 | ||
771 | */ | ||
772 | |||
773 | #define VFE_CMD_SYNC_TIMER1_CFG 0x0019 | ||
774 | #define VFE_CMD_SYNC_TIMER1_CFG_LEN \ | ||
775 | sizeof(vfe_cmd_sync_timer1_cfg) | ||
776 | |||
777 | #define VFE_CMD_SYNC_T1_CFG_PART1_TIMER_DIS 0x0000 | ||
778 | #define VFE_CMD_SYNC_T1_CFG_PART1_TIMER_ENA 0x0001 | ||
779 | #define VFE_CMD_SYNC_T1_CFG_PART1_POL_HIGH 0x0000 | ||
780 | #define VFE_CMD_SYNC_T1_CFG_PART1_POL_LOW 0x0002 | ||
781 | |||
782 | typedef struct { | ||
783 | unsigned int cmd_id; | ||
784 | unsigned int sync_t1_cfg_part1; | ||
785 | unsigned int sync_t1_h_sync_countdown; | ||
786 | unsigned int sync_t1_pclk_countdown; | ||
787 | unsigned int sync_t1_duration; | ||
788 | } __attribute__((packed)) vfe_cmd_sync_timer1_cfg; | ||
789 | |||
790 | |||
791 | /* | ||
792 | * Command to configure, enable or disable synchronous timer1 | ||
793 | */ | ||
794 | |||
795 | #define VFE_CMD_SYNC_TIMER2_CFG 0x001A | ||
796 | #define VFE_CMD_SYNC_TIMER2_CFG_LEN \ | ||
797 | sizeof(vfe_cmd_sync_timer2_cfg) | ||
798 | |||
799 | #define VFE_CMD_SYNC_T2_CFG_PART1_TIMER_DIS 0x0000 | ||
800 | #define VFE_CMD_SYNC_T2_CFG_PART1_TIMER_ENA 0x0001 | ||
801 | #define VFE_CMD_SYNC_T2_CFG_PART1_POL_HIGH 0x0000 | ||
802 | #define VFE_CMD_SYNC_T2_CFG_PART1_POL_LOW 0x0002 | ||
803 | |||
804 | typedef struct { | ||
805 | unsigned int cmd_id; | ||
806 | unsigned int sync_t2_cfg_part1; | ||
807 | unsigned int sync_t2_h_sync_countdown; | ||
808 | unsigned int sync_t2_pclk_countdown; | ||
809 | unsigned int sync_t2_duration; | ||
810 | } __attribute__((packed)) vfe_cmd_sync_timer2_cfg; | ||
811 | |||
812 | |||
813 | /* | ||
814 | * Command to configure and start asynchronous timer1 | ||
815 | */ | ||
816 | |||
817 | #define VFE_CMD_ASYNC_TIMER1_START 0x001B | ||
818 | #define VFE_CMD_ASYNC_TIMER1_START_LEN \ | ||
819 | sizeof(vfe_cmd_async_timer1_start) | ||
820 | |||
821 | #define VFE_CMD_ASYNC_T1_POLARITY_A_HIGH 0x0000 | ||
822 | #define VFE_CMD_ASYNC_T1_POLARITY_A_LOW 0x0001 | ||
823 | #define VFE_CMD_ASYNC_T1_POLARITY_B_HIGH 0x0000 | ||
824 | #define VFE_CMD_ASYNC_T1_POLARITY_B_LOW 0x0002 | ||
825 | |||
826 | typedef struct { | ||
827 | unsigned int cmd_id; | ||
828 | unsigned int async_t1a_cfg; | ||
829 | unsigned int async_t1b_cfg; | ||
830 | unsigned int async_t1_polarity; | ||
831 | } __attribute__((packed)) vfe_cmd_async_timer1_start; | ||
832 | |||
833 | |||
834 | /* | ||
835 | * Command to configure and start asynchronous timer2 | ||
836 | */ | ||
837 | |||
838 | #define VFE_CMD_ASYNC_TIMER2_START 0x001C | ||
839 | #define VFE_CMD_ASYNC_TIMER2_START_LEN \ | ||
840 | sizeof(vfe_cmd_async_timer2_start) | ||
841 | |||
842 | #define VFE_CMD_ASYNC_T2_POLARITY_A_HIGH 0x0000 | ||
843 | #define VFE_CMD_ASYNC_T2_POLARITY_A_LOW 0x0001 | ||
844 | #define VFE_CMD_ASYNC_T2_POLARITY_B_HIGH 0x0000 | ||
845 | #define VFE_CMD_ASYNC_T2_POLARITY_B_LOW 0x0002 | ||
846 | |||
847 | typedef struct { | ||
848 | unsigned int cmd_id; | ||
849 | unsigned int async_t2a_cfg; | ||
850 | unsigned int async_t2b_cfg; | ||
851 | unsigned int async_t2_polarity; | ||
852 | } __attribute__((packed)) vfe_cmd_async_timer2_start; | ||
853 | |||
854 | |||
855 | /* | ||
856 | * Command to program partial configurations of auto focus(af) | ||
857 | */ | ||
858 | |||
859 | #define VFE_CMD_STATS_AF_UPDATE 0x001D | ||
860 | #define VFE_CMD_STATS_AF_UPDATE_LEN \ | ||
861 | sizeof(vfe_cmd_stats_af_update) | ||
862 | |||
863 | #define VFE_CMD_AF_UPDATE_PART1_WINDOW_ONE 0x00000000 | ||
864 | #define VFE_CMD_AF_UPDATE_PART1_WINDOW_MULTI 0x80000000 | ||
865 | |||
866 | typedef struct { | ||
867 | unsigned int cmd_id; | ||
868 | unsigned int af_update_part1; | ||
869 | unsigned int af_update_part2; | ||
870 | } __attribute__((packed)) vfe_cmd_stats_af_update; | ||
871 | |||
872 | |||
873 | /* | ||
874 | * Command to program partial cfg of wb and exp | ||
875 | */ | ||
876 | |||
877 | #define VFE_CMD_STATS_WB_EXP_UPDATE 0x001E | ||
878 | #define VFE_CMD_STATS_WB_EXP_UPDATE_LEN \ | ||
879 | sizeof(vfe_cmd_stats_wb_exp_update) | ||
880 | |||
881 | #define VFE_CMD_WB_EXP_UPDATE_PART1_REGIONS_8_8 0x0000 | ||
882 | #define VFE_CMD_WB_EXP_UPDATE_PART1_REGIONS_16_16 0x0001 | ||
883 | #define VFE_CMD_WB_EXP_UPDATE_PART1_SREGIONS_8_8 0x0000 | ||
884 | #define VFE_CMD_WB_EXP_UPDATE_PART1_SREGIONS_4_4 0x0002 | ||
885 | |||
886 | typedef struct { | ||
887 | unsigned int cmd_id; | ||
888 | unsigned int wb_exp_update_part1; | ||
889 | unsigned int wb_exp_update_part2; | ||
890 | unsigned int wb_exp_update_part3; | ||
891 | unsigned int wb_exp_update_part4; | ||
892 | } __attribute__((packed)) vfe_cmd_stats_wb_exp_update; | ||
893 | |||
894 | |||
895 | |||
896 | /* | ||
897 | * Command to re program the CAMIF FRAME CONFIG settings | ||
898 | */ | ||
899 | |||
900 | #define VFE_CMD_UPDATE_CAMIF_FRAME_CFG 0x001F | ||
901 | #define VFE_CMD_UPDATE_CAMIF_FRAME_CFG_LEN \ | ||
902 | sizeof(vfe_cmd_update_camif_frame_cfg) | ||
903 | |||
904 | typedef struct { | ||
905 | unsigned int cmd_id; | ||
906 | unsigned int camif_frame_cfg; | ||
907 | } __attribute__((packed)) vfe_cmd_update_camif_frame_cfg; | ||
908 | |||
909 | |||
910 | #endif | ||
diff --git a/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h new file mode 100644 index 000000000000..0053cfb65ba1 --- /dev/null +++ b/drivers/staging/dream/include/mach/qdsp5/qdsp5vfemsg.h | |||
@@ -0,0 +1,290 @@ | |||
1 | #ifndef QDSP5VFEMSGI_H | ||
2 | #define QDSP5VFEMSGI_H | ||
3 | |||
4 | /*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====* | ||
5 | |||
6 | V F E I N T E R N A L M E S S A G E S | ||
7 | |||
8 | GENERAL DESCRIPTION | ||
9 | This file contains defintions of format blocks of commands | ||
10 | that are sent by VFE Task | ||
11 | |||
12 | REFERENCES | ||
13 | None | ||
14 | |||
15 | EXTERNALIZED FUNCTIONS | ||
16 | None | ||
17 | |||
18 | Copyright(c) 1992 - 2008 by QUALCOMM, Incorporated. | ||
19 | |||
20 | This software is licensed under the terms of the GNU General Public | ||
21 | License version 2, as published by the Free Software Foundation, and | ||
22 | may be copied, distributed, and modified under those terms. | ||
23 | |||
24 | This program is distributed in the hope that it will be useful, | ||
25 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
26 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
27 | GNU General Public License for more details. | ||
28 | |||
29 | *====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/ | ||
30 | /*=========================================================================== | ||
31 | |||
32 | EDIT HISTORY FOR FILE | ||
33 | |||
34 | This section contains comments describing changes made to this file. | ||
35 | Notice that changes are listed in reverse chronological order. | ||
36 | |||
37 | $Header: //source/qcom/qct/multimedia2/AdspSvc/7XXX/qdsp5cmd/video/qdsp5vfemsg.h#2 $ $DateTime: 2008/07/30 10:50:23 $ $Author: pavanr $ | ||
38 | Revision History: | ||
39 | |||
40 | when who what, where, why | ||
41 | -------- --- ---------------------------------------------------------- | ||
42 | 06/12/08 sv initial version | ||
43 | ===========================================================================*/ | ||
44 | |||
45 | |||
46 | /* | ||
47 | * Message to acknowledge CMD_VFE_REST command | ||
48 | */ | ||
49 | |||
50 | #define VFE_MSG_RESET_ACK 0x0000 | ||
51 | #define VFE_MSG_RESET_ACK_LEN sizeof(vfe_msg_reset_ack) | ||
52 | |||
53 | typedef struct { | ||
54 | } __attribute__((packed)) vfe_msg_reset_ack; | ||
55 | |||
56 | |||
57 | /* | ||
58 | * Message to acknowledge CMD_VFE_START command | ||
59 | */ | ||
60 | |||
61 | #define VFE_MSG_START_ACK 0x0001 | ||
62 | #define VFE_MSG_START_ACK_LEN sizeof(vfe_msg_start_ack) | ||
63 | |||
64 | typedef struct { | ||
65 | } __attribute__((packed)) vfe_msg_start_ack; | ||
66 | |||
67 | /* | ||
68 | * Message to acknowledge CMD_VFE_STOP command | ||
69 | */ | ||
70 | |||
71 | #define VFE_MSG_STOP_ACK 0x0002 | ||
72 | #define VFE_MSG_STOP_ACK_LEN sizeof(vfe_msg_stop_ack) | ||
73 | |||
74 | typedef struct { | ||
75 | } __attribute__((packed)) vfe_msg_stop_ack; | ||
76 | |||
77 | |||
78 | /* | ||
79 | * Message to acknowledge CMD_VFE_UPDATE command | ||
80 | */ | ||
81 | |||
82 | #define VFE_MSG_UPDATE_ACK 0x0003 | ||
83 | #define VFE_MSG_UPDATE_ACK_LEN sizeof(vfe_msg_update_ack) | ||
84 | |||
85 | typedef struct { | ||
86 | } __attribute__((packed)) vfe_msg_update_ack; | ||
87 | |||
88 | |||
89 | /* | ||
90 | * Message to notify the ARM that snapshot processing is complete | ||
91 | * and that the VFE is now STATE_VFE_IDLE | ||
92 | */ | ||
93 | |||
94 | #define VFE_MSG_SNAPSHOT_DONE 0x0004 | ||
95 | #define VFE_MSG_SNAPSHOT_DONE_LEN \ | ||
96 | sizeof(vfe_msg_snapshot_done) | ||
97 | |||
98 | typedef struct { | ||
99 | } __attribute__((packed)) vfe_msg_snapshot_done; | ||
100 | |||
101 | |||
102 | |||
103 | /* | ||
104 | * Message to notify ARM that illegal cmd was received and | ||
105 | * system is in the IDLE state | ||
106 | */ | ||
107 | |||
108 | #define VFE_MSG_ILLEGAL_CMD 0x0005 | ||
109 | #define VFE_MSG_ILLEGAL_CMD_LEN \ | ||
110 | sizeof(vfe_msg_illegal_cmd) | ||
111 | |||
112 | typedef struct { | ||
113 | unsigned int status; | ||
114 | } __attribute__((packed)) vfe_msg_illegal_cmd; | ||
115 | |||
116 | |||
117 | /* | ||
118 | * Message to notify ARM that op1 buf is full and ready | ||
119 | */ | ||
120 | |||
121 | #define VFE_MSG_OP1 0x0006 | ||
122 | #define VFE_MSG_OP1_LEN sizeof(vfe_msg_op1) | ||
123 | |||
124 | typedef struct { | ||
125 | unsigned int op1_buf_y_addr; | ||
126 | unsigned int op1_buf_cbcr_addr; | ||
127 | unsigned int black_level_even_col; | ||
128 | unsigned int black_level_odd_col; | ||
129 | unsigned int defect_pixels_detected; | ||
130 | unsigned int asf_max_edge; | ||
131 | } __attribute__((packed)) vfe_msg_op1; | ||
132 | |||
133 | |||
134 | /* | ||
135 | * Message to notify ARM that op2 buf is full and ready | ||
136 | */ | ||
137 | |||
138 | #define VFE_MSG_OP2 0x0007 | ||
139 | #define VFE_MSG_OP2_LEN sizeof(vfe_msg_op2) | ||
140 | |||
141 | typedef struct { | ||
142 | unsigned int op2_buf_y_addr; | ||
143 | unsigned int op2_buf_cbcr_addr; | ||
144 | unsigned int black_level_even_col; | ||
145 | unsigned int black_level_odd_col; | ||
146 | unsigned int defect_pixels_detected; | ||
147 | unsigned int asf_max_edge; | ||
148 | } __attribute__((packed)) vfe_msg_op2; | ||
149 | |||
150 | |||
151 | /* | ||
152 | * Message to notify ARM that autofocus(af) stats are ready | ||
153 | */ | ||
154 | |||
155 | #define VFE_MSG_STATS_AF 0x0008 | ||
156 | #define VFE_MSG_STATS_AF_LEN sizeof(vfe_msg_stats_af) | ||
157 | |||
158 | typedef struct { | ||
159 | unsigned int af_stats_op_buffer; | ||
160 | } __attribute__((packed)) vfe_msg_stats_af; | ||
161 | |||
162 | |||
163 | /* | ||
164 | * Message to notify ARM that white balance(wb) and exposure (exp) | ||
165 | * stats are ready | ||
166 | */ | ||
167 | |||
168 | #define VFE_MSG_STATS_WB_EXP 0x0009 | ||
169 | #define VFE_MSG_STATS_WB_EXP_LEN \ | ||
170 | sizeof(vfe_msg_stats_wb_exp) | ||
171 | |||
172 | typedef struct { | ||
173 | unsigned int wb_exp_stats_op_buf; | ||
174 | } __attribute__((packed)) vfe_msg_stats_wb_exp; | ||
175 | |||
176 | |||
177 | /* | ||
178 | * Message to notify the ARM that histogram(hg) stats are ready | ||
179 | */ | ||
180 | |||
181 | #define VFE_MSG_STATS_HG 0x000A | ||
182 | #define VFE_MSG_STATS_HG_LEN sizeof(vfe_msg_stats_hg) | ||
183 | |||
184 | typedef struct { | ||
185 | unsigned int hg_stats_op_buf; | ||
186 | } __attribute__((packed)) vfe_msg_stats_hg; | ||
187 | |||
188 | |||
189 | /* | ||
190 | * Message to notify the ARM that epoch1 event occurred in the CAMIF | ||
191 | */ | ||
192 | |||
193 | #define VFE_MSG_EPOCH1 0x000B | ||
194 | #define VFE_MSG_EPOCH1_LEN sizeof(vfe_msg_epoch1) | ||
195 | |||
196 | typedef struct { | ||
197 | } __attribute__((packed)) vfe_msg_epoch1; | ||
198 | |||
199 | |||
200 | /* | ||
201 | * Message to notify the ARM that epoch2 event occurred in the CAMIF | ||
202 | */ | ||
203 | |||
204 | #define VFE_MSG_EPOCH2 0x000C | ||
205 | #define VFE_MSG_EPOCH2_LEN sizeof(vfe_msg_epoch2) | ||
206 | |||
207 | typedef struct { | ||
208 | } __attribute__((packed)) vfe_msg_epoch2; | ||
209 | |||
210 | |||
211 | /* | ||
212 | * Message to notify the ARM that sync timer1 op is completed | ||
213 | */ | ||
214 | |||
215 | #define VFE_MSG_SYNC_T1_DONE 0x000D | ||
216 | #define VFE_MSG_SYNC_T1_DONE_LEN sizeof(vfe_msg_sync_t1_done) | ||
217 | |||
218 | typedef struct { | ||
219 | } __attribute__((packed)) vfe_msg_sync_t1_done; | ||
220 | |||
221 | |||
222 | /* | ||
223 | * Message to notify the ARM that sync timer2 op is completed | ||
224 | */ | ||
225 | |||
226 | #define VFE_MSG_SYNC_T2_DONE 0x000E | ||
227 | #define VFE_MSG_SYNC_T2_DONE_LEN sizeof(vfe_msg_sync_t2_done) | ||
228 | |||
229 | typedef struct { | ||
230 | } __attribute__((packed)) vfe_msg_sync_t2_done; | ||
231 | |||
232 | |||
233 | /* | ||
234 | * Message to notify the ARM that async t1 operation completed | ||
235 | */ | ||
236 | |||
237 | #define VFE_MSG_ASYNC_T1_DONE 0x000F | ||
238 | #define VFE_MSG_ASYNC_T1_DONE_LEN sizeof(vfe_msg_async_t1_done) | ||
239 | |||
240 | typedef struct { | ||
241 | } __attribute__((packed)) vfe_msg_async_t1_done; | ||
242 | |||
243 | |||
244 | |||
245 | /* | ||
246 | * Message to notify the ARM that async t2 operation completed | ||
247 | */ | ||
248 | |||
249 | #define VFE_MSG_ASYNC_T2_DONE 0x0010 | ||
250 | #define VFE_MSG_ASYNC_T2_DONE_LEN sizeof(vfe_msg_async_t2_done) | ||
251 | |||
252 | typedef struct { | ||
253 | } __attribute__((packed)) vfe_msg_async_t2_done; | ||
254 | |||
255 | |||
256 | |||
257 | /* | ||
258 | * Message to notify the ARM that an error has occurred | ||
259 | */ | ||
260 | |||
261 | #define VFE_MSG_ERROR 0x0011 | ||
262 | #define VFE_MSG_ERROR_LEN sizeof(vfe_msg_error) | ||
263 | |||
264 | #define VFE_MSG_ERR_COND_NO_CAMIF_ERR 0x0000 | ||
265 | #define VFE_MSG_ERR_COND_CAMIF_ERR 0x0001 | ||
266 | #define VFE_MSG_ERR_COND_OP1_Y_NO_BUS_OF 0x0000 | ||
267 | #define VFE_MSG_ERR_COND_OP1_Y_BUS_OF 0x0002 | ||
268 | #define VFE_MSG_ERR_COND_OP1_CBCR_NO_BUS_OF 0x0000 | ||
269 | #define VFE_MSG_ERR_COND_OP1_CBCR_BUS_OF 0x0004 | ||
270 | #define VFE_MSG_ERR_COND_OP2_Y_NO_BUS_OF 0x0000 | ||
271 | #define VFE_MSG_ERR_COND_OP2_Y_BUS_OF 0x0008 | ||
272 | #define VFE_MSG_ERR_COND_OP2_CBCR_NO_BUS_OF 0x0000 | ||
273 | #define VFE_MSG_ERR_COND_OP2_CBCR_BUS_OF 0x0010 | ||
274 | #define VFE_MSG_ERR_COND_AF_NO_BUS_OF 0x0000 | ||
275 | #define VFE_MSG_ERR_COND_AF_BUS_OF 0x0020 | ||
276 | #define VFE_MSG_ERR_COND_WB_EXP_NO_BUS_OF 0x0000 | ||
277 | #define VFE_MSG_ERR_COND_WB_EXP_BUS_OF 0x0040 | ||
278 | #define VFE_MSG_ERR_COND_NO_AXI_ERR 0x0000 | ||
279 | #define VFE_MSG_ERR_COND_AXI_ERR 0x0080 | ||
280 | |||
281 | #define VFE_MSG_CAMIF_STS_IDLE 0x0000 | ||
282 | #define VFE_MSG_CAMIF_STS_CAPTURE_DATA 0x0001 | ||
283 | |||
284 | typedef struct { | ||
285 | unsigned int err_cond; | ||
286 | unsigned int camif_sts; | ||
287 | } __attribute__((packed)) vfe_msg_error; | ||
288 | |||
289 | |||
290 | #endif | ||
diff --git a/drivers/staging/dream/include/media/msm_camera.h b/drivers/staging/dream/include/media/msm_camera.h new file mode 100644 index 000000000000..09812d62cc1e --- /dev/null +++ b/drivers/staging/dream/include/media/msm_camera.h | |||
@@ -0,0 +1,388 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008-2009 QUALCOMM Incorporated. | ||
3 | */ | ||
4 | #ifndef __LINUX_MSM_CAMERA_H | ||
5 | #define __LINUX_MSM_CAMERA_H | ||
6 | |||
7 | #include <linux/types.h> | ||
8 | #include <asm/sizes.h> | ||
9 | #include <linux/ioctl.h> | ||
10 | |||
11 | #define MSM_CAM_IOCTL_MAGIC 'm' | ||
12 | |||
13 | #define MSM_CAM_IOCTL_GET_SENSOR_INFO \ | ||
14 | _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *) | ||
15 | |||
16 | #define MSM_CAM_IOCTL_REGISTER_PMEM \ | ||
17 | _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *) | ||
18 | |||
19 | #define MSM_CAM_IOCTL_UNREGISTER_PMEM \ | ||
20 | _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned) | ||
21 | |||
22 | #define MSM_CAM_IOCTL_CTRL_COMMAND \ | ||
23 | _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *) | ||
24 | |||
25 | #define MSM_CAM_IOCTL_CONFIG_VFE \ | ||
26 | _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *) | ||
27 | |||
28 | #define MSM_CAM_IOCTL_GET_STATS \ | ||
29 | _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *) | ||
30 | |||
31 | #define MSM_CAM_IOCTL_GETFRAME \ | ||
32 | _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *) | ||
33 | |||
34 | #define MSM_CAM_IOCTL_ENABLE_VFE \ | ||
35 | _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *) | ||
36 | |||
37 | #define MSM_CAM_IOCTL_CTRL_CMD_DONE \ | ||
38 | _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *) | ||
39 | |||
40 | #define MSM_CAM_IOCTL_CONFIG_CMD \ | ||
41 | _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *) | ||
42 | |||
43 | #define MSM_CAM_IOCTL_DISABLE_VFE \ | ||
44 | _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *) | ||
45 | |||
46 | #define MSM_CAM_IOCTL_PAD_REG_RESET2 \ | ||
47 | _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *) | ||
48 | |||
49 | #define MSM_CAM_IOCTL_VFE_APPS_RESET \ | ||
50 | _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *) | ||
51 | |||
52 | #define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \ | ||
53 | _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *) | ||
54 | |||
55 | #define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \ | ||
56 | _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *) | ||
57 | |||
58 | #define MSM_CAM_IOCTL_AXI_CONFIG \ | ||
59 | _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *) | ||
60 | |||
61 | #define MSM_CAM_IOCTL_GET_PICTURE \ | ||
62 | _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_camera_ctrl_cmd *) | ||
63 | |||
64 | #define MSM_CAM_IOCTL_SET_CROP \ | ||
65 | _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *) | ||
66 | |||
67 | #define MSM_CAM_IOCTL_PICT_PP \ | ||
68 | _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *) | ||
69 | |||
70 | #define MSM_CAM_IOCTL_PICT_PP_DONE \ | ||
71 | _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *) | ||
72 | |||
73 | #define MSM_CAM_IOCTL_SENSOR_IO_CFG \ | ||
74 | _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *) | ||
75 | |||
76 | #define MSM_CAMERA_LED_OFF 0 | ||
77 | #define MSM_CAMERA_LED_LOW 1 | ||
78 | #define MSM_CAMERA_LED_HIGH 2 | ||
79 | |||
80 | #define MSM_CAM_IOCTL_FLASH_LED_CFG \ | ||
81 | _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *) | ||
82 | |||
83 | #define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \ | ||
84 | _IO(MSM_CAM_IOCTL_MAGIC, 23) | ||
85 | |||
86 | #define MSM_CAM_IOCTL_CTRL_COMMAND_2 \ | ||
87 | _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *) | ||
88 | |||
89 | #define MAX_SENSOR_NUM 3 | ||
90 | #define MAX_SENSOR_NAME 32 | ||
91 | |||
92 | #define MSM_CAM_CTRL_CMD_DONE 0 | ||
93 | #define MSM_CAM_SENSOR_VFE_CMD 1 | ||
94 | |||
95 | /***************************************************** | ||
96 | * structure | ||
97 | *****************************************************/ | ||
98 | |||
99 | /* define five type of structures for userspace <==> kernel | ||
100 | * space communication: | ||
101 | * command 1 - 2 are from userspace ==> kernel | ||
102 | * command 3 - 4 are from kernel ==> userspace | ||
103 | * | ||
104 | * 1. control command: control command(from control thread), | ||
105 | * control status (from config thread); | ||
106 | */ | ||
107 | struct msm_ctrl_cmd { | ||
108 | uint16_t type; | ||
109 | uint16_t length; | ||
110 | void *value; | ||
111 | uint16_t status; | ||
112 | uint32_t timeout_ms; | ||
113 | int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */ | ||
114 | }; | ||
115 | |||
116 | struct msm_vfe_evt_msg { | ||
117 | unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */ | ||
118 | unsigned short msg_id; | ||
119 | unsigned int len; /* size in, number of bytes out */ | ||
120 | void *data; | ||
121 | }; | ||
122 | |||
123 | #define MSM_CAM_RESP_CTRL 0 | ||
124 | #define MSM_CAM_RESP_STAT_EVT_MSG 1 | ||
125 | #define MSM_CAM_RESP_V4L2 2 | ||
126 | #define MSM_CAM_RESP_MAX 3 | ||
127 | |||
128 | /* this one is used to send ctrl/status up to config thread */ | ||
129 | struct msm_stats_event_ctrl { | ||
130 | /* 0 - ctrl_cmd from control thread, | ||
131 | * 1 - stats/event kernel, | ||
132 | * 2 - V4L control or read request */ | ||
133 | int resptype; | ||
134 | int timeout_ms; | ||
135 | struct msm_ctrl_cmd ctrl_cmd; | ||
136 | /* struct vfe_event_t stats_event; */ | ||
137 | struct msm_vfe_evt_msg stats_event; | ||
138 | }; | ||
139 | |||
140 | /* 2. config command: config command(from config thread); */ | ||
141 | struct msm_camera_cfg_cmd { | ||
142 | /* what to config: | ||
143 | * 1 - sensor config, 2 - vfe config */ | ||
144 | uint16_t cfg_type; | ||
145 | |||
146 | /* sensor config type */ | ||
147 | uint16_t cmd_type; | ||
148 | uint16_t queue; | ||
149 | uint16_t length; | ||
150 | void *value; | ||
151 | }; | ||
152 | |||
153 | #define CMD_GENERAL 0 | ||
154 | #define CMD_AXI_CFG_OUT1 1 | ||
155 | #define CMD_AXI_CFG_SNAP_O1_AND_O2 2 | ||
156 | #define CMD_AXI_CFG_OUT2 3 | ||
157 | #define CMD_PICT_T_AXI_CFG 4 | ||
158 | #define CMD_PICT_M_AXI_CFG 5 | ||
159 | #define CMD_RAW_PICT_AXI_CFG 6 | ||
160 | #define CMD_STATS_AXI_CFG 7 | ||
161 | #define CMD_STATS_AF_AXI_CFG 8 | ||
162 | #define CMD_FRAME_BUF_RELEASE 9 | ||
163 | #define CMD_PREV_BUF_CFG 10 | ||
164 | #define CMD_SNAP_BUF_RELEASE 11 | ||
165 | #define CMD_SNAP_BUF_CFG 12 | ||
166 | #define CMD_STATS_DISABLE 13 | ||
167 | #define CMD_STATS_ENABLE 14 | ||
168 | #define CMD_STATS_AF_ENABLE 15 | ||
169 | #define CMD_STATS_BUF_RELEASE 16 | ||
170 | #define CMD_STATS_AF_BUF_RELEASE 17 | ||
171 | #define UPDATE_STATS_INVALID 18 | ||
172 | |||
173 | /* vfe config command: config command(from config thread)*/ | ||
174 | struct msm_vfe_cfg_cmd { | ||
175 | int cmd_type; | ||
176 | uint16_t length; | ||
177 | void *value; | ||
178 | }; | ||
179 | |||
180 | #define MAX_CAMERA_ENABLE_NAME_LEN 32 | ||
181 | struct camera_enable_cmd { | ||
182 | char name[MAX_CAMERA_ENABLE_NAME_LEN]; | ||
183 | }; | ||
184 | |||
185 | #define MSM_PMEM_OUTPUT1 0 | ||
186 | #define MSM_PMEM_OUTPUT2 1 | ||
187 | #define MSM_PMEM_OUTPUT1_OUTPUT2 2 | ||
188 | #define MSM_PMEM_THUMBAIL 3 | ||
189 | #define MSM_PMEM_MAINIMG 4 | ||
190 | #define MSM_PMEM_RAW_MAINIMG 5 | ||
191 | #define MSM_PMEM_AEC_AWB 6 | ||
192 | #define MSM_PMEM_AF 7 | ||
193 | #define MSM_PMEM_MAX 8 | ||
194 | |||
195 | #define FRAME_PREVIEW_OUTPUT1 0 | ||
196 | #define FRAME_PREVIEW_OUTPUT2 1 | ||
197 | #define FRAME_SNAPSHOT 2 | ||
198 | #define FRAME_THUMBAIL 3 | ||
199 | #define FRAME_RAW_SNAPSHOT 4 | ||
200 | #define FRAME_MAX 5 | ||
201 | |||
202 | struct msm_pmem_info { | ||
203 | int type; | ||
204 | int fd; | ||
205 | void *vaddr; | ||
206 | uint32_t y_off; | ||
207 | uint32_t cbcr_off; | ||
208 | uint8_t active; | ||
209 | }; | ||
210 | |||
211 | struct outputCfg { | ||
212 | uint32_t height; | ||
213 | uint32_t width; | ||
214 | |||
215 | uint32_t window_height_firstline; | ||
216 | uint32_t window_height_lastline; | ||
217 | }; | ||
218 | |||
219 | #define OUTPUT_1 0 | ||
220 | #define OUTPUT_2 1 | ||
221 | #define OUTPUT_1_AND_2 2 | ||
222 | #define CAMIF_TO_AXI_VIA_OUTPUT_2 3 | ||
223 | #define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 4 | ||
224 | #define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 5 | ||
225 | #define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6 | ||
226 | |||
227 | #define MSM_FRAME_PREV_1 0 | ||
228 | #define MSM_FRAME_PREV_2 1 | ||
229 | #define MSM_FRAME_ENC 2 | ||
230 | |||
231 | struct msm_frame { | ||
232 | int path; | ||
233 | unsigned long buffer; | ||
234 | uint32_t y_off; | ||
235 | uint32_t cbcr_off; | ||
236 | int fd; | ||
237 | |||
238 | void *cropinfo; | ||
239 | int croplen; | ||
240 | }; | ||
241 | |||
242 | #define STAT_AEAW 0 | ||
243 | #define STAT_AF 1 | ||
244 | #define STAT_MAX 2 | ||
245 | |||
246 | struct msm_stats_buf { | ||
247 | int type; | ||
248 | unsigned long buffer; | ||
249 | int fd; | ||
250 | }; | ||
251 | |||
252 | #define MSM_V4L2_VID_CAP_TYPE 0 | ||
253 | #define MSM_V4L2_STREAM_ON 1 | ||
254 | #define MSM_V4L2_STREAM_OFF 2 | ||
255 | #define MSM_V4L2_SNAPSHOT 3 | ||
256 | #define MSM_V4L2_QUERY_CTRL 4 | ||
257 | #define MSM_V4L2_GET_CTRL 5 | ||
258 | #define MSM_V4L2_SET_CTRL 6 | ||
259 | #define MSM_V4L2_QUERY 7 | ||
260 | #define MSM_V4L2_MAX 8 | ||
261 | |||
262 | struct crop_info { | ||
263 | void *info; | ||
264 | int len; | ||
265 | }; | ||
266 | |||
267 | struct msm_postproc { | ||
268 | int ftnum; | ||
269 | struct msm_frame fthumnail; | ||
270 | int fmnum; | ||
271 | struct msm_frame fmain; | ||
272 | }; | ||
273 | |||
274 | struct msm_snapshot_pp_status { | ||
275 | void *status; | ||
276 | }; | ||
277 | |||
278 | #define CFG_SET_MODE 0 | ||
279 | #define CFG_SET_EFFECT 1 | ||
280 | #define CFG_START 2 | ||
281 | #define CFG_PWR_UP 3 | ||
282 | #define CFG_PWR_DOWN 4 | ||
283 | #define CFG_WRITE_EXPOSURE_GAIN 5 | ||
284 | #define CFG_SET_DEFAULT_FOCUS 6 | ||
285 | #define CFG_MOVE_FOCUS 7 | ||
286 | #define CFG_REGISTER_TO_REAL_GAIN 8 | ||
287 | #define CFG_REAL_TO_REGISTER_GAIN 9 | ||
288 | #define CFG_SET_FPS 10 | ||
289 | #define CFG_SET_PICT_FPS 11 | ||
290 | #define CFG_SET_BRIGHTNESS 12 | ||
291 | #define CFG_SET_CONTRAST 13 | ||
292 | #define CFG_SET_ZOOM 14 | ||
293 | #define CFG_SET_EXPOSURE_MODE 15 | ||
294 | #define CFG_SET_WB 16 | ||
295 | #define CFG_SET_ANTIBANDING 17 | ||
296 | #define CFG_SET_EXP_GAIN 18 | ||
297 | #define CFG_SET_PICT_EXP_GAIN 19 | ||
298 | #define CFG_SET_LENS_SHADING 20 | ||
299 | #define CFG_GET_PICT_FPS 21 | ||
300 | #define CFG_GET_PREV_L_PF 22 | ||
301 | #define CFG_GET_PREV_P_PL 23 | ||
302 | #define CFG_GET_PICT_L_PF 24 | ||
303 | #define CFG_GET_PICT_P_PL 25 | ||
304 | #define CFG_GET_AF_MAX_STEPS 26 | ||
305 | #define CFG_GET_PICT_MAX_EXP_LC 27 | ||
306 | #define CFG_MAX 28 | ||
307 | |||
308 | #define MOVE_NEAR 0 | ||
309 | #define MOVE_FAR 1 | ||
310 | |||
311 | #define SENSOR_PREVIEW_MODE 0 | ||
312 | #define SENSOR_SNAPSHOT_MODE 1 | ||
313 | #define SENSOR_RAW_SNAPSHOT_MODE 2 | ||
314 | |||
315 | #define SENSOR_QTR_SIZE 0 | ||
316 | #define SENSOR_FULL_SIZE 1 | ||
317 | #define SENSOR_INVALID_SIZE 2 | ||
318 | |||
319 | #define CAMERA_EFFECT_OFF 0 | ||
320 | #define CAMERA_EFFECT_MONO 1 | ||
321 | #define CAMERA_EFFECT_NEGATIVE 2 | ||
322 | #define CAMERA_EFFECT_SOLARIZE 3 | ||
323 | #define CAMERA_EFFECT_PASTEL 4 | ||
324 | #define CAMERA_EFFECT_MOSAIC 5 | ||
325 | #define CAMERA_EFFECT_RESIZE 6 | ||
326 | #define CAMERA_EFFECT_SEPIA 7 | ||
327 | #define CAMERA_EFFECT_POSTERIZE 8 | ||
328 | #define CAMERA_EFFECT_WHITEBOARD 9 | ||
329 | #define CAMERA_EFFECT_BLACKBOARD 10 | ||
330 | #define CAMERA_EFFECT_AQUA 11 | ||
331 | #define CAMERA_EFFECT_MAX 12 | ||
332 | |||
333 | struct sensor_pict_fps { | ||
334 | uint16_t prevfps; | ||
335 | uint16_t pictfps; | ||
336 | }; | ||
337 | |||
338 | struct exp_gain_cfg { | ||
339 | uint16_t gain; | ||
340 | uint32_t line; | ||
341 | }; | ||
342 | |||
343 | struct focus_cfg { | ||
344 | int32_t steps; | ||
345 | int dir; | ||
346 | }; | ||
347 | |||
348 | struct fps_cfg { | ||
349 | uint16_t f_mult; | ||
350 | uint16_t fps_div; | ||
351 | uint32_t pict_fps_div; | ||
352 | }; | ||
353 | |||
354 | struct sensor_cfg_data { | ||
355 | int cfgtype; | ||
356 | int mode; | ||
357 | int rs; | ||
358 | uint8_t max_steps; | ||
359 | |||
360 | union { | ||
361 | int8_t effect; | ||
362 | uint8_t lens_shading; | ||
363 | uint16_t prevl_pf; | ||
364 | uint16_t prevp_pl; | ||
365 | uint16_t pictl_pf; | ||
366 | uint16_t pictp_pl; | ||
367 | uint32_t pict_max_exp_lc; | ||
368 | uint16_t p_fps; | ||
369 | struct sensor_pict_fps gfps; | ||
370 | struct exp_gain_cfg exp_gain; | ||
371 | struct focus_cfg focus; | ||
372 | struct fps_cfg fps; | ||
373 | } cfg; | ||
374 | }; | ||
375 | |||
376 | #define GET_NAME 0 | ||
377 | #define GET_PREVIEW_LINE_PER_FRAME 1 | ||
378 | #define GET_PREVIEW_PIXELS_PER_LINE 2 | ||
379 | #define GET_SNAPSHOT_LINE_PER_FRAME 3 | ||
380 | #define GET_SNAPSHOT_PIXELS_PER_LINE 4 | ||
381 | #define GET_SNAPSHOT_FPS 5 | ||
382 | #define GET_SNAPSHOT_MAX_EP_LINE_CNT 6 | ||
383 | |||
384 | struct msm_camsensor_info { | ||
385 | char name[MAX_SENSOR_NAME]; | ||
386 | uint8_t flash_enabled; | ||
387 | }; | ||
388 | #endif /* __LINUX_MSM_CAMERA_H */ | ||
diff --git a/drivers/staging/dream/pmem.c b/drivers/staging/dream/pmem.c index def646812348..503ba212dc96 100644 --- a/drivers/staging/dream/pmem.c +++ b/drivers/staging/dream/pmem.c | |||
@@ -37,17 +37,17 @@ | |||
37 | * the file should not be released until put_pmem_file is called */ | 37 | * the file should not be released until put_pmem_file is called */ |
38 | #define PMEM_FLAGS_BUSY 0x1 | 38 | #define PMEM_FLAGS_BUSY 0x1 |
39 | /* indicates that this is a suballocation of a larger master range */ | 39 | /* indicates that this is a suballocation of a larger master range */ |
40 | #define PMEM_FLAGS_CONNECTED 0x1 << 1 | 40 | #define PMEM_FLAGS_CONNECTED ( 0x1 << 1 ) |
41 | /* indicates this is a master and not a sub allocation and that it is mmaped */ | 41 | /* indicates this is a master and not a sub allocation and that it is mmaped */ |
42 | #define PMEM_FLAGS_MASTERMAP 0x1 << 2 | 42 | #define PMEM_FLAGS_MASTERMAP ( 0x1 << 2 ) |
43 | /* submap and unsubmap flags indicate: | 43 | /* submap and unsubmap flags indicate: |
44 | * 00: subregion has never been mmaped | 44 | * 00: subregion has never been mmaped |
45 | * 10: subregion has been mmaped, reference to the mm was taken | 45 | * 10: subregion has been mmaped, reference to the mm was taken |
46 | * 11: subretion has ben released, refernece to the mm still held | 46 | * 11: subretion has ben released, refernece to the mm still held |
47 | * 01: subretion has been released, reference to the mm has been released | 47 | * 01: subretion has been released, reference to the mm has been released |
48 | */ | 48 | */ |
49 | #define PMEM_FLAGS_SUBMAP 0x1 << 3 | 49 | #define PMEM_FLAGS_SUBMAP ( 0x1 << 3 ) |
50 | #define PMEM_FLAGS_UNSUBMAP 0x1 << 4 | 50 | #define PMEM_FLAGS_UNSUBMAP ( 0x1 << 4 ) |
51 | 51 | ||
52 | 52 | ||
53 | struct pmem_data { | 53 | struct pmem_data { |
@@ -91,7 +91,7 @@ struct pmem_region_node { | |||
91 | 91 | ||
92 | #define PMEM_DEBUG_MSGS 0 | 92 | #define PMEM_DEBUG_MSGS 0 |
93 | #if PMEM_DEBUG_MSGS | 93 | #if PMEM_DEBUG_MSGS |
94 | #define DLOG(fmt,args...) \ | 94 | #define DLOG(fmt, args...) \ |
95 | do { printk(KERN_INFO "[%s:%s:%d] "fmt, __FILE__, __func__, __LINE__, \ | 95 | do { printk(KERN_INFO "[%s:%s:%d] "fmt, __FILE__, __func__, __LINE__, \ |
96 | ##args); } \ | 96 | ##args); } \ |
97 | while (0) | 97 | while (0) |
@@ -152,7 +152,7 @@ struct pmem_info { | |||
152 | static struct pmem_info pmem[PMEM_MAX_DEVICES]; | 152 | static struct pmem_info pmem[PMEM_MAX_DEVICES]; |
153 | static int id_count; | 153 | static int id_count; |
154 | 154 | ||
155 | #define PMEM_IS_FREE(id, index) !(pmem[id].bitmap[index].allocated) | 155 | #define PMEM_IS_FREE(id, index) ( !(pmem[id].bitmap[index].allocated) ) |
156 | #define PMEM_ORDER(id, index) pmem[id].bitmap[index].order | 156 | #define PMEM_ORDER(id, index) pmem[id].bitmap[index].order |
157 | #define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index))) | 157 | #define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index))) |
158 | #define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index))) | 158 | #define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index))) |
@@ -708,9 +708,8 @@ int get_pmem_addr(struct file *file, unsigned long *start, | |||
708 | struct pmem_data *data; | 708 | struct pmem_data *data; |
709 | int id; | 709 | int id; |
710 | 710 | ||
711 | if (!is_pmem_file(file) || !has_allocation(file)) { | 711 | if (!is_pmem_file(file) || !has_allocation(file)) |
712 | return -1; | 712 | return -1; |
713 | } | ||
714 | 713 | ||
715 | data = (struct pmem_data *)file->private_data; | 714 | data = (struct pmem_data *)file->private_data; |
716 | if (data->index == -1) { | 715 | if (data->index == -1) { |
@@ -789,9 +788,8 @@ void flush_pmem_file(struct file *file, unsigned long offset, unsigned long len) | |||
789 | struct list_head *elt; | 788 | struct list_head *elt; |
790 | void *flush_start, *flush_end; | 789 | void *flush_start, *flush_end; |
791 | 790 | ||
792 | if (!is_pmem_file(file) || !has_allocation(file)) { | 791 | if (!is_pmem_file(file) || !has_allocation(file)) |
793 | return; | 792 | return; |
794 | } | ||
795 | 793 | ||
796 | id = get_id(file); | 794 | id = get_id(file); |
797 | data = (struct pmem_data *)file->private_data; | 795 | data = (struct pmem_data *)file->private_data; |
@@ -833,7 +831,7 @@ static int pmem_connect(unsigned long connect, struct file *file) | |||
833 | src_file = fget_light(connect, &put_needed); | 831 | src_file = fget_light(connect, &put_needed); |
834 | DLOG("connect %p to %p\n", file, src_file); | 832 | DLOG("connect %p to %p\n", file, src_file); |
835 | if (!src_file) { | 833 | if (!src_file) { |
836 | printk("pmem: src file not found!\n"); | 834 | printk(KERN_INFO "pmem: src file not found!\n"); |
837 | ret = -EINVAL; | 835 | ret = -EINVAL; |
838 | goto err_no_file; | 836 | goto err_no_file; |
839 | } | 837 | } |
@@ -846,7 +844,7 @@ static int pmem_connect(unsigned long connect, struct file *file) | |||
846 | src_data = (struct pmem_data *)src_file->private_data; | 844 | src_data = (struct pmem_data *)src_file->private_data; |
847 | 845 | ||
848 | if (has_allocation(file) && (data->index != src_data->index)) { | 846 | if (has_allocation(file) && (data->index != src_data->index)) { |
849 | printk("pmem: file is already mapped but doesn't match this" | 847 | printk(KERN_INFO "pmem: file is already mapped but doesn't match this" |
850 | " src_file!\n"); | 848 | " src_file!\n"); |
851 | ret = -EINVAL; | 849 | ret = -EINVAL; |
852 | goto err_bad_file; | 850 | goto err_bad_file; |
@@ -885,7 +883,7 @@ lock_mm: | |||
885 | mm = get_task_mm(data->task); | 883 | mm = get_task_mm(data->task); |
886 | if (!mm) { | 884 | if (!mm) { |
887 | #if PMEM_DEBUG | 885 | #if PMEM_DEBUG |
888 | printk("pmem: can't remap task is gone!\n"); | 886 | printk(KERN_DEBUG "pmem: can't remap task is gone!\n"); |
889 | #endif | 887 | #endif |
890 | up_read(&data->sem); | 888 | up_read(&data->sem); |
891 | return -1; | 889 | return -1; |
@@ -936,7 +934,7 @@ int pmem_remap(struct pmem_region *region, struct file *file, | |||
936 | if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) || | 934 | if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) || |
937 | !PMEM_IS_PAGE_ALIGNED(region->len))) { | 935 | !PMEM_IS_PAGE_ALIGNED(region->len))) { |
938 | #if PMEM_DEBUG | 936 | #if PMEM_DEBUG |
939 | printk("pmem: request for unaligned pmem suballocation " | 937 | printk(KERN_DEBUG "pmem: request for unaligned pmem suballocation " |
940 | "%lx %lx\n", region->offset, region->len); | 938 | "%lx %lx\n", region->offset, region->len); |
941 | #endif | 939 | #endif |
942 | return -EINVAL; | 940 | return -EINVAL; |
diff --git a/drivers/staging/dream/qdsp5/Makefile b/drivers/staging/dream/qdsp5/Makefile index 991d4a7e157f..beedaaff5cc5 100644 --- a/drivers/staging/dream/qdsp5/Makefile +++ b/drivers/staging/dream/qdsp5/Makefile | |||
@@ -1,3 +1,4 @@ | |||
1 | EXTRA_CFLAGS=-Idrivers/staging/dream/include | ||
1 | obj-y += adsp.o | 2 | obj-y += adsp.o |
2 | ifeq ($(CONFIG_MSM_AMSS_VERSION_6350),y) | 3 | ifeq ($(CONFIG_MSM_AMSS_VERSION_6350),y) |
3 | obj-y += adsp_info.o | 4 | obj-y += adsp_info.o |
diff --git a/drivers/staging/dream/qdsp5/audio_mp3.c b/drivers/staging/dream/qdsp5/audio_mp3.c index b95574f699ff..7ed6e261d6c9 100644 --- a/drivers/staging/dream/qdsp5/audio_mp3.c +++ b/drivers/staging/dream/qdsp5/audio_mp3.c | |||
@@ -650,8 +650,7 @@ static long audio_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
650 | &audio->read_phys, | 650 | &audio->read_phys, |
651 | GFP_KERNEL); | 651 | GFP_KERNEL); |
652 | if (!audio->read_data) { | 652 | if (!audio->read_data) { |
653 | pr_err("audio_mp3: malloc pcm \ | 653 | pr_err("audio_mp3: malloc pcm buf failed\n"); |
654 | buf failed\n"); | ||
655 | rc = -1; | 654 | rc = -1; |
656 | } else { | 655 | } else { |
657 | uint8_t index; | 656 | uint8_t index; |
diff --git a/drivers/staging/dream/smd/Makefile b/drivers/staging/dream/smd/Makefile index 892c7414bbed..1c87618366a7 100644 --- a/drivers/staging/dream/smd/Makefile +++ b/drivers/staging/dream/smd/Makefile | |||
@@ -1,3 +1,4 @@ | |||
1 | EXTRA_CFLAGS=-Idrivers/staging/dream/include | ||
1 | obj-$(CONFIG_MSM_SMD) += smd.o smd_tty.o smd_qmi.o | 2 | obj-$(CONFIG_MSM_SMD) += smd.o smd_tty.o smd_qmi.o |
2 | obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter.o | 3 | obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter.o |
3 | obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_device.o | 4 | obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_device.o |
diff --git a/drivers/staging/dream/smd/smd_rpcrouter.c b/drivers/staging/dream/smd/smd_rpcrouter.c index 5ac2cd4a5978..69911a7bc87a 100644 --- a/drivers/staging/dream/smd/smd_rpcrouter.c +++ b/drivers/staging/dream/smd/smd_rpcrouter.c | |||
@@ -38,8 +38,6 @@ | |||
38 | #include <linux/platform_device.h> | 38 | #include <linux/platform_device.h> |
39 | #include <linux/uaccess.h> | 39 | #include <linux/uaccess.h> |
40 | 40 | ||
41 | #include <asm/byteorder.h> | ||
42 | |||
43 | #include <mach/msm_smd.h> | 41 | #include <mach/msm_smd.h> |
44 | #include "smd_rpcrouter.h" | 42 | #include "smd_rpcrouter.h" |
45 | 43 | ||
diff --git a/drivers/staging/dt3155/Kconfig b/drivers/staging/dt3155/Kconfig new file mode 100644 index 000000000000..4a3293c721b1 --- /dev/null +++ b/drivers/staging/dt3155/Kconfig | |||
@@ -0,0 +1,4 @@ | |||
1 | config DT3155 | ||
2 | tristate "DT3155 Digitizer support" | ||
3 | depends on PCI | ||
4 | |||
diff --git a/drivers/staging/dt3155/Makefile b/drivers/staging/dt3155/Makefile new file mode 100644 index 000000000000..136f21fdbbee --- /dev/null +++ b/drivers/staging/dt3155/Makefile | |||
@@ -0,0 +1,6 @@ | |||
1 | obj-$(CONFIG_DT3155) += dt3155.o | ||
2 | dt3155-objs := \ | ||
3 | dt3155_drv.o \ | ||
4 | dt3155_isr.o \ | ||
5 | dt3155_io.o \ | ||
6 | allocator.o | ||
diff --git a/drivers/staging/dt3155/TODO b/drivers/staging/dt3155/TODO new file mode 100644 index 000000000000..3baa3b6294cc --- /dev/null +++ b/drivers/staging/dt3155/TODO | |||
@@ -0,0 +1,10 @@ | |||
1 | TODO: | ||
2 | - fix checkpatch.pl issues | ||
3 | - remove old kernel support, it is not needed | ||
4 | - convert to proper PCI device API | ||
5 | - fix sparse warnings | ||
6 | - audit for correct subsystem interaction | ||
7 | - review review review! | ||
8 | |||
9 | Please send patches to Greg Kroah-Hartman <greg@kroah.com> | ||
10 | and Scott Smedley <ss@aao.gov.au> | ||
diff --git a/drivers/staging/dt3155/allocator.README b/drivers/staging/dt3155/allocator.README new file mode 100644 index 000000000000..05700b6c926c --- /dev/null +++ b/drivers/staging/dt3155/allocator.README | |||
@@ -0,0 +1,98 @@ | |||
1 | |||
2 | The allocator shown here exploits high memory. This document explains | ||
3 | how a user can deal with drivers uses this allocator and how a | ||
4 | programmer can link in the module. | ||
5 | |||
6 | The module is being used by my pxc and pxdrv device drivers (as well as | ||
7 | other ones), available from ftp.systemy.it/pub/develop and | ||
8 | ftp.linux.it/pub/People/Rubini | ||
9 | |||
10 | User's manual | ||
11 | ============= | ||
12 | |||
13 | |||
14 | One of the most compelling problems with any DMA-capable device is the | ||
15 | allocation of a suitable memory buffer. The "allocator" module tries | ||
16 | to deal with the problem in a clean way. The module is able to use | ||
17 | high memory (above the one used in normal operation) for DMA | ||
18 | allocation. | ||
19 | |||
20 | To prevent the kernel for using high memory, so that it remains | ||
21 | available for DMA, you should pass a command line argument to the | ||
22 | kernel. Command line arguments can be passed to Lilo, to Loadlin or | ||
23 | to whichever loader you are using (unless it's very poor in design). | ||
24 | For Lilo, either use "append=" in /etc/lilo.conf or add commandline | ||
25 | arguments to the interactive prompt. For example, I have a 32MB box | ||
26 | and reserve two megs for DMA: | ||
27 | |||
28 | In lilo.conf: | ||
29 | image = /zImage | ||
30 | label = linux | ||
31 | append = "mem=30M" | ||
32 | |||
33 | Or, interactively: | ||
34 | LILO: linux mem=30M | ||
35 | |||
36 | Once the kernel is booted with the right command-line argument, any | ||
37 | driver linked with the allocator module will be able to get | ||
38 | DMA-capable memory without much trouble (unless the various drivers | ||
39 | need more memory than available). | ||
40 | |||
41 | The module implements an alloc/free mechanism, so that it can serve | ||
42 | multiple drivers at the same time. Note however that the allocator | ||
43 | uses all of high memory and assumes to be the only piece of software | ||
44 | using such memory. | ||
45 | |||
46 | |||
47 | Programmer's manual | ||
48 | =================== | ||
49 | |||
50 | The allocator, as released, is designed to be linked to a device | ||
51 | driver. In this case, the driver must call allocator_init() before | ||
52 | using the allocator and must call allocator_cleanup() before | ||
53 | unloading. This is usually done from within init_module() and | ||
54 | cleanup_module(). If the allocator is linked to a driver, it won't be | ||
55 | possible for several drivers to allocate high DMA memory, as explained | ||
56 | above. | ||
57 | |||
58 | It is possible, on the other hand, to compile the module as a standalone | ||
59 | module, so that several modules can rely on the allocator for they DMA | ||
60 | buffers. To compile the allocator as a standalone module, do the | ||
61 | following in this directory (or provide a suitable Makefile, or edit | ||
62 | the source code): | ||
63 | |||
64 | make allocator.o CC="gcc -Dallocator_init=init_module -Dallocator_cleanup=cleanup_module -include /usr/include/linux/module.h" | ||
65 | |||
66 | The previous commandline tells to include <linux/module.h> in the | ||
67 | first place, and to rename the init and cleanup function to the ones | ||
68 | needed for module loading and unloading. Drivers using a standalone | ||
69 | allocator won't need to call allocator_init() nor allocator_cleanup(). | ||
70 | |||
71 | The allocator exports the following functions (declared in allocator.h): | ||
72 | |||
73 | unsigned long allocator_allocate_dma (unsigned long kilobytes, | ||
74 | int priority); | ||
75 | |||
76 | This function returns a physical address, over high_memory, | ||
77 | which corresponds to an area of at least "kilobytes" kilobytes. | ||
78 | The area will be owned by the module calling the function. | ||
79 | The returned address can be passed to device boards, to instruct | ||
80 | their DMA controllers, via phys_to_bus(). The address can be used | ||
81 | by C code after vremap()/ioremap(). The "priority" argument should | ||
82 | be GFP_KERNEL or GFP_ATOMIC, according to the context of the | ||
83 | caller; it is used to call kmalloc(), as the allocator must keep | ||
84 | track of any region it gives away. In case of error the function | ||
85 | returns 0, and the caller is expected to issue a -ENOMEM error. | ||
86 | |||
87 | |||
88 | void allocator_free_dma (unsigned long address); | ||
89 | |||
90 | This function is the reverse of the previous one. If a driver | ||
91 | doesn't free the DMA memory it allocated, the allocator will | ||
92 | consider such memory as busy. Note, however, that | ||
93 | allocator_cleanup() calls kfree() on every region it reclaimed, | ||
94 | so that a driver with the allocator linked in can avoid calling | ||
95 | allocator_free_dma() at unload time. | ||
96 | |||
97 | |||
98 | |||
diff --git a/drivers/staging/dt3155/allocator.c b/drivers/staging/dt3155/allocator.c new file mode 100644 index 000000000000..c74234c66895 --- /dev/null +++ b/drivers/staging/dt3155/allocator.c | |||
@@ -0,0 +1,295 @@ | |||
1 | /* | ||
2 | * allocator.c -- allocate after high_memory, if available | ||
3 | * | ||
4 | * NOTE: this is different from my previous allocator, the one that | ||
5 | * assembles pages, which revealed itself both slow and unreliable. | ||
6 | * | ||
7 | * Copyright (C) 1998 rubini@linux.it (Alessandro Rubini) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | * | ||
23 | |||
24 | -- Changes -- | ||
25 | |||
26 | Date Programmer Description of changes made | ||
27 | ------------------------------------------------------------------- | ||
28 | 02-Aug-2002 NJC allocator now steps in 1MB increments, rather | ||
29 | than doubling its size each time. | ||
30 | Also, allocator_init(u32 *) now returns | ||
31 | (in the first arg) the size of the free | ||
32 | space. This is no longer consistent with | ||
33 | using the allocator as a module, and some changes | ||
34 | may be necessary for that purpose. This was | ||
35 | designed to work with the DT3155 driver, in | ||
36 | stand alone mode only!!! | ||
37 | 26-Oct-2009 SS Port to 2.6.30 kernel. | ||
38 | */ | ||
39 | |||
40 | |||
41 | #ifndef __KERNEL__ | ||
42 | # define __KERNEL__ | ||
43 | #endif | ||
44 | #ifndef MODULE | ||
45 | # define MODULE | ||
46 | #endif | ||
47 | |||
48 | #include <linux/version.h> | ||
49 | |||
50 | #include <linux/sched.h> | ||
51 | #include <linux/kernel.h> | ||
52 | #include <linux/fs.h> | ||
53 | #include <linux/proc_fs.h> | ||
54 | #include <linux/errno.h> | ||
55 | #include <linux/types.h> | ||
56 | #include <linux/mm.h> /* PAGE_ALIGN() */ | ||
57 | #include <linux/io.h> | ||
58 | |||
59 | #include <asm/page.h> | ||
60 | |||
61 | /*#define ALL_DEBUG*/ | ||
62 | #define ALL_MSG "allocator: " | ||
63 | |||
64 | #undef PDEBUG /* undef it, just in case */ | ||
65 | #ifdef ALL_DEBUG | ||
66 | # define __static | ||
67 | # define DUMP_LIST() dump_list() | ||
68 | # ifdef __KERNEL__ | ||
69 | /* This one if debugging is on, and kernel space */ | ||
70 | # define PDEBUG(fmt, args...) printk(KERN_DEBUG ALL_MSG fmt, ## args) | ||
71 | # else | ||
72 | /* This one for user space */ | ||
73 | # define PDEBUG(fmt, args...) fprintf(stderr, fmt, ## args) | ||
74 | # endif | ||
75 | #else | ||
76 | # define PDEBUG(fmt, args...) /* not debugging: nothing */ | ||
77 | # define DUMP_LIST() | ||
78 | # define __static static | ||
79 | #endif | ||
80 | |||
81 | #undef PDEBUGG | ||
82 | #define PDEBUGG(fmt, args...) | ||
83 | /*#define PDEBUGG(fmt, args...) printk( KERN_DEBUG ALL_MSG fmt, ## args)*/ | ||
84 | |||
85 | |||
86 | int allocator_himem = 1; /* 0 = probe, pos. = megs, neg. = disable */ | ||
87 | int allocator_step = 1; /* This is the step size in MB */ | ||
88 | int allocator_probe = 1; /* This is a flag -- 1=probe, 0=don't probe */ | ||
89 | |||
90 | static unsigned long allocator_buffer; /* physical address */ | ||
91 | static unsigned long allocator_buffer_size; /* kilobytes */ | ||
92 | |||
93 | /* | ||
94 | * The allocator keeps a list of DMA areas, so multiple devices | ||
95 | * can coexist. The list is kept sorted by address | ||
96 | */ | ||
97 | |||
98 | struct allocator_struct { | ||
99 | unsigned long address; | ||
100 | unsigned long size; | ||
101 | struct allocator_struct *next; | ||
102 | }; | ||
103 | |||
104 | struct allocator_struct *allocator_list; | ||
105 | |||
106 | |||
107 | #ifdef ALL_DEBUG | ||
108 | static int dump_list(void) | ||
109 | { | ||
110 | struct allocator_struct *ptr; | ||
111 | |||
112 | PDEBUG("Current list:\n"); | ||
113 | for (ptr = allocator_list; ptr; ptr = ptr->next) | ||
114 | PDEBUG("0x%08lx (size %likB)\n", ptr->address, ptr->size>>10); | ||
115 | return 0; | ||
116 | } | ||
117 | #endif | ||
118 | |||
119 | /* ======================================================================== | ||
120 | * This function is the actual allocator. | ||
121 | * | ||
122 | * If space is available in high memory (as detected at load time), that | ||
123 | * one is returned. The return value is a physical address (i.e., it can | ||
124 | * be used straight ahead for DMA, but needs remapping for program use). | ||
125 | */ | ||
126 | |||
127 | unsigned long allocator_allocate_dma(unsigned long kilobytes, int prio) | ||
128 | { | ||
129 | struct allocator_struct *ptr = allocator_list, *newptr; | ||
130 | unsigned long bytes = kilobytes << 10; | ||
131 | |||
132 | /* check if high memory is available */ | ||
133 | if (!allocator_buffer) | ||
134 | return 0; | ||
135 | |||
136 | /* Round it to a multiple of the pagesize */ | ||
137 | bytes = PAGE_ALIGN(bytes); | ||
138 | PDEBUG("request for %li bytes\n", bytes); | ||
139 | |||
140 | while (ptr && ptr->next) { | ||
141 | if (ptr->next->address - (ptr->address + ptr->size) >= bytes) | ||
142 | break; /* enough space */ | ||
143 | ptr = ptr->next; | ||
144 | } | ||
145 | if (!ptr->next) { | ||
146 | DUMP_LIST(); | ||
147 | PDEBUG("alloc failed\n"); | ||
148 | return 0; /* end of list */ | ||
149 | } | ||
150 | newptr = kmalloc(sizeof(struct allocator_struct), prio); | ||
151 | if (!newptr) | ||
152 | return 0; | ||
153 | |||
154 | /* ok, now stick it after ptr */ | ||
155 | newptr->address = ptr->address + ptr->size; | ||
156 | newptr->size = bytes; | ||
157 | newptr->next = ptr->next; | ||
158 | ptr->next = newptr; | ||
159 | |||
160 | DUMP_LIST(); | ||
161 | PDEBUG("returning 0x%08lx\n", newptr->address); | ||
162 | return newptr->address; | ||
163 | } | ||
164 | |||
165 | int allocator_free_dma(unsigned long address) | ||
166 | { | ||
167 | struct allocator_struct *ptr = allocator_list, *prev; | ||
168 | |||
169 | while (ptr && ptr->next) { | ||
170 | if (ptr->next->address == address) | ||
171 | break; | ||
172 | ptr = ptr->next; | ||
173 | } | ||
174 | /* the one being freed is ptr->next */ | ||
175 | prev = ptr; ptr = ptr->next; | ||
176 | |||
177 | if (!ptr) { | ||
178 | printk(KERN_ERR ALL_MSG | ||
179 | "free_dma(0x%08lx) but add. not allocated\n", | ||
180 | ptr->address); | ||
181 | return -EINVAL; | ||
182 | } | ||
183 | PDEBUGG("freeing: %08lx (%li) next %08lx\n", ptr->address, ptr->size, | ||
184 | ptr->next->address); | ||
185 | prev->next = ptr->next; | ||
186 | kfree(ptr); | ||
187 | |||
188 | /* dump_list(); */ | ||
189 | return 0; | ||
190 | } | ||
191 | |||
192 | /* ======================================================================== | ||
193 | * Init and cleanup | ||
194 | * | ||
195 | * On cleanup everything is released. If the list is not empty, that a | ||
196 | * problem of our clients | ||
197 | */ | ||
198 | int allocator_init(u32 *allocator_max) | ||
199 | { | ||
200 | /* check how much free memory is there */ | ||
201 | void *remapped; | ||
202 | unsigned long max; | ||
203 | unsigned long trial_size = allocator_himem<<20; | ||
204 | unsigned long last_trial = 0; | ||
205 | unsigned long step = allocator_step<<20; | ||
206 | unsigned long i = 0; | ||
207 | struct allocator_struct *head, *tail; | ||
208 | char test_string[] = "0123456789abcde"; /* 16 bytes */ | ||
209 | |||
210 | PDEBUGG("himem = %i\n", allocator_himem); | ||
211 | if (allocator_himem < 0) /* don't even try */ | ||
212 | return -EINVAL; | ||
213 | |||
214 | if (!trial_size) | ||
215 | trial_size = 1<<20; /* not specified: try one meg */ | ||
216 | |||
217 | while (1) { | ||
218 | remapped = ioremap(__pa(high_memory), trial_size); | ||
219 | if (!remapped) { | ||
220 | PDEBUGG("%li megs failed!\n", trial_size>>20); | ||
221 | break; | ||
222 | } | ||
223 | PDEBUGG("Trying %li megs (at %p, %p)\n", trial_size>>20, | ||
224 | (void *)__pa(high_memory), remapped); | ||
225 | for (i = last_trial; i < trial_size; i += 16) { | ||
226 | strcpy((char *)(remapped)+i, test_string); | ||
227 | if (strcmp((char *)(remapped)+i, test_string)) | ||
228 | break; | ||
229 | } | ||
230 | iounmap((void *)remapped); | ||
231 | schedule(); | ||
232 | last_trial = trial_size; | ||
233 | if (i == trial_size) | ||
234 | trial_size += step; /* increment, if all went well */ | ||
235 | else { | ||
236 | PDEBUGG("%li megs copy test failed!\n", trial_size>>20); | ||
237 | break; | ||
238 | } | ||
239 | if (!allocator_probe) | ||
240 | break; | ||
241 | } | ||
242 | PDEBUG("%li megs (%li k, %li b)\n", i>>20, i>>10, i); | ||
243 | allocator_buffer_size = i>>10; /* kilobytes */ | ||
244 | allocator_buffer = __pa(high_memory); | ||
245 | if (!allocator_buffer_size) { | ||
246 | printk(KERN_WARNING ALL_MSG "no free high memory to use\n"); | ||
247 | return -ENOMEM; | ||
248 | } | ||
249 | |||
250 | /* | ||
251 | * to simplify things, always have two cells in the list: | ||
252 | * the first and the last. This avoids some conditionals and | ||
253 | * extra code when allocating and deallocating: we only play | ||
254 | * in the middle of the list | ||
255 | */ | ||
256 | head = kmalloc(sizeof(struct allocator_struct), GFP_KERNEL); | ||
257 | if (!head) | ||
258 | return -ENOMEM; | ||
259 | tail = kmalloc(sizeof(struct allocator_struct), GFP_KERNEL); | ||
260 | if (!tail) { | ||
261 | kfree(head); | ||
262 | return -ENOMEM; | ||
263 | } | ||
264 | |||
265 | max = allocator_buffer_size<<10; | ||
266 | |||
267 | head->size = tail->size = 0; | ||
268 | head->address = allocator_buffer; | ||
269 | tail->address = allocator_buffer + max; | ||
270 | head->next = tail; | ||
271 | tail->next = NULL; | ||
272 | allocator_list = head; | ||
273 | |||
274 | /* Back to the user code, in KB */ | ||
275 | *allocator_max = allocator_buffer_size; | ||
276 | |||
277 | return 0; /* ok, ready */ | ||
278 | } | ||
279 | |||
280 | void allocator_cleanup(void) | ||
281 | { | ||
282 | struct allocator_struct *ptr, *next; | ||
283 | |||
284 | for (ptr = allocator_list; ptr; ptr = next) { | ||
285 | next = ptr->next; | ||
286 | PDEBUG("freeing list: 0x%08lx\n", ptr->address); | ||
287 | kfree(ptr); | ||
288 | } | ||
289 | |||
290 | allocator_buffer = 0; | ||
291 | allocator_buffer_size = 0; | ||
292 | allocator_list = NULL; | ||
293 | } | ||
294 | |||
295 | |||
diff --git a/drivers/staging/dt3155/allocator.h b/drivers/staging/dt3155/allocator.h new file mode 100644 index 000000000000..bdf3268ca52d --- /dev/null +++ b/drivers/staging/dt3155/allocator.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * allocator.h -- prototypes for allocating high memory | ||
3 | * | ||
4 | * NOTE: this is different from my previous allocator, the one that | ||
5 | * assembles pages, which revealed itself both slow and unreliable. | ||
6 | * | ||
7 | * Copyright (C) 1998 rubini@linux.it (Alessandro Rubini) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | void allocator_free_dma(unsigned long address); | ||
26 | unsigned long allocator_allocate_dma(unsigned long kilobytes, int priority); | ||
27 | int allocator_init(u32 *); | ||
28 | void allocator_cleanup(void); | ||
diff --git a/drivers/staging/dt3155/dt3155.h b/drivers/staging/dt3155/dt3155.h new file mode 100644 index 000000000000..1bf786364eec --- /dev/null +++ b/drivers/staging/dt3155/dt3155.h | |||
@@ -0,0 +1,171 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Jason Lapenta, Scott Smedley | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | |||
23 | -- Changes -- | ||
24 | |||
25 | Date Programmer Description of changes made | ||
26 | ------------------------------------------------------------------- | ||
27 | 03-Jul-2000 JML n/a | ||
28 | 10-Oct-2001 SS port to 2.4 kernel. | ||
29 | 24-Jul-2002 SS remove unused code & added GPL licence. | ||
30 | 05-Aug-2005 SS port to 2.6 kernel; make CCIR mode default. | ||
31 | |||
32 | */ | ||
33 | |||
34 | #ifndef _DT3155_INC | ||
35 | #define _DT3155_INC | ||
36 | |||
37 | #ifdef __KERNEL__ | ||
38 | #include <linux/types.h> | ||
39 | #include <linux/time.h> /* struct timeval */ | ||
40 | #else | ||
41 | #include <sys/ioctl.h> | ||
42 | #include <sys/param.h> | ||
43 | #include <sys/time.h> | ||
44 | #include <unistd.h> | ||
45 | #endif | ||
46 | |||
47 | |||
48 | #define TRUE 1 | ||
49 | #define FALSE 0 | ||
50 | |||
51 | /* Uncomment this for 50Hz CCIR */ | ||
52 | #define CCIR 1 | ||
53 | |||
54 | /* Can be 1 or 2 */ | ||
55 | #define MAXBOARDS 1 | ||
56 | |||
57 | #define BOARD_MAX_BUFFS 3 | ||
58 | #define MAXBUFFERS (BOARD_MAX_BUFFS*MAXBOARDS) | ||
59 | |||
60 | #define PCI_PAGE_SIZE (1 << 12) | ||
61 | |||
62 | #ifdef CCIR | ||
63 | #define DT3155_MAX_ROWS 576 | ||
64 | #define DT3155_MAX_COLS 768 | ||
65 | #define FORMAT50HZ TRUE | ||
66 | #else | ||
67 | #define DT3155_MAX_ROWS 480 | ||
68 | #define DT3155_MAX_COLS 640 | ||
69 | #define FORMAT50HZ FALSE | ||
70 | #endif | ||
71 | |||
72 | /* Configuration structure */ | ||
73 | struct dt3155_config_s { | ||
74 | u32 acq_mode; | ||
75 | u32 cols, rows; | ||
76 | u32 continuous; | ||
77 | }; | ||
78 | |||
79 | |||
80 | /* hold data for each frame */ | ||
81 | typedef struct { | ||
82 | u32 addr; /* address of the buffer with the frame */ | ||
83 | u32 tag; /* unique number for the frame */ | ||
84 | struct timeval time; /* time that capture took place */ | ||
85 | } frame_info_t; | ||
86 | |||
87 | /* | ||
88 | * Structure for interrupt and buffer handling. | ||
89 | * This is the setup for 1 card | ||
90 | */ | ||
91 | struct dt3155_fbuffer_s { | ||
92 | int nbuffers; | ||
93 | |||
94 | frame_info_t frame_info[BOARD_MAX_BUFFS]; | ||
95 | |||
96 | int empty_buffers[BOARD_MAX_BUFFS]; /* indexes empty frames */ | ||
97 | int empty_len; /* Number of empty buffers */ | ||
98 | /* Zero means empty */ | ||
99 | |||
100 | int active_buf; /* Where data is currently dma'ing */ | ||
101 | int locked_buf; /* Buffers used by user */ | ||
102 | |||
103 | int ready_que[BOARD_MAX_BUFFS]; | ||
104 | u32 ready_head; /* The most recent buffer located here */ | ||
105 | u32 ready_len; /* The number of ready buffers */ | ||
106 | |||
107 | int even_happened; | ||
108 | int even_stopped; | ||
109 | |||
110 | int stop_acquire; /* Flag to stop interrupts */ | ||
111 | u32 frame_count; /* Counter for frames acquired by this card */ | ||
112 | }; | ||
113 | |||
114 | |||
115 | |||
116 | #define DT3155_MODE_FRAME 1 | ||
117 | #define DT3155_MODE_FIELD 2 | ||
118 | |||
119 | #define DT3155_SNAP 1 | ||
120 | #define DT3155_ACQ 2 | ||
121 | |||
122 | /* There is one status structure for each card. */ | ||
123 | typedef struct dt3155_status_s { | ||
124 | int fixed_mode; /* if 1, we are in fixed frame mode */ | ||
125 | u32 reg_addr; /* Register address for a single card */ | ||
126 | u32 mem_addr; /* Buffer start addr for this card */ | ||
127 | u32 mem_size; /* This is the amount of mem available */ | ||
128 | u32 irq; /* this card's irq */ | ||
129 | struct dt3155_config_s config; /* configuration struct */ | ||
130 | struct dt3155_fbuffer_s fbuffer; /* frame buffer state struct */ | ||
131 | u32 state; /* this card's state */ | ||
132 | u32 device_installed; /* Flag if installed. 1=installed */ | ||
133 | } dt3155_status_t; | ||
134 | |||
135 | /* Reference to global status structure */ | ||
136 | extern struct dt3155_status_s dt3155_status[MAXBOARDS]; | ||
137 | |||
138 | #define DT3155_STATE_IDLE 0x00 | ||
139 | #define DT3155_STATE_FRAME 0x01 | ||
140 | #define DT3155_STATE_FLD 0x02 | ||
141 | #define DT3155_STATE_STOP 0x100 | ||
142 | #define DT3155_STATE_ERROR 0x200 | ||
143 | #define DT3155_STATE_MODE 0x0ff | ||
144 | |||
145 | #define DT3155_IOC_MAGIC '!' | ||
146 | |||
147 | #define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config_s) | ||
148 | #define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status_s) | ||
149 | #define DT3155_STOP _IO(DT3155_IOC_MAGIC, 3) | ||
150 | #define DT3155_START _IO(DT3155_IOC_MAGIC, 4) | ||
151 | #define DT3155_FLUSH _IO(DT3155_IOC_MAGIC, 5) | ||
152 | #define DT3155_IOC_MAXNR 5 | ||
153 | |||
154 | /* Error codes */ | ||
155 | |||
156 | #define DT_ERR_NO_BUFFERS 0x10000 /* not used but it might be one day */ | ||
157 | #define DT_ERR_CORRUPT 0x20000 | ||
158 | #define DT_ERR_OVERRUN 0x30000 | ||
159 | #define DT_ERR_I2C_TIMEOUT 0x40000 | ||
160 | #define DT_ERR_MASK 0xff0000/* not used but it might be one day */ | ||
161 | |||
162 | /* User code will probably want to declare one of these for each card */ | ||
163 | typedef struct dt3155_read_s { | ||
164 | u32 offset; | ||
165 | u32 frame_seq; | ||
166 | u32 state; | ||
167 | |||
168 | frame_info_t frame_info; | ||
169 | } dt3155_read_t; | ||
170 | |||
171 | #endif /* _DT3155_inc */ | ||
diff --git a/drivers/staging/dt3155/dt3155.sysvinit b/drivers/staging/dt3155/dt3155.sysvinit new file mode 100644 index 000000000000..92ec0939cb7a --- /dev/null +++ b/drivers/staging/dt3155/dt3155.sysvinit | |||
@@ -0,0 +1,60 @@ | |||
1 | #! /bin/sh | ||
2 | # | ||
3 | # Module load/unload script for use with SysV-style /etc/init.d/ systems. | ||
4 | # On a Debian system, copy this to /etc/init.d/dt3155 and then run | ||
5 | # /usr/sbin/update-rc.d dt3155 defaults 55 | ||
6 | # to create the appropriate /etc/rc?.d/[SK]55dt3155 start/stop links. | ||
7 | # (The "55" is arbitrary but is what I use to load this rather late.) | ||
8 | # | ||
9 | # Andy Dougherty Feb 22 2000 doughera@lafayette.edu | ||
10 | # Dept. of Physics | ||
11 | # Lafayette College, Easton PA 18042 | ||
12 | # | ||
13 | |||
14 | PATH=/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin | ||
15 | |||
16 | # Edit to point to your local copy. | ||
17 | FILE=/usr/local/lib/modules/dt3155/dt3155.o | ||
18 | NAME="dt3155" | ||
19 | DESC="dt3155 Frame Grabber module" | ||
20 | DEV="dt3155" | ||
21 | |||
22 | if test ! -f $FILE; then | ||
23 | echo "Unable to locate $FILE" | ||
24 | exit 0 | ||
25 | fi | ||
26 | |||
27 | set -e | ||
28 | |||
29 | case "$1" in | ||
30 | start) | ||
31 | echo -n "Loading $DESC " | ||
32 | if /sbin/insmod -v -f $FILE; then | ||
33 | major=`grep $DEV /proc/devices | awk "{print \\$1}"` | ||
34 | rm -f /dev/dt3155? | ||
35 | mknod /dev/dt3155a c $major 0 | ||
36 | mknod /dev/dt3155b c $major 1 | ||
37 | chmod go+rw /dev/dt3155? | ||
38 | echo | ||
39 | else | ||
40 | echo "$FILE not loaded." | ||
41 | fi | ||
42 | ;; | ||
43 | stop) | ||
44 | echo -n "Unloading $DESC: " | ||
45 | if /sbin/rmmod $NAME ; then | ||
46 | echo | ||
47 | else | ||
48 | echo "$DEV not removed" | ||
49 | exit 0 | ||
50 | fi | ||
51 | rm -f /dev/dt3155? | ||
52 | ;; | ||
53 | *) | ||
54 | echo "Usage: /etc/init.d/$NAME {start|stop}" | ||
55 | exit 1 | ||
56 | ;; | ||
57 | esac | ||
58 | |||
59 | exit 0 | ||
60 | |||
diff --git a/drivers/staging/dt3155/dt3155_drv.c b/drivers/staging/dt3155/dt3155_drv.c new file mode 100644 index 000000000000..a67c622869d2 --- /dev/null +++ b/drivers/staging/dt3155/dt3155_drv.c | |||
@@ -0,0 +1,1095 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Jason Lapenta, Scott Smedley, Greg Sharp | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | |||
23 | -- Changes -- | ||
24 | |||
25 | Date Programmer Description of changes made | ||
26 | ------------------------------------------------------------------- | ||
27 | 03-Jul-2000 JML n/a | ||
28 | 10-Oct-2001 SS port to 2.4 kernel | ||
29 | 02-Apr-2002 SS Mods to use allocator as a standalone module; | ||
30 | Merged John Roll's changes (john@cfa.harvard.edu) | ||
31 | to make work with multiple boards. | ||
32 | 02-Jul-2002 SS Merged James Rose's chages (rosejr@purdue.edu) to: | ||
33 | * fix successive interrupt-driven captures | ||
34 | * add select/poll support. | ||
35 | 10-Jul-2002 GCS Add error check when ndevices > MAXBOARDS. | ||
36 | 02-Aug-2002 GCS Fix field mode so that odd (lower) field is stored | ||
37 | in lower half of buffer. | ||
38 | 05-Aug-2005 SS port to 2.6 kernel. | ||
39 | 26-Oct-2009 SS port to 2.6.30 kernel. | ||
40 | |||
41 | -- Notes -- | ||
42 | |||
43 | ** appended "mem=124" in lilo.conf to allow for 4megs free on my 128meg system. | ||
44 | * using allocator.c and allocator.h from o'reilly book (alessandro rubini) | ||
45 | ftp://ftp.systemy.it/pub/develop (see README.allocator) | ||
46 | |||
47 | + might want to get rid of MAXboards for allocating initial buffer. | ||
48 | confusing and not necessary | ||
49 | |||
50 | + in cleanup_module the MOD_IN_USE looks like it is check after it should | ||
51 | |||
52 | * GFP_DMA should not be set with a PCI system (pg 291) | ||
53 | |||
54 | - NJC why are only two buffers allowed? (see isr, approx line 358) | ||
55 | |||
56 | */ | ||
57 | |||
58 | extern void printques(int); | ||
59 | |||
60 | #ifdef MODULE | ||
61 | #include <linux/module.h> | ||
62 | #include <linux/interrupt.h> | ||
63 | |||
64 | |||
65 | MODULE_LICENSE("GPL"); | ||
66 | |||
67 | #endif | ||
68 | |||
69 | #ifndef CONFIG_PCI | ||
70 | #error "DT3155 : Kernel PCI support not enabled (DT3155 drive requires PCI)" | ||
71 | #endif | ||
72 | |||
73 | #include <linux/pci.h> | ||
74 | #include <linux/types.h> | ||
75 | #include <linux/poll.h> | ||
76 | #include <linux/sched.h> | ||
77 | |||
78 | #include <asm/io.h> | ||
79 | #include <asm/uaccess.h> | ||
80 | |||
81 | #include "dt3155.h" | ||
82 | #include "dt3155_drv.h" | ||
83 | #include "dt3155_isr.h" | ||
84 | #include "dt3155_io.h" | ||
85 | #include "allocator.h" | ||
86 | |||
87 | /* Error variable. Zero means no error. */ | ||
88 | int dt3155_errno = 0; | ||
89 | |||
90 | #ifndef PCI_DEVICE_ID_INTEL_7116 | ||
91 | #define PCI_DEVICE_ID_INTEL_7116 0x1223 | ||
92 | #endif | ||
93 | |||
94 | #define DT3155_VENDORID PCI_VENDOR_ID_INTEL | ||
95 | #define DT3155_DEVICEID PCI_DEVICE_ID_INTEL_7116 | ||
96 | #define MAXPCI 16 | ||
97 | |||
98 | #ifdef DT_DEBUG | ||
99 | #define DT_3155_DEBUG_MSG(x,y) printk(x,y) | ||
100 | #else | ||
101 | #define DT_3155_DEBUG_MSG(x,y) | ||
102 | #endif | ||
103 | |||
104 | /* wait queue for interrupts */ | ||
105 | wait_queue_head_t dt3155_read_wait_queue[ MAXBOARDS ]; | ||
106 | |||
107 | #define DT_3155_SUCCESS 0 | ||
108 | #define DT_3155_FAILURE -EIO | ||
109 | |||
110 | /* set to dynamicaly allocate, but it is tunable: */ | ||
111 | /* insmod DT_3155 dt3155 dt3155_major=XX */ | ||
112 | int dt3155_major = 0; | ||
113 | |||
114 | /* The minor numbers are 0 and 1 ... they are not tunable. | ||
115 | * They are used as the indices for the structure vectors, | ||
116 | * and register address vectors | ||
117 | */ | ||
118 | |||
119 | /* Global structures and variables */ | ||
120 | |||
121 | /* Status of each device */ | ||
122 | struct dt3155_status_s dt3155_status[ MAXBOARDS ]; | ||
123 | |||
124 | /* kernel logical address of the board */ | ||
125 | u8 *dt3155_lbase[ MAXBOARDS ] = { NULL | ||
126 | #if MAXBOARDS == 2 | ||
127 | , NULL | ||
128 | #endif | ||
129 | }; | ||
130 | /* DT3155 registers */ | ||
131 | u8 *dt3155_bbase = NULL; /* kernel logical address of the * | ||
132 | * buffer region */ | ||
133 | u32 dt3155_dev_open[ MAXBOARDS ] = {0 | ||
134 | #if MAXBOARDS == 2 | ||
135 | , 0 | ||
136 | #endif | ||
137 | }; | ||
138 | |||
139 | u32 ndevices = 0; | ||
140 | u32 unique_tag = 0;; | ||
141 | |||
142 | |||
143 | /* | ||
144 | * Stops interrupt generation right away and resets the status | ||
145 | * to idle. I don't know why this works and the other way doesn't. | ||
146 | * (James Rose) | ||
147 | */ | ||
148 | static void quick_stop (int minor) | ||
149 | { | ||
150 | // TODO: scott was here | ||
151 | #if 1 | ||
152 | ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); | ||
153 | /* disable interrupts */ | ||
154 | int_csr_r.fld.FLD_END_EVE_EN = 0; | ||
155 | int_csr_r.fld.FLD_END_ODD_EN = 0; | ||
156 | WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); | ||
157 | |||
158 | dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); | ||
159 | /* mark the system stopped: */ | ||
160 | dt3155_status[ minor ].state |= DT3155_STATE_IDLE; | ||
161 | dt3155_fbuffer[ minor ]->stop_acquire = 0; | ||
162 | dt3155_fbuffer[ minor ]->even_stopped = 0; | ||
163 | #else | ||
164 | dt3155_status[minor].state |= DT3155_STATE_STOP; | ||
165 | dt3155_status[minor].fbuffer.stop_acquire = 1; | ||
166 | #endif | ||
167 | |||
168 | } | ||
169 | |||
170 | |||
171 | /***************************************************** | ||
172 | * dt3155_isr() Interrupt service routien | ||
173 | * | ||
174 | * - looks like this isr supports IRQ sharing (or could) JML | ||
175 | * - Assumes irq's are disabled, via SA_INTERRUPT flag | ||
176 | * being set in request_irq() call from init_module() | ||
177 | *****************************************************/ | ||
178 | static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) | ||
179 | { | ||
180 | int minor = -1; | ||
181 | int index; | ||
182 | unsigned long flags; | ||
183 | u32 buffer_addr; | ||
184 | |||
185 | /* find out who issued the interrupt */ | ||
186 | for ( index = 0; index < ndevices; index++ ) { | ||
187 | if( dev_id == (void*) &dt3155_status[ index ]) | ||
188 | { | ||
189 | minor = index; | ||
190 | break; | ||
191 | } | ||
192 | } | ||
193 | |||
194 | /* hopefully we should not get here */ | ||
195 | if ( minor < 0 || minor >= MAXBOARDS ) { | ||
196 | printk(KERN_ERR "dt3155_isr called with invalid dev_id\n"); | ||
197 | return; | ||
198 | } | ||
199 | |||
200 | /* Check for corruption and set a flag if so */ | ||
201 | ReadMReg( (dt3155_lbase[ minor ] + CSR1), csr1_r.reg ); | ||
202 | |||
203 | if ( (csr1_r.fld.FLD_CRPT_EVE) || (csr1_r.fld.FLD_CRPT_ODD) ) | ||
204 | { | ||
205 | /* TODO: this should probably stop acquisition */ | ||
206 | /* and set some flags so that dt3155_read */ | ||
207 | /* returns an error next time it is called */ | ||
208 | dt3155_errno = DT_ERR_CORRUPT; | ||
209 | printk("dt3155: corrupt field\n"); | ||
210 | return; | ||
211 | } | ||
212 | |||
213 | ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); | ||
214 | |||
215 | /* Handle the even field ... */ | ||
216 | if (int_csr_r.fld.FLD_END_EVE) | ||
217 | { | ||
218 | if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == | ||
219 | DT3155_STATE_FLD ) | ||
220 | { | ||
221 | dt3155_fbuffer[ minor ]->frame_count++; | ||
222 | } | ||
223 | |||
224 | ReadI2C(dt3155_lbase[ minor ], EVEN_CSR, &i2c_even_csr.reg); | ||
225 | |||
226 | /* Clear the interrupt? */ | ||
227 | int_csr_r.fld.FLD_END_EVE = 1; | ||
228 | |||
229 | /* disable the interrupt if last field */ | ||
230 | if (dt3155_fbuffer[ minor ]->stop_acquire) | ||
231 | { | ||
232 | printk("dt3155: even stopped.\n"); | ||
233 | dt3155_fbuffer[ minor ]->even_stopped = 1; | ||
234 | if (i2c_even_csr.fld.SNGL_EVE) | ||
235 | { | ||
236 | int_csr_r.fld.FLD_END_EVE_EN = 0; | ||
237 | } | ||
238 | else | ||
239 | { | ||
240 | i2c_even_csr.fld.SNGL_EVE = 1; | ||
241 | } | ||
242 | } | ||
243 | |||
244 | WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); | ||
245 | |||
246 | /* Set up next DMA if we are doing FIELDS */ | ||
247 | if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE ) == | ||
248 | DT3155_STATE_FLD) | ||
249 | { | ||
250 | /* GCS (Aug 2, 2002) -- In field mode, dma the odd field | ||
251 | into the lower half of the buffer */ | ||
252 | const u32 stride = dt3155_status[ minor ].config.cols; | ||
253 | buffer_addr = dt3155_fbuffer[ minor ]-> | ||
254 | frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr | ||
255 | + (DT3155_MAX_ROWS / 2) * stride; | ||
256 | local_save_flags(flags); | ||
257 | local_irq_disable(); | ||
258 | wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); | ||
259 | |||
260 | /* Set up the DMA address for the next field */ | ||
261 | local_irq_restore(flags); | ||
262 | WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr); | ||
263 | } | ||
264 | |||
265 | /* Check for errors. */ | ||
266 | i2c_even_csr.fld.DONE_EVE = 1; | ||
267 | if ( i2c_even_csr.fld.ERROR_EVE ) | ||
268 | dt3155_errno = DT_ERR_OVERRUN; | ||
269 | |||
270 | WriteI2C( dt3155_lbase[ minor ], EVEN_CSR, i2c_even_csr.reg ); | ||
271 | |||
272 | /* Note that we actually saw an even field meaning */ | ||
273 | /* that subsequent odd field complete the frame */ | ||
274 | dt3155_fbuffer[ minor ]->even_happened = 1; | ||
275 | |||
276 | /* recording the time that the even field finished, this should be */ | ||
277 | /* about time in the middle of the frame */ | ||
278 | do_gettimeofday( &(dt3155_fbuffer[ minor ]-> | ||
279 | frame_info[ dt3155_fbuffer[ minor ]-> | ||
280 | active_buf ].time) ); | ||
281 | return; | ||
282 | } | ||
283 | |||
284 | /* ... now handle the odd field */ | ||
285 | if ( int_csr_r.fld.FLD_END_ODD ) | ||
286 | { | ||
287 | ReadI2C( dt3155_lbase[ minor ], ODD_CSR, &i2c_odd_csr.reg ); | ||
288 | |||
289 | /* Clear the interrupt? */ | ||
290 | int_csr_r.fld.FLD_END_ODD = 1; | ||
291 | |||
292 | if (dt3155_fbuffer[ minor ]->even_happened || | ||
293 | (dt3155_status[ minor ].state & DT3155_STATE_MODE) == | ||
294 | DT3155_STATE_FLD) | ||
295 | { | ||
296 | dt3155_fbuffer[ minor ]->frame_count++; | ||
297 | } | ||
298 | |||
299 | if ( dt3155_fbuffer[ minor ]->stop_acquire && | ||
300 | dt3155_fbuffer[ minor ]->even_stopped ) | ||
301 | { | ||
302 | printk(KERN_DEBUG "dt3155: stopping odd..\n"); | ||
303 | if ( i2c_odd_csr.fld.SNGL_ODD ) | ||
304 | { | ||
305 | /* disable interrupts */ | ||
306 | int_csr_r.fld.FLD_END_ODD_EN = 0; | ||
307 | dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); | ||
308 | |||
309 | /* mark the system stopped: */ | ||
310 | dt3155_status[ minor ].state |= DT3155_STATE_IDLE; | ||
311 | dt3155_fbuffer[ minor ]->stop_acquire = 0; | ||
312 | dt3155_fbuffer[ minor ]->even_stopped = 0; | ||
313 | |||
314 | printk(KERN_DEBUG "dt3155: state is now %x\n", | ||
315 | dt3155_status[minor].state); | ||
316 | } | ||
317 | else | ||
318 | { | ||
319 | i2c_odd_csr.fld.SNGL_ODD = 1; | ||
320 | } | ||
321 | } | ||
322 | |||
323 | WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); | ||
324 | |||
325 | /* if the odd field has been acquired, then */ | ||
326 | /* change the next dma location for both fields */ | ||
327 | /* and wake up the process if sleeping */ | ||
328 | if ( dt3155_fbuffer[ minor ]->even_happened || | ||
329 | (dt3155_status[ minor ].state & DT3155_STATE_MODE) == | ||
330 | DT3155_STATE_FLD ) | ||
331 | { | ||
332 | |||
333 | local_save_flags(flags); | ||
334 | local_irq_disable(); | ||
335 | |||
336 | #ifdef DEBUG_QUES_B | ||
337 | printques( minor ); | ||
338 | #endif | ||
339 | if ( dt3155_fbuffer[ minor ]->nbuffers > 2 ) | ||
340 | { | ||
341 | if ( !are_empty_buffers( minor ) ) | ||
342 | { | ||
343 | /* The number of active + locked buffers is | ||
344 | * at most 2, and since there are none empty, there | ||
345 | * must be at least nbuffers-2 ready buffers. | ||
346 | * This is where we 'drop frames', oldest first. */ | ||
347 | push_empty( pop_ready( minor ), minor ); | ||
348 | } | ||
349 | |||
350 | /* The ready_que can't be full, since we know | ||
351 | * there is one active buffer right now, so it's safe | ||
352 | * to push the active buf on the ready_que. */ | ||
353 | push_ready( minor, dt3155_fbuffer[ minor ]->active_buf ); | ||
354 | /* There's at least 1 empty -- make it active */ | ||
355 | dt3155_fbuffer[ minor ]->active_buf = pop_empty( minor ); | ||
356 | dt3155_fbuffer[ minor ]-> | ||
357 | frame_info[ dt3155_fbuffer[ minor ]-> | ||
358 | active_buf ].tag = ++unique_tag; | ||
359 | } | ||
360 | else /* nbuffers == 2, special case */ | ||
361 | { /* There is 1 active buffer. | ||
362 | * If there is a locked buffer, keep the active buffer | ||
363 | * the same -- that means we drop a frame. | ||
364 | */ | ||
365 | if ( dt3155_fbuffer[ minor ]->locked_buf < 0 ) | ||
366 | { | ||
367 | push_ready( minor, | ||
368 | dt3155_fbuffer[ minor ]->active_buf ); | ||
369 | if (are_empty_buffers( minor ) ) | ||
370 | { | ||
371 | dt3155_fbuffer[ minor ]->active_buf = | ||
372 | pop_empty( minor ); | ||
373 | } | ||
374 | else | ||
375 | { /* no empty or locked buffers, so use a readybuf */ | ||
376 | dt3155_fbuffer[ minor ]->active_buf = | ||
377 | pop_ready( minor ); | ||
378 | } | ||
379 | } | ||
380 | } | ||
381 | |||
382 | #ifdef DEBUG_QUES_B | ||
383 | printques( minor ); | ||
384 | #endif | ||
385 | |||
386 | dt3155_fbuffer[ minor ]->even_happened = 0; | ||
387 | |||
388 | wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); | ||
389 | |||
390 | local_irq_restore(flags); | ||
391 | } | ||
392 | |||
393 | |||
394 | /* Set up the DMA address for the next frame/field */ | ||
395 | buffer_addr = dt3155_fbuffer[ minor ]-> | ||
396 | frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr; | ||
397 | if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == | ||
398 | DT3155_STATE_FLD ) | ||
399 | { | ||
400 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); | ||
401 | } | ||
402 | else | ||
403 | { | ||
404 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); | ||
405 | |||
406 | WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr | ||
407 | + dt3155_status[ minor ].config.cols); | ||
408 | } | ||
409 | |||
410 | /* Do error checking */ | ||
411 | i2c_odd_csr.fld.DONE_ODD = 1; | ||
412 | if ( i2c_odd_csr.fld.ERROR_ODD ) | ||
413 | dt3155_errno = DT_ERR_OVERRUN; | ||
414 | |||
415 | WriteI2C(dt3155_lbase[ minor ], ODD_CSR, i2c_odd_csr.reg ); | ||
416 | |||
417 | return; | ||
418 | } | ||
419 | /* If we get here, the Odd Field wasn't it either... */ | ||
420 | printk( "neither even nor odd. shared perhaps?\n"); | ||
421 | } | ||
422 | |||
423 | /***************************************************** | ||
424 | * init_isr(int minor) | ||
425 | * turns on interupt generation for the card | ||
426 | * designated by "minor". | ||
427 | * It is called *only* from inside ioctl(). | ||
428 | *****************************************************/ | ||
429 | static void dt3155_init_isr(int minor) | ||
430 | { | ||
431 | const u32 stride = dt3155_status[ minor ].config.cols; | ||
432 | |||
433 | switch (dt3155_status[ minor ].state & DT3155_STATE_MODE) | ||
434 | { | ||
435 | case DT3155_STATE_FLD: | ||
436 | { | ||
437 | even_dma_start_r = dt3155_status[ minor ]. | ||
438 | fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; | ||
439 | even_dma_stride_r = 0; | ||
440 | odd_dma_stride_r = 0; | ||
441 | |||
442 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), | ||
443 | even_dma_start_r); | ||
444 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), | ||
445 | even_dma_stride_r); | ||
446 | WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), | ||
447 | odd_dma_stride_r); | ||
448 | break; | ||
449 | } | ||
450 | |||
451 | case DT3155_STATE_FRAME: | ||
452 | default: | ||
453 | { | ||
454 | even_dma_start_r = dt3155_status[ minor ]. | ||
455 | fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; | ||
456 | odd_dma_start_r = even_dma_start_r + stride; | ||
457 | even_dma_stride_r = stride; | ||
458 | odd_dma_stride_r = stride; | ||
459 | |||
460 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), | ||
461 | even_dma_start_r); | ||
462 | WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), | ||
463 | odd_dma_start_r); | ||
464 | WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), | ||
465 | even_dma_stride_r); | ||
466 | WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), | ||
467 | odd_dma_stride_r); | ||
468 | break; | ||
469 | } | ||
470 | } | ||
471 | |||
472 | /* 50/60 Hz should be set before this point but let's make sure it is */ | ||
473 | /* right anyway */ | ||
474 | |||
475 | ReadI2C(dt3155_lbase[ minor ], CONFIG, &i2c_csr2.reg); | ||
476 | i2c_csr2.fld.HZ50 = FORMAT50HZ; | ||
477 | WriteI2C(dt3155_lbase[ minor ], CONFIG, i2c_config.reg); | ||
478 | |||
479 | /* enable busmaster chip, clear flags */ | ||
480 | |||
481 | /* | ||
482 | * TODO: | ||
483 | * shouldn't we be concered with continuous values of | ||
484 | * DT3155_SNAP & DT3155_ACQ here? (SS) | ||
485 | */ | ||
486 | |||
487 | csr1_r.reg = 0; | ||
488 | csr1_r.fld.CAP_CONT_EVE = 1; /* use continuous capture bits to */ | ||
489 | csr1_r.fld.CAP_CONT_ODD = 1; /* enable */ | ||
490 | csr1_r.fld.FLD_DN_EVE = 1; /* writing a 1 clears flags */ | ||
491 | csr1_r.fld.FLD_DN_ODD = 1; | ||
492 | csr1_r.fld.SRST = 1; /* reset - must be 1 */ | ||
493 | csr1_r.fld.FIFO_EN = 1; /* fifo control - must be 1 */ | ||
494 | csr1_r.fld.FLD_CRPT_EVE = 1; /* writing a 1 clears flags */ | ||
495 | csr1_r.fld.FLD_CRPT_ODD = 1; | ||
496 | |||
497 | WriteMReg((dt3155_lbase[ minor ] + CSR1),csr1_r.reg); | ||
498 | |||
499 | /* Enable interrupts at the end of each field */ | ||
500 | |||
501 | int_csr_r.reg = 0; | ||
502 | int_csr_r.fld.FLD_END_EVE_EN = 1; | ||
503 | int_csr_r.fld.FLD_END_ODD_EN = 1; | ||
504 | int_csr_r.fld.FLD_START_EN = 0; | ||
505 | |||
506 | WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); | ||
507 | |||
508 | /* start internal BUSY bits */ | ||
509 | |||
510 | ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg); | ||
511 | i2c_csr2.fld.BUSY_ODD = 1; | ||
512 | i2c_csr2.fld.BUSY_EVE = 1; | ||
513 | WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg); | ||
514 | |||
515 | /* Now its up to the interrupt routine!! */ | ||
516 | |||
517 | return; | ||
518 | } | ||
519 | |||
520 | |||
521 | /***************************************************** | ||
522 | * ioctl() | ||
523 | * | ||
524 | *****************************************************/ | ||
525 | static int dt3155_ioctl(struct inode *inode, | ||
526 | struct file *file, | ||
527 | unsigned int cmd, | ||
528 | unsigned long arg) | ||
529 | { | ||
530 | int minor = MINOR(inode->i_rdev); /* What device are we ioctl()'ing? */ | ||
531 | |||
532 | if ( minor >= MAXBOARDS || minor < 0 ) | ||
533 | return -ENODEV; | ||
534 | |||
535 | /* make sure it is valid command */ | ||
536 | if (_IOC_NR(cmd) > DT3155_IOC_MAXNR) | ||
537 | { | ||
538 | printk("DT3155: invalid IOCTL(0x%x)\n",cmd); | ||
539 | printk("DT3155: Valid commands (0x%x), (0x%x), (0x%x), (0x%x), (0x%x)\n", | ||
540 | (unsigned int)DT3155_GET_CONFIG, | ||
541 | (unsigned int)DT3155_SET_CONFIG, | ||
542 | (unsigned int)DT3155_START, | ||
543 | (unsigned int)DT3155_STOP, | ||
544 | (unsigned int)DT3155_FLUSH); | ||
545 | return -EINVAL; | ||
546 | } | ||
547 | |||
548 | switch (cmd) | ||
549 | { | ||
550 | case DT3155_SET_CONFIG: | ||
551 | { | ||
552 | if (dt3155_status[minor].state != DT3155_STATE_IDLE) | ||
553 | return -EBUSY; | ||
554 | |||
555 | { | ||
556 | struct dt3155_config_s tmp; | ||
557 | if (copy_from_user((void *)&tmp, (void *) arg, sizeof(tmp))) | ||
558 | return -EFAULT; | ||
559 | /* check for valid settings */ | ||
560 | if (tmp.rows > DT3155_MAX_ROWS || | ||
561 | tmp.cols > DT3155_MAX_COLS || | ||
562 | (tmp.acq_mode != DT3155_MODE_FRAME && | ||
563 | tmp.acq_mode != DT3155_MODE_FIELD) || | ||
564 | (tmp.continuous != DT3155_SNAP && | ||
565 | tmp.continuous != DT3155_ACQ)) | ||
566 | { | ||
567 | return -EINVAL; | ||
568 | } | ||
569 | dt3155_status[minor].config = tmp; | ||
570 | } | ||
571 | return 0; | ||
572 | } | ||
573 | case DT3155_GET_CONFIG: | ||
574 | { | ||
575 | if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], | ||
576 | sizeof(dt3155_status_t) )) | ||
577 | return -EFAULT; | ||
578 | return 0; | ||
579 | } | ||
580 | case DT3155_FLUSH: /* Flushes the buffers -- ensures fresh data */ | ||
581 | { | ||
582 | if (dt3155_status[minor].state != DT3155_STATE_IDLE) | ||
583 | return -EBUSY; | ||
584 | return dt3155_flush(minor); | ||
585 | } | ||
586 | case DT3155_STOP: | ||
587 | { | ||
588 | if (dt3155_status[minor].state & DT3155_STATE_STOP || | ||
589 | dt3155_status[minor].fbuffer.stop_acquire) | ||
590 | return -EBUSY; | ||
591 | |||
592 | if (dt3155_status[minor].state == DT3155_STATE_IDLE) | ||
593 | return 0; | ||
594 | |||
595 | quick_stop(minor); | ||
596 | if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], | ||
597 | sizeof(dt3155_status_t))) | ||
598 | return -EFAULT; | ||
599 | return 0; | ||
600 | } | ||
601 | case DT3155_START: | ||
602 | { | ||
603 | if (dt3155_status[minor].state != DT3155_STATE_IDLE) | ||
604 | return -EBUSY; | ||
605 | |||
606 | dt3155_status[minor].fbuffer.stop_acquire = 0; | ||
607 | dt3155_status[minor].fbuffer.frame_count = 0; | ||
608 | |||
609 | /* Set the MODE in the status -- we default to FRAME */ | ||
610 | if (dt3155_status[minor].config.acq_mode == DT3155_MODE_FIELD) | ||
611 | { | ||
612 | dt3155_status[minor].state = DT3155_STATE_FLD; | ||
613 | } | ||
614 | else | ||
615 | { | ||
616 | dt3155_status[minor].state = DT3155_STATE_FRAME; | ||
617 | } | ||
618 | |||
619 | dt3155_init_isr(minor); | ||
620 | if (copy_to_user( (void *) arg, (void *) &dt3155_status[minor], | ||
621 | sizeof(dt3155_status_t))) | ||
622 | return -EFAULT; | ||
623 | return 0; | ||
624 | } | ||
625 | default: | ||
626 | { | ||
627 | printk("DT3155: invalid IOCTL(0x%x)\n",cmd); | ||
628 | printk("DT3155: Valid commands (0x%x), (0x%x), (0x%x), (0x%x), (0x%x)\n", | ||
629 | (unsigned int)DT3155_GET_CONFIG, | ||
630 | (unsigned int)DT3155_SET_CONFIG, | ||
631 | DT3155_START, DT3155_STOP, DT3155_FLUSH); | ||
632 | return -ENOSYS; | ||
633 | } | ||
634 | } | ||
635 | return -ENOSYS; | ||
636 | } | ||
637 | |||
638 | /***************************************************** | ||
639 | * mmap() | ||
640 | * | ||
641 | * only allow the user to mmap the registers and buffer | ||
642 | * It is quite possible that this is broken, since the | ||
643 | * addition of of the capacity for two cards!!!!!!!! | ||
644 | * It *looks* like it should work but since I'm not | ||
645 | * sure how to use it, I'm not actually sure. (NJC? ditto by SS) | ||
646 | *****************************************************/ | ||
647 | static int dt3155_mmap (struct file * file, struct vm_area_struct * vma) | ||
648 | { | ||
649 | /* which device are we mmapping? */ | ||
650 | int minor = MINOR(file->f_dentry->d_inode->i_rdev); | ||
651 | unsigned long offset; | ||
652 | offset = vma->vm_pgoff << PAGE_SHIFT; | ||
653 | |||
654 | if (offset >= __pa(high_memory) || (file->f_flags & O_SYNC)) | ||
655 | vma->vm_flags |= VM_IO; | ||
656 | |||
657 | /* Don't try to swap out physical pages.. */ | ||
658 | vma->vm_flags |= VM_RESERVED; | ||
659 | |||
660 | /* they are mapping the registers or the buffer */ | ||
661 | if ((offset == dt3155_status[minor].reg_addr && | ||
662 | vma->vm_end - vma->vm_start == PCI_PAGE_SIZE) || | ||
663 | (offset == dt3155_status[minor].mem_addr && | ||
664 | vma->vm_end - vma->vm_start == dt3155_status[minor].mem_size)) | ||
665 | { | ||
666 | if (remap_pfn_range(vma, | ||
667 | vma->vm_start, | ||
668 | offset >> PAGE_SHIFT, | ||
669 | vma->vm_end - vma->vm_start, | ||
670 | vma->vm_page_prot)) { | ||
671 | printk("DT3155: remap_page_range() failed.\n"); | ||
672 | return -EAGAIN; | ||
673 | } | ||
674 | } | ||
675 | else | ||
676 | { | ||
677 | printk("DT3155: dt3155_mmap() bad call.\n"); | ||
678 | return -ENXIO; | ||
679 | } | ||
680 | |||
681 | return 0; | ||
682 | } | ||
683 | |||
684 | |||
685 | /***************************************************** | ||
686 | * open() | ||
687 | * | ||
688 | * Our special open code. | ||
689 | * MOD_INC_USE_COUNT make sure that the driver memory is not freed | ||
690 | * while the device is in use. | ||
691 | *****************************************************/ | ||
692 | static int dt3155_open( struct inode* inode, struct file* filep) | ||
693 | { | ||
694 | int minor = MINOR(inode->i_rdev); /* what device are we opening? */ | ||
695 | if (dt3155_dev_open[ minor ]) { | ||
696 | printk ("DT3155: Already opened by another process.\n"); | ||
697 | return -EBUSY; | ||
698 | } | ||
699 | |||
700 | if (dt3155_status[ minor ].device_installed==0) | ||
701 | { | ||
702 | printk("DT3155 Open Error: No such device dt3155 minor number %d\n", | ||
703 | minor); | ||
704 | return -EIO; | ||
705 | } | ||
706 | |||
707 | if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) { | ||
708 | printk ("DT3155: Not in idle state (state = %x)\n", | ||
709 | dt3155_status[ minor ].state); | ||
710 | return -EBUSY; | ||
711 | } | ||
712 | |||
713 | printk("DT3155: Device opened.\n"); | ||
714 | |||
715 | dt3155_dev_open[ minor ] = 1 ; | ||
716 | |||
717 | dt3155_flush( minor ); | ||
718 | |||
719 | /* Disable ALL interrupts */ | ||
720 | int_csr_r.reg = 0; | ||
721 | WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); | ||
722 | |||
723 | init_waitqueue_head(&(dt3155_read_wait_queue[minor])); | ||
724 | |||
725 | return 0; | ||
726 | } | ||
727 | |||
728 | |||
729 | /***************************************************** | ||
730 | * close() | ||
731 | * | ||
732 | * Now decrement the use count. | ||
733 | * | ||
734 | *****************************************************/ | ||
735 | static int dt3155_close( struct inode *inode, struct file *filep) | ||
736 | { | ||
737 | int minor; | ||
738 | |||
739 | minor = MINOR(inode->i_rdev); /* which device are we closing */ | ||
740 | if (!dt3155_dev_open[ minor ]) | ||
741 | { | ||
742 | printk("DT3155: attempt to CLOSE a not OPEN device\n"); | ||
743 | } | ||
744 | else | ||
745 | { | ||
746 | dt3155_dev_open[ minor ] = 0; | ||
747 | |||
748 | if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) | ||
749 | { | ||
750 | quick_stop(minor); | ||
751 | } | ||
752 | } | ||
753 | return 0; | ||
754 | } | ||
755 | |||
756 | /***************************************************** | ||
757 | * read() | ||
758 | * | ||
759 | *****************************************************/ | ||
760 | static ssize_t dt3155_read(struct file *filep, char __user *buf, | ||
761 | size_t count, loff_t *ppos) | ||
762 | { | ||
763 | /* which device are we reading from? */ | ||
764 | int minor = MINOR(filep->f_dentry->d_inode->i_rdev); | ||
765 | u32 offset; | ||
766 | int frame_index; | ||
767 | frame_info_t *frame_info_p; | ||
768 | |||
769 | /* TODO: this should check the error flag and */ | ||
770 | /* return an error on hardware failures */ | ||
771 | if (count != sizeof(dt3155_read_t)) | ||
772 | { | ||
773 | printk("DT3155 ERROR (NJC): count is not right\n"); | ||
774 | return -EINVAL; | ||
775 | } | ||
776 | |||
777 | |||
778 | /* Hack here -- I'm going to allow reading even when idle. | ||
779 | * this is so that the frames can be read after STOP has | ||
780 | * been called. Leaving it here, commented out, as a reminder | ||
781 | * for a short while to make sure there are no problems. | ||
782 | * Note that if the driver is not opened in non_blocking mode, | ||
783 | * and the device is idle, then it could sit here forever! */ | ||
784 | |||
785 | /* if (dt3155_status[minor].state == DT3155_STATE_IDLE)*/ | ||
786 | /* return -EBUSY;*/ | ||
787 | |||
788 | /* non-blocking reads should return if no data */ | ||
789 | if (filep->f_flags & O_NDELAY) | ||
790 | { | ||
791 | if ((frame_index = dt3155_get_ready_buffer(minor)) < 0) { | ||
792 | /*printk( "dt3155: no buffers available (?)\n");*/ | ||
793 | /* printques(minor); */ | ||
794 | return -EAGAIN; | ||
795 | } | ||
796 | } | ||
797 | else | ||
798 | { | ||
799 | /* | ||
800 | * sleep till data arrives , or we get interrupted. | ||
801 | * Note that wait_event_interruptible() does not actually | ||
802 | * sleep/wait if it's condition evaluates to true upon entry. | ||
803 | */ | ||
804 | wait_event_interruptible(dt3155_read_wait_queue[minor], | ||
805 | (frame_index = dt3155_get_ready_buffer(minor)) | ||
806 | >= 0); | ||
807 | |||
808 | if (frame_index < 0) | ||
809 | { | ||
810 | printk ("DT3155: read: interrupted\n"); | ||
811 | quick_stop (minor); | ||
812 | printques(minor); | ||
813 | return -EINTR; | ||
814 | } | ||
815 | } | ||
816 | |||
817 | frame_info_p = &dt3155_status[minor].fbuffer.frame_info[frame_index]; | ||
818 | |||
819 | /* make this an offset */ | ||
820 | offset = frame_info_p->addr - dt3155_status[minor].mem_addr; | ||
821 | |||
822 | put_user(offset, (unsigned int *) buf); | ||
823 | buf += sizeof(u32); | ||
824 | put_user( dt3155_status[minor].fbuffer.frame_count, (unsigned int *) buf); | ||
825 | buf += sizeof(u32); | ||
826 | put_user(dt3155_status[minor].state, (unsigned int *) buf); | ||
827 | buf += sizeof(u32); | ||
828 | if (copy_to_user(buf, frame_info_p, sizeof(frame_info_t))) | ||
829 | return -EFAULT; | ||
830 | |||
831 | return sizeof(dt3155_read_t); | ||
832 | } | ||
833 | |||
834 | static unsigned int dt3155_poll (struct file * filp, poll_table *wait) | ||
835 | { | ||
836 | int minor = MINOR(filp->f_dentry->d_inode->i_rdev); | ||
837 | |||
838 | if (!is_ready_buf_empty(minor)) | ||
839 | return POLLIN | POLLRDNORM; | ||
840 | |||
841 | poll_wait (filp, &dt3155_read_wait_queue[minor], wait); | ||
842 | |||
843 | return 0; | ||
844 | } | ||
845 | |||
846 | |||
847 | /***************************************************** | ||
848 | * file operations supported by DT3155 driver | ||
849 | * needed by init_module | ||
850 | * register_chrdev | ||
851 | *****************************************************/ | ||
852 | static struct file_operations dt3155_fops = { | ||
853 | read: dt3155_read, | ||
854 | ioctl: dt3155_ioctl, | ||
855 | mmap: dt3155_mmap, | ||
856 | poll: dt3155_poll, | ||
857 | open: dt3155_open, | ||
858 | release: dt3155_close | ||
859 | }; | ||
860 | |||
861 | |||
862 | /***************************************************** | ||
863 | * find_PCI(); | ||
864 | * | ||
865 | * PCI has been totally reworked in 2.1.. | ||
866 | *****************************************************/ | ||
867 | static int find_PCI (void) | ||
868 | { | ||
869 | struct pci_dev *pci_dev = NULL; | ||
870 | int error, pci_index = 0; | ||
871 | unsigned short rev_device; | ||
872 | unsigned long base; | ||
873 | unsigned char irq; | ||
874 | |||
875 | while ((pci_dev = pci_get_device | ||
876 | (DT3155_VENDORID, DT3155_DEVICEID, pci_dev)) != NULL) | ||
877 | { | ||
878 | pci_index ++; | ||
879 | |||
880 | /* Is it really there? */ | ||
881 | if ((error = | ||
882 | pci_read_config_word(pci_dev, PCI_CLASS_DEVICE, &rev_device))) | ||
883 | continue; | ||
884 | |||
885 | /* Found a board */ | ||
886 | DT_3155_DEBUG_MSG("DT3155: Device number %d \n", pci_index); | ||
887 | |||
888 | /* Make sure the driver was compiled with enough buffers to handle | ||
889 | this many boards */ | ||
890 | if (pci_index > MAXBOARDS) { | ||
891 | printk("DT3155: ERROR - found %d devices, but driver only configured " | ||
892 | "for %d devices\n" | ||
893 | "DT3155: Please change MAXBOARDS in dt3155.h\n", | ||
894 | pci_index, MAXBOARDS); | ||
895 | goto err; | ||
896 | } | ||
897 | |||
898 | /* Now, just go out and make sure that this/these device(s) is/are | ||
899 | actually mapped into the kernel address space */ | ||
900 | if ((error = pci_read_config_dword( pci_dev, PCI_BASE_ADDRESS_0, | ||
901 | (u32 *) &base))) | ||
902 | { | ||
903 | printk("DT3155: Was not able to find device \n"); | ||
904 | goto err; | ||
905 | } | ||
906 | |||
907 | DT_3155_DEBUG_MSG("DT3155: Base address 0 for device is %lx \n", base); | ||
908 | dt3155_status[pci_index-1].reg_addr = base; | ||
909 | |||
910 | /* Remap the base address to a logical address through which we | ||
911 | * can access it. */ | ||
912 | dt3155_lbase[ pci_index - 1 ] = ioremap(base,PCI_PAGE_SIZE); | ||
913 | dt3155_status[ pci_index - 1 ].reg_addr = base; | ||
914 | DT_3155_DEBUG_MSG("DT3155: New logical address is %p \n", | ||
915 | dt3155_lbase[pci_index-1]); | ||
916 | if ( !dt3155_lbase[pci_index-1] ) | ||
917 | { | ||
918 | printk("DT3155: Unable to remap control registers\n"); | ||
919 | goto err; | ||
920 | } | ||
921 | |||
922 | if ( (error = pci_read_config_byte( pci_dev, PCI_INTERRUPT_LINE, &irq)) ) | ||
923 | { | ||
924 | printk("DT3155: Was not able to find device \n"); | ||
925 | goto err; | ||
926 | } | ||
927 | |||
928 | DT_3155_DEBUG_MSG("DT3155: IRQ is %d \n",irq); | ||
929 | dt3155_status[ pci_index-1 ].irq = irq; | ||
930 | /* Set flag: kth device found! */ | ||
931 | dt3155_status[ pci_index-1 ].device_installed = 1; | ||
932 | printk("DT3155: Installing device %d w/irq %d and address %p\n", | ||
933 | pci_index, | ||
934 | dt3155_status[pci_index-1].irq, | ||
935 | dt3155_lbase[pci_index-1]); | ||
936 | |||
937 | } | ||
938 | ndevices = pci_index; | ||
939 | |||
940 | return DT_3155_SUCCESS; | ||
941 | |||
942 | err: | ||
943 | pci_dev_put(pci_dev); | ||
944 | return DT_3155_FAILURE; | ||
945 | } | ||
946 | |||
947 | u32 allocatorAddr = 0; | ||
948 | |||
949 | /***************************************************** | ||
950 | * init_module() | ||
951 | *****************************************************/ | ||
952 | int init_module(void) | ||
953 | { | ||
954 | int index; | ||
955 | int rcode = 0; | ||
956 | char *devname[ MAXBOARDS ]; | ||
957 | |||
958 | devname[ 0 ] = "dt3155a"; | ||
959 | #if MAXBOARDS == 2 | ||
960 | devname[ 1 ] = "dt3155b"; | ||
961 | #endif | ||
962 | |||
963 | printk("DT3155: Loading module...\n"); | ||
964 | |||
965 | /* Register the device driver */ | ||
966 | rcode = register_chrdev( dt3155_major, "dt3155", &dt3155_fops ); | ||
967 | if( rcode < 0 ) | ||
968 | { | ||
969 | printk( KERN_INFO "DT3155: register_chrdev failed \n"); | ||
970 | return rcode; | ||
971 | } | ||
972 | |||
973 | if( dt3155_major == 0 ) | ||
974 | dt3155_major = rcode; /* dynamic */ | ||
975 | |||
976 | |||
977 | /* init the status variables. */ | ||
978 | /* DMA memory is taken care of in setup_buffers() */ | ||
979 | for ( index = 0; index < MAXBOARDS; index++ ) | ||
980 | { | ||
981 | dt3155_status[ index ].config.acq_mode = DT3155_MODE_FRAME; | ||
982 | dt3155_status[ index ].config.continuous = DT3155_ACQ; | ||
983 | dt3155_status[ index ].config.cols = DT3155_MAX_COLS; | ||
984 | dt3155_status[ index ].config.rows = DT3155_MAX_ROWS; | ||
985 | dt3155_status[ index ].state = DT3155_STATE_IDLE; | ||
986 | |||
987 | /* find_PCI() will check if devices are installed; */ | ||
988 | /* first assume they're not: */ | ||
989 | dt3155_status[ index ].mem_addr = 0; | ||
990 | dt3155_status[ index ].mem_size = 0; | ||
991 | dt3155_status[ index ].state = DT3155_STATE_IDLE; | ||
992 | dt3155_status[ index ].device_installed = 0; | ||
993 | } | ||
994 | |||
995 | /* Now let's find the hardware. find_PCI() will set ndevices to the | ||
996 | * number of cards found in this machine. */ | ||
997 | { | ||
998 | if ( (rcode = find_PCI()) != DT_3155_SUCCESS ) | ||
999 | { | ||
1000 | printk("DT3155 error: find_PCI() failed to find dt3155 board(s)\n"); | ||
1001 | unregister_chrdev( dt3155_major, "dt3155" ); | ||
1002 | return rcode; | ||
1003 | } | ||
1004 | } | ||
1005 | |||
1006 | /* Ok, time to setup the frame buffers */ | ||
1007 | if( (rcode = dt3155_setup_buffers(&allocatorAddr)) < 0 ) | ||
1008 | { | ||
1009 | printk("DT3155: Error: setting up buffer not large enough."); | ||
1010 | unregister_chrdev( dt3155_major, "dt3155" ); | ||
1011 | return rcode; | ||
1012 | } | ||
1013 | |||
1014 | /* If we are this far, then there is enough RAM */ | ||
1015 | /* for the buffers: Print the configuration. */ | ||
1016 | for( index = 0; index < ndevices; index++ ) | ||
1017 | { | ||
1018 | printk("DT3155: Device = %d; acq_mode = %d; " | ||
1019 | "continuous = %d; cols = %d; rows = %d;\n", | ||
1020 | index , | ||
1021 | dt3155_status[ index ].config.acq_mode, | ||
1022 | dt3155_status[ index ].config.continuous, | ||
1023 | dt3155_status[ index ].config.cols, | ||
1024 | dt3155_status[ index ].config.rows); | ||
1025 | printk("DT3155: m_addr = 0x%x; m_size = %ld; " | ||
1026 | "state = %d; device_installed = %d\n", | ||
1027 | dt3155_status[ index ].mem_addr, | ||
1028 | (long int)dt3155_status[ index ].mem_size, | ||
1029 | dt3155_status[ index ].state, | ||
1030 | dt3155_status[ index ].device_installed); | ||
1031 | } | ||
1032 | |||
1033 | /* Disable ALL interrupts */ | ||
1034 | int_csr_r.reg = 0; | ||
1035 | for( index = 0; index < ndevices; index++ ) | ||
1036 | { | ||
1037 | WriteMReg( (dt3155_lbase[ index ] + INT_CSR), int_csr_r.reg ); | ||
1038 | if( dt3155_status[ index ].device_installed ) | ||
1039 | { | ||
1040 | /* | ||
1041 | * This driver *looks* like it can handle sharing interrupts, | ||
1042 | * but I can't actually test myself. I've had reports that it | ||
1043 | * DOES work so I'll enable it for now. This comment will remain | ||
1044 | * as a reminder in case any problems arise. (SS) | ||
1045 | */ | ||
1046 | /* in older kernels flags are: SA_SHIRQ | SA_INTERRUPT */ | ||
1047 | rcode = request_irq( dt3155_status[ index ].irq, (void *)dt3155_isr, | ||
1048 | IRQF_SHARED | IRQF_DISABLED, devname[ index ], | ||
1049 | (void*) &dt3155_status[index]); | ||
1050 | if( rcode < 0 ) | ||
1051 | { | ||
1052 | printk("DT3155: minor %d request_irq failed for IRQ %d\n", | ||
1053 | index, dt3155_status[index].irq); | ||
1054 | unregister_chrdev( dt3155_major, "dt3155" ); | ||
1055 | return rcode; | ||
1056 | } | ||
1057 | } | ||
1058 | } | ||
1059 | |||
1060 | printk("DT3155: finished loading\n"); | ||
1061 | |||
1062 | return 0; | ||
1063 | } | ||
1064 | |||
1065 | /***************************************************** | ||
1066 | * cleanup_module(void) | ||
1067 | * | ||
1068 | *****************************************************/ | ||
1069 | void cleanup_module(void) | ||
1070 | { | ||
1071 | int index; | ||
1072 | |||
1073 | printk("DT3155: cleanup_module called\n"); | ||
1074 | |||
1075 | /* removed DMA allocated with the allocator */ | ||
1076 | #ifdef STANDALONE_ALLOCATOR | ||
1077 | if (allocatorAddr != 0) | ||
1078 | allocator_free_dma(allocatorAddr); | ||
1079 | #else | ||
1080 | allocator_cleanup(); | ||
1081 | #endif | ||
1082 | |||
1083 | unregister_chrdev( dt3155_major, "dt3155" ); | ||
1084 | |||
1085 | for( index = 0; index < ndevices; index++ ) | ||
1086 | { | ||
1087 | if( dt3155_status[ index ].device_installed == 1 ) | ||
1088 | { | ||
1089 | printk( "DT3155: Freeing irq %d for device %d\n", | ||
1090 | dt3155_status[ index ].irq, index ); | ||
1091 | free_irq( dt3155_status[ index ].irq, (void*)&dt3155_status[index] ); | ||
1092 | } | ||
1093 | } | ||
1094 | } | ||
1095 | |||
diff --git a/drivers/staging/dt3155/dt3155_drv.h b/drivers/staging/dt3155/dt3155_drv.h new file mode 100644 index 000000000000..95e68c3388a4 --- /dev/null +++ b/drivers/staging/dt3155/dt3155_drv.h | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Scott Smedley | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #ifndef DT3155_DRV_INC | ||
25 | #define DT3155_DRV_INC | ||
26 | |||
27 | /* kernel logical address of the frame grabbers */ | ||
28 | extern u8 *dt3155_lbase[MAXBOARDS]; | ||
29 | |||
30 | /* kernel logical address of ram buffer */ | ||
31 | extern u8 *dt3155_bbase; | ||
32 | |||
33 | #ifdef __KERNEL__ | ||
34 | #include <linux/wait.h> | ||
35 | |||
36 | /* wait queue for reads */ | ||
37 | extern wait_queue_head_t dt3155_read_wait_queue[MAXBOARDS]; | ||
38 | #endif | ||
39 | |||
40 | /* number of devices */ | ||
41 | extern u32 ndevices; | ||
42 | |||
43 | extern int dt3155_errno; | ||
44 | |||
45 | #endif | ||
diff --git a/drivers/staging/dt3155/dt3155_io.c b/drivers/staging/dt3155/dt3155_io.c new file mode 100644 index 000000000000..6b9c68501a61 --- /dev/null +++ b/drivers/staging/dt3155/dt3155_io.c | |||
@@ -0,0 +1,175 @@ | |||
1 | /* | ||
2 | * Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
3 | * Jason Lapenta, Scott Smedley | ||
4 | * | ||
5 | * This file is part of the DT3155 Device Driver. | ||
6 | * | ||
7 | * The DT3155 Device Driver is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | * The DT3155 Device Driver is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General | ||
15 | * Public License for more details. | ||
16 | */ | ||
17 | |||
18 | /* | ||
19 | * This file provides some basic register io routines. It is modified from | ||
20 | * demo code provided by Data Translations. | ||
21 | */ | ||
22 | |||
23 | #include <linux/delay.h> | ||
24 | #include "dt3155.h" | ||
25 | #include "dt3155_io.h" | ||
26 | #include "dt3155_drv.h" | ||
27 | |||
28 | |||
29 | /****** local copies of board's 32 bit registers ******/ | ||
30 | u32 even_dma_start_r; /* bit 0 should always be 0 */ | ||
31 | u32 odd_dma_start_r; /* .. */ | ||
32 | u32 even_dma_stride_r; /* bits 0&1 should always be 0 */ | ||
33 | u32 odd_dma_stride_r; /* .. */ | ||
34 | u32 even_pixel_fmt_r; | ||
35 | u32 odd_pixel_fmt_r; | ||
36 | |||
37 | FIFO_TRIGGER_R fifo_trigger_r; | ||
38 | XFER_MODE_R xfer_mode_r; | ||
39 | CSR1_R csr1_r; | ||
40 | RETRY_WAIT_CNT_R retry_wait_cnt_r; | ||
41 | INT_CSR_R int_csr_r; | ||
42 | |||
43 | u32 even_fld_mask_r; | ||
44 | u32 odd_fld_mask_r; | ||
45 | |||
46 | MASK_LENGTH_R mask_length_r; | ||
47 | FIFO_FLAG_CNT_R fifo_flag_cnt_r; | ||
48 | IIC_CLK_DUR_R iic_clk_dur_r; | ||
49 | IIC_CSR1_R iic_csr1_r; | ||
50 | IIC_CSR2_R iic_csr2_r; | ||
51 | DMA_UPPER_LMT_R even_dma_upper_lmt_r; | ||
52 | DMA_UPPER_LMT_R odd_dma_upper_lmt_r; | ||
53 | |||
54 | |||
55 | |||
56 | /******** local copies of board's 8 bit I2C registers ******/ | ||
57 | I2C_CSR2 i2c_csr2; | ||
58 | I2C_EVEN_CSR i2c_even_csr; | ||
59 | I2C_ODD_CSR i2c_odd_csr; | ||
60 | I2C_CONFIG i2c_config; | ||
61 | u8 i2c_dt_id; | ||
62 | u8 i2c_x_clip_start; | ||
63 | u8 i2c_y_clip_start; | ||
64 | u8 i2c_x_clip_end; | ||
65 | u8 i2c_y_clip_end; | ||
66 | u8 i2c_ad_addr; | ||
67 | u8 i2c_ad_lut; | ||
68 | I2C_AD_CMD i2c_ad_cmd; | ||
69 | u8 i2c_dig_out; | ||
70 | u8 i2c_pm_lut_addr; | ||
71 | u8 i2c_pm_lut_data; | ||
72 | |||
73 | /* | ||
74 | * wait_ibsyclr() | ||
75 | * | ||
76 | * This function handles read/write timing and r/w timeout error | ||
77 | * | ||
78 | * Returns TRUE if NEW_CYCLE clears | ||
79 | * Returns FALSE if NEW_CYCLE doesn't clear in roughly 3 msecs, otherwise | ||
80 | * returns 0 | ||
81 | */ | ||
82 | static int wait_ibsyclr(u8 *lpReg) | ||
83 | { | ||
84 | /* wait 100 microseconds */ | ||
85 | udelay(100L); | ||
86 | /* __delay(loops_per_sec/10000); */ | ||
87 | if (iic_csr2_r.fld.NEW_CYCLE) { | ||
88 | /* if NEW_CYCLE didn't clear */ | ||
89 | /* TIMEOUT ERROR */ | ||
90 | dt3155_errno = DT_ERR_I2C_TIMEOUT; | ||
91 | return FALSE; | ||
92 | } else | ||
93 | return TRUE; /* no error */ | ||
94 | } | ||
95 | |||
96 | /* | ||
97 | * WriteI2C() | ||
98 | * | ||
99 | * This function handles writing to 8-bit DT3155 registers | ||
100 | * | ||
101 | * 1st parameter is pointer to 32-bit register base address | ||
102 | * 2nd parameter is reg. index; | ||
103 | * 3rd is value to be written | ||
104 | * | ||
105 | * Returns TRUE - Successful completion | ||
106 | * FALSE - Timeout error - cycle did not complete! | ||
107 | */ | ||
108 | int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal) | ||
109 | { | ||
110 | int writestat; /* status for return */ | ||
111 | |||
112 | /* read 32 bit IIC_CSR2 register data into union */ | ||
113 | |||
114 | ReadMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); | ||
115 | |||
116 | /* for write operation */ | ||
117 | iic_csr2_r.fld.DIR_RD = 0; | ||
118 | /* I2C address of I2C register: */ | ||
119 | iic_csr2_r.fld.DIR_ADDR = wIregIndex; | ||
120 | /* 8 bit data to be written to I2C reg */ | ||
121 | iic_csr2_r.fld.DIR_WR_DATA = byVal; | ||
122 | /* will start a direct I2C cycle: */ | ||
123 | iic_csr2_r.fld.NEW_CYCLE = 1; | ||
124 | |||
125 | /* xfer union data into 32 bit IIC_CSR2 register */ | ||
126 | WriteMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); | ||
127 | |||
128 | /* wait for IIC cycle to finish */ | ||
129 | writestat = wait_ibsyclr(lpReg); | ||
130 | return writestat; | ||
131 | } | ||
132 | |||
133 | /* | ||
134 | * ReadI2C() | ||
135 | * | ||
136 | * This function handles reading from 8-bit DT3155 registers | ||
137 | * | ||
138 | * 1st parameter is pointer to 32-bit register base address | ||
139 | * 2nd parameter is reg. index; | ||
140 | * 3rd is adrs of value to be read | ||
141 | * | ||
142 | * Returns TRUE - Successful completion | ||
143 | * FALSE - Timeout error - cycle did not complete! | ||
144 | */ | ||
145 | int ReadI2C(u8 *lpReg, u_short wIregIndex, u8 *byVal) | ||
146 | { | ||
147 | int writestat; /* status for return */ | ||
148 | |||
149 | /* read 32 bit IIC_CSR2 register data into union */ | ||
150 | ReadMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); | ||
151 | |||
152 | /* for read operation */ | ||
153 | iic_csr2_r.fld.DIR_RD = 1; | ||
154 | |||
155 | /* I2C address of I2C register: */ | ||
156 | iic_csr2_r.fld.DIR_ADDR = wIregIndex; | ||
157 | |||
158 | /* will start a direct I2C cycle: */ | ||
159 | iic_csr2_r.fld.NEW_CYCLE = 1; | ||
160 | |||
161 | /* xfer union's data into 32 bit IIC_CSR2 register */ | ||
162 | WriteMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); | ||
163 | |||
164 | /* wait for IIC cycle to finish */ | ||
165 | writestat = wait_ibsyclr(lpReg); | ||
166 | |||
167 | /* Next 2 commands read 32 bit IIC_CSR1 register's data into union */ | ||
168 | /* first read data is in IIC_CSR1 */ | ||
169 | ReadMReg((lpReg + IIC_CSR1), iic_csr1_r.reg); | ||
170 | |||
171 | /* now get data u8 out of register */ | ||
172 | *byVal = (u8) iic_csr1_r.fld.RD_DATA; | ||
173 | |||
174 | return writestat; | ||
175 | } | ||
diff --git a/drivers/staging/dt3155/dt3155_io.h b/drivers/staging/dt3155/dt3155_io.h new file mode 100644 index 000000000000..d1a25100169f --- /dev/null +++ b/drivers/staging/dt3155/dt3155_io.h | |||
@@ -0,0 +1,358 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Jason Lapenta, Scott Smedley | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | |||
23 | |||
24 | -- Changes -- | ||
25 | |||
26 | Date Programmer Description of changes made | ||
27 | ------------------------------------------------------------------- | ||
28 | 24-Jul-2002 SS GPL licence. | ||
29 | |||
30 | */ | ||
31 | |||
32 | /* This code is a modified version of examples provided by Data Translations.*/ | ||
33 | |||
34 | #ifndef DT3155_IO_INC | ||
35 | #define DT3155_IO_INC | ||
36 | |||
37 | /* macros to access registers */ | ||
38 | |||
39 | #define WriteMReg(Address, Data) (*((u32 *)(Address)) = Data) | ||
40 | #define ReadMReg(Address, Data) (Data = *((u32 *)(Address))) | ||
41 | |||
42 | /***************** 32 bit register globals **************/ | ||
43 | |||
44 | /* offsets for 32-bit memory mapped registers */ | ||
45 | |||
46 | #define EVEN_DMA_START 0x000 | ||
47 | #define ODD_DMA_START 0x00C | ||
48 | #define EVEN_DMA_STRIDE 0x018 | ||
49 | #define ODD_DMA_STRIDE 0x024 | ||
50 | #define EVEN_PIXEL_FMT 0x030 | ||
51 | #define ODD_PIXEL_FMT 0x034 | ||
52 | #define FIFO_TRIGGER 0x038 | ||
53 | #define XFER_MODE 0x03C | ||
54 | #define CSR1 0x040 | ||
55 | #define RETRY_WAIT_CNT 0x044 | ||
56 | #define INT_CSR 0x048 | ||
57 | #define EVEN_FLD_MASK 0x04C | ||
58 | #define ODD_FLD_MASK 0x050 | ||
59 | #define MASK_LENGTH 0x054 | ||
60 | #define FIFO_FLAG_CNT 0x058 | ||
61 | #define IIC_CLK_DUR 0x05C | ||
62 | #define IIC_CSR1 0x060 | ||
63 | #define IIC_CSR2 0x064 | ||
64 | #define EVEN_DMA_UPPR_LMT 0x08C | ||
65 | #define ODD_DMA_UPPR_LMT 0x090 | ||
66 | |||
67 | #define CLK_DUR_VAL 0x01010101 | ||
68 | |||
69 | |||
70 | |||
71 | /******** Assignments and Typedefs for 32 bit Memory Mapped Registers ********/ | ||
72 | |||
73 | typedef union fifo_trigger_tag { | ||
74 | u32 reg; | ||
75 | struct { | ||
76 | u32 PACKED:6; | ||
77 | u32 :9; | ||
78 | u32 PLANER:7; | ||
79 | u32 :9; | ||
80 | } fld; | ||
81 | } FIFO_TRIGGER_R; | ||
82 | |||
83 | typedef union xfer_mode_tag { | ||
84 | u32 reg; | ||
85 | struct { | ||
86 | u32 :2; | ||
87 | u32 FIELD_TOGGLE:1; | ||
88 | u32 :5; | ||
89 | u32 :2; | ||
90 | u32 :22; | ||
91 | } fld; | ||
92 | } XFER_MODE_R; | ||
93 | |||
94 | typedef union csr1_tag { | ||
95 | u32 reg; | ||
96 | struct { | ||
97 | u32 CAP_CONT_EVE:1; | ||
98 | u32 CAP_CONT_ODD:1; | ||
99 | u32 CAP_SNGL_EVE:1; | ||
100 | u32 CAP_SNGL_ODD:1; | ||
101 | u32 FLD_DN_EVE :1; | ||
102 | u32 FLD_DN_ODD :1; | ||
103 | u32 SRST :1; | ||
104 | u32 FIFO_EN :1; | ||
105 | u32 FLD_CRPT_EVE:1; | ||
106 | u32 FLD_CRPT_ODD:1; | ||
107 | u32 ADDR_ERR_EVE:1; | ||
108 | u32 ADDR_ERR_ODD:1; | ||
109 | u32 CRPT_DIS :1; | ||
110 | u32 RANGE_EN :1; | ||
111 | u32 :16; | ||
112 | } fld; | ||
113 | } CSR1_R; | ||
114 | |||
115 | typedef union retry_wait_cnt_tag { | ||
116 | u32 reg; | ||
117 | struct { | ||
118 | u32 RTRY_WAIT_CNT:8; | ||
119 | u32 :24; | ||
120 | } fld; | ||
121 | } RETRY_WAIT_CNT_R; | ||
122 | |||
123 | typedef union int_csr_tag { | ||
124 | u32 reg; | ||
125 | struct { | ||
126 | u32 FLD_END_EVE :1; | ||
127 | u32 FLD_END_ODD :1; | ||
128 | u32 FLD_START :1; | ||
129 | u32 :5; | ||
130 | u32 FLD_END_EVE_EN:1; | ||
131 | u32 FLD_END_ODD_EN:1; | ||
132 | u32 FLD_START_EN :1; | ||
133 | u32 :21; | ||
134 | } fld; | ||
135 | } INT_CSR_R; | ||
136 | |||
137 | typedef union mask_length_tag { | ||
138 | u32 reg; | ||
139 | struct { | ||
140 | u32 MASK_LEN_EVE:5; | ||
141 | u32 :11; | ||
142 | u32 MASK_LEN_ODD:5; | ||
143 | u32 :11; | ||
144 | } fld; | ||
145 | } MASK_LENGTH_R; | ||
146 | |||
147 | typedef union fifo_flag_cnt_tag { | ||
148 | u32 reg; | ||
149 | struct { | ||
150 | u32 AF_COUNT:7; | ||
151 | u32 :9; | ||
152 | u32 AE_COUNT:7; | ||
153 | u32 :9; | ||
154 | } fld; | ||
155 | } FIFO_FLAG_CNT_R; | ||
156 | |||
157 | typedef union iic_clk_dur { | ||
158 | u32 reg; | ||
159 | struct { | ||
160 | u32 PHASE_1:8; | ||
161 | u32 PHASE_2:8; | ||
162 | u32 PHASE_3:8; | ||
163 | u32 PHASE_4:8; | ||
164 | } fld; | ||
165 | } IIC_CLK_DUR_R; | ||
166 | |||
167 | typedef union iic_csr1_tag { | ||
168 | u32 reg; | ||
169 | struct { | ||
170 | u32 AUTO_EN :1; | ||
171 | u32 BYPASS :1; | ||
172 | u32 SDA_OUT :1; | ||
173 | u32 SCL_OUT :1; | ||
174 | u32 :4; | ||
175 | u32 AUTO_ABORT :1; | ||
176 | u32 DIRECT_ABORT:1; | ||
177 | u32 SDA_IN :1; | ||
178 | u32 SCL_IN :1; | ||
179 | u32 :4; | ||
180 | u32 AUTO_ADDR :8; | ||
181 | u32 RD_DATA :8; | ||
182 | } fld; | ||
183 | } IIC_CSR1_R; | ||
184 | |||
185 | /********************************** | ||
186 | * iic_csr2_tag | ||
187 | */ | ||
188 | typedef union iic_csr2_tag { | ||
189 | u32 reg; | ||
190 | struct { | ||
191 | u32 DIR_WR_DATA :8; | ||
192 | u32 DIR_SUB_ADDR:8; | ||
193 | u32 DIR_RD :1; | ||
194 | u32 DIR_ADDR :7; | ||
195 | u32 NEW_CYCLE :1; | ||
196 | u32 :7; | ||
197 | } fld; | ||
198 | } IIC_CSR2_R; | ||
199 | |||
200 | /* use for both EVEN and ODD DMA UPPER LIMITS */ | ||
201 | |||
202 | /* | ||
203 | * dma_upper_lmt_tag | ||
204 | */ | ||
205 | typedef union dma_upper_lmt_tag { | ||
206 | u32 reg; | ||
207 | struct { | ||
208 | u32 DMA_UPPER_LMT_VAL:24; | ||
209 | u32 :8; | ||
210 | } fld; | ||
211 | } DMA_UPPER_LMT_R; | ||
212 | |||
213 | |||
214 | /* | ||
215 | * Global declarations of local copies of boards' 32 bit registers | ||
216 | */ | ||
217 | extern u32 even_dma_start_r; /* bit 0 should always be 0 */ | ||
218 | extern u32 odd_dma_start_r; /* .. */ | ||
219 | extern u32 even_dma_stride_r; /* bits 0&1 should always be 0 */ | ||
220 | extern u32 odd_dma_stride_r; /* .. */ | ||
221 | extern u32 even_pixel_fmt_r; | ||
222 | extern u32 odd_pixel_fmt_r; | ||
223 | |||
224 | extern FIFO_TRIGGER_R fifo_trigger_r; | ||
225 | extern XFER_MODE_R xfer_mode_r; | ||
226 | extern CSR1_R csr1_r; | ||
227 | extern RETRY_WAIT_CNT_R retry_wait_cnt_r; | ||
228 | extern INT_CSR_R int_csr_r; | ||
229 | |||
230 | extern u32 even_fld_mask_r; | ||
231 | extern u32 odd_fld_mask_r; | ||
232 | |||
233 | extern MASK_LENGTH_R mask_length_r; | ||
234 | extern FIFO_FLAG_CNT_R fifo_flag_cnt_r; | ||
235 | extern IIC_CLK_DUR_R iic_clk_dur_r; | ||
236 | extern IIC_CSR1_R iic_csr1_r; | ||
237 | extern IIC_CSR2_R iic_csr2_r; | ||
238 | extern DMA_UPPER_LMT_R even_dma_upper_lmt_r; | ||
239 | extern DMA_UPPER_LMT_R odd_dma_upper_lmt_r; | ||
240 | |||
241 | |||
242 | |||
243 | /***************** 8 bit I2C register globals ***********/ | ||
244 | #define CSR2 0x010 /* indices of 8-bit I2C mapped reg's*/ | ||
245 | #define EVEN_CSR 0x011 | ||
246 | #define ODD_CSR 0x012 | ||
247 | #define CONFIG 0x013 | ||
248 | #define DT_ID 0x01F | ||
249 | #define X_CLIP_START 0x020 | ||
250 | #define Y_CLIP_START 0x022 | ||
251 | #define X_CLIP_END 0x024 | ||
252 | #define Y_CLIP_END 0x026 | ||
253 | #define AD_ADDR 0x030 | ||
254 | #define AD_LUT 0x031 | ||
255 | #define AD_CMD 0x032 | ||
256 | #define DIG_OUT 0x040 | ||
257 | #define PM_LUT_ADDR 0x050 | ||
258 | #define PM_LUT_DATA 0x051 | ||
259 | |||
260 | |||
261 | /******** Assignments and Typedefs for 8 bit I2C Registers********************/ | ||
262 | |||
263 | typedef union i2c_csr2_tag { | ||
264 | u8 reg; | ||
265 | struct { | ||
266 | u8 CHROM_FIL:1; | ||
267 | u8 SYNC_SNTL:1; | ||
268 | u8 HZ50:1; | ||
269 | u8 SYNC_PRESENT:1; | ||
270 | u8 BUSY_EVE:1; | ||
271 | u8 BUSY_ODD:1; | ||
272 | u8 DISP_PASS:1; | ||
273 | } fld; | ||
274 | } I2C_CSR2; | ||
275 | |||
276 | typedef union i2c_even_csr_tag { | ||
277 | u8 reg; | ||
278 | struct { | ||
279 | u8 DONE_EVE :1; | ||
280 | u8 SNGL_EVE :1; | ||
281 | u8 ERROR_EVE:1; | ||
282 | u8 :5; | ||
283 | } fld; | ||
284 | } I2C_EVEN_CSR; | ||
285 | |||
286 | typedef union i2c_odd_csr_tag { | ||
287 | u8 reg; | ||
288 | struct { | ||
289 | u8 DONE_ODD:1; | ||
290 | u8 SNGL_ODD:1; | ||
291 | u8 ERROR_ODD:1; | ||
292 | u8 :5; | ||
293 | } fld; | ||
294 | } I2C_ODD_CSR; | ||
295 | |||
296 | typedef union i2c_config_tag { | ||
297 | u8 reg; | ||
298 | struct { | ||
299 | u8 ACQ_MODE:2; | ||
300 | u8 EXT_TRIG_EN:1; | ||
301 | u8 EXT_TRIG_POL:1; | ||
302 | u8 H_SCALE:1; | ||
303 | u8 CLIP:1; | ||
304 | u8 PM_LUT_SEL:1; | ||
305 | u8 PM_LUT_PGM:1; | ||
306 | } fld; | ||
307 | } I2C_CONFIG; | ||
308 | |||
309 | |||
310 | typedef union i2c_ad_cmd_tag { | ||
311 | /* bits can have 3 different meanings depending on value of AD_ADDR */ | ||
312 | u8 reg; | ||
313 | /* Bt252 Command Register if AD_ADDR = 00h */ | ||
314 | struct { | ||
315 | u8 :2; | ||
316 | u8 SYNC_LVL_SEL:2; | ||
317 | u8 SYNC_CNL_SEL:2; | ||
318 | u8 DIGITIZE_CNL_SEL1:2; | ||
319 | } bt252_command; | ||
320 | |||
321 | /* Bt252 IOUT0 register if AD_ADDR = 01h */ | ||
322 | struct { | ||
323 | u8 IOUT_DATA:8; | ||
324 | } bt252_iout0; | ||
325 | |||
326 | /* BT252 IOUT1 register if AD_ADDR = 02h */ | ||
327 | struct { | ||
328 | u8 IOUT_DATA:8; | ||
329 | } bt252_iout1; | ||
330 | } I2C_AD_CMD; | ||
331 | |||
332 | |||
333 | /***** Global declarations of local copies of boards' 8 bit I2C registers ***/ | ||
334 | |||
335 | extern I2C_CSR2 i2c_csr2; | ||
336 | extern I2C_EVEN_CSR i2c_even_csr; | ||
337 | extern I2C_ODD_CSR i2c_odd_csr; | ||
338 | extern I2C_CONFIG i2c_config; | ||
339 | extern u8 i2c_dt_id; | ||
340 | extern u8 i2c_x_clip_start; | ||
341 | extern u8 i2c_y_clip_start; | ||
342 | extern u8 i2c_x_clip_end; | ||
343 | extern u8 i2c_y_clip_end; | ||
344 | extern u8 i2c_ad_addr; | ||
345 | extern u8 i2c_ad_lut; | ||
346 | extern I2C_AD_CMD i2c_ad_cmd; | ||
347 | extern u8 i2c_dig_out; | ||
348 | extern u8 i2c_pm_lut_addr; | ||
349 | extern u8 i2c_pm_lut_data; | ||
350 | |||
351 | /* Functions for Global use */ | ||
352 | |||
353 | /* access 8-bit IIC registers */ | ||
354 | |||
355 | extern int ReadI2C(u8 *lpReg, u_short wIregIndex, u8 *byVal); | ||
356 | extern int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal); | ||
357 | |||
358 | #endif | ||
diff --git a/drivers/staging/dt3155/dt3155_isr.c b/drivers/staging/dt3155/dt3155_isr.c new file mode 100644 index 000000000000..fd7f93d6c33d --- /dev/null +++ b/drivers/staging/dt3155/dt3155_isr.c | |||
@@ -0,0 +1,516 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Jason Lapenta, Scott Smedley, Greg Sharp | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | |||
23 | File: dt3155_isr.c | ||
24 | Purpose: Buffer management routines, and other routines for the ISR | ||
25 | (the actual isr is in dt3155_drv.c) | ||
26 | |||
27 | -- Changes -- | ||
28 | |||
29 | Date Programmer Description of changes made | ||
30 | ------------------------------------------------------------------- | ||
31 | 03-Jul-2000 JML n/a | ||
32 | 02-Apr-2002 SS Mods to make work with separate allocator | ||
33 | module; Merged John Roll's mods to make work with | ||
34 | multiple boards. | ||
35 | 10-Jul-2002 GCS Complete rewrite of setup_buffers to disallow | ||
36 | buffers which span a 4MB boundary. | ||
37 | 24-Jul-2002 SS GPL licence. | ||
38 | 30-Jul-2002 NJC Added support for buffer loop. | ||
39 | 31-Jul-2002 NJC Complete rewrite of buffer management | ||
40 | 02-Aug-2002 NJC Including slab.h instead of malloc.h (no warning). | ||
41 | Also, allocator_init() now returns allocator_max | ||
42 | so cleaned up allocate_buffers() accordingly. | ||
43 | 08-Aug-2005 SS port to 2.6 kernel. | ||
44 | |||
45 | */ | ||
46 | |||
47 | #include <asm/system.h> | ||
48 | #include <linux/slab.h> | ||
49 | #include <linux/sched.h> | ||
50 | #include <linux/types.h> | ||
51 | |||
52 | #include "dt3155.h" | ||
53 | #include "dt3155_drv.h" | ||
54 | #include "dt3155_io.h" | ||
55 | #include "dt3155_isr.h" | ||
56 | #include "allocator.h" | ||
57 | |||
58 | #define FOUR_MB (0x0400000) /* Can't DMA accross a 4MB boundary!*/ | ||
59 | #define UPPER_10_BITS (0x3FF<<22) /* Can't DMA accross a 4MB boundary!*/ | ||
60 | |||
61 | |||
62 | /* Pointer into global structure for handling buffers */ | ||
63 | struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS] = {NULL | ||
64 | #if MAXBOARDS == 2 | ||
65 | , NULL | ||
66 | #endif | ||
67 | }; | ||
68 | |||
69 | /****************************************************************************** | ||
70 | * Simple array based que struct | ||
71 | * | ||
72 | * Some handy functions using the buffering structure. | ||
73 | *****************************************************************************/ | ||
74 | |||
75 | |||
76 | /*************************** | ||
77 | * are_empty_buffers | ||
78 | * m is minor # of device | ||
79 | ***************************/ | ||
80 | inline bool are_empty_buffers( int m ) | ||
81 | { | ||
82 | return ( dt3155_fbuffer[ m ]->empty_len ); | ||
83 | } | ||
84 | |||
85 | /************************** | ||
86 | * push_empty | ||
87 | * m is minor # of device | ||
88 | * | ||
89 | * This is slightly confusing. The number empty_len is the literal # | ||
90 | * of empty buffers. After calling, empty_len-1 is the index into the | ||
91 | * empty buffer stack. So, if empty_len == 1, there is one empty buffer, | ||
92 | * given by dt3155_fbuffer[m]->empty_buffers[0]. | ||
93 | * empty_buffers should never fill up, though this is not checked. | ||
94 | **************************/ | ||
95 | inline void push_empty( int index, int m ) | ||
96 | { | ||
97 | dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ] = index; | ||
98 | dt3155_fbuffer[m]->empty_len++; | ||
99 | } | ||
100 | |||
101 | /************************** | ||
102 | * pop_empty( m ) | ||
103 | * m is minor # of device | ||
104 | **************************/ | ||
105 | inline int pop_empty( int m ) | ||
106 | { | ||
107 | dt3155_fbuffer[m]->empty_len--; | ||
108 | return dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ]; | ||
109 | } | ||
110 | |||
111 | /************************* | ||
112 | * is_ready_buf_empty( m ) | ||
113 | * m is minor # of device | ||
114 | *************************/ | ||
115 | inline bool is_ready_buf_empty( int m ) | ||
116 | { | ||
117 | return ((dt3155_fbuffer[ m ]->ready_len) == 0); | ||
118 | } | ||
119 | |||
120 | /************************* | ||
121 | * is_ready_buf_full( m ) | ||
122 | * m is minor # of device | ||
123 | * this should *never* be true if there are any active, locked or empty | ||
124 | * buffers, since it corresponds to nbuffers ready buffers!! | ||
125 | * 7/31/02: total rewrite. --NJC | ||
126 | *************************/ | ||
127 | inline bool is_ready_buf_full( int m ) | ||
128 | { | ||
129 | return ( dt3155_fbuffer[ m ]->ready_len == dt3155_fbuffer[ m ]->nbuffers ); | ||
130 | } | ||
131 | |||
132 | /***************************************************** | ||
133 | * push_ready( m, buffer ) | ||
134 | * m is minor # of device | ||
135 | * | ||
136 | *****************************************************/ | ||
137 | inline void push_ready( int m, int index ) | ||
138 | { | ||
139 | int head = dt3155_fbuffer[m]->ready_head; | ||
140 | |||
141 | dt3155_fbuffer[ m ]->ready_que[ head ] = index; | ||
142 | dt3155_fbuffer[ m ]->ready_head = ( (head + 1) % | ||
143 | (dt3155_fbuffer[ m ]->nbuffers) ); | ||
144 | dt3155_fbuffer[ m ]->ready_len++; | ||
145 | |||
146 | } | ||
147 | |||
148 | /***************************************************** | ||
149 | * get_tail() | ||
150 | * m is minor # of device | ||
151 | * | ||
152 | * Simply comptutes the tail given the head and the length. | ||
153 | *****************************************************/ | ||
154 | static inline int get_tail( int m ) | ||
155 | { | ||
156 | return ((dt3155_fbuffer[ m ]->ready_head - | ||
157 | dt3155_fbuffer[ m ]->ready_len + | ||
158 | dt3155_fbuffer[ m ]->nbuffers)% | ||
159 | (dt3155_fbuffer[ m ]->nbuffers)); | ||
160 | } | ||
161 | |||
162 | |||
163 | |||
164 | /***************************************************** | ||
165 | * pop_ready() | ||
166 | * m is minor # of device | ||
167 | * | ||
168 | * This assumes that there is a ready buffer ready... should | ||
169 | * be checked (e.g. with is_ready_buf_empty() prior to call. | ||
170 | *****************************************************/ | ||
171 | inline int pop_ready( int m ) | ||
172 | { | ||
173 | int tail; | ||
174 | tail = get_tail(m); | ||
175 | dt3155_fbuffer[ m ]->ready_len--; | ||
176 | return dt3155_fbuffer[ m ]->ready_que[ tail ]; | ||
177 | } | ||
178 | |||
179 | |||
180 | /***************************************************** | ||
181 | * printques | ||
182 | * m is minor # of device | ||
183 | *****************************************************/ | ||
184 | inline void printques( int m ) | ||
185 | { | ||
186 | int head = dt3155_fbuffer[ m ]->ready_head; | ||
187 | int tail; | ||
188 | int num = dt3155_fbuffer[ m ]->nbuffers; | ||
189 | int frame_index; | ||
190 | int index; | ||
191 | |||
192 | tail = get_tail(m); | ||
193 | |||
194 | printk("\n R:"); | ||
195 | for ( index = tail; index != head; index++, index = index % (num) ) | ||
196 | { | ||
197 | frame_index = dt3155_fbuffer[ m ]->ready_que[ index ]; | ||
198 | printk(" %d ", frame_index ); | ||
199 | } | ||
200 | |||
201 | printk("\n E:"); | ||
202 | for ( index = 0; index < dt3155_fbuffer[ m ]->empty_len; index++ ) | ||
203 | { | ||
204 | frame_index = dt3155_fbuffer[ m ]->empty_buffers[ index ]; | ||
205 | printk(" %d ", frame_index ); | ||
206 | } | ||
207 | |||
208 | frame_index = dt3155_fbuffer[ m ]->active_buf; | ||
209 | printk("\n A: %d", frame_index); | ||
210 | |||
211 | frame_index = dt3155_fbuffer[ m ]->locked_buf; | ||
212 | printk("\n L: %d \n", frame_index ); | ||
213 | |||
214 | } | ||
215 | |||
216 | /***************************************************** | ||
217 | * adjust_4MB | ||
218 | * | ||
219 | * If a buffer intersects the 4MB boundary, push | ||
220 | * the start address up to the beginning of the | ||
221 | * next 4MB chunk (assuming bufsize < 4MB). | ||
222 | *****************************************************/ | ||
223 | u32 adjust_4MB (u32 buf_addr, u32 bufsize) { | ||
224 | if (((buf_addr+bufsize) & UPPER_10_BITS) != (buf_addr & UPPER_10_BITS)) | ||
225 | return (buf_addr+bufsize) & UPPER_10_BITS; | ||
226 | else | ||
227 | return buf_addr; | ||
228 | } | ||
229 | |||
230 | |||
231 | /***************************************************** | ||
232 | * allocate_buffers | ||
233 | * | ||
234 | * Try to allocate enough memory for all requested | ||
235 | * buffers. If there is not enough free space | ||
236 | * try for less memory. | ||
237 | *****************************************************/ | ||
238 | void allocate_buffers (u32 *buf_addr, u32* total_size_kbs, | ||
239 | u32 bufsize) | ||
240 | { | ||
241 | /* Compute the minimum amount of memory guaranteed to hold all | ||
242 | MAXBUFFERS such that no buffer crosses the 4MB boundary. | ||
243 | Store this value in the variable "full_size" */ | ||
244 | |||
245 | u32 allocator_max; | ||
246 | u32 bufs_per_chunk = (FOUR_MB / bufsize); | ||
247 | u32 filled_chunks = (MAXBUFFERS-1) / bufs_per_chunk; | ||
248 | u32 leftover_bufs = MAXBUFFERS - filled_chunks * bufs_per_chunk; | ||
249 | |||
250 | u32 full_size = bufsize /* possibly unusable part of 1st chunk */ | ||
251 | + filled_chunks * FOUR_MB /* max # of completely filled 4mb chunks */ | ||
252 | + leftover_bufs * bufsize; /* these buffs will be in a partly filled | ||
253 | chunk at beginning or end */ | ||
254 | |||
255 | u32 full_size_kbs = 1 + (full_size-1) / 1024; | ||
256 | u32 min_size_kbs = 2*ndevices*bufsize / 1024; | ||
257 | u32 size_kbs; | ||
258 | |||
259 | /* Now, try to allocate full_size. If this fails, keep trying for | ||
260 | less & less memory until it succeeds. */ | ||
261 | #ifndef STANDALONE_ALLOCATOR | ||
262 | /* initialize the allocator */ | ||
263 | allocator_init(&allocator_max); | ||
264 | #endif | ||
265 | size_kbs = full_size_kbs; | ||
266 | *buf_addr = 0; | ||
267 | printk("DT3155: We would like to get: %d KB\n", full_size_kbs); | ||
268 | printk("DT3155: ...but need at least: %d KB\n", min_size_kbs); | ||
269 | printk("DT3155: ...the allocator has: %d KB\n", allocator_max); | ||
270 | size_kbs = (full_size_kbs <= allocator_max ? full_size_kbs : allocator_max); | ||
271 | if (size_kbs > min_size_kbs) { | ||
272 | if ((*buf_addr = allocator_allocate_dma (size_kbs, GFP_KERNEL)) != 0) { | ||
273 | printk("DT3155: Managed to allocate: %d KB\n", size_kbs); | ||
274 | *total_size_kbs = size_kbs; | ||
275 | return; | ||
276 | } | ||
277 | } | ||
278 | /* If we got here, the allocation failed */ | ||
279 | printk ("DT3155: Allocator failed!\n"); | ||
280 | *buf_addr = 0; | ||
281 | *total_size_kbs = 0; | ||
282 | return; | ||
283 | |||
284 | } | ||
285 | |||
286 | |||
287 | /***************************************************** | ||
288 | * dt3155_setup_buffers | ||
289 | * | ||
290 | * setup_buffers just puts the buffering system into | ||
291 | * a consistent state before the start of interrupts | ||
292 | * | ||
293 | * JML : it looks like all the buffers need to be | ||
294 | * continuous. So I'm going to try and allocate one | ||
295 | * continuous buffer. | ||
296 | * | ||
297 | * GCS : Fix DMA problems when buffer spans | ||
298 | * 4MB boundary. Also, add error checking. This | ||
299 | * function will return -ENOMEM when not enough memory. | ||
300 | *****************************************************/ | ||
301 | u32 dt3155_setup_buffers(u32 *allocatorAddr) | ||
302 | |||
303 | { | ||
304 | u32 index; | ||
305 | u32 rambuff_addr; /* start of allocation */ | ||
306 | u32 rambuff_size; /* total size allocated to driver */ | ||
307 | u32 rambuff_acm; /* accumlator, keep track of how much | ||
308 | is left after being split up*/ | ||
309 | u32 rambuff_end; /* end of rambuff */ | ||
310 | u32 numbufs; /* number of useful buffers allocated (per device) */ | ||
311 | u32 bufsize = DT3155_MAX_ROWS * DT3155_MAX_COLS; | ||
312 | int m; /* minor # of device, looped for all devs */ | ||
313 | |||
314 | /* zero the fbuffer status and address structure */ | ||
315 | for ( m = 0; m < ndevices; m++) | ||
316 | { | ||
317 | dt3155_fbuffer[ m ] = &(dt3155_status[ m ].fbuffer); | ||
318 | |||
319 | /* Make sure the buffering variables are consistent */ | ||
320 | { | ||
321 | u8 *ptr = (u8 *) dt3155_fbuffer[ m ]; | ||
322 | for( index = 0; index < sizeof(struct dt3155_fbuffer_s); index++) | ||
323 | *(ptr++)=0; | ||
324 | } | ||
325 | } | ||
326 | |||
327 | /* allocate a large contiguous chunk of RAM */ | ||
328 | allocate_buffers (&rambuff_addr, &rambuff_size, bufsize); | ||
329 | printk("DT3155: mem info\n"); | ||
330 | printk(" - rambuf_addr = 0x%x \n", rambuff_addr); | ||
331 | printk(" - length (kb) = %u \n", rambuff_size); | ||
332 | if( rambuff_addr == 0 ) | ||
333 | { | ||
334 | printk( KERN_INFO | ||
335 | "DT3155: Error setup_buffers() allocator dma failed \n" ); | ||
336 | return -ENOMEM; | ||
337 | } | ||
338 | *allocatorAddr = rambuff_addr; | ||
339 | rambuff_end = rambuff_addr + 1024 * rambuff_size; | ||
340 | |||
341 | /* after allocation, we need to count how many useful buffers there | ||
342 | are so we can give an equal number to each device */ | ||
343 | rambuff_acm = rambuff_addr; | ||
344 | for ( index = 0; index < MAXBUFFERS; index++) { | ||
345 | rambuff_acm = adjust_4MB (rambuff_acm, bufsize);/*avoid spanning 4MB bdry*/ | ||
346 | if (rambuff_acm + bufsize > rambuff_end) | ||
347 | break; | ||
348 | rambuff_acm += bufsize; | ||
349 | } | ||
350 | /* Following line is OK, will waste buffers if index | ||
351 | * not evenly divisible by ndevices -NJC*/ | ||
352 | numbufs = index / ndevices; | ||
353 | printk(" - numbufs = %u\n", numbufs); | ||
354 | if (numbufs < 2) { | ||
355 | printk( KERN_INFO | ||
356 | "DT3155: Error setup_buffers() couldn't allocate 2 bufs/board\n" ); | ||
357 | return -ENOMEM; | ||
358 | } | ||
359 | |||
360 | /* now that we have board memory we spit it up */ | ||
361 | /* between the boards and the buffers */ | ||
362 | rambuff_acm = rambuff_addr; | ||
363 | for ( m = 0; m < ndevices; m ++) | ||
364 | { | ||
365 | rambuff_acm = adjust_4MB (rambuff_acm, bufsize); | ||
366 | |||
367 | /* Save the start of this boards buffer space (for mmap). */ | ||
368 | dt3155_status[ m ].mem_addr = rambuff_acm; | ||
369 | |||
370 | for (index = 0; index < numbufs; index++) | ||
371 | { | ||
372 | rambuff_acm = adjust_4MB (rambuff_acm, bufsize); | ||
373 | if (rambuff_acm + bufsize > rambuff_end) { | ||
374 | /* Should never happen */ | ||
375 | printk ("DT3155 PROGRAM ERROR (GCS)\n" | ||
376 | "Error distributing allocated buffers\n"); | ||
377 | return -ENOMEM; | ||
378 | } | ||
379 | |||
380 | dt3155_fbuffer[ m ]->frame_info[ index ].addr = rambuff_acm; | ||
381 | push_empty( index, m ); | ||
382 | /* printk(" - Buffer : %lx\n", | ||
383 | * dt3155_fbuffer[ m ]->frame_info[ index ].addr ); | ||
384 | */ | ||
385 | dt3155_fbuffer[ m ]->nbuffers += 1; | ||
386 | rambuff_acm += bufsize; | ||
387 | } | ||
388 | |||
389 | /* Make sure there is an active buffer there. */ | ||
390 | dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); | ||
391 | dt3155_fbuffer[ m ]->even_happened = 0; | ||
392 | dt3155_fbuffer[ m ]->even_stopped = 0; | ||
393 | |||
394 | /* make sure there is no locked_buf JML 2/28/00 */ | ||
395 | dt3155_fbuffer[ m ]->locked_buf = -1; | ||
396 | |||
397 | dt3155_status[ m ].mem_size = | ||
398 | rambuff_acm - dt3155_status[ m ].mem_addr; | ||
399 | |||
400 | /* setup the ready queue */ | ||
401 | dt3155_fbuffer[ m ]->ready_head = 0; | ||
402 | dt3155_fbuffer[ m ]->ready_len = 0; | ||
403 | printk("Available buffers for device %d: %d\n", | ||
404 | m, dt3155_fbuffer[ m ]->nbuffers); | ||
405 | } | ||
406 | |||
407 | return 1; | ||
408 | } | ||
409 | |||
410 | /***************************************************** | ||
411 | * internal_release_locked_buffer | ||
412 | * | ||
413 | * The internal function for releasing a locked buffer. | ||
414 | * It assumes interrupts are turned off. | ||
415 | * | ||
416 | * m is minor number of device | ||
417 | *****************************************************/ | ||
418 | static inline void internal_release_locked_buffer( int m ) | ||
419 | { | ||
420 | /* Pointer into global structure for handling buffers */ | ||
421 | if ( dt3155_fbuffer[ m ]->locked_buf >= 0 ) | ||
422 | { | ||
423 | push_empty( dt3155_fbuffer[ m ]->locked_buf, m ); | ||
424 | dt3155_fbuffer[ m ]->locked_buf = -1; | ||
425 | } | ||
426 | } | ||
427 | |||
428 | |||
429 | /***************************************************** | ||
430 | * dt3155_release_locked_buffer() | ||
431 | * m is minor # of device | ||
432 | * | ||
433 | * The user function of the above. | ||
434 | * | ||
435 | *****************************************************/ | ||
436 | inline void dt3155_release_locked_buffer( int m ) | ||
437 | { | ||
438 | unsigned long int flags; | ||
439 | local_save_flags(flags); | ||
440 | local_irq_disable(); | ||
441 | internal_release_locked_buffer(m); | ||
442 | local_irq_restore(flags); | ||
443 | } | ||
444 | |||
445 | |||
446 | /***************************************************** | ||
447 | * dt3155_flush() | ||
448 | * m is minor # of device | ||
449 | * | ||
450 | *****************************************************/ | ||
451 | inline int dt3155_flush( int m ) | ||
452 | { | ||
453 | int index; | ||
454 | unsigned long int flags; | ||
455 | local_save_flags(flags); | ||
456 | local_irq_disable(); | ||
457 | |||
458 | internal_release_locked_buffer( m ); | ||
459 | dt3155_fbuffer[ m ]->empty_len = 0; | ||
460 | |||
461 | for ( index = 0; index < dt3155_fbuffer[ m ]->nbuffers; index++ ) | ||
462 | push_empty( index, m ); | ||
463 | |||
464 | /* Make sure there is an active buffer there. */ | ||
465 | dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); | ||
466 | |||
467 | dt3155_fbuffer[ m ]->even_happened = 0; | ||
468 | dt3155_fbuffer[ m ]->even_stopped = 0; | ||
469 | |||
470 | /* setup the ready queue */ | ||
471 | dt3155_fbuffer[ m ]->ready_head = 0; | ||
472 | dt3155_fbuffer[ m ]->ready_len = 0; | ||
473 | |||
474 | local_irq_restore(flags); | ||
475 | |||
476 | return 0; | ||
477 | } | ||
478 | |||
479 | /***************************************************** | ||
480 | * dt3155_get_ready_buffer() | ||
481 | * m is minor # of device | ||
482 | * | ||
483 | * get_ready_buffer will grab the next chunk of data | ||
484 | * if it is already there, otherwise it returns 0. | ||
485 | * If the user has a buffer locked it will unlock | ||
486 | * that buffer before returning the new one. | ||
487 | *****************************************************/ | ||
488 | inline int dt3155_get_ready_buffer( int m ) | ||
489 | { | ||
490 | int frame_index; | ||
491 | unsigned long int flags; | ||
492 | local_save_flags(flags); | ||
493 | local_irq_disable(); | ||
494 | |||
495 | #ifdef DEBUG_QUES_A | ||
496 | printques( m ); | ||
497 | #endif | ||
498 | |||
499 | internal_release_locked_buffer( m ); | ||
500 | |||
501 | if (is_ready_buf_empty( m )) | ||
502 | frame_index = -1; | ||
503 | else | ||
504 | { | ||
505 | frame_index = pop_ready( m ); | ||
506 | dt3155_fbuffer[ m ]->locked_buf = frame_index; | ||
507 | } | ||
508 | |||
509 | #ifdef DEBUG_QUES_B | ||
510 | printques( m ); | ||
511 | #endif | ||
512 | |||
513 | local_irq_restore(flags); | ||
514 | |||
515 | return frame_index; | ||
516 | } | ||
diff --git a/drivers/staging/dt3155/dt3155_isr.h b/drivers/staging/dt3155/dt3155_isr.h new file mode 100644 index 000000000000..7595cb16c988 --- /dev/null +++ b/drivers/staging/dt3155/dt3155_isr.h | |||
@@ -0,0 +1,77 @@ | |||
1 | /* | ||
2 | |||
3 | Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, | ||
4 | Jason Lapenta, Scott Smedley | ||
5 | |||
6 | This file is part of the DT3155 Device Driver. | ||
7 | |||
8 | The DT3155 Device Driver is free software; you can redistribute it | ||
9 | and/or modify it under the terms of the GNU General Public License as | ||
10 | published by the Free Software Foundation; either version 2 of the | ||
11 | License, or (at your option) any later version. | ||
12 | |||
13 | The DT3155 Device Driver is distributed in the hope that it will be | ||
14 | useful, but WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with the DT3155 Device Driver; if not, write to the Free | ||
20 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
21 | MA 02111-1307 USA | ||
22 | |||
23 | |||
24 | -- Changes -- | ||
25 | |||
26 | Date Programmer Description of changes made | ||
27 | ------------------------------------------------------------------- | ||
28 | 03-Jul-2000 JML n/a | ||
29 | 24-Jul-2002 SS GPL licence. | ||
30 | 26-Oct-2009 SS Porting to 2.6.30 kernel. | ||
31 | |||
32 | -- notes -- | ||
33 | |||
34 | */ | ||
35 | |||
36 | #ifndef DT3155_ISR_H | ||
37 | #define DT3155_ISR_H | ||
38 | |||
39 | extern struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS]; | ||
40 | |||
41 | /* User functions for buffering */ | ||
42 | /* Initialize the buffering system. This should */ | ||
43 | /* be called prior to enabling interrupts */ | ||
44 | |||
45 | u32 dt3155_setup_buffers(u32 *allocatorAddr); | ||
46 | |||
47 | /* Get the next frame of data if it is ready. Returns */ | ||
48 | /* zero if no data is ready. If there is data but */ | ||
49 | /* the user has a locked buffer, it will unlock that */ | ||
50 | /* buffer and return it to the free list. */ | ||
51 | |||
52 | int dt3155_get_ready_buffer(int minor); | ||
53 | |||
54 | /* Return a locked buffer to the free list */ | ||
55 | |||
56 | void dt3155_release_locked_buffer(int minor); | ||
57 | |||
58 | /* Flush the buffer system */ | ||
59 | int dt3155_flush(int minor); | ||
60 | |||
61 | /********************************** | ||
62 | * Simple array based que struct | ||
63 | **********************************/ | ||
64 | |||
65 | bool are_empty_buffers(int minor); | ||
66 | void push_empty(int index, int minor); | ||
67 | |||
68 | int pop_empty(int minor); | ||
69 | |||
70 | bool is_ready_buf_empty(int minor); | ||
71 | bool is_ready_buf_full(int minor); | ||
72 | |||
73 | void push_ready(int minor, int index); | ||
74 | int pop_ready(int minor); | ||
75 | |||
76 | |||
77 | #endif | ||
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h index e715e4dcb523..ea746ba41faf 100644 --- a/drivers/staging/et131x/et1310_address_map.h +++ b/drivers/staging/et131x/et1310_address_map.h | |||
@@ -149,7 +149,7 @@ | |||
149 | * GLOBAL Module of JAGCore Address Mapping | 149 | * GLOBAL Module of JAGCore Address Mapping |
150 | * Located at address 0x0000 | 150 | * Located at address 0x0000 |
151 | */ | 151 | */ |
152 | typedef struct _GLOBAL_t { /* Location: */ | 152 | struct global_regs { /* Location: */ |
153 | u32 txq_start_addr; /* 0x0000 */ | 153 | u32 txq_start_addr; /* 0x0000 */ |
154 | u32 txq_end_addr; /* 0x0004 */ | 154 | u32 txq_end_addr; /* 0x0004 */ |
155 | u32 rxq_start_addr; /* 0x0008 */ | 155 | u32 rxq_start_addr; /* 0x0008 */ |
@@ -165,9 +165,7 @@ typedef struct _GLOBAL_t { /* Location: */ | |||
165 | u32 msi_config; /* 0x0030 */ | 165 | u32 msi_config; /* 0x0030 */ |
166 | u32 loopback; /* 0x0034 */ | 166 | u32 loopback; /* 0x0034 */ |
167 | u32 watchdog_timer; /* 0x0038 */ | 167 | u32 watchdog_timer; /* 0x0038 */ |
168 | } GLOBAL_t, *PGLOBAL_t; | 168 | }; |
169 | |||
170 | /* END OF GLOBAL REGISTER ADDRESS MAP */ | ||
171 | 169 | ||
172 | 170 | ||
173 | /* START OF TXDMA REGISTER ADDRESS MAP */ | 171 | /* START OF TXDMA REGISTER ADDRESS MAP */ |
@@ -255,7 +253,7 @@ extern inline void add_12bit(u32 *v, int n) | |||
255 | * Tx DMA Module of JAGCore Address Mapping | 253 | * Tx DMA Module of JAGCore Address Mapping |
256 | * Located at address 0x1000 | 254 | * Located at address 0x1000 |
257 | */ | 255 | */ |
258 | typedef struct _TXDMA_t { /* Location: */ | 256 | struct txdma_regs { /* Location: */ |
259 | u32 csr; /* 0x1000 */ | 257 | u32 csr; /* 0x1000 */ |
260 | u32 pr_base_hi; /* 0x1004 */ | 258 | u32 pr_base_hi; /* 0x1004 */ |
261 | u32 pr_base_lo; /* 0x1008 */ | 259 | u32 pr_base_lo; /* 0x1008 */ |
@@ -282,7 +280,7 @@ typedef struct _TXDMA_t { /* Location: */ | |||
282 | u32 DroppedTLPCount; /* 0x105c */ | 280 | u32 DroppedTLPCount; /* 0x105c */ |
283 | u32 NewServiceComplete; /* 0x1060 */ | 281 | u32 NewServiceComplete; /* 0x1060 */ |
284 | u32 EthernetPacketCount; /* 0x1064 */ | 282 | u32 EthernetPacketCount; /* 0x1064 */ |
285 | } TXDMA_t, *PTXDMA_t; | 283 | }; |
286 | 284 | ||
287 | /* END OF TXDMA REGISTER ADDRESS MAP */ | 285 | /* END OF TXDMA REGISTER ADDRESS MAP */ |
288 | 286 | ||
@@ -292,45 +290,25 @@ typedef struct _TXDMA_t { /* Location: */ | |||
292 | /* | 290 | /* |
293 | * structure for control status reg in rxdma address map | 291 | * structure for control status reg in rxdma address map |
294 | * Located at address 0x2000 | 292 | * Located at address 0x2000 |
293 | * | ||
294 | * CSR | ||
295 | * 0: halt | ||
296 | * 1-3: tc | ||
297 | * 4: fbr_big_endian | ||
298 | * 5: psr_big_endian | ||
299 | * 6: pkt_big_endian | ||
300 | * 7: dma_big_endian | ||
301 | * 8-9: fbr0_size | ||
302 | * 10: fbr0_enable | ||
303 | * 11-12: fbr1_size | ||
304 | * 13: fbr1_enable | ||
305 | * 14: unused | ||
306 | * 15: pkt_drop_disable | ||
307 | * 16: pkt_done_flush | ||
308 | * 17: halt_status | ||
309 | * 18-31: unused | ||
295 | */ | 310 | */ |
296 | typedef union _RXDMA_CSR_t { | 311 | |
297 | u32 value; | ||
298 | struct { | ||
299 | #ifdef _BIT_FIELDS_HTOL | ||
300 | u32 unused2:14; /* bits 18-31 */ | ||
301 | u32 halt_status:1; /* bit 17 */ | ||
302 | u32 pkt_done_flush:1; /* bit 16 */ | ||
303 | u32 pkt_drop_disable:1; /* bit 15 */ | ||
304 | u32 unused1:1; /* bit 14 */ | ||
305 | u32 fbr1_enable:1; /* bit 13 */ | ||
306 | u32 fbr1_size:2; /* bits 11-12 */ | ||
307 | u32 fbr0_enable:1; /* bit 10 */ | ||
308 | u32 fbr0_size:2; /* bits 8-9 */ | ||
309 | u32 dma_big_endian:1; /* bit 7 */ | ||
310 | u32 pkt_big_endian:1; /* bit 6 */ | ||
311 | u32 psr_big_endian:1; /* bit 5 */ | ||
312 | u32 fbr_big_endian:1; /* bit 4 */ | ||
313 | u32 tc:3; /* bits 1-3 */ | ||
314 | u32 halt:1; /* bit 0 */ | ||
315 | #else | ||
316 | u32 halt:1; /* bit 0 */ | ||
317 | u32 tc:3; /* bits 1-3 */ | ||
318 | u32 fbr_big_endian:1; /* bit 4 */ | ||
319 | u32 psr_big_endian:1; /* bit 5 */ | ||
320 | u32 pkt_big_endian:1; /* bit 6 */ | ||
321 | u32 dma_big_endian:1; /* bit 7 */ | ||
322 | u32 fbr0_size:2; /* bits 8-9 */ | ||
323 | u32 fbr0_enable:1; /* bit 10 */ | ||
324 | u32 fbr1_size:2; /* bits 11-12 */ | ||
325 | u32 fbr1_enable:1; /* bit 13 */ | ||
326 | u32 unused1:1; /* bit 14 */ | ||
327 | u32 pkt_drop_disable:1; /* bit 15 */ | ||
328 | u32 pkt_done_flush:1; /* bit 16 */ | ||
329 | u32 halt_status:1; /* bit 17 */ | ||
330 | u32 unused2:14; /* bits 18-31 */ | ||
331 | #endif | ||
332 | } bits; | ||
333 | } RXDMA_CSR_t, *PRXDMA_CSR_t; | ||
334 | 312 | ||
335 | /* | 313 | /* |
336 | * structure for dma writeback lo reg in rxdma address map | 314 | * structure for dma writeback lo reg in rxdma address map |
@@ -451,18 +429,6 @@ typedef union _RXDMA_CSR_t { | |||
451 | * 31-10: unused | 429 | * 31-10: unused |
452 | * 9-0: fbr ndesc | 430 | * 9-0: fbr ndesc |
453 | */ | 431 | */ |
454 | typedef union _RXDMA_FBR_NUM_DES_t { | ||
455 | u32 value; | ||
456 | struct { | ||
457 | #ifdef _BIT_FIELDS_HTOL | ||
458 | u32 unused:22; /* bits 10-31 */ | ||
459 | u32 fbr_ndesc:10; /* bits 0-9 */ | ||
460 | #else | ||
461 | u32 fbr_ndesc:10; /* bits 0-9 */ | ||
462 | u32 unused:22; /* bits 10-31 */ | ||
463 | #endif | ||
464 | } bits; | ||
465 | } RXDMA_FBR_NUM_DES_t, *PRXDMA_FBR_NUM_DES_t; | ||
466 | 432 | ||
467 | /* | 433 | /* |
468 | * structure for free buffer ring 0 available offset reg in rxdma address map | 434 | * structure for free buffer ring 0 available offset reg in rxdma address map |
@@ -532,8 +498,8 @@ typedef union _RXDMA_FBR_NUM_DES_t { | |||
532 | * Rx DMA Module of JAGCore Address Mapping | 498 | * Rx DMA Module of JAGCore Address Mapping |
533 | * Located at address 0x2000 | 499 | * Located at address 0x2000 |
534 | */ | 500 | */ |
535 | typedef struct _RXDMA_t { /* Location: */ | 501 | struct rxdma_regs { /* Location: */ |
536 | RXDMA_CSR_t csr; /* 0x2000 */ | 502 | u32 csr; /* 0x2000 */ |
537 | u32 dma_wb_base_lo; /* 0x2004 */ | 503 | u32 dma_wb_base_lo; /* 0x2004 */ |
538 | u32 dma_wb_base_hi; /* 0x2008 */ | 504 | u32 dma_wb_base_hi; /* 0x2008 */ |
539 | u32 num_pkt_done; /* 0x200C */ | 505 | u32 num_pkt_done; /* 0x200C */ |
@@ -562,7 +528,7 @@ typedef struct _RXDMA_t { /* Location: */ | |||
562 | u32 fbr1_full_offset; /* 0x2068 */ | 528 | u32 fbr1_full_offset; /* 0x2068 */ |
563 | u32 fbr1_rd_index; /* 0x206C */ | 529 | u32 fbr1_rd_index; /* 0x206C */ |
564 | u32 fbr1_min_des; /* 0x2070 */ | 530 | u32 fbr1_min_des; /* 0x2070 */ |
565 | } RXDMA_t, *PRXDMA_t; | 531 | }; |
566 | 532 | ||
567 | /* END OF RXDMA REGISTER ADDRESS MAP */ | 533 | /* END OF RXDMA REGISTER ADDRESS MAP */ |
568 | 534 | ||
@@ -572,33 +538,18 @@ typedef struct _RXDMA_t { /* Location: */ | |||
572 | /* | 538 | /* |
573 | * structure for control reg in txmac address map | 539 | * structure for control reg in txmac address map |
574 | * located at address 0x3000 | 540 | * located at address 0x3000 |
541 | * | ||
542 | * bits | ||
543 | * 31-8: unused | ||
544 | * 7: cklseg_disable | ||
545 | * 6: ckbcnt_disable | ||
546 | * 5: cksegnum | ||
547 | * 4: async_disable | ||
548 | * 3: fc_disable | ||
549 | * 2: mcif_disable | ||
550 | * 1: mif_disable | ||
551 | * 0: txmac_en | ||
575 | */ | 552 | */ |
576 | typedef union _TXMAC_CTL_t { | ||
577 | u32 value; | ||
578 | struct { | ||
579 | #ifdef _BIT_FIELDS_HTOL | ||
580 | u32 unused:24; /* bits 8-31 */ | ||
581 | u32 cklseg_diable:1; /* bit 7 */ | ||
582 | u32 ckbcnt_disable:1; /* bit 6 */ | ||
583 | u32 cksegnum:1; /* bit 5 */ | ||
584 | u32 async_disable:1; /* bit 4 */ | ||
585 | u32 fc_disable:1; /* bit 3 */ | ||
586 | u32 mcif_disable:1; /* bit 2 */ | ||
587 | u32 mif_disable:1; /* bit 1 */ | ||
588 | u32 txmac_en:1; /* bit 0 */ | ||
589 | #else | ||
590 | u32 txmac_en:1; /* bit 0 */ | ||
591 | u32 mif_disable:1; /* bit 1 mac interface */ | ||
592 | u32 mcif_disable:1; /* bit 2 mem. contr. interface */ | ||
593 | u32 fc_disable:1; /* bit 3 */ | ||
594 | u32 async_disable:1; /* bit 4 */ | ||
595 | u32 cksegnum:1; /* bit 5 */ | ||
596 | u32 ckbcnt_disable:1; /* bit 6 */ | ||
597 | u32 cklseg_diable:1; /* bit 7 */ | ||
598 | u32 unused:24; /* bits 8-31 */ | ||
599 | #endif | ||
600 | } bits; | ||
601 | } TXMAC_CTL_t, *PTXMAC_CTL_t; | ||
602 | 553 | ||
603 | /* | 554 | /* |
604 | * structure for shadow pointer reg in txmac address map | 555 | * structure for shadow pointer reg in txmac address map |
@@ -612,23 +563,12 @@ typedef union _TXMAC_CTL_t { | |||
612 | /* | 563 | /* |
613 | * structure for error count reg in txmac address map | 564 | * structure for error count reg in txmac address map |
614 | * located at address 0x3008 | 565 | * located at address 0x3008 |
566 | * | ||
567 | * 31-12: unused | ||
568 | * 11-8: reserved | ||
569 | * 7-4: txq_underrun | ||
570 | * 3-0: fifo_underrun | ||
615 | */ | 571 | */ |
616 | typedef union _TXMAC_ERR_CNT_t { | ||
617 | u32 value; | ||
618 | struct { | ||
619 | #ifdef _BIT_FIELDS_HTOL | ||
620 | u32 unused:20; /* bits 12-31 */ | ||
621 | u32 reserved:4; /* bits 8-11 */ | ||
622 | u32 txq_underrun:4; /* bits 4-7 */ | ||
623 | u32 fifo_underrun:4; /* bits 0-3 */ | ||
624 | #else | ||
625 | u32 fifo_underrun:4; /* bits 0-3 */ | ||
626 | u32 txq_underrun:4; /* bits 4-7 */ | ||
627 | u32 reserved:4; /* bits 8-11 */ | ||
628 | u32 unused:20; /* bits 12-31 */ | ||
629 | #endif | ||
630 | } bits; | ||
631 | } TXMAC_ERR_CNT_t, *PTXMAC_ERR_CNT_t; | ||
632 | 572 | ||
633 | /* | 573 | /* |
634 | * structure for max fill reg in txmac address map | 574 | * structure for max fill reg in txmac address map |
@@ -657,64 +597,32 @@ typedef union _TXMAC_ERR_CNT_t { | |||
657 | /* | 597 | /* |
658 | * structure for error reg in txmac address map | 598 | * structure for error reg in txmac address map |
659 | * located at address 0x3018 | 599 | * located at address 0x3018 |
600 | * | ||
601 | * 31-9: unused | ||
602 | * 8: fifo_underrun | ||
603 | * 7-6: unused | ||
604 | * 5: ctrl2_err | ||
605 | * 4: txq_underrun | ||
606 | * 3: bcnt_err | ||
607 | * 2: lseg_err | ||
608 | * 1: segnum_err | ||
609 | * 0: seg0_err | ||
660 | */ | 610 | */ |
661 | typedef union _TXMAC_ERR_t { | ||
662 | u32 value; | ||
663 | struct { | ||
664 | #ifdef _BIT_FIELDS_HTOL | ||
665 | u32 unused2:23; /* bits 9-31 */ | ||
666 | u32 fifo_underrun:1; /* bit 8 */ | ||
667 | u32 unused1:2; /* bits 6-7 */ | ||
668 | u32 ctrl2_err:1; /* bit 5 */ | ||
669 | u32 txq_underrun:1; /* bit 4 */ | ||
670 | u32 bcnt_err:1; /* bit 3 */ | ||
671 | u32 lseg_err:1; /* bit 2 */ | ||
672 | u32 segnum_err:1; /* bit 1 */ | ||
673 | u32 seg0_err:1; /* bit 0 */ | ||
674 | #else | ||
675 | u32 seg0_err:1; /* bit 0 */ | ||
676 | u32 segnum_err:1; /* bit 1 */ | ||
677 | u32 lseg_err:1; /* bit 2 */ | ||
678 | u32 bcnt_err:1; /* bit 3 */ | ||
679 | u32 txq_underrun:1; /* bit 4 */ | ||
680 | u32 ctrl2_err:1; /* bit 5 */ | ||
681 | u32 unused1:2; /* bits 6-7 */ | ||
682 | u32 fifo_underrun:1; /* bit 8 */ | ||
683 | u32 unused2:23; /* bits 9-31 */ | ||
684 | #endif | ||
685 | } bits; | ||
686 | } TXMAC_ERR_t, *PTXMAC_ERR_t; | ||
687 | 611 | ||
688 | /* | 612 | /* |
689 | * structure for error interrupt reg in txmac address map | 613 | * structure for error interrupt reg in txmac address map |
690 | * located at address 0x301C | 614 | * located at address 0x301C |
615 | * | ||
616 | * 31-9: unused | ||
617 | * 8: fifo_underrun | ||
618 | * 7-6: unused | ||
619 | * 5: ctrl2_err | ||
620 | * 4: txq_underrun | ||
621 | * 3: bcnt_err | ||
622 | * 2: lseg_err | ||
623 | * 1: segnum_err | ||
624 | * 0: seg0_err | ||
691 | */ | 625 | */ |
692 | typedef union _TXMAC_ERR_INT_t { | ||
693 | u32 value; | ||
694 | struct { | ||
695 | #ifdef _BIT_FIELDS_HTOL | ||
696 | u32 unused2:23; /* bits 9-31 */ | ||
697 | u32 fifo_underrun:1; /* bit 8 */ | ||
698 | u32 unused1:2; /* bits 6-7 */ | ||
699 | u32 ctrl2_err:1; /* bit 5 */ | ||
700 | u32 txq_underrun:1; /* bit 4 */ | ||
701 | u32 bcnt_err:1; /* bit 3 */ | ||
702 | u32 lseg_err:1; /* bit 2 */ | ||
703 | u32 segnum_err:1; /* bit 1 */ | ||
704 | u32 seg0_err:1; /* bit 0 */ | ||
705 | #else | ||
706 | u32 seg0_err:1; /* bit 0 */ | ||
707 | u32 segnum_err:1; /* bit 1 */ | ||
708 | u32 lseg_err:1; /* bit 2 */ | ||
709 | u32 bcnt_err:1; /* bit 3 */ | ||
710 | u32 txq_underrun:1; /* bit 4 */ | ||
711 | u32 ctrl2_err:1; /* bit 5 */ | ||
712 | u32 unused1:2; /* bits 6-7 */ | ||
713 | u32 fifo_underrun:1; /* bit 8 */ | ||
714 | u32 unused2:23; /* bits 9-31 */ | ||
715 | #endif | ||
716 | } bits; | ||
717 | } TXMAC_ERR_INT_t, *PTXMAC_ERR_INT_t; | ||
718 | 626 | ||
719 | /* | 627 | /* |
720 | * structure for error interrupt reg in txmac address map | 628 | * structure for error interrupt reg in txmac address map |
@@ -728,17 +636,17 @@ typedef union _TXMAC_ERR_INT_t { | |||
728 | /* | 636 | /* |
729 | * Tx MAC Module of JAGCore Address Mapping | 637 | * Tx MAC Module of JAGCore Address Mapping |
730 | */ | 638 | */ |
731 | typedef struct _TXMAC_t { /* Location: */ | 639 | struct txmac_regs { /* Location: */ |
732 | TXMAC_CTL_t ctl; /* 0x3000 */ | 640 | u32 ctl; /* 0x3000 */ |
733 | u32 shadow_ptr; /* 0x3004 */ | 641 | u32 shadow_ptr; /* 0x3004 */ |
734 | TXMAC_ERR_CNT_t err_cnt; /* 0x3008 */ | 642 | u32 err_cnt; /* 0x3008 */ |
735 | u32 max_fill; /* 0x300C */ | 643 | u32 max_fill; /* 0x300C */ |
736 | u32 cf_param; /* 0x3010 */ | 644 | u32 cf_param; /* 0x3010 */ |
737 | u32 tx_test; /* 0x3014 */ | 645 | u32 tx_test; /* 0x3014 */ |
738 | TXMAC_ERR_t err; /* 0x3018 */ | 646 | u32 err; /* 0x3018 */ |
739 | TXMAC_ERR_INT_t err_int; /* 0x301C */ | 647 | u32 err_int; /* 0x301C */ |
740 | u32 bp_ctrl; /* 0x3020 */ | 648 | u32 bp_ctrl; /* 0x3020 */ |
741 | } TXMAC_t, *PTXMAC_t; | 649 | }; |
742 | 650 | ||
743 | /* END OF TXMAC REGISTER ADDRESS MAP */ | 651 | /* END OF TXMAC REGISTER ADDRESS MAP */ |
744 | 652 | ||
@@ -747,106 +655,47 @@ typedef struct _TXMAC_t { /* Location: */ | |||
747 | /* | 655 | /* |
748 | * structure for rxmac control reg in rxmac address map | 656 | * structure for rxmac control reg in rxmac address map |
749 | * located at address 0x4000 | 657 | * located at address 0x4000 |
658 | * | ||
659 | * 31-7: reserved | ||
660 | * 6: rxmac_int_disable | ||
661 | * 5: async_disable | ||
662 | * 4: mif_disable | ||
663 | * 3: wol_disable | ||
664 | * 2: pkt_filter_disable | ||
665 | * 1: mcif_disable | ||
666 | * 0: rxmac_en | ||
750 | */ | 667 | */ |
751 | typedef union _RXMAC_CTRL_t { | ||
752 | u32 value; | ||
753 | struct { | ||
754 | #ifdef _BIT_FIELDS_HTOL | ||
755 | u32 reserved:25; /* bits 7-31 */ | ||
756 | u32 rxmac_int_disable:1; /* bit 6 */ | ||
757 | u32 async_disable:1; /* bit 5 */ | ||
758 | u32 mif_disable:1; /* bit 4 */ | ||
759 | u32 wol_disable:1; /* bit 3 */ | ||
760 | u32 pkt_filter_disable:1; /* bit 2 */ | ||
761 | u32 mcif_disable:1; /* bit 1 */ | ||
762 | u32 rxmac_en:1; /* bit 0 */ | ||
763 | #else | ||
764 | u32 rxmac_en:1; /* bit 0 */ | ||
765 | u32 mcif_disable:1; /* bit 1 */ | ||
766 | u32 pkt_filter_disable:1; /* bit 2 */ | ||
767 | u32 wol_disable:1; /* bit 3 */ | ||
768 | u32 mif_disable:1; /* bit 4 */ | ||
769 | u32 async_disable:1; /* bit 5 */ | ||
770 | u32 rxmac_int_disable:1; /* bit 6 */ | ||
771 | u32 reserved:25; /* bits 7-31 */ | ||
772 | #endif | ||
773 | } bits; | ||
774 | } RXMAC_CTRL_t, *PRXMAC_CTRL_t; | ||
775 | 668 | ||
776 | /* | 669 | /* |
777 | * structure for Wake On Lan Control and CRC 0 reg in rxmac address map | 670 | * structure for Wake On Lan Control and CRC 0 reg in rxmac address map |
778 | * located at address 0x4004 | 671 | * located at address 0x4004 |
672 | * 31-16: crc | ||
673 | * 15-12: reserved | ||
674 | * 11: ignore_pp | ||
675 | * 10: ignore_mp | ||
676 | * 9: clr_intr | ||
677 | * 8: ignore_link_chg | ||
678 | * 7: ignore_uni | ||
679 | * 6: ignore_multi | ||
680 | * 5: ignore_broad | ||
681 | * 4-0: valid_crc 4-0 | ||
779 | */ | 682 | */ |
780 | typedef union _RXMAC_WOL_CTL_CRC0_t { | ||
781 | u32 value; | ||
782 | struct { | ||
783 | #ifdef _BIT_FIELDS_HTOL | ||
784 | u32 crc0:16; /* bits 16-31 */ | ||
785 | u32 reserve:4; /* bits 12-15 */ | ||
786 | u32 ignore_pp:1; /* bit 11 */ | ||
787 | u32 ignore_mp:1; /* bit 10 */ | ||
788 | u32 clr_intr:1; /* bit 9 */ | ||
789 | u32 ignore_link_chg:1; /* bit 8 */ | ||
790 | u32 ignore_uni:1; /* bit 7 */ | ||
791 | u32 ignore_multi:1; /* bit 6 */ | ||
792 | u32 ignore_broad:1; /* bit 5 */ | ||
793 | u32 valid_crc4:1; /* bit 4 */ | ||
794 | u32 valid_crc3:1; /* bit 3 */ | ||
795 | u32 valid_crc2:1; /* bit 2 */ | ||
796 | u32 valid_crc1:1; /* bit 1 */ | ||
797 | u32 valid_crc0:1; /* bit 0 */ | ||
798 | #else | ||
799 | u32 valid_crc0:1; /* bit 0 */ | ||
800 | u32 valid_crc1:1; /* bit 1 */ | ||
801 | u32 valid_crc2:1; /* bit 2 */ | ||
802 | u32 valid_crc3:1; /* bit 3 */ | ||
803 | u32 valid_crc4:1; /* bit 4 */ | ||
804 | u32 ignore_broad:1; /* bit 5 */ | ||
805 | u32 ignore_multi:1; /* bit 6 */ | ||
806 | u32 ignore_uni:1; /* bit 7 */ | ||
807 | u32 ignore_link_chg:1; /* bit 8 */ | ||
808 | u32 clr_intr:1; /* bit 9 */ | ||
809 | u32 ignore_mp:1; /* bit 10 */ | ||
810 | u32 ignore_pp:1; /* bit 11 */ | ||
811 | u32 reserve:4; /* bits 12-15 */ | ||
812 | u32 crc0:16; /* bits 16-31 */ | ||
813 | #endif | ||
814 | } bits; | ||
815 | } RXMAC_WOL_CTL_CRC0_t, *PRXMAC_WOL_CTL_CRC0_t; | ||
816 | 683 | ||
817 | /* | 684 | /* |
818 | * structure for CRC 1 and CRC 2 reg in rxmac address map | 685 | * structure for CRC 1 and CRC 2 reg in rxmac address map |
819 | * located at address 0x4008 | 686 | * located at address 0x4008 |
687 | * | ||
688 | * 31-16: crc2 | ||
689 | * 15-0: crc1 | ||
820 | */ | 690 | */ |
821 | typedef union _RXMAC_WOL_CRC12_t { | ||
822 | u32 value; | ||
823 | struct { | ||
824 | #ifdef _BIT_FIELDS_HTOL | ||
825 | u32 crc2:16; /* bits 16-31 */ | ||
826 | u32 crc1:16; /* bits 0-15 */ | ||
827 | #else | ||
828 | u32 crc1:16; /* bits 0-15 */ | ||
829 | u32 crc2:16; /* bits 16-31 */ | ||
830 | #endif | ||
831 | } bits; | ||
832 | } RXMAC_WOL_CRC12_t, *PRXMAC_WOL_CRC12_t; | ||
833 | 691 | ||
834 | /* | 692 | /* |
835 | * structure for CRC 3 and CRC 4 reg in rxmac address map | 693 | * structure for CRC 3 and CRC 4 reg in rxmac address map |
836 | * located at address 0x400C | 694 | * located at address 0x400C |
695 | * | ||
696 | * 31-16: crc4 | ||
697 | * 15-0: crc3 | ||
837 | */ | 698 | */ |
838 | typedef union _RXMAC_WOL_CRC34_t { | ||
839 | u32 value; | ||
840 | struct { | ||
841 | #ifdef _BIT_FIELDS_HTOL | ||
842 | u32 crc4:16; /* bits 16-31 */ | ||
843 | u32 crc3:16; /* bits 0-15 */ | ||
844 | #else | ||
845 | u32 crc3:16; /* bits 0-15 */ | ||
846 | u32 crc4:16; /* bits 16-31 */ | ||
847 | #endif | ||
848 | } bits; | ||
849 | } RXMAC_WOL_CRC34_t, *PRXMAC_WOL_CRC34_t; | ||
850 | 699 | ||
851 | /* | 700 | /* |
852 | * structure for Wake On Lan Source Address Lo reg in rxmac address map | 701 | * structure for Wake On Lan Source Address Lo reg in rxmac address map |
@@ -966,164 +815,84 @@ typedef union _RXMAC_UNI_PF_ADDR3_t { | |||
966 | /* | 815 | /* |
967 | * structure for Packet Filter Control reg in rxmac address map | 816 | * structure for Packet Filter Control reg in rxmac address map |
968 | * located at address 0x4084 | 817 | * located at address 0x4084 |
818 | * | ||
819 | * 31-23: unused | ||
820 | * 22-16: min_pkt_size | ||
821 | * 15-4: unused | ||
822 | * 3: filter_frag_en | ||
823 | * 2: filter_uni_en | ||
824 | * 1: filter_multi_en | ||
825 | * 0: filter_broad_en | ||
969 | */ | 826 | */ |
970 | typedef union _RXMAC_PF_CTRL_t { | ||
971 | u32 value; | ||
972 | struct { | ||
973 | #ifdef _BIT_FIELDS_HTOL | ||
974 | u32 unused2:9; /* bits 23-31 */ | ||
975 | u32 min_pkt_size:7; /* bits 16-22 */ | ||
976 | u32 unused1:12; /* bits 4-15 */ | ||
977 | u32 filter_frag_en:1; /* bit 3 */ | ||
978 | u32 filter_uni_en:1; /* bit 2 */ | ||
979 | u32 filter_multi_en:1; /* bit 1 */ | ||
980 | u32 filter_broad_en:1; /* bit 0 */ | ||
981 | #else | ||
982 | u32 filter_broad_en:1; /* bit 0 */ | ||
983 | u32 filter_multi_en:1; /* bit 1 */ | ||
984 | u32 filter_uni_en:1; /* bit 2 */ | ||
985 | u32 filter_frag_en:1; /* bit 3 */ | ||
986 | u32 unused1:12; /* bits 4-15 */ | ||
987 | u32 min_pkt_size:7; /* bits 16-22 */ | ||
988 | u32 unused2:9; /* bits 23-31 */ | ||
989 | #endif | ||
990 | } bits; | ||
991 | } RXMAC_PF_CTRL_t, *PRXMAC_PF_CTRL_t; | ||
992 | 827 | ||
993 | /* | 828 | /* |
994 | * structure for Memory Controller Interface Control Max Segment reg in rxmac | 829 | * structure for Memory Controller Interface Control Max Segment reg in rxmac |
995 | * address map. Located at address 0x4088 | 830 | * address map. Located at address 0x4088 |
831 | * | ||
832 | * 31-10: reserved | ||
833 | * 9-2: max_size | ||
834 | * 1: fc_en | ||
835 | * 0: seg_en | ||
996 | */ | 836 | */ |
997 | typedef union _RXMAC_MCIF_CTRL_MAX_SEG_t { | ||
998 | u32 value; | ||
999 | struct { | ||
1000 | #ifdef _BIT_FIELDS_HTOL | ||
1001 | u32 reserved:22; /* bits 10-31 */ | ||
1002 | u32 max_size:8; /* bits 2-9 */ | ||
1003 | u32 fc_en:1; /* bit 1 */ | ||
1004 | u32 seg_en:1; /* bit 0 */ | ||
1005 | #else | ||
1006 | u32 seg_en:1; /* bit 0 */ | ||
1007 | u32 fc_en:1; /* bit 1 */ | ||
1008 | u32 max_size:8; /* bits 2-9 */ | ||
1009 | u32 reserved:22; /* bits 10-31 */ | ||
1010 | #endif | ||
1011 | } bits; | ||
1012 | } RXMAC_MCIF_CTRL_MAX_SEG_t, *PRXMAC_MCIF_CTRL_MAX_SEG_t; | ||
1013 | 837 | ||
1014 | /* | 838 | /* |
1015 | * structure for Memory Controller Interface Water Mark reg in rxmac address | 839 | * structure for Memory Controller Interface Water Mark reg in rxmac address |
1016 | * map. Located at address 0x408C | 840 | * map. Located at address 0x408C |
841 | * | ||
842 | * 31-26: unused | ||
843 | * 25-16: mark_hi | ||
844 | * 15-10: unused | ||
845 | * 9-0: mark_lo | ||
1017 | */ | 846 | */ |
1018 | typedef union _RXMAC_MCIF_WATER_MARK_t { | ||
1019 | u32 value; | ||
1020 | struct { | ||
1021 | #ifdef _BIT_FIELDS_HTOL | ||
1022 | u32 reserved2:6; /* bits 26-31 */ | ||
1023 | u32 mark_hi:10; /* bits 16-25 */ | ||
1024 | u32 reserved1:6; /* bits 10-15 */ | ||
1025 | u32 mark_lo:10; /* bits 0-9 */ | ||
1026 | #else | ||
1027 | u32 mark_lo:10; /* bits 0-9 */ | ||
1028 | u32 reserved1:6; /* bits 10-15 */ | ||
1029 | u32 mark_hi:10; /* bits 16-25 */ | ||
1030 | u32 reserved2:6; /* bits 26-31 */ | ||
1031 | #endif | ||
1032 | } bits; | ||
1033 | } RXMAC_MCIF_WATER_MARK_t, *PRXMAC_MCIF_WATER_MARK_t; | ||
1034 | 847 | ||
1035 | /* | 848 | /* |
1036 | * structure for Rx Queue Dialog reg in rxmac address map. | 849 | * structure for Rx Queue Dialog reg in rxmac address map. |
1037 | * located at address 0x4090 | 850 | * located at address 0x4090 |
851 | * | ||
852 | * 31-26: reserved | ||
853 | * 25-16: rd_ptr | ||
854 | * 15-10: reserved | ||
855 | * 9-0: wr_ptr | ||
1038 | */ | 856 | */ |
1039 | typedef union _RXMAC_RXQ_DIAG_t { | ||
1040 | u32 value; | ||
1041 | struct { | ||
1042 | #ifdef _BIT_FIELDS_HTOL | ||
1043 | u32 reserved2:6; /* bits 26-31 */ | ||
1044 | u32 rd_ptr:10; /* bits 16-25 */ | ||
1045 | u32 reserved1:6; /* bits 10-15 */ | ||
1046 | u32 wr_ptr:10; /* bits 0-9 */ | ||
1047 | #else | ||
1048 | u32 wr_ptr:10; /* bits 0-9 */ | ||
1049 | u32 reserved1:6; /* bits 10-15 */ | ||
1050 | u32 rd_ptr:10; /* bits 16-25 */ | ||
1051 | u32 reserved2:6; /* bits 26-31 */ | ||
1052 | #endif | ||
1053 | } bits; | ||
1054 | } RXMAC_RXQ_DIAG_t, *PRXMAC_RXQ_DIAG_t; | ||
1055 | 857 | ||
1056 | /* | 858 | /* |
1057 | * structure for space availiable reg in rxmac address map. | 859 | * structure for space availiable reg in rxmac address map. |
1058 | * located at address 0x4094 | 860 | * located at address 0x4094 |
861 | * | ||
862 | * 31-17: reserved | ||
863 | * 16: space_avail_en | ||
864 | * 15-10: reserved | ||
865 | * 9-0: space_avail | ||
1059 | */ | 866 | */ |
1060 | typedef union _RXMAC_SPACE_AVAIL_t { | ||
1061 | u32 value; | ||
1062 | struct { | ||
1063 | #ifdef _BIT_FIELDS_HTOL | ||
1064 | u32 reserved2:15; /* bits 17-31 */ | ||
1065 | u32 space_avail_en:1; /* bit 16 */ | ||
1066 | u32 reserved1:6; /* bits 10-15 */ | ||
1067 | u32 space_avail:10; /* bits 0-9 */ | ||
1068 | #else | ||
1069 | u32 space_avail:10; /* bits 0-9 */ | ||
1070 | u32 reserved1:6; /* bits 10-15 */ | ||
1071 | u32 space_avail_en:1; /* bit 16 */ | ||
1072 | u32 reserved2:15; /* bits 17-31 */ | ||
1073 | #endif | ||
1074 | } bits; | ||
1075 | } RXMAC_SPACE_AVAIL_t, *PRXMAC_SPACE_AVAIL_t; | ||
1076 | 867 | ||
1077 | /* | 868 | /* |
1078 | * structure for management interface reg in rxmac address map. | 869 | * structure for management interface reg in rxmac address map. |
1079 | * located at address 0x4098 | 870 | * located at address 0x4098 |
871 | * | ||
872 | * 31-18: reserved | ||
873 | * 17: drop_pkt_en | ||
874 | * 16-0: drop_pkt_mask | ||
1080 | */ | 875 | */ |
1081 | typedef union _RXMAC_MIF_CTL_t { | ||
1082 | u32 value; | ||
1083 | struct { | ||
1084 | #ifdef _BIT_FIELDS_HTOL | ||
1085 | u32 reserve:14; /* bits 18-31 */ | ||
1086 | u32 drop_pkt_en:1; /* bit 17 */ | ||
1087 | u32 drop_pkt_mask:17; /* bits 0-16 */ | ||
1088 | #else | ||
1089 | u32 drop_pkt_mask:17; /* bits 0-16 */ | ||
1090 | u32 drop_pkt_en:1; /* bit 17 */ | ||
1091 | u32 reserve:14; /* bits 18-31 */ | ||
1092 | #endif | ||
1093 | } bits; | ||
1094 | } RXMAC_MIF_CTL_t, *PRXMAC_MIF_CTL_t; | ||
1095 | 876 | ||
1096 | /* | 877 | /* |
1097 | * structure for Error reg in rxmac address map. | 878 | * structure for Error reg in rxmac address map. |
1098 | * located at address 0x409C | 879 | * located at address 0x409C |
880 | * | ||
881 | * 31-4: unused | ||
882 | * 3: mif | ||
883 | * 2: async | ||
884 | * 1: pkt_filter | ||
885 | * 0: mcif | ||
1099 | */ | 886 | */ |
1100 | typedef union _RXMAC_ERROR_REG_t { | ||
1101 | u32 value; | ||
1102 | struct { | ||
1103 | #ifdef _BIT_FIELDS_HTOL | ||
1104 | u32 reserve:28; /* bits 4-31 */ | ||
1105 | u32 mif:1; /* bit 3 */ | ||
1106 | u32 async:1; /* bit 2 */ | ||
1107 | u32 pkt_filter:1; /* bit 1 */ | ||
1108 | u32 mcif:1; /* bit 0 */ | ||
1109 | #else | ||
1110 | u32 mcif:1; /* bit 0 */ | ||
1111 | u32 pkt_filter:1; /* bit 1 */ | ||
1112 | u32 async:1; /* bit 2 */ | ||
1113 | u32 mif:1; /* bit 3 */ | ||
1114 | u32 reserve:28; /* bits 4-31 */ | ||
1115 | #endif | ||
1116 | } bits; | ||
1117 | } RXMAC_ERROR_REG_t, *PRXMAC_ERROR_REG_t; | ||
1118 | 887 | ||
1119 | /* | 888 | /* |
1120 | * Rx MAC Module of JAGCore Address Mapping | 889 | * Rx MAC Module of JAGCore Address Mapping |
1121 | */ | 890 | */ |
1122 | typedef struct _RXMAC_t { /* Location: */ | 891 | typedef struct _RXMAC_t { /* Location: */ |
1123 | RXMAC_CTRL_t ctrl; /* 0x4000 */ | 892 | u32 ctrl; /* 0x4000 */ |
1124 | RXMAC_WOL_CTL_CRC0_t crc0; /* 0x4004 */ | 893 | u32 crc0; /* 0x4004 */ |
1125 | RXMAC_WOL_CRC12_t crc12; /* 0x4008 */ | 894 | u32 crc12; /* 0x4008 */ |
1126 | RXMAC_WOL_CRC34_t crc34; /* 0x400C */ | 895 | u32 crc34; /* 0x400C */ |
1127 | RXMAC_WOL_SA_LO_t sa_lo; /* 0x4010 */ | 896 | RXMAC_WOL_SA_LO_t sa_lo; /* 0x4010 */ |
1128 | RXMAC_WOL_SA_HI_t sa_hi; /* 0x4014 */ | 897 | RXMAC_WOL_SA_HI_t sa_hi; /* 0x4014 */ |
1129 | u32 mask0_word0; /* 0x4018 */ | 898 | u32 mask0_word0; /* 0x4018 */ |
@@ -1153,17 +922,17 @@ typedef struct _RXMAC_t { /* Location: */ | |||
1153 | u32 multi_hash2; /* 0x4078 */ | 922 | u32 multi_hash2; /* 0x4078 */ |
1154 | u32 multi_hash3; /* 0x407C */ | 923 | u32 multi_hash3; /* 0x407C */ |
1155 | u32 multi_hash4; /* 0x4080 */ | 924 | u32 multi_hash4; /* 0x4080 */ |
1156 | RXMAC_PF_CTRL_t pf_ctrl; /* 0x4084 */ | 925 | u32 pf_ctrl; /* 0x4084 */ |
1157 | RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; /* 0x4088 */ | 926 | u32 mcif_ctrl_max_seg; /* 0x4088 */ |
1158 | RXMAC_MCIF_WATER_MARK_t mcif_water_mark; /* 0x408C */ | 927 | u32 mcif_water_mark; /* 0x408C */ |
1159 | RXMAC_RXQ_DIAG_t rxq_diag; /* 0x4090 */ | 928 | u32 rxq_diag; /* 0x4090 */ |
1160 | RXMAC_SPACE_AVAIL_t space_avail; /* 0x4094 */ | 929 | u32 space_avail; /* 0x4094 */ |
1161 | 930 | ||
1162 | RXMAC_MIF_CTL_t mif_ctrl; /* 0x4098 */ | 931 | u32 mif_ctrl; /* 0x4098 */ |
1163 | RXMAC_ERROR_REG_t err_reg; /* 0x409C */ | 932 | u32 err_reg; /* 0x409C */ |
1164 | } RXMAC_t, *PRXMAC_t; | 933 | } RXMAC_t, *PRXMAC_t; |
1165 | 934 | ||
1166 | /* END OF TXMAC REGISTER ADDRESS MAP */ | 935 | /* END OF RXMAC REGISTER ADDRESS MAP */ |
1167 | 936 | ||
1168 | 937 | ||
1169 | /* START OF MAC REGISTER ADDRESS MAP */ | 938 | /* START OF MAC REGISTER ADDRESS MAP */ |
@@ -1337,37 +1106,19 @@ typedef struct _RXMAC_t { /* Location: */ | |||
1337 | /* | 1106 | /* |
1338 | * structure for Interface Status reg in mac address map. | 1107 | * structure for Interface Status reg in mac address map. |
1339 | * located at address 0x503C | 1108 | * located at address 0x503C |
1109 | * | ||
1110 | * 31-10: reserved | ||
1111 | * 9: excess_defer | ||
1112 | * 8: clash | ||
1113 | * 7: phy_jabber | ||
1114 | * 6: phy_link_ok | ||
1115 | * 5: phy_full_duplex | ||
1116 | * 4: phy_speed | ||
1117 | * 3: pe100x_link_fail | ||
1118 | * 2: pe10t_loss_carrier | ||
1119 | * 1: pe10t_sqe_error | ||
1120 | * 0: pe10t_jabber | ||
1340 | */ | 1121 | */ |
1341 | typedef union _MAC_IF_STAT_t { | ||
1342 | u32 value; | ||
1343 | struct { | ||
1344 | #ifdef _BIT_FIELDS_HTOL | ||
1345 | u32 reserved:22; /* bits 10-31 */ | ||
1346 | u32 excess_defer:1; /* bit 9 */ | ||
1347 | u32 clash:1; /* bit 8 */ | ||
1348 | u32 phy_jabber:1; /* bit 7 */ | ||
1349 | u32 phy_link_ok:1; /* bit 6 */ | ||
1350 | u32 phy_full_duplex:1; /* bit 5 */ | ||
1351 | u32 phy_speed:1; /* bit 4 */ | ||
1352 | u32 pe100x_link_fail:1; /* bit 3 */ | ||
1353 | u32 pe10t_loss_carrie:1; /* bit 2 */ | ||
1354 | u32 pe10t_sqe_error:1; /* bit 1 */ | ||
1355 | u32 pe10t_jabber:1; /* bit 0 */ | ||
1356 | #else | ||
1357 | u32 pe10t_jabber:1; /* bit 0 */ | ||
1358 | u32 pe10t_sqe_error:1; /* bit 1 */ | ||
1359 | u32 pe10t_loss_carrie:1; /* bit 2 */ | ||
1360 | u32 pe100x_link_fail:1; /* bit 3 */ | ||
1361 | u32 phy_speed:1; /* bit 4 */ | ||
1362 | u32 phy_full_duplex:1; /* bit 5 */ | ||
1363 | u32 phy_link_ok:1; /* bit 6 */ | ||
1364 | u32 phy_jabber:1; /* bit 7 */ | ||
1365 | u32 clash:1; /* bit 8 */ | ||
1366 | u32 excess_defer:1; /* bit 9 */ | ||
1367 | u32 reserved:22; /* bits 10-31 */ | ||
1368 | #endif | ||
1369 | } bits; | ||
1370 | } MAC_IF_STAT_t, *PMAC_IF_STAT_t; | ||
1371 | 1122 | ||
1372 | /* | 1123 | /* |
1373 | * structure for Mac Station Address, Part 1 reg in mac address map. | 1124 | * structure for Mac Station Address, Part 1 reg in mac address map. |
@@ -1428,7 +1179,7 @@ typedef struct _MAC_t { /* Location: */ | |||
1428 | u32 mii_mgmt_stat; /* 0x5030 */ | 1179 | u32 mii_mgmt_stat; /* 0x5030 */ |
1429 | u32 mii_mgmt_indicator; /* 0x5034 */ | 1180 | u32 mii_mgmt_indicator; /* 0x5034 */ |
1430 | u32 if_ctrl; /* 0x5038 */ | 1181 | u32 if_ctrl; /* 0x5038 */ |
1431 | MAC_IF_STAT_t if_stat; /* 0x503C */ | 1182 | u32 if_stat; /* 0x503C */ |
1432 | MAC_STATION_ADDR1_t station_addr_1; /* 0x5040 */ | 1183 | MAC_STATION_ADDR1_t station_addr_1; /* 0x5040 */ |
1433 | MAC_STATION_ADDR2_t station_addr_2; /* 0x5044 */ | 1184 | MAC_STATION_ADDR2_t station_addr_2; /* 0x5044 */ |
1434 | } MAC_t, *PMAC_t; | 1185 | } MAC_t, *PMAC_t; |
@@ -1498,8 +1249,9 @@ typedef struct _MAC_t { /* Location: */ | |||
1498 | /* | 1249 | /* |
1499 | * MAC STATS Module of JAGCore Address Mapping | 1250 | * MAC STATS Module of JAGCore Address Mapping |
1500 | */ | 1251 | */ |
1501 | typedef struct _MAC_STAT_t { /* Location: */ | 1252 | struct macstat_regs |
1502 | u32 pad[32]; /* 0x6000 - 607C */ | 1253 | { /* Location: */ |
1254 | u32 pad[32]; /* 0x6000 - 607C */ | ||
1503 | 1255 | ||
1504 | /* Tx/Rx 0-64 Byte Frame Counter */ | 1256 | /* Tx/Rx 0-64 Byte Frame Counter */ |
1505 | u32 TR64; /* 0x6080 */ | 1257 | u32 TR64; /* 0x6080 */ |
@@ -1644,7 +1396,7 @@ typedef struct _MAC_STAT_t { /* Location: */ | |||
1644 | 1396 | ||
1645 | /* Carry Register Two Mask Register */ | 1397 | /* Carry Register Two Mask Register */ |
1646 | u32 Carry2M; /* 0x613C */ | 1398 | u32 Carry2M; /* 0x613C */ |
1647 | } MAC_STAT_t, *PMAC_STAT_t; | 1399 | }; |
1648 | 1400 | ||
1649 | /* END OF MAC STAT REGISTER ADDRESS MAP */ | 1401 | /* END OF MAC STAT REGISTER ADDRESS MAP */ |
1650 | 1402 | ||
@@ -1682,70 +1434,49 @@ typedef struct _MAC_STAT_t { /* Location: */ | |||
1682 | /* | 1434 | /* |
1683 | * Memory Control Module of JAGCore Address Mapping | 1435 | * Memory Control Module of JAGCore Address Mapping |
1684 | */ | 1436 | */ |
1685 | typedef struct _MMC_t { /* Location: */ | 1437 | struct mmc_regs { /* Location: */ |
1686 | u32 mmc_ctrl; /* 0x7000 */ | 1438 | u32 mmc_ctrl; /* 0x7000 */ |
1687 | u32 sram_access; /* 0x7004 */ | 1439 | u32 sram_access; /* 0x7004 */ |
1688 | u32 sram_word1; /* 0x7008 */ | 1440 | u32 sram_word1; /* 0x7008 */ |
1689 | u32 sram_word2; /* 0x700C */ | 1441 | u32 sram_word2; /* 0x700C */ |
1690 | u32 sram_word3; /* 0x7010 */ | 1442 | u32 sram_word3; /* 0x7010 */ |
1691 | u32 sram_word4; /* 0x7014 */ | 1443 | u32 sram_word4; /* 0x7014 */ |
1692 | } MMC_t, *PMMC_t; | 1444 | }; |
1693 | 1445 | ||
1694 | /* END OF MMC REGISTER ADDRESS MAP */ | 1446 | /* END OF MMC REGISTER ADDRESS MAP */ |
1695 | 1447 | ||
1696 | 1448 | ||
1697 | /* START OF EXP ROM REGISTER ADDRESS MAP */ | ||
1698 | |||
1699 | /* | ||
1700 | * Expansion ROM Module of JAGCore Address Mapping | ||
1701 | */ | ||
1702 | |||
1703 | /* Take this out until it is not empty */ | ||
1704 | #if 0 | ||
1705 | typedef struct _EXP_ROM_t { | ||
1706 | |||
1707 | } EXP_ROM_t, *PEXP_ROM_t; | ||
1708 | #endif | ||
1709 | |||
1710 | /* END OF EXP ROM REGISTER ADDRESS MAP */ | ||
1711 | |||
1712 | |||
1713 | /* | 1449 | /* |
1714 | * JAGCore Address Mapping | 1450 | * JAGCore Address Mapping |
1715 | */ | 1451 | */ |
1716 | typedef struct _ADDRESS_MAP_t { | 1452 | typedef struct _ADDRESS_MAP_t { |
1717 | GLOBAL_t global; | 1453 | struct global_regs global; |
1718 | /* unused section of global address map */ | 1454 | /* unused section of global address map */ |
1719 | u8 unused_global[4096 - sizeof(GLOBAL_t)]; | 1455 | u8 unused_global[4096 - sizeof(struct global_regs)]; |
1720 | TXDMA_t txdma; | 1456 | struct txdma_regs txdma; |
1721 | /* unused section of txdma address map */ | 1457 | /* unused section of txdma address map */ |
1722 | u8 unused_txdma[4096 - sizeof(TXDMA_t)]; | 1458 | u8 unused_txdma[4096 - sizeof(struct txdma_regs)]; |
1723 | RXDMA_t rxdma; | 1459 | struct rxdma_regs rxdma; |
1724 | /* unused section of rxdma address map */ | 1460 | /* unused section of rxdma address map */ |
1725 | u8 unused_rxdma[4096 - sizeof(RXDMA_t)]; | 1461 | u8 unused_rxdma[4096 - sizeof(struct rxdma_regs)]; |
1726 | TXMAC_t txmac; | 1462 | struct txmac_regs txmac; |
1727 | /* unused section of txmac address map */ | 1463 | /* unused section of txmac address map */ |
1728 | u8 unused_txmac[4096 - sizeof(TXMAC_t)]; | 1464 | u8 unused_txmac[4096 - sizeof(struct txmac_regs)]; |
1729 | RXMAC_t rxmac; | 1465 | RXMAC_t rxmac; |
1730 | /* unused section of rxmac address map */ | 1466 | /* unused section of rxmac address map */ |
1731 | u8 unused_rxmac[4096 - sizeof(RXMAC_t)]; | 1467 | u8 unused_rxmac[4096 - sizeof(RXMAC_t)]; |
1732 | MAC_t mac; | 1468 | MAC_t mac; |
1733 | /* unused section of mac address map */ | 1469 | /* unused section of mac address map */ |
1734 | u8 unused_mac[4096 - sizeof(MAC_t)]; | 1470 | u8 unused_mac[4096 - sizeof(MAC_t)]; |
1735 | MAC_STAT_t macStat; | 1471 | struct macstat_regs macstat; |
1736 | /* unused section of mac stat address map */ | 1472 | /* unused section of mac stat address map */ |
1737 | u8 unused_mac_stat[4096 - sizeof(MAC_STAT_t)]; | 1473 | u8 unused_mac_stat[4096 - sizeof(struct macstat_regs)]; |
1738 | MMC_t mmc; | 1474 | struct mmc_regs mmc; |
1739 | /* unused section of mmc address map */ | 1475 | /* unused section of mmc address map */ |
1740 | u8 unused_mmc[4096 - sizeof(MMC_t)]; | 1476 | u8 unused_mmc[4096 - sizeof(struct mmc_regs)]; |
1741 | /* unused section of address map */ | 1477 | /* unused section of address map */ |
1742 | u8 unused_[1015808]; | 1478 | u8 unused_[1015808]; |
1743 | 1479 | ||
1744 | /* Take this out until it is not empty */ | ||
1745 | #if 0 | ||
1746 | EXP_ROM_t exp_rom; | ||
1747 | #endif | ||
1748 | |||
1749 | u8 unused_exp_rom[4096]; /* MGS-size TBD */ | 1480 | u8 unused_exp_rom[4096]; /* MGS-size TBD */ |
1750 | u8 unused__[524288]; /* unused section of address map */ | 1481 | u8 unused__[524288]; /* unused section of address map */ |
1751 | } ADDRESS_MAP_t, *PADDRESS_MAP_t; | 1482 | } ADDRESS_MAP_t, *PADDRESS_MAP_t; |
diff --git a/drivers/staging/et131x/et1310_eeprom.c b/drivers/staging/et131x/et1310_eeprom.c index bcca1f86f516..3ca253672ba1 100644 --- a/drivers/staging/et131x/et1310_eeprom.c +++ b/drivers/staging/et131x/et1310_eeprom.c | |||
@@ -84,17 +84,42 @@ | |||
84 | #include <linux/ioport.h> | 84 | #include <linux/ioport.h> |
85 | 85 | ||
86 | #include "et1310_phy.h" | 86 | #include "et1310_phy.h" |
87 | #include "et1310_pm.h" | ||
88 | #include "et1310_jagcore.h" | ||
89 | #include "et1310_eeprom.h" | ||
90 | |||
91 | #include "et131x_adapter.h" | 87 | #include "et131x_adapter.h" |
92 | #include "et131x_initpci.h" | 88 | #include "et131x.h" |
93 | #include "et131x_isr.h" | ||
94 | |||
95 | #include "et1310_tx.h" | ||
96 | 89 | ||
90 | /* | ||
91 | * EEPROM Defines | ||
92 | */ | ||
97 | 93 | ||
94 | /* LBCIF Register Groups (addressed via 32-bit offsets) */ | ||
95 | #define LBCIF_DWORD0_GROUP 0xAC | ||
96 | #define LBCIF_DWORD1_GROUP 0xB0 | ||
97 | |||
98 | /* LBCIF Registers (addressed via 8-bit offsets) */ | ||
99 | #define LBCIF_ADDRESS_REGISTER 0xAC | ||
100 | #define LBCIF_DATA_REGISTER 0xB0 | ||
101 | #define LBCIF_CONTROL_REGISTER 0xB1 | ||
102 | #define LBCIF_STATUS_REGISTER 0xB2 | ||
103 | |||
104 | /* LBCIF Control Register Bits */ | ||
105 | #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 | ||
106 | #define LBCIF_CONTROL_PAGE_WRITE 0x02 | ||
107 | #define LBCIF_CONTROL_EEPROM_RELOAD 0x08 | ||
108 | #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 | ||
109 | #define LBCIF_CONTROL_I2C_WRITE 0x40 | ||
110 | #define LBCIF_CONTROL_LBCIF_ENABLE 0x80 | ||
111 | |||
112 | /* LBCIF Status Register Bits */ | ||
113 | #define LBCIF_STATUS_PHY_QUEUE_AVAIL 0x01 | ||
114 | #define LBCIF_STATUS_I2C_IDLE 0x02 | ||
115 | #define LBCIF_STATUS_ACK_ERROR 0x04 | ||
116 | #define LBCIF_STATUS_GENERAL_ERROR 0x08 | ||
117 | #define LBCIF_STATUS_CHECKSUM_ERROR 0x40 | ||
118 | #define LBCIF_STATUS_EEPROM_PRESENT 0x80 | ||
119 | |||
120 | /* Miscellaneous Constraints */ | ||
121 | #define MAX_NUM_REGISTER_POLLS 1000 | ||
122 | #define MAX_NUM_WRITE_RETRIES 2 | ||
98 | 123 | ||
99 | static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status) | 124 | static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status) |
100 | { | 125 | { |
diff --git a/drivers/staging/et131x/et1310_eeprom.h b/drivers/staging/et131x/et1310_eeprom.h deleted file mode 100644 index 6a6c6a632a8f..000000000000 --- a/drivers/staging/et131x/et1310_eeprom.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et1310_eeprom.h - Defines, structs, enums, prototypes, etc. used for EEPROM | ||
12 | * access routines | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET1310_EEPROM_H__ | ||
60 | #define __ET1310_EEPROM_H__ | ||
61 | |||
62 | #include "et1310_address_map.h" | ||
63 | |||
64 | /* | ||
65 | * EEPROM Defines | ||
66 | */ | ||
67 | |||
68 | /* LBCIF Register Groups (addressed via 32-bit offsets) */ | ||
69 | #define LBCIF_DWORD0_GROUP 0xAC | ||
70 | #define LBCIF_DWORD1_GROUP 0xB0 | ||
71 | |||
72 | /* LBCIF Registers (addressed via 8-bit offsets) */ | ||
73 | #define LBCIF_ADDRESS_REGISTER 0xAC | ||
74 | #define LBCIF_DATA_REGISTER 0xB0 | ||
75 | #define LBCIF_CONTROL_REGISTER 0xB1 | ||
76 | #define LBCIF_STATUS_REGISTER 0xB2 | ||
77 | |||
78 | /* LBCIF Control Register Bits */ | ||
79 | #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 | ||
80 | #define LBCIF_CONTROL_PAGE_WRITE 0x02 | ||
81 | #define LBCIF_CONTROL_EEPROM_RELOAD 0x08 | ||
82 | #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 | ||
83 | #define LBCIF_CONTROL_I2C_WRITE 0x40 | ||
84 | #define LBCIF_CONTROL_LBCIF_ENABLE 0x80 | ||
85 | |||
86 | /* LBCIF Status Register Bits */ | ||
87 | #define LBCIF_STATUS_PHY_QUEUE_AVAIL 0x01 | ||
88 | #define LBCIF_STATUS_I2C_IDLE 0x02 | ||
89 | #define LBCIF_STATUS_ACK_ERROR 0x04 | ||
90 | #define LBCIF_STATUS_GENERAL_ERROR 0x08 | ||
91 | #define LBCIF_STATUS_CHECKSUM_ERROR 0x40 | ||
92 | #define LBCIF_STATUS_EEPROM_PRESENT 0x80 | ||
93 | |||
94 | /* Miscellaneous Constraints */ | ||
95 | #define MAX_NUM_REGISTER_POLLS 1000 | ||
96 | #define MAX_NUM_WRITE_RETRIES 2 | ||
97 | |||
98 | /* Forward declaration of the private adapter structure */ | ||
99 | struct et131x_adapter; | ||
100 | |||
101 | int et131x_init_eeprom(struct et131x_adapter *etdev); | ||
102 | |||
103 | #endif /* _ET1310_EEPROM_H_ */ | ||
diff --git a/drivers/staging/et131x/et1310_jagcore.h b/drivers/staging/et131x/et1310_jagcore.h deleted file mode 100644 index 0807a01d88ae..000000000000 --- a/drivers/staging/et131x/et1310_jagcore.h +++ /dev/null | |||
@@ -1,94 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et1310_jagcore.h - Defines, structs, enums, prototypes, etc. pertaining to | ||
12 | * the JAGCore | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET1310_JAGCORE_H__ | ||
60 | #define __ET1310_JAGCORE_H__ | ||
61 | |||
62 | #include "et1310_address_map.h" | ||
63 | |||
64 | |||
65 | #define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */ | ||
66 | #define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */ | ||
67 | |||
68 | /* | ||
69 | * For interrupts, normal running is: | ||
70 | * rxdma_xfr_done, phy_interrupt, mac_stat_interrupt, | ||
71 | * watchdog_interrupt & txdma_xfer_done | ||
72 | * | ||
73 | * In both cases, when flow control is enabled for either Tx or bi-direction, | ||
74 | * we additional enable rx_fbr0_low and rx_fbr1_low, so we know when the | ||
75 | * buffer rings are running low. | ||
76 | */ | ||
77 | #define INT_MASK_DISABLE 0xffffffff | ||
78 | |||
79 | /* NOTE: Masking out MAC_STAT Interrupt for now... | ||
80 | * #define INT_MASK_ENABLE 0xfff6bf17 | ||
81 | * #define INT_MASK_ENABLE_NO_FLOW 0xfff6bfd7 | ||
82 | */ | ||
83 | #define INT_MASK_ENABLE 0xfffebf17 | ||
84 | #define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7 | ||
85 | |||
86 | /* Forward declaration of the private adapter structure */ | ||
87 | struct et131x_adapter; | ||
88 | |||
89 | void ConfigGlobalRegs(struct et131x_adapter *pAdapter); | ||
90 | void ConfigMMCRegs(struct et131x_adapter *pAdapter); | ||
91 | void et131x_enable_interrupts(struct et131x_adapter *adapter); | ||
92 | void et131x_disable_interrupts(struct et131x_adapter *adapter); | ||
93 | |||
94 | #endif /* __ET1310_JAGCORE_H__ */ | ||
diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index b8a1f2037314..a292b1edc414 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c | |||
@@ -85,12 +85,19 @@ | |||
85 | #include <linux/crc32.h> | 85 | #include <linux/crc32.h> |
86 | 86 | ||
87 | #include "et1310_phy.h" | 87 | #include "et1310_phy.h" |
88 | #include "et1310_pm.h" | ||
89 | #include "et1310_jagcore.h" | ||
90 | #include "et1310_mac.h" | ||
91 | |||
92 | #include "et131x_adapter.h" | 88 | #include "et131x_adapter.h" |
93 | #include "et131x_initpci.h" | 89 | #include "et131x.h" |
90 | |||
91 | |||
92 | #define COUNTER_WRAP_28_BIT 0x10000000 | ||
93 | #define COUNTER_WRAP_22_BIT 0x400000 | ||
94 | #define COUNTER_WRAP_16_BIT 0x10000 | ||
95 | #define COUNTER_WRAP_12_BIT 0x1000 | ||
96 | |||
97 | #define COUNTER_MASK_28_BIT (COUNTER_WRAP_28_BIT - 1) | ||
98 | #define COUNTER_MASK_22_BIT (COUNTER_WRAP_22_BIT - 1) | ||
99 | #define COUNTER_MASK_16_BIT (COUNTER_WRAP_16_BIT - 1) | ||
100 | #define COUNTER_MASK_12_BIT (COUNTER_WRAP_12_BIT - 1) | ||
94 | 101 | ||
95 | /** | 102 | /** |
96 | * ConfigMacRegs1 - Initialize the first part of MAC regs | 103 | * ConfigMacRegs1 - Initialize the first part of MAC regs |
@@ -163,9 +170,9 @@ void ConfigMACRegs2(struct et131x_adapter *etdev) | |||
163 | u32 cfg1; | 170 | u32 cfg1; |
164 | u32 cfg2; | 171 | u32 cfg2; |
165 | u32 ifctrl; | 172 | u32 ifctrl; |
166 | TXMAC_CTL_t ctl; | 173 | u32 ctl; |
167 | 174 | ||
168 | ctl.value = readl(&etdev->regs->txmac.ctl.value); | 175 | ctl = readl(&etdev->regs->txmac.ctl); |
169 | cfg1 = readl(&pMac->cfg1); | 176 | cfg1 = readl(&pMac->cfg1); |
170 | cfg2 = readl(&pMac->cfg2); | 177 | cfg2 = readl(&pMac->cfg2); |
171 | ifctrl = readl(&pMac->if_ctrl); | 178 | ifctrl = readl(&pMac->if_ctrl); |
@@ -219,9 +226,8 @@ void ConfigMACRegs2(struct et131x_adapter *etdev) | |||
219 | } | 226 | } |
220 | 227 | ||
221 | /* Enable TXMAC */ | 228 | /* Enable TXMAC */ |
222 | ctl.bits.txmac_en = 0x1; | 229 | ctl |= 0x05; /* TX mac enable, FC disable */ |
223 | ctl.bits.fc_disable = 0x1; | 230 | writel(ctl, &etdev->regs->txmac.ctl); |
224 | writel(ctl.value, &etdev->regs->txmac.ctl.value); | ||
225 | 231 | ||
226 | /* Ready to start the RXDMA/TXDMA engine */ | 232 | /* Ready to start the RXDMA/TXDMA engine */ |
227 | if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) { | 233 | if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) { |
@@ -235,15 +241,15 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
235 | struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac; | 241 | struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac; |
236 | RXMAC_WOL_SA_LO_t sa_lo; | 242 | RXMAC_WOL_SA_LO_t sa_lo; |
237 | RXMAC_WOL_SA_HI_t sa_hi; | 243 | RXMAC_WOL_SA_HI_t sa_hi; |
238 | RXMAC_PF_CTRL_t pf_ctrl = { 0 }; | 244 | u32 pf_ctrl = 0; |
239 | 245 | ||
240 | /* Disable the MAC while it is being configured (also disable WOL) */ | 246 | /* Disable the MAC while it is being configured (also disable WOL) */ |
241 | writel(0x8, &pRxMac->ctrl.value); | 247 | writel(0x8, &pRxMac->ctrl); |
242 | 248 | ||
243 | /* Initialize WOL to disabled. */ | 249 | /* Initialize WOL to disabled. */ |
244 | writel(0, &pRxMac->crc0.value); | 250 | writel(0, &pRxMac->crc0); |
245 | writel(0, &pRxMac->crc12.value); | 251 | writel(0, &pRxMac->crc12); |
246 | writel(0, &pRxMac->crc34.value); | 252 | writel(0, &pRxMac->crc34); |
247 | 253 | ||
248 | /* We need to set the WOL mask0 - mask4 next. We initialize it to | 254 | /* We need to set the WOL mask0 - mask4 next. We initialize it to |
249 | * its default Values of 0x00000000 because there are not WOL masks | 255 | * its default Values of 0x00000000 because there are not WOL masks |
@@ -286,12 +292,12 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
286 | writel(sa_hi.value, &pRxMac->sa_hi.value); | 292 | writel(sa_hi.value, &pRxMac->sa_hi.value); |
287 | 293 | ||
288 | /* Disable all Packet Filtering */ | 294 | /* Disable all Packet Filtering */ |
289 | writel(0, &pRxMac->pf_ctrl.value); | 295 | writel(0, &pRxMac->pf_ctrl); |
290 | 296 | ||
291 | /* Let's initialize the Unicast Packet filtering address */ | 297 | /* Let's initialize the Unicast Packet filtering address */ |
292 | if (etdev->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { | 298 | if (etdev->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { |
293 | SetupDeviceForUnicast(etdev); | 299 | SetupDeviceForUnicast(etdev); |
294 | pf_ctrl.bits.filter_uni_en = 1; | 300 | pf_ctrl |= 4; /* Unicast filter */ |
295 | } else { | 301 | } else { |
296 | writel(0, &pRxMac->uni_pf_addr1.value); | 302 | writel(0, &pRxMac->uni_pf_addr1.value); |
297 | writel(0, &pRxMac->uni_pf_addr2.value); | 303 | writel(0, &pRxMac->uni_pf_addr2.value); |
@@ -299,20 +305,16 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
299 | } | 305 | } |
300 | 306 | ||
301 | /* Let's initialize the Multicast hash */ | 307 | /* Let's initialize the Multicast hash */ |
302 | if (etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { | 308 | if (!(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { |
303 | pf_ctrl.bits.filter_multi_en = 0; | 309 | pf_ctrl |= 2; /* Multicast filter */ |
304 | } else { | ||
305 | pf_ctrl.bits.filter_multi_en = 1; | ||
306 | SetupDeviceForMulticast(etdev); | 310 | SetupDeviceForMulticast(etdev); |
307 | } | 311 | } |
308 | 312 | ||
309 | /* Runt packet filtering. Didn't work in version A silicon. */ | 313 | /* Runt packet filtering. Didn't work in version A silicon. */ |
310 | pf_ctrl.bits.min_pkt_size = NIC_MIN_PACKET_SIZE + 4; | 314 | pf_ctrl |= (NIC_MIN_PACKET_SIZE + 4) << 16; |
311 | pf_ctrl.bits.filter_frag_en = 1; | 315 | pf_ctrl |= 8; /* Fragment filter */ |
312 | |||
313 | if (etdev->RegistryJumboPacket > 8192) { | ||
314 | RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; | ||
315 | 316 | ||
317 | if (etdev->RegistryJumboPacket > 8192) | ||
316 | /* In order to transmit jumbo packets greater than 8k, the | 318 | /* In order to transmit jumbo packets greater than 8k, the |
317 | * FIFO between RxMAC and RxDMA needs to be reduced in size | 319 | * FIFO between RxMAC and RxDMA needs to be reduced in size |
318 | * to (16k - Jumbo packet size). In order to implement this, | 320 | * to (16k - Jumbo packet size). In order to implement this, |
@@ -320,25 +322,21 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
320 | * packets down into segments which are (max_size * 16). In | 322 | * packets down into segments which are (max_size * 16). In |
321 | * this case we selected 256 bytes, since this is the size of | 323 | * this case we selected 256 bytes, since this is the size of |
322 | * the PCI-Express TLP's that the 1310 uses. | 324 | * the PCI-Express TLP's that the 1310 uses. |
325 | * | ||
326 | * seg_en on, fc_en off, size 0x10 | ||
323 | */ | 327 | */ |
324 | mcif_ctrl_max_seg.bits.seg_en = 0x1; | 328 | writel(0x41, &pRxMac->mcif_ctrl_max_seg); |
325 | mcif_ctrl_max_seg.bits.fc_en = 0x0; | 329 | else |
326 | mcif_ctrl_max_seg.bits.max_size = 0x10; | 330 | writel(0, &pRxMac->mcif_ctrl_max_seg); |
327 | |||
328 | writel(mcif_ctrl_max_seg.value, | ||
329 | &pRxMac->mcif_ctrl_max_seg.value); | ||
330 | } else { | ||
331 | writel(0, &pRxMac->mcif_ctrl_max_seg.value); | ||
332 | } | ||
333 | 331 | ||
334 | /* Initialize the MCIF water marks */ | 332 | /* Initialize the MCIF water marks */ |
335 | writel(0, &pRxMac->mcif_water_mark.value); | 333 | writel(0, &pRxMac->mcif_water_mark); |
336 | 334 | ||
337 | /* Initialize the MIF control */ | 335 | /* Initialize the MIF control */ |
338 | writel(0, &pRxMac->mif_ctrl.value); | 336 | writel(0, &pRxMac->mif_ctrl); |
339 | 337 | ||
340 | /* Initialize the Space Available Register */ | 338 | /* Initialize the Space Available Register */ |
341 | writel(0, &pRxMac->space_avail.value); | 339 | writel(0, &pRxMac->space_avail); |
342 | 340 | ||
343 | /* Initialize the the mif_ctrl register | 341 | /* Initialize the the mif_ctrl register |
344 | * bit 3: Receive code error. One or more nibbles were signaled as | 342 | * bit 3: Receive code error. One or more nibbles were signaled as |
@@ -354,9 +352,9 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
354 | * bit 17: Drop packet enable | 352 | * bit 17: Drop packet enable |
355 | */ | 353 | */ |
356 | if (etdev->linkspeed == TRUEPHY_SPEED_100MBPS) | 354 | if (etdev->linkspeed == TRUEPHY_SPEED_100MBPS) |
357 | writel(0x30038, &pRxMac->mif_ctrl.value); | 355 | writel(0x30038, &pRxMac->mif_ctrl); |
358 | else | 356 | else |
359 | writel(0x30030, &pRxMac->mif_ctrl.value); | 357 | writel(0x30030, &pRxMac->mif_ctrl); |
360 | 358 | ||
361 | /* Finally we initialize RxMac to be enabled & WOL disabled. Packet | 359 | /* Finally we initialize RxMac to be enabled & WOL disabled. Packet |
362 | * filter is always enabled since it is where the runt packets are | 360 | * filter is always enabled since it is where the runt packets are |
@@ -364,28 +362,28 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) | |||
364 | * dropping doesn't work, so it is disabled in the pf_ctrl register, | 362 | * dropping doesn't work, so it is disabled in the pf_ctrl register, |
365 | * but we still leave the packet filter on. | 363 | * but we still leave the packet filter on. |
366 | */ | 364 | */ |
367 | writel(pf_ctrl.value, &pRxMac->pf_ctrl.value); | 365 | writel(pf_ctrl, &pRxMac->pf_ctrl); |
368 | writel(0x9, &pRxMac->ctrl.value); | 366 | writel(0x9, &pRxMac->ctrl); |
369 | } | 367 | } |
370 | 368 | ||
371 | void ConfigTxMacRegs(struct et131x_adapter *etdev) | 369 | void ConfigTxMacRegs(struct et131x_adapter *etdev) |
372 | { | 370 | { |
373 | struct _TXMAC_t __iomem *pTxMac = &etdev->regs->txmac; | 371 | struct txmac_regs *txmac = &etdev->regs->txmac; |
374 | 372 | ||
375 | /* We need to update the Control Frame Parameters | 373 | /* We need to update the Control Frame Parameters |
376 | * cfpt - control frame pause timer set to 64 (0x40) | 374 | * cfpt - control frame pause timer set to 64 (0x40) |
377 | * cfep - control frame extended pause timer set to 0x0 | 375 | * cfep - control frame extended pause timer set to 0x0 |
378 | */ | 376 | */ |
379 | if (etdev->FlowControl == None) | 377 | if (etdev->FlowControl == None) |
380 | writel(0, &pTxMac->cf_param); | 378 | writel(0, &txmac->cf_param); |
381 | else | 379 | else |
382 | writel(0x40, &pTxMac->cf_param); | 380 | writel(0x40, &txmac->cf_param); |
383 | } | 381 | } |
384 | 382 | ||
385 | void ConfigMacStatRegs(struct et131x_adapter *etdev) | 383 | void ConfigMacStatRegs(struct et131x_adapter *etdev) |
386 | { | 384 | { |
387 | struct _MAC_STAT_t __iomem *macstat = | 385 | struct macstat_regs __iomem *macstat = |
388 | &etdev->regs->macStat; | 386 | &etdev->regs->macstat; |
389 | 387 | ||
390 | /* Next we need to initialize all the MAC_STAT registers to zero on | 388 | /* Next we need to initialize all the MAC_STAT registers to zero on |
391 | * the device. | 389 | * the device. |
@@ -456,8 +454,8 @@ void ConfigFlowControl(struct et131x_adapter *etdev) | |||
456 | void UpdateMacStatHostCounters(struct et131x_adapter *etdev) | 454 | void UpdateMacStatHostCounters(struct et131x_adapter *etdev) |
457 | { | 455 | { |
458 | struct _ce_stats_t *stats = &etdev->Stats; | 456 | struct _ce_stats_t *stats = &etdev->Stats; |
459 | struct _MAC_STAT_t __iomem *macstat = | 457 | struct macstat_regs __iomem *macstat = |
460 | &etdev->regs->macStat; | 458 | &etdev->regs->macstat; |
461 | 459 | ||
462 | stats->collisions += readl(&macstat->TNcl); | 460 | stats->collisions += readl(&macstat->TNcl); |
463 | stats->first_collision += readl(&macstat->TScl); | 461 | stats->first_collision += readl(&macstat->TScl); |
@@ -493,11 +491,11 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev) | |||
493 | /* Read the interrupt bits from the register(s). These are Clear On | 491 | /* Read the interrupt bits from the register(s). These are Clear On |
494 | * Write. | 492 | * Write. |
495 | */ | 493 | */ |
496 | Carry1 = readl(&etdev->regs->macStat.Carry1); | 494 | Carry1 = readl(&etdev->regs->macstat.Carry1); |
497 | Carry2 = readl(&etdev->regs->macStat.Carry2); | 495 | Carry2 = readl(&etdev->regs->macstat.Carry2); |
498 | 496 | ||
499 | writel(Carry1, &etdev->regs->macStat.Carry1); | 497 | writel(Carry1, &etdev->regs->macstat.Carry1); |
500 | writel(Carry2, &etdev->regs->macStat.Carry2); | 498 | writel(Carry2, &etdev->regs->macstat.Carry2); |
501 | 499 | ||
502 | /* We need to do update the host copy of all the MAC_STAT counters. | 500 | /* We need to do update the host copy of all the MAC_STAT counters. |
503 | * For each counter, check it's overflow bit. If the overflow bit is | 501 | * For each counter, check it's overflow bit. If the overflow bit is |
diff --git a/drivers/staging/et131x/et1310_mac.h b/drivers/staging/et131x/et1310_mac.h deleted file mode 100644 index 2c3859594538..000000000000 --- a/drivers/staging/et131x/et1310_mac.h +++ /dev/null | |||
@@ -1,93 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et1310_mac.h - Defines, structs, enums, prototypes, etc. pertaining to the | ||
12 | * MAC. | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef _ET1310_MAC_H_ | ||
60 | #define _ET1310_MAC_H_ | ||
61 | |||
62 | |||
63 | #include "et1310_address_map.h" | ||
64 | |||
65 | |||
66 | #define COUNTER_WRAP_28_BIT 0x10000000 | ||
67 | #define COUNTER_WRAP_22_BIT 0x400000 | ||
68 | #define COUNTER_WRAP_16_BIT 0x10000 | ||
69 | #define COUNTER_WRAP_12_BIT 0x1000 | ||
70 | |||
71 | #define COUNTER_MASK_28_BIT (COUNTER_WRAP_28_BIT - 1) | ||
72 | #define COUNTER_MASK_22_BIT (COUNTER_WRAP_22_BIT - 1) | ||
73 | #define COUNTER_MASK_16_BIT (COUNTER_WRAP_16_BIT - 1) | ||
74 | #define COUNTER_MASK_12_BIT (COUNTER_WRAP_12_BIT - 1) | ||
75 | |||
76 | #define UPDATE_COUNTER(HostCnt, DevCnt) \ | ||
77 | HostCnt = HostCnt + DevCnt; | ||
78 | |||
79 | /* Forward declaration of the private adapter structure */ | ||
80 | struct et131x_adapter; | ||
81 | |||
82 | void ConfigMACRegs1(struct et131x_adapter *adapter); | ||
83 | void ConfigMACRegs2(struct et131x_adapter *adapter); | ||
84 | void ConfigRxMacRegs(struct et131x_adapter *adapter); | ||
85 | void ConfigTxMacRegs(struct et131x_adapter *adapter); | ||
86 | void ConfigMacStatRegs(struct et131x_adapter *adapter); | ||
87 | void ConfigFlowControl(struct et131x_adapter *adapter); | ||
88 | void UpdateMacStatHostCounters(struct et131x_adapter *adapter); | ||
89 | void HandleMacStatInterrupt(struct et131x_adapter *adapter); | ||
90 | void SetupDeviceForMulticast(struct et131x_adapter *adapter); | ||
91 | void SetupDeviceForUnicast(struct et131x_adapter *adapter); | ||
92 | |||
93 | #endif /* _ET1310_MAC_H_ */ | ||
diff --git a/drivers/staging/et131x/et1310_phy.c b/drivers/staging/et131x/et1310_phy.c index 6ecad619f779..4a55fbfbd59d 100644 --- a/drivers/staging/et131x/et1310_phy.c +++ b/drivers/staging/et131x/et1310_phy.c | |||
@@ -85,17 +85,14 @@ | |||
85 | #include <linux/random.h> | 85 | #include <linux/random.h> |
86 | 86 | ||
87 | #include "et1310_phy.h" | 87 | #include "et1310_phy.h" |
88 | #include "et1310_pm.h" | ||
89 | #include "et1310_jagcore.h" | ||
90 | 88 | ||
91 | #include "et131x_adapter.h" | 89 | #include "et131x_adapter.h" |
92 | #include "et131x_netdev.h" | ||
93 | #include "et131x_initpci.h" | ||
94 | 90 | ||
95 | #include "et1310_address_map.h" | 91 | #include "et1310_address_map.h" |
96 | #include "et1310_tx.h" | 92 | #include "et1310_tx.h" |
97 | #include "et1310_rx.h" | 93 | #include "et1310_rx.h" |
98 | #include "et1310_mac.h" | 94 | |
95 | #include "et131x.h" | ||
99 | 96 | ||
100 | /* Prototypes for functions with local scope */ | 97 | /* Prototypes for functions with local scope */ |
101 | static void et131x_xcvr_init(struct et131x_adapter *etdev); | 98 | static void et131x_xcvr_init(struct et131x_adapter *etdev); |
diff --git a/drivers/staging/et131x/et1310_phy.h b/drivers/staging/et131x/et1310_phy.h index 758b9b251715..47907ba76012 100644 --- a/drivers/staging/et131x/et1310_phy.h +++ b/drivers/staging/et131x/et1310_phy.h | |||
@@ -736,32 +736,8 @@ typedef union _MI_LCR2_t { | |||
736 | 736 | ||
737 | /* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */ | 737 | /* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */ |
738 | 738 | ||
739 | /* Forward declaration of the private adapter structure */ | ||
740 | struct et131x_adapter; | ||
741 | 739 | ||
742 | /* Prototypes for ET1310_phy.c */ | 740 | /* Prototypes for ET1310_phy.c */ |
743 | int et131x_xcvr_find(struct et131x_adapter *adapter); | ||
744 | void et131x_setphy_normal(struct et131x_adapter *adapter); | ||
745 | |||
746 | /* static inline function does not work because et131x_adapter is not always | ||
747 | * defined | ||
748 | */ | ||
749 | int PhyMiRead(struct et131x_adapter *adapter, u8 xcvrAddr, | ||
750 | u8 xcvrReg, u16 *value); | ||
751 | #define MiRead(adapter, xcvrReg, value) \ | ||
752 | PhyMiRead((adapter), (adapter)->Stats.xcvr_addr, (xcvrReg), (value)) | ||
753 | |||
754 | int32_t MiWrite(struct et131x_adapter *adapter, | ||
755 | u8 xcvReg, u16 value); | ||
756 | void et131x_Mii_check(struct et131x_adapter *pAdapter, | ||
757 | MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints); | ||
758 | |||
759 | /* This last is not strictly required (the driver could call the TPAL | ||
760 | * version instead), but this sets the adapter up correctly, and calls the | ||
761 | * access routine indirectly. This protects the driver from changes in TPAL. | ||
762 | */ | ||
763 | void SetPhy_10BaseTHalfDuplex(struct et131x_adapter *adapter); | ||
764 | |||
765 | /* Defines for PHY access routines */ | 741 | /* Defines for PHY access routines */ |
766 | 742 | ||
767 | /* Define bit operation flags */ | 743 | /* Define bit operation flags */ |
@@ -843,14 +819,4 @@ void SetPhy_10BaseTHalfDuplex(struct et131x_adapter *adapter); | |||
843 | /* #define TRU_VMI_LINK_CONTROL_REGISTER 29 */ | 819 | /* #define TRU_VMI_LINK_CONTROL_REGISTER 29 */ |
844 | /* #define TRU_VMI_TIMING_CONTROL_REGISTER */ | 820 | /* #define TRU_VMI_TIMING_CONTROL_REGISTER */ |
845 | 821 | ||
846 | /* Prototypes for PHY access routines */ | ||
847 | void ET1310_PhyInit(struct et131x_adapter *adapter); | ||
848 | void ET1310_PhyReset(struct et131x_adapter *adapter); | ||
849 | void ET1310_PhyPowerDown(struct et131x_adapter *adapter, bool down); | ||
850 | void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *adapter, | ||
851 | u16 duplex); | ||
852 | void ET1310_PhyAccessMiBit(struct et131x_adapter *adapter, | ||
853 | u16 action, | ||
854 | u16 regnum, u16 bitnum, u8 *value); | ||
855 | |||
856 | #endif /* _ET1310_PHY_H_ */ | 822 | #endif /* _ET1310_PHY_H_ */ |
diff --git a/drivers/staging/et131x/et1310_pm.c b/drivers/staging/et131x/et1310_pm.c index 7d0772359291..41019e390af5 100644 --- a/drivers/staging/et131x/et1310_pm.c +++ b/drivers/staging/et131x/et1310_pm.c | |||
@@ -83,13 +83,9 @@ | |||
83 | #include <linux/ioport.h> | 83 | #include <linux/ioport.h> |
84 | 84 | ||
85 | #include "et1310_phy.h" | 85 | #include "et1310_phy.h" |
86 | #include "et1310_pm.h" | ||
87 | #include "et1310_jagcore.h" | ||
88 | #include "et1310_mac.h" | ||
89 | #include "et1310_rx.h" | 86 | #include "et1310_rx.h" |
90 | |||
91 | #include "et131x_adapter.h" | 87 | #include "et131x_adapter.h" |
92 | #include "et131x_initpci.h" | 88 | #include "et131x.h" |
93 | 89 | ||
94 | /** | 90 | /** |
95 | * EnablePhyComa - called when network cable is unplugged | 91 | * EnablePhyComa - called when network cable is unplugged |
diff --git a/drivers/staging/et131x/et1310_pm.h b/drivers/staging/et131x/et1310_pm.h deleted file mode 100644 index 295f3ab132fb..000000000000 --- a/drivers/staging/et131x/et1310_pm.h +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et1310_pm.h - Defines, structs, enums, prototypes, etc. pertaining to power | ||
12 | * management. | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef _ET1310_PM_H_ | ||
60 | #define _ET1310_PM_H_ | ||
61 | |||
62 | #include "et1310_address_map.h" | ||
63 | |||
64 | typedef struct _MP_POWER_MGMT { | ||
65 | /* variable putting the phy into coma mode when boot up with no cable | ||
66 | * plugged in after 5 seconds | ||
67 | */ | ||
68 | u8 TransPhyComaModeOnBoot; | ||
69 | |||
70 | /* Next two used to save power information at power down. This | ||
71 | * information will be used during power up to set up parts of Power | ||
72 | * Management in JAGCore | ||
73 | */ | ||
74 | u16 PowerDownSpeed; | ||
75 | u8 PowerDownDuplex; | ||
76 | } MP_POWER_MGMT, *PMP_POWER_MGMT; | ||
77 | |||
78 | /* Forward declaration of the private adapter structure | ||
79 | */ | ||
80 | struct et131x_adapter; | ||
81 | |||
82 | void EnablePhyComa(struct et131x_adapter *adapter); | ||
83 | void DisablePhyComa(struct et131x_adapter *adapter); | ||
84 | |||
85 | #endif /* _ET1310_PM_H_ */ | ||
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c index 81c1a7478ad6..54686e2ace69 100644 --- a/drivers/staging/et131x/et1310_rx.c +++ b/drivers/staging/et131x/et1310_rx.c | |||
@@ -84,14 +84,9 @@ | |||
84 | #include <linux/ioport.h> | 84 | #include <linux/ioport.h> |
85 | 85 | ||
86 | #include "et1310_phy.h" | 86 | #include "et1310_phy.h" |
87 | #include "et1310_pm.h" | ||
88 | #include "et1310_jagcore.h" | ||
89 | |||
90 | #include "et131x_adapter.h" | 87 | #include "et131x_adapter.h" |
91 | #include "et131x_initpci.h" | ||
92 | |||
93 | #include "et1310_rx.h" | 88 | #include "et1310_rx.h" |
94 | 89 | #include "et131x.h" | |
95 | 90 | ||
96 | void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD pMpRfd); | 91 | void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD pMpRfd); |
97 | 92 | ||
@@ -109,17 +104,16 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
109 | u32 i, j; | 104 | u32 i, j; |
110 | u32 bufsize; | 105 | u32 bufsize; |
111 | u32 pktStatRingSize, FBRChunkSize; | 106 | u32 pktStatRingSize, FBRChunkSize; |
112 | RX_RING_t *rx_ring; | 107 | struct rx_ring *rx_ring; |
113 | 108 | ||
114 | /* Setup some convenience pointers */ | 109 | /* Setup some convenience pointers */ |
115 | rx_ring = (RX_RING_t *) &adapter->RxRing; | 110 | rx_ring = &adapter->rx_ring; |
116 | 111 | ||
117 | /* Alloc memory for the lookup table */ | 112 | /* Alloc memory for the lookup table */ |
118 | #ifdef USE_FBR0 | 113 | #ifdef USE_FBR0 |
119 | rx_ring->Fbr[0] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL); | 114 | rx_ring->fbr[0] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL); |
120 | #endif | 115 | #endif |
121 | 116 | rx_ring->fbr[1] = kmalloc(sizeof(struct fbr_lookup), GFP_KERNEL); | |
122 | rx_ring->Fbr[1] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL); | ||
123 | 117 | ||
124 | /* The first thing we will do is configure the sizes of the buffer | 118 | /* The first thing we will do is configure the sizes of the buffer |
125 | * rings. These will change based on jumbo packet support. Larger | 119 | * rings. These will change based on jumbo packet support. Larger |
@@ -163,14 +157,14 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
163 | } | 157 | } |
164 | 158 | ||
165 | #ifdef USE_FBR0 | 159 | #ifdef USE_FBR0 |
166 | adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr0NumEntries + | 160 | adapter->rx_ring.PsrNumEntries = adapter->rx_ring.Fbr0NumEntries + |
167 | adapter->RxRing.Fbr1NumEntries; | 161 | adapter->rx_ring.Fbr1NumEntries; |
168 | #else | 162 | #else |
169 | adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr1NumEntries; | 163 | adapter->rx_ring.PsrNumEntries = adapter->rx_ring.Fbr1NumEntries; |
170 | #endif | 164 | #endif |
171 | 165 | ||
172 | /* Allocate an area of memory for Free Buffer Ring 1 */ | 166 | /* Allocate an area of memory for Free Buffer Ring 1 */ |
173 | bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff; | 167 | bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries) + 0xfff; |
174 | rx_ring->pFbr1RingVa = pci_alloc_consistent(adapter->pdev, | 168 | rx_ring->pFbr1RingVa = pci_alloc_consistent(adapter->pdev, |
175 | bufsize, | 169 | bufsize, |
176 | &rx_ring->pFbr1RingPa); | 170 | &rx_ring->pFbr1RingPa); |
@@ -194,12 +188,12 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
194 | &rx_ring->Fbr1Realpa, | 188 | &rx_ring->Fbr1Realpa, |
195 | &rx_ring->Fbr1offset, 0x0FFF); | 189 | &rx_ring->Fbr1offset, 0x0FFF); |
196 | 190 | ||
197 | rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa + | 191 | rx_ring->pFbr1RingVa = (void *)((u8 *) rx_ring->pFbr1RingVa + |
198 | rx_ring->Fbr1offset); | 192 | rx_ring->Fbr1offset); |
199 | 193 | ||
200 | #ifdef USE_FBR0 | 194 | #ifdef USE_FBR0 |
201 | /* Allocate an area of memory for Free Buffer Ring 0 */ | 195 | /* Allocate an area of memory for Free Buffer Ring 0 */ |
202 | bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff; | 196 | bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries) + 0xfff; |
203 | rx_ring->pFbr0RingVa = pci_alloc_consistent(adapter->pdev, | 197 | rx_ring->pFbr0RingVa = pci_alloc_consistent(adapter->pdev, |
204 | bufsize, | 198 | bufsize, |
205 | &rx_ring->pFbr0RingPa); | 199 | &rx_ring->pFbr0RingPa); |
@@ -223,7 +217,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
223 | &rx_ring->Fbr0Realpa, | 217 | &rx_ring->Fbr0Realpa, |
224 | &rx_ring->Fbr0offset, 0x0FFF); | 218 | &rx_ring->Fbr0offset, 0x0FFF); |
225 | 219 | ||
226 | rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa + | 220 | rx_ring->pFbr0RingVa = (void *)((u8 *) rx_ring->pFbr0RingVa + |
227 | rx_ring->Fbr0offset); | 221 | rx_ring->Fbr0offset); |
228 | #endif | 222 | #endif |
229 | 223 | ||
@@ -270,23 +264,23 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
270 | /* Save the Virtual address of this index for quick | 264 | /* Save the Virtual address of this index for quick |
271 | * access later | 265 | * access later |
272 | */ | 266 | */ |
273 | rx_ring->Fbr[1]->Va[index] = | 267 | rx_ring->fbr[1]->virt[index] = |
274 | (uint8_t *) rx_ring->Fbr1MemVa[i] + | 268 | (u8 *) rx_ring->Fbr1MemVa[i] + |
275 | (j * rx_ring->Fbr1BufferSize) + Fbr1Offset; | 269 | (j * rx_ring->Fbr1BufferSize) + Fbr1Offset; |
276 | 270 | ||
277 | /* now store the physical address in the descriptor | 271 | /* now store the physical address in the descriptor |
278 | * so the device can access it | 272 | * so the device can access it |
279 | */ | 273 | */ |
280 | rx_ring->Fbr[1]->PAHigh[index] = | 274 | rx_ring->fbr[1]->bus_high[index] = |
281 | (u32) (Fbr1TempPa >> 32); | 275 | (u32) (Fbr1TempPa >> 32); |
282 | rx_ring->Fbr[1]->PALow[index] = (u32) Fbr1TempPa; | 276 | rx_ring->fbr[1]->bus_low[index] = (u32) Fbr1TempPa; |
283 | 277 | ||
284 | Fbr1TempPa += rx_ring->Fbr1BufferSize; | 278 | Fbr1TempPa += rx_ring->Fbr1BufferSize; |
285 | 279 | ||
286 | rx_ring->Fbr[1]->Buffer1[index] = | 280 | rx_ring->fbr[1]->buffer1[index] = |
287 | rx_ring->Fbr[1]->Va[index]; | 281 | rx_ring->fbr[1]->virt[index]; |
288 | rx_ring->Fbr[1]->Buffer2[index] = | 282 | rx_ring->fbr[1]->buffer2[index] = |
289 | rx_ring->Fbr[1]->Va[index] - 4; | 283 | rx_ring->fbr[1]->virt[index] - 4; |
290 | } | 284 | } |
291 | } | 285 | } |
292 | 286 | ||
@@ -319,27 +313,27 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
319 | for (j = 0; j < FBR_CHUNKS; j++) { | 313 | for (j = 0; j < FBR_CHUNKS; j++) { |
320 | u32 index = (i * FBR_CHUNKS) + j; | 314 | u32 index = (i * FBR_CHUNKS) + j; |
321 | 315 | ||
322 | rx_ring->Fbr[0]->Va[index] = | 316 | rx_ring->fbr[0]->virt[index] = |
323 | (uint8_t *) rx_ring->Fbr0MemVa[i] + | 317 | (u8 *) rx_ring->Fbr0MemVa[i] + |
324 | (j * rx_ring->Fbr0BufferSize) + Fbr0Offset; | 318 | (j * rx_ring->Fbr0BufferSize) + Fbr0Offset; |
325 | 319 | ||
326 | rx_ring->Fbr[0]->PAHigh[index] = | 320 | rx_ring->fbr[0]->bus_high[index] = |
327 | (u32) (Fbr0TempPa >> 32); | 321 | (u32) (Fbr0TempPa >> 32); |
328 | rx_ring->Fbr[0]->PALow[index] = (u32) Fbr0TempPa; | 322 | rx_ring->fbr[0]->bus_low[index] = (u32) Fbr0TempPa; |
329 | 323 | ||
330 | Fbr0TempPa += rx_ring->Fbr0BufferSize; | 324 | Fbr0TempPa += rx_ring->Fbr0BufferSize; |
331 | 325 | ||
332 | rx_ring->Fbr[0]->Buffer1[index] = | 326 | rx_ring->fbr[0]->buffer1[index] = |
333 | rx_ring->Fbr[0]->Va[index]; | 327 | rx_ring->fbr[0]->virt[index]; |
334 | rx_ring->Fbr[0]->Buffer2[index] = | 328 | rx_ring->fbr[0]->buffer2[index] = |
335 | rx_ring->Fbr[0]->Va[index] - 4; | 329 | rx_ring->fbr[0]->virt[index] - 4; |
336 | } | 330 | } |
337 | } | 331 | } |
338 | #endif | 332 | #endif |
339 | 333 | ||
340 | /* Allocate an area of memory for FIFO of Packet Status ring entries */ | 334 | /* Allocate an area of memory for FIFO of Packet Status ring entries */ |
341 | pktStatRingSize = | 335 | pktStatRingSize = |
342 | sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries; | 336 | sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries; |
343 | 337 | ||
344 | rx_ring->pPSRingVa = pci_alloc_consistent(adapter->pdev, | 338 | rx_ring->pPSRingVa = pci_alloc_consistent(adapter->pdev, |
345 | pktStatRingSize, | 339 | pktStatRingSize, |
@@ -360,16 +354,16 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) | |||
360 | */ | 354 | */ |
361 | 355 | ||
362 | /* Allocate an area of memory for writeback of status information */ | 356 | /* Allocate an area of memory for writeback of status information */ |
363 | rx_ring->pRxStatusVa = pci_alloc_consistent(adapter->pdev, | 357 | rx_ring->rx_status_block = pci_alloc_consistent(adapter->pdev, |
364 | sizeof(RX_STATUS_BLOCK_t), | 358 | sizeof(struct rx_status_block), |
365 | &rx_ring->pRxStatusPa); | 359 | &rx_ring->rx_status_bus); |
366 | if (!rx_ring->pRxStatusVa) { | 360 | if (!rx_ring->rx_status_block) { |
367 | dev_err(&adapter->pdev->dev, | 361 | dev_err(&adapter->pdev->dev, |
368 | "Cannot alloc memory for Status Block\n"); | 362 | "Cannot alloc memory for Status Block\n"); |
369 | return -ENOMEM; | 363 | return -ENOMEM; |
370 | } | 364 | } |
371 | rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD; | 365 | rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD; |
372 | printk("PRS %lx\n", (unsigned long)rx_ring->pRxStatusPa); | 366 | printk("PRS %lx\n", (unsigned long)rx_ring->rx_status_bus); |
373 | 367 | ||
374 | /* Recv | 368 | /* Recv |
375 | * pci_pool_create initializes a lookaside list. After successful | 369 | * pci_pool_create initializes a lookaside list. After successful |
@@ -403,10 +397,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
403 | u32 bufsize; | 397 | u32 bufsize; |
404 | u32 pktStatRingSize; | 398 | u32 pktStatRingSize; |
405 | PMP_RFD rfd; | 399 | PMP_RFD rfd; |
406 | RX_RING_t *rx_ring; | 400 | struct rx_ring *rx_ring; |
407 | 401 | ||
408 | /* Setup some convenience pointers */ | 402 | /* Setup some convenience pointers */ |
409 | rx_ring = (RX_RING_t *) &adapter->RxRing; | 403 | rx_ring = &adapter->rx_ring; |
410 | 404 | ||
411 | /* Free RFDs and associated packet descriptors */ | 405 | /* Free RFDs and associated packet descriptors */ |
412 | WARN_ON(rx_ring->nReadyRecv != rx_ring->NumRfd); | 406 | WARN_ON(rx_ring->nReadyRecv != rx_ring->NumRfd); |
@@ -417,7 +411,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
417 | 411 | ||
418 | list_del(&rfd->list_node); | 412 | list_del(&rfd->list_node); |
419 | rfd->Packet = NULL; | 413 | rfd->Packet = NULL; |
420 | kmem_cache_free(adapter->RxRing.RecvLookaside, rfd); | 414 | kmem_cache_free(adapter->rx_ring.RecvLookaside, rfd); |
421 | } | 415 | } |
422 | 416 | ||
423 | /* Free Free Buffer Ring 1 */ | 417 | /* Free Free Buffer Ring 1 */ |
@@ -447,15 +441,14 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
447 | } | 441 | } |
448 | 442 | ||
449 | /* Now the FIFO itself */ | 443 | /* Now the FIFO itself */ |
450 | rx_ring->pFbr1RingVa = (void *)((uint8_t *) | 444 | rx_ring->pFbr1RingVa = (void *)((u8 *) |
451 | rx_ring->pFbr1RingVa - rx_ring->Fbr1offset); | 445 | rx_ring->pFbr1RingVa - rx_ring->Fbr1offset); |
452 | 446 | ||
453 | bufsize = | 447 | bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries) |
454 | (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff; | 448 | + 0xfff; |
455 | 449 | ||
456 | pci_free_consistent(adapter->pdev, | 450 | pci_free_consistent(adapter->pdev, bufsize, |
457 | bufsize, | 451 | rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); |
458 | rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); | ||
459 | 452 | ||
460 | rx_ring->pFbr1RingVa = NULL; | 453 | rx_ring->pFbr1RingVa = NULL; |
461 | } | 454 | } |
@@ -481,11 +474,11 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
481 | } | 474 | } |
482 | 475 | ||
483 | /* Now the FIFO itself */ | 476 | /* Now the FIFO itself */ |
484 | rx_ring->pFbr0RingVa = (void *)((uint8_t *) | 477 | rx_ring->pFbr0RingVa = (void *)((u8 *) |
485 | rx_ring->pFbr0RingVa - rx_ring->Fbr0offset); | 478 | rx_ring->pFbr0RingVa - rx_ring->Fbr0offset); |
486 | 479 | ||
487 | bufsize = | 480 | bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries) |
488 | (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff; | 481 | + 0xfff; |
489 | 482 | ||
490 | pci_free_consistent(adapter->pdev, | 483 | pci_free_consistent(adapter->pdev, |
491 | bufsize, | 484 | bufsize, |
@@ -498,7 +491,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
498 | /* Free Packet Status Ring */ | 491 | /* Free Packet Status Ring */ |
499 | if (rx_ring->pPSRingVa) { | 492 | if (rx_ring->pPSRingVa) { |
500 | pktStatRingSize = | 493 | pktStatRingSize = |
501 | sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries; | 494 | sizeof(struct pkt_stat_desc) * adapter->rx_ring.PsrNumEntries; |
502 | 495 | ||
503 | pci_free_consistent(adapter->pdev, pktStatRingSize, | 496 | pci_free_consistent(adapter->pdev, pktStatRingSize, |
504 | rx_ring->pPSRingVa, rx_ring->pPSRingPa); | 497 | rx_ring->pPSRingVa, rx_ring->pPSRingPa); |
@@ -507,12 +500,11 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
507 | } | 500 | } |
508 | 501 | ||
509 | /* Free area of memory for the writeback of status information */ | 502 | /* Free area of memory for the writeback of status information */ |
510 | if (rx_ring->pRxStatusVa) { | 503 | if (rx_ring->rx_status_block) { |
511 | pci_free_consistent(adapter->pdev, | 504 | pci_free_consistent(adapter->pdev, |
512 | sizeof(RX_STATUS_BLOCK_t), | 505 | sizeof(struct rx_status_block), |
513 | rx_ring->pRxStatusVa, rx_ring->pRxStatusPa); | 506 | rx_ring->rx_status_block, rx_ring->rx_status_bus); |
514 | 507 | rx_ring->rx_status_block = NULL; | |
515 | rx_ring->pRxStatusVa = NULL; | ||
516 | } | 508 | } |
517 | 509 | ||
518 | /* Free receive buffer pool */ | 510 | /* Free receive buffer pool */ |
@@ -527,10 +519,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) | |||
527 | 519 | ||
528 | /* Free the FBR Lookup Table */ | 520 | /* Free the FBR Lookup Table */ |
529 | #ifdef USE_FBR0 | 521 | #ifdef USE_FBR0 |
530 | kfree(rx_ring->Fbr[0]); | 522 | kfree(rx_ring->fbr[0]); |
531 | #endif | 523 | #endif |
532 | 524 | ||
533 | kfree(rx_ring->Fbr[1]); | 525 | kfree(rx_ring->fbr[1]); |
534 | 526 | ||
535 | /* Reset Counters */ | 527 | /* Reset Counters */ |
536 | rx_ring->nReadyRecv = 0; | 528 | rx_ring->nReadyRecv = 0; |
@@ -548,10 +540,10 @@ int et131x_init_recv(struct et131x_adapter *adapter) | |||
548 | PMP_RFD rfd = NULL; | 540 | PMP_RFD rfd = NULL; |
549 | u32 rfdct; | 541 | u32 rfdct; |
550 | u32 numrfd = 0; | 542 | u32 numrfd = 0; |
551 | RX_RING_t *rx_ring = NULL; | 543 | struct rx_ring *rx_ring; |
552 | 544 | ||
553 | /* Setup some convenience pointers */ | 545 | /* Setup some convenience pointers */ |
554 | rx_ring = (RX_RING_t *) &adapter->RxRing; | 546 | rx_ring = &adapter->rx_ring; |
555 | 547 | ||
556 | /* Setup each RFD */ | 548 | /* Setup each RFD */ |
557 | for (rfdct = 0; rfdct < rx_ring->NumRfd; rfdct++) { | 549 | for (rfdct = 0; rfdct < rx_ring->NumRfd; rfdct++) { |
@@ -594,9 +586,9 @@ int et131x_init_recv(struct et131x_adapter *adapter) | |||
594 | */ | 586 | */ |
595 | void ConfigRxDmaRegs(struct et131x_adapter *etdev) | 587 | void ConfigRxDmaRegs(struct et131x_adapter *etdev) |
596 | { | 588 | { |
597 | struct _RXDMA_t __iomem *rx_dma = &etdev->regs->rxdma; | 589 | struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma; |
598 | struct _rx_ring_t *rx_local = &etdev->RxRing; | 590 | struct rx_ring *rx_local = &etdev->rx_ring; |
599 | PFBR_DESC_t fbr_entry; | 591 | struct fbr_desc *fbr_entry; |
600 | u32 entry; | 592 | u32 entry; |
601 | u32 psr_num_des; | 593 | u32 psr_num_des; |
602 | unsigned long flags; | 594 | unsigned long flags; |
@@ -611,11 +603,11 @@ void ConfigRxDmaRegs(struct et131x_adapter *etdev) | |||
611 | * are ever returned, make sure the high part is retrieved here | 603 | * are ever returned, make sure the high part is retrieved here |
612 | * before storing the adjusted address. | 604 | * before storing the adjusted address. |
613 | */ | 605 | */ |
614 | writel((u32) ((u64)rx_local->pRxStatusPa >> 32), | 606 | writel((u32) ((u64)rx_local->rx_status_bus >> 32), |
615 | &rx_dma->dma_wb_base_hi); | 607 | &rx_dma->dma_wb_base_hi); |
616 | writel((u32) rx_local->pRxStatusPa, &rx_dma->dma_wb_base_lo); | 608 | writel((u32) rx_local->rx_status_bus, &rx_dma->dma_wb_base_lo); |
617 | 609 | ||
618 | memset(rx_local->pRxStatusVa, 0, sizeof(RX_STATUS_BLOCK_t)); | 610 | memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block)); |
619 | 611 | ||
620 | /* Set the address and parameters of the packet status ring into the | 612 | /* Set the address and parameters of the packet status ring into the |
621 | * 1310's registers | 613 | * 1310's registers |
@@ -636,11 +628,11 @@ void ConfigRxDmaRegs(struct et131x_adapter *etdev) | |||
636 | rx_local->local_psr_full = 0; | 628 | rx_local->local_psr_full = 0; |
637 | 629 | ||
638 | /* Now's the best time to initialize FBR1 contents */ | 630 | /* Now's the best time to initialize FBR1 contents */ |
639 | fbr_entry = (PFBR_DESC_t) rx_local->pFbr1RingVa; | 631 | fbr_entry = (struct fbr_desc *) rx_local->pFbr1RingVa; |
640 | for (entry = 0; entry < rx_local->Fbr1NumEntries; entry++) { | 632 | for (entry = 0; entry < rx_local->Fbr1NumEntries; entry++) { |
641 | fbr_entry->addr_hi = rx_local->Fbr[1]->PAHigh[entry]; | 633 | fbr_entry->addr_hi = rx_local->fbr[1]->bus_high[entry]; |
642 | fbr_entry->addr_lo = rx_local->Fbr[1]->PALow[entry]; | 634 | fbr_entry->addr_lo = rx_local->fbr[1]->bus_low[entry]; |
643 | fbr_entry->word2.bits.bi = entry; | 635 | fbr_entry->word2 = entry; |
644 | fbr_entry++; | 636 | fbr_entry++; |
645 | } | 637 | } |
646 | 638 | ||
@@ -661,11 +653,11 @@ void ConfigRxDmaRegs(struct et131x_adapter *etdev) | |||
661 | 653 | ||
662 | #ifdef USE_FBR0 | 654 | #ifdef USE_FBR0 |
663 | /* Now's the best time to initialize FBR0 contents */ | 655 | /* Now's the best time to initialize FBR0 contents */ |
664 | fbr_entry = (PFBR_DESC_t) rx_local->pFbr0RingVa; | 656 | fbr_entry = (struct fbr_desc *) rx_local->pFbr0RingVa; |
665 | for (entry = 0; entry < rx_local->Fbr0NumEntries; entry++) { | 657 | for (entry = 0; entry < rx_local->Fbr0NumEntries; entry++) { |
666 | fbr_entry->addr_hi = rx_local->Fbr[0]->PAHigh[entry]; | 658 | fbr_entry->addr_hi = rx_local->fbr[0]->bus_high[entry]; |
667 | fbr_entry->addr_lo = rx_local->Fbr[0]->PALow[entry]; | 659 | fbr_entry->addr_lo = rx_local->fbr[0]->bus_low[entry]; |
668 | fbr_entry->word2.bits.bi = entry; | 660 | fbr_entry->word2 = entry; |
669 | fbr_entry++; | 661 | fbr_entry++; |
670 | } | 662 | } |
671 | 663 | ||
@@ -721,18 +713,17 @@ void SetRxDmaTimer(struct et131x_adapter *etdev) | |||
721 | */ | 713 | */ |
722 | void et131x_rx_dma_disable(struct et131x_adapter *etdev) | 714 | void et131x_rx_dma_disable(struct et131x_adapter *etdev) |
723 | { | 715 | { |
724 | RXDMA_CSR_t csr; | 716 | u32 csr; |
725 | |||
726 | /* Setup the receive dma configuration register */ | 717 | /* Setup the receive dma configuration register */ |
727 | writel(0x00002001, &etdev->regs->rxdma.csr.value); | 718 | writel(0x00002001, &etdev->regs->rxdma.csr); |
728 | csr.value = readl(&etdev->regs->rxdma.csr.value); | 719 | csr = readl(&etdev->regs->rxdma.csr); |
729 | if (csr.bits.halt_status != 1) { | 720 | if ((csr & 0x00020000) != 1) { /* Check halt status (bit 17) */ |
730 | udelay(5); | 721 | udelay(5); |
731 | csr.value = readl(&etdev->regs->rxdma.csr.value); | 722 | csr = readl(&etdev->regs->rxdma.csr); |
732 | if (csr.bits.halt_status != 1) | 723 | if ((csr & 0x00020000) != 1) |
733 | dev_err(&etdev->pdev->dev, | 724 | dev_err(&etdev->pdev->dev, |
734 | "RX Dma failed to enter halt state. CSR 0x%08x\n", | 725 | "RX Dma failed to enter halt state. CSR 0x%08x\n", |
735 | csr.value); | 726 | csr); |
736 | } | 727 | } |
737 | } | 728 | } |
738 | 729 | ||
@@ -743,34 +734,33 @@ void et131x_rx_dma_disable(struct et131x_adapter *etdev) | |||
743 | void et131x_rx_dma_enable(struct et131x_adapter *etdev) | 734 | void et131x_rx_dma_enable(struct et131x_adapter *etdev) |
744 | { | 735 | { |
745 | /* Setup the receive dma configuration register for normal operation */ | 736 | /* Setup the receive dma configuration register for normal operation */ |
746 | RXDMA_CSR_t csr = { 0 }; | 737 | u32 csr = 0x2000; /* FBR1 enable */ |
747 | 738 | ||
748 | csr.bits.fbr1_enable = 1; | 739 | if (etdev->rx_ring.Fbr1BufferSize == 4096) |
749 | if (etdev->RxRing.Fbr1BufferSize == 4096) | 740 | csr |= 0x0800; |
750 | csr.bits.fbr1_size = 1; | 741 | else if (etdev->rx_ring.Fbr1BufferSize == 8192) |
751 | else if (etdev->RxRing.Fbr1BufferSize == 8192) | 742 | csr |= 0x1000; |
752 | csr.bits.fbr1_size = 2; | 743 | else if (etdev->rx_ring.Fbr1BufferSize == 16384) |
753 | else if (etdev->RxRing.Fbr1BufferSize == 16384) | 744 | csr |= 0x1800; |
754 | csr.bits.fbr1_size = 3; | ||
755 | #ifdef USE_FBR0 | 745 | #ifdef USE_FBR0 |
756 | csr.bits.fbr0_enable = 1; | 746 | csr |= 0x0400; /* FBR0 enable */ |
757 | if (etdev->RxRing.Fbr0BufferSize == 256) | 747 | if (etdev->rx_ring.Fbr0BufferSize == 256) |
758 | csr.bits.fbr0_size = 1; | 748 | csr |= 0x0100; |
759 | else if (etdev->RxRing.Fbr0BufferSize == 512) | 749 | else if (etdev->rx_ring.Fbr0BufferSize == 512) |
760 | csr.bits.fbr0_size = 2; | 750 | csr |= 0x0200; |
761 | else if (etdev->RxRing.Fbr0BufferSize == 1024) | 751 | else if (etdev->rx_ring.Fbr0BufferSize == 1024) |
762 | csr.bits.fbr0_size = 3; | 752 | csr |= 0x0300; |
763 | #endif | 753 | #endif |
764 | writel(csr.value, &etdev->regs->rxdma.csr.value); | 754 | writel(csr, &etdev->regs->rxdma.csr); |
765 | 755 | ||
766 | csr.value = readl(&etdev->regs->rxdma.csr.value); | 756 | csr = readl(&etdev->regs->rxdma.csr); |
767 | if (csr.bits.halt_status != 0) { | 757 | if ((csr & 0x00020000) != 0) { |
768 | udelay(5); | 758 | udelay(5); |
769 | csr.value = readl(&etdev->regs->rxdma.csr.value); | 759 | csr = readl(&etdev->regs->rxdma.csr); |
770 | if (csr.bits.halt_status != 0) { | 760 | if ((csr & 0x00020000) != 0) { |
771 | dev_err(&etdev->pdev->dev, | 761 | dev_err(&etdev->pdev->dev, |
772 | "RX Dma failed to exit halt state. CSR 0x%08x\n", | 762 | "RX Dma failed to exit halt state. CSR 0x%08x\n", |
773 | csr.value); | 763 | csr); |
774 | } | 764 | } |
775 | } | 765 | } |
776 | } | 766 | } |
@@ -788,46 +778,44 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev) | |||
788 | */ | 778 | */ |
789 | PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | 779 | PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) |
790 | { | 780 | { |
791 | struct _rx_ring_t *rx_local = &etdev->RxRing; | 781 | struct rx_ring *rx_local = &etdev->rx_ring; |
792 | PRX_STATUS_BLOCK_t status; | 782 | struct rx_status_block *status; |
793 | PPKT_STAT_DESC_t psr; | 783 | struct pkt_stat_desc *psr; |
794 | PMP_RFD rfd; | 784 | PMP_RFD rfd; |
795 | u32 i; | 785 | u32 i; |
796 | uint8_t *buf; | 786 | u8 *buf; |
797 | unsigned long flags; | 787 | unsigned long flags; |
798 | struct list_head *element; | 788 | struct list_head *element; |
799 | uint8_t rindex; | 789 | u8 rindex; |
800 | uint16_t bindex; | 790 | u16 bindex; |
801 | u32 len; | 791 | u32 len; |
802 | PKT_STAT_DESC_WORD0_t Word0; | 792 | u32 word0; |
793 | u32 word1; | ||
803 | 794 | ||
804 | /* RX Status block is written by the DMA engine prior to every | 795 | /* RX Status block is written by the DMA engine prior to every |
805 | * interrupt. It contains the next to be used entry in the Packet | 796 | * interrupt. It contains the next to be used entry in the Packet |
806 | * Status Ring, and also the two Free Buffer rings. | 797 | * Status Ring, and also the two Free Buffer rings. |
807 | */ | 798 | */ |
808 | status = (PRX_STATUS_BLOCK_t) rx_local->pRxStatusVa; | 799 | status = rx_local->rx_status_block; |
800 | word1 = status->Word1 >> 16; /* Get the useful bits */ | ||
809 | 801 | ||
810 | /* FIXME: tidy later when conversions complete */ | 802 | /* Check the PSR and wrap bits do not match */ |
811 | if (status->Word1.bits.PSRoffset == | 803 | if ((word1 & 0x1FFF) == (rx_local->local_psr_full & 0x1FFF)) |
812 | (rx_local->local_psr_full & 0xFFF) && | ||
813 | status->Word1.bits.PSRwrap == | ||
814 | ((rx_local->local_psr_full >> 12) & 1)) { | ||
815 | /* Looks like this ring is not updated yet */ | 804 | /* Looks like this ring is not updated yet */ |
816 | return NULL; | 805 | return NULL; |
817 | } | ||
818 | 806 | ||
819 | /* The packet status ring indicates that data is available. */ | 807 | /* The packet status ring indicates that data is available. */ |
820 | psr = (PPKT_STAT_DESC_t) (rx_local->pPSRingVa) + | 808 | psr = (struct pkt_stat_desc *) (rx_local->pPSRingVa) + |
821 | (rx_local->local_psr_full & 0xFFF); | 809 | (rx_local->local_psr_full & 0xFFF); |
822 | 810 | ||
823 | /* Grab any information that is required once the PSR is | 811 | /* Grab any information that is required once the PSR is |
824 | * advanced, since we can no longer rely on the memory being | 812 | * advanced, since we can no longer rely on the memory being |
825 | * accurate | 813 | * accurate |
826 | */ | 814 | */ |
827 | len = psr->word1.bits.length; | 815 | len = psr->word1 & 0xFFFF; |
828 | rindex = (uint8_t) psr->word1.bits.ri; | 816 | rindex = (psr->word1 >> 26) & 0x03; |
829 | bindex = (uint16_t) psr->word1.bits.bi; | 817 | bindex = (psr->word1 >> 16) & 0x3FF; |
830 | Word0 = psr->word0; | 818 | word0 = psr->word0; |
831 | 819 | ||
832 | /* Indicate that we have used this PSR entry. */ | 820 | /* Indicate that we have used this PSR entry. */ |
833 | /* FIXME wrap 12 */ | 821 | /* FIXME wrap 12 */ |
@@ -842,9 +830,8 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
842 | &etdev->regs->rxdma.psr_full_offset); | 830 | &etdev->regs->rxdma.psr_full_offset); |
843 | 831 | ||
844 | #ifndef USE_FBR0 | 832 | #ifndef USE_FBR0 |
845 | if (rindex != 1) { | 833 | if (rindex != 1) |
846 | return NULL; | 834 | return NULL; |
847 | } | ||
848 | #endif | 835 | #endif |
849 | 836 | ||
850 | #ifdef USE_FBR0 | 837 | #ifdef USE_FBR0 |
@@ -899,7 +886,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
899 | 886 | ||
900 | if (len) { | 887 | if (len) { |
901 | if (etdev->ReplicaPhyLoopbk == 1) { | 888 | if (etdev->ReplicaPhyLoopbk == 1) { |
902 | buf = rx_local->Fbr[rindex]->Va[bindex]; | 889 | buf = rx_local->fbr[rindex]->virt[bindex]; |
903 | 890 | ||
904 | if (memcmp(&buf[6], &etdev->CurrentAddress[0], | 891 | if (memcmp(&buf[6], &etdev->CurrentAddress[0], |
905 | ETH_ALEN) == 0) { | 892 | ETH_ALEN) == 0) { |
@@ -911,8 +898,8 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
911 | } | 898 | } |
912 | 899 | ||
913 | /* Determine if this is a multicast packet coming in */ | 900 | /* Determine if this is a multicast packet coming in */ |
914 | if ((Word0.value & ALCATEL_MULTICAST_PKT) && | 901 | if ((word0 & ALCATEL_MULTICAST_PKT) && |
915 | !(Word0.value & ALCATEL_BROADCAST_PKT)) { | 902 | !(word0 & ALCATEL_BROADCAST_PKT)) { |
916 | /* Promiscuous mode and Multicast mode are | 903 | /* Promiscuous mode and Multicast mode are |
917 | * not mutually exclusive as was first | 904 | * not mutually exclusive as was first |
918 | * thought. I guess Promiscuous is just | 905 | * thought. I guess Promiscuous is just |
@@ -923,8 +910,8 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
923 | if ((etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) | 910 | if ((etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) |
924 | && !(etdev->PacketFilter & ET131X_PACKET_TYPE_PROMISCUOUS) | 911 | && !(etdev->PacketFilter & ET131X_PACKET_TYPE_PROMISCUOUS) |
925 | && !(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { | 912 | && !(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { |
926 | buf = rx_local->Fbr[rindex]-> | 913 | buf = rx_local->fbr[rindex]-> |
927 | Va[bindex]; | 914 | virt[bindex]; |
928 | 915 | ||
929 | /* Loop through our list to see if the | 916 | /* Loop through our list to see if the |
930 | * destination address of this packet | 917 | * destination address of this packet |
@@ -963,7 +950,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
963 | 950 | ||
964 | if (len > 0) | 951 | if (len > 0) |
965 | etdev->Stats.multircv++; | 952 | etdev->Stats.multircv++; |
966 | } else if (Word0.value & ALCATEL_BROADCAST_PKT) | 953 | } else if (word0 & ALCATEL_BROADCAST_PKT) |
967 | etdev->Stats.brdcstrcv++; | 954 | etdev->Stats.brdcstrcv++; |
968 | else | 955 | else |
969 | /* Not sure what this counter measures in | 956 | /* Not sure what this counter measures in |
@@ -990,7 +977,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
990 | etdev->net_stats.rx_bytes += rfd->PacketSize; | 977 | etdev->net_stats.rx_bytes += rfd->PacketSize; |
991 | 978 | ||
992 | memcpy(skb_put(skb, rfd->PacketSize), | 979 | memcpy(skb_put(skb, rfd->PacketSize), |
993 | rx_local->Fbr[rindex]->Va[bindex], | 980 | rx_local->fbr[rindex]->virt[bindex], |
994 | rfd->PacketSize); | 981 | rfd->PacketSize); |
995 | 982 | ||
996 | skb->dev = etdev->netdev; | 983 | skb->dev = etdev->netdev; |
@@ -1014,7 +1001,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev) | |||
1014 | */ | 1001 | */ |
1015 | void et131x_reset_recv(struct et131x_adapter *etdev) | 1002 | void et131x_reset_recv(struct et131x_adapter *etdev) |
1016 | { | 1003 | { |
1017 | WARN_ON(list_empty(&etdev->RxRing.RecvList)); | 1004 | WARN_ON(list_empty(&etdev->rx_ring.RecvList)); |
1018 | 1005 | ||
1019 | } | 1006 | } |
1020 | 1007 | ||
@@ -1032,8 +1019,8 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev) | |||
1032 | 1019 | ||
1033 | /* Process up to available RFD's */ | 1020 | /* Process up to available RFD's */ |
1034 | while (count < NUM_PACKETS_HANDLED) { | 1021 | while (count < NUM_PACKETS_HANDLED) { |
1035 | if (list_empty(&etdev->RxRing.RecvList)) { | 1022 | if (list_empty(&etdev->rx_ring.RecvList)) { |
1036 | WARN_ON(etdev->RxRing.nReadyRecv != 0); | 1023 | WARN_ON(etdev->rx_ring.nReadyRecv != 0); |
1037 | done = false; | 1024 | done = false; |
1038 | break; | 1025 | break; |
1039 | } | 1026 | } |
@@ -1058,7 +1045,7 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev) | |||
1058 | etdev->Stats.ipackets++; | 1045 | etdev->Stats.ipackets++; |
1059 | 1046 | ||
1060 | /* Set the status on the packet, either resources or success */ | 1047 | /* Set the status on the packet, either resources or success */ |
1061 | if (etdev->RxRing.nReadyRecv < RFD_LOW_WATER_MARK) { | 1048 | if (etdev->rx_ring.nReadyRecv < RFD_LOW_WATER_MARK) { |
1062 | dev_warn(&etdev->pdev->dev, | 1049 | dev_warn(&etdev->pdev->dev, |
1063 | "RFD's are running out\n"); | 1050 | "RFD's are running out\n"); |
1064 | } | 1051 | } |
@@ -1066,12 +1053,12 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev) | |||
1066 | } | 1053 | } |
1067 | 1054 | ||
1068 | if (count == NUM_PACKETS_HANDLED || !done) { | 1055 | if (count == NUM_PACKETS_HANDLED || !done) { |
1069 | etdev->RxRing.UnfinishedReceives = true; | 1056 | etdev->rx_ring.UnfinishedReceives = true; |
1070 | writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO, | 1057 | writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO, |
1071 | &etdev->regs->global.watchdog_timer); | 1058 | &etdev->regs->global.watchdog_timer); |
1072 | } else | 1059 | } else |
1073 | /* Watchdog timer will disable itself if appropriate. */ | 1060 | /* Watchdog timer will disable itself if appropriate. */ |
1074 | etdev->RxRing.UnfinishedReceives = false; | 1061 | etdev->rx_ring.UnfinishedReceives = false; |
1075 | } | 1062 | } |
1076 | 1063 | ||
1077 | static inline u32 bump_fbr(u32 *fbr, u32 limit) | 1064 | static inline u32 bump_fbr(u32 *fbr, u32 limit) |
@@ -1099,10 +1086,10 @@ static inline u32 bump_fbr(u32 *fbr, u32 limit) | |||
1099 | */ | 1086 | */ |
1100 | void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd) | 1087 | void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd) |
1101 | { | 1088 | { |
1102 | struct _rx_ring_t *rx_local = &etdev->RxRing; | 1089 | struct rx_ring *rx_local = &etdev->rx_ring; |
1103 | struct _RXDMA_t __iomem *rx_dma = &etdev->regs->rxdma; | 1090 | struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma; |
1104 | uint16_t bi = rfd->bufferindex; | 1091 | u16 bi = rfd->bufferindex; |
1105 | uint8_t ri = rfd->ringindex; | 1092 | u8 ri = rfd->ringindex; |
1106 | unsigned long flags; | 1093 | unsigned long flags; |
1107 | 1094 | ||
1108 | /* We don't use any of the OOB data besides status. Otherwise, we | 1095 | /* We don't use any of the OOB data besides status. Otherwise, we |
@@ -1116,17 +1103,17 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd) | |||
1116 | spin_lock_irqsave(&etdev->FbrLock, flags); | 1103 | spin_lock_irqsave(&etdev->FbrLock, flags); |
1117 | 1104 | ||
1118 | if (ri == 1) { | 1105 | if (ri == 1) { |
1119 | PFBR_DESC_t next = | 1106 | struct fbr_desc *next = |
1120 | (PFBR_DESC_t) (rx_local->pFbr1RingVa) + | 1107 | (struct fbr_desc *) (rx_local->pFbr1RingVa) + |
1121 | INDEX10(rx_local->local_Fbr1_full); | 1108 | INDEX10(rx_local->local_Fbr1_full); |
1122 | 1109 | ||
1123 | /* Handle the Free Buffer Ring advancement here. Write | 1110 | /* Handle the Free Buffer Ring advancement here. Write |
1124 | * the PA / Buffer Index for the returned buffer into | 1111 | * the PA / Buffer Index for the returned buffer into |
1125 | * the oldest (next to be freed)FBR entry | 1112 | * the oldest (next to be freed)FBR entry |
1126 | */ | 1113 | */ |
1127 | next->addr_hi = rx_local->Fbr[1]->PAHigh[bi]; | 1114 | next->addr_hi = rx_local->fbr[1]->bus_high[bi]; |
1128 | next->addr_lo = rx_local->Fbr[1]->PALow[bi]; | 1115 | next->addr_lo = rx_local->fbr[1]->bus_low[bi]; |
1129 | next->word2.value = bi; | 1116 | next->word2 = bi; |
1130 | 1117 | ||
1131 | writel(bump_fbr(&rx_local->local_Fbr1_full, | 1118 | writel(bump_fbr(&rx_local->local_Fbr1_full, |
1132 | rx_local->Fbr1NumEntries - 1), | 1119 | rx_local->Fbr1NumEntries - 1), |
@@ -1134,17 +1121,17 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd) | |||
1134 | } | 1121 | } |
1135 | #ifdef USE_FBR0 | 1122 | #ifdef USE_FBR0 |
1136 | else { | 1123 | else { |
1137 | PFBR_DESC_t next = | 1124 | struct fbr_desc *next = (struct fbr_desc *) |
1138 | (PFBR_DESC_t) rx_local->pFbr0RingVa + | 1125 | rx_local->pFbr0RingVa + |
1139 | INDEX10(rx_local->local_Fbr0_full); | 1126 | INDEX10(rx_local->local_Fbr0_full); |
1140 | 1127 | ||
1141 | /* Handle the Free Buffer Ring advancement here. Write | 1128 | /* Handle the Free Buffer Ring advancement here. Write |
1142 | * the PA / Buffer Index for the returned buffer into | 1129 | * the PA / Buffer Index for the returned buffer into |
1143 | * the oldest (next to be freed) FBR entry | 1130 | * the oldest (next to be freed) FBR entry |
1144 | */ | 1131 | */ |
1145 | next->addr_hi = rx_local->Fbr[0]->PAHigh[bi]; | 1132 | next->addr_hi = rx_local->fbr[0]->bus_high[bi]; |
1146 | next->addr_lo = rx_local->Fbr[0]->PALow[bi]; | 1133 | next->addr_lo = rx_local->fbr[0]->bus_low[bi]; |
1147 | next->word2.value = bi; | 1134 | next->word2 = bi; |
1148 | 1135 | ||
1149 | writel(bump_fbr(&rx_local->local_Fbr0_full, | 1136 | writel(bump_fbr(&rx_local->local_Fbr0_full, |
1150 | rx_local->Fbr0NumEntries - 1), | 1137 | rx_local->Fbr0NumEntries - 1), |
diff --git a/drivers/staging/et131x/et1310_rx.h b/drivers/staging/et131x/et1310_rx.h index 69514593612c..ca84a9146d69 100644 --- a/drivers/staging/et131x/et1310_rx.h +++ b/drivers/staging/et131x/et1310_rx.h | |||
@@ -91,120 +91,60 @@ | |||
91 | #define ALCATEL_BROADCAST_PKT 0x02000000 | 91 | #define ALCATEL_BROADCAST_PKT 0x02000000 |
92 | 92 | ||
93 | /* typedefs for Free Buffer Descriptors */ | 93 | /* typedefs for Free Buffer Descriptors */ |
94 | typedef union _FBR_WORD2_t { | 94 | struct fbr_desc |
95 | u32 value; | 95 | { |
96 | struct { | ||
97 | #ifdef _BIT_FIELDS_HTOL | ||
98 | u32 reserved:22; /* bits 10-31 */ | ||
99 | u32 bi:10; /* bits 0-9(Buffer Index) */ | ||
100 | #else | ||
101 | u32 bi:10; /* bits 0-9(Buffer Index) */ | ||
102 | u32 reserved:22; /* bit 10-31 */ | ||
103 | #endif | ||
104 | } bits; | ||
105 | } FBR_WORD2_t, *PFBR_WORD2_t; | ||
106 | |||
107 | typedef struct _FBR_DESC_t { | ||
108 | u32 addr_lo; | 96 | u32 addr_lo; |
109 | u32 addr_hi; | 97 | u32 addr_hi; |
110 | FBR_WORD2_t word2; | 98 | u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */ |
111 | } FBR_DESC_t, *PFBR_DESC_t; | 99 | }; |
112 | |||
113 | /* Typedefs for Packet Status Ring Descriptors */ | ||
114 | typedef union _PKT_STAT_DESC_WORD0_t { | ||
115 | u32 value; | ||
116 | struct { | ||
117 | #ifdef _BIT_FIELDS_HTOL | ||
118 | /* top 16 bits are from the Alcatel Status Word as enumerated in */ | ||
119 | /* PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) */ | ||
120 | #if 0 | ||
121 | u32 asw_trunc:1; /* bit 31(Rx frame truncated) */ | ||
122 | #endif | ||
123 | u32 asw_long_evt:1; /* bit 31(Rx long event) */ | ||
124 | u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */ | ||
125 | u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */ | ||
126 | u32 asw_pause_frame:1; /* bit 28(is a pause frame) */ | ||
127 | u32 asw_control_frame:1; /* bit 27(is a control frame) */ | ||
128 | u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */ | ||
129 | u32 asw_broadcast:1; /* bit 25(has a broadcast address) */ | ||
130 | u32 asw_multicast:1; /* bit 24(has a multicast address) */ | ||
131 | u32 asw_OK:1; /* bit 23(valid CRC + no code error) */ | ||
132 | u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */ | ||
133 | u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */ | ||
134 | u32 asw_CRC_err:1; /* bit 20(CRC error) */ | ||
135 | u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */ | ||
136 | u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */ | ||
137 | u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */ | ||
138 | u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */ | ||
139 | u32 unused:5; /* bits 11-15 */ | ||
140 | u32 vp:1; /* bit 10(VLAN Packet) */ | ||
141 | u32 jp:1; /* bit 9(Jumbo Packet) */ | ||
142 | u32 ft:1; /* bit 8(Frame Truncated) */ | ||
143 | u32 drop:1; /* bit 7(Drop packet) */ | ||
144 | u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */ | ||
145 | u32 wol:1; /* bit 5(WOL Event) */ | ||
146 | u32 tcpp:1; /* bit 4(TCP checksum pass) */ | ||
147 | u32 tcpa:1; /* bit 3(TCP checksum assist) */ | ||
148 | u32 ipp:1; /* bit 2(IP checksum pass) */ | ||
149 | u32 ipa:1; /* bit 1(IP checksum assist) */ | ||
150 | u32 hp:1; /* bit 0(hash pass) */ | ||
151 | #else | ||
152 | u32 hp:1; /* bit 0(hash pass) */ | ||
153 | u32 ipa:1; /* bit 1(IP checksum assist) */ | ||
154 | u32 ipp:1; /* bit 2(IP checksum pass) */ | ||
155 | u32 tcpa:1; /* bit 3(TCP checksum assist) */ | ||
156 | u32 tcpp:1; /* bit 4(TCP checksum pass) */ | ||
157 | u32 wol:1; /* bit 5(WOL Event) */ | ||
158 | u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */ | ||
159 | u32 drop:1; /* bit 7(Drop packet) */ | ||
160 | u32 ft:1; /* bit 8(Frame Truncated) */ | ||
161 | u32 jp:1; /* bit 9(Jumbo Packet) */ | ||
162 | u32 vp:1; /* bit 10(VLAN Packet) */ | ||
163 | u32 unused:5; /* bits 11-15 */ | ||
164 | u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */ | ||
165 | u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */ | ||
166 | u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */ | ||
167 | u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */ | ||
168 | u32 asw_CRC_err:1; /* bit 20(CRC error) */ | ||
169 | u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */ | ||
170 | u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */ | ||
171 | u32 asw_OK:1; /* bit 23(valid CRC + no code error) */ | ||
172 | u32 asw_multicast:1; /* bit 24(has a multicast address) */ | ||
173 | u32 asw_broadcast:1; /* bit 25(has a broadcast address) */ | ||
174 | u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */ | ||
175 | u32 asw_control_frame:1; /* bit 27(is a control frame) */ | ||
176 | u32 asw_pause_frame:1; /* bit 28(is a pause frame) */ | ||
177 | u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */ | ||
178 | u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */ | ||
179 | u32 asw_long_evt:1; /* bit 31(Rx long event) */ | ||
180 | #if 0 | ||
181 | u32 asw_trunc:1; /* bit 31(Rx frame truncated) */ | ||
182 | #endif | ||
183 | #endif | ||
184 | } bits; | ||
185 | } PKT_STAT_DESC_WORD0_t, *PPKT_STAT_WORD0_t; | ||
186 | 100 | ||
187 | typedef union _PKT_STAT_DESC_WORD1_t { | 101 | /* Packet Status Ring Descriptors |
188 | u32 value; | 102 | * |
189 | struct { | 103 | * Word 0: |
190 | #ifdef _BIT_FIELDS_HTOL | 104 | * |
191 | u32 unused:4; /* bits 28-31 */ | 105 | * top 16 bits are from the Alcatel Status Word as enumerated in |
192 | u32 ri:2; /* bits 26-27(Ring Index) */ | 106 | * PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) |
193 | u32 bi:10; /* bits 16-25(Buffer Index) */ | 107 | * |
194 | u32 length:16; /* bit 0-15(length in bytes) */ | 108 | * 0: hp hash pass |
195 | #else | 109 | * 1: ipa IP checksum assist |
196 | u32 length:16; /* bit 0-15(length in bytes) */ | 110 | * 2: ipp IP checksum pass |
197 | u32 bi:10; /* bits 16-25(Buffer Index) */ | 111 | * 3: tcpa TCP checksum assist |
198 | u32 ri:2; /* bits 26-27(Ring Index) */ | 112 | * 4: tcpp TCP checksum pass |
199 | u32 unused:4; /* bits 28-31 */ | 113 | * 5: wol WOL Event |
200 | #endif | 114 | * 6: rxmac_error RXMAC Error Indicator |
201 | } bits; | 115 | * 7: drop Drop packet |
202 | } PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t; | 116 | * 8: ft Frame Truncated |
117 | * 9: jp Jumbo Packet | ||
118 | * 10: vp VLAN Packet | ||
119 | * 11-15: unused | ||
120 | * 16: asw_prev_pkt_dropped e.g. IFG too small on previous | ||
121 | * 17: asw_RX_DV_event short receive event detected | ||
122 | * 18: asw_false_carrier_event bad carrier since last good packet | ||
123 | * 19: asw_code_err one or more nibbles signalled as errors | ||
124 | * 20: asw_CRC_err CRC error | ||
125 | * 21: asw_len_chk_err frame length field incorrect | ||
126 | * 22: asw_too_long frame length > 1518 bytes | ||
127 | * 23: asw_OK valid CRC + no code error | ||
128 | * 24: asw_multicast has a multicast address | ||
129 | * 25: asw_broadcast has a broadcast address | ||
130 | * 26: asw_dribble_nibble spurious bits after EOP | ||
131 | * 27: asw_control_frame is a control frame | ||
132 | * 28: asw_pause_frame is a pause frame | ||
133 | * 29: asw_unsupported_op unsupported OP code | ||
134 | * 30: asw_VLAN_tag VLAN tag detected | ||
135 | * 31: asw_long_evt Rx long event | ||
136 | * | ||
137 | * Word 1: | ||
138 | * 0-15: length length in bytes | ||
139 | * 16-25: bi Buffer Index | ||
140 | * 26-27: ri Ring Index | ||
141 | * 28-31: reserved | ||
142 | */ | ||
203 | 143 | ||
204 | typedef struct _PKT_STAT_DESC_t { | 144 | struct pkt_stat_desc { |
205 | PKT_STAT_DESC_WORD0_t word0; | 145 | u32 word0; |
206 | PKT_STAT_DESC_WORD1_t word1; | 146 | u32 word1; |
207 | } PKT_STAT_DESC_t, *PPKT_STAT_DESC_t; | 147 | }; |
208 | 148 | ||
209 | /* Typedefs for the RX DMA status word */ | 149 | /* Typedefs for the RX DMA status word */ |
210 | 150 | ||
@@ -223,59 +163,38 @@ typedef struct _PKT_STAT_DESC_t { | |||
223 | * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine | 163 | * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine |
224 | * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word | 164 | * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word |
225 | * which contains the Packet Status Ring available offset. | 165 | * which contains the Packet Status Ring available offset. |
166 | * | ||
167 | * bit 0-15 reserved | ||
168 | * bit 16-27 PSRoffset | ||
169 | * bit 28 PSRwrap | ||
170 | * bit 29-31 unused | ||
226 | */ | 171 | */ |
227 | 172 | ||
228 | #define RXSTAT1_OFFSET 16 | ||
229 | #define RXSTAT1_MASK 0xFFF | ||
230 | #define RXSTAT1_WRAP 0x10000000 | ||
231 | |||
232 | typedef union _rxstat_word1_t { | ||
233 | u32 value; | ||
234 | struct { | ||
235 | #ifdef _BIT_FIELDS_HTOL | ||
236 | u32 PSRunused:3; /* bits 29-31 */ | ||
237 | u32 PSRwrap:1; /* bit 28 */ | ||
238 | u32 PSRoffset:12; /* bits 16-27 */ | ||
239 | u32 reserved:16; /* bits 0-15 */ | ||
240 | #else | ||
241 | u32 reserved:16; /* bits 0-15 */ | ||
242 | u32 PSRoffset:12; /* bits 16-27 */ | ||
243 | u32 PSRwrap:1; /* bit 28 */ | ||
244 | u32 PSRunused:3; /* bits 29-31 */ | ||
245 | #endif | ||
246 | } bits; | ||
247 | } RXSTAT_WORD1_t, *PRXSTAT_WORD1_t; | ||
248 | |||
249 | /* | 173 | /* |
250 | * RX_STATUS_BLOCK_t is sructure representing the status of the Rx DMA engine | 174 | * struct rx_status_block is a structure representing the status of the Rx |
251 | * it sits in free memory, and is pointed to by 0x101c / 0x1020 | 175 | * DMA engine it sits in free memory, and is pointed to by 0x101c / 0x1020 |
252 | */ | 176 | */ |
253 | typedef struct _rx_status_block_t { | 177 | struct rx_status_block { |
254 | u32 Word0; | 178 | u32 Word0; |
255 | RXSTAT_WORD1_t Word1; | 179 | u32 Word1; |
256 | } RX_STATUS_BLOCK_t, *PRX_STATUS_BLOCK_t; | 180 | }; |
257 | 181 | ||
258 | /* | 182 | /* |
259 | * Structure for look-up table holding free buffer ring pointers | 183 | * Structure for look-up table holding free buffer ring pointers |
260 | */ | 184 | */ |
261 | typedef struct _FbrLookupTable { | 185 | struct fbr_lookup { |
262 | void *Va[MAX_DESC_PER_RING_RX]; | 186 | void *virt[MAX_DESC_PER_RING_RX]; |
263 | void *Buffer1[MAX_DESC_PER_RING_RX]; | 187 | void *buffer1[MAX_DESC_PER_RING_RX]; |
264 | void *Buffer2[MAX_DESC_PER_RING_RX]; | 188 | void *buffer2[MAX_DESC_PER_RING_RX]; |
265 | u32 PAHigh[MAX_DESC_PER_RING_RX]; | 189 | u32 bus_high[MAX_DESC_PER_RING_RX]; |
266 | u32 PALow[MAX_DESC_PER_RING_RX]; | 190 | u32 bus_low[MAX_DESC_PER_RING_RX]; |
267 | } FBRLOOKUPTABLE, *PFBRLOOKUPTABLE; | 191 | }; |
268 | |||
269 | typedef enum { | ||
270 | ONE_PACKET_INTERRUPT, | ||
271 | FOUR_PACKET_INTERRUPT | ||
272 | } eRX_INTERRUPT_STATE_t, *PeRX_INTERRUPT_STATE_t; | ||
273 | 192 | ||
274 | /* | 193 | /* |
275 | * RX_RING_t is sructure representing the adaptor's local reference(s) to the | 194 | * struct rx_ring is the ssructure representing the adaptor's local |
276 | * rings | 195 | * reference(s) to the rings |
277 | */ | 196 | */ |
278 | typedef struct _rx_ring_t { | 197 | struct rx_ring { |
279 | #ifdef USE_FBR0 | 198 | #ifdef USE_FBR0 |
280 | void *pFbr0RingVa; | 199 | void *pFbr0RingVa; |
281 | dma_addr_t pFbr0RingPa; | 200 | dma_addr_t pFbr0RingPa; |
@@ -293,7 +212,7 @@ typedef struct _rx_ring_t { | |||
293 | dma_addr_t Fbr1MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; | 212 | dma_addr_t Fbr1MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; |
294 | uint64_t Fbr1Realpa; | 213 | uint64_t Fbr1Realpa; |
295 | uint64_t Fbr1offset; | 214 | uint64_t Fbr1offset; |
296 | FBRLOOKUPTABLE *Fbr[2]; | 215 | struct fbr_lookup *fbr[2]; /* One per ring */ |
297 | u32 local_Fbr1_full; | 216 | u32 local_Fbr1_full; |
298 | u32 Fbr1NumEntries; | 217 | u32 Fbr1NumEntries; |
299 | u32 Fbr1BufferSize; | 218 | u32 Fbr1BufferSize; |
@@ -303,8 +222,8 @@ typedef struct _rx_ring_t { | |||
303 | u32 local_psr_full; | 222 | u32 local_psr_full; |
304 | u32 PsrNumEntries; | 223 | u32 PsrNumEntries; |
305 | 224 | ||
306 | void *pRxStatusVa; | 225 | struct rx_status_block *rx_status_block; |
307 | dma_addr_t pRxStatusPa; | 226 | dma_addr_t rx_status_bus; |
308 | 227 | ||
309 | struct list_head RecvBufferPool; | 228 | struct list_head RecvBufferPool; |
310 | 229 | ||
@@ -320,30 +239,6 @@ typedef struct _rx_ring_t { | |||
320 | 239 | ||
321 | /* lookaside lists */ | 240 | /* lookaside lists */ |
322 | struct kmem_cache *RecvLookaside; | 241 | struct kmem_cache *RecvLookaside; |
323 | } RX_RING_t, *PRX_RING_t; | 242 | }; |
324 | |||
325 | /* Forward reference of RFD */ | ||
326 | struct _MP_RFD; | ||
327 | |||
328 | /* Forward declaration of the private adapter structure */ | ||
329 | struct et131x_adapter; | ||
330 | |||
331 | /* PROTOTYPES for Initialization */ | ||
332 | int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter); | ||
333 | void et131x_rx_dma_memory_free(struct et131x_adapter *adapter); | ||
334 | int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, | ||
335 | struct _MP_RFD *pMpRfd); | ||
336 | void et131x_rfd_resources_free(struct et131x_adapter *adapter, | ||
337 | struct _MP_RFD *pMpRfd); | ||
338 | int et131x_init_recv(struct et131x_adapter *adapter); | ||
339 | |||
340 | void ConfigRxDmaRegs(struct et131x_adapter *adapter); | ||
341 | void SetRxDmaTimer(struct et131x_adapter *adapter); | ||
342 | void et131x_rx_dma_disable(struct et131x_adapter *adapter); | ||
343 | void et131x_rx_dma_enable(struct et131x_adapter *adapter); | ||
344 | |||
345 | void et131x_reset_recv(struct et131x_adapter *adapter); | ||
346 | |||
347 | void et131x_handle_recv_interrupt(struct et131x_adapter *adapter); | ||
348 | 243 | ||
349 | #endif /* __ET1310_RX_H__ */ | 244 | #endif /* __ET1310_RX_H__ */ |
diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c index 977e8b34e7a6..b6ff20f47de4 100644 --- a/drivers/staging/et131x/et1310_tx.c +++ b/drivers/staging/et131x/et1310_tx.c | |||
@@ -84,15 +84,9 @@ | |||
84 | #include <linux/ioport.h> | 84 | #include <linux/ioport.h> |
85 | 85 | ||
86 | #include "et1310_phy.h" | 86 | #include "et1310_phy.h" |
87 | #include "et1310_pm.h" | ||
88 | #include "et1310_jagcore.h" | ||
89 | |||
90 | #include "et131x_adapter.h" | 87 | #include "et131x_adapter.h" |
91 | #include "et131x_initpci.h" | ||
92 | #include "et131x_isr.h" | ||
93 | |||
94 | #include "et1310_tx.h" | 88 | #include "et1310_tx.h" |
95 | 89 | #include "et131x.h" | |
96 | 90 | ||
97 | static inline void et131x_free_send_packet(struct et131x_adapter *etdev, | 91 | static inline void et131x_free_send_packet(struct et131x_adapter *etdev, |
98 | struct tcb *tcb); | 92 | struct tcb *tcb); |
@@ -200,7 +194,7 @@ void et131x_tx_dma_memory_free(struct et131x_adapter *adapter) | |||
200 | */ | 194 | */ |
201 | void ConfigTxDmaRegs(struct et131x_adapter *etdev) | 195 | void ConfigTxDmaRegs(struct et131x_adapter *etdev) |
202 | { | 196 | { |
203 | struct _TXDMA_t __iomem *txdma = &etdev->regs->txdma; | 197 | struct txdma_regs __iomem *txdma = &etdev->regs->txdma; |
204 | 198 | ||
205 | /* Load the hardware with the start of the transmit descriptor ring. */ | 199 | /* Load the hardware with the start of the transmit descriptor ring. */ |
206 | writel((u32) ((u64)etdev->tx_ring.tx_desc_ring_pa >> 32), | 200 | writel((u32) ((u64)etdev->tx_ring.tx_desc_ring_pa >> 32), |
diff --git a/drivers/staging/et131x/et1310_tx.h b/drivers/staging/et131x/et1310_tx.h index 4f0ea81978f5..82d06e9870de 100644 --- a/drivers/staging/et131x/et1310_tx.h +++ b/drivers/staging/et131x/et1310_tx.h | |||
@@ -147,18 +147,4 @@ struct tx_ring { | |||
147 | int since_irq; | 147 | int since_irq; |
148 | }; | 148 | }; |
149 | 149 | ||
150 | /* Forward declaration of the private adapter structure */ | ||
151 | struct et131x_adapter; | ||
152 | |||
153 | /* PROTOTYPES for et1310_tx.c */ | ||
154 | int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter); | ||
155 | void et131x_tx_dma_memory_free(struct et131x_adapter *adapter); | ||
156 | void ConfigTxDmaRegs(struct et131x_adapter *adapter); | ||
157 | void et131x_init_send(struct et131x_adapter *adapter); | ||
158 | void et131x_tx_dma_disable(struct et131x_adapter *adapter); | ||
159 | void et131x_tx_dma_enable(struct et131x_adapter *adapter); | ||
160 | void et131x_handle_send_interrupt(struct et131x_adapter *adapter); | ||
161 | void et131x_free_busy_send_packets(struct et131x_adapter *adapter); | ||
162 | int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev); | ||
163 | |||
164 | #endif /* __ET1310_TX_H__ */ | 150 | #endif /* __ET1310_TX_H__ */ |
diff --git a/drivers/staging/et131x/et131x.h b/drivers/staging/et131x/et131x.h new file mode 100644 index 000000000000..a8abfe6ca81f --- /dev/null +++ b/drivers/staging/et131x/et131x.h | |||
@@ -0,0 +1,153 @@ | |||
1 | /* | ||
2 | * Merged from files | ||
3 | * | ||
4 | * Copyright © 2005 Agere Systems Inc. | ||
5 | * All rights reserved. | ||
6 | * http://www.agere.com | ||
7 | * | ||
8 | * SOFTWARE LICENSE | ||
9 | * | ||
10 | * This software is provided subject to the following terms and conditions, | ||
11 | * which you should read carefully before using the software. Using this | ||
12 | * software indicates your acceptance of these terms and conditions. If you do | ||
13 | * not agree with these terms and conditions, do not use the software. | ||
14 | * | ||
15 | * Copyright © 2005 Agere Systems Inc. | ||
16 | * All rights reserved. | ||
17 | * | ||
18 | * Redistribution and use in source or binary forms, with or without | ||
19 | * modifications, are permitted provided that the following conditions are met: | ||
20 | * | ||
21 | * . Redistributions of source code must retain the above copyright notice, this | ||
22 | * list of conditions and the following Disclaimer as comments in the code as | ||
23 | * well as in the documentation and/or other materials provided with the | ||
24 | * distribution. | ||
25 | * | ||
26 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
27 | * this list of conditions and the following Disclaimer in the documentation | ||
28 | * and/or other materials provided with the distribution. | ||
29 | * | ||
30 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
31 | * may be used to endorse or promote products derived from this software | ||
32 | * without specific prior written permission. | ||
33 | * | ||
34 | * Disclaimer | ||
35 | * | ||
36 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
37 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
38 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
39 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
40 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
41 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
42 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
43 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
44 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
45 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
46 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
47 | * DAMAGE. | ||
48 | * | ||
49 | */ | ||
50 | |||
51 | /* et131x_eeprom.c */ | ||
52 | int et131x_init_eeprom(struct et131x_adapter *etdev); | ||
53 | |||
54 | /* et131x_initpci.c */ | ||
55 | void ConfigGlobalRegs(struct et131x_adapter *pAdapter); | ||
56 | void ConfigMMCRegs(struct et131x_adapter *pAdapter); | ||
57 | void et131x_enable_interrupts(struct et131x_adapter *adapter); | ||
58 | void et131x_disable_interrupts(struct et131x_adapter *adapter); | ||
59 | void et131x_align_allocated_memory(struct et131x_adapter *adapter, | ||
60 | u64 *phys_addr, | ||
61 | u64 *offset, u64 mask); | ||
62 | |||
63 | int et131x_adapter_setup(struct et131x_adapter *adapter); | ||
64 | int et131x_adapter_memory_alloc(struct et131x_adapter *adapter); | ||
65 | void et131x_adapter_memory_free(struct et131x_adapter *adapter); | ||
66 | void et131x_hwaddr_init(struct et131x_adapter *adapter); | ||
67 | void et131x_soft_reset(struct et131x_adapter *adapter); | ||
68 | |||
69 | /* et131x_isr.c */ | ||
70 | irqreturn_t et131x_isr(int irq, void *dev_id); | ||
71 | void et131x_isr_handler(struct work_struct *work); | ||
72 | |||
73 | /* et1310_mac.c */ | ||
74 | void ConfigMACRegs1(struct et131x_adapter *adapter); | ||
75 | void ConfigMACRegs2(struct et131x_adapter *adapter); | ||
76 | void ConfigRxMacRegs(struct et131x_adapter *adapter); | ||
77 | void ConfigTxMacRegs(struct et131x_adapter *adapter); | ||
78 | void ConfigMacStatRegs(struct et131x_adapter *adapter); | ||
79 | void ConfigFlowControl(struct et131x_adapter *adapter); | ||
80 | void UpdateMacStatHostCounters(struct et131x_adapter *adapter); | ||
81 | void HandleMacStatInterrupt(struct et131x_adapter *adapter); | ||
82 | void SetupDeviceForMulticast(struct et131x_adapter *adapter); | ||
83 | void SetupDeviceForUnicast(struct et131x_adapter *adapter); | ||
84 | |||
85 | /* et131x_netdev.c */ | ||
86 | struct net_device *et131x_device_alloc(void); | ||
87 | |||
88 | /* et131x_pm.c */ | ||
89 | void EnablePhyComa(struct et131x_adapter *adapter); | ||
90 | void DisablePhyComa(struct et131x_adapter *adapter); | ||
91 | |||
92 | /* et131x_phy.c */ | ||
93 | void ET1310_PhyInit(struct et131x_adapter *adapter); | ||
94 | void ET1310_PhyReset(struct et131x_adapter *adapter); | ||
95 | void ET1310_PhyPowerDown(struct et131x_adapter *adapter, bool down); | ||
96 | void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *adapter, | ||
97 | u16 duplex); | ||
98 | void ET1310_PhyAccessMiBit(struct et131x_adapter *adapter, | ||
99 | u16 action, | ||
100 | u16 regnum, u16 bitnum, u8 *value); | ||
101 | |||
102 | int et131x_xcvr_find(struct et131x_adapter *adapter); | ||
103 | void et131x_setphy_normal(struct et131x_adapter *adapter); | ||
104 | |||
105 | /* static inline function does not work because et131x_adapter is not always | ||
106 | * defined | ||
107 | */ | ||
108 | int PhyMiRead(struct et131x_adapter *adapter, u8 xcvrAddr, | ||
109 | u8 xcvrReg, u16 *value); | ||
110 | #define MiRead(adapter, xcvrReg, value) \ | ||
111 | PhyMiRead((adapter), (adapter)->Stats.xcvr_addr, (xcvrReg), (value)) | ||
112 | |||
113 | int32_t MiWrite(struct et131x_adapter *adapter, | ||
114 | u8 xcvReg, u16 value); | ||
115 | void et131x_Mii_check(struct et131x_adapter *pAdapter, | ||
116 | MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints); | ||
117 | |||
118 | /* This last is not strictly required (the driver could call the TPAL | ||
119 | * version instead), but this sets the adapter up correctly, and calls the | ||
120 | * access routine indirectly. This protects the driver from changes in TPAL. | ||
121 | */ | ||
122 | void SetPhy_10BaseTHalfDuplex(struct et131x_adapter *adapter); | ||
123 | |||
124 | |||
125 | /* et1310_rx.c */ | ||
126 | int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter); | ||
127 | void et131x_rx_dma_memory_free(struct et131x_adapter *adapter); | ||
128 | int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, | ||
129 | struct _MP_RFD *pMpRfd); | ||
130 | void et131x_rfd_resources_free(struct et131x_adapter *adapter, | ||
131 | struct _MP_RFD *pMpRfd); | ||
132 | int et131x_init_recv(struct et131x_adapter *adapter); | ||
133 | |||
134 | void ConfigRxDmaRegs(struct et131x_adapter *adapter); | ||
135 | void SetRxDmaTimer(struct et131x_adapter *adapter); | ||
136 | void et131x_rx_dma_disable(struct et131x_adapter *adapter); | ||
137 | void et131x_rx_dma_enable(struct et131x_adapter *adapter); | ||
138 | |||
139 | void et131x_reset_recv(struct et131x_adapter *adapter); | ||
140 | |||
141 | void et131x_handle_recv_interrupt(struct et131x_adapter *adapter); | ||
142 | |||
143 | /* et131x_tx.c */ | ||
144 | int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter); | ||
145 | void et131x_tx_dma_memory_free(struct et131x_adapter *adapter); | ||
146 | void ConfigTxDmaRegs(struct et131x_adapter *adapter); | ||
147 | void et131x_init_send(struct et131x_adapter *adapter); | ||
148 | void et131x_tx_dma_disable(struct et131x_adapter *adapter); | ||
149 | void et131x_tx_dma_enable(struct et131x_adapter *adapter); | ||
150 | void et131x_handle_send_interrupt(struct et131x_adapter *adapter); | ||
151 | void et131x_free_busy_send_packets(struct et131x_adapter *adapter); | ||
152 | int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev); | ||
153 | |||
diff --git a/drivers/staging/et131x/et131x_adapter.h b/drivers/staging/et131x/et131x_adapter.h index 3f7f37a56b6c..64a678fcb60a 100644 --- a/drivers/staging/et131x/et131x_adapter.h +++ b/drivers/staging/et131x/et131x_adapter.h | |||
@@ -77,38 +77,11 @@ | |||
77 | */ | 77 | */ |
78 | #define NUM_TRAFFIC_CLASSES 1 | 78 | #define NUM_TRAFFIC_CLASSES 1 |
79 | 79 | ||
80 | /* | ||
81 | * There are three ways of counting errors - if there are more than X errors | ||
82 | * in Y packets (represented by the "SAMPLE" macros), if there are more than | ||
83 | * N errors in a S mSec time period (the "PERIOD" macros), or if there are | ||
84 | * consecutive packets with errors (CONSEC_ERRORED_THRESH). This last covers | ||
85 | * for "Bursty" errors, and the errored packets may well not be contiguous, | ||
86 | * but several errors where the packet counter has changed by less than a | ||
87 | * small amount will cause this count to increment. | ||
88 | */ | ||
89 | #define TX_PACKETS_IN_SAMPLE 10000 | ||
90 | #define TX_MAX_ERRORS_IN_SAMPLE 50 | ||
91 | |||
92 | #define TX_ERROR_PERIOD 1000 | 80 | #define TX_ERROR_PERIOD 1000 |
93 | #define TX_MAX_ERRORS_IN_PERIOD 10 | ||
94 | |||
95 | #define LINK_DETECTION_TIMER 5000 | ||
96 | |||
97 | #define TX_CONSEC_RANGE 5 | ||
98 | #define TX_CONSEC_ERRORED_THRESH 10 | ||
99 | 81 | ||
100 | #define LO_MARK_PERCENT_FOR_PSR 15 | 82 | #define LO_MARK_PERCENT_FOR_PSR 15 |
101 | #define LO_MARK_PERCENT_FOR_RX 15 | 83 | #define LO_MARK_PERCENT_FOR_RX 15 |
102 | 84 | ||
103 | /* Counters for error rate monitoring */ | ||
104 | typedef struct _MP_ERR_COUNTERS { | ||
105 | u32 PktCountTxPackets; | ||
106 | u32 PktCountTxErrors; | ||
107 | u32 TimerBasedTxErrors; | ||
108 | u32 PktCountLastError; | ||
109 | u32 ErredConsecPackets; | ||
110 | } MP_ERR_COUNTERS, *PMP_ERR_COUNTERS; | ||
111 | |||
112 | /* RFD (Receive Frame Descriptor) */ | 85 | /* RFD (Receive Frame Descriptor) */ |
113 | typedef struct _MP_RFD { | 86 | typedef struct _MP_RFD { |
114 | struct list_head list_node; | 87 | struct list_head list_node; |
@@ -174,6 +147,20 @@ typedef struct _ce_stats_t { | |||
174 | u32 InterruptStatus; | 147 | u32 InterruptStatus; |
175 | } CE_STATS_t, *PCE_STATS_t; | 148 | } CE_STATS_t, *PCE_STATS_t; |
176 | 149 | ||
150 | typedef struct _MP_POWER_MGMT { | ||
151 | /* variable putting the phy into coma mode when boot up with no cable | ||
152 | * plugged in after 5 seconds | ||
153 | */ | ||
154 | u8 TransPhyComaModeOnBoot; | ||
155 | |||
156 | /* Next two used to save power information at power down. This | ||
157 | * information will be used during power up to set up parts of Power | ||
158 | * Management in JAGCore | ||
159 | */ | ||
160 | u16 PowerDownSpeed; | ||
161 | u8 PowerDownDuplex; | ||
162 | } MP_POWER_MGMT, *PMP_POWER_MGMT; | ||
163 | |||
177 | /* The private adapter structure */ | 164 | /* The private adapter structure */ |
178 | struct et131x_adapter { | 165 | struct et131x_adapter { |
179 | struct net_device *netdev; | 166 | struct net_device *netdev; |
@@ -248,7 +235,7 @@ struct et131x_adapter { | |||
248 | struct tx_ring tx_ring; | 235 | struct tx_ring tx_ring; |
249 | 236 | ||
250 | /* Rx Memory Variables */ | 237 | /* Rx Memory Variables */ |
251 | RX_RING_t RxRing; | 238 | struct rx_ring rx_ring; |
252 | 239 | ||
253 | /* Loopback specifics */ | 240 | /* Loopback specifics */ |
254 | u8 ReplicaPhyLoopbk; /* Replica Enable */ | 241 | u8 ReplicaPhyLoopbk; /* Replica Enable */ |
diff --git a/drivers/staging/et131x/et131x_config.h b/drivers/staging/et131x/et131x_config.h deleted file mode 100644 index 642c0f6dd6f3..000000000000 --- a/drivers/staging/et131x/et131x_config.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et131x_config.h - Defines, structs, enums, prototypes, etc. to support | ||
12 | * et131x_config.c | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET131X_CONFIG_H__ | ||
60 | #define __ET131X_CONFIG_H__ | ||
61 | |||
62 | /* Forward declaration of the private adapter structure */ | ||
63 | struct et131x_adapter; | ||
64 | |||
65 | void et131x_config_parse(struct et131x_adapter *adapter); | ||
66 | |||
67 | #endif /* __ET131X_CONFIG_H__ */ | ||
diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c index 0892b6a538db..5ad7e5a6f631 100644 --- a/drivers/staging/et131x/et131x_initpci.c +++ b/drivers/staging/et131x/et131x_initpci.c | |||
@@ -87,20 +87,16 @@ | |||
87 | #include <linux/random.h> | 87 | #include <linux/random.h> |
88 | 88 | ||
89 | #include "et1310_phy.h" | 89 | #include "et1310_phy.h" |
90 | #include "et1310_pm.h" | ||
91 | #include "et1310_jagcore.h" | ||
92 | 90 | ||
93 | #include "et131x_adapter.h" | 91 | #include "et131x_adapter.h" |
94 | #include "et131x_netdev.h" | ||
95 | #include "et131x_config.h" | ||
96 | #include "et131x_isr.h" | ||
97 | 92 | ||
98 | #include "et1310_address_map.h" | 93 | #include "et1310_address_map.h" |
99 | #include "et1310_tx.h" | 94 | #include "et1310_tx.h" |
100 | #include "et1310_rx.h" | 95 | #include "et1310_rx.h" |
101 | #include "et1310_mac.h" | 96 | #include "et131x.h" |
102 | #include "et1310_eeprom.h" | ||
103 | 97 | ||
98 | #define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */ | ||
99 | #define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */ | ||
104 | 100 | ||
105 | /* Defines for Parameter Default/Min/Max vaules */ | 101 | /* Defines for Parameter Default/Min/Max vaules */ |
106 | #define PARM_SPEED_DUPLEX_MIN 0 | 102 | #define PARM_SPEED_DUPLEX_MIN 0 |
@@ -327,7 +323,7 @@ void et131x_link_detection_handler(unsigned long data) | |||
327 | */ | 323 | */ |
328 | void ConfigGlobalRegs(struct et131x_adapter *etdev) | 324 | void ConfigGlobalRegs(struct et131x_adapter *etdev) |
329 | { | 325 | { |
330 | struct _GLOBAL_t __iomem *regs = &etdev->regs->global; | 326 | struct global_regs __iomem *regs = &etdev->regs->global; |
331 | 327 | ||
332 | writel(0, ®s->rxq_start_addr); | 328 | writel(0, ®s->rxq_start_addr); |
333 | writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); | 329 | writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); |
diff --git a/drivers/staging/et131x/et131x_initpci.h b/drivers/staging/et131x/et131x_initpci.h deleted file mode 100644 index 7269569a874b..000000000000 --- a/drivers/staging/et131x/et131x_initpci.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et131x_initpci.h - Header which includes common data and function prototypes | ||
12 | * related to the driver's PCI (and PCI Express) information. | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET131X_INITPCI_H__ | ||
60 | #define __ET131X_INITPCI_H__ | ||
61 | |||
62 | /* Function Prototypes */ | ||
63 | void et131x_align_allocated_memory(struct et131x_adapter *adapter, | ||
64 | u64 *phys_addr, | ||
65 | u64 *offset, u64 mask); | ||
66 | |||
67 | int et131x_adapter_setup(struct et131x_adapter *adapter); | ||
68 | int et131x_adapter_memory_alloc(struct et131x_adapter *adapter); | ||
69 | void et131x_adapter_memory_free(struct et131x_adapter *adapter); | ||
70 | void et131x_hwaddr_init(struct et131x_adapter *adapter); | ||
71 | void et131x_soft_reset(struct et131x_adapter *adapter); | ||
72 | |||
73 | #endif /* __ET131X_INITPCI_H__ */ | ||
diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c index f6d452dd14e2..8b6e0b7ec568 100644 --- a/drivers/staging/et131x/et131x_isr.c +++ b/drivers/staging/et131x/et131x_isr.c | |||
@@ -85,11 +85,27 @@ | |||
85 | #include <linux/ioport.h> | 85 | #include <linux/ioport.h> |
86 | 86 | ||
87 | #include "et1310_phy.h" | 87 | #include "et1310_phy.h" |
88 | #include "et1310_pm.h" | ||
89 | #include "et1310_jagcore.h" | ||
90 | #include "et1310_mac.h" | ||
91 | |||
92 | #include "et131x_adapter.h" | 88 | #include "et131x_adapter.h" |
89 | #include "et131x.h" | ||
90 | |||
91 | /* | ||
92 | * For interrupts, normal running is: | ||
93 | * rxdma_xfr_done, phy_interrupt, mac_stat_interrupt, | ||
94 | * watchdog_interrupt & txdma_xfer_done | ||
95 | * | ||
96 | * In both cases, when flow control is enabled for either Tx or bi-direction, | ||
97 | * we additional enable rx_fbr0_low and rx_fbr1_low, so we know when the | ||
98 | * buffer rings are running low. | ||
99 | */ | ||
100 | #define INT_MASK_DISABLE 0xffffffff | ||
101 | |||
102 | /* NOTE: Masking out MAC_STAT Interrupt for now... | ||
103 | * #define INT_MASK_ENABLE 0xfff6bf17 | ||
104 | * #define INT_MASK_ENABLE_NO_FLOW 0xfff6bfd7 | ||
105 | */ | ||
106 | #define INT_MASK_ENABLE 0xfffebf17 | ||
107 | #define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7 | ||
108 | |||
93 | 109 | ||
94 | /** | 110 | /** |
95 | * et131x_enable_interrupts - enable interrupt | 111 | * et131x_enable_interrupts - enable interrupt |
@@ -185,7 +201,7 @@ irqreturn_t et131x_isr(int irq, void *dev_id) | |||
185 | if (++tcb->stale > 1) | 201 | if (++tcb->stale > 1) |
186 | status |= ET_INTR_TXDMA_ISR; | 202 | status |= ET_INTR_TXDMA_ISR; |
187 | 203 | ||
188 | if (adapter->RxRing.UnfinishedReceives) | 204 | if (adapter->rx_ring.UnfinishedReceives) |
189 | status |= ET_INTR_RXDMA_XFR_DONE; | 205 | status |= ET_INTR_RXDMA_XFR_DONE; |
190 | else if (tcb == NULL) | 206 | else if (tcb == NULL) |
191 | writel(0, &adapter->regs->global.watchdog_timer); | 207 | writel(0, &adapter->regs->global.watchdog_timer); |
@@ -390,7 +406,7 @@ void et131x_isr_handler(struct work_struct *work) | |||
390 | 406 | ||
391 | /* Let's move on to the TxMac */ | 407 | /* Let's move on to the TxMac */ |
392 | if (status & ET_INTR_TXMAC) { | 408 | if (status & ET_INTR_TXMAC) { |
393 | u32 err = readl(&iomem->txmac.err.value); | 409 | u32 err = readl(&iomem->txmac.err); |
394 | 410 | ||
395 | /* | 411 | /* |
396 | * When any of the errors occur and TXMAC generates | 412 | * When any of the errors occur and TXMAC generates |
@@ -425,12 +441,12 @@ void et131x_isr_handler(struct work_struct *work) | |||
425 | 441 | ||
426 | dev_warn(&etdev->pdev->dev, | 442 | dev_warn(&etdev->pdev->dev, |
427 | "RXMAC interrupt, error 0x%08x. Requesting reset\n", | 443 | "RXMAC interrupt, error 0x%08x. Requesting reset\n", |
428 | readl(&iomem->rxmac.err_reg.value)); | 444 | readl(&iomem->rxmac.err_reg)); |
429 | 445 | ||
430 | dev_warn(&etdev->pdev->dev, | 446 | dev_warn(&etdev->pdev->dev, |
431 | "Enable 0x%08x, Diag 0x%08x\n", | 447 | "Enable 0x%08x, Diag 0x%08x\n", |
432 | readl(&iomem->rxmac.ctrl.value), | 448 | readl(&iomem->rxmac.ctrl), |
433 | readl(&iomem->rxmac.rxq_diag.value)); | 449 | readl(&iomem->rxmac.rxq_diag)); |
434 | 450 | ||
435 | /* | 451 | /* |
436 | * If we are debugging, we want to see this error, | 452 | * If we are debugging, we want to see this error, |
diff --git a/drivers/staging/et131x/et131x_isr.h b/drivers/staging/et131x/et131x_isr.h deleted file mode 100644 index 906d57727e20..000000000000 --- a/drivers/staging/et131x/et131x_isr.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et131x_isr.h - Defines, structs, enums, prototypes, etc. pertaining to the | ||
12 | * ISR processing code. | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET131X_ISR_H__ | ||
60 | #define __ET131X_ISR_H__ | ||
61 | |||
62 | irqreturn_t et131x_isr(int irq, void *dev_id); | ||
63 | void et131x_isr_handler(struct work_struct *work); | ||
64 | |||
65 | #endif /* __ET131X_ISR_H__ */ | ||
diff --git a/drivers/staging/et131x/et131x_netdev.c b/drivers/staging/et131x/et131x_netdev.c index edb78ae9e593..40f8954dde47 100644 --- a/drivers/staging/et131x/et131x_netdev.c +++ b/drivers/staging/et131x/et131x_netdev.c | |||
@@ -85,14 +85,9 @@ | |||
85 | #include <linux/ioport.h> | 85 | #include <linux/ioport.h> |
86 | 86 | ||
87 | #include "et1310_phy.h" | 87 | #include "et1310_phy.h" |
88 | #include "et1310_pm.h" | ||
89 | #include "et1310_jagcore.h" | ||
90 | #include "et1310_mac.h" | ||
91 | #include "et1310_tx.h" | 88 | #include "et1310_tx.h" |
92 | |||
93 | #include "et131x_adapter.h" | 89 | #include "et131x_adapter.h" |
94 | #include "et131x_isr.h" | 90 | #include "et131x.h" |
95 | #include "et131x_initpci.h" | ||
96 | 91 | ||
97 | struct net_device_stats *et131x_stats(struct net_device *netdev); | 92 | struct net_device_stats *et131x_stats(struct net_device *netdev); |
98 | int et131x_open(struct net_device *netdev); | 93 | int et131x_open(struct net_device *netdev); |
@@ -339,66 +334,64 @@ int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd) | |||
339 | * et131x_set_packet_filter - Configures the Rx Packet filtering on the device | 334 | * et131x_set_packet_filter - Configures the Rx Packet filtering on the device |
340 | * @adapter: pointer to our private adapter structure | 335 | * @adapter: pointer to our private adapter structure |
341 | * | 336 | * |
337 | * FIXME: lot of dups with MAC code | ||
338 | * | ||
342 | * Returns 0 on success, errno on failure | 339 | * Returns 0 on success, errno on failure |
343 | */ | 340 | */ |
344 | int et131x_set_packet_filter(struct et131x_adapter *adapter) | 341 | int et131x_set_packet_filter(struct et131x_adapter *adapter) |
345 | { | 342 | { |
346 | int status = 0; | 343 | int status = 0; |
347 | uint32_t filter = adapter->PacketFilter; | 344 | uint32_t filter = adapter->PacketFilter; |
348 | RXMAC_CTRL_t ctrl; | 345 | u32 ctrl; |
349 | RXMAC_PF_CTRL_t pf_ctrl; | 346 | u32 pf_ctrl; |
350 | 347 | ||
351 | ctrl.value = readl(&adapter->regs->rxmac.ctrl.value); | 348 | ctrl = readl(&adapter->regs->rxmac.ctrl); |
352 | pf_ctrl.value = readl(&adapter->regs->rxmac.pf_ctrl.value); | 349 | pf_ctrl = readl(&adapter->regs->rxmac.pf_ctrl); |
353 | 350 | ||
354 | /* Default to disabled packet filtering. Enable it in the individual | 351 | /* Default to disabled packet filtering. Enable it in the individual |
355 | * case statements that require the device to filter something | 352 | * case statements that require the device to filter something |
356 | */ | 353 | */ |
357 | ctrl.bits.pkt_filter_disable = 1; | 354 | ctrl |= 0x04; |
358 | 355 | ||
359 | /* Set us to be in promiscuous mode so we receive everything, this | 356 | /* Set us to be in promiscuous mode so we receive everything, this |
360 | * is also true when we get a packet filter of 0 | 357 | * is also true when we get a packet filter of 0 |
361 | */ | 358 | */ |
362 | if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) { | 359 | if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) |
363 | pf_ctrl.bits.filter_broad_en = 0; | 360 | pf_ctrl &= ~7; /* Clear filter bits */ |
364 | pf_ctrl.bits.filter_multi_en = 0; | 361 | else { |
365 | pf_ctrl.bits.filter_uni_en = 0; | ||
366 | } else { | ||
367 | /* | 362 | /* |
368 | * Set us up with Multicast packet filtering. Three cases are | 363 | * Set us up with Multicast packet filtering. Three cases are |
369 | * possible - (1) we have a multi-cast list, (2) we receive ALL | 364 | * possible - (1) we have a multi-cast list, (2) we receive ALL |
370 | * multicast entries or (3) we receive none. | 365 | * multicast entries or (3) we receive none. |
371 | */ | 366 | */ |
372 | if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) { | 367 | if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) |
373 | pf_ctrl.bits.filter_multi_en = 0; | 368 | pf_ctrl &= ~2; /* Multicast filter bit */ |
374 | } else { | 369 | else { |
375 | SetupDeviceForMulticast(adapter); | 370 | SetupDeviceForMulticast(adapter); |
376 | pf_ctrl.bits.filter_multi_en = 1; | 371 | pf_ctrl |= 2; |
377 | ctrl.bits.pkt_filter_disable = 0; | 372 | ctrl &= ~0x04; |
378 | } | 373 | } |
379 | 374 | ||
380 | /* Set us up with Unicast packet filtering */ | 375 | /* Set us up with Unicast packet filtering */ |
381 | if (filter & ET131X_PACKET_TYPE_DIRECTED) { | 376 | if (filter & ET131X_PACKET_TYPE_DIRECTED) { |
382 | SetupDeviceForUnicast(adapter); | 377 | SetupDeviceForUnicast(adapter); |
383 | pf_ctrl.bits.filter_uni_en = 1; | 378 | pf_ctrl |= 4; |
384 | ctrl.bits.pkt_filter_disable = 0; | 379 | ctrl &= ~0x04; |
385 | } | 380 | } |
386 | 381 | ||
387 | /* Set us up with Broadcast packet filtering */ | 382 | /* Set us up with Broadcast packet filtering */ |
388 | if (filter & ET131X_PACKET_TYPE_BROADCAST) { | 383 | if (filter & ET131X_PACKET_TYPE_BROADCAST) { |
389 | pf_ctrl.bits.filter_broad_en = 1; | 384 | pf_ctrl |= 1; /* Broadcast filter bit */ |
390 | ctrl.bits.pkt_filter_disable = 0; | 385 | ctrl &= ~0x04; |
391 | } else { | 386 | } else |
392 | pf_ctrl.bits.filter_broad_en = 0; | 387 | pf_ctrl &= ~1; |
393 | } | ||
394 | 388 | ||
395 | /* Setup the receive mac configuration registers - Packet | 389 | /* Setup the receive mac configuration registers - Packet |
396 | * Filter control + the enable / disable for packet filter | 390 | * Filter control + the enable / disable for packet filter |
397 | * in the control reg. | 391 | * in the control reg. |
398 | */ | 392 | */ |
399 | writel(pf_ctrl.value, | 393 | writel(pf_ctrl, &adapter->regs->rxmac.pf_ctrl); |
400 | &adapter->regs->rxmac.pf_ctrl.value); | 394 | writel(ctrl, &adapter->regs->rxmac.ctrl); |
401 | writel(ctrl.value, &adapter->regs->rxmac.ctrl.value); | ||
402 | } | 395 | } |
403 | return status; | 396 | return status; |
404 | } | 397 | } |
@@ -675,12 +668,8 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac) | |||
675 | 668 | ||
676 | memcpy(netdev->dev_addr, address->sa_data, netdev->addr_len); | 669 | memcpy(netdev->dev_addr, address->sa_data, netdev->addr_len); |
677 | 670 | ||
678 | printk(KERN_INFO | 671 | printk(KERN_INFO "%s: Setting MAC address to %pM\n", |
679 | "%s: Setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n", | 672 | netdev->name, netdev->dev_addr); |
680 | netdev->name, | ||
681 | netdev->dev_addr[0], netdev->dev_addr[1], | ||
682 | netdev->dev_addr[2], netdev->dev_addr[3], | ||
683 | netdev->dev_addr[4], netdev->dev_addr[5]); | ||
684 | 673 | ||
685 | /* Free Rx DMA memory */ | 674 | /* Free Rx DMA memory */ |
686 | et131x_adapter_memory_free(adapter); | 675 | et131x_adapter_memory_free(adapter); |
diff --git a/drivers/staging/et131x/et131x_netdev.h b/drivers/staging/et131x/et131x_netdev.h deleted file mode 100644 index 1eb4a922c01d..000000000000 --- a/drivers/staging/et131x/et131x_netdev.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * Agere Systems Inc. | ||
3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs | ||
4 | * | ||
5 | * Copyright © 2005 Agere Systems Inc. | ||
6 | * All rights reserved. | ||
7 | * http://www.agere.com | ||
8 | * | ||
9 | *------------------------------------------------------------------------------ | ||
10 | * | ||
11 | * et131x_netdev.h - Defines, structs, enums, prototypes, etc. related to the | ||
12 | * driver's net_device support. | ||
13 | * | ||
14 | *------------------------------------------------------------------------------ | ||
15 | * | ||
16 | * SOFTWARE LICENSE | ||
17 | * | ||
18 | * This software is provided subject to the following terms and conditions, | ||
19 | * which you should read carefully before using the software. Using this | ||
20 | * software indicates your acceptance of these terms and conditions. If you do | ||
21 | * not agree with these terms and conditions, do not use the software. | ||
22 | * | ||
23 | * Copyright © 2005 Agere Systems Inc. | ||
24 | * All rights reserved. | ||
25 | * | ||
26 | * Redistribution and use in source or binary forms, with or without | ||
27 | * modifications, are permitted provided that the following conditions are met: | ||
28 | * | ||
29 | * . Redistributions of source code must retain the above copyright notice, this | ||
30 | * list of conditions and the following Disclaimer as comments in the code as | ||
31 | * well as in the documentation and/or other materials provided with the | ||
32 | * distribution. | ||
33 | * | ||
34 | * . Redistributions in binary form must reproduce the above copyright notice, | ||
35 | * this list of conditions and the following Disclaimer in the documentation | ||
36 | * and/or other materials provided with the distribution. | ||
37 | * | ||
38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors | ||
39 | * may be used to endorse or promote products derived from this software | ||
40 | * without specific prior written permission. | ||
41 | * | ||
42 | * Disclaimer | ||
43 | * | ||
44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF | ||
46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY | ||
47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN | ||
48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY | ||
49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT | ||
53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | ||
54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
55 | * DAMAGE. | ||
56 | * | ||
57 | */ | ||
58 | |||
59 | #ifndef __ET131X_NETDEV_H__ | ||
60 | #define __ET131X_NETDEV_H__ | ||
61 | |||
62 | struct net_device *et131x_device_alloc(void); | ||
63 | |||
64 | #endif /* __ET131X_NETDEV_H__ */ | ||
diff --git a/drivers/staging/et131x/et131x_version.h b/drivers/staging/et131x/et131x_version.h index 568f6c8c34f5..2aa9bda44ac0 100644 --- a/drivers/staging/et131x/et131x_version.h +++ b/drivers/staging/et131x/et131x_version.h | |||
@@ -62,20 +62,13 @@ | |||
62 | #define DRIVER_LICENSE "Dual BSD/GPL" | 62 | #define DRIVER_LICENSE "Dual BSD/GPL" |
63 | #define DRIVER_DEVICE_STRING "ET1310" | 63 | #define DRIVER_DEVICE_STRING "ET1310" |
64 | #define DRIVER_NAME "et131x" | 64 | #define DRIVER_NAME "et131x" |
65 | #define DRIVER_MAJOR_VERSION 1 | 65 | #define DRIVER_VERSION_STRING "1.2.3-lk" |
66 | #define DRIVER_MINOR_VERSION 2 | ||
67 | #define DRIVER_PATCH_VERSION 3 | ||
68 | #define DRIVER_VERSION_STRING "1.2.3" | ||
69 | #define DRIVER_VENDOR "Agere Systems, http://www.agere.com" | 66 | #define DRIVER_VENDOR "Agere Systems, http://www.agere.com" |
70 | #define DRIVER_DESC "10/100/1000 Base-T Ethernet Driver" | 67 | #define DRIVER_DESC "10/100/1000 Base-T Ethernet Driver" |
71 | 68 | ||
72 | #define STRUCT_MODULE "net" /* blux: missed by the kernel */ | ||
73 | |||
74 | #define DRIVER_INFO DRIVER_DESC " for the "\ | 69 | #define DRIVER_INFO DRIVER_DESC " for the "\ |
75 | DRIVER_DEVICE_STRING ", v" \ | 70 | DRIVER_DEVICE_STRING ", v" \ |
76 | DRIVER_VERSION_STRING " by " \ | 71 | DRIVER_VERSION_STRING " by " \ |
77 | DRIVER_VENDOR | 72 | DRIVER_VENDOR |
78 | 73 | ||
79 | #define DRIVER_NAME_EXT "et131x.ko" | ||
80 | |||
81 | #endif /* __ET131X_VERSION_H__ */ | 74 | #endif /* __ET131X_VERSION_H__ */ |
diff --git a/drivers/staging/frontier/alphatrack.c b/drivers/staging/frontier/alphatrack.c index 15aed87fe1bb..a50a21518a8e 100644 --- a/drivers/staging/frontier/alphatrack.c +++ b/drivers/staging/frontier/alphatrack.c | |||
@@ -58,7 +58,7 @@ | |||
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | /* table of devices that work with this driver */ | 60 | /* table of devices that work with this driver */ |
61 | static struct usb_device_id usb_alphatrack_table[] = { | 61 | static const struct usb_device_id usb_alphatrack_table[] = { |
62 | {USB_DEVICE(VENDOR_ID, PRODUCT_ID)}, | 62 | {USB_DEVICE(VENDOR_ID, PRODUCT_ID)}, |
63 | {} /* Terminating entry */ | 63 | {} /* Terminating entry */ |
64 | }; | 64 | }; |
diff --git a/drivers/staging/frontier/tranzport.c b/drivers/staging/frontier/tranzport.c index ef8fcc8c67bd..2f03f43f3a2e 100644 --- a/drivers/staging/frontier/tranzport.c +++ b/drivers/staging/frontier/tranzport.c | |||
@@ -55,7 +55,7 @@ | |||
55 | #endif | 55 | #endif |
56 | 56 | ||
57 | /* table of devices that work with this driver */ | 57 | /* table of devices that work with this driver */ |
58 | static struct usb_device_id usb_tranzport_table[] = { | 58 | static const struct usb_device_id usb_tranzport_table[] = { |
59 | {USB_DEVICE(VENDOR_ID, PRODUCT_ID)}, | 59 | {USB_DEVICE(VENDOR_ID, PRODUCT_ID)}, |
60 | {} /* Terminating entry */ | 60 | {} /* Terminating entry */ |
61 | }; | 61 | }; |
diff --git a/drivers/staging/go7007/go7007-driver.c b/drivers/staging/go7007/go7007-driver.c index fb1345ffb858..d42ba1696999 100644 --- a/drivers/staging/go7007/go7007-driver.c +++ b/drivers/staging/go7007/go7007-driver.c | |||
@@ -128,6 +128,8 @@ static int go7007_load_encoder(struct go7007 *go) | |||
128 | return rv; | 128 | return rv; |
129 | } | 129 | } |
130 | 130 | ||
131 | MODULE_FIRMWARE("go7007fw.bin"); | ||
132 | |||
131 | /* | 133 | /* |
132 | * Boot the encoder and register the I2C adapter if requested. Do the | 134 | * Boot the encoder and register the I2C adapter if requested. Do the |
133 | * minimum initialization necessary, since the board-specific code may | 135 | * minimum initialization necessary, since the board-specific code may |
diff --git a/drivers/staging/go7007/go7007-usb.c b/drivers/staging/go7007/go7007-usb.c index 1e89dc04ec23..ee278f64a16b 100644 --- a/drivers/staging/go7007/go7007-usb.c +++ b/drivers/staging/go7007/go7007-usb.c | |||
@@ -444,7 +444,9 @@ static struct go7007_usb_board board_sensoray_2250 = { | |||
444 | }, | 444 | }, |
445 | }; | 445 | }; |
446 | 446 | ||
447 | static struct usb_device_id go7007_usb_id_table[] = { | 447 | MODULE_FIRMWARE("go7007tv.bin"); |
448 | |||
449 | static const struct usb_device_id go7007_usb_id_table[] = { | ||
448 | { | 450 | { |
449 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION | | 451 | .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION | |
450 | USB_DEVICE_ID_MATCH_INT_INFO, | 452 | USB_DEVICE_ID_MATCH_INT_INFO, |
diff --git a/drivers/staging/go7007/s2250-board.c b/drivers/staging/go7007/s2250-board.c index c324f6ea002b..dc89502ea1b7 100644 --- a/drivers/staging/go7007/s2250-board.c +++ b/drivers/staging/go7007/s2250-board.c | |||
@@ -667,7 +667,7 @@ static int s2250_remove(struct i2c_client *client) | |||
667 | return 0; | 667 | return 0; |
668 | } | 668 | } |
669 | 669 | ||
670 | static struct i2c_device_id s2250_id[] = { | 670 | static const struct i2c_device_id s2250_id[] = { |
671 | { "s2250", 0 }, | 671 | { "s2250", 0 }, |
672 | { } | 672 | { } |
673 | }; | 673 | }; |
diff --git a/drivers/staging/go7007/s2250-loader.c b/drivers/staging/go7007/s2250-loader.c index c152ab9be2fb..1de2dfb16d3f 100644 --- a/drivers/staging/go7007/s2250-loader.c +++ b/drivers/staging/go7007/s2250-loader.c | |||
@@ -139,7 +139,7 @@ failed2: | |||
139 | 139 | ||
140 | static void s2250loader_disconnect(struct usb_interface *interface) | 140 | static void s2250loader_disconnect(struct usb_interface *interface) |
141 | { | 141 | { |
142 | pdevice_extension_t s = usb_get_intfdata(interface); | 142 | pdevice_extension_t s; |
143 | printk(KERN_INFO "s2250: disconnect\n"); | 143 | printk(KERN_INFO "s2250: disconnect\n"); |
144 | lock_kernel(); | 144 | lock_kernel(); |
145 | s = usb_get_intfdata(interface); | 145 | s = usb_get_intfdata(interface); |
@@ -148,7 +148,7 @@ static void s2250loader_disconnect(struct usb_interface *interface) | |||
148 | unlock_kernel(); | 148 | unlock_kernel(); |
149 | } | 149 | } |
150 | 150 | ||
151 | static struct usb_device_id s2250loader_ids[] = { | 151 | static const struct usb_device_id s2250loader_ids[] = { |
152 | {USB_DEVICE(0x1943, 0xa250)}, | 152 | {USB_DEVICE(0x1943, 0xa250)}, |
153 | {} /* Terminating entry */ | 153 | {} /* Terminating entry */ |
154 | }; | 154 | }; |
diff --git a/drivers/staging/go7007/saa7134-go7007.c b/drivers/staging/go7007/saa7134-go7007.c index 665bbf59d026..b25d7d2090e1 100644 --- a/drivers/staging/go7007/saa7134-go7007.c +++ b/drivers/staging/go7007/saa7134-go7007.c | |||
@@ -84,6 +84,7 @@ static struct go7007_board_info board_voyager = { | |||
84 | }, | 84 | }, |
85 | }, | 85 | }, |
86 | }; | 86 | }; |
87 | MODULE_FIRMWARE("go7007tv.bin"); | ||
87 | 88 | ||
88 | /********************* Driver for GPIO HPI interface *********************/ | 89 | /********************* Driver for GPIO HPI interface *********************/ |
89 | 90 | ||
diff --git a/drivers/staging/go7007/wis-ov7640.c b/drivers/staging/go7007/wis-ov7640.c index 04d6d3a498a3..4f0cbdde2765 100644 --- a/drivers/staging/go7007/wis-ov7640.c +++ b/drivers/staging/go7007/wis-ov7640.c | |||
@@ -77,7 +77,7 @@ static int wis_ov7640_remove(struct i2c_client *client) | |||
77 | return 0; | 77 | return 0; |
78 | } | 78 | } |
79 | 79 | ||
80 | static struct i2c_device_id wis_ov7640_id[] = { | 80 | static const struct i2c_device_id wis_ov7640_id[] = { |
81 | { "wis_ov7640", 0 }, | 81 | { "wis_ov7640", 0 }, |
82 | { } | 82 | { } |
83 | }; | 83 | }; |
diff --git a/drivers/staging/go7007/wis-saa7113.c b/drivers/staging/go7007/wis-saa7113.c index 9ab893bd204e..d196e16fe72b 100644 --- a/drivers/staging/go7007/wis-saa7113.c +++ b/drivers/staging/go7007/wis-saa7113.c | |||
@@ -304,7 +304,7 @@ static int wis_saa7113_remove(struct i2c_client *client) | |||
304 | return 0; | 304 | return 0; |
305 | } | 305 | } |
306 | 306 | ||
307 | static struct i2c_device_id wis_saa7113_id[] = { | 307 | static const struct i2c_device_id wis_saa7113_id[] = { |
308 | { "wis_saa7113", 0 }, | 308 | { "wis_saa7113", 0 }, |
309 | { } | 309 | { } |
310 | }; | 310 | }; |
diff --git a/drivers/staging/go7007/wis-saa7115.c b/drivers/staging/go7007/wis-saa7115.c index 8687ad2de761..0f2b4a0ceccf 100644 --- a/drivers/staging/go7007/wis-saa7115.c +++ b/drivers/staging/go7007/wis-saa7115.c | |||
@@ -437,7 +437,7 @@ static int wis_saa7115_remove(struct i2c_client *client) | |||
437 | return 0; | 437 | return 0; |
438 | } | 438 | } |
439 | 439 | ||
440 | static struct i2c_device_id wis_saa7115_id[] = { | 440 | static const struct i2c_device_id wis_saa7115_id[] = { |
441 | { "wis_saa7115", 0 }, | 441 | { "wis_saa7115", 0 }, |
442 | { } | 442 | { } |
443 | }; | 443 | }; |
diff --git a/drivers/staging/go7007/wis-sony-tuner.c b/drivers/staging/go7007/wis-sony-tuner.c index 086896cec49b..c723e4aa7147 100644 --- a/drivers/staging/go7007/wis-sony-tuner.c +++ b/drivers/staging/go7007/wis-sony-tuner.c | |||
@@ -688,7 +688,7 @@ static int wis_sony_tuner_remove(struct i2c_client *client) | |||
688 | return 0; | 688 | return 0; |
689 | } | 689 | } |
690 | 690 | ||
691 | static struct i2c_device_id wis_sony_tuner_id[] = { | 691 | static const struct i2c_device_id wis_sony_tuner_id[] = { |
692 | { "wis_sony_tuner", 0 }, | 692 | { "wis_sony_tuner", 0 }, |
693 | { } | 693 | { } |
694 | }; | 694 | }; |
diff --git a/drivers/staging/go7007/wis-tw2804.c b/drivers/staging/go7007/wis-tw2804.c index e15794a2a0ae..1983839f554d 100644 --- a/drivers/staging/go7007/wis-tw2804.c +++ b/drivers/staging/go7007/wis-tw2804.c | |||
@@ -327,7 +327,7 @@ static int wis_tw2804_remove(struct i2c_client *client) | |||
327 | return 0; | 327 | return 0; |
328 | } | 328 | } |
329 | 329 | ||
330 | static struct i2c_device_id wis_tw2804_id[] = { | 330 | static const struct i2c_device_id wis_tw2804_id[] = { |
331 | { "wis_tw2804", 0 }, | 331 | { "wis_tw2804", 0 }, |
332 | { } | 332 | { } |
333 | }; | 333 | }; |
diff --git a/drivers/staging/go7007/wis-tw9903.c b/drivers/staging/go7007/wis-tw9903.c index 506dca6e942e..f97e2be3c0b5 100644 --- a/drivers/staging/go7007/wis-tw9903.c +++ b/drivers/staging/go7007/wis-tw9903.c | |||
@@ -309,7 +309,7 @@ static int wis_tw9903_remove(struct i2c_client *client) | |||
309 | return 0; | 309 | return 0; |
310 | } | 310 | } |
311 | 311 | ||
312 | static struct i2c_device_id wis_tw9903_id[] = { | 312 | static const struct i2c_device_id wis_tw9903_id[] = { |
313 | { "wis_tw9903", 0 }, | 313 | { "wis_tw9903", 0 }, |
314 | { } | 314 | { } |
315 | }; | 315 | }; |
diff --git a/drivers/staging/go7007/wis-uda1342.c b/drivers/staging/go7007/wis-uda1342.c index 739c7ae8913f..5c4eb49d7357 100644 --- a/drivers/staging/go7007/wis-uda1342.c +++ b/drivers/staging/go7007/wis-uda1342.c | |||
@@ -82,7 +82,7 @@ static int wis_uda1342_remove(struct i2c_client *client) | |||
82 | return 0; | 82 | return 0; |
83 | } | 83 | } |
84 | 84 | ||
85 | static struct i2c_device_id wis_uda1342_id[] = { | 85 | static const struct i2c_device_id wis_uda1342_id[] = { |
86 | { "wis_uda1342", 0 }, | 86 | { "wis_uda1342", 0 }, |
87 | { } | 87 | { } |
88 | }; | 88 | }; |
diff --git a/drivers/staging/hv/Channel.c b/drivers/staging/hv/Channel.c index 746370e82115..d46eb145484f 100644 --- a/drivers/staging/hv/Channel.c +++ b/drivers/staging/hv/Channel.c | |||
@@ -991,9 +991,8 @@ void VmbusChannelOnTimer(unsigned long data) | |||
991 | { | 991 | { |
992 | struct vmbus_channel *channel = (struct vmbus_channel *)data; | 992 | struct vmbus_channel *channel = (struct vmbus_channel *)data; |
993 | 993 | ||
994 | if (channel->OnChannelCallback) { | 994 | if (channel->OnChannelCallback) |
995 | channel->OnChannelCallback(channel->ChannelCallbackContext); | 995 | channel->OnChannelCallback(channel->ChannelCallbackContext); |
996 | } | ||
997 | } | 996 | } |
998 | 997 | ||
999 | /** | 998 | /** |
diff --git a/drivers/staging/hv/Hv.c b/drivers/staging/hv/Hv.c index c2809f2a2ce0..51149e69f3e8 100644 --- a/drivers/staging/hv/Hv.c +++ b/drivers/staging/hv/Hv.c | |||
@@ -208,50 +208,51 @@ int HvInit(void) | |||
208 | /* HvQueryHypervisorFeatures(maxLeaf); */ | 208 | /* HvQueryHypervisorFeatures(maxLeaf); */ |
209 | 209 | ||
210 | /* | 210 | /* |
211 | * Determine if we are running on xenlinux (ie x2v shim) or native | 211 | * We only support running on top of Hyper-V |
212 | * linux | ||
213 | */ | 212 | */ |
214 | rdmsrl(HV_X64_MSR_GUEST_OS_ID, gHvContext.GuestId); | 213 | rdmsrl(HV_X64_MSR_GUEST_OS_ID, gHvContext.GuestId); |
215 | if (gHvContext.GuestId == 0) { | 214 | |
216 | /* Write our OS info */ | 215 | if (gHvContext.GuestId != 0) { |
217 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, HV_LINUX_GUEST_ID); | 216 | DPRINT_ERR(VMBUS, "Unknown guest id (0x%llx)!!", |
218 | gHvContext.GuestId = HV_LINUX_GUEST_ID; | 217 | gHvContext.GuestId); |
218 | goto Cleanup; | ||
219 | } | 219 | } |
220 | 220 | ||
221 | /* Write our OS info */ | ||
222 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, HV_LINUX_GUEST_ID); | ||
223 | gHvContext.GuestId = HV_LINUX_GUEST_ID; | ||
224 | |||
221 | /* See if the hypercall page is already set */ | 225 | /* See if the hypercall page is already set */ |
222 | rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); | 226 | rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); |
223 | if (gHvContext.GuestId == HV_LINUX_GUEST_ID) { | ||
224 | /* Allocate the hypercall page memory */ | ||
225 | /* virtAddr = osd_PageAlloc(1); */ | ||
226 | virtAddr = osd_VirtualAllocExec(PAGE_SIZE); | ||
227 | |||
228 | if (!virtAddr) { | ||
229 | DPRINT_ERR(VMBUS, | ||
230 | "unable to allocate hypercall page!!"); | ||
231 | goto Cleanup; | ||
232 | } | ||
233 | 227 | ||
234 | hypercallMsr.Enable = 1; | 228 | /* |
235 | /* hypercallMsr.GuestPhysicalAddress = | 229 | * Allocate the hypercall page memory |
236 | * virt_to_phys(virtAddr) >> PAGE_SHIFT; */ | 230 | * virtAddr = osd_PageAlloc(1); |
237 | hypercallMsr.GuestPhysicalAddress = vmalloc_to_pfn(virtAddr); | 231 | */ |
238 | wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); | 232 | virtAddr = osd_VirtualAllocExec(PAGE_SIZE); |
239 | 233 | ||
240 | /* Confirm that hypercall page did get setup. */ | 234 | if (!virtAddr) { |
241 | hypercallMsr.AsUINT64 = 0; | 235 | DPRINT_ERR(VMBUS, |
242 | rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); | 236 | "unable to allocate hypercall page!!"); |
243 | if (!hypercallMsr.Enable) { | 237 | goto Cleanup; |
244 | DPRINT_ERR(VMBUS, "unable to set hypercall page!!"); | 238 | } |
245 | goto Cleanup; | ||
246 | } | ||
247 | 239 | ||
248 | gHvContext.HypercallPage = virtAddr; | 240 | hypercallMsr.Enable = 1; |
249 | } else { | 241 | |
250 | DPRINT_ERR(VMBUS, "Unknown guest id (0x%llx)!!", | 242 | hypercallMsr.GuestPhysicalAddress = vmalloc_to_pfn(virtAddr); |
251 | gHvContext.GuestId); | 243 | wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); |
244 | |||
245 | /* Confirm that hypercall page did get setup. */ | ||
246 | hypercallMsr.AsUINT64 = 0; | ||
247 | rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); | ||
248 | |||
249 | if (!hypercallMsr.Enable) { | ||
250 | DPRINT_ERR(VMBUS, "unable to set hypercall page!!"); | ||
252 | goto Cleanup; | 251 | goto Cleanup; |
253 | } | 252 | } |
254 | 253 | ||
254 | gHvContext.HypercallPage = virtAddr; | ||
255 | |||
255 | DPRINT_INFO(VMBUS, "Hypercall page VA=%p, PA=0x%0llx", | 256 | DPRINT_INFO(VMBUS, "Hypercall page VA=%p, PA=0x%0llx", |
256 | gHvContext.HypercallPage, | 257 | gHvContext.HypercallPage, |
257 | (u64)hypercallMsr.GuestPhysicalAddress << PAGE_SHIFT); | 258 | (u64)hypercallMsr.GuestPhysicalAddress << PAGE_SHIFT); |
@@ -273,8 +274,6 @@ int HvInit(void) | |||
273 | gHvContext.SignalEventParam->FlagNumber = 0; | 274 | gHvContext.SignalEventParam->FlagNumber = 0; |
274 | gHvContext.SignalEventParam->RsvdZ = 0; | 275 | gHvContext.SignalEventParam->RsvdZ = 0; |
275 | 276 | ||
276 | /* DPRINT_DBG(VMBUS, "My id %llu", HvGetCurrentPartitionId()); */ | ||
277 | |||
278 | DPRINT_EXIT(VMBUS); | 277 | DPRINT_EXIT(VMBUS); |
279 | 278 | ||
280 | return ret; | 279 | return ret; |
@@ -311,17 +310,14 @@ void HvCleanup(void) | |||
311 | kfree(gHvContext.SignalEventBuffer); | 310 | kfree(gHvContext.SignalEventBuffer); |
312 | } | 311 | } |
313 | 312 | ||
314 | if (gHvContext.GuestId == HV_LINUX_GUEST_ID) { | 313 | if (gHvContext.HypercallPage) { |
315 | if (gHvContext.HypercallPage) { | 314 | hypercallMsr.AsUINT64 = 0; |
316 | hypercallMsr.AsUINT64 = 0; | 315 | wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); |
317 | wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); | 316 | vfree(gHvContext.HypercallPage); |
318 | vfree(gHvContext.HypercallPage); | 317 | gHvContext.HypercallPage = NULL; |
319 | gHvContext.HypercallPage = NULL; | ||
320 | } | ||
321 | } | 318 | } |
322 | 319 | ||
323 | DPRINT_EXIT(VMBUS); | 320 | DPRINT_EXIT(VMBUS); |
324 | |||
325 | } | 321 | } |
326 | 322 | ||
327 | /** | 323 | /** |
@@ -393,7 +389,7 @@ void HvSynicInit(void *irqarg) | |||
393 | union hv_synic_siefp siefp; | 389 | union hv_synic_siefp siefp; |
394 | union hv_synic_sint sharedSint; | 390 | union hv_synic_sint sharedSint; |
395 | union hv_synic_scontrol sctrl; | 391 | union hv_synic_scontrol sctrl; |
396 | u64 guestID; | 392 | |
397 | u32 irqVector = *((u32 *)(irqarg)); | 393 | u32 irqVector = *((u32 *)(irqarg)); |
398 | int cpu = smp_processor_id(); | 394 | int cpu = smp_processor_id(); |
399 | 395 | ||
@@ -409,71 +405,41 @@ void HvSynicInit(void *irqarg) | |||
409 | 405 | ||
410 | DPRINT_INFO(VMBUS, "SynIC version: %llx", version); | 406 | DPRINT_INFO(VMBUS, "SynIC version: %llx", version); |
411 | 407 | ||
412 | /* TODO: Handle SMP */ | 408 | gHvContext.synICMessagePage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC); |
413 | if (gHvContext.GuestId == HV_XENLINUX_GUEST_ID) { | ||
414 | DPRINT_INFO(VMBUS, "Skipping SIMP and SIEFP setup since " | ||
415 | "it is already set."); | ||
416 | |||
417 | rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | ||
418 | rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | ||
419 | |||
420 | DPRINT_DBG(VMBUS, "Simp: %llx, Sifep: %llx", | ||
421 | simp.AsUINT64, siefp.AsUINT64); | ||
422 | |||
423 | /* | ||
424 | * Determine if we are running on xenlinux (ie x2v shim) or | ||
425 | * native linux | ||
426 | */ | ||
427 | rdmsrl(HV_X64_MSR_GUEST_OS_ID, guestID); | ||
428 | if (guestID == HV_LINUX_GUEST_ID) { | ||
429 | gHvContext.synICMessagePage[cpu] = | ||
430 | phys_to_virt(simp.BaseSimpGpa << PAGE_SHIFT); | ||
431 | gHvContext.synICEventPage[cpu] = | ||
432 | phys_to_virt(siefp.BaseSiefpGpa << PAGE_SHIFT); | ||
433 | } else { | ||
434 | DPRINT_ERR(VMBUS, "unknown guest id!!"); | ||
435 | goto Cleanup; | ||
436 | } | ||
437 | DPRINT_DBG(VMBUS, "MAPPED: Simp: %p, Sifep: %p", | ||
438 | gHvContext.synICMessagePage[cpu], | ||
439 | gHvContext.synICEventPage[cpu]); | ||
440 | } else { | ||
441 | gHvContext.synICMessagePage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC); | ||
442 | if (gHvContext.synICMessagePage[cpu] == NULL) { | ||
443 | DPRINT_ERR(VMBUS, | ||
444 | "unable to allocate SYNIC message page!!"); | ||
445 | goto Cleanup; | ||
446 | } | ||
447 | 409 | ||
448 | gHvContext.synICEventPage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC); | 410 | if (gHvContext.synICMessagePage[cpu] == NULL) { |
449 | if (gHvContext.synICEventPage[cpu] == NULL) { | 411 | DPRINT_ERR(VMBUS, |
450 | DPRINT_ERR(VMBUS, | 412 | "unable to allocate SYNIC message page!!"); |
451 | "unable to allocate SYNIC event page!!"); | 413 | goto Cleanup; |
452 | goto Cleanup; | 414 | } |
453 | } | ||
454 | 415 | ||
455 | /* Setup the Synic's message page */ | 416 | gHvContext.synICEventPage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC); |
456 | rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | ||
457 | simp.SimpEnabled = 1; | ||
458 | simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[cpu]) | ||
459 | >> PAGE_SHIFT; | ||
460 | 417 | ||
461 | DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx", | 418 | if (gHvContext.synICEventPage[cpu] == NULL) { |
462 | simp.AsUINT64); | 419 | DPRINT_ERR(VMBUS, |
420 | "unable to allocate SYNIC event page!!"); | ||
421 | goto Cleanup; | ||
422 | } | ||
463 | 423 | ||
464 | wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | 424 | /* Setup the Synic's message page */ |
425 | rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | ||
426 | simp.SimpEnabled = 1; | ||
427 | simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[cpu]) | ||
428 | >> PAGE_SHIFT; | ||
465 | 429 | ||
466 | /* Setup the Synic's event page */ | 430 | DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx", simp.AsUINT64); |
467 | rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | ||
468 | siefp.SiefpEnabled = 1; | ||
469 | siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[cpu]) | ||
470 | >> PAGE_SHIFT; | ||
471 | 431 | ||
472 | DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", | 432 | wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); |
473 | siefp.AsUINT64); | ||
474 | 433 | ||
475 | wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | 434 | /* Setup the Synic's event page */ |
476 | } | 435 | rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); |
436 | siefp.SiefpEnabled = 1; | ||
437 | siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[cpu]) | ||
438 | >> PAGE_SHIFT; | ||
439 | |||
440 | DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.AsUINT64); | ||
441 | |||
442 | wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | ||
477 | 443 | ||
478 | /* Setup the interception SINT. */ | 444 | /* Setup the interception SINT. */ |
479 | /* wrmsrl((HV_X64_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX), */ | 445 | /* wrmsrl((HV_X64_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX), */ |
@@ -505,13 +471,11 @@ void HvSynicInit(void *irqarg) | |||
505 | return; | 471 | return; |
506 | 472 | ||
507 | Cleanup: | 473 | Cleanup: |
508 | if (gHvContext.GuestId == HV_LINUX_GUEST_ID) { | 474 | if (gHvContext.synICEventPage[cpu]) |
509 | if (gHvContext.synICEventPage[cpu]) | 475 | osd_PageFree(gHvContext.synICEventPage[cpu], 1); |
510 | osd_PageFree(gHvContext.synICEventPage[cpu], 1); | ||
511 | 476 | ||
512 | if (gHvContext.synICMessagePage[cpu]) | 477 | if (gHvContext.synICMessagePage[cpu]) |
513 | osd_PageFree(gHvContext.synICMessagePage[cpu], 1); | 478 | osd_PageFree(gHvContext.synICMessagePage[cpu], 1); |
514 | } | ||
515 | 479 | ||
516 | DPRINT_EXIT(VMBUS); | 480 | DPRINT_EXIT(VMBUS); |
517 | return; | 481 | return; |
@@ -542,27 +506,20 @@ void HvSynicCleanup(void *arg) | |||
542 | /* Disable the interrupt */ | 506 | /* Disable the interrupt */ |
543 | wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); | 507 | wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); |
544 | 508 | ||
545 | /* | 509 | rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); |
546 | * Disable and free the resources only if we are running as | 510 | simp.SimpEnabled = 0; |
547 | * native linux since in xenlinux, we are sharing the | 511 | simp.BaseSimpGpa = 0; |
548 | * resources with the x2v shim | ||
549 | */ | ||
550 | if (gHvContext.GuestId == HV_LINUX_GUEST_ID) { | ||
551 | rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | ||
552 | simp.SimpEnabled = 0; | ||
553 | simp.BaseSimpGpa = 0; | ||
554 | 512 | ||
555 | wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); | 513 | wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); |
556 | 514 | ||
557 | rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | 515 | rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); |
558 | siefp.SiefpEnabled = 0; | 516 | siefp.SiefpEnabled = 0; |
559 | siefp.BaseSiefpGpa = 0; | 517 | siefp.BaseSiefpGpa = 0; |
560 | 518 | ||
561 | wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); | 519 | wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); |
562 | 520 | ||
563 | osd_PageFree(gHvContext.synICMessagePage[cpu], 1); | 521 | osd_PageFree(gHvContext.synICMessagePage[cpu], 1); |
564 | osd_PageFree(gHvContext.synICEventPage[cpu], 1); | 522 | osd_PageFree(gHvContext.synICEventPage[cpu], 1); |
565 | } | ||
566 | 523 | ||
567 | DPRINT_EXIT(VMBUS); | 524 | DPRINT_EXIT(VMBUS); |
568 | } | 525 | } |
diff --git a/drivers/staging/hv/Hv.h b/drivers/staging/hv/Hv.h index fce4b5cdac30..41f5ebb86e17 100644 --- a/drivers/staging/hv/Hv.h +++ b/drivers/staging/hv/Hv.h | |||
@@ -41,11 +41,6 @@ enum { | |||
41 | 41 | ||
42 | #define HV_PRESENT_BIT 0x80000000 | 42 | #define HV_PRESENT_BIT 0x80000000 |
43 | 43 | ||
44 | #define HV_XENLINUX_GUEST_ID_LO 0x00000000 | ||
45 | #define HV_XENLINUX_GUEST_ID_HI 0x0B00B135 | ||
46 | #define HV_XENLINUX_GUEST_ID (((u64)HV_XENLINUX_GUEST_ID_HI << 32) \ | ||
47 | | HV_XENLINUX_GUEST_ID_LO) | ||
48 | |||
49 | #define HV_LINUX_GUEST_ID_LO 0x00000000 | 44 | #define HV_LINUX_GUEST_ID_LO 0x00000000 |
50 | #define HV_LINUX_GUEST_ID_HI 0xB16B00B5 | 45 | #define HV_LINUX_GUEST_ID_HI 0xB16B00B5 |
51 | #define HV_LINUX_GUEST_ID (((u64)HV_LINUX_GUEST_ID_HI << 32) | \ | 46 | #define HV_LINUX_GUEST_ID (((u64)HV_LINUX_GUEST_ID_HI << 32) | \ |
@@ -102,8 +97,9 @@ struct hv_input_signal_event_buffer { | |||
102 | }; | 97 | }; |
103 | 98 | ||
104 | struct hv_context { | 99 | struct hv_context { |
105 | /* XenLinux or native Linux. If XenLinux, the hypercall and synic pages | 100 | /* We only support running on top of Hyper-V |
106 | * has already been initialized */ | 101 | * So at this point this really can only contain the Hyper-V ID |
102 | */ | ||
107 | u64 GuestId; | 103 | u64 GuestId; |
108 | 104 | ||
109 | void *HypercallPage; | 105 | void *HypercallPage; |
diff --git a/drivers/staging/hv/NetVscApi.h b/drivers/staging/hv/NetVscApi.h index 1ce2b74a34a7..95d7a32b12f2 100644 --- a/drivers/staging/hv/NetVscApi.h +++ b/drivers/staging/hv/NetVscApi.h | |||
@@ -105,8 +105,6 @@ struct netvsc_driver { | |||
105 | void (*OnLinkStatusChanged)(struct hv_device *dev, u32 Status); | 105 | void (*OnLinkStatusChanged)(struct hv_device *dev, u32 Status); |
106 | 106 | ||
107 | /* Specific to this driver */ | 107 | /* Specific to this driver */ |
108 | int (*OnOpen)(struct hv_device *dev); | ||
109 | int (*OnClose)(struct hv_device *dev); | ||
110 | int (*OnSend)(struct hv_device *dev, struct hv_netvsc_packet *packet); | 108 | int (*OnSend)(struct hv_device *dev, struct hv_netvsc_packet *packet); |
111 | 109 | ||
112 | void *Context; | 110 | void *Context; |
@@ -119,5 +117,7 @@ struct netvsc_device_info { | |||
119 | 117 | ||
120 | /* Interface */ | 118 | /* Interface */ |
121 | int NetVscInitialize(struct hv_driver *drv); | 119 | int NetVscInitialize(struct hv_driver *drv); |
120 | int RndisFilterOnOpen(struct hv_device *Device); | ||
121 | int RndisFilterOnClose(struct hv_device *Device); | ||
122 | 122 | ||
123 | #endif /* _NETVSC_API_H_ */ | 123 | #endif /* _NETVSC_API_H_ */ |
diff --git a/drivers/staging/hv/RingBuffer.c b/drivers/staging/hv/RingBuffer.c index f69ae33a91e3..80b8a2c7784f 100644 --- a/drivers/staging/hv/RingBuffer.c +++ b/drivers/staging/hv/RingBuffer.c | |||
@@ -48,7 +48,7 @@ Description: | |||
48 | static inline void | 48 | static inline void |
49 | GetRingBufferAvailBytes(RING_BUFFER_INFO *rbi, u32 *read, u32 *write) | 49 | GetRingBufferAvailBytes(RING_BUFFER_INFO *rbi, u32 *read, u32 *write) |
50 | { | 50 | { |
51 | u32 read_loc,write_loc; | 51 | u32 read_loc, write_loc; |
52 | 52 | ||
53 | /* Capture the read/write indices before they changed */ | 53 | /* Capture the read/write indices before they changed */ |
54 | read_loc = rbi->RingBuffer->ReadIndex; | 54 | read_loc = rbi->RingBuffer->ReadIndex; |
@@ -68,7 +68,7 @@ Description: | |||
68 | 68 | ||
69 | --*/ | 69 | --*/ |
70 | static inline u32 | 70 | static inline u32 |
71 | GetNextWriteLocation(RING_BUFFER_INFO* RingInfo) | 71 | GetNextWriteLocation(RING_BUFFER_INFO *RingInfo) |
72 | { | 72 | { |
73 | u32 next = RingInfo->RingBuffer->WriteIndex; | 73 | u32 next = RingInfo->RingBuffer->WriteIndex; |
74 | 74 | ||
@@ -87,7 +87,7 @@ Description: | |||
87 | 87 | ||
88 | --*/ | 88 | --*/ |
89 | static inline void | 89 | static inline void |
90 | SetNextWriteLocation(RING_BUFFER_INFO* RingInfo, u32 NextWriteLocation) | 90 | SetNextWriteLocation(RING_BUFFER_INFO *RingInfo, u32 NextWriteLocation) |
91 | { | 91 | { |
92 | RingInfo->RingBuffer->WriteIndex = NextWriteLocation; | 92 | RingInfo->RingBuffer->WriteIndex = NextWriteLocation; |
93 | } | 93 | } |
@@ -102,7 +102,7 @@ Description: | |||
102 | 102 | ||
103 | --*/ | 103 | --*/ |
104 | static inline u32 | 104 | static inline u32 |
105 | GetNextReadLocation(RING_BUFFER_INFO* RingInfo) | 105 | GetNextReadLocation(RING_BUFFER_INFO *RingInfo) |
106 | { | 106 | { |
107 | u32 next = RingInfo->RingBuffer->ReadIndex; | 107 | u32 next = RingInfo->RingBuffer->ReadIndex; |
108 | 108 | ||
@@ -122,7 +122,7 @@ Description: | |||
122 | 122 | ||
123 | --*/ | 123 | --*/ |
124 | static inline u32 | 124 | static inline u32 |
125 | GetNextReadLocationWithOffset(RING_BUFFER_INFO* RingInfo, u32 Offset) | 125 | GetNextReadLocationWithOffset(RING_BUFFER_INFO *RingInfo, u32 Offset) |
126 | { | 126 | { |
127 | u32 next = RingInfo->RingBuffer->ReadIndex; | 127 | u32 next = RingInfo->RingBuffer->ReadIndex; |
128 | 128 | ||
@@ -143,7 +143,7 @@ Description: | |||
143 | 143 | ||
144 | --*/ | 144 | --*/ |
145 | static inline void | 145 | static inline void |
146 | SetNextReadLocation(RING_BUFFER_INFO* RingInfo, u32 NextReadLocation) | 146 | SetNextReadLocation(RING_BUFFER_INFO *RingInfo, u32 NextReadLocation) |
147 | { | 147 | { |
148 | RingInfo->RingBuffer->ReadIndex = NextReadLocation; | 148 | RingInfo->RingBuffer->ReadIndex = NextReadLocation; |
149 | } | 149 | } |
@@ -159,7 +159,7 @@ Description: | |||
159 | 159 | ||
160 | --*/ | 160 | --*/ |
161 | static inline void * | 161 | static inline void * |
162 | GetRingBuffer(RING_BUFFER_INFO* RingInfo) | 162 | GetRingBuffer(RING_BUFFER_INFO *RingInfo) |
163 | { | 163 | { |
164 | return (void *)RingInfo->RingBuffer->Buffer; | 164 | return (void *)RingInfo->RingBuffer->Buffer; |
165 | } | 165 | } |
@@ -175,7 +175,7 @@ Description: | |||
175 | 175 | ||
176 | --*/ | 176 | --*/ |
177 | static inline u32 | 177 | static inline u32 |
178 | GetRingBufferSize(RING_BUFFER_INFO* RingInfo) | 178 | GetRingBufferSize(RING_BUFFER_INFO *RingInfo) |
179 | { | 179 | { |
180 | return RingInfo->RingDataSize; | 180 | return RingInfo->RingDataSize; |
181 | } | 181 | } |
@@ -190,9 +190,10 @@ Description: | |||
190 | 190 | ||
191 | --*/ | 191 | --*/ |
192 | static inline u64 | 192 | static inline u64 |
193 | GetRingBufferIndices(RING_BUFFER_INFO* RingInfo) | 193 | GetRingBufferIndices(RING_BUFFER_INFO *RingInfo) |
194 | { | 194 | { |
195 | return ((u64)RingInfo->RingBuffer->WriteIndex << 32) || RingInfo->RingBuffer->ReadIndex; | 195 | return ((u64)RingInfo->RingBuffer->WriteIndex << 32) |
196 | || RingInfo->RingBuffer->ReadIndex; | ||
196 | } | 197 | } |
197 | 198 | ||
198 | 199 | ||
@@ -210,9 +211,14 @@ void DumpRingInfo(RING_BUFFER_INFO *RingInfo, char *Prefix) | |||
210 | u32 bytesAvailToWrite; | 211 | u32 bytesAvailToWrite; |
211 | u32 bytesAvailToRead; | 212 | u32 bytesAvailToRead; |
212 | 213 | ||
213 | GetRingBufferAvailBytes(RingInfo, &bytesAvailToRead, &bytesAvailToWrite); | 214 | GetRingBufferAvailBytes(RingInfo, |
215 | &bytesAvailToRead, | ||
216 | &bytesAvailToWrite); | ||
214 | 217 | ||
215 | DPRINT(VMBUS, DEBUG_RING_LVL, "%s <<ringinfo %p buffer %p avail write %u avail read %u read idx %u write idx %u>>", | 218 | DPRINT(VMBUS, |
219 | DEBUG_RING_LVL, | ||
220 | "%s <<ringinfo %p buffer %p avail write %u " | ||
221 | "avail read %u read idx %u write idx %u>>", | ||
216 | Prefix, | 222 | Prefix, |
217 | RingInfo, | 223 | RingInfo, |
218 | RingInfo->RingBuffer->Buffer, | 224 | RingInfo->RingBuffer->Buffer, |
@@ -229,13 +235,13 @@ static u32 | |||
229 | CopyToRingBuffer( | 235 | CopyToRingBuffer( |
230 | RING_BUFFER_INFO *RingInfo, | 236 | RING_BUFFER_INFO *RingInfo, |
231 | u32 StartWriteOffset, | 237 | u32 StartWriteOffset, |
232 | void * Src, | 238 | void *Src, |
233 | u32 SrcLen); | 239 | u32 SrcLen); |
234 | 240 | ||
235 | static u32 | 241 | static u32 |
236 | CopyFromRingBuffer( | 242 | CopyFromRingBuffer( |
237 | RING_BUFFER_INFO *RingInfo, | 243 | RING_BUFFER_INFO *RingInfo, |
238 | void * Dest, | 244 | void *Dest, |
239 | u32 DestLen, | 245 | u32 DestLen, |
240 | u32 StartReadOffset); | 246 | u32 StartReadOffset); |
241 | 247 | ||
@@ -256,15 +262,15 @@ void RingBufferGetDebugInfo(RING_BUFFER_INFO *RingInfo, | |||
256 | u32 bytesAvailToWrite; | 262 | u32 bytesAvailToWrite; |
257 | u32 bytesAvailToRead; | 263 | u32 bytesAvailToRead; |
258 | 264 | ||
259 | if (RingInfo->RingBuffer) | 265 | if (RingInfo->RingBuffer) { |
260 | { | 266 | GetRingBufferAvailBytes(RingInfo, |
261 | GetRingBufferAvailBytes(RingInfo, &bytesAvailToRead, &bytesAvailToWrite); | 267 | &bytesAvailToRead, |
268 | &bytesAvailToWrite); | ||
262 | 269 | ||
263 | DebugInfo->BytesAvailToRead = bytesAvailToRead; | 270 | DebugInfo->BytesAvailToRead = bytesAvailToRead; |
264 | DebugInfo->BytesAvailToWrite = bytesAvailToWrite; | 271 | DebugInfo->BytesAvailToWrite = bytesAvailToWrite; |
265 | DebugInfo->CurrentReadIndex = RingInfo->RingBuffer->ReadIndex; | 272 | DebugInfo->CurrentReadIndex = RingInfo->RingBuffer->ReadIndex; |
266 | DebugInfo->CurrentWriteIndex = RingInfo->RingBuffer->WriteIndex; | 273 | DebugInfo->CurrentWriteIndex = RingInfo->RingBuffer->WriteIndex; |
267 | |||
268 | DebugInfo->CurrentInterruptMask = RingInfo->RingBuffer->InterruptMask; | 274 | DebugInfo->CurrentInterruptMask = RingInfo->RingBuffer->InterruptMask; |
269 | } | 275 | } |
270 | } | 276 | } |
@@ -299,7 +305,7 @@ int RingBufferInit(RING_BUFFER_INFO *RingInfo, void *Buffer, u32 BufferLen) | |||
299 | 305 | ||
300 | memset(RingInfo, 0, sizeof(RING_BUFFER_INFO)); | 306 | memset(RingInfo, 0, sizeof(RING_BUFFER_INFO)); |
301 | 307 | ||
302 | RingInfo->RingBuffer = (RING_BUFFER*)Buffer; | 308 | RingInfo->RingBuffer = (RING_BUFFER *)Buffer; |
303 | RingInfo->RingBuffer->ReadIndex = RingInfo->RingBuffer->WriteIndex = 0; | 309 | RingInfo->RingBuffer->ReadIndex = RingInfo->RingBuffer->WriteIndex = 0; |
304 | 310 | ||
305 | RingInfo->RingSize = BufferLen; | 311 | RingInfo->RingSize = BufferLen; |
@@ -319,7 +325,7 @@ Description: | |||
319 | Cleanup the ring buffer | 325 | Cleanup the ring buffer |
320 | 326 | ||
321 | --*/ | 327 | --*/ |
322 | void RingBufferCleanup(RING_BUFFER_INFO* RingInfo) | 328 | void RingBufferCleanup(RING_BUFFER_INFO *RingInfo) |
323 | { | 329 | { |
324 | } | 330 | } |
325 | 331 | ||
@@ -335,14 +341,14 @@ Description: | |||
335 | int RingBufferWrite(RING_BUFFER_INFO *OutRingInfo, | 341 | int RingBufferWrite(RING_BUFFER_INFO *OutRingInfo, |
336 | struct scatterlist *sglist, u32 sgcount) | 342 | struct scatterlist *sglist, u32 sgcount) |
337 | { | 343 | { |
338 | int i=0; | 344 | int i = 0; |
339 | u32 byteAvailToWrite; | 345 | u32 byteAvailToWrite; |
340 | u32 byteAvailToRead; | 346 | u32 byteAvailToRead; |
341 | u32 totalBytesToWrite=0; | 347 | u32 totalBytesToWrite = 0; |
342 | 348 | ||
343 | struct scatterlist *sg; | 349 | struct scatterlist *sg; |
344 | volatile u32 nextWriteLocation; | 350 | volatile u32 nextWriteLocation; |
345 | u64 prevIndices=0; | 351 | u64 prevIndices = 0; |
346 | unsigned long flags; | 352 | unsigned long flags; |
347 | 353 | ||
348 | DPRINT_ENTER(VMBUS); | 354 | DPRINT_ENTER(VMBUS); |
@@ -356,17 +362,23 @@ int RingBufferWrite(RING_BUFFER_INFO *OutRingInfo, | |||
356 | 362 | ||
357 | spin_lock_irqsave(&OutRingInfo->ring_lock, flags); | 363 | spin_lock_irqsave(&OutRingInfo->ring_lock, flags); |
358 | 364 | ||
359 | GetRingBufferAvailBytes(OutRingInfo, &byteAvailToRead, &byteAvailToWrite); | 365 | GetRingBufferAvailBytes(OutRingInfo, |
366 | &byteAvailToRead, | ||
367 | &byteAvailToWrite); | ||
360 | 368 | ||
361 | DPRINT_DBG(VMBUS, "Writing %u bytes...", totalBytesToWrite); | 369 | DPRINT_DBG(VMBUS, "Writing %u bytes...", totalBytesToWrite); |
362 | 370 | ||
363 | /* DumpRingInfo(OutRingInfo, "BEFORE "); */ | 371 | /* DumpRingInfo(OutRingInfo, "BEFORE "); */ |
364 | 372 | ||
365 | /* If there is only room for the packet, assume it is full. Otherwise, the next time around, we think the ring buffer */ | 373 | /* If there is only room for the packet, assume it is full. */ |
374 | /* Otherwise, the next time around, we think the ring buffer */ | ||
366 | /* is empty since the read index == write index */ | 375 | /* is empty since the read index == write index */ |
367 | if (byteAvailToWrite <= totalBytesToWrite) | 376 | if (byteAvailToWrite <= totalBytesToWrite) { |
368 | { | 377 | DPRINT_DBG(VMBUS, |
369 | DPRINT_DBG(VMBUS, "No more space left on outbound ring buffer (needed %u, avail %u)", totalBytesToWrite, byteAvailToWrite); | 378 | "No more space left on outbound ring buffer " |
379 | "(needed %u, avail %u)", | ||
380 | totalBytesToWrite, | ||
381 | byteAvailToWrite); | ||
370 | 382 | ||
371 | spin_unlock_irqrestore(&OutRingInfo->ring_lock, flags); | 383 | spin_unlock_irqrestore(&OutRingInfo->ring_lock, flags); |
372 | 384 | ||
@@ -423,17 +435,22 @@ int RingBufferPeek(RING_BUFFER_INFO *InRingInfo, void *Buffer, u32 BufferLen) | |||
423 | { | 435 | { |
424 | u32 bytesAvailToWrite; | 436 | u32 bytesAvailToWrite; |
425 | u32 bytesAvailToRead; | 437 | u32 bytesAvailToRead; |
426 | u32 nextReadLocation=0; | 438 | u32 nextReadLocation = 0; |
427 | unsigned long flags; | 439 | unsigned long flags; |
428 | 440 | ||
429 | spin_lock_irqsave(&InRingInfo->ring_lock, flags); | 441 | spin_lock_irqsave(&InRingInfo->ring_lock, flags); |
430 | 442 | ||
431 | GetRingBufferAvailBytes(InRingInfo, &bytesAvailToRead, &bytesAvailToWrite); | 443 | GetRingBufferAvailBytes(InRingInfo, |
444 | &bytesAvailToRead, | ||
445 | &bytesAvailToWrite); | ||
432 | 446 | ||
433 | /* Make sure there is something to read */ | 447 | /* Make sure there is something to read */ |
434 | if (bytesAvailToRead < BufferLen ) | 448 | if (bytesAvailToRead < BufferLen) { |
435 | { | 449 | /* DPRINT_DBG(VMBUS, |
436 | /* DPRINT_DBG(VMBUS, "got callback but not enough to read <avail to read %d read size %d>!!", bytesAvailToRead, BufferLen); */ | 450 | "got callback but not enough to read " |
451 | "<avail to read %d read size %d>!!", | ||
452 | bytesAvailToRead, | ||
453 | BufferLen); */ | ||
437 | 454 | ||
438 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); | 455 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); |
439 | 456 | ||
@@ -444,9 +461,9 @@ int RingBufferPeek(RING_BUFFER_INFO *InRingInfo, void *Buffer, u32 BufferLen) | |||
444 | nextReadLocation = GetNextReadLocation(InRingInfo); | 461 | nextReadLocation = GetNextReadLocation(InRingInfo); |
445 | 462 | ||
446 | nextReadLocation = CopyFromRingBuffer(InRingInfo, | 463 | nextReadLocation = CopyFromRingBuffer(InRingInfo, |
447 | Buffer, | 464 | Buffer, |
448 | BufferLen, | 465 | BufferLen, |
449 | nextReadLocation); | 466 | nextReadLocation); |
450 | 467 | ||
451 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); | 468 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); |
452 | 469 | ||
@@ -468,24 +485,29 @@ int RingBufferRead(RING_BUFFER_INFO *InRingInfo, void *Buffer, | |||
468 | { | 485 | { |
469 | u32 bytesAvailToWrite; | 486 | u32 bytesAvailToWrite; |
470 | u32 bytesAvailToRead; | 487 | u32 bytesAvailToRead; |
471 | u32 nextReadLocation=0; | 488 | u32 nextReadLocation = 0; |
472 | u64 prevIndices=0; | 489 | u64 prevIndices = 0; |
473 | unsigned long flags; | 490 | unsigned long flags; |
474 | 491 | ||
475 | ASSERT(BufferLen > 0); | 492 | ASSERT(BufferLen > 0); |
476 | 493 | ||
477 | spin_lock_irqsave(&InRingInfo->ring_lock, flags); | 494 | spin_lock_irqsave(&InRingInfo->ring_lock, flags); |
478 | 495 | ||
479 | GetRingBufferAvailBytes(InRingInfo, &bytesAvailToRead, &bytesAvailToWrite); | 496 | GetRingBufferAvailBytes(InRingInfo, |
497 | &bytesAvailToRead, | ||
498 | &bytesAvailToWrite); | ||
480 | 499 | ||
481 | DPRINT_DBG(VMBUS, "Reading %u bytes...", BufferLen); | 500 | DPRINT_DBG(VMBUS, "Reading %u bytes...", BufferLen); |
482 | 501 | ||
483 | /* DumpRingInfo(InRingInfo, "BEFORE "); */ | 502 | /* DumpRingInfo(InRingInfo, "BEFORE "); */ |
484 | 503 | ||
485 | /* Make sure there is something to read */ | 504 | /* Make sure there is something to read */ |
486 | if (bytesAvailToRead < BufferLen ) | 505 | if (bytesAvailToRead < BufferLen) { |
487 | { | 506 | DPRINT_DBG(VMBUS, |
488 | DPRINT_DBG(VMBUS, "got callback but not enough to read <avail to read %d read size %d>!!", bytesAvailToRead, BufferLen); | 507 | "got callback but not enough to read " |
508 | "<avail to read %d read size %d>!!", | ||
509 | bytesAvailToRead, | ||
510 | BufferLen); | ||
489 | 511 | ||
490 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); | 512 | spin_unlock_irqrestore(&InRingInfo->ring_lock, flags); |
491 | 513 | ||
@@ -495,17 +517,18 @@ int RingBufferRead(RING_BUFFER_INFO *InRingInfo, void *Buffer, | |||
495 | nextReadLocation = GetNextReadLocationWithOffset(InRingInfo, Offset); | 517 | nextReadLocation = GetNextReadLocationWithOffset(InRingInfo, Offset); |
496 | 518 | ||
497 | nextReadLocation = CopyFromRingBuffer(InRingInfo, | 519 | nextReadLocation = CopyFromRingBuffer(InRingInfo, |
498 | Buffer, | 520 | Buffer, |
499 | BufferLen, | 521 | BufferLen, |
500 | nextReadLocation); | 522 | nextReadLocation); |
501 | 523 | ||
502 | nextReadLocation = CopyFromRingBuffer(InRingInfo, | 524 | nextReadLocation = CopyFromRingBuffer(InRingInfo, |
503 | &prevIndices, | 525 | &prevIndices, |
504 | sizeof(u64), | 526 | sizeof(u64), |
505 | nextReadLocation); | 527 | nextReadLocation); |
506 | 528 | ||
507 | /* Make sure all reads are done before we update the read index since */ | 529 | /* Make sure all reads are done before we update the read index since */ |
508 | /* the writer may start writing to the read area once the read index is updated */ | 530 | /* the writer may start writing to the read area once the read index */ |
531 | /*is updated */ | ||
509 | mb(); | 532 | mb(); |
510 | 533 | ||
511 | /* Update the read index */ | 534 | /* Update the read index */ |
@@ -533,25 +556,22 @@ static u32 | |||
533 | CopyToRingBuffer( | 556 | CopyToRingBuffer( |
534 | RING_BUFFER_INFO *RingInfo, | 557 | RING_BUFFER_INFO *RingInfo, |
535 | u32 StartWriteOffset, | 558 | u32 StartWriteOffset, |
536 | void * Src, | 559 | void *Src, |
537 | u32 SrcLen) | 560 | u32 SrcLen) |
538 | { | 561 | { |
539 | void * ringBuffer=GetRingBuffer(RingInfo); | 562 | void *ringBuffer = GetRingBuffer(RingInfo); |
540 | u32 ringBufferSize=GetRingBufferSize(RingInfo); | 563 | u32 ringBufferSize = GetRingBufferSize(RingInfo); |
541 | u32 fragLen; | 564 | u32 fragLen; |
542 | 565 | ||
543 | if (SrcLen > ringBufferSize - StartWriteOffset) /* wrap-around detected! */ | 566 | /* wrap-around detected! */ |
544 | { | 567 | if (SrcLen > ringBufferSize - StartWriteOffset) { |
545 | DPRINT_DBG(VMBUS, "wrap-around detected!"); | 568 | DPRINT_DBG(VMBUS, "wrap-around detected!"); |
546 | 569 | ||
547 | fragLen = ringBufferSize - StartWriteOffset; | 570 | fragLen = ringBufferSize - StartWriteOffset; |
548 | memcpy(ringBuffer + StartWriteOffset, Src, fragLen); | 571 | memcpy(ringBuffer + StartWriteOffset, Src, fragLen); |
549 | memcpy(ringBuffer, Src + fragLen, SrcLen - fragLen); | 572 | memcpy(ringBuffer, Src + fragLen, SrcLen - fragLen); |
550 | } | 573 | } else |
551 | else | ||
552 | { | ||
553 | memcpy(ringBuffer + StartWriteOffset, Src, SrcLen); | 574 | memcpy(ringBuffer + StartWriteOffset, Src, SrcLen); |
554 | } | ||
555 | 575 | ||
556 | StartWriteOffset += SrcLen; | 576 | StartWriteOffset += SrcLen; |
557 | StartWriteOffset %= ringBufferSize; | 577 | StartWriteOffset %= ringBufferSize; |
@@ -573,28 +593,27 @@ Description: | |||
573 | static u32 | 593 | static u32 |
574 | CopyFromRingBuffer( | 594 | CopyFromRingBuffer( |
575 | RING_BUFFER_INFO *RingInfo, | 595 | RING_BUFFER_INFO *RingInfo, |
576 | void * Dest, | 596 | void *Dest, |
577 | u32 DestLen, | 597 | u32 DestLen, |
578 | u32 StartReadOffset) | 598 | u32 StartReadOffset) |
579 | { | 599 | { |
580 | void * ringBuffer=GetRingBuffer(RingInfo); | 600 | void *ringBuffer = GetRingBuffer(RingInfo); |
581 | u32 ringBufferSize=GetRingBufferSize(RingInfo); | 601 | u32 ringBufferSize = GetRingBufferSize(RingInfo); |
582 | 602 | ||
583 | u32 fragLen; | 603 | u32 fragLen; |
584 | 604 | ||
585 | if (DestLen > ringBufferSize - StartReadOffset) /* wrap-around detected at the src */ | 605 | /* wrap-around detected at the src */ |
586 | { | 606 | if (DestLen > ringBufferSize - StartReadOffset) { |
587 | DPRINT_DBG(VMBUS, "src wrap-around detected!"); | 607 | DPRINT_DBG(VMBUS, "src wrap-around detected!"); |
588 | 608 | ||
589 | fragLen = ringBufferSize - StartReadOffset; | 609 | fragLen = ringBufferSize - StartReadOffset; |
590 | 610 | ||
591 | memcpy(Dest, ringBuffer + StartReadOffset, fragLen); | 611 | memcpy(Dest, ringBuffer + StartReadOffset, fragLen); |
592 | memcpy(Dest + fragLen, ringBuffer, DestLen - fragLen); | 612 | memcpy(Dest + fragLen, ringBuffer, DestLen - fragLen); |
593 | } | 613 | } else |
594 | else | 614 | |
595 | { | ||
596 | memcpy(Dest, ringBuffer + StartReadOffset, DestLen); | 615 | memcpy(Dest, ringBuffer + StartReadOffset, DestLen); |
597 | } | 616 | |
598 | 617 | ||
599 | StartReadOffset += DestLen; | 618 | StartReadOffset += DestLen; |
600 | StartReadOffset %= ringBufferSize; | 619 | StartReadOffset %= ringBufferSize; |
diff --git a/drivers/staging/hv/RndisFilter.c b/drivers/staging/hv/RndisFilter.c index 26d79975387c..1ab7fa97d373 100644 --- a/drivers/staging/hv/RndisFilter.c +++ b/drivers/staging/hv/RndisFilter.c | |||
@@ -85,10 +85,6 @@ static int RndisFilterOnDeviceRemove(struct hv_device *Device); | |||
85 | 85 | ||
86 | static void RndisFilterOnCleanup(struct hv_driver *Driver); | 86 | static void RndisFilterOnCleanup(struct hv_driver *Driver); |
87 | 87 | ||
88 | static int RndisFilterOnOpen(struct hv_device *Device); | ||
89 | |||
90 | static int RndisFilterOnClose(struct hv_device *Device); | ||
91 | |||
92 | static int RndisFilterOnSend(struct hv_device *Device, | 88 | static int RndisFilterOnSend(struct hv_device *Device, |
93 | struct hv_netvsc_packet *Packet); | 89 | struct hv_netvsc_packet *Packet); |
94 | 90 | ||
@@ -654,8 +650,6 @@ int RndisFilterInit(struct netvsc_driver *Driver) | |||
654 | Driver->Base.OnDeviceRemove = RndisFilterOnDeviceRemove; | 650 | Driver->Base.OnDeviceRemove = RndisFilterOnDeviceRemove; |
655 | Driver->Base.OnCleanup = RndisFilterOnCleanup; | 651 | Driver->Base.OnCleanup = RndisFilterOnCleanup; |
656 | Driver->OnSend = RndisFilterOnSend; | 652 | Driver->OnSend = RndisFilterOnSend; |
657 | Driver->OnOpen = RndisFilterOnOpen; | ||
658 | Driver->OnClose = RndisFilterOnClose; | ||
659 | /* Driver->QueryLinkStatus = RndisFilterQueryDeviceLinkStatus; */ | 653 | /* Driver->QueryLinkStatus = RndisFilterQueryDeviceLinkStatus; */ |
660 | Driver->OnReceiveCallback = RndisFilterOnReceive; | 654 | Driver->OnReceiveCallback = RndisFilterOnReceive; |
661 | 655 | ||
@@ -888,7 +882,7 @@ static void RndisFilterOnCleanup(struct hv_driver *Driver) | |||
888 | DPRINT_EXIT(NETVSC); | 882 | DPRINT_EXIT(NETVSC); |
889 | } | 883 | } |
890 | 884 | ||
891 | static int RndisFilterOnOpen(struct hv_device *Device) | 885 | int RndisFilterOnOpen(struct hv_device *Device) |
892 | { | 886 | { |
893 | int ret; | 887 | int ret; |
894 | struct netvsc_device *netDevice = Device->Extension; | 888 | struct netvsc_device *netDevice = Device->Extension; |
@@ -903,7 +897,7 @@ static int RndisFilterOnOpen(struct hv_device *Device) | |||
903 | return ret; | 897 | return ret; |
904 | } | 898 | } |
905 | 899 | ||
906 | static int RndisFilterOnClose(struct hv_device *Device) | 900 | int RndisFilterOnClose(struct hv_device *Device) |
907 | { | 901 | { |
908 | int ret; | 902 | int ret; |
909 | struct netvsc_device *netDevice = Device->Extension; | 903 | struct netvsc_device *netDevice = Device->Extension; |
diff --git a/drivers/staging/hv/StorVsc.c b/drivers/staging/hv/StorVsc.c index 2f7c425896f7..38ea1407f222 100644 --- a/drivers/staging/hv/StorVsc.c +++ b/drivers/staging/hv/StorVsc.c | |||
@@ -625,7 +625,7 @@ static int StorVscOnDeviceRemove(struct hv_device *Device) | |||
625 | return 0; | 625 | return 0; |
626 | } | 626 | } |
627 | 627 | ||
628 | static int StorVscOnHostReset(struct hv_device *Device) | 628 | int StorVscOnHostReset(struct hv_device *Device) |
629 | { | 629 | { |
630 | struct storvsc_device *storDevice; | 630 | struct storvsc_device *storDevice; |
631 | struct storvsc_request_extension *request; | 631 | struct storvsc_request_extension *request; |
@@ -842,7 +842,6 @@ int StorVscInitialize(struct hv_driver *Driver) | |||
842 | storDriver->Base.OnCleanup = StorVscOnCleanup; | 842 | storDriver->Base.OnCleanup = StorVscOnCleanup; |
843 | 843 | ||
844 | storDriver->OnIORequest = StorVscOnIORequest; | 844 | storDriver->OnIORequest = StorVscOnIORequest; |
845 | storDriver->OnHostReset = StorVscOnHostReset; | ||
846 | 845 | ||
847 | DPRINT_EXIT(STORVSC); | 846 | DPRINT_EXIT(STORVSC); |
848 | 847 | ||
diff --git a/drivers/staging/hv/StorVscApi.h b/drivers/staging/hv/StorVscApi.h index 69c14066c479..126a8588edb1 100644 --- a/drivers/staging/hv/StorVscApi.h +++ b/drivers/staging/hv/StorVscApi.h | |||
@@ -91,13 +91,9 @@ struct storvsc_driver_object { | |||
91 | /* Maximum # of requests in flight per channel/device */ | 91 | /* Maximum # of requests in flight per channel/device */ |
92 | u32 MaxOutstandingRequestsPerChannel; | 92 | u32 MaxOutstandingRequestsPerChannel; |
93 | 93 | ||
94 | /* Set by the caller to allow us to re-enumerate the bus on the host */ | ||
95 | void (*OnHostRescan)(struct hv_device *Device); | ||
96 | |||
97 | /* Specific to this driver */ | 94 | /* Specific to this driver */ |
98 | int (*OnIORequest)(struct hv_device *Device, | 95 | int (*OnIORequest)(struct hv_device *Device, |
99 | struct hv_storvsc_request *Request); | 96 | struct hv_storvsc_request *Request); |
100 | int (*OnHostReset)(struct hv_device *Device); | ||
101 | }; | 97 | }; |
102 | 98 | ||
103 | struct storvsc_device_info { | 99 | struct storvsc_device_info { |
@@ -108,6 +104,7 @@ struct storvsc_device_info { | |||
108 | 104 | ||
109 | /* Interface */ | 105 | /* Interface */ |
110 | int StorVscInitialize(struct hv_driver *driver); | 106 | int StorVscInitialize(struct hv_driver *driver); |
107 | int StorVscOnHostReset(struct hv_device *Device); | ||
111 | int BlkVscInitialize(struct hv_driver *driver); | 108 | int BlkVscInitialize(struct hv_driver *driver); |
112 | 109 | ||
113 | #endif /* _STORVSC_API_H_ */ | 110 | #endif /* _STORVSC_API_H_ */ |
diff --git a/drivers/staging/hv/VersionInfo.h b/drivers/staging/hv/VersionInfo.h index 9c3641d99ed8..10d7b19a485f 100644 --- a/drivers/staging/hv/VersionInfo.h +++ b/drivers/staging/hv/VersionInfo.h | |||
@@ -24,8 +24,24 @@ | |||
24 | #ifndef __HV_VERSION_INFO | 24 | #ifndef __HV_VERSION_INFO |
25 | #define __HV_VERSION_INFO | 25 | #define __HV_VERSION_INFO |
26 | 26 | ||
27 | static const char VersionDate[] = __DATE__; | 27 | /* |
28 | static const char VersionTime[] = __TIME__; | 28 | * We use the same version numbering for all Hyper-V modules. |
29 | static const char VersionDesc[] = "Version 2.0"; | 29 | * |
30 | * Definition of versioning is as follows; | ||
31 | * | ||
32 | * Major Number Changes for these scenarios; | ||
33 | * 1. When a new version of Windows Hyper-V | ||
34 | * is released. | ||
35 | * 2. A Major change has occurred in the | ||
36 | * Linux IC's. | ||
37 | * (For example the merge for the first time | ||
38 | * into the kernel) Every time the Major Number | ||
39 | * changes, the Revision number is reset to 0. | ||
40 | * Minor Number Changes when new functionality is added | ||
41 | * to the Linux IC's that is not a bug fix. | ||
42 | * | ||
43 | */ | ||
44 | #define HV_DRV_VERSION "3.0" | ||
45 | |||
30 | 46 | ||
31 | #endif | 47 | #endif |
diff --git a/drivers/staging/hv/Vmbus.c b/drivers/staging/hv/Vmbus.c index 35a023e9f9d1..3d0a240ed664 100644 --- a/drivers/staging/hv/Vmbus.c +++ b/drivers/staging/hv/Vmbus.c | |||
@@ -273,10 +273,8 @@ int VmbusInitialize(struct hv_driver *drv) | |||
273 | 273 | ||
274 | DPRINT_ENTER(VMBUS); | 274 | DPRINT_ENTER(VMBUS); |
275 | 275 | ||
276 | DPRINT_INFO(VMBUS, "+++++++ Build Date=%s %s +++++++", | 276 | DPRINT_INFO(VMBUS, "+++++++ HV Driver version = %s +++++++", |
277 | VersionDate, VersionTime); | 277 | HV_DRV_VERSION); |
278 | DPRINT_INFO(VMBUS, "+++++++ Build Description=%s +++++++", | ||
279 | VersionDesc); | ||
280 | DPRINT_INFO(VMBUS, "+++++++ Vmbus supported version = %d +++++++", | 278 | DPRINT_INFO(VMBUS, "+++++++ Vmbus supported version = %d +++++++", |
281 | VMBUS_REVISION_NUMBER); | 279 | VMBUS_REVISION_NUMBER); |
282 | DPRINT_INFO(VMBUS, "+++++++ Vmbus using SINT %d +++++++", | 280 | DPRINT_INFO(VMBUS, "+++++++ Vmbus using SINT %d +++++++", |
diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c index 45d908114d11..abeac12c093d 100644 --- a/drivers/staging/hv/blkvsc_drv.c +++ b/drivers/staging/hv/blkvsc_drv.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <scsi/scsi_dbg.h> | 31 | #include <scsi/scsi_dbg.h> |
32 | #include "osd.h" | 32 | #include "osd.h" |
33 | #include "logging.h" | 33 | #include "logging.h" |
34 | #include "VersionInfo.h" | ||
34 | #include "vmbus.h" | 35 | #include "vmbus.h" |
35 | #include "StorVscApi.h" | 36 | #include "StorVscApi.h" |
36 | 37 | ||
@@ -92,7 +93,7 @@ struct blkvsc_request { | |||
92 | /* Per device structure */ | 93 | /* Per device structure */ |
93 | struct block_device_context { | 94 | struct block_device_context { |
94 | /* point back to our device context */ | 95 | /* point back to our device context */ |
95 | struct device_context *device_ctx; | 96 | struct vm_device *device_ctx; |
96 | struct kmem_cache *request_pool; | 97 | struct kmem_cache *request_pool; |
97 | spinlock_t lock; | 98 | spinlock_t lock; |
98 | struct gendisk *gd; | 99 | struct gendisk *gd; |
@@ -254,7 +255,7 @@ static int blkvsc_probe(struct device *device) | |||
254 | (struct blkvsc_driver_context *)driver_ctx; | 255 | (struct blkvsc_driver_context *)driver_ctx; |
255 | struct storvsc_driver_object *storvsc_drv_obj = | 256 | struct storvsc_driver_object *storvsc_drv_obj = |
256 | &blkvsc_drv_ctx->drv_obj; | 257 | &blkvsc_drv_ctx->drv_obj; |
257 | struct device_context *device_ctx = device_to_device_context(device); | 258 | struct vm_device *device_ctx = device_to_vm_device(device); |
258 | struct hv_device *device_obj = &device_ctx->device_obj; | 259 | struct hv_device *device_obj = &device_ctx->device_obj; |
259 | 260 | ||
260 | struct block_device_context *blkdev = NULL; | 261 | struct block_device_context *blkdev = NULL; |
@@ -742,7 +743,7 @@ static int blkvsc_remove(struct device *device) | |||
742 | (struct blkvsc_driver_context *)driver_ctx; | 743 | (struct blkvsc_driver_context *)driver_ctx; |
743 | struct storvsc_driver_object *storvsc_drv_obj = | 744 | struct storvsc_driver_object *storvsc_drv_obj = |
744 | &blkvsc_drv_ctx->drv_obj; | 745 | &blkvsc_drv_ctx->drv_obj; |
745 | struct device_context *device_ctx = device_to_device_context(device); | 746 | struct vm_device *device_ctx = device_to_vm_device(device); |
746 | struct hv_device *device_obj = &device_ctx->device_obj; | 747 | struct hv_device *device_obj = &device_ctx->device_obj; |
747 | struct block_device_context *blkdev = dev_get_drvdata(device); | 748 | struct block_device_context *blkdev = dev_get_drvdata(device); |
748 | unsigned long flags; | 749 | unsigned long flags; |
@@ -862,7 +863,7 @@ static int blkvsc_submit_request(struct blkvsc_request *blkvsc_req, | |||
862 | void (*request_completion)(struct hv_storvsc_request *)) | 863 | void (*request_completion)(struct hv_storvsc_request *)) |
863 | { | 864 | { |
864 | struct block_device_context *blkdev = blkvsc_req->dev; | 865 | struct block_device_context *blkdev = blkvsc_req->dev; |
865 | struct device_context *device_ctx = blkdev->device_ctx; | 866 | struct vm_device *device_ctx = blkdev->device_ctx; |
866 | struct driver_context *driver_ctx = | 867 | struct driver_context *driver_ctx = |
867 | driver_to_driver_context(device_ctx->device.driver); | 868 | driver_to_driver_context(device_ctx->device.driver); |
868 | struct blkvsc_driver_context *blkvsc_drv_ctx = | 869 | struct blkvsc_driver_context *blkvsc_drv_ctx = |
@@ -1504,6 +1505,7 @@ static void __exit blkvsc_exit(void) | |||
1504 | } | 1505 | } |
1505 | 1506 | ||
1506 | MODULE_LICENSE("GPL"); | 1507 | MODULE_LICENSE("GPL"); |
1508 | MODULE_VERSION(HV_DRV_VERSION); | ||
1507 | module_param(blkvsc_ringbuffer_size, int, S_IRUGO); | 1509 | module_param(blkvsc_ringbuffer_size, int, S_IRUGO); |
1508 | module_init(blkvsc_init); | 1510 | module_init(blkvsc_init); |
1509 | module_exit(blkvsc_exit); | 1511 | module_exit(blkvsc_exit); |
diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index 0d7459e2d036..1af3dcbafd65 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c | |||
@@ -35,14 +35,13 @@ | |||
35 | #include <net/pkt_sched.h> | 35 | #include <net/pkt_sched.h> |
36 | #include "osd.h" | 36 | #include "osd.h" |
37 | #include "logging.h" | 37 | #include "logging.h" |
38 | #include "VersionInfo.h" | ||
38 | #include "vmbus.h" | 39 | #include "vmbus.h" |
39 | #include "NetVscApi.h" | 40 | #include "NetVscApi.h" |
40 | 41 | ||
41 | MODULE_LICENSE("GPL"); | ||
42 | |||
43 | struct net_device_context { | 42 | struct net_device_context { |
44 | /* point back to our device context */ | 43 | /* point back to our device context */ |
45 | struct device_context *device_ctx; | 44 | struct vm_device *device_ctx; |
46 | struct net_device_stats stats; | 45 | struct net_device_stats stats; |
47 | }; | 46 | }; |
48 | 47 | ||
@@ -72,11 +71,6 @@ static void netvsc_set_multicast_list(struct net_device *net) | |||
72 | static int netvsc_open(struct net_device *net) | 71 | static int netvsc_open(struct net_device *net) |
73 | { | 72 | { |
74 | struct net_device_context *net_device_ctx = netdev_priv(net); | 73 | struct net_device_context *net_device_ctx = netdev_priv(net); |
75 | struct driver_context *driver_ctx = | ||
76 | driver_to_driver_context(net_device_ctx->device_ctx->device.driver); | ||
77 | struct netvsc_driver_context *net_drv_ctx = | ||
78 | (struct netvsc_driver_context *)driver_ctx; | ||
79 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; | ||
80 | struct hv_device *device_obj = &net_device_ctx->device_ctx->device_obj; | 74 | struct hv_device *device_obj = &net_device_ctx->device_ctx->device_obj; |
81 | int ret = 0; | 75 | int ret = 0; |
82 | 76 | ||
@@ -87,7 +81,7 @@ static int netvsc_open(struct net_device *net) | |||
87 | sizeof(struct net_device_stats)); | 81 | sizeof(struct net_device_stats)); |
88 | 82 | ||
89 | /* Open up the device */ | 83 | /* Open up the device */ |
90 | ret = net_drv_obj->OnOpen(device_obj); | 84 | ret = RndisFilterOnOpen(device_obj); |
91 | if (ret != 0) { | 85 | if (ret != 0) { |
92 | DPRINT_ERR(NETVSC_DRV, | 86 | DPRINT_ERR(NETVSC_DRV, |
93 | "unable to open device (ret %d).", ret); | 87 | "unable to open device (ret %d).", ret); |
@@ -106,11 +100,6 @@ static int netvsc_open(struct net_device *net) | |||
106 | static int netvsc_close(struct net_device *net) | 100 | static int netvsc_close(struct net_device *net) |
107 | { | 101 | { |
108 | struct net_device_context *net_device_ctx = netdev_priv(net); | 102 | struct net_device_context *net_device_ctx = netdev_priv(net); |
109 | struct driver_context *driver_ctx = | ||
110 | driver_to_driver_context(net_device_ctx->device_ctx->device.driver); | ||
111 | struct netvsc_driver_context *net_drv_ctx = | ||
112 | (struct netvsc_driver_context *)driver_ctx; | ||
113 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; | ||
114 | struct hv_device *device_obj = &net_device_ctx->device_ctx->device_obj; | 103 | struct hv_device *device_obj = &net_device_ctx->device_ctx->device_obj; |
115 | int ret; | 104 | int ret; |
116 | 105 | ||
@@ -118,7 +107,7 @@ static int netvsc_close(struct net_device *net) | |||
118 | 107 | ||
119 | netif_stop_queue(net); | 108 | netif_stop_queue(net); |
120 | 109 | ||
121 | ret = net_drv_obj->OnClose(device_obj); | 110 | ret = RndisFilterOnClose(device_obj); |
122 | if (ret != 0) | 111 | if (ret != 0) |
123 | DPRINT_ERR(NETVSC_DRV, "unable to close device (ret %d).", ret); | 112 | DPRINT_ERR(NETVSC_DRV, "unable to close device (ret %d).", ret); |
124 | 113 | ||
@@ -282,7 +271,7 @@ retry_send: | |||
282 | static void netvsc_linkstatus_callback(struct hv_device *device_obj, | 271 | static void netvsc_linkstatus_callback(struct hv_device *device_obj, |
283 | unsigned int status) | 272 | unsigned int status) |
284 | { | 273 | { |
285 | struct device_context *device_ctx = to_device_context(device_obj); | 274 | struct vm_device *device_ctx = to_vm_device(device_obj); |
286 | struct net_device *net = dev_get_drvdata(&device_ctx->device); | 275 | struct net_device *net = dev_get_drvdata(&device_ctx->device); |
287 | 276 | ||
288 | DPRINT_ENTER(NETVSC_DRV); | 277 | DPRINT_ENTER(NETVSC_DRV); |
@@ -309,7 +298,7 @@ static void netvsc_linkstatus_callback(struct hv_device *device_obj, | |||
309 | static int netvsc_recv_callback(struct hv_device *device_obj, | 298 | static int netvsc_recv_callback(struct hv_device *device_obj, |
310 | struct hv_netvsc_packet *packet) | 299 | struct hv_netvsc_packet *packet) |
311 | { | 300 | { |
312 | struct device_context *device_ctx = to_device_context(device_obj); | 301 | struct vm_device *device_ctx = to_vm_device(device_obj); |
313 | struct net_device *net = dev_get_drvdata(&device_ctx->device); | 302 | struct net_device *net = dev_get_drvdata(&device_ctx->device); |
314 | struct net_device_context *net_device_ctx; | 303 | struct net_device_context *net_device_ctx; |
315 | struct sk_buff *skb; | 304 | struct sk_buff *skb; |
@@ -401,7 +390,7 @@ static int netvsc_probe(struct device *device) | |||
401 | struct netvsc_driver_context *net_drv_ctx = | 390 | struct netvsc_driver_context *net_drv_ctx = |
402 | (struct netvsc_driver_context *)driver_ctx; | 391 | (struct netvsc_driver_context *)driver_ctx; |
403 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; | 392 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; |
404 | struct device_context *device_ctx = device_to_device_context(device); | 393 | struct vm_device *device_ctx = device_to_vm_device(device); |
405 | struct hv_device *device_obj = &device_ctx->device_obj; | 394 | struct hv_device *device_obj = &device_ctx->device_obj; |
406 | struct net_device *net = NULL; | 395 | struct net_device *net = NULL; |
407 | struct net_device_context *net_device_ctx; | 396 | struct net_device_context *net_device_ctx; |
@@ -473,7 +462,7 @@ static int netvsc_remove(struct device *device) | |||
473 | struct netvsc_driver_context *net_drv_ctx = | 462 | struct netvsc_driver_context *net_drv_ctx = |
474 | (struct netvsc_driver_context *)driver_ctx; | 463 | (struct netvsc_driver_context *)driver_ctx; |
475 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; | 464 | struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; |
476 | struct device_context *device_ctx = device_to_device_context(device); | 465 | struct vm_device *device_ctx = device_to_vm_device(device); |
477 | struct net_device *net = dev_get_drvdata(&device_ctx->device); | 466 | struct net_device *net = dev_get_drvdata(&device_ctx->device); |
478 | struct hv_device *device_obj = &device_ctx->device_obj; | 467 | struct hv_device *device_obj = &device_ctx->device_obj; |
479 | int ret; | 468 | int ret; |
@@ -613,6 +602,8 @@ static void __exit netvsc_exit(void) | |||
613 | DPRINT_EXIT(NETVSC_DRV); | 602 | DPRINT_EXIT(NETVSC_DRV); |
614 | } | 603 | } |
615 | 604 | ||
605 | MODULE_LICENSE("GPL"); | ||
606 | MODULE_VERSION(HV_DRV_VERSION); | ||
616 | module_param(netvsc_ringbuffer_size, int, S_IRUGO); | 607 | module_param(netvsc_ringbuffer_size, int, S_IRUGO); |
617 | 608 | ||
618 | module_init(netvsc_init); | 609 | module_init(netvsc_init); |
diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c index d49dc21d4cb4..3988f4bec1ce 100644 --- a/drivers/staging/hv/storvsc_drv.c +++ b/drivers/staging/hv/storvsc_drv.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <scsi/scsi_dbg.h> | 32 | #include <scsi/scsi_dbg.h> |
33 | #include "osd.h" | 33 | #include "osd.h" |
34 | #include "logging.h" | 34 | #include "logging.h" |
35 | #include "VersionInfo.h" | ||
35 | #include "vmbus.h" | 36 | #include "vmbus.h" |
36 | #include "StorVscApi.h" | 37 | #include "StorVscApi.h" |
37 | 38 | ||
@@ -39,10 +40,8 @@ | |||
39 | struct host_device_context { | 40 | struct host_device_context { |
40 | /* must be 1st field | 41 | /* must be 1st field |
41 | * FIXME this is a bug */ | 42 | * FIXME this is a bug */ |
42 | struct work_struct host_rescan_work; | ||
43 | |||
44 | /* point back to our device context */ | 43 | /* point back to our device context */ |
45 | struct device_context *device_ctx; | 44 | struct vm_device *device_ctx; |
46 | struct kmem_cache *request_pool; | 45 | struct kmem_cache *request_pool; |
47 | unsigned int port; | 46 | unsigned int port; |
48 | unsigned char path; | 47 | unsigned char path; |
@@ -77,8 +76,6 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd, | |||
77 | static int storvsc_device_alloc(struct scsi_device *); | 76 | static int storvsc_device_alloc(struct scsi_device *); |
78 | static int storvsc_device_configure(struct scsi_device *); | 77 | static int storvsc_device_configure(struct scsi_device *); |
79 | static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd); | 78 | static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd); |
80 | static void storvsc_host_rescan_callback(struct work_struct *work); | ||
81 | static void storvsc_host_rescan(struct hv_device *device_obj); | ||
82 | static int storvsc_remove(struct device *dev); | 79 | static int storvsc_remove(struct device *dev); |
83 | 80 | ||
84 | static struct scatterlist *create_bounce_buffer(struct scatterlist *sgl, | 81 | static struct scatterlist *create_bounce_buffer(struct scatterlist *sgl, |
@@ -94,8 +91,6 @@ static unsigned int copy_to_bounce_buffer(struct scatterlist *orig_sgl, | |||
94 | struct scatterlist *bounce_sgl, | 91 | struct scatterlist *bounce_sgl, |
95 | unsigned int orig_sgl_count); | 92 | unsigned int orig_sgl_count); |
96 | 93 | ||
97 | static int storvsc_report_luns(struct scsi_device *sdev, unsigned int luns[], | ||
98 | unsigned int *lun_count); | ||
99 | static int storvsc_get_chs(struct scsi_device *sdev, struct block_device *bdev, | 94 | static int storvsc_get_chs(struct scsi_device *sdev, struct block_device *bdev, |
100 | sector_t capacity, int *info); | 95 | sector_t capacity, int *info); |
101 | 96 | ||
@@ -148,7 +143,6 @@ static int storvsc_drv_init(int (*drv_init)(struct hv_driver *drv)) | |||
148 | vmbus_get_interface(&storvsc_drv_obj->Base.VmbusChannelInterface); | 143 | vmbus_get_interface(&storvsc_drv_obj->Base.VmbusChannelInterface); |
149 | 144 | ||
150 | storvsc_drv_obj->RingBufferSize = storvsc_ringbuffer_size; | 145 | storvsc_drv_obj->RingBufferSize = storvsc_ringbuffer_size; |
151 | storvsc_drv_obj->OnHostRescan = storvsc_host_rescan; | ||
152 | 146 | ||
153 | /* Callback to client driver to complete the initialization */ | 147 | /* Callback to client driver to complete the initialization */ |
154 | drv_init(&storvsc_drv_obj->Base); | 148 | drv_init(&storvsc_drv_obj->Base); |
@@ -240,7 +234,7 @@ static int storvsc_probe(struct device *device) | |||
240 | (struct storvsc_driver_context *)driver_ctx; | 234 | (struct storvsc_driver_context *)driver_ctx; |
241 | struct storvsc_driver_object *storvsc_drv_obj = | 235 | struct storvsc_driver_object *storvsc_drv_obj = |
242 | &storvsc_drv_ctx->drv_obj; | 236 | &storvsc_drv_ctx->drv_obj; |
243 | struct device_context *device_ctx = device_to_device_context(device); | 237 | struct vm_device *device_ctx = device_to_vm_device(device); |
244 | struct hv_device *device_obj = &device_ctx->device_obj; | 238 | struct hv_device *device_obj = &device_ctx->device_obj; |
245 | struct Scsi_Host *host; | 239 | struct Scsi_Host *host; |
246 | struct host_device_context *host_device_ctx; | 240 | struct host_device_context *host_device_ctx; |
@@ -266,9 +260,6 @@ static int storvsc_probe(struct device *device) | |||
266 | host_device_ctx->port = host->host_no; | 260 | host_device_ctx->port = host->host_no; |
267 | host_device_ctx->device_ctx = device_ctx; | 261 | host_device_ctx->device_ctx = device_ctx; |
268 | 262 | ||
269 | INIT_WORK(&host_device_ctx->host_rescan_work, | ||
270 | storvsc_host_rescan_callback); | ||
271 | |||
272 | host_device_ctx->request_pool = | 263 | host_device_ctx->request_pool = |
273 | kmem_cache_create(dev_name(&device_ctx->device), | 264 | kmem_cache_create(dev_name(&device_ctx->device), |
274 | sizeof(struct storvsc_cmd_request) + | 265 | sizeof(struct storvsc_cmd_request) + |
@@ -339,7 +330,7 @@ static int storvsc_remove(struct device *device) | |||
339 | (struct storvsc_driver_context *)driver_ctx; | 330 | (struct storvsc_driver_context *)driver_ctx; |
340 | struct storvsc_driver_object *storvsc_drv_obj = | 331 | struct storvsc_driver_object *storvsc_drv_obj = |
341 | &storvsc_drv_ctx->drv_obj; | 332 | &storvsc_drv_ctx->drv_obj; |
342 | struct device_context *device_ctx = device_to_device_context(device); | 333 | struct vm_device *device_ctx = device_to_vm_device(device); |
343 | struct hv_device *device_obj = &device_ctx->device_obj; | 334 | struct hv_device *device_obj = &device_ctx->device_obj; |
344 | struct Scsi_Host *host = dev_get_drvdata(device); | 335 | struct Scsi_Host *host = dev_get_drvdata(device); |
345 | struct host_device_context *host_device_ctx = | 336 | struct host_device_context *host_device_ctx = |
@@ -640,7 +631,7 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd, | |||
640 | int ret; | 631 | int ret; |
641 | struct host_device_context *host_device_ctx = | 632 | struct host_device_context *host_device_ctx = |
642 | (struct host_device_context *)scmnd->device->host->hostdata; | 633 | (struct host_device_context *)scmnd->device->host->hostdata; |
643 | struct device_context *device_ctx = host_device_ctx->device_ctx; | 634 | struct vm_device *device_ctx = host_device_ctx->device_ctx; |
644 | struct driver_context *driver_ctx = | 635 | struct driver_context *driver_ctx = |
645 | driver_to_driver_context(device_ctx->device.driver); | 636 | driver_to_driver_context(device_ctx->device.driver); |
646 | struct storvsc_driver_context *storvsc_drv_ctx = | 637 | struct storvsc_driver_context *storvsc_drv_ctx = |
@@ -879,14 +870,7 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) | |||
879 | int ret; | 870 | int ret; |
880 | struct host_device_context *host_device_ctx = | 871 | struct host_device_context *host_device_ctx = |
881 | (struct host_device_context *)scmnd->device->host->hostdata; | 872 | (struct host_device_context *)scmnd->device->host->hostdata; |
882 | struct device_context *device_ctx = host_device_ctx->device_ctx; | 873 | struct vm_device *device_ctx = host_device_ctx->device_ctx; |
883 | struct driver_context *driver_ctx = | ||
884 | driver_to_driver_context(device_ctx->device.driver); | ||
885 | struct storvsc_driver_context *storvsc_drv_ctx = | ||
886 | (struct storvsc_driver_context *)driver_ctx; | ||
887 | |||
888 | struct storvsc_driver_object *storvsc_drv_obj = | ||
889 | &storvsc_drv_ctx->drv_obj; | ||
890 | 874 | ||
891 | DPRINT_ENTER(STORVSC_DRV); | 875 | DPRINT_ENTER(STORVSC_DRV); |
892 | 876 | ||
@@ -894,8 +878,7 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) | |||
894 | scmnd->device, &device_ctx->device_obj); | 878 | scmnd->device, &device_ctx->device_obj); |
895 | 879 | ||
896 | /* Invokes the vsc to reset the host/bus */ | 880 | /* Invokes the vsc to reset the host/bus */ |
897 | ASSERT(storvsc_drv_obj->OnHostReset); | 881 | ret = StorVscOnHostReset(&device_ctx->device_obj); |
898 | ret = storvsc_drv_obj->OnHostReset(&device_ctx->device_obj); | ||
899 | if (ret != 0) { | 882 | if (ret != 0) { |
900 | DPRINT_EXIT(STORVSC_DRV); | 883 | DPRINT_EXIT(STORVSC_DRV); |
901 | return ret; | 884 | return ret; |
@@ -909,201 +892,6 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) | |||
909 | return ret; | 892 | return ret; |
910 | } | 893 | } |
911 | 894 | ||
912 | /** | ||
913 | * storvsc_host_rescan - Rescan the scsi HBA | ||
914 | */ | ||
915 | static void storvsc_host_rescan_callback(struct work_struct *work) | ||
916 | { | ||
917 | struct hv_device *device_obj = | ||
918 | &((struct host_device_context *)work)->device_ctx->device_obj; | ||
919 | struct device_context *device_ctx = to_device_context(device_obj); | ||
920 | struct Scsi_Host *host = dev_get_drvdata(&device_ctx->device); | ||
921 | struct scsi_device *sdev; | ||
922 | struct host_device_context *host_device_ctx; | ||
923 | struct scsi_device **sdevs_remove_list; | ||
924 | unsigned int sdevs_count = 0; | ||
925 | unsigned int found; | ||
926 | unsigned int i; | ||
927 | unsigned int lun_count = 0; | ||
928 | unsigned int *lun_list; | ||
929 | |||
930 | DPRINT_ENTER(STORVSC_DRV); | ||
931 | |||
932 | host_device_ctx = (struct host_device_context *)host->hostdata; | ||
933 | lun_list = kcalloc(STORVSC_MAX_LUNS_PER_TARGET, sizeof(unsigned int), | ||
934 | GFP_ATOMIC); | ||
935 | if (!lun_list) { | ||
936 | DPRINT_ERR(STORVSC_DRV, "unable to allocate lun list"); | ||
937 | return; | ||
938 | } | ||
939 | |||
940 | sdevs_remove_list = kcalloc(STORVSC_MAX_LUNS_PER_TARGET, | ||
941 | sizeof(void *), GFP_ATOMIC); | ||
942 | if (!sdevs_remove_list) { | ||
943 | kfree(lun_list); | ||
944 | DPRINT_ERR(STORVSC_DRV, "unable to allocate lun remove list"); | ||
945 | return; | ||
946 | } | ||
947 | |||
948 | DPRINT_INFO(STORVSC_DRV, "rescanning host for new scsi devices..."); | ||
949 | |||
950 | /* Rescan for new device */ | ||
951 | scsi_scan_target(&host->shost_gendev, host_device_ctx->path, | ||
952 | host_device_ctx->target, SCAN_WILD_CARD, 1); | ||
953 | |||
954 | DPRINT_INFO(STORVSC_DRV, "rescanning host for removed scsi device..."); | ||
955 | |||
956 | /* Use the 1st device to send the report luns cmd */ | ||
957 | shost_for_each_device(sdev, host) { | ||
958 | lun_count = STORVSC_MAX_LUNS_PER_TARGET; | ||
959 | storvsc_report_luns(sdev, lun_list, &lun_count); | ||
960 | |||
961 | DPRINT_INFO(STORVSC_DRV, | ||
962 | "report luns on scsi device (%p) found %u luns ", | ||
963 | sdev, lun_count); | ||
964 | DPRINT_INFO(STORVSC_DRV, | ||
965 | "existing luns on scsi device (%p) host (%d)", | ||
966 | sdev, host->host_no); | ||
967 | |||
968 | scsi_device_put(sdev); | ||
969 | break; | ||
970 | } | ||
971 | |||
972 | for (i = 0; i < lun_count; i++) | ||
973 | DPRINT_INFO(STORVSC_DRV, "%d) lun %u", i, lun_list[i]); | ||
974 | |||
975 | /* Rescan for devices that may have been removed. | ||
976 | * We do not have to worry that new devices may have been added since | ||
977 | * this callback is serialized by the workqueue ie add/remove are done | ||
978 | * here. | ||
979 | */ | ||
980 | shost_for_each_device(sdev, host) { | ||
981 | /* See if this device is still here */ | ||
982 | found = 0; | ||
983 | for (i = 0; i < lun_count; i++) { | ||
984 | if (sdev->lun == lun_list[i]) { | ||
985 | found = 1; | ||
986 | break; | ||
987 | } | ||
988 | } | ||
989 | if (!found) { | ||
990 | DPRINT_INFO(STORVSC_DRV, "lun (%u) does not exists", | ||
991 | sdev->lun); | ||
992 | sdevs_remove_list[sdevs_count++] = sdev; | ||
993 | } | ||
994 | } | ||
995 | |||
996 | /* Now remove the devices */ | ||
997 | for (i = 0; i < sdevs_count; i++) { | ||
998 | DPRINT_INFO(STORVSC_DRV, | ||
999 | "removing scsi device (%p) lun (%u)...", | ||
1000 | sdevs_remove_list[i], sdevs_remove_list[i]->lun); | ||
1001 | |||
1002 | /* make sure it is not removed from underneath us */ | ||
1003 | if (!scsi_device_get(sdevs_remove_list[i])) { | ||
1004 | scsi_remove_device(sdevs_remove_list[i]); | ||
1005 | scsi_device_put(sdevs_remove_list[i]); | ||
1006 | } | ||
1007 | } | ||
1008 | |||
1009 | DPRINT_INFO(STORVSC_DRV, "rescan completed on dev obj (%p) " | ||
1010 | "target (%u) bus (%u)", device_obj, | ||
1011 | host_device_ctx->target, host_device_ctx->path); | ||
1012 | |||
1013 | kfree(lun_list); | ||
1014 | kfree(sdevs_remove_list); | ||
1015 | |||
1016 | DPRINT_EXIT(STORVSC_DRV); | ||
1017 | } | ||
1018 | |||
1019 | static int storvsc_report_luns(struct scsi_device *sdev, unsigned int luns[], | ||
1020 | unsigned int *lun_count) | ||
1021 | { | ||
1022 | int i, j; | ||
1023 | unsigned int lun = 0; | ||
1024 | unsigned int num_luns; | ||
1025 | int result; | ||
1026 | unsigned char *data; | ||
1027 | struct scsi_sense_hdr sshdr; | ||
1028 | unsigned char cmd[16] = {0}; | ||
1029 | /* Add 1 to cover the report_lun header */ | ||
1030 | unsigned int report_len = 8 * (STORVSC_MAX_LUNS_PER_TARGET+1); | ||
1031 | unsigned long long *report_luns; | ||
1032 | const unsigned int in_lun_count = *lun_count; | ||
1033 | |||
1034 | *lun_count = 0; | ||
1035 | |||
1036 | report_luns = kzalloc(report_len, GFP_ATOMIC); | ||
1037 | if (!report_luns) | ||
1038 | return -ENOMEM; | ||
1039 | |||
1040 | cmd[0] = REPORT_LUNS; | ||
1041 | |||
1042 | /* cmd length */ | ||
1043 | *(unsigned int *)&cmd[6] = cpu_to_be32(report_len); | ||
1044 | |||
1045 | result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, | ||
1046 | (unsigned char *)report_luns, report_len, | ||
1047 | &sshdr, 30 * HZ, 3, NULL); | ||
1048 | if (result != 0) { | ||
1049 | kfree(report_luns); | ||
1050 | return -EBUSY; | ||
1051 | } | ||
1052 | |||
1053 | /* get the length from the first four bytes */ | ||
1054 | report_len = be32_to_cpu(*(unsigned int *)&report_luns[0]); | ||
1055 | |||
1056 | num_luns = (report_len / sizeof(unsigned long long)); | ||
1057 | if (num_luns > in_lun_count) { | ||
1058 | kfree(report_luns); | ||
1059 | return -EINVAL; | ||
1060 | } | ||
1061 | |||
1062 | *lun_count = num_luns; | ||
1063 | |||
1064 | DPRINT_DBG(STORVSC_DRV, | ||
1065 | "report luns on scsi device (%p) found %u luns ", | ||
1066 | sdev, num_luns); | ||
1067 | |||
1068 | /* lun id starts at 1 */ | ||
1069 | for (i = 1; i < num_luns + 1; i++) { | ||
1070 | lun = 0; | ||
1071 | data = (unsigned char *)&report_luns[i]; | ||
1072 | for (j = 0; j < sizeof(lun); j += 2) { | ||
1073 | lun = lun | (((data[j] << 8) | data[j + 1]) << | ||
1074 | (j * 8)); | ||
1075 | } | ||
1076 | |||
1077 | luns[i-1] = lun; | ||
1078 | } | ||
1079 | |||
1080 | kfree(report_luns); | ||
1081 | return 0; | ||
1082 | } | ||
1083 | |||
1084 | static void storvsc_host_rescan(struct hv_device *device_obj) | ||
1085 | { | ||
1086 | struct device_context *device_ctx = to_device_context(device_obj); | ||
1087 | struct Scsi_Host *host = dev_get_drvdata(&device_ctx->device); | ||
1088 | struct host_device_context *host_device_ctx; | ||
1089 | |||
1090 | DPRINT_ENTER(STORVSC_DRV); | ||
1091 | |||
1092 | host_device_ctx = (struct host_device_context *)host->hostdata; | ||
1093 | |||
1094 | DPRINT_INFO(STORVSC_DRV, "initiating rescan on dev obj (%p) " | ||
1095 | "target (%u) bus (%u)...", device_obj, | ||
1096 | host_device_ctx->target, host_device_ctx->path); | ||
1097 | |||
1098 | /* | ||
1099 | * We need to queue this since the scanning may block and the caller | ||
1100 | * may be in an intr context | ||
1101 | */ | ||
1102 | /* scsi_queue_work(host, &host_device_ctx->host_rescan_work); */ | ||
1103 | schedule_work(&host_device_ctx->host_rescan_work); | ||
1104 | DPRINT_EXIT(STORVSC_DRV); | ||
1105 | } | ||
1106 | |||
1107 | static int storvsc_get_chs(struct scsi_device *sdev, struct block_device * bdev, | 895 | static int storvsc_get_chs(struct scsi_device *sdev, struct block_device * bdev, |
1108 | sector_t capacity, int *info) | 896 | sector_t capacity, int *info) |
1109 | { | 897 | { |
@@ -1203,6 +991,7 @@ static void __exit storvsc_exit(void) | |||
1203 | } | 991 | } |
1204 | 992 | ||
1205 | MODULE_LICENSE("GPL"); | 993 | MODULE_LICENSE("GPL"); |
994 | MODULE_VERSION(HV_DRV_VERSION); | ||
1206 | module_param(storvsc_ringbuffer_size, int, S_IRUGO); | 995 | module_param(storvsc_ringbuffer_size, int, S_IRUGO); |
1207 | module_init(storvsc_init); | 996 | module_init(storvsc_init); |
1208 | module_exit(storvsc_exit); | 997 | module_exit(storvsc_exit); |
diff --git a/drivers/staging/hv/vmbus.h b/drivers/staging/hv/vmbus.h index ae0a896eb392..6404b8424bef 100644 --- a/drivers/staging/hv/vmbus.h +++ b/drivers/staging/hv/vmbus.h | |||
@@ -43,23 +43,23 @@ struct driver_context { | |||
43 | void (*shutdown)(struct device *); | 43 | void (*shutdown)(struct device *); |
44 | }; | 44 | }; |
45 | 45 | ||
46 | struct device_context { | 46 | struct vm_device { |
47 | struct work_struct probe_failed_work_item; | 47 | struct work_struct probe_failed_work_item; |
48 | struct hv_guid class_id; | 48 | struct hv_guid class_id; |
49 | struct hv_guid device_id; | 49 | struct hv_guid device_id; |
50 | int probe_error; | 50 | int probe_error; |
51 | struct device device; | ||
52 | struct hv_device device_obj; | 51 | struct hv_device device_obj; |
52 | struct device device; | ||
53 | }; | 53 | }; |
54 | 54 | ||
55 | static inline struct device_context *to_device_context(struct hv_device *d) | 55 | static inline struct vm_device *to_vm_device(struct hv_device *d) |
56 | { | 56 | { |
57 | return container_of(d, struct device_context, device_obj); | 57 | return container_of(d, struct vm_device, device_obj); |
58 | } | 58 | } |
59 | 59 | ||
60 | static inline struct device_context *device_to_device_context(struct device *d) | 60 | static inline struct vm_device *device_to_vm_device(struct device *d) |
61 | { | 61 | { |
62 | return container_of(d, struct device_context, device); | 62 | return container_of(d, struct vm_device, device); |
63 | } | 63 | } |
64 | 64 | ||
65 | static inline struct driver_context *driver_to_driver_context(struct device_driver *d) | 65 | static inline struct driver_context *driver_to_driver_context(struct device_driver *d) |
diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 894eecfc63ca..2c906195b9c8 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c | |||
@@ -24,6 +24,9 @@ | |||
24 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
25 | #include <linux/interrupt.h> | 25 | #include <linux/interrupt.h> |
26 | #include <linux/sysctl.h> | 26 | #include <linux/sysctl.h> |
27 | #include <linux/pci.h> | ||
28 | #include <linux/dmi.h> | ||
29 | #include "VersionInfo.h" | ||
27 | #include "osd.h" | 30 | #include "osd.h" |
28 | #include "logging.h" | 31 | #include "logging.h" |
29 | #include "vmbus.h" | 32 | #include "vmbus.h" |
@@ -47,7 +50,7 @@ struct vmbus_driver_context { | |||
47 | struct tasklet_struct event_dpc; | 50 | struct tasklet_struct event_dpc; |
48 | 51 | ||
49 | /* The bus root device */ | 52 | /* The bus root device */ |
50 | struct device_context device_ctx; | 53 | struct vm_device device_ctx; |
51 | }; | 54 | }; |
52 | 55 | ||
53 | static int vmbus_match(struct device *device, struct device_driver *driver); | 56 | static int vmbus_match(struct device *device, struct device_driver *driver); |
@@ -135,7 +138,7 @@ static ssize_t vmbus_show_device_attr(struct device *dev, | |||
135 | struct device_attribute *dev_attr, | 138 | struct device_attribute *dev_attr, |
136 | char *buf) | 139 | char *buf) |
137 | { | 140 | { |
138 | struct device_context *device_ctx = device_to_device_context(dev); | 141 | struct vm_device *device_ctx = device_to_vm_device(dev); |
139 | struct hv_device_info device_info; | 142 | struct hv_device_info device_info; |
140 | 143 | ||
141 | memset(&device_info, 0, sizeof(struct hv_device_info)); | 144 | memset(&device_info, 0, sizeof(struct hv_device_info)); |
@@ -245,7 +248,7 @@ static int vmbus_bus_init(int (*drv_init)(struct hv_driver *drv)) | |||
245 | { | 248 | { |
246 | struct vmbus_driver_context *vmbus_drv_ctx = &g_vmbus_drv; | 249 | struct vmbus_driver_context *vmbus_drv_ctx = &g_vmbus_drv; |
247 | struct vmbus_driver *vmbus_drv_obj = &g_vmbus_drv.drv_obj; | 250 | struct vmbus_driver *vmbus_drv_obj = &g_vmbus_drv.drv_obj; |
248 | struct device_context *dev_ctx = &g_vmbus_drv.device_ctx; | 251 | struct vm_device *dev_ctx = &g_vmbus_drv.device_ctx; |
249 | int ret; | 252 | int ret; |
250 | unsigned int vector; | 253 | unsigned int vector; |
251 | 254 | ||
@@ -307,7 +310,7 @@ static int vmbus_bus_init(int (*drv_init)(struct hv_driver *drv)) | |||
307 | DPRINT_INFO(VMBUS_DRV, "irq 0x%x vector 0x%x", vmbus_irq, vector); | 310 | DPRINT_INFO(VMBUS_DRV, "irq 0x%x vector 0x%x", vmbus_irq, vector); |
308 | 311 | ||
309 | /* Call to bus driver to add the root device */ | 312 | /* Call to bus driver to add the root device */ |
310 | memset(dev_ctx, 0, sizeof(struct device_context)); | 313 | memset(dev_ctx, 0, sizeof(struct vm_device)); |
311 | 314 | ||
312 | ret = vmbus_drv_obj->Base.OnDeviceAdd(&dev_ctx->device_obj, &vector); | 315 | ret = vmbus_drv_obj->Base.OnDeviceAdd(&dev_ctx->device_obj, &vector); |
313 | if (ret != 0) { | 316 | if (ret != 0) { |
@@ -368,7 +371,7 @@ static void vmbus_bus_exit(void) | |||
368 | struct vmbus_driver *vmbus_drv_obj = &g_vmbus_drv.drv_obj; | 371 | struct vmbus_driver *vmbus_drv_obj = &g_vmbus_drv.drv_obj; |
369 | struct vmbus_driver_context *vmbus_drv_ctx = &g_vmbus_drv; | 372 | struct vmbus_driver_context *vmbus_drv_ctx = &g_vmbus_drv; |
370 | 373 | ||
371 | struct device_context *dev_ctx = &g_vmbus_drv.device_ctx; | 374 | struct vm_device *dev_ctx = &g_vmbus_drv.device_ctx; |
372 | 375 | ||
373 | DPRINT_ENTER(VMBUS_DRV); | 376 | DPRINT_ENTER(VMBUS_DRV); |
374 | 377 | ||
@@ -471,13 +474,13 @@ static struct hv_device *vmbus_child_device_create(struct hv_guid *type, | |||
471 | struct hv_guid *instance, | 474 | struct hv_guid *instance, |
472 | void *context) | 475 | void *context) |
473 | { | 476 | { |
474 | struct device_context *child_device_ctx; | 477 | struct vm_device *child_device_ctx; |
475 | struct hv_device *child_device_obj; | 478 | struct hv_device *child_device_obj; |
476 | 479 | ||
477 | DPRINT_ENTER(VMBUS_DRV); | 480 | DPRINT_ENTER(VMBUS_DRV); |
478 | 481 | ||
479 | /* Allocate the new child device */ | 482 | /* Allocate the new child device */ |
480 | child_device_ctx = kzalloc(sizeof(struct device_context), GFP_KERNEL); | 483 | child_device_ctx = kzalloc(sizeof(struct vm_device), GFP_KERNEL); |
481 | if (!child_device_ctx) { | 484 | if (!child_device_ctx) { |
482 | DPRINT_ERR(VMBUS_DRV, | 485 | DPRINT_ERR(VMBUS_DRV, |
483 | "unable to allocate device_context for child device"); | 486 | "unable to allocate device_context for child device"); |
@@ -526,10 +529,10 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj, | |||
526 | struct hv_device *child_device_obj) | 529 | struct hv_device *child_device_obj) |
527 | { | 530 | { |
528 | int ret = 0; | 531 | int ret = 0; |
529 | struct device_context *root_device_ctx = | 532 | struct vm_device *root_device_ctx = |
530 | to_device_context(root_device_obj); | 533 | to_vm_device(root_device_obj); |
531 | struct device_context *child_device_ctx = | 534 | struct vm_device *child_device_ctx = |
532 | to_device_context(child_device_obj); | 535 | to_vm_device(child_device_obj); |
533 | static atomic_t device_num = ATOMIC_INIT(0); | 536 | static atomic_t device_num = ATOMIC_INIT(0); |
534 | 537 | ||
535 | DPRINT_ENTER(VMBUS_DRV); | 538 | DPRINT_ENTER(VMBUS_DRV); |
@@ -572,7 +575,7 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj, | |||
572 | */ | 575 | */ |
573 | static void vmbus_child_device_unregister(struct hv_device *device_obj) | 576 | static void vmbus_child_device_unregister(struct hv_device *device_obj) |
574 | { | 577 | { |
575 | struct device_context *device_ctx = to_device_context(device_obj); | 578 | struct vm_device *device_ctx = to_vm_device(device_obj); |
576 | 579 | ||
577 | DPRINT_ENTER(VMBUS_DRV); | 580 | DPRINT_ENTER(VMBUS_DRV); |
578 | 581 | ||
@@ -610,7 +613,7 @@ static void vmbus_child_device_destroy(struct hv_device *device_obj) | |||
610 | */ | 613 | */ |
611 | static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) | 614 | static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) |
612 | { | 615 | { |
613 | struct device_context *device_ctx = device_to_device_context(device); | 616 | struct vm_device *device_ctx = device_to_vm_device(device); |
614 | int ret; | 617 | int ret; |
615 | 618 | ||
616 | DPRINT_ENTER(VMBUS_DRV); | 619 | DPRINT_ENTER(VMBUS_DRV); |
@@ -687,7 +690,7 @@ static int vmbus_match(struct device *device, struct device_driver *driver) | |||
687 | { | 690 | { |
688 | int match = 0; | 691 | int match = 0; |
689 | struct driver_context *driver_ctx = driver_to_driver_context(driver); | 692 | struct driver_context *driver_ctx = driver_to_driver_context(driver); |
690 | struct device_context *device_ctx = device_to_device_context(device); | 693 | struct vm_device *device_ctx = device_to_vm_device(device); |
691 | 694 | ||
692 | DPRINT_ENTER(VMBUS_DRV); | 695 | DPRINT_ENTER(VMBUS_DRV); |
693 | 696 | ||
@@ -724,7 +727,7 @@ static int vmbus_match(struct device *device, struct device_driver *driver) | |||
724 | */ | 727 | */ |
725 | static void vmbus_probe_failed_cb(struct work_struct *context) | 728 | static void vmbus_probe_failed_cb(struct work_struct *context) |
726 | { | 729 | { |
727 | struct device_context *device_ctx = (struct device_context *)context; | 730 | struct vm_device *device_ctx = (struct vm_device *)context; |
728 | 731 | ||
729 | DPRINT_ENTER(VMBUS_DRV); | 732 | DPRINT_ENTER(VMBUS_DRV); |
730 | 733 | ||
@@ -746,8 +749,8 @@ static int vmbus_probe(struct device *child_device) | |||
746 | int ret = 0; | 749 | int ret = 0; |
747 | struct driver_context *driver_ctx = | 750 | struct driver_context *driver_ctx = |
748 | driver_to_driver_context(child_device->driver); | 751 | driver_to_driver_context(child_device->driver); |
749 | struct device_context *device_ctx = | 752 | struct vm_device *device_ctx = |
750 | device_to_device_context(child_device); | 753 | device_to_vm_device(child_device); |
751 | 754 | ||
752 | DPRINT_ENTER(VMBUS_DRV); | 755 | DPRINT_ENTER(VMBUS_DRV); |
753 | 756 | ||
@@ -871,7 +874,7 @@ static void vmbus_bus_release(struct device *device) | |||
871 | */ | 874 | */ |
872 | static void vmbus_device_release(struct device *device) | 875 | static void vmbus_device_release(struct device *device) |
873 | { | 876 | { |
874 | struct device_context *device_ctx = device_to_device_context(device); | 877 | struct vm_device *device_ctx = device_to_vm_device(device); |
875 | 878 | ||
876 | DPRINT_ENTER(VMBUS_DRV); | 879 | DPRINT_ENTER(VMBUS_DRV); |
877 | 880 | ||
@@ -946,6 +949,19 @@ static irqreturn_t vmbus_isr(int irq, void *dev_id) | |||
946 | } | 949 | } |
947 | } | 950 | } |
948 | 951 | ||
952 | static struct dmi_system_id __initdata microsoft_hv_dmi_table[] = { | ||
953 | { | ||
954 | .ident = "Hyper-V", | ||
955 | .matches = { | ||
956 | DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), | ||
957 | DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"), | ||
958 | DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"), | ||
959 | }, | ||
960 | }, | ||
961 | { }, | ||
962 | }; | ||
963 | MODULE_DEVICE_TABLE(dmi, microsoft_hv_dmi_table); | ||
964 | |||
949 | static int __init vmbus_init(void) | 965 | static int __init vmbus_init(void) |
950 | { | 966 | { |
951 | int ret = 0; | 967 | int ret = 0; |
@@ -957,6 +973,9 @@ static int __init vmbus_init(void) | |||
957 | vmbus_loglevel, HIWORD(vmbus_loglevel), LOWORD(vmbus_loglevel)); | 973 | vmbus_loglevel, HIWORD(vmbus_loglevel), LOWORD(vmbus_loglevel)); |
958 | /* Todo: it is used for loglevel, to be ported to new kernel. */ | 974 | /* Todo: it is used for loglevel, to be ported to new kernel. */ |
959 | 975 | ||
976 | if (!dmi_check_system(microsoft_hv_dmi_table)) | ||
977 | return -ENODEV; | ||
978 | |||
960 | ret = vmbus_bus_init(VmbusInitialize); | 979 | ret = vmbus_bus_init(VmbusInitialize); |
961 | 980 | ||
962 | DPRINT_EXIT(VMBUS_DRV); | 981 | DPRINT_EXIT(VMBUS_DRV); |
@@ -973,7 +992,20 @@ static void __exit vmbus_exit(void) | |||
973 | return; | 992 | return; |
974 | } | 993 | } |
975 | 994 | ||
995 | /* | ||
996 | * We use a PCI table to determine if we should autoload this driver This is | ||
997 | * needed by distro tools to determine if the hyperv drivers should be | ||
998 | * installed and/or configured. We don't do anything else with the table, but | ||
999 | * it needs to be present. | ||
1000 | */ | ||
1001 | const static struct pci_device_id microsoft_hv_pci_table[] = { | ||
1002 | { PCI_DEVICE(0x1414, 0x5353) }, /* VGA compatible controller */ | ||
1003 | { 0 } | ||
1004 | }; | ||
1005 | MODULE_DEVICE_TABLE(pci, microsoft_hv_pci_table); | ||
1006 | |||
976 | MODULE_LICENSE("GPL"); | 1007 | MODULE_LICENSE("GPL"); |
1008 | MODULE_VERSION(HV_DRV_VERSION); | ||
977 | module_param(vmbus_irq, int, S_IRUGO); | 1009 | module_param(vmbus_irq, int, S_IRUGO); |
978 | module_param(vmbus_loglevel, int, S_IRUGO); | 1010 | module_param(vmbus_loglevel, int, S_IRUGO); |
979 | 1011 | ||
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c index 768f44894d08..b456dfc8fe27 100644 --- a/drivers/staging/iio/industrialio-core.c +++ b/drivers/staging/iio/industrialio-core.c | |||
@@ -79,11 +79,14 @@ EXPORT_SYMBOL(__iio_change_event); | |||
79 | /* Does anyone care? */ | 79 | /* Does anyone care? */ |
80 | mutex_lock(&ev_int->event_list_lock); | 80 | mutex_lock(&ev_int->event_list_lock); |
81 | if (test_bit(IIO_BUSY_BIT_POS, &ev_int->handler.flags)) { | 81 | if (test_bit(IIO_BUSY_BIT_POS, &ev_int->handler.flags)) { |
82 | if (ev_int->current_events == ev_int->max_events) | 82 | if (ev_int->current_events == ev_int->max_events) { |
83 | mutex_unlock(&ev_int->event_list_lock); | ||
83 | return 0; | 84 | return 0; |
85 | } | ||
84 | ev = kmalloc(sizeof(*ev), GFP_KERNEL); | 86 | ev = kmalloc(sizeof(*ev), GFP_KERNEL); |
85 | if (ev == NULL) { | 87 | if (ev == NULL) { |
86 | ret = -ENOMEM; | 88 | ret = -ENOMEM; |
89 | mutex_unlock(&ev_int->event_list_lock); | ||
87 | goto error_ret; | 90 | goto error_ret; |
88 | } | 91 | } |
89 | ev->ev.id = ev_code; | 92 | ev->ev.id = ev_code; |
@@ -115,7 +118,7 @@ int iio_push_event(struct iio_dev *dev_info, | |||
115 | EXPORT_SYMBOL(iio_push_event); | 118 | EXPORT_SYMBOL(iio_push_event); |
116 | 119 | ||
117 | /* Generic interrupt line interrupt handler */ | 120 | /* Generic interrupt line interrupt handler */ |
118 | irqreturn_t iio_interrupt_handler(int irq, void *_int_info) | 121 | static irqreturn_t iio_interrupt_handler(int irq, void *_int_info) |
119 | { | 122 | { |
120 | struct iio_interrupt *int_info = _int_info; | 123 | struct iio_interrupt *int_info = _int_info; |
121 | struct iio_dev *dev_info = int_info->dev_info; | 124 | struct iio_dev *dev_info = int_info->dev_info; |
@@ -249,10 +252,10 @@ void iio_remove_event_from_list(struct iio_event_handler_list *el, | |||
249 | } | 252 | } |
250 | EXPORT_SYMBOL(iio_remove_event_from_list); | 253 | EXPORT_SYMBOL(iio_remove_event_from_list); |
251 | 254 | ||
252 | ssize_t iio_event_chrdev_read(struct file *filep, | 255 | static ssize_t iio_event_chrdev_read(struct file *filep, |
253 | char *buf, | 256 | char __user *buf, |
254 | size_t count, | 257 | size_t count, |
255 | loff_t *f_ps) | 258 | loff_t *f_ps) |
256 | { | 259 | { |
257 | struct iio_event_interface *ev_int = filep->private_data; | 260 | struct iio_event_interface *ev_int = filep->private_data; |
258 | struct iio_detected_event_list *el; | 261 | struct iio_detected_event_list *el; |
@@ -289,16 +292,16 @@ ssize_t iio_event_chrdev_read(struct file *filep, | |||
289 | mutex_unlock(&ev_int->event_list_lock); | 292 | mutex_unlock(&ev_int->event_list_lock); |
290 | /* | 293 | /* |
291 | * Possible concurency issue if an update of this event is on its way | 294 | * Possible concurency issue if an update of this event is on its way |
292 | * through. May lead to new even being removed whilst the reported event | 295 | * through. May lead to new event being removed whilst the reported |
293 | * was the unescalated event. In typical use case this is not a problem | 296 | * event was the unescalated event. In typical use case this is not a |
294 | * as userspace will say read half the buffer due to a 50% full event | 297 | * problem as userspace will say read half the buffer due to a 50% |
295 | * which would make the correct 100% full incorrect anyway. | 298 | * full event which would make the correct 100% full incorrect anyway. |
296 | */ | 299 | */ |
297 | spin_lock(&el->shared_pointer->lock); | 300 | if (el->shared_pointer) { |
298 | if (el->shared_pointer) | 301 | spin_lock(&el->shared_pointer->lock); |
299 | (el->shared_pointer->ev_p) = NULL; | 302 | (el->shared_pointer->ev_p) = NULL; |
300 | spin_unlock(&el->shared_pointer->lock); | 303 | spin_unlock(&el->shared_pointer->lock); |
301 | 304 | } | |
302 | kfree(el); | 305 | kfree(el); |
303 | 306 | ||
304 | return len; | 307 | return len; |
@@ -310,7 +313,7 @@ error_ret: | |||
310 | return ret; | 313 | return ret; |
311 | } | 314 | } |
312 | 315 | ||
313 | int iio_event_chrdev_release(struct inode *inode, struct file *filep) | 316 | static int iio_event_chrdev_release(struct inode *inode, struct file *filep) |
314 | { | 317 | { |
315 | struct iio_handler *hand = iio_cdev_to_handler(inode->i_cdev); | 318 | struct iio_handler *hand = iio_cdev_to_handler(inode->i_cdev); |
316 | struct iio_event_interface *ev_int = hand->private; | 319 | struct iio_event_interface *ev_int = hand->private; |
@@ -332,7 +335,7 @@ int iio_event_chrdev_release(struct inode *inode, struct file *filep) | |||
332 | return 0; | 335 | return 0; |
333 | } | 336 | } |
334 | 337 | ||
335 | int iio_event_chrdev_open(struct inode *inode, struct file *filep) | 338 | static int iio_event_chrdev_open(struct inode *inode, struct file *filep) |
336 | { | 339 | { |
337 | struct iio_handler *hand = iio_cdev_to_handler(inode->i_cdev); | 340 | struct iio_handler *hand = iio_cdev_to_handler(inode->i_cdev); |
338 | struct iio_event_interface *ev_int = hand->private; | 341 | struct iio_event_interface *ev_int = hand->private; |
diff --git a/drivers/staging/iio/ring_generic.h b/drivers/staging/iio/ring_generic.h index 93b91b28a02f..09044adf7327 100644 --- a/drivers/staging/iio/ring_generic.h +++ b/drivers/staging/iio/ring_generic.h | |||
@@ -146,8 +146,7 @@ static inline void __iio_init_ring_buffer(struct iio_ring_buffer *ring, | |||
146 | ring->length = length; | 146 | ring->length = length; |
147 | ring->loopcount = 0; | 147 | ring->loopcount = 0; |
148 | ring->shared_ev_pointer.ev_p = 0; | 148 | ring->shared_ev_pointer.ev_p = 0; |
149 | ring->shared_ev_pointer.lock = | 149 | spin_lock_init(&ring->shared_ev_pointer.lock); |
150 | __SPIN_LOCK_UNLOCKED(ring->shared_ev_pointer->loc); | ||
151 | } | 150 | } |
152 | 151 | ||
153 | /** | 152 | /** |
diff --git a/drivers/staging/iio/ring_sw.c b/drivers/staging/iio/ring_sw.c index 359ff9208f36..6f7f4d5a93f3 100644 --- a/drivers/staging/iio/ring_sw.c +++ b/drivers/staging/iio/ring_sw.c | |||
@@ -8,7 +8,6 @@ | |||
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/device.h> | ||
12 | #include <linux/module.h> | 11 | #include <linux/module.h> |
13 | #include <linux/device.h> | 12 | #include <linux/device.h> |
14 | #include <linux/workqueue.h> | 13 | #include <linux/workqueue.h> |
@@ -21,7 +20,7 @@ static inline int __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring, | |||
21 | return -EINVAL; | 20 | return -EINVAL; |
22 | 21 | ||
23 | __iio_init_ring_buffer(&ring->buf, bytes_per_datum, length); | 22 | __iio_init_ring_buffer(&ring->buf, bytes_per_datum, length); |
24 | ring->use_lock = __SPIN_LOCK_UNLOCKED((ring)->use_lock); | 23 | spin_lock_init(&ring->use_lock); |
25 | ring->data = kmalloc(length*ring->buf.bpd, GFP_KERNEL); | 24 | ring->data = kmalloc(length*ring->buf.bpd, GFP_KERNEL); |
26 | ring->read_p = 0; | 25 | ring->read_p = 0; |
27 | ring->write_p = 0; | 26 | ring->write_p = 0; |
diff --git a/drivers/staging/iio/trigger_consumer.h b/drivers/staging/iio/trigger_consumer.h index a02d70b0d24a..9d52d9637777 100644 --- a/drivers/staging/iio/trigger_consumer.h +++ b/drivers/staging/iio/trigger_consumer.h | |||
@@ -27,7 +27,7 @@ int iio_device_unregister_trigger_consumer(struct iio_dev *dev_info); | |||
27 | * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers | 27 | * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers |
28 | * @dev_info: iio_dev associated with the device that will consume the trigger | 28 | * @dev_info: iio_dev associated with the device that will consume the trigger |
29 | **/ | 29 | **/ |
30 | int iio_device_register_trigger_consumer(struct iio_dev *dev_info) | 30 | static int iio_device_register_trigger_consumer(struct iio_dev *dev_info) |
31 | { | 31 | { |
32 | return 0; | 32 | return 0; |
33 | }; | 33 | }; |
@@ -36,7 +36,7 @@ int iio_device_register_trigger_consumer(struct iio_dev *dev_info) | |||
36 | * iio_device_unregister_trigger_consumer() - reverse the registration process | 36 | * iio_device_unregister_trigger_consumer() - reverse the registration process |
37 | * @dev_info: iio_dev associated with the device that consumed the trigger | 37 | * @dev_info: iio_dev associated with the device that consumed the trigger |
38 | **/ | 38 | **/ |
39 | int iio_device_unregister_trigger_consumer(struct iio_dev *dev_info) | 39 | static int iio_device_unregister_trigger_consumer(struct iio_dev *dev_info) |
40 | { | 40 | { |
41 | return 0; | 41 | return 0; |
42 | }; | 42 | }; |
diff --git a/drivers/staging/line6/driver.c b/drivers/staging/line6/driver.c index e4078a92d399..0392a4bc8cc8 100644 --- a/drivers/staging/line6/driver.c +++ b/drivers/staging/line6/driver.c | |||
@@ -33,7 +33,7 @@ | |||
33 | 33 | ||
34 | 34 | ||
35 | /* table of devices that work with this driver */ | 35 | /* table of devices that work with this driver */ |
36 | static struct usb_device_id line6_id_table[] = { | 36 | static const struct usb_device_id line6_id_table[] = { |
37 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXT) }, | 37 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXT) }, |
38 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTLIVE) }, | 38 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTLIVE) }, |
39 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTPRO) }, | 39 | { USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTPRO) }, |
diff --git a/drivers/staging/line6/variax.c b/drivers/staging/line6/variax.c index 48d834b0fa1b..58fef82c247d 100644 --- a/drivers/staging/line6/variax.c +++ b/drivers/staging/line6/variax.c | |||
@@ -254,7 +254,7 @@ static ssize_t variax_set_active(struct device *dev, | |||
254 | if (ret) | 254 | if (ret) |
255 | return ret; | 255 | return ret; |
256 | 256 | ||
257 | variax->buffer_activate[VARIAX_OFFSET_ACTIVATE] = value ? 1: 0; | 257 | variax->buffer_activate[VARIAX_OFFSET_ACTIVATE] = value ? 1 : 0; |
258 | line6_send_raw_message_async(&variax->line6, variax->buffer_activate, | 258 | line6_send_raw_message_async(&variax->line6, variax->buffer_activate, |
259 | sizeof(variax_activate)); | 259 | sizeof(variax_activate)); |
260 | return count; | 260 | return count; |
diff --git a/drivers/staging/mimio/Kconfig b/drivers/staging/mimio/Kconfig deleted file mode 100644 index 505dcb275796..000000000000 --- a/drivers/staging/mimio/Kconfig +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | config INPUT_MIMIO | ||
2 | tristate "Mimio Xi interactive whiteboard support" | ||
3 | depends on USB && INPUT | ||
4 | default N | ||
5 | help | ||
6 | Say Y here if you want to use a Mimio Xi interactive | ||
7 | whiteboard device. | ||
8 | |||
9 | To compile this driver as a module, choose M here: the | ||
10 | module will be called mimio. | ||
diff --git a/drivers/staging/mimio/Makefile b/drivers/staging/mimio/Makefile deleted file mode 100644 index 77807ee0450e..000000000000 --- a/drivers/staging/mimio/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-$(CONFIG_INPUT_MIMIO) += mimio.o | ||
diff --git a/drivers/staging/mimio/mimio.c b/drivers/staging/mimio/mimio.c deleted file mode 100644 index 1ba8103f5003..000000000000 --- a/drivers/staging/mimio/mimio.c +++ /dev/null | |||
@@ -1,914 +0,0 @@ | |||
1 | /* | ||
2 | * Hardware event => input event mapping: | ||
3 | * | ||
4 | * | ||
5 | * | ||
6 | input.h:#define BTN_TOOL_PEN 0x140 black | ||
7 | input.h:#define BTN_TOOL_RUBBER 0x141 blue | ||
8 | input.h:#define BTN_TOOL_BRUSH 0x142 green | ||
9 | input.h:#define BTN_TOOL_PENCIL 0x143 red | ||
10 | input.h:#define BTN_TOOL_AIRBRUSH 0x144 eraser | ||
11 | input.h:#define BTN_TOOL_FINGER 0x145 small eraser | ||
12 | input.h:#define BTN_TOOL_MOUSE 0x146 mimio interactive | ||
13 | input.h:#define BTN_TOOL_LENS 0x147 mimio interactive but1 | ||
14 | input.h:#define LOCALBTN_TOOL_EXTRA1 0x14a mimio interactive but2 == BTN_TOUCH | ||
15 | input.h:#define LOCALBTN_TOOL_EXTRA2 0x14b mimio extra pens (orange, brown, yellow, purple) == BTN_STYLUS | ||
16 | input.h:#define LOCALBTN_TOOL_EXTRA3 0x14c unused == BTN_STYLUS2 | ||
17 | input.h:#define BTN_TOOL_DOUBLETAP 0x14d unused | ||
18 | input.h:#define BTN_TOOL_TRIPLETAP 0x14e unused | ||
19 | * | ||
20 | * MIMIO_EV_PENDOWN(MIMIO_PEN_K) => EV_KEY BIT(BTN_TOOL_PEN) | ||
21 | * MIMIO_EV_PENDOWN(MIMIO_PEN_B) => EV_KEY BIT(BTN_TOOL_RUBBER) | ||
22 | * MIMIO_EV_PENDOWN(MIMIO_PEN_G) => EV_KEY BIT(BTN_TOOL_BRUSH) | ||
23 | * MIMIO_EV_PENDOWN(MIMIO_PEN_R) => EV_KEY BIT(BTN_TOOL_PENCIL) | ||
24 | * MIMIO_EV_PENDOWN(MIMIO_PEN_E) => EV_KEY BIT(BTN_TOOL_AIRBRUSH) | ||
25 | * MIMIO_EV_PENDOWN(MIMIO_PEN_ES) => EV_KEY BIT(BTN_TOOL_FINGER) | ||
26 | * MIMIO_EV_PENDOWN(MIMIO_PEN_I) => EV_KEY BIT(BTN_TOOL_MOUSE) | ||
27 | * MIMIO_EV_PENDOWN(MIMIO_PEN_IL) => EV_KEY BIT(BTN_TOOL_LENS) | ||
28 | * MIMIO_EV_PENDOWN(MIMIO_PEN_IR) => EV_KEY BIT(BTN_TOOL_DOUBLETAP) | ||
29 | * MIMIO_EV_PENDOWN(MIMIO_PEN_EX) => EV_KEY BIT(BTN_TOOL_TRIPLETAP) | ||
30 | * MIMIO_EV_PENDATA => EV_ABS BIT(ABS_X), BIT(ABS_Y) | ||
31 | * MIMIO_EV_MEMRESET => EV_KEY BIT(BTN_0) | ||
32 | * MIMIO_EV_ACC(ACC_NEWPAGE) => EV_KEY BIT(BTN_1) | ||
33 | * MIMIO_EV_ACC(ACC_TAGPAGE) => EV_KEY BIT(BTN_2) | ||
34 | * MIMIO_EV_ACC(ACC_PRINTPAGE) => EV_KEY BIT(BTN_3) | ||
35 | * MIMIO_EV_ACC(ACC_MAXIMIZE) => EV_KEY BIT(BTN_4) | ||
36 | * MIMIO_EV_ACC(ACC_FINDCTLPNL) => EV_KEY BIT(BTN_5) | ||
37 | * | ||
38 | * | ||
39 | * open issues: | ||
40 | * - cold-load of data captured when mimio in standalone mode not yet | ||
41 | * supported; need to snoop Win32 box to see datastream for this. | ||
42 | * - mimio mouse not yet supported; need to snoop Win32 box to see the | ||
43 | * datastream for this. | ||
44 | */ | ||
45 | #include <linux/kernel.h> | ||
46 | #include <linux/init.h> | ||
47 | #include <linux/slab.h> | ||
48 | #include <linux/spinlock.h> | ||
49 | #include <linux/input.h> | ||
50 | #include <linux/usb.h> | ||
51 | |||
52 | #define DRIVER_VERSION "v0.031" | ||
53 | #define DRIVER_AUTHOR "mwilder@cs.nmsu.edu" | ||
54 | #define DRIVER_DESC "USB mimio-xi driver" | ||
55 | |||
56 | enum {UPVALUE, DOWNVALUE, MOVEVALUE}; | ||
57 | |||
58 | #define MIMIO_XRANGE_MAX 9600 | ||
59 | #define MIMIO_YRANGE_MAX 4800 | ||
60 | |||
61 | #define LOCALBTN_TOOL_EXTRA1 BTN_TOUCH | ||
62 | #define LOCALBTN_TOOL_EXTRA2 BTN_STYLUS | ||
63 | #define LOCALBTN_TOOL_EXTRA3 BTN_STYLUS2 | ||
64 | |||
65 | #define MIMIO_VENDOR_ID 0x08d3 | ||
66 | #define MIMIO_PRODUCT_ID 0x0001 | ||
67 | #define MIMIO_MAXPAYLOAD (8) | ||
68 | #define MIMIO_MAXNAMELEN (64) | ||
69 | #define MIMIO_TXWAIT (1) | ||
70 | #define MIMIO_TXDONE (2) | ||
71 | |||
72 | #define MIMIO_EV_PENDOWN (0x22) | ||
73 | #define MIMIO_EV_PENDATA (0x24) | ||
74 | #define MIMIO_EV_PENUP (0x51) | ||
75 | #define MIMIO_EV_MEMRESET (0x45) | ||
76 | #define MIMIO_EV_ACC (0xb2) | ||
77 | |||
78 | #define MIMIO_PEN_K (1) /* black pen */ | ||
79 | #define MIMIO_PEN_B (2) /* blue pen */ | ||
80 | #define MIMIO_PEN_G (3) /* green pen */ | ||
81 | #define MIMIO_PEN_R (4) /* red pen */ | ||
82 | /* 5, 6, 7, 8 are extra pens */ | ||
83 | #define MIMIO_PEN_E (9) /* big eraser */ | ||
84 | #define MIMIO_PEN_ES (10) /* lil eraser */ | ||
85 | #define MIMIO_PENJUMP_START (10) | ||
86 | #define MIMIO_PENJUMP (6) | ||
87 | #define MIMIO_PEN_I (17) /* mimio interactive */ | ||
88 | #define MIMIO_PEN_IL (18) /* mimio interactive button 1 */ | ||
89 | #define MIMIO_PEN_IR (19) /* mimio interactive button 2 */ | ||
90 | |||
91 | #define MIMIO_PEN_MAX (MIMIO_PEN_IR) | ||
92 | |||
93 | #define ACC_DONE (0) | ||
94 | #define ACC_NEWPAGE (1) | ||
95 | #define ACC_TAGPAGE (2) | ||
96 | #define ACC_PRINTPAGE (4) | ||
97 | #define ACC_MAXIMIZE (8) | ||
98 | #define ACC_FINDCTLPNL (16) | ||
99 | |||
100 | #define isvalidtxsize(n) ((n) > 0 && (n) <= MIMIO_MAXPAYLOAD) | ||
101 | |||
102 | |||
103 | struct pktbuf { | ||
104 | unsigned char instr; | ||
105 | unsigned char buf[16]; | ||
106 | unsigned char *p; | ||
107 | unsigned char *q; | ||
108 | }; | ||
109 | |||
110 | struct usbintendpt { | ||
111 | dma_addr_t dma; | ||
112 | struct urb *urb; | ||
113 | unsigned char *buf; | ||
114 | struct usb_endpoint_descriptor *desc; | ||
115 | }; | ||
116 | |||
117 | struct mimio { | ||
118 | struct input_dev *idev; | ||
119 | struct usb_device *udev; | ||
120 | struct usb_interface *uifc; | ||
121 | int open; | ||
122 | int present; | ||
123 | int greeted; | ||
124 | int txflags; | ||
125 | char phys[MIMIO_MAXNAMELEN]; | ||
126 | struct usbintendpt in; | ||
127 | struct usbintendpt out; | ||
128 | struct pktbuf pktbuf; | ||
129 | unsigned char minor; | ||
130 | wait_queue_head_t waitq; | ||
131 | spinlock_t txlock; | ||
132 | void (*rxhandler)(struct mimio *, unsigned char *, unsigned int); | ||
133 | int last_pen_down; | ||
134 | }; | ||
135 | |||
136 | static void mimio_close(struct input_dev *); | ||
137 | static void mimio_dealloc(struct mimio *); | ||
138 | static void mimio_disconnect(struct usb_interface *); | ||
139 | static int mimio_greet(struct mimio *); | ||
140 | static void mimio_irq_in(struct urb *); | ||
141 | static void mimio_irq_out(struct urb *); | ||
142 | static int mimio_open(struct input_dev *); | ||
143 | static int mimio_probe(struct usb_interface *, const struct usb_device_id *); | ||
144 | static void mimio_rx_handler(struct mimio *, unsigned char *, unsigned int); | ||
145 | static int mimio_tx(struct mimio *, const char *, int); | ||
146 | |||
147 | static char mimio_name[] = "VirtualInk mimio-Xi"; | ||
148 | static struct usb_device_id mimio_table [] = { | ||
149 | { USB_DEVICE(MIMIO_VENDOR_ID, MIMIO_PRODUCT_ID) }, | ||
150 | { USB_DEVICE(0x0525, 0xa4a0) }, /* gadget zero firmware */ | ||
151 | { } | ||
152 | }; | ||
153 | |||
154 | MODULE_DEVICE_TABLE(usb, mimio_table); | ||
155 | |||
156 | static struct usb_driver mimio_driver = { | ||
157 | .name = "mimio", | ||
158 | .probe = mimio_probe, | ||
159 | .disconnect = mimio_disconnect, | ||
160 | .id_table = mimio_table, | ||
161 | }; | ||
162 | |||
163 | static DECLARE_MUTEX(disconnect_sem); | ||
164 | |||
165 | static void mimio_close(struct input_dev *idev) | ||
166 | { | ||
167 | struct mimio *mimio; | ||
168 | |||
169 | mimio = input_get_drvdata(idev); | ||
170 | if (!mimio) { | ||
171 | dev_err(&idev->dev, "null mimio attached to input device\n"); | ||
172 | return; | ||
173 | } | ||
174 | |||
175 | if (mimio->open <= 0) | ||
176 | dev_err(&idev->dev, "mimio not open.\n"); | ||
177 | else | ||
178 | mimio->open--; | ||
179 | |||
180 | if (mimio->present == 0 && mimio->open == 0) | ||
181 | mimio_dealloc(mimio); | ||
182 | } | ||
183 | |||
184 | static void mimio_dealloc(struct mimio *mimio) | ||
185 | { | ||
186 | if (mimio == NULL) | ||
187 | return; | ||
188 | |||
189 | usb_kill_urb(mimio->in.urb); | ||
190 | |||
191 | usb_kill_urb(mimio->out.urb); | ||
192 | |||
193 | if (mimio->idev) { | ||
194 | input_unregister_device(mimio->idev); | ||
195 | if (mimio->idev->grab) | ||
196 | input_close_device(mimio->idev->grab); | ||
197 | else | ||
198 | dev_dbg(&mimio->idev->dev, "mimio->idev->grab == NULL" | ||
199 | " -- didn't call input_close_device\n"); | ||
200 | } | ||
201 | |||
202 | usb_free_urb(mimio->in.urb); | ||
203 | |||
204 | usb_free_urb(mimio->out.urb); | ||
205 | |||
206 | if (mimio->in.buf) { | ||
207 | usb_buffer_free(mimio->udev, MIMIO_MAXPAYLOAD, mimio->in.buf, | ||
208 | mimio->in.dma); | ||
209 | } | ||
210 | |||
211 | if (mimio->out.buf) | ||
212 | usb_buffer_free(mimio->udev, MIMIO_MAXPAYLOAD, mimio->out.buf, | ||
213 | mimio->out.dma); | ||
214 | |||
215 | if (mimio->idev) | ||
216 | input_free_device(mimio->idev); | ||
217 | |||
218 | kfree(mimio); | ||
219 | } | ||
220 | |||
221 | static void mimio_disconnect(struct usb_interface *ifc) | ||
222 | { | ||
223 | struct mimio *mimio; | ||
224 | |||
225 | down(&disconnect_sem); | ||
226 | |||
227 | mimio = usb_get_intfdata(ifc); | ||
228 | usb_set_intfdata(ifc, NULL); | ||
229 | dev_dbg(&mimio->idev->dev, "disconnect\n"); | ||
230 | |||
231 | if (mimio) { | ||
232 | mimio->present = 0; | ||
233 | |||
234 | if (mimio->open <= 0) | ||
235 | mimio_dealloc(mimio); | ||
236 | } | ||
237 | |||
238 | up(&disconnect_sem); | ||
239 | } | ||
240 | |||
241 | static int mimio_greet(struct mimio *mimio) | ||
242 | { | ||
243 | const struct grtpkt { | ||
244 | int nbytes; | ||
245 | unsigned delay; | ||
246 | char data[8]; | ||
247 | } grtpkts[] = { | ||
248 | { 3, 0, { 0x11, 0x55, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00 } }, | ||
249 | { 5, 0, { 0x53, 0x55, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00 } }, | ||
250 | { 5, 0, { 0x43, 0x55, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00 } }, | ||
251 | { 5, 0, { 0x33, 0x55, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00 } }, | ||
252 | { 5, 0, { 0x13, 0x00, 0x5e, 0x02, 0x4f, 0x00, 0x00, 0x00 } }, | ||
253 | { 5, 0, { 0x13, 0x00, 0x04, 0x03, 0x14, 0x00, 0x00, 0x00 } }, | ||
254 | { 5, 2, { 0x13, 0x00, 0x00, 0x04, 0x17, 0x00, 0x00, 0x00 } }, | ||
255 | { 5, 0, { 0x13, 0x00, 0x0d, 0x08, 0x16, 0x00, 0x00, 0x00 } }, | ||
256 | { 5, 0, { 0x13, 0x00, 0x4d, 0x01, 0x5f, 0x00, 0x00, 0x00 } }, | ||
257 | { 3, 0, { 0xf1, 0x55, 0xa4, 0x00, 0x00, 0x00, 0x00, 0x00 } }, | ||
258 | { 7, 2, { 0x52, 0x55, 0x00, 0x07, 0x31, 0x55, 0x64, 0x00 } }, | ||
259 | { 0, 0, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }, | ||
260 | }; | ||
261 | int rslt; | ||
262 | const struct grtpkt *pkt; | ||
263 | |||
264 | for (pkt = grtpkts; pkt->nbytes; pkt++) { | ||
265 | rslt = mimio_tx(mimio, pkt->data, pkt->nbytes); | ||
266 | if (rslt) | ||
267 | return rslt; | ||
268 | if (pkt->delay) | ||
269 | msleep(pkt->delay); | ||
270 | } | ||
271 | |||
272 | return 0; | ||
273 | } | ||
274 | |||
275 | static void mimio_irq_in(struct urb *urb) | ||
276 | { | ||
277 | int rslt; | ||
278 | char *data; | ||
279 | const char *reason = "going down"; | ||
280 | struct mimio *mimio; | ||
281 | |||
282 | mimio = urb->context; | ||
283 | |||
284 | if (mimio == NULL) | ||
285 | /* paranoia */ | ||
286 | return; | ||
287 | |||
288 | switch (urb->status) { | ||
289 | case 0: | ||
290 | /* success */ | ||
291 | break; | ||
292 | case -ETIMEDOUT: | ||
293 | reason = "timeout -- unplugged?"; | ||
294 | case -ECONNRESET: | ||
295 | case -ENOENT: | ||
296 | case -ESHUTDOWN: | ||
297 | dev_dbg(&mimio->idev->dev, "%s.\n", reason); | ||
298 | return; | ||
299 | default: | ||
300 | dev_dbg(&mimio->idev->dev, "unknown urb-status: %d.\n", | ||
301 | urb->status); | ||
302 | goto exit; | ||
303 | } | ||
304 | data = mimio->in.buf; | ||
305 | |||
306 | if (mimio->rxhandler) | ||
307 | mimio->rxhandler(mimio, data, urb->actual_length); | ||
308 | exit: | ||
309 | /* | ||
310 | * Keep listening to device on same urb. | ||
311 | */ | ||
312 | rslt = usb_submit_urb(urb, GFP_ATOMIC); | ||
313 | if (rslt) | ||
314 | dev_err(&mimio->idev->dev, "usb_submit_urb failure: %d.\n", | ||
315 | rslt); | ||
316 | } | ||
317 | |||
318 | static void mimio_irq_out(struct urb *urb) | ||
319 | { | ||
320 | unsigned long flags; | ||
321 | struct mimio *mimio; | ||
322 | |||
323 | mimio = urb->context; | ||
324 | |||
325 | if (urb->status) | ||
326 | dev_dbg(&mimio->idev->dev, "urb-status: %d.\n", urb->status); | ||
327 | |||
328 | spin_lock_irqsave(&mimio->txlock, flags); | ||
329 | mimio->txflags |= MIMIO_TXDONE; | ||
330 | spin_unlock_irqrestore(&mimio->txlock, flags); | ||
331 | wmb(); | ||
332 | wake_up(&mimio->waitq); | ||
333 | } | ||
334 | |||
335 | static int mimio_open(struct input_dev *idev) | ||
336 | { | ||
337 | int rslt; | ||
338 | struct mimio *mimio; | ||
339 | |||
340 | rslt = 0; | ||
341 | down(&disconnect_sem); | ||
342 | mimio = input_get_drvdata(idev); | ||
343 | dev_dbg(&idev->dev, "mimio_open\n"); | ||
344 | |||
345 | if (mimio == NULL) { | ||
346 | dev_err(&idev->dev, "null mimio.\n"); | ||
347 | rslt = -ENODEV; | ||
348 | goto exit; | ||
349 | } | ||
350 | |||
351 | if (mimio->open++) | ||
352 | goto exit; | ||
353 | |||
354 | if (mimio->present && !mimio->greeted) { | ||
355 | struct urb *urb = mimio->in.urb; | ||
356 | mimio->in.urb->dev = mimio->udev; | ||
357 | rslt = usb_submit_urb(mimio->in.urb, GFP_KERNEL); | ||
358 | if (rslt) { | ||
359 | dev_err(&idev->dev, "usb_submit_urb failure " | ||
360 | "(res = %d: %s). Not greeting.\n", | ||
361 | rslt, | ||
362 | (!urb ? "urb is NULL" : | ||
363 | (urb->hcpriv ? "urb->hcpriv is non-NULL" : | ||
364 | (!urb->complete ? "urb is not complete" : | ||
365 | (urb->number_of_packets <= 0 ? "urb has no packets" : | ||
366 | (urb->interval <= 0 ? "urb interval too small" : | ||
367 | "urb interval too large or some other error")))))); | ||
368 | rslt = -EIO; | ||
369 | goto exit; | ||
370 | } | ||
371 | rslt = mimio_greet(mimio); | ||
372 | if (rslt == 0) { | ||
373 | dev_dbg(&idev->dev, "Mimio greeted OK.\n"); | ||
374 | mimio->greeted = 1; | ||
375 | } else { | ||
376 | dev_dbg(&idev->dev, "Mimio greet Failure (%d)\n", | ||
377 | rslt); | ||
378 | } | ||
379 | } | ||
380 | |||
381 | exit: | ||
382 | up(&disconnect_sem); | ||
383 | return rslt; | ||
384 | } | ||
385 | |||
386 | static int mimio_probe(struct usb_interface *ifc, | ||
387 | const struct usb_device_id *id) | ||
388 | { | ||
389 | char path[64]; | ||
390 | int pipe, maxp; | ||
391 | struct mimio *mimio; | ||
392 | struct usb_device *udev; | ||
393 | struct usb_host_interface *hostifc; | ||
394 | struct input_dev *input_dev; | ||
395 | int res = 0; | ||
396 | int i; | ||
397 | |||
398 | udev = interface_to_usbdev(ifc); | ||
399 | |||
400 | mimio = kzalloc(sizeof(struct mimio), GFP_KERNEL); | ||
401 | if (!mimio) | ||
402 | return -ENOMEM; | ||
403 | |||
404 | input_dev = input_allocate_device(); | ||
405 | if (!input_dev) { | ||
406 | mimio_dealloc(mimio); | ||
407 | return -ENOMEM; | ||
408 | } | ||
409 | |||
410 | mimio->uifc = ifc; | ||
411 | mimio->udev = udev; | ||
412 | mimio->pktbuf.p = mimio->pktbuf.buf; | ||
413 | mimio->pktbuf.q = mimio->pktbuf.buf; | ||
414 | /* init_input_dev(mimio->idev); */ | ||
415 | mimio->idev = input_dev; | ||
416 | init_waitqueue_head(&mimio->waitq); | ||
417 | spin_lock_init(&mimio->txlock); | ||
418 | hostifc = ifc->cur_altsetting; | ||
419 | |||
420 | if (hostifc->desc.bNumEndpoints != 2) { | ||
421 | dev_err(&udev->dev, "Unexpected endpoint count: %d.\n", | ||
422 | hostifc->desc.bNumEndpoints); | ||
423 | mimio_dealloc(mimio); | ||
424 | return -ENODEV; | ||
425 | } | ||
426 | |||
427 | mimio->in.desc = &(hostifc->endpoint[0].desc); | ||
428 | mimio->out.desc = &(hostifc->endpoint[1].desc); | ||
429 | |||
430 | mimio->in.buf = usb_buffer_alloc(udev, MIMIO_MAXPAYLOAD, GFP_KERNEL, | ||
431 | &mimio->in.dma); | ||
432 | mimio->out.buf = usb_buffer_alloc(udev, MIMIO_MAXPAYLOAD, GFP_KERNEL, | ||
433 | &mimio->out.dma); | ||
434 | |||
435 | if (mimio->in.buf == NULL || mimio->out.buf == NULL) { | ||
436 | dev_err(&udev->dev, "usb_buffer_alloc failure.\n"); | ||
437 | mimio_dealloc(mimio); | ||
438 | return -ENOMEM; | ||
439 | } | ||
440 | |||
441 | mimio->in.urb = usb_alloc_urb(0, GFP_KERNEL); | ||
442 | mimio->out.urb = usb_alloc_urb(0, GFP_KERNEL); | ||
443 | |||
444 | if (mimio->in.urb == NULL || mimio->out.urb == NULL) { | ||
445 | dev_err(&udev->dev, "usb_alloc_urb failure.\n"); | ||
446 | mimio_dealloc(mimio); | ||
447 | return -ENOMEM; | ||
448 | } | ||
449 | |||
450 | /* | ||
451 | * Build the input urb. | ||
452 | */ | ||
453 | pipe = usb_rcvintpipe(udev, mimio->in.desc->bEndpointAddress); | ||
454 | maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); | ||
455 | if (maxp > MIMIO_MAXPAYLOAD) | ||
456 | maxp = MIMIO_MAXPAYLOAD; | ||
457 | usb_fill_int_urb(mimio->in.urb, udev, pipe, mimio->in.buf, maxp, | ||
458 | mimio_irq_in, mimio, mimio->in.desc->bInterval); | ||
459 | mimio->in.urb->transfer_dma = mimio->in.dma; | ||
460 | mimio->in.urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; | ||
461 | |||
462 | /* | ||
463 | * Build the output urb. | ||
464 | */ | ||
465 | pipe = usb_sndintpipe(udev, mimio->out.desc->bEndpointAddress); | ||
466 | maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); | ||
467 | if (maxp > MIMIO_MAXPAYLOAD) | ||
468 | maxp = MIMIO_MAXPAYLOAD; | ||
469 | usb_fill_int_urb(mimio->out.urb, udev, pipe, mimio->out.buf, maxp, | ||
470 | mimio_irq_out, mimio, mimio->out.desc->bInterval); | ||
471 | mimio->out.urb->transfer_dma = mimio->out.dma; | ||
472 | mimio->out.urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; | ||
473 | |||
474 | /* | ||
475 | * Build input device info | ||
476 | */ | ||
477 | usb_make_path(udev, path, 64); | ||
478 | snprintf(mimio->phys, MIMIO_MAXNAMELEN, "%s/input0", path); | ||
479 | input_set_drvdata(input_dev, mimio); | ||
480 | /* input_dev->dev = &ifc->dev; */ | ||
481 | input_dev->open = mimio_open; | ||
482 | input_dev->close = mimio_close; | ||
483 | input_dev->name = mimio_name; | ||
484 | input_dev->phys = mimio->phys; | ||
485 | input_dev->dev.parent = &ifc->dev; | ||
486 | |||
487 | input_dev->id.bustype = BUS_USB; | ||
488 | input_dev->id.vendor = le16_to_cpu(udev->descriptor.idVendor); | ||
489 | input_dev->id.product = le16_to_cpu(udev->descriptor.idProduct); | ||
490 | input_dev->id.version = le16_to_cpu(udev->descriptor.bcdDevice); | ||
491 | |||
492 | input_dev->evbit[0] |= BIT(EV_KEY) | BIT(EV_ABS); | ||
493 | for (i = BTN_TOOL_PEN; i <= LOCALBTN_TOOL_EXTRA2; ++i) | ||
494 | set_bit(i, input_dev->keybit); | ||
495 | |||
496 | input_dev->keybit[BIT_WORD(BTN_MISC)] |= BIT_MASK(BTN_0) | | ||
497 | BIT_MASK(BTN_1) | | ||
498 | BIT_MASK(BTN_2) | | ||
499 | BIT_MASK(BTN_3) | | ||
500 | BIT_MASK(BTN_4) | | ||
501 | BIT_MASK(BTN_5); | ||
502 | /* input_dev->keybit[BTN_MOUSE] |= BIT(BTN_LEFT); */ | ||
503 | input_dev->absbit[0] |= BIT_MASK(ABS_X) | BIT_MASK(ABS_Y); | ||
504 | input_set_abs_params(input_dev, ABS_X, 0, MIMIO_XRANGE_MAX, 0, 0); | ||
505 | input_set_abs_params(input_dev, ABS_Y, 0, MIMIO_YRANGE_MAX, 0, 0); | ||
506 | input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC); | ||
507 | |||
508 | #if 0 | ||
509 | input_dev->absmin[ABS_X] = 0; | ||
510 | input_dev->absmin[ABS_Y] = 0; | ||
511 | input_dev->absmax[ABS_X] = 9600; | ||
512 | input_dev->absmax[ABS_Y] = 4800; | ||
513 | input_dev->absfuzz[ABS_X] = 0; | ||
514 | input_dev->absfuzz[ABS_Y] = 0; | ||
515 | input_dev->absflat[ABS_X] = 0; | ||
516 | input_dev->absflat[ABS_Y] = 0; | ||
517 | #endif | ||
518 | |||
519 | #if 0 | ||
520 | /* this will just reduce the precision */ | ||
521 | input_dev->absfuzz[ABS_X] = 8; /* experimental; may need to change */ | ||
522 | input_dev->absfuzz[ABS_Y] = 8; /* experimental; may need to change */ | ||
523 | #endif | ||
524 | |||
525 | /* | ||
526 | * Register the input device. | ||
527 | */ | ||
528 | res = input_register_device(mimio->idev); | ||
529 | if (res) { | ||
530 | dev_err(&udev->dev, "input_register_device failure (%d)\n", | ||
531 | res); | ||
532 | mimio_dealloc(mimio); | ||
533 | return -EIO; | ||
534 | } | ||
535 | dev_dbg(&mimio->idev->dev, "input: %s on %s (res = %d).\n", | ||
536 | input_dev->name, input_dev->phys, res); | ||
537 | |||
538 | usb_set_intfdata(ifc, mimio); | ||
539 | mimio->present = 1; | ||
540 | |||
541 | /* | ||
542 | * Submit the input urb to the usb subsystem. | ||
543 | */ | ||
544 | mimio->in.urb->dev = mimio->udev; | ||
545 | res = usb_submit_urb(mimio->in.urb, GFP_KERNEL); | ||
546 | if (res) { | ||
547 | dev_err(&mimio->idev->dev, "usb_submit_urb failure (%d)\n", | ||
548 | res); | ||
549 | mimio_dealloc(mimio); | ||
550 | return -EIO; | ||
551 | } | ||
552 | |||
553 | /* | ||
554 | * Attempt to greet the mimio after giving | ||
555 | * it some post-init settling time. | ||
556 | * | ||
557 | * note: sometimes this sleep interval isn't | ||
558 | * long enough to permit the device to re-init | ||
559 | * after a hot-swap; maybe need to bump it up. | ||
560 | * | ||
561 | * As it is, this probably breaks module unloading support! | ||
562 | */ | ||
563 | msleep(1024); | ||
564 | |||
565 | res = mimio_greet(mimio); | ||
566 | if (res == 0) { | ||
567 | dev_dbg(&mimio->idev->dev, "Mimio greeted OK.\n"); | ||
568 | mimio->greeted = 1; | ||
569 | mimio->rxhandler = mimio_rx_handler; | ||
570 | } else { | ||
571 | dev_dbg(&mimio->idev->dev, "Mimio greet Failure (%d)\n", res); | ||
572 | } | ||
573 | |||
574 | return 0; | ||
575 | } | ||
576 | |||
577 | static int handle_mimio_rx_penupdown(struct mimio *mimio, | ||
578 | int down, | ||
579 | const char *const instr[], | ||
580 | const int instr_ofst[]) | ||
581 | { | ||
582 | int penid, x; | ||
583 | if (mimio->pktbuf.q - mimio->pktbuf.p < (down ? 4 : 3)) | ||
584 | return 1; /* partial pkt */ | ||
585 | |||
586 | if (down) { | ||
587 | x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ | ||
588 | *(mimio->pktbuf.p + 2); | ||
589 | if (x != *(mimio->pktbuf.p + 3)) { | ||
590 | dev_dbg(&mimio->idev->dev, "EV_PEN%s: bad xsum.\n", | ||
591 | down ? "DOWN":"UP"); | ||
592 | /* skip this event data */ | ||
593 | mimio->pktbuf.p += 4; | ||
594 | /* decode any remaining events */ | ||
595 | return 0; | ||
596 | } | ||
597 | penid = mimio->pktbuf.instr = *(mimio->pktbuf.p + 2); | ||
598 | if (penid > MIMIO_PEN_MAX) { | ||
599 | dev_dbg(&mimio->idev->dev, | ||
600 | "Unmapped penID (not in [0, %d]): %d\n", | ||
601 | MIMIO_PEN_MAX, (int)mimio->pktbuf.instr); | ||
602 | penid = mimio->pktbuf.instr = 0; | ||
603 | } | ||
604 | mimio->last_pen_down = penid; | ||
605 | } else { | ||
606 | penid = mimio->last_pen_down; | ||
607 | } | ||
608 | dev_dbg(&mimio->idev->dev, "%s (id %d, code %d) %s.\n", instr[penid], | ||
609 | instr_ofst[penid], penid, down ? "down" : "up"); | ||
610 | |||
611 | if (instr_ofst[penid] >= 0) { | ||
612 | int code = BTN_TOOL_PEN + instr_ofst[penid]; | ||
613 | int value = down ? DOWNVALUE : UPVALUE; | ||
614 | if (code > KEY_MAX) | ||
615 | dev_dbg(&mimio->idev->dev, "input_event will ignore " | ||
616 | "-- code (%d) > KEY_MAX\n", code); | ||
617 | if (!test_bit(code, mimio->idev->keybit)) | ||
618 | dev_dbg(&mimio->idev->dev, "input_event will ignore " | ||
619 | "-- bit for code (%d) not enabled\n", code); | ||
620 | if (!!test_bit(code, mimio->idev->key) == value) | ||
621 | dev_dbg(&mimio->idev->dev, "input_event will ignore " | ||
622 | "-- bit for code (%d) already set to %d\n", | ||
623 | code, value); | ||
624 | if (value != DOWNVALUE) { | ||
625 | /* input_regs(mimio->idev, regs); */ | ||
626 | input_report_key(mimio->idev, code, value); | ||
627 | input_sync(mimio->idev); | ||
628 | } else { | ||
629 | /* wait until we get some coordinates */ | ||
630 | } | ||
631 | } else { | ||
632 | dev_dbg(&mimio->idev->dev, "penID offset[%d] == %d is < 0 " | ||
633 | "- not sending\n", penid, instr_ofst[penid]); | ||
634 | } | ||
635 | mimio->pktbuf.p += down ? 4 : 3; /* 3 for up, 4 for down */ | ||
636 | return 0; | ||
637 | } | ||
638 | |||
639 | /* | ||
640 | * Stay tuned for partial-packet excitement. | ||
641 | * | ||
642 | * This routine buffers data packets received from the mimio device | ||
643 | * in the mimio's data space. This buffering is necessary because | ||
644 | * the mimio's in endpoint can serve us partial packets of data, and | ||
645 | * we want the driver to support the servicing of multiple mimios. | ||
646 | * Empirical evidence gathered so far suggests that the method of | ||
647 | * buffering packet data in the mimio's data space works. Previous | ||
648 | * versions of this driver did not buffer packet data in each mimio's | ||
649 | * data-space, and were therefore not able to service multiple mimios. | ||
650 | * Note that since the caller of this routine is running in interrupt | ||
651 | * context, care needs to be taken to ensure that this routine does not | ||
652 | * become bloated, and it may be that another spinlock is needed in each | ||
653 | * mimio to guard the buffered packet data properly. | ||
654 | */ | ||
655 | static void mimio_rx_handler(struct mimio *mimio, | ||
656 | unsigned char *data, | ||
657 | unsigned int nbytes) | ||
658 | { | ||
659 | struct device *dev = &mimio->idev->dev; | ||
660 | unsigned int x; | ||
661 | unsigned int y; | ||
662 | static const char * const instr[] = { | ||
663 | "?0", | ||
664 | "black pen", "blue pen", "green pen", "red pen", | ||
665 | "brown pen", "orange pen", "purple pen", "yellow pen", | ||
666 | "big eraser", "lil eraser", | ||
667 | "?11", "?12", "?13", "?14", "?15", "?16", | ||
668 | "mimio interactive", "interactive button1", | ||
669 | "interactive button2" | ||
670 | }; | ||
671 | |||
672 | /* Mimio Interactive gives: | ||
673 | * down: [0x22 0x01 0x11 0x32 0x24] | ||
674 | * b1 : [0x22 0x01 0x12 0x31 0x24] | ||
675 | * b2 : [0x22 0x01 0x13 0x30 0x24] | ||
676 | */ | ||
677 | static const int instr_ofst[] = { | ||
678 | -1, | ||
679 | 0, 1, 2, 3, | ||
680 | 9, 9, 9, 9, | ||
681 | 4, 5, | ||
682 | -1, -1, -1, -1, -1, -1, | ||
683 | 6, 7, 8, | ||
684 | }; | ||
685 | |||
686 | memcpy(mimio->pktbuf.q, data, nbytes); | ||
687 | mimio->pktbuf.q += nbytes; | ||
688 | |||
689 | while (mimio->pktbuf.p < mimio->pktbuf.q) { | ||
690 | int t = *mimio->pktbuf.p; | ||
691 | switch (t) { | ||
692 | case MIMIO_EV_PENUP: | ||
693 | case MIMIO_EV_PENDOWN: | ||
694 | if (handle_mimio_rx_penupdown(mimio, | ||
695 | t == MIMIO_EV_PENDOWN, | ||
696 | instr, instr_ofst)) | ||
697 | return; /* partial packet */ | ||
698 | break; | ||
699 | |||
700 | case MIMIO_EV_PENDATA: | ||
701 | if (mimio->pktbuf.q - mimio->pktbuf.p < 6) | ||
702 | /* partial pkt */ | ||
703 | return; | ||
704 | x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ | ||
705 | *(mimio->pktbuf.p + 2) ^ | ||
706 | *(mimio->pktbuf.p + 3) ^ | ||
707 | *(mimio->pktbuf.p + 4); | ||
708 | if (x != *(mimio->pktbuf.p + 5)) { | ||
709 | dev_dbg(dev, "EV_PENDATA: bad xsum.\n"); | ||
710 | mimio->pktbuf.p += 6; /* skip this event data */ | ||
711 | break; /* decode any remaining events */ | ||
712 | } | ||
713 | x = *(mimio->pktbuf.p + 1); | ||
714 | x <<= 8; | ||
715 | x |= *(mimio->pktbuf.p + 2); | ||
716 | y = *(mimio->pktbuf.p + 3); | ||
717 | y <<= 8; | ||
718 | y |= *(mimio->pktbuf.p + 4); | ||
719 | dev_dbg(dev, "coord: (%d, %d)\n", x, y); | ||
720 | if (instr_ofst[mimio->pktbuf.instr] >= 0) { | ||
721 | int code = BTN_TOOL_PEN + | ||
722 | instr_ofst[mimio->last_pen_down]; | ||
723 | #if 0 | ||
724 | /* Utter hack to ensure we get forwarded _AND_ | ||
725 | * so we can identify when a complete signal is | ||
726 | * received */ | ||
727 | mimio->idev->abs[ABS_Y] = -1; | ||
728 | mimio->idev->abs[ABS_X] = -1; | ||
729 | #endif | ||
730 | /* input_regs(mimio->idev, regs); */ | ||
731 | input_report_abs(mimio->idev, ABS_X, x); | ||
732 | input_report_abs(mimio->idev, ABS_Y, y); | ||
733 | /* fake a penup */ | ||
734 | change_bit(code, mimio->idev->key); | ||
735 | input_report_key(mimio->idev, | ||
736 | code, | ||
737 | DOWNVALUE); | ||
738 | /* always sync here */ | ||
739 | mimio->idev->sync = 0; | ||
740 | input_sync(mimio->idev); | ||
741 | } | ||
742 | mimio->pktbuf.p += 6; | ||
743 | break; | ||
744 | case MIMIO_EV_MEMRESET: | ||
745 | if (mimio->pktbuf.q - mimio->pktbuf.p < 7) | ||
746 | /* partial pkt */ | ||
747 | return; | ||
748 | dev_dbg(dev, "mem-reset.\n"); | ||
749 | /* input_regs(mimio->idev, regs); */ | ||
750 | input_event(mimio->idev, EV_KEY, BTN_0, 1); | ||
751 | input_event(mimio->idev, EV_KEY, BTN_0, 0); | ||
752 | input_sync(mimio->idev); | ||
753 | mimio->pktbuf.p += 7; | ||
754 | break; | ||
755 | case MIMIO_EV_ACC: | ||
756 | if (mimio->pktbuf.q - mimio->pktbuf.p < 4) | ||
757 | /* partial pkt */ | ||
758 | return; | ||
759 | x = *mimio->pktbuf.p ^ *(mimio->pktbuf.p + 1) ^ | ||
760 | *(mimio->pktbuf.p + 2); | ||
761 | if (x != *(mimio->pktbuf.p + 3)) { | ||
762 | dev_dbg(dev, "EV_ACC: bad xsum.\n"); | ||
763 | mimio->pktbuf.p += 4; /* skip this event data */ | ||
764 | break; /* decode any remaining events */ | ||
765 | } | ||
766 | switch (*(mimio->pktbuf.p + 2)) { | ||
767 | case ACC_NEWPAGE: | ||
768 | dev_dbg(&mimio->idev->dev, "new-page.\n"); | ||
769 | /* input_regs(mimio->idev, regs); */ | ||
770 | input_event(mimio->idev, EV_KEY, BTN_1, 1); | ||
771 | input_event(mimio->idev, EV_KEY, BTN_1, 0); | ||
772 | input_sync(mimio->idev); | ||
773 | break; | ||
774 | case ACC_TAGPAGE: | ||
775 | dev_dbg(&mimio->idev->dev, "tag-page.\n"); | ||
776 | /* input_regs(mimio->idev, regs); */ | ||
777 | input_event(mimio->idev, EV_KEY, BTN_2, 1); | ||
778 | input_event(mimio->idev, EV_KEY, BTN_2, 0); | ||
779 | input_sync(mimio->idev); | ||
780 | break; | ||
781 | case ACC_PRINTPAGE: | ||
782 | dev_dbg(&mimio->idev->dev, "print-page.\n"); | ||
783 | /* input_regs(mimio->idev, regs);*/ | ||
784 | input_event(mimio->idev, EV_KEY, BTN_3, 1); | ||
785 | input_event(mimio->idev, EV_KEY, BTN_3, 0); | ||
786 | input_sync(mimio->idev); | ||
787 | break; | ||
788 | case ACC_MAXIMIZE: | ||
789 | dev_dbg(&mimio->idev->dev, | ||
790 | "maximize-window.\n"); | ||
791 | /* input_regs(mimio->idev, regs); */ | ||
792 | input_event(mimio->idev, EV_KEY, BTN_4, 1); | ||
793 | input_event(mimio->idev, EV_KEY, BTN_4, 0); | ||
794 | input_sync(mimio->idev); | ||
795 | break; | ||
796 | case ACC_FINDCTLPNL: | ||
797 | dev_dbg(&mimio->idev->dev, "find-ctl-panel.\n"); | ||
798 | /* input_regs(mimio->idev, regs); */ | ||
799 | input_event(mimio->idev, EV_KEY, BTN_5, 1); | ||
800 | input_event(mimio->idev, EV_KEY, BTN_5, 0); | ||
801 | input_sync(mimio->idev); | ||
802 | break; | ||
803 | case ACC_DONE: | ||
804 | dev_dbg(&mimio->idev->dev, "acc-done.\n"); | ||
805 | /* no event is dispatched to the input | ||
806 | * subsystem for this device event. | ||
807 | */ | ||
808 | break; | ||
809 | default: | ||
810 | dev_dbg(dev, "unknown acc event.\n"); | ||
811 | break; | ||
812 | } | ||
813 | mimio->pktbuf.p += 4; | ||
814 | break; | ||
815 | default: | ||
816 | mimio->pktbuf.p++; | ||
817 | break; | ||
818 | } | ||
819 | } | ||
820 | |||
821 | /* | ||
822 | * No partial event was received, so reset mimio's pktbuf ptrs. | ||
823 | */ | ||
824 | mimio->pktbuf.p = mimio->pktbuf.q = mimio->pktbuf.buf; | ||
825 | } | ||
826 | |||
827 | static int mimio_tx(struct mimio *mimio, const char *buf, int nbytes) | ||
828 | { | ||
829 | int rslt; | ||
830 | int timeout; | ||
831 | unsigned long flags; | ||
832 | DECLARE_WAITQUEUE(wait, current); | ||
833 | |||
834 | if (!(isvalidtxsize(nbytes))) { | ||
835 | dev_err(&mimio->idev->dev, "invalid arg: nbytes: %d.\n", | ||
836 | nbytes); | ||
837 | return -EINVAL; | ||
838 | } | ||
839 | |||
840 | /* | ||
841 | * Init the out urb and copy the data to send. | ||
842 | */ | ||
843 | mimio->out.urb->dev = mimio->udev; | ||
844 | mimio->out.urb->transfer_buffer_length = nbytes; | ||
845 | memcpy(mimio->out.urb->transfer_buffer, buf, nbytes); | ||
846 | |||
847 | /* | ||
848 | * Send the data. | ||
849 | */ | ||
850 | spin_lock_irqsave(&mimio->txlock, flags); | ||
851 | mimio->txflags = MIMIO_TXWAIT; | ||
852 | rslt = usb_submit_urb(mimio->out.urb, GFP_ATOMIC); | ||
853 | spin_unlock_irqrestore(&mimio->txlock, flags); | ||
854 | dev_dbg(&mimio->idev->dev, "rslt: %d.\n", rslt); | ||
855 | |||
856 | if (rslt) { | ||
857 | dev_err(&mimio->idev->dev, "usb_submit_urb failure: %d.\n", | ||
858 | rslt); | ||
859 | return rslt; | ||
860 | } | ||
861 | |||
862 | /* | ||
863 | * Wait for completion to be signalled (the mimio_irq_out | ||
864 | * completion routine will or MIMIO_TXDONE in with txflags). | ||
865 | */ | ||
866 | timeout = HZ; | ||
867 | set_current_state(TASK_INTERRUPTIBLE); | ||
868 | add_wait_queue(&mimio->waitq, &wait); | ||
869 | |||
870 | while (timeout && ((mimio->txflags & MIMIO_TXDONE) == 0)) { | ||
871 | timeout = schedule_timeout(timeout); | ||
872 | rmb(); | ||
873 | } | ||
874 | |||
875 | if ((mimio->txflags & MIMIO_TXDONE) == 0) | ||
876 | dev_dbg(&mimio->idev->dev, "tx timed out.\n"); | ||
877 | |||
878 | /* | ||
879 | * Now that completion has been signalled, | ||
880 | * unlink the urb so that it can be recycled. | ||
881 | */ | ||
882 | set_current_state(TASK_RUNNING); | ||
883 | remove_wait_queue(&mimio->waitq, &wait); | ||
884 | usb_unlink_urb(mimio->out.urb); | ||
885 | |||
886 | return rslt; | ||
887 | } | ||
888 | |||
889 | static int __init mimio_init(void) | ||
890 | { | ||
891 | int rslt; | ||
892 | |||
893 | rslt = usb_register(&mimio_driver); | ||
894 | if (rslt != 0) { | ||
895 | err("%s: usb_register failure: %d", __func__, rslt); | ||
896 | return rslt; | ||
897 | } | ||
898 | |||
899 | printk(KERN_INFO KBUILD_MODNAME ":" | ||
900 | DRIVER_DESC " " DRIVER_VERSION "\n"); | ||
901 | return rslt; | ||
902 | } | ||
903 | |||
904 | static void __exit mimio_exit(void) | ||
905 | { | ||
906 | usb_deregister(&mimio_driver); | ||
907 | } | ||
908 | |||
909 | module_init(mimio_init); | ||
910 | module_exit(mimio_exit); | ||
911 | |||
912 | MODULE_AUTHOR(DRIVER_AUTHOR); | ||
913 | MODULE_DESCRIPTION(DRIVER_DESC); | ||
914 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/otus/80211core/cagg.c b/drivers/staging/otus/80211core/cagg.c index dbd0a5f0fcdf..f9514c06c14c 100644 --- a/drivers/staging/otus/80211core/cagg.c +++ b/drivers/staging/otus/80211core/cagg.c | |||
@@ -1832,14 +1832,12 @@ u16_t zfAggRxClear(zdev_t* dev, u32_t time) | |||
1832 | 1832 | ||
1833 | struct agg_tid_rx* zfAggRxEnabled(zdev_t* dev, zbuf_t* buf) | 1833 | struct agg_tid_rx* zfAggRxEnabled(zdev_t* dev, zbuf_t* buf) |
1834 | { | 1834 | { |
1835 | u16_t dst0, src[3], ac, aid, fragOff; | 1835 | u16_t dst0, src[3], aid; |
1836 | u8_t up; | ||
1837 | u16_t offset = 0; | 1836 | u16_t offset = 0; |
1838 | u16_t seq_no; | 1837 | u16_t seq_no; |
1839 | u16_t frameType; | 1838 | u16_t frameType; |
1840 | u16_t frameCtrl; | 1839 | u16_t frameCtrl; |
1841 | u16_t frameSubtype; | 1840 | u16_t frameSubtype; |
1842 | u32_t tcp_seq; | ||
1843 | //struct aggSta *agg_sta; | 1841 | //struct aggSta *agg_sta; |
1844 | #if ZM_AGG_FPGA_REORDERING | 1842 | #if ZM_AGG_FPGA_REORDERING |
1845 | struct agg_tid_rx *tid_rx; | 1843 | struct agg_tid_rx *tid_rx; |
@@ -1864,13 +1862,17 @@ struct agg_tid_rx* zfAggRxEnabled(zdev_t* dev, zbuf_t* buf) | |||
1864 | return NULL; | 1862 | return NULL; |
1865 | } | 1863 | } |
1866 | #ifdef ZM_ENABLE_PERFORMANCE_EVALUATION | 1864 | #ifdef ZM_ENABLE_PERFORMANCE_EVALUATION |
1867 | tcp_seq = zmw_rx_buf_readb(dev, buf, 22+36) << 24; | 1865 | { |
1868 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+37) << 16; | 1866 | u32_t tcp_seq; |
1869 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+38) << 8; | 1867 | |
1870 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+39); | 1868 | tcp_seq = zmw_rx_buf_readb(dev, buf, 22+36) << 24; |
1869 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+37) << 16; | ||
1870 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+38) << 8; | ||
1871 | tcp_seq += zmw_rx_buf_readb(dev, buf, 22+39); | ||
1872 | ZM_SEQ_DEBUG("In %5d, %12u\n", seq_no, tcp_seq); | ||
1873 | } | ||
1871 | #endif | 1874 | #endif |
1872 | 1875 | ||
1873 | ZM_SEQ_DEBUG("In %5d, %12u\n", seq_no, tcp_seq); | ||
1874 | dst0 = zmw_rx_buf_readh(dev, buf, offset+4); | 1876 | dst0 = zmw_rx_buf_readh(dev, buf, offset+4); |
1875 | 1877 | ||
1876 | src[0] = zmw_rx_buf_readh(dev, buf, offset+10); | 1878 | src[0] = zmw_rx_buf_readh(dev, buf, offset+10); |
diff --git a/drivers/staging/otus/80211core/ccmd.c b/drivers/staging/otus/80211core/ccmd.c index 8da28eee7fb0..3e3d9b500f65 100644 --- a/drivers/staging/otus/80211core/ccmd.c +++ b/drivers/staging/otus/80211core/ccmd.c | |||
@@ -1659,7 +1659,7 @@ void zfiWlanSetPacketTypePromiscuous(zdev_t *dev, u32_t setValue) | |||
1659 | if (setValue) { | 1659 | if (setValue) { |
1660 | /* write register for sniffer mode */ | 1660 | /* write register for sniffer mode */ |
1661 | zfHpSetSnifferMode(dev, 1); | 1661 | zfHpSetSnifferMode(dev, 1); |
1662 | zm_msg0_mm(ZM_LV_1, "enalbe sniffer mode"); | 1662 | zm_msg0_mm(ZM_LV_1, "enable sniffer mode"); |
1663 | } else { | 1663 | } else { |
1664 | zfHpSetSnifferMode(dev, 0); | 1664 | zfHpSetSnifferMode(dev, 0); |
1665 | zm_msg0_mm(ZM_LV_0, "disalbe sniffer mode"); | 1665 | zm_msg0_mm(ZM_LV_0, "disalbe sniffer mode"); |
diff --git a/drivers/staging/otus/80211core/cfunc.c b/drivers/staging/otus/80211core/cfunc.c index d7c49d7523df..e0a9f383c755 100644 --- a/drivers/staging/otus/80211core/cfunc.c +++ b/drivers/staging/otus/80211core/cfunc.c | |||
@@ -1194,8 +1194,6 @@ u16_t zfFindMinimumUtilizationChannelIndex(zdev_t* dev, u16_t* array, u16_t coun | |||
1194 | u8_t i; | 1194 | u8_t i; |
1195 | u16_t tempMinIndex, tempMinValue; | 1195 | u16_t tempMinIndex, tempMinValue; |
1196 | 1196 | ||
1197 | zmw_get_wlan_dev(dev); | ||
1198 | |||
1199 | i = 1; | 1197 | i = 1; |
1200 | tempMinIndex = 0; | 1198 | tempMinIndex = 0; |
1201 | tempMinValue = array[tempMinIndex]; | 1199 | tempMinValue = array[tempMinIndex]; |
diff --git a/drivers/staging/otus/80211core/cmm.c b/drivers/staging/otus/80211core/cmm.c index a6c1b41ba848..484e753df358 100644 --- a/drivers/staging/otus/80211core/cmm.c +++ b/drivers/staging/otus/80211core/cmm.c | |||
@@ -346,8 +346,6 @@ u16_t zfFindSuperGElement(zdev_t* dev, zbuf_t* buf, u8_t type) | |||
346 | u8_t super_feature; | 346 | u8_t super_feature; |
347 | u8_t ouiSuperG[6] = {0x00,0x03,0x7f,0x01, 0x01, 0x00}; | 347 | u8_t ouiSuperG[6] = {0x00,0x03,0x7f,0x01, 0x01, 0x00}; |
348 | 348 | ||
349 | zmw_get_wlan_dev(dev); | ||
350 | |||
351 | /* Get offset of first element */ | 349 | /* Get offset of first element */ |
352 | subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); | 350 | subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); |
353 | if ((offset = zgElementOffsetTable[subType]) == 0xff) | 351 | if ((offset = zgElementOffsetTable[subType]) == 0xff) |
@@ -411,8 +409,6 @@ u16_t zfFindXRElement(zdev_t* dev, zbuf_t* buf, u8_t type) | |||
411 | u8_t id; | 409 | u8_t id; |
412 | u8_t ouixr[6] = {0x00,0x03,0x7f,0x03, 0x01, 0x00}; | 410 | u8_t ouixr[6] = {0x00,0x03,0x7f,0x03, 0x01, 0x00}; |
413 | 411 | ||
414 | zmw_get_wlan_dev(dev); | ||
415 | |||
416 | /* Get offset of first element */ | 412 | /* Get offset of first element */ |
417 | subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); | 413 | subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); |
418 | if ((offset = zgElementOffsetTable[subType]) == 0xff) | 414 | if ((offset = zgElementOffsetTable[subType]) == 0xff) |
diff --git a/drivers/staging/otus/80211core/cmmsta.c b/drivers/staging/otus/80211core/cmmsta.c index a11d559167b1..c3fd47529c14 100644 --- a/drivers/staging/otus/80211core/cmmsta.c +++ b/drivers/staging/otus/80211core/cmmsta.c | |||
@@ -2808,7 +2808,7 @@ void zfStaProcessProbeReq(zdev_t* dev, zbuf_t* buf, u16_t* src) | |||
2808 | zmw_get_wlan_dev(dev); | 2808 | zmw_get_wlan_dev(dev); |
2809 | 2809 | ||
2810 | /* check mode : AP/IBSS */ | 2810 | /* check mode : AP/IBSS */ |
2811 | if ((wd->wlanMode != ZM_MODE_AP) || (wd->wlanMode != ZM_MODE_IBSS)) | 2811 | if ((wd->wlanMode != ZM_MODE_AP) && (wd->wlanMode != ZM_MODE_IBSS)) |
2812 | { | 2812 | { |
2813 | zm_msg0_mm(ZM_LV_3, "Ignore probe req"); | 2813 | zm_msg0_mm(ZM_LV_3, "Ignore probe req"); |
2814 | return; | 2814 | return; |
@@ -4848,8 +4848,6 @@ u16_t zfStaAddIePowerCap(zdev_t* dev, zbuf_t* buf, u16_t offset) | |||
4848 | u8_t MaxTxPower; | 4848 | u8_t MaxTxPower; |
4849 | u8_t MinTxPower; | 4849 | u8_t MinTxPower; |
4850 | 4850 | ||
4851 | zmw_get_wlan_dev(dev); | ||
4852 | |||
4853 | /* Element ID */ | 4851 | /* Element ID */ |
4854 | zmw_tx_buf_writeb(dev, buf, offset++, ZM_WLAN_EID_POWER_CAPABILITY); | 4852 | zmw_tx_buf_writeb(dev, buf, offset++, ZM_WLAN_EID_POWER_CAPABILITY); |
4855 | 4853 | ||
@@ -5276,7 +5274,6 @@ u16_t zfStaRxValidateFrame(zdev_t* dev, zbuf_t* buf) | |||
5276 | u8_t da0; | 5274 | u8_t da0; |
5277 | //u16_t sa[3]; | 5275 | //u16_t sa[3]; |
5278 | u16_t ret; | 5276 | u16_t ret; |
5279 | u16_t i; | ||
5280 | //u8_t sa0; | 5277 | //u8_t sa0; |
5281 | 5278 | ||
5282 | zmw_get_wlan_dev(dev); | 5279 | zmw_get_wlan_dev(dev); |
@@ -5738,8 +5735,6 @@ u16_t zfComputeBssInfoWeightValue(zdev_t *dev, u8_t isBMode, u8_t isHT, u8_t isH | |||
5738 | u8_t weightOfN40BelowThr = 16; | 5735 | u8_t weightOfN40BelowThr = 16; |
5739 | u8_t weightOfN40UpThr = 32; | 5736 | u8_t weightOfN40UpThr = 32; |
5740 | 5737 | ||
5741 | zmw_get_wlan_dev(dev); | ||
5742 | |||
5743 | if( isBMode == 0 ) | 5738 | if( isBMode == 0 ) |
5744 | return (signalStrength + weightOfB); // pure b mode , do not add the weight value for this AP ! | 5739 | return (signalStrength + weightOfB); // pure b mode , do not add the weight value for this AP ! |
5745 | else | 5740 | else |
diff --git a/drivers/staging/otus/80211core/cpsmgr.c b/drivers/staging/otus/80211core/cpsmgr.c index cf73caca8e52..98e1f0cc0727 100644 --- a/drivers/staging/otus/80211core/cpsmgr.c +++ b/drivers/staging/otus/80211core/cpsmgr.c | |||
@@ -381,8 +381,6 @@ static void zfPowerSavingMgrSleepIfIdle(zdev_t *dev) | |||
381 | 381 | ||
382 | static void zfPowerSavingMgrDisconnectMain(zdev_t* dev) | 382 | static void zfPowerSavingMgrDisconnectMain(zdev_t* dev) |
383 | { | 383 | { |
384 | zmw_get_wlan_dev(dev); | ||
385 | |||
386 | #ifdef ZM_ENABLE_DISCONNECT_PS | 384 | #ifdef ZM_ENABLE_DISCONNECT_PS |
387 | switch(wd->sta.psMgr.state) | 385 | switch(wd->sta.psMgr.state) |
388 | { | 386 | { |
diff --git a/drivers/staging/otus/80211core/cscanmgr.c b/drivers/staging/otus/80211core/cscanmgr.c index b32835c87590..be7d8ebe82ba 100644 --- a/drivers/staging/otus/80211core/cscanmgr.c +++ b/drivers/staging/otus/80211core/cscanmgr.c | |||
@@ -289,8 +289,6 @@ static void zfScanMgrEventSetFreqCompleteCb(zdev_t* dev) | |||
289 | 289 | ||
290 | static void zfScanMgrEventScanCompleteCb(zdev_t* dev) | 290 | static void zfScanMgrEventScanCompleteCb(zdev_t* dev) |
291 | { | 291 | { |
292 | zmw_get_wlan_dev(dev); | ||
293 | |||
294 | if ((zfStaIsConnected(dev)) && (!zfPowerSavingMgrIsSleeping(dev))) | 292 | if ((zfStaIsConnected(dev)) && (!zfPowerSavingMgrIsSleeping(dev))) |
295 | { | 293 | { |
296 | zfSendNullData(dev, 0); | 294 | zfSendNullData(dev, 0); |
diff --git a/drivers/staging/otus/80211core/ctkip.c b/drivers/staging/otus/80211core/ctkip.c index be42f7aaa37d..ca0740227be4 100644 --- a/drivers/staging/otus/80211core/ctkip.c +++ b/drivers/staging/otus/80211core/ctkip.c | |||
@@ -255,7 +255,8 @@ void zfTkipInit(u8_t* key, u8_t* ta, struct zsTkipSeed* pSeed, u8_t* initIv) | |||
255 | zfMemoryCopy(pSeed->ta, ta, 6); | 255 | zfMemoryCopy(pSeed->ta, ta, 6); |
256 | zfMemoryCopy(pSeed->tk, key, 16); | 256 | zfMemoryCopy(pSeed->tk, key, 16); |
257 | 257 | ||
258 | iv16 = *initIv++; | 258 | iv16 = *initIv; |
259 | initIv++; | ||
259 | iv16 += *initIv<<8; | 260 | iv16 += *initIv<<8; |
260 | initIv++; | 261 | initIv++; |
261 | 262 | ||
@@ -264,7 +265,7 @@ void zfTkipInit(u8_t* key, u8_t* ta, struct zsTkipSeed* pSeed, u8_t* initIv) | |||
264 | for(i=0; i<4; i++) // initiv is little endian | 265 | for(i=0; i<4; i++) // initiv is little endian |
265 | { | 266 | { |
266 | iv32 += *initIv<<(i*8); | 267 | iv32 += *initIv<<(i*8); |
267 | *initIv++; | 268 | initIv++; |
268 | } | 269 | } |
269 | 270 | ||
270 | pSeed->iv32 = iv32+1; // Force Recalculating on Tkip Phase1 | 271 | pSeed->iv32 = iv32+1; // Force Recalculating on Tkip Phase1 |
diff --git a/drivers/staging/otus/80211core/ctxrx.c b/drivers/staging/otus/80211core/ctxrx.c index ac54d5a636b0..4e7f4bd86f47 100644 --- a/drivers/staging/otus/80211core/ctxrx.c +++ b/drivers/staging/otus/80211core/ctxrx.c | |||
@@ -536,8 +536,7 @@ void zfProtRspSim(zdev_t* dev, zbuf_t* buf) | |||
536 | zm_msg2_rx(ZM_LV_2, "ip1=", dip[1]); | 536 | zm_msg2_rx(ZM_LV_2, "ip1=", dip[1]); |
537 | 537 | ||
538 | //ARP request to 192.168.1.15 | 538 | //ARP request to 192.168.1.15 |
539 | if ((arpOp == 0x0100) && (dip[0] == 0xa8c0) && (dip[1] == 0x0f01)); | 539 | if ((arpOp == 0x0100) && (dip[0] == 0xa8c0) && (dip[1] == 0x0f01)) { |
540 | { | ||
541 | zm_msg0_rx(ZM_LV_2, "ARP"); | 540 | zm_msg0_rx(ZM_LV_2, "ARP"); |
542 | /* ARP response */ | 541 | /* ARP response */ |
543 | zmw_rx_buf_writeh(dev, buf, 20, 0x0200); | 542 | zmw_rx_buf_writeh(dev, buf, 20, 0x0200); |
@@ -883,7 +882,6 @@ zlError: | |||
883 | /************************************************************************/ | 882 | /************************************************************************/ |
884 | u16_t zfTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port, u16_t bufType, u16_t flag) | 883 | u16_t zfTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port, u16_t bufType, u16_t flag) |
885 | { | 884 | { |
886 | u16_t err; | ||
887 | //u16_t addrTblSize; | 885 | //u16_t addrTblSize; |
888 | //struct zsAddrTbl addrTbl; | 886 | //struct zsAddrTbl addrTbl; |
889 | u16_t removeLen; | 887 | u16_t removeLen; |
@@ -905,7 +903,6 @@ u16_t zfTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port, u16_t bufType, u16_t fla | |||
905 | u8_t qosType, keyIdx = 0; | 903 | u8_t qosType, keyIdx = 0; |
906 | u16_t fragOff; | 904 | u16_t fragOff; |
907 | u16_t newFlag; | 905 | u16_t newFlag; |
908 | struct zsMicVar* pMicKey; | ||
909 | u8_t tkipFrameOffset = 0; | 906 | u8_t tkipFrameOffset = 0; |
910 | 907 | ||
911 | zmw_get_wlan_dev(dev); | 908 | zmw_get_wlan_dev(dev); |
@@ -1693,8 +1690,6 @@ void zfShowTxEAPOL(zdev_t* dev, zbuf_t* buf, u16_t offset) | |||
1693 | u16_t packetLen, keyInfo, keyLen, keyDataLen, length, Op_Code; | 1690 | u16_t packetLen, keyInfo, keyLen, keyDataLen, length, Op_Code; |
1694 | u32_t replayCounterH, replayCounterL, vendorId, VendorType; | 1691 | u32_t replayCounterH, replayCounterL, vendorId, VendorType; |
1695 | 1692 | ||
1696 | zmw_get_wlan_dev(dev); | ||
1697 | |||
1698 | zm_debug_msg1("EAPOL Packet size = ", zfwBufGetSize(dev, buf)); | 1693 | zm_debug_msg1("EAPOL Packet size = ", zfwBufGetSize(dev, buf)); |
1699 | 1694 | ||
1700 | /* EAPOL packet type */ | 1695 | /* EAPOL packet type */ |
@@ -2437,7 +2432,6 @@ void zfiRecv80211(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo) | |||
2437 | u16_t IvOffset; | 2432 | u16_t IvOffset; |
2438 | u8_t keyLen = 5; | 2433 | u8_t keyLen = 5; |
2439 | u8_t iv[3]; | 2434 | u8_t iv[3]; |
2440 | u8_t *wepKey; | ||
2441 | u8_t keyIdx; | 2435 | u8_t keyIdx; |
2442 | 2436 | ||
2443 | IvOffset = offset + ZM_SIZE_OF_WLAN_DATA_HEADER; | 2437 | IvOffset = offset + ZM_SIZE_OF_WLAN_DATA_HEADER; |
diff --git a/drivers/staging/otus/80211core/ledmgr.c b/drivers/staging/otus/80211core/ledmgr.c index 1e104a928ca4..eafce0b1204f 100644 --- a/drivers/staging/otus/80211core/ledmgr.c +++ b/drivers/staging/otus/80211core/ledmgr.c | |||
@@ -187,7 +187,6 @@ void zfLedCtrlType2_scan(zdev_t* dev); | |||
187 | 187 | ||
188 | void zfLedCtrlType2(zdev_t* dev) | 188 | void zfLedCtrlType2(zdev_t* dev) |
189 | { | 189 | { |
190 | u32_t ton, toff, tmp, period; | ||
191 | u16_t OperateLED; | 190 | u16_t OperateLED; |
192 | zmw_get_wlan_dev(dev); | 191 | zmw_get_wlan_dev(dev); |
193 | 192 | ||
diff --git a/drivers/staging/otus/80211core/pub_zfi.h b/drivers/staging/otus/80211core/pub_zfi.h index b7b7f455f357..5202e5a645d5 100644 --- a/drivers/staging/otus/80211core/pub_zfi.h +++ b/drivers/staging/otus/80211core/pub_zfi.h | |||
@@ -814,7 +814,6 @@ extern void zfiRxPerformanceReg(zdev_t* dev, u32_t reg, u32_t rsp); | |||
814 | #define ZM_PERFORMANCE_RX_AMSDU(dev, buf, len) | 814 | #define ZM_PERFORMANCE_RX_AMSDU(dev, buf, len) |
815 | #define ZM_PERFORMANCE_RX_FLUSH(dev) | 815 | #define ZM_PERFORMANCE_RX_FLUSH(dev) |
816 | #define ZM_PERFORMANCE_RX_CLEAR(dev) | 816 | #define ZM_PERFORMANCE_RX_CLEAR(dev) |
817 | #define ZM_SEQ_DEBUG | ||
818 | #define ZM_PERFORMANCE_RX_REORDER(dev) | 817 | #define ZM_PERFORMANCE_RX_REORDER(dev) |
819 | #endif | 818 | #endif |
820 | /***** End of section 3 *****/ | 819 | /***** End of section 3 *****/ |
diff --git a/drivers/staging/otus/Kconfig b/drivers/staging/otus/Kconfig index f6cc2625e341..e9181340bef1 100644 --- a/drivers/staging/otus/Kconfig +++ b/drivers/staging/otus/Kconfig | |||
@@ -1,6 +1,8 @@ | |||
1 | config OTUS | 1 | config OTUS |
2 | tristate "Atheros OTUS 802.11n USB wireless support" | 2 | tristate "Atheros OTUS 802.11n USB wireless support" |
3 | depends on USB && WLAN && MAC80211 | 3 | depends on USB && WLAN && MAC80211 |
4 | select WIRELESS_EXT | ||
5 | select WEXT_PRIV | ||
4 | default N | 6 | default N |
5 | ---help--- | 7 | ---help--- |
6 | Enable support for Atheros 802.11n USB hardware: | 8 | Enable support for Atheros 802.11n USB hardware: |
diff --git a/drivers/staging/otus/apdbg.c b/drivers/staging/otus/apdbg.c index 0eb93f19958a..b59028e7e33c 100644 --- a/drivers/staging/otus/apdbg.c +++ b/drivers/staging/otus/apdbg.c | |||
@@ -90,8 +90,27 @@ struct zdap_ioctl { | |||
90 | 90 | ||
91 | #endif | 91 | #endif |
92 | 92 | ||
93 | char hex(char); | 93 | static char hex(char v) |
94 | unsigned char asctohex(char *str); | 94 | { |
95 | if (isdigit(v)) | ||
96 | return v - '0'; | ||
97 | else if (isxdigit(v)) | ||
98 | return tolower(v) - 'a' + 10; | ||
99 | else | ||
100 | return 0; | ||
101 | } | ||
102 | |||
103 | static unsigned char asctohex(char *str) | ||
104 | { | ||
105 | unsigned char value; | ||
106 | |||
107 | value = hex(*str) & 0x0f; | ||
108 | value = value << 4; | ||
109 | str++; | ||
110 | value |= hex(*str) & 0x0f; | ||
111 | |||
112 | return value; | ||
113 | } | ||
95 | 114 | ||
96 | char *prgname; | 115 | char *prgname; |
97 | 116 | ||
@@ -109,10 +128,10 @@ int set_ioctl(int sock, struct ifreq *req) | |||
109 | 128 | ||
110 | int read_reg(int sock, struct ifreq *req) | 129 | int read_reg(int sock, struct ifreq *req) |
111 | { | 130 | { |
112 | struct zdap_ioctl *zdreq = 0; | 131 | struct zdap_ioctl *zdreq = NULL; |
113 | 132 | ||
114 | if (!set_ioctl(sock, req)) | 133 | if (!set_ioctl(sock, req)) |
115 | return -1; | 134 | return -1; |
116 | 135 | ||
117 | /* | 136 | /* |
118 | * zdreq = (struct zdap_ioctl *)req->ifr_data; | 137 | * zdreq = (struct zdap_ioctl *)req->ifr_data; |
@@ -125,7 +144,7 @@ int read_reg(int sock, struct ifreq *req) | |||
125 | 144 | ||
126 | int read_mem(int sock, struct ifreq *req) | 145 | int read_mem(int sock, struct ifreq *req) |
127 | { | 146 | { |
128 | struct zdap_ioctl *zdreq = 0; | 147 | struct zdap_ioctl *zdreq = NULL; |
129 | int i; | 148 | int i; |
130 | 149 | ||
131 | if (!set_ioctl(sock, req)) | 150 | if (!set_ioctl(sock, req)) |
@@ -368,7 +387,7 @@ int main(int argc, char **argv) | |||
368 | 387 | ||
369 | zdreq.addr = addr; | 388 | zdreq.addr = addr; |
370 | zdreq.cmd = ZM_IOCTL_SET_PIBSS_MODE; | 389 | zdreq.cmd = ZM_IOCTL_SET_PIBSS_MODE; |
371 | } else { | 390 | } else { |
372 | fprintf(stderr, "error action\n"); | 391 | fprintf(stderr, "error action\n"); |
373 | exit(1); | 392 | exit(1); |
374 | } | 393 | } |
@@ -380,25 +399,3 @@ fail: | |||
380 | exit(0); | 399 | exit(0); |
381 | } | 400 | } |
382 | 401 | ||
383 | unsigned char asctohex(char *str) | ||
384 | { | ||
385 | unsigned char value; | ||
386 | |||
387 | value = hex(*str) & 0x0f; | ||
388 | value = value << 4; | ||
389 | str++; | ||
390 | value |= hex(*str) & 0x0f; | ||
391 | |||
392 | return value; | ||
393 | } | ||
394 | |||
395 | char hex(char v) | ||
396 | { | ||
397 | if (isdigit(v)) | ||
398 | return v - '0'; | ||
399 | else if (isxdigit(v)) | ||
400 | return tolower(v) - 'a' + 10; | ||
401 | else | ||
402 | return 0; | ||
403 | } | ||
404 | |||
diff --git a/drivers/staging/otus/hal/hpmain.c b/drivers/staging/otus/hal/hpmain.c index 94f9cbbbdefc..8dff5b97dfe3 100644 --- a/drivers/staging/otus/hal/hpmain.c +++ b/drivers/staging/otus/hal/hpmain.c | |||
@@ -1316,7 +1316,6 @@ void zfHpSetFrequencyEx(zdev_t* dev, u32_t frequency, u8_t bw40, | |||
1316 | u8_t extOffset, u8_t initRF) | 1316 | u8_t extOffset, u8_t initRF) |
1317 | { | 1317 | { |
1318 | u32_t cmd[9]; | 1318 | u32_t cmd[9]; |
1319 | u32_t cmdB[3]; | ||
1320 | u16_t ret; | 1319 | u16_t ret; |
1321 | u8_t old_band; | 1320 | u8_t old_band; |
1322 | u8_t new_band; | 1321 | u8_t new_band; |
@@ -3434,7 +3433,6 @@ void zfSetPowerCalTable(zdev_t* dev, u32_t frequency, u8_t bw40, u8_t extOffset) | |||
3434 | /* Write PHY regs 672-703 */ | 3433 | /* Write PHY regs 672-703 */ |
3435 | for (i=0; i<128; i+=4) | 3434 | for (i=0; i<128; i+=4) |
3436 | { | 3435 | { |
3437 | u32_t regAddr = 0x9800 + (672 * 4); | ||
3438 | u32_t val; | 3436 | u32_t val; |
3439 | 3437 | ||
3440 | val = ((u32_t)vpd_chain1[i+3]<<24) | | 3438 | val = ((u32_t)vpd_chain1[i+3]<<24) | |
@@ -3485,7 +3483,6 @@ void zfSetPowerCalTable(zdev_t* dev, u32_t frequency, u8_t bw40, u8_t extOffset) | |||
3485 | /* Write PHY regs 672-703 + 0x1000 */ | 3483 | /* Write PHY regs 672-703 + 0x1000 */ |
3486 | for (i=0; i<128; i+=4) | 3484 | for (i=0; i<128; i+=4) |
3487 | { | 3485 | { |
3488 | u32_t regAddr = 0x9800 + (672 * 4) + 0x1000; | ||
3489 | u32_t val; | 3486 | u32_t val; |
3490 | 3487 | ||
3491 | val = ((u32_t)vpd_chain3[i+3]<<24) | | 3488 | val = ((u32_t)vpd_chain3[i+3]<<24) | |
@@ -4584,7 +4581,6 @@ void zfHpSetRollCallTable(zdev_t* dev) | |||
4584 | void zfHpSetTTSIFSTime(zdev_t* dev, u8_t sifs_time) | 4581 | void zfHpSetTTSIFSTime(zdev_t* dev, u8_t sifs_time) |
4585 | { | 4582 | { |
4586 | u32_t reg_value = 0; | 4583 | u32_t reg_value = 0; |
4587 | zmw_get_wlan_dev(dev); | ||
4588 | 4584 | ||
4589 | sifs_time &= 0x3f; | 4585 | sifs_time &= 0x3f; |
4590 | reg_value = 0x14400b | (((u32_t)sifs_time)<<24); | 4586 | reg_value = 0x14400b | (((u32_t)sifs_time)<<24); |
diff --git a/drivers/staging/otus/hal/hpreg.c b/drivers/staging/otus/hal/hpreg.c index d9894fe5f4ec..178777c09dbd 100644 --- a/drivers/staging/otus/hal/hpreg.c +++ b/drivers/staging/otus/hal/hpreg.c | |||
@@ -786,45 +786,6 @@ enum { | |||
786 | WT1_5760_5800, | 786 | WT1_5760_5800, |
787 | }; | 787 | }; |
788 | 788 | ||
789 | static REG_DMN_FREQ_BAND regDmn5GhzTurboFreq[] = { | ||
790 | { 5130, 5210, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5130_5210 */ | ||
791 | { 5250, 5330, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0, 0}, /* T1_5250_5330 */ | ||
792 | { 5370, 5490, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5370_5490 */ | ||
793 | { 5530, 5650, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0, 0}, /* T1_5530_5650 */ | ||
794 | |||
795 | { 5150, 5190, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5150_5190 */ | ||
796 | { 5230, 5310, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0, 0}, /* T1_5230_5310 */ | ||
797 | { 5350, 5470, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5350_5470 */ | ||
798 | { 5510, 5670, 5, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0, 0}, /* T1_5510_5670 */ | ||
799 | |||
800 | { 5200, 5240, 17, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5200_5240 */ | ||
801 | { 5200, 5240, 23, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T2_5200_5240 */ | ||
802 | { 5210, 5210, 17, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5210_5210 */ | ||
803 | { 5210, 5210, 23, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T2_5210_5210 */ | ||
804 | |||
805 | { 5280, 5280, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T1_5280_5280 */ | ||
806 | { 5280, 5280, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T2_5280_5280 */ | ||
807 | { 5250, 5250, 17, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T1_5250_5250 */ | ||
808 | { 5290, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T1_5290_5290 */ | ||
809 | { 5250, 5290, 20, 0, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T1_5250_5290 */ | ||
810 | { 5250, 5290, 23, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T2_5250_5290 */ | ||
811 | |||
812 | { 5540, 5660, 20, 6, 40, 40, DFS_FCC3, PSCAN_FCC_T, 0, 0}, /* T1_5540_5660 */ | ||
813 | { 5760, 5800, 20, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5760_5800 */ | ||
814 | { 5760, 5800, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T2_5760_5800 */ | ||
815 | |||
816 | { 5765, 5805, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_5765_5805 */ | ||
817 | |||
818 | /* | ||
819 | * Below are the WWR frequencies | ||
820 | */ | ||
821 | |||
822 | { 5210, 5250, 15, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0, 0}, /* WT1_5210_5250 */ | ||
823 | { 5290, 5290, 18, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0, 0}, /* WT1_5290_5290 */ | ||
824 | { 5540, 5660, 20, 0, 40, 40, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, 0, 0}, /* WT1_5540_5660 */ | ||
825 | { 5760, 5800, 20, 0, 40, 40, NO_DFS, PSCAN_WWR, 0, 0}, /* WT1_5760_5800 */ | ||
826 | }; | ||
827 | |||
828 | /* | 789 | /* |
829 | * 2GHz 11b channel tags | 790 | * 2GHz 11b channel tags |
830 | */ | 791 | */ |
@@ -864,45 +825,6 @@ enum { | |||
864 | W2_2484_2484, | 825 | W2_2484_2484, |
865 | }; | 826 | }; |
866 | 827 | ||
867 | static REG_DMN_FREQ_BAND regDmn2GhzFreq[] = { | ||
868 | { 2312, 2372, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2312_2372 */ | ||
869 | { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F2_2312_2372 */ | ||
870 | |||
871 | { 2412, 2472, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2412_2472 */ | ||
872 | { 2412, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0, 0}, /* F2_2412_2472 */ | ||
873 | { 2412, 2472, 30, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F3_2412_2472 */ | ||
874 | |||
875 | { 2412, 2462, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2412_2462 */ | ||
876 | { 2412, 2462, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA, 0, 0}, /* F2_2412_2462 */ | ||
877 | { 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2432_2442 */ | ||
878 | |||
879 | { 2457, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2457_2472 */ | ||
880 | |||
881 | { 2467, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA2 | PSCAN_MKKA, 0, 0}, /* F1_2467_2472 */ | ||
882 | |||
883 | { 2484, 2484, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2484_2484 */ | ||
884 | { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_MKKA | PSCAN_MKKA1 | PSCAN_MKKA2, 0, 0}, /* F2_2484_2484 */ | ||
885 | |||
886 | { 2512, 2732, 5, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* F1_2512_2732 */ | ||
887 | |||
888 | /* | ||
889 | * WWR have powers opened up to 20dBm. Limits should often come from CTL/Max powers | ||
890 | */ | ||
891 | |||
892 | { 2312, 2372, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2312_2372 */ | ||
893 | { 2412, 2412, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2412_2412 */ | ||
894 | { 2417, 2432, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2417_2432 */ | ||
895 | { 2437, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2437_2442 */ | ||
896 | { 2447, 2457, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2447_2457 */ | ||
897 | { 2462, 2462, 20, 0, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* W1_2462_2462 */ | ||
898 | { 2467, 2467, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0, 0}, /* W1_2467_2467 */ | ||
899 | { 2467, 2467, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0, 0}, /* W2_2467_2467 */ | ||
900 | { 2472, 2472, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0, 0}, /* W1_2472_2472 */ | ||
901 | { 2472, 2472, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0, 0}, /* W2_2472_2472 */ | ||
902 | { 2484, 2484, 20, 0, 20, 5, NO_DFS, PSCAN_WWR | IS_ECM_CHAN, 0, 0}, /* W1_2484_2484 */ | ||
903 | { 2484, 2484, 20, 0, 20, 5, NO_DFS, NO_PSCAN | IS_ECM_CHAN, 0, 0}, /* W2_2484_2484 */ | ||
904 | }; | ||
905 | |||
906 | 828 | ||
907 | /* | 829 | /* |
908 | * 2GHz 11g channel tags | 830 | * 2GHz 11g channel tags |
@@ -984,16 +906,6 @@ enum { | |||
984 | T1_2512_2732 | 906 | T1_2512_2732 |
985 | }; | 907 | }; |
986 | 908 | ||
987 | static REG_DMN_FREQ_BAND regDmn2Ghz11gTurboFreq[] = { | ||
988 | { 2312, 2372, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_2312_2372 */ | ||
989 | { 2437, 2437, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_2437_2437 */ | ||
990 | { 2437, 2437, 20, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T2_2437_2437 */ | ||
991 | { 2437, 2437, 18, 6, 40, 40, NO_DFS, PSCAN_WWR, 0, 0}, /* T3_2437_2437 */ | ||
992 | { 2512, 2732, 5, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* T1_2512_2732 */ | ||
993 | }; | ||
994 | |||
995 | |||
996 | |||
997 | /* | 909 | /* |
998 | * 2GHz 11n frequency tags | 910 | * 2GHz 11n frequency tags |
999 | */ | 911 | */ |
@@ -1005,15 +917,6 @@ enum { | |||
1005 | NG_DEMO_ALL_CHANNELS, | 917 | NG_DEMO_ALL_CHANNELS, |
1006 | }; | 918 | }; |
1007 | 919 | ||
1008 | static REG_DMN_FREQ_BAND regDmn2Ghz11ngFreq[] = { | ||
1009 | { 2422, 2452, 20, 0, 40, 5, NO_DFS, NO_PSCAN, 0, 0}, /* NG1_2422_2452 */ | ||
1010 | { 2422, 2452, 27, 0, 40, 5, NO_DFS, NO_PSCAN, 0, 0}, /* NG2_2422_2452 */ | ||
1011 | { 2422, 2452, 30, 0, 40, 5, NO_DFS, NO_PSCAN, 0, 0}, /* NG3_2422_2452 */ | ||
1012 | |||
1013 | { 2312, 2732, 27, 6, 20, 5, NO_DFS, NO_PSCAN, 0, 0}, /* NG_DEMO_ALL_CHANNELS */ | ||
1014 | }; | ||
1015 | |||
1016 | |||
1017 | /* | 920 | /* |
1018 | * 5GHz 11n frequency tags | 921 | * 5GHz 11n frequency tags |
1019 | */ | 922 | */ |
@@ -1050,42 +953,6 @@ enum { | |||
1050 | NA_DEMO_ALL_CHANNELS, | 953 | NA_DEMO_ALL_CHANNELS, |
1051 | }; | 954 | }; |
1052 | 955 | ||
1053 | static REG_DMN_FREQ_BAND regDmn5Ghz11naFreq[] = { | ||
1054 | /* | ||
1055 | * ToDo: This table needs to be completely populated with 5GHz 11n properties | ||
1056 | */ | ||
1057 | { 5190, 5230, 15, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA1_5190_5230 */ | ||
1058 | { 5190, 5230, 17, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA2_5190_5230 */ | ||
1059 | { 5190, 5230, 18, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA3_5190_5230 */ | ||
1060 | { 5190, 5230, 20, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA4_5190_5230 */ | ||
1061 | { 5190, 5230, 23, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA5_5190_5230 */ | ||
1062 | |||
1063 | { 5270, 5270, 23, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA1_5270_5270 */ | ||
1064 | |||
1065 | { 5270, 5310, 18, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA1_5270_5310 */ | ||
1066 | { 5270, 5310, 20, 0, 40, 40, DFS_FCC3|DFS_ETSI|DFS_MKK4, NO_PSCAN, 0, 1}, /* NA2_5270_5310 */ | ||
1067 | { 5270, 5310, 23, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA3_5270_5310 */ | ||
1068 | { 5270, 5310, 30, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA4_5270_5310 */ | ||
1069 | |||
1070 | { 5310, 5310, 17, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA1_5310_5310 */ | ||
1071 | |||
1072 | { 5510, 5630, 30, 6, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA1_5510_5630 */ | ||
1073 | |||
1074 | { 5510, 5670, 20, 6, 40, 40, DFS_FCC3|DFS_ETSI|DFS_MKK4, NO_PSCAN, 0, 1}, /* NA1_5510_5670 */ | ||
1075 | { 5510, 5670, 27, 0, 40, 40, DFS_FCC3|DFS_ETSI, NO_PSCAN, 0, 1}, /* NA2_5510_5670 */ | ||
1076 | { 5510, 5670, 30, 6, 40, 40, DFS_FCC3, NO_PSCAN, 0, 1}, /* NA3_5510_5670 */ | ||
1077 | |||
1078 | { 5755, 5795, 17, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA1_5755_5795 */ | ||
1079 | { 5755, 5795, 20, 6, 40, 40, DFS_ETSI, NO_PSCAN, 0, 0}, /* NA2_5755_5795 */ | ||
1080 | { 5755, 5795, 23, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA3_5755_5795 */ | ||
1081 | { 5755, 5795, 30, 0, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA4_5755_5795 */ | ||
1082 | { 5755, 5795, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA5_5755_5795 */ | ||
1083 | |||
1084 | { 5795, 5795, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA1_5795_5795 */ | ||
1085 | |||
1086 | { 4920, 6100, 30, 6, 40, 40, NO_DFS, NO_PSCAN, 0, 0}, /* NA_DEMO_ALL_CHANNELS */ | ||
1087 | }; | ||
1088 | |||
1089 | typedef struct regDomain { | 956 | typedef struct regDomain { |
1090 | u16_t regDmnEnum; /* value from EnumRd table */ | 957 | u16_t regDmnEnum; /* value from EnumRd table */ |
1091 | u8_t conformanceTestLimit; | 958 | u8_t conformanceTestLimit; |
diff --git a/drivers/staging/otus/hal/hprw.c b/drivers/staging/otus/hal/hprw.c index d9fad47d5d59..4dbd5fb44b0a 100644 --- a/drivers/staging/otus/hal/hprw.c +++ b/drivers/staging/otus/hal/hprw.c | |||
@@ -282,7 +282,6 @@ void zfIdlRsp(zdev_t* dev, u32_t* rsp, u16_t rspLen) | |||
282 | else if (src == ZM_OID_FLASH_READ) | 282 | else if (src == ZM_OID_FLASH_READ) |
283 | { | 283 | { |
284 | u32_t datalen; | 284 | u32_t datalen; |
285 | u16_t i; | ||
286 | 285 | ||
287 | datalen = (rsp[0] & 255); | 286 | datalen = (rsp[0] & 255); |
288 | 287 | ||
diff --git a/drivers/staging/otus/ioctl.c b/drivers/staging/otus/ioctl.c index 6808e69fb354..8c47b1a68627 100644 --- a/drivers/staging/otus/ioctl.c +++ b/drivers/staging/otus/ioctl.c | |||
@@ -866,15 +866,15 @@ int usbdrvwext_giwscan(struct net_device *dev, | |||
866 | char *current_ev = extra; | 866 | char *current_ev = extra; |
867 | char *end_buf; | 867 | char *end_buf; |
868 | int i; | 868 | int i; |
869 | /* struct zsBssList BssList; */ | ||
870 | struct zsBssListV1 *pBssList = kmalloc(sizeof(struct zsBssListV1), | ||
871 | GFP_KERNEL); | ||
872 | /* BssList = wd->sta.pBssList; */ | 869 | /* BssList = wd->sta.pBssList; */ |
873 | /* zmw_get_wlan_dev(dev); */ | 870 | /* zmw_get_wlan_dev(dev); */ |
874 | 871 | ||
875 | if (macp->DeviceOpened != 1) | 872 | if (macp->DeviceOpened != 1) |
876 | return 0; | 873 | return 0; |
877 | 874 | ||
875 | /* struct zsBssList BssList; */ | ||
876 | struct zsBssListV1 *pBssList = kmalloc(sizeof(struct zsBssListV1), | ||
877 | GFP_KERNEL); | ||
878 | if (data->length == 0) | 878 | if (data->length == 0) |
879 | end_buf = extra + IW_SCAN_MAX_DATA; | 879 | end_buf = extra + IW_SCAN_MAX_DATA; |
880 | else | 880 | else |
@@ -930,7 +930,7 @@ int usbdrvwext_siwessid(struct net_device *dev, | |||
930 | return -EINVAL; | 930 | return -EINVAL; |
931 | 931 | ||
932 | if (essid->flags == 1) { | 932 | if (essid->flags == 1) { |
933 | if (essid->length > (IW_ESSID_MAX_SIZE + 1)) | 933 | if (essid->length > IW_ESSID_MAX_SIZE) |
934 | return -E2BIG; | 934 | return -E2BIG; |
935 | 935 | ||
936 | if (copy_from_user(&EssidBuf, essid->pointer, essid->length)) | 936 | if (copy_from_user(&EssidBuf, essid->pointer, essid->length)) |
@@ -2227,7 +2227,8 @@ int usbdrv_wpa_ioctl(struct net_device *dev, struct athr_wlan_param *zdparm) | |||
2227 | case ZD_CMD_SCAN_REQ: | 2227 | case ZD_CMD_SCAN_REQ: |
2228 | printk(KERN_ERR "usbdrv_wpa_ioctl: ZD_CMD_SCAN_REQ\n"); | 2228 | printk(KERN_ERR "usbdrv_wpa_ioctl: ZD_CMD_SCAN_REQ\n"); |
2229 | break; | 2229 | break; |
2230 | case ZD_CMD_SET_GENERIC_ELEMENT: | 2230 | case ZD_CMD_SET_GENERIC_ELEMENT: { |
2231 | u8_t len, *wpaie; | ||
2231 | printk(KERN_ERR "usbdrv_wpa_ioctl:" | 2232 | printk(KERN_ERR "usbdrv_wpa_ioctl:" |
2232 | " ZD_CMD_SET_GENERIC_ELEMENT\n"); | 2233 | " ZD_CMD_SET_GENERIC_ELEMENT\n"); |
2233 | 2234 | ||
@@ -2250,8 +2251,8 @@ int usbdrv_wpa_ioctl(struct net_device *dev, struct athr_wlan_param *zdparm) | |||
2250 | /* zfiWlanSetWpaIe(dev, zdparm->u.generic_elem.data, | 2251 | /* zfiWlanSetWpaIe(dev, zdparm->u.generic_elem.data, |
2251 | * zdparm->u.generic_elem.len); | 2252 | * zdparm->u.generic_elem.len); |
2252 | */ | 2253 | */ |
2253 | u8_t len = zdparm->u.generic_elem.len; | 2254 | len = zdparm->u.generic_elem.len; |
2254 | u8_t *wpaie = (u8_t *)zdparm->u.generic_elem.data; | 2255 | wpaie = zdparm->u.generic_elem.data; |
2255 | 2256 | ||
2256 | printk(KERN_ERR "wd->ap.wpaLen : % d\n", len); | 2257 | printk(KERN_ERR "wd->ap.wpaLen : % d\n", len); |
2257 | 2258 | ||
@@ -2273,6 +2274,7 @@ int usbdrv_wpa_ioctl(struct net_device *dev, struct athr_wlan_param *zdparm) | |||
2273 | * #endif | 2274 | * #endif |
2274 | */ | 2275 | */ |
2275 | break; | 2276 | break; |
2277 | } | ||
2276 | 2278 | ||
2277 | /* #ifdef ZM_HOSTAPD_SUPPORT */ | 2279 | /* #ifdef ZM_HOSTAPD_SUPPORT */ |
2278 | case ZD_CMD_GET_TSC: | 2280 | case ZD_CMD_GET_TSC: |
diff --git a/drivers/staging/otus/usbdrv.c b/drivers/staging/otus/usbdrv.c index b0adbc8b2dc2..5e6a12037b12 100644 --- a/drivers/staging/otus/usbdrv.c +++ b/drivers/staging/otus/usbdrv.c | |||
@@ -829,7 +829,7 @@ int zfLnxRegisterVapDev(struct net_device* parentDev, u16_t vapId) | |||
829 | { | 829 | { |
830 | /* Allocate net device structure */ | 830 | /* Allocate net device structure */ |
831 | vap[vapId].dev = alloc_etherdev(0); | 831 | vap[vapId].dev = alloc_etherdev(0); |
832 | printk("Register vap dev=%x\n", (u32_t)vap[vapId].dev); | 832 | printk("Register vap dev=%p\n", vap[vapId].dev); |
833 | 833 | ||
834 | if(vap[vapId].dev == NULL) { | 834 | if(vap[vapId].dev == NULL) { |
835 | printk("alloc_etherdev fail\n"); | 835 | printk("alloc_etherdev fail\n"); |
@@ -883,7 +883,7 @@ int zfLnxUnregisterVapDev(struct net_device* parentDev, u16_t vapId) | |||
883 | printk("Unregister VAP dev : %s\n", vap[vapId].dev->name); | 883 | printk("Unregister VAP dev : %s\n", vap[vapId].dev->name); |
884 | 884 | ||
885 | if(vap[vapId].dev != NULL) { | 885 | if(vap[vapId].dev != NULL) { |
886 | printk("Unregister vap dev=%x\n", (u32_t)vap[vapId].dev); | 886 | printk("Unregister vap dev=%p\n", vap[vapId].dev); |
887 | // | 887 | // |
888 | //unregister_netdevice(wds[wdsId].dev); | 888 | //unregister_netdevice(wds[wdsId].dev); |
889 | unregister_netdev(vap[vapId].dev); | 889 | unregister_netdev(vap[vapId].dev); |
diff --git a/drivers/staging/otus/wrap_pkt.c b/drivers/staging/otus/wrap_pkt.c index 75bb952fd0a5..a2f5cb1f5298 100644 --- a/drivers/staging/otus/wrap_pkt.c +++ b/drivers/staging/otus/wrap_pkt.c | |||
@@ -58,7 +58,7 @@ void zfLnxRecv80211(zdev_t *dev, zbuf_t *buf, struct zsAdditionInfo *addInfo) | |||
58 | skb1 = skb_copy(buf, GFP_ATOMIC); | 58 | skb1 = skb_copy(buf, GFP_ATOMIC); |
59 | if (skb1 != NULL) { | 59 | if (skb1 != NULL) { |
60 | skb1->dev = dev; | 60 | skb1->dev = dev; |
61 | skb1->mac_header = skb1->data; | 61 | skb_reset_mac_header(skb1); |
62 | skb1->ip_summed = CHECKSUM_NONE; | 62 | skb1->ip_summed = CHECKSUM_NONE; |
63 | skb1->pkt_type = PACKET_OTHERHOST; | 63 | skb1->pkt_type = PACKET_OTHERHOST; |
64 | /* ETH_P_80211_RAW */ | 64 | /* ETH_P_80211_RAW */ |
@@ -85,13 +85,7 @@ void zfLnxRecvEth(zdev_t *dev, zbuf_t *buf, u16_t port) | |||
85 | /* new_buf = dev_alloc_skb(2048); */ | 85 | /* new_buf = dev_alloc_skb(2048); */ |
86 | new_buf = dev_alloc_skb(buf->len); | 86 | new_buf = dev_alloc_skb(buf->len); |
87 | 87 | ||
88 | #ifdef NET_SKBUFF_DATA_USES_OFFSET | 88 | skb_reset_tail_pointer(new_buf); |
89 | new_buf->tail = 0; | ||
90 | new_buf->len = 0; | ||
91 | #else | ||
92 | new_buf->tail = new_buf->data; | ||
93 | new_buf->len = 0; | ||
94 | #endif | ||
95 | 89 | ||
96 | skb_put(new_buf, buf->len); | 90 | skb_put(new_buf, buf->len); |
97 | memcpy(new_buf->data, buf->data, buf->len); | 91 | memcpy(new_buf->data, buf->data, buf->len); |
diff --git a/drivers/staging/otus/zdusb.c b/drivers/staging/otus/zdusb.c index 2a6d937ba5e8..4cd9b7f5a887 100644 --- a/drivers/staging/otus/zdusb.c +++ b/drivers/staging/otus/zdusb.c | |||
@@ -45,7 +45,7 @@ MODULE_LICENSE("Dual BSD/GPL"); | |||
45 | static const char driver_name[] = "Otus"; | 45 | static const char driver_name[] = "Otus"; |
46 | 46 | ||
47 | /* table of devices that work with this driver */ | 47 | /* table of devices that work with this driver */ |
48 | static struct usb_device_id zd1221_ids [] = { | 48 | static const struct usb_device_id zd1221_ids[] = { |
49 | { USB_DEVICE(VENDOR_ATHR, PRODUCT_AR9170) }, | 49 | { USB_DEVICE(VENDOR_ATHR, PRODUCT_AR9170) }, |
50 | { USB_DEVICE(VENDOR_DLINK, PRODUCT_DWA160A) }, | 50 | { USB_DEVICE(VENDOR_DLINK, PRODUCT_DWA160A) }, |
51 | { USB_DEVICE(VENDOR_NETGEAR, PRODUCT_WNDA3100) }, | 51 | { USB_DEVICE(VENDOR_NETGEAR, PRODUCT_WNDA3100) }, |
diff --git a/drivers/staging/p9auth/Kconfig b/drivers/staging/p9auth/Kconfig deleted file mode 100644 index d1c66d262020..000000000000 --- a/drivers/staging/p9auth/Kconfig +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | config PLAN9AUTH | ||
2 | tristate "Plan 9 style capability device implementation" | ||
3 | default n | ||
4 | depends on CRYPTO | ||
5 | help | ||
6 | This module implements the Plan 9 style capability device. | ||
7 | |||
8 | To compile this driver as a module, choose | ||
9 | M here: the module will be called p9auth. | ||
diff --git a/drivers/staging/p9auth/Makefile b/drivers/staging/p9auth/Makefile deleted file mode 100644 index 3ebf6ff0eef2..000000000000 --- a/drivers/staging/p9auth/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-$(CONFIG_PLAN9AUTH) += p9auth.o | ||
diff --git a/drivers/staging/p9auth/p9auth.c b/drivers/staging/p9auth/p9auth.c deleted file mode 100644 index db7962621210..000000000000 --- a/drivers/staging/p9auth/p9auth.c +++ /dev/null | |||
@@ -1,408 +0,0 @@ | |||
1 | /* | ||
2 | * Plan 9 style capability device implementation for the Linux Kernel | ||
3 | * | ||
4 | * Copyright 2008, 2009 Ashwin Ganti <ashwin.ganti@gmail.com> | ||
5 | * | ||
6 | * Released under the GPLv2 | ||
7 | * | ||
8 | */ | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/moduleparam.h> | ||
12 | #include <linux/slab.h> | ||
13 | #include <linux/fs.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/fcntl.h> | ||
16 | #include <linux/cdev.h> | ||
17 | #include <linux/uaccess.h> | ||
18 | #include <linux/list.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/string.h> | ||
21 | #include <linux/crypto.h> | ||
22 | #include <linux/highmem.h> | ||
23 | #include <linux/scatterlist.h> | ||
24 | #include <linux/sched.h> | ||
25 | #include <linux/cred.h> | ||
26 | |||
27 | #ifndef CAP_MAJOR | ||
28 | #define CAP_MAJOR 0 | ||
29 | #endif | ||
30 | |||
31 | #ifndef CAP_NR_DEVS | ||
32 | #define CAP_NR_DEVS 2 /* caphash and capuse */ | ||
33 | #endif | ||
34 | |||
35 | #ifndef CAP_NODE_SIZE | ||
36 | #define CAP_NODE_SIZE 20 | ||
37 | #endif | ||
38 | |||
39 | #define MAX_DIGEST_SIZE 20 | ||
40 | |||
41 | struct cap_node { | ||
42 | char data[CAP_NODE_SIZE]; | ||
43 | struct list_head list; | ||
44 | }; | ||
45 | |||
46 | struct cap_dev { | ||
47 | struct cap_node *head; | ||
48 | int node_size; | ||
49 | unsigned long size; | ||
50 | struct semaphore sem; | ||
51 | struct cdev cdev; | ||
52 | }; | ||
53 | |||
54 | static int cap_major = CAP_MAJOR; | ||
55 | static int cap_minor; | ||
56 | static int cap_nr_devs = CAP_NR_DEVS; | ||
57 | static int cap_node_size = CAP_NODE_SIZE; | ||
58 | |||
59 | module_param(cap_major, int, S_IRUGO); | ||
60 | module_param(cap_minor, int, S_IRUGO); | ||
61 | module_param(cap_nr_devs, int, S_IRUGO); | ||
62 | |||
63 | MODULE_AUTHOR("Ashwin Ganti"); | ||
64 | MODULE_LICENSE("GPL"); | ||
65 | |||
66 | static struct cap_dev *cap_devices; | ||
67 | |||
68 | static void hexdump(unsigned char *buf, unsigned int len) | ||
69 | { | ||
70 | while (len--) | ||
71 | printk("%02x", *buf++); | ||
72 | printk("\n"); | ||
73 | } | ||
74 | |||
75 | static char *cap_hash(char *plain_text, unsigned int plain_text_size, | ||
76 | char *key, unsigned int key_size) | ||
77 | { | ||
78 | struct scatterlist sg; | ||
79 | char *result; | ||
80 | struct crypto_hash *tfm; | ||
81 | struct hash_desc desc; | ||
82 | int ret; | ||
83 | |||
84 | tfm = crypto_alloc_hash("hmac(sha1)", 0, CRYPTO_ALG_ASYNC); | ||
85 | if (IS_ERR(tfm)) { | ||
86 | printk(KERN_ERR | ||
87 | "failed to load transform for hmac(sha1): %ld\n", | ||
88 | PTR_ERR(tfm)); | ||
89 | return NULL; | ||
90 | } | ||
91 | |||
92 | desc.tfm = tfm; | ||
93 | desc.flags = 0; | ||
94 | |||
95 | result = kzalloc(MAX_DIGEST_SIZE, GFP_KERNEL); | ||
96 | if (!result) { | ||
97 | printk(KERN_ERR "out of memory!\n"); | ||
98 | goto out; | ||
99 | } | ||
100 | |||
101 | sg_set_buf(&sg, plain_text, plain_text_size); | ||
102 | |||
103 | ret = crypto_hash_setkey(tfm, key, key_size); | ||
104 | if (ret) { | ||
105 | printk(KERN_ERR "setkey() failed ret=%d\n", ret); | ||
106 | kfree(result); | ||
107 | result = NULL; | ||
108 | goto out; | ||
109 | } | ||
110 | |||
111 | ret = crypto_hash_digest(&desc, &sg, plain_text_size, result); | ||
112 | if (ret) { | ||
113 | printk(KERN_ERR "digest () failed ret=%d\n", ret); | ||
114 | kfree(result); | ||
115 | result = NULL; | ||
116 | goto out; | ||
117 | } | ||
118 | |||
119 | printk(KERN_DEBUG "crypto hash digest size %d\n", | ||
120 | crypto_hash_digestsize(tfm)); | ||
121 | hexdump(result, MAX_DIGEST_SIZE); | ||
122 | |||
123 | out: | ||
124 | crypto_free_hash(tfm); | ||
125 | return result; | ||
126 | } | ||
127 | |||
128 | static int cap_trim(struct cap_dev *dev) | ||
129 | { | ||
130 | struct cap_node *tmp; | ||
131 | struct list_head *pos, *q; | ||
132 | if (dev->head != NULL) { | ||
133 | list_for_each_safe(pos, q, &(dev->head->list)) { | ||
134 | tmp = list_entry(pos, struct cap_node, list); | ||
135 | list_del(pos); | ||
136 | kfree(tmp); | ||
137 | } | ||
138 | } | ||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | static int cap_open(struct inode *inode, struct file *filp) | ||
143 | { | ||
144 | struct cap_dev *dev; | ||
145 | dev = container_of(inode->i_cdev, struct cap_dev, cdev); | ||
146 | filp->private_data = dev; | ||
147 | |||
148 | /* trim to 0 the length of the device if open was write-only */ | ||
149 | if ((filp->f_flags & O_ACCMODE) == O_WRONLY) { | ||
150 | if (down_interruptible(&dev->sem)) | ||
151 | return -ERESTARTSYS; | ||
152 | cap_trim(dev); | ||
153 | up(&dev->sem); | ||
154 | } | ||
155 | /* initialise the head if it is NULL */ | ||
156 | if (dev->head == NULL) { | ||
157 | dev->head = kmalloc(sizeof(struct cap_node), GFP_KERNEL); | ||
158 | INIT_LIST_HEAD(&(dev->head->list)); | ||
159 | } | ||
160 | return 0; | ||
161 | } | ||
162 | |||
163 | static int cap_release(struct inode *inode, struct file *filp) | ||
164 | { | ||
165 | return 0; | ||
166 | } | ||
167 | |||
168 | static ssize_t cap_write(struct file *filp, const char __user *buf, | ||
169 | size_t count, loff_t *f_pos) | ||
170 | { | ||
171 | struct cap_node *node_ptr, *tmp; | ||
172 | struct list_head *pos; | ||
173 | struct cap_dev *dev = filp->private_data; | ||
174 | ssize_t retval = -ENOMEM; | ||
175 | struct cred *new; | ||
176 | int len, target_int, source_int, flag = 0; | ||
177 | char *user_buf, *user_buf_running, *source_user, *target_user, | ||
178 | *rand_str, *hash_str, *result; | ||
179 | |||
180 | if (down_interruptible(&dev->sem)) | ||
181 | return -ERESTARTSYS; | ||
182 | |||
183 | user_buf_running = NULL; | ||
184 | hash_str = NULL; | ||
185 | node_ptr = kmalloc(sizeof(struct cap_node), GFP_KERNEL); | ||
186 | user_buf = kzalloc(count+1, GFP_KERNEL); | ||
187 | if (!node_ptr || !user_buf) | ||
188 | goto out; | ||
189 | |||
190 | if (copy_from_user(user_buf, buf, count)) { | ||
191 | retval = -EFAULT; | ||
192 | goto out; | ||
193 | } | ||
194 | |||
195 | /* | ||
196 | * If the minor number is 0 ( /dev/caphash ) then simply add the | ||
197 | * hashed capability supplied by the user to the list of hashes | ||
198 | */ | ||
199 | if (0 == iminor(filp->f_dentry->d_inode)) { | ||
200 | if (count > CAP_NODE_SIZE) { | ||
201 | retval = -EINVAL; | ||
202 | goto out; | ||
203 | } | ||
204 | printk(KERN_INFO "Capability being written to /dev/caphash : \n"); | ||
205 | hexdump(user_buf, count); | ||
206 | memcpy(node_ptr->data, user_buf, count); | ||
207 | list_add(&(node_ptr->list), &(dev->head->list)); | ||
208 | node_ptr = NULL; | ||
209 | } else { | ||
210 | char *tmpu; | ||
211 | if (!cap_devices[0].head || | ||
212 | list_empty(&(cap_devices[0].head->list))) { | ||
213 | retval = -EINVAL; | ||
214 | goto out; | ||
215 | } | ||
216 | /* | ||
217 | * break the supplied string into tokens with @ as the | ||
218 | * delimiter If the string is "user1@user2@randomstring" we | ||
219 | * need to split it and hash 'user1@user2' using 'randomstring' | ||
220 | * as the key. | ||
221 | */ | ||
222 | tmpu = user_buf_running = kstrdup(user_buf, GFP_KERNEL); | ||
223 | source_user = strsep(&tmpu, "@"); | ||
224 | target_user = strsep(&tmpu, "@"); | ||
225 | rand_str = tmpu; | ||
226 | if (!source_user || !target_user || !rand_str) { | ||
227 | retval = -EINVAL; | ||
228 | goto out; | ||
229 | } | ||
230 | |||
231 | /* hash the string user1@user2 with rand_str as the key */ | ||
232 | len = strlen(source_user) + strlen(target_user) + 1; | ||
233 | /* src, @, len, \0 */ | ||
234 | hash_str = kzalloc(len+1, GFP_KERNEL); | ||
235 | strcat(hash_str, source_user); | ||
236 | strcat(hash_str, "@"); | ||
237 | strcat(hash_str, target_user); | ||
238 | |||
239 | printk(KERN_ALERT "the source user is %s \n", source_user); | ||
240 | printk(KERN_ALERT "the target user is %s \n", target_user); | ||
241 | |||
242 | result = cap_hash(hash_str, len, rand_str, strlen(rand_str)); | ||
243 | if (NULL == result) { | ||
244 | retval = -EFAULT; | ||
245 | goto out; | ||
246 | } | ||
247 | memcpy(node_ptr->data, result, CAP_NODE_SIZE); /* why? */ | ||
248 | /* Change the process's uid if the hash is present in the | ||
249 | * list of hashes | ||
250 | */ | ||
251 | list_for_each(pos, &(cap_devices->head->list)) { | ||
252 | /* | ||
253 | * Change the user id of the process if the hashes | ||
254 | * match | ||
255 | */ | ||
256 | if (0 == | ||
257 | memcmp(result, | ||
258 | list_entry(pos, struct cap_node, | ||
259 | list)->data, | ||
260 | CAP_NODE_SIZE)) { | ||
261 | target_int = (unsigned int) | ||
262 | simple_strtol(target_user, NULL, 0); | ||
263 | source_int = (unsigned int) | ||
264 | simple_strtol(source_user, NULL, 0); | ||
265 | flag = 1; | ||
266 | |||
267 | /* | ||
268 | * Check whether the process writing to capuse | ||
269 | * is actually owned by the source owner | ||
270 | */ | ||
271 | if (source_int != current_uid()) { | ||
272 | printk(KERN_ALERT | ||
273 | "Process is not owned by the source user of the capability.\n"); | ||
274 | retval = -EFAULT; | ||
275 | goto out; | ||
276 | } | ||
277 | /* | ||
278 | * What all id's need to be changed here? uid, | ||
279 | * euid, fsid, savedids ?? Currently I am | ||
280 | * changing the effective user id since most of | ||
281 | * the authorisation decisions are based on it | ||
282 | */ | ||
283 | new = prepare_creds(); | ||
284 | if (!new) { | ||
285 | retval = -ENOMEM; | ||
286 | goto out; | ||
287 | } | ||
288 | new->uid = (uid_t) target_int; | ||
289 | new->euid = (uid_t) target_int; | ||
290 | retval = commit_creds(new); | ||
291 | if (retval) | ||
292 | goto out; | ||
293 | |||
294 | /* | ||
295 | * Remove the capability from the list and | ||
296 | * break | ||
297 | */ | ||
298 | tmp = list_entry(pos, struct cap_node, list); | ||
299 | list_del(pos); | ||
300 | kfree(tmp); | ||
301 | break; | ||
302 | } | ||
303 | } | ||
304 | if (0 == flag) { | ||
305 | /* | ||
306 | * The capability is not present in the list of the | ||
307 | * hashes stored, hence return failure | ||
308 | */ | ||
309 | printk(KERN_ALERT | ||
310 | "Invalid capabiliy written to /dev/capuse \n"); | ||
311 | retval = -EFAULT; | ||
312 | goto out; | ||
313 | } | ||
314 | } | ||
315 | *f_pos += count; | ||
316 | retval = count; | ||
317 | /* update the size */ | ||
318 | if (dev->size < *f_pos) | ||
319 | dev->size = *f_pos; | ||
320 | |||
321 | out: | ||
322 | kfree(node_ptr); | ||
323 | kfree(user_buf); | ||
324 | kfree(user_buf_running); | ||
325 | kfree(hash_str); | ||
326 | up(&dev->sem); | ||
327 | return retval; | ||
328 | } | ||
329 | |||
330 | static const struct file_operations cap_fops = { | ||
331 | .owner = THIS_MODULE, | ||
332 | .write = cap_write, | ||
333 | .open = cap_open, | ||
334 | .release = cap_release, | ||
335 | }; | ||
336 | |||
337 | /* no __exit here because it can be called by the init function */ | ||
338 | static void cap_cleanup_module(void) | ||
339 | { | ||
340 | int i; | ||
341 | dev_t devno = MKDEV(cap_major, cap_minor); | ||
342 | if (cap_devices) { | ||
343 | for (i = 0; i < cap_nr_devs; i++) { | ||
344 | cap_trim(cap_devices + i); | ||
345 | cdev_del(&cap_devices[i].cdev); | ||
346 | } | ||
347 | kfree(cap_devices); | ||
348 | } | ||
349 | unregister_chrdev_region(devno, cap_nr_devs); | ||
350 | |||
351 | } | ||
352 | |||
353 | static void cap_setup_cdev(struct cap_dev *dev, int index) | ||
354 | { | ||
355 | int err, devno = MKDEV(cap_major, cap_minor + index); | ||
356 | cdev_init(&dev->cdev, &cap_fops); | ||
357 | dev->cdev.owner = THIS_MODULE; | ||
358 | dev->cdev.ops = &cap_fops; | ||
359 | err = cdev_add(&dev->cdev, devno, 1); | ||
360 | if (err) | ||
361 | printk(KERN_NOTICE "Error %d adding cap%d", err, index); | ||
362 | } | ||
363 | |||
364 | static int __init cap_init_module(void) | ||
365 | { | ||
366 | int result, i; | ||
367 | dev_t dev = 0; | ||
368 | |||
369 | if (cap_major) { | ||
370 | dev = MKDEV(cap_major, cap_minor); | ||
371 | result = register_chrdev_region(dev, cap_nr_devs, "cap"); | ||
372 | } else { | ||
373 | result = alloc_chrdev_region(&dev, cap_minor, cap_nr_devs, | ||
374 | "cap"); | ||
375 | cap_major = MAJOR(dev); | ||
376 | } | ||
377 | |||
378 | if (result < 0) { | ||
379 | printk(KERN_WARNING "cap: can't get major %d\n", | ||
380 | cap_major); | ||
381 | return result; | ||
382 | } | ||
383 | |||
384 | cap_devices = kzalloc(cap_nr_devs * sizeof(struct cap_dev), | ||
385 | GFP_KERNEL); | ||
386 | if (!cap_devices) { | ||
387 | result = -ENOMEM; | ||
388 | goto fail; | ||
389 | } | ||
390 | |||
391 | /* Initialize each device. */ | ||
392 | for (i = 0; i < cap_nr_devs; i++) { | ||
393 | cap_devices[i].node_size = cap_node_size; | ||
394 | init_MUTEX(&cap_devices[i].sem); | ||
395 | cap_setup_cdev(&cap_devices[i], i); | ||
396 | } | ||
397 | |||
398 | return 0; | ||
399 | |||
400 | fail: | ||
401 | cap_cleanup_module(); | ||
402 | return result; | ||
403 | } | ||
404 | |||
405 | module_init(cap_init_module); | ||
406 | module_exit(cap_cleanup_module); | ||
407 | |||
408 | |||
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c index 95c93e82ccec..377884f3480d 100644 --- a/drivers/staging/panel/panel.c +++ b/drivers/staging/panel/panel.c | |||
@@ -41,7 +41,6 @@ | |||
41 | #include <linux/signal.h> | 41 | #include <linux/signal.h> |
42 | #include <linux/sched.h> | 42 | #include <linux/sched.h> |
43 | #include <linux/spinlock.h> | 43 | #include <linux/spinlock.h> |
44 | #include <linux/smp_lock.h> | ||
45 | #include <linux/interrupt.h> | 44 | #include <linux/interrupt.h> |
46 | #include <linux/miscdevice.h> | 45 | #include <linux/miscdevice.h> |
47 | #include <linux/slab.h> | 46 | #include <linux/slab.h> |
diff --git a/drivers/staging/phison/phison.c b/drivers/staging/phison/phison.c index fcba78d21636..0c495eacb75b 100644 --- a/drivers/staging/phison/phison.c +++ b/drivers/staging/phison/phison.c | |||
@@ -69,7 +69,7 @@ static int phison_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
69 | return ret; | 69 | return ret; |
70 | } | 70 | } |
71 | 71 | ||
72 | static struct pci_device_id phison_pci_tbl[] = { | 72 | static const struct pci_device_id phison_pci_tbl[] = { |
73 | { PCI_VENDOR_ID_PHISON, PCI_DEVICE_ID_PS5000, PCI_ANY_ID, PCI_ANY_ID, | 73 | { PCI_VENDOR_ID_PHISON, PCI_DEVICE_ID_PS5000, PCI_ANY_ID, PCI_ANY_ID, |
74 | PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 }, | 74 | PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 }, |
75 | { 0, }, | 75 | { 0, }, |
diff --git a/drivers/staging/pohmelfs/inode.c b/drivers/staging/pohmelfs/inode.c index f69b7783027f..bf38280def3f 100644 --- a/drivers/staging/pohmelfs/inode.c +++ b/drivers/staging/pohmelfs/inode.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #define POHMELFS_MAGIC_NUM 0x504f482e | 36 | #define POHMELFS_MAGIC_NUM 0x504f482e |
37 | 37 | ||
38 | static struct kmem_cache *pohmelfs_inode_cache; | 38 | static struct kmem_cache *pohmelfs_inode_cache; |
39 | static atomic_t psb_bdi_num = ATOMIC_INIT(0); | ||
39 | 40 | ||
40 | /* | 41 | /* |
41 | * Removes inode from all trees, drops local name cache and removes all queued | 42 | * Removes inode from all trees, drops local name cache and removes all queued |
@@ -322,7 +323,7 @@ int pohmelfs_write_create_inode(struct pohmelfs_inode *pi) | |||
322 | t = netfs_trans_alloc(psb, err + 1, 0, 0); | 323 | t = netfs_trans_alloc(psb, err + 1, 0, 0); |
323 | if (!t) { | 324 | if (!t) { |
324 | err = -ENOMEM; | 325 | err = -ENOMEM; |
325 | goto err_out_put; | 326 | goto err_out_exit; |
326 | } | 327 | } |
327 | t->complete = pohmelfs_write_inode_complete; | 328 | t->complete = pohmelfs_write_inode_complete; |
328 | t->private = igrab(inode); | 329 | t->private = igrab(inode); |
@@ -395,7 +396,8 @@ int pohmelfs_remove_child(struct pohmelfs_inode *pi, struct pohmelfs_name *n) | |||
395 | /* | 396 | /* |
396 | * Writeback for given inode. | 397 | * Writeback for given inode. |
397 | */ | 398 | */ |
398 | static int pohmelfs_write_inode(struct inode *inode, int sync) | 399 | static int pohmelfs_write_inode(struct inode *inode, |
400 | struct writeback_control *wbc) | ||
399 | { | 401 | { |
400 | struct pohmelfs_inode *pi = POHMELFS_I(inode); | 402 | struct pohmelfs_inode *pi = POHMELFS_I(inode); |
401 | 403 | ||
@@ -1331,6 +1333,8 @@ static void pohmelfs_put_super(struct super_block *sb) | |||
1331 | pohmelfs_crypto_exit(psb); | 1333 | pohmelfs_crypto_exit(psb); |
1332 | pohmelfs_state_exit(psb); | 1334 | pohmelfs_state_exit(psb); |
1333 | 1335 | ||
1336 | bdi_destroy(&psb->bdi); | ||
1337 | |||
1334 | kfree(psb); | 1338 | kfree(psb); |
1335 | sb->s_fs_info = NULL; | 1339 | sb->s_fs_info = NULL; |
1336 | } | 1340 | } |
@@ -1767,8 +1771,7 @@ static int pohmelfs_show_stats(struct seq_file *m, struct vfsmount *mnt) | |||
1767 | seq_printf(m, "%u ", ctl->idx); | 1771 | seq_printf(m, "%u ", ctl->idx); |
1768 | if (ctl->addr.sa_family == AF_INET) { | 1772 | if (ctl->addr.sa_family == AF_INET) { |
1769 | struct sockaddr_in *sin = (struct sockaddr_in *)&st->ctl.addr; | 1773 | struct sockaddr_in *sin = (struct sockaddr_in *)&st->ctl.addr; |
1770 | /* seq_printf(m, "%pi4:%u", &sin->sin_addr.s_addr, ntohs(sin->sin_port)); */ | 1774 | seq_printf(m, "%pI4:%u", &sin->sin_addr.s_addr, ntohs(sin->sin_port)); |
1771 | seq_printf(m, "%u.%u.%u.%u:%u", NIPQUAD(sin->sin_addr.s_addr), ntohs(sin->sin_port)); | ||
1772 | } else if (ctl->addr.sa_family == AF_INET6) { | 1775 | } else if (ctl->addr.sa_family == AF_INET6) { |
1773 | struct sockaddr_in6 *sin = (struct sockaddr_in6 *)&st->ctl.addr; | 1776 | struct sockaddr_in6 *sin = (struct sockaddr_in6 *)&st->ctl.addr; |
1774 | seq_printf(m, "%pi6:%u", &sin->sin6_addr, ntohs(sin->sin6_port)); | 1777 | seq_printf(m, "%pi6:%u", &sin->sin6_addr, ntohs(sin->sin6_port)); |
@@ -1815,11 +1818,22 @@ static int pohmelfs_fill_super(struct super_block *sb, void *data, int silent) | |||
1815 | if (!psb) | 1818 | if (!psb) |
1816 | goto err_out_exit; | 1819 | goto err_out_exit; |
1817 | 1820 | ||
1821 | err = bdi_init(&psb->bdi); | ||
1822 | if (err) | ||
1823 | goto err_out_free_sb; | ||
1824 | |||
1825 | err = bdi_register(&psb->bdi, NULL, "pfs-%d", atomic_inc_return(&psb_bdi_num)); | ||
1826 | if (err) { | ||
1827 | bdi_destroy(&psb->bdi); | ||
1828 | goto err_out_free_sb; | ||
1829 | } | ||
1830 | |||
1818 | sb->s_fs_info = psb; | 1831 | sb->s_fs_info = psb; |
1819 | sb->s_op = &pohmelfs_sb_ops; | 1832 | sb->s_op = &pohmelfs_sb_ops; |
1820 | sb->s_magic = POHMELFS_MAGIC_NUM; | 1833 | sb->s_magic = POHMELFS_MAGIC_NUM; |
1821 | sb->s_maxbytes = MAX_LFS_FILESIZE; | 1834 | sb->s_maxbytes = MAX_LFS_FILESIZE; |
1822 | sb->s_blocksize = PAGE_SIZE; | 1835 | sb->s_blocksize = PAGE_SIZE; |
1836 | sb->s_bdi = &psb->bdi; | ||
1823 | 1837 | ||
1824 | psb->sb = sb; | 1838 | psb->sb = sb; |
1825 | 1839 | ||
@@ -1863,11 +1877,11 @@ static int pohmelfs_fill_super(struct super_block *sb, void *data, int silent) | |||
1863 | 1877 | ||
1864 | err = pohmelfs_parse_options((char *) data, psb, 0); | 1878 | err = pohmelfs_parse_options((char *) data, psb, 0); |
1865 | if (err) | 1879 | if (err) |
1866 | goto err_out_free_sb; | 1880 | goto err_out_free_bdi; |
1867 | 1881 | ||
1868 | err = pohmelfs_copy_crypto(psb); | 1882 | err = pohmelfs_copy_crypto(psb); |
1869 | if (err) | 1883 | if (err) |
1870 | goto err_out_free_sb; | 1884 | goto err_out_free_bdi; |
1871 | 1885 | ||
1872 | err = pohmelfs_state_init(psb); | 1886 | err = pohmelfs_state_init(psb); |
1873 | if (err) | 1887 | if (err) |
@@ -1916,6 +1930,8 @@ err_out_state_exit: | |||
1916 | err_out_free_strings: | 1930 | err_out_free_strings: |
1917 | kfree(psb->cipher_string); | 1931 | kfree(psb->cipher_string); |
1918 | kfree(psb->hash_string); | 1932 | kfree(psb->hash_string); |
1933 | err_out_free_bdi: | ||
1934 | bdi_destroy(&psb->bdi); | ||
1919 | err_out_free_sb: | 1935 | err_out_free_sb: |
1920 | kfree(psb); | 1936 | kfree(psb); |
1921 | err_out_exit: | 1937 | err_out_exit: |
diff --git a/drivers/staging/pohmelfs/netfs.h b/drivers/staging/pohmelfs/netfs.h index 623a07d29dea..01cba006e07a 100644 --- a/drivers/staging/pohmelfs/netfs.h +++ b/drivers/staging/pohmelfs/netfs.h | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/types.h> |
20 | #include <linux/connector.h> | 20 | #include <linux/connector.h> |
21 | #include <linux/backing-dev.h> | ||
21 | 22 | ||
22 | #define POHMELFS_CN_IDX 5 | 23 | #define POHMELFS_CN_IDX 5 |
23 | #define POHMELFS_CN_VAL 0 | 24 | #define POHMELFS_CN_VAL 0 |
@@ -624,6 +625,8 @@ struct pohmelfs_sb { | |||
624 | 625 | ||
625 | struct super_block *sb; | 626 | struct super_block *sb; |
626 | 627 | ||
628 | struct backing_dev_info bdi; | ||
629 | |||
627 | /* | 630 | /* |
628 | * Algorithm strings. | 631 | * Algorithm strings. |
629 | */ | 632 | */ |
diff --git a/drivers/staging/quatech_usb2/quatech_usb2.c b/drivers/staging/quatech_usb2/quatech_usb2.c index f7726f1d3641..1561f74a413b 100644 --- a/drivers/staging/quatech_usb2/quatech_usb2.c +++ b/drivers/staging/quatech_usb2/quatech_usb2.c | |||
@@ -116,7 +116,7 @@ static int debug; | |||
116 | #define FOURTHCHAR ((unsigned char *)(urb->transfer_buffer))[i + 3] | 116 | #define FOURTHCHAR ((unsigned char *)(urb->transfer_buffer))[i + 3] |
117 | #define FIFTHCHAR ((unsigned char *)(urb->transfer_buffer))[i + 4] | 117 | #define FIFTHCHAR ((unsigned char *)(urb->transfer_buffer))[i + 4] |
118 | 118 | ||
119 | static struct usb_device_id quausb2_id_table[] = { | 119 | static const struct usb_device_id quausb2_id_table[] = { |
120 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU2_100)}, | 120 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU2_100)}, |
121 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU2_100)}, | 121 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU2_100)}, |
122 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU2_400)}, | 122 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU2_400)}, |
diff --git a/drivers/staging/ramzswap/Kconfig b/drivers/staging/ramzswap/Kconfig index 24e25691fae2..127b3c6c9596 100644 --- a/drivers/staging/ramzswap/Kconfig +++ b/drivers/staging/ramzswap/Kconfig | |||
@@ -5,7 +5,7 @@ config RAMZSWAP | |||
5 | select LZO_DECOMPRESS | 5 | select LZO_DECOMPRESS |
6 | default n | 6 | default n |
7 | help | 7 | help |
8 | Creates virtual block devices which can be used (only) as a swap | 8 | Creates virtual block devices which can (only) be used as swap |
9 | disks. Pages swapped to these disks are compressed and stored in | 9 | disks. Pages swapped to these disks are compressed and stored in |
10 | memory itself. | 10 | memory itself. |
11 | 11 | ||
diff --git a/drivers/staging/ramzswap/ramzswap.txt b/drivers/staging/ramzswap/ramzswap.txt index e9f1619505a0..9694acfeb43f 100644 --- a/drivers/staging/ramzswap/ramzswap.txt +++ b/drivers/staging/ramzswap/ramzswap.txt | |||
@@ -5,9 +5,9 @@ Project home: http://compcache.googlecode.com/ | |||
5 | 5 | ||
6 | * Introduction | 6 | * Introduction |
7 | 7 | ||
8 | It creates RAM based block devices which can be used (only) as swap disks. | 8 | The ramzswap module creates RAM based block devices which can (only) be used as |
9 | Pages swapped to these devices are compressed and stored in memory itself. | 9 | swap disks. Pages swapped to these devices are compressed and stored in memory |
10 | See project home for use cases, performance numbers and a lot more. | 10 | itself. See project home for use cases, performance numbers and a lot more. |
11 | 11 | ||
12 | Individual ramzswap devices are configured and initialized using rzscontrol | 12 | Individual ramzswap devices are configured and initialized using rzscontrol |
13 | userspace utility as shown in examples below. See rzscontrol man page for more | 13 | userspace utility as shown in examples below. See rzscontrol man page for more |
diff --git a/drivers/staging/ramzswap/ramzswap_drv.c b/drivers/staging/ramzswap/ramzswap_drv.c index 989fac5b01b3..5e422e254ee8 100644 --- a/drivers/staging/ramzswap/ramzswap_drv.c +++ b/drivers/staging/ramzswap/ramzswap_drv.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Compressed RAM based swap device | 2 | * Compressed RAM based swap device |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
@@ -24,12 +24,10 @@ | |||
24 | #include <linux/genhd.h> | 24 | #include <linux/genhd.h> |
25 | #include <linux/highmem.h> | 25 | #include <linux/highmem.h> |
26 | #include <linux/lzo.h> | 26 | #include <linux/lzo.h> |
27 | #include <linux/mutex.h> | ||
28 | #include <linux/string.h> | 27 | #include <linux/string.h> |
29 | #include <linux/swap.h> | 28 | #include <linux/swap.h> |
30 | #include <linux/swapops.h> | 29 | #include <linux/swapops.h> |
31 | #include <linux/vmalloc.h> | 30 | #include <linux/vmalloc.h> |
32 | #include <linux/version.h> | ||
33 | 31 | ||
34 | #include "ramzswap_drv.h" | 32 | #include "ramzswap_drv.h" |
35 | 33 | ||
@@ -222,7 +220,7 @@ out: | |||
222 | return ret; | 220 | return ret; |
223 | } | 221 | } |
224 | 222 | ||
225 | void ramzswap_ioctl_get_stats(struct ramzswap *rzs, | 223 | static void ramzswap_ioctl_get_stats(struct ramzswap *rzs, |
226 | struct ramzswap_ioctl_stats *s) | 224 | struct ramzswap_ioctl_stats *s) |
227 | { | 225 | { |
228 | strncpy(s->backing_swap_name, rzs->backing_swap_name, | 226 | strncpy(s->backing_swap_name, rzs->backing_swap_name, |
@@ -240,7 +238,8 @@ void ramzswap_ioctl_get_stats(struct ramzswap *rzs, | |||
240 | 238 | ||
241 | mem_used = xv_get_total_size_bytes(rzs->mem_pool) | 239 | mem_used = xv_get_total_size_bytes(rzs->mem_pool) |
242 | + (rs->pages_expand << PAGE_SHIFT); | 240 | + (rs->pages_expand << PAGE_SHIFT); |
243 | succ_writes = rs->num_writes - rs->failed_writes; | 241 | succ_writes = rzs_stat64_read(rzs, &rs->num_writes) - |
242 | rzs_stat64_read(rzs, &rs->failed_writes); | ||
244 | 243 | ||
245 | if (succ_writes && rs->pages_stored) { | 244 | if (succ_writes && rs->pages_stored) { |
246 | good_compress_perc = rs->good_compress * 100 | 245 | good_compress_perc = rs->good_compress * 100 |
@@ -249,11 +248,12 @@ void ramzswap_ioctl_get_stats(struct ramzswap *rzs, | |||
249 | / rs->pages_stored; | 248 | / rs->pages_stored; |
250 | } | 249 | } |
251 | 250 | ||
252 | s->num_reads = rs->num_reads; | 251 | s->num_reads = rzs_stat64_read(rzs, &rs->num_reads); |
253 | s->num_writes = rs->num_writes; | 252 | s->num_writes = rzs_stat64_read(rzs, &rs->num_writes); |
254 | s->failed_reads = rs->failed_reads; | 253 | s->failed_reads = rzs_stat64_read(rzs, &rs->failed_reads); |
255 | s->failed_writes = rs->failed_writes; | 254 | s->failed_writes = rzs_stat64_read(rzs, &rs->failed_writes); |
256 | s->invalid_io = rs->invalid_io; | 255 | s->invalid_io = rzs_stat64_read(rzs, &rs->invalid_io); |
256 | s->notify_free = rzs_stat64_read(rzs, &rs->notify_free); | ||
257 | s->pages_zero = rs->pages_zero; | 257 | s->pages_zero = rs->pages_zero; |
258 | 258 | ||
259 | s->good_compress_pct = good_compress_perc; | 259 | s->good_compress_pct = good_compress_perc; |
@@ -265,8 +265,8 @@ void ramzswap_ioctl_get_stats(struct ramzswap *rzs, | |||
265 | s->compr_data_size = rs->compr_size; | 265 | s->compr_data_size = rs->compr_size; |
266 | s->mem_used_total = mem_used; | 266 | s->mem_used_total = mem_used; |
267 | 267 | ||
268 | s->bdev_num_reads = rs->bdev_num_reads; | 268 | s->bdev_num_reads = rzs_stat64_read(rzs, &rs->bdev_num_reads); |
269 | s->bdev_num_writes = rs->bdev_num_writes; | 269 | s->bdev_num_writes = rzs_stat64_read(rzs, &rs->bdev_num_writes); |
270 | } | 270 | } |
271 | #endif /* CONFIG_RAMZSWAP_STATS */ | 271 | #endif /* CONFIG_RAMZSWAP_STATS */ |
272 | } | 272 | } |
@@ -502,6 +502,14 @@ static int setup_backing_swap(struct ramzswap *rzs) | |||
502 | goto bad_param; | 502 | goto bad_param; |
503 | } | 503 | } |
504 | disksize = i_size_read(inode); | 504 | disksize = i_size_read(inode); |
505 | /* | ||
506 | * Can happen if user gives an extended partition as | ||
507 | * backing swap or simply a bad disk. | ||
508 | */ | ||
509 | if (!disksize) { | ||
510 | pr_err("Error reading backing swap size.\n"); | ||
511 | goto bad_param; | ||
512 | } | ||
505 | } else if (S_ISREG(inode->i_mode)) { | 513 | } else if (S_ISREG(inode->i_mode)) { |
506 | bdev = inode->i_sb->s_bdev; | 514 | bdev = inode->i_sb->s_bdev; |
507 | if (IS_SWAPFILE(inode)) { | 515 | if (IS_SWAPFILE(inode)) { |
@@ -519,7 +527,6 @@ static int setup_backing_swap(struct ramzswap *rzs) | |||
519 | rzs->swap_file = swap_file; | 527 | rzs->swap_file = swap_file; |
520 | rzs->backing_swap = bdev; | 528 | rzs->backing_swap = bdev; |
521 | rzs->disksize = disksize; | 529 | rzs->disksize = disksize; |
522 | BUG_ON(!rzs->disksize); | ||
523 | 530 | ||
524 | return 0; | 531 | return 0; |
525 | 532 | ||
@@ -537,7 +544,7 @@ out: | |||
537 | * Map logical page number 'pagenum' to physical page number | 544 | * Map logical page number 'pagenum' to physical page number |
538 | * on backing swap device. For block device, this is a nop. | 545 | * on backing swap device. For block device, this is a nop. |
539 | */ | 546 | */ |
540 | u32 map_backing_swap_page(struct ramzswap *rzs, u32 pagenum) | 547 | static u32 map_backing_swap_page(struct ramzswap *rzs, u32 pagenum) |
541 | { | 548 | { |
542 | u32 skip_pages, entries_per_page; | 549 | u32 skip_pages, entries_per_page; |
543 | size_t delta, se_offset, skipped; | 550 | size_t delta, se_offset, skipped; |
@@ -593,9 +600,13 @@ static void ramzswap_free_page(struct ramzswap *rzs, size_t index) | |||
593 | u32 offset = rzs->table[index].offset; | 600 | u32 offset = rzs->table[index].offset; |
594 | 601 | ||
595 | if (unlikely(!page)) { | 602 | if (unlikely(!page)) { |
603 | /* | ||
604 | * No memory is allocated for zero filled pages. | ||
605 | * Simply clear zero page flag. | ||
606 | */ | ||
596 | if (rzs_test_flag(rzs, index, RZS_ZERO)) { | 607 | if (rzs_test_flag(rzs, index, RZS_ZERO)) { |
597 | rzs_clear_flag(rzs, index, RZS_ZERO); | 608 | rzs_clear_flag(rzs, index, RZS_ZERO); |
598 | stat_dec(rzs->stats.pages_zero); | 609 | rzs_stat_dec(&rzs->stats.pages_zero); |
599 | } | 610 | } |
600 | return; | 611 | return; |
601 | } | 612 | } |
@@ -604,7 +615,7 @@ static void ramzswap_free_page(struct ramzswap *rzs, size_t index) | |||
604 | clen = PAGE_SIZE; | 615 | clen = PAGE_SIZE; |
605 | __free_page(page); | 616 | __free_page(page); |
606 | rzs_clear_flag(rzs, index, RZS_UNCOMPRESSED); | 617 | rzs_clear_flag(rzs, index, RZS_UNCOMPRESSED); |
607 | stat_dec(rzs->stats.pages_expand); | 618 | rzs_stat_dec(&rzs->stats.pages_expand); |
608 | goto out; | 619 | goto out; |
609 | } | 620 | } |
610 | 621 | ||
@@ -614,11 +625,11 @@ static void ramzswap_free_page(struct ramzswap *rzs, size_t index) | |||
614 | 625 | ||
615 | xv_free(rzs->mem_pool, page, offset); | 626 | xv_free(rzs->mem_pool, page, offset); |
616 | if (clen <= PAGE_SIZE / 2) | 627 | if (clen <= PAGE_SIZE / 2) |
617 | stat_dec(rzs->stats.good_compress); | 628 | rzs_stat_dec(&rzs->stats.good_compress); |
618 | 629 | ||
619 | out: | 630 | out: |
620 | rzs->stats.compr_size -= clen; | 631 | rzs->stats.compr_size -= clen; |
621 | stat_dec(rzs->stats.pages_stored); | 632 | rzs_stat_dec(&rzs->stats.pages_stored); |
622 | 633 | ||
623 | rzs->table[index].page = NULL; | 634 | rzs->table[index].page = NULL; |
624 | rzs->table[index].offset = 0; | 635 | rzs->table[index].offset = 0; |
@@ -664,7 +675,6 @@ static int handle_uncompressed_page(struct ramzswap *rzs, struct bio *bio) | |||
664 | return 0; | 675 | return 0; |
665 | } | 676 | } |
666 | 677 | ||
667 | |||
668 | /* | 678 | /* |
669 | * Called when request page is not present in ramzswap. | 679 | * Called when request page is not present in ramzswap. |
670 | * Its either in backing swap device (if present) or | 680 | * Its either in backing swap device (if present) or |
@@ -680,8 +690,8 @@ static int handle_ramzswap_fault(struct ramzswap *rzs, struct bio *bio) | |||
680 | */ | 690 | */ |
681 | if (rzs->backing_swap) { | 691 | if (rzs->backing_swap) { |
682 | u32 pagenum; | 692 | u32 pagenum; |
683 | stat_dec(rzs->stats.num_reads); | 693 | rzs_stat64_dec(rzs, &rzs->stats.num_reads); |
684 | stat_inc(rzs->stats.bdev_num_reads); | 694 | rzs_stat64_inc(rzs, &rzs->stats.bdev_num_reads); |
685 | bio->bi_bdev = rzs->backing_swap; | 695 | bio->bi_bdev = rzs->backing_swap; |
686 | 696 | ||
687 | /* | 697 | /* |
@@ -719,7 +729,7 @@ static int ramzswap_read(struct ramzswap *rzs, struct bio *bio) | |||
719 | struct zobj_header *zheader; | 729 | struct zobj_header *zheader; |
720 | unsigned char *user_mem, *cmem; | 730 | unsigned char *user_mem, *cmem; |
721 | 731 | ||
722 | stat_inc(rzs->stats.num_reads); | 732 | rzs_stat64_inc(rzs, &rzs->stats.num_reads); |
723 | 733 | ||
724 | page = bio->bi_io_vec[0].bv_page; | 734 | page = bio->bi_io_vec[0].bv_page; |
725 | index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; | 735 | index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; |
@@ -731,7 +741,7 @@ static int ramzswap_read(struct ramzswap *rzs, struct bio *bio) | |||
731 | if (!rzs->table[index].page) | 741 | if (!rzs->table[index].page) |
732 | return handle_ramzswap_fault(rzs, bio); | 742 | return handle_ramzswap_fault(rzs, bio); |
733 | 743 | ||
734 | /* Page is stored uncompressed since its incompressible */ | 744 | /* Page is stored uncompressed since it's incompressible */ |
735 | if (unlikely(rzs_test_flag(rzs, index, RZS_UNCOMPRESSED))) | 745 | if (unlikely(rzs_test_flag(rzs, index, RZS_UNCOMPRESSED))) |
736 | return handle_uncompressed_page(rzs, bio); | 746 | return handle_uncompressed_page(rzs, bio); |
737 | 747 | ||
@@ -753,7 +763,7 @@ static int ramzswap_read(struct ramzswap *rzs, struct bio *bio) | |||
753 | if (unlikely(ret != LZO_E_OK)) { | 763 | if (unlikely(ret != LZO_E_OK)) { |
754 | pr_err("Decompression failed! err=%d, page=%u\n", | 764 | pr_err("Decompression failed! err=%d, page=%u\n", |
755 | ret, index); | 765 | ret, index); |
756 | stat_inc(rzs->stats.failed_reads); | 766 | rzs_stat64_inc(rzs, &rzs->stats.failed_reads); |
757 | goto out; | 767 | goto out; |
758 | } | 768 | } |
759 | 769 | ||
@@ -777,7 +787,7 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) | |||
777 | struct page *page, *page_store; | 787 | struct page *page, *page_store; |
778 | unsigned char *user_mem, *cmem, *src; | 788 | unsigned char *user_mem, *cmem, *src; |
779 | 789 | ||
780 | stat_inc(rzs->stats.num_writes); | 790 | rzs_stat64_inc(rzs, &rzs->stats.num_writes); |
781 | 791 | ||
782 | page = bio->bi_io_vec[0].bv_page; | 792 | page = bio->bi_io_vec[0].bv_page; |
783 | index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; | 793 | index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; |
@@ -789,25 +799,16 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) | |||
789 | * is no longer referenced by any process. So, its now safe | 799 | * is no longer referenced by any process. So, its now safe |
790 | * to free the memory that was allocated for this page. | 800 | * to free the memory that was allocated for this page. |
791 | */ | 801 | */ |
792 | if (rzs->table[index].page) | 802 | if (rzs->table[index].page || rzs_test_flag(rzs, index, RZS_ZERO)) |
793 | ramzswap_free_page(rzs, index); | 803 | ramzswap_free_page(rzs, index); |
794 | 804 | ||
795 | /* | ||
796 | * No memory ia allocated for zero filled pages. | ||
797 | * Simply clear zero page flag. | ||
798 | */ | ||
799 | if (rzs_test_flag(rzs, index, RZS_ZERO)) { | ||
800 | stat_dec(rzs->stats.pages_zero); | ||
801 | rzs_clear_flag(rzs, index, RZS_ZERO); | ||
802 | } | ||
803 | |||
804 | mutex_lock(&rzs->lock); | 805 | mutex_lock(&rzs->lock); |
805 | 806 | ||
806 | user_mem = kmap_atomic(page, KM_USER0); | 807 | user_mem = kmap_atomic(page, KM_USER0); |
807 | if (page_zero_filled(user_mem)) { | 808 | if (page_zero_filled(user_mem)) { |
808 | kunmap_atomic(user_mem, KM_USER0); | 809 | kunmap_atomic(user_mem, KM_USER0); |
809 | mutex_unlock(&rzs->lock); | 810 | mutex_unlock(&rzs->lock); |
810 | stat_inc(rzs->stats.pages_zero); | 811 | rzs_stat_inc(&rzs->stats.pages_zero); |
811 | rzs_set_flag(rzs, index, RZS_ZERO); | 812 | rzs_set_flag(rzs, index, RZS_ZERO); |
812 | 813 | ||
813 | set_bit(BIO_UPTODATE, &bio->bi_flags); | 814 | set_bit(BIO_UPTODATE, &bio->bi_flags); |
@@ -831,7 +832,7 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) | |||
831 | if (unlikely(ret != LZO_E_OK)) { | 832 | if (unlikely(ret != LZO_E_OK)) { |
832 | mutex_unlock(&rzs->lock); | 833 | mutex_unlock(&rzs->lock); |
833 | pr_err("Compression failed! err=%d\n", ret); | 834 | pr_err("Compression failed! err=%d\n", ret); |
834 | stat_inc(rzs->stats.failed_writes); | 835 | rzs_stat64_inc(rzs, &rzs->stats.failed_writes); |
835 | goto out; | 836 | goto out; |
836 | } | 837 | } |
837 | 838 | ||
@@ -854,13 +855,13 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) | |||
854 | mutex_unlock(&rzs->lock); | 855 | mutex_unlock(&rzs->lock); |
855 | pr_info("Error allocating memory for incompressible " | 856 | pr_info("Error allocating memory for incompressible " |
856 | "page: %u\n", index); | 857 | "page: %u\n", index); |
857 | stat_inc(rzs->stats.failed_writes); | 858 | rzs_stat64_inc(rzs, &rzs->stats.failed_writes); |
858 | goto out; | 859 | goto out; |
859 | } | 860 | } |
860 | 861 | ||
861 | offset = 0; | 862 | offset = 0; |
862 | rzs_set_flag(rzs, index, RZS_UNCOMPRESSED); | 863 | rzs_set_flag(rzs, index, RZS_UNCOMPRESSED); |
863 | stat_inc(rzs->stats.pages_expand); | 864 | rzs_stat_inc(&rzs->stats.pages_expand); |
864 | rzs->table[index].page = page_store; | 865 | rzs->table[index].page = page_store; |
865 | src = kmap_atomic(page, KM_USER0); | 866 | src = kmap_atomic(page, KM_USER0); |
866 | goto memstore; | 867 | goto memstore; |
@@ -872,7 +873,7 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) | |||
872 | mutex_unlock(&rzs->lock); | 873 | mutex_unlock(&rzs->lock); |
873 | pr_info("Error allocating memory for compressed " | 874 | pr_info("Error allocating memory for compressed " |
874 | "page: %u, size=%zu\n", index, clen); | 875 | "page: %u, size=%zu\n", index, clen); |
875 | stat_inc(rzs->stats.failed_writes); | 876 | rzs_stat64_inc(rzs, &rzs->stats.failed_writes); |
876 | if (rzs->backing_swap) | 877 | if (rzs->backing_swap) |
877 | fwd_write_request = 1; | 878 | fwd_write_request = 1; |
878 | goto out; | 879 | goto out; |
@@ -901,9 +902,9 @@ memstore: | |||
901 | 902 | ||
902 | /* Update stats */ | 903 | /* Update stats */ |
903 | rzs->stats.compr_size += clen; | 904 | rzs->stats.compr_size += clen; |
904 | stat_inc(rzs->stats.pages_stored); | 905 | rzs_stat_inc(&rzs->stats.pages_stored); |
905 | if (clen <= PAGE_SIZE / 2) | 906 | if (clen <= PAGE_SIZE / 2) |
906 | stat_inc(rzs->stats.good_compress); | 907 | rzs_stat_inc(&rzs->stats.good_compress); |
907 | 908 | ||
908 | mutex_unlock(&rzs->lock); | 909 | mutex_unlock(&rzs->lock); |
909 | 910 | ||
@@ -913,7 +914,7 @@ memstore: | |||
913 | 914 | ||
914 | out: | 915 | out: |
915 | if (fwd_write_request) { | 916 | if (fwd_write_request) { |
916 | stat_inc(rzs->stats.bdev_num_writes); | 917 | rzs_stat64_inc(rzs, &rzs->stats.bdev_num_writes); |
917 | bio->bi_bdev = rzs->backing_swap; | 918 | bio->bi_bdev = rzs->backing_swap; |
918 | #if 0 | 919 | #if 0 |
919 | /* | 920 | /* |
@@ -941,7 +942,6 @@ out: | |||
941 | return 0; | 942 | return 0; |
942 | } | 943 | } |
943 | 944 | ||
944 | |||
945 | /* | 945 | /* |
946 | * Check if request is within bounds and page aligned. | 946 | * Check if request is within bounds and page aligned. |
947 | */ | 947 | */ |
@@ -975,7 +975,7 @@ static int ramzswap_make_request(struct request_queue *queue, struct bio *bio) | |||
975 | } | 975 | } |
976 | 976 | ||
977 | if (!valid_swap_request(rzs, bio)) { | 977 | if (!valid_swap_request(rzs, bio)) { |
978 | stat_inc(rzs->stats.invalid_io); | 978 | rzs_stat64_inc(rzs, &rzs->stats.invalid_io); |
979 | bio_io_error(bio); | 979 | bio_io_error(bio); |
980 | return 0; | 980 | return 0; |
981 | } | 981 | } |
@@ -1000,6 +1000,9 @@ static void reset_device(struct ramzswap *rzs) | |||
1000 | unsigned entries_per_page; | 1000 | unsigned entries_per_page; |
1001 | unsigned long num_table_pages, entry = 0; | 1001 | unsigned long num_table_pages, entry = 0; |
1002 | 1002 | ||
1003 | /* Do not accept any new I/O request */ | ||
1004 | rzs->init_done = 0; | ||
1005 | |||
1003 | if (rzs->backing_swap && !rzs->num_extents) | 1006 | if (rzs->backing_swap && !rzs->num_extents) |
1004 | is_backing_blkdev = 1; | 1007 | is_backing_blkdev = 1; |
1005 | 1008 | ||
@@ -1066,6 +1069,7 @@ static void reset_device(struct ramzswap *rzs) | |||
1066 | bd_release(rzs->backing_swap); | 1069 | bd_release(rzs->backing_swap); |
1067 | filp_close(rzs->swap_file, NULL); | 1070 | filp_close(rzs->swap_file, NULL); |
1068 | rzs->backing_swap = NULL; | 1071 | rzs->backing_swap = NULL; |
1072 | memset(rzs->backing_swap_name, 0, MAX_SWAP_NAME_LEN); | ||
1069 | } | 1073 | } |
1070 | 1074 | ||
1071 | /* Reset stats */ | 1075 | /* Reset stats */ |
@@ -1073,9 +1077,6 @@ static void reset_device(struct ramzswap *rzs) | |||
1073 | 1077 | ||
1074 | rzs->disksize = 0; | 1078 | rzs->disksize = 0; |
1075 | rzs->memlimit = 0; | 1079 | rzs->memlimit = 0; |
1076 | |||
1077 | /* Back to uninitialized state */ | ||
1078 | rzs->init_done = 0; | ||
1079 | } | 1080 | } |
1080 | 1081 | ||
1081 | static int ramzswap_ioctl_init_device(struct ramzswap *rzs) | 1082 | static int ramzswap_ioctl_init_device(struct ramzswap *rzs) |
@@ -1276,6 +1277,11 @@ static int ramzswap_ioctl(struct block_device *bdev, fmode_t mode, | |||
1276 | ret = -EBUSY; | 1277 | ret = -EBUSY; |
1277 | goto out; | 1278 | goto out; |
1278 | } | 1279 | } |
1280 | |||
1281 | /* Make sure all pending I/O is finished */ | ||
1282 | if (bdev) | ||
1283 | fsync_bdev(bdev); | ||
1284 | |||
1279 | ret = ramzswap_ioctl_reset_device(rzs); | 1285 | ret = ramzswap_ioctl_reset_device(rzs); |
1280 | break; | 1286 | break; |
1281 | 1287 | ||
@@ -1293,16 +1299,20 @@ static struct block_device_operations ramzswap_devops = { | |||
1293 | .owner = THIS_MODULE, | 1299 | .owner = THIS_MODULE, |
1294 | }; | 1300 | }; |
1295 | 1301 | ||
1296 | static void create_device(struct ramzswap *rzs, int device_id) | 1302 | static int create_device(struct ramzswap *rzs, int device_id) |
1297 | { | 1303 | { |
1304 | int ret = 0; | ||
1305 | |||
1298 | mutex_init(&rzs->lock); | 1306 | mutex_init(&rzs->lock); |
1307 | spin_lock_init(&rzs->stat64_lock); | ||
1299 | INIT_LIST_HEAD(&rzs->backing_swap_extent_list); | 1308 | INIT_LIST_HEAD(&rzs->backing_swap_extent_list); |
1300 | 1309 | ||
1301 | rzs->queue = blk_alloc_queue(GFP_KERNEL); | 1310 | rzs->queue = blk_alloc_queue(GFP_KERNEL); |
1302 | if (!rzs->queue) { | 1311 | if (!rzs->queue) { |
1303 | pr_err("Error allocating disk queue for device %d\n", | 1312 | pr_err("Error allocating disk queue for device %d\n", |
1304 | device_id); | 1313 | device_id); |
1305 | return; | 1314 | ret = -ENOMEM; |
1315 | goto out; | ||
1306 | } | 1316 | } |
1307 | 1317 | ||
1308 | blk_queue_make_request(rzs->queue, ramzswap_make_request); | 1318 | blk_queue_make_request(rzs->queue, ramzswap_make_request); |
@@ -1314,7 +1324,8 @@ static void create_device(struct ramzswap *rzs, int device_id) | |||
1314 | blk_cleanup_queue(rzs->queue); | 1324 | blk_cleanup_queue(rzs->queue); |
1315 | pr_warning("Error allocating disk structure for device %d\n", | 1325 | pr_warning("Error allocating disk structure for device %d\n", |
1316 | device_id); | 1326 | device_id); |
1317 | return; | 1327 | ret = -ENOMEM; |
1328 | goto out; | ||
1318 | } | 1329 | } |
1319 | 1330 | ||
1320 | rzs->disk->major = ramzswap_major; | 1331 | rzs->disk->major = ramzswap_major; |
@@ -1329,9 +1340,16 @@ static void create_device(struct ramzswap *rzs, int device_id) | |||
1329 | * or set equal to backing swap device (if provided) | 1340 | * or set equal to backing swap device (if provided) |
1330 | */ | 1341 | */ |
1331 | set_capacity(rzs->disk, 0); | 1342 | set_capacity(rzs->disk, 0); |
1343 | |||
1344 | blk_queue_physical_block_size(rzs->disk->queue, PAGE_SIZE); | ||
1345 | blk_queue_logical_block_size(rzs->disk->queue, PAGE_SIZE); | ||
1346 | |||
1332 | add_disk(rzs->disk); | 1347 | add_disk(rzs->disk); |
1333 | 1348 | ||
1334 | rzs->init_done = 0; | 1349 | rzs->init_done = 0; |
1350 | |||
1351 | out: | ||
1352 | return ret; | ||
1335 | } | 1353 | } |
1336 | 1354 | ||
1337 | static void destroy_device(struct ramzswap *rzs) | 1355 | static void destroy_device(struct ramzswap *rzs) |
@@ -1347,18 +1365,20 @@ static void destroy_device(struct ramzswap *rzs) | |||
1347 | 1365 | ||
1348 | static int __init ramzswap_init(void) | 1366 | static int __init ramzswap_init(void) |
1349 | { | 1367 | { |
1350 | int i, ret; | 1368 | int ret, dev_id; |
1351 | 1369 | ||
1352 | if (num_devices > max_num_devices) { | 1370 | if (num_devices > max_num_devices) { |
1353 | pr_warning("Invalid value for num_devices: %u\n", | 1371 | pr_warning("Invalid value for num_devices: %u\n", |
1354 | num_devices); | 1372 | num_devices); |
1355 | return -EINVAL; | 1373 | ret = -EINVAL; |
1374 | goto out; | ||
1356 | } | 1375 | } |
1357 | 1376 | ||
1358 | ramzswap_major = register_blkdev(0, "ramzswap"); | 1377 | ramzswap_major = register_blkdev(0, "ramzswap"); |
1359 | if (ramzswap_major <= 0) { | 1378 | if (ramzswap_major <= 0) { |
1360 | pr_warning("Unable to get major number\n"); | 1379 | pr_warning("Unable to get major number\n"); |
1361 | return -EBUSY; | 1380 | ret = -EBUSY; |
1381 | goto out; | ||
1362 | } | 1382 | } |
1363 | 1383 | ||
1364 | if (!num_devices) { | 1384 | if (!num_devices) { |
@@ -1371,15 +1391,23 @@ static int __init ramzswap_init(void) | |||
1371 | devices = kzalloc(num_devices * sizeof(struct ramzswap), GFP_KERNEL); | 1391 | devices = kzalloc(num_devices * sizeof(struct ramzswap), GFP_KERNEL); |
1372 | if (!devices) { | 1392 | if (!devices) { |
1373 | ret = -ENOMEM; | 1393 | ret = -ENOMEM; |
1374 | goto out; | 1394 | goto unregister; |
1375 | } | 1395 | } |
1376 | 1396 | ||
1377 | for (i = 0; i < num_devices; i++) | 1397 | for (dev_id = 0; dev_id < num_devices; dev_id++) { |
1378 | create_device(&devices[i], i); | 1398 | ret = create_device(&devices[dev_id], dev_id); |
1399 | if (ret) | ||
1400 | goto free_devices; | ||
1401 | } | ||
1379 | 1402 | ||
1380 | return 0; | 1403 | return 0; |
1381 | out: | 1404 | |
1405 | free_devices: | ||
1406 | while (dev_id) | ||
1407 | destroy_device(&devices[--dev_id]); | ||
1408 | unregister: | ||
1382 | unregister_blkdev(ramzswap_major, "ramzswap"); | 1409 | unregister_blkdev(ramzswap_major, "ramzswap"); |
1410 | out: | ||
1383 | return ret; | 1411 | return ret; |
1384 | } | 1412 | } |
1385 | 1413 | ||
diff --git a/drivers/staging/ramzswap/ramzswap_drv.h b/drivers/staging/ramzswap/ramzswap_drv.h index a6ea240935b6..c7e0e767c223 100644 --- a/drivers/staging/ramzswap/ramzswap_drv.h +++ b/drivers/staging/ramzswap/ramzswap_drv.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Compressed RAM based swap device | 2 | * Compressed RAM based swap device |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
@@ -15,6 +15,9 @@ | |||
15 | #ifndef _RAMZSWAP_DRV_H_ | 15 | #ifndef _RAMZSWAP_DRV_H_ |
16 | #define _RAMZSWAP_DRV_H_ | 16 | #define _RAMZSWAP_DRV_H_ |
17 | 17 | ||
18 | #include <linux/spinlock.h> | ||
19 | #include <linux/mutex.h> | ||
20 | |||
18 | #include "ramzswap_ioctl.h" | 21 | #include "ramzswap_ioctl.h" |
19 | #include "xvmalloc.h" | 22 | #include "xvmalloc.h" |
20 | 23 | ||
@@ -71,15 +74,6 @@ static const unsigned max_zpage_size_nobdev = PAGE_SIZE / 4 * 3; | |||
71 | #define SECTORS_PER_PAGE_SHIFT (PAGE_SHIFT - SECTOR_SHIFT) | 74 | #define SECTORS_PER_PAGE_SHIFT (PAGE_SHIFT - SECTOR_SHIFT) |
72 | #define SECTORS_PER_PAGE (1 << SECTORS_PER_PAGE_SHIFT) | 75 | #define SECTORS_PER_PAGE (1 << SECTORS_PER_PAGE_SHIFT) |
73 | 76 | ||
74 | /* Debugging and Stats */ | ||
75 | #if defined(CONFIG_RAMZSWAP_STATS) | ||
76 | #define stat_inc(stat) ((stat)++) | ||
77 | #define stat_dec(stat) ((stat)--) | ||
78 | #else | ||
79 | #define stat_inc(x) | ||
80 | #define stat_dec(x) | ||
81 | #endif | ||
82 | |||
83 | /* Flags for ramzswap pages (table[page_no].flags) */ | 77 | /* Flags for ramzswap pages (table[page_no].flags) */ |
84 | enum rzs_pageflags { | 78 | enum rzs_pageflags { |
85 | /* Page is stored uncompressed */ | 79 | /* Page is stored uncompressed */ |
@@ -102,7 +96,7 @@ struct table { | |||
102 | u16 offset; | 96 | u16 offset; |
103 | u8 count; /* object ref count (not yet used) */ | 97 | u8 count; /* object ref count (not yet used) */ |
104 | u8 flags; | 98 | u8 flags; |
105 | } __attribute__((aligned(4)));; | 99 | } __attribute__((aligned(4))); |
106 | 100 | ||
107 | /* | 101 | /* |
108 | * Swap extent information in case backing swap is a regular | 102 | * Swap extent information in case backing swap is a regular |
@@ -121,9 +115,10 @@ struct ramzswap_stats { | |||
121 | #if defined(CONFIG_RAMZSWAP_STATS) | 115 | #if defined(CONFIG_RAMZSWAP_STATS) |
122 | u64 num_reads; /* failed + successful */ | 116 | u64 num_reads; /* failed + successful */ |
123 | u64 num_writes; /* --do-- */ | 117 | u64 num_writes; /* --do-- */ |
124 | u64 failed_reads; /* can happen when memory is too low */ | 118 | u64 failed_reads; /* should NEVER! happen */ |
125 | u64 failed_writes; /* should NEVER! happen */ | 119 | u64 failed_writes; /* can happen when memory is too low */ |
126 | u64 invalid_io; /* non-swap I/O requests */ | 120 | u64 invalid_io; /* non-swap I/O requests */ |
121 | u64 notify_free; /* no. of swap slot free notifications */ | ||
127 | u32 pages_zero; /* no. of zero filled pages */ | 122 | u32 pages_zero; /* no. of zero filled pages */ |
128 | u32 pages_stored; /* no. of pages currently stored */ | 123 | u32 pages_stored; /* no. of pages currently stored */ |
129 | u32 good_compress; /* % of pages with compression ratio<=50% */ | 124 | u32 good_compress; /* % of pages with compression ratio<=50% */ |
@@ -138,6 +133,7 @@ struct ramzswap { | |||
138 | void *compress_workmem; | 133 | void *compress_workmem; |
139 | void *compress_buffer; | 134 | void *compress_buffer; |
140 | struct table *table; | 135 | struct table *table; |
136 | spinlock_t stat64_lock; /* protect 64-bit stats */ | ||
141 | struct mutex lock; | 137 | struct mutex lock; |
142 | struct request_queue *queue; | 138 | struct request_queue *queue; |
143 | struct gendisk *disk; | 139 | struct gendisk *disk; |
@@ -167,5 +163,48 @@ struct ramzswap { | |||
167 | 163 | ||
168 | /*-- */ | 164 | /*-- */ |
169 | 165 | ||
170 | #endif | 166 | /* Debugging and Stats */ |
167 | #if defined(CONFIG_RAMZSWAP_STATS) | ||
168 | static void rzs_stat_inc(u32 *v) | ||
169 | { | ||
170 | *v = *v + 1; | ||
171 | } | ||
172 | |||
173 | static void rzs_stat_dec(u32 *v) | ||
174 | { | ||
175 | *v = *v - 1; | ||
176 | } | ||
177 | |||
178 | static void rzs_stat64_inc(struct ramzswap *rzs, u64 *v) | ||
179 | { | ||
180 | spin_lock(&rzs->stat64_lock); | ||
181 | *v = *v + 1; | ||
182 | spin_unlock(&rzs->stat64_lock); | ||
183 | } | ||
184 | |||
185 | static void rzs_stat64_dec(struct ramzswap *rzs, u64 *v) | ||
186 | { | ||
187 | spin_lock(&rzs->stat64_lock); | ||
188 | *v = *v - 1; | ||
189 | spin_unlock(&rzs->stat64_lock); | ||
190 | } | ||
191 | |||
192 | static u64 rzs_stat64_read(struct ramzswap *rzs, u64 *v) | ||
193 | { | ||
194 | u64 val; | ||
195 | |||
196 | spin_lock(&rzs->stat64_lock); | ||
197 | val = *v; | ||
198 | spin_unlock(&rzs->stat64_lock); | ||
199 | |||
200 | return val; | ||
201 | } | ||
202 | #else | ||
203 | #define rzs_stat_inc(v) | ||
204 | #define rzs_stat_dec(v) | ||
205 | #define rzs_stat64_inc(r, v) | ||
206 | #define rzs_stat64_dec(r, v) | ||
207 | #define rzs_stat64_read(r, v) | ||
208 | #endif /* CONFIG_RAMZSWAP_STATS */ | ||
171 | 209 | ||
210 | #endif | ||
diff --git a/drivers/staging/ramzswap/ramzswap_ioctl.h b/drivers/staging/ramzswap/ramzswap_ioctl.h index c713a09af580..d26076d41bde 100644 --- a/drivers/staging/ramzswap/ramzswap_ioctl.h +++ b/drivers/staging/ramzswap/ramzswap_ioctl.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Compressed RAM based swap device | 2 | * Compressed RAM based swap device |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
@@ -24,9 +24,10 @@ struct ramzswap_ioctl_stats { | |||
24 | * size (if present) */ | 24 | * size (if present) */ |
25 | u64 num_reads; /* failed + successful */ | 25 | u64 num_reads; /* failed + successful */ |
26 | u64 num_writes; /* --do-- */ | 26 | u64 num_writes; /* --do-- */ |
27 | u64 failed_reads; /* can happen when memory is too low */ | 27 | u64 failed_reads; /* should NEVER! happen */ |
28 | u64 failed_writes; /* should NEVER! happen */ | 28 | u64 failed_writes; /* can happen when memory is too low */ |
29 | u64 invalid_io; /* non-swap I/O requests */ | 29 | u64 invalid_io; /* non-swap I/O requests */ |
30 | u64 notify_free; /* no. of swap slot free notifications */ | ||
30 | u32 pages_zero; /* no. of zero filled pages */ | 31 | u32 pages_zero; /* no. of zero filled pages */ |
31 | u32 good_compress_pct; /* no. of pages with compression ratio<=50% */ | 32 | u32 good_compress_pct; /* no. of pages with compression ratio<=50% */ |
32 | u32 pages_expand_pct; /* no. of incompressible pages */ | 33 | u32 pages_expand_pct; /* no. of incompressible pages */ |
diff --git a/drivers/staging/ramzswap/xvmalloc.c b/drivers/staging/ramzswap/xvmalloc.c index b3e986c33141..3fdbb8ada827 100644 --- a/drivers/staging/ramzswap/xvmalloc.c +++ b/drivers/staging/ramzswap/xvmalloc.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * xvmalloc memory allocator | 2 | * xvmalloc memory allocator |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
@@ -273,7 +273,7 @@ static void remove_block(struct xv_pool *pool, struct page *page, u32 offset, | |||
273 | } | 273 | } |
274 | 274 | ||
275 | /* | 275 | /* |
276 | * Allocate a page and add it freelist of given pool. | 276 | * Allocate a page and add it to freelist of given pool. |
277 | */ | 277 | */ |
278 | static int grow_pool(struct xv_pool *pool, gfp_t flags) | 278 | static int grow_pool(struct xv_pool *pool, gfp_t flags) |
279 | { | 279 | { |
diff --git a/drivers/staging/ramzswap/xvmalloc.h b/drivers/staging/ramzswap/xvmalloc.h index 010c6fe5e173..5b1a81aa5faf 100644 --- a/drivers/staging/ramzswap/xvmalloc.h +++ b/drivers/staging/ramzswap/xvmalloc.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * xvmalloc memory allocator | 2 | * xvmalloc memory allocator |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
diff --git a/drivers/staging/ramzswap/xvmalloc_int.h b/drivers/staging/ramzswap/xvmalloc_int.h index 03c1a652a3aa..e23ed5c8b8e4 100644 --- a/drivers/staging/ramzswap/xvmalloc_int.h +++ b/drivers/staging/ramzswap/xvmalloc_int.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * xvmalloc memory allocator | 2 | * xvmalloc memory allocator |
3 | * | 3 | * |
4 | * Copyright (C) 2008, 2009 Nitin Gupta | 4 | * Copyright (C) 2008, 2009, 2010 Nitin Gupta |
5 | * | 5 | * |
6 | * This code is released using a dual license strategy: BSD/GPL | 6 | * This code is released using a dual license strategy: BSD/GPL |
7 | * You can choose the licence that better fits your requirements. | 7 | * You can choose the licence that better fits your requirements. |
@@ -62,7 +62,7 @@ struct link_free { | |||
62 | 62 | ||
63 | struct block_header { | 63 | struct block_header { |
64 | union { | 64 | union { |
65 | /* This common header must be ALIGN bytes */ | 65 | /* This common header must be XV_ALIGN bytes */ |
66 | u8 common[XV_ALIGN]; | 66 | u8 common[XV_ALIGN]; |
67 | struct { | 67 | struct { |
68 | u16 size; | 68 | u16 size; |
diff --git a/drivers/staging/rar/Kconfig b/drivers/staging/rar/Kconfig deleted file mode 100644 index 17f8bf3bb41a..000000000000 --- a/drivers/staging/rar/Kconfig +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | # | ||
2 | # RAR device configuration | ||
3 | # | ||
4 | |||
5 | menu "RAR Register Driver" | ||
6 | # | ||
7 | # Restricted Access Register Manager | ||
8 | # | ||
9 | config RAR_REGISTER | ||
10 | tristate "Restricted Access Region Register Driver" | ||
11 | default n | ||
12 | ---help--- | ||
13 | This driver allows other kernel drivers access to the | ||
14 | contents of the restricted access region control | ||
15 | registers. | ||
16 | |||
17 | endmenu | ||
diff --git a/drivers/staging/rar/Makefile b/drivers/staging/rar/Makefile deleted file mode 100644 index 5422ed04ccf1..000000000000 --- a/drivers/staging/rar/Makefile +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | EXTRA_CFLAGS += -DLITTLE__ENDIAN | ||
2 | obj-$(CONFIG_RAR_REGISTER) += rar_driver.o | ||
diff --git a/drivers/staging/rar/rar_driver.c b/drivers/staging/rar/rar_driver.c deleted file mode 100644 index d85d1890e81e..000000000000 --- a/drivers/staging/rar/rar_driver.c +++ /dev/null | |||
@@ -1,444 +0,0 @@ | |||
1 | #include <linux/init.h> | ||
2 | #include <linux/module.h> | ||
3 | #include <linux/fs.h> | ||
4 | #include <linux/cdev.h> | ||
5 | #include <linux/kdev_t.h> | ||
6 | #include <linux/semaphore.h> | ||
7 | #include <linux/mm.h> | ||
8 | #include <linux/poll.h> | ||
9 | #include <linux/wait.h> | ||
10 | #include <linux/ioctl.h> | ||
11 | #include <linux/ioport.h> | ||
12 | #include <linux/io.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/pagemap.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/firmware.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include "rar_driver.h" | ||
19 | |||
20 | /* The following defines are for the IPC process to retrieve RAR in */ | ||
21 | |||
22 | /* === Lincroft Message Bus Interface === */ | ||
23 | /* Message Control Register */ | ||
24 | #define LNC_MCR_OFFSET 0xD0 | ||
25 | |||
26 | /* Message Data Register */ | ||
27 | #define LNC_MDR_OFFSET 0xD4 | ||
28 | |||
29 | /* Message Opcodes */ | ||
30 | #define LNC_MESSAGE_READ_OPCODE 0xD0 | ||
31 | #define LNC_MESSAGE_WRITE_OPCODE 0xE0 | ||
32 | |||
33 | /* Message Write Byte Enables */ | ||
34 | #define LNC_MESSAGE_BYTE_WRITE_ENABLES 0xF | ||
35 | |||
36 | /* B-unit Port */ | ||
37 | #define LNC_BUNIT_PORT 0x3 | ||
38 | |||
39 | /* === Lincroft B-Unit Registers - Programmed by IA32 firmware === */ | ||
40 | #define LNC_BRAR0L 0x10 | ||
41 | #define LNC_BRAR0H 0x11 | ||
42 | #define LNC_BRAR1L 0x12 | ||
43 | #define LNC_BRAR1H 0x13 | ||
44 | |||
45 | /* Reserved for SeP */ | ||
46 | #define LNC_BRAR2L 0x14 | ||
47 | #define LNC_BRAR2H 0x15 | ||
48 | |||
49 | |||
50 | /* This structure is only used during module initialization. */ | ||
51 | struct RAR_offsets { | ||
52 | int low; /* Register offset for low RAR physical address. */ | ||
53 | int high; /* Register offset for high RAR physical address. */ | ||
54 | }; | ||
55 | |||
56 | struct pci_dev *rar_dev; | ||
57 | static uint32_t registered; | ||
58 | |||
59 | /* Moorestown supports three restricted access regions. */ | ||
60 | #define MRST_NUM_RAR 3 | ||
61 | |||
62 | struct RAR_address_struct rar_addr[MRST_NUM_RAR]; | ||
63 | |||
64 | /* prototype for init */ | ||
65 | static int __init rar_init_handler(void); | ||
66 | static void __exit rar_exit_handler(void); | ||
67 | |||
68 | /* | ||
69 | function that is activated on the successfull probe of the RAR device | ||
70 | */ | ||
71 | static int __devinit rar_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | ||
72 | |||
73 | static struct pci_device_id rar_pci_id_tbl[] = { | ||
74 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4110) }, | ||
75 | { 0 } | ||
76 | }; | ||
77 | |||
78 | MODULE_DEVICE_TABLE(pci, rar_pci_id_tbl); | ||
79 | |||
80 | /* field for registering driver to PCI device */ | ||
81 | static struct pci_driver rar_pci_driver = { | ||
82 | .name = "rar_driver", | ||
83 | .id_table = rar_pci_id_tbl, | ||
84 | .probe = rar_probe | ||
85 | }; | ||
86 | |||
87 | /* This function is used to retrieved RAR info using the IPC message | ||
88 | bus interface */ | ||
89 | static int memrar_get_rar_addr(struct pci_dev* pdev, | ||
90 | int offset, | ||
91 | u32 *addr) | ||
92 | { | ||
93 | /* | ||
94 | * ======== The Lincroft Message Bus Interface ======== | ||
95 | * Lincroft registers may be obtained from the PCI | ||
96 | * (the Host Bridge) using the Lincroft Message Bus | ||
97 | * Interface. That message bus interface is generally | ||
98 | * comprised of two registers: a control register (MCR, 0xDO) | ||
99 | * and a data register (MDR, 0xD4). | ||
100 | * | ||
101 | * The MCR (message control register) format is the following: | ||
102 | * 1. [31:24]: Opcode | ||
103 | * 2. [23:16]: Port | ||
104 | * 3. [15:8]: Register Offset | ||
105 | * 4. [7:4]: Byte Enables (use 0xF to set all of these bits | ||
106 | * to 1) | ||
107 | * 5. [3:0]: reserved | ||
108 | * | ||
109 | * Read (0xD0) and write (0xE0) opcodes are written to the | ||
110 | * control register when reading and writing to Lincroft | ||
111 | * registers, respectively. | ||
112 | * | ||
113 | * We're interested in registers found in the Lincroft | ||
114 | * B-unit. The B-unit port is 0x3. | ||
115 | * | ||
116 | * The six B-unit RAR register offsets we use are listed | ||
117 | * earlier in this file. | ||
118 | * | ||
119 | * Lastly writing to the MCR register requires the "Byte | ||
120 | * enables" bits to be set to 1. This may be achieved by | ||
121 | * writing 0xF at bit 4. | ||
122 | * | ||
123 | * The MDR (message data register) format is the following: | ||
124 | * 1. [31:0]: Read/Write Data | ||
125 | * | ||
126 | * Data being read from this register is only available after | ||
127 | * writing the appropriate control message to the MCR | ||
128 | * register. | ||
129 | * | ||
130 | * Data being written to this register must be written before | ||
131 | * writing the appropriate control message to the MCR | ||
132 | * register. | ||
133 | */ | ||
134 | |||
135 | int result = 0; /* result */ | ||
136 | /* Construct control message */ | ||
137 | u32 const message = | ||
138 | (LNC_MESSAGE_READ_OPCODE << 24) | ||
139 | | (LNC_BUNIT_PORT << 16) | ||
140 | | (offset << 8) | ||
141 | | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4); | ||
142 | |||
143 | printk(KERN_WARNING "rar- offset to LNC MSG is %x\n",offset); | ||
144 | |||
145 | if (addr == 0) | ||
146 | return -EINVAL; | ||
147 | |||
148 | /* Send the control message */ | ||
149 | result = pci_write_config_dword(pdev, | ||
150 | LNC_MCR_OFFSET, | ||
151 | message); | ||
152 | |||
153 | printk(KERN_WARNING "rar- result from send ctl register is %x\n" | ||
154 | ,result); | ||
155 | |||
156 | if (!result) | ||
157 | result = pci_read_config_dword(pdev, | ||
158 | LNC_MDR_OFFSET, | ||
159 | addr); | ||
160 | |||
161 | printk(KERN_WARNING "rar- result from read data register is %x\n", | ||
162 | result); | ||
163 | |||
164 | printk(KERN_WARNING "rar- value read from data register is %x\n", | ||
165 | *addr); | ||
166 | |||
167 | if (result) | ||
168 | return -1; | ||
169 | else | ||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | static int memrar_set_rar_addr(struct pci_dev* pdev, | ||
174 | int offset, | ||
175 | u32 addr) | ||
176 | { | ||
177 | /* | ||
178 | * ======== The Lincroft Message Bus Interface ======== | ||
179 | * Lincroft registers may be obtained from the PCI | ||
180 | * (the Host Bridge) using the Lincroft Message Bus | ||
181 | * Interface. That message bus interface is generally | ||
182 | * comprised of two registers: a control register (MCR, 0xDO) | ||
183 | * and a data register (MDR, 0xD4). | ||
184 | * | ||
185 | * The MCR (message control register) format is the following: | ||
186 | * 1. [31:24]: Opcode | ||
187 | * 2. [23:16]: Port | ||
188 | * 3. [15:8]: Register Offset | ||
189 | * 4. [7:4]: Byte Enables (use 0xF to set all of these bits | ||
190 | * to 1) | ||
191 | * 5. [3:0]: reserved | ||
192 | * | ||
193 | * Read (0xD0) and write (0xE0) opcodes are written to the | ||
194 | * control register when reading and writing to Lincroft | ||
195 | * registers, respectively. | ||
196 | * | ||
197 | * We're interested in registers found in the Lincroft | ||
198 | * B-unit. The B-unit port is 0x3. | ||
199 | * | ||
200 | * The six B-unit RAR register offsets we use are listed | ||
201 | * earlier in this file. | ||
202 | * | ||
203 | * Lastly writing to the MCR register requires the "Byte | ||
204 | * enables" bits to be set to 1. This may be achieved by | ||
205 | * writing 0xF at bit 4. | ||
206 | * | ||
207 | * The MDR (message data register) format is the following: | ||
208 | * 1. [31:0]: Read/Write Data | ||
209 | * | ||
210 | * Data being read from this register is only available after | ||
211 | * writing the appropriate control message to the MCR | ||
212 | * register. | ||
213 | * | ||
214 | * Data being written to this register must be written before | ||
215 | * writing the appropriate control message to the MCR | ||
216 | * register. | ||
217 | */ | ||
218 | |||
219 | int result = 0; /* result */ | ||
220 | |||
221 | /* Construct control message */ | ||
222 | u32 const message = | ||
223 | (LNC_MESSAGE_WRITE_OPCODE << 24) | ||
224 | | (LNC_BUNIT_PORT << 16) | ||
225 | | (offset << 8) | ||
226 | | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4); | ||
227 | |||
228 | printk(KERN_WARNING "rar- offset to LNC MSG is %x\n",offset); | ||
229 | |||
230 | if (addr == 0) | ||
231 | return -EINVAL; | ||
232 | |||
233 | /* Send the control message */ | ||
234 | result = pci_write_config_dword(pdev, | ||
235 | LNC_MDR_OFFSET, | ||
236 | addr); | ||
237 | |||
238 | printk(KERN_WARNING "rar- result from send ctl register is %x\n" | ||
239 | ,result); | ||
240 | |||
241 | if (!result) | ||
242 | result = pci_write_config_dword(pdev, | ||
243 | LNC_MCR_OFFSET, | ||
244 | message); | ||
245 | |||
246 | printk(KERN_WARNING "rar- result from write data register is %x\n", | ||
247 | result); | ||
248 | |||
249 | printk(KERN_WARNING "rar- value read to data register is %x\n", | ||
250 | addr); | ||
251 | |||
252 | if (result) | ||
253 | return -1; | ||
254 | else | ||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | /* | ||
259 | |||
260 | * Initialize RAR parameters, such as physical addresses, etc. | ||
261 | |||
262 | */ | ||
263 | static int memrar_init_rar_params(struct pci_dev *pdev) | ||
264 | { | ||
265 | struct RAR_offsets const offsets[] = { | ||
266 | { LNC_BRAR0L, LNC_BRAR0H }, | ||
267 | { LNC_BRAR1L, LNC_BRAR1H }, | ||
268 | { LNC_BRAR2L, LNC_BRAR2H } | ||
269 | }; | ||
270 | |||
271 | size_t const num_offsets = sizeof(offsets) / sizeof(offsets[0]); | ||
272 | struct RAR_offsets const *end = offsets + num_offsets; | ||
273 | struct RAR_offsets const *i; | ||
274 | unsigned int n = 0; | ||
275 | int result = 0; | ||
276 | |||
277 | /* Retrieve RAR start and end physical addresses. */ | ||
278 | |||
279 | /* | ||
280 | * Access the RAR registers through the Lincroft Message Bus | ||
281 | * Interface on PCI device: 00:00.0 Host bridge. | ||
282 | */ | ||
283 | |||
284 | /* struct pci_dev *pdev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); */ | ||
285 | |||
286 | if (pdev == NULL) | ||
287 | return -ENODEV; | ||
288 | |||
289 | for (i = offsets; i != end; ++i, ++n) { | ||
290 | if (memrar_get_rar_addr (pdev, | ||
291 | (*i).low, | ||
292 | &(rar_addr[n].low)) != 0 | ||
293 | || memrar_get_rar_addr (pdev, | ||
294 | (*i).high, | ||
295 | &(rar_addr[n].high)) != 0) { | ||
296 | result = -1; | ||
297 | break; | ||
298 | } | ||
299 | } | ||
300 | |||
301 | /* Done accessing the device. */ | ||
302 | /* pci_dev_put(pdev); */ | ||
303 | |||
304 | if (result == 0) { | ||
305 | if(1) { | ||
306 | size_t z; | ||
307 | for (z = 0; z != MRST_NUM_RAR; ++z) { | ||
308 | printk(KERN_WARNING "rar - BRAR[%Zd] physical address low\n" | ||
309 | "\tlow: 0x%08x\n" | ||
310 | "\thigh: 0x%08x\n", | ||
311 | z, | ||
312 | rar_addr[z].low, | ||
313 | rar_addr[z].high); | ||
314 | } | ||
315 | } | ||
316 | } | ||
317 | |||
318 | return result; | ||
319 | } | ||
320 | |||
321 | /* | ||
322 | function that is activated on the successfull probe of the RAR device | ||
323 | */ | ||
324 | static int __devinit rar_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
325 | { | ||
326 | /* error */ | ||
327 | int error; | ||
328 | |||
329 | /*------------------------ | ||
330 | CODE | ||
331 | ---------------------------*/ | ||
332 | |||
333 | DEBUG_PRINT_0(RAR_DEBUG_LEVEL_EXTENDED, | ||
334 | "Rar pci probe starting\n"); | ||
335 | error = 0; | ||
336 | |||
337 | /* enable the device */ | ||
338 | error = pci_enable_device(pdev); | ||
339 | if (error) { | ||
340 | DEBUG_PRINT_0(RAR_DEBUG_LEVEL_EXTENDED, | ||
341 | "error enabling pci device\n"); | ||
342 | goto end_function; | ||
343 | } | ||
344 | |||
345 | rar_dev = pdev; | ||
346 | registered = 1; | ||
347 | |||
348 | /* Initialize the RAR parameters, which have to be retrieved */ | ||
349 | /* via the message bus service */ | ||
350 | error=memrar_init_rar_params(rar_dev); | ||
351 | |||
352 | if (error) { | ||
353 | DEBUG_PRINT_0(RAR_DEBUG_LEVEL_EXTENDED, | ||
354 | "error getting RAR addresses device\n"); | ||
355 | registered = 0; | ||
356 | goto end_function; | ||
357 | } | ||
358 | |||
359 | end_function: | ||
360 | |||
361 | return error; | ||
362 | } | ||
363 | |||
364 | /* | ||
365 | this function registers th driver to | ||
366 | the device subsystem( either PCI, USB, etc) | ||
367 | */ | ||
368 | static int __init rar_init_handler(void) | ||
369 | { | ||
370 | return pci_register_driver(&rar_pci_driver); | ||
371 | } | ||
372 | |||
373 | static void __exit rar_exit_handler(void) | ||
374 | { | ||
375 | pci_unregister_driver(&rar_pci_driver); | ||
376 | } | ||
377 | |||
378 | module_init(rar_init_handler); | ||
379 | module_exit(rar_exit_handler); | ||
380 | |||
381 | MODULE_LICENSE("GPL"); | ||
382 | |||
383 | |||
384 | /* The get_rar_address function is used by other device drivers | ||
385 | * to obtain RAR address information on a RAR. It takes two | ||
386 | * parameter: | ||
387 | * | ||
388 | * int rar_index | ||
389 | * The rar_index is an index to the rar for which you wish to retrieve | ||
390 | * the address information. | ||
391 | * Values can be 0,1, or 2. | ||
392 | * | ||
393 | * struct RAR_address_struct is a pointer to a place to which the function | ||
394 | * can return the address structure for the RAR. | ||
395 | * | ||
396 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
397 | * facility on this system. | ||
398 | */ | ||
399 | int get_rar_address(int rar_index,struct RAR_address_struct *addresses) | ||
400 | { | ||
401 | if (registered && (rar_index < 3) && (rar_index >= 0)) { | ||
402 | *addresses=rar_addr[rar_index]; | ||
403 | /* strip off lock bit information */ | ||
404 | addresses->low = addresses->low & 0xfffffff0; | ||
405 | addresses->high = addresses->high & 0xfffffff0; | ||
406 | return 0; | ||
407 | } | ||
408 | |||
409 | else { | ||
410 | return -ENODEV; | ||
411 | } | ||
412 | } | ||
413 | |||
414 | |||
415 | EXPORT_SYMBOL(get_rar_address); | ||
416 | |||
417 | /* The lock_rar function is ued by other device drivers to lock an RAR. | ||
418 | * once an RAR is locked, it stays locked until the next system reboot. | ||
419 | * The function takes one parameter: | ||
420 | * | ||
421 | * int rar_index | ||
422 | * The rar_index is an index to the rar that you want to lock. | ||
423 | * Values can be 0,1, or 2. | ||
424 | * | ||
425 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
426 | * facility on this system. | ||
427 | */ | ||
428 | int lock_rar(int rar_index) | ||
429 | { | ||
430 | u32 working_addr; | ||
431 | int result; | ||
432 | if (registered && (rar_index < 3) && (rar_index >= 0)) { | ||
433 | /* first make sure that lock bits are clear (this does lock) */ | ||
434 | working_addr=rar_addr[rar_index].low & 0xfffffff0; | ||
435 | |||
436 | /* now send that value to the register using the IPC */ | ||
437 | result=memrar_set_rar_addr(rar_dev,rar_index,working_addr); | ||
438 | return result; | ||
439 | } | ||
440 | |||
441 | else { | ||
442 | return -ENODEV; | ||
443 | } | ||
444 | } | ||
diff --git a/drivers/staging/rar/rar_driver.h b/drivers/staging/rar/rar_driver.h deleted file mode 100644 index 3690f984ff55..000000000000 --- a/drivers/staging/rar/rar_driver.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | /* === RAR Physical Addresses === */ | ||
2 | struct RAR_address_struct { | ||
3 | u32 low; | ||
4 | u32 high; | ||
5 | }; | ||
6 | |||
7 | /* The get_rar_address function is used by other device drivers | ||
8 | * to obtain RAR address information on a RAR. It takes two | ||
9 | * parameter: | ||
10 | * | ||
11 | * int rar_index | ||
12 | * The rar_index is an index to the rar for which you wish to retrieve | ||
13 | * the address information. | ||
14 | * Values can be 0,1, or 2. | ||
15 | * | ||
16 | * struct RAR_address_struct is a pointer to a place to which the function | ||
17 | * can return the address structure for the RAR. | ||
18 | * | ||
19 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
20 | * facility on this system. | ||
21 | */ | ||
22 | int get_rar_address(int rar_index,struct RAR_address_struct *addresses); | ||
23 | |||
24 | |||
25 | /* The lock_rar function is ued by other device drivers to lock an RAR. | ||
26 | * once an RAR is locked, it stays locked until the next system reboot. | ||
27 | * The function takes one parameter: | ||
28 | * | ||
29 | * int rar_index | ||
30 | * The rar_index is an index to the rar that you want to lock. | ||
31 | * Values can be 0,1, or 2. | ||
32 | * | ||
33 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
34 | * facility on this system. | ||
35 | */ | ||
36 | int lock_rar(int rar_index); | ||
37 | |||
38 | |||
39 | /* DEBUG LEVEL MASKS */ | ||
40 | #define RAR_DEBUG_LEVEL_BASIC 0x1 | ||
41 | |||
42 | #define RAR_DEBUG_LEVEL_REGISTERS 0x2 | ||
43 | |||
44 | #define RAR_DEBUG_LEVEL_EXTENDED 0x4 | ||
45 | |||
46 | #define DEBUG_LEVEL 0x7 | ||
47 | |||
48 | /* FUNCTIONAL MACROS */ | ||
49 | |||
50 | /* debug macro without paramaters */ | ||
51 | #define DEBUG_PRINT_0(DEBUG_LEVEL , info) \ | ||
52 | do \ | ||
53 | { \ | ||
54 | if(DEBUG_LEVEL) \ | ||
55 | { \ | ||
56 | printk(KERN_WARNING info); \ | ||
57 | } \ | ||
58 | }while(0) | ||
59 | |||
60 | /* debug macro with 1 paramater */ | ||
61 | #define DEBUG_PRINT_1(DEBUG_LEVEL , info , param1) \ | ||
62 | do \ | ||
63 | { \ | ||
64 | if(DEBUG_LEVEL) \ | ||
65 | { \ | ||
66 | printk(KERN_WARNING info , param1); \ | ||
67 | } \ | ||
68 | }while(0) | ||
69 | |||
70 | /* debug macro with 2 paramaters */ | ||
71 | #define DEBUG_PRINT_2(DEBUG_LEVEL , info , param1, param2) \ | ||
72 | do \ | ||
73 | { \ | ||
74 | if(DEBUG_LEVEL) \ | ||
75 | { \ | ||
76 | printk(KERN_WARNING info , param1, param2); \ | ||
77 | } \ | ||
78 | }while(0) | ||
79 | |||
80 | /* debug macro with 3 paramaters */ | ||
81 | #define DEBUG_PRINT_3(DEBUG_LEVEL , info , param1, param2 , param3) \ | ||
82 | do \ | ||
83 | { \ | ||
84 | if(DEBUG_LEVEL) \ | ||
85 | { \ | ||
86 | printk(KERN_WARNING info , param1, param2 , param3); \ | ||
87 | } \ | ||
88 | }while(0) | ||
89 | |||
90 | /* debug macro with 4 paramaters */ | ||
91 | #define DEBUG_PRINT_4(DEBUG_LEVEL , info , param1, param2 , param3 , param4) \ | ||
92 | do \ | ||
93 | { \ | ||
94 | if(DEBUG_LEVEL) \ | ||
95 | { \ | ||
96 | printk(KERN_WARNING info , param1, param2 , param3 , param4); \ | ||
97 | } \ | ||
98 | }while(0) | ||
99 | |||
diff --git a/drivers/staging/rar_register/Kconfig b/drivers/staging/rar_register/Kconfig new file mode 100644 index 000000000000..3f73839643e9 --- /dev/null +++ b/drivers/staging/rar_register/Kconfig | |||
@@ -0,0 +1,30 @@ | |||
1 | # | ||
2 | # RAR device configuration | ||
3 | # | ||
4 | |||
5 | menu "RAR Register Driver" | ||
6 | # | ||
7 | # Restricted Access Register Manager | ||
8 | # | ||
9 | config RAR_REGISTER | ||
10 | tristate "Restricted Access Region Register Driver" | ||
11 | default n | ||
12 | ---help--- | ||
13 | This driver allows other kernel drivers access to the | ||
14 | contents of the restricted access region control | ||
15 | registers. | ||
16 | |||
17 | The restricted access region control registers | ||
18 | (rar_registers) are used to pass address and | ||
19 | locking information on restricted access regions | ||
20 | to other drivers that use restricted access regions | ||
21 | |||
22 | The restricted access regions are regions of memory | ||
23 | on the Intel MID Platform that are not accessible to | ||
24 | the x86 processor, but are accessible to dedicated | ||
25 | processors on board peripheral devices. | ||
26 | |||
27 | The purpose of the restricted access regions is to | ||
28 | protect sensitive data from compromise by unauthorized | ||
29 | programs running on the x86 processor. | ||
30 | endmenu | ||
diff --git a/drivers/staging/rar_register/Makefile b/drivers/staging/rar_register/Makefile new file mode 100644 index 000000000000..d5954ccc16c9 --- /dev/null +++ b/drivers/staging/rar_register/Makefile | |||
@@ -0,0 +1,2 @@ | |||
1 | EXTRA_CFLAGS += -DLITTLE__ENDIAN | ||
2 | obj-$(CONFIG_RAR_REGISTER) += rar_register.o | ||
diff --git a/drivers/staging/rar_register/rar_register.c b/drivers/staging/rar_register/rar_register.c new file mode 100644 index 000000000000..bfc0e31f1a6f --- /dev/null +++ b/drivers/staging/rar_register/rar_register.c | |||
@@ -0,0 +1,615 @@ | |||
1 | /* | ||
2 | * rar_register.c - An Intel Restricted Access Region register driver | ||
3 | * | ||
4 | * Copyright(c) 2009 Intel Corporation. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License as | ||
8 | * published by the Free Software Foundation; either version 2 of the | ||
9 | * License, or (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA | ||
19 | * 02111-1307, USA. | ||
20 | * | ||
21 | * ------------------------------------------------------------------- | ||
22 | * 20091204 Mark Allyn <mark.a.allyn@intel.com> | ||
23 | * Ossama Othman <ossama.othman@intel.com> | ||
24 | * Cleanup per feedback from Alan Cox and Arjan Van De Ven | ||
25 | * | ||
26 | * 20090806 Ossama Othman <ossama.othman@intel.com> | ||
27 | * Return zero high address if upper 22 bits is zero. | ||
28 | * Cleaned up checkpatch errors. | ||
29 | * Clarified that driver is dealing with bus addresses. | ||
30 | * | ||
31 | * 20090702 Ossama Othman <ossama.othman@intel.com> | ||
32 | * Removed unnecessary include directives | ||
33 | * Cleaned up spinlocks. | ||
34 | * Cleaned up logging. | ||
35 | * Improved invalid parameter checks. | ||
36 | * Fixed and simplified RAR address retrieval and RAR locking | ||
37 | * code. | ||
38 | * | ||
39 | * 20090626 Mark Allyn <mark.a.allyn@intel.com> | ||
40 | * Initial publish | ||
41 | */ | ||
42 | |||
43 | #define DEBUG 1 | ||
44 | |||
45 | #include "rar_register.h" | ||
46 | |||
47 | #include <linux/module.h> | ||
48 | #include <linux/pci.h> | ||
49 | #include <linux/spinlock.h> | ||
50 | #include <linux/device.h> | ||
51 | #include <linux/kernel.h> | ||
52 | |||
53 | /* === Lincroft Message Bus Interface === */ | ||
54 | /* Message Control Register */ | ||
55 | #define LNC_MCR_OFFSET 0xD0 | ||
56 | |||
57 | /* Maximum number of clients (other drivers using this driver) */ | ||
58 | #define MAX_RAR_CLIENTS 10 | ||
59 | |||
60 | /* Message Data Register */ | ||
61 | #define LNC_MDR_OFFSET 0xD4 | ||
62 | |||
63 | /* Message Opcodes */ | ||
64 | #define LNC_MESSAGE_READ_OPCODE 0xD0 | ||
65 | #define LNC_MESSAGE_WRITE_OPCODE 0xE0 | ||
66 | |||
67 | /* Message Write Byte Enables */ | ||
68 | #define LNC_MESSAGE_BYTE_WRITE_ENABLES 0xF | ||
69 | |||
70 | /* B-unit Port */ | ||
71 | #define LNC_BUNIT_PORT 0x3 | ||
72 | |||
73 | /* === Lincroft B-Unit Registers - Programmed by IA32 firmware === */ | ||
74 | #define LNC_BRAR0L 0x10 | ||
75 | #define LNC_BRAR0H 0x11 | ||
76 | #define LNC_BRAR1L 0x12 | ||
77 | #define LNC_BRAR1H 0x13 | ||
78 | |||
79 | /* Reserved for SeP */ | ||
80 | #define LNC_BRAR2L 0x14 | ||
81 | #define LNC_BRAR2H 0x15 | ||
82 | |||
83 | /* Moorestown supports three restricted access regions. */ | ||
84 | #define MRST_NUM_RAR 3 | ||
85 | |||
86 | |||
87 | /* RAR Bus Address Range */ | ||
88 | struct RAR_address_range { | ||
89 | dma_addr_t low; | ||
90 | dma_addr_t high; | ||
91 | }; | ||
92 | |||
93 | /* Structure containing low and high RAR register offsets. */ | ||
94 | struct RAR_offsets { | ||
95 | u32 low; /* Register offset for low RAR bus address. */ | ||
96 | u32 high; /* Register offset for high RAR bus address. */ | ||
97 | }; | ||
98 | |||
99 | struct client { | ||
100 | int (*client_callback)(void *client_data); | ||
101 | void *customer_data; | ||
102 | int client_called; | ||
103 | }; | ||
104 | |||
105 | static DEFINE_MUTEX(rar_mutex); | ||
106 | static DEFINE_MUTEX(lnc_reg_mutex); | ||
107 | |||
108 | struct RAR_device { | ||
109 | struct RAR_offsets const rar_offsets[MRST_NUM_RAR]; | ||
110 | struct RAR_address_range rar_addr[MRST_NUM_RAR]; | ||
111 | struct pci_dev *rar_dev; | ||
112 | bool registered; | ||
113 | }; | ||
114 | |||
115 | /* this platform has only one rar_device for 3 rar regions */ | ||
116 | static struct RAR_device my_rar_device = { | ||
117 | .rar_offsets = { | ||
118 | [0].low = LNC_BRAR0L, | ||
119 | [0].high = LNC_BRAR0H, | ||
120 | [1].low = LNC_BRAR1L, | ||
121 | [1].high = LNC_BRAR1H, | ||
122 | [2].low = LNC_BRAR2L, | ||
123 | [2].high = LNC_BRAR2H | ||
124 | } | ||
125 | }; | ||
126 | |||
127 | /* this data is for handling requests from other drivers which arrive | ||
128 | * prior to this driver initializing | ||
129 | */ | ||
130 | |||
131 | static struct client clients[MAX_RAR_CLIENTS]; | ||
132 | static int num_clients; | ||
133 | |||
134 | /* | ||
135 | * This function is used to retrieved RAR info using the Lincroft | ||
136 | * message bus interface. | ||
137 | */ | ||
138 | static int retrieve_rar_addr(struct pci_dev *pdev, | ||
139 | int offset, | ||
140 | dma_addr_t *addr) | ||
141 | { | ||
142 | /* | ||
143 | * ======== The Lincroft Message Bus Interface ======== | ||
144 | * Lincroft registers may be obtained from the PCI | ||
145 | * (the Host Bridge) using the Lincroft Message Bus | ||
146 | * Interface. That message bus interface is generally | ||
147 | * comprised of two registers: a control register (MCR, 0xDO) | ||
148 | * and a data register (MDR, 0xD4). | ||
149 | * | ||
150 | * The MCR (message control register) format is the following: | ||
151 | * 1. [31:24]: Opcode | ||
152 | * 2. [23:16]: Port | ||
153 | * 3. [15:8]: Register Offset | ||
154 | * 4. [7:4]: Byte Enables (use 0xF to set all of these bits | ||
155 | * to 1) | ||
156 | * 5. [3:0]: reserved | ||
157 | * | ||
158 | * Read (0xD0) and write (0xE0) opcodes are written to the | ||
159 | * control register when reading and writing to Lincroft | ||
160 | * registers, respectively. | ||
161 | * | ||
162 | * We're interested in registers found in the Lincroft | ||
163 | * B-unit. The B-unit port is 0x3. | ||
164 | * | ||
165 | * The six B-unit RAR register offsets we use are listed | ||
166 | * earlier in this file. | ||
167 | * | ||
168 | * Lastly writing to the MCR register requires the "Byte | ||
169 | * enables" bits to be set to 1. This may be achieved by | ||
170 | * writing 0xF at bit 4. | ||
171 | * | ||
172 | * The MDR (message data register) format is the following: | ||
173 | * 1. [31:0]: Read/Write Data | ||
174 | * | ||
175 | * Data being read from this register is only available after | ||
176 | * writing the appropriate control message to the MCR | ||
177 | * register. | ||
178 | * | ||
179 | * Data being written to this register must be written before | ||
180 | * writing the appropriate control message to the MCR | ||
181 | * register. | ||
182 | */ | ||
183 | |||
184 | int result; | ||
185 | |||
186 | /* Construct control message */ | ||
187 | u32 const message = | ||
188 | (LNC_MESSAGE_READ_OPCODE << 24) | ||
189 | | (LNC_BUNIT_PORT << 16) | ||
190 | | (offset << 8) | ||
191 | | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4); | ||
192 | |||
193 | dev_dbg(&pdev->dev, "Offset for 'get' LNC MSG is %x\n", offset); | ||
194 | |||
195 | if (addr == 0) { | ||
196 | WARN_ON(1); | ||
197 | return -EINVAL; | ||
198 | } | ||
199 | |||
200 | /* | ||
201 | * We synchronize access to the Lincroft MCR and MDR registers | ||
202 | * until BOTH the command is issued through the MCR register | ||
203 | * and the corresponding data is read from the MDR register. | ||
204 | * Otherwise a race condition would exist between accesses to | ||
205 | * both registers. | ||
206 | */ | ||
207 | |||
208 | mutex_lock(&lnc_reg_mutex); | ||
209 | |||
210 | /* Send the control message */ | ||
211 | result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message); | ||
212 | |||
213 | dev_dbg(&pdev->dev, "Result from send ctl register is %x\n", result); | ||
214 | |||
215 | if (!result) { | ||
216 | result = pci_read_config_dword(pdev, LNC_MDR_OFFSET, | ||
217 | (u32 *)addr); | ||
218 | dev_dbg(&pdev->dev, | ||
219 | "Result from read data register is %x\n", result); | ||
220 | |||
221 | dev_dbg(&pdev->dev, | ||
222 | "Value read from data register is %lx\n", | ||
223 | (unsigned long)*addr); | ||
224 | } | ||
225 | |||
226 | mutex_unlock(&lnc_reg_mutex); | ||
227 | |||
228 | return result; | ||
229 | } | ||
230 | |||
231 | static int set_rar_address(struct pci_dev *pdev, | ||
232 | int offset, | ||
233 | dma_addr_t addr) | ||
234 | { | ||
235 | /* | ||
236 | * Data being written to this register must be written before | ||
237 | * writing the appropriate control message to the MCR | ||
238 | * register. | ||
239 | * @note See rar_get_address() for a description of the | ||
240 | * message bus interface being used here. | ||
241 | */ | ||
242 | |||
243 | int result = 0; | ||
244 | |||
245 | /* Construct control message */ | ||
246 | u32 const message = (LNC_MESSAGE_WRITE_OPCODE << 24) | ||
247 | | (LNC_BUNIT_PORT << 16) | ||
248 | | (offset << 8) | ||
249 | | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4); | ||
250 | |||
251 | if (addr == 0) { | ||
252 | WARN_ON(1); | ||
253 | return -EINVAL; | ||
254 | } | ||
255 | |||
256 | dev_dbg(&pdev->dev, "Offset for 'set' LNC MSG is %x\n", offset); | ||
257 | |||
258 | /* | ||
259 | * We synchronize access to the Lincroft MCR and MDR registers | ||
260 | * until BOTH the command is issued through the MCR register | ||
261 | * and the corresponding data is read from the MDR register. | ||
262 | * Otherwise a race condition would exist between accesses to | ||
263 | * both registers. | ||
264 | */ | ||
265 | |||
266 | mutex_lock(&lnc_reg_mutex); | ||
267 | |||
268 | /* Send the control message */ | ||
269 | result = pci_write_config_dword(pdev, LNC_MDR_OFFSET, addr); | ||
270 | |||
271 | dev_dbg(&pdev->dev, "Result from write data register is %x\n", result); | ||
272 | |||
273 | if (!result) { | ||
274 | dev_dbg(&pdev->dev, | ||
275 | "Value written to data register is %lx\n", | ||
276 | (unsigned long)addr); | ||
277 | |||
278 | result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message); | ||
279 | |||
280 | dev_dbg(&pdev->dev, "Result from send ctl register is %x\n", | ||
281 | result); | ||
282 | } | ||
283 | |||
284 | mutex_unlock(&lnc_reg_mutex); | ||
285 | |||
286 | return result; | ||
287 | } | ||
288 | |||
289 | /* | ||
290 | * Initialize RAR parameters, such as bus addresses, etc. | ||
291 | */ | ||
292 | static int init_rar_params(struct pci_dev *pdev) | ||
293 | { | ||
294 | unsigned int i; | ||
295 | int result = 0; | ||
296 | |||
297 | /* Retrieve RAR start and end bus addresses. | ||
298 | * Access the RAR registers through the Lincroft Message Bus | ||
299 | * Interface on PCI device: 00:00.0 Host bridge. | ||
300 | */ | ||
301 | |||
302 | for (i = 0; i < MRST_NUM_RAR; ++i) { | ||
303 | struct RAR_offsets const *offset = | ||
304 | &my_rar_device.rar_offsets[i]; | ||
305 | struct RAR_address_range *addr = &my_rar_device.rar_addr[i]; | ||
306 | |||
307 | if ((retrieve_rar_addr(pdev, offset->low, &addr->low) != 0) | ||
308 | || (retrieve_rar_addr(pdev, offset->high, &addr->high) != 0)) { | ||
309 | result = -1; | ||
310 | break; | ||
311 | } | ||
312 | |||
313 | /* | ||
314 | * Only the upper 22 bits of the RAR addresses are | ||
315 | * stored in their corresponding RAR registers so we | ||
316 | * must set the lower 10 bits accordingly. | ||
317 | |||
318 | * The low address has its lower 10 bits cleared, and | ||
319 | * the high address has all its lower 10 bits set, | ||
320 | * e.g.: | ||
321 | * low = 0x2ffffc00 | ||
322 | */ | ||
323 | |||
324 | addr->low &= (dma_addr_t)0xfffffc00u; | ||
325 | |||
326 | /* | ||
327 | * Set bits 9:0 on uppser address if bits 31:10 are non | ||
328 | * zero; otherwize clear all bits | ||
329 | */ | ||
330 | |||
331 | if ((addr->high & 0xfffffc00u) == 0) | ||
332 | addr->high = 0; | ||
333 | else | ||
334 | addr->high |= 0x3ffu; | ||
335 | } | ||
336 | /* Done accessing the device. */ | ||
337 | |||
338 | if (result == 0) { | ||
339 | int z; | ||
340 | for (z = 0; z != MRST_NUM_RAR; ++z) { | ||
341 | /* | ||
342 | * "BRAR" refers to the RAR registers in the | ||
343 | * Lincroft B-unit. | ||
344 | */ | ||
345 | dev_info(&pdev->dev, "BRAR[%u] bus address range = " | ||
346 | "[%lx, %lx]\n", z, | ||
347 | (unsigned long)my_rar_device.rar_addr[z].low, | ||
348 | (unsigned long)my_rar_device.rar_addr[z].high); | ||
349 | } | ||
350 | } | ||
351 | |||
352 | return result; | ||
353 | } | ||
354 | |||
355 | /* | ||
356 | * The rar_get_address function is used by other device drivers | ||
357 | * to obtain RAR address information on a RAR. It takes three | ||
358 | * parameters: | ||
359 | * | ||
360 | * int rar_index | ||
361 | * The rar_index is an index to the rar for which you wish to retrieve | ||
362 | * the address information. | ||
363 | * Values can be 0,1, or 2. | ||
364 | * | ||
365 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
366 | * facility on this system. | ||
367 | */ | ||
368 | int rar_get_address(int rar_index, | ||
369 | dma_addr_t *start_address, | ||
370 | dma_addr_t *end_address) | ||
371 | { | ||
372 | int result = -ENODEV; | ||
373 | |||
374 | if (my_rar_device.registered) { | ||
375 | if (start_address == 0 || end_address == 0 | ||
376 | || rar_index >= MRST_NUM_RAR || rar_index < 0) { | ||
377 | result = -EINVAL; | ||
378 | } else { | ||
379 | *start_address = | ||
380 | my_rar_device.rar_addr[rar_index].low; | ||
381 | *end_address = | ||
382 | my_rar_device.rar_addr[rar_index].high; | ||
383 | |||
384 | result = 0; | ||
385 | } | ||
386 | } | ||
387 | |||
388 | return result; | ||
389 | } | ||
390 | EXPORT_SYMBOL(rar_get_address); | ||
391 | |||
392 | /* | ||
393 | * The rar_lock function is ued by other device drivers to lock an RAR. | ||
394 | * once an RAR is locked, it stays locked until the next system reboot. | ||
395 | * The function takes one parameter: | ||
396 | * | ||
397 | * int rar_index | ||
398 | * The rar_index is an index to the rar that you want to lock. | ||
399 | * Values can be 0,1, or 2. | ||
400 | * | ||
401 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
402 | * facility on this system. | ||
403 | */ | ||
404 | int rar_lock(int rar_index) | ||
405 | { | ||
406 | int result = -ENODEV; | ||
407 | |||
408 | if (rar_index >= MRST_NUM_RAR || rar_index < 0) { | ||
409 | result = -EINVAL; | ||
410 | return result; | ||
411 | } | ||
412 | |||
413 | dev_dbg(&my_rar_device.rar_dev->dev, "rar_lock mutex locking\n"); | ||
414 | mutex_lock(&rar_mutex); | ||
415 | |||
416 | if (my_rar_device.registered) { | ||
417 | |||
418 | dma_addr_t low = my_rar_device.rar_addr[rar_index].low & | ||
419 | 0xfffffc00u; | ||
420 | |||
421 | dma_addr_t high = my_rar_device.rar_addr[rar_index].high & | ||
422 | 0xfffffc00u; | ||
423 | |||
424 | /* | ||
425 | * Only allow I/O from the graphics and Langwell; | ||
426 | * Not from the x96 processor | ||
427 | */ | ||
428 | if (rar_index == (int)RAR_TYPE_VIDEO) { | ||
429 | low |= 0x00000009; | ||
430 | high |= 0x00000015; | ||
431 | } | ||
432 | |||
433 | else if (rar_index == (int)RAR_TYPE_AUDIO) { | ||
434 | /* Only allow I/O from Langwell; nothing from x86 */ | ||
435 | low |= 0x00000008; | ||
436 | high |= 0x00000018; | ||
437 | } | ||
438 | |||
439 | else | ||
440 | /* Read-only from all agents */ | ||
441 | high |= 0x00000018; | ||
442 | |||
443 | /* | ||
444 | * Now program the register using the Lincroft message | ||
445 | * bus interface. | ||
446 | */ | ||
447 | result = set_rar_address(my_rar_device.rar_dev, | ||
448 | my_rar_device.rar_offsets[rar_index].low, | ||
449 | low); | ||
450 | |||
451 | if (result == 0) | ||
452 | result = set_rar_address( | ||
453 | my_rar_device.rar_dev, | ||
454 | my_rar_device.rar_offsets[rar_index].high, | ||
455 | high); | ||
456 | } | ||
457 | |||
458 | dev_dbg(&my_rar_device.rar_dev->dev, "rar_lock mutex unlocking\n"); | ||
459 | mutex_unlock(&rar_mutex); | ||
460 | return result; | ||
461 | } | ||
462 | EXPORT_SYMBOL(rar_lock); | ||
463 | |||
464 | /* The register_rar function is to used by other device drivers | ||
465 | * to ensure that this driver is ready. As we cannot be sure of | ||
466 | * the compile/execute order of dirvers in ther kernel, it is | ||
467 | * best to give this driver a callback function to call when | ||
468 | * it is ready to give out addresses. The callback function | ||
469 | * would have those steps that continue the initialization of | ||
470 | * a driver that do require a valid RAR address. One of those | ||
471 | * steps would be to call rar_get_address() | ||
472 | * This function return 0 on success an -1 on failure. | ||
473 | */ | ||
474 | int register_rar(int (*callback)(void *yourparameter), void *yourparameter) | ||
475 | { | ||
476 | |||
477 | int result = -ENODEV; | ||
478 | |||
479 | if (callback == NULL) | ||
480 | return -EINVAL; | ||
481 | |||
482 | mutex_lock(&rar_mutex); | ||
483 | |||
484 | if (my_rar_device.registered) { | ||
485 | |||
486 | mutex_unlock(&rar_mutex); | ||
487 | /* | ||
488 | * if the driver already registered, then we can simply | ||
489 | * call the callback right now | ||
490 | */ | ||
491 | |||
492 | return (*callback)(yourparameter); | ||
493 | } | ||
494 | |||
495 | if (num_clients < MRST_NUM_RAR) { | ||
496 | |||
497 | clients[num_clients].client_callback = callback; | ||
498 | clients[num_clients].customer_data = yourparameter; | ||
499 | num_clients += 1; | ||
500 | result = 0; | ||
501 | } | ||
502 | |||
503 | mutex_unlock(&rar_mutex); | ||
504 | return result; | ||
505 | |||
506 | } | ||
507 | EXPORT_SYMBOL(register_rar); | ||
508 | |||
509 | /* Suspend - returns -ENOSYS */ | ||
510 | static int rar_suspend(struct pci_dev *dev, pm_message_t state) | ||
511 | { | ||
512 | return -ENOSYS; | ||
513 | } | ||
514 | |||
515 | static int rar_resume(struct pci_dev *dev) | ||
516 | { | ||
517 | return -ENOSYS; | ||
518 | } | ||
519 | |||
520 | /* | ||
521 | * This function registers the driver with the device subsystem ( | ||
522 | * either PCI, USB, etc). | ||
523 | * Function that is activaed on the succesful probe of the RAR device | ||
524 | * (Moorestown host controller). | ||
525 | */ | ||
526 | static int rar_probe(struct pci_dev *dev, const struct pci_device_id *id) | ||
527 | { | ||
528 | int error; | ||
529 | int counter; | ||
530 | |||
531 | dev_dbg(&dev->dev, "PCI probe starting\n"); | ||
532 | |||
533 | /* enable the device */ | ||
534 | error = pci_enable_device(dev); | ||
535 | if (error) { | ||
536 | dev_err(&dev->dev, | ||
537 | "Error enabling RAR register PCI device\n"); | ||
538 | goto end_function; | ||
539 | } | ||
540 | |||
541 | /* we have only one device; fill in the rar_device structure */ | ||
542 | my_rar_device.rar_dev = dev; | ||
543 | |||
544 | /* | ||
545 | * Initialize the RAR parameters, which have to be retrieved | ||
546 | * via the message bus interface. | ||
547 | */ | ||
548 | error = init_rar_params(dev); | ||
549 | if (error) { | ||
550 | pci_disable_device(dev); | ||
551 | |||
552 | dev_err(&dev->dev, | ||
553 | "Error retrieving RAR addresses\n"); | ||
554 | |||
555 | goto end_function; | ||
556 | } | ||
557 | |||
558 | dev_dbg(&dev->dev, "PCI probe locking\n"); | ||
559 | mutex_lock(&rar_mutex); | ||
560 | my_rar_device.registered = 1; | ||
561 | |||
562 | /* now call anyone who has registered (using callbacks) */ | ||
563 | for (counter = 0; counter < num_clients; counter += 1) { | ||
564 | if (clients[counter].client_callback) { | ||
565 | error = (*clients[counter].client_callback)( | ||
566 | clients[counter].customer_data); | ||
567 | /* set callback to NULL to indicate it has been done */ | ||
568 | clients[counter].client_callback = NULL; | ||
569 | dev_dbg(&my_rar_device.rar_dev->dev, | ||
570 | "Callback called for %d\n", | ||
571 | counter); | ||
572 | } | ||
573 | } | ||
574 | |||
575 | dev_dbg(&dev->dev, "PCI probe unlocking\n"); | ||
576 | mutex_unlock(&rar_mutex); | ||
577 | |||
578 | end_function: | ||
579 | |||
580 | return error; | ||
581 | } | ||
582 | |||
583 | const struct pci_device_id rar_pci_id_tbl[] = { | ||
584 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_RAR_DEVICE_ID) }, | ||
585 | { 0 } | ||
586 | }; | ||
587 | |||
588 | MODULE_DEVICE_TABLE(pci, rar_pci_id_tbl); | ||
589 | |||
590 | const struct pci_device_id *my_id_table = rar_pci_id_tbl; | ||
591 | |||
592 | /* field for registering driver to PCI device */ | ||
593 | static struct pci_driver rar_pci_driver = { | ||
594 | .name = "rar_register_driver", | ||
595 | .id_table = rar_pci_id_tbl, | ||
596 | .probe = rar_probe, | ||
597 | .suspend = rar_suspend, | ||
598 | .resume = rar_resume | ||
599 | }; | ||
600 | |||
601 | static int __init rar_init_handler(void) | ||
602 | { | ||
603 | return pci_register_driver(&rar_pci_driver); | ||
604 | } | ||
605 | |||
606 | static void __exit rar_exit_handler(void) | ||
607 | { | ||
608 | pci_unregister_driver(&rar_pci_driver); | ||
609 | } | ||
610 | |||
611 | module_init(rar_init_handler); | ||
612 | module_exit(rar_exit_handler); | ||
613 | |||
614 | MODULE_LICENSE("GPL"); | ||
615 | MODULE_DESCRIPTION("Intel Restricted Access Region Register Driver"); | ||
diff --git a/drivers/staging/rar_register/rar_register.h b/drivers/staging/rar_register/rar_register.h new file mode 100644 index 000000000000..29ade0f361d2 --- /dev/null +++ b/drivers/staging/rar_register/rar_register.h | |||
@@ -0,0 +1,84 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Intel Corporation. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of version 2 of the GNU General | ||
6 | * Public License as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be | ||
9 | * useful, but WITHOUT ANY WARRANTY; without even the implied | ||
10 | * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR | ||
11 | * PURPOSE. See the GNU General Public License for more details. | ||
12 | * You should have received a copy of the GNU General Public | ||
13 | * License along with this program; if not, write to the Free | ||
14 | * Software Foundation, Inc., 59 Temple Place - Suite 330, | ||
15 | * Boston, MA 02111-1307, USA. | ||
16 | * The full GNU General Public License is included in this | ||
17 | * distribution in the file called COPYING. | ||
18 | */ | ||
19 | |||
20 | |||
21 | #ifndef _RAR_REGISTER_H | ||
22 | #define _RAR_REGISTER_H | ||
23 | |||
24 | # include <linux/types.h> | ||
25 | |||
26 | /* following are used both in drivers as well as user space apps */ | ||
27 | enum RAR_type { | ||
28 | RAR_TYPE_VIDEO = 0, | ||
29 | RAR_TYPE_AUDIO, | ||
30 | RAR_TYPE_IMAGE, | ||
31 | RAR_TYPE_DATA | ||
32 | }; | ||
33 | |||
34 | #ifdef __KERNEL__ | ||
35 | |||
36 | /* PCI device id for controller */ | ||
37 | #define PCI_RAR_DEVICE_ID 0x4110 | ||
38 | |||
39 | /* The register_rar function is to used by other device drivers | ||
40 | * to ensure that this driver is ready. As we cannot be sure of | ||
41 | * the compile/execute order of dirvers in ther kernel, it is | ||
42 | * best to give this driver a callback function to call when | ||
43 | * it is ready to give out addresses. The callback function | ||
44 | * would have those steps that continue the initialization of | ||
45 | * a driver that do require a valid RAR address. One of those | ||
46 | * steps would be to call get_rar_address() | ||
47 | * This function return 0 on success an -1 on failure. | ||
48 | */ | ||
49 | int register_rar(int (*callback)(void *yourparameter), void *yourparameter); | ||
50 | |||
51 | /* The get_rar_address function is used by other device drivers | ||
52 | * to obtain RAR address information on a RAR. It takes two | ||
53 | * parameter: | ||
54 | * | ||
55 | * int rar_index | ||
56 | * The rar_index is an index to the rar for which you wish to retrieve | ||
57 | * the address information. | ||
58 | * Values can be 0,1, or 2. | ||
59 | * | ||
60 | * struct RAR_address_struct is a pointer to a place to which the function | ||
61 | * can return the address structure for the RAR. | ||
62 | * | ||
63 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
64 | * facility on this system. | ||
65 | */ | ||
66 | int rar_get_address(int rar_index, | ||
67 | dma_addr_t *start_address, | ||
68 | dma_addr_t *end_address); | ||
69 | |||
70 | /* The lock_rar function is ued by other device drivers to lock an RAR. | ||
71 | * once an RAR is locked, it stays locked until the next system reboot. | ||
72 | * The function takes one parameter: | ||
73 | * | ||
74 | * int rar_index | ||
75 | * The rar_index is an index to the rar that you want to lock. | ||
76 | * Values can be 0,1, or 2. | ||
77 | * | ||
78 | * The function returns a 0 upon success or a -1 if there is no RAR | ||
79 | * facility on this system. | ||
80 | */ | ||
81 | int rar_lock(int rar_index); | ||
82 | |||
83 | #endif /* __KERNEL__ */ | ||
84 | #endif /* _RAR_REGISTER_H */ | ||
diff --git a/drivers/staging/rt2860/Kconfig b/drivers/staging/rt2860/Kconfig index f9962b693128..f3a7e47df5e9 100644 --- a/drivers/staging/rt2860/Kconfig +++ b/drivers/staging/rt2860/Kconfig | |||
@@ -3,6 +3,8 @@ config RT2860 | |||
3 | depends on PCI && X86 && WLAN | 3 | depends on PCI && X86 && WLAN |
4 | select WIRELESS_EXT | 4 | select WIRELESS_EXT |
5 | select WEXT_PRIV | 5 | select WEXT_PRIV |
6 | select CRC_CCITT | ||
7 | select FW_LOADER | ||
6 | ---help--- | 8 | ---help--- |
7 | This is an experimental driver for the Ralink 2860 and 3090 | 9 | This is an experimental driver for the Ralink 2860 and 3090 |
8 | wireless chips. | 10 | wireless chips. |
diff --git a/drivers/staging/rt2860/common/firmware.h b/drivers/staging/rt2860/common/firmware.h deleted file mode 100644 index 2fecd32f7600..000000000000 --- a/drivers/staging/rt2860/common/firmware.h +++ /dev/null | |||
@@ -1,558 +0,0 @@ | |||
1 | /* | ||
2 | Copyright (c) 2007, Ralink Technology Corporation | ||
3 | All rights reserved. | ||
4 | |||
5 | Redistribution. Redistribution and use in binary form, without | ||
6 | modification, are permitted provided that the following conditions are | ||
7 | met: | ||
8 | |||
9 | * Redistributions must reproduce the above copyright notice and the | ||
10 | following disclaimer in the documentation and/or other materials | ||
11 | provided with the distribution. | ||
12 | * Neither the name of Ralink Technology Corporation nor the names of its | ||
13 | suppliers may be used to endorse or promote products derived from this | ||
14 | software without specific prior written permission. | ||
15 | * No reverse engineering, decompilation, or disassembly of this software | ||
16 | is permitted. | ||
17 | |||
18 | Limited patent license. Ralink Technology Corporation grants a world-wide, | ||
19 | royalty-free, non-exclusive license under patents it now or hereafter | ||
20 | owns or controls to make, have made, use, import, offer to sell and | ||
21 | sell ("Utilize") this software, but solely to the extent that any | ||
22 | such patent is necessary to Utilize the software alone, or in | ||
23 | combination with an operating system licensed under an approved Open | ||
24 | Source license as listed by the Open Source Initiative at | ||
25 | http://opensource.org/licenses. The patent license shall not apply to | ||
26 | any other combinations which include this software. No hardware per | ||
27 | se is licensed hereunder. | ||
28 | |||
29 | DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
30 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, | ||
31 | BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND | ||
32 | FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | ||
33 | COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
34 | INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
35 | BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | ||
36 | OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
37 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | ||
38 | TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | ||
39 | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
40 | DAMAGE. | ||
41 | */ | ||
42 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
43 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
44 | |||
45 | |||
46 | u8 FirmwareImage_2860 [] = { | ||
47 | 0x02, 0x03, 0x5e, 0x02, 0x02, 0xb1, 0x22, 0x22, 0xff, 0xff, 0xff, 0x02, 0x01, 0x82, 0xff, 0xff, | ||
48 | 0xff, 0xff, 0xff, 0x02, 0x00, 0x1e, 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x01, 0x33, 0xc0, 0xe0, | ||
49 | 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x18, 0xc2, 0xaf, 0x30, 0x45, 0x03, | ||
50 | 0x12, 0x10, 0x09, 0x90, 0x04, 0x16, 0xe0, 0x30, 0xe3, 0x03, 0x74, 0x08, 0xf0, 0x90, 0x04, 0x14, | ||
51 | 0xe0, 0x20, 0xe7, 0x03, 0x02, 0x00, 0xcb, 0x74, 0x80, 0xf0, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x2f, | ||
52 | 0x90, 0x04, 0x04, 0xe0, 0x24, 0xcf, 0x60, 0x30, 0x14, 0x60, 0x42, 0x24, 0xe2, 0x60, 0x47, 0x14, | ||
53 | 0x60, 0x55, 0x24, 0x21, 0x70, 0x60, 0xe5, 0x55, 0x24, 0xfe, 0x60, 0x07, 0x14, 0x60, 0x08, 0x24, | ||
54 | 0x02, 0x70, 0x08, 0x7d, 0x01, 0x80, 0x28, 0x7d, 0x02, 0x80, 0x24, 0x90, 0x70, 0x10, 0xe0, 0xf5, | ||
55 | 0x50, 0x85, 0x2f, 0x40, 0xd2, 0x01, 0x80, 0x3e, 0xe5, 0x55, 0x64, 0x03, 0x60, 0x04, 0xe5, 0x55, | ||
56 | 0x70, 0x04, 0x7d, 0x02, 0x80, 0x09, 0x85, 0x2f, 0x41, 0xd2, 0x02, 0x80, 0x29, 0xad, 0x55, 0xaf, | ||
57 | 0x2f, 0x12, 0x02, 0x8d, 0x80, 0x20, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x47, 0x90, 0x70, 0x11, 0xe0, | ||
58 | 0xf5, 0x44, 0x12, 0x10, 0x25, 0x80, 0x06, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x45, 0xe4, 0xfd, 0xaf, | ||
59 | 0x2f, 0x12, 0x02, 0x8d, 0xd2, 0x04, 0x90, 0x70, 0x13, 0xe4, 0xf0, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, | ||
60 | 0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0, 0x32, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x53, 0xc2, | ||
61 | 0xaf, 0x90, 0x70, 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, | ||
62 | 0xf0, 0x90, 0x70, 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x30, 0x90, | ||
63 | 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, | ||
64 | 0x1d, 0xe0, 0x90, 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, | ||
65 | 0x0d, 0x90, 0x70, 0x24, 0xe0, 0x44, 0x01, 0xf0, 0x90, 0x02, 0x2c, 0x74, 0xff, 0xf0, 0xc2, 0x05, | ||
66 | 0xd2, 0xaf, 0x22, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0xe8, 0xc0, 0xe0, | ||
67 | 0xe9, 0xc0, 0xe0, 0xea, 0xc0, 0xe0, 0xeb, 0xc0, 0xe0, 0xec, 0xc0, 0xe0, 0xed, 0xc0, 0xe0, 0xee, | ||
68 | 0xc0, 0xe0, 0xef, 0xc0, 0xe0, 0xc2, 0xaf, 0x30, 0x45, 0x03, 0x12, 0x10, 0x12, 0xd2, 0xaf, 0xd0, | ||
69 | 0xe0, 0xff, 0xd0, 0xe0, 0xfe, 0xd0, 0xe0, 0xfd, 0xd0, 0xe0, 0xfc, 0xd0, 0xe0, 0xfb, 0xd0, 0xe0, | ||
70 | 0xfa, 0xd0, 0xe0, 0xf9, 0xd0, 0xe0, 0xf8, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, | ||
71 | 0xe0, 0x32, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x10, 0xc2, | ||
72 | 0xaf, 0x30, 0x45, 0x03, 0x12, 0x10, 0x0c, 0x30, 0x58, 0x0a, 0xe5, 0x54, 0x60, 0x04, 0x15, 0x54, | ||
73 | 0x80, 0x02, 0xc2, 0x58, 0x30, 0x59, 0x0a, 0xe5, 0x50, 0x60, 0x04, 0x15, 0x50, 0x80, 0x02, 0xc2, | ||
74 | 0x59, 0xd5, 0x53, 0x07, 0x30, 0x60, 0x04, 0x15, 0x46, 0xd2, 0x04, 0x30, 0x45, 0x03, 0x12, 0x10, | ||
75 | 0x0f, 0xc2, 0x8d, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0, 0x32, | ||
76 | 0x12, 0x02, 0xd3, 0x30, 0x45, 0x03, 0x12, 0x10, 0x03, 0x30, 0x01, 0x06, 0x20, 0x09, 0x03, 0x12, | ||
77 | 0x10, 0x1c, 0x30, 0x02, 0x06, 0x20, 0x0a, 0x03, 0x12, 0x10, 0x1f, 0x30, 0x03, 0x06, 0x20, 0x0b, | ||
78 | 0x03, 0x12, 0x10, 0x1f, 0x30, 0x04, 0x06, 0x20, 0x0c, 0x03, 0x12, 0x10, 0x22, 0x20, 0x13, 0x09, | ||
79 | 0x20, 0x11, 0x06, 0xe5, 0x2b, 0x45, 0x2c, 0x60, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xa9, 0x12, | ||
80 | 0x02, 0xec, 0x80, 0xbf, 0xc2, 0x43, 0xd2, 0x45, 0xe4, 0xf5, 0x20, 0xf5, 0x21, 0xf5, 0x53, 0xf5, | ||
81 | 0x46, 0xf5, 0x2b, 0xf5, 0x2c, 0xc2, 0x42, 0xf5, 0x51, 0xf5, 0x52, 0xf5, 0x55, 0x90, 0x04, 0x18, | ||
82 | 0x74, 0x80, 0xf0, 0x90, 0x04, 0x1a, 0x74, 0x08, 0xf0, 0xc2, 0x19, 0xc2, 0x18, 0xc2, 0x1a, 0x22, | ||
83 | 0xc8, 0xef, 0xc8, 0xe6, 0xfa, 0x08, 0xe6, 0x4a, 0x60, 0x0c, 0xc8, 0xef, 0xc8, 0x08, 0xe6, 0x16, | ||
84 | 0x18, 0x70, 0x01, 0x16, 0xc3, 0x22, 0xed, 0x24, 0xff, 0xfd, 0xec, 0x34, 0xff, 0xc8, 0xef, 0xc8, | ||
85 | 0xf6, 0x08, 0xc6, 0xed, 0xc6, 0xd3, 0x22, 0xd0, 0x83, 0xd0, 0x82, 0xf8, 0xe4, 0x93, 0x70, 0x12, | ||
86 | 0x74, 0x01, 0x93, 0x70, 0x0d, 0xa3, 0xa3, 0x93, 0xf8, 0x74, 0x01, 0x93, 0xf5, 0x82, 0x88, 0x83, | ||
87 | 0xe4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xef, 0xa3, 0xa3, 0xa3, 0x80, 0xdf, 0xef, 0xf4, 0x60, | ||
88 | 0x1f, 0xe4, 0xfe, 0x12, 0x03, 0x6a, 0xe0, 0xb4, 0xff, 0x12, 0x12, 0x03, 0x6a, 0xef, 0xf0, 0x74, | ||
89 | 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xe3, | ||
90 | 0x22, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x08, 0xc2, 0xaf, | ||
91 | 0x30, 0x45, 0x03, 0x12, 0x10, 0x06, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0, | ||
92 | 0xd0, 0xe0, 0x32, 0xc2, 0xaf, 0x12, 0x00, 0x06, 0x12, 0x02, 0x14, 0x12, 0x03, 0x1c, 0xe4, 0xf5, | ||
93 | 0x22, 0xf5, 0x47, 0x90, 0x04, 0x00, 0x74, 0x80, 0xf0, 0xd2, 0xaf, 0x22, 0x30, 0x45, 0x03, 0x12, | ||
94 | 0x10, 0x15, 0xe5, 0x20, 0x70, 0x03, 0x20, 0x10, 0x03, 0x30, 0x11, 0x03, 0x43, 0x87, 0x01, 0x22, | ||
95 | 0xc0, 0x2a, 0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83, 0x75, 0x2a, 0x0a, 0x22, 0xc0, 0x2a, | ||
96 | 0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83, 0x75, 0x2a, 0x18, 0x22, 0x75, 0x89, 0x02, 0xe4, | ||
97 | 0xf5, 0x8c, 0xf5, 0x8a, 0xf5, 0x88, 0xf5, 0xb8, 0xf5, 0xe8, 0x75, 0x90, 0x18, 0xd2, 0x8c, 0x75, | ||
98 | 0xa8, 0x05, 0x22, 0xce, 0xef, 0xce, 0xee, 0x60, 0x08, 0x7f, 0xff, 0x12, 0x03, 0x80, 0x1e, 0x80, | ||
99 | 0xf5, 0x22, 0xc8, 0xef, 0xc8, 0xe6, 0x60, 0x03, 0x16, 0xc3, 0x22, 0xed, 0x14, 0xf6, 0xd3, 0x22, | ||
100 | 0xc8, 0xef, 0xc8, 0xe6, 0x60, 0x06, 0x16, 0xe6, 0x24, 0xff, 0xb3, 0x22, 0xc3, 0x22, 0x78, 0x7f, | ||
101 | 0xe4, 0xf6, 0xd8, 0xfd, 0x75, 0x81, 0x5f, 0x02, 0x01, 0xd0, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, | ||
102 | 0x34, 0x70, 0xf5, 0x83, 0x22, 0xef, 0x90, 0x03, 0x7e, 0x93, 0x90, 0x03, 0x00, 0x73, 0x0a, 0x18, | ||
103 | 0xef, 0x60, 0x03, 0x1f, 0x80, 0xfa, 0x22, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
104 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
105 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
106 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
107 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
108 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
109 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
110 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
111 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
112 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
113 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
114 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
115 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
116 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
117 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
118 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
119 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
120 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
121 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
122 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
123 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
124 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
125 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
126 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
127 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
128 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
129 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
130 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
131 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
132 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
133 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
134 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
135 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
136 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
137 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
138 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
139 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
140 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
141 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
142 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
143 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
144 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
145 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
146 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
147 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
148 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
149 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
150 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
151 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
152 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
153 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
154 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
155 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
156 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
157 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
158 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
159 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
160 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
161 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
162 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
163 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
164 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
165 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
166 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
167 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
168 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
169 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
170 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
171 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
172 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
173 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
174 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
175 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
176 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
177 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
178 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
179 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
180 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
181 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
182 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
183 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
184 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
185 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
186 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
187 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
188 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
189 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
190 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
191 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
192 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
193 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
194 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
195 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
196 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
197 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
198 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
199 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
200 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
201 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
202 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
203 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
204 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
205 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
206 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
207 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
208 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
209 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
210 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
211 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
212 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
213 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
214 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
215 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
216 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
217 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
218 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
219 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
220 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
221 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
222 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
223 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
224 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
225 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
226 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
227 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
228 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
229 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
230 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
231 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
232 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
233 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
234 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
235 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
236 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
237 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
238 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
239 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
240 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
241 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
242 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
243 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
244 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
245 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
246 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
247 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
248 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
249 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
250 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
251 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
252 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
253 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
254 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
255 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
256 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
257 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
258 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
259 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
260 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
261 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
262 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
263 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
264 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
265 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
266 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
267 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
268 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
269 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
270 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
271 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
272 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
273 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
274 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
275 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
276 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
277 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
278 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
279 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
280 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
281 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
282 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
283 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
284 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
285 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
286 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
287 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
288 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
289 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
290 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
291 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
292 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
293 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
294 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
295 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
296 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
297 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
298 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
299 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
300 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
301 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
302 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
303 | 0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x3b, 0x02, 0x10, 0x3c, 0x02, 0x12, 0xb8, 0x02, | ||
304 | 0x12, 0xb9, 0x02, 0x13, 0x3e, 0x02, 0x13, 0x3f, 0xc3, 0x22, 0xff, 0xff, 0x02, 0x16, 0x56, 0x02, | ||
305 | 0x17, 0x6b, 0x02, 0x14, 0x2a, 0x02, 0x13, 0x40, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x00, | ||
306 | 0xd8, 0x30, 0x06, 0x06, 0x20, 0x0e, 0x03, 0x12, 0x18, 0x5e, 0x22, 0x22, 0x90, 0x04, 0x14, 0xe0, | ||
307 | 0x20, 0xe7, 0x03, 0x02, 0x12, 0xb7, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, | ||
308 | 0x12, 0x02, 0x67, 0x11, 0x4e, 0x30, 0x11, 0x25, 0x31, 0x10, 0x87, 0x33, 0x10, 0xaa, 0x34, 0x10, | ||
309 | 0xc3, 0x35, 0x11, 0x57, 0x50, 0x11, 0x7b, 0x51, 0x11, 0x84, 0x52, 0x11, 0x84, 0x53, 0x11, 0x84, | ||
310 | 0x54, 0x11, 0xc5, 0x55, 0x11, 0xdc, 0x70, 0x12, 0x07, 0x71, 0x12, 0x34, 0x72, 0x12, 0x5e, 0x80, | ||
311 | 0x12, 0x81, 0x83, 0x00, 0x00, 0x12, 0xb7, 0x75, 0x24, 0x05, 0x75, 0x25, 0xdc, 0x90, 0x70, 0x9f, | ||
312 | 0x74, 0x12, 0xf0, 0xd2, 0x18, 0xd2, 0x61, 0x75, 0x35, 0x0d, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, | ||
313 | 0x56, 0xf4, 0x70, 0x03, 0x02, 0x12, 0xb7, 0x02, 0x12, 0xaa, 0xc2, 0x18, 0x90, 0x01, 0x14, 0xe0, | ||
314 | 0x54, 0xfd, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x12, 0xb7, | ||
315 | 0x02, 0x12, 0xaa, 0xe5, 0x55, 0x64, 0x02, 0x70, 0x37, 0x90, 0x70, 0x10, 0xe0, 0x60, 0x08, 0x90, | ||
316 | 0x01, 0x0d, 0x74, 0x09, 0xf0, 0x80, 0x25, 0xe5, 0x34, 0x14, 0x60, 0x0a, 0x14, 0x60, 0x0f, 0x14, | ||
317 | 0x60, 0x14, 0x24, 0x03, 0x70, 0x16, 0x90, 0x01, 0x0d, 0x74, 0x08, 0xf0, 0x80, 0x0e, 0x90, 0x01, | ||
318 | 0x0d, 0x74, 0x0b, 0xf0, 0x80, 0x06, 0x90, 0x01, 0x0d, 0x74, 0x1b, 0xf0, 0x7d, 0x01, 0x80, 0x02, | ||
319 | 0x7d, 0x02, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, 0x1b, 0x90, | ||
320 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, | ||
321 | 0x12, 0xb7, 0x02, 0x12, 0xaa, 0x20, 0x02, 0x03, 0x30, 0x03, 0x1d, 0x7d, 0x02, 0xaf, 0x56, 0x12, | ||
322 | 0x02, 0x8d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, | ||
323 | 0x70, 0x03, 0x02, 0x12, 0xb7, 0x02, 0x12, 0xaa, 0x85, 0x56, 0x41, 0xd2, 0x02, 0x22, 0x90, 0x70, | ||
324 | 0x11, 0xe0, 0x24, 0xff, 0x92, 0x1b, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0x64, 0x02, 0x60, | ||
325 | 0x03, 0x02, 0x12, 0xb7, 0x90, 0x70, 0x11, 0xe0, 0x64, 0x08, 0x60, 0x08, 0xe0, 0x64, 0x20, 0x60, | ||
326 | 0x03, 0x02, 0x12, 0xb7, 0x75, 0x4e, 0x03, 0x75, 0x4f, 0x20, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, | ||
327 | 0xff, 0x92, 0x47, 0x22, 0x90, 0x04, 0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, | ||
328 | 0x10, 0xe0, 0xff, 0x74, 0x47, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, | ||
329 | 0x74, 0x48, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, | ||
330 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, | ||
331 | 0x12, 0xb7, 0x02, 0x12, 0xaa, 0xe5, 0x47, 0xb4, 0x07, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x07, | ||
332 | 0xf5, 0x26, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0xd2, 0x04, 0x22, 0x90, 0x70, 0x10, 0xe0, | ||
333 | 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x02, | ||
334 | 0x8d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, | ||
335 | 0x03, 0x02, 0x12, 0xb7, 0x02, 0x12, 0xaa, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, | ||
336 | 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, | ||
337 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, | ||
338 | 0x12, 0xb7, 0x80, 0x76, 0xe4, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x26, 0xff, 0xc2, 0x19, 0xc2, 0x18, | ||
339 | 0xc2, 0x1a, 0x75, 0x34, 0xff, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, 0x04, 0x14, 0x74, | ||
340 | 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x5b, 0x80, 0x4c, 0x90, 0x70, | ||
341 | 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, | ||
342 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x38, 0x80, | ||
343 | 0x29, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x34, 0xd3, 0x94, 0x00, 0x40, 0x07, 0x90, 0x01, 0x0d, 0xe0, | ||
344 | 0x54, 0xfb, 0xf0, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x8d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, | ||
345 | 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x0d, 0x90, 0x70, 0x25, 0xe0, 0x44, 0x01, | ||
346 | 0xf0, 0x90, 0x02, 0x2c, 0x74, 0xff, 0xf0, 0x22, 0x22, 0xe5, 0x53, 0x60, 0x03, 0x02, 0x13, 0x3d, | ||
347 | 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 0x15, 0x4e, 0xa2, 0x19, | ||
348 | 0xe4, 0x33, 0x90, 0x70, 0x90, 0xf0, 0xa2, 0x18, 0xe4, 0x33, 0xa3, 0xf0, 0x30, 0x19, 0x4d, 0x90, | ||
349 | 0x70, 0x98, 0x74, 0x23, 0xf0, 0xa3, 0xe5, 0x25, 0xf0, 0xe5, 0x24, 0xa3, 0xf0, 0x7f, 0x35, 0x7d, | ||
350 | 0x32, 0x12, 0x03, 0x42, 0x50, 0x09, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf7, 0xf0, 0xd2, 0x06, 0xe5, | ||
351 | 0x35, 0xd3, 0x94, 0x10, 0x40, 0x1e, 0x30, 0x1a, 0x1b, 0xc2, 0x1a, 0xa2, 0x18, 0x92, 0x19, 0x20, | ||
352 | 0x19, 0x12, 0x90, 0x04, 0x09, 0xe0, 0x54, 0xdd, 0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x08, 0xf0, | ||
353 | 0xc2, 0x61, 0xd2, 0x03, 0xe5, 0x35, 0xb4, 0x0b, 0x14, 0xd2, 0x03, 0x22, 0xe4, 0xf5, 0x35, 0xa2, | ||
354 | 0x18, 0x92, 0x19, 0x30, 0x19, 0x07, 0x90, 0x04, 0x09, 0xe0, 0x44, 0x22, 0xf0, 0x22, 0x22, 0x22, | ||
355 | 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x02, 0x67, 0x13, 0x62, 0x00, 0x13, 0xf5, 0x04, 0x13, | ||
356 | 0xf1, 0x08, 0x13, 0xcc, 0x10, 0x13, 0x76, 0x20, 0x13, 0x96, 0x60, 0x13, 0xa7, 0xa0, 0x00, 0x00, | ||
357 | 0x13, 0xf7, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60, | ||
358 | 0x03, 0x02, 0x13, 0xf7, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4a, 0xc4, | ||
359 | 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, | ||
360 | 0x66, 0x53, 0x43, 0x0f, 0x80, 0x61, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 0x5e, 0xe5, | ||
361 | 0x47, 0x64, 0x06, 0x70, 0x52, 0x80, 0x1b, 0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, | ||
362 | 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, | ||
363 | 0x70, 0x35, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, 0xf5, 0x43, 0x80, 0x2b, 0xe5, 0x47, 0xb4, 0x04, | ||
364 | 0x06, 0x53, 0x5e, 0xfb, 0x75, 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, | ||
365 | 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5, 0x43, 0x80, | ||
366 | 0x06, 0xd2, 0x4b, 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x38, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, | ||
367 | 0xe5, 0x43, 0x54, 0x0f, 0x4f, 0xf5, 0x5f, 0x90, 0x70, 0x44, 0xf0, 0xa3, 0xe5, 0x5e, 0xf0, 0xa3, | ||
368 | 0xe5, 0x4a, 0xf0, 0xa3, 0xe5, 0x48, 0xf0, 0xa3, 0xe5, 0x4c, 0xf0, 0xa3, 0xe5, 0x44, 0xf0, 0xa3, | ||
369 | 0xe5, 0x42, 0xf0, 0xa3, 0xe5, 0x43, 0xf0, 0xd2, 0x60, 0x22, 0xe5, 0x47, 0x60, 0x10, 0x24, 0xc0, | ||
370 | 0x70, 0x03, 0x12, 0x16, 0x36, 0x12, 0x14, 0x3f, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, | ||
371 | 0xaf, 0x90, 0x04, 0x14, 0xe0, 0x54, 0x0e, 0x60, 0x04, 0xd2, 0x1c, 0x80, 0x08, 0xe5, 0x4e, 0x45, | ||
372 | 0x4f, 0x24, 0xff, 0x92, 0x1c, 0xd2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x1d, 0x74, | ||
373 | 0x1e, 0xf0, 0xe5, 0x5f, 0x54, 0x0f, 0xf5, 0x2d, 0xe5, 0x38, 0x70, 0x13, 0x30, 0x1c, 0x05, 0xe5, | ||
374 | 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x1d, 0x19, 0xe5, 0x5f, 0x54, 0x30, 0xff, 0xbf, 0x30, 0x11, 0xe5, | ||
375 | 0x38, 0x70, 0x05, 0x75, 0x38, 0x0c, 0x80, 0x02, 0x15, 0x38, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, | ||
376 | 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, | ||
377 | 0x47, 0x64, 0x03, 0x70, 0x21, 0x30, 0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x38, | ||
378 | 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, 0x4c, 0xe5, 0x38, 0x70, 0x05, 0x75, 0x38, 0x07, 0x80, 0x02, | ||
379 | 0x15, 0x38, 0xd2, 0x6c, 0xd2, 0x6d, 0x90, 0x70, 0x46, 0xe5, 0x2d, 0xf0, 0x20, 0x69, 0x07, 0xe5, | ||
380 | 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, | ||
381 | 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x90, 0x70, 0x47, 0xe5, 0x2d, 0xf0, | ||
382 | 0x75, 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x15, 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, | ||
383 | 0xe3, 0x80, 0x0c, 0xe5, 0x46, 0x54, 0xf0, 0xff, 0xbf, 0xf0, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, | ||
384 | 0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x15, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, | ||
385 | 0xe3, 0x80, 0x0c, 0xe5, 0x46, 0x54, 0xf0, 0xff, 0xbf, 0xf0, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, | ||
386 | 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, 0x15, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, | ||
387 | 0xe3, 0x80, 0x0c, 0xe5, 0x46, 0x54, 0xf0, 0xff, 0xbf, 0xf0, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, | ||
388 | 0x71, 0x92, 0x70, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x46, 0x90, | ||
389 | 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, 0x14, 0x24, 0xfe, | ||
390 | 0x60, 0x1f, 0x24, 0x03, 0x60, 0x03, 0x02, 0x16, 0x35, 0x90, 0x02, 0x28, 0xe0, 0x30, 0x47, 0x0d, | ||
391 | 0x80, 0x07, 0x90, 0x02, 0x28, 0xe0, 0x20, 0x47, 0x04, 0x54, 0xfe, 0xf0, 0x22, 0x44, 0x01, 0xf0, | ||
392 | 0x22, 0xe5, 0x46, 0x30, 0xe3, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0x90, 0x02, 0x28, 0xe0, | ||
393 | 0x54, 0xfe, 0x4f, 0xf0, 0x22, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x03, 0x02, 0x16, 0x35, 0xf5, 0x27, | ||
394 | 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x26, 0x14, 0x60, 0x26, 0x14, 0x60, 0x2e, 0x14, | ||
395 | 0x60, 0x36, 0x24, 0x03, 0x70, 0x5f, 0xe5, 0x46, 0x13, 0x13, 0x13, 0x54, 0x1f, 0x75, 0xf0, 0x03, | ||
396 | 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x24, 0xff, | ||
397 | 0x80, 0x02, 0xa2, 0x47, 0x92, 0x39, 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x80, 0x3f, 0xe5, 0x46, 0x30, | ||
398 | 0xe3, 0x03, 0xd3, 0x80, 0x27, 0xc3, 0x80, 0x24, 0xe5, 0x46, 0x30, 0xe3, 0x0d, 0x54, 0x70, 0xc3, | ||
399 | 0x94, 0x60, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0x20, 0x47, | ||
400 | 0x04, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, 0x38, 0xa2, 0x47, | ||
401 | 0xb3, 0x92, 0x39, 0x80, 0x07, 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x92, 0x39, 0x90, 0x02, 0x28, 0xe0, | ||
402 | 0x54, 0xfc, 0x45, 0x27, 0xf0, 0x22, 0xe4, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x45, | ||
403 | 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0x8f, 0x50, 0xd2, 0x59, | ||
404 | 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, 0x30, 0xc2, 0xaf, 0xe5, 0x51, 0x14, 0x60, 0x4a, | ||
405 | 0x14, 0x60, 0x6a, 0x24, 0x02, 0x60, 0x03, 0x02, 0x17, 0x4c, 0xd2, 0x59, 0x75, 0x55, 0x01, 0x20, | ||
406 | 0x19, 0x1c, 0x90, 0x02, 0x08, 0xe0, 0x54, 0xfe, 0xf0, 0xe0, 0x20, 0xe1, 0x23, 0x90, 0x04, 0x34, | ||
407 | 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4, 0x02, 0x17, 0xa3, 0xe0, 0xb4, 0x02, 0x12, 0x7f, 0x20, | ||
408 | 0x12, 0x16, 0x4c, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01, 0x02, 0x17, 0x4c, | ||
409 | 0xe5, 0x50, 0x70, 0x06, 0x75, 0x30, 0x03, 0x02, 0x17, 0x4c, 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, | ||
410 | 0x70, 0x15, 0x7f, 0x20, 0x12, 0x16, 0x4c, 0x20, 0x19, 0x07, 0x90, 0x02, 0x08, 0xe0, 0x54, 0xfb, | ||
411 | 0xf0, 0x75, 0x51, 0x02, 0x02, 0x17, 0x4c, 0xe5, 0x50, 0x70, 0x02, 0x80, 0x7a, 0x20, 0x19, 0x0f, | ||
412 | 0x90, 0x02, 0x08, 0xe0, 0x20, 0xe3, 0x6c, 0x90, 0x04, 0x37, 0xe0, 0x64, 0x22, 0x70, 0x64, 0x90, | ||
413 | 0x12, 0x04, 0x74, 0x0a, 0xf0, 0x30, 0x1b, 0x11, 0x90, 0x13, 0x28, 0xe0, 0x54, 0xf0, 0xf0, 0xa3, | ||
414 | 0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xfa, 0xf0, 0x20, 0x19, 0x07, 0x90, 0x04, 0x01, 0xe0, | ||
415 | 0x44, 0x10, 0xf0, 0xe5, 0x34, 0xf4, 0x90, 0x04, 0x01, 0x60, 0x06, 0xe0, 0x54, 0xfb, 0xf0, 0x80, | ||
416 | 0x04, 0xe0, 0x54, 0xf9, 0xf0, 0x20, 0x19, 0x07, 0x90, 0x12, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xe5, | ||
417 | 0x34, 0xf4, 0x60, 0x14, 0x90, 0x01, 0x0d, 0xe0, 0xf5, 0x33, 0xe5, 0x34, 0xd3, 0x94, 0x02, 0x40, | ||
418 | 0x07, 0x90, 0x12, 0x04, 0xe0, 0x54, 0xfd, 0xf0, 0x75, 0x30, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, | ||
419 | 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, 0x05, 0x75, 0x30, 0x03, 0xf5, 0x51, 0xe5, 0x30, 0x60, 0x18, | ||
420 | 0xc2, 0x01, 0xe4, 0xf5, 0x51, 0xc2, 0x59, 0x20, 0x19, 0x0e, 0xad, 0x30, 0xaf, 0x40, 0x12, 0x18, | ||
421 | 0x2a, 0xe5, 0x30, 0xb4, 0x03, 0x02, 0xd2, 0x03, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x0e, | ||
422 | 0xe4, 0xf5, 0x51, 0xc2, 0x59, 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x18, 0x2a, 0xe5, 0x52, | ||
423 | 0x14, 0x60, 0x55, 0x14, 0x60, 0x2f, 0x24, 0x02, 0x60, 0x03, 0x02, 0x18, 0x27, 0xe5, 0x34, 0xf4, | ||
424 | 0x60, 0x23, 0xe5, 0x34, 0xd3, 0x94, 0x02, 0x40, 0x16, 0x90, 0x12, 0x04, 0xe0, 0x44, 0x02, 0xf0, | ||
425 | 0x90, 0x01, 0x0d, 0xe0, 0x20, 0xe3, 0x03, 0x02, 0x18, 0x27, 0x7f, 0x50, 0x12, 0x16, 0x51, 0x75, | ||
426 | 0x52, 0x02, 0x75, 0x55, 0x03, 0xe5, 0x34, 0xf4, 0x60, 0x0a, 0xe5, 0x54, 0x70, 0x69, 0x90, 0x01, | ||
427 | 0x0d, 0xe5, 0x33, 0xf0, 0x90, 0x12, 0x04, 0xe0, 0x54, 0xfb, 0xf0, 0x7f, 0x20, 0x12, 0x16, 0x51, | ||
428 | 0x75, 0x52, 0x01, 0x75, 0x55, 0x03, 0x80, 0x4f, 0xe5, 0x54, 0x70, 0x4b, 0x90, 0x04, 0x01, 0xe0, | ||
429 | 0x44, 0x0e, 0xf0, 0x20, 0x19, 0x04, 0xe0, 0x54, 0xef, 0xf0, 0x90, 0x13, 0x28, 0xe0, 0x44, 0x0f, | ||
430 | 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, 0x03, | ||
431 | 0xf0, 0x20, 0x19, 0x07, 0x90, 0x02, 0x08, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, | ||
432 | 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x0b, 0xc2, 0x02, 0x7d, 0x01, 0xaf, 0x41, | ||
433 | 0x12, 0x18, 0x2a, 0x80, 0x02, 0xc2, 0x03, 0xd2, 0xaf, 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, | ||
434 | 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, 0x14, | ||
435 | 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, | ||
436 | 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, 0x22, 0x20, 0x19, | ||
437 | 0x03, 0x02, 0x19, 0x0f, 0x90, 0x70, 0x80, 0xe0, 0x04, 0xf0, 0x90, 0x04, 0x37, 0xe0, 0x30, 0xe5, | ||
438 | 0x03, 0x02, 0x19, 0x0b, 0x90, 0x04, 0x28, 0xe0, 0xf5, 0x31, 0xa3, 0xe0, 0xf5, 0x30, 0xf5, 0x32, | ||
439 | 0xe4, 0xf5, 0x37, 0x90, 0x70, 0x81, 0xe0, 0x04, 0xf0, 0x90, 0x70, 0x82, 0xe0, 0x04, 0xf0, 0xe5, | ||
440 | 0x32, 0x75, 0xf0, 0x80, 0xa4, 0x24, 0x00, 0xff, 0xe5, 0xf0, 0x34, 0x80, 0xfe, 0xe5, 0x30, 0x65, | ||
441 | 0x32, 0x70, 0x05, 0xfc, 0x7d, 0x18, 0x80, 0x04, 0x7c, 0x00, 0x7d, 0x00, 0xef, 0x2d, 0xff, 0xee, | ||
442 | 0x3c, 0xfe, 0x12, 0x19, 0x10, 0x50, 0x25, 0x90, 0x70, 0x83, 0xe0, 0x04, 0xf0, 0x90, 0x01, 0x14, | ||
443 | 0xe0, 0x44, 0x02, 0xf0, 0xe0, 0x30, 0xe1, 0x06, 0x90, 0x70, 0x92, 0x74, 0x45, 0xf0, 0x90, 0x70, | ||
444 | 0x93, 0xe0, 0x04, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x90, 0x70, 0x94, 0xf0, 0xe5, 0x32, 0x65, 0x31, | ||
445 | 0x60, 0x10, 0xe4, 0x25, 0x32, 0xff, 0xe4, 0x34, 0x80, 0x8f, 0x82, 0xf5, 0x83, 0xe0, 0xf5, 0x32, | ||
446 | 0x80, 0x97, 0x90, 0x04, 0x10, 0x74, 0x01, 0xf0, 0x90, 0x04, 0x28, 0xe5, 0x31, 0xf0, 0xa3, 0xe5, | ||
447 | 0x30, 0xf0, 0x90, 0x04, 0x11, 0x74, 0x01, 0xf0, 0x02, 0x18, 0x6a, 0xc2, 0x06, 0xd2, 0x1a, 0x22, | ||
448 | 0x90, 0x70, 0x84, 0xe5, 0x37, 0xf0, 0xc3, 0x94, 0x06, 0x50, 0x19, 0x8f, 0x82, 0x8e, 0x83, 0xe0, | ||
449 | 0xb4, 0xff, 0x07, 0x05, 0x37, 0xe4, 0xf5, 0x36, 0x80, 0x59, 0xe4, 0xf5, 0x37, 0x8f, 0x82, 0x8e, | ||
450 | 0x83, 0xf0, 0x80, 0x4f, 0xe5, 0x36, 0x75, 0xf0, 0x06, 0x84, 0x74, 0x08, 0x25, 0xf0, 0xf5, 0x82, | ||
451 | 0xe4, 0x34, 0x10, 0xf5, 0x83, 0xe0, 0xfd, 0x8f, 0x82, 0x8e, 0x83, 0xe0, 0xfc, 0x6d, 0x70, 0x30, | ||
452 | 0x90, 0x70, 0x88, 0xe0, 0x04, 0xf0, 0xa3, 0xe0, 0xfd, 0xd3, 0x95, 0x37, 0x40, 0x02, 0x80, 0x02, | ||
453 | 0xad, 0x37, 0x90, 0x70, 0x89, 0xed, 0xf0, 0x05, 0x37, 0x05, 0x36, 0xe5, 0x36, 0x75, 0xf0, 0x06, | ||
454 | 0x84, 0x74, 0x8a, 0x25, 0xf0, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xec, 0xf0, 0x80, 0x03, | ||
455 | 0xe4, 0xf5, 0x37, 0x0f, 0xbf, 0x00, 0x01, 0x0e, 0xef, 0x54, 0x7f, 0x60, 0x0a, 0xe5, 0x37, 0xc3, | ||
456 | 0x94, 0x4e, 0x50, 0x03, 0x02, 0x19, 0x10, 0xe5, 0x37, 0xb4, 0x4e, 0x03, 0xd3, 0x80, 0x01, 0xc3, | ||
457 | 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
459 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
460 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
461 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
462 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
463 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
464 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
465 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
466 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
467 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
469 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
470 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
471 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
472 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
473 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
474 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
475 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
476 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
477 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
479 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
480 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
481 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
482 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
483 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
484 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
485 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
486 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
487 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
489 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
490 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
491 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
492 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
494 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
495 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
496 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
497 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
499 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
500 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
501 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
502 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
503 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
504 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
505 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
506 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
507 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
509 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
510 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
511 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
512 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
513 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
514 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
515 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
516 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
517 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
519 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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521 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
522 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
523 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
524 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
525 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
526 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
527 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
529 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
530 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
531 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
532 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
533 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
534 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
535 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
536 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
537 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
539 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
540 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
541 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
542 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
543 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
544 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
545 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
546 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
547 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
549 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
550 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
551 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
552 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
553 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
554 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
555 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
556 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
557 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x94, 0xeb, } ; | ||
diff --git a/drivers/staging/rt2860/common/firmware_3070.h b/drivers/staging/rt2860/common/firmware_3070.h deleted file mode 100644 index b710d40bc046..000000000000 --- a/drivers/staging/rt2860/common/firmware_3070.h +++ /dev/null | |||
@@ -1,517 +0,0 @@ | |||
1 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
2 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
3 | |||
4 | |||
5 | u8 FirmwareImage_3070 [] = { | ||
6 | 0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x32, 0x02, 0x10, 0x78, 0x02, 0x13, 0x1f, 0x02, | ||
7 | 0x13, 0x20, 0x02, 0x13, 0x3f, 0x02, 0x13, 0x44, 0x12, 0x13, 0x40, 0x22, 0x02, 0x17, 0xae, 0x02, | ||
8 | 0x18, 0xd2, 0x02, 0x14, 0x3d, 0x02, 0x13, 0x78, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x19, | ||
9 | 0x95, 0x22, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe3, 0x1b, 0xe5, 0x4c, 0x30, 0xe0, 0x04, 0x7f, 0x40, | ||
10 | 0x80, 0x02, 0x7f, 0x00, 0x90, 0x10, 0x2f, 0xef, 0xf0, 0x90, 0x01, 0x8c, 0x74, 0x08, 0xf0, 0xe4, | ||
11 | 0x90, 0x01, 0xa7, 0xf0, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe0, 0x1c, 0x90, 0x01, 0x80, 0xe0, 0xb4, | ||
12 | 0x02, 0x15, 0xa3, 0xe0, 0xb4, 0x01, 0x10, 0x90, 0x01, 0x84, 0xe0, 0xb4, 0x81, 0x09, 0x90, 0x01, | ||
13 | 0x8c, 0x74, 0x01, 0xf0, 0x12, 0x0d, 0xc8, 0x22, 0x90, 0x04, 0x14, 0xe0, 0x20, 0xe7, 0x03, 0x02, | ||
14 | 0x13, 0x1e, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, 0x12, 0x0a, 0x9d, 0x10, | ||
15 | 0xd9, 0x31, 0x10, 0xbd, 0x36, 0x11, 0x02, 0x50, 0x11, 0x39, 0x51, 0x11, 0x42, 0x52, 0x11, 0x42, | ||
16 | 0x53, 0x11, 0x42, 0x54, 0x11, 0x83, 0x55, 0x11, 0xd2, 0x56, 0x12, 0x25, 0x70, 0x12, 0x50, 0x71, | ||
17 | 0x12, 0x7e, 0x72, 0x12, 0xd5, 0x73, 0x12, 0xf6, 0x80, 0x00, 0x00, 0x13, 0x1e, 0x90, 0x70, 0x11, | ||
18 | 0xe0, 0xf5, 0x3c, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe5, 0x56, | ||
19 | 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, 0x02, 0x13, 0x17, 0x20, 0x02, 0x03, 0x30, 0x03, 0x1d, 0x7d, | ||
20 | 0x02, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, | ||
21 | 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, 0x02, 0x13, 0x17, 0x85, 0x56, 0x41, 0xd2, | ||
22 | 0x02, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x0a, 0x0d, 0x90, 0x70, 0x11, 0xe0, | ||
23 | 0xb4, 0x08, 0x06, 0x75, 0x4e, 0x01, 0x75, 0x4f, 0x84, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0xff, | ||
24 | 0xbf, 0x02, 0x12, 0x90, 0x70, 0x11, 0xe0, 0x64, 0x08, 0x60, 0x04, 0xe0, 0xb4, 0x20, 0x06, 0x75, | ||
25 | 0x4e, 0x03, 0x75, 0x4f, 0x20, 0xe4, 0xf5, 0x27, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, | ||
26 | 0x47, 0x22, 0x90, 0x04, 0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10, 0xe0, | ||
27 | 0xff, 0x74, 0x47, 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, | ||
28 | 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, | ||
29 | 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, | ||
30 | 0x02, 0x13, 0x17, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x1d, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x17, 0xe5, | ||
31 | 0x47, 0x64, 0x09, 0x60, 0x11, 0xe5, 0x47, 0x64, 0x0a, 0x60, 0x0b, 0xe5, 0x47, 0x64, 0x0b, 0x60, | ||
32 | 0x05, 0xe5, 0x47, 0xb4, 0x0c, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x0f, 0xf5, 0x3a, 0xe5, 0x47, | ||
33 | 0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03, 0x03, 0xe4, 0xf5, 0x46, 0xe5, 0x47, 0xb4, 0x0a, 0x08, | ||
34 | 0xe5, 0x3a, 0xb4, 0x01, 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0xd2, | ||
35 | 0x04, 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0xff, 0x90, 0x70, 0x10, 0xe0, 0x5f, 0xff, 0x90, 0x70, | ||
36 | 0x11, 0xe0, 0x55, 0x27, 0x4f, 0x90, 0x70, 0x18, 0xf0, 0x90, 0x70, 0x11, 0xe0, 0x90, 0x70, 0x19, | ||
37 | 0xf0, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x30, 0x15, 0x03, 0xd2, 0x14, 0x22, 0x90, 0x70, | ||
38 | 0x18, 0xe0, 0xf5, 0x27, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef, 0x5e, | ||
39 | 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, 0x90, | ||
40 | 0x02, 0x28, 0xef, 0xf0, 0x22, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, | ||
41 | 0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, | ||
42 | 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, 0x02, 0x13, 0x17, | ||
43 | 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, | ||
44 | 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, | ||
45 | 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, 0x02, 0x13, 0x17, 0x90, 0x10, | ||
46 | 0x00, 0xe0, 0xf5, 0x57, 0x90, 0x10, 0x02, 0xe0, 0xf5, 0x58, 0xa3, 0xe0, 0xf5, 0x59, 0xe5, 0x58, | ||
47 | 0xb4, 0x70, 0x1e, 0xe5, 0x59, 0xb4, 0x30, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, | ||
48 | 0x90, 0x05, 0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, 0x90, 0x05, 0x08, | ||
49 | 0xf0, 0xe4, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x3a, 0xff, 0x75, 0x3c, 0xff, 0xad, 0x57, 0xaf, 0x56, | ||
50 | 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, | ||
51 | 0xf4, 0x60, 0x4b, 0x80, 0x42, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, 0xfd, 0xaf, | ||
52 | 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, | ||
53 | 0x56, 0xf4, 0x60, 0x2a, 0x80, 0x21, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, | ||
54 | 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, | ||
55 | 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x07, 0x90, 0x70, 0x25, 0xe0, 0x44, 0x01, 0xf0, 0x22, 0x22, | ||
56 | 0xe5, 0x53, 0x70, 0x1a, 0x30, 0x60, 0x09, 0xb2, 0x4d, 0x30, 0x4d, 0x04, 0x05, 0x46, 0xc2, 0x04, | ||
57 | 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 0x15, 0x4e, 0x22, 0x22, | ||
58 | 0xc2, 0x42, 0xd3, 0x22, 0x30, 0x14, 0x30, 0x90, 0x70, 0x19, 0xe0, 0x55, 0x27, 0xff, 0x90, 0x70, | ||
59 | 0x18, 0xe0, 0x4f, 0xf5, 0x27, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef, | ||
60 | 0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, | ||
61 | 0x90, 0x02, 0x28, 0xef, 0xf0, 0xc2, 0x14, 0x22, 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x0a, | ||
62 | 0x9d, 0x13, 0x9a, 0x00, 0x14, 0x28, 0x04, 0x14, 0x24, 0x08, 0x14, 0x04, 0x10, 0x13, 0xae, 0x20, | ||
63 | 0x13, 0xce, 0x60, 0x13, 0xdf, 0xa0, 0x00, 0x00, 0x14, 0x2a, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, | ||
64 | 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60, 0x03, 0x02, 0x14, 0x2a, 0x80, 0x1b, 0xe5, 0x48, | ||
65 | 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4a, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, | ||
66 | 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x61, 0x53, 0x43, 0x0f, 0x80, 0x5c, 0x85, 0x49, | ||
67 | 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4d, 0x80, 0x1b, 0xe5, | ||
68 | 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, | ||
69 | 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x30, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, | ||
70 | 0xf5, 0x43, 0x80, 0x26, 0xe5, 0x47, 0x64, 0x04, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, | ||
71 | 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, | ||
72 | 0xf5, 0x43, 0x80, 0x06, 0xd2, 0x4b, 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x25, 0xe5, 0x42, 0xc4, | ||
73 | 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, 0x0f, 0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xd2, 0x15, 0xe5, | ||
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86 | 0x47, 0xb4, 0x0a, 0x13, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x08, 0xe5, | ||
87 | 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, | ||
88 | 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, | ||
89 | 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, 0x30, | ||
90 | 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, 0x80, | ||
91 | 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, | ||
92 | 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x26, | ||
93 | 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, | ||
94 | 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, | ||
95 | 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, | ||
96 | 0x26, 0xe5, 0x47, 0x64, 0x0a, 0x70, 0x22, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x17, | ||
97 | 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x34, 0xe5, 0x46, 0x20, 0xe4, 0x03, | ||
98 | 0x30, 0xe5, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, | ||
99 | 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, | ||
100 | 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, | ||
101 | 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, | ||
102 | 0x94, 0x30, 0x40, 0x14, 0xa2, 0x71, 0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, | ||
103 | 0x54, 0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, | ||
104 | 0x64, 0x06, 0x70, 0x39, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, | ||
105 | 0x14, 0x60, 0x0c, 0x24, 0xfe, 0x60, 0x0c, 0x24, 0x03, 0x70, 0x13, 0xc2, 0x38, 0x80, 0x0f, 0xd2, | ||
106 | 0x38, 0x80, 0x0b, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x38, 0x30, 0x47, | ||
107 | 0x05, 0xaf, 0x27, 0x02, 0x17, 0x73, 0xe5, 0x27, 0xf4, 0xff, 0x02, 0x17, 0x73, 0xe5, 0x47, 0x64, | ||
108 | 0x07, 0x60, 0x0f, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, | ||
109 | 0x16, 0xf2, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x22, 0x14, 0x60, | ||
110 | 0x25, 0x14, 0x60, 0x2d, 0x24, 0xfc, 0x60, 0x49, 0x24, 0xf9, 0x60, 0x14, 0x24, 0x0e, 0x70, 0x50, | ||
111 | 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x24, 0xff, 0x80, 0x3a, | ||
112 | 0xd2, 0x39, 0xc2, 0x38, 0x80, 0x3e, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x1d, 0xc3, 0x80, | ||
113 | 0x1a, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, | ||
114 | 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0x38, 0xc2, 0x39, 0x80, | ||
115 | 0x13, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0xc2, 0x38, 0x80, 0x04, | ||
116 | 0xc2, 0x38, 0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, 0x02, | ||
117 | 0x17, 0x73, 0xe5, 0x47, 0x64, 0x0c, 0x60, 0x06, 0xe5, 0x47, 0x64, 0x0b, 0x70, 0x7a, 0x90, 0x02, | ||
118 | 0x29, 0xe0, 0x54, 0xfd, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x20, 0x14, 0x60, 0x21, 0x14, 0x60, 0x2b, | ||
119 | 0x24, 0xfc, 0x60, 0x45, 0x24, 0xf9, 0x60, 0x12, 0x24, 0x0e, 0x70, 0x4a, 0xe5, 0x46, 0x13, 0x13, | ||
120 | 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x80, 0x29, 0xd2, 0x39, 0x80, 0x3a, 0xe5, 0x46, | ||
121 | 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0x80, 0x2d, 0xe5, 0x46, 0x30, 0xe2, 0x0d, | ||
122 | 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, | ||
123 | 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0x39, 0x80, 0x0f, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, | ||
124 | 0x01, 0xc3, 0x92, 0x39, 0x80, 0x02, 0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, | ||
125 | 0x27, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0xe5, 0x47, 0xb4, 0x0b, 0x10, 0x90, 0x02, | ||
126 | 0x29, 0xe0, 0x54, 0xeb, 0xf0, 0xe5, 0x27, 0x54, 0xeb, 0x45, 0x45, 0xf5, 0x27, 0x22, 0xe4, 0x90, | ||
127 | 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, | ||
128 | 0x28, 0xef, 0xf0, 0x22, 0x8f, 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, | ||
129 | 0x62, 0xc2, 0xaf, 0xe5, 0x51, 0x14, 0x60, 0x48, 0x14, 0x60, 0x66, 0x24, 0x02, 0x60, 0x03, 0x02, | ||
130 | 0x18, 0xb6, 0xd2, 0x59, 0x75, 0x55, 0x01, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0x7f, 0xf0, 0xa3, 0xe0, | ||
131 | 0x20, 0xe7, 0x23, 0x90, 0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4, 0x02, 0x17, 0xa3, | ||
132 | 0xe0, 0xb4, 0x02, 0x12, 0x7f, 0x20, 0x12, 0x17, 0xa4, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, | ||
133 | 0x75, 0x51, 0x01, 0x02, 0x18, 0xb6, 0xe5, 0x50, 0x70, 0x06, 0x75, 0x62, 0x03, 0x02, 0x18, 0xb6, | ||
134 | 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x12, 0x7f, 0x20, 0x12, 0x17, 0xa4, 0x90, 0x02, 0xa2, | ||
135 | 0xe0, 0x54, 0xbf, 0xf0, 0x75, 0x51, 0x02, 0x02, 0x18, 0xb6, 0xe5, 0x50, 0x70, 0x03, 0x02, 0x18, | ||
136 | 0xb1, 0x90, 0x02, 0xa3, 0xe0, 0x30, 0xe6, 0x03, 0x02, 0x18, 0xad, 0x90, 0x04, 0x37, 0xe0, 0x64, | ||
137 | 0x22, 0x70, 0x7a, 0x90, 0x01, 0x8a, 0x74, 0x7e, 0xf0, 0x90, 0x01, 0x96, 0xf0, 0x90, 0x12, 0x04, | ||
138 | 0x74, 0x0a, 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x15, 0xe5, 0x59, 0xb4, 0x35, 0x10, 0xe4, 0x90, 0x05, | ||
139 | 0x00, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0x7f, 0x01, 0x12, | ||
140 | 0x0d, 0x2a, 0x90, 0x13, 0x28, 0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xf0, 0xf0, 0xe5, 0x59, | ||
141 | 0xb4, 0x35, 0x14, 0xe5, 0x3c, 0xf4, 0x60, 0x06, 0xa3, 0xe0, 0x54, 0xf3, 0x80, 0x14, 0x90, 0x13, | ||
142 | 0x2a, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x08, 0xe0, | ||
143 | 0x54, 0xf2, 0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x54, | ||
144 | 0xfd, 0xf0, 0x75, 0x62, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, | ||
145 | 0x05, 0x75, 0x62, 0x03, 0xf5, 0x51, 0xe5, 0x62, 0x60, 0x15, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 0xc2, | ||
146 | 0x59, 0xad, 0x62, 0xaf, 0x40, 0x12, 0x19, 0x61, 0xe5, 0x62, 0xb4, 0x03, 0x02, 0xd2, 0x03, 0xd2, | ||
147 | 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x12, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xf5, 0x51, 0xc2, 0x59, | ||
148 | 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x19, 0x61, 0xe5, 0x52, 0x14, 0x60, 0x09, 0x04, 0x70, | ||
149 | 0x6d, 0x75, 0x52, 0x01, 0x75, 0x55, 0x03, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x0e, 0xf0, 0x90, 0x13, | ||
150 | 0x28, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, | ||
151 | 0x12, 0x04, 0x74, 0x03, 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x16, 0xe5, 0x59, 0xb4, 0x35, 0x11, 0x90, | ||
152 | 0x05, 0x00, 0x74, 0xe2, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, | ||
153 | 0x7f, 0x01, 0x12, 0x0d, 0x2a, 0x90, 0x02, 0xa2, 0xe0, 0x44, 0xc0, 0xf0, 0x90, 0x10, 0x04, 0xe0, | ||
154 | 0x44, 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 0x7d, 0x01, 0xaf, | ||
155 | 0x41, 0x12, 0x19, 0x61, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xd2, 0xaf, | ||
156 | 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, | ||
157 | 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, | ||
158 | 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, | ||
159 | 0x04, 0xd5, 0x22, 0x22, 0x22, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x4d, 0xc2, 0xaf, 0x90, 0x70, | ||
160 | 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 0xf0, 0x90, 0x70, | ||
161 | 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x62, 0x90, 0x10, 0x1e, 0xe0, | ||
162 | 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 0x1d, 0xe0, 0x90, | ||
163 | 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, 0x07, 0x90, 0x70, | ||
164 | 0x24, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, | ||
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166 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
167 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
169 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
170 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
171 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
172 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
173 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
174 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
175 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
176 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
177 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
179 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
180 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
181 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
182 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
183 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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300 | 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, | ||
301 | 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x1e, 0x02, 0x13, 0x17, 0x90, 0x10, | ||
302 | 0x00, 0xe0, 0xf5, 0x57, 0x90, 0x10, 0x02, 0xe0, 0xf5, 0x58, 0xa3, 0xe0, 0xf5, 0x59, 0xe5, 0x58, | ||
303 | 0xb4, 0x70, 0x1e, 0xe5, 0x59, 0xb4, 0x30, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, | ||
304 | 0x90, 0x05, 0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, 0x90, 0x05, 0x08, | ||
305 | 0xf0, 0xe4, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x3a, 0xff, 0x75, 0x3c, 0xff, 0xad, 0x57, 0xaf, 0x56, | ||
306 | 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, | ||
307 | 0xf4, 0x60, 0x4b, 0x80, 0x42, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, 0xfd, 0xaf, | ||
308 | 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, | ||
309 | 0x56, 0xf4, 0x60, 0x2a, 0x80, 0x21, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, | ||
310 | 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0xaa, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, | ||
311 | 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x07, 0x90, 0x70, 0x25, 0xe0, 0x44, 0x01, 0xf0, 0x22, 0x22, | ||
312 | 0xe5, 0x53, 0x70, 0x1a, 0x30, 0x60, 0x09, 0xb2, 0x4d, 0x30, 0x4d, 0x04, 0x05, 0x46, 0xc2, 0x04, | ||
313 | 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 0x15, 0x4e, 0x22, 0x22, | ||
314 | 0xc2, 0x42, 0xd3, 0x22, 0x30, 0x14, 0x30, 0x90, 0x70, 0x19, 0xe0, 0x55, 0x27, 0xff, 0x90, 0x70, | ||
315 | 0x18, 0xe0, 0x4f, 0xf5, 0x27, 0x90, 0x02, 0x29, 0xe0, 0xff, 0x90, 0x70, 0x19, 0xe0, 0xfe, 0xef, | ||
316 | 0x5e, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, | ||
317 | 0x90, 0x02, 0x28, 0xef, 0xf0, 0xc2, 0x14, 0x22, 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x0a, | ||
318 | 0xb6, 0x13, 0x9a, 0x00, 0x14, 0x28, 0x04, 0x14, 0x24, 0x08, 0x14, 0x04, 0x10, 0x13, 0xae, 0x20, | ||
319 | 0x13, 0xce, 0x60, 0x13, 0xdf, 0xa0, 0x00, 0x00, 0x14, 0x2a, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, | ||
320 | 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60, 0x03, 0x02, 0x14, 0x2a, 0x80, 0x1b, 0xe5, 0x48, | ||
321 | 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4a, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, | ||
322 | 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x61, 0x53, 0x43, 0x0f, 0x80, 0x5c, 0x85, 0x49, | ||
323 | 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4d, 0x80, 0x1b, 0xe5, | ||
324 | 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, | ||
325 | 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x30, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, | ||
326 | 0xf5, 0x43, 0x80, 0x26, 0xe5, 0x47, 0x64, 0x04, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, | ||
327 | 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, | ||
328 | 0xf5, 0x43, 0x80, 0x06, 0xd2, 0x4b, 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x25, 0xe5, 0x42, 0xc4, | ||
329 | 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, 0x0f, 0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xd2, 0x15, 0xe5, | ||
330 | 0x47, 0x24, 0xf5, 0x60, 0x0b, 0x24, 0xcb, 0x60, 0x07, 0x24, 0x40, 0x70, 0x06, 0xc2, 0x15, 0x22, | ||
331 | 0x12, 0x17, 0x79, 0x12, 0x14, 0x5f, 0xc2, 0x15, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, | ||
332 | 0xaf, 0x90, 0x04, 0x14, 0xe0, 0x54, 0x0e, 0x60, 0x04, 0xd2, 0x18, 0x80, 0x08, 0xe5, 0x4e, 0x45, | ||
333 | 0x4f, 0x24, 0xff, 0x92, 0x18, 0xd2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x19, 0x74, | ||
334 | 0x1e, 0xf0, 0xe5, 0x5f, 0x54, 0x0f, 0xf5, 0x2d, 0xe5, 0x25, 0x70, 0x13, 0x30, 0x18, 0x05, 0xe5, | ||
335 | 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x19, 0x19, 0xe5, 0x5f, 0x54, 0x30, 0xff, 0xbf, 0x30, 0x11, 0xe5, | ||
336 | 0x25, 0x70, 0x05, 0x75, 0x25, 0x0c, 0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, | ||
337 | 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, | ||
338 | 0x47, 0x64, 0x03, 0x70, 0x21, 0x30, 0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x25, | ||
339 | 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, 0x4c, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x07, 0x80, 0x02, | ||
340 | 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44, 0x20, 0xe3, 0x0b, | ||
341 | 0xe5, 0x3a, 0x64, 0x02, 0x60, 0x05, 0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0xe5, | ||
342 | 0x47, 0xb4, 0x0a, 0x13, 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x08, 0xe5, | ||
343 | 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, | ||
344 | 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, | ||
345 | 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, 0x30, | ||
346 | 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, 0x80, | ||
347 | 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, | ||
348 | 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x26, | ||
349 | 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, | ||
350 | 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, | ||
351 | 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, | ||
352 | 0x26, 0xe5, 0x47, 0x64, 0x0a, 0x70, 0x22, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x17, | ||
353 | 0xe5, 0x3a, 0xb4, 0x01, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x34, 0xe5, 0x46, 0x20, 0xe4, 0x03, | ||
354 | 0x30, 0xe5, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, | ||
355 | 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, | ||
356 | 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, | ||
357 | 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, | ||
358 | 0x94, 0x30, 0x40, 0x14, 0xa2, 0x71, 0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, | ||
359 | 0x54, 0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, | ||
360 | 0x64, 0x06, 0x70, 0x39, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, | ||
361 | 0x14, 0x60, 0x0c, 0x24, 0xfe, 0x60, 0x0c, 0x24, 0x03, 0x70, 0x13, 0xc2, 0x38, 0x80, 0x0f, 0xd2, | ||
362 | 0x38, 0x80, 0x0b, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x38, 0x30, 0x47, | ||
363 | 0x05, 0xaf, 0x27, 0x02, 0x17, 0x73, 0xe5, 0x27, 0xf4, 0xff, 0x02, 0x17, 0x73, 0xe5, 0x47, 0x64, | ||
364 | 0x07, 0x60, 0x0f, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, | ||
365 | 0x16, 0xf2, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x22, 0x14, 0x60, | ||
366 | 0x25, 0x14, 0x60, 0x2d, 0x24, 0xfc, 0x60, 0x49, 0x24, 0xf9, 0x60, 0x14, 0x24, 0x0e, 0x70, 0x50, | ||
367 | 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x24, 0xff, 0x80, 0x3a, | ||
368 | 0xd2, 0x39, 0xc2, 0x38, 0x80, 0x3e, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x1d, 0xc3, 0x80, | ||
369 | 0x1a, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, | ||
370 | 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0x38, 0xc2, 0x39, 0x80, | ||
371 | 0x13, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0xc2, 0x38, 0x80, 0x04, | ||
372 | 0xc2, 0x38, 0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, 0x27, 0xf4, 0xff, 0x02, | ||
373 | 0x17, 0x73, 0xe5, 0x47, 0x64, 0x0c, 0x60, 0x06, 0xe5, 0x47, 0x64, 0x0b, 0x70, 0x7a, 0x90, 0x02, | ||
374 | 0x29, 0xe0, 0x54, 0xfd, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x20, 0x14, 0x60, 0x21, 0x14, 0x60, 0x2b, | ||
375 | 0x24, 0xfc, 0x60, 0x45, 0x24, 0xf9, 0x60, 0x12, 0x24, 0x0e, 0x70, 0x4a, 0xe5, 0x46, 0x13, 0x13, | ||
376 | 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xe5, 0xf0, 0x80, 0x29, 0xd2, 0x39, 0x80, 0x3a, 0xe5, 0x46, | ||
377 | 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0x80, 0x2d, 0xe5, 0x46, 0x30, 0xe2, 0x0d, | ||
378 | 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, | ||
379 | 0x00, 0xee, 0x4f, 0x24, 0xff, 0x92, 0x39, 0x80, 0x0f, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, | ||
380 | 0x01, 0xc3, 0x92, 0x39, 0x80, 0x02, 0xc2, 0x39, 0x30, 0x47, 0x04, 0xaf, 0x27, 0x80, 0x04, 0xe5, | ||
381 | 0x27, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0xe5, 0x47, 0xb4, 0x0b, 0x10, 0x90, 0x02, | ||
382 | 0x29, 0xe0, 0x54, 0xeb, 0xf0, 0xe5, 0x27, 0x54, 0xeb, 0x45, 0x45, 0xf5, 0x27, 0x22, 0xe4, 0x90, | ||
383 | 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, | ||
384 | 0x28, 0xef, 0xf0, 0x22, 0x8f, 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, | ||
385 | 0x62, 0xc2, 0xaf, 0xe5, 0x51, 0x14, 0x60, 0x48, 0x14, 0x60, 0x66, 0x24, 0x02, 0x60, 0x03, 0x02, | ||
386 | 0x18, 0xb6, 0xd2, 0x59, 0x75, 0x55, 0x01, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0x7f, 0xf0, 0xa3, 0xe0, | ||
387 | 0x20, 0xe7, 0x23, 0x90, 0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, 0xe0, 0xb4, 0x02, 0x17, 0xa3, | ||
388 | 0xe0, 0xb4, 0x02, 0x12, 0x7f, 0x20, 0x12, 0x17, 0xa4, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, | ||
389 | 0x75, 0x51, 0x01, 0x02, 0x18, 0xb6, 0xe5, 0x50, 0x70, 0x06, 0x75, 0x62, 0x03, 0x02, 0x18, 0xb6, | ||
390 | 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x12, 0x7f, 0x20, 0x12, 0x17, 0xa4, 0x90, 0x02, 0xa2, | ||
391 | 0xe0, 0x54, 0xbf, 0xf0, 0x75, 0x51, 0x02, 0x02, 0x18, 0xb6, 0xe5, 0x50, 0x70, 0x03, 0x02, 0x18, | ||
392 | 0xb1, 0x90, 0x02, 0xa3, 0xe0, 0x30, 0xe6, 0x03, 0x02, 0x18, 0xad, 0x90, 0x04, 0x37, 0xe0, 0x64, | ||
393 | 0x22, 0x70, 0x7a, 0x90, 0x01, 0x8a, 0x74, 0x7e, 0xf0, 0x90, 0x01, 0x96, 0xf0, 0x90, 0x12, 0x04, | ||
394 | 0x74, 0x0a, 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x15, 0xe5, 0x59, 0xb4, 0x35, 0x10, 0xe4, 0x90, 0x05, | ||
395 | 0x00, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0x7f, 0x01, 0x12, | ||
396 | 0x0d, 0x48, 0x90, 0x13, 0x28, 0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xf0, 0xf0, 0xe5, 0x59, | ||
397 | 0xb4, 0x35, 0x14, 0xe5, 0x3c, 0xf4, 0x60, 0x06, 0xa3, 0xe0, 0x54, 0xf3, 0x80, 0x14, 0x90, 0x13, | ||
398 | 0x2a, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14, 0xe5, 0x3c, 0xf4, 0x90, 0x13, 0x2a, 0x60, 0x08, 0xe0, | ||
399 | 0x54, 0xf2, 0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x54, | ||
400 | 0xfd, 0xf0, 0x75, 0x62, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, | ||
401 | 0x05, 0x75, 0x62, 0x03, 0xf5, 0x51, 0xe5, 0x62, 0x60, 0x15, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 0xc2, | ||
402 | 0x59, 0xad, 0x62, 0xaf, 0x40, 0x12, 0x19, 0x61, 0xe5, 0x62, 0xb4, 0x03, 0x02, 0xd2, 0x03, 0xd2, | ||
403 | 0xaf, 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x12, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xf5, 0x51, 0xc2, 0x59, | ||
404 | 0xc2, 0x01, 0x7d, 0x02, 0xaf, 0x40, 0x12, 0x19, 0x61, 0xe5, 0x52, 0x14, 0x60, 0x09, 0x04, 0x70, | ||
405 | 0x6d, 0x75, 0x52, 0x01, 0x75, 0x55, 0x03, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x0e, 0xf0, 0x90, 0x13, | ||
406 | 0x28, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, | ||
407 | 0x12, 0x04, 0x74, 0x03, 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x16, 0xe5, 0x59, 0xb4, 0x35, 0x11, 0x90, | ||
408 | 0x05, 0x00, 0x74, 0xe2, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, | ||
409 | 0x7f, 0x01, 0x12, 0x0d, 0x48, 0x90, 0x02, 0xa2, 0xe0, 0x44, 0xc0, 0xf0, 0x90, 0x10, 0x04, 0xe0, | ||
410 | 0x44, 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 0x7d, 0x01, 0xaf, | ||
411 | 0x41, 0x12, 0x19, 0x61, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xd2, 0xaf, | ||
412 | 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, | ||
413 | 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, | ||
414 | 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, | ||
415 | 0x04, 0xd5, 0x22, 0x22, 0x22, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x4d, 0xc2, 0xaf, 0x90, 0x70, | ||
416 | 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 0xf0, 0x90, 0x70, | ||
417 | 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x62, 0x90, 0x10, 0x1e, 0xe0, | ||
418 | 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 0x1d, 0xe0, 0x90, | ||
419 | 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, 0x07, 0x90, 0x70, | ||
420 | 0x24, 0xe0, 0x44, 0x01, 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, | ||
421 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
422 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
423 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
424 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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427 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
429 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
430 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
431 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
432 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
433 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
434 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
435 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
436 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
439 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
440 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
441 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
442 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
443 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
444 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
445 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
446 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
447 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
449 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
450 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
451 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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453 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
454 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
455 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
456 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
457 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
459 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
460 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
461 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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463 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
464 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
465 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
466 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
467 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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470 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
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475 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
476 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
477 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
479 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
480 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
481 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
482 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
483 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
484 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
485 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
486 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
487 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
489 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
490 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
491 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
492 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
494 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
495 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
496 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
497 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
499 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
500 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
501 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
502 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
503 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
504 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
505 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
506 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
507 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
509 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
510 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
511 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
512 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
513 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
514 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
515 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
516 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
517 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x65, 0xd3, } ; | ||
diff --git a/drivers/staging/rt2860/common/rtmp_mcu.c b/drivers/staging/rt2860/common/rtmp_mcu.c index 9f03901433bb..844d4b987b78 100644 --- a/drivers/staging/rt2860/common/rtmp_mcu.c +++ b/drivers/staging/rt2860/common/rtmp_mcu.c | |||
@@ -37,35 +37,38 @@ | |||
37 | 37 | ||
38 | #include "../rt_config.h" | 38 | #include "../rt_config.h" |
39 | 39 | ||
40 | #if defined(RT2860) || defined(RT3090) | 40 | #include <linux/crc-ccitt.h> |
41 | #include "firmware.h" | 41 | #include <linux/firmware.h> |
42 | #include "../../rt3090/firmware.h" | ||
43 | #endif | ||
44 | #ifdef RT2870 | ||
45 | #include "../../rt3070/firmware.h" | ||
46 | #include "firmware_3070.h" | ||
47 | #endif | ||
48 | |||
49 | #include <linux/bitrev.h> | ||
50 | 42 | ||
51 | #ifdef RTMP_MAC_USB | 43 | #ifdef RTMP_MAC_USB |
52 | /* */ | ||
53 | /* RT2870 Firmware Spec only used 1 oct for version expression */ | ||
54 | /* */ | ||
55 | #define FIRMWARE_MINOR_VERSION 7 | ||
56 | #endif /* RTMP_MAC_USB // */ | ||
57 | 44 | ||
58 | /* New 8k byte firmware size for RT3071/RT3072 */ | 45 | #define FIRMWAREIMAGE_LENGTH 0x1000 |
59 | #define FIRMWAREIMAGE_MAX_LENGTH 0x2000 | ||
60 | #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(u8)) | ||
61 | #define FIRMWARE_MAJOR_VERSION 0 | ||
62 | 46 | ||
63 | #define FIRMWAREIMAGEV1_LENGTH 0x1000 | 47 | #define FIRMWARE_2870_MIN_VERSION 12 |
64 | #define FIRMWAREIMAGEV2_LENGTH 0x1000 | 48 | #define FIRMWARE_2870_FILENAME "rt2870.bin" |
49 | MODULE_FIRMWARE(FIRMWARE_2870_FILENAME); | ||
65 | 50 | ||
66 | #ifdef RTMP_MAC_PCI | 51 | #define FIRMWARE_3070_MIN_VERSION 17 |
67 | #define FIRMWARE_MINOR_VERSION 2 | 52 | #define FIRMWARE_3070_FILENAME "rt3070.bin" |
68 | #endif /* RTMP_MAC_PCI // */ | 53 | MODULE_FIRMWARE(FIRMWARE_3070_FILENAME); |
54 | |||
55 | #define FIRMWARE_3071_MIN_VERSION 17 | ||
56 | #define FIRMWARE_3071_FILENAME "rt3071.bin" /* for RT3071/RT3072 */ | ||
57 | MODULE_FIRMWARE(FIRMWARE_3071_FILENAME); | ||
58 | |||
59 | #else /* RTMP_MAC_PCI */ | ||
60 | |||
61 | #define FIRMWAREIMAGE_LENGTH 0x2000 | ||
62 | |||
63 | #define FIRMWARE_2860_MIN_VERSION 11 | ||
64 | #define FIRMWARE_2860_FILENAME "rt2860.bin" | ||
65 | MODULE_FIRMWARE(FIRMWARE_2860_FILENAME); | ||
66 | |||
67 | #define FIRMWARE_3090_MIN_VERSION 19 | ||
68 | #define FIRMWARE_3090_FILENAME "rt3090.bin" /* for RT3090/RT3390 */ | ||
69 | MODULE_FIRMWARE(FIRMWARE_3090_FILENAME); | ||
70 | |||
71 | #endif | ||
69 | 72 | ||
70 | /* | 73 | /* |
71 | ======================================================================== | 74 | ======================================================================== |
@@ -90,6 +93,78 @@ int RtmpAsicEraseFirmware(struct rt_rtmp_adapter *pAd) | |||
90 | return 0; | 93 | return 0; |
91 | } | 94 | } |
92 | 95 | ||
96 | static const struct firmware *rtmp_get_firmware(struct rt_rtmp_adapter *adapter) | ||
97 | { | ||
98 | const char *name; | ||
99 | const struct firmware *fw = NULL; | ||
100 | u8 min_version; | ||
101 | struct device *dev; | ||
102 | int err; | ||
103 | |||
104 | if (adapter->firmware) | ||
105 | return adapter->firmware; | ||
106 | |||
107 | #ifdef RTMP_MAC_USB | ||
108 | if (IS_RT3071(adapter)) { | ||
109 | name = FIRMWARE_3071_FILENAME; | ||
110 | min_version = FIRMWARE_3071_MIN_VERSION; | ||
111 | } else if (IS_RT3070(adapter)) { | ||
112 | name = FIRMWARE_3070_FILENAME; | ||
113 | min_version = FIRMWARE_3070_MIN_VERSION; | ||
114 | } else { | ||
115 | name = FIRMWARE_2870_FILENAME; | ||
116 | min_version = FIRMWARE_2870_MIN_VERSION; | ||
117 | } | ||
118 | dev = &((struct os_cookie *)adapter->OS_Cookie)->pUsb_Dev->dev; | ||
119 | #else /* RTMP_MAC_PCI */ | ||
120 | if (IS_RT3090(adapter) || IS_RT3390(adapter)) { | ||
121 | name = FIRMWARE_3090_FILENAME; | ||
122 | min_version = FIRMWARE_3090_MIN_VERSION; | ||
123 | } else { | ||
124 | name = FIRMWARE_2860_FILENAME; | ||
125 | min_version = FIRMWARE_2860_MIN_VERSION; | ||
126 | } | ||
127 | dev = &((struct os_cookie *)adapter->OS_Cookie)->pci_dev->dev; | ||
128 | #endif | ||
129 | |||
130 | err = request_firmware(&fw, name, dev); | ||
131 | if (err) { | ||
132 | dev_err(dev, "firmware file %s request failed (%d)\n", | ||
133 | name, err); | ||
134 | return NULL; | ||
135 | } | ||
136 | |||
137 | if (fw->size < FIRMWAREIMAGE_LENGTH) { | ||
138 | dev_err(dev, "firmware file %s size is invalid\n", name); | ||
139 | goto invalid; | ||
140 | } | ||
141 | |||
142 | /* is it new enough? */ | ||
143 | adapter->FirmwareVersion = fw->data[FIRMWAREIMAGE_LENGTH - 3]; | ||
144 | if (adapter->FirmwareVersion < min_version) { | ||
145 | dev_err(dev, | ||
146 | "firmware file %s is too old;" | ||
147 | " driver requires v%d or later\n", | ||
148 | name, min_version); | ||
149 | goto invalid; | ||
150 | } | ||
151 | |||
152 | /* is the internal CRC correct? */ | ||
153 | if (crc_ccitt(0xffff, fw->data, FIRMWAREIMAGE_LENGTH - 2) != | ||
154 | (fw->data[FIRMWAREIMAGE_LENGTH - 2] | | ||
155 | (fw->data[FIRMWAREIMAGE_LENGTH - 1] << 8))) { | ||
156 | dev_err(dev, "firmware file %s failed internal CRC\n", name); | ||
157 | goto invalid; | ||
158 | } | ||
159 | |||
160 | adapter->firmware = fw; | ||
161 | return fw; | ||
162 | |||
163 | invalid: | ||
164 | release_firmware(fw); | ||
165 | return NULL; | ||
166 | } | ||
167 | |||
93 | /* | 168 | /* |
94 | ======================================================================== | 169 | ======================================================================== |
95 | 170 | ||
@@ -109,46 +184,16 @@ int RtmpAsicEraseFirmware(struct rt_rtmp_adapter *pAd) | |||
109 | */ | 184 | */ |
110 | int RtmpAsicLoadFirmware(struct rt_rtmp_adapter *pAd) | 185 | int RtmpAsicLoadFirmware(struct rt_rtmp_adapter *pAd) |
111 | { | 186 | { |
112 | 187 | const struct firmware *fw; | |
113 | int Status = NDIS_STATUS_SUCCESS; | 188 | int Status = NDIS_STATUS_SUCCESS; |
114 | u8 *pFirmwareImage = NULL; | 189 | unsigned long Index; |
115 | unsigned long FileLength, Index; | ||
116 | u32 MacReg = 0; | 190 | u32 MacReg = 0; |
117 | #ifdef RTMP_MAC_USB | ||
118 | u32 Version = (pAd->MACVersion >> 16); | ||
119 | #endif | ||
120 | 191 | ||
121 | /* New 8k byte firmware size for RT3071/RT3072 */ | 192 | fw = rtmp_get_firmware(pAd); |
122 | { | 193 | if (!fw) |
123 | #ifdef RTMP_MAC_PCI | 194 | return NDIS_STATUS_FAILURE; |
124 | if (IS_RT3090(pAd) || IS_RT3390(pAd)) { | ||
125 | pFirmwareImage = FirmwareImage_3090; | ||
126 | FileLength = FIRMWAREIMAGE_MAX_LENGTH; | ||
127 | } else { | ||
128 | pFirmwareImage = FirmwareImage_2860; | ||
129 | FileLength = FIRMWAREIMAGE_MAX_LENGTH; | ||
130 | } | ||
131 | #endif /* RTMP_MAC_PCI // */ | ||
132 | #ifdef RTMP_MAC_USB | ||
133 | /* the firmware image consists of two parts */ | ||
134 | if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070)) { /* use the second part */ | ||
135 | /*printk("KH:Use New Version,part2\n"); */ | ||
136 | pFirmwareImage = | ||
137 | (u8 *)& | ||
138 | FirmwareImage_3070[FIRMWAREIMAGEV1_LENGTH]; | ||
139 | FileLength = FIRMWAREIMAGEV2_LENGTH; | ||
140 | } else { | ||
141 | /*printk("KH:Use New Version,part1\n"); */ | ||
142 | if (Version == 0x3070) | ||
143 | pFirmwareImage = FirmwareImage_3070; | ||
144 | else | ||
145 | pFirmwareImage = FirmwareImage_2870; | ||
146 | FileLength = FIRMWAREIMAGEV1_LENGTH; | ||
147 | } | ||
148 | #endif /* RTMP_MAC_USB // */ | ||
149 | } | ||
150 | 195 | ||
151 | RTMP_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength); | 196 | RTMP_WRITE_FIRMWARE(pAd, fw->data, FIRMWAREIMAGE_LENGTH); |
152 | 197 | ||
153 | /* check if MCU is ready */ | 198 | /* check if MCU is ready */ |
154 | Index = 0; | 199 | Index = 0; |
@@ -221,7 +266,7 @@ int RtmpAsicSendCommandToMcu(struct rt_rtmp_adapter *pAd, | |||
221 | ("AsicSendCommanToMcu::Mail box is busy\n")); | 266 | ("AsicSendCommanToMcu::Mail box is busy\n")); |
222 | } while (i++ < 100); | 267 | } while (i++ < 100); |
223 | 268 | ||
224 | if (i >= 100) { | 269 | if (i > 100) { |
225 | DBGPRINT_ERR(("H2M_MAILBOX still hold by MCU. command fail\n")); | 270 | DBGPRINT_ERR(("H2M_MAILBOX still hold by MCU. command fail\n")); |
226 | return FALSE; | 271 | return FALSE; |
227 | } | 272 | } |
diff --git a/drivers/staging/rt2860/rt_linux.c b/drivers/staging/rt2860/rt_linux.c index 9357fb26cc2a..b5c78aecf5e3 100644 --- a/drivers/staging/rt2860/rt_linux.c +++ b/drivers/staging/rt2860/rt_linux.c | |||
@@ -25,6 +25,7 @@ | |||
25 | ************************************************************************* | 25 | ************************************************************************* |
26 | */ | 26 | */ |
27 | 27 | ||
28 | #include <linux/firmware.h> | ||
28 | #include <linux/sched.h> | 29 | #include <linux/sched.h> |
29 | #include "rt_config.h" | 30 | #include "rt_config.h" |
30 | 31 | ||
@@ -260,6 +261,8 @@ void RTMPFreeAdapter(struct rt_rtmp_adapter *pAd) | |||
260 | 261 | ||
261 | NdisFreeSpinLock(&pAd->irq_lock); | 262 | NdisFreeSpinLock(&pAd->irq_lock); |
262 | 263 | ||
264 | release_firmware(pAd->firmware); | ||
265 | |||
263 | vfree(pAd); /* pci_free_consistent(os_cookie->pci_dev,sizeof(struct rt_rtmp_adapter),pAd,os_cookie->pAd_pa); */ | 266 | vfree(pAd); /* pci_free_consistent(os_cookie->pci_dev,sizeof(struct rt_rtmp_adapter),pAd,os_cookie->pAd_pa); */ |
264 | if (os_cookie) | 267 | if (os_cookie) |
265 | kfree(os_cookie); | 268 | kfree(os_cookie); |
@@ -462,9 +465,9 @@ void *duplicate_pkt(struct rt_rtmp_adapter *pAd, | |||
462 | if ((skb = | 465 | if ((skb = |
463 | __dev_alloc_skb(HdrLen + DataSize + 2, MEM_ALLOC_FLAG)) != NULL) { | 466 | __dev_alloc_skb(HdrLen + DataSize + 2, MEM_ALLOC_FLAG)) != NULL) { |
464 | skb_reserve(skb, 2); | 467 | skb_reserve(skb, 2); |
465 | NdisMoveMemory(skb->tail, pHeader802_3, HdrLen); | 468 | NdisMoveMemory(skb_tail_pointer(skb), pHeader802_3, HdrLen); |
466 | skb_put(skb, HdrLen); | 469 | skb_put(skb, HdrLen); |
467 | NdisMoveMemory(skb->tail, pData, DataSize); | 470 | NdisMoveMemory(skb_tail_pointer(skb), pData, DataSize); |
468 | skb_put(skb, DataSize); | 471 | skb_put(skb, DataSize); |
469 | skb->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); | 472 | skb->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); |
470 | pPacket = OSPKT_TO_RTPKT(skb); | 473 | pPacket = OSPKT_TO_RTPKT(skb); |
@@ -515,7 +518,7 @@ void *ClonePacket(struct rt_rtmp_adapter *pAd, | |||
515 | pClonedPkt->dev = pRxPkt->dev; | 518 | pClonedPkt->dev = pRxPkt->dev; |
516 | pClonedPkt->data = pData; | 519 | pClonedPkt->data = pData; |
517 | pClonedPkt->len = DataSize; | 520 | pClonedPkt->len = DataSize; |
518 | pClonedPkt->tail = pClonedPkt->data + pClonedPkt->len; | 521 | skb_set_tail_pointer(pClonedPkt, DataSize) |
519 | ASSERT(DataSize < 1530); | 522 | ASSERT(DataSize < 1530); |
520 | } | 523 | } |
521 | return pClonedPkt; | 524 | return pClonedPkt; |
@@ -535,7 +538,7 @@ void update_os_packet_info(struct rt_rtmp_adapter *pAd, | |||
535 | pOSPkt->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); | 538 | pOSPkt->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); |
536 | pOSPkt->data = pRxBlk->pData; | 539 | pOSPkt->data = pRxBlk->pData; |
537 | pOSPkt->len = pRxBlk->DataSize; | 540 | pOSPkt->len = pRxBlk->DataSize; |
538 | pOSPkt->tail = pOSPkt->data + pOSPkt->len; | 541 | skb_set_tail_pointer(pOSPkt, pOSPkt->len); |
539 | } | 542 | } |
540 | 543 | ||
541 | void wlan_802_11_to_802_3_packet(struct rt_rtmp_adapter *pAd, | 544 | void wlan_802_11_to_802_3_packet(struct rt_rtmp_adapter *pAd, |
@@ -553,7 +556,7 @@ void wlan_802_11_to_802_3_packet(struct rt_rtmp_adapter *pAd, | |||
553 | pOSPkt->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); | 556 | pOSPkt->dev = get_netdev_from_bssid(pAd, FromWhichBSSID); |
554 | pOSPkt->data = pRxBlk->pData; | 557 | pOSPkt->data = pRxBlk->pData; |
555 | pOSPkt->len = pRxBlk->DataSize; | 558 | pOSPkt->len = pRxBlk->DataSize; |
556 | pOSPkt->tail = pOSPkt->data + pOSPkt->len; | 559 | skb_set_tail_pointer(pOSPkt, pOSPkt->len); |
557 | 560 | ||
558 | /* */ | 561 | /* */ |
559 | /* copy 802.3 header */ | 562 | /* copy 802.3 header */ |
diff --git a/drivers/staging/rt2860/rt_linux.h b/drivers/staging/rt2860/rt_linux.h index f85508d9d5a9..a7c540f8e3e3 100644 --- a/drivers/staging/rt2860/rt_linux.h +++ b/drivers/staging/rt2860/rt_linux.h | |||
@@ -658,9 +658,9 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, | |||
658 | (RTPKT_TO_OSPKT(_pkt)->len) = (_len) | 658 | (RTPKT_TO_OSPKT(_pkt)->len) = (_len) |
659 | 659 | ||
660 | #define GET_OS_PKT_DATATAIL(_pkt) \ | 660 | #define GET_OS_PKT_DATATAIL(_pkt) \ |
661 | (RTPKT_TO_OSPKT(_pkt)->tail) | 661 | (skb_tail_pointer(RTPKT_TO_OSPKT(_pkt)) |
662 | #define SET_OS_PKT_DATATAIL(_pkt, _start, _len) \ | 662 | #define SET_OS_PKT_DATATAIL(_pkt, _start, _len) \ |
663 | ((RTPKT_TO_OSPKT(_pkt))->tail) = (u8 *)((_start) + (_len)) | 663 | (skb_set_tail_pointer(RTPKT_TO_OSPKT(_pkt), _len)) |
664 | 664 | ||
665 | #define GET_OS_PKT_HEAD(_pkt) \ | 665 | #define GET_OS_PKT_HEAD(_pkt) \ |
666 | (RTPKT_TO_OSPKT(_pkt)->head) | 666 | (RTPKT_TO_OSPKT(_pkt)->head) |
diff --git a/drivers/staging/rt2860/rt_main_dev.c b/drivers/staging/rt2860/rt_main_dev.c index c3d92802d0c9..fbddb00cfedd 100644 --- a/drivers/staging/rt2860/rt_main_dev.c +++ b/drivers/staging/rt2860/rt_main_dev.c | |||
@@ -216,7 +216,7 @@ int rt28xx_close(struct net_device *dev) | |||
216 | u32 i = 0; | 216 | u32 i = 0; |
217 | 217 | ||
218 | #ifdef RTMP_MAC_USB | 218 | #ifdef RTMP_MAC_USB |
219 | DECLARE_WAIT_QUEUE_HEAD(unlink_wakeup); | 219 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup); |
220 | DECLARE_WAITQUEUE(wait, current); | 220 | DECLARE_WAITQUEUE(wait, current); |
221 | #endif /* RTMP_MAC_USB // */ | 221 | #endif /* RTMP_MAC_USB // */ |
222 | 222 | ||
diff --git a/drivers/staging/rt2860/rtmp.h b/drivers/staging/rt2860/rtmp.h index c50abf4b8068..4401a55bda67 100644 --- a/drivers/staging/rt2860/rtmp.h +++ b/drivers/staging/rt2860/rtmp.h | |||
@@ -1719,6 +1719,7 @@ struct rt_rtmp_adapter { | |||
1719 | void *OS_Cookie; /* save specific structure relative to OS */ | 1719 | void *OS_Cookie; /* save specific structure relative to OS */ |
1720 | struct net_device *net_dev; | 1720 | struct net_device *net_dev; |
1721 | unsigned long VirtualIfCnt; | 1721 | unsigned long VirtualIfCnt; |
1722 | const struct firmware *firmware; | ||
1722 | 1723 | ||
1723 | struct rt_rtmp_chip_op chipOps; | 1724 | struct rt_rtmp_chip_op chipOps; |
1724 | u16 ThisTbttNumToNextWakeUp; | 1725 | u16 ThisTbttNumToNextWakeUp; |
@@ -4043,10 +4044,10 @@ int RTUSBMultiRead(struct rt_rtmp_adapter *pAd, | |||
4043 | u16 Offset, u8 *pData, u16 length); | 4044 | u16 Offset, u8 *pData, u16 length); |
4044 | 4045 | ||
4045 | int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, | 4046 | int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, |
4046 | u16 Offset, u8 *pData, u16 length); | 4047 | u16 Offset, const u8 *pData, u16 length); |
4047 | 4048 | ||
4048 | int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, | 4049 | int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, |
4049 | u16 Offset, u8 *pData); | 4050 | u16 Offset, const u8 *pData); |
4050 | 4051 | ||
4051 | int RTUSBReadBBPRegister(struct rt_rtmp_adapter *pAd, | 4052 | int RTUSBReadBBPRegister(struct rt_rtmp_adapter *pAd, |
4052 | u8 Id, u8 *pValue); | 4053 | u8 Id, u8 *pValue); |
@@ -4112,7 +4113,7 @@ int RTUSBSingleWrite(struct rt_rtmp_adapter *pAd, | |||
4112 | u16 Offset, u16 Value); | 4113 | u16 Offset, u16 Value); |
4113 | 4114 | ||
4114 | int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, | 4115 | int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, |
4115 | u8 *pFwImage, unsigned long FwLen); | 4116 | const u8 *pFwImage, unsigned long FwLen); |
4116 | 4117 | ||
4117 | int RTUSBVenderReset(struct rt_rtmp_adapter *pAd); | 4118 | int RTUSBVenderReset(struct rt_rtmp_adapter *pAd); |
4118 | 4119 | ||
diff --git a/drivers/staging/rt2860/sta/connect.c b/drivers/staging/rt2860/sta/connect.c index 17e59ba3d807..55732b10062d 100644 --- a/drivers/staging/rt2860/sta/connect.c +++ b/drivers/staging/rt2860/sta/connect.c | |||
@@ -62,8 +62,8 @@ u8 CipherSuiteWpaNoneAes[] = { | |||
62 | u8 CipherSuiteWpaNoneAesLen = | 62 | u8 CipherSuiteWpaNoneAesLen = |
63 | (sizeof(CipherSuiteWpaNoneAes) / sizeof(u8)); | 63 | (sizeof(CipherSuiteWpaNoneAes) / sizeof(u8)); |
64 | 64 | ||
65 | /* The following MACRO is called after 1. starting an new IBSS, 2. succesfully JOIN an IBSS, */ | 65 | /* The following MACRO is called after 1. starting an new IBSS, 2. successfully JOIN an IBSS, */ |
66 | /* or 3. succesfully ASSOCIATE to a BSS, 4. successfully RE_ASSOCIATE to a BSS */ | 66 | /* or 3. successfully ASSOCIATE to a BSS, 4. successfully RE_ASSOCIATE to a BSS */ |
67 | /* All settings successfuly negotiated furing MLME state machines become final settings */ | 67 | /* All settings successfuly negotiated furing MLME state machines become final settings */ |
68 | /* and are copied to pAd->StaActive */ | 68 | /* and are copied to pAd->StaActive */ |
69 | #define COPY_SETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd) \ | 69 | #define COPY_SETTINGS_FROM_MLME_AUX_TO_ACTIVE_CFG(_pAd) \ |
diff --git a/drivers/staging/rt2860/sta_ioctl.c b/drivers/staging/rt2860/sta_ioctl.c index d8fbe6cc6941..de4b6277baee 100644 --- a/drivers/staging/rt2860/sta_ioctl.c +++ b/drivers/staging/rt2860/sta_ioctl.c | |||
@@ -975,10 +975,7 @@ int rt_ioctl_giwscan(struct net_device *dev, | |||
975 | /*================================ */ | 975 | /*================================ */ |
976 | memset(&iwe, 0, sizeof(iwe)); | 976 | memset(&iwe, 0, sizeof(iwe)); |
977 | iwe.cmd = SIOCGIWFREQ; | 977 | iwe.cmd = SIOCGIWFREQ; |
978 | if (INFRA_ON(pAdapter) || ADHOC_ON(pAdapter)) | 978 | iwe.u.freq.m = pAdapter->ScanTab.BssEntry[i].Channel; |
979 | iwe.u.freq.m = pAdapter->ScanTab.BssEntry[i].Channel; | ||
980 | else | ||
981 | iwe.u.freq.m = pAdapter->ScanTab.BssEntry[i].Channel; | ||
982 | iwe.u.freq.e = 0; | 979 | iwe.u.freq.e = 0; |
983 | iwe.u.freq.i = 0; | 980 | iwe.u.freq.i = 0; |
984 | 981 | ||
diff --git a/drivers/staging/rt2860/usb_main_dev.c b/drivers/staging/rt2860/usb_main_dev.c index 925a236e1044..1873a79bb033 100644 --- a/drivers/staging/rt2860/usb_main_dev.c +++ b/drivers/staging/rt2860/usb_main_dev.c | |||
@@ -216,10 +216,6 @@ static int rt2870_suspend(struct usb_interface *intf, pm_message_t state); | |||
216 | static int rt2870_resume(struct usb_interface *intf); | 216 | static int rt2870_resume(struct usb_interface *intf); |
217 | #endif /* CONFIG_PM // */ | 217 | #endif /* CONFIG_PM // */ |
218 | 218 | ||
219 | static int rtusb_probe(struct usb_interface *intf, | ||
220 | const struct usb_device_id *id); | ||
221 | static void rtusb_disconnect(struct usb_interface *intf); | ||
222 | |||
223 | static BOOLEAN USBDevConfigInit(IN struct usb_device *dev, | 219 | static BOOLEAN USBDevConfigInit(IN struct usb_device *dev, |
224 | IN struct usb_interface *intf, | 220 | IN struct usb_interface *intf, |
225 | struct rt_rtmp_adapter *pAd) | 221 | struct rt_rtmp_adapter *pAd) |
@@ -296,7 +292,7 @@ static BOOLEAN USBDevConfigInit(IN struct usb_device *dev, | |||
296 | 292 | ||
297 | } | 293 | } |
298 | 294 | ||
299 | static int rtusb_probe(struct usb_interface *intf, | 295 | static int __devinit rtusb_probe(struct usb_interface *intf, |
300 | const struct usb_device_id *id) | 296 | const struct usb_device_id *id) |
301 | { | 297 | { |
302 | struct rt_rtmp_adapter *pAd; | 298 | struct rt_rtmp_adapter *pAd; |
diff --git a/drivers/staging/rt2870/Kconfig b/drivers/staging/rt2870/Kconfig index fd3ba3a3b127..6ea172b433e9 100644 --- a/drivers/staging/rt2870/Kconfig +++ b/drivers/staging/rt2870/Kconfig | |||
@@ -3,5 +3,7 @@ config RT2870 | |||
3 | depends on USB && X86 && WLAN | 3 | depends on USB && X86 && WLAN |
4 | select WIRELESS_EXT | 4 | select WIRELESS_EXT |
5 | select WEXT_PRIV | 5 | select WEXT_PRIV |
6 | select CRC_CCITT | ||
7 | select FW_LOADER | ||
6 | ---help--- | 8 | ---help--- |
7 | This is an experimental driver for the Ralink xx70 wireless chips. | 9 | This is an experimental driver for the Ralink xx70 wireless chips. |
diff --git a/drivers/staging/rt2870/common/rtusb_io.c b/drivers/staging/rt2870/common/rtusb_io.c index 34443f2243f1..cf0d2f5dbc6c 100644 --- a/drivers/staging/rt2870/common/rtusb_io.c +++ b/drivers/staging/rt2870/common/rtusb_io.c | |||
@@ -84,7 +84,7 @@ static int RTUSBFirmwareRun(struct rt_rtmp_adapter *pAd) | |||
84 | ======================================================================== | 84 | ======================================================================== |
85 | */ | 85 | */ |
86 | int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, | 86 | int RTUSBFirmwareWrite(struct rt_rtmp_adapter *pAd, |
87 | u8 *pFwImage, unsigned long FwLen) | 87 | const u8 *pFwImage, unsigned long FwLen) |
88 | { | 88 | { |
89 | u32 MacReg; | 89 | u32 MacReg; |
90 | int Status; | 90 | int Status; |
@@ -167,7 +167,7 @@ int RTUSBMultiRead(struct rt_rtmp_adapter *pAd, | |||
167 | ======================================================================== | 167 | ======================================================================== |
168 | */ | 168 | */ |
169 | int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, | 169 | int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, |
170 | u16 Offset, u8 *pData) | 170 | u16 Offset, const u8 *pData) |
171 | { | 171 | { |
172 | int Status; | 172 | int Status; |
173 | 173 | ||
@@ -175,18 +175,18 @@ int RTUSBMultiWrite_OneByte(struct rt_rtmp_adapter *pAd, | |||
175 | Status = RTUSB_VendorRequest(pAd, | 175 | Status = RTUSB_VendorRequest(pAd, |
176 | USBD_TRANSFER_DIRECTION_OUT, | 176 | USBD_TRANSFER_DIRECTION_OUT, |
177 | DEVICE_VENDOR_REQUEST_OUT, | 177 | DEVICE_VENDOR_REQUEST_OUT, |
178 | 0x6, 0, Offset, pData, 1); | 178 | 0x6, 0, Offset, (u8 *)pData, 1); |
179 | 179 | ||
180 | return Status; | 180 | return Status; |
181 | } | 181 | } |
182 | 182 | ||
183 | int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, | 183 | int RTUSBMultiWrite(struct rt_rtmp_adapter *pAd, |
184 | u16 Offset, u8 *pData, u16 length) | 184 | u16 Offset, const u8 *pData, u16 length) |
185 | { | 185 | { |
186 | int Status; | 186 | int Status; |
187 | 187 | ||
188 | u16 index = 0, Value; | 188 | u16 index = 0, Value; |
189 | u8 *pSrc = pData; | 189 | const u8 *pSrc = pData; |
190 | u16 resude = 0; | 190 | u16 resude = 0; |
191 | 191 | ||
192 | resude = length % 2; | 192 | resude = length % 2; |
diff --git a/drivers/staging/rt3070/firmware.h b/drivers/staging/rt3070/firmware.h deleted file mode 100644 index 5cf9cbcf4ab6..000000000000 --- a/drivers/staging/rt3070/firmware.h +++ /dev/null | |||
@@ -1,558 +0,0 @@ | |||
1 | /* | ||
2 | Copyright (c) 2007, Ralink Technology Corporation | ||
3 | All rights reserved. | ||
4 | |||
5 | Redistribution. Redistribution and use in binary form, without | ||
6 | modification, are permitted provided that the following conditions are | ||
7 | met: | ||
8 | |||
9 | * Redistributions must reproduce the above copyright notice and the | ||
10 | following disclaimer in the documentation and/or other materials | ||
11 | provided with the distribution. | ||
12 | * Neither the name of Ralink Technology Corporation nor the names of its | ||
13 | suppliers may be used to endorse or promote products derived from this | ||
14 | software without specific prior written permission. | ||
15 | * No reverse engineering, decompilation, or disassembly of this software | ||
16 | is permitted. | ||
17 | |||
18 | Limited patent license. Ralink Technology Corporation grants a world-wide, | ||
19 | royalty-free, non-exclusive license under patents it now or hereafter | ||
20 | owns or controls to make, have made, use, import, offer to sell and | ||
21 | sell ("Utilize") this software, but solely to the extent that any | ||
22 | such patent is necessary to Utilize the software alone, or in | ||
23 | combination with an operating system licensed under an approved Open | ||
24 | Source license as listed by the Open Source Initiative at | ||
25 | http://opensource.org/licenses. The patent license shall not apply to | ||
26 | any other combinations which include this software. No hardware per | ||
27 | se is licensed hereunder. | ||
28 | |||
29 | DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
30 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, | ||
31 | BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND | ||
32 | FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | ||
33 | COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
34 | INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
35 | BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | ||
36 | OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
37 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | ||
38 | TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | ||
39 | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
40 | DAMAGE. | ||
41 | */ | ||
42 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
43 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
44 | |||
45 | |||
46 | u8 FirmwareImage_2870 [] = { | ||
47 | 0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x32, 0x02, 0x10, 0x78, 0x02, 0x12, 0x67, 0x02, | ||
48 | 0x12, 0x68, 0x02, 0x12, 0x87, 0x02, 0x12, 0x8c, 0x12, 0x12, 0x88, 0x22, 0x02, 0x16, 0x49, 0x02, | ||
49 | 0x17, 0x1f, 0x02, 0x13, 0x77, 0x02, 0x12, 0x8d, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x17, | ||
50 | 0xc1, 0x22, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe3, 0x1b, 0xe5, 0x4c, 0x30, 0xe0, 0x04, 0x7f, 0x40, | ||
51 | 0x80, 0x02, 0x7f, 0x00, 0x90, 0x10, 0x2f, 0xef, 0xf0, 0x90, 0x01, 0x8c, 0x74, 0x08, 0xf0, 0xe4, | ||
52 | 0x90, 0x01, 0xa7, 0xf0, 0x90, 0x01, 0x8c, 0xe0, 0x30, 0xe0, 0x1c, 0x90, 0x01, 0x80, 0xe0, 0xb4, | ||
53 | 0x02, 0x15, 0xa3, 0xe0, 0xb4, 0x01, 0x10, 0x90, 0x01, 0x84, 0xe0, 0xb4, 0x81, 0x09, 0x90, 0x01, | ||
54 | 0x8c, 0x74, 0x01, 0xf0, 0x12, 0x0d, 0xc8, 0x22, 0x90, 0x04, 0x14, 0xe0, 0x20, 0xe7, 0x03, 0x02, | ||
55 | 0x12, 0x66, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, 0x12, 0x0a, 0x9d, 0x10, | ||
56 | 0xb7, 0x31, 0x10, 0xe0, 0x50, 0x11, 0x04, 0x51, 0x11, 0x0d, 0x52, 0x11, 0x0d, 0x53, 0x11, 0x0d, | ||
57 | 0x54, 0x11, 0x4e, 0x55, 0x11, 0x7e, 0x70, 0x11, 0xa9, 0x71, 0x11, 0xd7, 0x72, 0x12, 0x1d, 0x73, | ||
58 | 0x12, 0x3e, 0x80, 0x00, 0x00, 0x12, 0x66, 0x20, 0x02, 0x03, 0x30, 0x03, 0x1d, 0x7d, 0x02, 0xaf, | ||
59 | 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, | ||
60 | 0x56, 0xf4, 0x70, 0x03, 0x02, 0x12, 0x66, 0x02, 0x12, 0x5f, 0x85, 0x56, 0x41, 0xd2, 0x02, 0x22, | ||
61 | 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0x64, 0x02, 0x60, 0x03, 0x02, 0x12, 0x66, 0x90, 0x70, 0x11, | ||
62 | 0xe0, 0x64, 0x08, 0x60, 0x08, 0xe0, 0x64, 0x20, 0x60, 0x03, 0x02, 0x12, 0x66, 0x75, 0x4e, 0x03, | ||
63 | 0x75, 0x4f, 0x20, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, 0x47, 0x22, 0x90, 0x04, 0x04, | ||
64 | 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x74, 0x47, 0x25, 0x57, | ||
65 | 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, 0x25, 0x57, 0xf8, 0xc6, 0xef, | ||
66 | 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, | ||
67 | 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, 0x03, 0x02, 0x12, 0x66, 0x02, 0x12, 0x5f, 0xe5, 0x47, | ||
68 | 0x64, 0x07, 0x60, 0x0b, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x09, 0x08, 0x90, | ||
69 | 0x70, 0x11, 0xe0, 0x54, 0x0f, 0xf5, 0x3a, 0xe5, 0x47, 0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03, | ||
70 | 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0xd2, 0x04, 0x22, 0x90, 0x70, | ||
71 | 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf8, 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, | ||
72 | 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, | ||
73 | 0xf4, 0x70, 0x03, 0x02, 0x12, 0x66, 0x02, 0x12, 0x5f, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, | ||
74 | 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x0b, | ||
75 | 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x70, | ||
76 | 0x03, 0x02, 0x12, 0x66, 0x02, 0x12, 0x5f, 0x90, 0x10, 0x02, 0xe0, 0xb4, 0x70, 0x1e, 0xa3, 0xe0, | ||
77 | 0xb4, 0x30, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, 0x01, 0xf0, 0xfd, 0x90, 0x05, 0x05, 0xe0, 0x54, | ||
78 | 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, 0x90, 0x05, 0x08, 0xf0, 0xe4, 0xf5, 0x4e, 0xf5, | ||
79 | 0x4f, 0x75, 0x3a, 0xff, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, 0x80, | ||
80 | 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x4b, 0x80, 0x42, 0x90, 0x70, 0x10, | ||
81 | 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, 0x04, 0x14, 0x74, | ||
82 | 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x2a, 0x80, 0x21, 0x90, 0x70, | ||
83 | 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x0b, 0x91, 0x90, | ||
84 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0xe5, 0x56, 0xf4, 0x60, 0x07, 0x90, | ||
85 | 0x70, 0x25, 0xe0, 0x44, 0x01, 0xf0, 0x22, 0x22, 0xe5, 0x53, 0x70, 0x1a, 0x30, 0x60, 0x09, 0xb2, | ||
86 | 0x4d, 0x30, 0x4d, 0x04, 0x05, 0x46, 0xc2, 0x04, 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, | ||
87 | 0x15, 0x4f, 0x70, 0x02, 0x15, 0x4e, 0x22, 0x22, 0xc2, 0x42, 0xd3, 0x22, 0x22, 0xc2, 0x4b, 0xc2, | ||
88 | 0x4c, 0xe5, 0x44, 0x12, 0x0a, 0x9d, 0x12, 0xaf, 0x00, 0x13, 0x42, 0x04, 0x13, 0x3e, 0x08, 0x13, | ||
89 | 0x19, 0x10, 0x12, 0xc3, 0x20, 0x12, 0xe3, 0x60, 0x12, 0xf4, 0xa0, 0x00, 0x00, 0x13, 0x44, 0x85, | ||
90 | 0x48, 0x43, 0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60, 0x03, 0x02, 0x13, | ||
91 | 0x44, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4a, 0xc4, 0x54, 0x0f, 0xf5, | ||
92 | 0x42, 0xe5, 0x4c, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x66, 0x53, 0x43, | ||
93 | 0x0f, 0x80, 0x61, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 0x5e, 0xe5, 0x47, 0x64, 0x06, | ||
94 | 0x70, 0x52, 0x80, 0x1b, 0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, 0xc4, 0x54, 0x0f, | ||
95 | 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x35, 0xe5, | ||
96 | 0x43, 0x54, 0x0f, 0x44, 0x10, 0xf5, 0x43, 0x80, 0x2b, 0xe5, 0x47, 0xb4, 0x04, 0x06, 0x53, 0x5e, | ||
97 | 0xfb, 0x75, 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, 0x42, 0x09, 0xe5, | ||
98 | 0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5, 0x43, 0x80, 0x06, 0xd2, 0x4b, | ||
99 | 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x25, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, 0xe5, 0x43, 0x54, | ||
100 | 0x0f, 0x4f, 0xf5, 0x5f, 0x90, 0x70, 0x44, 0xf0, 0xa3, 0xe5, 0x5e, 0xf0, 0xa3, 0xe5, 0x4a, 0xf0, | ||
101 | 0xa3, 0xe5, 0x48, 0xf0, 0xa3, 0xe5, 0x4c, 0xf0, 0xa3, 0xe5, 0x44, 0xf0, 0xa3, 0xe5, 0x42, 0xf0, | ||
102 | 0xa3, 0xe5, 0x43, 0xf0, 0xd2, 0x60, 0x22, 0xe5, 0x47, 0x60, 0x10, 0x24, 0xc0, 0x70, 0x03, 0x12, | ||
103 | 0x16, 0x29, 0x12, 0x13, 0x8c, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x90, 0x04, | ||
104 | 0x14, 0xe0, 0x54, 0x0e, 0x60, 0x04, 0xd2, 0x18, 0x80, 0x08, 0xe5, 0x4e, 0x45, 0x4f, 0x24, 0xff, | ||
105 | 0x92, 0x18, 0xd2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x19, 0x74, 0x1e, 0xf0, 0xe5, | ||
106 | 0x5f, 0x54, 0x0f, 0xf5, 0x2d, 0xe5, 0x25, 0x70, 0x13, 0x30, 0x18, 0x05, 0xe5, 0x5f, 0x20, 0xe5, | ||
107 | 0x0b, 0x30, 0x19, 0x19, 0xe5, 0x5f, 0x54, 0x30, 0xff, 0xbf, 0x30, 0x11, 0xe5, 0x25, 0x70, 0x05, | ||
108 | 0x75, 0x25, 0x0c, 0x80, 0x02, 0x15, 0x25, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, 0xe5, 0x5f, 0x30, | ||
109 | 0xe6, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, 0x47, 0x64, 0x03, | ||
110 | 0x70, 0x21, 0x30, 0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x25, 0x70, 0x03, 0x30, | ||
111 | 0x4c, 0x11, 0xc2, 0x4c, 0xe5, 0x25, 0x70, 0x05, 0x75, 0x25, 0x07, 0x80, 0x02, 0x15, 0x25, 0xd2, | ||
112 | 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44, 0x20, 0xe3, 0x0b, 0xe5, 0x3a, 0x64, | ||
113 | 0x02, 0x60, 0x05, 0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0x90, 0x70, 0x46, 0xe5, | ||
114 | 0x2d, 0xf0, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, | ||
115 | 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, | ||
116 | 0x90, 0x70, 0x47, 0xe5, 0x2d, 0xf0, 0x75, 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, | ||
117 | 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, | ||
118 | 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, | ||
119 | 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, | ||
120 | 0x26, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, | ||
121 | 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, | ||
122 | 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, | ||
123 | 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, | ||
124 | 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, | ||
125 | 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 0xe0, | ||
126 | 0x90, 0x10, 0x2f, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, 0x40, 0x14, 0xa2, 0x71, 0x92, | ||
127 | 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54, 0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, | ||
128 | 0x76, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4c, 0x90, 0x02, 0x29, | ||
129 | 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, 0x14, 0x24, 0xfe, 0x60, 0x23, | ||
130 | 0x24, 0x03, 0x60, 0x03, 0x02, 0x16, 0x18, 0x90, 0x02, 0x28, 0xe0, 0x30, 0x47, 0x0f, 0x80, 0x07, | ||
131 | 0x90, 0x02, 0x28, 0xe0, 0x20, 0x47, 0x06, 0x54, 0xfe, 0xf0, 0x02, 0x16, 0x18, 0x44, 0x01, 0xf0, | ||
132 | 0x02, 0x16, 0x18, 0xe5, 0x46, 0x30, 0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0x90, 0x02, | ||
133 | 0x28, 0xe0, 0x54, 0xfe, 0x4f, 0xf0, 0x02, 0x16, 0x18, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x0f, 0xe5, | ||
134 | 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x16, 0x18, 0xe4, 0xf5, | ||
135 | 0x27, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x2d, 0x14, 0x60, 0x2e, | ||
136 | 0x14, 0x60, 0x36, 0x24, 0xfc, 0x60, 0x5f, 0x24, 0xf9, 0x60, 0x1f, 0x24, 0x0e, 0x70, 0x69, 0xe5, | ||
137 | 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, | ||
138 | 0x80, 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x24, 0xff, 0x80, 0x45, 0xa2, 0x47, 0x80, 0x41, 0xe5, 0x46, | ||
139 | 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x27, 0xc3, 0x80, 0x24, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, | ||
140 | 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0x20, | ||
141 | 0x47, 0x04, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, 0x38, 0xa2, | ||
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369 | 0x02, 0x60, 0x05, 0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0x90, 0x70, 0x46, 0xe5, | ||
370 | 0x2d, 0xf0, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, | ||
371 | 0x5e, 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, | ||
372 | 0x90, 0x70, 0x47, 0xe5, 0x2d, 0xf0, 0x75, 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x26, | ||
373 | 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, | ||
374 | 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, | ||
375 | 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, | ||
376 | 0x26, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, | ||
377 | 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, | ||
378 | 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x75, 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, | ||
379 | 0x80, 0x26, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, 0x1d, 0xe5, 0x5e, 0x20, 0xe1, 0x04, | ||
380 | 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, | ||
381 | 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x71, 0x92, 0x70, 0x90, 0x10, 0x00, 0xe0, | ||
382 | 0x90, 0x10, 0x2f, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, 0x40, 0x14, 0xa2, 0x71, 0x92, | ||
383 | 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54, 0x3f, 0xf5, 0x2e, 0xc2, 0x77, 0xd2, | ||
384 | 0x76, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 0x06, 0x70, 0x4c, 0x90, 0x02, 0x29, | ||
385 | 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, 0x14, 0x24, 0xfe, 0x60, 0x23, | ||
386 | 0x24, 0x03, 0x60, 0x03, 0x02, 0x16, 0x18, 0x90, 0x02, 0x28, 0xe0, 0x30, 0x47, 0x0f, 0x80, 0x07, | ||
387 | 0x90, 0x02, 0x28, 0xe0, 0x20, 0x47, 0x06, 0x54, 0xfe, 0xf0, 0x02, 0x16, 0x18, 0x44, 0x01, 0xf0, | ||
388 | 0x02, 0x16, 0x18, 0xe5, 0x46, 0x30, 0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0x90, 0x02, | ||
389 | 0x28, 0xe0, 0x54, 0xfe, 0x4f, 0xf0, 0x02, 0x16, 0x18, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x0f, 0xe5, | ||
390 | 0x47, 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x16, 0x18, 0xe4, 0xf5, | ||
391 | 0x27, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x2d, 0x14, 0x60, 0x2e, | ||
392 | 0x14, 0x60, 0x36, 0x24, 0xfc, 0x60, 0x5f, 0x24, 0xf9, 0x60, 0x1f, 0x24, 0x0e, 0x70, 0x69, 0xe5, | ||
393 | 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, | ||
394 | 0x80, 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x24, 0xff, 0x80, 0x45, 0xa2, 0x47, 0x80, 0x41, 0xe5, 0x46, | ||
395 | 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x27, 0xc3, 0x80, 0x24, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, | ||
396 | 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0x20, | ||
397 | 0x47, 0x04, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, 0x38, 0xa2, | ||
398 | 0x47, 0xb3, 0x92, 0x39, 0x80, 0x19, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, | ||
399 | 0x39, 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x80, 0x07, 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x92, 0x39, 0x90, | ||
400 | 0x02, 0x28, 0xe0, 0x54, 0xfc, 0x45, 0x27, 0xf0, 0x90, 0x70, 0x9c, 0xe5, 0x3a, 0xf0, 0xa3, 0xe5, | ||
401 | 0x47, 0xf0, 0x90, 0x70, 0x41, 0xe5, 0x3a, 0xf0, 0x22, 0xe4, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, | ||
402 | 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0x8f, | ||
403 | 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, 0x22, 0xe4, 0xf5, 0x62, 0xc2, 0xaf, 0xe5, 0x51, | ||
404 | 0x14, 0x60, 0x46, 0x14, 0x60, 0x62, 0x24, 0x02, 0x60, 0x03, 0x02, 0x17, 0x03, 0xd2, 0x59, 0x75, | ||
405 | 0x55, 0x01, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0x7f, 0xf0, 0xa3, 0xe0, 0x20, 0xe7, 0x22, 0x90, 0x04, | ||
406 | 0x34, 0xe0, 0xb4, 0x02, 0x1b, 0xa3, 0xe0, 0xb4, 0x02, 0x16, 0xa3, 0xe0, 0xb4, 0x02, 0x11, 0x7f, | ||
407 | 0x20, 0x12, 0x16, 0x3f, 0x90, 0x10, 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01, 0x80, 0x73, | ||
408 | 0xe5, 0x50, 0x70, 0x05, 0x75, 0x62, 0x03, 0x80, 0x6a, 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, | ||
409 | 0x11, 0x7f, 0x20, 0x12, 0x16, 0x3f, 0x90, 0x02, 0xa2, 0xe0, 0x54, 0xbf, 0xf0, 0x75, 0x51, 0x02, | ||
410 | 0x80, 0x51, 0xe5, 0x50, 0x70, 0x02, 0x80, 0x46, 0x90, 0x02, 0xa3, 0xe0, 0x20, 0xe6, 0x3b, 0x90, | ||
411 | 0x04, 0x37, 0xe0, 0x64, 0x22, 0x70, 0x33, 0x90, 0x01, 0x8a, 0x74, 0x7e, 0xf0, 0x90, 0x01, 0x96, | ||
412 | 0xf0, 0x90, 0x12, 0x04, 0x74, 0x0a, 0xf0, 0x90, 0x13, 0x28, 0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, | ||
413 | 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, 0xfa, 0xf0, 0x90, 0x04, 0x01, 0xe0, 0x54, 0xf9, 0xf0, 0x75, | ||
414 | 0x62, 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, 0x05, 0x75, 0x62, | ||
415 | 0x03, 0xf5, 0x51, 0xe5, 0x62, 0x60, 0x15, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 0xc2, 0x59, 0xad, 0x62, | ||
416 | 0xaf, 0x40, 0x12, 0x17, 0x8d, 0xe5, 0x62, 0xb4, 0x03, 0x02, 0xd2, 0x03, 0xd2, 0xaf, 0x22, 0xc2, | ||
417 | 0xaf, 0x30, 0x01, 0x12, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xf5, 0x51, 0xc2, 0x59, 0xc2, 0x01, 0x7d, | ||
418 | 0x02, 0xaf, 0x40, 0x12, 0x17, 0x8d, 0xe5, 0x52, 0x14, 0x60, 0x09, 0x04, 0x70, 0x4c, 0x75, 0x52, | ||
419 | 0x01, 0x75, 0x55, 0x03, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x0e, 0xf0, 0x90, 0x13, 0x28, 0xe0, 0x44, | ||
420 | 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, | ||
421 | 0x03, 0xf0, 0x90, 0x02, 0xa2, 0xe0, 0x44, 0xc0, 0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, 0x0c, 0xf0, | ||
422 | 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x0b, 0xc2, 0x02, 0x7d, 0x01, 0xaf, 0x41, 0x12, 0x17, | ||
423 | 0x8d, 0x80, 0x02, 0xc2, 0x03, 0xe4, 0x90, 0x01, 0x96, 0xf0, 0xd2, 0xaf, 0x22, 0xef, 0xf4, 0x60, | ||
424 | 0x2d, 0xe4, 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, | ||
425 | 0x19, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, 0xf0, 0x74, 0x1c, 0x2e, | ||
426 | 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, | ||
427 | 0x22, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x4d, 0xc2, 0xaf, 0x90, 0x70, 0x28, 0xe0, 0x90, 0x10, | ||
428 | 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 0xf0, 0x90, 0x70, 0x2a, 0xe0, 0x90, 0x10, | ||
429 | 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x62, 0x90, 0x10, 0x1e, 0xe0, 0x20, 0xe1, 0xf3, 0x90, | ||
430 | 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 0x1d, 0xe0, 0x90, 0x70, 0x29, 0xf0, 0x90, | ||
431 | 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0x30, 0x4a, 0x07, 0x90, 0x70, 0x24, 0xe0, 0x44, 0x01, | ||
432 | 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
433 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
434 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
435 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
436 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
437 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
439 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
440 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
441 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
442 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
443 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
444 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
445 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
446 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
447 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
449 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
450 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
451 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
452 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
453 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
454 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
455 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
456 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
457 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
459 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
460 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
461 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
462 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
463 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
464 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
465 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
466 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
467 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
469 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
470 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
471 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
472 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
473 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
474 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
475 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
476 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
477 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
479 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
480 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
481 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
482 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
483 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
484 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
485 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
486 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
487 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
489 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
490 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
491 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
492 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
494 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
495 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
496 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
497 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
499 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
500 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
501 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
502 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
503 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
504 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
505 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
506 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
507 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
509 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
510 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
511 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
512 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
513 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
514 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
515 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
516 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
517 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
519 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
520 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
521 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
522 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
523 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
524 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
525 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
526 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
527 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
529 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
530 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
531 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
532 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
533 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
534 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
535 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
536 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
537 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
539 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
540 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
541 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
542 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
543 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
544 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
545 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
546 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
547 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
549 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
550 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
551 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
552 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
553 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
554 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
555 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
556 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
557 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x9b, 0xc0, } ; | ||
diff --git a/drivers/staging/rt3070/md4.h b/drivers/staging/rt3070/md4.h index a9cc7b0f3ee3..b3fb63726182 100644 --- a/drivers/staging/rt3070/md4.h +++ b/drivers/staging/rt3070/md4.h | |||
@@ -35,8 +35,8 @@ typedef struct _MD4_CTX_ { | |||
35 | u8 buffer[64]; /* input buffer */ | 35 | u8 buffer[64]; /* input buffer */ |
36 | } MD4_CTX; | 36 | } MD4_CTX; |
37 | 37 | ||
38 | void MD4Init (MD4_CTX *); | 38 | void MD4Init(MD4_CTX *); |
39 | void MD4Update (MD4_CTX *, u8 *, UINT); | 39 | void MD4Update(MD4_CTX *, u8 *, UINT); |
40 | void MD4Final (u8 [16], MD4_CTX *); | 40 | void MD4Final(u8 [16], MD4_CTX *); |
41 | 41 | ||
42 | #endif //__MD4_H__ \ No newline at end of file | 42 | #endif /*__MD4_H__*/ |
diff --git a/drivers/staging/rt3090/firmware.h b/drivers/staging/rt3090/firmware.h deleted file mode 100644 index 17056e26795b..000000000000 --- a/drivers/staging/rt3090/firmware.h +++ /dev/null | |||
@@ -1,517 +0,0 @@ | |||
1 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
2 | /* AUTO GEN PLEASE DO NOT MODIFY IT */ | ||
3 | |||
4 | |||
5 | u8 FirmwareImage_3090 [] = { | ||
6 | 0x02, 0x02, 0xf3, 0x02, 0x02, 0xa1, 0x22, 0x22, 0xff, 0xff, 0xff, 0x02, 0x01, 0x27, 0xff, 0xff, | ||
7 | 0xff, 0xff, 0xff, 0x02, 0x00, 0x1e, 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x00, 0xd8, 0xc0, 0xe0, | ||
8 | 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x18, 0xc2, 0xaf, 0x30, 0x45, 0x03, | ||
9 | 0x12, 0x10, 0x09, 0x90, 0x04, 0x16, 0xe0, 0x30, 0xe3, 0x03, 0x74, 0x08, 0xf0, 0x90, 0x04, 0x14, | ||
10 | 0xe0, 0x20, 0xe7, 0x03, 0x02, 0x00, 0xcb, 0x74, 0x80, 0xf0, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x36, | ||
11 | 0x90, 0x04, 0x04, 0xe0, 0x24, 0xcf, 0x60, 0x30, 0x14, 0x60, 0x42, 0x24, 0xe2, 0x60, 0x47, 0x14, | ||
12 | 0x60, 0x55, 0x24, 0x21, 0x70, 0x60, 0xe5, 0x55, 0x24, 0xfe, 0x60, 0x07, 0x14, 0x60, 0x08, 0x24, | ||
13 | 0x02, 0x70, 0x08, 0x7d, 0x01, 0x80, 0x28, 0x7d, 0x02, 0x80, 0x24, 0x90, 0x70, 0x10, 0xe0, 0xf5, | ||
14 | 0x50, 0x85, 0x36, 0x40, 0xd2, 0x01, 0x80, 0x3e, 0xe5, 0x55, 0x64, 0x03, 0x60, 0x04, 0xe5, 0x55, | ||
15 | 0x70, 0x04, 0x7d, 0x02, 0x80, 0x09, 0x85, 0x36, 0x41, 0xd2, 0x02, 0x80, 0x29, 0xad, 0x55, 0xaf, | ||
16 | 0x36, 0x12, 0x02, 0x7d, 0x80, 0x20, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x47, 0x90, 0x70, 0x11, 0xe0, | ||
17 | 0xf5, 0x44, 0x12, 0x10, 0x25, 0x80, 0x06, 0x90, 0x70, 0x10, 0xe0, 0xf5, 0x45, 0xe4, 0xfd, 0xaf, | ||
18 | 0x36, 0x12, 0x02, 0x7d, 0xd2, 0x04, 0x90, 0x70, 0x13, 0xe4, 0xf0, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, | ||
19 | 0x82, 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0, 0x32, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, | ||
20 | 0xc0, 0xd0, 0xe8, 0xc0, 0xe0, 0xe9, 0xc0, 0xe0, 0xea, 0xc0, 0xe0, 0xeb, 0xc0, 0xe0, 0xec, 0xc0, | ||
21 | 0xe0, 0xed, 0xc0, 0xe0, 0xee, 0xc0, 0xe0, 0xef, 0xc0, 0xe0, 0xc2, 0xaf, 0x30, 0x45, 0x03, 0x12, | ||
22 | 0x10, 0x12, 0xd2, 0xaf, 0xd0, 0xe0, 0xff, 0xd0, 0xe0, 0xfe, 0xd0, 0xe0, 0xfd, 0xd0, 0xe0, 0xfc, | ||
23 | 0xd0, 0xe0, 0xfb, 0xd0, 0xe0, 0xfa, 0xd0, 0xe0, 0xf9, 0xd0, 0xe0, 0xf8, 0xd0, 0xd0, 0xd0, 0x82, | ||
24 | 0xd0, 0x83, 0xd0, 0xf0, 0xd0, 0xe0, 0x32, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, | ||
25 | 0xd0, 0x75, 0xd0, 0x10, 0xc2, 0xaf, 0x30, 0x45, 0x03, 0x12, 0x10, 0x0c, 0x30, 0x58, 0x0a, 0xe5, | ||
26 | 0x54, 0x60, 0x04, 0x15, 0x54, 0x80, 0x02, 0xc2, 0x58, 0x30, 0x59, 0x0a, 0xe5, 0x50, 0x60, 0x04, | ||
27 | 0x15, 0x50, 0x80, 0x02, 0xc2, 0x59, 0xd5, 0x53, 0x07, 0x30, 0x60, 0x04, 0x15, 0x46, 0xd2, 0x04, | ||
28 | 0x30, 0x45, 0x03, 0x12, 0x10, 0x0f, 0xc2, 0x8d, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, | ||
29 | 0xd0, 0xf0, 0xd0, 0xe0, 0x32, 0x90, 0x70, 0x2a, 0xe0, 0x30, 0xe1, 0x43, 0xc2, 0xaf, 0x90, 0x70, | ||
30 | 0x28, 0xe0, 0x90, 0x10, 0x1c, 0xf0, 0x90, 0x70, 0x29, 0xe0, 0x90, 0x10, 0x1d, 0xf0, 0x90, 0x70, | ||
31 | 0x2a, 0xe0, 0x90, 0x10, 0x1e, 0xf0, 0x90, 0x10, 0x1c, 0xe0, 0xf5, 0x37, 0x90, 0x10, 0x1e, 0xe0, | ||
32 | 0x20, 0xe1, 0xf3, 0x90, 0x10, 0x1c, 0xe0, 0x90, 0x70, 0x28, 0xf0, 0x90, 0x10, 0x1d, 0xe0, 0x90, | ||
33 | 0x70, 0x29, 0xf0, 0x90, 0x10, 0x1e, 0xe0, 0x90, 0x70, 0x2a, 0xf0, 0xc2, 0x05, 0xd2, 0xaf, 0x22, | ||
34 | 0x12, 0x02, 0xc3, 0x30, 0x45, 0x03, 0x12, 0x10, 0x03, 0x30, 0x01, 0x06, 0x20, 0x09, 0x03, 0x12, | ||
35 | 0x10, 0x1c, 0x30, 0x02, 0x06, 0x20, 0x0a, 0x03, 0x12, 0x10, 0x1f, 0x30, 0x03, 0x06, 0x20, 0x0b, | ||
36 | 0x03, 0x12, 0x10, 0x1f, 0x30, 0x04, 0x06, 0x20, 0x0c, 0x03, 0x12, 0x10, 0x22, 0x20, 0x13, 0x09, | ||
37 | 0x20, 0x11, 0x06, 0xe5, 0x2b, 0x45, 0x2c, 0x60, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0xa9, 0x12, | ||
38 | 0x03, 0x1c, 0x80, 0xbf, 0xc2, 0x43, 0xd2, 0x45, 0xe4, 0xf5, 0x20, 0xf5, 0x21, 0xf5, 0x53, 0xf5, | ||
39 | 0x46, 0xf5, 0x2b, 0xf5, 0x2c, 0xc2, 0x42, 0xf5, 0x51, 0xf5, 0x52, 0xf5, 0x55, 0x90, 0x04, 0x18, | ||
40 | 0x74, 0x80, 0xf0, 0x90, 0x04, 0x1a, 0x74, 0x08, 0xf0, 0xc2, 0x1a, 0xc2, 0x18, 0xc2, 0x1b, 0x22, | ||
41 | 0xc8, 0xef, 0xc8, 0xe6, 0xfa, 0x08, 0xe6, 0x4a, 0x60, 0x0c, 0xc8, 0xef, 0xc8, 0x08, 0xe6, 0x16, | ||
42 | 0x18, 0x70, 0x01, 0x16, 0xc3, 0x22, 0xed, 0x24, 0xff, 0xfd, 0xec, 0x34, 0xff, 0xc8, 0xef, 0xc8, | ||
43 | 0xf6, 0x08, 0xc6, 0xed, 0xc6, 0xd3, 0x22, 0xd0, 0x83, 0xd0, 0x82, 0xf8, 0xe4, 0x93, 0x70, 0x12, | ||
44 | 0x74, 0x01, 0x93, 0x70, 0x0d, 0xa3, 0xa3, 0x93, 0xf8, 0x74, 0x01, 0x93, 0xf5, 0x82, 0x88, 0x83, | ||
45 | 0xe4, 0x73, 0x74, 0x02, 0x93, 0x68, 0x60, 0xef, 0xa3, 0xa3, 0xa3, 0x80, 0xdf, 0xef, 0xf4, 0x60, | ||
46 | 0x1f, 0xe4, 0xfe, 0x12, 0x03, 0x5b, 0xe0, 0xb4, 0xff, 0x12, 0x12, 0x03, 0x5b, 0xef, 0xf0, 0x74, | ||
47 | 0x1c, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xe3, | ||
48 | 0x22, 0xc0, 0xe0, 0xc0, 0xf0, 0xc0, 0x83, 0xc0, 0x82, 0xc0, 0xd0, 0x75, 0xd0, 0x08, 0xc2, 0xaf, | ||
49 | 0x30, 0x45, 0x03, 0x12, 0x10, 0x06, 0xd2, 0xaf, 0xd0, 0xd0, 0xd0, 0x82, 0xd0, 0x83, 0xd0, 0xf0, | ||
50 | 0xd0, 0xe0, 0x32, 0xc2, 0xaf, 0x12, 0x00, 0x06, 0x12, 0x02, 0x04, 0x12, 0x02, 0xdc, 0xe4, 0xf5, | ||
51 | 0x22, 0xf5, 0x47, 0x90, 0x04, 0x00, 0x74, 0x80, 0xf0, 0xd2, 0xaf, 0x22, 0x75, 0x89, 0x02, 0xe4, | ||
52 | 0xf5, 0x8c, 0xf5, 0x8a, 0xf5, 0x88, 0xf5, 0xb8, 0xf5, 0xe8, 0x75, 0x90, 0x18, 0xd2, 0x8c, 0x75, | ||
53 | 0xa8, 0x05, 0x22, 0x78, 0x7f, 0xe4, 0xf6, 0xd8, 0xfd, 0x75, 0x81, 0x5f, 0x02, 0x01, 0xc0, 0xff, | ||
54 | 0xc0, 0x26, 0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83, 0x75, 0x26, 0x0a, 0x22, 0xc0, 0x26, | ||
55 | 0x74, 0x03, 0xc0, 0xe0, 0xc0, 0x82, 0xc0, 0x83, 0x75, 0x26, 0x18, 0x22, 0x30, 0x45, 0x03, 0x12, | ||
56 | 0x10, 0x15, 0xe5, 0x20, 0x70, 0x03, 0x20, 0x10, 0x03, 0x30, 0x11, 0x03, 0x43, 0x87, 0x01, 0x22, | ||
57 | 0xce, 0xef, 0xce, 0xee, 0x60, 0x08, 0x7f, 0xff, 0x12, 0x03, 0x71, 0x1e, 0x80, 0xf5, 0x22, 0xc8, | ||
58 | 0xef, 0xc8, 0xe6, 0x60, 0x03, 0x16, 0xc3, 0x22, 0xed, 0x14, 0xf6, 0xd3, 0x22, 0xc8, 0xef, 0xc8, | ||
59 | 0xe6, 0x60, 0x06, 0x16, 0xe6, 0x24, 0xff, 0xb3, 0x22, 0xc3, 0x22, 0x74, 0x14, 0x2e, 0xf5, 0x82, | ||
60 | 0xe4, 0x34, 0x70, 0xf5, 0x83, 0x22, 0xef, 0x90, 0x03, 0x6f, 0x93, 0x90, 0x03, 0x00, 0x73, 0x0a, | ||
61 | 0x18, 0xef, 0x60, 0x03, 0x1f, 0x80, 0xfa, 0x22, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
62 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
63 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
64 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
65 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
66 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
67 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
68 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
69 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
70 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
71 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
72 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
73 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
74 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
75 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
76 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
77 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
78 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
79 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
80 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
81 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
82 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
83 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
84 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
85 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
86 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
87 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
88 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
89 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
90 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
91 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
92 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
93 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
94 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
95 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
96 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
97 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
98 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
99 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
100 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
101 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
102 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
103 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
104 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
105 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
106 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
107 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
108 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
109 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
110 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
111 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
112 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
113 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
114 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
115 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
116 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
117 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
118 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
119 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
120 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
121 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
122 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
123 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
124 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
125 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
126 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
127 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
128 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
129 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
130 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
131 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
132 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
133 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
134 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
135 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
136 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
137 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
138 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
139 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
140 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
141 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
142 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
143 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
144 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
145 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
146 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
147 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
148 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
149 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
150 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
151 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
152 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
153 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
154 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
155 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
156 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
157 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
158 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
159 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
160 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
161 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
162 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
163 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
164 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
165 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
166 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
167 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
168 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
169 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
170 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
171 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
172 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
173 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
174 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
175 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
176 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
177 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
178 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
179 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
180 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
181 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
182 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
183 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
184 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
185 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
186 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
187 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
188 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
189 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
190 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
191 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
192 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
193 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
194 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
195 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
196 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
197 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
198 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
199 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
200 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
201 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
202 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
203 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
204 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
205 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
206 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
207 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
208 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
209 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
210 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
211 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
212 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
213 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
214 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
215 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
216 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
217 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
218 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
219 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
220 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
221 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
222 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
223 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
224 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
225 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
226 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
227 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
228 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
229 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
230 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
231 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
232 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
233 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
234 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
235 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
236 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
237 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
238 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
239 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
240 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
241 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
242 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
243 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
244 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
245 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
246 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
247 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
248 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
249 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
250 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
251 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
252 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
253 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
254 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
255 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
256 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
257 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
258 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
259 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
260 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
261 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | ||
262 | 0xff, 0xff, 0xff, 0x02, 0x10, 0x28, 0x02, 0x10, 0x3b, 0x02, 0x10, 0x3c, 0x02, 0x13, 0x68, 0x02, | ||
263 | 0x13, 0x69, 0x02, 0x14, 0x1e, 0x02, 0x14, 0x1f, 0xc3, 0x22, 0xff, 0xff, 0x02, 0x19, 0xa1, 0x02, | ||
264 | 0x1b, 0x31, 0x02, 0x14, 0xea, 0x02, 0x14, 0x20, 0x30, 0x05, 0x06, 0x20, 0x0d, 0x03, 0x12, 0x01, | ||
265 | 0x75, 0x30, 0x06, 0x06, 0x20, 0x0e, 0x03, 0x12, 0x1c, 0x4f, 0x22, 0x22, 0x90, 0x04, 0x14, 0xe0, | ||
266 | 0x20, 0xe7, 0x03, 0x02, 0x13, 0x67, 0x90, 0x70, 0x12, 0xe0, 0xf5, 0x56, 0x90, 0x04, 0x04, 0xe0, | ||
267 | 0x12, 0x02, 0x57, 0x11, 0x11, 0x30, 0x10, 0xe2, 0x31, 0x10, 0x90, 0x33, 0x10, 0xa0, 0x34, 0x10, | ||
268 | 0xbe, 0x35, 0x10, 0xac, 0x36, 0x11, 0x1f, 0x50, 0x11, 0x68, 0x51, 0x11, 0x71, 0x52, 0x11, 0x71, | ||
269 | 0x53, 0x11, 0x71, 0x54, 0x11, 0xb3, 0x55, 0x12, 0x16, 0x70, 0x12, 0x42, 0x71, 0x12, 0x71, 0x72, | ||
270 | 0x12, 0xda, 0x73, 0x12, 0xfe, 0x80, 0x13, 0x29, 0x83, 0x13, 0x47, 0x84, 0x00, 0x00, 0x13, 0x67, | ||
271 | 0xd2, 0x18, 0xd2, 0x61, 0x75, 0x35, 0x2a, 0x75, 0x32, 0x0b, 0x75, 0x33, 0xb8, 0x02, 0x13, 0x62, | ||
272 | 0xc2, 0x18, 0x90, 0x01, 0x14, 0xe0, 0x54, 0xfd, 0xf0, 0x02, 0x13, 0x62, 0x90, 0x70, 0x11, 0xe0, | ||
273 | 0xf5, 0x3c, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x22, 0xe5, 0x55, | ||
274 | 0xb4, 0x02, 0x0f, 0xe5, 0x59, 0xb4, 0x28, 0x06, 0x90, 0x01, 0x0d, 0x74, 0x08, 0xf0, 0x7d, 0x01, | ||
275 | 0x80, 0x02, 0x7d, 0x02, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x02, | ||
276 | 0x13, 0x62, 0x20, 0x02, 0x03, 0x30, 0x03, 0x10, 0x7d, 0x02, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, | ||
277 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0x02, 0x13, 0x62, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x0c, 0x90, | ||
278 | 0x01, 0x0c, 0xe0, 0x44, 0x02, 0xf0, 0xa3, 0xe0, 0x44, 0x04, 0xf0, 0x85, 0x56, 0x41, 0xd2, 0x02, | ||
279 | 0x22, 0x90, 0x70, 0x11, 0xe0, 0xf4, 0x70, 0x03, 0x02, 0x13, 0x67, 0xe0, 0xf5, 0x30, 0x22, 0xe5, | ||
280 | 0x34, 0xc3, 0x94, 0x03, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0x67, 0x90, 0x70, 0x10, | ||
281 | 0xe0, 0x54, 0x7f, 0xff, 0xbf, 0x0a, 0x0d, 0x90, 0x70, 0x11, 0xe0, 0xb4, 0x08, 0x06, 0x75, 0x4e, | ||
282 | 0x01, 0x75, 0x4f, 0x84, 0x90, 0x70, 0x10, 0xe0, 0x54, 0x7f, 0x64, 0x02, 0x60, 0x03, 0x02, 0x13, | ||
283 | 0x67, 0x90, 0x70, 0x11, 0xe0, 0x64, 0x08, 0x60, 0x08, 0xe0, 0x64, 0x20, 0x60, 0x03, 0x02, 0x13, | ||
284 | 0x67, 0x75, 0x4e, 0x03, 0x75, 0x4f, 0x20, 0x22, 0x90, 0x70, 0x11, 0xe0, 0x24, 0xff, 0x92, 0x47, | ||
285 | 0x22, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0x09, 0x90, | ||
286 | 0x04, 0x04, 0xe0, 0x25, 0xe0, 0x24, 0x5d, 0xf5, 0x57, 0x90, 0x70, 0x10, 0xe0, 0xff, 0x74, 0x47, | ||
287 | 0x25, 0x57, 0xf8, 0xc6, 0xef, 0xc6, 0x90, 0x70, 0x11, 0xe0, 0xff, 0x74, 0x48, 0x25, 0x57, 0xf8, | ||
288 | 0xc6, 0xef, 0xc6, 0xe4, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, | ||
289 | 0x02, 0x13, 0x62, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, | ||
290 | 0x09, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x23, 0xe5, 0x47, 0x64, 0x08, 0x60, 0x1d, 0xe5, 0x47, 0x64, | ||
291 | 0x09, 0x60, 0x17, 0xe5, 0x47, 0x64, 0x0a, 0x60, 0x11, 0xe5, 0x47, 0x64, 0x0b, 0x60, 0x0b, 0xe5, | ||
292 | 0x47, 0x64, 0x0d, 0x60, 0x05, 0xe5, 0x47, 0xb4, 0x0d, 0x08, 0x90, 0x70, 0x11, 0xe0, 0x54, 0x0f, | ||
293 | 0xf5, 0x3a, 0xe5, 0x47, 0xb4, 0x09, 0x08, 0xe5, 0x3a, 0xb4, 0x03, 0x03, 0xe4, 0xf5, 0x46, 0xe5, | ||
294 | 0x47, 0xb4, 0x0a, 0x08, 0xe5, 0x3a, 0xb4, 0x01, 0x03, 0xe4, 0xf5, 0x46, 0xe4, 0xfd, 0xaf, 0x56, | ||
295 | 0x12, 0x02, 0x7d, 0xd2, 0x04, 0x22, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x07, 0xe5, 0x55, 0x60, | ||
296 | 0x03, 0x02, 0x13, 0x09, 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf8, | ||
297 | 0xe6, 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x02, | ||
298 | 0x13, 0x62, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x07, 0xe5, 0x55, 0x60, 0x03, 0x02, 0x13, 0x09, | ||
299 | 0x90, 0x70, 0x10, 0xe0, 0xfe, 0x90, 0x70, 0x11, 0xe0, 0xfd, 0xed, 0xf5, 0x82, 0x8e, 0x83, 0xe0, | ||
300 | 0xf5, 0x57, 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x02, 0x13, | ||
301 | 0x62, 0x90, 0x10, 0x00, 0xe0, 0xf5, 0x57, 0x90, 0x10, 0x02, 0xe0, 0xf5, 0x58, 0xa3, 0xe0, 0xf5, | ||
302 | 0x59, 0xe5, 0x58, 0xb4, 0x70, 0x1e, 0xe5, 0x59, 0xb4, 0x30, 0x19, 0x90, 0x05, 0x08, 0xe0, 0x44, | ||
303 | 0x01, 0xf0, 0xfd, 0x90, 0x05, 0x05, 0xe0, 0x54, 0xfb, 0xf0, 0x44, 0x04, 0xf0, 0xed, 0x54, 0xfe, | ||
304 | 0x90, 0x05, 0x08, 0xf0, 0xe4, 0xf5, 0x4e, 0xf5, 0x4f, 0x75, 0x3a, 0xff, 0xc2, 0x1a, 0xc2, 0x18, | ||
305 | 0xc2, 0x1b, 0xf5, 0x34, 0x90, 0x05, 0xa4, 0x74, 0x11, 0xf0, 0xa3, 0x74, 0xff, 0xf0, 0xa3, 0x74, | ||
306 | 0x03, 0xf0, 0xe4, 0xf5, 0x30, 0xc2, 0x19, 0x75, 0x3c, 0xff, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, | ||
307 | 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x02, 0x13, 0x62, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, | ||
308 | 0x06, 0xe5, 0x55, 0x60, 0x02, 0x80, 0x22, 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x93, 0xe4, | ||
309 | 0xfd, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x80, 0x64, 0xe5, 0x34, | ||
310 | 0xc3, 0x94, 0x03, 0x40, 0x0b, 0xe5, 0x55, 0x60, 0x07, 0x7d, 0x03, 0xaf, 0x56, 0x02, 0x02, 0x7d, | ||
311 | 0x90, 0x70, 0x10, 0xe0, 0x24, 0xff, 0x92, 0x4a, 0xd2, 0x05, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, | ||
312 | 0x7d, 0x90, 0x04, 0x14, 0x74, 0x80, 0xf0, 0x80, 0x39, 0xe4, 0xf5, 0x34, 0xf5, 0x30, 0x90, 0x70, | ||
313 | 0x10, 0xe0, 0xf4, 0x60, 0x03, 0xe0, 0xf5, 0x34, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, | ||
314 | 0x04, 0x14, 0x74, 0x80, 0xf0, 0x80, 0x1b, 0xd2, 0x19, 0x05, 0x2f, 0xe5, 0x2f, 0xb4, 0x1a, 0x03, | ||
315 | 0xe4, 0xf5, 0x2f, 0xd2, 0x04, 0xad, 0x57, 0xaf, 0x56, 0x12, 0x02, 0x7d, 0x90, 0x04, 0x14, 0x74, | ||
316 | 0x80, 0xf0, 0xe4, 0x90, 0x70, 0x13, 0xf0, 0x22, 0x22, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x17, | ||
317 | 0xe5, 0x55, 0xb4, 0x02, 0x12, 0xe5, 0x30, 0x60, 0x0e, 0x30, 0x60, 0x0b, 0x74, 0xfd, 0x25, 0x46, | ||
318 | 0xf5, 0x46, 0xd2, 0x04, 0xe4, 0xf5, 0x53, 0xe5, 0x53, 0x60, 0x03, 0x02, 0x14, 0x1d, 0x30, 0x60, | ||
319 | 0x21, 0xb2, 0x4d, 0x30, 0x4d, 0x1c, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x11, 0xe5, 0x55, 0xb4, | ||
320 | 0x02, 0x0c, 0xe5, 0x30, 0x60, 0x08, 0x74, 0x03, 0x25, 0x46, 0xf5, 0x46, 0x80, 0x02, 0x05, 0x46, | ||
321 | 0xc2, 0x04, 0xe5, 0x4f, 0x45, 0x4e, 0x60, 0x08, 0xe5, 0x4f, 0x15, 0x4f, 0x70, 0x02, 0x15, 0x4e, | ||
322 | 0x30, 0x1a, 0x49, 0x7f, 0x32, 0x7d, 0xb8, 0x7c, 0x0b, 0x12, 0x02, 0x30, 0x50, 0x06, 0x90, 0x04, | ||
323 | 0x10, 0x74, 0x40, 0xf0, 0x7f, 0x35, 0x7d, 0x32, 0x12, 0x03, 0x3f, 0x50, 0x09, 0x90, 0x10, 0x04, | ||
324 | 0xe0, 0x54, 0xf7, 0xf0, 0xd2, 0x06, 0xe5, 0x35, 0xd3, 0x94, 0x2d, 0x40, 0x30, 0x30, 0x1b, 0x2d, | ||
325 | 0xc2, 0x1b, 0xa2, 0x18, 0x92, 0x1a, 0x20, 0x1a, 0x24, 0x90, 0x04, 0x09, 0xe0, 0x54, 0xdd, 0xf0, | ||
326 | 0x90, 0x10, 0x04, 0xe0, 0x44, 0x08, 0xf0, 0xc2, 0x61, 0xd2, 0x03, 0x22, 0xe4, 0xf5, 0x35, 0xa2, | ||
327 | 0x18, 0x92, 0x1a, 0x30, 0x1a, 0x07, 0x90, 0x04, 0x09, 0xe0, 0x44, 0x22, 0xf0, 0x22, 0x22, 0x22, | ||
328 | 0xc2, 0x4b, 0xc2, 0x4c, 0xe5, 0x44, 0x12, 0x02, 0x57, 0x14, 0x42, 0x00, 0x14, 0xd5, 0x04, 0x14, | ||
329 | 0xd1, 0x08, 0x14, 0xac, 0x10, 0x14, 0x56, 0x20, 0x14, 0x76, 0x60, 0x14, 0x87, 0xa0, 0x00, 0x00, | ||
330 | 0x14, 0xd7, 0x85, 0x48, 0x43, 0x85, 0x4a, 0x42, 0x85, 0x4c, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x60, | ||
331 | 0x03, 0x02, 0x14, 0xd7, 0x80, 0x1b, 0xe5, 0x48, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4a, 0xc4, | ||
332 | 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4c, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, 0x70, | ||
333 | 0x66, 0x53, 0x43, 0x0f, 0x80, 0x61, 0x85, 0x49, 0x43, 0x85, 0x4b, 0x42, 0x85, 0x4d, 0x5e, 0xe5, | ||
334 | 0x47, 0x64, 0x06, 0x70, 0x52, 0x80, 0x1b, 0xe5, 0x49, 0xc4, 0x54, 0x0f, 0xf5, 0x43, 0xe5, 0x4b, | ||
335 | 0xc4, 0x54, 0x0f, 0xf5, 0x42, 0xe5, 0x4d, 0xc4, 0x54, 0x0f, 0xf5, 0x5e, 0xe5, 0x47, 0x64, 0x06, | ||
336 | 0x70, 0x35, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x10, 0xf5, 0x43, 0x80, 0x2b, 0xe5, 0x47, 0xb4, 0x04, | ||
337 | 0x06, 0x53, 0x5e, 0xfb, 0x75, 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x05, 0x06, 0x43, 0x5e, 0x04, 0x75, | ||
338 | 0x42, 0x09, 0xe5, 0x47, 0xb4, 0x06, 0x10, 0xe5, 0x43, 0x54, 0x0f, 0x44, 0x30, 0xf5, 0x43, 0x80, | ||
339 | 0x06, 0xd2, 0x4b, 0x80, 0x02, 0xd2, 0x4c, 0xe4, 0xf5, 0x2a, 0xe5, 0x42, 0xc4, 0x54, 0xf0, 0xff, | ||
340 | 0xe5, 0x43, 0x54, 0x0f, 0x4f, 0xf5, 0x5f, 0xd2, 0x60, 0x22, 0xe5, 0x47, 0x60, 0x1a, 0x24, 0xc0, | ||
341 | 0x60, 0x0a, 0x24, 0x35, 0x70, 0x09, 0x12, 0x19, 0x5f, 0x12, 0x15, 0x09, 0x12, 0x19, 0x5f, 0x12, | ||
342 | 0x15, 0x09, 0xc2, 0xaf, 0xc2, 0x04, 0xd2, 0xaf, 0x22, 0xc2, 0xaf, 0x90, 0x04, 0x14, 0xe0, 0x54, | ||
343 | 0x0e, 0x60, 0x04, 0xd2, 0x1c, 0x80, 0x08, 0xe5, 0x4e, 0x45, 0x4f, 0x24, 0xff, 0x92, 0x1c, 0xd2, | ||
344 | 0xaf, 0x90, 0x04, 0x14, 0xe0, 0xa2, 0xe4, 0x92, 0x1d, 0x74, 0x1e, 0xf0, 0xe5, 0x5f, 0x54, 0x0f, | ||
345 | 0xf5, 0x2d, 0xe5, 0x2a, 0x70, 0x13, 0x30, 0x1c, 0x05, 0xe5, 0x5f, 0x20, 0xe5, 0x0b, 0x30, 0x1d, | ||
346 | 0x29, 0xe5, 0x5f, 0x54, 0x30, 0x64, 0x30, 0x70, 0x21, 0xe5, 0x2a, 0x70, 0x15, 0xe5, 0x34, 0xc3, | ||
347 | 0x94, 0x03, 0x40, 0x09, 0xe5, 0x30, 0x60, 0x05, 0x75, 0x2a, 0x05, 0x80, 0x07, 0x75, 0x2a, 0x0c, | ||
348 | 0x80, 0x02, 0x15, 0x2a, 0xd2, 0x6c, 0xd2, 0x6d, 0x80, 0x0f, 0xe5, 0x5f, 0x30, 0xe6, 0x06, 0xc2, | ||
349 | 0x6c, 0xd2, 0x6d, 0x80, 0x04, 0xd2, 0x6c, 0xc2, 0x6d, 0xe5, 0x47, 0x64, 0x03, 0x70, 0x21, 0x30, | ||
350 | 0x4b, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x18, 0xe5, 0x2a, 0x70, 0x03, 0x30, 0x4c, 0x11, 0xc2, | ||
351 | 0x4c, 0xe5, 0x2a, 0x70, 0x05, 0x75, 0x2a, 0x07, 0x80, 0x02, 0x15, 0x2a, 0xd2, 0x6c, 0xd2, 0x6d, | ||
352 | 0xe5, 0x47, 0xb4, 0x09, 0x14, 0xe5, 0x44, 0x20, 0xe3, 0x0b, 0xe5, 0x3a, 0x64, 0x02, 0x60, 0x05, | ||
353 | 0xe5, 0x3a, 0xb4, 0x03, 0x04, 0xc2, 0x6c, 0xd2, 0x6d, 0xe5, 0x47, 0xb4, 0x0a, 0x13, 0xe5, 0x3a, | ||
354 | 0xb4, 0x01, 0x06, 0xc2, 0x6c, 0xd2, 0x6d, 0x80, 0x08, 0xe5, 0x3a, 0x70, 0x04, 0xd2, 0x6c, 0xc2, | ||
355 | 0x6d, 0x20, 0x69, 0x07, 0xe5, 0x5e, 0x20, 0xe0, 0x02, 0xb2, 0x68, 0x20, 0x6b, 0x07, 0xe5, 0x5e, | ||
356 | 0x20, 0xe1, 0x02, 0xb2, 0x6a, 0x20, 0x6d, 0x07, 0xe5, 0x5e, 0x20, 0xe2, 0x02, 0xb2, 0x6c, 0x75, | ||
357 | 0x2e, 0x40, 0x20, 0x69, 0x04, 0xa2, 0x68, 0x80, 0x45, 0x30, 0x68, 0x06, 0xe5, 0x46, 0xa2, 0xe2, | ||
358 | 0x80, 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, | ||
359 | 0xe5, 0x2f, 0xb4, 0x19, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x80, | ||
360 | 0x1d, 0xe5, 0x5e, 0x20, 0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, | ||
361 | 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x73, | ||
362 | 0x92, 0x72, 0x20, 0x6b, 0x04, 0xa2, 0x6a, 0x80, 0x45, 0x30, 0x6a, 0x06, 0xe5, 0x46, 0xa2, 0xe2, | ||
363 | 0x80, 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, | ||
364 | 0xe5, 0x2f, 0xb4, 0x19, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x80, | ||
365 | 0x1d, 0xe5, 0x5e, 0x20, 0xe0, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, | ||
366 | 0xfe, 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x75, | ||
367 | 0x92, 0x74, 0x20, 0x6d, 0x04, 0xa2, 0x6c, 0x80, 0x64, 0xe5, 0x47, 0x64, 0x0a, 0x70, 0x19, 0xe5, | ||
368 | 0x3a, 0xb4, 0x01, 0x06, 0xe5, 0x46, 0xa2, 0xe3, 0x80, 0x53, 0xe5, 0x46, 0x20, 0xe4, 0x03, 0x30, | ||
369 | 0xe5, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x80, 0x45, 0x30, 0x6c, 0x06, 0xe5, 0x46, 0xa2, 0xe2, 0x80, | ||
370 | 0x3c, 0x30, 0x19, 0x1c, 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, | ||
371 | 0x2f, 0xb4, 0x19, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x80, 0x1d, | ||
372 | 0xe5, 0x5e, 0x20, 0xe1, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0xe5, 0x46, 0x54, 0xf0, 0xfe, | ||
373 | 0xbe, 0xf0, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xee, 0x6f, 0x24, 0xff, 0x92, 0x71, 0x92, | ||
374 | 0x70, 0x90, 0x10, 0x00, 0xe0, 0x90, 0x10, 0x2c, 0xf0, 0x90, 0x10, 0x03, 0xe0, 0xc3, 0x94, 0x30, | ||
375 | 0x40, 0x14, 0xa2, 0x71, 0x92, 0x77, 0xa2, 0x70, 0x92, 0x76, 0xe5, 0x2e, 0x13, 0x13, 0x54, 0x3f, | ||
376 | 0xf5, 0x2e, 0xc2, 0x77, 0xd2, 0x76, 0x90, 0x10, 0x2f, 0xe5, 0x2e, 0xf0, 0xe5, 0x47, 0x64, 0x06, | ||
377 | 0x70, 0x46, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfe, 0xf0, 0xe5, 0x43, 0xc4, 0x54, 0x0f, 0x14, 0x60, | ||
378 | 0x14, 0x24, 0xfe, 0x60, 0x1f, 0x24, 0x03, 0x60, 0x03, 0x02, 0x19, 0x5e, 0x90, 0x02, 0x28, 0xe0, | ||
379 | 0x30, 0x47, 0x0d, 0x80, 0x07, 0x90, 0x02, 0x28, 0xe0, 0x20, 0x47, 0x04, 0x54, 0xfe, 0xf0, 0x22, | ||
380 | 0x44, 0x01, 0xf0, 0x22, 0xe5, 0x46, 0x30, 0xe2, 0x04, 0x7f, 0x01, 0x80, 0x02, 0x7f, 0x00, 0x90, | ||
381 | 0x02, 0x28, 0xe0, 0x54, 0xfe, 0x4f, 0xf0, 0x22, 0xe5, 0x47, 0x64, 0x07, 0x60, 0x0f, 0xe5, 0x47, | ||
382 | 0x64, 0x08, 0x60, 0x09, 0xe5, 0x47, 0x64, 0x09, 0x60, 0x03, 0x02, 0x18, 0x27, 0xe4, 0xf5, 0x27, | ||
383 | 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfc, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x2d, 0x14, 0x60, 0x2e, 0x14, | ||
384 | 0x60, 0x36, 0x24, 0xfc, 0x60, 0x5f, 0x24, 0xf9, 0x60, 0x1f, 0x24, 0x0e, 0x70, 0x69, 0xe5, 0x46, | ||
385 | 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, 0x80, | ||
386 | 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x24, 0xff, 0x80, 0x45, 0xa2, 0x47, 0x80, 0x41, 0xe5, 0x46, 0x30, | ||
387 | 0xe2, 0x03, 0xd3, 0x80, 0x27, 0xc3, 0x80, 0x24, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, | ||
388 | 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0x20, 0x47, | ||
389 | 0x04, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, 0x38, 0xa2, 0x47, | ||
390 | 0xb3, 0x92, 0x39, 0x80, 0x19, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, | ||
391 | 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x80, 0x07, 0xa2, 0x47, 0xb3, 0x92, 0x38, 0x92, 0x39, 0x90, 0x02, | ||
392 | 0x28, 0xe0, 0x54, 0xfc, 0x02, 0x19, 0x5b, 0xe5, 0x47, 0x64, 0x0c, 0x60, 0x09, 0xe5, 0x47, 0x64, | ||
393 | 0x0b, 0x60, 0x03, 0x02, 0x18, 0xc6, 0xe4, 0xf5, 0x27, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xfd, 0xf0, | ||
394 | 0xe5, 0x3a, 0x14, 0x60, 0x2b, 0x14, 0x60, 0x2e, 0x14, 0x60, 0x38, 0x24, 0xfc, 0x60, 0x5c, 0x24, | ||
395 | 0xf9, 0x60, 0x1d, 0x24, 0x0e, 0x70, 0x61, 0xe5, 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, | ||
396 | 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, 0x80, 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x80, 0x35, | ||
397 | 0xa2, 0x47, 0x92, 0x39, 0x80, 0x47, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, | ||
398 | 0x39, 0x80, 0x3a, 0xe5, 0x46, 0x30, 0xe2, 0x0d, 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, | ||
399 | 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00, 0x20, 0x47, 0x04, 0x7d, 0x01, 0x80, 0x02, | ||
400 | 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, 0x39, 0x80, 0x12, 0xe5, 0x46, 0x30, 0xe2, 0x03, | ||
401 | 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x39, 0x80, 0x05, 0xa2, 0x47, 0xb3, 0x92, 0x39, 0x90, 0x02, 0x28, | ||
402 | 0xe0, 0x54, 0xfd, 0x02, 0x19, 0x5b, 0xe5, 0x47, 0x64, 0x0d, 0x60, 0x03, 0x02, 0x19, 0x5e, 0xf5, | ||
403 | 0x27, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xef, 0xf0, 0xe5, 0x3a, 0x14, 0x60, 0x2b, 0x14, 0x60, 0x2e, | ||
404 | 0x14, 0x60, 0x38, 0x24, 0xfc, 0x60, 0x5c, 0x24, 0xf9, 0x60, 0x1d, 0x24, 0x0e, 0x70, 0x61, 0xe5, | ||
405 | 0x46, 0x13, 0x13, 0x54, 0x3f, 0x75, 0xf0, 0x03, 0x84, 0xaf, 0xf0, 0x20, 0x47, 0x04, 0x7e, 0x01, | ||
406 | 0x80, 0x02, 0x7e, 0x00, 0xef, 0x6e, 0x80, 0x35, 0xa2, 0x47, 0x92, 0x3c, 0x80, 0x47, 0xe5, 0x46, | ||
407 | 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x3c, 0x80, 0x3a, 0xe5, 0x46, 0x30, 0xe2, 0x0d, | ||
408 | 0x54, 0x38, 0xc3, 0x94, 0x30, 0x50, 0x06, 0x7e, 0x00, 0x7f, 0x01, 0x80, 0x04, 0x7e, 0x00, 0x7f, | ||
409 | 0x00, 0x20, 0x47, 0x04, 0x7d, 0x01, 0x80, 0x02, 0x7d, 0x00, 0xef, 0x6d, 0x4e, 0x24, 0xff, 0x92, | ||
410 | 0x3c, 0x80, 0x12, 0xe5, 0x46, 0x30, 0xe2, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x92, 0x3c, 0x80, 0x05, | ||
411 | 0xa2, 0x47, 0xb3, 0x92, 0x3c, 0x90, 0x02, 0x28, 0xe0, 0x54, 0xef, 0x45, 0x27, 0xf0, 0x22, 0xe5, | ||
412 | 0x47, 0x64, 0x0b, 0x70, 0x1c, 0x90, 0x02, 0x29, 0xe0, 0x54, 0xeb, 0xf0, 0x30, 0x47, 0x04, 0xaf, | ||
413 | 0x45, 0x80, 0x05, 0xe5, 0x45, 0x64, 0x14, 0xff, 0x90, 0x02, 0x28, 0xe0, 0x54, 0xeb, 0x4f, 0xf0, | ||
414 | 0x22, 0xe4, 0x90, 0x02, 0x29, 0xf0, 0x30, 0x47, 0x04, 0xaf, 0x45, 0x80, 0x04, 0xe5, 0x45, 0xf4, | ||
415 | 0xff, 0x90, 0x02, 0x28, 0xef, 0xf0, 0x22, 0x8f, 0x50, 0xd2, 0x59, 0x22, 0x8f, 0x54, 0xd2, 0x58, | ||
416 | 0x22, 0xe4, 0xf5, 0x37, 0xc2, 0xaf, 0xe5, 0x51, 0x14, 0x60, 0x4a, 0x14, 0x60, 0x6b, 0x24, 0x02, | ||
417 | 0x60, 0x03, 0x02, 0x1b, 0x12, 0xd2, 0x59, 0x75, 0x55, 0x01, 0x20, 0x1a, 0x1c, 0x90, 0x02, 0x08, | ||
418 | 0xe0, 0x54, 0xfe, 0xf0, 0xe0, 0x20, 0xe1, 0x23, 0x90, 0x04, 0x34, 0xe0, 0xb4, 0x02, 0x1c, 0xa3, | ||
419 | 0xe0, 0xb4, 0x02, 0x17, 0xa3, 0xe0, 0xb4, 0x02, 0x12, 0x7f, 0x20, 0x12, 0x19, 0x97, 0x90, 0x10, | ||
420 | 0x04, 0xe0, 0x54, 0xf3, 0xf0, 0x75, 0x51, 0x01, 0x02, 0x1b, 0x12, 0xe5, 0x50, 0x70, 0x06, 0x75, | ||
421 | 0x37, 0x03, 0x02, 0x1b, 0x12, 0x90, 0x12, 0x00, 0xe0, 0x54, 0x03, 0x70, 0x15, 0x7f, 0x20, 0x12, | ||
422 | 0x19, 0x97, 0x20, 0x1a, 0x07, 0x90, 0x02, 0x08, 0xe0, 0x54, 0xfb, 0xf0, 0x75, 0x51, 0x02, 0x02, | ||
423 | 0x1b, 0x12, 0xe5, 0x50, 0x70, 0x03, 0x02, 0x1b, 0x0d, 0x20, 0x1a, 0x15, 0x90, 0x02, 0x08, 0xe0, | ||
424 | 0x30, 0xe3, 0x03, 0x02, 0x1b, 0x09, 0x90, 0x04, 0x37, 0xe0, 0x64, 0x22, 0x60, 0x03, 0x02, 0x1b, | ||
425 | 0x09, 0x90, 0x12, 0x04, 0x74, 0x0a, 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x15, 0xe5, 0x59, 0xb4, 0x35, | ||
426 | 0x10, 0xe4, 0x90, 0x05, 0x00, 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, | ||
427 | 0xf0, 0x7f, 0x01, 0x12, 0x03, 0x30, 0x90, 0x13, 0x28, 0xe0, 0x54, 0xf0, 0xf0, 0xa3, 0xe0, 0x54, | ||
428 | 0xf0, 0xf0, 0xe5, 0x59, 0xb4, 0x35, 0x14, 0xe5, 0x3c, 0xf4, 0x60, 0x06, 0xa3, 0xe0, 0x54, 0xf3, | ||
429 | 0x80, 0x14, 0x90, 0x13, 0x2a, 0xe0, 0x54, 0xfb, 0xf0, 0x80, 0x14, 0xe5, 0x3c, 0xf4, 0x90, 0x13, | ||
430 | 0x2a, 0x60, 0x08, 0xe0, 0x54, 0xf2, 0x45, 0x3c, 0xf0, 0x80, 0x04, 0xe0, 0x54, 0xfa, 0xf0, 0x20, | ||
431 | 0x1a, 0x07, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x10, 0xf0, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x09, | ||
432 | 0xe5, 0x30, 0x70, 0x05, 0x75, 0x8c, 0x40, 0x80, 0x03, 0x75, 0x8c, 0x80, 0x90, 0x04, 0x01, 0xe0, | ||
433 | 0x54, 0xfd, 0xf0, 0x20, 0x1a, 0x07, 0x90, 0x12, 0x04, 0xe0, 0x44, 0x04, 0xf0, 0xe5, 0x59, 0xb4, | ||
434 | 0x28, 0x06, 0x90, 0x01, 0x0d, 0xe0, 0xf5, 0x31, 0xe5, 0x34, 0xc3, 0x94, 0x02, 0x40, 0x14, 0x90, | ||
435 | 0x01, 0x0d, 0xe0, 0x44, 0x01, 0xf0, 0xe5, 0x59, 0x64, 0x35, 0x60, 0x07, 0x90, 0x12, 0x04, 0xe0, | ||
436 | 0x54, 0xfd, 0xf0, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x14, 0x20, 0x02, 0x11, 0x20, 0x03, 0x0e, | ||
437 | 0x90, 0x01, 0x0d, 0xe0, 0x54, 0xfb, 0xf0, 0x90, 0x01, 0x0c, 0xe0, 0x54, 0xfd, 0xf0, 0x75, 0x37, | ||
438 | 0x01, 0x75, 0x55, 0x02, 0xe4, 0xf5, 0x51, 0x80, 0x09, 0xe5, 0x50, 0x70, 0x05, 0x75, 0x37, 0x03, | ||
439 | 0xf5, 0x51, 0xe5, 0x37, 0x60, 0x18, 0xc2, 0x01, 0xe4, 0xf5, 0x51, 0xc2, 0x59, 0x20, 0x1a, 0x0e, | ||
440 | 0xad, 0x37, 0xaf, 0x40, 0x12, 0x1c, 0x1b, 0xe5, 0x37, 0xb4, 0x03, 0x02, 0xd2, 0x03, 0xd2, 0xaf, | ||
441 | 0x22, 0xc2, 0xaf, 0x30, 0x01, 0x0e, 0xe4, 0xf5, 0x51, 0xc2, 0x59, 0xc2, 0x01, 0x7d, 0x02, 0xaf, | ||
442 | 0x40, 0x12, 0x1c, 0x1b, 0xe5, 0x52, 0x14, 0x60, 0x5c, 0x14, 0x60, 0x3a, 0x24, 0x02, 0x60, 0x03, | ||
443 | 0x02, 0x1c, 0x18, 0xe5, 0x34, 0xc3, 0x94, 0x03, 0x40, 0x0c, 0x90, 0x01, 0x0c, 0xe0, 0x44, 0x02, | ||
444 | 0xf0, 0xa3, 0xe0, 0x44, 0x04, 0xf0, 0xe5, 0x34, 0xc3, 0x94, 0x02, 0x40, 0x13, 0x90, 0x12, 0x04, | ||
445 | 0xe0, 0x44, 0x02, 0xf0, 0x7f, 0x32, 0x12, 0x03, 0x30, 0x90, 0x01, 0x0d, 0xe0, 0x54, 0xfe, 0xf0, | ||
446 | 0x75, 0x52, 0x02, 0x75, 0x55, 0x03, 0xe5, 0x59, 0xb4, 0x28, 0x06, 0x90, 0x01, 0x0d, 0xe5, 0x31, | ||
447 | 0xf0, 0x90, 0x12, 0x04, 0xe0, 0x54, 0xfb, 0xf0, 0x7f, 0x20, 0x12, 0x19, 0x9c, 0x75, 0x52, 0x01, | ||
448 | 0x75, 0x55, 0x03, 0x80, 0x73, 0xe5, 0x54, 0x70, 0x6f, 0x90, 0x04, 0x01, 0xe0, 0x44, 0x0e, 0xf0, | ||
449 | 0x20, 0x1a, 0x04, 0xe0, 0x54, 0xef, 0xf0, 0xe4, 0xf5, 0x8c, 0x90, 0x13, 0x28, 0xe0, 0x44, 0x0f, | ||
450 | 0xf0, 0xa3, 0xe0, 0x44, 0x0f, 0xf0, 0xa3, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x12, 0x04, 0x74, 0x03, | ||
451 | 0xf0, 0xe5, 0x58, 0xb4, 0x72, 0x16, 0xe5, 0x59, 0xb4, 0x35, 0x11, 0x90, 0x05, 0x00, 0x74, 0xe2, | ||
452 | 0xf0, 0xa3, 0x74, 0x08, 0xf0, 0xa3, 0x74, 0x01, 0xf0, 0x74, 0x03, 0xf0, 0x7f, 0x01, 0x12, 0x03, | ||
453 | 0x30, 0x20, 0x1a, 0x07, 0x90, 0x02, 0x08, 0xe0, 0x44, 0x05, 0xf0, 0x90, 0x10, 0x04, 0xe0, 0x44, | ||
454 | 0x0c, 0xf0, 0xe4, 0xf5, 0x52, 0xf5, 0x55, 0x30, 0x02, 0x09, 0xc2, 0x02, 0x7d, 0x01, 0xaf, 0x41, | ||
455 | 0x12, 0x1c, 0x1b, 0x30, 0x03, 0x02, 0xc2, 0x03, 0xd2, 0xaf, 0x22, 0xef, 0xf4, 0x60, 0x2d, 0xe4, | ||
456 | 0xfe, 0x74, 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xe0, 0xb4, 0xff, 0x19, 0x74, | ||
457 | 0x14, 0x2e, 0xf5, 0x82, 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xef, 0xf0, 0x74, 0x1c, 0x2e, 0xf5, 0x82, | ||
458 | 0xe4, 0x34, 0x70, 0xf5, 0x83, 0xed, 0xf0, 0x22, 0x0e, 0xbe, 0x04, 0xd5, 0x22, 0x22, 0x22, 0x30, | ||
459 | 0x1a, 0x77, 0x90, 0x04, 0x37, 0xe0, 0x20, 0xe5, 0x6c, 0x90, 0x04, 0x28, 0xe0, 0xf5, 0x38, 0xa3, | ||
460 | 0xe0, 0xf5, 0x37, 0xf5, 0x39, 0xe4, 0xf5, 0x25, 0xe5, 0x39, 0x75, 0xf0, 0x80, 0xa4, 0x24, 0x00, | ||
461 | 0xff, 0xe5, 0xf0, 0x34, 0x80, 0xfe, 0xe5, 0x37, 0x65, 0x39, 0x70, 0x05, 0xfc, 0x7d, 0x28, 0x80, | ||
462 | 0x04, 0x7c, 0x00, 0x7d, 0x00, 0xef, 0x2d, 0xff, 0xee, 0x3c, 0xfe, 0x12, 0x1c, 0xca, 0x50, 0x07, | ||
463 | 0x90, 0x01, 0x14, 0xe0, 0x44, 0x02, 0xf0, 0xe5, 0x39, 0x65, 0x38, 0x60, 0x10, 0xe4, 0x25, 0x39, | ||
464 | 0xff, 0xe4, 0x34, 0x80, 0x8f, 0x82, 0xf5, 0x83, 0xe0, 0xf5, 0x39, 0x80, 0xbb, 0x90, 0x04, 0x10, | ||
465 | 0x74, 0x01, 0xf0, 0x90, 0x04, 0x28, 0xe5, 0x38, 0xf0, 0xa3, 0xe5, 0x37, 0xf0, 0x90, 0x04, 0x11, | ||
466 | 0x74, 0x01, 0xf0, 0x80, 0x8d, 0xc2, 0x06, 0xd2, 0x1b, 0x22, 0xe5, 0x25, 0xc3, 0x94, 0x06, 0x50, | ||
467 | 0x19, 0x8f, 0x82, 0x8e, 0x83, 0xe0, 0xb4, 0xff, 0x07, 0x05, 0x25, 0xe4, 0xf5, 0x24, 0x80, 0x2e, | ||
468 | 0xe4, 0xf5, 0x25, 0x8f, 0x82, 0x8e, 0x83, 0xf0, 0x80, 0x24, 0xe5, 0x24, 0x75, 0xf0, 0x06, 0x84, | ||
469 | 0x74, 0x08, 0x25, 0xf0, 0xf5, 0x82, 0xe4, 0x34, 0x10, 0xf5, 0x83, 0xe0, 0xfd, 0x8f, 0x82, 0x8e, | ||
470 | 0x83, 0xe0, 0x6d, 0x70, 0x06, 0x05, 0x25, 0x05, 0x24, 0x80, 0x03, 0xe4, 0xf5, 0x25, 0x0f, 0xbf, | ||
471 | 0x00, 0x01, 0x0e, 0xef, 0x54, 0x7f, 0x60, 0x07, 0xe5, 0x25, 0xc3, 0x94, 0x2a, 0x40, 0xab, 0xe5, | ||
472 | 0x25, 0xb4, 0x2a, 0x03, 0xd3, 0x80, 0x01, 0xc3, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
473 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
474 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
475 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
476 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
477 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
479 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
480 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
481 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
482 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
483 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
484 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
485 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
486 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
487 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
489 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
490 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
491 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
492 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
493 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
494 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
495 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
496 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
497 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
499 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
500 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
501 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
502 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
503 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
504 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
505 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
506 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
507 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
509 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
510 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
511 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
512 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
513 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
514 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
515 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
516 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
517 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 0xe3, 0x34, } ; | ||
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig index e24a6f7a0d85..155a78e07405 100644 --- a/drivers/staging/rtl8187se/Kconfig +++ b/drivers/staging/rtl8187se/Kconfig | |||
@@ -3,6 +3,7 @@ config R8187SE | |||
3 | depends on PCI && WLAN | 3 | depends on PCI && WLAN |
4 | select WIRELESS_EXT | 4 | select WIRELESS_EXT |
5 | select WEXT_PRIV | 5 | select WEXT_PRIV |
6 | select EEPROM_93CX6 | ||
6 | default N | 7 | default N |
7 | ---help--- | 8 | ---help--- |
8 | If built as a module, it will be called r8187se.ko. | 9 | If built as a module, it will be called r8187se.ko. |
diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile index b395acf5a38e..e6adf91cdd2c 100644 --- a/drivers/staging/rtl8187se/Makefile +++ b/drivers/staging/rtl8187se/Makefile | |||
@@ -18,7 +18,6 @@ EXTRA_CFLAGS += -DENABLE_LPS | |||
18 | 18 | ||
19 | r8187se-objs := \ | 19 | r8187se-objs := \ |
20 | r8180_core.o \ | 20 | r8180_core.o \ |
21 | r8180_93cx6.o \ | ||
22 | r8180_wx.o \ | 21 | r8180_wx.o \ |
23 | r8180_rtl8225z2.o \ | 22 | r8180_rtl8225z2.o \ |
24 | r8185b_init.o \ | 23 | r8185b_init.o \ |
diff --git a/drivers/staging/rtl8187se/TODO b/drivers/staging/rtl8187se/TODO index a762e79873e9..704949a9da0d 100644 --- a/drivers/staging/rtl8187se/TODO +++ b/drivers/staging/rtl8187se/TODO | |||
@@ -5,7 +5,6 @@ TODO: | |||
5 | - switch to use shared "librtl" instead of private ieee80211 stack | 5 | - switch to use shared "librtl" instead of private ieee80211 stack |
6 | - switch to use LIB80211 | 6 | - switch to use LIB80211 |
7 | - switch to use MAC80211 | 7 | - switch to use MAC80211 |
8 | - switch to use EEPROM_93CX6 | ||
9 | - use kernel coding style | 8 | - use kernel coding style |
10 | - checkpatch.pl fixes | 9 | - checkpatch.pl fixes |
11 | - sparse fixes | 10 | - sparse fixes |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h index 9086047c32d4..4cd95c3dc947 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211.h +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211.h | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/jiffies.h> | 29 | #include <linux/jiffies.h> |
30 | #include <linux/timer.h> | 30 | #include <linux/timer.h> |
31 | #include <linux/sched.h> | 31 | #include <linux/sched.h> |
32 | #include <linux/semaphore.h> | ||
32 | #include <linux/wireless.h> | 33 | #include <linux/wireless.h> |
33 | #include <linux/ieee80211.h> | 34 | #include <linux/ieee80211.h> |
34 | 35 | ||
@@ -161,10 +162,6 @@ do { if (ieee80211_debug_level & (level)) \ | |||
161 | #define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) | 162 | #define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) |
162 | #endif /* CONFIG_IEEE80211_DEBUG */ | 163 | #endif /* CONFIG_IEEE80211_DEBUG */ |
163 | 164 | ||
164 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
165 | #define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], \ | ||
166 | ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5] | ||
167 | |||
168 | /* | 165 | /* |
169 | * To use the debug system; | 166 | * To use the debug system; |
170 | * | 167 | * |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c index 172e8f3ae6c1..40f1b99faad2 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c | |||
@@ -285,7 +285,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
285 | if (!(keyidx & (1 << 5))) { | 285 | if (!(keyidx & (1 << 5))) { |
286 | if (net_ratelimit()) { | 286 | if (net_ratelimit()) { |
287 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" | 287 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" |
288 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 288 | " flag from %pM\n", hdr->addr2); |
289 | } | 289 | } |
290 | key->dot11RSNAStatsCCMPFormatErrors++; | 290 | key->dot11RSNAStatsCCMPFormatErrors++; |
291 | return -2; | 291 | return -2; |
@@ -298,9 +298,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
298 | } | 298 | } |
299 | if (!key->key_set) { | 299 | if (!key->key_set) { |
300 | if (net_ratelimit()) { | 300 | if (net_ratelimit()) { |
301 | printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT | 301 | printk(KERN_DEBUG "CCMP: received packet from %pM" |
302 | " with keyid=%d that does not have a configured" | 302 | " with keyid=%d that does not have a configured" |
303 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 303 | " key\n", hdr->addr2, keyidx); |
304 | } | 304 | } |
305 | return -3; | 305 | return -3; |
306 | } | 306 | } |
@@ -315,11 +315,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
315 | 315 | ||
316 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { | 316 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { |
317 | if (net_ratelimit()) { | 317 | if (net_ratelimit()) { |
318 | printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT | 318 | printk(KERN_DEBUG "CCMP: replay detected: STA=%pM" |
319 | " previous PN %02x%02x%02x%02x%02x%02x " | 319 | " previous PN %pm received PN %pm\n", |
320 | "received PN %02x%02x%02x%02x%02x%02x\n", | 320 | hdr->addr2, key->rx_pn, pn); |
321 | MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn), | ||
322 | MAC_ARG(pn)); | ||
323 | } | 321 | } |
324 | key->dot11RSNAStatsCCMPReplays++; | 322 | key->dot11RSNAStatsCCMPReplays++; |
325 | return -4; | 323 | return -4; |
@@ -347,7 +345,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
347 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { | 345 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { |
348 | if (net_ratelimit()) { | 346 | if (net_ratelimit()) { |
349 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" | 347 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" |
350 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 348 | "%pM\n", hdr->addr2); |
351 | } | 349 | } |
352 | key->dot11RSNAStatsCCMPDecryptErrors++; | 350 | key->dot11RSNAStatsCCMPDecryptErrors++; |
353 | return -5; | 351 | return -5; |
@@ -423,11 +421,10 @@ static char * ieee80211_ccmp_print_stats(char *p, void *priv) | |||
423 | { | 421 | { |
424 | struct ieee80211_ccmp_data *ccmp = priv; | 422 | struct ieee80211_ccmp_data *ccmp = priv; |
425 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " | 423 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " |
426 | "tx_pn=%02x%02x%02x%02x%02x%02x " | 424 | "tx_pn=%pm rx_pn=%pm " |
427 | "rx_pn=%02x%02x%02x%02x%02x%02x " | ||
428 | "format_errors=%d replays=%d decrypt_errors=%d\n", | 425 | "format_errors=%d replays=%d decrypt_errors=%d\n", |
429 | ccmp->key_idx, ccmp->key_set, | 426 | ccmp->key_idx, ccmp->key_set, |
430 | MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn), | 427 | ccmp->tx_pn, ccmp->rx_pn, |
431 | ccmp->dot11RSNAStatsCCMPFormatErrors, | 428 | ccmp->dot11RSNAStatsCCMPFormatErrors, |
432 | ccmp->dot11RSNAStatsCCMPReplays, | 429 | ccmp->dot11RSNAStatsCCMPReplays, |
433 | ccmp->dot11RSNAStatsCCMPDecryptErrors); | 430 | ccmp->dot11RSNAStatsCCMPDecryptErrors); |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c index e6d8385e1d88..a5254111d9a1 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c | |||
@@ -385,7 +385,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
385 | if (!(keyidx & (1 << 5))) { | 385 | if (!(keyidx & (1 << 5))) { |
386 | if (net_ratelimit()) { | 386 | if (net_ratelimit()) { |
387 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" | 387 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" |
388 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 388 | " flag from %pM\n", hdr->addr2); |
389 | } | 389 | } |
390 | return -2; | 390 | return -2; |
391 | } | 391 | } |
@@ -397,9 +397,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
397 | } | 397 | } |
398 | if (!tkey->key_set) { | 398 | if (!tkey->key_set) { |
399 | if (net_ratelimit()) { | 399 | if (net_ratelimit()) { |
400 | printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT | 400 | printk(KERN_DEBUG "TKIP: received packet from %pM" |
401 | " with keyid=%d that does not have a configured" | 401 | " with keyid=%d that does not have a configured" |
402 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 402 | " key\n", hdr->addr2, keyidx); |
403 | } | 403 | } |
404 | return -3; | 404 | return -3; |
405 | } | 405 | } |
@@ -410,9 +410,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
410 | if (iv32 < tkey->rx_iv32 || | 410 | if (iv32 < tkey->rx_iv32 || |
411 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { | 411 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { |
412 | if (net_ratelimit()) { | 412 | if (net_ratelimit()) { |
413 | printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT | 413 | printk(KERN_DEBUG "TKIP: replay detected: STA=%pM" |
414 | " previous TSC %08x%04x received TSC " | 414 | " previous TSC %08x%04x received TSC " |
415 | "%08x%04x\n", MAC_ARG(hdr->addr2), | 415 | "%08x%04x\n", hdr->addr2, |
416 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); | 416 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); |
417 | } | 417 | } |
418 | tkey->dot11RSNAStatsTKIPReplays++; | 418 | tkey->dot11RSNAStatsTKIPReplays++; |
@@ -431,8 +431,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
431 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { | 431 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { |
432 | if (net_ratelimit()) { | 432 | if (net_ratelimit()) { |
433 | printk(KERN_DEBUG ": TKIP: failed to decrypt " | 433 | printk(KERN_DEBUG ": TKIP: failed to decrypt " |
434 | "received packet from " MAC_FMT "\n", | 434 | "received packet from %pM\n", |
435 | MAC_ARG(hdr->addr2)); | 435 | hdr->addr2); |
436 | } | 436 | } |
437 | return -7; | 437 | return -7; |
438 | } | 438 | } |
@@ -450,7 +450,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
450 | } | 450 | } |
451 | if (net_ratelimit()) { | 451 | if (net_ratelimit()) { |
452 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" | 452 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" |
453 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 453 | "%pM\n", hdr->addr2); |
454 | } | 454 | } |
455 | tkey->dot11RSNAStatsTKIPICVErrors++; | 455 | tkey->dot11RSNAStatsTKIPICVErrors++; |
456 | return -5; | 456 | return -5; |
@@ -604,8 +604,8 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx, | |||
604 | struct ieee80211_hdr_4addr *hdr; | 604 | struct ieee80211_hdr_4addr *hdr; |
605 | hdr = (struct ieee80211_hdr_4addr *)skb->data; | 605 | hdr = (struct ieee80211_hdr_4addr *)skb->data; |
606 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " | 606 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " |
607 | "MSDU from " MAC_FMT " keyidx=%d\n", | 607 | "MSDU from %pM keyidx=%d\n", |
608 | skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2), | 608 | skb->dev ? skb->dev->name : "N/A", hdr->addr2, |
609 | keyidx); | 609 | keyidx); |
610 | if (skb->dev) | 610 | if (skb->dev) |
611 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); | 611 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c index 9128c181bc7d..2b7080cc2c05 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c | |||
@@ -311,8 +311,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
311 | strcmp(crypt->ops->name, "TKIP") == 0) { | 311 | strcmp(crypt->ops->name, "TKIP") == 0) { |
312 | if (net_ratelimit()) { | 312 | if (net_ratelimit()) { |
313 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 313 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
314 | "received packet from " MAC_FMT "\n", | 314 | "received packet from %pM\n", |
315 | ieee->dev->name, MAC_ARG(hdr->addr2)); | 315 | ieee->dev->name, hdr->addr2); |
316 | } | 316 | } |
317 | return -1; | 317 | return -1; |
318 | } | 318 | } |
@@ -323,8 +323,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
323 | atomic_dec(&crypt->refcnt); | 323 | atomic_dec(&crypt->refcnt); |
324 | if (res < 0) { | 324 | if (res < 0) { |
325 | IEEE80211_DEBUG_DROP( | 325 | IEEE80211_DEBUG_DROP( |
326 | "decryption failed (SA=" MAC_FMT | 326 | "decryption failed (SA=%pM" |
327 | ") res=%d\n", MAC_ARG(hdr->addr2), res); | 327 | ") res=%d\n", hdr->addr2, res); |
328 | if (res == -2) | 328 | if (res == -2) |
329 | IEEE80211_DEBUG_DROP("Decryption failed ICV " | 329 | IEEE80211_DEBUG_DROP("Decryption failed ICV " |
330 | "mismatch (key %d)\n", | 330 | "mismatch (key %d)\n", |
@@ -356,8 +356,8 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s | |||
356 | atomic_dec(&crypt->refcnt); | 356 | atomic_dec(&crypt->refcnt); |
357 | if (res < 0) { | 357 | if (res < 0) { |
358 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" | 358 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" |
359 | " (SA=" MAC_FMT " keyidx=%d)\n", | 359 | " (SA=%pM keyidx=%d)\n", |
360 | ieee->dev->name, MAC_ARG(hdr->addr2), keyidx); | 360 | ieee->dev->name, hdr->addr2, keyidx); |
361 | return -1; | 361 | return -1; |
362 | } | 362 | } |
363 | 363 | ||
@@ -550,8 +550,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
550 | * frames silently instead of filling system log with | 550 | * frames silently instead of filling system log with |
551 | * these reports. */ | 551 | * these reports. */ |
552 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" | 552 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" |
553 | " (SA=" MAC_FMT ")\n", | 553 | " (SA=%pM)\n", |
554 | MAC_ARG(hdr->addr2)); | 554 | hdr->addr2); |
555 | ieee->ieee_stats.rx_discards_undecryptable++; | 555 | ieee->ieee_stats.rx_discards_undecryptable++; |
556 | goto rx_dropped; | 556 | goto rx_dropped; |
557 | } | 557 | } |
@@ -709,8 +709,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
709 | } else { | 709 | } else { |
710 | IEEE80211_DEBUG_DROP( | 710 | IEEE80211_DEBUG_DROP( |
711 | "encryption configured, but RX " | 711 | "encryption configured, but RX " |
712 | "frame not encrypted (SA=" MAC_FMT ")\n", | 712 | "frame not encrypted (SA=%pM)\n", |
713 | MAC_ARG(hdr->addr2)); | 713 | hdr->addr2); |
714 | goto rx_dropped; | 714 | goto rx_dropped; |
715 | } | 715 | } |
716 | } | 716 | } |
@@ -729,9 +729,9 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
729 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { | 729 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { |
730 | IEEE80211_DEBUG_DROP( | 730 | IEEE80211_DEBUG_DROP( |
731 | "dropped unencrypted RX data " | 731 | "dropped unencrypted RX data " |
732 | "frame from " MAC_FMT | 732 | "frame from %pM" |
733 | " (drop_unencrypted=1)\n", | 733 | " (drop_unencrypted=1)\n", |
734 | MAC_ARG(hdr->addr2)); | 734 | hdr->addr2); |
735 | goto rx_dropped; | 735 | goto rx_dropped; |
736 | } | 736 | } |
737 | /* | 737 | /* |
@@ -1196,11 +1196,11 @@ inline int ieee80211_network_init( | |||
1196 | } | 1196 | } |
1197 | 1197 | ||
1198 | if (network->mode == 0) { | 1198 | if (network->mode == 0) { |
1199 | IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' " | 1199 | IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' " |
1200 | "network.\n", | 1200 | "network.\n", |
1201 | escape_essid(network->ssid, | 1201 | escape_essid(network->ssid, |
1202 | network->ssid_len), | 1202 | network->ssid_len), |
1203 | MAC_ARG(network->bssid)); | 1203 | network->bssid); |
1204 | return 1; | 1204 | return 1; |
1205 | } | 1205 | } |
1206 | 1206 | ||
@@ -1341,9 +1341,9 @@ inline void ieee80211_process_probe_response( | |||
1341 | memset(&network, 0, sizeof(struct ieee80211_network)); | 1341 | memset(&network, 0, sizeof(struct ieee80211_network)); |
1342 | 1342 | ||
1343 | IEEE80211_DEBUG_SCAN( | 1343 | IEEE80211_DEBUG_SCAN( |
1344 | "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", | 1344 | "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", |
1345 | escape_essid(info_element->data, info_element->len), | 1345 | escape_essid(info_element->data, info_element->len), |
1346 | MAC_ARG(beacon->header.addr3), | 1346 | beacon->header.addr3, |
1347 | (beacon->capability & (1<<0xf)) ? '1' : '0', | 1347 | (beacon->capability & (1<<0xf)) ? '1' : '0', |
1348 | (beacon->capability & (1<<0xe)) ? '1' : '0', | 1348 | (beacon->capability & (1<<0xe)) ? '1' : '0', |
1349 | (beacon->capability & (1<<0xd)) ? '1' : '0', | 1349 | (beacon->capability & (1<<0xd)) ? '1' : '0', |
@@ -1362,10 +1362,10 @@ inline void ieee80211_process_probe_response( | |||
1362 | (beacon->capability & (1<<0x0)) ? '1' : '0'); | 1362 | (beacon->capability & (1<<0x0)) ? '1' : '0'); |
1363 | 1363 | ||
1364 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { | 1364 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { |
1365 | IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n", | 1365 | IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n", |
1366 | escape_essid(info_element->data, | 1366 | escape_essid(info_element->data, |
1367 | info_element->len), | 1367 | info_element->len), |
1368 | MAC_ARG(beacon->header.addr3), | 1368 | beacon->header.addr3, |
1369 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 1369 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
1370 | IEEE80211_STYPE_PROBE_RESP ? | 1370 | IEEE80211_STYPE_PROBE_RESP ? |
1371 | "PROBE RESPONSE" : "BEACON"); | 1371 | "PROBE RESPONSE" : "BEACON"); |
@@ -1464,11 +1464,11 @@ inline void ieee80211_process_probe_response( | |||
1464 | /* If there are no more slots, expire the oldest */ | 1464 | /* If there are no more slots, expire the oldest */ |
1465 | list_del(&oldest->list); | 1465 | list_del(&oldest->list); |
1466 | target = oldest; | 1466 | target = oldest; |
1467 | IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from " | 1467 | IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from " |
1468 | "network list.\n", | 1468 | "network list.\n", |
1469 | escape_essid(target->ssid, | 1469 | escape_essid(target->ssid, |
1470 | target->ssid_len), | 1470 | target->ssid_len), |
1471 | MAC_ARG(target->bssid)); | 1471 | target->bssid); |
1472 | } else { | 1472 | } else { |
1473 | /* Otherwise just pull from the free list */ | 1473 | /* Otherwise just pull from the free list */ |
1474 | target = list_entry(ieee->network_free_list.next, | 1474 | target = list_entry(ieee->network_free_list.next, |
@@ -1478,10 +1478,10 @@ inline void ieee80211_process_probe_response( | |||
1478 | 1478 | ||
1479 | 1479 | ||
1480 | #ifdef CONFIG_IEEE80211_DEBUG | 1480 | #ifdef CONFIG_IEEE80211_DEBUG |
1481 | IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n", | 1481 | IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n", |
1482 | escape_essid(network.ssid, | 1482 | escape_essid(network.ssid, |
1483 | network.ssid_len), | 1483 | network.ssid_len), |
1484 | MAC_ARG(network.bssid), | 1484 | network.bssid, |
1485 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 1485 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
1486 | IEEE80211_STYPE_PROBE_RESP ? | 1486 | IEEE80211_STYPE_PROBE_RESP ? |
1487 | "PROBE RESPONSE" : "BEACON"); | 1487 | "PROBE RESPONSE" : "BEACON"); |
@@ -1492,10 +1492,10 @@ inline void ieee80211_process_probe_response( | |||
1492 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) | 1492 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) |
1493 | ieee80211_softmac_new_net(ieee,&network); | 1493 | ieee80211_softmac_new_net(ieee,&network); |
1494 | } else { | 1494 | } else { |
1495 | IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n", | 1495 | IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n", |
1496 | escape_essid(target->ssid, | 1496 | escape_essid(target->ssid, |
1497 | target->ssid_len), | 1497 | target->ssid_len), |
1498 | MAC_ARG(target->bssid), | 1498 | target->bssid, |
1499 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 1499 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
1500 | IEEE80211_STYPE_PROBE_RESP ? | 1500 | IEEE80211_STYPE_PROBE_RESP ? |
1501 | "PROBE RESPONSE" : "BEACON"); | 1501 | "PROBE RESPONSE" : "BEACON"); |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c index a2150670ef56..c2f472ee6eb6 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c | |||
@@ -1573,7 +1573,7 @@ ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb) | |||
1573 | ieee80211_resp_to_assoc_rq(ieee, dest); | 1573 | ieee80211_resp_to_assoc_rq(ieee, dest); |
1574 | } | 1574 | } |
1575 | 1575 | ||
1576 | printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest)); | 1576 | printk(KERN_INFO"New client associated: %pM\n", dest); |
1577 | } | 1577 | } |
1578 | 1578 | ||
1579 | 1579 | ||
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c index f1d6cb452563..ad42bcdc9374 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c | |||
@@ -482,8 +482,7 @@ int ieee80211_wx_set_power(struct ieee80211_device *ieee, | |||
482 | (!ieee->enter_sleep_state) || | 482 | (!ieee->enter_sleep_state) || |
483 | (!ieee->ps_is_queue_empty)){ | 483 | (!ieee->ps_is_queue_empty)){ |
484 | 484 | ||
485 | printk("ERROR. PS mode is tryied to be use but\ | 485 | printk("ERROR. PS mode tried to be use but driver missed a callback\n\n"); |
486 | driver missed a callback\n\n"); | ||
487 | 486 | ||
488 | return -1; | 487 | return -1; |
489 | } | 488 | } |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c index 69bd02164b0c..6cb31e1760ac 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c | |||
@@ -198,8 +198,8 @@ int ieee80211_encrypt_fragment( | |||
198 | header = (struct ieee80211_hdr_4addr *)frag->data; | 198 | header = (struct ieee80211_hdr_4addr *)frag->data; |
199 | if (net_ratelimit()) { | 199 | if (net_ratelimit()) { |
200 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 200 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
201 | "TX packet to " MAC_FMT "\n", | 201 | "TX packet to %pM\n", |
202 | ieee->dev->name, MAC_ARG(header->addr1)); | 202 | ieee->dev->name, header->addr1); |
203 | } | 203 | } |
204 | return -1; | 204 | return -1; |
205 | } | 205 | } |
@@ -407,7 +407,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, | |||
407 | memcpy(&header.addr2, src, ETH_ALEN); | 407 | memcpy(&header.addr2, src, ETH_ALEN); |
408 | memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN); | 408 | memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN); |
409 | } | 409 | } |
410 | // printk(KERN_WARNING "essid MAC address is "MAC_FMT, MAC_ARG(&header.addr1)); | 410 | // printk(KERN_WARNING "essid MAC address is %pM", &header.addr1); |
411 | header.frame_ctl = cpu_to_le16(fc); | 411 | header.frame_ctl = cpu_to_le16(fc); |
412 | //hdr_len = IEEE80211_3ADDR_LEN; | 412 | //hdr_len = IEEE80211_3ADDR_LEN; |
413 | 413 | ||
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c index 6aad48fe2e18..bd5e77bf7162 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c | |||
@@ -234,10 +234,10 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee, | |||
234 | else | 234 | else |
235 | IEEE80211_DEBUG_SCAN( | 235 | IEEE80211_DEBUG_SCAN( |
236 | "Not showing network '%s (" | 236 | "Not showing network '%s (" |
237 | MAC_FMT ")' due to age (%lums).\n", | 237 | "%pM)' due to age (%lums).\n", |
238 | escape_essid(network->ssid, | 238 | escape_essid(network->ssid, |
239 | network->ssid_len), | 239 | network->ssid_len), |
240 | MAC_ARG(network->bssid), | 240 | network->bssid, |
241 | (jiffies - network->last_scanned) / (HZ / 100)); | 241 | (jiffies - network->last_scanned) / (HZ / 100)); |
242 | } | 242 | } |
243 | } | 243 | } |
@@ -694,7 +694,7 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee, | |||
694 | #if 1 | 694 | #if 1 |
695 | case IW_AUTH_WPA_ENABLED: | 695 | case IW_AUTH_WPA_ENABLED: |
696 | ieee->wpa_enabled = (data->value)?1:0; | 696 | ieee->wpa_enabled = (data->value)?1:0; |
697 | //printk("enalbe wpa:%d\n", ieee->wpa_enabled); | 697 | //printk("enable wpa:%d\n", ieee->wpa_enabled); |
698 | break; | 698 | break; |
699 | 699 | ||
700 | #endif | 700 | #endif |
diff --git a/drivers/staging/rtl8187se/r8180.h b/drivers/staging/rtl8187se/r8180.h index ce828885b64f..d15bdf64efd0 100644 --- a/drivers/staging/rtl8187se/r8180.h +++ b/drivers/staging/rtl8187se/r8180.h | |||
@@ -366,7 +366,6 @@ typedef struct r8180_priv | |||
366 | short diversity; | 366 | short diversity; |
367 | u8 cs_treshold; | 367 | u8 cs_treshold; |
368 | short rcr_csense; | 368 | short rcr_csense; |
369 | short rf_chip; | ||
370 | u32 key0[4]; | 369 | u32 key0[4]; |
371 | short (*rf_set_sens)(struct net_device *dev,short sens); | 370 | short (*rf_set_sens)(struct net_device *dev,short sens); |
372 | void (*rf_set_chan)(struct net_device *dev,short ch); | 371 | void (*rf_set_chan)(struct net_device *dev,short ch); |
@@ -479,9 +478,6 @@ typedef struct r8180_priv | |||
479 | u8 retry_rts; | 478 | u8 retry_rts; |
480 | u16 rts; | 479 | u16 rts; |
481 | 480 | ||
482 | //add for RF power on power off by lizhaoming 080512 | ||
483 | u8 RegThreeWireMode; // See "Three wire mode" defined above, 2006.05.31, by rcnjko. | ||
484 | |||
485 | //by amy for led | 481 | //by amy for led |
486 | LED_STRATEGY_8185 LedStrategy; | 482 | LED_STRATEGY_8185 LedStrategy; |
487 | //by amy for led | 483 | //by amy for led |
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.c b/drivers/staging/rtl8187se/r8180_93cx6.c deleted file mode 100644 index 7e4711fb930c..000000000000 --- a/drivers/staging/rtl8187se/r8180_93cx6.c +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | /* | ||
2 | This files contains card eeprom (93c46 or 93c56) programming routines, | ||
3 | memory is addressed by 16 bits words. | ||
4 | |||
5 | This is part of rtl8180 OpenSource driver. | ||
6 | Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it> | ||
7 | Released under the terms of GPL (General Public Licence) | ||
8 | |||
9 | Parts of this driver are based on the GPL part of the | ||
10 | official realtek driver. | ||
11 | |||
12 | Parts of this driver are based on the rtl8180 driver skeleton | ||
13 | from Patric Schenke & Andres Salomon. | ||
14 | |||
15 | Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver. | ||
16 | |||
17 | We want to tanks the Authors of those projects and the Ndiswrapper | ||
18 | project Authors. | ||
19 | */ | ||
20 | |||
21 | #include "r8180_93cx6.h" | ||
22 | |||
23 | void eprom_cs(struct net_device *dev, short bit) | ||
24 | { | ||
25 | if(bit) | ||
26 | write_nic_byte(dev, EPROM_CMD, | ||
27 | (1<<EPROM_CS_SHIFT) | \ | ||
28 | read_nic_byte(dev, EPROM_CMD)); //enable EPROM | ||
29 | else | ||
30 | write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\ | ||
31 | &~(1<<EPROM_CS_SHIFT)); //disable EPROM | ||
32 | |||
33 | force_pci_posting(dev); | ||
34 | udelay(EPROM_DELAY); | ||
35 | } | ||
36 | |||
37 | |||
38 | void eprom_ck_cycle(struct net_device *dev) | ||
39 | { | ||
40 | write_nic_byte(dev, EPROM_CMD, | ||
41 | (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD)); | ||
42 | force_pci_posting(dev); | ||
43 | udelay(EPROM_DELAY); | ||
44 | write_nic_byte(dev, EPROM_CMD, | ||
45 | read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT)); | ||
46 | force_pci_posting(dev); | ||
47 | udelay(EPROM_DELAY); | ||
48 | } | ||
49 | |||
50 | |||
51 | void eprom_w(struct net_device *dev,short bit) | ||
52 | { | ||
53 | if(bit) | ||
54 | write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \ | ||
55 | read_nic_byte(dev,EPROM_CMD)); | ||
56 | else | ||
57 | write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\ | ||
58 | &~(1<<EPROM_W_SHIFT)); | ||
59 | |||
60 | force_pci_posting(dev); | ||
61 | udelay(EPROM_DELAY); | ||
62 | } | ||
63 | |||
64 | |||
65 | short eprom_r(struct net_device *dev) | ||
66 | { | ||
67 | short bit; | ||
68 | |||
69 | bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) ); | ||
70 | udelay(EPROM_DELAY); | ||
71 | |||
72 | if(bit) return 1; | ||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | |||
77 | void eprom_send_bits_string(struct net_device *dev, short b[], int len) | ||
78 | { | ||
79 | int i; | ||
80 | |||
81 | for(i=0; i<len; i++){ | ||
82 | eprom_w(dev, b[i]); | ||
83 | eprom_ck_cycle(dev); | ||
84 | } | ||
85 | } | ||
86 | |||
87 | |||
88 | u32 eprom_read(struct net_device *dev, u32 addr) | ||
89 | { | ||
90 | struct r8180_priv *priv = ieee80211_priv(dev); | ||
91 | short read_cmd[]={1,1,0}; | ||
92 | short addr_str[8]; | ||
93 | int i; | ||
94 | int addr_len; | ||
95 | u32 ret; | ||
96 | |||
97 | ret=0; | ||
98 | //enable EPROM programming | ||
99 | write_nic_byte(dev, EPROM_CMD, | ||
100 | (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); | ||
101 | force_pci_posting(dev); | ||
102 | udelay(EPROM_DELAY); | ||
103 | |||
104 | if (priv->epromtype==EPROM_93c56){ | ||
105 | addr_str[7]=addr & 1; | ||
106 | addr_str[6]=addr & (1<<1); | ||
107 | addr_str[5]=addr & (1<<2); | ||
108 | addr_str[4]=addr & (1<<3); | ||
109 | addr_str[3]=addr & (1<<4); | ||
110 | addr_str[2]=addr & (1<<5); | ||
111 | addr_str[1]=addr & (1<<6); | ||
112 | addr_str[0]=addr & (1<<7); | ||
113 | addr_len=8; | ||
114 | }else{ | ||
115 | addr_str[5]=addr & 1; | ||
116 | addr_str[4]=addr & (1<<1); | ||
117 | addr_str[3]=addr & (1<<2); | ||
118 | addr_str[2]=addr & (1<<3); | ||
119 | addr_str[1]=addr & (1<<4); | ||
120 | addr_str[0]=addr & (1<<5); | ||
121 | addr_len=6; | ||
122 | } | ||
123 | eprom_cs(dev, 1); | ||
124 | eprom_ck_cycle(dev); | ||
125 | eprom_send_bits_string(dev, read_cmd, 3); | ||
126 | eprom_send_bits_string(dev, addr_str, addr_len); | ||
127 | |||
128 | //keep chip pin D to low state while reading. | ||
129 | //I'm unsure if it is necessary, but anyway shouldn't hurt | ||
130 | eprom_w(dev, 0); | ||
131 | |||
132 | for(i=0;i<16;i++){ | ||
133 | //eeprom needs a clk cycle between writing opcode&adr | ||
134 | //and reading data. (eeprom outs a dummy 0) | ||
135 | eprom_ck_cycle(dev); | ||
136 | ret |= (eprom_r(dev)<<(15-i)); | ||
137 | } | ||
138 | |||
139 | eprom_cs(dev, 0); | ||
140 | eprom_ck_cycle(dev); | ||
141 | |||
142 | //disable EPROM programming | ||
143 | write_nic_byte(dev, EPROM_CMD, | ||
144 | (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT)); | ||
145 | return ret; | ||
146 | } | ||
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.h b/drivers/staging/rtl8187se/r8180_93cx6.h index 36ae100f3f16..79e7391ac881 100644 --- a/drivers/staging/rtl8187se/r8180_93cx6.h +++ b/drivers/staging/rtl8187se/r8180_93cx6.h | |||
@@ -45,13 +45,10 @@ | |||
45 | 45 | ||
46 | #define EPROM_TXPW_OFDM_CH1_2 0x20 | 46 | #define EPROM_TXPW_OFDM_CH1_2 0x20 |
47 | 47 | ||
48 | //#define EPROM_TXPW_CH1_2 0x10 | 48 | #define EPROM_TXPW_CH1_2 0x30 |
49 | #define EPROM_TXPW_CH1_2 0x30 | 49 | |
50 | #define EPROM_TXPW_CH3_4 0x11 | 50 | #define RTL818X_EEPROM_CMD_READ (1 << 0) |
51 | #define EPROM_TXPW_CH5_6 0x12 | 51 | #define RTL818X_EEPROM_CMD_WRITE (1 << 1) |
52 | #define EPROM_TXPW_CH7_8 0x13 | 52 | #define RTL818X_EEPROM_CMD_CK (1 << 2) |
53 | #define EPROM_TXPW_CH9_10 0x14 | 53 | #define RTL818X_EEPROM_CMD_CS (1 << 3) |
54 | #define EPROM_TXPW_CH11_12 0x15 | 54 | |
55 | #define EPROM_TXPW_CH13_14 0x16 | ||
56 | |||
57 | u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word | ||
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c index 1847f38b9f22..b1757acabedc 100644 --- a/drivers/staging/rtl8187se/r8180_core.c +++ b/drivers/staging/rtl8187se/r8180_core.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #undef DUMMY_RX | 31 | #undef DUMMY_RX |
32 | 32 | ||
33 | #include <linux/syscalls.h> | 33 | #include <linux/syscalls.h> |
34 | #include <linux/eeprom_93cx6.h> | ||
34 | 35 | ||
35 | #include "r8180_hw.h" | 36 | #include "r8180_hw.h" |
36 | #include "r8180.h" | 37 | #include "r8180.h" |
@@ -41,13 +42,6 @@ | |||
41 | 42 | ||
42 | #include "ieee80211/dot11d.h" | 43 | #include "ieee80211/dot11d.h" |
43 | 44 | ||
44 | #ifndef PCI_VENDOR_ID_BELKIN | ||
45 | #define PCI_VENDOR_ID_BELKIN 0x1799 | ||
46 | #endif | ||
47 | #ifndef PCI_VENDOR_ID_DLINK | ||
48 | #define PCI_VENDOR_ID_DLINK 0x1186 | ||
49 | #endif | ||
50 | |||
51 | static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { | 45 | static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { |
52 | { | 46 | { |
53 | .vendor = PCI_VENDOR_ID_REALTEK, | 47 | .vendor = PCI_VENDOR_ID_REALTEK, |
@@ -669,11 +663,8 @@ unsigned char STRENGTH_MAP[] = { | |||
669 | 663 | ||
670 | void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual) | 664 | void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual) |
671 | { | 665 | { |
672 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | ||
673 | u32 temp; | 666 | u32 temp; |
674 | u32 temp2; | 667 | u32 temp2; |
675 | u32 temp3; | ||
676 | u32 lsb; | ||
677 | u32 q; | 668 | u32 q; |
678 | u32 orig_qual; | 669 | u32 orig_qual; |
679 | u8 _rssi; | 670 | u8 _rssi; |
@@ -695,88 +686,6 @@ void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual) | |||
695 | *qual = temp; | 686 | *qual = temp; |
696 | temp2 = *rssi; | 687 | temp2 = *rssi; |
697 | 688 | ||
698 | switch(priv->rf_chip){ | ||
699 | case RFCHIPID_RFMD: | ||
700 | lsb = temp2 & 1; | ||
701 | temp2 &= 0x7e; | ||
702 | if ( !lsb || !(temp2 <= 0x3c) ) { | ||
703 | temp2 = 0x64; | ||
704 | } else { | ||
705 | temp2 = 100 * temp2 / 0x3c; | ||
706 | } | ||
707 | *rssi = temp2 & 0xff; | ||
708 | _rssi = temp2 & 0xff; | ||
709 | break; | ||
710 | case RFCHIPID_INTERSIL: | ||
711 | lsb = temp2; | ||
712 | temp2 &= 0xfffffffe; | ||
713 | temp2 *= 251; | ||
714 | temp3 = temp2; | ||
715 | temp2 <<= 6; | ||
716 | temp3 += temp2; | ||
717 | temp3 <<= 1; | ||
718 | temp2 = 0x4950df; | ||
719 | temp2 -= temp3; | ||
720 | lsb &= 1; | ||
721 | if ( temp2 <= 0x3e0000 ) { | ||
722 | if ( temp2 < 0xffef0000 ) | ||
723 | temp2 = 0xffef0000; | ||
724 | } else { | ||
725 | temp2 = 0x3e0000; | ||
726 | } | ||
727 | if ( !lsb ) { | ||
728 | temp2 -= 0xf0000; | ||
729 | } else { | ||
730 | temp2 += 0xf0000; | ||
731 | } | ||
732 | |||
733 | temp3 = 0x4d0000; | ||
734 | temp3 -= temp2; | ||
735 | temp3 *= 100; | ||
736 | temp3 = temp3 / 0x6d; | ||
737 | temp3 >>= 0x10; | ||
738 | _rssi = temp3 & 0xff; | ||
739 | *rssi = temp3 & 0xff; | ||
740 | break; | ||
741 | case RFCHIPID_GCT: | ||
742 | lsb = temp2 & 1; | ||
743 | temp2 &= 0x7e; | ||
744 | if ( ! lsb || !(temp2 <= 0x3c) ){ | ||
745 | temp2 = 0x64; | ||
746 | } else { | ||
747 | temp2 = (100 * temp2) / 0x3c; | ||
748 | } | ||
749 | *rssi = temp2 & 0xff; | ||
750 | _rssi = temp2 & 0xff; | ||
751 | break; | ||
752 | case RFCHIPID_PHILIPS: | ||
753 | if( orig_qual <= 0x4e ){ | ||
754 | _rssi = STRENGTH_MAP[orig_qual]; | ||
755 | *rssi = _rssi; | ||
756 | } else { | ||
757 | orig_qual -= 0x80; | ||
758 | if ( !orig_qual ){ | ||
759 | _rssi = 1; | ||
760 | *rssi = 1; | ||
761 | } else { | ||
762 | _rssi = 0x32; | ||
763 | *rssi = 0x32; | ||
764 | } | ||
765 | } | ||
766 | break; | ||
767 | case RFCHIPID_MAXIM: | ||
768 | lsb = temp2 & 1; | ||
769 | temp2 &= 0x7e; | ||
770 | temp2 >>= 1; | ||
771 | temp2 += 0x42; | ||
772 | if( lsb != 0 ){ | ||
773 | temp2 += 0xa; | ||
774 | } | ||
775 | *rssi = temp2 & 0xff; | ||
776 | _rssi = temp2 & 0xff; | ||
777 | break; | ||
778 | } | ||
779 | |||
780 | if ( _rssi < 0x64 ){ | 689 | if ( _rssi < 0x64 ){ |
781 | if ( _rssi == 0 ) { | 690 | if ( _rssi == 0 ) { |
782 | *rssi = 1; | 691 | *rssi = 1; |
@@ -1421,11 +1330,9 @@ u16 N_DBPSOfRate(u16 DataRate) | |||
1421 | return N_DBPS; | 1330 | return N_DBPS; |
1422 | } | 1331 | } |
1423 | 1332 | ||
1424 | //{by amy 080312 | ||
1425 | // | 1333 | // |
1426 | // Description: | 1334 | // Description: |
1427 | // For Netgear case, they want good-looking singal strength. | 1335 | // For Netgear case, they want good-looking singal strength. |
1428 | // 2004.12.05, by rcnjko. | ||
1429 | // | 1336 | // |
1430 | long NetgearSignalStrengthTranslate(long LastSS, long CurrSS) | 1337 | long NetgearSignalStrengthTranslate(long LastSS, long CurrSS) |
1431 | { | 1338 | { |
@@ -1481,7 +1388,6 @@ long TranslateToDbm8185(u8 SignalStrengthIndex) | |||
1481 | // This is different with PerformSignalSmoothing8185 in smoothing fomula. | 1388 | // This is different with PerformSignalSmoothing8185 in smoothing fomula. |
1482 | // No dramatic adjustion is apply because dynamic mechanism need some degree | 1389 | // No dramatic adjustion is apply because dynamic mechanism need some degree |
1483 | // of correctness. Ported from 8187B. | 1390 | // of correctness. Ported from 8187B. |
1484 | // 2007-02-26, by Bruce. | ||
1485 | // | 1391 | // |
1486 | void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv, | 1392 | void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv, |
1487 | bool bCckRate) | 1393 | bool bCckRate) |
@@ -1502,7 +1408,6 @@ void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv, | |||
1502 | priv->CurCCKRSSI = 0; | 1408 | priv->CurCCKRSSI = 0; |
1503 | } | 1409 | } |
1504 | 1410 | ||
1505 | //by amy 080312} | ||
1506 | 1411 | ||
1507 | /* This is rough RX isr handling routine*/ | 1412 | /* This is rough RX isr handling routine*/ |
1508 | void rtl8180_rx(struct net_device *dev) | 1413 | void rtl8180_rx(struct net_device *dev) |
@@ -1638,7 +1543,7 @@ void rtl8180_rx(struct net_device *dev) | |||
1638 | } | 1543 | } |
1639 | 1544 | ||
1640 | signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); | 1545 | signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); |
1641 | signal=(signal&0xfe)>>1; // Modify by hikaru 6.6 | 1546 | signal = (signal & 0xfe) >> 1; |
1642 | 1547 | ||
1643 | quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff)); | 1548 | quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff)); |
1644 | 1549 | ||
@@ -1652,7 +1557,6 @@ void rtl8180_rx(struct net_device *dev) | |||
1652 | 1557 | ||
1653 | stats.rate = rtl8180_rate2rate(rate); | 1558 | stats.rate = rtl8180_rate2rate(rate); |
1654 | Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ; | 1559 | Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ; |
1655 | //by amy for antenna | ||
1656 | if(!rtl8180_IsWirelessBMode(stats.rate)) | 1560 | if(!rtl8180_IsWirelessBMode(stats.rate)) |
1657 | { // OFDM rate. | 1561 | { // OFDM rate. |
1658 | 1562 | ||
@@ -1691,11 +1595,10 @@ void rtl8180_rx(struct net_device *dev) | |||
1691 | RXAGC=(95-RXAGC)*100/65; | 1595 | RXAGC=(95-RXAGC)*100/65; |
1692 | } | 1596 | } |
1693 | priv->SignalStrength = (u8)RXAGC; | 1597 | priv->SignalStrength = (u8)RXAGC; |
1694 | priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin | 1598 | priv->RecvSignalPower = RxAGC_dBm; |
1695 | priv->RxPower = rxpower; | 1599 | priv->RxPower = rxpower; |
1696 | priv->RSSI = RSSI; | 1600 | priv->RSSI = RSSI; |
1697 | //{by amy 080312 | 1601 | /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */ |
1698 | // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko. | ||
1699 | if(quality >= 127) | 1602 | if(quality >= 127) |
1700 | quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now; | 1603 | quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now; |
1701 | else if(quality < 27) | 1604 | else if(quality < 27) |
@@ -1712,7 +1615,6 @@ void rtl8180_rx(struct net_device *dev) | |||
1712 | // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); | 1615 | // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); |
1713 | stats.rssi = priv->wstats.qual.qual = priv->SignalQuality; | 1616 | stats.rssi = priv->wstats.qual.qual = priv->SignalQuality; |
1714 | stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual; | 1617 | stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual; |
1715 | //by amy 080312} | ||
1716 | bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 ) | 1618 | bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 ) |
1717 | | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 ); | 1619 | | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 ); |
1718 | bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13; | 1620 | bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13; |
@@ -1725,11 +1627,12 @@ void rtl8180_rx(struct net_device *dev) | |||
1725 | (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) | 1627 | (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) |
1726 | && (!bHwError) && (!bCRC)&& (!bICV)) | 1628 | && (!bHwError) && (!bCRC)&& (!bICV)) |
1727 | { | 1629 | { |
1728 | //by amy 080312 | 1630 | /* Perform signal smoothing for dynamic |
1729 | // Perform signal smoothing for dynamic mechanism on demand. | 1631 | * mechanism on demand. This is different |
1730 | // This is different with PerformSignalSmoothing8185 in smoothing fomula. | 1632 | * with PerformSignalSmoothing8185 in smoothing |
1731 | // No dramatic adjustion is apply because dynamic mechanism need some degree | 1633 | * fomula. No dramatic adjustion is apply |
1732 | // of correctness. 2007.01.23, by shien chang. | 1634 | * because dynamic mechanism need some degree |
1635 | * of correctness. */ | ||
1733 | PerformUndecoratedSignalSmoothing8185(priv,bCckRate); | 1636 | PerformUndecoratedSignalSmoothing8185(priv,bCckRate); |
1734 | // | 1637 | // |
1735 | // For good-looking singal strength. | 1638 | // For good-looking singal strength. |
@@ -1749,12 +1652,9 @@ void rtl8180_rx(struct net_device *dev) | |||
1749 | 1652 | ||
1750 | // Figure out which antenna that received the lasted packet. | 1653 | // Figure out which antenna that received the lasted packet. |
1751 | priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main. | 1654 | priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main. |
1752 | //by amy 080312 | ||
1753 | SwAntennaDiversityRxOk8185(dev, priv->SignalStrength); | 1655 | SwAntennaDiversityRxOk8185(dev, priv->SignalStrength); |
1754 | } | 1656 | } |
1755 | 1657 | ||
1756 | //by amy for antenna | ||
1757 | #ifndef DUMMY_RX | ||
1758 | if(first){ | 1658 | if(first){ |
1759 | if(!priv->rx_skb_complete){ | 1659 | if(!priv->rx_skb_complete){ |
1760 | /* seems that HW sometimes fails to reiceve and | 1660 | /* seems that HW sometimes fails to reiceve and |
@@ -1810,19 +1710,12 @@ void rtl8180_rx(struct net_device *dev) | |||
1810 | if(last && !priv->rx_skb_complete){ | 1710 | if(last && !priv->rx_skb_complete){ |
1811 | if(priv->rx_skb->len > 4) | 1711 | if(priv->rx_skb->len > 4) |
1812 | skb_trim(priv->rx_skb,priv->rx_skb->len-4); | 1712 | skb_trim(priv->rx_skb,priv->rx_skb->len-4); |
1813 | #ifndef RX_DONT_PASS_UL | ||
1814 | if(!ieee80211_rtl_rx(priv->ieee80211, | 1713 | if(!ieee80211_rtl_rx(priv->ieee80211, |
1815 | priv->rx_skb, &stats)){ | 1714 | priv->rx_skb, &stats)) |
1816 | #endif // RX_DONT_PASS_UL | ||
1817 | |||
1818 | dev_kfree_skb_any(priv->rx_skb); | 1715 | dev_kfree_skb_any(priv->rx_skb); |
1819 | #ifndef RX_DONT_PASS_UL | ||
1820 | } | ||
1821 | #endif | ||
1822 | priv->rx_skb_complete=1; | 1716 | priv->rx_skb_complete=1; |
1823 | } | 1717 | } |
1824 | 1718 | ||
1825 | #endif //DUMMY_RX | ||
1826 | pci_dma_sync_single_for_device(priv->pdev, | 1719 | pci_dma_sync_single_for_device(priv->pdev, |
1827 | priv->rxbuffer->dma, | 1720 | priv->rxbuffer->dma, |
1828 | priv->rxbuffersize * \ | 1721 | priv->rxbuffersize * \ |
@@ -2056,7 +1949,7 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority, | |||
2056 | u16 RtsDur = 0; | 1949 | u16 RtsDur = 0; |
2057 | u16 ThisFrameTime = 0; | 1950 | u16 ThisFrameTime = 0; |
2058 | u16 TxDescDuration = 0; | 1951 | u16 TxDescDuration = 0; |
2059 | u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14 | 1952 | u8 ownbit_flag = false; |
2060 | 1953 | ||
2061 | switch(priority) { | 1954 | switch(priority) { |
2062 | case MANAGE_PRIORITY: | 1955 | case MANAGE_PRIORITY: |
@@ -2123,7 +2016,8 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority, | |||
2123 | //YJ,add,080828,for Keep alive | 2016 | //YJ,add,080828,for Keep alive |
2124 | priv->NumTxUnicast++; | 2017 | priv->NumTxUnicast++; |
2125 | 2018 | ||
2126 | // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko. | 2019 | /* Figure out ACK rate according to BSS basic rate |
2020 | * and Tx rate. */ | ||
2127 | AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send | 2021 | AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send |
2128 | 2022 | ||
2129 | if ( ((len + sCrcLng) > priv->rts) && priv->rts ) | 2023 | if ( ((len + sCrcLng) > priv->rts) && priv->rts ) |
@@ -2206,7 +2100,7 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority, | |||
2206 | *tail |= (1<<15); /* no encrypt */ | 2100 | *tail |= (1<<15); /* no encrypt */ |
2207 | 2101 | ||
2208 | if(remain==len && !descfrag) { | 2102 | if(remain==len && !descfrag) { |
2209 | ownbit_flag = false; //added by david woo,2007.12.14 | 2103 | ownbit_flag = false; |
2210 | *tail = *tail| (1<<29) ; //fist segment of the packet | 2104 | *tail = *tail| (1<<29) ; //fist segment of the packet |
2211 | *tail = *tail |(len); | 2105 | *tail = *tail |(len); |
2212 | } else { | 2106 | } else { |
@@ -2556,27 +2450,16 @@ void watch_dog_adaptive(unsigned long data) | |||
2556 | } | 2450 | } |
2557 | 2451 | ||
2558 | // Tx High Power Mechanism. | 2452 | // Tx High Power Mechanism. |
2559 | #ifdef HIGH_POWER | ||
2560 | if(CheckHighPower((struct net_device *)data)) | 2453 | if(CheckHighPower((struct net_device *)data)) |
2561 | { | ||
2562 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq); | 2454 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq); |
2563 | } | ||
2564 | #endif | ||
2565 | 2455 | ||
2566 | // Tx Power Tracking on 87SE. | 2456 | // Tx Power Tracking on 87SE. |
2567 | #ifdef TX_TRACK | 2457 | if (CheckTxPwrTracking((struct net_device *)data)) |
2568 | //if( priv->bTxPowerTrack ) //lzm mod 080826 | ||
2569 | if( CheckTxPwrTracking((struct net_device *)data)); | ||
2570 | TxPwrTracking87SE((struct net_device *)data); | 2458 | TxPwrTracking87SE((struct net_device *)data); |
2571 | #endif | ||
2572 | 2459 | ||
2573 | // Perform DIG immediately. | 2460 | // Perform DIG immediately. |
2574 | #ifdef SW_DIG | ||
2575 | if(CheckDig((struct net_device *)data) == true) | 2461 | if(CheckDig((struct net_device *)data) == true) |
2576 | { | ||
2577 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq); | 2462 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq); |
2578 | } | ||
2579 | #endif | ||
2580 | rtl8180_watch_dog((struct net_device *)data); | 2463 | rtl8180_watch_dog((struct net_device *)data); |
2581 | 2464 | ||
2582 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem); | 2465 | queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem); |
@@ -2675,6 +2558,36 @@ static void rtl8180_link_detect_init(plink_detect_t plink_detect) | |||
2675 | } | 2558 | } |
2676 | //YJ,add,080828,end | 2559 | //YJ,add,080828,end |
2677 | 2560 | ||
2561 | static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom) | ||
2562 | { | ||
2563 | struct net_device *dev = eeprom->data; | ||
2564 | u8 reg = read_nic_byte(dev, EPROM_CMD); | ||
2565 | |||
2566 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | ||
2567 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | ||
2568 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | ||
2569 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | ||
2570 | } | ||
2571 | |||
2572 | static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom) | ||
2573 | { | ||
2574 | struct net_device *dev = eeprom->data; | ||
2575 | u8 reg = 2 << 6; | ||
2576 | |||
2577 | if (eeprom->reg_data_in) | ||
2578 | reg |= RTL818X_EEPROM_CMD_WRITE; | ||
2579 | if (eeprom->reg_data_out) | ||
2580 | reg |= RTL818X_EEPROM_CMD_READ; | ||
2581 | if (eeprom->reg_data_clock) | ||
2582 | reg |= RTL818X_EEPROM_CMD_CK; | ||
2583 | if (eeprom->reg_chip_select) | ||
2584 | reg |= RTL818X_EEPROM_CMD_CS; | ||
2585 | |||
2586 | write_nic_byte(dev, EPROM_CMD, reg); | ||
2587 | read_nic_byte(dev, EPROM_CMD); | ||
2588 | udelay(10); | ||
2589 | } | ||
2590 | |||
2678 | short rtl8180_init(struct net_device *dev) | 2591 | short rtl8180_init(struct net_device *dev) |
2679 | { | 2592 | { |
2680 | struct r8180_priv *priv = ieee80211_priv(dev); | 2593 | struct r8180_priv *priv = ieee80211_priv(dev); |
@@ -2683,8 +2596,16 @@ short rtl8180_init(struct net_device *dev) | |||
2683 | u32 usValue; | 2596 | u32 usValue; |
2684 | u16 tmpu16; | 2597 | u16 tmpu16; |
2685 | int i, j; | 2598 | int i, j; |
2599 | struct eeprom_93cx6 eeprom; | ||
2600 | u16 eeprom_val; | ||
2601 | |||
2602 | eeprom.data = dev; | ||
2603 | eeprom.register_read = rtl8187se_eeprom_register_read; | ||
2604 | eeprom.register_write = rtl8187se_eeprom_register_write; | ||
2605 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | ||
2686 | 2606 | ||
2687 | priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF; | 2607 | eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val); |
2608 | priv->channel_plan = eeprom_val & 0xFF; | ||
2688 | if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){ | 2609 | if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){ |
2689 | printk("rtl8180_init:Error channel plan! Set to default.\n"); | 2610 | printk("rtl8180_init:Error channel plan! Set to default.\n"); |
2690 | priv->channel_plan = 0; | 2611 | priv->channel_plan = 0; |
@@ -2701,8 +2622,6 @@ short rtl8180_init(struct net_device *dev) | |||
2701 | priv->txbeaconcount = 2; | 2622 | priv->txbeaconcount = 2; |
2702 | priv->rx_skb_complete = 1; | 2623 | priv->rx_skb_complete = 1; |
2703 | 2624 | ||
2704 | priv->RegThreeWireMode = HW_THREE_WIRE_SI; | ||
2705 | |||
2706 | priv->RFChangeInProgress = false; | 2625 | priv->RFChangeInProgress = false; |
2707 | priv->SetRFPowerStateInProgress = false; | 2626 | priv->SetRFPowerStateInProgress = false; |
2708 | priv->RFProgType = 0; | 2627 | priv->RFProgType = 0; |
@@ -2747,10 +2666,8 @@ short rtl8180_init(struct net_device *dev) | |||
2747 | priv->TxPollingTimes = 0;//lzm add 080826 | 2666 | priv->TxPollingTimes = 0;//lzm add 080826 |
2748 | priv->bLeisurePs = true; | 2667 | priv->bLeisurePs = true; |
2749 | priv->dot11PowerSaveMode = eActive; | 2668 | priv->dot11PowerSaveMode = eActive; |
2750 | //by amy for antenna | ||
2751 | priv->AdMinCheckPeriod = 5; | 2669 | priv->AdMinCheckPeriod = 5; |
2752 | priv->AdMaxCheckPeriod = 10; | 2670 | priv->AdMaxCheckPeriod = 10; |
2753 | // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312 | ||
2754 | priv->AdMaxRxSsThreshold = 30;//60->30 | 2671 | priv->AdMaxRxSsThreshold = 30;//60->30 |
2755 | priv->AdRxSsThreshold = 20;//50->20 | 2672 | priv->AdRxSsThreshold = 20;//50->20 |
2756 | priv->AdCheckPeriod = priv->AdMinCheckPeriod; | 2673 | priv->AdCheckPeriod = priv->AdMinCheckPeriod; |
@@ -2765,8 +2682,6 @@ short rtl8180_init(struct net_device *dev) | |||
2765 | init_timer(&priv->SwAntennaDiversityTimer); | 2682 | init_timer(&priv->SwAntennaDiversityTimer); |
2766 | priv->SwAntennaDiversityTimer.data = (unsigned long)dev; | 2683 | priv->SwAntennaDiversityTimer.data = (unsigned long)dev; |
2767 | priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback; | 2684 | priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback; |
2768 | //by amy for antenna | ||
2769 | //{by amy 080312 | ||
2770 | priv->bDigMechanism = 1; | 2685 | priv->bDigMechanism = 1; |
2771 | priv->InitialGain = 6; | 2686 | priv->InitialGain = 6; |
2772 | priv->bXtalCalibration = false; | 2687 | priv->bXtalCalibration = false; |
@@ -2803,58 +2718,63 @@ short rtl8180_init(struct net_device *dev) | |||
2803 | priv->NumTxUnicast = 0; | 2718 | priv->NumTxUnicast = 0; |
2804 | priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL; | 2719 | priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL; |
2805 | priv->PowerProfile = POWER_PROFILE_AC; | 2720 | priv->PowerProfile = POWER_PROFILE_AC; |
2806 | priv->CurrRetryCnt=0; | 2721 | priv->CurrRetryCnt = 0; |
2807 | priv->LastRetryCnt=0; | 2722 | priv->LastRetryCnt = 0; |
2808 | priv->LastTxokCnt=0; | 2723 | priv->LastTxokCnt = 0; |
2809 | priv->LastRxokCnt=0; | 2724 | priv->LastRxokCnt = 0; |
2810 | priv->LastRetryRate=0; | 2725 | priv->LastRetryRate = 0; |
2811 | priv->bTryuping=0; | 2726 | priv->bTryuping = 0; |
2812 | priv->CurrTxRate=0; | 2727 | priv->CurrTxRate = 0; |
2813 | priv->CurrRetryRate=0; | 2728 | priv->CurrRetryRate = 0; |
2814 | priv->TryupingCount=0; | 2729 | priv->TryupingCount = 0; |
2815 | priv->TryupingCountNoData=0; | 2730 | priv->TryupingCountNoData = 0; |
2816 | priv->TryDownCountLowData=0; | 2731 | priv->TryDownCountLowData = 0; |
2817 | priv->LastTxOKBytes=0; | 2732 | priv->LastTxOKBytes = 0; |
2818 | priv->LastFailTxRate=0; | 2733 | priv->LastFailTxRate = 0; |
2819 | priv->LastFailTxRateSS=0; | 2734 | priv->LastFailTxRateSS = 0; |
2820 | priv->FailTxRateCount=0; | 2735 | priv->FailTxRateCount = 0; |
2821 | priv->LastTxThroughput=0; | 2736 | priv->LastTxThroughput = 0; |
2822 | priv->NumTxOkBytesTotal=0; | 2737 | priv->NumTxOkBytesTotal = 0; |
2823 | priv->ForcedDataRate = 0; | 2738 | priv->ForcedDataRate = 0; |
2824 | priv->RegBModeGainStage = 1; | 2739 | priv->RegBModeGainStage = 1; |
2825 | 2740 | ||
2826 | priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0; | 2741 | priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0; |
2827 | spin_lock_init(&priv->irq_lock); | 2742 | spin_lock_init(&priv->irq_lock); |
2828 | spin_lock_init(&priv->irq_th_lock); | 2743 | spin_lock_init(&priv->irq_th_lock); |
2829 | spin_lock_init(&priv->tx_lock); | 2744 | spin_lock_init(&priv->tx_lock); |
2830 | spin_lock_init(&priv->ps_lock); | 2745 | spin_lock_init(&priv->ps_lock); |
2831 | spin_lock_init(&priv->rf_ps_lock); | 2746 | spin_lock_init(&priv->rf_ps_lock); |
2832 | sema_init(&priv->wx_sem,1); | 2747 | sema_init(&priv->wx_sem, 1); |
2833 | sema_init(&priv->rf_state,1); | 2748 | sema_init(&priv->rf_state, 1); |
2834 | INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq); | 2749 | INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq); |
2835 | INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq); | 2750 | INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq); |
2836 | INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq); | 2751 | INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, |
2837 | INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq); | 2752 | (void *)rtl8180_hw_wakeup_wq); |
2838 | INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update); | 2753 | INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq, |
2839 | INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312 | 2754 | (void *)rtl8180_hw_sleep_wq); |
2840 | INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312 | 2755 | INIT_WORK(&priv->ieee80211->wmm_param_update_wq, |
2841 | INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312 | 2756 | (void *)rtl8180_wmm_param_update); |
2842 | 2757 | INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq, | |
2843 | INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack); | 2758 | (void *)rtl8180_rate_adapter); |
2844 | 2759 | INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq, | |
2760 | (void *)rtl8180_hw_dig_wq); | ||
2761 | INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq, | ||
2762 | (void *)rtl8180_tx_pw_wq); | ||
2763 | INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem, | ||
2764 | (void *) GPIOChangeRFWorkItemCallBack); | ||
2845 | tasklet_init(&priv->irq_rx_tasklet, | 2765 | tasklet_init(&priv->irq_rx_tasklet, |
2846 | (void(*)(unsigned long)) rtl8180_irq_rx_tasklet, | 2766 | (void(*)(unsigned long)) rtl8180_irq_rx_tasklet, |
2847 | (unsigned long)priv); | 2767 | (unsigned long)priv); |
2848 | 2768 | ||
2849 | init_timer(&priv->watch_dog_timer); | 2769 | init_timer(&priv->watch_dog_timer); |
2850 | priv->watch_dog_timer.data = (unsigned long)dev; | 2770 | priv->watch_dog_timer.data = (unsigned long)dev; |
2851 | priv->watch_dog_timer.function = watch_dog_adaptive; | 2771 | priv->watch_dog_timer.function = watch_dog_adaptive; |
2852 | 2772 | ||
2853 | init_timer(&priv->rateadapter_timer); | 2773 | init_timer(&priv->rateadapter_timer); |
2854 | priv->rateadapter_timer.data = (unsigned long)dev; | 2774 | priv->rateadapter_timer.data = (unsigned long)dev; |
2855 | priv->rateadapter_timer.function = timer_rate_adaptive; | 2775 | priv->rateadapter_timer.function = timer_rate_adaptive; |
2856 | priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD; | 2776 | priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD; |
2857 | priv->bEnhanceTxPwr=false; | 2777 | priv->bEnhanceTxPwr = false; |
2858 | 2778 | ||
2859 | priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit; | 2779 | priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit; |
2860 | priv->ieee80211->set_chan = rtl8180_set_chan; | 2780 | priv->ieee80211->set_chan = rtl8180_set_chan; |
@@ -2877,30 +2797,28 @@ short rtl8180_init(struct net_device *dev) | |||
2877 | 2797 | ||
2878 | priv->CSMethod = (0x01 << 29); | 2798 | priv->CSMethod = (0x01 << 29); |
2879 | 2799 | ||
2880 | priv->TransmitConfig = | 2800 | priv->TransmitConfig = TCR_DurProcMode_OFFSET | |
2881 | 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW | 2801 | (7<<TCR_MXDMA_OFFSET) | |
2882 | (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied. | 2802 | (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | |
2883 | (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit | 2803 | (priv->LongRetryLimit<<TCR_LRL_OFFSET) | |
2884 | (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit | 2804 | (0 ? TCR_SAT : 0); |
2885 | (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them | 2805 | |
2886 | 2806 | priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF | | |
2887 | priv->ReceiveConfig = | 2807 | RCR_AB | RCR_AM | RCR_APM | |
2888 | RCR_AMF | RCR_ADF | //accept management/data | 2808 | (7<<RCR_MXDMA_OFFSET) | |
2889 | RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko. | 2809 | (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | |
2890 | RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC | 2810 | (priv->EarlyRxThreshold == 7 ? |
2891 | (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited. | 2811 | RCR_ONLYERLPKT : 0); |
2892 | (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold. | ||
2893 | (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0); | ||
2894 | 2812 | ||
2895 | priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER | | 2813 | priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER | |
2896 | IMR_THPDER | IMR_THPDOK | | 2814 | IMR_THPDER | IMR_THPDOK | |
2897 | IMR_TVODER | IMR_TVODOK | | 2815 | IMR_TVODER | IMR_TVODOK | |
2898 | IMR_TVIDER | IMR_TVIDOK | | 2816 | IMR_TVIDER | IMR_TVIDOK | |
2899 | IMR_TBEDER | IMR_TBEDOK | | 2817 | IMR_TBEDER | IMR_TBEDOK | |
2900 | IMR_TBKDER | IMR_TBKDOK | | 2818 | IMR_TBKDER | IMR_TBKDOK | |
2901 | IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27. | 2819 | IMR_RDU | |
2902 | IMR_RER | IMR_ROK | | 2820 | IMR_RER | IMR_ROK | |
2903 | IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko. | 2821 | IMR_RQoSOK; |
2904 | 2822 | ||
2905 | priv->InitialGain = 6; | 2823 | priv->InitialGain = 6; |
2906 | 2824 | ||
@@ -2913,7 +2831,8 @@ short rtl8180_init(struct net_device *dev) | |||
2913 | // just for sync 85 | 2831 | // just for sync 85 |
2914 | priv->enable_gpio0 = 0; | 2832 | priv->enable_gpio0 = 0; |
2915 | 2833 | ||
2916 | usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET); | 2834 | eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val); |
2835 | usValue = eeprom_val; | ||
2917 | DMESG("usValue is 0x%x\n",usValue); | 2836 | DMESG("usValue is 0x%x\n",usValue); |
2918 | //3Read AntennaDiversity | 2837 | //3Read AntennaDiversity |
2919 | 2838 | ||
@@ -2953,54 +2872,46 @@ short rtl8180_init(struct net_device *dev) | |||
2953 | else | 2872 | else |
2954 | priv->epromtype=EPROM_93c46; | 2873 | priv->epromtype=EPROM_93c46; |
2955 | 2874 | ||
2956 | dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff; | 2875 | eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *) |
2957 | dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8; | 2876 | dev->dev_addr, 3); |
2958 | dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff; | ||
2959 | dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8; | ||
2960 | dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff; | ||
2961 | dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8; | ||
2962 | 2877 | ||
2963 | for(i=1,j=0; i<14; i+=2,j++){ | 2878 | for(i=1,j=0; i<14; i+=2,j++){ |
2964 | word = eprom_read(dev,EPROM_TXPW_CH1_2 + j); | 2879 | eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word); |
2965 | priv->chtxpwr[i]=word & 0xff; | 2880 | priv->chtxpwr[i]=word & 0xff; |
2966 | priv->chtxpwr[i+1]=(word & 0xff00)>>8; | 2881 | priv->chtxpwr[i+1]=(word & 0xff00)>>8; |
2967 | } | 2882 | } |
2968 | for (i = 1, j = 0; i < 14; i += 2, j++) { | 2883 | for (i = 1, j = 0; i < 14; i += 2, j++) { |
2969 | word = eprom_read(dev, EPROM_TXPW_OFDM_CH1_2 + j); | 2884 | eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word); |
2970 | priv->chtxpwr_ofdm[i] = word & 0xff; | 2885 | priv->chtxpwr_ofdm[i] = word & 0xff; |
2971 | priv->chtxpwr_ofdm[i+1] = (word & 0xff00)>>8; | 2886 | priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8; |
2972 | } | 2887 | } |
2973 | 2888 | ||
2974 | //3Read crystal calibtration and thermal meter indication on 87SE. | 2889 | /* 3Read crystal calibtration and thermal meter indication on 87SE. */ |
2975 | 2890 | eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16); | |
2976 | // By SD3 SY's request. Added by Roger, 2007.12.11. | ||
2977 | 2891 | ||
2978 | tmpu16 = eprom_read(dev, EEPROM_RSV>>1); | 2892 | /* Crystal calibration for Xin and Xout resp. */ |
2893 | priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; | ||
2894 | priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4; | ||
2895 | if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12) | ||
2896 | priv->bXtalCalibration = true; | ||
2979 | 2897 | ||
2980 | // Crystal calibration for Xin and Xout resp. | 2898 | /* Thermal meter reference indication. */ |
2981 | priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF | 2899 | priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8); |
2982 | priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF | 2900 | if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13) |
2983 | if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12) | 2901 | priv->bTxPowerTrack = true; |
2984 | priv->bXtalCalibration = true; | ||
2985 | 2902 | ||
2986 | // Thermal meter reference indication. | 2903 | eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word); |
2987 | priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8); | ||
2988 | if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13) | ||
2989 | priv->bTxPowerTrack = true; | ||
2990 | |||
2991 | word = eprom_read(dev,EPROM_TXPW_BASE); | ||
2992 | priv->cck_txpwr_base = word & 0xf; | 2904 | priv->cck_txpwr_base = word & 0xf; |
2993 | priv->ofdm_txpwr_base = (word>>4) & 0xf; | 2905 | priv->ofdm_txpwr_base = (word>>4) & 0xf; |
2994 | 2906 | ||
2995 | version = eprom_read(dev,EPROM_VERSION); | 2907 | eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version); |
2996 | DMESG("EEPROM version %x",version); | 2908 | DMESG("EEPROM version %x",version); |
2997 | priv->rcr_csense = 3; | 2909 | priv->rcr_csense = 3; |
2998 | 2910 | ||
2999 | priv->cs_treshold = (eprom_read(dev, ENERGY_TRESHOLD) & 0xff00) >> 8; | 2911 | eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val); |
3000 | 2912 | priv->cs_treshold = (eeprom_val & 0xff00) >> 8; | |
3001 | priv->rf_chip = 0xff & eprom_read(dev, RFCHIPID); | ||
3002 | 2913 | ||
3003 | priv->rf_chip = RF_ZEBRA4; | 2914 | eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val); |
3004 | priv->rf_sleep = rtl8225z4_rf_sleep; | 2915 | priv->rf_sleep = rtl8225z4_rf_sleep; |
3005 | priv->rf_wakeup = rtl8225z4_rf_wakeup; | 2916 | priv->rf_wakeup = rtl8225z4_rf_wakeup; |
3006 | DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!"); | 2917 | DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!"); |
@@ -3010,7 +2921,6 @@ short rtl8180_init(struct net_device *dev) | |||
3010 | priv->rf_set_chan = rtl8225z2_rf_set_chan; | 2921 | priv->rf_set_chan = rtl8225z2_rf_set_chan; |
3011 | priv->rf_set_sens = NULL; | 2922 | priv->rf_set_sens = NULL; |
3012 | 2923 | ||
3013 | |||
3014 | if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount)) | 2924 | if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount)) |
3015 | return -ENOMEM; | 2925 | return -ENOMEM; |
3016 | 2926 | ||
@@ -3042,11 +2952,7 @@ short rtl8180_init(struct net_device *dev) | |||
3042 | TX_BEACON_RING_ADDR)) | 2952 | TX_BEACON_RING_ADDR)) |
3043 | return -ENOMEM; | 2953 | return -ENOMEM; |
3044 | 2954 | ||
3045 | #if !defined(SA_SHIRQ) | ||
3046 | if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){ | 2955 | if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){ |
3047 | #else | ||
3048 | if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){ | ||
3049 | #endif | ||
3050 | DMESGE("Error allocating IRQ %d",dev->irq); | 2956 | DMESGE("Error allocating IRQ %d",dev->irq); |
3051 | return -1; | 2957 | return -1; |
3052 | }else{ | 2958 | }else{ |
@@ -3169,43 +3075,6 @@ void write_phy_cck (struct net_device *dev, u8 adr, u32 data) | |||
3169 | rtl8185_write_phy(dev, adr, data | 0x10000); | 3075 | rtl8185_write_phy(dev, adr, data | 0x10000); |
3170 | } | 3076 | } |
3171 | 3077 | ||
3172 | /* 70*3 = 210 ms | ||
3173 | * I hope this is enougth | ||
3174 | */ | ||
3175 | #define MAX_PHY 70 | ||
3176 | void write_phy(struct net_device *dev, u8 adr, u8 data) | ||
3177 | { | ||
3178 | u32 phy; | ||
3179 | int i; | ||
3180 | |||
3181 | phy = 0xff0000; | ||
3182 | phy |= adr; | ||
3183 | phy |= 0x80; /* this should enable writing */ | ||
3184 | phy |= (data<<8); | ||
3185 | |||
3186 | //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword | ||
3187 | write_nic_dword(dev,PHY_ADR, phy); | ||
3188 | |||
3189 | phy= 0xffff00; | ||
3190 | phy |= adr; | ||
3191 | |||
3192 | write_nic_dword(dev,PHY_ADR, phy); | ||
3193 | for(i=0;i<MAX_PHY;i++){ | ||
3194 | phy=read_nic_dword(dev,PHY_ADR); | ||
3195 | phy= phy & 0xff0000; | ||
3196 | phy= phy >> 16; | ||
3197 | if(phy == data){ //SUCCESS! | ||
3198 | force_pci_posting(dev); | ||
3199 | mdelay(3); //random value | ||
3200 | return; | ||
3201 | }else{ | ||
3202 | force_pci_posting(dev); | ||
3203 | mdelay(3); //random value | ||
3204 | } | ||
3205 | } | ||
3206 | DMESGW ("Phy writing %x %x failed!", adr,data); | ||
3207 | } | ||
3208 | |||
3209 | void rtl8185_set_rate(struct net_device *dev) | 3078 | void rtl8185_set_rate(struct net_device *dev) |
3210 | { | 3079 | { |
3211 | int i; | 3080 | int i; |
@@ -3335,7 +3204,6 @@ static struct net_device_stats *rtl8180_stats(struct net_device *dev) | |||
3335 | } | 3204 | } |
3336 | // | 3205 | // |
3337 | // Change current and default preamble mode. | 3206 | // Change current and default preamble mode. |
3338 | // 2005.01.06, by rcnjko. | ||
3339 | // | 3207 | // |
3340 | bool | 3208 | bool |
3341 | MgntActSet_802_11_PowerSaveMode( | 3209 | MgntActSet_802_11_PowerSaveMode( |
@@ -3454,7 +3322,6 @@ void rtl8180_watch_dog(struct net_device *dev) | |||
3454 | MgntLinkKeepAlive(priv); | 3322 | MgntLinkKeepAlive(priv); |
3455 | 3323 | ||
3456 | //YJ,add,080828,for LPS | 3324 | //YJ,add,080828,for LPS |
3457 | #ifdef ENABLE_LPS | ||
3458 | if (priv->PowerProfile == POWER_PROFILE_BATTERY) | 3325 | if (priv->PowerProfile == POWER_PROFILE_BATTERY) |
3459 | priv->bLeisurePs = true; | 3326 | priv->bLeisurePs = true; |
3460 | else if (priv->PowerProfile == POWER_PROFILE_AC) { | 3327 | else if (priv->PowerProfile == POWER_PROFILE_AC) { |
@@ -3464,7 +3331,6 @@ void rtl8180_watch_dog(struct net_device *dev) | |||
3464 | 3331 | ||
3465 | if(priv->ieee80211->state == IEEE80211_LINKED){ | 3332 | if(priv->ieee80211->state == IEEE80211_LINKED){ |
3466 | priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; | 3333 | priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; |
3467 | //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod); | ||
3468 | if( priv->link_detect.NumRxOkInPeriod> 666 || | 3334 | if( priv->link_detect.NumRxOkInPeriod> 666 || |
3469 | priv->link_detect.NumTxOkInPeriod> 666 ) { | 3335 | priv->link_detect.NumTxOkInPeriod> 666 ) { |
3470 | bBusyTraffic = true; | 3336 | bBusyTraffic = true; |
@@ -3481,7 +3347,6 @@ void rtl8180_watch_dog(struct net_device *dev) | |||
3481 | LeisurePSLeave(priv); | 3347 | LeisurePSLeave(priv); |
3482 | } else | 3348 | } else |
3483 | LeisurePSLeave(priv); | 3349 | LeisurePSLeave(priv); |
3484 | #endif | ||
3485 | priv->link_detect.bBusyTraffic = bBusyTraffic; | 3350 | priv->link_detect.bBusyTraffic = bBusyTraffic; |
3486 | priv->link_detect.NumRxOkInPeriod = 0; | 3351 | priv->link_detect.NumRxOkInPeriod = 0; |
3487 | priv->link_detect.NumTxOkInPeriod = 0; | 3352 | priv->link_detect.NumTxOkInPeriod = 0; |
@@ -3503,16 +3368,11 @@ int _rtl8180_up(struct net_device *dev) | |||
3503 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | 3368 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) |
3504 | IPSLeave(dev); | 3369 | IPSLeave(dev); |
3505 | } | 3370 | } |
3506 | #ifdef RATE_ADAPT | ||
3507 | timer_rate_adaptive((unsigned long)dev); | 3371 | timer_rate_adaptive((unsigned long)dev); |
3508 | #endif | ||
3509 | watch_dog_adaptive((unsigned long)dev); | 3372 | watch_dog_adaptive((unsigned long)dev); |
3510 | #ifdef SW_ANTE | ||
3511 | if(priv->bSwAntennaDiverity) | 3373 | if(priv->bSwAntennaDiverity) |
3512 | SwAntennaDiversityTimerCallback(dev); | 3374 | SwAntennaDiversityTimerCallback(dev); |
3513 | #endif | ||
3514 | ieee80211_softmac_start_protocol(priv->ieee80211); | 3375 | ieee80211_softmac_start_protocol(priv->ieee80211); |
3515 | |||
3516 | return 0; | 3376 | return 0; |
3517 | } | 3377 | } |
3518 | 3378 | ||
@@ -3748,7 +3608,7 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, | |||
3748 | dev->wireless_handlers = &r8180_wx_handlers_def; | 3608 | dev->wireless_handlers = &r8180_wx_handlers_def; |
3749 | 3609 | ||
3750 | dev->type=ARPHRD_ETHER; | 3610 | dev->type=ARPHRD_ETHER; |
3751 | dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13 | 3611 | dev->watchdog_timeo = HZ*3; |
3752 | 3612 | ||
3753 | if (dev_alloc_name(dev, ifname) < 0){ | 3613 | if (dev_alloc_name(dev, ifname) < 0){ |
3754 | DMESG("Oops: devname already taken! Trying wlan%%d...\n"); | 3614 | DMESG("Oops: devname already taken! Trying wlan%%d...\n"); |
@@ -3864,8 +3724,7 @@ static int __init rtl8180_pci_module_init(void) | |||
3864 | return ret; | 3724 | return ret; |
3865 | } | 3725 | } |
3866 | 3726 | ||
3867 | printk(KERN_INFO "\nLinux kernel driver for RTL8180 \ | 3727 | printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n"); |
3868 | / RTL8185 based WLAN cards\n"); | ||
3869 | printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n"); | 3728 | printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n"); |
3870 | DMESG("Initializing module"); | 3729 | DMESG("Initializing module"); |
3871 | DMESG("Wireless extensions version %d", WIRELESS_EXT); | 3730 | DMESG("Wireless extensions version %d", WIRELESS_EXT); |
@@ -4236,60 +4095,51 @@ void GPIOChangeRFWorkItemCallBack(struct work_struct *work) | |||
4236 | static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; | 4095 | static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; |
4237 | static int readf_count = 0; | 4096 | static int readf_count = 0; |
4238 | 4097 | ||
4239 | #ifdef ENABLE_LPS | ||
4240 | if(readf_count % 10 == 0) | 4098 | if(readf_count % 10 == 0) |
4241 | priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state"); | 4099 | priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state"); |
4242 | 4100 | ||
4243 | readf_count = (readf_count+1)%0xffff; | 4101 | readf_count = (readf_count+1)%0xffff; |
4244 | #endif | 4102 | /* We should turn off LED before polling FF51[4]. */ |
4245 | { | ||
4246 | // We should turn off LED before polling FF51[4]. | ||
4247 | 4103 | ||
4248 | //Turn off LED. | 4104 | /* Turn off LED. */ |
4249 | btPSR = read_nic_byte(dev, PSR); | 4105 | btPSR = read_nic_byte(dev, PSR); |
4250 | write_nic_byte(dev, PSR, (btPSR & ~BIT3)); | 4106 | write_nic_byte(dev, PSR, (btPSR & ~BIT3)); |
4251 | 4107 | ||
4252 | //It need to delay 4us suggested by Jong, 2008-01-16 | 4108 | /* It need to delay 4us suggested by Jong, 2008-01-16 */ |
4253 | udelay(4); | 4109 | udelay(4); |
4254 | 4110 | ||
4255 | //HW radio On/Off according to the value of FF51[4](config0) | 4111 | /* HW radio On/Off according to the value of FF51[4](config0) */ |
4256 | btConfig0 = btPSR = read_nic_byte(dev, CONFIG0); | 4112 | btConfig0 = btPSR = read_nic_byte(dev, CONFIG0); |
4257 | 4113 | ||
4258 | //Turn on LED. | 4114 | eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff; |
4259 | write_nic_byte(dev, PSR, btPSR| BIT3); | ||
4260 | 4115 | ||
4261 | eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff; | 4116 | /* Turn LED back on when radio enabled */ |
4117 | if (eRfPowerStateToSet == eRfOn) | ||
4118 | write_nic_byte(dev, PSR, btPSR | BIT3); | ||
4262 | 4119 | ||
4263 | if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)) | 4120 | if ((priv->ieee80211->bHwRadioOff == true) && |
4264 | { | 4121 | (eRfPowerStateToSet == eRfOn)) { |
4265 | priv->ieee80211->bHwRadioOff = false; | 4122 | priv->ieee80211->bHwRadioOff = false; |
4266 | bActuallySet = true; | 4123 | bActuallySet = true; |
4267 | } | 4124 | } else if ((priv->ieee80211->bHwRadioOff == false) && |
4268 | else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)) | 4125 | (eRfPowerStateToSet == eRfOff)) { |
4269 | { | 4126 | priv->ieee80211->bHwRadioOff = true; |
4270 | priv->ieee80211->bHwRadioOff = true; | 4127 | bActuallySet = true; |
4271 | bActuallySet = true; | 4128 | } |
4272 | } | ||
4273 | 4129 | ||
4274 | if(bActuallySet) | 4130 | if (bActuallySet) { |
4275 | { | 4131 | MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW); |
4276 | MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW); | 4132 | |
4277 | 4133 | /* To update the UI status for Power status changed */ | |
4278 | /* To update the UI status for Power status changed */ | 4134 | if (priv->ieee80211->bHwRadioOff == true) |
4279 | if(priv->ieee80211->bHwRadioOff == true) | 4135 | argv[1] = "RFOFF"; |
4280 | argv[1] = "RFOFF"; | 4136 | else |
4281 | else{ | 4137 | argv[1] = "RFON"; |
4282 | //if(!priv->RfOffReason) | 4138 | argv[0] = RadioPowerPath; |
4283 | argv[1] = "RFON"; | 4139 | argv[2] = NULL; |
4284 | //else | 4140 | |
4285 | // argv[1] = "RFOFF"; | 4141 | call_usermodehelper(RadioPowerPath, argv, envp, 1); |
4286 | } | 4142 | } |
4287 | argv[0] = RadioPowerPath; | ||
4288 | argv[2] = NULL; | ||
4289 | |||
4290 | call_usermodehelper(RadioPowerPath,argv,envp,1); | ||
4291 | } | ||
4292 | } | ||
4293 | } | 4143 | } |
4294 | 4144 | ||
4295 | static u8 read_acadapter_file(char *filename) | 4145 | static u8 read_acadapter_file(char *filename) |
diff --git a/drivers/staging/rtl8187se/r8180_dm.c b/drivers/staging/rtl8187se/r8180_dm.c index cbca58db85e1..fc4907839c58 100644 --- a/drivers/staging/rtl8187se/r8180_dm.c +++ b/drivers/staging/rtl8187se/r8180_dm.c | |||
@@ -282,30 +282,13 @@ DIG_Zebra( | |||
282 | // Dispatch DIG implementation according to RF. | 282 | // Dispatch DIG implementation according to RF. |
283 | // | 283 | // |
284 | void | 284 | void |
285 | DynamicInitGain( | 285 | DynamicInitGain(struct net_device *dev) |
286 | struct net_device *dev | ||
287 | ) | ||
288 | { | 286 | { |
289 | struct r8180_priv *priv = ieee80211_priv(dev); | 287 | DIG_Zebra(dev); |
290 | |||
291 | switch(priv->rf_chip) | ||
292 | { | ||
293 | case RF_ZEBRA2: // [AnnieWorkaround] For Zebra2, 2005-08-01. | ||
294 | case RF_ZEBRA4: | ||
295 | DIG_Zebra( dev ); | ||
296 | break; | ||
297 | |||
298 | default: | ||
299 | printk("DynamicInitGain(): unknown RFChipID(%d) !!!\n", priv->rf_chip); | ||
300 | break; | ||
301 | } | ||
302 | } | 288 | } |
303 | 289 | ||
304 | void rtl8180_hw_dig_wq (struct work_struct *work) | 290 | void rtl8180_hw_dig_wq (struct work_struct *work) |
305 | { | 291 | { |
306 | // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq); | ||
307 | // struct ieee80211_device * ieee = (struct ieee80211_device*) | ||
308 | // container_of(work, struct ieee80211_device, watch_dog_wq); | ||
309 | struct delayed_work *dwork = to_delayed_work(work); | 292 | struct delayed_work *dwork = to_delayed_work(work); |
310 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq); | 293 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq); |
311 | struct net_device *dev = ieee->dev; | 294 | struct net_device *dev = ieee->dev; |
@@ -1310,44 +1293,24 @@ SetAntenna8185( | |||
1310 | switch(u1bAntennaIndex) | 1293 | switch(u1bAntennaIndex) |
1311 | { | 1294 | { |
1312 | case 0: | 1295 | case 0: |
1313 | switch(priv->rf_chip) | 1296 | /* Mac register, main antenna */ |
1314 | { | 1297 | write_nic_byte(dev, ANTSEL, 0x03); |
1315 | case RF_ZEBRA2: | 1298 | /* base band */ |
1316 | case RF_ZEBRA4: | 1299 | write_phy_cck(dev, 0x11, 0x9b); /* Config CCK RX antenna. */ |
1317 | // Mac register, main antenna | 1300 | write_phy_ofdm(dev, 0x0d, 0x5c); /* Config OFDM RX antenna. */ |
1318 | write_nic_byte(dev, ANTSEL, 0x03); | ||
1319 | //base band | ||
1320 | write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna. | ||
1321 | write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna. | ||
1322 | |||
1323 | |||
1324 | bAntennaSwitched = true; | ||
1325 | break; | ||
1326 | 1301 | ||
1327 | default: | 1302 | bAntennaSwitched = true; |
1328 | printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip); | ||
1329 | break; | ||
1330 | } | ||
1331 | break; | 1303 | break; |
1332 | 1304 | ||
1333 | case 1: | 1305 | case 1: |
1334 | switch(priv->rf_chip) | 1306 | /* Mac register, aux antenna */ |
1335 | { | 1307 | write_nic_byte(dev, ANTSEL, 0x00); |
1336 | case RF_ZEBRA2: | 1308 | /* base band */ |
1337 | case RF_ZEBRA4: | 1309 | write_phy_cck(dev, 0x11, 0xbb); /* Config CCK RX antenna. */ |
1338 | // Mac register, aux antenna | 1310 | write_phy_ofdm(dev, 0x0d, 0x54); /* Config OFDM RX antenna. */ |
1339 | write_nic_byte(dev, ANTSEL, 0x00); | 1311 | |
1340 | //base band | 1312 | bAntennaSwitched = true; |
1341 | write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna. | ||
1342 | write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna. | ||
1343 | |||
1344 | bAntennaSwitched = true; | ||
1345 | break; | ||
1346 | 1313 | ||
1347 | default: | ||
1348 | printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip); | ||
1349 | break; | ||
1350 | } | ||
1351 | break; | 1314 | break; |
1352 | 1315 | ||
1353 | default: | 1316 | default: |
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c index afe10f0b75a8..6edf5a46fa40 100644 --- a/drivers/staging/rtl8187se/r8180_rtl8225z2.c +++ b/drivers/staging/rtl8187se/r8180_rtl8225z2.c | |||
@@ -854,134 +854,48 @@ bool SetZebraRFPowerState8185(struct net_device *dev, | |||
854 | btConfig3 = read_nic_byte(dev, CONFIG3); | 854 | btConfig3 = read_nic_byte(dev, CONFIG3); |
855 | write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En)); | 855 | write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En)); |
856 | 856 | ||
857 | switch (priv->rf_chip) { | 857 | switch (eRFPowerState) { |
858 | case RF_ZEBRA2: | 858 | case eRfOn: |
859 | switch (eRFPowerState) { | 859 | write_nic_word(dev, 0x37C, 0x00EC); |
860 | case eRfOn: | ||
861 | RF_WriteReg(dev,0x4,0x9FF); | ||
862 | 860 | ||
863 | write_nic_dword(dev, ANAPARAM, ANAPARM_ON); | 861 | /* turn on AFE */ |
864 | write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON); | 862 | write_nic_byte(dev, 0x54, 0x00); |
863 | write_nic_byte(dev, 0x62, 0x00); | ||
865 | 864 | ||
866 | write_nic_byte(dev, CONFIG4, priv->RFProgType); | 865 | /* turn on RF */ |
866 | RF_WriteReg(dev, 0x0, 0x009f); udelay(500); | ||
867 | RF_WriteReg(dev, 0x4, 0x0972); udelay(500); | ||
867 | 868 | ||
868 | /* turn on CCK and OFDM */ | 869 | /* turn on RF again */ |
869 | u1bTmp = read_nic_byte(dev, 0x24E); | 870 | RF_WriteReg(dev, 0x0, 0x009f); udelay(500); |
870 | write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6)))); | 871 | RF_WriteReg(dev, 0x4, 0x0972); udelay(500); |
871 | break; | ||
872 | case eRfSleep: | ||
873 | break; | ||
874 | case eRfOff: | ||
875 | break; | ||
876 | default: | ||
877 | bResult = false; | ||
878 | break; | ||
879 | } | ||
880 | break; | ||
881 | case RF_ZEBRA4: | ||
882 | switch (eRFPowerState) { | ||
883 | case eRfOn: | ||
884 | write_nic_word(dev, 0x37C, 0x00EC); | ||
885 | |||
886 | /* turn on AFE */ | ||
887 | write_nic_byte(dev, 0x54, 0x00); | ||
888 | write_nic_byte(dev, 0x62, 0x00); | ||
889 | |||
890 | /* turn on RF */ | ||
891 | RF_WriteReg(dev, 0x0, 0x009f); udelay(500); | ||
892 | RF_WriteReg(dev, 0x4, 0x0972); udelay(500); | ||
893 | |||
894 | /* turn on RF again */ | ||
895 | RF_WriteReg(dev, 0x0, 0x009f); udelay(500); | ||
896 | RF_WriteReg(dev, 0x4, 0x0972); udelay(500); | ||
897 | 872 | ||
898 | /* turn on BB */ | 873 | /* turn on BB */ |
899 | write_phy_ofdm(dev,0x10,0x40); | 874 | write_phy_ofdm(dev, 0x10, 0x40); |
900 | write_phy_ofdm(dev,0x12,0x40); | 875 | write_phy_ofdm(dev, 0x12, 0x40); |
901 | |||
902 | /* Avoid power down at init time. */ | ||
903 | write_nic_byte(dev, CONFIG4, priv->RFProgType); | ||
904 | |||
905 | u1bTmp = read_nic_byte(dev, 0x24E); | ||
906 | write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6)))); | ||
907 | break; | ||
908 | case eRfSleep: | ||
909 | for (QueueID = 0, i = 0; QueueID < 6;) { | ||
910 | if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { | ||
911 | QueueID++; | ||
912 | continue; | ||
913 | } else { | ||
914 | priv->TxPollingTimes ++; | ||
915 | if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) { | ||
916 | bActionAllowed = false; | ||
917 | break; | ||
918 | } else | ||
919 | udelay(10); | ||
920 | } | ||
921 | } | ||
922 | 876 | ||
923 | if (bActionAllowed) { | 877 | /* Avoid power down at init time. */ |
924 | /* turn off BB RXIQ matrix to cut off rx signal */ | 878 | write_nic_byte(dev, CONFIG4, priv->RFProgType); |
925 | write_phy_ofdm(dev, 0x10, 0x00); | ||
926 | write_phy_ofdm(dev, 0x12, 0x00); | ||
927 | |||
928 | /* turn off RF */ | ||
929 | RF_WriteReg(dev, 0x4, 0x0000); | ||
930 | RF_WriteReg(dev, 0x0, 0x0000); | ||
931 | |||
932 | /* turn off AFE except PLL */ | ||
933 | write_nic_byte(dev, 0x62, 0xff); | ||
934 | write_nic_byte(dev, 0x54, 0xec); | ||
935 | |||
936 | mdelay(1); | ||
937 | |||
938 | { | ||
939 | int i = 0; | ||
940 | while (true) { | ||
941 | u8 tmp24F = read_nic_byte(dev, 0x24f); | ||
942 | |||
943 | if ((tmp24F == 0x01) || (tmp24F == 0x09)) { | ||
944 | bTurnOffBB = true; | ||
945 | break; | ||
946 | } else { | ||
947 | udelay(10); | ||
948 | i++; | ||
949 | priv->TxPollingTimes++; | ||
950 | |||
951 | if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) { | ||
952 | bTurnOffBB = false; | ||
953 | break; | ||
954 | } else | ||
955 | udelay(10); | ||
956 | } | ||
957 | } | ||
958 | } | ||
959 | |||
960 | if (bTurnOffBB) { | ||
961 | /* turn off BB */ | ||
962 | u1bTmp = read_nic_byte(dev, 0x24E); | ||
963 | write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); | ||
964 | |||
965 | /* turn off AFE PLL */ | ||
966 | write_nic_byte(dev, 0x54, 0xFC); | ||
967 | write_nic_word(dev, 0x37C, 0x00FC); | ||
968 | } | ||
969 | } | ||
970 | break; | ||
971 | case eRfOff: | ||
972 | for (QueueID = 0, i = 0; QueueID < 6;) { | ||
973 | if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { | ||
974 | QueueID++; | ||
975 | continue; | ||
976 | } else { | ||
977 | udelay(10); | ||
978 | i++; | ||
979 | } | ||
980 | 879 | ||
981 | if (i >= MAX_DOZE_WAITING_TIMES_85B) | 880 | u1bTmp = read_nic_byte(dev, 0x24E); |
881 | write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6)))); | ||
882 | break; | ||
883 | case eRfSleep: | ||
884 | for (QueueID = 0, i = 0; QueueID < 6;) { | ||
885 | if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { | ||
886 | QueueID++; | ||
887 | continue; | ||
888 | } else { | ||
889 | priv->TxPollingTimes++; | ||
890 | if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) { | ||
891 | bActionAllowed = false; | ||
982 | break; | 892 | break; |
893 | } else | ||
894 | udelay(10); | ||
983 | } | 895 | } |
896 | } | ||
984 | 897 | ||
898 | if (bActionAllowed) { | ||
985 | /* turn off BB RXIQ matrix to cut off rx signal */ | 899 | /* turn off BB RXIQ matrix to cut off rx signal */ |
986 | write_phy_ofdm(dev, 0x10, 0x00); | 900 | write_phy_ofdm(dev, 0x10, 0x00); |
987 | write_phy_ofdm(dev, 0x12, 0x00); | 901 | write_phy_ofdm(dev, 0x12, 0x00); |
@@ -998,22 +912,23 @@ bool SetZebraRFPowerState8185(struct net_device *dev, | |||
998 | 912 | ||
999 | { | 913 | { |
1000 | int i = 0; | 914 | int i = 0; |
1001 | 915 | while (true) { | |
1002 | while (true) | ||
1003 | { | ||
1004 | u8 tmp24F = read_nic_byte(dev, 0x24f); | 916 | u8 tmp24F = read_nic_byte(dev, 0x24f); |
1005 | 917 | ||
1006 | if ((tmp24F == 0x01) || (tmp24F == 0x09)) { | 918 | if ((tmp24F == 0x01) || (tmp24F == 0x09)) { |
1007 | bTurnOffBB = true; | 919 | bTurnOffBB = true; |
1008 | break; | 920 | break; |
1009 | } else { | 921 | } else { |
1010 | bTurnOffBB = false; | ||
1011 | udelay(10); | 922 | udelay(10); |
1012 | i++; | 923 | i++; |
1013 | } | 924 | priv->TxPollingTimes++; |
1014 | 925 | ||
1015 | if (i > MAX_POLLING_24F_TIMES_87SE) | 926 | if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) { |
1016 | break; | 927 | bTurnOffBB = false; |
928 | break; | ||
929 | } else | ||
930 | udelay(10); | ||
931 | } | ||
1017 | } | 932 | } |
1018 | } | 933 | } |
1019 | 934 | ||
@@ -1022,15 +937,68 @@ bool SetZebraRFPowerState8185(struct net_device *dev, | |||
1022 | u1bTmp = read_nic_byte(dev, 0x24E); | 937 | u1bTmp = read_nic_byte(dev, 0x24E); |
1023 | write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); | 938 | write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); |
1024 | 939 | ||
1025 | /* turn off AFE PLL (80M) */ | 940 | /* turn off AFE PLL */ |
1026 | write_nic_byte(dev, 0x54, 0xFC); | 941 | write_nic_byte(dev, 0x54, 0xFC); |
1027 | write_nic_word(dev, 0x37C, 0x00FC); | 942 | write_nic_word(dev, 0x37C, 0x00FC); |
1028 | } | 943 | } |
1029 | break; | 944 | } |
1030 | default: | 945 | break; |
1031 | bResult = false; | 946 | case eRfOff: |
1032 | printk("SetZebraRFPowerState8185(): unknown state to set: 0x%X!!!\n", eRFPowerState); | 947 | for (QueueID = 0, i = 0; QueueID < 6;) { |
1033 | break; | 948 | if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { |
949 | QueueID++; | ||
950 | continue; | ||
951 | } else { | ||
952 | udelay(10); | ||
953 | i++; | ||
954 | } | ||
955 | |||
956 | if (i >= MAX_DOZE_WAITING_TIMES_85B) | ||
957 | break; | ||
958 | } | ||
959 | |||
960 | /* turn off BB RXIQ matrix to cut off rx signal */ | ||
961 | write_phy_ofdm(dev, 0x10, 0x00); | ||
962 | write_phy_ofdm(dev, 0x12, 0x00); | ||
963 | |||
964 | /* turn off RF */ | ||
965 | RF_WriteReg(dev, 0x4, 0x0000); | ||
966 | RF_WriteReg(dev, 0x0, 0x0000); | ||
967 | |||
968 | /* turn off AFE except PLL */ | ||
969 | write_nic_byte(dev, 0x62, 0xff); | ||
970 | write_nic_byte(dev, 0x54, 0xec); | ||
971 | |||
972 | mdelay(1); | ||
973 | |||
974 | { | ||
975 | int i = 0; | ||
976 | |||
977 | while (true) { | ||
978 | u8 tmp24F = read_nic_byte(dev, 0x24f); | ||
979 | |||
980 | if ((tmp24F == 0x01) || (tmp24F == 0x09)) { | ||
981 | bTurnOffBB = true; | ||
982 | break; | ||
983 | } else { | ||
984 | bTurnOffBB = false; | ||
985 | udelay(10); | ||
986 | i++; | ||
987 | } | ||
988 | |||
989 | if (i > MAX_POLLING_24F_TIMES_87SE) | ||
990 | break; | ||
991 | } | ||
992 | } | ||
993 | |||
994 | if (bTurnOffBB) { | ||
995 | /* turn off BB */ | ||
996 | u1bTmp = read_nic_byte(dev, 0x24E); | ||
997 | write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); | ||
998 | |||
999 | /* turn off AFE PLL (80M) */ | ||
1000 | write_nic_byte(dev, 0x54, 0xFC); | ||
1001 | write_nic_word(dev, 0x37C, 0x00FC); | ||
1034 | } | 1002 | } |
1035 | break; | 1003 | break; |
1036 | } | 1004 | } |
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c index 50309f2da9c1..a0ece1fd64a5 100644 --- a/drivers/staging/rtl8187se/r8185b_init.c +++ b/drivers/staging/rtl8187se/r8185b_init.c | |||
@@ -238,100 +238,12 @@ PlatformIORead4Byte( | |||
238 | return data; | 238 | return data; |
239 | } | 239 | } |
240 | 240 | ||
241 | void | 241 | void SetOutputEnableOfRfPins(struct net_device *dev) |
242 | SetOutputEnableOfRfPins( | ||
243 | struct net_device *dev | ||
244 | ) | ||
245 | { | 242 | { |
246 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 243 | write_nic_word(dev, RFPinsEnable, 0x1bff); |
247 | |||
248 | switch(priv->rf_chip) | ||
249 | { | ||
250 | case RFCHIPID_RTL8225: | ||
251 | case RF_ZEBRA2: | ||
252 | case RF_ZEBRA4: | ||
253 | write_nic_word(dev, RFPinsEnable, 0x1bff); | ||
254 | //write_nic_word(dev, RFPinsEnable, 0x1fff); | ||
255 | break; | ||
256 | } | ||
257 | } | 244 | } |
258 | 245 | ||
259 | void | 246 | static int |
260 | ZEBRA_RFSerialWrite( | ||
261 | struct net_device *dev, | ||
262 | u32 data2Write, | ||
263 | u8 totalLength, | ||
264 | u8 low2high | ||
265 | ) | ||
266 | { | ||
267 | ThreeWireReg twreg; | ||
268 | int i; | ||
269 | u16 oval,oval2,oval3; | ||
270 | u32 mask; | ||
271 | u16 UshortBuffer; | ||
272 | |||
273 | u8 u1bTmp; | ||
274 | // RTL8187S HSSI Read/Write Function | ||
275 | u1bTmp = read_nic_byte(dev, RF_SW_CONFIG); | ||
276 | u1bTmp |= RF_SW_CFG_SI; //reg08[1]=1 Serial Interface(SI) | ||
277 | write_nic_byte(dev, RF_SW_CONFIG, u1bTmp); | ||
278 | UshortBuffer = read_nic_word(dev, RFPinsOutput); | ||
279 | oval = UshortBuffer & 0xfff8; // We shall clear bit0, 1, 2 first, 2005.10.28, by rcnjko. | ||
280 | |||
281 | oval2 = read_nic_word(dev, RFPinsEnable); | ||
282 | oval3 = read_nic_word(dev, RFPinsSelect); | ||
283 | |||
284 | // <RJ_NOTE> 3-wire should be controled by HW when we finish SW 3-wire programming. 2005.08.10, by rcnjko. | ||
285 | oval3 &= 0xfff8; | ||
286 | |||
287 | write_nic_word(dev, RFPinsEnable, (oval2|0x0007)); // Set To Output Enable | ||
288 | write_nic_word(dev, RFPinsSelect, (oval3|0x0007)); // Set To SW Switch | ||
289 | udelay(10); | ||
290 | |||
291 | // Add this to avoid hardware and software 3-wire conflict. | ||
292 | // 2005.03.01, by rcnjko. | ||
293 | twreg.longData = 0; | ||
294 | twreg.struc.enableB = 1; | ||
295 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); // Set SI_EN (RFLE) | ||
296 | udelay(2); | ||
297 | twreg.struc.enableB = 0; | ||
298 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); // Clear SI_EN (RFLE) | ||
299 | udelay(10); | ||
300 | |||
301 | mask = (low2high)?0x01:((u32)0x01<<(totalLength-1)); | ||
302 | |||
303 | for(i=0; i<totalLength/2; i++) | ||
304 | { | ||
305 | twreg.struc.data = ((data2Write&mask)!=0) ? 1 : 0; | ||
306 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
307 | twreg.struc.clk = 1; | ||
308 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
309 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
310 | |||
311 | mask = (low2high)?(mask<<1):(mask>>1); | ||
312 | twreg.struc.data = ((data2Write&mask)!=0) ? 1 : 0; | ||
313 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
314 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
315 | twreg.struc.clk = 0; | ||
316 | write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); | ||
317 | mask = (low2high)?(mask<<1):(mask>>1); | ||
318 | } | ||
319 | |||
320 | twreg.struc.enableB = 1; | ||
321 | twreg.struc.clk = 0; | ||
322 | twreg.struc.data = 0; | ||
323 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); | ||
324 | udelay(10); | ||
325 | |||
326 | write_nic_word(dev, RFPinsOutput, oval|0x0004); | ||
327 | write_nic_word(dev, RFPinsSelect, oval3|0x0000); | ||
328 | |||
329 | SetOutputEnableOfRfPins(dev); | ||
330 | } | ||
331 | //by amy | ||
332 | |||
333 | |||
334 | int | ||
335 | HwHSSIThreeWire( | 247 | HwHSSIThreeWire( |
336 | struct net_device *dev, | 248 | struct net_device *dev, |
337 | u8 *pDataBuf, | 249 | u8 *pDataBuf, |
@@ -469,420 +381,30 @@ HwHSSIThreeWire( | |||
469 | 381 | ||
470 | return bResult; | 382 | return bResult; |
471 | } | 383 | } |
472 | //by amy | ||
473 | |||
474 | int | ||
475 | HwThreeWire( | ||
476 | struct net_device *dev, | ||
477 | u8 *pDataBuf, | ||
478 | u8 nDataBufBitCnt, | ||
479 | int bHold, | ||
480 | int bWrite | ||
481 | ) | ||
482 | { | ||
483 | int bResult = 1; | ||
484 | u8 TryCnt; | ||
485 | u8 u1bTmp; | ||
486 | |||
487 | do | ||
488 | { | ||
489 | // Check if WE and RE are cleared. | ||
490 | for(TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) | ||
491 | { | ||
492 | u1bTmp = read_nic_byte(dev, SW_3W_CMD1); | ||
493 | if( (u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0 ) | ||
494 | { | ||
495 | break; | ||
496 | } | ||
497 | udelay(10); | ||
498 | } | ||
499 | if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) | ||
500 | panic("HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n", u1bTmp); | ||
501 | |||
502 | // Fill up data buffer for write operation. | ||
503 | if(nDataBufBitCnt == 16) | ||
504 | { | ||
505 | write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf)); | ||
506 | } | ||
507 | else if(nDataBufBitCnt == 64) | ||
508 | { | ||
509 | write_nic_dword(dev, SW_3W_DB0, *((u32 *)pDataBuf)); | ||
510 | write_nic_dword(dev, SW_3W_DB1, *((u32 *)(pDataBuf + 4))); | ||
511 | } | ||
512 | else | ||
513 | { | ||
514 | int idx; | ||
515 | int ByteCnt = nDataBufBitCnt / 8; | ||
516 | |||
517 | if ((nDataBufBitCnt % 8) != 0) | ||
518 | panic("HwThreeWire(): nDataBufBitCnt(%d) should be multiple of 8!!!\n", | ||
519 | nDataBufBitCnt); | ||
520 | |||
521 | if (nDataBufBitCnt > 64) | ||
522 | panic("HwThreeWire(): nDataBufBitCnt(%d) should <= 64!!!\n", | ||
523 | nDataBufBitCnt); | ||
524 | |||
525 | for(idx = 0; idx < ByteCnt; idx++) | ||
526 | { | ||
527 | write_nic_byte(dev, (SW_3W_DB0+idx), *(pDataBuf+idx)); | ||
528 | } | ||
529 | } | ||
530 | |||
531 | // Fill up length field. | ||
532 | u1bTmp = (u8)(nDataBufBitCnt - 1); // Number of bits - 1. | ||
533 | if(bHold) | ||
534 | u1bTmp |= SW_3W_CMD0_HOLD; | ||
535 | write_nic_byte(dev, SW_3W_CMD0, u1bTmp); | ||
536 | |||
537 | // Set up command: WE or RE. | ||
538 | if(bWrite) | ||
539 | { | ||
540 | write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE); | ||
541 | } | ||
542 | else | ||
543 | { | ||
544 | write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE); | ||
545 | } | ||
546 | |||
547 | // Check if WE and RE are cleared and DONE is set. | ||
548 | for(TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) | ||
549 | { | ||
550 | u1bTmp = read_nic_byte(dev, SW_3W_CMD1); | ||
551 | if( (u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0 && | ||
552 | (u1bTmp & SW_3W_CMD1_DONE) != 0 ) | ||
553 | { | ||
554 | break; | ||
555 | } | ||
556 | udelay(10); | ||
557 | } | ||
558 | if(TryCnt == TC_3W_POLL_MAX_TRY_CNT) | ||
559 | { | ||
560 | //RT_ASSERT(TryCnt != TC_3W_POLL_MAX_TRY_CNT, | ||
561 | // ("HwThreeWire(): CmdReg: %#X RE|WE bits are not clear or DONE is not set!!\n", u1bTmp)); | ||
562 | // Workaround suggested by wcchu: clear WE here. 2006.07.07, by rcnjko. | ||
563 | write_nic_byte(dev, SW_3W_CMD1, 0); | ||
564 | } | ||
565 | |||
566 | // Read back data for read operation. | ||
567 | // <RJ_TODO> I am not sure if this is correct output format of a read operation. | ||
568 | if(bWrite == 0) | ||
569 | { | ||
570 | if(nDataBufBitCnt == 16) | ||
571 | { | ||
572 | *((u16 *)pDataBuf) = read_nic_word(dev, SW_3W_DB0); | ||
573 | } | ||
574 | else if(nDataBufBitCnt == 64) | ||
575 | { | ||
576 | *((u32 *)pDataBuf) = read_nic_dword(dev, SW_3W_DB0); | ||
577 | *((u32 *)(pDataBuf + 4)) = read_nic_dword(dev, SW_3W_DB1); | ||
578 | } | ||
579 | else | ||
580 | { | ||
581 | int idx; | ||
582 | int ByteCnt = nDataBufBitCnt / 8; | ||
583 | |||
584 | if ((nDataBufBitCnt % 8) != 0) | ||
585 | panic("HwThreeWire(): nDataBufBitCnt(%d) should be multiple of 8!!!\n", | ||
586 | nDataBufBitCnt); | ||
587 | |||
588 | if (nDataBufBitCnt > 64) | ||
589 | panic("HwThreeWire(): nDataBufBitCnt(%d) should <= 64!!!\n", | ||
590 | nDataBufBitCnt); | ||
591 | |||
592 | for(idx = 0; idx < ByteCnt; idx++) | ||
593 | { | ||
594 | *(pDataBuf+idx) = read_nic_byte(dev, (SW_3W_DB0+idx)); | ||
595 | } | ||
596 | } | ||
597 | } | ||
598 | |||
599 | }while(0); | ||
600 | |||
601 | return bResult; | ||
602 | } | ||
603 | |||
604 | 384 | ||
605 | void | 385 | void |
606 | RF_WriteReg( | 386 | RF_WriteReg(struct net_device *dev, u8 offset, u32 data) |
607 | struct net_device *dev, | ||
608 | u8 offset, | ||
609 | u32 data | ||
610 | ) | ||
611 | { | 387 | { |
612 | //RFReg reg; | 388 | u32 data2Write; |
613 | u32 data2Write; | 389 | u8 len; |
614 | u8 len; | ||
615 | u8 low2high; | ||
616 | //u32 RF_Read = 0; | ||
617 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | ||
618 | |||
619 | |||
620 | switch(priv->rf_chip) | ||
621 | { | ||
622 | case RFCHIPID_RTL8225: | ||
623 | case RF_ZEBRA2: // Annie 2006-05-12. | ||
624 | case RF_ZEBRA4: //by amy | ||
625 | switch(priv->RegThreeWireMode) | ||
626 | { | ||
627 | case SW_THREE_WIRE: | ||
628 | { // Perform SW 3-wire programming by driver. | ||
629 | data2Write = (data << 4) | (u32)(offset & 0x0f); | ||
630 | len = 16; | ||
631 | low2high = 0; | ||
632 | ZEBRA_RFSerialWrite(dev, data2Write, len, low2high); | ||
633 | } | ||
634 | break; | ||
635 | 390 | ||
636 | case HW_THREE_WIRE: | 391 | /* Pure HW 3-wire. */ |
637 | { // Pure HW 3-wire. | 392 | data2Write = (data << 4) | (u32)(offset & 0x0f); |
638 | data2Write = (data << 4) | (u32)(offset & 0x0f); | 393 | len = 16; |
639 | len = 16; | ||
640 | HwThreeWire( | ||
641 | dev, | ||
642 | (u8 *)(&data2Write), // pDataBuf, | ||
643 | len, // nDataBufBitCnt, | ||
644 | 0, // bHold, | ||
645 | 1); // bWrite | ||
646 | } | ||
647 | break; | ||
648 | case HW_THREE_WIRE_PI: //Parallel Interface | ||
649 | { // Pure HW 3-wire. | ||
650 | data2Write = (data << 4) | (u32)(offset & 0x0f); | ||
651 | len = 16; | ||
652 | HwHSSIThreeWire( | ||
653 | dev, | ||
654 | (u8*)(&data2Write), // pDataBuf, | ||
655 | len, // nDataBufBitCnt, | ||
656 | 0, // bSI | ||
657 | 1); // bWrite | ||
658 | |||
659 | //printk("33333\n"); | ||
660 | } | ||
661 | break; | ||
662 | |||
663 | case HW_THREE_WIRE_SI: //Serial Interface | ||
664 | { // Pure HW 3-wire. | ||
665 | data2Write = (data << 4) | (u32)(offset & 0x0f); | ||
666 | len = 16; | ||
667 | // printk(" enter ZEBRA_RFSerialWrite\n "); | ||
668 | // low2high = 0; | ||
669 | // ZEBRA_RFSerialWrite(dev, data2Write, len, low2high); | ||
670 | |||
671 | HwHSSIThreeWire( | ||
672 | dev, | ||
673 | (u8*)(&data2Write), // pDataBuf, | ||
674 | len, // nDataBufBitCnt, | ||
675 | 1, // bSI | ||
676 | 1); // bWrite | ||
677 | |||
678 | // printk(" exit ZEBRA_RFSerialWrite\n "); | ||
679 | } | ||
680 | break; | ||
681 | |||
682 | |||
683 | default: | ||
684 | DMESGE("RF_WriteReg(): invalid RegThreeWireMode(%d) !!!", priv->RegThreeWireMode); | ||
685 | break; | ||
686 | } | ||
687 | break; | ||
688 | |||
689 | default: | ||
690 | DMESGE("RF_WriteReg(): unknown RFChipID: %#X", priv->rf_chip); | ||
691 | break; | ||
692 | } | ||
693 | } | ||
694 | |||
695 | |||
696 | void | ||
697 | ZEBRA_RFSerialRead( | ||
698 | struct net_device *dev, | ||
699 | u32 data2Write, | ||
700 | u8 wLength, | ||
701 | u32 *data2Read, | ||
702 | u8 rLength, | ||
703 | u8 low2high | ||
704 | ) | ||
705 | { | ||
706 | ThreeWireReg twreg; | ||
707 | int i; | ||
708 | u16 oval,oval2,oval3,tmp, wReg80; | ||
709 | u32 mask; | ||
710 | u8 u1bTmp; | ||
711 | ThreeWireReg tdata; | ||
712 | //PHAL_DATA_8187 pHalData = GetHalData8187(pAdapter); | ||
713 | { // RTL8187S HSSI Read/Write Function | ||
714 | u1bTmp = read_nic_byte(dev, RF_SW_CONFIG); | ||
715 | u1bTmp |= RF_SW_CFG_SI; //reg08[1]=1 Serial Interface(SI) | ||
716 | write_nic_byte(dev, RF_SW_CONFIG, u1bTmp); | ||
717 | } | ||
718 | |||
719 | wReg80 = oval = read_nic_word(dev, RFPinsOutput); | ||
720 | oval2 = read_nic_word(dev, RFPinsEnable); | ||
721 | oval3 = read_nic_word(dev, RFPinsSelect); | ||
722 | |||
723 | write_nic_word(dev, RFPinsEnable, oval2|0xf); | ||
724 | write_nic_word(dev, RFPinsSelect, oval3|0xf); | ||
725 | |||
726 | *data2Read = 0; | ||
727 | |||
728 | // We must clear BIT0-3 here, otherwise, | ||
729 | // SW_Enalbe will be true when we first call ZEBRA_RFSerialRead() after 8187MPVC open, | ||
730 | // which will cause the value read become 0. 2005.04.11, by rcnjko. | ||
731 | oval &= ~0xf; | ||
732 | |||
733 | // Avoid collision with hardware three-wire. | ||
734 | twreg.longData = 0; | ||
735 | twreg.struc.enableB = 1; | ||
736 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(4); | ||
737 | |||
738 | twreg.longData = 0; | ||
739 | twreg.struc.enableB = 0; | ||
740 | twreg.struc.clk = 0; | ||
741 | twreg.struc.read_write = 0; | ||
742 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(5); | ||
743 | |||
744 | mask = (low2high) ? 0x01 : ((u32)0x01<<(32-1)); | ||
745 | for(i = 0; i < wLength/2; i++) | ||
746 | { | ||
747 | twreg.struc.data = ((data2Write&mask) != 0) ? 1 : 0; | ||
748 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1); | ||
749 | twreg.struc.clk = 1; | ||
750 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
751 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
752 | |||
753 | mask = (low2high) ? (mask<<1): (mask>>1); | ||
754 | |||
755 | if(i == 2) | ||
756 | { | ||
757 | // Commented out by Jackie, 2004.08.26. <RJ_NOTE> We must comment out the following two lines for we cannot pull down VCOPDN during RF Serail Read. | ||
758 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, 0xe); // turn off data enable | ||
759 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsSelect, 0xe); | ||
760 | |||
761 | twreg.struc.read_write=1; | ||
762 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
763 | twreg.struc.clk = 0; | ||
764 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
765 | break; | ||
766 | } | ||
767 | twreg.struc.data = ((data2Write&mask) != 0) ? 1: 0; | ||
768 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
769 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
770 | |||
771 | twreg.struc.clk = 0; | ||
772 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1); | ||
773 | |||
774 | mask = (low2high) ? (mask<<1) : (mask>>1); | ||
775 | } | ||
776 | |||
777 | twreg.struc.clk = 0; | ||
778 | twreg.struc.data = 0; | ||
779 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
780 | mask = (low2high) ? 0x01 : ((u32)0x01 << (12-1)); | ||
781 | |||
782 | // | ||
783 | // 061016, by rcnjko: | ||
784 | // We must set data pin to HW controled, otherwise RF can't driver it and | ||
785 | // value RF register won't be able to read back properly. | ||
786 | // | ||
787 | write_nic_word(dev, RFPinsEnable, ( ((oval2|0x0E) & (~0x01))) ); | ||
788 | 394 | ||
789 | for(i = 0; i < rLength; i++) | 395 | HwHSSIThreeWire(dev, (u8 *)(&data2Write), len, 1, 1); |
790 | { | ||
791 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1); | ||
792 | twreg.struc.clk = 1; | ||
793 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
794 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
795 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
796 | tmp = read_nic_word(dev, RFPinsInput); | ||
797 | tdata.longData = tmp; | ||
798 | *data2Read |= tdata.struc.clk ? mask : 0; | ||
799 | |||
800 | twreg.struc.clk = 0; | ||
801 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
802 | |||
803 | mask = (low2high) ? (mask<<1) : (mask>>1); | ||
804 | } | ||
805 | twreg.struc.enableB = 1; | ||
806 | twreg.struc.clk = 0; | ||
807 | twreg.struc.data = 0; | ||
808 | twreg.struc.read_write = 1; | ||
809 | write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2); | ||
810 | |||
811 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, oval2|0x8); // Set To Output Enable | ||
812 | write_nic_word(dev, RFPinsEnable, oval2); // Set To Output Enable, <RJ_NOTE> We cannot enable BIT3 here, otherwise, we will failed to switch channel. 2005.04.12. | ||
813 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, 0x1bff); | ||
814 | write_nic_word(dev, RFPinsSelect, oval3); // Set To SW Switch | ||
815 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsSelect, 0x0488); | ||
816 | write_nic_word(dev, RFPinsOutput, 0x3a0); | ||
817 | //PlatformEFIOWrite2Byte(pAdapter, RFPinsOutput, 0x0480); | ||
818 | } | 396 | } |
819 | 397 | ||
820 | 398 | u32 RF_ReadReg(struct net_device *dev, u8 offset) | |
821 | u32 | ||
822 | RF_ReadReg( | ||
823 | struct net_device *dev, | ||
824 | u8 offset | ||
825 | ) | ||
826 | { | 399 | { |
827 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 400 | u32 data2Write; |
828 | u32 data2Write; | 401 | u8 wlen; |
829 | u8 wlen; | 402 | u32 dataRead; |
830 | u8 rlen; | ||
831 | u8 low2high; | ||
832 | u32 dataRead; | ||
833 | 403 | ||
834 | switch(priv->rf_chip) | 404 | data2Write = ((u32)(offset & 0x0f)); |
835 | { | 405 | wlen = 16; |
836 | case RFCHIPID_RTL8225: | 406 | HwHSSIThreeWire(dev, (u8 *)(&data2Write), wlen, 1, 0); |
837 | case RF_ZEBRA2: | 407 | dataRead = data2Write; |
838 | case RF_ZEBRA4: | ||
839 | switch(priv->RegThreeWireMode) | ||
840 | { | ||
841 | case HW_THREE_WIRE_PI: // For 87S Parallel Interface. | ||
842 | { | ||
843 | data2Write = ((u32)(offset&0x0f)); | ||
844 | wlen=16; | ||
845 | HwHSSIThreeWire( | ||
846 | dev, | ||
847 | (u8*)(&data2Write), // pDataBuf, | ||
848 | wlen, // nDataBufBitCnt, | ||
849 | 0, // bSI | ||
850 | 0); // bWrite | ||
851 | dataRead= data2Write; | ||
852 | } | ||
853 | break; | ||
854 | |||
855 | case HW_THREE_WIRE_SI: // For 87S Serial Interface. | ||
856 | { | ||
857 | data2Write = ((u32)(offset&0x0f)) ; | ||
858 | wlen=16; | ||
859 | HwHSSIThreeWire( | ||
860 | dev, | ||
861 | (u8*)(&data2Write), // pDataBuf, | ||
862 | wlen, // nDataBufBitCnt, | ||
863 | 1, // bSI | ||
864 | 0 // bWrite | ||
865 | ); | ||
866 | dataRead= data2Write; | ||
867 | } | ||
868 | break; | ||
869 | |||
870 | // Perform SW 3-wire programming by driver. | ||
871 | default: | ||
872 | { | ||
873 | data2Write = ((u32)(offset&0x1f)) << 27; // For Zebra E-cut. 2005.04.11, by rcnjko. | ||
874 | wlen = 6; | ||
875 | rlen = 12; | ||
876 | low2high = 0; | ||
877 | ZEBRA_RFSerialRead(dev, data2Write, wlen,&dataRead,rlen, low2high); | ||
878 | } | ||
879 | break; | ||
880 | } | ||
881 | break; | ||
882 | default: | ||
883 | dataRead = 0; | ||
884 | break; | ||
885 | } | ||
886 | 408 | ||
887 | return dataRead; | 409 | return dataRead; |
888 | } | 410 | } |
@@ -1043,15 +565,12 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1043 | 565 | ||
1044 | // Page0 : reg0-reg15 | 566 | // Page0 : reg0-reg15 |
1045 | 567 | ||
1046 | // RF_WriteReg(dev, 0x00, 0x003f); mdelay(1);//1 | ||
1047 | RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);// 1 | 568 | RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);// 1 |
1048 | 569 | ||
1049 | RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1); | 570 | RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1); |
1050 | 571 | ||
1051 | // RF_WriteReg(dev, 0x02, 0x004c); mdelay(1);//2 | ||
1052 | RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);// 2 | 572 | RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);// 2 |
1053 | 573 | ||
1054 | // RF_WriteReg(dev, 0x03, 0x0000); mdelay(1);//3 | ||
1055 | RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);// 3 | 574 | RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);// 3 |
1056 | 575 | ||
1057 | RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); | 576 | RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); |
@@ -1080,8 +599,6 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1080 | 599 | ||
1081 | RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1); | 600 | RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1); |
1082 | // Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl. | 601 | // Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl. |
1083 | // RF_WriteReg(dev, 0x08, 0x0597); mdelay(1); | ||
1084 | // RF_WriteReg(dev, 0x09, 0x050a); mdelay(1); | ||
1085 | RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1); | 602 | RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1); |
1086 | RF_WriteReg(dev, 0x0b, 0x0418); mdelay(1); | 603 | RF_WriteReg(dev, 0x0b, 0x0418); mdelay(1); |
1087 | 604 | ||
@@ -1097,7 +614,6 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1097 | 614 | ||
1098 | RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); | 615 | RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); |
1099 | 616 | ||
1100 | // RF_WriteReg(dev, 0x00, 0x017f); mdelay(1);//6 | ||
1101 | RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1);// 6 | 617 | RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1);// 6 |
1102 | 618 | ||
1103 | RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1); | 619 | RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1); |
@@ -1106,20 +622,14 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1106 | { | 622 | { |
1107 | RF_WriteReg(dev, 0x01, i); mdelay(1); | 623 | RF_WriteReg(dev, 0x01, i); mdelay(1); |
1108 | RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1); | 624 | RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1); |
1109 | //DbgPrint("RF - 0x%x = 0x%x", i, ZEBRA_RF_RX_GAIN_TABLE[i]); | ||
1110 | } | 625 | } |
1111 | 626 | ||
1112 | RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /// 203, 343 | 627 | RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /// 203, 343 |
1113 | //RF_WriteReg(dev, 0x06, 0x0300); mdelay(1); // 400 | ||
1114 | RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); // 400 | 628 | RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); // 400 |
1115 | 629 | ||
1116 | RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); // switch to reg16-reg30, and HSSI disable 137 | 630 | RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); // switch to reg16-reg30, and HSSI disable 137 |
1117 | mdelay(10); // Deay 10 ms. //0xfd | 631 | mdelay(10); // Deay 10 ms. //0xfd |
1118 | 632 | ||
1119 | // RF_WriteReg(dev, 0x0c, 0x09be); mdelay(1); // 7 | ||
1120 | //RF_WriteReg(dev, 0x0c, 0x07be); mdelay(1); | ||
1121 | //mdelay(10); // Deay 10 ms. //0xfd | ||
1122 | |||
1123 | RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1); // Z4 synthesizer loop filter setting, 392 | 633 | RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1); // Z4 synthesizer loop filter setting, 392 |
1124 | mdelay(10); // Deay 10 ms. //0xfd | 634 | mdelay(10); // Deay 10 ms. //0xfd |
1125 | 635 | ||
@@ -1165,10 +675,8 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1165 | RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); | 675 | RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); |
1166 | } | 676 | } |
1167 | //by amy 080312 | 677 | //by amy 080312 |
1168 | // RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); //-by amy 080312 | ||
1169 | 678 | ||
1170 | RF_WriteReg(dev, 0x00, 0x00bf); mdelay(1); // switch to reg0-reg15, and HSSI enable | 679 | RF_WriteReg(dev, 0x00, 0x00bf); mdelay(1); // switch to reg0-reg15, and HSSI enable |
1171 | // RF_WriteReg(dev, 0x0d, 0x009f); mdelay(1); // Rx BB start calibration, 00c//-edward | ||
1172 | RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1); // Rx BB start calibration, 00c//+edward | 680 | RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1); // Rx BB start calibration, 00c//+edward |
1173 | RF_WriteReg(dev, 0x02, 0x004d); mdelay(1); // temperature meter off | 681 | RF_WriteReg(dev, 0x02, 0x004d); mdelay(1); // temperature meter off |
1174 | RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); // Rx mode | 682 | RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); // Rx mode |
@@ -1217,13 +725,10 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1217 | // AGC.txt | 725 | // AGC.txt |
1218 | //============================================================================= | 726 | //============================================================================= |
1219 | 727 | ||
1220 | // PlatformIOWrite4Byte( dev, PhyAddr, 0x00001280); // Annie, 2006-05-05 | ||
1221 | write_phy_ofdm(dev, 0x00, 0x12); | 728 | write_phy_ofdm(dev, 0x00, 0x12); |
1222 | //WriteBBPortUchar(dev, 0x00001280); | ||
1223 | 729 | ||
1224 | for (i=0; i<128; i++) | 730 | for (i=0; i<128; i++) |
1225 | { | 731 | { |
1226 | //DbgPrint("AGC - [%x+1] = 0x%x\n", i, ZEBRA_AGC[i+1]); | ||
1227 | 732 | ||
1228 | data = ZEBRA_AGC[i+1]; | 733 | data = ZEBRA_AGC[i+1]; |
1229 | data = data << 8; | 734 | data = data << 8; |
@@ -1239,7 +744,6 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1239 | } | 744 | } |
1240 | 745 | ||
1241 | PlatformIOWrite4Byte( dev, PhyAddr, 0x00001080); // Annie, 2006-05-05 | 746 | PlatformIOWrite4Byte( dev, PhyAddr, 0x00001080); // Annie, 2006-05-05 |
1242 | //WriteBBPortUchar(dev, 0x00001080); | ||
1243 | 747 | ||
1244 | //============================================================================= | 748 | //============================================================================= |
1245 | 749 | ||
@@ -1252,8 +756,6 @@ ZEBRA_Config_85BASIC_HardCode( | |||
1252 | u4bRegOffset=i; | 756 | u4bRegOffset=i; |
1253 | u4bRegValue=OFDM_CONFIG[i]; | 757 | u4bRegValue=OFDM_CONFIG[i]; |
1254 | 758 | ||
1255 | //DbgPrint("OFDM - 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue); | ||
1256 | |||
1257 | WriteBBPortUchar(dev, | 759 | WriteBBPortUchar(dev, |
1258 | (0x00000080 | | 760 | (0x00000080 | |
1259 | (u4bRegOffset & 0x7f) | | 761 | (u4bRegOffset & 0x7f) | |
@@ -1277,9 +779,6 @@ UpdateInitialGain( | |||
1277 | ) | 779 | ) |
1278 | { | 780 | { |
1279 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 781 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
1280 | //unsigned char* IGTable; | ||
1281 | //u8 DIG_CurrentInitialGain = 4; | ||
1282 | //unsigned char u1Tmp; | ||
1283 | 782 | ||
1284 | //lzm add 080826 | 783 | //lzm add 080826 |
1285 | if(priv->eRFPowerState != eRfOn) | 784 | if(priv->eRFPowerState != eRfOn) |
@@ -1291,81 +790,59 @@ UpdateInitialGain( | |||
1291 | return; | 790 | return; |
1292 | } | 791 | } |
1293 | 792 | ||
1294 | switch(priv->rf_chip) | 793 | switch (priv->InitialGain) { |
1295 | { | 794 | case 1: /* m861dBm */ |
1296 | case RF_ZEBRA4: | 795 | write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); |
1297 | // Dynamic set initial gain, follow 87B | 796 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); |
1298 | switch(priv->InitialGain) | 797 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); |
1299 | { | 798 | break; |
1300 | case 1: //m861dBm | ||
1301 | //DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm \n"); | ||
1302 | write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); | ||
1303 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | ||
1304 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); | ||
1305 | break; | ||
1306 | |||
1307 | case 2: //m862dBm | ||
1308 | //DMESG("RTL8187 + 8225 Initial Gain State 2: -82 dBm \n"); | ||
1309 | write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); | ||
1310 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | ||
1311 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); | ||
1312 | break; | ||
1313 | |||
1314 | case 3: //m863dBm | ||
1315 | //DMESG("RTL8187 + 8225 Initial Gain State 3: -82 dBm \n"); | ||
1316 | write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); | ||
1317 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | ||
1318 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); | ||
1319 | break; | ||
1320 | |||
1321 | case 4: //m864dBm | ||
1322 | //DMESG("RTL8187 + 8225 Initial Gain State 4: -78 dBm \n"); | ||
1323 | write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); | ||
1324 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | ||
1325 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); | ||
1326 | break; | ||
1327 | 799 | ||
1328 | case 5: //m82dBm | 800 | case 2: /* m862dBm */ |
1329 | //DMESG("RTL8187 + 8225 Initial Gain State 5: -74 dBm \n"); | 801 | write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); |
1330 | write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); | 802 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); |
1331 | write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); | 803 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); |
1332 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); | 804 | break; |
1333 | break; | ||
1334 | 805 | ||
1335 | case 6: //m78dBm | 806 | case 3: /* m863dBm */ |
1336 | //DMESG ("RTL8187 + 8225 Initial Gain State 6: -70 dBm \n"); | 807 | write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); |
1337 | write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); | 808 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); |
1338 | write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); | 809 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); |
1339 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); | 810 | break; |
1340 | break; | ||
1341 | 811 | ||
1342 | case 7: //m74dBm | 812 | case 4: /* m864dBm */ |
1343 | //DMESG("RTL8187 + 8225 Initial Gain State 7: -66 dBm \n"); | 813 | write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); |
1344 | write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); | 814 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); |
1345 | write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1); | 815 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); |
1346 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); | 816 | break; |
1347 | break; | ||
1348 | 817 | ||
1349 | case 8: | 818 | case 5: /* m82dBm */ |
1350 | //DMESG("RTL8187 + 8225 Initial Gain State 8:\n"); | 819 | write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); |
1351 | write_phy_ofdm(dev, 0x17, 0x66); mdelay(1); | 820 | write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); |
1352 | write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1); | 821 | write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); |
1353 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); | 822 | break; |
1354 | break; | ||
1355 | 823 | ||
824 | case 6: /* m78dBm */ | ||
825 | write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); | ||
826 | write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); | ||
827 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); | ||
828 | break; | ||
1356 | 829 | ||
1357 | default: //MP | 830 | case 7: /* m74dBm */ |
1358 | //DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm (default)\n"); | 831 | write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); |
1359 | write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); | 832 | write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1); |
1360 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | 833 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); |
1361 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); | ||
1362 | break; | ||
1363 | } | ||
1364 | break; | 834 | break; |
1365 | 835 | ||
836 | case 8: | ||
837 | write_phy_ofdm(dev, 0x17, 0x66); mdelay(1); | ||
838 | write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1); | ||
839 | write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); | ||
840 | break; | ||
1366 | 841 | ||
1367 | default: | 842 | default: /* MP */ |
1368 | DMESG("UpdateInitialGain(): unknown RFChipID: %#X\n", priv->rf_chip); | 843 | write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); |
844 | write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); | ||
845 | write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1); | ||
1369 | break; | 846 | break; |
1370 | } | 847 | } |
1371 | } | 848 | } |
@@ -1379,13 +856,11 @@ InitTxPwrTracking87SE( | |||
1379 | struct net_device *dev | 856 | struct net_device *dev |
1380 | ) | 857 | ) |
1381 | { | 858 | { |
1382 | //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | ||
1383 | u32 u4bRfReg; | 859 | u32 u4bRfReg; |
1384 | 860 | ||
1385 | u4bRfReg = RF_ReadReg(dev, 0x02); | 861 | u4bRfReg = RF_ReadReg(dev, 0x02); |
1386 | 862 | ||
1387 | // Enable Thermal meter indication. | 863 | // Enable Thermal meter indication. |
1388 | //printk("InitTxPwrTracking87SE(): Enable thermal meter indication, Write RF[0x02] = %#x", u4bRfReg|PWR_METER_EN); | ||
1389 | RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN); mdelay(1); | 864 | RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN); mdelay(1); |
1390 | } | 865 | } |
1391 | 866 | ||
@@ -1397,21 +872,14 @@ PhyConfig8185( | |||
1397 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 872 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
1398 | write_nic_dword(dev, RCR, priv->ReceiveConfig); | 873 | write_nic_dword(dev, RCR, priv->ReceiveConfig); |
1399 | priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03; | 874 | priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03; |
1400 | // RF config | 875 | /* RF config */ |
1401 | switch(priv->rf_chip) | 876 | ZEBRA_Config_85BASIC_HardCode(dev); |
1402 | { | ||
1403 | case RF_ZEBRA2: | ||
1404 | case RF_ZEBRA4: | ||
1405 | ZEBRA_Config_85BASIC_HardCode( dev); | ||
1406 | break; | ||
1407 | } | ||
1408 | //{by amy 080312 | 877 | //{by amy 080312 |
1409 | // Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06. | 878 | // Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06. |
1410 | if(priv->bDigMechanism) | 879 | if(priv->bDigMechanism) |
1411 | { | 880 | { |
1412 | if(priv->InitialGain == 0) | 881 | if(priv->InitialGain == 0) |
1413 | priv->InitialGain = 4; | 882 | priv->InitialGain = 4; |
1414 | //printk("PhyConfig8185(): DIG is enabled, set default initial gain index to %d\n", priv->InitialGain); | ||
1415 | } | 883 | } |
1416 | 884 | ||
1417 | // | 885 | // |
@@ -1429,34 +897,17 @@ PhyConfig8185( | |||
1429 | return; | 897 | return; |
1430 | } | 898 | } |
1431 | 899 | ||
1432 | |||
1433 | |||
1434 | |||
1435 | void | 900 | void |
1436 | HwConfigureRTL8185( | 901 | HwConfigureRTL8185( |
1437 | struct net_device *dev | 902 | struct net_device *dev |
1438 | ) | 903 | ) |
1439 | { | 904 | { |
1440 | //RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control. | 905 | //RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control. |
1441 | // u8 bUNIVERSAL_CONTROL_RL = 1; | ||
1442 | u8 bUNIVERSAL_CONTROL_RL = 0; | 906 | u8 bUNIVERSAL_CONTROL_RL = 0; |
1443 | |||
1444 | u8 bUNIVERSAL_CONTROL_AGC = 1; | 907 | u8 bUNIVERSAL_CONTROL_AGC = 1; |
1445 | u8 bUNIVERSAL_CONTROL_ANT = 1; | 908 | u8 bUNIVERSAL_CONTROL_ANT = 1; |
1446 | u8 bAUTO_RATE_FALLBACK_CTL = 1; | 909 | u8 bAUTO_RATE_FALLBACK_CTL = 1; |
1447 | u8 val8; | 910 | u8 val8; |
1448 | //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | ||
1449 | //struct ieee80211_device *ieee = priv->ieee80211; | ||
1450 | //if(IS_WIRELESS_MODE_A(dev) || IS_WIRELESS_MODE_G(dev)) | ||
1451 | //{by amy 080312 if((ieee->mode == IEEE_G)||(ieee->mode == IEEE_A)) | ||
1452 | // { | ||
1453 | // write_nic_word(dev, BRSR, 0xffff); | ||
1454 | // } | ||
1455 | // else | ||
1456 | // { | ||
1457 | // write_nic_word(dev, BRSR, 0x000f); | ||
1458 | // } | ||
1459 | //by amy 080312} | ||
1460 | write_nic_word(dev, BRSR, 0x0fff); | 911 | write_nic_word(dev, BRSR, 0x0fff); |
1461 | // Retry limit | 912 | // Retry limit |
1462 | val8 = read_nic_byte(dev, CW_CONF); | 913 | val8 = read_nic_byte(dev, CW_CONF); |
@@ -1507,20 +958,11 @@ HwConfigureRTL8185( | |||
1507 | val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1; | 958 | val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1; |
1508 | 959 | ||
1509 | // <RJ_TODO_8185B> We shall set up the ARFR according to user's setting. | 960 | // <RJ_TODO_8185B> We shall set up the ARFR according to user's setting. |
1510 | //write_nic_word(dev, ARFR, 0x0fff); // set 1M ~ 54M | ||
1511 | //by amy | ||
1512 | // Aadded by Roger, 2007.11.15. | ||
1513 | PlatformIOWrite2Byte(dev, ARFR, 0x0fff); //set 1M ~ 54Mbps. | 961 | PlatformIOWrite2Byte(dev, ARFR, 0x0fff); //set 1M ~ 54Mbps. |
1514 | //by amy | ||
1515 | } | ||
1516 | else | ||
1517 | { | ||
1518 | } | 962 | } |
1519 | write_nic_byte(dev, RATE_FALLBACK, val8); | 963 | write_nic_byte(dev, RATE_FALLBACK, val8); |
1520 | } | 964 | } |
1521 | 965 | ||
1522 | |||
1523 | |||
1524 | static void | 966 | static void |
1525 | MacConfig_85BASIC_HardCode( | 967 | MacConfig_85BASIC_HardCode( |
1526 | struct net_device *dev) | 968 | struct net_device *dev) |
@@ -1548,14 +990,11 @@ MacConfig_85BASIC_HardCode( | |||
1548 | { | 990 | { |
1549 | u4bRegOffset |= (u4bPageIndex << 8); | 991 | u4bRegOffset |= (u4bPageIndex << 8); |
1550 | } | 992 | } |
1551 | //DbgPrint("MAC - 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue); | ||
1552 | write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue); | 993 | write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue); |
1553 | } | 994 | } |
1554 | //============================================================================ | 995 | //============================================================================ |
1555 | } | 996 | } |
1556 | 997 | ||
1557 | |||
1558 | |||
1559 | static void | 998 | static void |
1560 | MacConfig_85BASIC( | 999 | MacConfig_85BASIC( |
1561 | struct net_device *dev) | 1000 | struct net_device *dev) |
@@ -1578,8 +1017,6 @@ MacConfig_85BASIC( | |||
1578 | PlatformIOWrite1Byte(dev, 0x1F8, 0x00); | 1017 | PlatformIOWrite1Byte(dev, 0x1F8, 0x00); |
1579 | 1018 | ||
1580 | // Asked for by SD3 CM Lin, 2006.06.27, by rcnjko. | 1019 | // Asked for by SD3 CM Lin, 2006.06.27, by rcnjko. |
1581 | //PlatformIOWrite4Byte(dev, RFTiming, 0x00004001); | ||
1582 | //by amy | ||
1583 | // power save parameter based on "87SE power save parameters 20071127.doc", as follow. | 1020 | // power save parameter based on "87SE power save parameters 20071127.doc", as follow. |
1584 | 1021 | ||
1585 | //Enable DA10 TX power saving | 1022 | //Enable DA10 TX power saving |
@@ -1598,35 +1035,18 @@ MacConfig_85BASIC( | |||
1598 | write_nic_word(dev, 0x378, 0x0560); | 1035 | write_nic_word(dev, 0x378, 0x0560); |
1599 | write_nic_word(dev, 0x37A, 0x0560); | 1036 | write_nic_word(dev, 0x37A, 0x0560); |
1600 | write_nic_word(dev, 0x37C, 0x00EC); | 1037 | write_nic_word(dev, 0x37C, 0x00EC); |
1601 | // write_nic_word(dev, 0x37E, 0x00FE);//-edward | ||
1602 | write_nic_word(dev, 0x37E, 0x00EC);//+edward | 1038 | write_nic_word(dev, 0x37E, 0x00EC);//+edward |
1603 | write_nic_byte(dev, 0x24E,0x01); | 1039 | write_nic_byte(dev, 0x24E,0x01); |
1604 | //by amy | ||
1605 | |||
1606 | } | 1040 | } |
1607 | 1041 | ||
1608 | |||
1609 | |||
1610 | |||
1611 | u8 | 1042 | u8 |
1612 | GetSupportedWirelessMode8185( | 1043 | GetSupportedWirelessMode8185( |
1613 | struct net_device *dev | 1044 | struct net_device *dev |
1614 | ) | 1045 | ) |
1615 | { | 1046 | { |
1616 | u8 btSupportedWirelessMode = 0; | 1047 | u8 btSupportedWirelessMode = 0; |
1617 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | ||
1618 | |||
1619 | switch(priv->rf_chip) | ||
1620 | { | ||
1621 | case RF_ZEBRA2: | ||
1622 | case RF_ZEBRA4: | ||
1623 | btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G); | ||
1624 | break; | ||
1625 | default: | ||
1626 | btSupportedWirelessMode = WIRELESS_MODE_B; | ||
1627 | break; | ||
1628 | } | ||
1629 | 1048 | ||
1049 | btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G); | ||
1630 | return btSupportedWirelessMode; | 1050 | return btSupportedWirelessMode; |
1631 | } | 1051 | } |
1632 | 1052 | ||
@@ -1641,7 +1061,6 @@ ActUpdateChannelAccessSetting( | |||
1641 | struct ieee80211_device *ieee = priv->ieee80211; | 1061 | struct ieee80211_device *ieee = priv->ieee80211; |
1642 | AC_CODING eACI; | 1062 | AC_CODING eACI; |
1643 | AC_PARAM AcParam; | 1063 | AC_PARAM AcParam; |
1644 | //PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; | ||
1645 | u8 bFollowLegacySetting = 0; | 1064 | u8 bFollowLegacySetting = 0; |
1646 | u8 u1bAIFS; | 1065 | u8 u1bAIFS; |
1647 | 1066 | ||
@@ -1663,40 +1082,14 @@ ActUpdateChannelAccessSetting( | |||
1663 | ChnlAccessSetting->CWmaxIndex = 7; // 2006.06.02, by rcnjko. | 1082 | ChnlAccessSetting->CWmaxIndex = 7; // 2006.06.02, by rcnjko. |
1664 | 1083 | ||
1665 | write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer); | 1084 | write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer); |
1666 | //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SLOT_TIME, &ChnlAccessSetting->SlotTimeTimer ); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29. | ||
1667 | write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29. | 1085 | write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29. |
1668 | 1086 | ||
1669 | u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer ); | 1087 | u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer ); |
1670 | 1088 | ||
1671 | //write_nic_byte(dev, AC_VO_PARAM, u1bAIFS); | ||
1672 | //write_nic_byte(dev, AC_VI_PARAM, u1bAIFS); | ||
1673 | //write_nic_byte(dev, AC_BE_PARAM, u1bAIFS); | ||
1674 | //write_nic_byte(dev, AC_BK_PARAM, u1bAIFS); | ||
1675 | |||
1676 | write_nic_byte(dev, EIFS, ChnlAccessSetting->EIFS_Timer); | 1089 | write_nic_byte(dev, EIFS, ChnlAccessSetting->EIFS_Timer); |
1677 | 1090 | ||
1678 | write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08. | 1091 | write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08. |
1679 | 1092 | ||
1680 | #ifdef TODO | ||
1681 | // <RJ_TODO_NOW_8185B> Update ECWmin/ECWmax, AIFS, TXOP Limit of each AC to the value defined by SPEC. | ||
1682 | if( pStaQos->CurrentQosMode > QOS_DISABLE ) | ||
1683 | { // QoS mode. | ||
1684 | if(pStaQos->QBssWirelessMode == WirelessMode) | ||
1685 | { | ||
1686 | // Follow AC Parameters of the QBSS. | ||
1687 | for(eACI = 0; eACI < AC_MAX; eACI++) | ||
1688 | { | ||
1689 | Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, (pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) ); | ||
1690 | } | ||
1691 | } | ||
1692 | else | ||
1693 | { | ||
1694 | // Follow Default WMM AC Parameters. | ||
1695 | bFollowLegacySetting = 1; | ||
1696 | } | ||
1697 | } | ||
1698 | else | ||
1699 | #endif | ||
1700 | { // Legacy 802.11. | 1093 | { // Legacy 802.11. |
1701 | bFollowLegacySetting = 1; | 1094 | bFollowLegacySetting = 1; |
1702 | 1095 | ||
@@ -1719,14 +1112,12 @@ ActUpdateChannelAccessSetting( | |||
1719 | AcParam.f.TXOPLimit = 0; | 1112 | AcParam.f.TXOPLimit = 0; |
1720 | 1113 | ||
1721 | //lzm reserved 080826 | 1114 | //lzm reserved 080826 |
1722 | #if 1 | ||
1723 | // For turbo mode setting. port from 87B by Isaiah 2008-08-01 | 1115 | // For turbo mode setting. port from 87B by Isaiah 2008-08-01 |
1724 | if( ieee->current_network.Turbo_Enable == 1 ) | 1116 | if( ieee->current_network.Turbo_Enable == 1 ) |
1725 | AcParam.f.TXOPLimit = 0x01FF; | 1117 | AcParam.f.TXOPLimit = 0x01FF; |
1726 | // For 87SE with Intel 4965 Ad-Hoc mode have poor throughput (19MB) | 1118 | // For 87SE with Intel 4965 Ad-Hoc mode have poor throughput (19MB) |
1727 | if (ieee->iw_mode == IW_MODE_ADHOC) | 1119 | if (ieee->iw_mode == IW_MODE_ADHOC) |
1728 | AcParam.f.TXOPLimit = 0x0020; | 1120 | AcParam.f.TXOPLimit = 0x0020; |
1729 | #endif | ||
1730 | 1121 | ||
1731 | for(eACI = 0; eACI < AC_MAX; eACI++) | 1122 | for(eACI = 0; eACI < AC_MAX; eACI++) |
1732 | { | 1123 | { |
@@ -1770,18 +1161,13 @@ ActUpdateChannelAccessSetting( | |||
1770 | 1161 | ||
1771 | // Cehck ACM bit. | 1162 | // Cehck ACM bit. |
1772 | // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13. | 1163 | // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13. |
1773 | //write_nic_byte(dev, ACM_CONTROL, pAcParam->f.AciAifsn); | ||
1774 | { | 1164 | { |
1775 | PACI_AIFSN pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn); | 1165 | PACI_AIFSN pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn); |
1776 | AC_CODING eACI = pAciAifsn->f.ACI; | 1166 | AC_CODING eACI = pAciAifsn->f.ACI; |
1777 | 1167 | ||
1778 | //modified Joseph | 1168 | //modified Joseph |
1779 | //for 8187B AsynIORead issue | 1169 | //for 8187B AsynIORead issue |
1780 | #ifdef TODO | ||
1781 | u8 AcmCtrl = pHalData->AcmControl; | ||
1782 | #else | ||
1783 | u8 AcmCtrl = 0; | 1170 | u8 AcmCtrl = 0; |
1784 | #endif | ||
1785 | if( pAciAifsn->f.ACM ) | 1171 | if( pAciAifsn->f.ACM ) |
1786 | { // ACM bit is 1. | 1172 | { // ACM bit is 1. |
1787 | switch(eACI) | 1173 | switch(eACI) |
@@ -1823,19 +1209,10 @@ ActUpdateChannelAccessSetting( | |||
1823 | break; | 1209 | break; |
1824 | } | 1210 | } |
1825 | } | 1211 | } |
1826 | |||
1827 | //printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl); | ||
1828 | |||
1829 | #ifdef TO_DO | ||
1830 | pHalData->AcmControl = AcmCtrl; | ||
1831 | #endif | ||
1832 | //write_nic_byte(dev, ACM_CONTROL, AcmCtrl); | ||
1833 | write_nic_byte(dev, ACM_CONTROL, 0); | 1212 | write_nic_byte(dev, ACM_CONTROL, 0); |
1834 | } | 1213 | } |
1835 | } | 1214 | } |
1836 | } | 1215 | } |
1837 | |||
1838 | |||
1839 | } | 1216 | } |
1840 | } | 1217 | } |
1841 | 1218 | ||
@@ -1847,7 +1224,6 @@ ActSetWirelessMode8185( | |||
1847 | { | 1224 | { |
1848 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1225 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
1849 | struct ieee80211_device *ieee = priv->ieee80211; | 1226 | struct ieee80211_device *ieee = priv->ieee80211; |
1850 | //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); | ||
1851 | u8 btSupportedWirelessMode = GetSupportedWirelessMode8185(dev); | 1227 | u8 btSupportedWirelessMode = GetSupportedWirelessMode8185(dev); |
1852 | 1228 | ||
1853 | if( (btWirelessMode & btSupportedWirelessMode) == 0 ) | 1229 | if( (btWirelessMode & btSupportedWirelessMode) == 0 ) |
@@ -1880,24 +1256,11 @@ ActSetWirelessMode8185( | |||
1880 | } | 1256 | } |
1881 | } | 1257 | } |
1882 | 1258 | ||
1883 | 1259 | /* 2. Swtich band: RF or BB specific actions, | |
1884 | // 2. Swtich band: RF or BB specific actions, | 1260 | * for example, refresh tables in omc8255, or change initial gain if necessary. |
1885 | // for example, refresh tables in omc8255, or change initial gain if necessary. | 1261 | * Nothing to do for Zebra to switch band. |
1886 | switch(priv->rf_chip) | 1262 | * Update current wireless mode if we swtich to specified band successfully. */ |
1887 | { | 1263 | ieee->mode = (WIRELESS_MODE)btWirelessMode; |
1888 | case RF_ZEBRA2: | ||
1889 | case RF_ZEBRA4: | ||
1890 | { | ||
1891 | // Nothing to do for Zebra to switch band. | ||
1892 | // Update current wireless mode if we swtich to specified band successfully. | ||
1893 | ieee->mode = (WIRELESS_MODE)btWirelessMode; | ||
1894 | } | ||
1895 | break; | ||
1896 | |||
1897 | default: | ||
1898 | DMESGW("ActSetWirelessMode8185(): unsupported RF: 0x%X !!!\n", priv->rf_chip); | ||
1899 | break; | ||
1900 | } | ||
1901 | 1264 | ||
1902 | // 3. Change related setting. | 1265 | // 3. Change related setting. |
1903 | if( ieee->mode == WIRELESS_MODE_A ){ | 1266 | if( ieee->mode == WIRELESS_MODE_A ){ |
@@ -1909,7 +1272,6 @@ ActSetWirelessMode8185( | |||
1909 | else if( ieee->mode == WIRELESS_MODE_G ){ | 1272 | else if( ieee->mode == WIRELESS_MODE_G ){ |
1910 | DMESG("WIRELESS_MODE_G\n"); | 1273 | DMESG("WIRELESS_MODE_G\n"); |
1911 | } | 1274 | } |
1912 | |||
1913 | ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting); | 1275 | ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting); |
1914 | } | 1276 | } |
1915 | 1277 | ||
@@ -1927,11 +1289,7 @@ DrvIFIndicateDisassociation( | |||
1927 | u16 reason | 1289 | u16 reason |
1928 | ) | 1290 | ) |
1929 | { | 1291 | { |
1930 | //printk("==> DrvIFIndicateDisassociation()\n"); | ||
1931 | |||
1932 | // nothing is needed after disassociation request. | 1292 | // nothing is needed after disassociation request. |
1933 | |||
1934 | //printk("<== DrvIFIndicateDisassociation()\n"); | ||
1935 | } | 1293 | } |
1936 | void | 1294 | void |
1937 | MgntDisconnectIBSS( | 1295 | MgntDisconnectIBSS( |
@@ -1941,11 +1299,7 @@ MgntDisconnectIBSS( | |||
1941 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1299 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
1942 | u8 i; | 1300 | u8 i; |
1943 | 1301 | ||
1944 | //printk("XXXXXXXXXX MgntDisconnect IBSS\n"); | ||
1945 | |||
1946 | DrvIFIndicateDisassociation(dev, unspec_reason); | 1302 | DrvIFIndicateDisassociation(dev, unspec_reason); |
1947 | |||
1948 | // PlatformZeroMemory( pMgntInfo->Bssid, 6 ); | ||
1949 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x55; | 1303 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x55; |
1950 | 1304 | ||
1951 | priv->ieee80211->state = IEEE80211_NOLINK; | 1305 | priv->ieee80211->state = IEEE80211_NOLINK; |
@@ -1957,16 +1311,10 @@ MgntDisconnectIBSS( | |||
1957 | // Because Bcn DMA isn't complete, mgnt queue would stuck until Bcn packet send. | 1311 | // Because Bcn DMA isn't complete, mgnt queue would stuck until Bcn packet send. |
1958 | 1312 | ||
1959 | // Disable Beacon Queue Own bit, suggested by jong | 1313 | // Disable Beacon Queue Own bit, suggested by jong |
1960 | // Adapter->HalFunc.SetTxDescOWNHandler(Adapter, BEACON_QUEUE, 0, 0); | ||
1961 | ieee80211_stop_send_beacons(priv->ieee80211); | 1314 | ieee80211_stop_send_beacons(priv->ieee80211); |
1962 | 1315 | ||
1963 | priv->ieee80211->link_change(dev); | 1316 | priv->ieee80211->link_change(dev); |
1964 | notify_wx_assoc_event(priv->ieee80211); | 1317 | notify_wx_assoc_event(priv->ieee80211); |
1965 | |||
1966 | // Stop SW Beacon.Use hw beacon so do not need to do so.by amy | ||
1967 | |||
1968 | // MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE ); | ||
1969 | |||
1970 | } | 1318 | } |
1971 | void | 1319 | void |
1972 | MlmeDisassociateRequest( | 1320 | MlmeDisassociateRequest( |
@@ -1986,14 +1334,8 @@ MlmeDisassociateRequest( | |||
1986 | DrvIFIndicateDisassociation(dev, unspec_reason); | 1334 | DrvIFIndicateDisassociation(dev, unspec_reason); |
1987 | 1335 | ||
1988 | 1336 | ||
1989 | // pMgntInfo->AsocTimestamp = 0; | ||
1990 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22; | 1337 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22; |
1991 | // pMgntInfo->mBrates.Length = 0; | ||
1992 | // Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) ); | ||
1993 | |||
1994 | ieee80211_disassociate(priv->ieee80211); | 1338 | ieee80211_disassociate(priv->ieee80211); |
1995 | |||
1996 | |||
1997 | } | 1339 | } |
1998 | 1340 | ||
1999 | } | 1341 | } |
@@ -2011,23 +1353,12 @@ MgntDisconnectAP( | |||
2011 | // I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE(). | 1353 | // I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE(). |
2012 | // | 1354 | // |
2013 | // //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success | 1355 | // //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success |
2014 | // SecClearAllKeys(Adapter); | ||
2015 | 1356 | ||
2016 | // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking. | 1357 | // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking. |
2017 | #ifdef TODO | ||
2018 | if( pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch || | ||
2019 | (pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) ) // In CCKM mode will Clear key | ||
2020 | { | ||
2021 | SecClearAllKeys(Adapter); | ||
2022 | RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key...")) | ||
2023 | } | ||
2024 | #endif | ||
2025 | // 2004.10.11, by rcnjko. | 1358 | // 2004.10.11, by rcnjko. |
2026 | //MlmeDisassociateRequest( Adapter, pMgntInfo->Bssid, disas_lv_ss ); | ||
2027 | MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn ); | 1359 | MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn ); |
2028 | 1360 | ||
2029 | priv->ieee80211->state = IEEE80211_NOLINK; | 1361 | priv->ieee80211->state = IEEE80211_NOLINK; |
2030 | // pMgntInfo->AsocTimestamp = 0; | ||
2031 | } | 1362 | } |
2032 | bool | 1363 | bool |
2033 | MgntDisconnect( | 1364 | MgntDisconnect( |
@@ -2039,20 +1370,7 @@ MgntDisconnect( | |||
2039 | // | 1370 | // |
2040 | // Schedule an workitem to wake up for ps mode, 070109, by rcnjko. | 1371 | // Schedule an workitem to wake up for ps mode, 070109, by rcnjko. |
2041 | // | 1372 | // |
2042 | #ifdef TODO | ||
2043 | if(pMgntInfo->mPss != eAwake) | ||
2044 | { | ||
2045 | // | ||
2046 | // Using AwkaeTimer to prevent mismatch ps state. | ||
2047 | // In the timer the state will be changed according to the RF is being awoke or not. By Bruce, 2007-10-31. | ||
2048 | // | ||
2049 | // PlatformScheduleWorkItem( &(pMgntInfo->AwakeWorkItem) ); | ||
2050 | PlatformSetTimer( Adapter, &(pMgntInfo->AwakeTimer), 0 ); | ||
2051 | } | ||
2052 | #endif | ||
2053 | 1373 | ||
2054 | // Indication of disassociation event. | ||
2055 | //DrvIFIndicateDisassociation(Adapter, asRsn); | ||
2056 | if(IS_DOT11D_ENABLE(priv->ieee80211)) | 1374 | if(IS_DOT11D_ENABLE(priv->ieee80211)) |
2057 | Dot11d_Reset(priv->ieee80211); | 1375 | Dot11d_Reset(priv->ieee80211); |
2058 | // In adhoc mode, update beacon frame. | 1376 | // In adhoc mode, update beacon frame. |
@@ -2060,8 +1378,6 @@ MgntDisconnect( | |||
2060 | { | 1378 | { |
2061 | if( priv->ieee80211->iw_mode == IW_MODE_ADHOC ) | 1379 | if( priv->ieee80211->iw_mode == IW_MODE_ADHOC ) |
2062 | { | 1380 | { |
2063 | // RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> MgntDisconnectIBSS\n")); | ||
2064 | //printk("MgntDisconnect() ===> MgntDisconnectIBSS\n"); | ||
2065 | MgntDisconnectIBSS(dev); | 1381 | MgntDisconnectIBSS(dev); |
2066 | } | 1382 | } |
2067 | if( priv->ieee80211->iw_mode == IW_MODE_INFRA ) | 1383 | if( priv->ieee80211->iw_mode == IW_MODE_INFRA ) |
@@ -2071,17 +1387,10 @@ MgntDisconnect( | |||
2071 | // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is | 1387 | // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is |
2072 | // used to handle disassociation related things to AP, e.g. send Disassoc | 1388 | // used to handle disassociation related things to AP, e.g. send Disassoc |
2073 | // frame to AP. 2005.01.27, by rcnjko. | 1389 | // frame to AP. 2005.01.27, by rcnjko. |
2074 | // SecClearAllKeys(Adapter); | ||
2075 | |||
2076 | // RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> MgntDisconnectAP\n")); | ||
2077 | //printk("MgntDisconnect() ===> MgntDisconnectAP\n"); | ||
2078 | MgntDisconnectAP(dev, asRsn); | 1390 | MgntDisconnectAP(dev, asRsn); |
2079 | } | 1391 | } |
2080 | |||
2081 | // Inidicate Disconnect, 2005.02.23, by rcnjko. | 1392 | // Inidicate Disconnect, 2005.02.23, by rcnjko. |
2082 | // MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE); | ||
2083 | } | 1393 | } |
2084 | |||
2085 | return true; | 1394 | return true; |
2086 | } | 1395 | } |
2087 | // | 1396 | // |
@@ -2101,25 +1410,12 @@ SetRFPowerState( | |||
2101 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1410 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2102 | bool bResult = false; | 1411 | bool bResult = false; |
2103 | 1412 | ||
2104 | // printk("---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState); | ||
2105 | if(eRFPowerState == priv->eRFPowerState) | 1413 | if(eRFPowerState == priv->eRFPowerState) |
2106 | { | 1414 | { |
2107 | // printk("<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState); | ||
2108 | return bResult; | 1415 | return bResult; |
2109 | } | 1416 | } |
2110 | 1417 | ||
2111 | switch(priv->rf_chip) | 1418 | bResult = SetZebraRFPowerState8185(dev, eRFPowerState); |
2112 | { | ||
2113 | case RF_ZEBRA2: | ||
2114 | case RF_ZEBRA4: | ||
2115 | bResult = SetZebraRFPowerState8185(dev, eRFPowerState); | ||
2116 | break; | ||
2117 | |||
2118 | default: | ||
2119 | printk("SetRFPowerState8185(): unknown RFChipID: 0x%X!!!\n", priv->rf_chip); | ||
2120 | break;; | ||
2121 | } | ||
2122 | // printk("<--------- SetRFPowerState(): bResult(%d)\n", bResult); | ||
2123 | 1419 | ||
2124 | return bResult; | 1420 | return bResult; |
2125 | } | 1421 | } |
@@ -2149,33 +1445,25 @@ MgntActSet_RF_State( | |||
2149 | RT_RF_POWER_STATE rtState; | 1445 | RT_RF_POWER_STATE rtState; |
2150 | u16 RFWaitCounter = 0; | 1446 | u16 RFWaitCounter = 0; |
2151 | unsigned long flag; | 1447 | unsigned long flag; |
2152 | // printk("===>MgntActSet_RF_State(): StateToSet(%d), ChangeSource(0x%x)\n",StateToSet, ChangeSource); | ||
2153 | // | 1448 | // |
2154 | // Prevent the race condition of RF state change. By Bruce, 2007-11-28. | 1449 | // Prevent the race condition of RF state change. By Bruce, 2007-11-28. |
2155 | // Only one thread can change the RF state at one time, and others should wait to be executed. | 1450 | // Only one thread can change the RF state at one time, and others should wait to be executed. |
2156 | // | 1451 | // |
2157 | #if 1 | ||
2158 | while(true) | 1452 | while(true) |
2159 | { | 1453 | { |
2160 | // down(&priv->rf_state); | ||
2161 | spin_lock_irqsave(&priv->rf_ps_lock,flag); | 1454 | spin_lock_irqsave(&priv->rf_ps_lock,flag); |
2162 | if(priv->RFChangeInProgress) | 1455 | if(priv->RFChangeInProgress) |
2163 | { | 1456 | { |
2164 | // printk("====================>haha111111111\n"); | ||
2165 | // up(&priv->rf_state); | ||
2166 | // RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet)); | ||
2167 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | 1457 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); |
2168 | // Set RF after the previous action is done. | 1458 | // Set RF after the previous action is done. |
2169 | while(priv->RFChangeInProgress) | 1459 | while(priv->RFChangeInProgress) |
2170 | { | 1460 | { |
2171 | RFWaitCounter ++; | 1461 | RFWaitCounter ++; |
2172 | // RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter)); | ||
2173 | udelay(1000); // 1 ms | 1462 | udelay(1000); // 1 ms |
2174 | 1463 | ||
2175 | // Wait too long, return FALSE to avoid to be stuck here. | 1464 | // Wait too long, return FALSE to avoid to be stuck here. |
2176 | if(RFWaitCounter > 1000) // 1sec | 1465 | if(RFWaitCounter > 1000) // 1sec |
2177 | { | 1466 | { |
2178 | // RT_ASSERT(FALSE, ("MgntActSet_RF_State(): Wait too logn to set RF\n")); | ||
2179 | printk("MgntActSet_RF_State(): Wait too long to set RF\n"); | 1467 | printk("MgntActSet_RF_State(): Wait too long to set RF\n"); |
2180 | // TODO: Reset RF state? | 1468 | // TODO: Reset RF state? |
2181 | return false; | 1469 | return false; |
@@ -2184,17 +1472,13 @@ MgntActSet_RF_State( | |||
2184 | } | 1472 | } |
2185 | else | 1473 | else |
2186 | { | 1474 | { |
2187 | // printk("========================>haha2\n"); | ||
2188 | priv->RFChangeInProgress = true; | 1475 | priv->RFChangeInProgress = true; |
2189 | // up(&priv->rf_state); | ||
2190 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | 1476 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); |
2191 | break; | 1477 | break; |
2192 | } | 1478 | } |
2193 | } | 1479 | } |
2194 | #endif | ||
2195 | rtState = priv->eRFPowerState; | 1480 | rtState = priv->eRFPowerState; |
2196 | 1481 | ||
2197 | |||
2198 | switch(StateToSet) | 1482 | switch(StateToSet) |
2199 | { | 1483 | { |
2200 | case eRfOn: | 1484 | case eRfOn: |
@@ -2215,7 +1499,6 @@ MgntActSet_RF_State( | |||
2215 | } | 1499 | } |
2216 | } | 1500 | } |
2217 | else | 1501 | else |
2218 | // RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", pMgntInfo->RfOffReason, ChangeSource)); | ||
2219 | ; | 1502 | ; |
2220 | break; | 1503 | break; |
2221 | 1504 | ||
@@ -2232,38 +1515,26 @@ MgntActSet_RF_State( | |||
2232 | // | 1515 | // |
2233 | // Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(), | 1516 | // Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(), |
2234 | // because we do NOT need to set ssid to dummy ones. | 1517 | // because we do NOT need to set ssid to dummy ones. |
2235 | // Revised by Roger, 2007.12.04. | ||
2236 | // | 1518 | // |
2237 | MgntDisconnect( dev, disas_lv_ss ); | 1519 | MgntDisconnect( dev, disas_lv_ss ); |
2238 | 1520 | ||
2239 | // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. | 1521 | // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. |
2240 | // 2007.05.28, by shien chang. | ||
2241 | // PlatformZeroMemory( pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC ); | ||
2242 | // pMgntInfo->NumBssDesc = 0; | ||
2243 | // PlatformZeroMemory( pMgntInfo->bssDesc4Query, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC ); | ||
2244 | // pMgntInfo->NumBssDesc4Query = 0; | ||
2245 | } | 1522 | } |
2246 | 1523 | ||
2247 | |||
2248 | |||
2249 | priv->RfOffReason |= ChangeSource; | 1524 | priv->RfOffReason |= ChangeSource; |
2250 | bActionAllowed = true; | 1525 | bActionAllowed = true; |
2251 | break; | 1526 | break; |
2252 | |||
2253 | case eRfSleep: | 1527 | case eRfSleep: |
2254 | priv->RfOffReason |= ChangeSource; | 1528 | priv->RfOffReason |= ChangeSource; |
2255 | bActionAllowed = true; | 1529 | bActionAllowed = true; |
2256 | break; | 1530 | break; |
2257 | |||
2258 | default: | 1531 | default: |
2259 | break; | 1532 | break; |
2260 | } | 1533 | } |
2261 | 1534 | ||
2262 | if(bActionAllowed) | 1535 | if(bActionAllowed) |
2263 | { | 1536 | { |
2264 | // RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, pMgntInfo->RfOffReason)); | ||
2265 | // Config HW to the specified mode. | 1537 | // Config HW to the specified mode. |
2266 | // printk("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->RfOffReason); | ||
2267 | SetRFPowerState(dev, StateToSet); | 1538 | SetRFPowerState(dev, StateToSet); |
2268 | 1539 | ||
2269 | // Turn on RF. | 1540 | // Turn on RF. |
@@ -2273,7 +1544,6 @@ MgntActSet_RF_State( | |||
2273 | if(bConnectBySSID) | 1544 | if(bConnectBySSID) |
2274 | { | 1545 | { |
2275 | // by amy not supported | 1546 | // by amy not supported |
2276 | // MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE ); | ||
2277 | } | 1547 | } |
2278 | } | 1548 | } |
2279 | // Turn off RF. | 1549 | // Turn off RF. |
@@ -2282,18 +1552,11 @@ MgntActSet_RF_State( | |||
2282 | HalDisableRx8185Dummy(dev); | 1552 | HalDisableRx8185Dummy(dev); |
2283 | } | 1553 | } |
2284 | } | 1554 | } |
2285 | else | ||
2286 | { | ||
2287 | // printk("MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->RfOffReason); | ||
2288 | } | ||
2289 | 1555 | ||
2290 | // Release RF spinlock | 1556 | // Release RF spinlock |
2291 | // down(&priv->rf_state); | ||
2292 | spin_lock_irqsave(&priv->rf_ps_lock,flag); | 1557 | spin_lock_irqsave(&priv->rf_ps_lock,flag); |
2293 | priv->RFChangeInProgress = false; | 1558 | priv->RFChangeInProgress = false; |
2294 | // up(&priv->rf_state); | ||
2295 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | 1559 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); |
2296 | // printk("<===MgntActSet_RF_State()\n"); | ||
2297 | return bActionAllowed; | 1560 | return bActionAllowed; |
2298 | } | 1561 | } |
2299 | void | 1562 | void |
@@ -2302,15 +1565,12 @@ InactivePowerSave( | |||
2302 | ) | 1565 | ) |
2303 | { | 1566 | { |
2304 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1567 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2305 | //u8 index = 0; | ||
2306 | |||
2307 | // | 1568 | // |
2308 | // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem | 1569 | // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem |
2309 | // is really scheduled. | 1570 | // is really scheduled. |
2310 | // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the | 1571 | // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the |
2311 | // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing | 1572 | // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing |
2312 | // blocks the IPS procedure of switching RF. | 1573 | // blocks the IPS procedure of switching RF. |
2313 | // By Bruce, 2007-12-25. | ||
2314 | // | 1574 | // |
2315 | priv->bSwRfProcessing = true; | 1575 | priv->bSwRfProcessing = true; |
2316 | 1576 | ||
@@ -2326,7 +1586,6 @@ InactivePowerSave( | |||
2326 | // | 1586 | // |
2327 | // Description: | 1587 | // Description: |
2328 | // Enter the inactive power save mode. RF will be off | 1588 | // Enter the inactive power save mode. RF will be off |
2329 | // 2007.08.17, by shien chang. | ||
2330 | // | 1589 | // |
2331 | void | 1590 | void |
2332 | IPSEnter( | 1591 | IPSEnter( |
@@ -2335,13 +1594,11 @@ IPSEnter( | |||
2335 | { | 1594 | { |
2336 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1595 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2337 | RT_RF_POWER_STATE rtState; | 1596 | RT_RF_POWER_STATE rtState; |
2338 | //printk("==============================>enter IPS\n"); | ||
2339 | if (priv->bInactivePs) | 1597 | if (priv->bInactivePs) |
2340 | { | 1598 | { |
2341 | rtState = priv->eRFPowerState; | 1599 | rtState = priv->eRFPowerState; |
2342 | 1600 | ||
2343 | // | 1601 | // |
2344 | // Added by Bruce, 2007-12-25. | ||
2345 | // Do not enter IPS in the following conditions: | 1602 | // Do not enter IPS in the following conditions: |
2346 | // (1) RF is already OFF or Sleep | 1603 | // (1) RF is already OFF or Sleep |
2347 | // (2) bSwRfProcessing (indicates the IPS is still under going) | 1604 | // (2) bSwRfProcessing (indicates the IPS is still under going) |
@@ -2352,12 +1609,10 @@ IPSEnter( | |||
2352 | if (rtState == eRfOn && !priv->bSwRfProcessing | 1609 | if (rtState == eRfOn && !priv->bSwRfProcessing |
2353 | && (priv->ieee80211->state != IEEE80211_LINKED )) | 1610 | && (priv->ieee80211->state != IEEE80211_LINKED )) |
2354 | { | 1611 | { |
2355 | // printk("IPSEnter(): Turn off RF.\n"); | ||
2356 | priv->eInactivePowerState = eRfOff; | 1612 | priv->eInactivePowerState = eRfOff; |
2357 | InactivePowerSave(dev); | 1613 | InactivePowerSave(dev); |
2358 | } | 1614 | } |
2359 | } | 1615 | } |
2360 | // printk("priv->eRFPowerState is %d\n",priv->eRFPowerState); | ||
2361 | } | 1616 | } |
2362 | void | 1617 | void |
2363 | IPSLeave( | 1618 | IPSLeave( |
@@ -2366,20 +1621,17 @@ IPSLeave( | |||
2366 | { | 1621 | { |
2367 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1622 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2368 | RT_RF_POWER_STATE rtState; | 1623 | RT_RF_POWER_STATE rtState; |
2369 | //printk("===================================>leave IPS\n"); | ||
2370 | if (priv->bInactivePs) | 1624 | if (priv->bInactivePs) |
2371 | { | 1625 | { |
2372 | rtState = priv->eRFPowerState; | 1626 | rtState = priv->eRFPowerState; |
2373 | if ((rtState == eRfOff || rtState == eRfSleep) && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS) | 1627 | if ((rtState == eRfOff || rtState == eRfSleep) && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS) |
2374 | { | 1628 | { |
2375 | // printk("IPSLeave(): Turn on RF.\n"); | ||
2376 | priv->eInactivePowerState = eRfOn; | 1629 | priv->eInactivePowerState = eRfOn; |
2377 | InactivePowerSave(dev); | 1630 | InactivePowerSave(dev); |
2378 | } | 1631 | } |
2379 | } | 1632 | } |
2380 | // printk("priv->eRFPowerState is %d\n",priv->eRFPowerState); | ||
2381 | } | 1633 | } |
2382 | //by amy for power save | 1634 | |
2383 | void rtl8185b_adapter_start(struct net_device *dev) | 1635 | void rtl8185b_adapter_start(struct net_device *dev) |
2384 | { | 1636 | { |
2385 | struct r8180_priv *priv = ieee80211_priv(dev); | 1637 | struct r8180_priv *priv = ieee80211_priv(dev); |
@@ -2388,75 +1640,45 @@ void rtl8185b_adapter_start(struct net_device *dev) | |||
2388 | u8 SupportedWirelessMode; | 1640 | u8 SupportedWirelessMode; |
2389 | u8 InitWirelessMode; | 1641 | u8 InitWirelessMode; |
2390 | u8 bInvalidWirelessMode = 0; | 1642 | u8 bInvalidWirelessMode = 0; |
2391 | //int i; | ||
2392 | u8 tmpu8; | 1643 | u8 tmpu8; |
2393 | //u8 u1tmp,u2tmp; | ||
2394 | u8 btCR9346; | 1644 | u8 btCR9346; |
2395 | u8 TmpU1b; | 1645 | u8 TmpU1b; |
2396 | u8 btPSR; | 1646 | u8 btPSR; |
2397 | 1647 | ||
2398 | //rtl8180_rtx_disable(dev); | ||
2399 | //{by amy 080312 | ||
2400 | write_nic_byte(dev,0x24e, (BIT5|BIT6|BIT0)); | 1648 | write_nic_byte(dev,0x24e, (BIT5|BIT6|BIT0)); |
2401 | //by amy 080312} | ||
2402 | rtl8180_reset(dev); | 1649 | rtl8180_reset(dev); |
2403 | 1650 | ||
2404 | priv->dma_poll_mask = 0; | 1651 | priv->dma_poll_mask = 0; |
2405 | priv->dma_poll_stop_mask = 0; | 1652 | priv->dma_poll_stop_mask = 0; |
2406 | 1653 | ||
2407 | //rtl8180_beacon_tx_disable(dev); | ||
2408 | |||
2409 | HwConfigureRTL8185(dev); | 1654 | HwConfigureRTL8185(dev); |
2410 | |||
2411 | write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); | 1655 | write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); |
2412 | write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff ); | 1656 | write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff ); |
2413 | |||
2414 | write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3); // default network type to 'No Link' | 1657 | write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3); // default network type to 'No Link' |
2415 | |||
2416 | //write_nic_byte(dev, BRSR, 0x0); // Set BRSR= 1M | ||
2417 | |||
2418 | write_nic_word(dev, BcnItv, 100); | 1658 | write_nic_word(dev, BcnItv, 100); |
2419 | write_nic_word(dev, AtimWnd, 2); | 1659 | write_nic_word(dev, AtimWnd, 2); |
2420 | |||
2421 | //PlatformEFIOWrite2Byte(dev, FEMR, 0xFFFF); | ||
2422 | PlatformIOWrite2Byte(dev, FEMR, 0xFFFF); | 1660 | PlatformIOWrite2Byte(dev, FEMR, 0xFFFF); |
2423 | |||
2424 | write_nic_byte(dev, WPA_CONFIG, 0); | 1661 | write_nic_byte(dev, WPA_CONFIG, 0); |
2425 | |||
2426 | MacConfig_85BASIC(dev); | 1662 | MacConfig_85BASIC(dev); |
2427 | |||
2428 | // Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko. | 1663 | // Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko. |
2429 | // BT_DEMO_BOARD type | 1664 | // BT_DEMO_BOARD type |
2430 | PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a); | 1665 | PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a); |
2431 | //by amy | ||
2432 | //#ifdef CONFIG_RTL818X_S | ||
2433 | // for jong required | ||
2434 | // PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x9a56); | ||
2435 | //#endif | ||
2436 | //by amy | ||
2437 | //BT_QA_BOARD | ||
2438 | //PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x9a56); | ||
2439 | 1666 | ||
2440 | //----------------------------------------------------------------------------- | 1667 | //----------------------------------------------------------------------------- |
2441 | // Set up PHY related. | 1668 | // Set up PHY related. |
2442 | //----------------------------------------------------------------------------- | 1669 | //----------------------------------------------------------------------------- |
2443 | // Enable Config3.PARAM_En to revise AnaaParm. | 1670 | // Enable Config3.PARAM_En to revise AnaaParm. |
2444 | write_nic_byte(dev, CR9346, 0xc0); // enable config register write | 1671 | write_nic_byte(dev, CR9346, 0xc0); // enable config register write |
2445 | //by amy | ||
2446 | tmpu8 = read_nic_byte(dev, CONFIG3); | 1672 | tmpu8 = read_nic_byte(dev, CONFIG3); |
2447 | write_nic_byte(dev, CONFIG3, (tmpu8 |CONFIG3_PARM_En) ); | 1673 | write_nic_byte(dev, CONFIG3, (tmpu8 |CONFIG3_PARM_En) ); |
2448 | //by amy | ||
2449 | // Turn on Analog power. | 1674 | // Turn on Analog power. |
2450 | // Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko. | 1675 | // Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko. |
2451 | write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON); | 1676 | write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON); |
2452 | write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON); | 1677 | write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON); |
2453 | //by amy | ||
2454 | write_nic_word(dev, ANAPARAM3, 0x0010); | 1678 | write_nic_word(dev, ANAPARAM3, 0x0010); |
2455 | //by amy | ||
2456 | 1679 | ||
2457 | write_nic_byte(dev, CONFIG3, tmpu8); | 1680 | write_nic_byte(dev, CONFIG3, tmpu8); |
2458 | write_nic_byte(dev, CR9346, 0x00); | 1681 | write_nic_byte(dev, CR9346, 0x00); |
2459 | //{by amy 080312 for led | ||
2460 | // enable EEM0 and EEM1 in 9346CR | 1682 | // enable EEM0 and EEM1 in 9346CR |
2461 | btCR9346 = read_nic_byte(dev, CR9346); | 1683 | btCR9346 = read_nic_byte(dev, CR9346); |
2462 | write_nic_byte(dev, CR9346, (btCR9346|0xC0) ); | 1684 | write_nic_byte(dev, CR9346, (btCR9346|0xC0) ); |
@@ -2474,7 +1696,6 @@ void rtl8185b_adapter_start(struct net_device *dev) | |||
2474 | // B-cut RF Radio on/off 5e[3]=0 | 1696 | // B-cut RF Radio on/off 5e[3]=0 |
2475 | btPSR = read_nic_byte(dev, PSR); | 1697 | btPSR = read_nic_byte(dev, PSR); |
2476 | write_nic_byte(dev, PSR, (btPSR | BIT3)); | 1698 | write_nic_byte(dev, PSR, (btPSR | BIT3)); |
2477 | //by amy 080312 for led} | ||
2478 | // setup initial timing for RFE. | 1699 | // setup initial timing for RFE. |
2479 | write_nic_word(dev, RFPinsOutput, 0x0480); | 1700 | write_nic_word(dev, RFPinsOutput, 0x0480); |
2480 | SetOutputEnableOfRfPins(dev); | 1701 | SetOutputEnableOfRfPins(dev); |
@@ -2537,55 +1758,19 @@ void rtl8185b_adapter_start(struct net_device *dev) | |||
2537 | InitWirelessMode = ieee->mode; | 1758 | InitWirelessMode = ieee->mode; |
2538 | } | 1759 | } |
2539 | //by amy for power save | 1760 | //by amy for power save |
2540 | // printk("initialize ENABLE_IPS\n"); | ||
2541 | priv->eRFPowerState = eRfOff; | 1761 | priv->eRFPowerState = eRfOff; |
2542 | priv->RfOffReason = 0; | 1762 | priv->RfOffReason = 0; |
2543 | { | 1763 | { |
2544 | // u32 tmp2; | ||
2545 | // u32 tmp = jiffies; | ||
2546 | MgntActSet_RF_State(dev, eRfOn, 0); | 1764 | MgntActSet_RF_State(dev, eRfOn, 0); |
2547 | // tmp2 = jiffies; | ||
2548 | // printk("rf on cost jiffies:%lx\n", (tmp2-tmp)*1000/HZ); | ||
2549 | } | 1765 | } |
2550 | // DrvIFIndicateCurrentPhyStatus(priv); | ||
2551 | // | 1766 | // |
2552 | // If inactive power mode is enabled, disable rf while in disconnected state. | 1767 | // If inactive power mode is enabled, disable rf while in disconnected state. |
2553 | // 2007.07.16, by shien chang. | ||
2554 | // | 1768 | // |
2555 | if (priv->bInactivePs) | 1769 | if (priv->bInactivePs) |
2556 | { | 1770 | { |
2557 | // u32 tmp2; | ||
2558 | // u32 tmp = jiffies; | ||
2559 | MgntActSet_RF_State(dev,eRfOff, RF_CHANGE_BY_IPS); | 1771 | MgntActSet_RF_State(dev,eRfOff, RF_CHANGE_BY_IPS); |
2560 | // tmp2 = jiffies; | ||
2561 | // printk("rf off cost jiffies:%lx\n", (tmp2-tmp)*1000/HZ); | ||
2562 | |||
2563 | } | 1772 | } |
2564 | // IPSEnter(dev); | ||
2565 | //by amy for power save | 1773 | //by amy for power save |
2566 | #ifdef TODO | ||
2567 | // Turn off RF if necessary. 2005.08.23, by rcnjko. | ||
2568 | // We shall turn off RF after setting CMDR, otherwise, | ||
2569 | // RF will be turnned on after we enable MAC Tx/Rx. | ||
2570 | if(Adapter->MgntInfo.RegRfOff == TRUE) | ||
2571 | { | ||
2572 | SetRFPowerState8185(Adapter, RF_OFF); | ||
2573 | } | ||
2574 | else | ||
2575 | { | ||
2576 | SetRFPowerState8185(Adapter, RF_ON); | ||
2577 | } | ||
2578 | #endif | ||
2579 | |||
2580 | /* //these is equal with above TODO. | ||
2581 | write_nic_byte(dev, CR9346, 0xc0); // enable config register write | ||
2582 | write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3) | CONFIG3_PARM_En); | ||
2583 | RF_WriteReg(dev, 0x4, 0x9FF); | ||
2584 | write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON); | ||
2585 | write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON); | ||
2586 | write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)&(~CONFIG3_PARM_En))); | ||
2587 | write_nic_byte(dev, CR9346, 0x00); | ||
2588 | */ | ||
2589 | 1774 | ||
2590 | ActSetWirelessMode8185(dev, (u8)(InitWirelessMode)); | 1775 | ActSetWirelessMode8185(dev, (u8)(InitWirelessMode)); |
2591 | 1776 | ||
@@ -2594,14 +1779,11 @@ void rtl8185b_adapter_start(struct net_device *dev) | |||
2594 | rtl8185b_irq_enable(dev); | 1779 | rtl8185b_irq_enable(dev); |
2595 | 1780 | ||
2596 | netif_start_queue(dev); | 1781 | netif_start_queue(dev); |
2597 | |||
2598 | } | 1782 | } |
2599 | 1783 | ||
2600 | |||
2601 | void rtl8185b_rx_enable(struct net_device *dev) | 1784 | void rtl8185b_rx_enable(struct net_device *dev) |
2602 | { | 1785 | { |
2603 | u8 cmd; | 1786 | u8 cmd; |
2604 | //u32 rxconf; | ||
2605 | /* for now we accept data, management & ctl frame*/ | 1787 | /* for now we accept data, management & ctl frame*/ |
2606 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1788 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2607 | 1789 | ||
@@ -2613,11 +1795,6 @@ void rtl8185b_rx_enable(struct net_device *dev) | |||
2613 | priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP; | 1795 | priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP; |
2614 | } | 1796 | } |
2615 | 1797 | ||
2616 | /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){ | ||
2617 | rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT); | ||
2618 | rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT); | ||
2619 | }*/ | ||
2620 | |||
2621 | if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){ | 1798 | if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){ |
2622 | priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF | RCR_APWRMGT | RCR_AICV; | 1799 | priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF | RCR_APWRMGT | RCR_AICV; |
2623 | } | 1800 | } |
@@ -2629,9 +1806,6 @@ void rtl8185b_rx_enable(struct net_device *dev) | |||
2629 | 1806 | ||
2630 | fix_rx_fifo(dev); | 1807 | fix_rx_fifo(dev); |
2631 | 1808 | ||
2632 | #ifdef DEBUG_RX | ||
2633 | DMESG("rxconf: %x %x",priv->ReceiveConfig ,read_nic_dword(dev,RCR)); | ||
2634 | #endif | ||
2635 | cmd=read_nic_byte(dev,CMD); | 1809 | cmd=read_nic_byte(dev,CMD); |
2636 | write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT)); | 1810 | write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT)); |
2637 | 1811 | ||
@@ -2640,9 +1814,7 @@ void rtl8185b_rx_enable(struct net_device *dev) | |||
2640 | void rtl8185b_tx_enable(struct net_device *dev) | 1814 | void rtl8185b_tx_enable(struct net_device *dev) |
2641 | { | 1815 | { |
2642 | u8 cmd; | 1816 | u8 cmd; |
2643 | //u8 tx_agc_ctl; | ||
2644 | u8 byte; | 1817 | u8 byte; |
2645 | //u32 txconf; | ||
2646 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); | 1818 | struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); |
2647 | 1819 | ||
2648 | write_nic_dword(dev, TCR, priv->TransmitConfig); | 1820 | write_nic_dword(dev, TCR, priv->TransmitConfig); |
@@ -2652,21 +1824,7 @@ void rtl8185b_tx_enable(struct net_device *dev) | |||
2652 | 1824 | ||
2653 | fix_tx_fifo(dev); | 1825 | fix_tx_fifo(dev); |
2654 | 1826 | ||
2655 | #ifdef DEBUG_TX | ||
2656 | DMESG("txconf: %x %x",priv->TransmitConfig,read_nic_dword(dev,TCR)); | ||
2657 | #endif | ||
2658 | |||
2659 | cmd=read_nic_byte(dev,CMD); | 1827 | cmd=read_nic_byte(dev,CMD); |
2660 | write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT)); | 1828 | write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT)); |
2661 | |||
2662 | //write_nic_dword(dev,TX_CONF,txconf); | ||
2663 | |||
2664 | |||
2665 | /* | ||
2666 | rtl8180_set_mode(dev,EPROM_CMD_CONFIG); | ||
2667 | write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask); | ||
2668 | rtl8180_set_mode(dev,EPROM_CMD_NORMAL); | ||
2669 | */ | ||
2670 | } | 1829 | } |
2671 | 1830 | ||
2672 | |||
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile index 5e4aa9546b51..e032c3e1e864 100644 --- a/drivers/staging/rtl8192e/Makefile +++ b/drivers/staging/rtl8192e/Makefile | |||
@@ -1,13 +1,15 @@ | |||
1 | NIC_SELECT = RTL8192E | 1 | NIC_SELECT = RTL8192E |
2 | 2 | ||
3 | |||
4 | EXTRA_CFLAGS += -DRTL8192E | 3 | EXTRA_CFLAGS += -DRTL8192E |
5 | EXTRA_CFLAGS += -std=gnu89 | 4 | EXTRA_CFLAGS += -std=gnu89 |
6 | EXTRA_CFLAGS += -O2 | 5 | EXTRA_CFLAGS += -O2 |
7 | EXTRA_CFLAGS += -DTHOMAS_TURBO | 6 | EXTRA_CFLAGS += -DTHOMAS_TURBO |
8 | EXTRA_CFLAGS += -DENABLE_DOT11D | 7 | EXTRA_CFLAGS += -DENABLE_DOT11D |
9 | 8 | ||
10 | r8192_pci-objs := \ | 9 | EXTRA_CFLAGS += -DENABLE_IPS |
10 | EXTRA_CFLAGS += -DENABLE_LPS | ||
11 | |||
12 | r8192e_pci-objs := \ | ||
11 | r8192E_core.o \ | 13 | r8192E_core.o \ |
12 | r8180_93cx6.o \ | 14 | r8180_93cx6.o \ |
13 | r8192E_wx.o \ | 15 | r8192E_wx.o \ |
@@ -31,4 +33,5 @@ r8192_pci-objs := \ | |||
31 | ieee80211/ieee80211_crypt_ccmp.o \ | 33 | ieee80211/ieee80211_crypt_ccmp.o \ |
32 | ieee80211/ieee80211_crypt_wep.o | 34 | ieee80211/ieee80211_crypt_wep.o |
33 | 35 | ||
34 | obj-$(CONFIG_RTL8192E) += r8192_pci.o | 36 | obj-$(CONFIG_RTL8192E) += r8192e_pci.o |
37 | |||
diff --git a/drivers/staging/rtl8192e/dot11d.h b/drivers/staging/rtl8192e/dot11d.h index 15b7a4ba37b6..5b0e2dbc2bb8 100644 --- a/drivers/staging/rtl8192e/dot11d.h +++ b/drivers/staging/rtl8192e/dot11d.h | |||
@@ -1,102 +1,96 @@ | |||
1 | #ifndef __INC_DOT11D_H | 1 | #ifndef INC_DOT11D_H |
2 | #define __INC_DOT11D_H | 2 | #define INC_DOT11D_H |
3 | 3 | ||
4 | #ifdef ENABLE_DOT11D | 4 | #ifdef ENABLE_DOT11D |
5 | #include "ieee80211.h" | 5 | #include "ieee80211.h" |
6 | 6 | ||
7 | //#define ENABLE_DOT11D | ||
8 | |||
9 | //#define DOT11D_MAX_CHNL_NUM 83 | ||
10 | |||
11 | typedef struct _CHNL_TXPOWER_TRIPLE { | 7 | typedef struct _CHNL_TXPOWER_TRIPLE { |
12 | u8 FirstChnl; | 8 | u8 FirstChnl; |
13 | u8 NumChnls; | 9 | u8 NumChnls; |
14 | u8 MaxTxPowerInDbm; | 10 | u8 MaxTxPowerInDbm; |
15 | }CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE; | 11 | } CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE; |
16 | 12 | ||
17 | typedef enum _DOT11D_STATE { | 13 | typedef enum _DOT11D_STATE { |
18 | DOT11D_STATE_NONE = 0, | 14 | DOT11D_STATE_NONE = 0, |
19 | DOT11D_STATE_LEARNED, | 15 | DOT11D_STATE_LEARNED, |
20 | DOT11D_STATE_DONE, | 16 | DOT11D_STATE_DONE, |
21 | }DOT11D_STATE; | 17 | } DOT11D_STATE; |
18 | |||
19 | /** | ||
20 | * struct _RT_DOT11D_INFO | ||
21 | * @CountryIeLen: value greater than 0 if @CountryIeBuf contains | ||
22 | * valid country information element. | ||
23 | * @chanell_map: holds channel values | ||
24 | * 0 - invalid, | ||
25 | * 1 - valid (active scan), | ||
26 | * 2 - valid (passive scan) | ||
27 | * @CountryIeSrcAddr - Source AP of the country IE | ||
28 | */ | ||
22 | 29 | ||
23 | typedef struct _RT_DOT11D_INFO { | 30 | typedef struct _RT_DOT11D_INFO { |
24 | //DECLARE_RT_OBJECT(RT_DOT11D_INFO); | 31 | bool bEnabled; |
25 | 32 | ||
26 | bool bEnabled; // dot11MultiDomainCapabilityEnabled | 33 | u16 CountryIeLen; |
34 | u8 CountryIeBuf[MAX_IE_LEN]; | ||
35 | u8 CountryIeSrcAddr[6]; | ||
36 | u8 CountryIeWatchdog; | ||
27 | 37 | ||
28 | u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element. | 38 | u8 channel_map[MAX_CHANNEL_NUMBER+1]; |
29 | u8 CountryIeBuf[MAX_IE_LEN]; | 39 | u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1]; |
30 | u8 CountryIeSrcAddr[6]; // Source AP of the country IE. | ||
31 | u8 CountryIeWatchdog; | ||
32 | |||
33 | u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) | ||
34 | //u8 ChnlListLen; // #Bytes valid in ChnlList[]. | ||
35 | //u8 ChnlList[DOT11D_MAX_CHNL_NUM]; | ||
36 | u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1]; | ||
37 | 40 | ||
38 | DOT11D_STATE State; | 41 | DOT11D_STATE State; |
39 | }RT_DOT11D_INFO, *PRT_DOT11D_INFO; | 42 | } RT_DOT11D_INFO, *PRT_DOT11D_INFO; |
40 | #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) | 43 | |
41 | #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) | 44 | #define eqMacAddr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == \ |
42 | #define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo)) | 45 | (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && \ |
46 | (a)[5] == (b)[5]) ? 1 : 0) | ||
47 | |||
48 | #define cpMacAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], \ | ||
49 | (des)[2] = (src)[2], (des)[3] = (src)[3], \ | ||
50 | (des)[4] = (src)[4], (des)[5] = (src)[5]) | ||
51 | |||
52 | #define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO) \ | ||
53 | ((__pIeeeDev)->pDot11dInfo)) | ||
43 | 54 | ||
44 | #define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled | 55 | #define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled |
45 | #define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0) | 56 | #define IS_COUNTRY_IE_VALID(__pIeeeDev) \ |
57 | (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0) | ||
46 | 58 | ||
47 | #define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) | 59 | #define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \ |
48 | #define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) | 60 | eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) |
61 | |||
62 | #define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \ | ||
63 | cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) | ||
49 | 64 | ||
50 | #define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \ | 65 | #define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \ |
51 | (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \ | 66 | (((__Ie).Length == 0 || (__Ie).Length != \ |
52 | FALSE : \ | 67 | GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? FALSE : \ |
53 | (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length))) | 68 | (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, \ |
69 | (__Ie).Octet, (__Ie).Length))) | ||
54 | 70 | ||
55 | #define CIE_WATCHDOG_TH 1 | 71 | #define CIE_WATCHDOG_TH 1 |
56 | #define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog | 72 | #define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog |
57 | #define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 | 73 | #define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 |
58 | #define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev) | 74 | #define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev) |
59 | 75 | ||
60 | #define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE) | 76 | #define IS_DOT11D_STATE_DONE(__pIeeeDev) \ |
61 | 77 | (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE) | |
62 | 78 | ||
63 | void | 79 | |
64 | Dot11d_Init( | 80 | void Dot11d_Init(struct ieee80211_device *dev); |
65 | struct ieee80211_device *dev | 81 | |
66 | ); | 82 | void Dot11d_Reset(struct ieee80211_device *dev); |
67 | 83 | ||
68 | void | 84 | void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr, |
69 | Dot11d_Reset( | 85 | u16 CoutryIeLen, u8 *pCoutryIe); |
70 | struct ieee80211_device *dev | 86 | |
71 | ); | 87 | u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 channel); |
72 | 88 | ||
73 | void | 89 | void DOT11D_ScanComplete(struct ieee80211_device *dev); |
74 | Dot11d_UpdateCountryIe( | 90 | |
75 | struct ieee80211_device *dev, | 91 | int IsLegalChannel(struct ieee80211_device *dev, u8 channel); |
76 | u8 * pTaddr, | 92 | |
77 | u16 CoutryIeLen, | 93 | int ToLegalChannel(struct ieee80211_device *dev, u8 channel); |
78 | u8 * pCoutryIe | 94 | |
79 | ); | 95 | #endif /* ENABLE_DOT11D */ |
80 | 96 | #endif /* INC_DOT11D_H */ | |
81 | u8 | ||
82 | DOT11D_GetMaxTxPwrInDbm( | ||
83 | struct ieee80211_device *dev, | ||
84 | u8 Channel | ||
85 | ); | ||
86 | |||
87 | void | ||
88 | DOT11D_ScanComplete( | ||
89 | struct ieee80211_device * dev | ||
90 | ); | ||
91 | |||
92 | int IsLegalChannel( | ||
93 | struct ieee80211_device * dev, | ||
94 | u8 channel | ||
95 | ); | ||
96 | |||
97 | int ToLegalChannel( | ||
98 | struct ieee80211_device * dev, | ||
99 | u8 channel | ||
100 | ); | ||
101 | #endif //ENABLE_DOT11D | ||
102 | #endif // #ifndef __INC_DOT11D_H | ||
diff --git a/drivers/staging/rtl8192e/ieee80211.h b/drivers/staging/rtl8192e/ieee80211.h index 3ba9e9e90bda..c39249eb54b5 100644 --- a/drivers/staging/rtl8192e/ieee80211.h +++ b/drivers/staging/rtl8192e/ieee80211.h | |||
@@ -547,9 +547,6 @@ do { if (ieee80211_debug_level & (level)) \ | |||
547 | 547 | ||
548 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ | 548 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ |
549 | 549 | ||
550 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
551 | #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] | ||
552 | |||
553 | /* | 550 | /* |
554 | * To use the debug system; | 551 | * To use the debug system; |
555 | * | 552 | * |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211.h b/drivers/staging/rtl8192e/ieee80211/ieee80211.h index aa76390487bb..1f613a28152f 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211.h +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211.h | |||
@@ -35,6 +35,7 @@ | |||
35 | #endif | 35 | #endif |
36 | #include <linux/timer.h> | 36 | #include <linux/timer.h> |
37 | #include <linux/sched.h> | 37 | #include <linux/sched.h> |
38 | #include <linux/semaphore.h> | ||
38 | 39 | ||
39 | #include <linux/delay.h> | 40 | #include <linux/delay.h> |
40 | #include <linux/wireless.h> | 41 | #include <linux/wireless.h> |
@@ -180,6 +181,8 @@ typedef struct cb_desc { | |||
180 | u8 DrvAggrNum; | 181 | u8 DrvAggrNum; |
181 | u16 pkt_size; | 182 | u16 pkt_size; |
182 | u8 reserved12; | 183 | u8 reserved12; |
184 | |||
185 | u8 bdhcp; | ||
183 | }cb_desc, *pcb_desc; | 186 | }cb_desc, *pcb_desc; |
184 | 187 | ||
185 | /*--------------------------Define -------------------------------------------*/ | 188 | /*--------------------------Define -------------------------------------------*/ |
@@ -615,9 +618,6 @@ do { if (ieee80211_debug_level & (level)) \ | |||
615 | 618 | ||
616 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ | 619 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ |
617 | 620 | ||
618 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
619 | #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] | ||
620 | |||
621 | /* | 621 | /* |
622 | * To use the debug system; | 622 | * To use the debug system; |
623 | * | 623 | * |
@@ -743,6 +743,8 @@ struct ieee80211_snap_hdr { | |||
743 | #define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS) | 743 | #define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS) |
744 | #define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE) | 744 | #define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE) |
745 | #define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE) | 745 | #define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE) |
746 | #define WLAN_FC_MORE_DATA(fc) ((fc) & IEEE80211_FCTL_MOREDATA) | ||
747 | |||
746 | 748 | ||
747 | #define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & IEEE80211_FCTL_FRAMETYPE) | 749 | #define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & IEEE80211_FCTL_FRAMETYPE) |
748 | #define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG) | 750 | #define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG) |
@@ -1055,7 +1057,7 @@ struct ieee80211_device; | |||
1055 | #define SEC_ALG_NONE 0 | 1057 | #define SEC_ALG_NONE 0 |
1056 | #define SEC_ALG_WEP 1 | 1058 | #define SEC_ALG_WEP 1 |
1057 | #define SEC_ALG_TKIP 2 | 1059 | #define SEC_ALG_TKIP 2 |
1058 | #define SEC_ALG_CCMP 3 | 1060 | #define SEC_ALG_CCMP 4 |
1059 | 1061 | ||
1060 | #define WEP_KEYS 4 | 1062 | #define WEP_KEYS 4 |
1061 | #define WEP_KEY_LEN 13 | 1063 | #define WEP_KEY_LEN 13 |
@@ -1124,6 +1126,14 @@ enum ieee80211_mfie { | |||
1124 | /* Minimal header; can be used for passing 802.11 frames with sufficient | 1126 | /* Minimal header; can be used for passing 802.11 frames with sufficient |
1125 | * information to determine what type of underlying data type is actually | 1127 | * information to determine what type of underlying data type is actually |
1126 | * stored in the data. */ | 1128 | * stored in the data. */ |
1129 | struct ieee80211_pspoll_hdr { | ||
1130 | __le16 frame_ctl; | ||
1131 | __le16 aid; | ||
1132 | u8 bssid[ETH_ALEN]; | ||
1133 | u8 ta[ETH_ALEN]; | ||
1134 | //u8 payload[0]; | ||
1135 | } __attribute__ ((packed)); | ||
1136 | |||
1127 | struct ieee80211_hdr { | 1137 | struct ieee80211_hdr { |
1128 | __le16 frame_ctl; | 1138 | __le16 frame_ctl; |
1129 | __le16 duration_id; | 1139 | __le16 duration_id; |
@@ -1660,6 +1670,7 @@ struct ieee80211_network { | |||
1660 | bool ralink_cap_exist; | 1670 | bool ralink_cap_exist; |
1661 | bool atheros_cap_exist; | 1671 | bool atheros_cap_exist; |
1662 | bool cisco_cap_exist; | 1672 | bool cisco_cap_exist; |
1673 | bool marvell_cap_exist; | ||
1663 | bool unknown_cap_exist; | 1674 | bool unknown_cap_exist; |
1664 | // u8 berp_info; | 1675 | // u8 berp_info; |
1665 | bool berp_info_valid; | 1676 | bool berp_info_valid; |
@@ -1865,6 +1876,19 @@ typedef struct _RT_POWER_SAVE_CONTROL | |||
1865 | // Leisre Poswer Save : Disable RF if connected but traffic is not busy | 1876 | // Leisre Poswer Save : Disable RF if connected but traffic is not busy |
1866 | // | 1877 | // |
1867 | bool bLeisurePs; | 1878 | bool bLeisurePs; |
1879 | u32 PowerProfile; | ||
1880 | u8 LpsIdleCount; | ||
1881 | u8 RegMaxLPSAwakeIntvl; | ||
1882 | u8 LPSAwakeIntvl; | ||
1883 | |||
1884 | u32 CurPsLevel; | ||
1885 | u32 RegRfPsLevel; | ||
1886 | |||
1887 | bool bFwCtrlLPS; | ||
1888 | u8 FWCtrlPSMode; | ||
1889 | |||
1890 | bool LinkReqInIPSRFOffPgs; | ||
1891 | bool BufConnectinfoBefore; | ||
1868 | 1892 | ||
1869 | }RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL; | 1893 | }RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL; |
1870 | 1894 | ||
@@ -1905,14 +1929,121 @@ typedef struct _RT_LINK_DETECT_T{ | |||
1905 | 1929 | ||
1906 | u32 NumTxOkInPeriod; | 1930 | u32 NumTxOkInPeriod; |
1907 | u32 NumRxOkInPeriod; | 1931 | u32 NumRxOkInPeriod; |
1932 | u32 NumRxUnicastOkInPeriod; | ||
1908 | bool bBusyTraffic; | 1933 | bool bBusyTraffic; |
1909 | }RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; | 1934 | }RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; |
1910 | 1935 | ||
1936 | //added by amy 090330 | ||
1937 | typedef enum _HW_VARIABLES{ | ||
1938 | HW_VAR_ETHER_ADDR, | ||
1939 | HW_VAR_MULTICAST_REG, | ||
1940 | HW_VAR_BASIC_RATE, | ||
1941 | HW_VAR_BSSID, | ||
1942 | HW_VAR_MEDIA_STATUS, | ||
1943 | HW_VAR_SECURITY_CONF, | ||
1944 | HW_VAR_BEACON_INTERVAL, | ||
1945 | HW_VAR_ATIM_WINDOW, | ||
1946 | HW_VAR_LISTEN_INTERVAL, | ||
1947 | HW_VAR_CS_COUNTER, | ||
1948 | HW_VAR_DEFAULTKEY0, | ||
1949 | HW_VAR_DEFAULTKEY1, | ||
1950 | HW_VAR_DEFAULTKEY2, | ||
1951 | HW_VAR_DEFAULTKEY3, | ||
1952 | HW_VAR_SIFS, | ||
1953 | HW_VAR_DIFS, | ||
1954 | HW_VAR_EIFS, | ||
1955 | HW_VAR_SLOT_TIME, | ||
1956 | HW_VAR_ACK_PREAMBLE, | ||
1957 | HW_VAR_CW_CONFIG, | ||
1958 | HW_VAR_CW_VALUES, | ||
1959 | HW_VAR_RATE_FALLBACK_CONTROL, | ||
1960 | HW_VAR_CONTENTION_WINDOW, | ||
1961 | HW_VAR_RETRY_COUNT, | ||
1962 | HW_VAR_TR_SWITCH, | ||
1963 | HW_VAR_COMMAND, // For Command Register, Annie, 2006-04-07. | ||
1964 | HW_VAR_WPA_CONFIG, //2004/08/23, kcwu, for 8187 Security config | ||
1965 | HW_VAR_AMPDU_MIN_SPACE, // The spacing between sub-frame. Roger, 2008.07.04. | ||
1966 | HW_VAR_SHORTGI_DENSITY, // The density for shortGI. Roger, 2008.07.04. | ||
1967 | HW_VAR_AMPDU_FACTOR, | ||
1968 | HW_VAR_MCS_RATE_AVAILABLE, | ||
1969 | HW_VAR_AC_PARAM, // For AC Parameters, 2005.12.01, by rcnjko. | ||
1970 | HW_VAR_ACM_CTRL, // For ACM Control, Annie, 2005-12-13. | ||
1971 | HW_VAR_DIS_Req_Qsize, // For DIS_Reg_Qsize, Joseph | ||
1972 | HW_VAR_CCX_CHNL_LOAD, // For CCX 2 channel load request, 2006.05.04. | ||
1973 | HW_VAR_CCX_NOISE_HISTOGRAM, // For CCX 2 noise histogram request, 2006.05.04. | ||
1974 | HW_VAR_CCX_CLM_NHM, // For CCX 2 parallel channel load request and noise histogram request, 2006.05.12. | ||
1975 | HW_VAR_TxOPLimit, // For turbo mode related settings, added by Roger, 2006.12.07 | ||
1976 | HW_VAR_TURBO_MODE, // For turbo mode related settings, added by Roger, 2006.12.15. | ||
1977 | HW_VAR_RF_STATE, // For change or query RF power state, 061214, rcnjko. | ||
1978 | HW_VAR_RF_OFF_BY_HW, // For UI to query if external HW signal disable RF, 061229, rcnjko. | ||
1979 | HW_VAR_BUS_SPEED, // In unit of bps. 2006.07.03, by rcnjko. | ||
1980 | HW_VAR_SET_DEV_POWER, // Set to low power, added by LanHsin, 2007. | ||
1981 | |||
1982 | //1!!!!!!!!!!!!!!!!!!!!!!!!!!! | ||
1983 | //1Attention Please!!!<11n or 8190 specific code should be put below this line> | ||
1984 | //1!!!!!!!!!!!!!!!!!!!!!!!!!!! | ||
1985 | HW_VAR_RCR, //for RCR, David 2006,05,11 | ||
1986 | HW_VAR_RATR_0, | ||
1987 | HW_VAR_RRSR, | ||
1988 | HW_VAR_CPU_RST, | ||
1989 | HW_VAR_CECHK_BSSID, | ||
1990 | HW_VAR_LBK_MODE, // Set lookback mode, 2008.06.11. added by Roger. | ||
1991 | // Set HW related setting for 11N AES bug. | ||
1992 | HW_VAR_AES_11N_FIX, | ||
1993 | // Set Usb Rx Aggregation | ||
1994 | HW_VAR_USB_RX_AGGR, | ||
1995 | HW_VAR_USER_CONTROL_TURBO_MODE, | ||
1996 | HW_VAR_RETRY_LIMIT, | ||
1997 | #ifndef _RTL8192_EXT_PATCH_ | ||
1998 | HW_VAR_INIT_TX_RATE, //Get Current Tx rate register. 2008.12.10. Added by tynli | ||
1999 | #endif | ||
2000 | HW_VAR_TX_RATE_REG, //Get Current Tx rate register. 2008.12.10. Added by tynli | ||
2001 | HW_VAR_EFUSE_USAGE, //Get current EFUSE utilization. 2008.12.19. Added by Roger. | ||
2002 | HW_VAR_EFUSE_BYTES, | ||
2003 | HW_VAR_AUTOLOAD_STATUS, //Get current autoload status, 0: autoload success, 1: autoload fail. 2008.12.19. Added by Roger. | ||
2004 | HW_VAR_RF_2R_DISABLE, // 2R disable | ||
2005 | HW_VAR_SET_RPWM, | ||
2006 | HW_VAR_H2C_FW_PWRMODE, // For setting FW related H2C cmd structure. by tynli. 2009.2.18 | ||
2007 | HW_VAR_H2C_FW_JOINBSSRPT, // For setting FW related H2C cmd structure. by tynli. 2009.2.18 | ||
2008 | HW_VAR_1X1_RECV_COMBINE, // For 1T2R but only 1SS, Add by hpfan 2009.04.16 hpfan | ||
2009 | HW_VAR_STOP_SEND_BEACON, | ||
2010 | HW_VAR_TSF_TIMER, // Read from TSF register to get the current TSF timer, by Bruce, 2009-07-22. | ||
2011 | HW_VAR_IO_CMD, | ||
2012 | HW_VAR_HANDLE_FW_C2H, //Added by tynli. For handling FW C2H command. 2009.10.07. | ||
2013 | HW_VAR_DL_FW_RSVD_PAGE, //Added by tynli. Download the packets that FW will use to RSVD page. 2009.10.14. | ||
2014 | HW_VAR_AID, //Added by tynli. | ||
2015 | HW_VAR_HW_SEQ_ENABLE, //Added by tynli. 2009.10.20. | ||
2016 | HW_VAR_UPDATE_TSF, //Added by tynli. 2009.10.22. For Hw count TBTT time. | ||
2017 | HW_VAR_BCN_VALID, //Added by tynli. | ||
2018 | HW_VAR_FWLPS_RF_ON //Added by tynli. 2009.11.09. For checking if Fw finishs RF on sequence. | ||
2019 | }HW_VARIABLES; | ||
2020 | |||
2021 | #define RT_CHECK_FOR_HANG_PERIOD 2 | ||
1911 | 2022 | ||
1912 | struct ieee80211_device { | 2023 | struct ieee80211_device { |
1913 | struct net_device *dev; | 2024 | struct net_device *dev; |
1914 | struct ieee80211_security sec; | 2025 | struct ieee80211_security sec; |
1915 | 2026 | ||
2027 | bool need_sw_enc; | ||
2028 | #ifdef ENABLE_LPS | ||
2029 | bool bAwakePktSent; | ||
2030 | u8 LPSDelayCnt; | ||
2031 | bool bIsAggregateFrame; | ||
2032 | bool polling; | ||
2033 | void (*LeisurePSLeave)(struct net_device *dev); | ||
2034 | #endif | ||
2035 | |||
2036 | #ifdef ENABLE_IPS | ||
2037 | bool proto_stoppping; | ||
2038 | bool wx_set_enc; | ||
2039 | struct semaphore ips_sem; | ||
2040 | struct work_struct ips_leave_wq; | ||
2041 | void (*ieee80211_ips_leave_wq) (struct net_device *dev); | ||
2042 | void (*ieee80211_ips_leave)(struct net_device *dev); | ||
2043 | #endif | ||
2044 | void (*SetHwRegHandler)(struct net_device *dev,u8 variable,u8* val); | ||
2045 | u8 (*rtllib_ap_sec_type)(struct ieee80211_device *ieee); | ||
2046 | |||
1916 | //hw security related | 2047 | //hw security related |
1917 | // u8 hwsec_support; //support? | 2048 | // u8 hwsec_support; //support? |
1918 | u8 hwsec_active; //hw security active. | 2049 | u8 hwsec_active; //hw security active. |
@@ -2319,7 +2450,7 @@ struct ieee80211_device { | |||
2319 | * stop_send_bacons is NOT guaranteed to be called only | 2450 | * stop_send_bacons is NOT guaranteed to be called only |
2320 | * after start_send_beacons. | 2451 | * after start_send_beacons. |
2321 | */ | 2452 | */ |
2322 | void (*start_send_beacons) (struct net_device *dev,u16 tx_rate); | 2453 | void (*start_send_beacons) (struct net_device *dev); |
2323 | void (*stop_send_beacons) (struct net_device *dev); | 2454 | void (*stop_send_beacons) (struct net_device *dev); |
2324 | 2455 | ||
2325 | /* power save mode related */ | 2456 | /* power save mode related */ |
@@ -2373,6 +2504,19 @@ struct ieee80211_device { | |||
2373 | u8 priv[0]; | 2504 | u8 priv[0]; |
2374 | }; | 2505 | }; |
2375 | 2506 | ||
2507 | #define RT_RF_OFF_LEVL_ASPM BIT0 // PCI ASPM | ||
2508 | #define RT_RF_OFF_LEVL_CLK_REQ BIT1 // PCI clock request | ||
2509 | #define RT_RF_OFF_LEVL_PCI_D3 BIT2 // PCI D3 mode | ||
2510 | #define RT_RF_OFF_LEVL_HALT_NIC BIT3 // NIC halt, re-initialize hw parameters | ||
2511 | #define RT_RF_OFF_LEVL_FREE_FW BIT4 // FW free, re-download the FW | ||
2512 | #define RT_RF_OFF_LEVL_FW_32K BIT5 // FW in 32k | ||
2513 | #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT6 // Always enable ASPM and Clock Req in initialization. | ||
2514 | #define RT_RF_LPS_DISALBE_2R BIT30 // When LPS is on, disable 2R if no packet is received or transmittd. | ||
2515 | #define RT_RF_LPS_LEVEL_ASPM BIT31 // LPS with ASPM | ||
2516 | #define RT_IN_PS_LEVEL(pPSC, _PS_FLAG) ((pPSC->CurPsLevel & _PS_FLAG) ? true : false) | ||
2517 | #define RT_CLEAR_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel &= (~(_PS_FLAG))) | ||
2518 | #define RT_SET_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel |= _PS_FLAG) | ||
2519 | |||
2376 | #define IEEE_A (1<<0) | 2520 | #define IEEE_A (1<<0) |
2377 | #define IEEE_B (1<<1) | 2521 | #define IEEE_B (1<<1) |
2378 | #define IEEE_G (1<<2) | 2522 | #define IEEE_G (1<<2) |
@@ -2609,9 +2753,9 @@ extern void ieee80211_stop_scan(struct ieee80211_device *ieee); | |||
2609 | extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee); | 2753 | extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee); |
2610 | extern void ieee80211_check_all_nets(struct ieee80211_device *ieee); | 2754 | extern void ieee80211_check_all_nets(struct ieee80211_device *ieee); |
2611 | extern void ieee80211_start_protocol(struct ieee80211_device *ieee); | 2755 | extern void ieee80211_start_protocol(struct ieee80211_device *ieee); |
2612 | extern void ieee80211_stop_protocol(struct ieee80211_device *ieee); | 2756 | extern void ieee80211_stop_protocol(struct ieee80211_device *ieee,u8 shutdown); |
2613 | extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); | 2757 | extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); |
2614 | extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee); | 2758 | extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee,u8 shutdown); |
2615 | extern void ieee80211_reset_queue(struct ieee80211_device *ieee); | 2759 | extern void ieee80211_reset_queue(struct ieee80211_device *ieee); |
2616 | extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee); | 2760 | extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee); |
2617 | extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee); | 2761 | extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee); |
@@ -2798,5 +2942,7 @@ extern int ieee80211_parse_info_param(struct ieee80211_device *ieee, | |||
2798 | struct ieee80211_rx_stats *stats); | 2942 | struct ieee80211_rx_stats *stats); |
2799 | 2943 | ||
2800 | void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index); | 2944 | void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index); |
2945 | void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr); | ||
2946 | void ieee80211_sta_ps_send_pspoll_frame(struct ieee80211_device *ieee); | ||
2801 | #define RT_ASOC_RETRY_LIMIT 5 | 2947 | #define RT_ASOC_RETRY_LIMIT 5 |
2802 | #endif /* IEEE80211_H */ | 2948 | #endif /* IEEE80211_H */ |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c index b1c54932da3e..b3c9bf4b4ea6 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c | |||
@@ -225,7 +225,7 @@ out: | |||
225 | } | 225 | } |
226 | 226 | ||
227 | 227 | ||
228 | void __exit ieee80211_crypto_deinit(void) | 228 | void ieee80211_crypto_deinit(void) |
229 | { | 229 | { |
230 | struct list_head *ptr, *n; | 230 | struct list_head *ptr, *n; |
231 | 231 | ||
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c index ab871b360b5d..1776f7e69bfe 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c | |||
@@ -331,7 +331,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
331 | if (!(keyidx & (1 << 5))) { | 331 | if (!(keyidx & (1 << 5))) { |
332 | if (net_ratelimit()) { | 332 | if (net_ratelimit()) { |
333 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" | 333 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" |
334 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 334 | " flag from %pM\n", hdr->addr2); |
335 | } | 335 | } |
336 | key->dot11RSNAStatsCCMPFormatErrors++; | 336 | key->dot11RSNAStatsCCMPFormatErrors++; |
337 | return -2; | 337 | return -2; |
@@ -344,9 +344,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
344 | } | 344 | } |
345 | if (!key->key_set) { | 345 | if (!key->key_set) { |
346 | if (net_ratelimit()) { | 346 | if (net_ratelimit()) { |
347 | printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT | 347 | printk(KERN_DEBUG "CCMP: received packet from %pM" |
348 | " with keyid=%d that does not have a configured" | 348 | " with keyid=%d that does not have a configured" |
349 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 349 | " key\n", hdr->addr2, keyidx); |
350 | } | 350 | } |
351 | return -3; | 351 | return -3; |
352 | } | 352 | } |
@@ -361,11 +361,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
361 | 361 | ||
362 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { | 362 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { |
363 | if (net_ratelimit()) { | 363 | if (net_ratelimit()) { |
364 | printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT | 364 | //printk(KERN_DEBUG "CCMP: replay detected: STA=%pM" |
365 | " previous PN %02x%02x%02x%02x%02x%02x " | 365 | // " previous PN %pm received PN %pm\n", |
366 | "received PN %02x%02x%02x%02x%02x%02x\n", | 366 | // hdr->addr2, key->rx_pn, pn); |
367 | MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn), | ||
368 | MAC_ARG(pn)); | ||
369 | } | 367 | } |
370 | key->dot11RSNAStatsCCMPReplays++; | 368 | key->dot11RSNAStatsCCMPReplays++; |
371 | return -4; | 369 | return -4; |
@@ -402,7 +400,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
402 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { | 400 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { |
403 | if (net_ratelimit()) { | 401 | if (net_ratelimit()) { |
404 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" | 402 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" |
405 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 403 | "%pM\n", hdr->addr2); |
406 | } | 404 | } |
407 | key->dot11RSNAStatsCCMPDecryptErrors++; | 405 | key->dot11RSNAStatsCCMPDecryptErrors++; |
408 | return -5; | 406 | return -5; |
@@ -477,12 +475,19 @@ static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv) | |||
477 | static char * ieee80211_ccmp_print_stats(char *p, void *priv) | 475 | static char * ieee80211_ccmp_print_stats(char *p, void *priv) |
478 | { | 476 | { |
479 | struct ieee80211_ccmp_data *ccmp = priv; | 477 | struct ieee80211_ccmp_data *ccmp = priv; |
480 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " | 478 | int i; |
481 | "tx_pn=%02x%02x%02x%02x%02x%02x " | 479 | |
482 | "rx_pn=%02x%02x%02x%02x%02x%02x " | 480 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d tx_pn=", |
483 | "format_errors=%d replays=%d decrypt_errors=%d\n", | 481 | ccmp->key_idx, ccmp->key_set); |
484 | ccmp->key_idx, ccmp->key_set, | 482 | |
485 | MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn), | 483 | for (i = 0; i < ARRAY_SIZE(ccmp->tx_pn); i++) |
484 | p += sprintf(p, "%02x", ccmp->tx_pn[i]); | ||
485 | |||
486 | sprintf(p, " rx_pn="); | ||
487 | for (i = 0; i < ARRAY_SIZE(ccmp->rx_pn); i++) | ||
488 | p += sprintf(p, "%02x", ccmp->tx_pn[i]); | ||
489 | |||
490 | p += sprintf(p, " format_errors=%d replays=%d decrypt_errors=%d\n", | ||
486 | ccmp->dot11RSNAStatsCCMPFormatErrors, | 491 | ccmp->dot11RSNAStatsCCMPFormatErrors, |
487 | ccmp->dot11RSNAStatsCCMPReplays, | 492 | ccmp->dot11RSNAStatsCCMPReplays, |
488 | ccmp->dot11RSNAStatsCCMPDecryptErrors); | 493 | ccmp->dot11RSNAStatsCCMPDecryptErrors); |
@@ -519,7 +524,7 @@ int __init ieee80211_crypto_ccmp_init(void) | |||
519 | } | 524 | } |
520 | 525 | ||
521 | 526 | ||
522 | void __exit ieee80211_crypto_ccmp_exit(void) | 527 | void ieee80211_crypto_ccmp_exit(void) |
523 | { | 528 | { |
524 | ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp); | 529 | ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp); |
525 | } | 530 | } |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c index 7a1797e6cbec..03cb21eb0658 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c | |||
@@ -520,7 +520,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
520 | if (!(keyidx & (1 << 5))) { | 520 | if (!(keyidx & (1 << 5))) { |
521 | if (net_ratelimit()) { | 521 | if (net_ratelimit()) { |
522 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" | 522 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" |
523 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 523 | " flag from %pM\n", hdr->addr2); |
524 | } | 524 | } |
525 | return -2; | 525 | return -2; |
526 | } | 526 | } |
@@ -532,9 +532,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
532 | } | 532 | } |
533 | if (!tkey->key_set) { | 533 | if (!tkey->key_set) { |
534 | if (net_ratelimit()) { | 534 | if (net_ratelimit()) { |
535 | printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT | 535 | printk(KERN_DEBUG "TKIP: received packet from %pM" |
536 | " with keyid=%d that does not have a configured" | 536 | " with keyid=%d that does not have a configured" |
537 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 537 | " key\n", hdr->addr2, keyidx); |
538 | } | 538 | } |
539 | return -3; | 539 | return -3; |
540 | } | 540 | } |
@@ -547,9 +547,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
547 | if (iv32 < tkey->rx_iv32 || | 547 | if (iv32 < tkey->rx_iv32 || |
548 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { | 548 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { |
549 | if (net_ratelimit()) { | 549 | if (net_ratelimit()) { |
550 | printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT | 550 | printk(KERN_DEBUG "TKIP: replay detected: STA=%pM" |
551 | " previous TSC %08x%04x received TSC " | 551 | " previous TSC %08x%04x received TSC " |
552 | "%08x%04x\n", MAC_ARG(hdr->addr2), | 552 | "%08x%04x\n", hdr->addr2, |
553 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); | 553 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); |
554 | } | 554 | } |
555 | tkey->dot11RSNAStatsTKIPReplays++; | 555 | tkey->dot11RSNAStatsTKIPReplays++; |
@@ -582,8 +582,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
582 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { | 582 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { |
583 | if (net_ratelimit()) { | 583 | if (net_ratelimit()) { |
584 | printk(KERN_DEBUG ": TKIP: failed to decrypt " | 584 | printk(KERN_DEBUG ": TKIP: failed to decrypt " |
585 | "received packet from " MAC_FMT "\n", | 585 | "received packet from %pM\n", |
586 | MAC_ARG(hdr->addr2)); | 586 | hdr->addr2); |
587 | } | 587 | } |
588 | return -7; | 588 | return -7; |
589 | } | 589 | } |
@@ -606,8 +606,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
606 | tkey->rx_phase1_done = 0; | 606 | tkey->rx_phase1_done = 0; |
607 | } | 607 | } |
608 | if (net_ratelimit()) { | 608 | if (net_ratelimit()) { |
609 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" | 609 | printk(KERN_DEBUG |
610 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 610 | "TKIP: ICV error detected: STA=%pM\n", |
611 | hdr->addr2); | ||
611 | } | 612 | } |
612 | tkey->dot11RSNAStatsTKIPICVErrors++; | 613 | tkey->dot11RSNAStatsTKIPICVErrors++; |
613 | return -5; | 614 | return -5; |
@@ -816,8 +817,8 @@ static void ieee80211_michael_mic_failure(struct net_device *dev, | |||
816 | 817 | ||
817 | /* TODO: needed parameters: count, keyid, key type, TSC */ | 818 | /* TODO: needed parameters: count, keyid, key type, TSC */ |
818 | sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr=" | 819 | sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr=" |
819 | MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni", | 820 | "%pM)", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni", |
820 | MAC_ARG(hdr->addr2)); | 821 | hdr->addr2); |
821 | memset(&wrqu, 0, sizeof(wrqu)); | 822 | memset(&wrqu, 0, sizeof(wrqu)); |
822 | wrqu.data.length = strlen(buf); | 823 | wrqu.data.length = strlen(buf); |
823 | wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf); | 824 | wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf); |
@@ -862,8 +863,8 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx, | |||
862 | struct ieee80211_hdr_4addr *hdr; | 863 | struct ieee80211_hdr_4addr *hdr; |
863 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 864 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
864 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " | 865 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " |
865 | "MSDU from " MAC_FMT " keyidx=%d\n", | 866 | "MSDU from %pM keyidx=%d\n", |
866 | skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2), | 867 | skb->dev ? skb->dev->name : "N/A", hdr->addr2, |
867 | keyidx); | 868 | keyidx); |
868 | if (skb->dev) | 869 | if (skb->dev) |
869 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); | 870 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); |
@@ -1011,7 +1012,7 @@ int __init ieee80211_crypto_tkip_init(void) | |||
1011 | } | 1012 | } |
1012 | 1013 | ||
1013 | 1014 | ||
1014 | void __exit ieee80211_crypto_tkip_exit(void) | 1015 | void ieee80211_crypto_tkip_exit(void) |
1015 | { | 1016 | { |
1016 | ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip); | 1017 | ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip); |
1017 | } | 1018 | } |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c index 06d91715143c..ce265ae5fe18 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c | |||
@@ -312,6 +312,17 @@ static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee, | |||
312 | if (skb->len < 24) | 312 | if (skb->len < 24) |
313 | return 0; | 313 | return 0; |
314 | 314 | ||
315 | #if 1 | ||
316 | if (ieee->hwsec_active) | ||
317 | { | ||
318 | cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE); | ||
319 | tcb_desc->bHwSec = 1; | ||
320 | |||
321 | if(ieee->need_sw_enc) | ||
322 | tcb_desc->bHwSec = 0; | ||
323 | } | ||
324 | #endif | ||
325 | |||
315 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 326 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
316 | fc = le16_to_cpu(hdr->frame_ctl); | 327 | fc = le16_to_cpu(hdr->frame_ctl); |
317 | 328 | ||
@@ -366,8 +377,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
366 | strcmp(crypt->ops->name, "TKIP") == 0) { | 377 | strcmp(crypt->ops->name, "TKIP") == 0) { |
367 | if (net_ratelimit()) { | 378 | if (net_ratelimit()) { |
368 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 379 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
369 | "received packet from " MAC_FMT "\n", | 380 | "received packet from %pM\n", |
370 | ieee->dev->name, MAC_ARG(hdr->addr2)); | 381 | ieee->dev->name, hdr->addr2); |
371 | } | 382 | } |
372 | return -1; | 383 | return -1; |
373 | } | 384 | } |
@@ -378,8 +389,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
378 | atomic_dec(&crypt->refcnt); | 389 | atomic_dec(&crypt->refcnt); |
379 | if (res < 0) { | 390 | if (res < 0) { |
380 | IEEE80211_DEBUG_DROP( | 391 | IEEE80211_DEBUG_DROP( |
381 | "decryption failed (SA=" MAC_FMT | 392 | "decryption failed (SA=%pM" |
382 | ") res=%d\n", MAC_ARG(hdr->addr2), res); | 393 | ") res=%d\n", hdr->addr2, res); |
383 | if (res == -2) | 394 | if (res == -2) |
384 | IEEE80211_DEBUG_DROP("Decryption failed ICV " | 395 | IEEE80211_DEBUG_DROP("Decryption failed ICV " |
385 | "mismatch (key %d)\n", | 396 | "mismatch (key %d)\n", |
@@ -406,6 +417,10 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s | |||
406 | { | 417 | { |
407 | cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE); | 418 | cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE); |
408 | tcb_desc->bHwSec = 1; | 419 | tcb_desc->bHwSec = 1; |
420 | |||
421 | if(ieee->need_sw_enc) | ||
422 | tcb_desc->bHwSec = 0; | ||
423 | |||
409 | } | 424 | } |
410 | 425 | ||
411 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 426 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
@@ -416,8 +431,8 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s | |||
416 | atomic_dec(&crypt->refcnt); | 431 | atomic_dec(&crypt->refcnt); |
417 | if (res < 0) { | 432 | if (res < 0) { |
418 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" | 433 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" |
419 | " (SA=" MAC_FMT " keyidx=%d)\n", | 434 | " (SA=%pM keyidx=%d)\n", |
420 | ieee->dev->name, MAC_ARG(hdr->addr2), keyidx); | 435 | ieee->dev->name, hdr->addr2, keyidx); |
421 | return -1; | 436 | return -1; |
422 | } | 437 | } |
423 | 438 | ||
@@ -799,7 +814,7 @@ void RxReorderIndicatePacket( struct ieee80211_device *ieee, | |||
799 | #endif | 814 | #endif |
800 | } | 815 | } |
801 | 816 | ||
802 | u8 parse_subframe(struct sk_buff *skb, | 817 | u8 parse_subframe(struct ieee80211_device* ieee,struct sk_buff *skb, |
803 | struct ieee80211_rx_stats *rx_stats, | 818 | struct ieee80211_rx_stats *rx_stats, |
804 | struct ieee80211_rxb *rxb,u8* src,u8* dst) | 819 | struct ieee80211_rxb *rxb,u8* src,u8* dst) |
805 | { | 820 | { |
@@ -839,6 +854,7 @@ u8 parse_subframe(struct sk_buff *skb, | |||
839 | } | 854 | } |
840 | 855 | ||
841 | skb_pull(skb, LLCOffset); | 856 | skb_pull(skb, LLCOffset); |
857 | ieee->bIsAggregateFrame = bIsAggregateFrame;//added by amy for Leisure PS | ||
842 | 858 | ||
843 | if(!bIsAggregateFrame) { | 859 | if(!bIsAggregateFrame) { |
844 | rxb->nr_subframes = 1; | 860 | rxb->nr_subframes = 1; |
@@ -940,6 +956,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
940 | u8 TID = 0; | 956 | u8 TID = 0; |
941 | u16 SeqNum = 0; | 957 | u16 SeqNum = 0; |
942 | PRX_TS_RECORD pTS = NULL; | 958 | PRX_TS_RECORD pTS = NULL; |
959 | bool unicast_packet = false; | ||
943 | //bool bIsAggregateFrame = false; | 960 | //bool bIsAggregateFrame = false; |
944 | //added by amy for reorder | 961 | //added by amy for reorder |
945 | #ifdef NOT_YET | 962 | #ifdef NOT_YET |
@@ -1045,8 +1062,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1045 | * frames silently instead of filling system log with | 1062 | * frames silently instead of filling system log with |
1046 | * these reports. */ | 1063 | * these reports. */ |
1047 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" | 1064 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" |
1048 | " (SA=" MAC_FMT ")\n", | 1065 | " (SA=%pM)\n", |
1049 | MAC_ARG(hdr->addr2)); | 1066 | hdr->addr2); |
1050 | ieee->ieee_stats.rx_discards_undecryptable++; | 1067 | ieee->ieee_stats.rx_discards_undecryptable++; |
1051 | goto rx_dropped; | 1068 | goto rx_dropped; |
1052 | } | 1069 | } |
@@ -1114,8 +1131,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1114 | (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0) | 1131 | (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0) |
1115 | { | 1132 | { |
1116 | printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth " | 1133 | printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth " |
1117 | "from " MAC_FMT "\n", dev->name, | 1134 | "from %pM\n", dev->name, |
1118 | MAC_ARG(hdr->addr2)); | 1135 | hdr->addr2); |
1119 | /* TODO: could inform hostapd about this so that it | 1136 | /* TODO: could inform hostapd about this so that it |
1120 | * could send auth failure report */ | 1137 | * could send auth failure report */ |
1121 | goto rx_dropped; | 1138 | goto rx_dropped; |
@@ -1215,6 +1232,24 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1215 | if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) | 1232 | if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) |
1216 | goto rx_dropped; | 1233 | goto rx_dropped; |
1217 | 1234 | ||
1235 | #ifdef ENABLE_LPS | ||
1236 | if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->sta_sleep == 1) | ||
1237 | && (ieee->polling)) { | ||
1238 | if (WLAN_FC_MORE_DATA(fc)) { | ||
1239 | /* more data bit is set, let's request a new frame from the AP */ | ||
1240 | ieee80211_sta_ps_send_pspoll_frame(ieee); | ||
1241 | } else { | ||
1242 | ieee->polling = false; | ||
1243 | } | ||
1244 | } | ||
1245 | #endif | ||
1246 | |||
1247 | ieee->need_sw_enc = 0; | ||
1248 | |||
1249 | if((!rx_stats->Decrypted)){ | ||
1250 | ieee->need_sw_enc = 1; | ||
1251 | } | ||
1252 | |||
1218 | /* skb: hdr + (possibly fragmented, possibly encrypted) payload */ | 1253 | /* skb: hdr + (possibly fragmented, possibly encrypted) payload */ |
1219 | 1254 | ||
1220 | if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) && | 1255 | if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) && |
@@ -1296,6 +1331,9 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1296 | ieee->LinkDetectInfo.NumRxOkInPeriod++; | 1331 | ieee->LinkDetectInfo.NumRxOkInPeriod++; |
1297 | 1332 | ||
1298 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 1333 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
1334 | if((!is_multicast_ether_addr(hdr->addr1)) && (!is_broadcast_ether_addr(hdr->addr1))) | ||
1335 | unicast_packet = true; | ||
1336 | |||
1299 | if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) { | 1337 | if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) { |
1300 | if (/*ieee->ieee802_1x &&*/ | 1338 | if (/*ieee->ieee802_1x &&*/ |
1301 | ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { | 1339 | ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { |
@@ -1311,8 +1349,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1311 | } else { | 1349 | } else { |
1312 | IEEE80211_DEBUG_DROP( | 1350 | IEEE80211_DEBUG_DROP( |
1313 | "encryption configured, but RX " | 1351 | "encryption configured, but RX " |
1314 | "frame not encrypted (SA=" MAC_FMT ")\n", | 1352 | "frame not encrypted (SA=%pM)\n", |
1315 | MAC_ARG(hdr->addr2)); | 1353 | hdr->addr2); |
1316 | goto rx_dropped; | 1354 | goto rx_dropped; |
1317 | } | 1355 | } |
1318 | } | 1356 | } |
@@ -1331,9 +1369,9 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1331 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { | 1369 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { |
1332 | IEEE80211_DEBUG_DROP( | 1370 | IEEE80211_DEBUG_DROP( |
1333 | "dropped unencrypted RX data " | 1371 | "dropped unencrypted RX data " |
1334 | "frame from " MAC_FMT | 1372 | "frame from %pM" |
1335 | " (drop_unencrypted=1)\n", | 1373 | " (drop_unencrypted=1)\n", |
1336 | MAC_ARG(hdr->addr2)); | 1374 | hdr->addr2); |
1337 | goto rx_dropped; | 1375 | goto rx_dropped; |
1338 | } | 1376 | } |
1339 | /* | 1377 | /* |
@@ -1367,7 +1405,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1367 | } | 1405 | } |
1368 | /* to parse amsdu packets */ | 1406 | /* to parse amsdu packets */ |
1369 | /* qos data packets & reserved bit is 1 */ | 1407 | /* qos data packets & reserved bit is 1 */ |
1370 | if(parse_subframe(skb,rx_stats,rxb,src,dst) == 0) { | 1408 | if(parse_subframe(ieee, skb,rx_stats,rxb,src,dst) == 0) { |
1371 | /* only to free rxb, and not submit the packets to upper layer */ | 1409 | /* only to free rxb, and not submit the packets to upper layer */ |
1372 | for(i =0; i < rxb->nr_subframes; i++) { | 1410 | for(i =0; i < rxb->nr_subframes; i++) { |
1373 | dev_kfree_skb(rxb->subframes[i]); | 1411 | dev_kfree_skb(rxb->subframes[i]); |
@@ -1377,6 +1415,32 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1377 | goto rx_dropped; | 1415 | goto rx_dropped; |
1378 | } | 1416 | } |
1379 | 1417 | ||
1418 | #ifdef ENABLE_LPS | ||
1419 | if(unicast_packet) | ||
1420 | { | ||
1421 | if (type == IEEE80211_FTYPE_DATA) | ||
1422 | { | ||
1423 | |||
1424 | if(ieee->bIsAggregateFrame) | ||
1425 | ieee->LinkDetectInfo.NumRxUnicastOkInPeriod+=rxb->nr_subframes; | ||
1426 | else | ||
1427 | ieee->LinkDetectInfo.NumRxUnicastOkInPeriod++; | ||
1428 | |||
1429 | // 2009.03.03 Leave DC mode immediately when detect high traffic | ||
1430 | // DbgPrint("ending Seq %d\n", Frame_SeqNum(pduOS)); | ||
1431 | if((ieee->state == IEEE80211_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) | ||
1432 | { | ||
1433 | if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || | ||
1434 | (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) | ||
1435 | { | ||
1436 | if(ieee->LeisurePSLeave) | ||
1437 | ieee->LeisurePSLeave(dev); | ||
1438 | } | ||
1439 | } | ||
1440 | } | ||
1441 | } | ||
1442 | #endif | ||
1443 | |||
1380 | ieee->last_rx_ps_time = jiffies; | 1444 | ieee->last_rx_ps_time = jiffies; |
1381 | //added by amy for reorder | 1445 | //added by amy for reorder |
1382 | if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL){ | 1446 | if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL){ |
@@ -2013,12 +2077,22 @@ int ieee80211_parse_info_param(struct ieee80211_device *ieee, | |||
2013 | info_element->data[1] == 0x13 && | 2077 | info_element->data[1] == 0x13 && |
2014 | info_element->data[2] == 0x74)) | 2078 | info_element->data[2] == 0x74)) |
2015 | { | 2079 | { |
2016 | printk("========>%s(): athros AP is exist\n",__FUNCTION__); | 2080 | //printk("========>%s(): athros AP is exist\n",__FUNCTION__); |
2017 | network->atheros_cap_exist = true; | 2081 | network->atheros_cap_exist = true; |
2018 | } | 2082 | } |
2019 | else | 2083 | else |
2020 | network->atheros_cap_exist = false; | 2084 | network->atheros_cap_exist = false; |
2021 | 2085 | ||
2086 | if ((info_element->len >= 3 && | ||
2087 | info_element->data[0] == 0x00 && | ||
2088 | info_element->data[1] == 0x50 && | ||
2089 | info_element->data[2] == 0x43) ) | ||
2090 | { | ||
2091 | network->marvell_cap_exist = true; | ||
2092 | //printk("========>%s(): marvel AP is exist\n",__FUNCTION__); | ||
2093 | } | ||
2094 | |||
2095 | |||
2022 | if(info_element->len >= 3 && | 2096 | if(info_element->len >= 3 && |
2023 | info_element->data[0] == 0x00 && | 2097 | info_element->data[0] == 0x00 && |
2024 | info_element->data[1] == 0x40 && | 2098 | info_element->data[1] == 0x40 && |
@@ -2219,7 +2293,8 @@ int ieee80211_parse_info_param(struct ieee80211_device *ieee, | |||
2219 | } | 2293 | } |
2220 | 2294 | ||
2221 | if(!network->atheros_cap_exist && !network->broadcom_cap_exist && | 2295 | if(!network->atheros_cap_exist && !network->broadcom_cap_exist && |
2222 | !network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation) | 2296 | !network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation && |
2297 | !network->marvell_cap_exist) | ||
2223 | { | 2298 | { |
2224 | network->unknown_cap_exist = true; | 2299 | network->unknown_cap_exist = true; |
2225 | } | 2300 | } |
@@ -2333,6 +2408,7 @@ static inline int ieee80211_network_init( | |||
2333 | network->broadcom_cap_exist = false; | 2408 | network->broadcom_cap_exist = false; |
2334 | network->ralink_cap_exist = false; | 2409 | network->ralink_cap_exist = false; |
2335 | network->atheros_cap_exist = false; | 2410 | network->atheros_cap_exist = false; |
2411 | network->marvell_cap_exist = false; | ||
2336 | network->cisco_cap_exist = false; | 2412 | network->cisco_cap_exist = false; |
2337 | network->unknown_cap_exist = false; | 2413 | network->unknown_cap_exist = false; |
2338 | #ifdef THOMAS_TURBO | 2414 | #ifdef THOMAS_TURBO |
@@ -2369,11 +2445,11 @@ static inline int ieee80211_network_init( | |||
2369 | } | 2445 | } |
2370 | 2446 | ||
2371 | if (network->mode == 0) { | 2447 | if (network->mode == 0) { |
2372 | IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' " | 2448 | IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' " |
2373 | "network.\n", | 2449 | "network.\n", |
2374 | escape_essid(network->ssid, | 2450 | escape_essid(network->ssid, |
2375 | network->ssid_len), | 2451 | network->ssid_len), |
2376 | MAC_ARG(network->bssid)); | 2452 | network->bssid); |
2377 | return 1; | 2453 | return 1; |
2378 | } | 2454 | } |
2379 | 2455 | ||
@@ -2463,6 +2539,7 @@ static inline void update_network(struct ieee80211_network *dst, | |||
2463 | dst->broadcom_cap_exist = src->broadcom_cap_exist; | 2539 | dst->broadcom_cap_exist = src->broadcom_cap_exist; |
2464 | dst->ralink_cap_exist = src->ralink_cap_exist; | 2540 | dst->ralink_cap_exist = src->ralink_cap_exist; |
2465 | dst->atheros_cap_exist = src->atheros_cap_exist; | 2541 | dst->atheros_cap_exist = src->atheros_cap_exist; |
2542 | dst->marvell_cap_exist = src->marvell_cap_exist; | ||
2466 | dst->cisco_cap_exist = src->cisco_cap_exist; | 2543 | dst->cisco_cap_exist = src->cisco_cap_exist; |
2467 | dst->unknown_cap_exist = src->unknown_cap_exist; | 2544 | dst->unknown_cap_exist = src->unknown_cap_exist; |
2468 | memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len); | 2545 | memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len); |
@@ -2557,9 +2634,9 @@ static inline void ieee80211_process_probe_response( | |||
2557 | 2634 | ||
2558 | memset(&network, 0, sizeof(struct ieee80211_network)); | 2635 | memset(&network, 0, sizeof(struct ieee80211_network)); |
2559 | IEEE80211_DEBUG_SCAN( | 2636 | IEEE80211_DEBUG_SCAN( |
2560 | "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", | 2637 | "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", |
2561 | escape_essid(info_element->data, info_element->len), | 2638 | escape_essid(info_element->data, info_element->len), |
2562 | MAC_ARG(beacon->header.addr3), | 2639 | beacon->header.addr3, |
2563 | (beacon->capability & (1<<0xf)) ? '1' : '0', | 2640 | (beacon->capability & (1<<0xf)) ? '1' : '0', |
2564 | (beacon->capability & (1<<0xe)) ? '1' : '0', | 2641 | (beacon->capability & (1<<0xe)) ? '1' : '0', |
2565 | (beacon->capability & (1<<0xd)) ? '1' : '0', | 2642 | (beacon->capability & (1<<0xd)) ? '1' : '0', |
@@ -2578,10 +2655,10 @@ static inline void ieee80211_process_probe_response( | |||
2578 | (beacon->capability & (1<<0x0)) ? '1' : '0'); | 2655 | (beacon->capability & (1<<0x0)) ? '1' : '0'); |
2579 | 2656 | ||
2580 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { | 2657 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { |
2581 | IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n", | 2658 | IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n", |
2582 | escape_essid(info_element->data, | 2659 | escape_essid(info_element->data, |
2583 | info_element->len), | 2660 | info_element->len), |
2584 | MAC_ARG(beacon->header.addr3), | 2661 | beacon->header.addr3, |
2585 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2662 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2586 | IEEE80211_STYPE_PROBE_RESP ? | 2663 | IEEE80211_STYPE_PROBE_RESP ? |
2587 | "PROBE RESPONSE" : "BEACON"); | 2664 | "PROBE RESPONSE" : "BEACON"); |
@@ -2692,11 +2769,11 @@ static inline void ieee80211_process_probe_response( | |||
2692 | /* If there are no more slots, expire the oldest */ | 2769 | /* If there are no more slots, expire the oldest */ |
2693 | list_del(&oldest->list); | 2770 | list_del(&oldest->list); |
2694 | target = oldest; | 2771 | target = oldest; |
2695 | IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from " | 2772 | IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from " |
2696 | "network list.\n", | 2773 | "network list.\n", |
2697 | escape_essid(target->ssid, | 2774 | escape_essid(target->ssid, |
2698 | target->ssid_len), | 2775 | target->ssid_len), |
2699 | MAC_ARG(target->bssid)); | 2776 | target->bssid); |
2700 | } else { | 2777 | } else { |
2701 | /* Otherwise just pull from the free list */ | 2778 | /* Otherwise just pull from the free list */ |
2702 | target = list_entry(ieee->network_free_list.next, | 2779 | target = list_entry(ieee->network_free_list.next, |
@@ -2706,10 +2783,10 @@ static inline void ieee80211_process_probe_response( | |||
2706 | 2783 | ||
2707 | 2784 | ||
2708 | #ifdef CONFIG_IEEE80211_DEBUG | 2785 | #ifdef CONFIG_IEEE80211_DEBUG |
2709 | IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n", | 2786 | IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n", |
2710 | escape_essid(network.ssid, | 2787 | escape_essid(network.ssid, |
2711 | network.ssid_len), | 2788 | network.ssid_len), |
2712 | MAC_ARG(network.bssid), | 2789 | network.bssid, |
2713 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2790 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2714 | IEEE80211_STYPE_PROBE_RESP ? | 2791 | IEEE80211_STYPE_PROBE_RESP ? |
2715 | "PROBE RESPONSE" : "BEACON"); | 2792 | "PROBE RESPONSE" : "BEACON"); |
@@ -2719,10 +2796,10 @@ static inline void ieee80211_process_probe_response( | |||
2719 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) | 2796 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) |
2720 | ieee80211_softmac_new_net(ieee,&network); | 2797 | ieee80211_softmac_new_net(ieee,&network); |
2721 | } else { | 2798 | } else { |
2722 | IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n", | 2799 | IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n", |
2723 | escape_essid(target->ssid, | 2800 | escape_essid(target->ssid, |
2724 | target->ssid_len), | 2801 | target->ssid_len), |
2725 | MAC_ARG(target->bssid), | 2802 | target->bssid, |
2726 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2803 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2727 | IEEE80211_STYPE_PROBE_RESP ? | 2804 | IEEE80211_STYPE_PROBE_RESP ? |
2728 | "PROBE RESPONSE" : "BEACON"); | 2805 | "PROBE RESPONSE" : "BEACON"); |
@@ -2761,12 +2838,14 @@ void ieee80211_rx_mgt(struct ieee80211_device *ieee, | |||
2761 | struct ieee80211_hdr_4addr *header, | 2838 | struct ieee80211_hdr_4addr *header, |
2762 | struct ieee80211_rx_stats *stats) | 2839 | struct ieee80211_rx_stats *stats) |
2763 | { | 2840 | { |
2841 | #if 0 | ||
2764 | if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED && | 2842 | if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED && |
2765 | ieee->iw_mode == IW_MODE_INFRA && | 2843 | ieee->iw_mode == IW_MODE_INFRA && |
2766 | ieee->state == IEEE80211_LINKED)) | 2844 | ieee->state == IEEE80211_LINKED)) |
2767 | { | 2845 | { |
2768 | tasklet_schedule(&ieee->ps_task); | 2846 | tasklet_schedule(&ieee->ps_task); |
2769 | } | 2847 | } |
2848 | #endif | ||
2770 | 2849 | ||
2771 | if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP && | 2850 | if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP && |
2772 | WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON) | 2851 | WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON) |
@@ -2780,6 +2859,15 @@ void ieee80211_rx_mgt(struct ieee80211_device *ieee, | |||
2780 | IEEE80211_DEBUG_SCAN("Beacon\n"); | 2859 | IEEE80211_DEBUG_SCAN("Beacon\n"); |
2781 | ieee80211_process_probe_response( | 2860 | ieee80211_process_probe_response( |
2782 | ieee, (struct ieee80211_probe_response *)header, stats); | 2861 | ieee, (struct ieee80211_probe_response *)header, stats); |
2862 | |||
2863 | //printk("----------->%s()\n", __func__); | ||
2864 | if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED && | ||
2865 | ieee->iw_mode == IW_MODE_INFRA && | ||
2866 | ieee->state == IEEE80211_LINKED)) | ||
2867 | { | ||
2868 | tasklet_schedule(&ieee->ps_task); | ||
2869 | } | ||
2870 | |||
2783 | break; | 2871 | break; |
2784 | 2872 | ||
2785 | case IEEE80211_STYPE_PROBE_RESP: | 2873 | case IEEE80211_STYPE_PROBE_RESP: |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c index 6d1ddec39f0e..ea96c4956930 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c | |||
@@ -646,7 +646,7 @@ void ieee80211_stop_send_beacons(struct ieee80211_device *ieee) | |||
646 | void ieee80211_start_send_beacons(struct ieee80211_device *ieee) | 646 | void ieee80211_start_send_beacons(struct ieee80211_device *ieee) |
647 | { | 647 | { |
648 | if(ieee->start_send_beacons) | 648 | if(ieee->start_send_beacons) |
649 | ieee->start_send_beacons(ieee->dev,ieee->basic_rate); | 649 | ieee->start_send_beacons(ieee->dev); |
650 | if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS) | 650 | if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS) |
651 | ieee80211_beacons_start(ieee); | 651 | ieee80211_beacons_start(ieee); |
652 | } | 652 | } |
@@ -686,6 +686,11 @@ void ieee80211_stop_scan(struct ieee80211_device *ieee) | |||
686 | /* called with ieee->lock held */ | 686 | /* called with ieee->lock held */ |
687 | void ieee80211_rtl_start_scan(struct ieee80211_device *ieee) | 687 | void ieee80211_rtl_start_scan(struct ieee80211_device *ieee) |
688 | { | 688 | { |
689 | #ifdef ENABLE_IPS | ||
690 | if(ieee->ieee80211_ips_leave_wq != NULL) | ||
691 | ieee->ieee80211_ips_leave_wq(ieee->dev); | ||
692 | #endif | ||
693 | |||
689 | #ifdef ENABLE_DOT11D | 694 | #ifdef ENABLE_DOT11D |
690 | if(IS_DOT11D_ENABLE(ieee) ) | 695 | if(IS_DOT11D_ENABLE(ieee) ) |
691 | { | 696 | { |
@@ -1093,6 +1098,40 @@ struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr) | |||
1093 | 1098 | ||
1094 | } | 1099 | } |
1095 | 1100 | ||
1101 | struct sk_buff* ieee80211_pspoll_func(struct ieee80211_device *ieee) | ||
1102 | { | ||
1103 | struct sk_buff *skb; | ||
1104 | struct ieee80211_pspoll_hdr* hdr; | ||
1105 | |||
1106 | #ifdef USB_USE_ALIGNMENT | ||
1107 | u32 Tmpaddr=0; | ||
1108 | int alignment=0; | ||
1109 | skb = dev_alloc_skb(sizeof(struct ieee80211_pspoll_hdr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE); | ||
1110 | #else | ||
1111 | skb = dev_alloc_skb(sizeof(struct ieee80211_pspoll_hdr)+ieee->tx_headroom); | ||
1112 | #endif | ||
1113 | if (!skb) | ||
1114 | return NULL; | ||
1115 | |||
1116 | #ifdef USB_USE_ALIGNMENT | ||
1117 | Tmpaddr = (u32)skb->data; | ||
1118 | alignment = Tmpaddr & 0x1ff; | ||
1119 | skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment)); | ||
1120 | #endif | ||
1121 | skb_reserve(skb, ieee->tx_headroom); | ||
1122 | |||
1123 | hdr = (struct ieee80211_pspoll_hdr*)skb_put(skb,sizeof(struct ieee80211_pspoll_hdr)); | ||
1124 | |||
1125 | memcpy(hdr->bssid, ieee->current_network.bssid, ETH_ALEN); | ||
1126 | memcpy(hdr->ta, ieee->dev->dev_addr, ETH_ALEN); | ||
1127 | |||
1128 | hdr->aid = cpu_to_le16(ieee->assoc_id | 0xc000); | ||
1129 | hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_CTL |IEEE80211_STYPE_PSPOLL | IEEE80211_FCTL_PM); | ||
1130 | |||
1131 | return skb; | ||
1132 | |||
1133 | } | ||
1134 | |||
1096 | 1135 | ||
1097 | void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest) | 1136 | void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest) |
1098 | { | 1137 | { |
@@ -1582,6 +1621,11 @@ void ieee80211_associate_procedure_wq(struct ieee80211_device *ieee) | |||
1582 | { | 1621 | { |
1583 | #endif | 1622 | #endif |
1584 | ieee->sync_scan_hurryup = 1; | 1623 | ieee->sync_scan_hurryup = 1; |
1624 | #ifdef ENABLE_IPS | ||
1625 | if(ieee->ieee80211_ips_leave != NULL) | ||
1626 | ieee->ieee80211_ips_leave(ieee->dev); | ||
1627 | #endif | ||
1628 | |||
1585 | down(&ieee->wx_sem); | 1629 | down(&ieee->wx_sem); |
1586 | 1630 | ||
1587 | if (ieee->data_hard_stop) | 1631 | if (ieee->data_hard_stop) |
@@ -1592,6 +1636,17 @@ void ieee80211_associate_procedure_wq(struct ieee80211_device *ieee) | |||
1592 | //ieee->set_chan(ieee->dev, ieee->current_network.channel); | 1636 | //ieee->set_chan(ieee->dev, ieee->current_network.channel); |
1593 | HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT); | 1637 | HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT); |
1594 | 1638 | ||
1639 | #ifdef ENABLE_IPS | ||
1640 | if(ieee->eRFPowerState == eRfOff) | ||
1641 | { | ||
1642 | if(ieee->ieee80211_ips_leave_wq != NULL) | ||
1643 | ieee->ieee80211_ips_leave_wq(ieee->dev); | ||
1644 | |||
1645 | up(&ieee->wx_sem); | ||
1646 | return; | ||
1647 | } | ||
1648 | #endif | ||
1649 | |||
1595 | ieee->associate_seq = 1; | 1650 | ieee->associate_seq = 1; |
1596 | ieee80211_associate_step1(ieee); | 1651 | ieee80211_associate_step1(ieee); |
1597 | 1652 | ||
@@ -1897,7 +1952,7 @@ ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb) | |||
1897 | ieee80211_resp_to_assoc_rq(ieee, dest); | 1952 | ieee80211_resp_to_assoc_rq(ieee, dest); |
1898 | } | 1953 | } |
1899 | 1954 | ||
1900 | printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest)); | 1955 | printk(KERN_INFO"New client associated: %pM\n", dest); |
1901 | //FIXME | 1956 | //FIXME |
1902 | #if 0 | 1957 | #if 0 |
1903 | spin_lock_irqsave(&ieee->lock,flags); | 1958 | spin_lock_irqsave(&ieee->lock,flags); |
@@ -1918,43 +1973,92 @@ void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr) | |||
1918 | 1973 | ||
1919 | } | 1974 | } |
1920 | 1975 | ||
1976 | void ieee80211_sta_ps_send_pspoll_frame(struct ieee80211_device *ieee) | ||
1977 | { | ||
1978 | |||
1979 | struct sk_buff *buf = ieee80211_pspoll_func(ieee); | ||
1980 | |||
1981 | if (buf) | ||
1982 | softmac_ps_mgmt_xmit(buf, ieee); | ||
1983 | |||
1984 | } | ||
1921 | 1985 | ||
1922 | short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l) | 1986 | short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l) |
1923 | { | 1987 | { |
1924 | int timeout = ieee->ps_timeout; | 1988 | int timeout = ieee->ps_timeout; |
1925 | u8 dtim; | 1989 | u8 dtim; |
1926 | /*if(ieee->ps == IEEE80211_PS_DISABLED || | 1990 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(ieee->PowerSaveControl)); |
1927 | ieee->iw_mode != IW_MODE_INFRA || | ||
1928 | ieee->state != IEEE80211_LINKED) | ||
1929 | 1991 | ||
1992 | if(ieee->LPSDelayCnt) | ||
1993 | { | ||
1994 | //printk("===============>Delay enter LPS for DHCP and ARP packets...\n"); | ||
1995 | ieee->LPSDelayCnt --; | ||
1930 | return 0; | 1996 | return 0; |
1931 | */ | 1997 | } |
1998 | |||
1932 | dtim = ieee->current_network.dtim_data; | 1999 | dtim = ieee->current_network.dtim_data; |
1933 | //printk("DTIM\n"); | 2000 | // printk("%s():DTIM:%d\n",__FUNCTION__,dtim); |
1934 | if(!(dtim & IEEE80211_DTIM_VALID)) | 2001 | if(!(dtim & IEEE80211_DTIM_VALID)) |
1935 | return 0; | 2002 | return 0; |
1936 | timeout = ieee->current_network.beacon_interval; //should we use ps_timeout value or beacon_interval | 2003 | timeout = ieee->current_network.beacon_interval; //should we use ps_timeout value or beacon_interval |
1937 | //printk("VALID\n"); | 2004 | //printk("VALID\n"); |
1938 | ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID; | 2005 | ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID; |
1939 | 2006 | /* there's no need to nofity AP that I find you buffered with broadcast packet */ | |
1940 | if(dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST)& ieee->ps)) | 2007 | if(dtim & (IEEE80211_DTIM_UCAST & ieee->ps)) |
1941 | return 2; | 2008 | return 2; |
1942 | 2009 | ||
1943 | if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout))) | 2010 | if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout))){ |
2011 | // printk("%s():111Oh Oh ,it is not time out return 0\n",__FUNCTION__); | ||
1944 | return 0; | 2012 | return 0; |
1945 | 2013 | } | |
1946 | if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout))) | 2014 | if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout))){ |
2015 | // printk("%s():222Oh Oh ,it is not time out return 0\n",__FUNCTION__); | ||
1947 | return 0; | 2016 | return 0; |
1948 | 2017 | } | |
1949 | if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) && | 2018 | if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) && |
1950 | (ieee->mgmt_queue_tail != ieee->mgmt_queue_head)) | 2019 | (ieee->mgmt_queue_tail != ieee->mgmt_queue_head)) |
1951 | return 0; | 2020 | return 0; |
1952 | 2021 | ||
1953 | if(time_l){ | 2022 | if(time_l){ |
2023 | if(ieee->bAwakePktSent == true) { | ||
2024 | pPSC->LPSAwakeIntvl = 1;//tx wake one beacon | ||
2025 | } else { | ||
2026 | u8 MaxPeriod = 1; | ||
2027 | |||
2028 | if(pPSC->LPSAwakeIntvl == 0) | ||
2029 | pPSC->LPSAwakeIntvl = 1; | ||
2030 | //pNdisCommon->RegLPSMaxIntvl /// 0x0 - eFastPs, 0xFF -DTIM, 0xNN - 0xNN * BeaconIntvl | ||
2031 | if(pPSC->RegMaxLPSAwakeIntvl == 0) // Default (0x0 - eFastPs, 0xFF -DTIM, 0xNN - 0xNN * BeaconIntvl) | ||
2032 | MaxPeriod = 1; // 1 Beacon interval | ||
2033 | else if(pPSC->RegMaxLPSAwakeIntvl == 0xFF) // DTIM | ||
2034 | MaxPeriod = ieee->current_network.dtim_period; | ||
2035 | else | ||
2036 | MaxPeriod = pPSC->RegMaxLPSAwakeIntvl; | ||
2037 | pPSC->LPSAwakeIntvl = (pPSC->LPSAwakeIntvl >= MaxPeriod) ? MaxPeriod : (pPSC->LPSAwakeIntvl + 1); | ||
2038 | } | ||
2039 | { | ||
2040 | u8 LPSAwakeIntvl_tmp = 0; | ||
2041 | u8 period = ieee->current_network.dtim_period; | ||
2042 | u8 count = ieee->current_network.tim.tim_count; | ||
2043 | if(count == 0 ) { | ||
2044 | if(pPSC->LPSAwakeIntvl > period) | ||
2045 | LPSAwakeIntvl_tmp = period + (pPSC->LPSAwakeIntvl - period) -((pPSC->LPSAwakeIntvl-period)%period); | ||
2046 | else | ||
2047 | LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl; | ||
2048 | |||
2049 | } else { | ||
2050 | if(pPSC->LPSAwakeIntvl > ieee->current_network.tim.tim_count) | ||
2051 | LPSAwakeIntvl_tmp = count + (pPSC->LPSAwakeIntvl - count) -((pPSC->LPSAwakeIntvl-count)%period); | ||
2052 | else | ||
2053 | LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl;//ieee->current_network.tim.tim_count;//pPSC->LPSAwakeIntvl; | ||
2054 | } | ||
2055 | //printk("=========>%s()assoc_id:%d(%#x),bAwakePktSent:%d,DTIM:%d, sleep interval:%d, LPSAwakeIntvl_tmp:%d, count:%d\n",__func__,ieee->assoc_id,cpu_to_le16(ieee->assoc_id),ieee->bAwakePktSent,ieee->current_network.dtim_period,pPSC->LPSAwakeIntvl,LPSAwakeIntvl_tmp,count); | ||
2056 | |||
1954 | *time_l = ieee->current_network.last_dtim_sta_time[0] | 2057 | *time_l = ieee->current_network.last_dtim_sta_time[0] |
1955 | + (ieee->current_network.beacon_interval); | 2058 | + MSECS(ieee->current_network.beacon_interval * LPSAwakeIntvl_tmp); |
1956 | // * ieee->current_network.dtim_period) * 1000; | 2059 | // * ieee->current_network.dtim_period) * 1000; |
1957 | } | 2060 | } |
2061 | } | ||
1958 | 2062 | ||
1959 | if(time_h){ | 2063 | if(time_h){ |
1960 | *time_h = ieee->current_network.last_dtim_sta_time[1]; | 2064 | *time_h = ieee->current_network.last_dtim_sta_time[1]; |
@@ -1982,6 +2086,8 @@ inline void ieee80211_sta_ps(struct ieee80211_device *ieee) | |||
1982 | ieee->state != IEEE80211_LINKED)){ | 2086 | ieee->state != IEEE80211_LINKED)){ |
1983 | 2087 | ||
1984 | // #warning CHECK_LOCK_HERE | 2088 | // #warning CHECK_LOCK_HERE |
2089 | printk("=====>%s(): no need to ps,wake up!! ieee->ps is %d,ieee->iw_mode is %d,ieee->state is %d\n", | ||
2090 | __FUNCTION__,ieee->ps,ieee->iw_mode,ieee->state); | ||
1985 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); | 2091 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); |
1986 | 2092 | ||
1987 | ieee80211_sta_wakeup(ieee, 1); | 2093 | ieee80211_sta_wakeup(ieee, 1); |
@@ -1991,27 +2097,27 @@ inline void ieee80211_sta_ps(struct ieee80211_device *ieee) | |||
1991 | 2097 | ||
1992 | sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl); | 2098 | sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl); |
1993 | /* 2 wake, 1 sleep, 0 do nothing */ | 2099 | /* 2 wake, 1 sleep, 0 do nothing */ |
1994 | if(sleep == 0) | 2100 | if(sleep == 0)//it is not time out or dtim is not valid |
2101 | { | ||
2102 | //printk("===========>sleep is 0,do nothing\n"); | ||
1995 | goto out; | 2103 | goto out; |
1996 | 2104 | } | |
1997 | if(sleep == 1){ | 2105 | if(sleep == 1){ |
1998 | 2106 | //printk("===========>sleep is 1,to sleep\n"); | |
1999 | if(ieee->sta_sleep == 1) | 2107 | if(ieee->sta_sleep == 1){ |
2108 | //printk("%s(1): sta_sleep = 1, sleep again ++++++++++ \n", __func__); | ||
2000 | ieee->enter_sleep_state(ieee->dev,th,tl); | 2109 | ieee->enter_sleep_state(ieee->dev,th,tl); |
2110 | } | ||
2001 | 2111 | ||
2002 | else if(ieee->sta_sleep == 0){ | 2112 | else if(ieee->sta_sleep == 0){ |
2003 | // printk("send null 1\n"); | 2113 | // printk("send null 1\n"); |
2004 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); | 2114 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); |
2005 | 2115 | ||
2006 | if(ieee->ps_is_queue_empty(ieee->dev)){ | 2116 | if(ieee->ps_is_queue_empty(ieee->dev)){ |
2007 | |||
2008 | |||
2009 | ieee->sta_sleep = 2; | 2117 | ieee->sta_sleep = 2; |
2010 | |||
2011 | ieee->ack_tx_to_ieee = 1; | 2118 | ieee->ack_tx_to_ieee = 1; |
2012 | 2119 | //printk("%s(2): sta_sleep = 0, notify AP we will sleeped ++++++++++ SendNullFunctionData\n", __func__); | |
2013 | ieee80211_sta_ps_send_null_frame(ieee,1); | 2120 | ieee80211_sta_ps_send_null_frame(ieee,1); |
2014 | |||
2015 | ieee->ps_th = th; | 2121 | ieee->ps_th = th; |
2016 | ieee->ps_tl = tl; | 2122 | ieee->ps_tl = tl; |
2017 | } | 2123 | } |
@@ -2019,11 +2125,13 @@ inline void ieee80211_sta_ps(struct ieee80211_device *ieee) | |||
2019 | 2125 | ||
2020 | } | 2126 | } |
2021 | 2127 | ||
2128 | ieee->bAwakePktSent = false;//after null to power save we set it to false. not listen every beacon. | ||
2022 | 2129 | ||
2023 | }else if(sleep == 2){ | 2130 | }else if(sleep == 2){ |
2024 | //#warning CHECK_LOCK_HERE | 2131 | //printk("==========>sleep is 2,to wakeup\n"); |
2025 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); | 2132 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); |
2026 | 2133 | ||
2134 | //printk("%s(3): pkt buffered in ap will awake ++++++++++ ieee80211_sta_wakeup\n", __func__); | ||
2027 | ieee80211_sta_wakeup(ieee,1); | 2135 | ieee80211_sta_wakeup(ieee,1); |
2028 | 2136 | ||
2029 | spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2); | 2137 | spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2); |
@@ -2038,9 +2146,19 @@ void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl) | |||
2038 | { | 2146 | { |
2039 | if(ieee->sta_sleep == 0){ | 2147 | if(ieee->sta_sleep == 0){ |
2040 | if(nl){ | 2148 | if(nl){ |
2041 | printk("Warning: driver is probably failing to report TX ps error\n"); | 2149 | if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING) |
2042 | ieee->ack_tx_to_ieee = 1; | 2150 | { |
2043 | ieee80211_sta_ps_send_null_frame(ieee, 0); | 2151 | //printk("%s(1): notify AP we are awaked ++++++++++ SendNullFunctionData\n", __func__); |
2152 | //printk("Warning: driver is probably failing to report TX ps error\n"); | ||
2153 | ieee->ack_tx_to_ieee = 1; | ||
2154 | ieee80211_sta_ps_send_null_frame(ieee, 0); | ||
2155 | } | ||
2156 | else | ||
2157 | { | ||
2158 | ieee->ack_tx_to_ieee = 1; | ||
2159 | //printk("%s(2): notify AP we are awaked ++++++++++ Send PS-Poll\n", __func__); | ||
2160 | ieee80211_sta_ps_send_pspoll_frame(ieee); | ||
2161 | } | ||
2044 | } | 2162 | } |
2045 | return; | 2163 | return; |
2046 | 2164 | ||
@@ -2048,12 +2166,27 @@ void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl) | |||
2048 | 2166 | ||
2049 | if(ieee->sta_sleep == 1) | 2167 | if(ieee->sta_sleep == 1) |
2050 | ieee->sta_wake_up(ieee->dev); | 2168 | ieee->sta_wake_up(ieee->dev); |
2169 | if(nl){ | ||
2051 | 2170 | ||
2052 | ieee->sta_sleep = 0; | 2171 | if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING) |
2172 | { | ||
2173 | //printk("%s(3): notify AP we are awaked ++++++++++ SendNullFunctionData\n", __func__); | ||
2174 | //printk("Warning: driver is probably failing to report TX ps error\n"); | ||
2175 | ieee->ack_tx_to_ieee = 1; | ||
2176 | ieee80211_sta_ps_send_null_frame(ieee, 0); | ||
2177 | } | ||
2178 | else | ||
2179 | { | ||
2180 | ieee->ack_tx_to_ieee = 1; | ||
2181 | ieee->polling = true; | ||
2182 | //printk("%s(4): notify AP we are awaked ++++++++++ Send PS-Poll\n", __func__); | ||
2183 | //ieee80211_sta_ps_send_null_frame(ieee, 0); | ||
2184 | ieee80211_sta_ps_send_pspoll_frame(ieee); | ||
2185 | } | ||
2053 | 2186 | ||
2054 | if(nl){ | 2187 | } else { |
2055 | ieee->ack_tx_to_ieee = 1; | 2188 | ieee->sta_sleep = 0; |
2056 | ieee80211_sta_ps_send_null_frame(ieee, 0); | 2189 | ieee->polling = false; |
2057 | } | 2190 | } |
2058 | } | 2191 | } |
2059 | 2192 | ||
@@ -2067,23 +2200,30 @@ void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success) | |||
2067 | /* Null frame with PS bit set */ | 2200 | /* Null frame with PS bit set */ |
2068 | if(success){ | 2201 | if(success){ |
2069 | ieee->sta_sleep = 1; | 2202 | ieee->sta_sleep = 1; |
2203 | //printk("notify AP we will sleep and send null ok, so sleep now++++++++++ enter_sleep_state\n"); | ||
2070 | ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl); | 2204 | ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl); |
2071 | } | 2205 | } |
2072 | /* if the card report not success we can't be sure the AP | 2206 | } else {/* 21112005 - tx again null without PS bit if lost */ |
2073 | * has not RXed so we can't assume the AP believe us awake | ||
2074 | */ | ||
2075 | } | ||
2076 | /* 21112005 - tx again null without PS bit if lost */ | ||
2077 | else { | ||
2078 | 2207 | ||
2079 | if((ieee->sta_sleep == 0) && !success){ | 2208 | if((ieee->sta_sleep == 0) && !success){ |
2080 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); | 2209 | spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2); |
2081 | ieee80211_sta_ps_send_null_frame(ieee, 0); | 2210 | //ieee80211_sta_ps_send_null_frame(ieee, 0); |
2211 | if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING) | ||
2212 | { | ||
2213 | //printk("notify AP we will sleep but send bull failed, so resend++++++++++ SendNullFunctionData\n"); | ||
2214 | ieee80211_sta_ps_send_null_frame(ieee, 0); | ||
2215 | } | ||
2216 | else | ||
2217 | { | ||
2218 | //printk("notify AP we are awaked but send pspoll failed, so resend++++++++++ Send PS-Poll\n"); | ||
2219 | ieee80211_sta_ps_send_pspoll_frame(ieee); | ||
2220 | } | ||
2082 | spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2); | 2221 | spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2); |
2083 | } | 2222 | } |
2084 | } | 2223 | } |
2085 | spin_unlock_irqrestore(&ieee->lock, flags); | 2224 | spin_unlock_irqrestore(&ieee->lock, flags); |
2086 | } | 2225 | } |
2226 | |||
2087 | void ieee80211_process_action(struct ieee80211_device* ieee, struct sk_buff* skb) | 2227 | void ieee80211_process_action(struct ieee80211_device* ieee, struct sk_buff* skb) |
2088 | { | 2228 | { |
2089 | struct ieee80211_hdr* header = (struct ieee80211_hdr*)skb->data; | 2229 | struct ieee80211_hdr* header = (struct ieee80211_hdr*)skb->data; |
@@ -2227,7 +2367,7 @@ ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
2227 | { | 2367 | { |
2228 | if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) | 2368 | if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) |
2229 | { | 2369 | { |
2230 | // WEP or TKIP encryption | 2370 | // WEP or TKIP encryption |
2231 | if(IsHTHalfNmodeAPs(ieee)) | 2371 | if(IsHTHalfNmodeAPs(ieee)) |
2232 | { | 2372 | { |
2233 | bSupportNmode = true; | 2373 | bSupportNmode = true; |
@@ -2238,7 +2378,7 @@ ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
2238 | bSupportNmode = false; | 2378 | bSupportNmode = false; |
2239 | bHalfSupportNmode = false; | 2379 | bHalfSupportNmode = false; |
2240 | } | 2380 | } |
2241 | printk("==========>to link with AP using SEC(%d, %d)", bSupportNmode, bHalfSupportNmode); | 2381 | printk("==========>to link with AP using SEC(%d, %d)\n", bSupportNmode, bHalfSupportNmode); |
2242 | } | 2382 | } |
2243 | } | 2383 | } |
2244 | /* Dummy wirless mode setting to avoid encryption issue */ | 2384 | /* Dummy wirless mode setting to avoid encryption issue */ |
@@ -2574,6 +2714,7 @@ void ieee80211_start_ibss_wq(struct ieee80211_device *ieee) | |||
2574 | ieee->ssid_set = 1; | 2714 | ieee->ssid_set = 1; |
2575 | } | 2715 | } |
2576 | 2716 | ||
2717 | ieee->state = IEEE80211_NOLINK; | ||
2577 | /* check if we have this cell in our network list */ | 2718 | /* check if we have this cell in our network list */ |
2578 | ieee80211_softmac_check_all_nets(ieee); | 2719 | ieee80211_softmac_check_all_nets(ieee); |
2579 | 2720 | ||
@@ -2705,6 +2846,10 @@ void ieee80211_start_bss(struct ieee80211_device *ieee) | |||
2705 | spin_lock_irqsave(&ieee->lock, flags); | 2846 | spin_lock_irqsave(&ieee->lock, flags); |
2706 | 2847 | ||
2707 | if (ieee->state == IEEE80211_NOLINK){ | 2848 | if (ieee->state == IEEE80211_NOLINK){ |
2849 | #ifdef ENABLE_IPS | ||
2850 | if(ieee->ieee80211_ips_leave_wq != NULL) | ||
2851 | ieee->ieee80211_ips_leave_wq(ieee->dev); | ||
2852 | #endif | ||
2708 | ieee->actscanning = true; | 2853 | ieee->actscanning = true; |
2709 | ieee80211_rtl_start_scan(ieee); | 2854 | ieee80211_rtl_start_scan(ieee); |
2710 | } | 2855 | } |
@@ -2823,21 +2968,23 @@ struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee) | |||
2823 | return skb; | 2968 | return skb; |
2824 | } | 2969 | } |
2825 | 2970 | ||
2826 | void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee) | 2971 | void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee, u8 shutdown) |
2827 | { | 2972 | { |
2828 | ieee->sync_scan_hurryup = 1; | 2973 | ieee->sync_scan_hurryup = 1; |
2829 | down(&ieee->wx_sem); | 2974 | down(&ieee->wx_sem); |
2830 | ieee80211_stop_protocol(ieee); | 2975 | ieee80211_stop_protocol(ieee, shutdown); |
2831 | up(&ieee->wx_sem); | 2976 | up(&ieee->wx_sem); |
2832 | } | 2977 | } |
2833 | 2978 | ||
2834 | 2979 | ||
2835 | void ieee80211_stop_protocol(struct ieee80211_device *ieee) | 2980 | void ieee80211_stop_protocol(struct ieee80211_device *ieee, u8 shutdown) |
2836 | { | 2981 | { |
2837 | if (!ieee->proto_started) | 2982 | if (!ieee->proto_started) |
2838 | return; | 2983 | return; |
2839 | 2984 | ||
2840 | ieee->proto_started = 0; | 2985 | if(shutdown) |
2986 | ieee->proto_started = 0; | ||
2987 | ieee->proto_stoppping = 1; | ||
2841 | 2988 | ||
2842 | ieee80211_stop_send_beacons(ieee); | 2989 | ieee80211_stop_send_beacons(ieee); |
2843 | del_timer_sync(&ieee->associate_timer); | 2990 | del_timer_sync(&ieee->associate_timer); |
@@ -2849,6 +2996,8 @@ void ieee80211_stop_protocol(struct ieee80211_device *ieee) | |||
2849 | 2996 | ||
2850 | ieee80211_disassociate(ieee); | 2997 | ieee80211_disassociate(ieee); |
2851 | RemoveAllTS(ieee); //added as we disconnect from the previous BSS, Remove all TS | 2998 | RemoveAllTS(ieee); //added as we disconnect from the previous BSS, Remove all TS |
2999 | |||
3000 | ieee->proto_stoppping = 0; | ||
2852 | } | 3001 | } |
2853 | 3002 | ||
2854 | void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee) | 3003 | void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee) |
@@ -2894,6 +3043,8 @@ void ieee80211_start_protocol(struct ieee80211_device *ieee) | |||
2894 | 3043 | ||
2895 | ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers. | 3044 | ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers. |
2896 | 3045 | ||
3046 | ieee->state = IEEE80211_NOLINK; | ||
3047 | |||
2897 | 3048 | ||
2898 | /* if the user set the MAC of the ad-hoc cell and then | 3049 | /* if the user set the MAC of the ad-hoc cell and then |
2899 | * switch to managed mode, shall we make sure that association | 3050 | * switch to managed mode, shall we make sure that association |
@@ -3013,7 +3164,9 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee) | |||
3013 | #endif | 3164 | #endif |
3014 | sema_init(&ieee->wx_sem, 1); | 3165 | sema_init(&ieee->wx_sem, 1); |
3015 | sema_init(&ieee->scan_sem, 1); | 3166 | sema_init(&ieee->scan_sem, 1); |
3016 | 3167 | #ifdef ENABLE_IPS | |
3168 | sema_init(&ieee->ips_sem,1); | ||
3169 | #endif | ||
3017 | spin_lock_init(&ieee->mgmt_tx_lock); | 3170 | spin_lock_init(&ieee->mgmt_tx_lock); |
3018 | spin_lock_init(&ieee->beacon_lock); | 3171 | spin_lock_init(&ieee->beacon_lock); |
3019 | 3172 | ||
@@ -3537,5 +3690,6 @@ EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan); | |||
3537 | EXPORT_SYMBOL_NOVERS(ieee80211_send_probe_requests); | 3690 | EXPORT_SYMBOL_NOVERS(ieee80211_send_probe_requests); |
3538 | EXPORT_SYMBOL_NOVERS(ieee80211_softmac_scan_syncro); | 3691 | EXPORT_SYMBOL_NOVERS(ieee80211_softmac_scan_syncro); |
3539 | EXPORT_SYMBOL_NOVERS(ieee80211_start_scan_syncro); | 3692 | EXPORT_SYMBOL_NOVERS(ieee80211_start_scan_syncro); |
3693 | EXPORT_SYMBOL_NOVERS(ieee80211_sta_ps_send_null_frame); | ||
3694 | EXPORT_SYMBOL_NOVERS(ieee80211_sta_ps_send_pspoll_frame); | ||
3540 | #endif | 3695 | #endif |
3541 | //EXPORT_SYMBOL(ieee80211_sta_ps_send_null_frame); | ||
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c index 7c21aaab9063..1bbd49f1d6f6 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c | |||
@@ -160,7 +160,7 @@ int ieee80211_wx_set_wap(struct ieee80211_device *ieee, | |||
160 | } | 160 | } |
161 | 161 | ||
162 | if (ifup) | 162 | if (ifup) |
163 | ieee80211_stop_protocol(ieee); | 163 | ieee80211_stop_protocol(ieee,true); |
164 | 164 | ||
165 | /* just to avoid to give inconsistent infos in the | 165 | /* just to avoid to give inconsistent infos in the |
166 | * get wx method. not really needed otherwise | 166 | * get wx method. not really needed otherwise |
@@ -302,7 +302,7 @@ int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info | |||
302 | if (!ieee->proto_started){ | 302 | if (!ieee->proto_started){ |
303 | ieee->iw_mode = wrqu->mode; | 303 | ieee->iw_mode = wrqu->mode; |
304 | }else{ | 304 | }else{ |
305 | ieee80211_stop_protocol(ieee); | 305 | ieee80211_stop_protocol(ieee,true); |
306 | ieee->iw_mode = wrqu->mode; | 306 | ieee->iw_mode = wrqu->mode; |
307 | ieee80211_start_protocol(ieee); | 307 | ieee80211_start_protocol(ieee); |
308 | } | 308 | } |
@@ -326,6 +326,17 @@ void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee) | |||
326 | int b40M = 0; | 326 | int b40M = 0; |
327 | static int count = 0; | 327 | static int count = 0; |
328 | chan = ieee->current_network.channel; | 328 | chan = ieee->current_network.channel; |
329 | |||
330 | #ifdef ENABLE_LPS | ||
331 | if (ieee->LeisurePSLeave) { | ||
332 | ieee->LeisurePSLeave(ieee->dev); | ||
333 | } | ||
334 | |||
335 | /* notify AP to be in PS mode */ | ||
336 | ieee80211_sta_ps_send_null_frame(ieee, 1); | ||
337 | ieee80211_sta_ps_send_null_frame(ieee, 1); | ||
338 | #endif | ||
339 | |||
329 | netif_carrier_off(ieee->dev); | 340 | netif_carrier_off(ieee->dev); |
330 | 341 | ||
331 | if (ieee->data_hard_stop) | 342 | if (ieee->data_hard_stop) |
@@ -360,6 +371,12 @@ void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee) | |||
360 | ieee->InitialGainHandler(ieee->dev,IG_Restore); | 371 | ieee->InitialGainHandler(ieee->dev,IG_Restore); |
361 | ieee->state = IEEE80211_LINKED; | 372 | ieee->state = IEEE80211_LINKED; |
362 | ieee->link_change(ieee->dev); | 373 | ieee->link_change(ieee->dev); |
374 | |||
375 | #ifdef ENABLE_LPS | ||
376 | /* Notify AP that I wake up again */ | ||
377 | ieee80211_sta_ps_send_null_frame(ieee, 0); | ||
378 | #endif | ||
379 | |||
363 | // To prevent the immediately calling watch_dog after scan. | 380 | // To prevent the immediately calling watch_dog after scan. |
364 | if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 ) | 381 | if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 ) |
365 | { | 382 | { |
@@ -429,8 +446,9 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee, | |||
429 | goto out; | 446 | goto out; |
430 | } | 447 | } |
431 | 448 | ||
432 | if(proto_started) | 449 | if(proto_started){ |
433 | ieee80211_stop_protocol(ieee); | 450 | ieee80211_stop_protocol(ieee,true); |
451 | } | ||
434 | 452 | ||
435 | 453 | ||
436 | /* this is just to be sure that the GET wx callback | 454 | /* this is just to be sure that the GET wx callback |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c index 798fb4154c25..a75f3668a40a 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c | |||
@@ -200,8 +200,8 @@ int ieee80211_encrypt_fragment( | |||
200 | header = (struct ieee80211_hdr *) frag->data; | 200 | header = (struct ieee80211_hdr *) frag->data; |
201 | if (net_ratelimit()) { | 201 | if (net_ratelimit()) { |
202 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 202 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
203 | "TX packet to " MAC_FMT "\n", | 203 | "TX packet to %pM\n", |
204 | ieee->dev->name, MAC_ARG(header->addr1)); | 204 | ieee->dev->name, header->addr1); |
205 | } | 205 | } |
206 | return -1; | 206 | return -1; |
207 | } | 207 | } |
@@ -334,6 +334,13 @@ void ieee80211_tx_query_agg_cap(struct ieee80211_device* ieee, struct sk_buff* s | |||
334 | if(!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter)) | 334 | if(!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter)) |
335 | return; | 335 | return; |
336 | #endif | 336 | #endif |
337 | |||
338 | if(tcb_desc->bdhcp)// || ieee->CntAfterLink<2) | ||
339 | { | ||
340 | return; | ||
341 | } | ||
342 | |||
343 | |||
337 | #if 1 | 344 | #if 1 |
338 | if(!ieee->GetNmodeSupportBySecCfg(ieee->dev)) | 345 | if(!ieee->GetNmodeSupportBySecCfg(ieee->dev)) |
339 | { | 346 | { |
@@ -628,6 +635,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev) | |||
628 | int qos_actived = ieee->current_network.qos_data.active; | 635 | int qos_actived = ieee->current_network.qos_data.active; |
629 | 636 | ||
630 | struct ieee80211_crypt_data* crypt; | 637 | struct ieee80211_crypt_data* crypt; |
638 | bool bdhcp =false; | ||
631 | 639 | ||
632 | cb_desc *tcb_desc; | 640 | cb_desc *tcb_desc; |
633 | 641 | ||
@@ -672,6 +680,55 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev) | |||
672 | } | 680 | } |
673 | #endif | 681 | #endif |
674 | 682 | ||
683 | // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time | ||
684 | // to prevent DHCP protocol fail | ||
685 | if (skb->len > 282){//MINIMUM_DHCP_PACKET_SIZE) { | ||
686 | if (ETH_P_IP == ether_type) {// IP header | ||
687 | const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); | ||
688 | if (IPPROTO_UDP == ip->protocol) {//FIXME windows is 11 but here UDP in linux kernel is 17. | ||
689 | struct udphdr *udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); | ||
690 | //if(((ntohs(udp->source) == 68) && (ntohs(udp->dest) == 67)) || | ||
691 | /// ((ntohs(udp->source) == 67) && (ntohs(udp->dest) == 68))) { | ||
692 | if(((((u8 *)udp)[1] == 68) && (((u8 *)udp)[3] == 67)) || | ||
693 | ((((u8 *)udp)[1] == 67) && (((u8 *)udp)[3] == 68))) { | ||
694 | // 68 : UDP BOOTP client | ||
695 | // 67 : UDP BOOTP server | ||
696 | printk("DHCP pkt src port:%d, dest port:%d!!\n", ((u8 *)udp)[1],((u8 *)udp)[3]); | ||
697 | // Use low rate to send DHCP packet. | ||
698 | //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) | ||
699 | //{ | ||
700 | // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m | ||
701 | // tcb_desc->bTxDisableRateFallBack = false; | ||
702 | //} | ||
703 | //else | ||
704 | //pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; | ||
705 | //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); | ||
706 | |||
707 | bdhcp = true; | ||
708 | #ifdef _RTL8192_EXT_PATCH_ | ||
709 | ieee->LPSDelayCnt = 100;//pPSC->LPSAwakeIntvl*2; //AMY,090701 | ||
710 | #else | ||
711 | ieee->LPSDelayCnt = 100;//pPSC->LPSAwakeIntvl*2; | ||
712 | #endif | ||
713 | } | ||
714 | } | ||
715 | }else if(ETH_P_ARP == ether_type){// IP ARP packet | ||
716 | printk("=================>DHCP Protocol start tx ARP pkt!!\n"); | ||
717 | bdhcp = true; | ||
718 | ieee->LPSDelayCnt = ieee->current_network.tim.tim_count; | ||
719 | |||
720 | //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) | ||
721 | //{ | ||
722 | // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(Adapter->MgntInfo.mBrates);//0xc;//ofdm 6m | ||
723 | // tcb_desc->bTxDisableRateFallBack = FALSE; | ||
724 | //} | ||
725 | //else | ||
726 | // tcb_desc->DataRate = Adapter->MgntInfo.LowestBasicRate; | ||
727 | //RTPRINT(FDM, WA_IOT, ("ARP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); | ||
728 | |||
729 | } | ||
730 | } | ||
731 | |||
675 | /* Save source and destination addresses */ | 732 | /* Save source and destination addresses */ |
676 | memcpy(&dest, skb->data, ETH_ALEN); | 733 | memcpy(&dest, skb->data, ETH_ALEN); |
677 | memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN); | 734 | memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN); |
@@ -895,6 +952,25 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev) | |||
895 | else | 952 | else |
896 | //tcb_desc->data_rate = CURRENT_RATE(ieee->current_network.mode, ieee->rate, ieee->HTCurrentOperaRate); | 953 | //tcb_desc->data_rate = CURRENT_RATE(ieee->current_network.mode, ieee->rate, ieee->HTCurrentOperaRate); |
897 | tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate); | 954 | tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate); |
955 | |||
956 | if(bdhcp == true){ | ||
957 | // Use low rate to send DHCP packet. | ||
958 | //if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) { | ||
959 | // tcb_desc->data_rate = MGN_1M;//MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m | ||
960 | // tcb_desc->bTxDisableRateFallBack = false; | ||
961 | //} | ||
962 | //else | ||
963 | { | ||
964 | tcb_desc->data_rate = MGN_1M; | ||
965 | tcb_desc->bTxDisableRateFallBack = 1; | ||
966 | } | ||
967 | |||
968 | tcb_desc->RATRIndex = 7; | ||
969 | tcb_desc->bTxUseDriverAssingedRate = 1; | ||
970 | tcb_desc->bdhcp = 1; | ||
971 | } | ||
972 | |||
973 | |||
898 | ieee80211_qurey_ShortPreambleMode(ieee, tcb_desc); | 974 | ieee80211_qurey_ShortPreambleMode(ieee, tcb_desc); |
899 | ieee80211_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc); | 975 | ieee80211_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc); |
900 | ieee80211_query_HTCapShortGI(ieee, tcb_desc); | 976 | ieee80211_query_HTCapShortGI(ieee, tcb_desc); |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c index 3441b72dd8fa..a3302d5e01ab 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c | |||
@@ -386,10 +386,10 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee, | |||
386 | else | 386 | else |
387 | IEEE80211_DEBUG_SCAN( | 387 | IEEE80211_DEBUG_SCAN( |
388 | "Not showing network '%s (" | 388 | "Not showing network '%s (" |
389 | MAC_FMT ")' due to age (%lums).\n", | 389 | "%pM)' due to age (%lums).\n", |
390 | escape_essid(network->ssid, | 390 | escape_essid(network->ssid, |
391 | network->ssid_len), | 391 | network->ssid_len), |
392 | MAC_ARG(network->bssid), | 392 | network->bssid, |
393 | (jiffies - network->last_scanned) / (HZ / 100)); | 393 | (jiffies - network->last_scanned) / (HZ / 100)); |
394 | } | 394 | } |
395 | 395 | ||
@@ -933,7 +933,7 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee, | |||
933 | #if 1 | 933 | #if 1 |
934 | case IW_AUTH_WPA_ENABLED: | 934 | case IW_AUTH_WPA_ENABLED: |
935 | ieee->wpa_enabled = (data->value)?1:0; | 935 | ieee->wpa_enabled = (data->value)?1:0; |
936 | //printk("enalbe wpa:%d\n", ieee->wpa_enabled); | 936 | //printk("enable wpa:%d\n", ieee->wpa_enabled); |
937 | break; | 937 | break; |
938 | 938 | ||
939 | #endif | 939 | #endif |
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c index e41e8a0c739c..ae0e5b9e2183 100644 --- a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c | |||
@@ -113,7 +113,7 @@ static struct sk_buff* ieee80211_ADDBA(struct ieee80211_device* ieee, u8* Dst, P | |||
113 | u16 tmp = 0; | 113 | u16 tmp = 0; |
114 | u16 len = ieee->tx_headroom + 9; | 114 | u16 len = ieee->tx_headroom + 9; |
115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) | 115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) |
116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __FUNCTION__, type, MAC_ARG(Dst), ieee->dev); | 116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:%pM, ieee->dev:%p\n", __FUNCTION__, type, Dst, ieee->dev); |
117 | if (pBA == NULL||ieee == NULL) | 117 | if (pBA == NULL||ieee == NULL) |
118 | { | 118 | { |
119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); | 119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); |
@@ -243,7 +243,7 @@ static struct sk_buff* ieee80211_DELBA( | |||
243 | u16 len = 6 + ieee->tx_headroom; | 243 | u16 len = 6 + ieee->tx_headroom; |
244 | 244 | ||
245 | if (net_ratelimit()) | 245 | if (net_ratelimit()) |
246 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __FUNCTION__, ReasonCode, MAC_ARG(dst)); | 246 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:%pM\n", __FUNCTION__, ReasonCode, dst); |
247 | 247 | ||
248 | memset(&DelbaParamSet, 0, 2); | 248 | memset(&DelbaParamSet, 0, 2); |
249 | 249 | ||
@@ -397,7 +397,7 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb) | |||
397 | pBaTimeoutVal = (u16*)(tag + 5); | 397 | pBaTimeoutVal = (u16*)(tag + 5); |
398 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); | 398 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); |
399 | 399 | ||
400 | printk("====================>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst)); | 400 | printk("====================>rx ADDBAREQ from :%pM\n", dst); |
401 | //some other capability is not ready now. | 401 | //some other capability is not ready now. |
402 | if( (ieee->current_network.qos_data.active == 0) || | 402 | if( (ieee->current_network.qos_data.active == 0) || |
403 | (ieee->pHTInfo->bCurrentHTSupport == false)) //|| | 403 | (ieee->pHTInfo->bCurrentHTSupport == false)) //|| |
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h b/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h index 992b71825a8b..f968817d073c 100644 --- a/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h | |||
@@ -458,7 +458,8 @@ typedef enum _HT_IOT_PEER | |||
458 | HT_IOT_PEER_RALINK = 3, | 458 | HT_IOT_PEER_RALINK = 3, |
459 | HT_IOT_PEER_ATHEROS = 4, | 459 | HT_IOT_PEER_ATHEROS = 4, |
460 | HT_IOT_PEER_CISCO= 5, | 460 | HT_IOT_PEER_CISCO= 5, |
461 | HT_IOT_PEER_MAX = 6 | 461 | HT_IOT_PEER_MARVELL=6, |
462 | HT_IOT_PEER_MAX = 7 | ||
462 | }HT_IOT_PEER_E, *PHTIOT_PEER_E; | 463 | }HT_IOT_PEER_E, *PHTIOT_PEER_E; |
463 | 464 | ||
464 | // | 465 | // |
@@ -475,6 +476,7 @@ typedef enum _HT_IOT_ACTION{ | |||
475 | HT_IOT_ACT_CDD_FSYNC = 0x00000080, | 476 | HT_IOT_ACT_CDD_FSYNC = 0x00000080, |
476 | HT_IOT_ACT_PURE_N_MODE = 0x00000100, | 477 | HT_IOT_ACT_PURE_N_MODE = 0x00000100, |
477 | HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200, | 478 | HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200, |
479 | HT_IOT_ACT_NULL_DATA_POWER_SAVING = 0x00800000, | ||
478 | }HT_IOT_ACTION_E, *PHT_IOT_ACTION_E; | 480 | }HT_IOT_ACTION_E, *PHT_IOT_ACTION_E; |
479 | 481 | ||
480 | #endif //_RTL819XU_HTTYPE_H_ | 482 | #endif //_RTL819XU_HTTYPE_H_ |
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c index 1e392141779a..4c4b1df350ac 100644 --- a/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c | |||
@@ -32,7 +32,7 @@ u16 MCS_DATA_RATE[2][2][77] = | |||
32 | static u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf}; | 32 | static u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf}; |
33 | static u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70}; | 33 | static u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70}; |
34 | static u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e}; | 34 | static u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e}; |
35 | static u8 NETGEAR834Bv2_BROADCOM[3] = {0x00, 0x1b, 0x2f}; | 35 | //static u8 NETGEAR834Bv2_BROADCOM[3] = {0x00, 0x1b, 0x2f}; |
36 | static u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f}; //cosa 03202008 | 36 | static u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f}; //cosa 03202008 |
37 | static u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf}; | 37 | static u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf}; |
38 | static u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc}; | 38 | static u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc}; |
@@ -40,8 +40,9 @@ static u8 EDIMAX_RALINK[3] = {0x00, 0x0e, 0x2e}; | |||
40 | static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02}; | 40 | static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02}; |
41 | static u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0}; | 41 | static u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0}; |
42 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; | 42 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; |
43 | static u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4}; | ||
43 | 44 | ||
44 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Shoud we put the | 45 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Should we put the |
45 | // code in other place?? | 46 | // code in other place?? |
46 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; | 47 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; |
47 | /******************************************************************************************************************** | 48 | /******************************************************************************************************************** |
@@ -349,12 +350,12 @@ bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee) | |||
349 | bool retValue = false; | 350 | bool retValue = false; |
350 | struct ieee80211_network* net = &ieee->current_network; | 351 | struct ieee80211_network* net = &ieee->current_network; |
351 | #if 0 | 352 | #if 0 |
352 | if(pMgntInfo->bHalfNMode == false) | 353 | if(ieee->bHalfNMode == false) |
353 | retValue = false; | 354 | retValue = false; |
354 | else | 355 | else |
355 | #endif | 356 | #endif |
356 | if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) || | 357 | if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) || |
357 | (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) || | 358 | (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) || |
358 | (memcmp(net->bssid, PCI_RALINK, 3)==0) || | 359 | (memcmp(net->bssid, PCI_RALINK, 3)==0) || |
359 | (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) || | 360 | (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) || |
360 | (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) || | 361 | (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) || |
@@ -363,7 +364,7 @@ bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee) | |||
363 | else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) || | 364 | else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) || |
364 | (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)|| | 365 | (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)|| |
365 | (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)|| | 366 | (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)|| |
366 | (memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) || | 367 | //(memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) || |
367 | (net->broadcom_cap_exist)) | 368 | (net->broadcom_cap_exist)) |
368 | retValue = true; | 369 | retValue = true; |
369 | else if(net->bssht.bdRT2RTAggregation) | 370 | else if(net->bssht.bdRT2RTAggregation) |
@@ -387,13 +388,15 @@ void HTIOTPeerDetermine(struct ieee80211_device* ieee) | |||
387 | struct ieee80211_network* net = &ieee->current_network; | 388 | struct ieee80211_network* net = &ieee->current_network; |
388 | if(net->bssht.bdRT2RTAggregation) | 389 | if(net->bssht.bdRT2RTAggregation) |
389 | pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK; | 390 | pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK; |
390 | else if(net->broadcom_cap_exist) | 391 | else if(net->broadcom_cap_exist){ |
391 | pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM; | 392 | pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM; |
393 | } | ||
392 | else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) || | 394 | else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) || |
393 | (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)|| | 395 | (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)|| |
394 | (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)|| | 396 | (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)){//|| |
395 | (memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) ) | 397 | //(memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) ){ |
396 | pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM; | 398 | pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM; |
399 | } | ||
397 | else if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) || | 400 | else if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) || |
398 | (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) || | 401 | (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) || |
399 | (memcmp(net->bssid, PCI_RALINK, 3)==0) || | 402 | (memcmp(net->bssid, PCI_RALINK, 3)==0) || |
@@ -405,6 +408,10 @@ void HTIOTPeerDetermine(struct ieee80211_device* ieee) | |||
405 | pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS; | 408 | pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS; |
406 | else if(memcmp(net->bssid, CISCO_BROADCOM, 3)==0) | 409 | else if(memcmp(net->bssid, CISCO_BROADCOM, 3)==0) |
407 | pHTInfo->IOTPeer = HT_IOT_PEER_CISCO; | 410 | pHTInfo->IOTPeer = HT_IOT_PEER_CISCO; |
411 | else if ((memcmp(net->bssid, LINKSYS_MARVELL_4400N, 3) == 0) || | ||
412 | net->marvell_cap_exist){ | ||
413 | pHTInfo->IOTPeer = HT_IOT_PEER_MARVELL; | ||
414 | } | ||
408 | else | 415 | else |
409 | pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN; | 416 | pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN; |
410 | 417 | ||
@@ -442,6 +449,18 @@ u8 HTIOTActIsDisableMCS14(struct ieee80211_device* ieee, u8* PeerMacAddr) | |||
442 | return ret; | 449 | return ret; |
443 | } | 450 | } |
444 | 451 | ||
452 | u8 HTIOTActIsForcedCTS2Self(struct ieee80211_device *ieee, struct ieee80211_network *network) | ||
453 | { | ||
454 | u8 retValue = 0; | ||
455 | //if(network->marvell_cap_exist) | ||
456 | if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL) | ||
457 | { | ||
458 | retValue = 1; | ||
459 | } | ||
460 | |||
461 | return retValue; | ||
462 | } | ||
463 | |||
445 | 464 | ||
446 | /** | 465 | /** |
447 | * Function: HTIOTActIsDisableMCS15 | 466 | * Function: HTIOTActIsDisableMCS15 |
@@ -578,6 +597,23 @@ u8 HTIOTActIsCCDFsync(u8* PeerMacAddr) | |||
578 | return retValue; | 597 | return retValue; |
579 | } | 598 | } |
580 | 599 | ||
600 | // | ||
601 | // Send null data for to tell AP that we are awake. | ||
602 | // | ||
603 | bool | ||
604 | HTIOTActIsNullDataPowerSaving(struct ieee80211_device* ieee,struct ieee80211_network *network) | ||
605 | { | ||
606 | bool retValue = false; | ||
607 | |||
608 | PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; | ||
609 | { | ||
610 | if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) // ||(pBssDesc->Vender == HT_IOT_PEER_ATHEROS && pBssDesc->SubTypeOfVender == HT_IOT_PEER_ATHEROS_DIR635)) | ||
611 | return true; | ||
612 | |||
613 | } | ||
614 | return retValue; | ||
615 | } | ||
616 | |||
581 | void HTResetIOTSetting( | 617 | void HTResetIOTSetting( |
582 | PRT_HIGH_THROUGHPUT pHTInfo | 618 | PRT_HIGH_THROUGHPUT pHTInfo |
583 | ) | 619 | ) |
@@ -1071,6 +1107,13 @@ void HTOnAssocRsp(struct ieee80211_device *ieee) | |||
1071 | // Config and configure A-MSDU setting | 1107 | // Config and configure A-MSDU setting |
1072 | // | 1108 | // |
1073 | pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support; | 1109 | pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support; |
1110 | if (ieee->rtllib_ap_sec_type && | ||
1111 | (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))){ | ||
1112 | if( (pHTInfo->IOTPeer== HT_IOT_PEER_ATHEROS) || | ||
1113 | (pHTInfo->IOTPeer == HT_IOT_PEER_UNKNOWN) ) | ||
1114 | pHTInfo->bCurrentAMPDUEnable = false; | ||
1115 | } | ||
1116 | |||
1074 | 1117 | ||
1075 | nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935; | 1118 | nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935; |
1076 | 1119 | ||
@@ -1515,6 +1558,9 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80 | |||
1515 | bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid); | 1558 | bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid); |
1516 | if(bIOTAction) | 1559 | if(bIOTAction) |
1517 | pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14; | 1560 | pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14; |
1561 | bIOTAction = HTIOTActIsForcedCTS2Self(ieee, pNetwork); | ||
1562 | if(bIOTAction) | ||
1563 | pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF; | ||
1518 | 1564 | ||
1519 | bIOTAction = HTIOTActIsDisableMCS15(ieee); | 1565 | bIOTAction = HTIOTActIsDisableMCS15(ieee); |
1520 | if(bIOTAction) | 1566 | if(bIOTAction) |
@@ -1537,6 +1583,9 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80 | |||
1537 | if(bIOTAction) | 1583 | if(bIOTAction) |
1538 | pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC; | 1584 | pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC; |
1539 | 1585 | ||
1586 | bIOTAction = HTIOTActIsNullDataPowerSaving(ieee, pNetwork); | ||
1587 | if(bIOTAction) | ||
1588 | pHTInfo->IOTAction |= HT_IOT_ACT_NULL_DATA_POWER_SAVING; | ||
1540 | 1589 | ||
1541 | } | 1590 | } |
1542 | else | 1591 | else |
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c index 2816b60a08a9..e2cbfd3aa00f 100644 --- a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c | |||
@@ -304,7 +304,7 @@ PTS_COMMON_INFO SearchAdmitTRStream(struct ieee80211_device *ieee, u8* Addr, u8 | |||
304 | if(search_dir[dir] ==false ) | 304 | if(search_dir[dir] ==false ) |
305 | continue; | 305 | continue; |
306 | list_for_each_entry(pRet, psearch_list, List){ | 306 | list_for_each_entry(pRet, psearch_list, List){ |
307 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:"MAC_FMT", TID:%d, dir:%d\n", MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); | 307 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); |
308 | if (memcmp(pRet->Addr, Addr, 6) == 0) | 308 | if (memcmp(pRet->Addr, Addr, 6) == 0) |
309 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) | 309 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) |
310 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) | 310 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) |
@@ -466,7 +466,7 @@ bool GetTs( | |||
466 | ResetRxTsEntry(tmp); | 466 | ResetRxTsEntry(tmp); |
467 | } | 467 | } |
468 | 468 | ||
469 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT"\n", UP, Dir, MAC_ARG(Addr)); | 469 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:%pM\n", UP, Dir, Addr); |
470 | // Prepare TS Info releated field | 470 | // Prepare TS Info releated field |
471 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field | 471 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field |
472 | pTSInfo->field.ucTSID = UP; // TSID | 472 | pTSInfo->field.ucTSID = UP; // TSID |
@@ -552,7 +552,7 @@ void RemoveTsEntry( | |||
552 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) | 552 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) |
553 | { | 553 | { |
554 | PTS_COMMON_INFO pTS, pTmpTS; | 554 | PTS_COMMON_INFO pTS, pTmpTS; |
555 | printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr)); | 555 | printk("===========>RemovePeerTS,%pM\n", Addr); |
556 | #if 1 | 556 | #if 1 |
557 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) | 557 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) |
558 | { | 558 | { |
diff --git a/drivers/staging/rtl8192e/r8180_93cx6.c b/drivers/staging/rtl8192e/r8180_93cx6.c index 79f7a0f39623..262ed5fd086a 100644 --- a/drivers/staging/rtl8192e/r8180_93cx6.c +++ b/drivers/staging/rtl8192e/r8180_93cx6.c | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | static void eprom_cs(struct net_device *dev, short bit) | 23 | static void eprom_cs(struct net_device *dev, short bit) |
24 | { | 24 | { |
25 | if(bit) | 25 | if (bit) |
26 | write_nic_byte(dev, EPROM_CMD, | 26 | write_nic_byte(dev, EPROM_CMD, |
27 | (1<<EPROM_CS_SHIFT) | \ | 27 | (1<<EPROM_CS_SHIFT) | \ |
28 | read_nic_byte(dev, EPROM_CMD)); //enable EPROM | 28 | read_nic_byte(dev, EPROM_CMD)); //enable EPROM |
@@ -38,23 +38,23 @@ static void eprom_cs(struct net_device *dev, short bit) | |||
38 | static void eprom_ck_cycle(struct net_device *dev) | 38 | static void eprom_ck_cycle(struct net_device *dev) |
39 | { | 39 | { |
40 | write_nic_byte(dev, EPROM_CMD, | 40 | write_nic_byte(dev, EPROM_CMD, |
41 | (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD)); | 41 | (1<<EPROM_CK_SHIFT) | read_nic_byte(dev, EPROM_CMD)); |
42 | force_pci_posting(dev); | 42 | force_pci_posting(dev); |
43 | udelay(EPROM_DELAY); | 43 | udelay(EPROM_DELAY); |
44 | write_nic_byte(dev, EPROM_CMD, | 44 | write_nic_byte(dev, EPROM_CMD, |
45 | read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT)); | 45 | read_nic_byte(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT)); |
46 | force_pci_posting(dev); | 46 | force_pci_posting(dev); |
47 | udelay(EPROM_DELAY); | 47 | udelay(EPROM_DELAY); |
48 | } | 48 | } |
49 | 49 | ||
50 | 50 | ||
51 | static void eprom_w(struct net_device *dev,short bit) | 51 | static void eprom_w(struct net_device *dev, short bit) |
52 | { | 52 | { |
53 | if(bit) | 53 | if (bit) |
54 | write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \ | 54 | write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \ |
55 | read_nic_byte(dev,EPROM_CMD)); | 55 | read_nic_byte(dev, EPROM_CMD)); |
56 | else | 56 | else |
57 | write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\ | 57 | write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\ |
58 | &~(1<<EPROM_W_SHIFT)); | 58 | &~(1<<EPROM_W_SHIFT)); |
59 | 59 | ||
60 | force_pci_posting(dev); | 60 | force_pci_posting(dev); |
@@ -66,10 +66,11 @@ static short eprom_r(struct net_device *dev) | |||
66 | { | 66 | { |
67 | short bit; | 67 | short bit; |
68 | 68 | ||
69 | bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) ); | 69 | bit = (read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT)); |
70 | udelay(EPROM_DELAY); | 70 | udelay(EPROM_DELAY); |
71 | 71 | ||
72 | if(bit) return 1; | 72 | if (bit) |
73 | return 1; | ||
73 | return 0; | 74 | return 0; |
74 | } | 75 | } |
75 | 76 | ||
@@ -78,7 +79,7 @@ static void eprom_send_bits_string(struct net_device *dev, short b[], int len) | |||
78 | { | 79 | { |
79 | int i; | 80 | int i; |
80 | 81 | ||
81 | for(i=0; i<len; i++){ | 82 | for (i = 0; i < len; i++) { |
82 | eprom_w(dev, b[i]); | 83 | eprom_w(dev, b[i]); |
83 | eprom_ck_cycle(dev); | 84 | eprom_ck_cycle(dev); |
84 | } | 85 | } |
@@ -88,37 +89,37 @@ static void eprom_send_bits_string(struct net_device *dev, short b[], int len) | |||
88 | u32 eprom_read(struct net_device *dev, u32 addr) | 89 | u32 eprom_read(struct net_device *dev, u32 addr) |
89 | { | 90 | { |
90 | struct r8192_priv *priv = ieee80211_priv(dev); | 91 | struct r8192_priv *priv = ieee80211_priv(dev); |
91 | short read_cmd[]={1,1,0}; | 92 | short read_cmd[] = {1, 1, 0}; |
92 | short addr_str[8]; | 93 | short addr_str[8]; |
93 | int i; | 94 | int i; |
94 | int addr_len; | 95 | int addr_len; |
95 | u32 ret; | 96 | u32 ret; |
96 | 97 | ||
97 | ret=0; | 98 | ret = 0; |
98 | //enable EPROM programming | 99 | //enable EPROM programming |
99 | write_nic_byte(dev, EPROM_CMD, | 100 | write_nic_byte(dev, EPROM_CMD, |
100 | (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); | 101 | (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); |
101 | force_pci_posting(dev); | 102 | force_pci_posting(dev); |
102 | udelay(EPROM_DELAY); | 103 | udelay(EPROM_DELAY); |
103 | 104 | ||
104 | if (priv->epromtype==EPROM_93c56){ | 105 | if (priv->epromtype == EPROM_93c56) { |
105 | addr_str[7]=addr & 1; | 106 | addr_str[7] = addr & 1; |
106 | addr_str[6]=addr & (1<<1); | 107 | addr_str[6] = addr & (1<<1); |
107 | addr_str[5]=addr & (1<<2); | 108 | addr_str[5] = addr & (1<<2); |
108 | addr_str[4]=addr & (1<<3); | 109 | addr_str[4] = addr & (1<<3); |
109 | addr_str[3]=addr & (1<<4); | 110 | addr_str[3] = addr & (1<<4); |
110 | addr_str[2]=addr & (1<<5); | 111 | addr_str[2] = addr & (1<<5); |
111 | addr_str[1]=addr & (1<<6); | 112 | addr_str[1] = addr & (1<<6); |
112 | addr_str[0]=addr & (1<<7); | 113 | addr_str[0] = addr & (1<<7); |
113 | addr_len=8; | 114 | addr_len = 8; |
114 | }else{ | 115 | } else { |
115 | addr_str[5]=addr & 1; | 116 | addr_str[5] = addr & 1; |
116 | addr_str[4]=addr & (1<<1); | 117 | addr_str[4] = addr & (1<<1); |
117 | addr_str[3]=addr & (1<<2); | 118 | addr_str[3] = addr & (1<<2); |
118 | addr_str[2]=addr & (1<<3); | 119 | addr_str[2] = addr & (1<<3); |
119 | addr_str[1]=addr & (1<<4); | 120 | addr_str[1] = addr & (1<<4); |
120 | addr_str[0]=addr & (1<<5); | 121 | addr_str[0] = addr & (1<<5); |
121 | addr_len=6; | 122 | addr_len = 6; |
122 | } | 123 | } |
123 | eprom_cs(dev, 1); | 124 | eprom_cs(dev, 1); |
124 | eprom_ck_cycle(dev); | 125 | eprom_ck_cycle(dev); |
@@ -129,7 +130,7 @@ u32 eprom_read(struct net_device *dev, u32 addr) | |||
129 | //I'm unsure if it is necessary, but anyway shouldn't hurt | 130 | //I'm unsure if it is necessary, but anyway shouldn't hurt |
130 | eprom_w(dev, 0); | 131 | eprom_w(dev, 0); |
131 | 132 | ||
132 | for(i=0;i<16;i++){ | 133 | for (i = 0; i < 16; i++) { |
133 | //eeprom needs a clk cycle between writing opcode&adr | 134 | //eeprom needs a clk cycle between writing opcode&adr |
134 | //and reading data. (eeprom outs a dummy 0) | 135 | //and reading data. (eeprom outs a dummy 0) |
135 | eprom_ck_cycle(dev); | 136 | eprom_ck_cycle(dev); |
diff --git a/drivers/staging/rtl8192e/r8180_93cx6.h b/drivers/staging/rtl8192e/r8180_93cx6.h index 62e14c78e960..4c3f675c6a66 100644 --- a/drivers/staging/rtl8192e/r8180_93cx6.h +++ b/drivers/staging/rtl8192e/r8180_93cx6.h | |||
@@ -1,17 +1,18 @@ | |||
1 | /* | 1 | /* r8180_93cx6.h - 93c46 or 93c56 eeprom card programming routines |
2 | This is part of rtl8187 OpenSource driver | 2 | * |
3 | Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> | 3 | * This is part of rtl8187 OpenSource driver |
4 | Released under the terms of GPL (General Public Licence) | 4 | * Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> |
5 | 5 | * Released under the terms of GPL (General Public Licence) | |
6 | Parts of this driver are based on the GPL part of the official realtek driver | 6 | * Parts of this driver are based on the GPL part of the official realtek driver |
7 | Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon | 7 | * |
8 | Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver | 8 | * Parts of this driver are based on the rtl8180 driver skeleton from |
9 | 9 | * Patric Schenke & Andres Salomon. | |
10 | We want to tanks the Authors of such projects and the Ndiswrapper project Authors. | 10 | * |
11 | */ | 11 | * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver |
12 | 12 | * | |
13 | /*This files contains card eeprom (93c46 or 93c56) programming routines*/ | 13 | * We want to thank the authors of the above mentioned projects and to |
14 | /*memory is addressed by WORDS*/ | 14 | * the authors of the Ndiswrapper project. |
15 | */ | ||
15 | 16 | ||
16 | #include "r8192E.h" | 17 | #include "r8192E.h" |
17 | #include "r8192E_hw.h" | 18 | #include "r8192E_hw.h" |
@@ -36,5 +37,5 @@ | |||
36 | #define EPROM_TXPW2 0x1b | 37 | #define EPROM_TXPW2 0x1b |
37 | #define EPROM_TXPW1 0x3d | 38 | #define EPROM_TXPW1 0x3d |
38 | 39 | ||
39 | 40 | /* Reads a 16 bits word. */ | |
40 | u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word | 41 | u32 eprom_read(struct net_device *dev, u32 addr); |
diff --git a/drivers/staging/rtl8192e/r8190_rtl8256.c b/drivers/staging/rtl8192e/r8190_rtl8256.c index 3d67fbb65b96..1bd054d42f24 100644 --- a/drivers/staging/rtl8192e/r8190_rtl8256.c +++ b/drivers/staging/rtl8192e/r8190_rtl8256.c | |||
@@ -429,11 +429,12 @@ SetRFPowerState8190( | |||
429 | bool bResult = true; | 429 | bool bResult = true; |
430 | //u8 eRFPath; | 430 | //u8 eRFPath; |
431 | u8 i = 0, QueueID = 0; | 431 | u8 i = 0, QueueID = 0; |
432 | ptx_ring head=NULL,tail=NULL; | 432 | //ptx_ring head=NULL,tail=NULL; |
433 | struct rtl8192_tx_ring *ring = NULL; | ||
433 | 434 | ||
434 | if(priv->SetRFPowerStateInProgress == true) | 435 | if(priv->SetRFPowerStateInProgress == true) |
435 | return false; | 436 | return false; |
436 | RT_TRACE(COMP_POWER, "===========> SetRFPowerState8190()!\n"); | 437 | //RT_TRACE(COMP_PS, "===========> SetRFPowerState8190()!\n"); |
437 | priv->SetRFPowerStateInProgress = true; | 438 | priv->SetRFPowerStateInProgress = true; |
438 | 439 | ||
439 | switch(priv->rf_chip) | 440 | switch(priv->rf_chip) |
@@ -442,11 +443,11 @@ SetRFPowerState8190( | |||
442 | switch( eRFPowerState ) | 443 | switch( eRFPowerState ) |
443 | { | 444 | { |
444 | case eRfOn: | 445 | case eRfOn: |
445 | RT_TRACE(COMP_POWER, "SetRFPowerState8190() eRfOn !\n"); | 446 | //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOn !\n"); |
446 | //RXTX enable control: On | 447 | //RXTX enable control: On |
447 | //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) | 448 | //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) |
448 | // PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x2); | 449 | // PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x2); |
449 | #ifdef RTL8190P | 450 | #ifdef RTL8190P |
450 | if(priv->rf_type == RF_2T4R) | 451 | if(priv->rf_type == RF_2T4R) |
451 | { | 452 | { |
452 | //enable RF-Chip A/B | 453 | //enable RF-Chip A/B |
@@ -479,36 +480,92 @@ SetRFPowerState8190( | |||
479 | //analog to digital part2 on | 480 | //analog to digital part2 on |
480 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3); // 0x880[12:11] | 481 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3); // 0x880[12:11] |
481 | } | 482 | } |
482 | #else | 483 | else if(priv->rf_type == RF_1T1R) //RF-C |
483 | write_nic_byte(dev, ANAPAR, 0x37);//160MHz | 484 | { |
484 | write_nic_byte(dev, MacBlkCtrl, 0x17); // 0x403 | 485 | //enable RF-Chip C/D |
485 | mdelay(1); | 486 | rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4] |
486 | //enable clock 80/88 MHz | 487 | //analog to digital on |
487 | 488 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x400, 0x1);// 0x88c[10] | |
488 | priv->bHwRfOffAction = 0; | 489 | //digital to analog on |
489 | //} | 490 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x80, 0x1); // 0x880[7] |
490 | 491 | //rx antenna on | |
491 | // Baseband reset 2008.09.30 add | 492 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x4, 0x1);// 0xc04[2] |
492 | write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0)); | 493 | //rx antenna on |
493 | 494 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x4, 0x1);// 0xd04[2] | |
494 | //2 AFE | 495 | //analog to digital part2 on |
495 | // 2008.09.30 add | 496 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x800, 0x1); // 0x880[11] |
496 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x1); // 0x884 | 497 | } |
497 | //analog to digital part2 on | 498 | |
498 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] | 499 | #elif defined RTL8192E |
499 | //digital to analog on | 500 | // turn on RF |
500 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x13); // 0x880[4:3] | 501 | if((priv->ieee80211->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) |
501 | //analog to digital on | 502 | { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. |
502 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0xf03);// 0x88c[9:8] | 503 | bool rtstatus = true; |
503 | //rx antenna on | 504 | u32 InitilizeCount = 3; |
504 | //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] | 505 | do |
505 | //rx antenna on 2008.09.30 mark | 506 | { |
506 | //PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] | 507 | InitilizeCount--; |
507 | 508 | priv->RegRfOff = false; | |
508 | //2 RF | 509 | rtstatus = NicIFEnableNIC(dev); |
509 | //enable RF-Chip A/B | 510 | }while( (rtstatus != true) &&(InitilizeCount >0) ); |
511 | |||
512 | if(rtstatus != true) | ||
513 | { | ||
514 | RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__FUNCTION__); | ||
515 | priv->SetRFPowerStateInProgress = false; | ||
516 | return false; | ||
517 | } | ||
518 | |||
519 | RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); | ||
520 | } else { | ||
521 | write_nic_byte(dev, ANAPAR, 0x37);//160MHz | ||
522 | //write_nic_byte(dev, MacBlkCtrl, 0x17); // 0x403 | ||
523 | mdelay(1); | ||
524 | //enable clock 80/88 MHz | ||
525 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2] | ||
526 | priv->bHwRfOffAction = 0; | ||
527 | //} | ||
528 | |||
529 | //RF-A, RF-B | ||
530 | //enable RF-Chip A/B | ||
510 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] | 531 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] |
511 | rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x1); // 0x864[4] | 532 | //analog to digital on |
533 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] | ||
534 | //digital to analog on | ||
535 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] | ||
536 | //rx antenna on | ||
537 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] | ||
538 | //rx antenna on | ||
539 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] | ||
540 | //analog to digital part2 on | ||
541 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] | ||
542 | |||
543 | // Baseband reset 2008.09.30 add | ||
544 | //write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0)); | ||
545 | |||
546 | //2 AFE | ||
547 | // 2008.09.30 add | ||
548 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x1); // 0x884 | ||
549 | //analog to digital part2 on | ||
550 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] | ||
551 | |||
552 | |||
553 | //digital to analog on | ||
554 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x13); // 0x880[4:3] | ||
555 | //analog to digital on | ||
556 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0xf03);// 0x88c[9:8] | ||
557 | //rx antenna on | ||
558 | //PHY_SetBBReg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] | ||
559 | //rx antenna on 2008.09.30 mark | ||
560 | //PHY_SetBBReg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] | ||
561 | |||
562 | //2 RF | ||
563 | //enable RF-Chip A/B | ||
564 | //rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] | ||
565 | //rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x1); // 0x864[4] | ||
566 | |||
567 | } | ||
568 | |||
512 | #endif | 569 | #endif |
513 | break; | 570 | break; |
514 | 571 | ||
@@ -517,119 +574,137 @@ SetRFPowerState8190( | |||
517 | // By Bruce, 2008-01-16. | 574 | // By Bruce, 2008-01-16. |
518 | // | 575 | // |
519 | case eRfSleep: | 576 | case eRfSleep: |
520 | case eRfOff: | 577 | { |
521 | RT_TRACE(COMP_POWER, "SetRFPowerState8190() eRfOff/Sleep !\n"); | 578 | // HW setting had been configured with deeper mode. |
522 | if (pPSC->bLeisurePs) | 579 | if(priv->ieee80211->eRFPowerState == eRfOff) |
580 | break; | ||
581 | |||
582 | // Update current RF state variable. | ||
583 | //priv->ieee80211->eRFPowerState = eRFPowerState; | ||
584 | |||
585 | //if (pPSC->bLeisurePs) | ||
523 | { | 586 | { |
524 | for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) | 587 | for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) |
525 | { | 588 | { |
526 | switch(QueueID) { | 589 | ring = &priv->tx_ring[QueueID]; |
527 | case MGNT_QUEUE: | 590 | |
528 | tail=priv->txmapringtail; | 591 | if(skb_queue_len(&ring->queue) == 0) |
529 | head=priv->txmapringhead; | 592 | { |
593 | QueueID++; | ||
594 | continue; | ||
595 | } | ||
596 | else | ||
597 | { | ||
598 | RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); | ||
599 | udelay(10); | ||
600 | i++; | ||
601 | } | ||
602 | |||
603 | if(i >= MAX_DOZE_WAITING_TIMES_9x) | ||
604 | { | ||
605 | RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); | ||
530 | break; | 606 | break; |
607 | } | ||
608 | } | ||
609 | } | ||
531 | 610 | ||
532 | case BK_QUEUE: | 611 | //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P) |
533 | tail=priv->txbkpringtail; | 612 | #ifdef RTL8190P |
534 | head=priv->txbkpringhead; | 613 | { |
614 | PHY_SetRtl8190pRfOff(dev); | ||
615 | } | ||
616 | //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E) | ||
617 | #elif defined RTL8192E | ||
618 | { | ||
619 | PHY_SetRtl8192eRfOff(dev); | ||
620 | } | ||
621 | #endif | ||
622 | } | ||
535 | break; | 623 | break; |
536 | 624 | ||
537 | case BE_QUEUE: | 625 | case eRfOff: |
538 | tail=priv->txbepringtail; | 626 | //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/Sleep !\n"); |
539 | head=priv->txbepringhead; | ||
540 | break; | ||
541 | 627 | ||
542 | case VI_QUEUE: | 628 | // Update current RF state variable. |
543 | tail=priv->txvipringtail; | 629 | //priv->ieee80211->eRFPowerState = eRFPowerState; |
544 | head=priv->txvipringhead; | ||
545 | break; | ||
546 | 630 | ||
547 | case VO_QUEUE: | 631 | // |
548 | tail=priv->txvopringtail; | 632 | // Disconnect with Any AP or STA. |
549 | head=priv->txvopringhead; | 633 | // |
550 | break; | 634 | for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) |
635 | { | ||
636 | ring = &priv->tx_ring[QueueID]; | ||
551 | 637 | ||
552 | default: | 638 | if(skb_queue_len(&ring->queue) == 0) |
553 | tail=head=NULL; | ||
554 | break; | ||
555 | } | ||
556 | if(tail == head) | ||
557 | { | 639 | { |
558 | //DbgPrint("QueueID = %d", QueueID); | ||
559 | QueueID++; | 640 | QueueID++; |
560 | continue; | 641 | continue; |
561 | } | 642 | } |
562 | else | 643 | else |
563 | { | 644 | { |
564 | RT_TRACE(COMP_POWER, "eRf Off/Sleep: %d times BusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); | 645 | RT_TRACE(COMP_POWER, |
646 | "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); | ||
565 | udelay(10); | 647 | udelay(10); |
566 | i++; | 648 | i++; |
567 | } | 649 | } |
568 | 650 | ||
569 | if(i >= MAX_DOZE_WAITING_TIMES_9x) | 651 | if(i >= MAX_DOZE_WAITING_TIMES_9x) |
570 | { | 652 | { |
571 | RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times BusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); | 653 | RT_TRACE(COMP_POWER, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); |
572 | break; | 654 | break; |
573 | } | 655 | } |
574 | } | 656 | } |
657 | |||
658 | //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P) | ||
659 | #if defined RTL8190P | ||
660 | { | ||
661 | PHY_SetRtl8190pRfOff(dev); | ||
575 | } | 662 | } |
576 | #ifdef RTL8190P | 663 | //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E) |
577 | if(priv->rf_type == RF_2T4R) | 664 | #elif defined RTL8192E |
578 | { | 665 | { |
579 | //disable RF-Chip A/B | 666 | //if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC) && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS) |
580 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); // 0x860[4] | 667 | if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) |
668 | { // Disable all components. | ||
669 | // | ||
670 | // Note: | ||
671 | // NicIFSetLinkStatus is a big problem when we indicate the status to OS, | ||
672 | // the OS(XP) will reset. But now, we cnnot find why the NIC is hard to receive | ||
673 | // packets after RF ON. Just keep this function here and still work to find out the root couse. | ||
674 | // By Bruce, 2009-05-01. | ||
675 | // | ||
676 | //NicIFSetLinkStatus( Adapter, RT_MEDIA_DISCONNECT ); | ||
677 | //if HW radio of , need to indicate scan complete first for not be reset. | ||
678 | //if(MgntScanInProgress(pMgntInfo)) | ||
679 | // MgntResetScanProcess( Adapter ); | ||
680 | |||
681 | // <1> Disable Interrupt | ||
682 | //rtl8192_irq_disable(dev); | ||
683 | // <2> Stop all timer | ||
684 | //MgntCancelAllTimer(Adapter); | ||
685 | // <3> Disable Adapter | ||
686 | //NicIFHaltAdapter(Adapter, false); | ||
687 | NicIFDisableNIC(dev); | ||
688 | RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); | ||
689 | } | ||
690 | else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC)) | ||
691 | { // Normal case. | ||
692 | // IPS should go to this. | ||
693 | PHY_SetRtl8192eRfOff(dev); | ||
694 | } | ||
695 | } | ||
696 | #else | ||
697 | else | ||
698 | { | ||
699 | RT_TRACE(COMP_DBG,DBG_TRACE,("It is not 8190Pci and 8192PciE \n")); | ||
581 | } | 700 | } |
582 | //disable RF-Chip C/D | ||
583 | rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x0); // 0x868[4] | ||
584 | //analog to digital off, for power save | ||
585 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] | ||
586 | //digital to analog off, for power save | ||
587 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0x0); // 0x880[8:5] | ||
588 | //rx antenna off | ||
589 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);// 0xc04[3:0] | ||
590 | //rx antenna off | ||
591 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);// 0xd04[3:0] | ||
592 | //analog to digital part2 off, for power save | ||
593 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0x0); // 0x880[12:9] | ||
594 | #else //8192E | ||
595 | //2 RF | ||
596 | //disable RF-Chip A/B | ||
597 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); // 0x860[4] | ||
598 | rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x0); // 0x864[4] | ||
599 | //2 AFE | ||
600 | //analog to digital off, for power save | ||
601 | //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] | ||
602 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0x0); // 2008.09.30 Modify | ||
603 | //digital to analog off, for power save | ||
604 | //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter1, 0x18, 0x0); // 0x880[4:3] | ||
605 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x0); // 0x880 2008.09.30 Modify | ||
606 | //rx antenna off 2008.09.30 mark | ||
607 | //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf, 0x0);// 0xc04[3:0] | ||
608 | //rx antenna off 2008.09.30 mark | ||
609 | //PHY_SetBBReg(Adapter, rOFDM1_TRxPathEnable, 0xf, 0x0);// 0xd04[3:0] | ||
610 | //analog to digital part2 off, for power save | ||
611 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); // 0x880[6:5] | ||
612 | // 2008.09.30 add | ||
613 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x0); // 0x884 | ||
614 | |||
615 | |||
616 | //disable clock 80/88 MHz 2008.09.30 mark | ||
617 | //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter1, 0x4, 0x0); // 0x880[2] | ||
618 | //2 BB | ||
619 | // Baseband reset 2008.09.30 add | ||
620 | write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0)); // 0x101 | ||
621 | //MAC: off | ||
622 | write_nic_byte(dev, MacBlkCtrl, 0x0); // 0x403 | ||
623 | //slow down cpu/lbus clock from 160MHz to Lower | ||
624 | write_nic_byte(dev, ANAPAR, 0x07); // 0x 17 40MHz | ||
625 | priv->bHwRfOffAction = 0; | ||
626 | //} | ||
627 | #endif | 701 | #endif |
702 | |||
628 | break; | 703 | break; |
629 | 704 | ||
630 | default: | 705 | default: |
631 | bResult = false; | 706 | bResult = false; |
632 | RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknown state to set: 0x%X!!!\n", eRFPowerState); | 707 | RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState); |
633 | break; | 708 | break; |
634 | } | 709 | } |
635 | 710 | ||
@@ -644,64 +719,11 @@ SetRFPowerState8190( | |||
644 | { | 719 | { |
645 | // Update current RF state variable. | 720 | // Update current RF state variable. |
646 | priv->ieee80211->eRFPowerState = eRFPowerState; | 721 | priv->ieee80211->eRFPowerState = eRFPowerState; |
647 | |||
648 | switch(priv->rf_chip ) | ||
649 | { | ||
650 | case RF_8256: | ||
651 | switch(priv->ieee80211->eRFPowerState) | ||
652 | { | ||
653 | case eRfOff: | ||
654 | // | ||
655 | //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 | ||
656 | // | ||
657 | if(priv->ieee80211->RfOffReason==RF_CHANGE_BY_IPS ) | ||
658 | { | ||
659 | #ifdef TO_DO | ||
660 | Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK); | ||
661 | #endif | ||
662 | } | ||
663 | else | ||
664 | { | ||
665 | // Turn off LED if RF is not ON. | ||
666 | #ifdef TO_DO | ||
667 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); | ||
668 | #endif | ||
669 | } | ||
670 | break; | ||
671 | |||
672 | case eRfOn: | ||
673 | // Turn on RF we are still linked, which might happen when | ||
674 | // we quickly turn off and on HW RF. 2006.05.12, by rcnjko. | ||
675 | if( priv->ieee80211->state == IEEE80211_LINKED) | ||
676 | { | ||
677 | #ifdef TO_DO | ||
678 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK); | ||
679 | #endif | ||
680 | } | ||
681 | else | ||
682 | { | ||
683 | // Turn off LED if RF is not ON. | ||
684 | #ifdef TO_DO | ||
685 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK); | ||
686 | #endif | ||
687 | } | ||
688 | break; | ||
689 | |||
690 | default: | ||
691 | // do nothing. | ||
692 | break; | ||
693 | }// Switch RF state | ||
694 | |||
695 | break; | ||
696 | |||
697 | default: | ||
698 | RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n"); | ||
699 | break; | ||
700 | }// Switch RFChipID | ||
701 | } | 722 | } |
702 | 723 | ||
724 | //printk("%s()priv->ieee80211->eRFPowerState:%s\n" ,__func__,priv->ieee80211->eRFPowerState == eRfOn ? "On" : "Off"); | ||
703 | priv->SetRFPowerStateInProgress = false; | 725 | priv->SetRFPowerStateInProgress = false; |
704 | RT_TRACE(COMP_POWER, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult); | 726 | //RT_TRACE(COMP_PS, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult); |
705 | return bResult; | 727 | return bResult; |
706 | } | 728 | } |
707 | 729 | ||
diff --git a/drivers/staging/rtl8192e/r8190_rtl8256.h b/drivers/staging/rtl8192e/r8190_rtl8256.h index 7d9095a70aec..ce49c606521a 100644 --- a/drivers/staging/rtl8192e/r8190_rtl8256.h +++ b/drivers/staging/rtl8192e/r8190_rtl8256.h | |||
@@ -1,28 +1,33 @@ | |||
1 | /* | 1 | /* r8190_rtl8256.h - rtl8256 radio frontend |
2 | This is part of the rtl8180-sa2400 driver | 2 | * |
3 | released under the GPL (See file COPYING for details). | 3 | * This is part of the rtl8180-sa2400 driver |
4 | Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it> | 4 | * released under the GPL (See file COPYING for details). |
5 | * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it> | ||
6 | * | ||
7 | * Many thanks to Realtek Corp. for their great support! | ||
8 | */ | ||
5 | 9 | ||
6 | This files contains programming code for the rtl8256 | 10 | #ifndef RTL8225_H |
7 | radio frontend. | 11 | #define RTL8225_H |
8 | |||
9 | *Many* thanks to Realtek Corp. for their great support! | ||
10 | |||
11 | */ | ||
12 | |||
13 | #ifndef RTL8225H | ||
14 | #define RTL8225H | ||
15 | 12 | ||
16 | #ifdef RTL8190P | 13 | #ifdef RTL8190P |
17 | #define RTL819X_TOTAL_RF_PATH 4 | 14 | #define RTL819X_TOTAL_RF_PATH 4 |
18 | #else | 15 | #else |
19 | #define RTL819X_TOTAL_RF_PATH 2 //for 8192E | 16 | #define RTL819X_TOTAL_RF_PATH 2 /* for 8192E */ |
20 | #endif | 17 | #endif |
21 | extern void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth); | ||
22 | extern RT_STATUS PHY_RF8256_Config(struct net_device* dev); | ||
23 | extern RT_STATUS phy_RF8256_Config_ParaFile(struct net_device* dev); | ||
24 | extern void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel); | ||
25 | extern void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel); | ||
26 | extern bool MgntActSet_RF_State(struct net_device* dev, RT_RF_POWER_STATE StateToSet, RT_RF_CHANGE_SOURCE ChangeSource); | ||
27 | 18 | ||
28 | #endif | 19 | extern void PHY_SetRF8256Bandwidth(struct net_device *dev, |
20 | HT_CHANNEL_WIDTH Bandwidth); | ||
21 | |||
22 | extern RT_STATUS PHY_RF8256_Config(struct net_device *dev); | ||
23 | |||
24 | extern RT_STATUS phy_RF8256_Config_ParaFile(struct net_device *dev); | ||
25 | |||
26 | extern void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel); | ||
27 | extern void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel); | ||
28 | |||
29 | extern bool MgntActSet_RF_State(struct net_device *dev, | ||
30 | RT_RF_POWER_STATE StateToSet, | ||
31 | RT_RF_CHANGE_SOURCE ChangeSource); | ||
32 | |||
33 | #endif /* RTL8225_H */ | ||
diff --git a/drivers/staging/rtl8192e/r8192E.h b/drivers/staging/rtl8192e/r8192E.h index 61b6f250b917..f4be9cc11005 100644 --- a/drivers/staging/rtl8192e/r8192E.h +++ b/drivers/staging/rtl8192e/r8192E.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #include <linux/random.h> | 39 | #include <linux/random.h> |
40 | #include <linux/version.h> | 40 | #include <linux/version.h> |
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include "ieee80211.h" | 42 | #include "ieee80211/ieee80211.h" |
43 | 43 | ||
44 | 44 | ||
45 | 45 | ||
@@ -1003,6 +1003,11 @@ typedef struct r8192_priv | |||
1003 | int irq; | 1003 | int irq; |
1004 | short irq_enabled; | 1004 | short irq_enabled; |
1005 | struct ieee80211_device *ieee80211; | 1005 | struct ieee80211_device *ieee80211; |
1006 | #ifdef ENABLE_LPS | ||
1007 | bool ps_force; | ||
1008 | bool force_lps; | ||
1009 | bool bdisable_nic; | ||
1010 | #endif | ||
1006 | bool being_init_adapter; | 1011 | bool being_init_adapter; |
1007 | u8 Rf_Mode; | 1012 | u8 Rf_Mode; |
1008 | short card_8192; /* O: rtl8192, 1:rtl8185 V B/C, 2:rtl8185 V D */ | 1013 | short card_8192; /* O: rtl8192, 1:rtl8185 V B/C, 2:rtl8185 V D */ |
@@ -1477,7 +1482,7 @@ void write_nic_word(struct net_device *dev, int x,u16 y); | |||
1477 | void write_nic_dword(struct net_device *dev, int x,u32 y); | 1482 | void write_nic_dword(struct net_device *dev, int x,u32 y); |
1478 | void force_pci_posting(struct net_device *dev); | 1483 | void force_pci_posting(struct net_device *dev); |
1479 | 1484 | ||
1480 | void rtl8192_rtx_disable(struct net_device *); | 1485 | void rtl8192_halt_adapter(struct net_device *dev, bool reset); |
1481 | void rtl8192_rx_enable(struct net_device *); | 1486 | void rtl8192_rx_enable(struct net_device *); |
1482 | void rtl8192_tx_enable(struct net_device *); | 1487 | void rtl8192_tx_enable(struct net_device *); |
1483 | 1488 | ||
@@ -1512,5 +1517,19 @@ short rtl8192_is_tx_queue_empty(struct net_device *dev); | |||
1512 | #ifdef ENABLE_IPS | 1517 | #ifdef ENABLE_IPS |
1513 | void IPSEnter(struct net_device *dev); | 1518 | void IPSEnter(struct net_device *dev); |
1514 | void IPSLeave(struct net_device *dev); | 1519 | void IPSLeave(struct net_device *dev); |
1520 | void InactivePsWorkItemCallback(struct net_device *dev); | ||
1521 | void IPSLeave_wq(void *data); | ||
1522 | void ieee80211_ips_leave_wq(struct net_device *dev); | ||
1523 | void ieee80211_ips_leave(struct net_device *dev); | ||
1524 | #endif | ||
1525 | #ifdef ENABLE_LPS | ||
1526 | void LeisurePSEnter(struct net_device *dev); | ||
1527 | void LeisurePSLeave(struct net_device *dev); | ||
1515 | #endif | 1528 | #endif |
1529 | |||
1530 | bool NicIFEnableNIC(struct net_device* dev); | ||
1531 | bool NicIFDisableNIC(struct net_device* dev); | ||
1532 | |||
1533 | void rtl8192_irq_disable(struct net_device *dev); | ||
1534 | void PHY_SetRtl8192eRfOff(struct net_device* dev); | ||
1516 | #endif | 1535 | #endif |
diff --git a/drivers/staging/rtl8192e/r8192E_core.c b/drivers/staging/rtl8192e/r8192E_core.c index 0ca5d8b4f746..886105db8b7c 100644 --- a/drivers/staging/rtl8192e/r8192E_core.c +++ b/drivers/staging/rtl8192e/r8192E_core.c | |||
@@ -66,7 +66,7 @@ | |||
66 | #endif | 66 | #endif |
67 | 67 | ||
68 | #ifdef ENABLE_DOT11D | 68 | #ifdef ENABLE_DOT11D |
69 | #include "dot11d.h" | 69 | #include "ieee80211/dot11d.h" |
70 | #endif | 70 | #endif |
71 | 71 | ||
72 | //set here to open your trace code. //WB | 72 | //set here to open your trace code. //WB |
@@ -75,7 +75,7 @@ u32 rt_global_debug_component = \ | |||
75 | // COMP_EPROM | | 75 | // COMP_EPROM | |
76 | // COMP_PHY | | 76 | // COMP_PHY | |
77 | // COMP_RF | | 77 | // COMP_RF | |
78 | COMP_FIRMWARE | | 78 | // COMP_FIRMWARE | |
79 | // COMP_TRACE | | 79 | // COMP_TRACE | |
80 | // COMP_DOWN | | 80 | // COMP_DOWN | |
81 | // COMP_SWBW | | 81 | // COMP_SWBW | |
@@ -343,6 +343,141 @@ void write_nic_word(struct net_device *dev, int x,u16 y) | |||
343 | 343 | ||
344 | #endif /* RTL_IO_MAP */ | 344 | #endif /* RTL_IO_MAP */ |
345 | 345 | ||
346 | u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee) | ||
347 | { | ||
348 | //struct r8192_priv* priv = ieee80211_priv(dev); | ||
349 | //struct ieee80211_device *ieee = priv->ieee80211; | ||
350 | |||
351 | static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04}; | ||
352 | static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04}; | ||
353 | int wpa_ie_len= ieee->wpa_ie_len; | ||
354 | struct ieee80211_crypt_data* crypt; | ||
355 | int encrypt; | ||
356 | |||
357 | crypt = ieee->crypt[ieee->tx_keyidx]; | ||
358 | |||
359 | encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||\ | ||
360 | (ieee->host_encrypt && crypt && crypt->ops && \ | ||
361 | (0 == strcmp(crypt->ops->name,"WEP"))); | ||
362 | |||
363 | /* simply judge */ | ||
364 | if(encrypt && (wpa_ie_len == 0)) { | ||
365 | // wep encryption, no N mode setting */ | ||
366 | return SEC_ALG_WEP; | ||
367 | } else if((wpa_ie_len != 0)) { | ||
368 | // parse pairwise key type */ | ||
369 | if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || | ||
370 | ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4)))) | ||
371 | return SEC_ALG_CCMP; | ||
372 | else | ||
373 | return SEC_ALG_TKIP; | ||
374 | } else { | ||
375 | return SEC_ALG_NONE; | ||
376 | } | ||
377 | } | ||
378 | |||
379 | void | ||
380 | rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val) | ||
381 | { | ||
382 | struct r8192_priv* priv = ieee80211_priv(dev); | ||
383 | |||
384 | switch(variable) | ||
385 | { | ||
386 | |||
387 | case HW_VAR_BSSID: | ||
388 | write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]); | ||
389 | write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]); | ||
390 | break; | ||
391 | |||
392 | case HW_VAR_MEDIA_STATUS: | ||
393 | { | ||
394 | RT_OP_MODE OpMode = *((RT_OP_MODE *)(val)); | ||
395 | //LED_CTL_MODE LedAction = LED_CTL_NO_LINK; | ||
396 | u8 btMsr = read_nic_byte(dev, MSR); | ||
397 | |||
398 | btMsr &= 0xfc; | ||
399 | |||
400 | switch(OpMode) | ||
401 | { | ||
402 | case RT_OP_MODE_INFRASTRUCTURE: | ||
403 | btMsr |= MSR_INFRA; | ||
404 | //LedAction = LED_CTL_LINK; | ||
405 | break; | ||
406 | |||
407 | case RT_OP_MODE_IBSS: | ||
408 | btMsr |= MSR_ADHOC; | ||
409 | // led link set seperate | ||
410 | break; | ||
411 | |||
412 | case RT_OP_MODE_AP: | ||
413 | btMsr |= MSR_AP; | ||
414 | //LedAction = LED_CTL_LINK; | ||
415 | break; | ||
416 | |||
417 | default: | ||
418 | btMsr |= MSR_NOLINK; | ||
419 | break; | ||
420 | } | ||
421 | |||
422 | write_nic_byte(dev, MSR, btMsr); | ||
423 | |||
424 | //priv->ieee80211->LedControlHandler(dev, LedAction); | ||
425 | } | ||
426 | break; | ||
427 | |||
428 | case HW_VAR_CECHK_BSSID: | ||
429 | { | ||
430 | u32 RegRCR, Type; | ||
431 | |||
432 | Type = ((u8*)(val))[0]; | ||
433 | //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_RCR, (u8*)(&RegRCR)); | ||
434 | RegRCR = read_nic_dword(dev,RCR); | ||
435 | priv->ReceiveConfig = RegRCR; | ||
436 | |||
437 | if (Type == true) | ||
438 | RegRCR |= (RCR_CBSSID); | ||
439 | else if (Type == false) | ||
440 | RegRCR &= (~RCR_CBSSID); | ||
441 | |||
442 | //priv->ieee80211->SetHwRegHandler( dev, HW_VAR_RCR, (u8*)(&RegRCR) ); | ||
443 | write_nic_dword(dev, RCR,RegRCR); | ||
444 | priv->ReceiveConfig = RegRCR; | ||
445 | |||
446 | } | ||
447 | break; | ||
448 | |||
449 | case HW_VAR_SLOT_TIME: | ||
450 | { | ||
451 | //PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; | ||
452 | //AC_CODING eACI; | ||
453 | |||
454 | priv->slot_time = val[0]; | ||
455 | write_nic_byte(dev, SLOT_TIME, val[0]); | ||
456 | |||
457 | } | ||
458 | break; | ||
459 | |||
460 | case HW_VAR_ACK_PREAMBLE: | ||
461 | { | ||
462 | u32 regTmp = 0; | ||
463 | priv->short_preamble = (bool)(*(u8*)val ); | ||
464 | regTmp = priv->basic_rate; | ||
465 | if (priv->short_preamble) | ||
466 | regTmp |= BRSR_AckShortPmb; | ||
467 | write_nic_dword(dev, RRSR, regTmp); | ||
468 | } | ||
469 | break; | ||
470 | |||
471 | case HW_VAR_CPU_RST: | ||
472 | write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]); | ||
473 | break; | ||
474 | |||
475 | default: | ||
476 | break; | ||
477 | } | ||
478 | |||
479 | } | ||
480 | |||
346 | 481 | ||
347 | /////////////////////////////////////////////////////////// | 482 | /////////////////////////////////////////////////////////// |
348 | 483 | ||
@@ -365,11 +500,6 @@ void rtl8192_restart(struct work_struct *work); | |||
365 | //void rtl8192_rq_tx_ack(struct work_struct *work); | 500 | //void rtl8192_rq_tx_ack(struct work_struct *work); |
366 | 501 | ||
367 | void watch_dog_timer_callback(unsigned long data); | 502 | void watch_dog_timer_callback(unsigned long data); |
368 | #ifdef ENABLE_IPS | ||
369 | void IPSEnter(struct net_device *dev); | ||
370 | void IPSLeave(struct net_device *dev); | ||
371 | void InactivePsWorkItemCallback(struct net_device *dev); | ||
372 | #endif | ||
373 | /**************************************************************************** | 503 | /**************************************************************************** |
374 | -----------------------------PROCFS STUFF------------------------- | 504 | -----------------------------PROCFS STUFF------------------------- |
375 | *****************************************************************************/ | 505 | *****************************************************************************/ |
@@ -707,7 +837,7 @@ static void rtl8192_irq_enable(struct net_device *dev) | |||
707 | } | 837 | } |
708 | 838 | ||
709 | 839 | ||
710 | static void rtl8192_irq_disable(struct net_device *dev) | 840 | void rtl8192_irq_disable(struct net_device *dev) |
711 | { | 841 | { |
712 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | 842 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
713 | 843 | ||
@@ -717,6 +847,7 @@ static void rtl8192_irq_disable(struct net_device *dev) | |||
717 | } | 847 | } |
718 | 848 | ||
719 | 849 | ||
850 | #if 0 | ||
720 | static void rtl8192_set_mode(struct net_device *dev,int mode) | 851 | static void rtl8192_set_mode(struct net_device *dev,int mode) |
721 | { | 852 | { |
722 | u8 ecmd; | 853 | u8 ecmd; |
@@ -727,7 +858,7 @@ static void rtl8192_set_mode(struct net_device *dev,int mode) | |||
727 | ecmd=ecmd &~ (1<<EPROM_CK_SHIFT); | 858 | ecmd=ecmd &~ (1<<EPROM_CK_SHIFT); |
728 | write_nic_byte(dev, EPROM_CMD, ecmd); | 859 | write_nic_byte(dev, EPROM_CMD, ecmd); |
729 | } | 860 | } |
730 | 861 | #endif | |
731 | 862 | ||
732 | void rtl8192_update_msr(struct net_device *dev) | 863 | void rtl8192_update_msr(struct net_device *dev) |
733 | { | 864 | { |
@@ -861,7 +992,7 @@ static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio) | |||
861 | ring->desc = NULL; | 992 | ring->desc = NULL; |
862 | } | 993 | } |
863 | 994 | ||
864 | 995 | #if 0 | |
865 | static void rtl8192_beacon_disable(struct net_device *dev) | 996 | static void rtl8192_beacon_disable(struct net_device *dev) |
866 | { | 997 | { |
867 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | 998 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
@@ -873,38 +1004,116 @@ static void rtl8192_beacon_disable(struct net_device *dev) | |||
873 | reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER); | 1004 | reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER); |
874 | write_nic_dword(priv->ieee80211->dev, INTA_MASK, reg); | 1005 | write_nic_dword(priv->ieee80211->dev, INTA_MASK, reg); |
875 | } | 1006 | } |
1007 | #endif | ||
1008 | |||
1009 | void PHY_SetRtl8192eRfOff(struct net_device* dev ) | ||
1010 | { | ||
1011 | //struct r8192_priv *priv = ieee80211_priv(dev); | ||
1012 | |||
1013 | //disable RF-Chip A/B | ||
1014 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); | ||
1015 | //analog to digital off, for power save | ||
1016 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0); | ||
1017 | //digital to analog off, for power save | ||
1018 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); | ||
1019 | //rx antenna off | ||
1020 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0); | ||
1021 | //rx antenna off | ||
1022 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0); | ||
1023 | //analog to digital part2 off, for power save | ||
1024 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); | ||
1025 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0); | ||
1026 | // Analog parameter!!Change bias and Lbus control. | ||
1027 | write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07); | ||
1028 | |||
1029 | } | ||
876 | 1030 | ||
877 | void rtl8192_rtx_disable(struct net_device *dev) | 1031 | void rtl8192_halt_adapter(struct net_device *dev, bool reset) |
878 | { | 1032 | { |
879 | u8 cmd; | 1033 | //u8 cmd; |
880 | struct r8192_priv *priv = ieee80211_priv(dev); | 1034 | struct r8192_priv *priv = ieee80211_priv(dev); |
881 | int i; | 1035 | int i; |
1036 | u8 OpMode; | ||
1037 | u8 u1bTmp; | ||
1038 | u32 ulRegRead; | ||
1039 | |||
1040 | OpMode = RT_OP_MODE_NO_LINK; | ||
1041 | priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode); | ||
882 | 1042 | ||
1043 | #if 1 | ||
1044 | if(!priv->ieee80211->bSupportRemoteWakeUp) | ||
1045 | { | ||
1046 | u1bTmp = 0x0; // disable tx/rx. In 8185 we write 0x10 (Reset bit), but here we make reference to WMAC and wirte 0x0. 2006.11.21 Emily | ||
1047 | //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_COMMAND, &u1bTmp ); // Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07. | ||
1048 | write_nic_byte(dev, CMDR, u1bTmp); | ||
1049 | } | ||
1050 | #else | ||
883 | cmd=read_nic_byte(dev,CMDR); | 1051 | cmd=read_nic_byte(dev,CMDR); |
884 | // if(!priv->ieee80211->bSupportRemoteWakeUp) { | 1052 | write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE)); |
885 | write_nic_byte(dev, CMDR, cmd &~ \ | 1053 | #endif |
886 | (CR_TE|CR_RE)); | ||
887 | // } | ||
888 | force_pci_posting(dev); | ||
889 | mdelay(30); | ||
890 | 1054 | ||
891 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | 1055 | mdelay(20); |
892 | skb_queue_purge(&priv->ieee80211->skb_waitQ [i]); | ||
893 | } | ||
894 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | ||
895 | skb_queue_purge(&priv->ieee80211->skb_aggQ [i]); | ||
896 | } | ||
897 | 1056 | ||
1057 | if(!reset) | ||
1058 | { | ||
1059 | //PlatformStallExecution(150000); | ||
1060 | mdelay(150); | ||
1061 | |||
1062 | #ifdef RTL8192E | ||
1063 | priv->bHwRfOffAction = 2; | ||
1064 | #endif | ||
1065 | |||
1066 | // | ||
1067 | // Call MgntActSet_RF_State instead to prevent RF config race condition. | ||
1068 | // By Bruce, 2008-01-17. | ||
1069 | // | ||
1070 | if(!priv->ieee80211->bSupportRemoteWakeUp) | ||
1071 | { | ||
1072 | //MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_INIT); | ||
1073 | //MgntActSet_RF_State(Adapter, eRfOff, Adapter->MgntInfo.RfOffReason); | ||
1074 | //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P) | ||
1075 | |||
1076 | PHY_SetRtl8192eRfOff(dev); | ||
1077 | |||
1078 | // 2006.11.30. System reset bit | ||
1079 | //priv->ieee80211->GetHwRegHandler(dev, HW_VAR_CPU_RST, (u32*)(&ulRegRead) ); | ||
1080 | ulRegRead = read_nic_dword(dev,CPU_GEN); | ||
1081 | ulRegRead|=CPU_GEN_SYSTEM_RESET; | ||
1082 | //priv->ieee80211->SetHwRegHandler(dev, HW_VAR_CPU_RST, &ulRegRead); | ||
1083 | write_nic_dword(dev,CPU_GEN, ulRegRead); | ||
1084 | } | ||
1085 | else | ||
1086 | { | ||
1087 | //2008.06.03 for WOL | ||
1088 | write_nic_dword(dev, WFCRC0, 0xffffffff); | ||
1089 | write_nic_dword(dev, WFCRC1, 0xffffffff); | ||
1090 | write_nic_dword(dev, WFCRC2, 0xffffffff); | ||
1091 | |||
1092 | //Write PMR register | ||
1093 | write_nic_byte(dev, PMR, 0x5); | ||
1094 | //Disable tx, enanble rx | ||
1095 | write_nic_byte(dev, MacBlkCtrl, 0xa); | ||
1096 | } | ||
1097 | } | ||
1098 | |||
1099 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | ||
1100 | skb_queue_purge(&priv->ieee80211->skb_waitQ [i]); | ||
1101 | } | ||
1102 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | ||
1103 | skb_queue_purge(&priv->ieee80211->skb_aggQ [i]); | ||
1104 | } | ||
898 | 1105 | ||
899 | skb_queue_purge(&priv->skb_queue); | 1106 | skb_queue_purge(&priv->skb_queue); |
900 | return; | 1107 | return; |
901 | } | 1108 | } |
902 | 1109 | ||
1110 | #if 0 | ||
903 | static void rtl8192_reset(struct net_device *dev) | 1111 | static void rtl8192_reset(struct net_device *dev) |
904 | { | 1112 | { |
905 | rtl8192_irq_disable(dev); | 1113 | rtl8192_irq_disable(dev); |
906 | printk("This is RTL819xP Reset procedure\n"); | 1114 | printk("This is RTL819xP Reset procedure\n"); |
907 | } | 1115 | } |
1116 | #endif | ||
908 | 1117 | ||
909 | static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540}; | 1118 | static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540}; |
910 | inline u16 rtl8192_rate2rate(short rate) | 1119 | inline u16 rtl8192_rate2rate(short rate) |
@@ -954,6 +1163,12 @@ static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, | |||
954 | /* shall not be referred by command packet */ | 1163 | /* shall not be referred by command packet */ |
955 | assert(queue_index != TXCMD_QUEUE); | 1164 | assert(queue_index != TXCMD_QUEUE); |
956 | 1165 | ||
1166 | if((priv->bHwRadioOff == true)||(!priv->up)) | ||
1167 | { | ||
1168 | kfree_skb(skb); | ||
1169 | return; | ||
1170 | } | ||
1171 | |||
957 | //spin_lock_irqsave(&priv->tx_lock,flags); | 1172 | //spin_lock_irqsave(&priv->tx_lock,flags); |
958 | 1173 | ||
959 | memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); | 1174 | memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); |
@@ -996,6 +1211,13 @@ static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev) | |||
996 | cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); | 1211 | cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); |
997 | u8 queue_index = tcb_desc->queue_index; | 1212 | u8 queue_index = tcb_desc->queue_index; |
998 | 1213 | ||
1214 | if(queue_index != TXCMD_QUEUE){ | ||
1215 | if((priv->bHwRadioOff == true)||(!priv->up)) | ||
1216 | { | ||
1217 | kfree_skb(skb); | ||
1218 | return 0; | ||
1219 | } | ||
1220 | } | ||
999 | 1221 | ||
1000 | //spin_lock_irqsave(&priv->tx_lock,flags); | 1222 | //spin_lock_irqsave(&priv->tx_lock,flags); |
1001 | 1223 | ||
@@ -1379,6 +1601,15 @@ short rtl8192_tx(struct net_device *dev, struct sk_buff* skb) | |||
1379 | u8* pda_addr = NULL; | 1601 | u8* pda_addr = NULL; |
1380 | int idx; | 1602 | int idx; |
1381 | 1603 | ||
1604 | if(priv->bdisable_nic){ | ||
1605 | RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __FUNCTION__, skb->len, tcb_desc->queue_index); | ||
1606 | return skb->len; | ||
1607 | } | ||
1608 | |||
1609 | #ifdef ENABLE_LPS | ||
1610 | priv->ieee80211->bAwakePktSent = true; | ||
1611 | #endif | ||
1612 | |||
1382 | mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE); | 1613 | mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE); |
1383 | /* collect the tx packets statitcs */ | 1614 | /* collect the tx packets statitcs */ |
1384 | pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI); | 1615 | pda_addr = ((u8*)skb->data) + sizeof(TX_FWINFO_8190PCI); |
@@ -1481,6 +1712,7 @@ short rtl8192_tx(struct net_device *dev, struct sk_buff* skb) | |||
1481 | if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { | 1712 | if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { |
1482 | RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x", \ | 1713 | RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d,%x", \ |
1483 | tcb_desc->queue_index,ring->idx, idx,skb->len); | 1714 | tcb_desc->queue_index,ring->idx, idx,skb->len); |
1715 | spin_unlock_irqrestore(&priv->irq_th_lock,flags); | ||
1484 | return skb->len; | 1716 | return skb->len; |
1485 | } | 1717 | } |
1486 | 1718 | ||
@@ -1575,7 +1807,7 @@ static short rtl8192_alloc_rx_desc_ring(struct net_device *dev) | |||
1575 | return 0; | 1807 | return 0; |
1576 | priv->rx_buf[i] = skb; | 1808 | priv->rx_buf[i] = skb; |
1577 | mapping = (dma_addr_t *)skb->cb; | 1809 | mapping = (dma_addr_t *)skb->cb; |
1578 | *mapping = pci_map_single(priv->pdev, skb->tail,//skb_tail_pointer(skb), | 1810 | *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb), |
1579 | priv->rxbuffersize, PCI_DMA_FROMDEVICE); | 1811 | priv->rxbuffersize, PCI_DMA_FROMDEVICE); |
1580 | 1812 | ||
1581 | entry->BufferAddress = cpu_to_le32(*mapping); | 1813 | entry->BufferAddress = cpu_to_le32(*mapping); |
@@ -1779,7 +2011,7 @@ static void rtl8192_qos_activate(struct work_struct * work) | |||
1779 | (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)| | 2011 | (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)| |
1780 | (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)| | 2012 | (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)| |
1781 | ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET)); | 2013 | ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET)); |
1782 | printk("===>u4bAcParam:%x, ", u4bAcParam); | 2014 | //printk("===>u4bAcParam:%x, ", u4bAcParam); |
1783 | write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam); | 2015 | write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam); |
1784 | //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332); | 2016 | //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332); |
1785 | } | 2017 | } |
@@ -1964,11 +2196,24 @@ void rtl8192_update_ratr_table(struct net_device* dev) | |||
1964 | write_nic_byte(dev, UFWP, 1); | 2196 | write_nic_byte(dev, UFWP, 1); |
1965 | } | 2197 | } |
1966 | 2198 | ||
2199 | #if 0 | ||
1967 | static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04}; | 2200 | static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04}; |
1968 | static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04}; | 2201 | static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04}; |
2202 | #endif | ||
2203 | |||
1969 | static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev) | 2204 | static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev) |
1970 | { | 2205 | { |
1971 | #if 1 | 2206 | #if 1 |
2207 | |||
2208 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
2209 | struct ieee80211_device *ieee = priv->ieee80211; | ||
2210 | if (ieee->rtllib_ap_sec_type && | ||
2211 | (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))) { | ||
2212 | return false; | ||
2213 | } else { | ||
2214 | return true; | ||
2215 | } | ||
2216 | #else | ||
1972 | struct r8192_priv* priv = ieee80211_priv(dev); | 2217 | struct r8192_priv* priv = ieee80211_priv(dev); |
1973 | struct ieee80211_device* ieee = priv->ieee80211; | 2218 | struct ieee80211_device* ieee = priv->ieee80211; |
1974 | int wpa_ie_len= ieee->wpa_ie_len; | 2219 | int wpa_ie_len= ieee->wpa_ie_len; |
@@ -1995,18 +2240,6 @@ static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev) | |||
1995 | return true; | 2240 | return true; |
1996 | } | 2241 | } |
1997 | 2242 | ||
1998 | #if 0 | ||
1999 | //In here we discuss with SD4 David. He think we still can send TKIP in broadcast group key in MCS rate. | ||
2000 | //We can't force in G mode if Pairwie key is AES and group key is TKIP | ||
2001 | if((pSecInfo->GroupEncAlgorithm == WEP104_Encryption) || (pSecInfo->GroupEncAlgorithm == WEP40_Encryption) || | ||
2002 | (pSecInfo->PairwiseEncAlgorithm == WEP104_Encryption) || | ||
2003 | (pSecInfo->PairwiseEncAlgorithm == WEP40_Encryption) || (pSecInfo->PairwiseEncAlgorithm == TKIP_Encryption)) | ||
2004 | { | ||
2005 | return false; | ||
2006 | } | ||
2007 | else | ||
2008 | return true; | ||
2009 | #endif | ||
2010 | return true; | 2243 | return true; |
2011 | #endif | 2244 | #endif |
2012 | } | 2245 | } |
@@ -2080,7 +2313,7 @@ static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode) | |||
2080 | wireless_mode = WIRELESS_MODE_B; | 2313 | wireless_mode = WIRELESS_MODE_B; |
2081 | } | 2314 | } |
2082 | } | 2315 | } |
2083 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA | 2316 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA |
2084 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); | 2317 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); |
2085 | #endif | 2318 | #endif |
2086 | priv->ieee80211->mode = wireless_mode; | 2319 | priv->ieee80211->mode = wireless_mode; |
@@ -2127,7 +2360,19 @@ short rtl8192_is_tx_queue_empty(struct net_device *dev) | |||
2127 | } | 2360 | } |
2128 | static void rtl8192_hw_sleep_down(struct net_device *dev) | 2361 | static void rtl8192_hw_sleep_down(struct net_device *dev) |
2129 | { | 2362 | { |
2130 | RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__); | 2363 | struct r8192_priv *priv = ieee80211_priv(dev); |
2364 | unsigned long flags = 0; | ||
2365 | |||
2366 | spin_lock_irqsave(&priv->rf_ps_lock,flags); | ||
2367 | if (priv->RFChangeInProgress) { | ||
2368 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | ||
2369 | RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n"); | ||
2370 | printk("rtl8192_hw_sleep_down(): RF Change in progress!\n"); | ||
2371 | return; | ||
2372 | } | ||
2373 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | ||
2374 | //RT_TRACE(COMP_PS, "%s()============>come to sleep down\n", __FUNCTION__); | ||
2375 | |||
2131 | MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS); | 2376 | MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS); |
2132 | } | 2377 | } |
2133 | static void rtl8192_hw_sleep_wq (struct work_struct *work) | 2378 | static void rtl8192_hw_sleep_wq (struct work_struct *work) |
@@ -2138,21 +2383,29 @@ static void rtl8192_hw_sleep_wq (struct work_struct *work) | |||
2138 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); | 2383 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); |
2139 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq); | 2384 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq); |
2140 | struct net_device *dev = ieee->dev; | 2385 | struct net_device *dev = ieee->dev; |
2141 | //printk("=========>%s()\n", __FUNCTION__); | 2386 | |
2142 | rtl8192_hw_sleep_down(dev); | 2387 | rtl8192_hw_sleep_down(dev); |
2143 | } | 2388 | } |
2144 | // printk("dev is %d\n",dev); | 2389 | |
2145 | // printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__); | ||
2146 | static void rtl8192_hw_wakeup(struct net_device* dev) | 2390 | static void rtl8192_hw_wakeup(struct net_device* dev) |
2147 | { | 2391 | { |
2148 | // u32 flags = 0; | 2392 | struct r8192_priv *priv = ieee80211_priv(dev); |
2393 | unsigned long flags = 0; | ||
2394 | |||
2395 | spin_lock_irqsave(&priv->rf_ps_lock,flags); | ||
2396 | if (priv->RFChangeInProgress) { | ||
2397 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | ||
2398 | RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n"); | ||
2399 | printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n"); | ||
2400 | queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20 | ||
2401 | return; | ||
2402 | } | ||
2403 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | ||
2149 | 2404 | ||
2150 | // spin_lock_irqsave(&priv->ps_lock,flags); | 2405 | //RT_TRACE(COMP_PS, "%s()============>come to wake up\n", __FUNCTION__); |
2151 | RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__); | ||
2152 | MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS); | 2406 | MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS); |
2153 | //FIXME: will we send package stored while nic is sleep? | ||
2154 | // spin_unlock_irqrestore(&priv->ps_lock,flags); | ||
2155 | } | 2407 | } |
2408 | |||
2156 | void rtl8192_hw_wakeup_wq (struct work_struct *work) | 2409 | void rtl8192_hw_wakeup_wq (struct work_struct *work) |
2157 | { | 2410 | { |
2158 | // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq); | 2411 | // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq); |
@@ -2169,7 +2422,6 @@ void rtl8192_hw_wakeup_wq (struct work_struct *work) | |||
2169 | #define MAX_SLEEP_TIME 10000 | 2422 | #define MAX_SLEEP_TIME 10000 |
2170 | static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl) | 2423 | static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl) |
2171 | { | 2424 | { |
2172 | |||
2173 | struct r8192_priv *priv = ieee80211_priv(dev); | 2425 | struct r8192_priv *priv = ieee80211_priv(dev); |
2174 | 2426 | ||
2175 | u32 rb = jiffies; | 2427 | u32 rb = jiffies; |
@@ -2177,58 +2429,55 @@ static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl) | |||
2177 | 2429 | ||
2178 | spin_lock_irqsave(&priv->ps_lock,flags); | 2430 | spin_lock_irqsave(&priv->ps_lock,flags); |
2179 | 2431 | ||
2180 | /* Writing HW register with 0 equals to disable | 2432 | // Writing HW register with 0 equals to disable |
2181 | * the timer, that is not really what we want | 2433 | // the timer, that is not really what we want |
2182 | */ | 2434 | // |
2183 | tl -= MSECS(4+16+7); | 2435 | tl -= MSECS(8+16+7); |
2184 | |||
2185 | //if(tl == 0) tl = 1; | ||
2186 | |||
2187 | /* FIXME HACK FIXME HACK */ | ||
2188 | // force_pci_posting(dev); | ||
2189 | //mdelay(1); | ||
2190 | |||
2191 | // rb = read_nic_dword(dev, TSFTR); | ||
2192 | 2436 | ||
2193 | /* If the interval in witch we are requested to sleep is too | 2437 | // If the interval in witch we are requested to sleep is too |
2194 | * short then give up and remain awake | 2438 | // short then give up and remain awake |
2195 | */ | 2439 | // when we sleep after send null frame, the timer will be too short to sleep. |
2440 | // | ||
2196 | if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME)) | 2441 | if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME)) |
2197 | ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) { | 2442 | ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) { |
2198 | spin_unlock_irqrestore(&priv->ps_lock,flags); | 2443 | spin_unlock_irqrestore(&priv->ps_lock,flags); |
2199 | printk("too short to sleep\n"); | 2444 | printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME)); |
2200 | return; | 2445 | return; |
2201 | } | 2446 | } |
2202 | 2447 | ||
2203 | // write_nic_dword(dev, TimerInt, tl); | ||
2204 | // rb = read_nic_dword(dev, TSFTR); | ||
2205 | { | ||
2206 | u32 tmp = (tl>rb)?(tl-rb):(rb-tl); | ||
2207 | // if (tl<rb) | ||
2208 | queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb | ||
2209 | } | ||
2210 | /* if we suspect the TimerInt is gone beyond tl | ||
2211 | * while setting it, then give up | ||
2212 | */ | ||
2213 | #if 1 | ||
2214 | if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))|| | 2448 | if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))|| |
2215 | ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) { | 2449 | ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))|| |
2450 | ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) { | ||
2216 | printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME)); | 2451 | printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME)); |
2217 | spin_unlock_irqrestore(&priv->ps_lock,flags); | 2452 | spin_unlock_irqrestore(&priv->ps_lock,flags); |
2218 | return; | 2453 | return; |
2219 | } | 2454 | } |
2220 | #endif | 2455 | { |
2221 | // if(priv->rf_sleep) | 2456 | u32 tmp = (tl>rb)?(tl-rb):(rb-tl); |
2222 | // priv->rf_sleep(dev); | 2457 | queue_delayed_work(priv->ieee80211->wq, |
2223 | 2458 | &priv->ieee80211->hw_wakeup_wq,tmp); | |
2224 | //printk("<=========%s()\n", __FUNCTION__); | 2459 | //PowerSave not supported when kernel version less 2.6.20 |
2225 | queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0); | 2460 | } |
2461 | queue_delayed_work(priv->ieee80211->wq, | ||
2462 | (void *)&priv->ieee80211->hw_sleep_wq,0); | ||
2226 | spin_unlock_irqrestore(&priv->ps_lock,flags); | 2463 | spin_unlock_irqrestore(&priv->ps_lock,flags); |
2464 | |||
2227 | } | 2465 | } |
2228 | static void rtl8192_init_priv_variable(struct net_device* dev) | 2466 | static void rtl8192_init_priv_variable(struct net_device* dev) |
2229 | { | 2467 | { |
2230 | struct r8192_priv *priv = ieee80211_priv(dev); | 2468 | struct r8192_priv *priv = ieee80211_priv(dev); |
2231 | u8 i; | 2469 | u8 i; |
2470 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
2471 | |||
2472 | // Default Halt the NIC if RF is OFF. | ||
2473 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC; | ||
2474 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ; | ||
2475 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM; | ||
2476 | pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM; | ||
2477 | pPSC->bLeisurePs = true; | ||
2478 | pPSC->RegMaxLPSAwakeIntvl = 5; | ||
2479 | priv->bHwRadioOff = false; | ||
2480 | |||
2232 | priv->being_init_adapter = false; | 2481 | priv->being_init_adapter = false; |
2233 | priv->txbuffsize = 1600;//1024; | 2482 | priv->txbuffsize = 1600;//1024; |
2234 | priv->txfwbuffersize = 4096; | 2483 | priv->txfwbuffersize = 4096; |
@@ -2328,6 +2577,17 @@ static void rtl8192_init_priv_variable(struct net_device* dev) | |||
2328 | //added by amy | 2577 | //added by amy |
2329 | priv->ieee80211->InitialGainHandler = InitialGain819xPci; | 2578 | priv->ieee80211->InitialGainHandler = InitialGain819xPci; |
2330 | 2579 | ||
2580 | #ifdef ENABLE_IPS | ||
2581 | priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq; | ||
2582 | priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave; | ||
2583 | #endif | ||
2584 | #ifdef ENABLE_LPS | ||
2585 | priv->ieee80211->LeisurePSLeave = LeisurePSLeave; | ||
2586 | #endif//ENABL | ||
2587 | |||
2588 | priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg; | ||
2589 | priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type; | ||
2590 | |||
2331 | priv->card_type = USB; | 2591 | priv->card_type = USB; |
2332 | { | 2592 | { |
2333 | priv->ShortRetryLimit = 0x30; | 2593 | priv->ShortRetryLimit = 0x30; |
@@ -2400,6 +2660,10 @@ static void rtl8192_init_priv_task(struct net_device* dev) | |||
2400 | priv->priv_wq = create_workqueue(DRV_NAME); | 2660 | priv->priv_wq = create_workqueue(DRV_NAME); |
2401 | #endif | 2661 | #endif |
2402 | 2662 | ||
2663 | #ifdef ENABLE_IPS | ||
2664 | INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq); | ||
2665 | #endif | ||
2666 | |||
2403 | // INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart); | 2667 | // INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart); |
2404 | INIT_WORK(&priv->reset_wq, rtl8192_restart); | 2668 | INIT_WORK(&priv->reset_wq, rtl8192_restart); |
2405 | // INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog); | 2669 | // INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog); |
@@ -2550,10 +2814,7 @@ static void rtl8192_read_eeprom_info(struct net_device* dev) | |||
2550 | memcpy(dev->dev_addr, bMac_Tmp_Addr, 6); | 2814 | memcpy(dev->dev_addr, bMac_Tmp_Addr, 6); |
2551 | } | 2815 | } |
2552 | 2816 | ||
2553 | RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", | 2817 | RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr); |
2554 | dev->dev_addr[0], dev->dev_addr[1], | ||
2555 | dev->dev_addr[2], dev->dev_addr[3], | ||
2556 | dev->dev_addr[4], dev->dev_addr[5]); | ||
2557 | 2818 | ||
2558 | //2 TX Power Check EEPROM Fail or not | 2819 | //2 TX Power Check EEPROM Fail or not |
2559 | if(priv->card_8192_version > VERSION_8190_BD) { | 2820 | if(priv->card_8192_version > VERSION_8190_BD) { |
@@ -2926,13 +3187,14 @@ static void rtl8192_read_eeprom_info(struct net_device* dev) | |||
2926 | #endif | 3187 | #endif |
2927 | break; | 3188 | break; |
2928 | } | 3189 | } |
2929 | /* | 3190 | |
2930 | //2008.06.03, for WOL | 3191 | |
2931 | if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304) | 3192 | if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304) |
2932 | priv->ieee80211->bSupportRemoteWakeUp = TRUE; | 3193 | priv->ieee80211->bSupportRemoteWakeUp = true; |
2933 | else | 3194 | else |
2934 | priv->ieee80211->bSupportRemoteWakeUp = FALSE; | 3195 | priv->ieee80211->bSupportRemoteWakeUp = false; |
2935 | */ | 3196 | |
3197 | |||
2936 | RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan); | 3198 | RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan); |
2937 | RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan); | 3199 | RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan); |
2938 | RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy); | 3200 | RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy); |
@@ -4006,12 +4268,19 @@ static void rtl819x_ifsilentreset(struct net_device *dev) | |||
4006 | struct ieee80211_device *ieee = priv->ieee80211; | 4268 | struct ieee80211_device *ieee = priv->ieee80211; |
4007 | 4269 | ||
4008 | 4270 | ||
4271 | return; | ||
4272 | |||
4009 | // 2007.07.20. If we need to check CCK stop, please uncomment this line. | 4273 | // 2007.07.20. If we need to check CCK stop, please uncomment this line. |
4010 | //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter); | 4274 | //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter); |
4011 | 4275 | ||
4012 | if(priv->ResetProgress==RESET_TYPE_NORESET) | 4276 | if(priv->ResetProgress==RESET_TYPE_NORESET) |
4013 | { | 4277 | { |
4014 | RESET_START: | 4278 | RESET_START: |
4279 | #ifdef ENABLE_LPS | ||
4280 | //LZM for PS-Poll AID issue. 090429 | ||
4281 | if(priv->ieee80211->state == IEEE80211_LINKED) | ||
4282 | LeisurePSLeave(dev); | ||
4283 | #endif | ||
4015 | 4284 | ||
4016 | RT_TRACE(COMP_RESET,"=========>Reset progress!! \n"); | 4285 | RT_TRACE(COMP_RESET,"=========>Reset progress!! \n"); |
4017 | 4286 | ||
@@ -4051,9 +4320,9 @@ RESET_START: | |||
4051 | } | 4320 | } |
4052 | else{ | 4321 | else{ |
4053 | printk("ieee->state is NOT LINKED\n"); | 4322 | printk("ieee->state is NOT LINKED\n"); |
4054 | ieee80211_softmac_stop_protocol(priv->ieee80211); | 4323 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
4055 | } | 4324 | } |
4056 | rtl8192_rtx_disable(dev); | 4325 | rtl8192_halt_adapter(dev, true); |
4057 | up(&priv->wx_sem); | 4326 | up(&priv->wx_sem); |
4058 | RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__); | 4327 | RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__); |
4059 | RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__); | 4328 | RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__); |
@@ -4150,6 +4419,128 @@ void InactivePsWorkItemCallback(struct net_device *dev) | |||
4150 | RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n"); | 4419 | RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n"); |
4151 | } | 4420 | } |
4152 | 4421 | ||
4422 | #ifdef ENABLE_LPS | ||
4423 | // | ||
4424 | // Change current and default preamble mode. | ||
4425 | // 2005.01.06, by rcnjko. | ||
4426 | // | ||
4427 | bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode) | ||
4428 | { | ||
4429 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
4430 | //PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
4431 | //u8 RpwmVal, FwPwrMode; | ||
4432 | |||
4433 | // Currently, we do not change power save mode on IBSS mode. | ||
4434 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | ||
4435 | { | ||
4436 | return false; | ||
4437 | } | ||
4438 | |||
4439 | // | ||
4440 | // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us, | ||
4441 | // some AP will not response to our mgnt frames with PwrMgt bit set, | ||
4442 | // e.g. cannot associate the AP. | ||
4443 | // So I commented out it. 2005.02.16, by rcnjko. | ||
4444 | // | ||
4445 | // // Change device's power save mode. | ||
4446 | // Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode ); | ||
4447 | |||
4448 | // Update power save mode configured. | ||
4449 | //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode); | ||
4450 | if(!priv->ps_force) { | ||
4451 | priv->ieee80211->ps = rtPsMode; | ||
4452 | } | ||
4453 | |||
4454 | // Awake immediately | ||
4455 | if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED) | ||
4456 | { | ||
4457 | unsigned long flags; | ||
4458 | |||
4459 | //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0); | ||
4460 | // Notify the AP we awke. | ||
4461 | rtl8192_hw_wakeup(dev); | ||
4462 | priv->ieee80211->sta_sleep = 0; | ||
4463 | |||
4464 | spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags); | ||
4465 | printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n"); | ||
4466 | ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0); | ||
4467 | spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags); | ||
4468 | } | ||
4469 | |||
4470 | return true; | ||
4471 | } | ||
4472 | |||
4473 | //================================================================================ | ||
4474 | // Leisure Power Save in linked state. | ||
4475 | //================================================================================ | ||
4476 | |||
4477 | // | ||
4478 | // Description: | ||
4479 | // Enter the leisure power save mode. | ||
4480 | // | ||
4481 | void LeisurePSEnter(struct net_device *dev) | ||
4482 | { | ||
4483 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
4484 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
4485 | |||
4486 | //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n"); | ||
4487 | //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n", | ||
4488 | // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD); | ||
4489 | |||
4490 | if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) && | ||
4491 | (priv->ieee80211->state == IEEE80211_LINKED)) || | ||
4492 | (priv->ieee80211->iw_mode == IW_MODE_ADHOC) || | ||
4493 | (priv->ieee80211->iw_mode == IW_MODE_MASTER)) | ||
4494 | return; | ||
4495 | |||
4496 | if (pPSC->bLeisurePs) | ||
4497 | { | ||
4498 | // Idle for a while if we connect to AP a while ago. | ||
4499 | if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec | ||
4500 | { | ||
4501 | |||
4502 | if(priv->ieee80211->ps == IEEE80211_PS_DISABLED) | ||
4503 | { | ||
4504 | |||
4505 | //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n"); | ||
4506 | MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST); | ||
4507 | |||
4508 | } | ||
4509 | } | ||
4510 | else | ||
4511 | pPSC->LpsIdleCount++; | ||
4512 | } | ||
4513 | } | ||
4514 | |||
4515 | |||
4516 | // | ||
4517 | // Description: | ||
4518 | // Leave the leisure power save mode. | ||
4519 | // | ||
4520 | void LeisurePSLeave(struct net_device *dev) | ||
4521 | { | ||
4522 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
4523 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
4524 | |||
4525 | |||
4526 | //RT_TRACE(COMP_PS, "LeisurePSLeave()...\n"); | ||
4527 | //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d\n", | ||
4528 | // pPSC->bLeisurePs, priv->ieee80211->ps); | ||
4529 | |||
4530 | if (pPSC->bLeisurePs) | ||
4531 | { | ||
4532 | if(priv->ieee80211->ps != IEEE80211_PS_DISABLED) | ||
4533 | { | ||
4534 | // move to lps_wakecomplete() | ||
4535 | //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n"); | ||
4536 | MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED); | ||
4537 | |||
4538 | } | ||
4539 | } | ||
4540 | } | ||
4541 | #endif | ||
4542 | |||
4543 | |||
4153 | // | 4544 | // |
4154 | // Description: | 4545 | // Description: |
4155 | // Enter the inactive power save mode. RF will be off | 4546 | // Enter the inactive power save mode. RF will be off |
@@ -4178,6 +4569,7 @@ IPSEnter(struct net_device *dev) | |||
4178 | && (priv->ieee80211->state != IEEE80211_LINKED) ) | 4569 | && (priv->ieee80211->state != IEEE80211_LINKED) ) |
4179 | { | 4570 | { |
4180 | RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n"); | 4571 | RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n"); |
4572 | //printk("IPSEnter(): Turn off RF.\n"); | ||
4181 | pPSC->eInactivePowerState = eRfOff; | 4573 | pPSC->eInactivePowerState = eRfOff; |
4182 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); | 4574 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); |
4183 | InactivePsWorkItemCallback(dev); | 4575 | InactivePsWorkItemCallback(dev); |
@@ -4203,12 +4595,53 @@ IPSLeave(struct net_device *dev) | |||
4203 | if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS) | 4595 | if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS) |
4204 | { | 4596 | { |
4205 | RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n"); | 4597 | RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n"); |
4598 | //printk("IPSLeave(): Turn on RF.\n"); | ||
4206 | pPSC->eInactivePowerState = eRfOn; | 4599 | pPSC->eInactivePowerState = eRfOn; |
4207 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); | 4600 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); |
4208 | InactivePsWorkItemCallback(dev); | 4601 | InactivePsWorkItemCallback(dev); |
4209 | } | 4602 | } |
4210 | } | 4603 | } |
4211 | } | 4604 | } |
4605 | |||
4606 | void IPSLeave_wq(void *data) | ||
4607 | { | ||
4608 | struct ieee80211_device *ieee = container_of(data,struct ieee80211_device,ips_leave_wq); | ||
4609 | struct net_device *dev = ieee->dev; | ||
4610 | |||
4611 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | ||
4612 | down(&priv->ieee80211->ips_sem); | ||
4613 | IPSLeave(dev); | ||
4614 | up(&priv->ieee80211->ips_sem); | ||
4615 | } | ||
4616 | |||
4617 | void ieee80211_ips_leave_wq(struct net_device *dev) | ||
4618 | { | ||
4619 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | ||
4620 | RT_RF_POWER_STATE rtState; | ||
4621 | rtState = priv->ieee80211->eRFPowerState; | ||
4622 | |||
4623 | if(priv->ieee80211->PowerSaveControl.bInactivePs){ | ||
4624 | if(rtState == eRfOff){ | ||
4625 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | ||
4626 | { | ||
4627 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); | ||
4628 | return; | ||
4629 | } | ||
4630 | else{ | ||
4631 | printk("=========>%s(): IPSLeave\n",__FUNCTION__); | ||
4632 | queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq); | ||
4633 | } | ||
4634 | } | ||
4635 | } | ||
4636 | } | ||
4637 | //added by amy 090331 end | ||
4638 | void ieee80211_ips_leave(struct net_device *dev) | ||
4639 | { | ||
4640 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | ||
4641 | down(&priv->ieee80211->ips_sem); | ||
4642 | IPSLeave(dev); | ||
4643 | up(&priv->ieee80211->ips_sem); | ||
4644 | } | ||
4212 | #endif | 4645 | #endif |
4213 | 4646 | ||
4214 | static void rtl819x_update_rxcounts( | 4647 | static void rtl819x_update_rxcounts( |
@@ -4244,15 +4677,23 @@ void rtl819x_watchdog_wqcallback(struct work_struct *work) | |||
4244 | unsigned long flags; | 4677 | unsigned long flags; |
4245 | bool bBusyTraffic = false; | 4678 | bool bBusyTraffic = false; |
4246 | static u8 last_time = 0; | 4679 | static u8 last_time = 0; |
4680 | bool bEnterPS = false; | ||
4681 | |||
4682 | if((!priv->up) || (priv->bHwRadioOff == true)) | ||
4683 | return; | ||
4684 | |||
4247 | if(!priv->up) | 4685 | if(!priv->up) |
4248 | return; | 4686 | return; |
4249 | hal_dm_watchdog(dev); | 4687 | hal_dm_watchdog(dev); |
4250 | #ifdef ENABLE_IPS | 4688 | #ifdef ENABLE_IPS |
4251 | // printk("watch_dog ENABLE_IPS\n"); | 4689 | // printk("watch_dog ENABLE_IPS\n"); |
4252 | if(ieee->actscanning == false){ | 4690 | if(ieee->actscanning == false){ |
4253 | if((ieee->iw_mode != IW_MODE_ADHOC) && (ieee->state == IEEE80211_NOLINK) && (ieee->beinretry == false) && (ieee->eRFPowerState == eRfOn) && !ieee->is_set_key){ | 4691 | //printk("%d,%d,%d,%d\n", ieee->eRFPowerState, ieee->is_set_key, ieee->proto_stoppping, ieee->wx_set_enc); |
4692 | if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&\ | ||
4693 | (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&\ | ||
4694 | (!ieee->proto_stoppping) && !ieee->wx_set_enc){ | ||
4254 | if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){ | 4695 | if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){ |
4255 | printk("====================>haha:IPSEnter()\n"); | 4696 | //printk("====================>haha:IPSEnter()\n"); |
4256 | IPSEnter(dev); | 4697 | IPSEnter(dev); |
4257 | //ieee80211_stop_scan(priv->ieee80211); | 4698 | //ieee80211_stop_scan(priv->ieee80211); |
4258 | } | 4699 | } |
@@ -4262,14 +4703,49 @@ void rtl819x_watchdog_wqcallback(struct work_struct *work) | |||
4262 | {//to get busy traffic condition | 4703 | {//to get busy traffic condition |
4263 | if(ieee->state == IEEE80211_LINKED) | 4704 | if(ieee->state == IEEE80211_LINKED) |
4264 | { | 4705 | { |
4265 | if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 || | 4706 | if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 || |
4266 | ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) { | 4707 | ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) { |
4267 | bBusyTraffic = true; | 4708 | bBusyTraffic = true; |
4268 | } | 4709 | } |
4269 | 4710 | ||
4711 | #ifdef ENABLE_LPS | ||
4712 | //added by amy for Leisure PS | ||
4713 | if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || | ||
4714 | (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) | ||
4715 | { | ||
4716 | //printk("ieee->LinkDetectInfo.NumRxUnicastOkInPeriod is %d,ieee->LinkDetectInfo.NumTxOkInPeriod is %d\n", | ||
4717 | // ieee->LinkDetectInfo.NumRxUnicastOkInPeriod,ieee->LinkDetectInfo.NumTxOkInPeriod); | ||
4718 | bEnterPS= false; | ||
4719 | } | ||
4720 | else | ||
4721 | { | ||
4722 | bEnterPS= true; | ||
4723 | } | ||
4724 | |||
4725 | //printk("***bEnterPS = %d\n", bEnterPS); | ||
4726 | // LeisurePS only work in infra mode. | ||
4727 | if(bEnterPS) | ||
4728 | { | ||
4729 | LeisurePSEnter(dev); | ||
4730 | } | ||
4731 | else | ||
4732 | { | ||
4733 | LeisurePSLeave(dev); | ||
4734 | } | ||
4735 | #endif | ||
4736 | |||
4737 | } | ||
4738 | else | ||
4739 | { | ||
4740 | #ifdef ENABLE_LPS | ||
4741 | //RT_TRACE(COMP_LPS,"====>no link LPS leave\n"); | ||
4742 | LeisurePSLeave(dev); | ||
4743 | #endif | ||
4270 | } | 4744 | } |
4745 | |||
4271 | ieee->LinkDetectInfo.NumRxOkInPeriod = 0; | 4746 | ieee->LinkDetectInfo.NumRxOkInPeriod = 0; |
4272 | ieee->LinkDetectInfo.NumTxOkInPeriod = 0; | 4747 | ieee->LinkDetectInfo.NumTxOkInPeriod = 0; |
4748 | ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; | ||
4273 | ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic; | 4749 | ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic; |
4274 | } | 4750 | } |
4275 | 4751 | ||
@@ -4288,14 +4764,14 @@ void rtl819x_watchdog_wqcallback(struct work_struct *work) | |||
4288 | if( ieee->eRFPowerState == eRfOff) | 4764 | if( ieee->eRFPowerState == eRfOff) |
4289 | RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__); | 4765 | RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__); |
4290 | printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__); | 4766 | printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__); |
4291 | // Dot11d_Reset(dev); | 4767 | // Dot11d_Reset(dev); |
4292 | ieee->state = IEEE80211_ASSOCIATING; | 4768 | ieee->state = IEEE80211_ASSOCIATING; |
4293 | notify_wx_assoc_event(priv->ieee80211); | 4769 | notify_wx_assoc_event(priv->ieee80211); |
4294 | RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid); | 4770 | RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid); |
4295 | ieee->is_roaming = true; | 4771 | ieee->is_roaming = true; |
4296 | ieee->is_set_key = false; | 4772 | ieee->is_set_key = false; |
4297 | ieee->link_change(dev); | 4773 | ieee->link_change(dev); |
4298 | queue_work(ieee->wq, &ieee->associate_procedure_wq); | 4774 | queue_work(ieee->wq, &ieee->associate_procedure_wq); |
4299 | } | 4775 | } |
4300 | } | 4776 | } |
4301 | ieee->LinkDetectInfo.NumRecvBcnInPeriod=0; | 4777 | ieee->LinkDetectInfo.NumRecvBcnInPeriod=0; |
@@ -4348,6 +4824,7 @@ int _rtl8192_up(struct net_device *dev) | |||
4348 | RT_STATUS init_status = RT_STATUS_SUCCESS; | 4824 | RT_STATUS init_status = RT_STATUS_SUCCESS; |
4349 | priv->up=1; | 4825 | priv->up=1; |
4350 | priv->ieee80211->ieee_up=1; | 4826 | priv->ieee80211->ieee_up=1; |
4827 | priv->bdisable_nic = false; //YJ,add,091111 | ||
4351 | RT_TRACE(COMP_INIT, "Bringing up iface"); | 4828 | RT_TRACE(COMP_INIT, "Bringing up iface"); |
4352 | 4829 | ||
4353 | init_status = rtl8192_adapter_start(dev); | 4830 | init_status = rtl8192_adapter_start(dev); |
@@ -4422,6 +4899,12 @@ int rtl8192_down(struct net_device *dev) | |||
4422 | #endif | 4899 | #endif |
4423 | if (priv->up == 0) return -1; | 4900 | if (priv->up == 0) return -1; |
4424 | 4901 | ||
4902 | #ifdef ENABLE_LPS | ||
4903 | //LZM for PS-Poll AID issue. 090429 | ||
4904 | if(priv->ieee80211->state == IEEE80211_LINKED) | ||
4905 | LeisurePSLeave(dev); | ||
4906 | #endif | ||
4907 | |||
4425 | priv->up=0; | 4908 | priv->up=0; |
4426 | priv->ieee80211->ieee_up = 0; | 4909 | priv->ieee80211->ieee_up = 0; |
4427 | RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__); | 4910 | RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__); |
@@ -4459,11 +4942,9 @@ int rtl8192_down(struct net_device *dev) | |||
4459 | deinit_hal_dm(dev); | 4942 | deinit_hal_dm(dev); |
4460 | del_timer_sync(&priv->watch_dog_timer); | 4943 | del_timer_sync(&priv->watch_dog_timer); |
4461 | 4944 | ||
4462 | ieee80211_softmac_stop_protocol(priv->ieee80211); | 4945 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
4463 | #ifdef ENABLE_IPS | 4946 | |
4464 | MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT); | 4947 | rtl8192_halt_adapter(dev,false); |
4465 | #endif | ||
4466 | rtl8192_rtx_disable(dev); | ||
4467 | memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list)); | 4948 | memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list)); |
4468 | 4949 | ||
4469 | RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__); | 4950 | RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__); |
@@ -4479,10 +4960,10 @@ void rtl8192_commit(struct net_device *dev) | |||
4479 | if (priv->up == 0) return ; | 4960 | if (priv->up == 0) return ; |
4480 | 4961 | ||
4481 | 4962 | ||
4482 | ieee80211_softmac_stop_protocol(priv->ieee80211); | 4963 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
4483 | 4964 | ||
4484 | rtl8192_irq_disable(dev); | 4965 | rtl8192_irq_disable(dev); |
4485 | rtl8192_rtx_disable(dev); | 4966 | rtl8192_halt_adapter(dev,true); |
4486 | _rtl8192_up(dev); | 4967 | _rtl8192_up(dev); |
4487 | } | 4968 | } |
4488 | 4969 | ||
@@ -5806,8 +6287,7 @@ static void rtl8192_rx(struct net_device *dev) | |||
5806 | 6287 | ||
5807 | skb = new_skb; | 6288 | skb = new_skb; |
5808 | priv->rx_buf[priv->rx_idx] = skb; | 6289 | priv->rx_buf[priv->rx_idx] = skb; |
5809 | *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb->tail, priv->rxbuffersize, PCI_DMA_FROMDEVICE); | 6290 | *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE); |
5810 | // *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE); | ||
5811 | } | 6291 | } |
5812 | 6292 | ||
5813 | } | 6293 | } |
@@ -6036,7 +6516,7 @@ void rtl8192_cancel_deferred_work(struct r8192_priv* priv) | |||
6036 | /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code | 6516 | /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code |
6037 | * is or is newer than 2.6.20 and work structure is defined to be struct work_struct. | 6517 | * is or is newer than 2.6.20 and work structure is defined to be struct work_struct. |
6038 | * Otherwise call cancel_delayed_work is enough. | 6518 | * Otherwise call cancel_delayed_work is enough. |
6039 | * FIXME (2.6.20 shoud 2.6.22, work_struct shoud not cancel) | 6519 | * FIXME (2.6.20 should 2.6.22, work_struct should not cancel) |
6040 | * */ | 6520 | * */ |
6041 | cancel_delayed_work(&priv->watch_dog_wq); | 6521 | cancel_delayed_work(&priv->watch_dog_wq); |
6042 | cancel_delayed_work(&priv->update_beacon_wq); | 6522 | cancel_delayed_work(&priv->update_beacon_wq); |
@@ -6381,11 +6861,13 @@ void setKey( struct net_device *dev, | |||
6381 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | 6861 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) |
6382 | { | 6862 | { |
6383 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); | 6863 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); |
6384 | up(&priv->wx_sem); | 6864 | //up(&priv->wx_sem); |
6385 | return ; | 6865 | return ; |
6386 | } | 6866 | } |
6387 | else{ | 6867 | else{ |
6868 | down(&priv->ieee80211->ips_sem); | ||
6388 | IPSLeave(dev); | 6869 | IPSLeave(dev); |
6870 | up(&priv->ieee80211->ips_sem); | ||
6389 | } | 6871 | } |
6390 | } | 6872 | } |
6391 | } | 6873 | } |
@@ -6394,7 +6876,7 @@ void setKey( struct net_device *dev, | |||
6394 | if (EntryNo >= TOTAL_CAM_ENTRY) | 6876 | if (EntryNo >= TOTAL_CAM_ENTRY) |
6395 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); | 6877 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); |
6396 | 6878 | ||
6397 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr)); | 6879 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr); |
6398 | 6880 | ||
6399 | if (DefaultKey) | 6881 | if (DefaultKey) |
6400 | usConfig |= BIT15 | (KeyType<<2); | 6882 | usConfig |= BIT15 | (KeyType<<2); |
@@ -6455,6 +6937,65 @@ void CamPrintDbgReg(struct net_device* dev) | |||
6455 | RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue); | 6937 | RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue); |
6456 | } | 6938 | } |
6457 | 6939 | ||
6940 | bool NicIFEnableNIC(struct net_device* dev) | ||
6941 | { | ||
6942 | RT_STATUS init_status = RT_STATUS_SUCCESS; | ||
6943 | struct r8192_priv* priv = ieee80211_priv(dev); | ||
6944 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
6945 | |||
6946 | //YJ,add,091109 | ||
6947 | if (priv->up == 0){ | ||
6948 | RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__); | ||
6949 | priv->bdisable_nic = false; //YJ,add,091111 | ||
6950 | return false; | ||
6951 | } | ||
6952 | // <1> Reset memory: descriptor, buffer,.. | ||
6953 | //NicIFResetMemory(Adapter); | ||
6954 | |||
6955 | // <2> Enable Adapter | ||
6956 | //printk("===========>%s()\n",__FUNCTION__); | ||
6957 | //priv->bfirst_init = true; | ||
6958 | init_status = rtl8192_adapter_start(dev); | ||
6959 | if (init_status != RT_STATUS_SUCCESS) { | ||
6960 | RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__); | ||
6961 | priv->bdisable_nic = false; //YJ,add,091111 | ||
6962 | return -1; | ||
6963 | } | ||
6964 | //printk("start adapter finished\n"); | ||
6965 | RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); | ||
6966 | //priv->bfirst_init = false; | ||
6967 | |||
6968 | // <3> Enable Interrupt | ||
6969 | rtl8192_irq_enable(dev); | ||
6970 | priv->bdisable_nic = false; | ||
6971 | //RT_TRACE(COMP_PS,"<===========%s()\n",__FUNCTION__); | ||
6972 | return (init_status == RT_STATUS_SUCCESS) ? true:false; | ||
6973 | } | ||
6974 | bool NicIFDisableNIC(struct net_device* dev) | ||
6975 | { | ||
6976 | bool status = true; | ||
6977 | struct r8192_priv* priv = ieee80211_priv(dev); | ||
6978 | u8 tmp_state = 0; | ||
6979 | // <1> Disable Interrupt | ||
6980 | //RT_TRACE(COMP_PS, "=========>%s()\n",__FUNCTION__); | ||
6981 | priv->bdisable_nic = true; //YJ,move,091109 | ||
6982 | tmp_state = priv->ieee80211->state; | ||
6983 | |||
6984 | ieee80211_softmac_stop_protocol(priv->ieee80211, false); | ||
6985 | |||
6986 | priv->ieee80211->state = tmp_state; | ||
6987 | rtl8192_cancel_deferred_work(priv); | ||
6988 | rtl8192_irq_disable(dev); | ||
6989 | // <2> Stop all timer | ||
6990 | |||
6991 | // <3> Disable Adapter | ||
6992 | rtl8192_halt_adapter(dev, false); | ||
6993 | // priv->bdisable_nic = true; | ||
6994 | //RT_TRACE(COMP_PS, "<=========%s()\n",__FUNCTION__); | ||
6995 | |||
6996 | return status; | ||
6997 | } | ||
6998 | |||
6458 | 6999 | ||
6459 | /*************************************************************************** | 7000 | /*************************************************************************** |
6460 | ------------------- module init / exit stubs ---------------- | 7001 | ------------------- module init / exit stubs ---------------- |
diff --git a/drivers/staging/rtl8192e/r8192E_dm.c b/drivers/staging/rtl8192e/r8192E_dm.c index 5ffb4f74055b..a249f00da60d 100644 --- a/drivers/staging/rtl8192e/r8192E_dm.c +++ b/drivers/staging/rtl8192e/r8192E_dm.c | |||
@@ -19,26 +19,28 @@ Major Change History: | |||
19 | #include "r819xE_phy.h" | 19 | #include "r819xE_phy.h" |
20 | #include "r819xE_phyreg.h" | 20 | #include "r819xE_phyreg.h" |
21 | #include "r8190_rtl8256.h" | 21 | #include "r8190_rtl8256.h" |
22 | |||
23 | #define DRV_NAME "rtl819xE" | ||
22 | /*---------------------------Define Local Constant---------------------------*/ | 24 | /*---------------------------Define Local Constant---------------------------*/ |
23 | // | 25 | // |
24 | // Indicate different AP vendor for IOT issue. | 26 | // Indicate different AP vendor for IOT issue. |
25 | // | 27 | // |
26 | #ifdef RTL8190P | 28 | #ifdef RTL8190P |
27 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = | 29 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = |
28 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322}; | 30 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322, 0x5e4322}; |
29 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = | 31 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = |
30 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322}; | 32 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322, 0x5e4322}; |
31 | #else | 33 | #else |
32 | #ifdef RTL8192E | 34 | #ifdef RTL8192E |
33 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = | 35 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = |
34 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322}; | 36 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5e4322, 0x5e4322}; |
35 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = | 37 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = |
36 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322}; | 38 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5e4322, 0x5e4322, 0x5e4322}; |
37 | #else | 39 | #else |
38 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = | 40 | static u32 edca_setting_DL[HT_IOT_PEER_MAX] = |
39 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5ea44f}; | 41 | { 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0xa44f, 0x5ea44f, 0x5e4322}; |
40 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = | 42 | static u32 edca_setting_UL[HT_IOT_PEER_MAX] = |
41 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f}; | 43 | { 0x5e4322, 0xa44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f, 0x5e4322}; |
42 | #endif | 44 | #endif |
43 | #endif | 45 | #endif |
44 | 46 | ||
@@ -275,6 +277,30 @@ void dm_CheckRxAggregation(struct net_device *dev) { | |||
275 | #endif | 277 | #endif |
276 | 278 | ||
277 | 279 | ||
280 | // call the script file to enable | ||
281 | void dm_check_ac_dc_power(struct net_device *dev) | ||
282 | { | ||
283 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
284 | static char *ac_dc_check_script_path = "/etc/acpi/wireless-rtl-ac-dc-power.sh"; | ||
285 | char *argv[] = {ac_dc_check_script_path,DRV_NAME,NULL}; | ||
286 | static char *envp[] = {"HOME=/", | ||
287 | "TERM=linux", | ||
288 | "PATH=/usr/bin:/bin", | ||
289 | NULL}; | ||
290 | |||
291 | if(priv->ResetProgress == RESET_TYPE_SILENT) | ||
292 | { | ||
293 | RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n"); | ||
294 | return; | ||
295 | } | ||
296 | |||
297 | if(priv->ieee80211->state != IEEE80211_LINKED) { | ||
298 | return; | ||
299 | } | ||
300 | call_usermodehelper(ac_dc_check_script_path,argv,envp,1); | ||
301 | |||
302 | return; | ||
303 | }; | ||
278 | 304 | ||
279 | void hal_dm_watchdog(struct net_device *dev) | 305 | void hal_dm_watchdog(struct net_device *dev) |
280 | { | 306 | { |
@@ -282,6 +308,8 @@ void hal_dm_watchdog(struct net_device *dev) | |||
282 | 308 | ||
283 | //static u8 previous_bssid[6] ={0}; | 309 | //static u8 previous_bssid[6] ={0}; |
284 | 310 | ||
311 | dm_check_ac_dc_power(dev); | ||
312 | |||
285 | /*Add by amy 2008/05/15 ,porting from windows code.*/ | 313 | /*Add by amy 2008/05/15 ,porting from windows code.*/ |
286 | dm_check_rate_adaptive(dev); | 314 | dm_check_rate_adaptive(dev); |
287 | dm_dynamic_txpower(dev); | 315 | dm_dynamic_txpower(dev); |
diff --git a/drivers/staging/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/r8192E_hw.h index 388908fc8d20..346bfb18e2b0 100644 --- a/drivers/staging/rtl8192e/r8192E_hw.h +++ b/drivers/staging/rtl8192e/r8192E_hw.h | |||
@@ -808,4 +808,12 @@ enum _RTL8192Pci_HW { | |||
808 | #define GPI 0x108 | 808 | #define GPI 0x108 |
809 | #define GPO 0x109 | 809 | #define GPO 0x109 |
810 | #define GPE 0x10a | 810 | #define GPE 0x10a |
811 | |||
812 | #define ANAPAR_FOR_8192PciE 0x17 // Analog parameter register | ||
813 | |||
814 | #define MSR_NOLINK 0x00 | ||
815 | #define MSR_ADHOC 0x01 | ||
816 | #define MSR_INFRA 0x02 | ||
817 | #define MSR_AP 0x03 | ||
818 | |||
811 | #endif | 819 | #endif |
diff --git a/drivers/staging/rtl8192e/r8192E_wx.c b/drivers/staging/rtl8192e/r8192E_wx.c index d1eb89229cdf..0b0f39ce3ced 100644 --- a/drivers/staging/rtl8192e/r8192E_wx.c +++ b/drivers/staging/rtl8192e/r8192E_wx.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include "r8192E_hw.h" | 22 | #include "r8192E_hw.h" |
23 | #include "r8192E_wx.h" | 23 | #include "r8192E_wx.h" |
24 | #ifdef ENABLE_DOT11D | 24 | #ifdef ENABLE_DOT11D |
25 | #include "dot11d.h" | 25 | #include "ieee80211/dot11d.h" |
26 | #endif | 26 | #endif |
27 | 27 | ||
28 | #define RATE_COUNT 12 | 28 | #define RATE_COUNT 12 |
@@ -70,6 +70,9 @@ static int r8192_wx_set_rate(struct net_device *dev, | |||
70 | int ret; | 70 | int ret; |
71 | struct r8192_priv *priv = ieee80211_priv(dev); | 71 | struct r8192_priv *priv = ieee80211_priv(dev); |
72 | 72 | ||
73 | if(priv->bHwRadioOff == true) | ||
74 | return 0; | ||
75 | |||
73 | down(&priv->wx_sem); | 76 | down(&priv->wx_sem); |
74 | 77 | ||
75 | ret = ieee80211_wx_set_rate(priv->ieee80211,info,wrqu,extra); | 78 | ret = ieee80211_wx_set_rate(priv->ieee80211,info,wrqu,extra); |
@@ -87,6 +90,9 @@ static int r8192_wx_set_rts(struct net_device *dev, | |||
87 | int ret; | 90 | int ret; |
88 | struct r8192_priv *priv = ieee80211_priv(dev); | 91 | struct r8192_priv *priv = ieee80211_priv(dev); |
89 | 92 | ||
93 | if(priv->bHwRadioOff == true) | ||
94 | return 0; | ||
95 | |||
90 | down(&priv->wx_sem); | 96 | down(&priv->wx_sem); |
91 | 97 | ||
92 | ret = ieee80211_wx_set_rts(priv->ieee80211,info,wrqu,extra); | 98 | ret = ieee80211_wx_set_rts(priv->ieee80211,info,wrqu,extra); |
@@ -111,6 +117,9 @@ static int r8192_wx_set_power(struct net_device *dev, | |||
111 | int ret; | 117 | int ret; |
112 | struct r8192_priv *priv = ieee80211_priv(dev); | 118 | struct r8192_priv *priv = ieee80211_priv(dev); |
113 | 119 | ||
120 | if(priv->bHwRadioOff == true) | ||
121 | return 0; | ||
122 | |||
114 | down(&priv->wx_sem); | 123 | down(&priv->wx_sem); |
115 | 124 | ||
116 | ret = ieee80211_wx_set_power(priv->ieee80211,info,wrqu,extra); | 125 | ret = ieee80211_wx_set_power(priv->ieee80211,info,wrqu,extra); |
@@ -290,6 +299,9 @@ static int r8192_wx_set_rawtx(struct net_device *dev, | |||
290 | struct r8192_priv *priv = ieee80211_priv(dev); | 299 | struct r8192_priv *priv = ieee80211_priv(dev); |
291 | int ret; | 300 | int ret; |
292 | 301 | ||
302 | if(priv->bHwRadioOff == true) | ||
303 | return 0; | ||
304 | |||
293 | down(&priv->wx_sem); | 305 | down(&priv->wx_sem); |
294 | 306 | ||
295 | ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra); | 307 | ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra); |
@@ -325,6 +337,9 @@ static int r8192_wx_set_crcmon(struct net_device *dev, | |||
325 | int enable = (parms[0] > 0); | 337 | int enable = (parms[0] > 0); |
326 | short prev = priv->crcmon; | 338 | short prev = priv->crcmon; |
327 | 339 | ||
340 | if(priv->bHwRadioOff == true) | ||
341 | return 0; | ||
342 | |||
328 | down(&priv->wx_sem); | 343 | down(&priv->wx_sem); |
329 | 344 | ||
330 | if(enable) | 345 | if(enable) |
@@ -352,6 +367,9 @@ static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a, | |||
352 | RT_RF_POWER_STATE rtState; | 367 | RT_RF_POWER_STATE rtState; |
353 | int ret; | 368 | int ret; |
354 | 369 | ||
370 | if(priv->bHwRadioOff == true) | ||
371 | return 0; | ||
372 | |||
355 | rtState = priv->ieee80211->eRFPowerState; | 373 | rtState = priv->ieee80211->eRFPowerState; |
356 | down(&priv->wx_sem); | 374 | down(&priv->wx_sem); |
357 | #ifdef ENABLE_IPS | 375 | #ifdef ENABLE_IPS |
@@ -366,8 +384,10 @@ static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a, | |||
366 | return -1; | 384 | return -1; |
367 | } | 385 | } |
368 | else{ | 386 | else{ |
369 | printk("=========>%s(): IPSLeave\n",__FUNCTION__); | 387 | RT_TRACE(COMP_ERR, "%s(): IPSLeave\n",__FUNCTION__); |
388 | down(&priv->ieee80211->ips_sem); | ||
370 | IPSLeave(dev); | 389 | IPSLeave(dev); |
390 | up(&priv->ieee80211->ips_sem); | ||
371 | } | 391 | } |
372 | } | 392 | } |
373 | } | 393 | } |
@@ -425,7 +445,7 @@ static int rtl8180_wx_get_range(struct net_device *dev, | |||
425 | */ | 445 | */ |
426 | 446 | ||
427 | /* ~5 Mb/s real (802.11b) */ | 447 | /* ~5 Mb/s real (802.11b) */ |
428 | range->throughput = 5 * 1000 * 1000; | 448 | range->throughput = 130 * 1000 * 1000; |
429 | 449 | ||
430 | // TODO: Not used in 802.11b? | 450 | // TODO: Not used in 802.11b? |
431 | // range->min_nwid; /* Minimal NWID we are able to set */ | 451 | // range->min_nwid; /* Minimal NWID we are able to set */ |
@@ -468,7 +488,7 @@ static int rtl8180_wx_get_range(struct net_device *dev, | |||
468 | range->pmt_flags = IW_POWER_TIMEOUT; | 488 | range->pmt_flags = IW_POWER_TIMEOUT; |
469 | range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R; | 489 | range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R; |
470 | range->we_version_compiled = WIRELESS_EXT; | 490 | range->we_version_compiled = WIRELESS_EXT; |
471 | range->we_version_source = 16; | 491 | range->we_version_source = 18; |
472 | 492 | ||
473 | // range->retry_capa; /* What retry options are supported */ | 493 | // range->retry_capa; /* What retry options are supported */ |
474 | // range->retry_flags; /* How to decode max/min retry limit */ | 494 | // range->retry_flags; /* How to decode max/min retry limit */ |
@@ -517,7 +537,12 @@ static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a, | |||
517 | struct ieee80211_device* ieee = priv->ieee80211; | 537 | struct ieee80211_device* ieee = priv->ieee80211; |
518 | RT_RF_POWER_STATE rtState; | 538 | RT_RF_POWER_STATE rtState; |
519 | int ret; | 539 | int ret; |
540 | |||
541 | if(priv->bHwRadioOff == true) | ||
542 | return 0; | ||
543 | |||
520 | rtState = priv->ieee80211->eRFPowerState; | 544 | rtState = priv->ieee80211->eRFPowerState; |
545 | |||
521 | if(!priv->up) return -ENETDOWN; | 546 | if(!priv->up) return -ENETDOWN; |
522 | if (priv->ieee80211->LinkDetectInfo.bBusyTraffic == true) | 547 | if (priv->ieee80211->LinkDetectInfo.bBusyTraffic == true) |
523 | return -EAGAIN; | 548 | return -EAGAIN; |
@@ -547,8 +572,10 @@ static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a, | |||
547 | return -1; | 572 | return -1; |
548 | } | 573 | } |
549 | else{ | 574 | else{ |
550 | printk("=========>%s(): IPSLeave\n",__FUNCTION__); | 575 | //RT_TRACE(COMP_PS, "%s(): IPSLeave\n",__FUNCTION__); |
576 | down(&priv->ieee80211->ips_sem); | ||
551 | IPSLeave(dev); | 577 | IPSLeave(dev); |
578 | up(&priv->ieee80211->ips_sem); | ||
552 | } | 579 | } |
553 | } | 580 | } |
554 | } | 581 | } |
@@ -580,6 +607,9 @@ static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a, | |||
580 | int ret; | 607 | int ret; |
581 | struct r8192_priv *priv = ieee80211_priv(dev); | 608 | struct r8192_priv *priv = ieee80211_priv(dev); |
582 | 609 | ||
610 | if(priv->bHwRadioOff == true) | ||
611 | return 0; | ||
612 | |||
583 | if(!priv->up) return -ENETDOWN; | 613 | if(!priv->up) return -ENETDOWN; |
584 | 614 | ||
585 | down(&priv->wx_sem); | 615 | down(&priv->wx_sem); |
@@ -599,23 +629,16 @@ static int r8192_wx_set_essid(struct net_device *dev, | |||
599 | RT_RF_POWER_STATE rtState; | 629 | RT_RF_POWER_STATE rtState; |
600 | int ret; | 630 | int ret; |
601 | 631 | ||
632 | if(priv->bHwRadioOff == true) | ||
633 | return 0; | ||
634 | |||
602 | rtState = priv->ieee80211->eRFPowerState; | 635 | rtState = priv->ieee80211->eRFPowerState; |
603 | down(&priv->wx_sem); | 636 | down(&priv->wx_sem); |
637 | |||
604 | #ifdef ENABLE_IPS | 638 | #ifdef ENABLE_IPS |
605 | if(priv->ieee80211->PowerSaveControl.bInactivePs){ | 639 | down(&priv->ieee80211->ips_sem); |
606 | if(rtState == eRfOff){ | 640 | IPSLeave(dev); |
607 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | 641 | up(&priv->ieee80211->ips_sem); |
608 | { | ||
609 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); | ||
610 | up(&priv->wx_sem); | ||
611 | return -1; | ||
612 | } | ||
613 | else{ | ||
614 | printk("=========>%s(): IPSLeave\n",__FUNCTION__); | ||
615 | IPSLeave(dev); | ||
616 | } | ||
617 | } | ||
618 | } | ||
619 | #endif | 642 | #endif |
620 | ret = ieee80211_wx_set_essid(priv->ieee80211,a,wrqu,b); | 643 | ret = ieee80211_wx_set_essid(priv->ieee80211,a,wrqu,b); |
621 | 644 | ||
@@ -650,6 +673,9 @@ static int r8192_wx_set_freq(struct net_device *dev, struct iw_request_info *a, | |||
650 | int ret; | 673 | int ret; |
651 | struct r8192_priv *priv = ieee80211_priv(dev); | 674 | struct r8192_priv *priv = ieee80211_priv(dev); |
652 | 675 | ||
676 | if(priv->bHwRadioOff == true) | ||
677 | return 0; | ||
678 | |||
653 | down(&priv->wx_sem); | 679 | down(&priv->wx_sem); |
654 | 680 | ||
655 | ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b); | 681 | ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b); |
@@ -673,6 +699,9 @@ static int r8192_wx_set_frag(struct net_device *dev, | |||
673 | { | 699 | { |
674 | struct r8192_priv *priv = ieee80211_priv(dev); | 700 | struct r8192_priv *priv = ieee80211_priv(dev); |
675 | 701 | ||
702 | if(priv->bHwRadioOff == true) | ||
703 | return 0; | ||
704 | |||
676 | if (wrqu->frag.disabled) | 705 | if (wrqu->frag.disabled) |
677 | priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; | 706 | priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; |
678 | else { | 707 | else { |
@@ -711,8 +740,16 @@ static int r8192_wx_set_wap(struct net_device *dev, | |||
711 | struct r8192_priv *priv = ieee80211_priv(dev); | 740 | struct r8192_priv *priv = ieee80211_priv(dev); |
712 | // struct sockaddr *temp = (struct sockaddr *)awrq; | 741 | // struct sockaddr *temp = (struct sockaddr *)awrq; |
713 | 742 | ||
743 | if(priv->bHwRadioOff == true) | ||
744 | return 0; | ||
745 | |||
714 | down(&priv->wx_sem); | 746 | down(&priv->wx_sem); |
715 | 747 | ||
748 | #ifdef ENABLE_IPS | ||
749 | down(&priv->ieee80211->ips_sem); | ||
750 | IPSLeave(dev); | ||
751 | up(&priv->ieee80211->ips_sem); | ||
752 | #endif | ||
716 | ret = ieee80211_wx_set_wap(priv->ieee80211,info,awrq,extra); | 753 | ret = ieee80211_wx_set_wap(priv->ieee80211,info,awrq,extra); |
717 | 754 | ||
718 | up(&priv->wx_sem); | 755 | up(&priv->wx_sem); |
@@ -753,14 +790,24 @@ static int r8192_wx_set_enc(struct net_device *dev, | |||
753 | u32 hwkey[4]={0,0,0,0}; | 790 | u32 hwkey[4]={0,0,0,0}; |
754 | u8 mask=0xff; | 791 | u8 mask=0xff; |
755 | u32 key_idx=0; | 792 | u32 key_idx=0; |
756 | u8 zero_addr[4][6] ={ {0x00,0x00,0x00,0x00,0x00,0x00}, | 793 | u8 zero_addr[4][6] ={{0x00,0x00,0x00,0x00,0x00,0x00}, |
757 | {0x00,0x00,0x00,0x00,0x00,0x01}, | 794 | {0x00,0x00,0x00,0x00,0x00,0x01}, |
758 | {0x00,0x00,0x00,0x00,0x00,0x02}, | 795 | {0x00,0x00,0x00,0x00,0x00,0x02}, |
759 | {0x00,0x00,0x00,0x00,0x00,0x03} }; | 796 | {0x00,0x00,0x00,0x00,0x00,0x03} }; |
760 | int i; | 797 | int i; |
761 | 798 | ||
799 | if(priv->bHwRadioOff == true) | ||
800 | return 0; | ||
801 | |||
762 | if(!priv->up) return -ENETDOWN; | 802 | if(!priv->up) return -ENETDOWN; |
763 | 803 | ||
804 | priv->ieee80211->wx_set_enc = 1; | ||
805 | #ifdef ENABLE_IPS | ||
806 | down(&priv->ieee80211->ips_sem); | ||
807 | IPSLeave(dev); | ||
808 | up(&priv->ieee80211->ips_sem); | ||
809 | #endif | ||
810 | |||
764 | down(&priv->wx_sem); | 811 | down(&priv->wx_sem); |
765 | 812 | ||
766 | RT_TRACE(COMP_SEC, "Setting SW wep key"); | 813 | RT_TRACE(COMP_SEC, "Setting SW wep key"); |
@@ -768,7 +815,6 @@ static int r8192_wx_set_enc(struct net_device *dev, | |||
768 | 815 | ||
769 | up(&priv->wx_sem); | 816 | up(&priv->wx_sem); |
770 | 817 | ||
771 | |||
772 | //sometimes, the length is zero while we do not type key value | 818 | //sometimes, the length is zero while we do not type key value |
773 | if(wrqu->encoding.length!=0){ | 819 | if(wrqu->encoding.length!=0){ |
774 | 820 | ||
@@ -868,6 +914,8 @@ static int r8192_wx_set_enc(struct net_device *dev, | |||
868 | } | 914 | } |
869 | #endif | 915 | #endif |
870 | 916 | ||
917 | priv->ieee80211->wx_set_enc = 0; | ||
918 | |||
871 | return ret; | 919 | return ret; |
872 | } | 920 | } |
873 | 921 | ||
@@ -893,6 +941,9 @@ static int r8192_wx_set_retry(struct net_device *dev, | |||
893 | struct r8192_priv *priv = ieee80211_priv(dev); | 941 | struct r8192_priv *priv = ieee80211_priv(dev); |
894 | int err = 0; | 942 | int err = 0; |
895 | 943 | ||
944 | if(priv->bHwRadioOff == true) | ||
945 | return 0; | ||
946 | |||
896 | down(&priv->wx_sem); | 947 | down(&priv->wx_sem); |
897 | 948 | ||
898 | if (wrqu->retry.flags & IW_RETRY_LIFETIME || | 949 | if (wrqu->retry.flags & IW_RETRY_LIFETIME || |
@@ -985,6 +1036,10 @@ static int r8192_wx_set_sens(struct net_device *dev, | |||
985 | struct r8192_priv *priv = ieee80211_priv(dev); | 1036 | struct r8192_priv *priv = ieee80211_priv(dev); |
986 | 1037 | ||
987 | short err = 0; | 1038 | short err = 0; |
1039 | |||
1040 | if(priv->bHwRadioOff == true) | ||
1041 | return 0; | ||
1042 | |||
988 | down(&priv->wx_sem); | 1043 | down(&priv->wx_sem); |
989 | //DMESG("attempt to set sensivity to %ddb",wrqu->sens.value); | 1044 | //DMESG("attempt to set sensivity to %ddb",wrqu->sens.value); |
990 | if(priv->rf_set_sens == NULL) { | 1045 | if(priv->rf_set_sens == NULL) { |
@@ -1011,7 +1066,19 @@ static int r8192_wx_set_enc_ext(struct net_device *dev, | |||
1011 | struct r8192_priv *priv = ieee80211_priv(dev); | 1066 | struct r8192_priv *priv = ieee80211_priv(dev); |
1012 | struct ieee80211_device* ieee = priv->ieee80211; | 1067 | struct ieee80211_device* ieee = priv->ieee80211; |
1013 | 1068 | ||
1069 | if(priv->bHwRadioOff == true) | ||
1070 | return 0; | ||
1071 | |||
1014 | down(&priv->wx_sem); | 1072 | down(&priv->wx_sem); |
1073 | |||
1074 | priv->ieee80211->wx_set_enc = 1; | ||
1075 | |||
1076 | #ifdef ENABLE_IPS | ||
1077 | down(&priv->ieee80211->ips_sem); | ||
1078 | IPSLeave(dev); | ||
1079 | up(&priv->ieee80211->ips_sem); | ||
1080 | #endif | ||
1081 | |||
1015 | ret = ieee80211_wx_set_encode_ext(ieee, info, wrqu, extra); | 1082 | ret = ieee80211_wx_set_encode_ext(ieee, info, wrqu, extra); |
1016 | 1083 | ||
1017 | { | 1084 | { |
@@ -1091,6 +1158,7 @@ static int r8192_wx_set_enc_ext(struct net_device *dev, | |||
1091 | } | 1158 | } |
1092 | 1159 | ||
1093 | end_hw_sec: | 1160 | end_hw_sec: |
1161 | priv->ieee80211->wx_set_enc = 0; | ||
1094 | up(&priv->wx_sem); | 1162 | up(&priv->wx_sem); |
1095 | return ret; | 1163 | return ret; |
1096 | 1164 | ||
@@ -1102,6 +1170,10 @@ static int r8192_wx_set_auth(struct net_device *dev, | |||
1102 | int ret=0; | 1170 | int ret=0; |
1103 | //printk("====>%s()\n", __FUNCTION__); | 1171 | //printk("====>%s()\n", __FUNCTION__); |
1104 | struct r8192_priv *priv = ieee80211_priv(dev); | 1172 | struct r8192_priv *priv = ieee80211_priv(dev); |
1173 | |||
1174 | if(priv->bHwRadioOff == true) | ||
1175 | return 0; | ||
1176 | |||
1105 | down(&priv->wx_sem); | 1177 | down(&priv->wx_sem); |
1106 | ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra); | 1178 | ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra); |
1107 | up(&priv->wx_sem); | 1179 | up(&priv->wx_sem); |
@@ -1116,6 +1188,10 @@ static int r8192_wx_set_mlme(struct net_device *dev, | |||
1116 | 1188 | ||
1117 | int ret=0; | 1189 | int ret=0; |
1118 | struct r8192_priv *priv = ieee80211_priv(dev); | 1190 | struct r8192_priv *priv = ieee80211_priv(dev); |
1191 | |||
1192 | if(priv->bHwRadioOff == true) | ||
1193 | return 0; | ||
1194 | |||
1119 | down(&priv->wx_sem); | 1195 | down(&priv->wx_sem); |
1120 | ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra); | 1196 | ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra); |
1121 | up(&priv->wx_sem); | 1197 | up(&priv->wx_sem); |
@@ -1129,6 +1205,10 @@ static int r8192_wx_set_gen_ie(struct net_device *dev, | |||
1129 | //printk("====>%s(), len:%d\n", __FUNCTION__, data->length); | 1205 | //printk("====>%s(), len:%d\n", __FUNCTION__, data->length); |
1130 | int ret=0; | 1206 | int ret=0; |
1131 | struct r8192_priv *priv = ieee80211_priv(dev); | 1207 | struct r8192_priv *priv = ieee80211_priv(dev); |
1208 | |||
1209 | if(priv->bHwRadioOff == true) | ||
1210 | return 0; | ||
1211 | |||
1132 | down(&priv->wx_sem); | 1212 | down(&priv->wx_sem); |
1133 | ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length); | 1213 | ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length); |
1134 | up(&priv->wx_sem); | 1214 | up(&priv->wx_sem); |
@@ -1142,6 +1222,42 @@ static int dummy(struct net_device *dev, struct iw_request_info *a, | |||
1142 | return -1; | 1222 | return -1; |
1143 | } | 1223 | } |
1144 | 1224 | ||
1225 | // check ac/dc status with the help of user space application */ | ||
1226 | static int r8192_wx_adapter_power_status(struct net_device *dev, | ||
1227 | struct iw_request_info *info, | ||
1228 | union iwreq_data *wrqu, char *extra) | ||
1229 | { | ||
1230 | struct r8192_priv *priv = ieee80211_priv(dev); | ||
1231 | #ifdef ENABLE_LPS | ||
1232 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | ||
1233 | struct ieee80211_device* ieee = priv->ieee80211; | ||
1234 | #endif | ||
1235 | down(&priv->wx_sem); | ||
1236 | |||
1237 | #ifdef ENABLE_LPS | ||
1238 | RT_TRACE(COMP_POWER, "%s(): %s\n",__FUNCTION__, (*extra == 6)?"DC power":"AC power"); | ||
1239 | // ieee->ps shall not be set under DC mode, otherwise it conflict | ||
1240 | // with Leisure power save mode setting. | ||
1241 | // | ||
1242 | if(*extra || priv->force_lps) { | ||
1243 | priv->ps_force = false; | ||
1244 | pPSC->bLeisurePs = true; | ||
1245 | } else { | ||
1246 | //LZM for PS-Poll AID issue. 090429 | ||
1247 | if(priv->ieee80211->state == IEEE80211_LINKED) | ||
1248 | LeisurePSLeave(dev); | ||
1249 | |||
1250 | priv->ps_force = true; | ||
1251 | pPSC->bLeisurePs = false; | ||
1252 | ieee->ps = *extra; | ||
1253 | } | ||
1254 | |||
1255 | #endif | ||
1256 | up(&priv->wx_sem); | ||
1257 | return 0; | ||
1258 | |||
1259 | } | ||
1260 | |||
1145 | 1261 | ||
1146 | static iw_handler r8192_wx_handlers[] = | 1262 | static iw_handler r8192_wx_handlers[] = |
1147 | { | 1263 | { |
@@ -1231,72 +1347,28 @@ static const struct iw_priv_args r8192_private_args[] = { | |||
1231 | SIOCIWFIRSTPRIV + 0x2, | 1347 | SIOCIWFIRSTPRIV + 0x2, |
1232 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx" | 1348 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx" |
1233 | } | 1349 | } |
1234 | #ifdef JOHN_IOCTL | ||
1235 | , | 1350 | , |
1236 | { | 1351 | { |
1237 | SIOCIWFIRSTPRIV + 0x3, | 1352 | SIOCIWFIRSTPRIV + 0x3, |
1238 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readRF" | 1353 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset" |
1354 | |||
1239 | } | 1355 | } |
1240 | , | 1356 | , |
1241 | { | 1357 | { |
1242 | SIOCIWFIRSTPRIV + 0x4, | 1358 | SIOCIWFIRSTPRIV + 0x4, |
1243 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeRF" | 1359 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE, |
1244 | } | 1360 | "set_power" |
1245 | , | ||
1246 | { | ||
1247 | SIOCIWFIRSTPRIV + 0x5, | ||
1248 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readBB" | ||
1249 | } | ||
1250 | , | ||
1251 | { | ||
1252 | SIOCIWFIRSTPRIV + 0x6, | ||
1253 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeBB" | ||
1254 | } | ||
1255 | , | ||
1256 | { | ||
1257 | SIOCIWFIRSTPRIV + 0x7, | ||
1258 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readnicb" | ||
1259 | } | ||
1260 | , | ||
1261 | { | ||
1262 | SIOCIWFIRSTPRIV + 0x8, | ||
1263 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writenicb" | ||
1264 | } | ||
1265 | , | ||
1266 | { | ||
1267 | SIOCIWFIRSTPRIV + 0x9, | ||
1268 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" | ||
1269 | } | ||
1270 | |||
1271 | #endif | ||
1272 | , | ||
1273 | { | ||
1274 | SIOCIWFIRSTPRIV + 0x3, | ||
1275 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset" | ||
1276 | |||
1277 | } | 1361 | } |
1278 | 1362 | ||
1279 | }; | 1363 | }; |
1280 | 1364 | ||
1281 | 1365 | ||
1282 | static iw_handler r8192_private_handler[] = { | 1366 | static iw_handler r8192_private_handler[] = { |
1283 | // r8192_wx_set_monitor, /* SIOCIWFIRSTPRIV */ | ||
1284 | r8192_wx_set_crcmon, /*SIOCIWSECONDPRIV*/ | 1367 | r8192_wx_set_crcmon, /*SIOCIWSECONDPRIV*/ |
1285 | // r8192_wx_set_forceassociate, | ||
1286 | // r8192_wx_set_beaconinterval, | ||
1287 | // r8192_wx_set_monitor_type, | ||
1288 | r8192_wx_set_scan_type, | 1368 | r8192_wx_set_scan_type, |
1289 | r8192_wx_set_rawtx, | 1369 | r8192_wx_set_rawtx, |
1290 | #ifdef JOHN_IOCTL | ||
1291 | r8192_wx_read_regs, | ||
1292 | r8192_wx_write_regs, | ||
1293 | r8192_wx_read_bb, | ||
1294 | r8192_wx_write_bb, | ||
1295 | r8192_wx_read_nicb, | ||
1296 | r8192_wx_write_nicb, | ||
1297 | r8192_wx_get_ap_status | ||
1298 | #endif | ||
1299 | r8192_wx_force_reset, | 1370 | r8192_wx_force_reset, |
1371 | r8192_wx_adapter_power_status, | ||
1300 | }; | 1372 | }; |
1301 | 1373 | ||
1302 | //#if WIRELESS_EXT >= 17 | 1374 | //#if WIRELESS_EXT >= 17 |
diff --git a/drivers/staging/rtl8192e/r8192E_wx.h b/drivers/staging/rtl8192e/r8192E_wx.h index 79ebdb698a41..047030bc051a 100644 --- a/drivers/staging/rtl8192e/r8192E_wx.h +++ b/drivers/staging/rtl8192e/r8192E_wx.h | |||
@@ -15,7 +15,6 @@ | |||
15 | #ifndef R8180_WX_H | 15 | #ifndef R8180_WX_H |
16 | #define R8180_WX_H | 16 | #define R8180_WX_H |
17 | //#include <linux/wireless.h> | 17 | //#include <linux/wireless.h> |
18 | //#include "ieee80211.h" | ||
19 | extern struct iw_handler_def r8192_wx_handlers_def; | 18 | extern struct iw_handler_def r8192_wx_handlers_def; |
20 | /* Enable the rtl819x_core.c to share this function, david 2008.9.22 */ | 19 | /* Enable the rtl819x_core.c to share this function, david 2008.9.22 */ |
21 | extern struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev); | 20 | extern struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev); |
diff --git a/drivers/staging/rtl8192e/r819xE_cmdpkt.c b/drivers/staging/rtl8192e/r819xE_cmdpkt.c index 2aaa4e1bb375..87c334fb7333 100644 --- a/drivers/staging/rtl8192e/r819xE_cmdpkt.c +++ b/drivers/staging/rtl8192e/r819xE_cmdpkt.c | |||
@@ -135,7 +135,7 @@ RT_STATUS cmpk_message_handle_tx( | |||
135 | * Transform from little endian to big endian | 135 | * Transform from little endian to big endian |
136 | * and pending zero | 136 | * and pending zero |
137 | */ | 137 | */ |
138 | seg_ptr = skb->tail; | 138 | seg_ptr = skb_tail_pointer(skb); |
139 | for(i=0 ; i < frag_length; i+=4) { | 139 | for(i=0 ; i < frag_length; i+=4) { |
140 | *seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0; | 140 | *seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0; |
141 | *seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0; | 141 | *seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0; |
diff --git a/drivers/staging/rtl8192e/r819xE_firmware.c b/drivers/staging/rtl8192e/r819xE_firmware.c index 1f9e413bcd49..793a17545554 100644 --- a/drivers/staging/rtl8192e/r819xE_firmware.c +++ b/drivers/staging/rtl8192e/r819xE_firmware.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Procedure: Init boot code/firmware code/data session | 2 | * Procedure: Init boot code/firmware code/data session |
3 | * | 3 | * |
4 | * Description: This routine will intialize firmware. If any error occurs | 4 | * Description: This routine will intialize firmware. If any error occurs |
5 | * during the initialization process, the routine shall terminate | 5 | * during the initialization process, the routine shall terminate |
@@ -7,19 +7,21 @@ | |||
7 | * NdisOpenFile only from MiniportInitialize. | 7 | * NdisOpenFile only from MiniportInitialize. |
8 | * | 8 | * |
9 | * Arguments: The pointer of the adapter | 9 | * Arguments: The pointer of the adapter |
10 | 10 | * | |
11 | * Returns: | 11 | * Returns: |
12 | * NDIS_STATUS_FAILURE - the following initialization process | 12 | * NDIS_STATUS_FAILURE - the following initialization process |
13 | * should be terminated | 13 | * should be terminated |
14 | * NDIS_STATUS_SUCCESS - if firmware initialization process | 14 | * NDIS_STATUS_SUCCESS - if firmware initialization process |
15 | * success | 15 | * success |
16 | */ | 16 | */ |
17 | |||
17 | #include "r8192E.h" | 18 | #include "r8192E.h" |
18 | #include "r8192E_hw.h" | 19 | #include "r8192E_hw.h" |
20 | |||
19 | #include <linux/firmware.h> | 21 | #include <linux/firmware.h> |
20 | 22 | ||
21 | /* It should be double word alignment */ | 23 | /* It should be double word alignment */ |
22 | #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4 * (v / 4) - 8) | 24 | #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4 * (v / 4) - 8) |
23 | 25 | ||
24 | enum firmware_init_step { | 26 | enum firmware_init_step { |
25 | FW_INIT_STEP0_BOOT = 0, | 27 | FW_INIT_STEP0_BOOT = 0, |
@@ -47,17 +49,17 @@ void firmware_init_param(struct net_device *dev) | |||
47 | static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, | 49 | static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, |
48 | u32 buffer_len) | 50 | u32 buffer_len) |
49 | { | 51 | { |
50 | struct r8192_priv *priv = ieee80211_priv(dev); | 52 | struct r8192_priv *priv = ieee80211_priv(dev); |
51 | bool rt_status = true; | 53 | bool rt_status = true; |
52 | u16 frag_threshold; | 54 | u16 frag_threshold; |
53 | u16 frag_length, frag_offset = 0; | 55 | u16 frag_length, frag_offset = 0; |
54 | int i; | 56 | int i; |
55 | 57 | ||
56 | rt_firmware *pfirmware = priv->pFirmware; | 58 | rt_firmware *pfirmware = priv->pFirmware; |
57 | struct sk_buff *skb; | 59 | struct sk_buff *skb; |
58 | unsigned char *seg_ptr; | 60 | unsigned char *seg_ptr; |
59 | cb_desc *tcb_desc; | 61 | cb_desc *tcb_desc; |
60 | u8 bLastIniPkt; | 62 | u8 bLastIniPkt; |
61 | 63 | ||
62 | firmware_init_param(dev); | 64 | firmware_init_param(dev); |
63 | 65 | ||
@@ -89,10 +91,17 @@ static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, | |||
89 | * Transform from little endian to big endian and pending zero | 91 | * Transform from little endian to big endian and pending zero |
90 | */ | 92 | */ |
91 | for (i = 0; i < frag_length; i += 4) { | 93 | for (i = 0; i < frag_length; i += 4) { |
92 | *seg_ptr++ = ((i+0) < frag_length) ? code_virtual_address[i+3] : 0; | 94 | *seg_ptr++ = ((i+0) < frag_length) ? \ |
93 | *seg_ptr++ = ((i+1) < frag_length) ? code_virtual_address[i+2] : 0; | 95 | code_virtual_address[i+3] : 0; |
94 | *seg_ptr++ = ((i+2) < frag_length) ? code_virtual_address[i+1] : 0; | 96 | |
95 | *seg_ptr++ = ((i+3) < frag_length) ? code_virtual_address[i+0] : 0; | 97 | *seg_ptr++ = ((i+1) < frag_length) ? \ |
98 | code_virtual_address[i+2] : 0; | ||
99 | |||
100 | *seg_ptr++ = ((i+2) < frag_length) ? \ | ||
101 | code_virtual_address[i+1] : 0; | ||
102 | |||
103 | *seg_ptr++ = ((i+3) < frag_length) ? \ | ||
104 | code_virtual_address[i+0] : 0; | ||
96 | } | 105 | } |
97 | tcb_desc->txbuf_size = (u16)i; | 106 | tcb_desc->txbuf_size = (u16)i; |
98 | skb_put(skb, i); | 107 | skb_put(skb, i); |
@@ -204,16 +213,16 @@ CPUCheckFirmwareReady_Fail: | |||
204 | 213 | ||
205 | bool init_firmware(struct net_device *dev) | 214 | bool init_firmware(struct net_device *dev) |
206 | { | 215 | { |
207 | struct r8192_priv *priv = ieee80211_priv(dev); | 216 | struct r8192_priv *priv = ieee80211_priv(dev); |
208 | bool rt_status = TRUE; | 217 | bool rt_status = true; |
209 | u32 file_length = 0; | 218 | u32 file_length = 0; |
210 | u8 *mapped_file = NULL; | 219 | u8 *mapped_file = NULL; |
211 | u32 init_step = 0; | 220 | u32 init_step = 0; |
212 | enum opt_rst_type rst_opt = OPT_SYSTEM_RESET; | 221 | enum opt_rst_type rst_opt = OPT_SYSTEM_RESET; |
213 | enum firmware_init_step starting_state = FW_INIT_STEP0_BOOT; | 222 | enum firmware_init_step starting_state = FW_INIT_STEP0_BOOT; |
214 | 223 | ||
215 | rt_firmware *pfirmware = priv->pFirmware; | 224 | rt_firmware *pfirmware = priv->pFirmware; |
216 | const struct firmware *fw_entry; | 225 | const struct firmware *fw_entry; |
217 | const char *fw_name[3] = { "RTL8192E/boot.img", | 226 | const char *fw_name[3] = { "RTL8192E/boot.img", |
218 | "RTL8192E/main.img", | 227 | "RTL8192E/main.img", |
219 | "RTL8192E/data.img"}; | 228 | "RTL8192E/data.img"}; |
@@ -240,31 +249,37 @@ bool init_firmware(struct net_device *dev) | |||
240 | * Download boot, main, and data image for System reset. | 249 | * Download boot, main, and data image for System reset. |
241 | * Download data image for firmware reseta | 250 | * Download data image for firmware reseta |
242 | */ | 251 | */ |
243 | for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA; init_step++) { | 252 | for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA; \ |
253 | init_step++) { | ||
244 | /* | 254 | /* |
245 | * Open Image file, and map file to contineous memory if open file success. | 255 | * Open Image file, and map file to contineous memory if open file success. |
246 | * or read image file from array. Default load from IMG file | 256 | * or read image file from array. Default load from IMG file |
247 | */ | 257 | */ |
248 | if (rst_opt == OPT_SYSTEM_RESET) { | 258 | if (rst_opt == OPT_SYSTEM_RESET) { |
249 | if (pfirmware->firmware_buf_size[init_step] == 0) { | 259 | if (pfirmware->firmware_buf_size[init_step] == 0) { |
250 | rc = request_firmware(&fw_entry, fw_name[init_step], &priv->pdev->dev); | 260 | rc = request_firmware(&fw_entry, |
261 | fw_name[init_step], &priv->pdev->dev); | ||
262 | |||
251 | if (rc < 0) { | 263 | if (rc < 0) { |
252 | RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n"); | 264 | RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n"); |
253 | goto download_firmware_fail; | 265 | goto download_firmware_fail; |
254 | } | 266 | } |
255 | 267 | ||
256 | if (fw_entry->size > sizeof(pfirmware->firmware_buf[init_step])) { | 268 | if (fw_entry->size > sizeof(pfirmware->firmware_buf[init_step])) { |
257 | RT_TRACE(COMP_FIRMWARE, "img file size exceed the container buffer fail!\n"); | 269 | RT_TRACE(COMP_FIRMWARE, \ |
270 | "img file size exceed the container buffer fail!\n"); | ||
258 | goto download_firmware_fail; | 271 | goto download_firmware_fail; |
259 | } | 272 | } |
260 | 273 | ||
261 | if (init_step != FW_INIT_STEP1_MAIN) { | 274 | if (init_step != FW_INIT_STEP1_MAIN) { |
262 | memcpy(pfirmware->firmware_buf[init_step], fw_entry->data, fw_entry->size); | 275 | memcpy(pfirmware->firmware_buf[init_step], |
276 | fw_entry->data, fw_entry->size); | ||
263 | pfirmware->firmware_buf_size[init_step] = fw_entry->size; | 277 | pfirmware->firmware_buf_size[init_step] = fw_entry->size; |
264 | 278 | ||
265 | } else { | 279 | } else { |
266 | memset(pfirmware->firmware_buf[init_step], 0, 128); | 280 | memset(pfirmware->firmware_buf[init_step], 0, 128); |
267 | memcpy(&pfirmware->firmware_buf[init_step][128], fw_entry->data, fw_entry->size); | 281 | memcpy(&pfirmware->firmware_buf[init_step][128], fw_entry->data, |
282 | fw_entry->size); | ||
268 | pfirmware->firmware_buf_size[init_step] = fw_entry->size+128; | 283 | pfirmware->firmware_buf_size[init_step] = fw_entry->size+128; |
269 | } | 284 | } |
270 | 285 | ||
@@ -273,6 +288,7 @@ bool init_firmware(struct net_device *dev) | |||
273 | } | 288 | } |
274 | mapped_file = pfirmware->firmware_buf[init_step]; | 289 | mapped_file = pfirmware->firmware_buf[init_step]; |
275 | file_length = pfirmware->firmware_buf_size[init_step]; | 290 | file_length = pfirmware->firmware_buf_size[init_step]; |
291 | |||
276 | } else if (rst_opt == OPT_FIRMWARE_RESET) { | 292 | } else if (rst_opt == OPT_FIRMWARE_RESET) { |
277 | /* we only need to download data.img here */ | 293 | /* we only need to download data.img here */ |
278 | mapped_file = pfirmware->firmware_buf[init_step]; | 294 | mapped_file = pfirmware->firmware_buf[init_step]; |
@@ -346,7 +362,10 @@ bool init_firmware(struct net_device *dev) | |||
346 | 362 | ||
347 | download_firmware_fail: | 363 | download_firmware_fail: |
348 | RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__); | 364 | RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__); |
349 | rt_status = FALSE; | 365 | rt_status = false; |
350 | return rt_status; | 366 | return rt_status; |
351 | |||
352 | } | 367 | } |
368 | |||
369 | MODULE_FIRMWARE("RTL8192E/boot.img"); | ||
370 | MODULE_FIRMWARE("RTL8192E/main.img"); | ||
371 | MODULE_FIRMWARE("RTL8192E/data.img"); | ||
diff --git a/drivers/staging/rtl8192e/r819xE_phy.c b/drivers/staging/rtl8192e/r819xE_phy.c index c44059aeacb6..7bd4fae0667e 100644 --- a/drivers/staging/rtl8192e/r819xE_phy.c +++ b/drivers/staging/rtl8192e/r819xE_phy.c | |||
@@ -5,7 +5,7 @@ | |||
5 | #include "r819xE_phy.h" | 5 | #include "r819xE_phy.h" |
6 | #include "r8192E_dm.h" | 6 | #include "r8192E_dm.h" |
7 | #ifdef ENABLE_DOT11D | 7 | #ifdef ENABLE_DOT11D |
8 | #include "dot11d.h" | 8 | #include "ieee80211/dot11d.h" |
9 | #endif | 9 | #endif |
10 | static u32 RF_CHANNEL_TABLE_ZEBRA[] = { | 10 | static u32 RF_CHANNEL_TABLE_ZEBRA[] = { |
11 | 0, | 11 | 0, |
diff --git a/drivers/staging/rtl8192e/r819xE_phy.h b/drivers/staging/rtl8192e/r819xE_phy.h index fa77abe88827..41e0d777eabd 100644 --- a/drivers/staging/rtl8192e/r819xE_phy.h +++ b/drivers/staging/rtl8192e/r819xE_phy.h | |||
@@ -1,43 +1,46 @@ | |||
1 | #ifndef _R819XU_PHY_H | 1 | #ifndef _R819XU_PHY_H |
2 | #define _R819XU_PHY_H | 2 | #define _R819XU_PHY_H |
3 | /* Channel switch:The size of command tables for switch channel*/ | 3 | |
4 | /* Channel switch: the size of command tables for switch channel */ | ||
4 | #define MAX_PRECMD_CNT 16 | 5 | #define MAX_PRECMD_CNT 16 |
5 | #define MAX_RFDEPENDCMD_CNT 16 | 6 | #define MAX_RFDEPENDCMD_CNT 16 |
6 | #define MAX_POSTCMD_CNT 16 | 7 | #define MAX_POSTCMD_CNT 16 |
7 | 8 | ||
8 | #ifdef RTL8190P | 9 | #ifdef RTL8190P |
9 | #define MACPHY_Array_PGLength 21 | 10 | #define MACPHY_Array_PGLength 21 |
10 | #define Rtl819XMACPHY_Array_PG Rtl8190PciMACPHY_Array_PG | 11 | #define Rtl819XMACPHY_Array_PG Rtl8190PciMACPHY_Array_PG |
11 | #define Rtl819XMACPHY_Array Rtl8190PciMACPHY_Array | 12 | #define Rtl819XMACPHY_Array Rtl8190PciMACPHY_Array |
12 | #define RadioC_ArrayLength 246 | 13 | #define RadioC_ArrayLength 246 |
13 | #define RadioD_ArrayLength 78 | 14 | #define RadioD_ArrayLength 78 |
14 | #define Rtl819XRadioA_Array Rtl8190PciRadioA_Array | 15 | #define Rtl819XRadioA_Array Rtl8190PciRadioA_Array |
15 | #define Rtl819XRadioB_Array Rtl8190PciRadioB_Array | 16 | #define Rtl819XRadioB_Array Rtl8190PciRadioB_Array |
16 | #define Rtl819XRadioC_Array Rtl8190PciRadioC_Array | 17 | #define Rtl819XRadioC_Array Rtl8190PciRadioC_Array |
17 | #define Rtl819XRadioD_Array Rtl8190PciRadioD_Array | 18 | #define Rtl819XRadioD_Array Rtl8190PciRadioD_Array |
18 | #define Rtl819XAGCTAB_Array Rtl8190PciAGCTAB_Array | 19 | #define Rtl819XAGCTAB_Array Rtl8190PciAGCTAB_Array |
19 | #define PHY_REGArrayLength 280 | 20 | #define PHY_REGArrayLength 280 |
20 | #define Rtl819XPHY_REGArray Rtl8190PciPHY_REGArray | 21 | #define Rtl819XPHY_REGArray Rtl8190PciPHY_REGArray |
21 | #define PHY_REG_1T2RArrayLength 280 | 22 | #define PHY_REG_1T2RArrayLength 280 |
22 | #define Rtl819XPHY_REG_1T2RArray Rtl8190PciPHY_REG_1T2RArray | 23 | #define Rtl819XPHY_REG_1T2RArray Rtl8190PciPHY_REG_1T2RArray |
24 | #endif | ||
25 | |||
26 | |||
27 | #ifdef RTL8192E | ||
28 | #define MACPHY_Array_PGLength 30 | ||
29 | #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG | ||
30 | #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array | ||
31 | #define RadioC_ArrayLength 1 | ||
32 | #define RadioD_ArrayLength 1 | ||
33 | #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array | ||
34 | #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array | ||
35 | #define Rtl819XRadioC_Array Rtl8192PciERadioC_Array | ||
36 | #define Rtl819XRadioD_Array Rtl8192PciERadioD_Array | ||
37 | #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array | ||
38 | #define PHY_REGArrayLength 1 | ||
39 | #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray | ||
40 | #define PHY_REG_1T2RArrayLength 296 | ||
41 | #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray | ||
23 | #endif | 42 | #endif |
24 | 43 | ||
25 | #ifdef RTL8192E | ||
26 | #define MACPHY_Array_PGLength 30 | ||
27 | #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG | ||
28 | #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array | ||
29 | #define RadioC_ArrayLength 1 | ||
30 | #define RadioD_ArrayLength 1 | ||
31 | #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array | ||
32 | #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array | ||
33 | #define Rtl819XRadioC_Array Rtl8192PciERadioC_Array | ||
34 | #define Rtl819XRadioD_Array Rtl8192PciERadioD_Array | ||
35 | #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array | ||
36 | #define PHY_REGArrayLength 1 | ||
37 | #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray | ||
38 | #define PHY_REG_1T2RArrayLength 296 | ||
39 | #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray | ||
40 | #endif | ||
41 | #define AGCTAB_ArrayLength 384 | 44 | #define AGCTAB_ArrayLength 384 |
42 | #define MACPHY_ArrayLength 18 | 45 | #define MACPHY_ArrayLength 18 |
43 | 46 | ||
@@ -45,7 +48,7 @@ | |||
45 | #define RadioB_ArrayLength 78 | 48 | #define RadioB_ArrayLength 78 |
46 | 49 | ||
47 | 50 | ||
48 | typedef enum _SwChnlCmdID{ | 51 | typedef enum _SwChnlCmdID { |
49 | CmdID_End, | 52 | CmdID_End, |
50 | CmdID_SetTxPowerLevel, | 53 | CmdID_SetTxPowerLevel, |
51 | CmdID_BBRegWrite10, | 54 | CmdID_BBRegWrite10, |
@@ -53,16 +56,15 @@ typedef enum _SwChnlCmdID{ | |||
53 | CmdID_WritePortUshort, | 56 | CmdID_WritePortUshort, |
54 | CmdID_WritePortUchar, | 57 | CmdID_WritePortUchar, |
55 | CmdID_RF_WriteReg, | 58 | CmdID_RF_WriteReg, |
56 | }SwChnlCmdID; | 59 | } SwChnlCmdID; |
57 | 60 | ||
58 | /*--------------------------------Define structure--------------------------------*/ | 61 | /* switch channel data structure */ |
59 | /* 1. Switch channel related */ | 62 | typedef struct _SwChnlCmd { |
60 | typedef struct _SwChnlCmd{ | 63 | SwChnlCmdID CmdID; |
61 | SwChnlCmdID CmdID; | 64 | u32 Para1; |
62 | u32 Para1; | 65 | u32 Para2; |
63 | u32 Para2; | 66 | u32 msDelay; |
64 | u32 msDelay; | 67 | } __attribute__ ((packed)) SwChnlCmd; |
65 | }__attribute__ ((packed)) SwChnlCmd; | ||
66 | 68 | ||
67 | extern u32 rtl819XMACPHY_Array_PG[]; | 69 | extern u32 rtl819XMACPHY_Array_PG[]; |
68 | extern u32 rtl819XPHY_REG_1T2RArray[]; | 70 | extern u32 rtl819XPHY_REG_1T2RArray[]; |
@@ -72,54 +74,90 @@ extern u32 rtl819XRadioB_Array[]; | |||
72 | extern u32 rtl819XRadioC_Array[]; | 74 | extern u32 rtl819XRadioC_Array[]; |
73 | extern u32 rtl819XRadioD_Array[]; | 75 | extern u32 rtl819XRadioD_Array[]; |
74 | 76 | ||
75 | typedef enum _HW90_BLOCK{ | 77 | typedef enum _HW90_BLOCK { |
76 | HW90_BLOCK_MAC = 0, | 78 | HW90_BLOCK_MAC = 0, |
77 | HW90_BLOCK_PHY0 = 1, | 79 | HW90_BLOCK_PHY0 = 1, |
78 | HW90_BLOCK_PHY1 = 2, | 80 | HW90_BLOCK_PHY1 = 2, |
79 | HW90_BLOCK_RF = 3, | 81 | HW90_BLOCK_RF = 3, |
80 | HW90_BLOCK_MAXIMUM = 4, // Never use this | 82 | /* Don't ever use this. */ |
81 | }HW90_BLOCK_E, *PHW90_BLOCK_E; | 83 | HW90_BLOCK_MAXIMUM = 4, |
82 | 84 | } HW90_BLOCK_E, *PHW90_BLOCK_E; | |
83 | typedef enum _RF90_RADIO_PATH{ | 85 | |
84 | RF90_PATH_A = 0, //Radio Path A | 86 | typedef enum _RF90_RADIO_PATH { |
85 | RF90_PATH_B = 1, //Radio Path B | 87 | /* Radio paths */ |
86 | RF90_PATH_C = 2, //Radio Path C | 88 | RF90_PATH_A = 0, |
87 | RF90_PATH_D = 3, //Radio Path D | 89 | RF90_PATH_B = 1, |
88 | RF90_PATH_MAX //Max RF number 92 support | 90 | RF90_PATH_C = 2, |
89 | }RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; | 91 | RF90_PATH_D = 3, |
90 | 92 | ||
91 | #define bMaskByte0 0xff | 93 | /* Max RF number 92 support */ |
92 | #define bMaskByte1 0xff00 | 94 | RF90_PATH_MAX |
93 | #define bMaskByte2 0xff0000 | 95 | } RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; |
94 | #define bMaskByte3 0xff000000 | 96 | |
95 | #define bMaskHWord 0xffff0000 | 97 | #define bMaskByte0 0xff |
96 | #define bMaskLWord 0x0000ffff | 98 | #define bMaskByte1 0xff00 |
97 | #define bMaskDWord 0xffffffff | 99 | #define bMaskByte2 0xff0000 |
98 | 100 | #define bMaskByte3 0xff000000 | |
99 | //extern u32 rtl8192_CalculateBitShift(u32 dwBitMask); | 101 | #define bMaskHWord 0xffff0000 |
100 | extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath); | 102 | #define bMaskLWord 0x0000ffff |
101 | extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData); | 103 | #define bMaskDWord 0xffffffff |
102 | extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask); | 104 | |
103 | //extern u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset); | 105 | /*extern u32 rtl8192_CalculateBitShift(u32 dwBitMask); |
104 | //extern void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data); | 106 | |
105 | extern void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data); | 107 | extern u32 rtl8192_phy_RFSerialRead(struct net_device *dev, |
106 | extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask); | 108 | RF90_RADIO_PATH_E eRFPath, u32 Offset); |
107 | extern void rtl8192_phy_configmac(struct net_device* dev); | 109 | |
108 | extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType); | 110 | extern void rtl8192_phy_RFSerialWrite(struct net_device *dev, |
109 | //extern void rtl8192_InitBBRFRegDef(struct net_device* dev); | 111 | RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data); |
110 | extern RT_STATUS rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath); | 112 | |
111 | //extern RT_STATUS rtl8192_BB_Config_ParaFile(struct net_device* dev); | 113 | extern void rtl8192_InitBBRFRegDef(struct net_device *dev); |
112 | extern RT_STATUS rtl8192_BBConfig(struct net_device* dev); | 114 | |
113 | extern void rtl8192_phy_getTxPower(struct net_device* dev); | 115 | extern RT_STATUS rtl8192_BB_Config_ParaFile(struct net_device *dev); */ |
114 | extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel); | 116 | |
117 | extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 eRFPath); | ||
118 | |||
119 | extern void rtl8192_setBBreg(struct net_device *dev, u32 dwRegAddr, | ||
120 | u32 dwBitMask, u32 dwData); | ||
121 | |||
122 | extern u32 rtl8192_QueryBBReg(struct net_device *dev, u32 dwRegAddr, | ||
123 | u32 dwBitMask); | ||
124 | |||
125 | extern void rtl8192_phy_SetRFReg(struct net_device *dev, | ||
126 | RF90_RADIO_PATH_E eRFPath, u32 RegAddr, | ||
127 | u32 BitMask, u32 Data); | ||
128 | |||
129 | extern u32 rtl8192_phy_QueryRFReg(struct net_device *dev, | ||
130 | RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask); | ||
131 | |||
132 | extern void rtl8192_phy_configmac(struct net_device *dev); | ||
133 | |||
134 | extern void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType); | ||
135 | |||
136 | extern RT_STATUS rtl8192_phy_checkBBAndRF(struct net_device *dev, | ||
137 | HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath); | ||
138 | |||
139 | extern RT_STATUS rtl8192_BBConfig(struct net_device *dev); | ||
140 | |||
141 | extern void rtl8192_phy_getTxPower(struct net_device *dev); | ||
142 | |||
143 | extern void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel); | ||
144 | |||
115 | extern RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev); | 145 | extern RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev); |
146 | |||
116 | extern void rtl8192_phy_updateInitGain(struct net_device* dev); | 147 | extern void rtl8192_phy_updateInitGain(struct net_device* dev); |
117 | extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath); | ||
118 | 148 | ||
119 | extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel); | 149 | extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, |
120 | extern void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset); | 150 | RF90_RADIO_PATH_E eRFPath); |
151 | |||
152 | extern u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel); | ||
153 | |||
154 | extern void rtl8192_SetBWMode(struct net_device *dev, | ||
155 | HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset); | ||
156 | |||
121 | extern void rtl8192_SwChnl_WorkItem(struct net_device *dev); | 157 | extern void rtl8192_SwChnl_WorkItem(struct net_device *dev); |
158 | |||
122 | extern void rtl8192_SetBWModeWorkItem(struct net_device *dev); | 159 | extern void rtl8192_SetBWModeWorkItem(struct net_device *dev); |
160 | |||
123 | extern void InitialGain819xPci(struct net_device *dev, u8 Operation); | 161 | extern void InitialGain819xPci(struct net_device *dev, u8 Operation); |
124 | 162 | ||
125 | #endif | 163 | #endif /* _R819XU_PHY_H */ |
diff --git a/drivers/staging/rtl8192e/r819xE_phyreg.h b/drivers/staging/rtl8192e/r819xE_phyreg.h index 37f0feefaf2c..d5de279f6644 100644 --- a/drivers/staging/rtl8192e/r819xE_phyreg.h +++ b/drivers/staging/rtl8192e/r819xE_phyreg.h | |||
@@ -38,6 +38,8 @@ | |||
38 | #define MCS_TXAGC 0x340 // MCS AGC | 38 | #define MCS_TXAGC 0x340 // MCS AGC |
39 | #define CCK_TXAGC 0x348 // CCK AGC | 39 | #define CCK_TXAGC 0x348 // CCK AGC |
40 | 40 | ||
41 | #define MacBlkCtrl 0x403 // Mac block on/off control register | ||
42 | |||
41 | //page8 | 43 | //page8 |
42 | #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC | 44 | #define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC |
43 | #define rFPGA0_TxInfo 0x804 | 45 | #define rFPGA0_TxInfo 0x804 |
@@ -79,55 +81,70 @@ | |||
79 | #define rFPGA0_XB_LSSIReadBack 0x8a4 | 81 | #define rFPGA0_XB_LSSIReadBack 0x8a4 |
80 | #define rFPGA0_XC_LSSIReadBack 0x8a8 | 82 | #define rFPGA0_XC_LSSIReadBack 0x8a8 |
81 | #define rFPGA0_XD_LSSIReadBack 0x8ac | 83 | #define rFPGA0_XD_LSSIReadBack 0x8ac |
82 | #define rFPGA0_PSDReport 0x8b4 | 84 | #define rFPGA0_PSDReport 0x8b4 |
83 | #define rFPGA0_XAB_RFInterfaceRB 0x8e0 | 85 | #define rFPGA0_XAB_RFInterfaceRB 0x8e0 |
84 | #define rFPGA0_XCD_RFInterfaceRB 0x8e4 | 86 | #define rFPGA0_XCD_RFInterfaceRB 0x8e4 |
85 | 87 | ||
86 | //page 9 | 88 | /* Page 9 - RF mode & OFDM TxSC */ |
87 | #define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC | 89 | #define rFPGA1_RFMOD 0x900 |
88 | #define rFPGA1_TxBlock 0x904 | 90 | #define rFPGA1_TxBlock 0x904 |
89 | #define rFPGA1_DebugSelect 0x908 | 91 | #define rFPGA1_DebugSelect 0x908 |
90 | #define rFPGA1_TxInfo 0x90c | 92 | #define rFPGA1_TxInfo 0x90c |
91 | 93 | ||
92 | //page a | 94 | /* Page a */ |
93 | #define rCCK0_System 0xa00 | 95 | #define rCCK0_System 0xa00 |
94 | #define rCCK0_AFESetting 0xa04 | 96 | #define rCCK0_AFESetting 0xa04 |
95 | #define rCCK0_CCA 0xa08 | 97 | #define rCCK0_CCA 0xa08 |
96 | #define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level | 98 | /* AGC default value, saturation level */ |
97 | #define rCCK0_RxAGC2 0xa10 //AGC & DAGC | 99 | #define rCCK0_RxAGC1 0xa0c |
98 | #define rCCK0_RxHP 0xa14 | 100 | /* AGC & DAGC */ |
99 | #define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold | 101 | #define rCCK0_RxAGC2 0xa10 |
100 | #define rCCK0_DSPParameter2 0xa1c //SQ threshold | 102 | #define rCCK0_RxHP 0xa14 |
101 | #define rCCK0_TxFilter1 0xa20 | 103 | /* Timing recovery & channel estimation threshold */ |
102 | #define rCCK0_TxFilter2 0xa24 | 104 | #define rCCK0_DSPParameter1 0xa18 |
103 | #define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 | 105 | /* SQ threshold */ |
104 | #define rCCK0_FalseAlarmReport 0xa2c //0xa2d | 106 | #define rCCK0_DSPParameter2 0xa1c |
105 | #define rCCK0_TRSSIReport 0xa50 | 107 | #define rCCK0_TxFilter1 0xa20 |
106 | #define rCCK0_RxReport 0xa54 //0xa57 | 108 | #define rCCK0_TxFilter2 0xa24 |
107 | #define rCCK0_FACounterLower 0xa5c //0xa5b | 109 | /* Debug port and TX filter 3 */ |
108 | #define rCCK0_FACounterUpper 0xa58 //0xa5c | 110 | #define rCCK0_DebugPort 0xa28 |
109 | 111 | #define rCCK0_FalseAlarmReport 0xa2c | |
110 | //page c | 112 | #define rCCK0_TRSSIReport 0xa50 |
111 | #define rOFDM0_LSTF 0xc00 | 113 | #define rCCK0_RxReport 0xa54 |
114 | #define rCCK0_FACounterLower 0xa5c | ||
115 | #define rCCK0_FACounterUpper 0xa58 | ||
116 | |||
117 | /* Page c */ | ||
118 | #define rOFDM0_LSTF 0xc00 | ||
112 | #define rOFDM0_TRxPathEnable 0xc04 | 119 | #define rOFDM0_TRxPathEnable 0xc04 |
113 | #define rOFDM0_TRMuxPar 0xc08 | 120 | #define rOFDM0_TRMuxPar 0xc08 |
114 | #define rOFDM0_TRSWIsolation 0xc0c | 121 | #define rOFDM0_TRSWIsolation 0xc0c |
115 | #define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter | 122 | /* RxIQ DC offset, Rx digital filter, DC notch filter */ |
116 | #define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix | 123 | #define rOFDM0_XARxAFE 0xc10 |
117 | #define rOFDM0_XBRxAFE 0xc18 | 124 | /* RxIQ imblance matrix */ |
125 | #define rOFDM0_XARxIQImbalance 0xc14 | ||
126 | #define rOFDM0_XBRxAFE 0xc18 | ||
118 | #define rOFDM0_XBRxIQImbalance 0xc1c | 127 | #define rOFDM0_XBRxIQImbalance 0xc1c |
119 | #define rOFDM0_XCRxAFE 0xc20 | 128 | #define rOFDM0_XCRxAFE 0xc20 |
120 | #define rOFDM0_XCRxIQImbalance 0xc24 | 129 | #define rOFDM0_XCRxIQImbalance 0xc24 |
121 | #define rOFDM0_XDRxAFE 0xc28 | 130 | #define rOFDM0_XDRxAFE 0xc28 |
122 | #define rOFDM0_XDRxIQImbalance 0xc2c | 131 | #define rOFDM0_XDRxIQImbalance 0xc2c |
123 | #define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD | 132 | /* PD, BW & SBD */ |
124 | #define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. | 133 | #define rOFDM0_RxDetector1 0xc30 |
125 | #define rOFDM0_RxDetector3 0xc38 //Frame Sync. | 134 | /* SBD */ |
126 | #define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI | 135 | #define rOFDM0_RxDetector2 0xc34 |
127 | #define rOFDM0_RxDSP 0xc40 //Rx Sync Path | 136 | /* Frame Sync */ |
128 | #define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC | 137 | #define rOFDM0_RxDetector3 0xc38 |
129 | #define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold | 138 | /* PD, SBD, Frame Sync & Short-GI */ |
130 | #define rOFDM0_ECCAThreshold 0xc4c // energy CCA | 139 | #define rOFDM0_RxDetector4 0xc3c |
140 | /* Rx Sync Path */ | ||
141 | #define rOFDM0_RxDSP 0xc40 | ||
142 | /* CFO & DAGC */ | ||
143 | #define rOFDM0_CFOandDAGC 0xc44 | ||
144 | /* CCA Drop threshold */ | ||
145 | #define rOFDM0_CCADropThreshold 0xc48 | ||
146 | /* Energy CCA */ | ||
147 | #define rOFDM0_ECCAThreshold 0xc4c | ||
131 | #define rOFDM0_XAAGCCore1 0xc50 | 148 | #define rOFDM0_XAAGCCore1 0xc50 |
132 | #define rOFDM0_XAAGCCore2 0xc54 | 149 | #define rOFDM0_XAAGCCore2 0xc54 |
133 | #define rOFDM0_XBAGCCore1 0xc58 | 150 | #define rOFDM0_XBAGCCore1 0xc58 |
@@ -139,501 +156,517 @@ | |||
139 | #define rOFDM0_AGCParameter1 0xc70 | 156 | #define rOFDM0_AGCParameter1 0xc70 |
140 | #define rOFDM0_AGCParameter2 0xc74 | 157 | #define rOFDM0_AGCParameter2 0xc74 |
141 | #define rOFDM0_AGCRSSITable 0xc78 | 158 | #define rOFDM0_AGCRSSITable 0xc78 |
142 | #define rOFDM0_HTSTFAGC 0xc7c | 159 | #define rOFDM0_HTSTFAGC 0xc7c |
143 | #define rOFDM0_XATxIQImbalance 0xc80 | 160 | #define rOFDM0_XATxIQImbalance 0xc80 |
144 | #define rOFDM0_XATxAFE 0xc84 | 161 | #define rOFDM0_XATxAFE 0xc84 |
145 | #define rOFDM0_XBTxIQImbalance 0xc88 | 162 | #define rOFDM0_XBTxIQImbalance 0xc88 |
146 | #define rOFDM0_XBTxAFE 0xc8c | 163 | #define rOFDM0_XBTxAFE 0xc8c |
147 | #define rOFDM0_XCTxIQImbalance 0xc90 | 164 | #define rOFDM0_XCTxIQImbalance 0xc90 |
148 | #define rOFDM0_XCTxAFE 0xc94 | 165 | #define rOFDM0_XCTxAFE 0xc94 |
149 | #define rOFDM0_XDTxIQImbalance 0xc98 | 166 | #define rOFDM0_XDTxIQImbalance 0xc98 |
150 | #define rOFDM0_XDTxAFE 0xc9c | 167 | #define rOFDM0_XDTxAFE 0xc9c |
151 | #define rOFDM0_RxHPParameter 0xce0 | 168 | #define rOFDM0_RxHPParameter 0xce0 |
152 | #define rOFDM0_TxPseudoNoiseWgt 0xce4 | 169 | #define rOFDM0_TxPseudoNoiseWgt 0xce4 |
153 | #define rOFDM0_FrameSync 0xcf0 | 170 | #define rOFDM0_FrameSync 0xcf0 |
154 | #define rOFDM0_DFSReport 0xcf4 | 171 | #define rOFDM0_DFSReport 0xcf4 |
155 | #define rOFDM0_TxCoeff1 0xca4 | 172 | #define rOFDM0_TxCoeff1 0xca4 |
156 | #define rOFDM0_TxCoeff2 0xca8 | 173 | #define rOFDM0_TxCoeff2 0xca8 |
157 | #define rOFDM0_TxCoeff3 0xcac | 174 | #define rOFDM0_TxCoeff3 0xcac |
158 | #define rOFDM0_TxCoeff4 0xcb0 | 175 | #define rOFDM0_TxCoeff4 0xcb0 |
159 | #define rOFDM0_TxCoeff5 0xcb4 | 176 | #define rOFDM0_TxCoeff5 0xcb4 |
160 | #define rOFDM0_TxCoeff6 0xcb8 | 177 | #define rOFDM0_TxCoeff6 0xcb8 |
161 | 178 | ||
162 | 179 | ||
163 | //page d | 180 | /* Page d */ |
164 | #define rOFDM1_LSTF 0xd00 | 181 | #define rOFDM1_LSTF 0xd00 |
165 | #define rOFDM1_TRxPathEnable 0xd04 | 182 | #define rOFDM1_TRxPathEnable 0xd04 |
166 | #define rOFDM1_CFO 0xd08 | 183 | #define rOFDM1_CFO 0xd08 |
167 | #define rOFDM1_CSI1 0xd10 | 184 | #define rOFDM1_CSI1 0xd10 |
168 | #define rOFDM1_SBD 0xd14 | 185 | #define rOFDM1_SBD 0xd14 |
169 | #define rOFDM1_CSI2 0xd18 | 186 | #define rOFDM1_CSI2 0xd18 |
170 | #define rOFDM1_CFOTracking 0xd2c | 187 | #define rOFDM1_CFOTracking 0xd2c |
171 | #define rOFDM1_TRxMesaure1 0xd34 | 188 | #define rOFDM1_TRxMesaure1 0xd34 |
172 | #define rOFDM1_IntfDet 0xd3c | 189 | #define rOFDM1_IntfDet 0xd3c |
173 | #define rOFDM1_PseudoNoiseStateAB 0xd50 | 190 | #define rOFDM1_PseudoNoiseStateAB 0xd50 |
174 | #define rOFDM1_PseudoNoiseStateCD 0xd54 | 191 | #define rOFDM1_PseudoNoiseStateCD 0xd54 |
175 | #define rOFDM1_RxPseudoNoiseWgt 0xd58 | 192 | #define rOFDM1_RxPseudoNoiseWgt 0xd58 |
176 | #define rOFDM_PHYCounter1 0xda0 //cca, parity fail | 193 | /* cca, parity fail */ |
177 | #define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail | 194 | #define rOFDM_PHYCounter1 0xda0 |
178 | #define rOFDM_PHYCounter3 0xda8 //MCS not support | 195 | /* rate illegal, crc8 fail */ |
179 | #define rOFDM_ShortCFOAB 0xdac | 196 | #define rOFDM_PHYCounter2 0xda4 |
180 | #define rOFDM_ShortCFOCD 0xdb0 | 197 | /* MCS not supported */ |
181 | #define rOFDM_LongCFOAB 0xdb4 | 198 | #define rOFDM_PHYCounter3 0xda8 |
182 | #define rOFDM_LongCFOCD 0xdb8 | 199 | #define rOFDM_ShortCFOAB 0xdac |
183 | #define rOFDM_TailCFOAB 0xdbc | 200 | #define rOFDM_ShortCFOCD 0xdb0 |
184 | #define rOFDM_TailCFOCD 0xdc0 | 201 | #define rOFDM_LongCFOAB 0xdb4 |
202 | #define rOFDM_LongCFOCD 0xdb8 | ||
203 | #define rOFDM_TailCFOAB 0xdbc | ||
204 | #define rOFDM_TailCFOCD 0xdc0 | ||
185 | #define rOFDM_PWMeasure1 0xdc4 | 205 | #define rOFDM_PWMeasure1 0xdc4 |
186 | #define rOFDM_PWMeasure2 0xdc8 | 206 | #define rOFDM_PWMeasure2 0xdc8 |
187 | #define rOFDM_BWReport 0xdcc | 207 | #define rOFDM_BWReport 0xdcc |
188 | #define rOFDM_AGCReport 0xdd0 | 208 | #define rOFDM_AGCReport 0xdd0 |
189 | #define rOFDM_RxSNR 0xdd4 | 209 | #define rOFDM_RxSNR 0xdd4 |
190 | #define rOFDM_RxEVMCSI 0xdd8 | 210 | #define rOFDM_RxEVMCSI 0xdd8 |
191 | #define rOFDM_SIGReport 0xddc | 211 | #define rOFDM_SIGReport 0xddc |
192 | 212 | ||
193 | //page e | 213 | /* Page e */ |
194 | #define rTxAGC_Rate18_06 0xe00 | 214 | #define rTxAGC_Rate18_06 0xe00 |
195 | #define rTxAGC_Rate54_24 0xe04 | 215 | #define rTxAGC_Rate54_24 0xe04 |
196 | #define rTxAGC_CCK_Mcs32 0xe08 | 216 | #define rTxAGC_CCK_Mcs32 0xe08 |
197 | #define rTxAGC_Mcs03_Mcs00 0xe10 | 217 | #define rTxAGC_Mcs03_Mcs00 0xe10 |
198 | #define rTxAGC_Mcs07_Mcs04 0xe14 | 218 | #define rTxAGC_Mcs07_Mcs04 0xe14 |
199 | #define rTxAGC_Mcs11_Mcs08 0xe18 | 219 | #define rTxAGC_Mcs11_Mcs08 0xe18 |
200 | #define rTxAGC_Mcs15_Mcs12 0xe1c | 220 | #define rTxAGC_Mcs15_Mcs12 0xe1c |
201 | 221 | ||
202 | 222 | ||
203 | //RF | 223 | /* RF Zebra 1 */ |
204 | //Zebra1 | ||
205 | #define rZebra1_HSSIEnable 0x0 | 224 | #define rZebra1_HSSIEnable 0x0 |
206 | #define rZebra1_TRxEnable1 0x1 | 225 | #define rZebra1_TRxEnable1 0x1 |
207 | #define rZebra1_TRxEnable2 0x2 | 226 | #define rZebra1_TRxEnable2 0x2 |
208 | #define rZebra1_AGC 0x4 | 227 | #define rZebra1_AGC 0x4 |
209 | #define rZebra1_ChargePump 0x5 | 228 | #define rZebra1_ChargePump 0x5 |
210 | #define rZebra1_Channel 0x7 | 229 | #define rZebra1_Channel 0x7 |
211 | #define rZebra1_TxGain 0x8 | 230 | #define rZebra1_TxGain 0x8 |
212 | #define rZebra1_TxLPF 0x9 | 231 | #define rZebra1_TxLPF 0x9 |
213 | #define rZebra1_RxLPF 0xb | 232 | #define rZebra1_RxLPF 0xb |
214 | #define rZebra1_RxHPFCorner 0xc | 233 | #define rZebra1_RxHPFCorner 0xc |
215 | 234 | ||
216 | //Zebra4 | 235 | /* Zebra 4 */ |
217 | #define rGlobalCtrl 0 | 236 | #define rGlobalCtrl 0 |
218 | #define rRTL8256_TxLPF 19 | 237 | #define rRTL8256_TxLPF 19 |
219 | #define rRTL8256_RxLPF 11 | 238 | #define rRTL8256_RxLPF 11 |
220 | 239 | ||
221 | //RTL8258 | 240 | /* RTL8258 */ |
222 | #define rRTL8258_TxLPF 0x11 | 241 | #define rRTL8258_TxLPF 0x11 |
223 | #define rRTL8258_RxLPF 0x13 | 242 | #define rRTL8258_RxLPF 0x13 |
224 | #define rRTL8258_RSSILPF 0xa | 243 | #define rRTL8258_RSSILPF 0xa |
225 | 244 | ||
226 | //Bit Mask | 245 | /* Bit Mask */ |
227 | //page-1 | 246 | /* Page 1 */ |
228 | #define bBBResetB 0x100 | 247 | #define bBBResetB 0x100 |
229 | #define bGlobalResetB 0x200 | 248 | #define bGlobalResetB 0x200 |
230 | #define bOFDMTxStart 0x4 | 249 | #define bOFDMTxStart 0x4 |
231 | #define bCCKTxStart 0x8 | 250 | #define bCCKTxStart 0x8 |
232 | #define bCRC32Debug 0x100 | 251 | #define bCRC32Debug 0x100 |
233 | #define bPMACLoopback 0x10 | 252 | #define bPMACLoopback 0x10 |
234 | #define bTxLSIG 0xffffff | 253 | #define bTxLSIG 0xffffff |
235 | #define bOFDMTxRate 0xf | 254 | #define bOFDMTxRate 0xf |
236 | #define bOFDMTxReserved 0x10 | 255 | #define bOFDMTxReserved 0x10 |
237 | #define bOFDMTxLength 0x1ffe0 | 256 | #define bOFDMTxLength 0x1ffe0 |
238 | #define bOFDMTxParity 0x20000 | 257 | #define bOFDMTxParity 0x20000 |
239 | #define bTxHTSIG1 0xffffff | 258 | #define bTxHTSIG1 0xffffff |
240 | #define bTxHTMCSRate 0x7f | 259 | #define bTxHTMCSRate 0x7f |
241 | #define bTxHTBW 0x80 | 260 | #define bTxHTBW 0x80 |
242 | #define bTxHTLength 0xffff00 | 261 | #define bTxHTLength 0xffff00 |
243 | #define bTxHTSIG2 0xffffff | 262 | #define bTxHTSIG2 0xffffff |
244 | #define bTxHTSmoothing 0x1 | 263 | #define bTxHTSmoothing 0x1 |
245 | #define bTxHTSounding 0x2 | 264 | #define bTxHTSounding 0x2 |
246 | #define bTxHTReserved 0x4 | 265 | #define bTxHTReserved 0x4 |
247 | #define bTxHTAggreation 0x8 | 266 | #define bTxHTAggreation 0x8 |
248 | #define bTxHTSTBC 0x30 | 267 | #define bTxHTSTBC 0x30 |
249 | #define bTxHTAdvanceCoding 0x40 | 268 | #define bTxHTAdvanceCoding 0x40 |
250 | #define bTxHTShortGI 0x80 | 269 | #define bTxHTShortGI 0x80 |
251 | #define bTxHTNumberHT_LTF 0x300 | 270 | #define bTxHTNumberHT_LTF 0x300 |
252 | #define bTxHTCRC8 0x3fc00 | 271 | #define bTxHTCRC8 0x3fc00 |
253 | #define bCounterReset 0x10000 | 272 | #define bCounterReset 0x10000 |
254 | #define bNumOfOFDMTx 0xffff | 273 | #define bNumOfOFDMTx 0xffff |
255 | #define bNumOfCCKTx 0xffff0000 | 274 | #define bNumOfCCKTx 0xffff0000 |
256 | #define bTxIdleInterval 0xffff | 275 | #define bTxIdleInterval 0xffff |
257 | #define bOFDMService 0xffff0000 | 276 | #define bOFDMService 0xffff0000 |
258 | #define bTxMACHeader 0xffffffff | 277 | #define bTxMACHeader 0xffffffff |
259 | #define bTxDataInit 0xff | 278 | #define bTxDataInit 0xff |
260 | #define bTxHTMode 0x100 | 279 | #define bTxHTMode 0x100 |
261 | #define bTxDataType 0x30000 | 280 | #define bTxDataType 0x30000 |
262 | #define bTxRandomSeed 0xffffffff | 281 | #define bTxRandomSeed 0xffffffff |
263 | #define bCCKTxPreamble 0x1 | 282 | #define bCCKTxPreamble 0x1 |
264 | #define bCCKTxSFD 0xffff0000 | 283 | #define bCCKTxSFD 0xffff0000 |
265 | #define bCCKTxSIG 0xff | 284 | #define bCCKTxSIG 0xff |
266 | #define bCCKTxService 0xff00 | 285 | #define bCCKTxService 0xff00 |
267 | #define bCCKLengthExt 0x8000 | 286 | #define bCCKLengthExt 0x8000 |
268 | #define bCCKTxLength 0xffff0000 | 287 | #define bCCKTxLength 0xffff0000 |
269 | #define bCCKTxCRC16 0xffff | 288 | #define bCCKTxCRC16 0xffff |
270 | #define bCCKTxStatus 0x1 | 289 | #define bCCKTxStatus 0x1 |
271 | #define bOFDMTxStatus 0x2 | 290 | #define bOFDMTxStatus 0x2 |
272 | 291 | ||
273 | //page-8 | 292 | /* Page 8 */ |
274 | #define bRFMOD 0x1 | 293 | #define bRFMOD 0x1 |
275 | #define bJapanMode 0x2 | 294 | #define bJapanMode 0x2 |
276 | #define bCCKTxSC 0x30 | 295 | #define bCCKTxSC 0x30 |
277 | #define bCCKEn 0x1000000 | 296 | #define bCCKEn 0x1000000 |
278 | #define bOFDMEn 0x2000000 | 297 | #define bOFDMEn 0x2000000 |
279 | #define bOFDMRxADCPhase 0x10000 | 298 | #define bOFDMRxADCPhase 0x10000 |
280 | #define bOFDMTxDACPhase 0x40000 | 299 | #define bOFDMTxDACPhase 0x40000 |
281 | #define bXATxAGC 0x3f | 300 | #define bXATxAGC 0x3f |
282 | #define bXBTxAGC 0xf00 | 301 | #define bXBTxAGC 0xf00 |
283 | #define bXCTxAGC 0xf000 | 302 | #define bXCTxAGC 0xf000 |
284 | #define bXDTxAGC 0xf0000 | 303 | #define bXDTxAGC 0xf0000 |
285 | #define bPAStart 0xf0000000 | 304 | #define bPAStart 0xf0000000 |
286 | #define bTRStart 0x00f00000 | 305 | #define bTRStart 0x00f00000 |
287 | #define bRFStart 0x0000f000 | 306 | #define bRFStart 0x0000f000 |
288 | #define bBBStart 0x000000f0 | 307 | #define bBBStart 0x000000f0 |
289 | #define bBBCCKStart 0x0000000f | 308 | #define bBBCCKStart 0x0000000f |
290 | #define bPAEnd 0xf //Reg0x814 | 309 | /* Reg)x814 */ |
291 | #define bTREnd 0x0f000000 | 310 | #define bPAEnd 0xf |
292 | #define bRFEnd 0x000f0000 | 311 | #define bTREnd 0x0f000000 |
293 | #define bCCAMask 0x000000f0 //T2R | 312 | #define bRFEnd 0x000f0000 |
294 | #define bR2RCCAMask 0x00000f00 | 313 | /* T2R */ |
295 | #define bHSSI_R2TDelay 0xf8000000 | 314 | #define bCCAMask 0x000000f0 |
296 | #define bHSSI_T2RDelay 0xf80000 | 315 | #define bR2RCCAMask 0x00000f00 |
297 | #define bContTxHSSI 0x400 //channel gain at continue Tx | 316 | #define bHSSI_R2TDelay 0xf8000000 |
298 | #define bIGFromCCK 0x200 | 317 | #define bHSSI_T2RDelay 0xf80000 |
299 | #define bAGCAddress 0x3f | 318 | /* Channel gain at continue TX. */ |
300 | #define bRxHPTx 0x7000 | 319 | #define bContTxHSSI 0x400 |
301 | #define bRxHPT2R 0x38000 | 320 | #define bIGFromCCK 0x200 |
302 | #define bRxHPCCKIni 0xc0000 | 321 | #define bAGCAddress 0x3f |
303 | #define bAGCTxCode 0xc00000 | 322 | #define bRxHPTx 0x7000 |
304 | #define bAGCRxCode 0x300000 | 323 | #define bRxHPT2R 0x38000 |
305 | #define b3WireDataLength 0x800 | 324 | #define bRxHPCCKIni 0xc0000 |
306 | #define b3WireAddressLength 0x400 | 325 | #define bAGCTxCode 0xc00000 |
307 | #define b3WireRFPowerDown 0x1 | 326 | #define bAGCRxCode 0x300000 |
308 | //#define bHWSISelect 0x8 | 327 | #define b3WireDataLength 0x800 |
309 | #define b5GPAPEPolarity 0x40000000 | 328 | #define b3WireAddressLength 0x400 |
310 | #define b2GPAPEPolarity 0x80000000 | 329 | #define b3WireRFPowerDown 0x1 |
311 | #define bRFSW_TxDefaultAnt 0x3 | 330 | /*#define bHWSISelect 0x8 */ |
312 | #define bRFSW_TxOptionAnt 0x30 | 331 | #define b5GPAPEPolarity 0x40000000 |
313 | #define bRFSW_RxDefaultAnt 0x300 | 332 | #define b2GPAPEPolarity 0x80000000 |
314 | #define bRFSW_RxOptionAnt 0x3000 | 333 | #define bRFSW_TxDefaultAnt 0x3 |
315 | #define bRFSI_3WireData 0x1 | 334 | #define bRFSW_TxOptionAnt 0x30 |
316 | #define bRFSI_3WireClock 0x2 | 335 | #define bRFSW_RxDefaultAnt 0x300 |
317 | #define bRFSI_3WireLoad 0x4 | 336 | #define bRFSW_RxOptionAnt 0x3000 |
318 | #define bRFSI_3WireRW 0x8 | 337 | #define bRFSI_3WireData 0x1 |
319 | #define bRFSI_3Wire 0xf //3-wire total control | 338 | #define bRFSI_3WireClock 0x2 |
320 | #define bRFSI_RFENV 0x10 | 339 | #define bRFSI_3WireLoad 0x4 |
321 | #define bRFSI_TRSW 0x20 | 340 | #define bRFSI_3WireRW 0x8 |
322 | #define bRFSI_TRSWB 0x40 | 341 | /* 3-wire total control */ |
323 | #define bRFSI_ANTSW 0x100 | 342 | #define bRFSI_3Wire 0xf |
324 | #define bRFSI_ANTSWB 0x200 | 343 | #define bRFSI_RFENV 0x10 |
325 | #define bRFSI_PAPE 0x400 | 344 | #define bRFSI_TRSW 0x20 |
326 | #define bRFSI_PAPE5G 0x800 | 345 | #define bRFSI_TRSWB 0x40 |
327 | #define bBandSelect 0x1 | 346 | #define bRFSI_ANTSW 0x100 |
328 | #define bHTSIG2_GI 0x80 | 347 | #define bRFSI_ANTSWB 0x200 |
329 | #define bHTSIG2_Smoothing 0x01 | 348 | #define bRFSI_PAPE 0x400 |
330 | #define bHTSIG2_Sounding 0x02 | 349 | #define bRFSI_PAPE5G 0x800 |
331 | #define bHTSIG2_Aggreaton 0x08 | 350 | #define bBandSelect 0x1 |
332 | #define bHTSIG2_STBC 0x30 | 351 | #define bHTSIG2_GI 0x80 |
333 | #define bHTSIG2_AdvCoding 0x40 | 352 | #define bHTSIG2_Smoothing 0x01 |
353 | #define bHTSIG2_Sounding 0x02 | ||
354 | #define bHTSIG2_Aggreaton 0x08 | ||
355 | #define bHTSIG2_STBC 0x30 | ||
356 | #define bHTSIG2_AdvCoding 0x40 | ||
334 | #define bHTSIG2_NumOfHTLTF 0x300 | 357 | #define bHTSIG2_NumOfHTLTF 0x300 |
335 | #define bHTSIG2_CRC8 0x3fc | 358 | #define bHTSIG2_CRC8 0x3fc |
336 | #define bHTSIG1_MCS 0x7f | 359 | #define bHTSIG1_MCS 0x7f |
337 | #define bHTSIG1_BandWidth 0x80 | 360 | #define bHTSIG1_BandWidth 0x80 |
338 | #define bHTSIG1_HTLength 0xffff | 361 | #define bHTSIG1_HTLength 0xffff |
339 | #define bLSIG_Rate 0xf | 362 | #define bLSIG_Rate 0xf |
340 | #define bLSIG_Reserved 0x10 | 363 | #define bLSIG_Reserved 0x10 |
341 | #define bLSIG_Length 0x1fffe | 364 | #define bLSIG_Length 0x1fffe |
342 | #define bLSIG_Parity 0x20 | 365 | #define bLSIG_Parity 0x20 |
343 | #define bCCKRxPhase 0x4 | 366 | #define bCCKRxPhase 0x4 |
344 | #define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address | 367 | /* LSSI "read" address */ |
345 | #define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal | 368 | #define bLSSIReadAddress 0x3f000000 |
346 | #define bLSSIReadBackData 0xfff | 369 | /* LSSI "read" edge signal */ |
347 | #define bLSSIReadOKFlag 0x1000 | 370 | #define bLSSIReadEdge 0x80000000 |
348 | #define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz | 371 | #define bLSSIReadBackData 0xfff |
349 | 372 | #define bLSSIReadOKFlag 0x1000 | |
350 | #define bRegulator0Standby 0x1 | 373 | /* 0: 44 MHz, 1: 88MHz */ |
351 | #define bRegulatorPLLStandby 0x2 | 374 | #define bCCKSampleRate 0x8 |
352 | #define bRegulator1Standby 0x4 | 375 | |
353 | #define bPLLPowerUp 0x8 | 376 | #define bRegulator0Standby 0x1 |
354 | #define bDPLLPowerUp 0x10 | 377 | #define bRegulatorPLLStandby 0x2 |
355 | #define bDA10PowerUp 0x20 | 378 | #define bRegulator1Standby 0x4 |
356 | #define bAD7PowerUp 0x200 | 379 | #define bPLLPowerUp 0x8 |
357 | #define bDA6PowerUp 0x2000 | 380 | #define bDPLLPowerUp 0x10 |
358 | #define bXtalPowerUp 0x4000 | 381 | #define bDA10PowerUp 0x20 |
359 | #define b40MDClkPowerUP 0x8000 | 382 | #define bAD7PowerUp 0x200 |
360 | #define bDA6DebugMode 0x20000 | 383 | #define bDA6PowerUp 0x2000 |
361 | #define bDA6Swing 0x380000 | 384 | #define bXtalPowerUp 0x4000 |
362 | #define bADClkPhase 0x4000000 | 385 | #define b40MDClkPowerUP 0x8000 |
363 | #define b80MClkDelay 0x18000000 | 386 | #define bDA6DebugMode 0x20000 |
364 | #define bAFEWatchDogEnable 0x20000000 | 387 | #define bDA6Swing 0x380000 |
365 | #define bXtalCap 0x0f000000 | 388 | #define bADClkPhase 0x4000000 |
366 | #define bXtalCap01 0xc0000000 | 389 | #define b80MClkDelay 0x18000000 |
367 | #define bXtalCap23 0x3 | 390 | #define bAFEWatchDogEnable 0x20000000 |
368 | #define bXtalCap92x 0x0f000000 | 391 | #define bXtalCap 0x0f000000 |
369 | #define bIntDifClkEnable 0x400 | 392 | #define bXtalCap01 0xc0000000 |
370 | #define bExtSigClkEnable 0x800 | 393 | #define bXtalCap23 0x3 |
394 | #define bXtalCap92x 0x0f000000 | ||
395 | #define bIntDifClkEnable 0x400 | ||
396 | #define bExtSigClkEnable 0x800 | ||
371 | #define bBandgapMbiasPowerUp 0x10000 | 397 | #define bBandgapMbiasPowerUp 0x10000 |
372 | #define bAD11SHGain 0xc0000 | 398 | #define bAD11SHGain 0xc0000 |
373 | #define bAD11InputRange 0x700000 | 399 | #define bAD11InputRange 0x700000 |
374 | #define bAD11OPCurrent 0x3800000 | 400 | #define bAD11OPCurrent 0x3800000 |
375 | #define bIPathLoopback 0x4000000 | 401 | #define bIPathLoopback 0x4000000 |
376 | #define bQPathLoopback 0x8000000 | 402 | #define bQPathLoopback 0x8000000 |
377 | #define bAFELoopback 0x10000000 | 403 | #define bAFELoopback 0x10000000 |
378 | #define bDA10Swing 0x7e0 | 404 | #define bDA10Swing 0x7e0 |
379 | #define bDA10Reverse 0x800 | 405 | #define bDA10Reverse 0x800 |
380 | #define bDAClkSource 0x1000 | 406 | #define bDAClkSource 0x1000 |
381 | #define bAD7InputRange 0x6000 | 407 | #define bAD7InputRange 0x6000 |
382 | #define bAD7Gain 0x38000 | 408 | #define bAD7Gain 0x38000 |
383 | #define bAD7OutputCMMode 0x40000 | 409 | #define bAD7OutputCMMode 0x40000 |
384 | #define bAD7InputCMMode 0x380000 | 410 | #define bAD7InputCMMode 0x380000 |
385 | #define bAD7Current 0xc00000 | 411 | #define bAD7Current 0xc00000 |
386 | #define bRegulatorAdjust 0x7000000 | 412 | #define bRegulatorAdjust 0x7000000 |
387 | #define bAD11PowerUpAtTx 0x1 | 413 | #define bAD11PowerUpAtTx 0x1 |
388 | #define bDA10PSAtTx 0x10 | 414 | #define bDA10PSAtTx 0x10 |
389 | #define bAD11PowerUpAtRx 0x100 | 415 | #define bAD11PowerUpAtRx 0x100 |
390 | #define bDA10PSAtRx 0x1000 | 416 | #define bDA10PSAtRx 0x1000 |
391 | 417 | ||
392 | #define bCCKRxAGCFormat 0x200 | 418 | #define bCCKRxAGCFormat 0x200 |
393 | 419 | ||
394 | #define bPSDFFTSamplepPoint 0xc000 | 420 | #define bPSDFFTSamplepPoint 0xc000 |
395 | #define bPSDAverageNum 0x3000 | 421 | #define bPSDAverageNum 0x3000 |
396 | #define bIQPathControl 0xc00 | 422 | #define bIQPathControl 0xc00 |
397 | #define bPSDFreq 0x3ff | 423 | #define bPSDFreq 0x3ff |
398 | #define bPSDAntennaPath 0x30 | 424 | #define bPSDAntennaPath 0x30 |
399 | #define bPSDIQSwitch 0x40 | 425 | #define bPSDIQSwitch 0x40 |
400 | #define bPSDRxTrigger 0x400000 | 426 | #define bPSDRxTrigger 0x400000 |
401 | #define bPSDTxTrigger 0x80000000 | 427 | #define bPSDTxTrigger 0x80000000 |
402 | #define bPSDSineToneScale 0x7f000000 | 428 | #define bPSDSineToneScale 0x7f000000 |
403 | #define bPSDReport 0xffff | 429 | #define bPSDReport 0xffff |
404 | 430 | ||
405 | //page-9 | 431 | /* Page 8 */ |
406 | #define bOFDMTxSC 0x30000000 | 432 | #define bOFDMTxSC 0x30000000 |
407 | #define bCCKTxOn 0x1 | 433 | #define bCCKTxOn 0x1 |
408 | #define bOFDMTxOn 0x2 | 434 | #define bOFDMTxOn 0x2 |
409 | #define bDebugPage 0xfff //reset debug page and also HWord, LWord | 435 | /* Reset debug page and also HWord, LWord */ |
410 | #define bDebugItem 0xff //reset debug page and LWord | 436 | #define bDebugPage 0xfff |
411 | #define bAntL 0x10 | 437 | /* Reset debug page and LWord */ |
412 | #define bAntNonHT 0x100 | 438 | #define bDebugItem 0xff |
413 | #define bAntHT1 0x1000 | 439 | #define bAntL 0x10 |
414 | #define bAntHT2 0x10000 | 440 | #define bAntNonHT 0x100 |
415 | #define bAntHT1S1 0x100000 | 441 | #define bAntHT1 0x1000 |
416 | #define bAntNonHTS1 0x1000000 | 442 | #define bAntHT2 0x10000 |
417 | 443 | #define bAntHT1S1 0x100000 | |
418 | //page-a | 444 | #define bAntNonHTS1 0x1000000 |
419 | #define bCCKBBMode 0x3 | 445 | |
420 | #define bCCKTxPowerSaving 0x80 | 446 | /* Page a */ |
421 | #define bCCKRxPowerSaving 0x40 | 447 | #define bCCKBBMode 0x3 |
422 | #define bCCKSideBand 0x10 | 448 | #define bCCKTxPowerSaving 0x80 |
423 | #define bCCKScramble 0x8 | 449 | #define bCCKRxPowerSaving 0x40 |
424 | #define bCCKAntDiversity 0x8000 | 450 | #define bCCKSideBand 0x10 |
451 | #define bCCKScramble 0x8 | ||
452 | #define bCCKAntDiversity 0x8000 | ||
425 | #define bCCKCarrierRecovery 0x4000 | 453 | #define bCCKCarrierRecovery 0x4000 |
426 | #define bCCKTxRate 0x3000 | 454 | #define bCCKTxRate 0x3000 |
427 | #define bCCKDCCancel 0x0800 | 455 | #define bCCKDCCancel 0x0800 |
428 | #define bCCKISICancel 0x0400 | 456 | #define bCCKISICancel 0x0400 |
429 | #define bCCKMatchFilter 0x0200 | 457 | #define bCCKMatchFilter 0x0200 |
430 | #define bCCKEqualizer 0x0100 | 458 | #define bCCKEqualizer 0x0100 |
431 | #define bCCKPreambleDetect 0x800000 | 459 | #define bCCKPreambleDetect 0x800000 |
432 | #define bCCKFastFalseCCA 0x400000 | 460 | #define bCCKFastFalseCCA 0x400000 |
433 | #define bCCKChEstStart 0x300000 | 461 | #define bCCKChEstStart 0x300000 |
434 | #define bCCKCCACount 0x080000 | 462 | #define bCCKCCACount 0x080000 |
435 | #define bCCKcs_lim 0x070000 | 463 | #define bCCKcs_lim 0x070000 |
436 | #define bCCKBistMode 0x80000000 | 464 | #define bCCKBistMode 0x80000000 |
437 | #define bCCKCCAMask 0x40000000 | 465 | #define bCCKCCAMask 0x40000000 |
438 | #define bCCKTxDACPhase 0x4 | 466 | #define bCCKTxDACPhase 0x4 |
439 | #define bCCKRxADCPhase 0x20000000 //r_rx_clk | 467 | /* r_rx_clk */ |
468 | #define bCCKRxADCPhase 0x20000000 | ||
440 | #define bCCKr_cp_mode0 0x0100 | 469 | #define bCCKr_cp_mode0 0x0100 |
441 | #define bCCKTxDCOffset 0xf0 | 470 | #define bCCKTxDCOffset 0xf0 |
442 | #define bCCKRxDCOffset 0xf | 471 | #define bCCKRxDCOffset 0xf |
443 | #define bCCKCCAMode 0xc000 | 472 | #define bCCKCCAMode 0xc000 |
444 | #define bCCKFalseCS_lim 0x3f00 | 473 | #define bCCKFalseCS_lim 0x3f00 |
445 | #define bCCKCS_ratio 0xc00000 | 474 | #define bCCKCS_ratio 0xc00000 |
446 | #define bCCKCorgBit_sel 0x300000 | 475 | #define bCCKCorgBit_sel 0x300000 |
447 | #define bCCKPD_lim 0x0f0000 | 476 | #define bCCKPD_lim 0x0f0000 |
448 | #define bCCKNewCCA 0x80000000 | 477 | #define bCCKNewCCA 0x80000000 |
449 | #define bCCKRxHPofIG 0x8000 | 478 | #define bCCKRxHPofIG 0x8000 |
450 | #define bCCKRxIG 0x7f00 | 479 | #define bCCKRxIG 0x7f00 |
451 | #define bCCKLNAPolarity 0x800000 | 480 | #define bCCKLNAPolarity 0x800000 |
452 | #define bCCKRx1stGain 0x7f0000 | 481 | #define bCCKRx1stGain 0x7f0000 |
453 | #define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity | 482 | /* CCK Rx Initial gain polarity */ |
454 | #define bCCKRxAGCSatLevel 0x1f000000 | 483 | #define bCCKRFExtend 0x20000000 |
455 | #define bCCKRxAGCSatCount 0xe0 | 484 | #define bCCKRxAGCSatLevel 0x1f000000 |
456 | #define bCCKRxRFSettle 0x1f //AGCsamp_dly | 485 | #define bCCKRxAGCSatCount 0xe0 |
457 | #define bCCKFixedRxAGC 0x8000 | 486 | /* AGCSAmp_dly */ |
458 | //#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 | 487 | #define bCCKRxRFSettle 0x1f |
459 | #define bCCKAntennaPolarity 0x2000 | 488 | #define bCCKFixedRxAGC 0x8000 |
460 | #define bCCKTxFilterType 0x0c00 | 489 | /*#define bCCKRxAGCFormat 0x4000 remove to HSSI register 0x824 */ |
490 | #define bCCKAntennaPolarity 0x2000 | ||
491 | #define bCCKTxFilterType 0x0c00 | ||
461 | #define bCCKRxAGCReportType 0x0300 | 492 | #define bCCKRxAGCReportType 0x0300 |
462 | #define bCCKRxDAGCEn 0x80000000 | 493 | #define bCCKRxDAGCEn 0x80000000 |
463 | #define bCCKRxDAGCPeriod 0x20000000 | 494 | #define bCCKRxDAGCPeriod 0x20000000 |
464 | #define bCCKRxDAGCSatLevel 0x1f000000 | 495 | #define bCCKRxDAGCSatLevel 0x1f000000 |
465 | #define bCCKTimingRecovery 0x800000 | 496 | #define bCCKTimingRecovery 0x800000 |
466 | #define bCCKTxC0 0x3f0000 | 497 | #define bCCKTxC0 0x3f0000 |
467 | #define bCCKTxC1 0x3f000000 | 498 | #define bCCKTxC1 0x3f000000 |
468 | #define bCCKTxC2 0x3f | 499 | #define bCCKTxC2 0x3f |
469 | #define bCCKTxC3 0x3f00 | 500 | #define bCCKTxC3 0x3f00 |
470 | #define bCCKTxC4 0x3f0000 | 501 | #define bCCKTxC4 0x3f0000 |
471 | #define bCCKTxC5 0x3f000000 | 502 | #define bCCKTxC5 0x3f000000 |
472 | #define bCCKTxC6 0x3f | 503 | #define bCCKTxC6 0x3f |
473 | #define bCCKTxC7 0x3f00 | 504 | #define bCCKTxC7 0x3f00 |
474 | #define bCCKDebugPort 0xff0000 | 505 | #define bCCKDebugPort 0xff0000 |
475 | #define bCCKDACDebug 0x0f000000 | 506 | #define bCCKDACDebug 0x0f000000 |
476 | #define bCCKFalseAlarmEnable 0x8000 | 507 | #define bCCKFalseAlarmEnable 0x8000 |
477 | #define bCCKFalseAlarmRead 0x4000 | 508 | #define bCCKFalseAlarmRead 0x4000 |
478 | #define bCCKTRSSI 0x7f | 509 | #define bCCKTRSSI 0x7f |
479 | #define bCCKRxAGCReport 0xfe | 510 | #define bCCKRxAGCReport 0xfe |
480 | #define bCCKRxReport_AntSel 0x80000000 | 511 | #define bCCKRxReport_AntSel 0x80000000 |
481 | #define bCCKRxReport_MFOff 0x40000000 | 512 | #define bCCKRxReport_MFOff 0x40000000 |
482 | #define bCCKRxRxReport_SQLoss 0x20000000 | 513 | #define bCCKRxRxReport_SQLoss 0x20000000 |
483 | #define bCCKRxReport_Pktloss 0x10000000 | 514 | #define bCCKRxReport_Pktloss 0x10000000 |
484 | #define bCCKRxReport_Lockedbit 0x08000000 | 515 | #define bCCKRxReport_Lockedbit 0x08000000 |
485 | #define bCCKRxReport_RateError 0x04000000 | 516 | #define bCCKRxReport_RateError 0x04000000 |
486 | #define bCCKRxReport_RxRate 0x03000000 | 517 | #define bCCKRxReport_RxRate 0x03000000 |
487 | #define bCCKRxFACounterLower 0xff | 518 | #define bCCKRxFACounterLower 0xff |
488 | #define bCCKRxFACounterUpper 0xff000000 | 519 | #define bCCKRxFACounterUpper 0xff000000 |
489 | #define bCCKRxHPAGCStart 0xe000 | 520 | #define bCCKRxHPAGCStart 0xe000 |
490 | #define bCCKRxHPAGCFinal 0x1c00 | 521 | #define bCCKRxHPAGCFinal 0x1c00 |
491 | 522 | ||
492 | #define bCCKRxFalseAlarmEnable 0x8000 | 523 | #define bCCKRxFalseAlarmEnable 0x8000 |
493 | #define bCCKFACounterFreeze 0x4000 | 524 | #define bCCKFACounterFreeze 0x4000 |
494 | 525 | ||
495 | #define bCCKTxPathSel 0x10000000 | 526 | #define bCCKTxPathSel 0x10000000 |
496 | #define bCCKDefaultRxPath 0xc000000 | 527 | #define bCCKDefaultRxPath 0xc000000 |
497 | #define bCCKOptionRxPath 0x3000000 | 528 | #define bCCKOptionRxPath 0x3000000 |
498 | 529 | ||
499 | //page c | 530 | /* Page c */ |
500 | #define bNumOfSTF 0x3 | 531 | #define bNumOfSTF 0x3 |
501 | #define bShift_L 0xc0 | 532 | #define bShift_L 0xc0 |
502 | #define bGI_TH 0xc | 533 | #define bGI_TH 0xc |
503 | #define bRxPathA 0x1 | 534 | #define bRxPathA 0x1 |
504 | #define bRxPathB 0x2 | 535 | #define bRxPathB 0x2 |
505 | #define bRxPathC 0x4 | 536 | #define bRxPathC 0x4 |
506 | #define bRxPathD 0x8 | 537 | #define bRxPathD 0x8 |
507 | #define bTxPathA 0x1 | 538 | #define bTxPathA 0x1 |
508 | #define bTxPathB 0x2 | 539 | #define bTxPathB 0x2 |
509 | #define bTxPathC 0x4 | 540 | #define bTxPathC 0x4 |
510 | #define bTxPathD 0x8 | 541 | #define bTxPathD 0x8 |
511 | #define bTRSSIFreq 0x200 | 542 | #define bTRSSIFreq 0x200 |
512 | #define bADCBackoff 0x3000 | 543 | #define bADCBackoff 0x3000 |
513 | #define bDFIRBackoff 0xc000 | 544 | #define bDFIRBackoff 0xc000 |
514 | #define bTRSSILatchPhase 0x10000 | 545 | #define bTRSSILatchPhase 0x10000 |
515 | #define bRxIDCOffset 0xff | 546 | #define bRxIDCOffset 0xff |
516 | #define bRxQDCOffset 0xff00 | 547 | #define bRxQDCOffset 0xff00 |
517 | #define bRxDFIRMode 0x1800000 | 548 | #define bRxDFIRMode 0x1800000 |
518 | #define bRxDCNFType 0xe000000 | 549 | #define bRxDCNFType 0xe000000 |
519 | #define bRXIQImb_A 0x3ff | 550 | #define bRXIQImb_A 0x3ff |
520 | #define bRXIQImb_B 0xfc00 | 551 | #define bRXIQImb_B 0xfc00 |
521 | #define bRXIQImb_C 0x3f0000 | 552 | #define bRXIQImb_C 0x3f0000 |
522 | #define bRXIQImb_D 0xffc00000 | 553 | #define bRXIQImb_D 0xffc00000 |
523 | #define bDC_dc_Notch 0x60000 | 554 | #define bDC_dc_Notch 0x60000 |
524 | #define bRxNBINotch 0x1f000000 | 555 | #define bRxNBINotch 0x1f000000 |
525 | #define bPD_TH 0xf | 556 | #define bPD_TH 0xf |
526 | #define bPD_TH_Opt2 0xc000 | 557 | #define bPD_TH_Opt2 0xc000 |
527 | #define bPWED_TH 0x700 | 558 | #define bPWED_TH 0x700 |
528 | #define bIfMF_Win_L 0x800 | 559 | #define bIfMF_Win_L 0x800 |
529 | #define bPD_Option 0x1000 | 560 | #define bPD_Option 0x1000 |
530 | #define bMF_Win_L 0xe000 | 561 | #define bMF_Win_L 0xe000 |
531 | #define bBW_Search_L 0x30000 | 562 | #define bBW_Search_L 0x30000 |
532 | #define bwin_enh_L 0xc0000 | 563 | #define bwin_enh_L 0xc0000 |
533 | #define bBW_TH 0x700000 | 564 | #define bBW_TH 0x700000 |
534 | #define bED_TH2 0x3800000 | 565 | #define bED_TH2 0x3800000 |
535 | #define bBW_option 0x4000000 | 566 | #define bBW_option 0x4000000 |
536 | #define bRatio_TH 0x18000000 | 567 | #define bRatio_TH 0x18000000 |
537 | #define bWindow_L 0xe0000000 | 568 | #define bWindow_L 0xe0000000 |
538 | #define bSBD_Option 0x1 | 569 | #define bSBD_Option 0x1 |
539 | #define bFrame_TH 0x1c | 570 | #define bFrame_TH 0x1c |
540 | #define bFS_Option 0x60 | 571 | #define bFS_Option 0x60 |
541 | #define bDC_Slope_check 0x80 | 572 | #define bDC_Slope_check 0x80 |
542 | #define bFGuard_Counter_DC_L 0xe00 | 573 | #define bFGuard_Counter_DC_L 0xe00 |
543 | #define bFrame_Weight_Short 0x7000 | 574 | #define bFrame_Weight_Short 0x7000 |
544 | #define bSub_Tune 0xe00000 | 575 | #define bSub_Tune 0xe00000 |
545 | #define bFrame_DC_Length 0xe000000 | 576 | #define bFrame_DC_Length 0xe000000 |
546 | #define bSBD_start_offset 0x30000000 | 577 | #define bSBD_start_offset 0x30000000 |
547 | #define bFrame_TH_2 0x7 | 578 | #define bFrame_TH_2 0x7 |
548 | #define bFrame_GI2_TH 0x38 | 579 | #define bFrame_GI2_TH 0x38 |
549 | #define bGI2_Sync_en 0x40 | 580 | #define bGI2_Sync_en 0x40 |
550 | #define bSarch_Short_Early 0x300 | 581 | #define bSarch_Short_Early 0x300 |
551 | #define bSarch_Short_Late 0xc00 | 582 | #define bSarch_Short_Late 0xc00 |
552 | #define bSarch_GI2_Late 0x70000 | 583 | #define bSarch_GI2_Late 0x70000 |
553 | #define bCFOAntSum 0x1 | 584 | #define bCFOAntSum 0x1 |
554 | #define bCFOAcc 0x2 | 585 | #define bCFOAcc 0x2 |
555 | #define bCFOStartOffset 0xc | 586 | #define bCFOStartOffset 0xc |
556 | #define bCFOLookBack 0x70 | 587 | #define bCFOLookBack 0x70 |
557 | #define bCFOSumWeight 0x80 | 588 | #define bCFOSumWeight 0x80 |
558 | #define bDAGCEnable 0x10000 | 589 | #define bDAGCEnable 0x10000 |
559 | #define bTXIQImb_A 0x3ff | 590 | #define bTXIQImb_A 0x3ff |
560 | #define bTXIQImb_B 0xfc00 | 591 | #define bTXIQImb_B 0xfc00 |
561 | #define bTXIQImb_C 0x3f0000 | 592 | #define bTXIQImb_C 0x3f0000 |
562 | #define bTXIQImb_D 0xffc00000 | 593 | #define bTXIQImb_D 0xffc00000 |
563 | #define bTxIDCOffset 0xff | 594 | #define bTxIDCOffset 0xff |
564 | #define bTxQDCOffset 0xff00 | 595 | #define bTxQDCOffset 0xff00 |
565 | #define bTxDFIRMode 0x10000 | 596 | #define bTxDFIRMode 0x10000 |
566 | #define bTxPesudoNoiseOn 0x4000000 | 597 | #define bTxPesudoNoiseOn 0x4000000 |
567 | #define bTxPesudoNoise_A 0xff | 598 | #define bTxPesudoNoise_A 0xff |
568 | #define bTxPesudoNoise_B 0xff00 | 599 | #define bTxPesudoNoise_B 0xff00 |
569 | #define bTxPesudoNoise_C 0xff0000 | 600 | #define bTxPesudoNoise_C 0xff0000 |
570 | #define bTxPesudoNoise_D 0xff000000 | 601 | #define bTxPesudoNoise_D 0xff000000 |
571 | #define bCCADropOption 0x20000 | 602 | #define bCCADropOption 0x20000 |
572 | #define bCCADropThres 0xfff00000 | 603 | #define bCCADropThres 0xfff00000 |
573 | #define bEDCCA_H 0xf | 604 | #define bEDCCA_H 0xf |
574 | #define bEDCCA_L 0xf0 | 605 | #define bEDCCA_L 0xf0 |
575 | #define bLambda_ED 0x300 | 606 | #define bLambda_ED 0x300 |
576 | #define bRxInitialGain 0x7f | 607 | #define bRxInitialGain 0x7f |
577 | #define bRxAntDivEn 0x80 | 608 | #define bRxAntDivEn 0x80 |
578 | #define bRxAGCAddressForLNA 0x7f00 | 609 | #define bRxAGCAddressForLNA 0x7f00 |
579 | #define bRxHighPowerFlow 0x8000 | 610 | #define bRxHighPowerFlow 0x8000 |
580 | #define bRxAGCFreezeThres 0xc0000 | 611 | #define bRxAGCFreezeThres 0xc0000 |
581 | #define bRxFreezeStep_AGC1 0x300000 | 612 | #define bRxFreezeStep_AGC1 0x300000 |
582 | #define bRxFreezeStep_AGC2 0xc00000 | 613 | #define bRxFreezeStep_AGC2 0xc00000 |
583 | #define bRxFreezeStep_AGC3 0x3000000 | 614 | #define bRxFreezeStep_AGC3 0x3000000 |
584 | #define bRxFreezeStep_AGC0 0xc000000 | 615 | #define bRxFreezeStep_AGC0 0xc000000 |
585 | #define bRxRssi_Cmp_En 0x10000000 | 616 | #define bRxRssi_Cmp_En 0x10000000 |
586 | #define bRxQuickAGCEn 0x20000000 | 617 | #define bRxQuickAGCEn 0x20000000 |
587 | #define bRxAGCFreezeThresMode 0x40000000 | 618 | #define bRxAGCFreezeThresMode 0x40000000 |
588 | #define bRxOverFlowCheckType 0x80000000 | 619 | #define bRxOverFlowCheckType 0x80000000 |
589 | #define bRxAGCShift 0x7f | 620 | #define bRxAGCShift 0x7f |
590 | #define bTRSW_Tri_Only 0x80 | 621 | #define bTRSW_Tri_Only 0x80 |
591 | #define bPowerThres 0x300 | 622 | #define bPowerThres 0x300 |
592 | #define bRxAGCEn 0x1 | 623 | #define bRxAGCEn 0x1 |
593 | #define bRxAGCTogetherEn 0x2 | 624 | #define bRxAGCTogetherEn 0x2 |
594 | #define bRxAGCMin 0x4 | 625 | #define bRxAGCMin 0x4 |
595 | #define bRxHP_Ini 0x7 | 626 | #define bRxHP_Ini 0x7 |
596 | #define bRxHP_TRLNA 0x70 | 627 | #define bRxHP_TRLNA 0x70 |
597 | #define bRxHP_RSSI 0x700 | 628 | #define bRxHP_RSSI 0x700 |
598 | #define bRxHP_BBP1 0x7000 | 629 | #define bRxHP_BBP1 0x7000 |
599 | #define bRxHP_BBP2 0x70000 | 630 | #define bRxHP_BBP2 0x70000 |
600 | #define bRxHP_BBP3 0x700000 | 631 | #define bRxHP_BBP3 0x700000 |
601 | #define bRSSI_H 0x7f0000 //the threshold for high power | 632 | /* The threshold for high power */ |
602 | #define bRSSI_Gen 0x7f000000 //the threshold for ant diversity | 633 | #define bRSSI_H 0x7f0000 |
603 | #define bRxSettle_TRSW 0x7 | 634 | /* The threshold for ant diversity */ |
604 | #define bRxSettle_LNA 0x38 | 635 | #define bRSSI_Gen 0x7f000000 |
605 | #define bRxSettle_RSSI 0x1c0 | 636 | #define bRxSettle_TRSW 0x7 |
606 | #define bRxSettle_BBP 0xe00 | 637 | #define bRxSettle_LNA 0x38 |
607 | #define bRxSettle_RxHP 0x7000 | 638 | #define bRxSettle_RSSI 0x1c0 |
608 | #define bRxSettle_AntSW_RSSI 0x38000 | 639 | #define bRxSettle_BBP 0xe00 |
609 | #define bRxSettle_AntSW 0xc0000 | 640 | #define bRxSettle_RxHP 0x7000 |
610 | #define bRxProcessTime_DAGC 0x300000 | 641 | #define bRxSettle_AntSW_RSSI 0x38000 |
611 | #define bRxSettle_HSSI 0x400000 | 642 | #define bRxSettle_AntSW 0xc0000 |
612 | #define bRxProcessTime_BBPPW 0x800000 | 643 | #define bRxProcessTime_DAGC 0x300000 |
613 | #define bRxAntennaPowerShift 0x3000000 | 644 | #define bRxSettle_HSSI 0x400000 |
614 | #define bRSSITableSelect 0xc000000 | 645 | #define bRxProcessTime_BBPPW 0x800000 |
615 | #define bRxHP_Final 0x7000000 | 646 | #define bRxAntennaPowerShift 0x3000000 |
616 | #define bRxHTSettle_BBP 0x7 | 647 | #define bRSSITableSelect 0xc000000 |
617 | #define bRxHTSettle_HSSI 0x8 | 648 | #define bRxHP_Final 0x7000000 |
618 | #define bRxHTSettle_RxHP 0x70 | 649 | #define bRxHTSettle_BBP 0x7 |
619 | #define bRxHTSettle_BBPPW 0x80 | 650 | #define bRxHTSettle_HSSI 0x8 |
620 | #define bRxHTSettle_Idle 0x300 | 651 | #define bRxHTSettle_RxHP 0x70 |
621 | #define bRxHTSettle_Reserved 0x1c00 | 652 | #define bRxHTSettle_BBPPW 0x80 |
622 | #define bRxHTRxHPEn 0x8000 | 653 | #define bRxHTSettle_Idle 0x300 |
623 | #define bRxHTAGCFreezeThres 0x30000 | 654 | #define bRxHTSettle_Reserved 0x1c00 |
624 | #define bRxHTAGCTogetherEn 0x40000 | 655 | #define bRxHTRxHPEn 0x8000 |
625 | #define bRxHTAGCMin 0x80000 | 656 | #define bRxHTAGCFreezeThres 0x30000 |
626 | #define bRxHTAGCEn 0x100000 | 657 | #define bRxHTAGCTogetherEn 0x40000 |
627 | #define bRxHTDAGCEn 0x200000 | 658 | #define bRxHTAGCMin 0x80000 |
628 | #define bRxHTRxHP_BBP 0x1c00000 | 659 | #define bRxHTAGCEn 0x100000 |
629 | #define bRxHTRxHP_Final 0xe0000000 | 660 | #define bRxHTDAGCEn 0x200000 |
630 | #define bRxPWRatioTH 0x3 | 661 | #define bRxHTRxHP_BBP 0x1c00000 |
631 | #define bRxPWRatioEn 0x4 | 662 | #define bRxHTRxHP_Final 0xe0000000 |
632 | #define bRxMFHold 0x3800 | 663 | #define bRxPWRatioTH 0x3 |
633 | #define bRxPD_Delay_TH1 0x38 | 664 | #define bRxPWRatioEn 0x4 |
634 | #define bRxPD_Delay_TH2 0x1c0 | 665 | #define bRxMFHold 0x3800 |
635 | #define bRxPD_DC_COUNT_MAX 0x600 | 666 | #define bRxPD_Delay_TH1 0x38 |
636 | //#define bRxMF_Hold 0x3800 | 667 | #define bRxPD_Delay_TH2 0x1c0 |
668 | #define bRxPD_DC_COUNT_MAX 0x600 | ||
669 | /*#define bRxMF_Hold 0x3800*/ | ||
637 | #define bRxPD_Delay_TH 0x8000 | 670 | #define bRxPD_Delay_TH 0x8000 |
638 | #define bRxProcess_Delay 0xf0000 | 671 | #define bRxProcess_Delay 0xf0000 |
639 | #define bRxSearchrange_GI2_Early 0x700000 | 672 | #define bRxSearchrange_GI2_Early 0x700000 |
@@ -659,7 +692,7 @@ | |||
659 | 692 | ||
660 | #define bExtLNAGain 0x7c00 | 693 | #define bExtLNAGain 0x7c00 |
661 | 694 | ||
662 | //page d | 695 | /* Page d */ |
663 | #define bSTBCEn 0x4 | 696 | #define bSTBCEn 0x4 |
664 | #define bAntennaMapping 0x10 | 697 | #define bAntennaMapping 0x10 |
665 | #define bNss 0x20 | 698 | #define bNss 0x20 |
@@ -669,12 +702,12 @@ | |||
669 | #define bOFDMContinueTx 0x10000000 | 702 | #define bOFDMContinueTx 0x10000000 |
670 | #define bOFDMSingleCarrier 0x20000000 | 703 | #define bOFDMSingleCarrier 0x20000000 |
671 | #define bOFDMSingleTone 0x40000000 | 704 | #define bOFDMSingleTone 0x40000000 |
672 | //#define bRxPath1 0x01 | 705 | /*#define bRxPath1 0x01 |
673 | //#define bRxPath2 0x02 | 706 | #define bRxPath2 0x02 |
674 | //#define bRxPath3 0x04 | 707 | #define bRxPath3 0x04 |
675 | //#define bRxPath4 0x08 | 708 | #define bRxPath4 0x08 |
676 | //#define bTxPath1 0x10 | 709 | #define bTxPath1 0x10 |
677 | //#define bTxPath2 0x20 | 710 | #define bTxPath2 0x20*/ |
678 | #define bHTDetect 0x100 | 711 | #define bHTDetect 0x100 |
679 | #define bCFOEn 0x10000 | 712 | #define bCFOEn 0x10000 |
680 | #define bCFOValue 0xfff00000 | 713 | #define bCFOValue 0xfff00000 |
@@ -687,8 +720,10 @@ | |||
687 | #define bCounter_MCSNoSupport 0xffff | 720 | #define bCounter_MCSNoSupport 0xffff |
688 | #define bCounter_FastSync 0xffff | 721 | #define bCounter_FastSync 0xffff |
689 | #define bShortCFO 0xfff | 722 | #define bShortCFO 0xfff |
690 | #define bShortCFOTLength 12 //total | 723 | /* total */ |
691 | #define bShortCFOFLength 11 //fraction | 724 | #define bShortCFOTLength 12 |
725 | /* fraction */ | ||
726 | #define bShortCFOFLength 11 | ||
692 | #define bLongCFO 0x7ff | 727 | #define bLongCFO 0x7ff |
693 | #define bLongCFOTLength 11 | 728 | #define bLongCFOTLength 11 |
694 | #define bLongCFOFLength 11 | 729 | #define bLongCFOFLength 11 |
@@ -765,18 +800,18 @@ | |||
765 | #define bUChCfg 0x7000000 | 800 | #define bUChCfg 0x7000000 |
766 | #define bUpdEqz 0x8000000 | 801 | #define bUpdEqz 0x8000000 |
767 | 802 | ||
768 | //page e | 803 | /* Page e */ |
769 | #define bTxAGCRate18_06 0x7f7f7f7f | 804 | #define bTxAGCRate18_06 0x7f7f7f7f |
770 | #define bTxAGCRate54_24 0x7f7f7f7f | 805 | #define bTxAGCRate54_24 0x7f7f7f7f |
771 | #define bTxAGCRateMCS32 0x7f | 806 | #define bTxAGCRateMCS32 0x7f |
772 | #define bTxAGCRateCCK 0x7f00 | 807 | #define bTxAGCRateCCK 0x7f00 |
773 | #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f | 808 | #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f |
774 | #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f | 809 | #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f |
775 | #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f | 810 | #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f |
776 | #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f | 811 | #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f |
777 | 812 | ||
778 | 813 | ||
779 | //Rx Pseduo noise | 814 | /* Rx Pseduo noise */ |
780 | #define bRxPesudoNoiseOn 0x20000000 | 815 | #define bRxPesudoNoiseOn 0x20000000 |
781 | #define bRxPesudoNoise_A 0xff | 816 | #define bRxPesudoNoise_A 0xff |
782 | #define bRxPesudoNoise_B 0xff00 | 817 | #define bRxPesudoNoise_B 0xff00 |
@@ -787,8 +822,7 @@ | |||
787 | #define bPesudoNoiseState_C 0xffff | 822 | #define bPesudoNoiseState_C 0xffff |
788 | #define bPesudoNoiseState_D 0xffff0000 | 823 | #define bPesudoNoiseState_D 0xffff0000 |
789 | 824 | ||
790 | //RF | 825 | /* RF Zebra 1 */ |
791 | //Zebra1 | ||
792 | #define bZebra1_HSSIEnable 0x8 | 826 | #define bZebra1_HSSIEnable 0x8 |
793 | #define bZebra1_TRxControl 0xc00 | 827 | #define bZebra1_TRxControl 0xc00 |
794 | #define bZebra1_TRxGainSetting 0x07f | 828 | #define bZebra1_TRxGainSetting 0x07f |
@@ -799,7 +833,7 @@ | |||
799 | #define bZebra1_TxLPFBW 0x400 | 833 | #define bZebra1_TxLPFBW 0x400 |
800 | #define bZebra1_RxLPFBW 0x600 | 834 | #define bZebra1_RxLPFBW 0x600 |
801 | 835 | ||
802 | //Zebra4 | 836 | /* Zebra4 */ |
803 | #define bRTL8256RegModeCtrl1 0x100 | 837 | #define bRTL8256RegModeCtrl1 0x100 |
804 | #define bRTL8256RegModeCtrl0 0x40 | 838 | #define bRTL8256RegModeCtrl0 0x40 |
805 | #define bRTL8256_TxLPFBW 0x18 | 839 | #define bRTL8256_TxLPFBW 0x18 |
@@ -810,7 +844,7 @@ | |||
810 | #define bRTL8258_RxLPFBW 0xc00 | 844 | #define bRTL8258_RxLPFBW 0xc00 |
811 | #define bRTL8258_RSSILPFBW 0xc0 | 845 | #define bRTL8258_RSSILPFBW 0xc0 |
812 | 846 | ||
813 | //byte endable for sb_write | 847 | /* byte endable for sb_write */ |
814 | #define bByte0 0x1 | 848 | #define bByte0 0x1 |
815 | #define bByte1 0x2 | 849 | #define bByte1 0x2 |
816 | #define bByte2 0x4 | 850 | #define bByte2 0x4 |
@@ -819,7 +853,7 @@ | |||
819 | #define bWord1 0xc | 853 | #define bWord1 0xc |
820 | #define bDWord 0xf | 854 | #define bDWord 0xf |
821 | 855 | ||
822 | //for PutRegsetting & GetRegSetting BitMask | 856 | /* for PutRegsetting & GetRegSetting BitMask */ |
823 | #define bMaskByte0 0xff | 857 | #define bMaskByte0 0xff |
824 | #define bMaskByte1 0xff00 | 858 | #define bMaskByte1 0xff00 |
825 | #define bMaskByte2 0xff0000 | 859 | #define bMaskByte2 0xff0000 |
@@ -828,7 +862,7 @@ | |||
828 | #define bMaskLWord 0x0000ffff | 862 | #define bMaskLWord 0x0000ffff |
829 | #define bMaskDWord 0xffffffff | 863 | #define bMaskDWord 0xffffffff |
830 | 864 | ||
831 | //for PutRFRegsetting & GetRFRegSetting BitMask | 865 | /* for PutRFRegsetting & GetRFRegSetting BitMask */ |
832 | #define bMask12Bits 0xfff | 866 | #define bMask12Bits 0xfff |
833 | 867 | ||
834 | #define bEnable 0x1 | 868 | #define bEnable 0x1 |
@@ -837,14 +871,16 @@ | |||
837 | #define LeftAntenna 0x0 | 871 | #define LeftAntenna 0x0 |
838 | #define RightAntenna 0x1 | 872 | #define RightAntenna 0x1 |
839 | 873 | ||
840 | #define tCheckTxStatus 500 //500ms | 874 | /* 500 ms */ |
841 | #define tUpdateRxCounter 100 //100ms | 875 | #define tCheckTxStatus 500 |
876 | /* 100 ms */ | ||
877 | #define tUpdateRxCounter 100 | ||
842 | 878 | ||
843 | #define rateCCK 0 | 879 | #define rateCCK 0 |
844 | #define rateOFDM 1 | 880 | #define rateOFDM 1 |
845 | #define rateHT 2 | 881 | #define rateHT 2 |
846 | 882 | ||
847 | //define Register-End | 883 | /* define Register-End */ |
848 | #define bPMAC_End 0x1ff | 884 | #define bPMAC_End 0x1ff |
849 | #define bFPGAPHY0_End 0x8ff | 885 | #define bFPGAPHY0_End 0x8ff |
850 | #define bFPGAPHY1_End 0x9ff | 886 | #define bFPGAPHY1_End 0x9ff |
@@ -852,12 +888,12 @@ | |||
852 | #define bOFDMPHY0_End 0xcff | 888 | #define bOFDMPHY0_End 0xcff |
853 | #define bOFDMPHY1_End 0xdff | 889 | #define bOFDMPHY1_End 0xdff |
854 | 890 | ||
855 | //define max debug item in each debug page | 891 | /*#define max debug item in each debug page |
856 | //#define bMaxItem_FPGA_PHY0 0x9 | 892 | #define bMaxItem_FPGA_PHY0 0x9 |
857 | //#define bMaxItem_FPGA_PHY1 0x3 | 893 | #define bMaxItem_FPGA_PHY1 0x3 |
858 | //#define bMaxItem_PHY_11B 0x16 | 894 | #define bMaxItem_PHY_11B 0x16 |
859 | //#define bMaxItem_OFDM_PHY0 0x29 | 895 | #define bMaxItem_OFDM_PHY0 0x29 |
860 | //#define bMaxItem_OFDM_PHY1 0x0 | 896 | #define bMaxItem_OFDM_PHY1 0x0 */ |
861 | 897 | ||
862 | #define bPMACControl 0x0 | 898 | #define bPMACControl 0x0 |
863 | #define bWMACControl 0x1 | 899 | #define bWMACControl 0x1 |
@@ -868,11 +904,12 @@ | |||
868 | #define PathC 0x2 | 904 | #define PathC 0x2 |
869 | #define PathD 0x3 | 905 | #define PathD 0x3 |
870 | 906 | ||
871 | #define rRTL8256RxMixerPole 0xb | 907 | #define rRTL8256RxMixerPole 0xb |
872 | #define bZebraRxMixerPole 0x6 | 908 | #define bZebraRxMixerPole 0x6 |
873 | #define rRTL8256TxBBOPBias 0x9 | 909 | #define rRTL8256TxBBOPBias 0x9 |
874 | #define bRTL8256TxBBOPBias 0x400 | 910 | #define bRTL8256TxBBOPBias 0x400 |
875 | #define rRTL8256TxBBBW 19 | 911 | #define rRTL8256TxBBBW 19 |
876 | #define bRTL8256TxBBBW 0x18 | 912 | #define bRTL8256TxBBBW 0x18 |
913 | |||
877 | 914 | ||
878 | #endif //__INC_HAL8190PCIPHYREG_H | 915 | #endif /* __INC_HAL8190PCIPHYREG_H */ |
diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig index 123fa6d6a93b..b72a96206f58 100644 --- a/drivers/staging/rtl8192su/Kconfig +++ b/drivers/staging/rtl8192su/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | config RTL8192SU | 1 | config RTL8192SU |
2 | tristate "RealTek RTL8192SU Wireless LAN NIC driver" | 2 | tristate "RealTek RTL8192SU Wireless LAN NIC driver" |
3 | depends on PCI && WLAN && USB | 3 | depends on PCI && WLAN && USB |
4 | depends on WIRELESS_EXT | 4 | select WIRELESS_EXT |
5 | select WEXT_PRIV | ||
5 | default N | 6 | default N |
6 | ---help--- | 7 | ---help--- |
diff --git a/drivers/staging/rtl8192su/TODO b/drivers/staging/rtl8192su/TODO index f11eec700030..3c8da157a93c 100644 --- a/drivers/staging/rtl8192su/TODO +++ b/drivers/staging/rtl8192su/TODO | |||
@@ -4,7 +4,6 @@ TODO: | |||
4 | - cleanup ieee80211.h | 4 | - cleanup ieee80211.h |
5 | - move rtl8192su's specific code out from ieee80211.h | 5 | - move rtl8192su's specific code out from ieee80211.h |
6 | - abstract rtl819su's specific code | 6 | - abstract rtl819su's specific code |
7 | - use list_for_each_safe() in ieee80211_crypto_deinit | ||
8 | - switch to use shared "librtl" instead of private ieee80211 stack | 7 | - switch to use shared "librtl" instead of private ieee80211 stack |
9 | - switch to use LIB80211 | 8 | - switch to use LIB80211 |
10 | - switch to use MAC80211 | 9 | - switch to use MAC80211 |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211.h b/drivers/staging/rtl8192su/ieee80211/ieee80211.h index 2b8c85556dcb..32b261d15594 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211.h +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211.h | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/jiffies.h> | 30 | #include <linux/jiffies.h> |
31 | #include <linux/timer.h> | 31 | #include <linux/timer.h> |
32 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
33 | #include <linux/semaphore.h> | ||
33 | 34 | ||
34 | #include <linux/delay.h> | 35 | #include <linux/delay.h> |
35 | #include <linux/wireless.h> | 36 | #include <linux/wireless.h> |
@@ -195,10 +196,6 @@ extern u32 ieee80211_debug_level; | |||
195 | #define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0) | 196 | #define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0) |
196 | #endif /* CONFIG_IEEE80211_DEBUG */ | 197 | #endif /* CONFIG_IEEE80211_DEBUG */ |
197 | 198 | ||
198 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
199 | #define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], \ | ||
200 | ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5] | ||
201 | |||
202 | /* | 199 | /* |
203 | * To use the debug system; | 200 | * To use the debug system; |
204 | * | 201 | * |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c index 521e7b989934..c4640e63196b 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c | |||
@@ -226,19 +226,20 @@ out: | |||
226 | void __exit ieee80211_crypto_deinit(void) | 226 | void __exit ieee80211_crypto_deinit(void) |
227 | { | 227 | { |
228 | struct list_head *ptr, *n; | 228 | struct list_head *ptr, *n; |
229 | struct ieee80211_crypto_alg *alg = NULL; | ||
229 | 230 | ||
230 | if (hcrypt == NULL) | 231 | if (hcrypt == NULL) |
231 | return; | 232 | return; |
232 | 233 | ||
233 | for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs; | 234 | list_for_each_safe(ptr, n, &hcrypt->algs) { |
234 | ptr = n, n = ptr->next) { | 235 | alg = list_entry(ptr, struct ieee80211_crypto_alg, list); |
235 | struct ieee80211_crypto_alg *alg = | 236 | if (alg) { |
236 | (struct ieee80211_crypto_alg *) ptr; | 237 | list_del(ptr); |
237 | list_del(ptr); | 238 | printk(KERN_DEBUG |
238 | printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " | 239 | "ieee80211_crypt: unregistered algorithm '%s' (deinit)\n", |
239 | "'%s' (deinit)\n", alg->ops->name); | 240 | alg->ops->name); |
240 | kfree(alg); | 241 | kfree(alg); |
242 | } | ||
241 | } | 243 | } |
242 | |||
243 | kfree(hcrypt); | 244 | kfree(hcrypt); |
244 | } | 245 | } |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c index 7bc956e1f458..8a93f7d3eb38 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c | |||
@@ -288,7 +288,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
288 | if (!(keyidx & (1 << 5))) { | 288 | if (!(keyidx & (1 << 5))) { |
289 | if (net_ratelimit()) { | 289 | if (net_ratelimit()) { |
290 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" | 290 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" |
291 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 291 | " flag from %pM\n", hdr->addr2); |
292 | } | 292 | } |
293 | key->dot11RSNAStatsCCMPFormatErrors++; | 293 | key->dot11RSNAStatsCCMPFormatErrors++; |
294 | return -2; | 294 | return -2; |
@@ -301,9 +301,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
301 | } | 301 | } |
302 | if (!key->key_set) { | 302 | if (!key->key_set) { |
303 | if (net_ratelimit()) { | 303 | if (net_ratelimit()) { |
304 | printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT | 304 | printk(KERN_DEBUG "CCMP: received packet from %pM" |
305 | " with keyid=%d that does not have a configured" | 305 | " with keyid=%d that does not have a configured" |
306 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 306 | " key\n", hdr->addr2, keyidx); |
307 | } | 307 | } |
308 | return -3; | 308 | return -3; |
309 | } | 309 | } |
@@ -318,11 +318,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
318 | 318 | ||
319 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { | 319 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { |
320 | if (net_ratelimit()) { | 320 | if (net_ratelimit()) { |
321 | printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT | 321 | printk(KERN_DEBUG "CCMP: replay detected: STA=%pM" |
322 | " previous PN %02x%02x%02x%02x%02x%02x " | 322 | " previous PN %pm received PN %pm\n", |
323 | "received PN %02x%02x%02x%02x%02x%02x\n", | 323 | hdr->addr2, key->rx_pn, pn); |
324 | MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn), | ||
325 | MAC_ARG(pn)); | ||
326 | } | 324 | } |
327 | key->dot11RSNAStatsCCMPReplays++; | 325 | key->dot11RSNAStatsCCMPReplays++; |
328 | return -4; | 326 | return -4; |
@@ -359,7 +357,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
359 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { | 357 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { |
360 | if (net_ratelimit()) { | 358 | if (net_ratelimit()) { |
361 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" | 359 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" |
362 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 360 | "%pM\n", hdr->addr2); |
363 | } | 361 | } |
364 | key->dot11RSNAStatsCCMPDecryptErrors++; | 362 | key->dot11RSNAStatsCCMPDecryptErrors++; |
365 | return -5; | 363 | return -5; |
@@ -435,11 +433,10 @@ static char * ieee80211_ccmp_print_stats(char *p, void *priv) | |||
435 | { | 433 | { |
436 | struct ieee80211_ccmp_data *ccmp = priv; | 434 | struct ieee80211_ccmp_data *ccmp = priv; |
437 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " | 435 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " |
438 | "tx_pn=%02x%02x%02x%02x%02x%02x " | 436 | "tx_pn=%pm rx_pn=%pm " |
439 | "rx_pn=%02x%02x%02x%02x%02x%02x " | ||
440 | "format_errors=%d replays=%d decrypt_errors=%d\n", | 437 | "format_errors=%d replays=%d decrypt_errors=%d\n", |
441 | ccmp->key_idx, ccmp->key_set, | 438 | ccmp->key_idx, ccmp->key_set, |
442 | MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn), | 439 | ccmp->tx_pn, ccmp->rx_pn, |
443 | ccmp->dot11RSNAStatsCCMPFormatErrors, | 440 | ccmp->dot11RSNAStatsCCMPFormatErrors, |
444 | ccmp->dot11RSNAStatsCCMPReplays, | 441 | ccmp->dot11RSNAStatsCCMPReplays, |
445 | ccmp->dot11RSNAStatsCCMPDecryptErrors); | 442 | ccmp->dot11RSNAStatsCCMPDecryptErrors); |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c index 9b9438fb5f60..7e48748da102 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c | |||
@@ -410,7 +410,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
410 | if (!(keyidx & (1 << 5))) { | 410 | if (!(keyidx & (1 << 5))) { |
411 | if (net_ratelimit()) { | 411 | if (net_ratelimit()) { |
412 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" | 412 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" |
413 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 413 | " flag from %pM\n", hdr->addr2); |
414 | } | 414 | } |
415 | return -2; | 415 | return -2; |
416 | } | 416 | } |
@@ -422,9 +422,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
422 | } | 422 | } |
423 | if (!tkey->key_set) { | 423 | if (!tkey->key_set) { |
424 | if (net_ratelimit()) { | 424 | if (net_ratelimit()) { |
425 | printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT | 425 | printk(KERN_DEBUG "TKIP: received packet from %pM" |
426 | " with keyid=%d that does not have a configured" | 426 | " with keyid=%d that does not have a configured" |
427 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 427 | " key\n", hdr->addr2, keyidx); |
428 | } | 428 | } |
429 | return -3; | 429 | return -3; |
430 | } | 430 | } |
@@ -437,9 +437,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
437 | if (iv32 < tkey->rx_iv32 || | 437 | if (iv32 < tkey->rx_iv32 || |
438 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { | 438 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { |
439 | if (net_ratelimit()) { | 439 | if (net_ratelimit()) { |
440 | printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT | 440 | printk(KERN_DEBUG "TKIP: replay detected: STA=%pM" |
441 | " previous TSC %08x%04x received TSC " | 441 | " previous TSC %08x%04x received TSC " |
442 | "%08x%04x\n", MAC_ARG(hdr->addr2), | 442 | "%08x%04x\n", hdr->addr2, |
443 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); | 443 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); |
444 | } | 444 | } |
445 | tkey->dot11RSNAStatsTKIPReplays++; | 445 | tkey->dot11RSNAStatsTKIPReplays++; |
@@ -460,8 +460,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
460 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { | 460 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { |
461 | if (net_ratelimit()) { | 461 | if (net_ratelimit()) { |
462 | printk(KERN_DEBUG ": TKIP: failed to decrypt " | 462 | printk(KERN_DEBUG ": TKIP: failed to decrypt " |
463 | "received packet from " MAC_FMT "\n", | 463 | "received packet from %pM\n", |
464 | MAC_ARG(hdr->addr2)); | 464 | hdr->addr2); |
465 | } | 465 | } |
466 | return -7; | 466 | return -7; |
467 | } | 467 | } |
@@ -480,7 +480,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
480 | } | 480 | } |
481 | if (net_ratelimit()) { | 481 | if (net_ratelimit()) { |
482 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" | 482 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" |
483 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 483 | "%pM\n", hdr->addr2); |
484 | } | 484 | } |
485 | tkey->dot11RSNAStatsTKIPICVErrors++; | 485 | tkey->dot11RSNAStatsTKIPICVErrors++; |
486 | return -5; | 486 | return -5; |
@@ -635,8 +635,8 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx, | |||
635 | struct ieee80211_hdr_4addr *hdr; | 635 | struct ieee80211_hdr_4addr *hdr; |
636 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 636 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
637 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " | 637 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " |
638 | "MSDU from " MAC_FMT " keyidx=%d\n", | 638 | "MSDU from %pM keyidx=%d\n", |
639 | skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2), | 639 | skb->dev ? skb->dev->name : "N/A", hdr->addr2, |
640 | keyidx); | 640 | keyidx); |
641 | if (skb->dev) | 641 | if (skb->dev) |
642 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); | 642 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c index e8c67d5dfb76..c024fa600729 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c | |||
@@ -262,7 +262,7 @@ static int store_debug_level(struct file *file, const char *buffer, | |||
262 | unsigned long count, void *data) | 262 | unsigned long count, void *data) |
263 | { | 263 | { |
264 | char buf[] = "0x00000000"; | 264 | char buf[] = "0x00000000"; |
265 | unsigned long len = min(sizeof(buf) - 1, count); | 265 | unsigned long len = min_t(unsigned long, sizeof(buf) - 1, count); |
266 | char *p = (char *)buf; | 266 | char *p = (char *)buf; |
267 | unsigned long val; | 267 | unsigned long val; |
268 | 268 | ||
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c index 095b8c643146..cc80faf6598b 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c | |||
@@ -314,8 +314,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
314 | strcmp(crypt->ops->name, "TKIP") == 0) { | 314 | strcmp(crypt->ops->name, "TKIP") == 0) { |
315 | if (net_ratelimit()) { | 315 | if (net_ratelimit()) { |
316 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 316 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
317 | "received packet from " MAC_FMT "\n", | 317 | "received packet from %pM\n", |
318 | ieee->dev->name, MAC_ARG(hdr->addr2)); | 318 | ieee->dev->name, hdr->addr2); |
319 | } | 319 | } |
320 | return -1; | 320 | return -1; |
321 | } | 321 | } |
@@ -326,8 +326,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
326 | atomic_dec(&crypt->refcnt); | 326 | atomic_dec(&crypt->refcnt); |
327 | if (res < 0) { | 327 | if (res < 0) { |
328 | IEEE80211_DEBUG_DROP( | 328 | IEEE80211_DEBUG_DROP( |
329 | "decryption failed (SA=" MAC_FMT | 329 | "decryption failed (SA=%pM" |
330 | ") res=%d\n", MAC_ARG(hdr->addr2), res); | 330 | ") res=%d\n", hdr->addr2, res); |
331 | if (res == -2) | 331 | if (res == -2) |
332 | IEEE80211_DEBUG_DROP("Decryption failed ICV " | 332 | IEEE80211_DEBUG_DROP("Decryption failed ICV " |
333 | "mismatch (key %d)\n", | 333 | "mismatch (key %d)\n", |
@@ -364,8 +364,8 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s | |||
364 | atomic_dec(&crypt->refcnt); | 364 | atomic_dec(&crypt->refcnt); |
365 | if (res < 0) { | 365 | if (res < 0) { |
366 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" | 366 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" |
367 | " (SA=" MAC_FMT " keyidx=%d)\n", | 367 | " (SA=%pM keyidx=%d)\n", |
368 | ieee->dev->name, MAC_ARG(hdr->addr2), keyidx); | 368 | ieee->dev->name, hdr->addr2, keyidx); |
369 | return -1; | 369 | return -1; |
370 | } | 370 | } |
371 | 371 | ||
@@ -939,8 +939,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
939 | * frames silently instead of filling system log with | 939 | * frames silently instead of filling system log with |
940 | * these reports. */ | 940 | * these reports. */ |
941 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" | 941 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" |
942 | " (SA=" MAC_FMT ")\n", | 942 | " (SA=%pM)\n", |
943 | MAC_ARG(hdr->addr2)); | 943 | hdr->addr2); |
944 | ieee->ieee_stats.rx_discards_undecryptable++; | 944 | ieee->ieee_stats.rx_discards_undecryptable++; |
945 | goto rx_dropped; | 945 | goto rx_dropped; |
946 | } | 946 | } |
@@ -1143,8 +1143,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1143 | } else { | 1143 | } else { |
1144 | IEEE80211_DEBUG_DROP( | 1144 | IEEE80211_DEBUG_DROP( |
1145 | "encryption configured, but RX " | 1145 | "encryption configured, but RX " |
1146 | "frame not encrypted (SA=" MAC_FMT ")\n", | 1146 | "frame not encrypted (SA=%pM)\n", |
1147 | MAC_ARG(hdr->addr2)); | 1147 | hdr->addr2); |
1148 | goto rx_dropped; | 1148 | goto rx_dropped; |
1149 | } | 1149 | } |
1150 | } | 1150 | } |
@@ -1163,9 +1163,9 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1163 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { | 1163 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { |
1164 | IEEE80211_DEBUG_DROP( | 1164 | IEEE80211_DEBUG_DROP( |
1165 | "dropped unencrypted RX data " | 1165 | "dropped unencrypted RX data " |
1166 | "frame from " MAC_FMT | 1166 | "frame from %pM" |
1167 | " (drop_unencrypted=1)\n", | 1167 | " (drop_unencrypted=1)\n", |
1168 | MAC_ARG(hdr->addr2)); | 1168 | hdr->addr2); |
1169 | goto rx_dropped; | 1169 | goto rx_dropped; |
1170 | } | 1170 | } |
1171 | /* | 1171 | /* |
@@ -2159,11 +2159,11 @@ static inline int ieee80211_network_init( | |||
2159 | } | 2159 | } |
2160 | 2160 | ||
2161 | if (network->mode == 0) { | 2161 | if (network->mode == 0) { |
2162 | IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' " | 2162 | IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' " |
2163 | "network.\n", | 2163 | "network.\n", |
2164 | escape_essid(network->ssid, | 2164 | escape_essid(network->ssid, |
2165 | network->ssid_len), | 2165 | network->ssid_len), |
2166 | MAC_ARG(network->bssid)); | 2166 | network->bssid); |
2167 | return 1; | 2167 | return 1; |
2168 | } | 2168 | } |
2169 | 2169 | ||
@@ -2345,9 +2345,9 @@ static inline void ieee80211_process_probe_response( | |||
2345 | 2345 | ||
2346 | memset(&network, 0, sizeof(struct ieee80211_network)); | 2346 | memset(&network, 0, sizeof(struct ieee80211_network)); |
2347 | IEEE80211_DEBUG_SCAN( | 2347 | IEEE80211_DEBUG_SCAN( |
2348 | "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", | 2348 | "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", |
2349 | escape_essid(info_element->data, info_element->len), | 2349 | escape_essid(info_element->data, info_element->len), |
2350 | MAC_ARG(beacon->header.addr3), | 2350 | beacon->header.addr3, |
2351 | (beacon->capability & (1<<0xf)) ? '1' : '0', | 2351 | (beacon->capability & (1<<0xf)) ? '1' : '0', |
2352 | (beacon->capability & (1<<0xe)) ? '1' : '0', | 2352 | (beacon->capability & (1<<0xe)) ? '1' : '0', |
2353 | (beacon->capability & (1<<0xd)) ? '1' : '0', | 2353 | (beacon->capability & (1<<0xd)) ? '1' : '0', |
@@ -2366,10 +2366,10 @@ static inline void ieee80211_process_probe_response( | |||
2366 | (beacon->capability & (1<<0x0)) ? '1' : '0'); | 2366 | (beacon->capability & (1<<0x0)) ? '1' : '0'); |
2367 | 2367 | ||
2368 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { | 2368 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { |
2369 | IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n", | 2369 | IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n", |
2370 | escape_essid(info_element->data, | 2370 | escape_essid(info_element->data, |
2371 | info_element->len), | 2371 | info_element->len), |
2372 | MAC_ARG(beacon->header.addr3), | 2372 | beacon->header.addr3, |
2373 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == | 2373 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == |
2374 | IEEE80211_STYPE_PROBE_RESP ? | 2374 | IEEE80211_STYPE_PROBE_RESP ? |
2375 | "PROBE RESPONSE" : "BEACON"); | 2375 | "PROBE RESPONSE" : "BEACON"); |
@@ -2478,11 +2478,11 @@ static inline void ieee80211_process_probe_response( | |||
2478 | /* If there are no more slots, expire the oldest */ | 2478 | /* If there are no more slots, expire the oldest */ |
2479 | list_del(&oldest->list); | 2479 | list_del(&oldest->list); |
2480 | target = oldest; | 2480 | target = oldest; |
2481 | IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from " | 2481 | IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from " |
2482 | "network list.\n", | 2482 | "network list.\n", |
2483 | escape_essid(target->ssid, | 2483 | escape_essid(target->ssid, |
2484 | target->ssid_len), | 2484 | target->ssid_len), |
2485 | MAC_ARG(target->bssid)); | 2485 | target->bssid); |
2486 | } else { | 2486 | } else { |
2487 | /* Otherwise just pull from the free list */ | 2487 | /* Otherwise just pull from the free list */ |
2488 | target = list_entry(ieee->network_free_list.next, | 2488 | target = list_entry(ieee->network_free_list.next, |
@@ -2492,10 +2492,10 @@ static inline void ieee80211_process_probe_response( | |||
2492 | 2492 | ||
2493 | 2493 | ||
2494 | #ifdef CONFIG_IEEE80211_DEBUG | 2494 | #ifdef CONFIG_IEEE80211_DEBUG |
2495 | IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n", | 2495 | IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n", |
2496 | escape_essid(network.ssid, | 2496 | escape_essid(network.ssid, |
2497 | network.ssid_len), | 2497 | network.ssid_len), |
2498 | MAC_ARG(network.bssid), | 2498 | network.bssid, |
2499 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == | 2499 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == |
2500 | IEEE80211_STYPE_PROBE_RESP ? | 2500 | IEEE80211_STYPE_PROBE_RESP ? |
2501 | "PROBE RESPONSE" : "BEACON"); | 2501 | "PROBE RESPONSE" : "BEACON"); |
@@ -2505,10 +2505,10 @@ static inline void ieee80211_process_probe_response( | |||
2505 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) | 2505 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) |
2506 | ieee80211_softmac_new_net(ieee,&network); | 2506 | ieee80211_softmac_new_net(ieee,&network); |
2507 | } else { | 2507 | } else { |
2508 | IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n", | 2508 | IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n", |
2509 | escape_essid(target->ssid, | 2509 | escape_essid(target->ssid, |
2510 | target->ssid_len), | 2510 | target->ssid_len), |
2511 | MAC_ARG(target->bssid), | 2511 | target->bssid, |
2512 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == | 2512 | WLAN_FC_GET_STYPE(beacon->header.frame_control) == |
2513 | IEEE80211_STYPE_PROBE_RESP ? | 2513 | IEEE80211_STYPE_PROBE_RESP ? |
2514 | "PROBE RESPONSE" : "BEACON"); | 2514 | "PROBE RESPONSE" : "BEACON"); |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c index 0ba2a01a06a1..9d8cb0e575d3 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c | |||
@@ -1709,7 +1709,7 @@ ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb) | |||
1709 | ieee80211_resp_to_assoc_rq(ieee, dest); | 1709 | ieee80211_resp_to_assoc_rq(ieee, dest); |
1710 | } | 1710 | } |
1711 | 1711 | ||
1712 | printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest)); | 1712 | printk(KERN_INFO"New client associated: %pM\n", dest); |
1713 | //FIXME | 1713 | //FIXME |
1714 | } | 1714 | } |
1715 | 1715 | ||
@@ -2145,8 +2145,8 @@ void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device * | |||
2145 | ieee80211_sta_wakeup(ieee,0); | 2145 | ieee80211_sta_wakeup(ieee,0); |
2146 | 2146 | ||
2147 | /* update the tx status */ | 2147 | /* update the tx status */ |
2148 | // ieee->stats.tx_bytes += txb->payload_size; | 2148 | ieee->stats.tx_bytes += txb->payload_size; |
2149 | // ieee->stats.tx_packets++; | 2149 | ieee->stats.tx_packets++; |
2150 | tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE); | 2150 | tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE); |
2151 | if(tcb_desc->bMulticast) { | 2151 | if(tcb_desc->bMulticast) { |
2152 | ieee->stats.multicast++; | 2152 | ieee->stats.multicast++; |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c index 4d54e1e62d22..484c3aba5cb3 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c | |||
@@ -199,8 +199,8 @@ int ieee80211_encrypt_fragment( | |||
199 | header = (struct rtl_ieee80211_hdr *)frag->data; | 199 | header = (struct rtl_ieee80211_hdr *)frag->data; |
200 | if (net_ratelimit()) { | 200 | if (net_ratelimit()) { |
201 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 201 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
202 | "TX packet to " MAC_FMT "\n", | 202 | "TX packet to %pM\n", |
203 | ieee->dev->name, MAC_ARG(header->addr1)); | 203 | ieee->dev->name, header->addr1); |
204 | } | 204 | } |
205 | return -1; | 205 | return -1; |
206 | } | 206 | } |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c index 85c7e96b622d..122f8004904b 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c | |||
@@ -261,10 +261,10 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee, | |||
261 | else | 261 | else |
262 | IEEE80211_DEBUG_SCAN( | 262 | IEEE80211_DEBUG_SCAN( |
263 | "Not showing network '%s (" | 263 | "Not showing network '%s (" |
264 | MAC_FMT ")' due to age (%lums).\n", | 264 | "%pM)' due to age (%lums).\n", |
265 | escape_essid(network->ssid, | 265 | escape_essid(network->ssid, |
266 | network->ssid_len), | 266 | network->ssid_len), |
267 | MAC_ARG(network->bssid), | 267 | network->bssid, |
268 | (jiffies - network->last_scanned) / (HZ / 100)); | 268 | (jiffies - network->last_scanned) / (HZ / 100)); |
269 | } | 269 | } |
270 | 270 | ||
@@ -731,7 +731,7 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee, | |||
731 | #if 1 | 731 | #if 1 |
732 | case IW_AUTH_WPA_ENABLED: | 732 | case IW_AUTH_WPA_ENABLED: |
733 | ieee->wpa_enabled = (data->value)?1:0; | 733 | ieee->wpa_enabled = (data->value)?1:0; |
734 | //printk("enalbe wpa:%d\n", ieee->wpa_enabled); | 734 | //printk("enable wpa:%d\n", ieee->wpa_enabled); |
735 | break; | 735 | break; |
736 | 736 | ||
737 | #endif | 737 | #endif |
diff --git a/drivers/staging/rtl8192su/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192su/ieee80211/rtl819x_BAProc.c index c6962450e06f..8c37dd124fc9 100644 --- a/drivers/staging/rtl8192su/ieee80211/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192su/ieee80211/rtl819x_BAProc.c | |||
@@ -113,7 +113,7 @@ static struct sk_buff* ieee80211_ADDBA(struct ieee80211_device* ieee, u8* Dst, P | |||
113 | u16 tmp = 0; | 113 | u16 tmp = 0; |
114 | u16 len = ieee->tx_headroom + 9; | 114 | u16 len = ieee->tx_headroom + 9; |
115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) | 115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) |
116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __FUNCTION__, type, MAC_ARG(Dst), ieee->dev); | 116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:%pM, ieee->dev:%p\n", __FUNCTION__, type, Dst, ieee->dev); |
117 | if (pBA == NULL||ieee == NULL) | 117 | if (pBA == NULL||ieee == NULL) |
118 | { | 118 | { |
119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); | 119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); |
@@ -200,7 +200,7 @@ static struct sk_buff* ieee80211_DELBA( | |||
200 | u16 len = 6 + ieee->tx_headroom; | 200 | u16 len = 6 + ieee->tx_headroom; |
201 | 201 | ||
202 | if (net_ratelimit()) | 202 | if (net_ratelimit()) |
203 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __FUNCTION__, ReasonCode, MAC_ARG(dst)); | 203 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:%pM\n", __FUNCTION__, ReasonCode, dst); |
204 | 204 | ||
205 | memset(&DelbaParamSet, 0, 2); | 205 | memset(&DelbaParamSet, 0, 2); |
206 | 206 | ||
@@ -339,7 +339,10 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb) | |||
339 | 339 | ||
340 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) | 340 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) |
341 | { | 341 | { |
342 | IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %ld)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); | 342 | IEEE80211_DEBUG(IEEE80211_DL_ERR, |
343 | " Invalid skb len in BAREQ(%d / %zd)\n", | ||
344 | skb->len, | ||
345 | sizeof(struct ieee80211_hdr_3addr) + 9); | ||
343 | return -1; | 346 | return -1; |
344 | } | 347 | } |
345 | 348 | ||
@@ -354,7 +357,7 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb) | |||
354 | pBaTimeoutVal = (u16*)(tag + 5); | 357 | pBaTimeoutVal = (u16*)(tag + 5); |
355 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); | 358 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); |
356 | 359 | ||
357 | printk("====================>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst)); | 360 | printk("====================>rx ADDBAREQ from :%pM\n", dst); |
358 | //some other capability is not ready now. | 361 | //some other capability is not ready now. |
359 | if( (ieee->current_network.qos_data.active == 0) || | 362 | if( (ieee->current_network.qos_data.active == 0) || |
360 | (ieee->pHTInfo->bCurrentHTSupport == false) || | 363 | (ieee->pHTInfo->bCurrentHTSupport == false) || |
@@ -440,7 +443,10 @@ int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb) | |||
440 | 443 | ||
441 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) | 444 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) |
442 | { | 445 | { |
443 | IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %ld)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); | 446 | IEEE80211_DEBUG(IEEE80211_DL_ERR, |
447 | " Invalid skb len in BARSP(%d / %zd)\n", | ||
448 | skb->len, | ||
449 | sizeof(struct ieee80211_hdr_3addr) + 9); | ||
444 | return -1; | 450 | return -1; |
445 | } | 451 | } |
446 | rsp = ( struct ieee80211_hdr_3addr*)skb->data; | 452 | rsp = ( struct ieee80211_hdr_3addr*)skb->data; |
@@ -570,7 +576,10 @@ int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb) | |||
570 | 576 | ||
571 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6) | 577 | if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6) |
572 | { | 578 | { |
573 | IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %ld)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6)); | 579 | IEEE80211_DEBUG(IEEE80211_DL_ERR, |
580 | " Invalid skb len in DELBA(%d / %zd)\n", | ||
581 | skb->len, | ||
582 | sizeof(struct ieee80211_hdr_3addr) + 6); | ||
574 | return -1; | 583 | return -1; |
575 | } | 584 | } |
576 | 585 | ||
diff --git a/drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c b/drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c index 33c7fa7edc8b..01114c5181bb 100644 --- a/drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c | |||
@@ -42,7 +42,7 @@ static u8 DLINK_ATHEROS_1[3] = {0x00, 0x1c, 0xf0}; | |||
42 | static u8 DLINK_ATHEROS_2[3] = {0x00, 0x21, 0x91}; | 42 | static u8 DLINK_ATHEROS_2[3] = {0x00, 0x21, 0x91}; |
43 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; | 43 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; |
44 | static u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4}; | 44 | static u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4}; |
45 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Shoud we put the | 45 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Should we put the |
46 | // code in other place?? | 46 | // code in other place?? |
47 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; | 47 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; |
48 | /******************************************************************************************************************** | 48 | /******************************************************************************************************************** |
diff --git a/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c index ad3bf35d80e6..60cf1f8781ce 100644 --- a/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c | |||
@@ -291,7 +291,7 @@ PTS_COMMON_INFO SearchAdmitTRStream(struct ieee80211_device *ieee, u8* Addr, u8 | |||
291 | if(search_dir[dir] ==false ) | 291 | if(search_dir[dir] ==false ) |
292 | continue; | 292 | continue; |
293 | list_for_each_entry(pRet, psearch_list, List){ | 293 | list_for_each_entry(pRet, psearch_list, List){ |
294 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:"MAC_FMT", TID:%d, dir:%d\n", MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); | 294 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); |
295 | if (memcmp(pRet->Addr, Addr, 6) == 0) | 295 | if (memcmp(pRet->Addr, Addr, 6) == 0) |
296 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) | 296 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) |
297 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) | 297 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) |
@@ -447,7 +447,7 @@ bool GetTs( | |||
447 | ResetRxTsEntry(tmp); | 447 | ResetRxTsEntry(tmp); |
448 | } | 448 | } |
449 | 449 | ||
450 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT"\n", UP, Dir, MAC_ARG(Addr)); | 450 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:%pM\n", UP, Dir, Addr); |
451 | // Prepare TS Info releated field | 451 | // Prepare TS Info releated field |
452 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field | 452 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field |
453 | pTSInfo->field.ucTSID = UP; // TSID | 453 | pTSInfo->field.ucTSID = UP; // TSID |
@@ -533,7 +533,7 @@ void RemoveTsEntry( | |||
533 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) | 533 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) |
534 | { | 534 | { |
535 | PTS_COMMON_INFO pTS, pTmpTS; | 535 | PTS_COMMON_INFO pTS, pTmpTS; |
536 | printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr)); | 536 | printk("===========>RemovePeerTS,%pM\n", Addr); |
537 | #if 1 | 537 | #if 1 |
538 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) | 538 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) |
539 | { | 539 | { |
diff --git a/drivers/staging/rtl8192su/r8192SU_HWImg.c b/drivers/staging/rtl8192su/r8192SU_HWImg.c index cbb65795a302..ba8e12c209ca 100644 --- a/drivers/staging/rtl8192su/r8192SU_HWImg.c +++ b/drivers/staging/rtl8192su/r8192SU_HWImg.c | |||
@@ -2,4282 +2,6 @@ | |||
2 | 2 | ||
3 | #include "r8192SU_HWImg.h" | 3 | #include "r8192SU_HWImg.h" |
4 | 4 | ||
5 | u8 Rtl8192SUFwImgArray[ImgArrayLength] = { | ||
6 | 0x92,0x81,0x2b,0x90,0x30,0x00,0x00,0x00,0x08,0x74,0x00,0x00,0x88,0x96,0x00,0x00, | ||
7 | 0x30,0x00,0x00,0x00,0x00,0x95,0x00,0x00,0x00,0x00,0x2b,0x00,0x03,0x03,0x23,0x00, | ||
8 | 0x92,0x81,0x02,0x01,0x00,0x00,0x12,0x04,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00, | ||
9 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x01,0x01,0x01,0x00,0x00, | ||
10 | 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
11 | 0x7f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
12 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
13 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
14 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
15 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
16 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
17 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
18 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
19 | 0x1f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
20 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
21 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
22 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
23 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
24 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
25 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
26 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
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52 | 0x21,0x20,0xa0,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
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63 | 0xff,0x00,0x42,0x30,0x00,0x46,0x02,0x00,0x10,0x00,0x42,0x30,0x13,0x00,0x40,0x10, | ||
64 | 0x03,0x46,0x08,0x00,0xc4,0x7d,0x42,0x8d,0x68,0x15,0x05,0x26,0xd4,0x63,0xa4,0x94, | ||
65 | 0x01,0x00,0x47,0x24,0x10,0x00,0x02,0x24,0xb0,0x03,0xc9,0x34,0x00,0x00,0x62,0xa0, | ||
66 | 0x07,0x00,0x80,0x10,0x1c,0x03,0xc6,0x34,0xd8,0x63,0xa2,0x8c,0xd4,0x63,0xa0,0xa4, | ||
67 | 0xd8,0x63,0xa0,0xac,0x00,0x00,0x04,0x24,0x00,0x00,0xc2,0xac,0x00,0x00,0x20,0xad, | ||
68 | 0x01,0x00,0x82,0x24,0xc4,0x7d,0x47,0xad,0xd4,0x63,0xa2,0xa4,0x12,0x00,0x00,0x05, | ||
69 | 0x42,0xb0,0x02,0x3c,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
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71 | 0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f,0x80,0x00,0x63,0x30,0x41,0xb0,0x02,0x3c, | ||
72 | 0x25,0x18,0x65,0x00,0x08,0x00,0x42,0x34,0x18,0x00,0xbd,0x27,0x00,0x00,0x43,0xa4, | ||
73 | 0x08,0x00,0xe0,0x03,0x08,0x4b,0x83,0xa4,0x80,0xff,0x03,0x24,0x03,0x00,0x42,0x34, | ||
74 | 0x00,0x00,0x43,0xa0,0xc8,0x0e,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x60,0x01,0x40, | ||
75 | 0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x68,0x15,0x04,0x26, | ||
76 | 0x0c,0x4b,0x83,0x94,0x08,0x4b,0x85,0x94,0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f, | ||
77 | 0x80,0x00,0x63,0x30,0x41,0xb0,0x02,0x3c,0x25,0x18,0x65,0x00,0x08,0x00,0x42,0x34, | ||
78 | 0x18,0x00,0xbd,0x27,0x00,0x00,0x43,0xa4,0x08,0x00,0xe0,0x03,0x08,0x4b,0x83,0xa4, | ||
79 | 0xff,0x00,0x84,0x30,0x0b,0x00,0x82,0x2c,0xff,0xff,0xe7,0x30,0x10,0x00,0xa8,0x93, | ||
80 | 0x19,0x00,0x40,0x10,0x21,0x18,0x00,0x00,0x02,0x80,0x03,0x3c,0x80,0x10,0x04,0x00, | ||
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83 | 0x07,0x00,0xe2,0x30,0x00,0x00,0x85,0xac,0x04,0x00,0x86,0xac,0x04,0x00,0x40,0x18, | ||
84 | 0x00,0x00,0x00,0x00,0xf8,0xff,0xe2,0x30,0x08,0x00,0x42,0x24,0xff,0xff,0x47,0x30, | ||
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86 | 0x08,0x00,0x82,0xac,0x01,0x00,0x03,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
87 | 0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08,0x6c,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c, | ||
88 | 0x20,0x01,0x00,0x08,0x60,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08, | ||
89 | 0x54,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08,0x48,0x00,0x44,0x34, | ||
90 | 0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08,0x3c,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c, | ||
91 | 0x20,0x01,0x00,0x08,0x30,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08, | ||
92 | 0x24,0x00,0x44,0x34,0x43,0xb0,0x02,0x3c,0x20,0x01,0x00,0x08,0x18,0x00,0x44,0x34, | ||
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94 | 0x43,0xb0,0x04,0x3c,0x01,0x00,0x02,0x24,0x25,0xb0,0x03,0x3c,0x04,0x20,0x82,0x00, | ||
95 | 0x18,0x03,0x67,0x34,0x00,0x80,0x02,0x3c,0x43,0xb0,0x03,0x3c,0x34,0x05,0x46,0x24, | ||
96 | 0x88,0x00,0x65,0x34,0x21,0x10,0x00,0x00,0x01,0x00,0x42,0x24,0xff,0xff,0x42,0x30, | ||
97 | 0x05,0x00,0x43,0x2c,0xfd,0xff,0x60,0x14,0x01,0x00,0x42,0x24,0x00,0x00,0xe6,0xac, | ||
98 | 0x00,0x00,0xa2,0x94,0x00,0x00,0x00,0x00,0xff,0xff,0x42,0x30,0x24,0x10,0x44,0x00, | ||
99 | 0xf4,0xff,0x40,0x1c,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
100 | 0x25,0xb0,0x08,0x3c,0x00,0x80,0x02,0x3c,0xc8,0xff,0xbd,0x27,0x18,0x03,0x03,0x35, | ||
101 | 0x90,0x05,0x42,0x24,0x00,0x00,0x62,0xac,0x30,0x00,0xb6,0xaf,0x28,0x00,0xb4,0xaf, | ||
102 | 0x24,0x00,0xb3,0xaf,0x1c,0x00,0xb1,0xaf,0x34,0x00,0xbf,0xaf,0x2c,0x00,0xb5,0xaf, | ||
103 | 0x20,0x00,0xb2,0xaf,0x18,0x00,0xb0,0xaf,0x0c,0x00,0xf2,0x84,0x08,0x00,0xf5,0x8c, | ||
104 | 0xff,0x00,0xc6,0x30,0x00,0x01,0x02,0x24,0x23,0x10,0x46,0x00,0xff,0xff,0x51,0x30, | ||
105 | 0xd0,0x03,0x08,0x35,0xff,0x00,0x96,0x30,0x00,0x00,0x12,0xad,0x21,0xa0,0xa0,0x00, | ||
106 | 0x21,0x30,0xc5,0x00,0x00,0x00,0x15,0xad,0x21,0x20,0xc0,0x02,0x21,0x28,0xa0,0x02, | ||
107 | 0x21,0x38,0x20,0x02,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x23,0x18,0x51,0x02, | ||
108 | 0xff,0xff,0x82,0x32,0x00,0x94,0x03,0x00,0x03,0x94,0x12,0x00,0xa6,0x01,0x00,0x08, | ||
109 | 0x02,0x9a,0x02,0x00,0x28,0xb0,0x03,0x3c,0xc0,0x10,0x13,0x00,0x21,0x10,0x43,0x00, | ||
110 | 0x00,0x00,0x44,0x90,0x25,0xb0,0x10,0x3c,0x20,0x10,0x02,0x3c,0xff,0x00,0x93,0x30, | ||
111 | 0x00,0x22,0x13,0x00,0xff,0xff,0x43,0x32,0x01,0x01,0x45,0x2a,0x21,0xa0,0x82,0x00, | ||
112 | 0x21,0xa8,0xb1,0x02,0xd0,0x03,0x02,0x36,0x00,0x01,0x11,0x24,0x0b,0x88,0x65,0x00, | ||
113 | 0x21,0x20,0xc0,0x02,0x00,0x00,0x53,0xac,0x4d,0x01,0x00,0x0c,0xb0,0x03,0x10,0x36, | ||
114 | 0x21,0x30,0x80,0x02,0x21,0x20,0xc0,0x02,0x21,0x28,0xa0,0x02,0x21,0x38,0x20,0x02, | ||
115 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x23,0x18,0x51,0x02,0x00,0x94,0x03,0x00, | ||
116 | 0x03,0x94,0x12,0x00,0x00,0x00,0x12,0xae,0xe2,0xff,0x40,0x1e,0x00,0x00,0x00,0x00, | ||
117 | 0x34,0x00,0xbf,0x8f,0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f, | ||
118 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
119 | 0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0xc8,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c, | ||
120 | 0x25,0xb0,0x04,0x3c,0x20,0x00,0xb2,0xaf,0x68,0x15,0x52,0x24,0x00,0x80,0x02,0x3c, | ||
121 | 0x18,0x03,0x83,0x34,0xc8,0x06,0x42,0x24,0x28,0x00,0xb4,0xaf,0x24,0x00,0xb3,0xaf, | ||
122 | 0x30,0x00,0xbf,0xaf,0x2c,0x00,0xb5,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
123 | 0x00,0x00,0x62,0xac,0xb0,0x03,0x93,0x34,0x21,0xa0,0x40,0x02,0x54,0x64,0x42,0x8e, | ||
124 | 0xc0,0x64,0x50,0x8e,0x21,0x20,0x00,0x00,0x00,0x00,0x62,0xae,0x58,0x64,0x42,0xae, | ||
125 | 0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00,0xc0,0x64,0x44,0x8e, | ||
126 | 0xc4,0x64,0x43,0x8e,0x20,0x00,0x84,0x24,0x3f,0x00,0x62,0x24,0x2b,0x10,0x44,0x00, | ||
127 | 0x0a,0x18,0x82,0x00,0xc0,0x64,0x43,0xae,0xc0,0x64,0x85,0x8e,0x00,0x00,0x00,0x00, | ||
128 | 0x00,0x00,0x65,0xae,0x02,0x80,0x02,0x3c,0xff,0xff,0x10,0x32,0x25,0x80,0x02,0x02, | ||
129 | 0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92,0xff,0x00,0x15,0x24,0x21,0x20,0x00,0x00, | ||
130 | 0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92,0x20,0x10,0x02,0x3c,0x20,0x00,0x07,0x24, | ||
131 | 0x00,0x1a,0x11,0x00,0x21,0x18,0x62,0x00,0x05,0x00,0x35,0x12,0x21,0x30,0x60,0x00, | ||
132 | 0x08,0x64,0x91,0xa2,0x54,0x64,0x83,0xae,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
133 | 0x04,0x00,0x04,0x8e,0x08,0x00,0x03,0x8e,0xff,0xe0,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
134 | 0x1f,0x00,0x84,0x30,0x24,0x18,0x62,0x00,0x00,0x26,0x04,0x00,0xff,0xdf,0x02,0x3c, | ||
135 | 0x25,0x18,0x64,0x00,0xff,0xff,0x42,0x34,0x24,0x18,0x62,0x00,0x00,0x40,0x04,0x3c, | ||
136 | 0x25,0x18,0x64,0x00,0xc0,0xff,0x02,0x24,0x24,0x18,0x62,0x00,0x08,0x00,0x03,0xae, | ||
137 | 0xc9,0x64,0x84,0x92,0x2a,0xb0,0x02,0x3c,0x01,0x00,0x03,0x24,0x01,0x00,0x84,0x24, | ||
138 | 0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0xc4,0xff,0x35,0x16,0xc9,0x64,0x84,0xa2, | ||
139 | 0xfc,0x4a,0x82,0x8e,0x41,0xb0,0x03,0x3c,0x30,0x00,0xbf,0x8f,0x00,0x38,0x42,0x34, | ||
140 | 0x00,0x00,0x62,0xac,0x2c,0x00,0xb5,0x8f,0xfc,0x4a,0x82,0xae,0x24,0x00,0xb3,0x8f, | ||
141 | 0x28,0x00,0xb4,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
142 | 0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0x25,0xb0,0x04,0x3c,0x00,0x80,0x02,0x3c, | ||
143 | 0xc8,0xff,0xbd,0x27,0x18,0x03,0x83,0x34,0x38,0x08,0x42,0x24,0x34,0x00,0xbf,0xaf, | ||
144 | 0x30,0x00,0xb6,0xaf,0x2c,0x00,0xb5,0xaf,0x28,0x00,0xb4,0xaf,0x24,0x00,0xb3,0xaf, | ||
145 | 0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf,0x00,0x00,0x62,0xac, | ||
146 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x02,0x80,0x16,0x3c, | ||
147 | 0x68,0x15,0xd2,0x26,0xb0,0x03,0x93,0x34,0x2d,0x02,0x00,0x08,0x21,0xa8,0x40,0x02, | ||
148 | 0x2a,0xb0,0x02,0x3c,0x08,0x00,0x04,0xae,0x09,0x00,0x42,0x34,0x01,0x00,0x03,0x24, | ||
149 | 0x02,0x00,0x04,0x24,0x00,0x00,0x43,0xa0,0x00,0x00,0x44,0xa0,0x42,0x00,0x34,0x12, | ||
150 | 0x00,0x00,0x00,0x00,0x6c,0x64,0x42,0x8e,0xd8,0x64,0x50,0x8e,0x01,0x00,0x04,0x24, | ||
151 | 0x00,0x00,0x62,0xae,0x70,0x64,0x42,0xae,0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c, | ||
152 | 0x00,0x00,0x00,0x00,0xd8,0x64,0x44,0x8e,0xdc,0x64,0x43,0x8e,0x20,0x00,0x84,0x24, | ||
153 | 0x3f,0x00,0x62,0x24,0x2b,0x10,0x44,0x00,0x0a,0x18,0x82,0x00,0xd8,0x64,0x43,0xae, | ||
154 | 0xd8,0x64,0xa5,0x8e,0x00,0x00,0x00,0x00,0x00,0x00,0x65,0xae,0x02,0x80,0x02,0x3c, | ||
155 | 0xff,0xff,0x10,0x32,0x25,0x80,0x02,0x02,0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92, | ||
156 | 0xff,0x00,0x14,0x24,0x01,0x00,0x04,0x24,0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92, | ||
157 | 0x20,0x10,0x02,0x3c,0x20,0x00,0x07,0x24,0x00,0x1a,0x11,0x00,0x21,0x18,0x62,0x00, | ||
158 | 0x05,0x00,0x34,0x12,0x21,0x30,0x60,0x00,0x6c,0x64,0xa3,0xae,0x10,0x64,0xb1,0xa2, | ||
159 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x04,0x00,0x04,0x8e,0x08,0x00,0x03,0x8e, | ||
160 | 0xff,0xe0,0x02,0x3c,0xff,0xff,0x42,0x34,0x1f,0x00,0x84,0x30,0x24,0x18,0x62,0x00, | ||
161 | 0x00,0x26,0x04,0x00,0xff,0xdf,0x02,0x3c,0x25,0x18,0x64,0x00,0xff,0xff,0x42,0x34, | ||
162 | 0x24,0x18,0x62,0x00,0x00,0x40,0x04,0x3c,0x25,0x18,0x64,0x00,0xc0,0xff,0x05,0x24, | ||
163 | 0x82,0x11,0x03,0x00,0x24,0x20,0x65,0x00,0x01,0x00,0x42,0x30,0xc0,0xff,0x40,0x10, | ||
164 | 0x04,0x00,0x84,0x34,0x2a,0xb0,0x02,0x3c,0x08,0x00,0x03,0xae,0x09,0x00,0x42,0x34, | ||
165 | 0x01,0x00,0x03,0x24,0x02,0x00,0x04,0x24,0x00,0x00,0x43,0xa0,0x00,0x00,0x44,0xa0, | ||
166 | 0xc0,0xff,0x34,0x16,0x00,0x00,0x00,0x00,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
167 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x68,0x15,0xc2,0x26,0xfc,0x4a,0x43,0x8c, | ||
168 | 0x34,0x00,0xbf,0x8f,0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f, | ||
169 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
170 | 0x00,0x38,0x63,0x34,0x41,0xb0,0x04,0x3c,0x38,0x00,0xbd,0x27,0x00,0x00,0x83,0xac, | ||
171 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0x43,0xac,0x25,0xb0,0x04,0x3c,0x00,0x80,0x02,0x3c, | ||
172 | 0xc0,0xff,0xbd,0x27,0x18,0x03,0x83,0x34,0x08,0x0a,0x42,0x24,0x38,0x00,0xbf,0xaf, | ||
173 | 0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x2c,0x00,0xb5,0xaf,0x28,0x00,0xb4,0xaf, | ||
174 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
175 | 0x00,0x00,0x62,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
176 | 0x02,0x80,0x17,0x3c,0x68,0x15,0xf2,0x26,0xb0,0x03,0x93,0x34,0x02,0x80,0x14,0x3c, | ||
177 | 0xab,0x02,0x00,0x08,0x21,0xb0,0x40,0x02,0x2a,0xb0,0x03,0x3c,0x08,0x00,0x04,0xae, | ||
178 | 0x05,0x00,0x63,0x34,0x01,0x00,0x02,0x24,0x02,0x00,0x04,0x24,0x00,0x00,0x62,0xa0, | ||
179 | 0x00,0x00,0x64,0xa0,0xca,0x7d,0x82,0x96,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24, | ||
180 | 0xca,0x7d,0x82,0xa6,0xca,0x7d,0x83,0x96,0x25,0xb0,0x02,0x3c,0x66,0x03,0x42,0x34, | ||
181 | 0x00,0x00,0x43,0xa4,0x4a,0x00,0x35,0x12,0x00,0x00,0x00,0x00,0x60,0x64,0x42,0x8e, | ||
182 | 0xcc,0x64,0x50,0x8e,0x01,0x00,0x04,0x24,0x00,0x00,0x62,0xae,0x64,0x64,0x42,0xae, | ||
183 | 0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00,0xcc,0x64,0x44,0x8e, | ||
184 | 0xd0,0x64,0x43,0x8e,0x20,0x00,0x84,0x24,0x3f,0x00,0x62,0x24,0x2b,0x10,0x44,0x00, | ||
185 | 0x0a,0x18,0x82,0x00,0xcc,0x64,0x43,0xae,0xcc,0x64,0xc5,0x8e,0x00,0x00,0x00,0x00, | ||
186 | 0x00,0x00,0x65,0xae,0x02,0x80,0x02,0x3c,0xff,0xff,0x10,0x32,0x25,0x80,0x02,0x02, | ||
187 | 0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92,0xff,0x00,0x15,0x24,0x01,0x00,0x04,0x24, | ||
188 | 0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92,0x20,0x10,0x02,0x3c,0x20,0x00,0x07,0x24, | ||
189 | 0x00,0x1a,0x11,0x00,0x21,0x18,0x62,0x00,0x05,0x00,0x35,0x12,0x21,0x30,0x60,0x00, | ||
190 | 0x60,0x64,0xc3,0xae,0x0c,0x64,0xd1,0xa2,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
191 | 0x04,0x00,0x04,0x8e,0x08,0x00,0x03,0x8e,0xff,0xe0,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
192 | 0x1f,0x00,0x84,0x30,0x24,0x18,0x62,0x00,0x00,0x26,0x04,0x00,0xff,0xdf,0x02,0x3c, | ||
193 | 0x25,0x18,0x64,0x00,0xff,0xff,0x42,0x34,0x24,0x18,0x62,0x00,0x00,0x40,0x04,0x3c, | ||
194 | 0x25,0x18,0x64,0x00,0xc0,0xff,0x05,0x24,0x82,0x11,0x03,0x00,0x24,0x20,0x65,0x00, | ||
195 | 0x01,0x00,0x42,0x30,0xb8,0xff,0x40,0x10,0x04,0x00,0x84,0x34,0x08,0x00,0x03,0xae, | ||
196 | 0x2a,0xb0,0x03,0x3c,0x05,0x00,0x63,0x34,0x01,0x00,0x02,0x24,0x02,0x00,0x04,0x24, | ||
197 | 0x00,0x00,0x62,0xa0,0x00,0x00,0x64,0xa0,0xca,0x7d,0x82,0x96,0x00,0x00,0x00,0x00, | ||
198 | 0x01,0x00,0x42,0x24,0xca,0x7d,0x82,0xa6,0xca,0x7d,0x83,0x96,0x25,0xb0,0x02,0x3c, | ||
199 | 0x66,0x03,0x42,0x34,0x00,0x00,0x43,0xa4,0xb8,0xff,0x35,0x16,0x00,0x00,0x00,0x00, | ||
200 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
201 | 0x68,0x15,0xe2,0x26,0xfc,0x4a,0x43,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
202 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
203 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x00,0x38,0x63,0x34, | ||
204 | 0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x83,0xac,0x08,0x00,0xe0,0x03, | ||
205 | 0xfc,0x4a,0x43,0xac,0xc0,0xff,0xbd,0x27,0x2c,0x00,0xb5,0xaf,0x38,0x00,0xbf,0xaf, | ||
206 | 0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x28,0x00,0xb4,0xaf,0x24,0x00,0xb3,0xaf, | ||
207 | 0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf,0x02,0x80,0x06,0x3c, | ||
208 | 0x7c,0x7e,0xc5,0x90,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c,0x18,0x03,0x42,0x34, | ||
209 | 0x24,0x0c,0x63,0x24,0x40,0x00,0xa4,0x30,0x00,0x00,0x43,0xac,0x21,0xa8,0x00,0x00, | ||
210 | 0x03,0x00,0x80,0x10,0x7f,0x00,0xa2,0x30,0xbf,0x00,0xa2,0x30,0x01,0x00,0x15,0x24, | ||
211 | 0x7c,0x7e,0xc2,0xa0,0x7c,0x7e,0xc2,0x90,0x25,0xb0,0x04,0x3c,0x88,0x02,0x83,0x34, | ||
212 | 0x00,0x00,0x62,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
213 | 0x02,0x80,0x16,0x3c,0x68,0x15,0xd2,0x26,0xb0,0x03,0x93,0x34,0x02,0x80,0x14,0x3c, | ||
214 | 0x43,0x03,0x00,0x08,0x21,0xb8,0x40,0x02,0x24,0x10,0xa2,0x00,0x04,0x00,0x42,0x34, | ||
215 | 0x2a,0xb0,0x07,0x3c,0x08,0x00,0x02,0xae,0x0d,0x00,0xe2,0x34,0x04,0x00,0x43,0x24, | ||
216 | 0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24,0x02,0x00,0x03,0x24,0x00,0x00,0x44,0xa0, | ||
217 | 0x00,0x00,0x43,0xa0,0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c,0x66,0x03,0xc5,0x34, | ||
218 | 0x01,0x00,0x84,0x24,0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96,0xff,0x00,0x03,0x24, | ||
219 | 0x00,0x00,0xa2,0xa4,0x5a,0x00,0x23,0x12,0x00,0x00,0x00,0x00,0x24,0x64,0x42,0x8e, | ||
220 | 0x90,0x64,0x50,0x8e,0x03,0x00,0x04,0x24,0x00,0x00,0x62,0xae,0x28,0x64,0x42,0xae, | ||
221 | 0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00,0x90,0x64,0x44,0x8e, | ||
222 | 0x94,0x64,0x43,0x8e,0x20,0x00,0x84,0x24,0x3f,0x00,0x62,0x24,0x2b,0x10,0x44,0x00, | ||
223 | 0x0a,0x18,0x82,0x00,0x90,0x64,0x43,0xae,0x90,0x64,0xe2,0x8e,0x00,0x00,0x00,0x00, | ||
224 | 0x00,0x00,0x62,0xae,0x02,0x80,0x02,0x3c,0xff,0xff,0x10,0x32,0x25,0x80,0x02,0x02, | ||
225 | 0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xae, | ||
226 | 0x0c,0x00,0x11,0x92,0xff,0x00,0x02,0x24,0x0d,0x00,0x22,0x12,0x00,0x12,0x11,0x00, | ||
227 | 0x20,0x10,0x03,0x3c,0x21,0x10,0x43,0x00,0x5a,0x00,0xa0,0x12,0x24,0x64,0xe2,0xae, | ||
228 | 0xec,0x63,0xf1,0xa2,0x68,0x15,0xc2,0x26,0x24,0x64,0x46,0x8c,0x90,0x64,0x45,0x8c, | ||
229 | 0x03,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
230 | 0x04,0x00,0x04,0x8e,0x14,0x00,0x03,0x8e,0x08,0x00,0x05,0x8e,0xff,0xe0,0x02,0x3c, | ||
231 | 0x1f,0x00,0x84,0x30,0x42,0x1a,0x03,0x00,0xff,0xff,0x42,0x34,0x00,0x26,0x04,0x00, | ||
232 | 0x24,0x28,0xa2,0x00,0x3f,0x00,0x63,0x30,0x25,0x28,0xa4,0x00,0x0c,0x00,0x63,0x28, | ||
233 | 0x06,0x00,0x60,0x14,0x21,0x20,0xa0,0x00,0x00,0x00,0x02,0x96,0x00,0x00,0x00,0x00, | ||
234 | 0xfd,0x0f,0x42,0x28,0x08,0x00,0x40,0x14,0x82,0x11,0x05,0x00,0xff,0xdf,0x02,0x3c, | ||
235 | 0xff,0xff,0x42,0x34,0x24,0x28,0x82,0x00,0x00,0x40,0x03,0x3c,0x25,0x20,0xa3,0x00, | ||
236 | 0x21,0x28,0x80,0x00,0x82,0x11,0x05,0x00,0x01,0x00,0x42,0x30,0xa6,0xff,0x40,0x10, | ||
237 | 0xc0,0xff,0x02,0x24,0x2a,0xb0,0x07,0x3c,0x0d,0x00,0xe2,0x34,0x04,0x00,0x43,0x24, | ||
238 | 0x08,0x00,0x04,0xae,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24,0x02,0x00,0x03,0x24, | ||
239 | 0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0,0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c, | ||
240 | 0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24,0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96, | ||
241 | 0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4,0xa8,0xff,0x23,0x16,0x00,0x00,0x00,0x00, | ||
242 | 0x22,0x00,0xa0,0x12,0x68,0x15,0xc2,0x26,0xec,0x63,0x43,0x90,0x41,0x00,0xe4,0x34, | ||
243 | 0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0,0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40, | ||
244 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
245 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa4,0x8c, | ||
246 | 0x01,0x00,0x02,0x3c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f,0x30,0x00,0xb6,0x8f, | ||
247 | 0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f, | ||
248 | 0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x00,0x80,0x42,0x34,0x25,0x20,0x82,0x00, | ||
249 | 0x41,0xb0,0x03,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x64,0xac,0x08,0x00,0xe0,0x03, | ||
250 | 0xfc,0x4a,0xa4,0xac,0x65,0x03,0x00,0x08,0xe8,0x63,0xf1,0xa2,0xe8,0x63,0x43,0x90, | ||
251 | 0x40,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0,0x00,0x00,0xa3,0xac, | ||
252 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x00,0x60,0x01,0x40, | ||
253 | 0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x68,0x15,0xc5,0x26, | ||
254 | 0xfc,0x4a,0xa4,0x8c,0x01,0x00,0x02,0x3c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
255 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
256 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x00,0x80,0x42,0x34, | ||
257 | 0x25,0x20,0x82,0x00,0x41,0xb0,0x03,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x64,0xac, | ||
258 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa4,0xac,0xc0,0xff,0xbd,0x27,0x2c,0x00,0xb5,0xaf, | ||
259 | 0x38,0x00,0xbf,0xaf,0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x28,0x00,0xb4,0xaf, | ||
260 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
261 | 0x02,0x80,0x06,0x3c,0x7c,0x7e,0xc5,0x90,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
262 | 0x18,0x03,0x42,0x34,0x78,0x0f,0x63,0x24,0x10,0x00,0xa4,0x30,0x00,0x00,0x43,0xac, | ||
263 | 0x21,0xa8,0x00,0x00,0x03,0x00,0x80,0x10,0xdf,0x00,0xa2,0x30,0xef,0x00,0xa2,0x30, | ||
264 | 0x01,0x00,0x15,0x24,0x7c,0x7e,0xc2,0xa0,0x7c,0x7e,0xc3,0x90,0x25,0xb0,0x02,0x3c, | ||
265 | 0xb0,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40, | ||
266 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x02,0x80,0x16,0x3c,0x68,0x15,0xd2,0x26, | ||
267 | 0x21,0x98,0x40,0x00,0x02,0x80,0x14,0x3c,0x19,0x04,0x00,0x08,0x21,0xb8,0x40,0x02, | ||
268 | 0x24,0x10,0xa2,0x00,0x04,0x00,0x42,0x34,0x2a,0xb0,0x07,0x3c,0x08,0x00,0x02,0xae, | ||
269 | 0x15,0x00,0xe2,0x34,0x04,0x00,0x43,0x24,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24, | ||
270 | 0x02,0x00,0x03,0x24,0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0,0xca,0x7d,0x84,0x96, | ||
271 | 0x25,0xb0,0x06,0x3c,0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24,0xca,0x7d,0x84,0xa6, | ||
272 | 0xca,0x7d,0x82,0x96,0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4,0x5a,0x00,0x23,0x12, | ||
273 | 0x00,0x00,0x00,0x00,0x30,0x64,0x42,0x8e,0x9c,0x64,0x50,0x8e,0x04,0x00,0x04,0x24, | ||
274 | 0x00,0x00,0x62,0xae,0x34,0x64,0x42,0xae,0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c, | ||
275 | 0x00,0x00,0x00,0x00,0x9c,0x64,0x44,0x8e,0xa0,0x64,0x43,0x8e,0x20,0x00,0x84,0x24, | ||
276 | 0x3f,0x00,0x62,0x24,0x2b,0x10,0x44,0x00,0x0a,0x18,0x82,0x00,0x9c,0x64,0x43,0xae, | ||
277 | 0x9c,0x64,0xe2,0x8e,0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xae,0x02,0x80,0x02,0x3c, | ||
278 | 0xff,0xff,0x10,0x32,0x25,0x80,0x02,0x02,0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92, | ||
279 | 0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92,0xff,0x00,0x02,0x24, | ||
280 | 0x0d,0x00,0x22,0x12,0x00,0x12,0x11,0x00,0x20,0x10,0x03,0x3c,0x21,0x10,0x43,0x00, | ||
281 | 0x59,0x00,0xa0,0x12,0x30,0x64,0xe2,0xae,0xf4,0x63,0xf1,0xa2,0x68,0x15,0xc2,0x26, | ||
282 | 0x30,0x64,0x46,0x8c,0x9c,0x64,0x45,0x8c,0x04,0x00,0x04,0x24,0x20,0x00,0x07,0x24, | ||
283 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x04,0x00,0x04,0x8e,0x14,0x00,0x03,0x8e, | ||
284 | 0x08,0x00,0x05,0x8e,0xff,0xe0,0x02,0x3c,0x1f,0x00,0x84,0x30,0x42,0x1a,0x03,0x00, | ||
285 | 0xff,0xff,0x42,0x34,0x00,0x26,0x04,0x00,0x24,0x28,0xa2,0x00,0x3f,0x00,0x63,0x30, | ||
286 | 0x25,0x28,0xa4,0x00,0x0c,0x00,0x63,0x28,0x06,0x00,0x60,0x14,0x21,0x20,0xa0,0x00, | ||
287 | 0x00,0x00,0x02,0x96,0x00,0x00,0x00,0x00,0xfd,0x0f,0x42,0x28,0x08,0x00,0x40,0x14, | ||
288 | 0x82,0x11,0x05,0x00,0xff,0xdf,0x02,0x3c,0xff,0xff,0x42,0x34,0x24,0x28,0x82,0x00, | ||
289 | 0x00,0x40,0x03,0x3c,0x25,0x20,0xa3,0x00,0x21,0x28,0x80,0x00,0x82,0x11,0x05,0x00, | ||
290 | 0x01,0x00,0x42,0x30,0xa6,0xff,0x40,0x10,0xc0,0xff,0x02,0x24,0x2a,0xb0,0x07,0x3c, | ||
291 | 0x15,0x00,0xe2,0x34,0x04,0x00,0x43,0x24,0x08,0x00,0x04,0xae,0x0b,0x10,0x75,0x00, | ||
292 | 0x01,0x00,0x04,0x24,0x02,0x00,0x03,0x24,0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0, | ||
293 | 0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c,0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24, | ||
294 | 0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96,0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4, | ||
295 | 0xa8,0xff,0x23,0x16,0x00,0x00,0x00,0x00,0x21,0x00,0xa0,0x12,0x68,0x15,0xc2,0x26, | ||
296 | 0xf4,0x63,0x43,0x90,0x43,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
297 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
298 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
299 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
300 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
301 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x06,0x00,0x03,0x3c, | ||
302 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
303 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0x3b,0x04,0x00,0x08,0xf0,0x63,0xf1,0xa2, | ||
304 | 0xf0,0x63,0x43,0x90,0x42,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
305 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
306 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
307 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
308 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
309 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x06,0x00,0x03,0x3c, | ||
310 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
311 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0xc0,0xff,0xbd,0x27,0x2c,0x00,0xb5,0xaf, | ||
312 | 0x38,0x00,0xbf,0xaf,0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x28,0x00,0xb4,0xaf, | ||
313 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
314 | 0x02,0x80,0x06,0x3c,0x7c,0x7e,0xc5,0x90,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
315 | 0x18,0x03,0x42,0x34,0xc8,0x12,0x63,0x24,0x01,0x00,0xa4,0x30,0x00,0x00,0x43,0xac, | ||
316 | 0x21,0xa8,0x00,0x00,0x03,0x00,0x80,0x10,0xf7,0x00,0xa2,0x30,0xfe,0x00,0xa2,0x30, | ||
317 | 0x01,0x00,0x15,0x24,0x7c,0x7e,0xc2,0xa0,0x7c,0x7e,0xc3,0x90,0x25,0xb0,0x02,0x3c, | ||
318 | 0xb0,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
319 | 0x00,0x60,0x81,0x40,0x02,0x80,0x16,0x3c,0x68,0x15,0xd2,0x26,0x21,0x98,0x40,0x00, | ||
320 | 0x02,0x80,0x14,0x3c,0xf8,0x04,0x00,0x08,0x21,0xb8,0x40,0x02,0x00,0x00,0x02,0x96, | ||
321 | 0x00,0x00,0x00,0x00,0xfd,0x0f,0x42,0x28,0x54,0x00,0x40,0x10,0xff,0xdf,0x02,0x3c, | ||
322 | 0x00,0x20,0x02,0x3c,0x25,0x28,0xa2,0x00,0x82,0x11,0x05,0x00,0x01,0x00,0x42,0x30, | ||
323 | 0x57,0x00,0x40,0x14,0x2a,0xb0,0x07,0x3c,0xc0,0xff,0x02,0x24,0x24,0x10,0xa2,0x00, | ||
324 | 0x04,0x00,0x42,0x34,0x2a,0xb0,0x07,0x3c,0x08,0x00,0x02,0xae,0x1d,0x00,0xe2,0x34, | ||
325 | 0x04,0x00,0x43,0x24,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24,0x02,0x00,0x03,0x24, | ||
326 | 0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0,0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c, | ||
327 | 0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24,0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96, | ||
328 | 0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4,0x53,0x00,0x23,0x12,0x00,0x00,0x00,0x00, | ||
329 | 0x3c,0x64,0x42,0x8e,0xa8,0x64,0x50,0x8e,0x05,0x00,0x04,0x24,0x00,0x00,0x62,0xae, | ||
330 | 0x40,0x64,0x42,0xae,0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
331 | 0xa8,0x64,0x44,0x8e,0xac,0x64,0x43,0x8e,0x20,0x00,0x84,0x24,0x3f,0x00,0x62,0x24, | ||
332 | 0x2b,0x10,0x44,0x00,0x0a,0x18,0x82,0x00,0xa8,0x64,0x43,0xae,0xa8,0x64,0xe2,0x8e, | ||
333 | 0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xae,0x02,0x80,0x02,0x3c,0xff,0xff,0x10,0x32, | ||
334 | 0x25,0x80,0x02,0x02,0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92,0x00,0x00,0x00,0x00, | ||
335 | 0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92,0xff,0x00,0x02,0x24,0x0d,0x00,0x22,0x12, | ||
336 | 0x00,0x12,0x11,0x00,0x20,0x10,0x03,0x3c,0x21,0x10,0x43,0x00,0x52,0x00,0xa0,0x12, | ||
337 | 0x3c,0x64,0xe2,0xae,0x04,0x64,0xf1,0xa2,0x68,0x15,0xc2,0x26,0x3c,0x64,0x46,0x8c, | ||
338 | 0xa8,0x64,0x45,0x8c,0x05,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c, | ||
339 | 0x10,0x00,0xa0,0xaf,0x14,0x00,0x03,0x8e,0x04,0x00,0x04,0x8e,0x08,0x00,0x05,0x8e, | ||
340 | 0x42,0x1a,0x03,0x00,0xff,0xe0,0x02,0x3c,0x1f,0x00,0x84,0x30,0x3f,0x00,0x63,0x30, | ||
341 | 0xff,0xff,0x42,0x34,0x24,0x28,0xa2,0x00,0x00,0x26,0x04,0x00,0x0c,0x00,0x63,0x28, | ||
342 | 0xaa,0xff,0x60,0x10,0x25,0x28,0xa4,0x00,0xff,0xdf,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
343 | 0x24,0x10,0xa2,0x00,0x00,0x40,0x03,0x3c,0x25,0x28,0x43,0x00,0x82,0x11,0x05,0x00, | ||
344 | 0x01,0x00,0x42,0x30,0xad,0xff,0x40,0x10,0xc0,0xff,0x02,0x24,0x2a,0xb0,0x07,0x3c, | ||
345 | 0x1d,0x00,0xe2,0x34,0x04,0x00,0x43,0x24,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24, | ||
346 | 0x02,0x00,0x03,0x24,0x08,0x00,0x05,0xae,0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0, | ||
347 | 0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c,0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24, | ||
348 | 0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96,0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4, | ||
349 | 0xaf,0xff,0x23,0x16,0x00,0x00,0x00,0x00,0x21,0x00,0xa0,0x12,0x68,0x15,0xc2,0x26, | ||
350 | 0x04,0x64,0x43,0x90,0x45,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
351 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
352 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
353 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
354 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
355 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x18,0x00,0x03,0x3c, | ||
356 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
357 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0x1a,0x05,0x00,0x08,0xf8,0x63,0xf1,0xa2, | ||
358 | 0xf8,0x63,0x43,0x90,0x44,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
359 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
360 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
361 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
362 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
363 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x18,0x00,0x03,0x3c, | ||
364 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
365 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0xc0,0xff,0xbd,0x27,0x2c,0x00,0xb5,0xaf, | ||
366 | 0x38,0x00,0xbf,0xaf,0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x28,0x00,0xb4,0xaf, | ||
367 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
368 | 0x02,0x80,0x06,0x3c,0x7c,0x7e,0xc5,0x90,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
369 | 0x18,0x03,0x42,0x34,0x28,0x16,0x63,0x24,0x02,0x00,0xa4,0x30,0x00,0x00,0x43,0xac, | ||
370 | 0x21,0xa8,0x00,0x00,0x03,0x00,0x80,0x10,0xfb,0x00,0xa2,0x30,0xfd,0x00,0xa2,0x30, | ||
371 | 0x01,0x00,0x15,0x24,0x7c,0x7e,0xc2,0xa0,0x7c,0x7e,0xc3,0x90,0x25,0xb0,0x02,0x3c, | ||
372 | 0xb0,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
373 | 0x00,0x60,0x81,0x40,0x02,0x80,0x16,0x3c,0x68,0x15,0xd2,0x26,0x21,0x98,0x40,0x00, | ||
374 | 0x02,0x80,0x14,0x3c,0xd0,0x05,0x00,0x08,0x21,0xb8,0x40,0x02,0x00,0x00,0x02,0x96, | ||
375 | 0x00,0x00,0x00,0x00,0xfd,0x0f,0x42,0x28,0x54,0x00,0x40,0x10,0xff,0xdf,0x02,0x3c, | ||
376 | 0x00,0x20,0x02,0x3c,0x25,0x28,0xa2,0x00,0x82,0x11,0x05,0x00,0x01,0x00,0x42,0x30, | ||
377 | 0x57,0x00,0x40,0x14,0x2a,0xb0,0x07,0x3c,0xc0,0xff,0x02,0x24,0x24,0x10,0xa2,0x00, | ||
378 | 0x04,0x00,0x42,0x34,0x2a,0xb0,0x07,0x3c,0x08,0x00,0x02,0xae,0x25,0x00,0xe2,0x34, | ||
379 | 0x04,0x00,0x43,0x24,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24,0x02,0x00,0x03,0x24, | ||
380 | 0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0,0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c, | ||
381 | 0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24,0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96, | ||
382 | 0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4,0x53,0x00,0x23,0x12,0x00,0x00,0x00,0x00, | ||
383 | 0x48,0x64,0x42,0x8e,0xb4,0x64,0x50,0x8e,0x06,0x00,0x04,0x24,0x00,0x00,0x62,0xae, | ||
384 | 0x4c,0x64,0x42,0xae,0x00,0x00,0x70,0xae,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
385 | 0xb4,0x64,0x44,0x8e,0xb8,0x64,0x43,0x8e,0x20,0x00,0x84,0x24,0x3f,0x00,0x62,0x24, | ||
386 | 0x2b,0x10,0x44,0x00,0x0a,0x18,0x82,0x00,0xb4,0x64,0x43,0xae,0xb4,0x64,0xe2,0x8e, | ||
387 | 0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xae,0x02,0x80,0x02,0x3c,0xff,0xff,0x10,0x32, | ||
388 | 0x25,0x80,0x02,0x02,0x00,0x00,0x70,0xae,0x0c,0x00,0x02,0x92,0x00,0x00,0x00,0x00, | ||
389 | 0x00,0x00,0x62,0xae,0x0c,0x00,0x11,0x92,0xff,0x00,0x02,0x24,0x0d,0x00,0x22,0x12, | ||
390 | 0x00,0x12,0x11,0x00,0x20,0x10,0x03,0x3c,0x21,0x10,0x43,0x00,0x52,0x00,0xa0,0x12, | ||
391 | 0x48,0x64,0xe2,0xae,0x00,0x64,0xf1,0xa2,0x68,0x15,0xc2,0x26,0x48,0x64,0x46,0x8c, | ||
392 | 0xb4,0x64,0x45,0x8c,0x06,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c, | ||
393 | 0x10,0x00,0xa0,0xaf,0x14,0x00,0x03,0x8e,0x04,0x00,0x04,0x8e,0x08,0x00,0x05,0x8e, | ||
394 | 0x42,0x1a,0x03,0x00,0xff,0xe0,0x02,0x3c,0x1f,0x00,0x84,0x30,0x3f,0x00,0x63,0x30, | ||
395 | 0xff,0xff,0x42,0x34,0x24,0x28,0xa2,0x00,0x00,0x26,0x04,0x00,0x0c,0x00,0x63,0x28, | ||
396 | 0xaa,0xff,0x60,0x10,0x25,0x28,0xa4,0x00,0xff,0xdf,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
397 | 0x24,0x10,0xa2,0x00,0x00,0x40,0x03,0x3c,0x25,0x28,0x43,0x00,0x82,0x11,0x05,0x00, | ||
398 | 0x01,0x00,0x42,0x30,0xad,0xff,0x40,0x10,0xc0,0xff,0x02,0x24,0x2a,0xb0,0x07,0x3c, | ||
399 | 0x25,0x00,0xe2,0x34,0x04,0x00,0x43,0x24,0x0b,0x10,0x75,0x00,0x01,0x00,0x04,0x24, | ||
400 | 0x02,0x00,0x03,0x24,0x08,0x00,0x05,0xae,0x00,0x00,0x44,0xa0,0x00,0x00,0x43,0xa0, | ||
401 | 0xca,0x7d,0x84,0x96,0x25,0xb0,0x06,0x3c,0x66,0x03,0xc5,0x34,0x01,0x00,0x84,0x24, | ||
402 | 0xca,0x7d,0x84,0xa6,0xca,0x7d,0x82,0x96,0xff,0x00,0x03,0x24,0x00,0x00,0xa2,0xa4, | ||
403 | 0xaf,0xff,0x23,0x16,0x00,0x00,0x00,0x00,0x21,0x00,0xa0,0x12,0x68,0x15,0xc2,0x26, | ||
404 | 0x00,0x64,0x43,0x90,0x47,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
405 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
406 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
407 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
408 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
409 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x60,0x00,0x03,0x3c, | ||
410 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
411 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0xf2,0x05,0x00,0x08,0xfc,0x63,0xf1,0xa2, | ||
412 | 0xfc,0x63,0x43,0x90,0x46,0x00,0xe4,0x34,0xb0,0x03,0xc5,0x34,0x00,0x00,0x83,0xa0, | ||
413 | 0x00,0x00,0xa3,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
414 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
415 | 0x68,0x15,0xc5,0x26,0xfc,0x4a,0xa2,0x8c,0x38,0x00,0xbf,0x8f,0x34,0x00,0xb7,0x8f, | ||
416 | 0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
417 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x60,0x00,0x03,0x3c, | ||
418 | 0x25,0x10,0x43,0x00,0x41,0xb0,0x04,0x3c,0x40,0x00,0xbd,0x27,0x00,0x00,0x82,0xac, | ||
419 | 0x08,0x00,0xe0,0x03,0xfc,0x4a,0xa2,0xac,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
420 | 0x88,0x19,0x63,0x24,0x18,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40, | ||
421 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
422 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x02,0x80,0x05,0x3c,0x68,0x15,0xa5,0x24, | ||
423 | 0x04,0x4b,0xa2,0x8c,0xfc,0x4a,0xa4,0x8c,0x00,0x08,0x03,0x3c,0x24,0x10,0x43,0x00, | ||
424 | 0x25,0x20,0x82,0x00,0x41,0xb0,0x03,0x3c,0x00,0x00,0x64,0xac,0x08,0x00,0xe0,0x03, | ||
425 | 0xfc,0x4a,0xa4,0xac,0x25,0xb0,0x04,0x3c,0x00,0x80,0x02,0x3c,0xc0,0xff,0xbd,0x27, | ||
426 | 0x18,0x03,0x83,0x34,0xe4,0x19,0x42,0x24,0x3c,0x00,0xbf,0xaf,0x38,0x00,0xbe,0xaf, | ||
427 | 0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x2c,0x00,0xb5,0xaf,0x28,0x00,0xb4,0xaf, | ||
428 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
429 | 0x00,0x00,0x62,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
430 | 0x02,0x80,0x02,0x3c,0x2a,0xb0,0x03,0x3c,0x68,0x15,0x51,0x24,0xb0,0x03,0x93,0x34, | ||
431 | 0x2c,0x00,0x77,0x34,0x02,0x80,0x15,0x3c,0x02,0x80,0x16,0x3c,0x9c,0x06,0x00,0x08, | ||
432 | 0x02,0x80,0x1e,0x3c,0x14,0x64,0x26,0x92,0xe4,0x64,0x25,0x8e,0x00,0x32,0x06,0x00, | ||
433 | 0x21,0x30,0xc2,0x00,0x78,0x64,0x26,0xae,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
434 | 0xe4,0x64,0x30,0x8e,0x0a,0x00,0x04,0x24,0x21,0x90,0x00,0x00,0x00,0x00,0x70,0xae, | ||
435 | 0x4d,0x01,0x00,0x0c,0xff,0xff,0x10,0x32,0x02,0x80,0x02,0x3c,0x25,0x80,0x02,0x02, | ||
436 | 0x0c,0x00,0x05,0x92,0x02,0x00,0x04,0x92,0xff,0x00,0x02,0x24,0xff,0x00,0xa3,0x30, | ||
437 | 0x04,0x00,0x62,0x10,0x21,0x80,0x04,0x02,0x00,0x00,0x63,0xae,0x01,0x00,0x12,0x24, | ||
438 | 0x14,0x64,0x25,0xa2,0x88,0x96,0xb0,0xae,0x21,0x28,0x00,0x02,0x02,0x00,0xa2,0x90, | ||
439 | 0x08,0x00,0x10,0x26,0x21,0x20,0x00,0x02,0xff,0x00,0x42,0x30,0x00,0x00,0x62,0xae, | ||
440 | 0x03,0x00,0xa3,0x90,0x00,0x00,0x00,0x00,0x7f,0x00,0x63,0x30,0x00,0x00,0x63,0xae, | ||
441 | 0x00,0x00,0x72,0xae,0x03,0x00,0xa2,0x90,0x84,0x96,0xc3,0x92,0x02,0x00,0xa2,0x90, | ||
442 | 0x00,0x00,0x00,0x00,0xff,0x00,0x42,0x30,0x2c,0x00,0x42,0x28,0x11,0x00,0x40,0x10, | ||
443 | 0x08,0x00,0x02,0x24,0x03,0x00,0xa2,0x90,0x00,0x00,0x00,0x00,0x7f,0x00,0x42,0x30, | ||
444 | 0x84,0x96,0xc2,0xa2,0x02,0x00,0xa3,0x90,0x02,0x80,0x02,0x3c,0x74,0x84,0x42,0x24, | ||
445 | 0xff,0x00,0x63,0x30,0xc0,0x18,0x03,0x00,0x21,0x18,0x62,0x00,0x04,0x00,0x62,0x8c, | ||
446 | 0x00,0x00,0x00,0x00,0x09,0xf8,0x40,0x00,0x80,0x96,0xc2,0xaf,0x21,0xa0,0x40,0x00, | ||
447 | 0x08,0x00,0x02,0x24,0x0a,0x00,0x04,0x24,0x05,0x00,0x82,0x12,0x00,0x01,0x07,0x24, | ||
448 | 0x01,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x01,0x00,0xe2,0xa2,0x01,0x00,0xe3,0xa2, | ||
449 | 0xbc,0xff,0x40,0x16,0x20,0x10,0x02,0x3c,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
450 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0xfc,0x4a,0x22,0x8e,0x00,0x04,0x03,0x3c, | ||
451 | 0x41,0xb0,0x04,0x3c,0x25,0x10,0x43,0x00,0x00,0x00,0x82,0xac,0x3c,0x00,0xbf,0x8f, | ||
452 | 0xfc,0x4a,0x22,0xae,0x38,0x00,0xbe,0x8f,0x34,0x00,0xb7,0x8f,0x30,0x00,0xb6,0x8f, | ||
453 | 0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f, | ||
454 | 0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x40,0x00,0xbd,0x27, | ||
455 | 0xc8,0xff,0xbd,0x27,0xff,0xff,0xa8,0x30,0x02,0x80,0x02,0x3c,0x25,0x40,0x02,0x01, | ||
456 | 0x30,0x00,0xb6,0xaf,0x20,0x00,0xb2,0xaf,0x34,0x00,0xbf,0xaf,0x2c,0x00,0xb5,0xaf, | ||
457 | 0x28,0x00,0xb4,0xaf,0x24,0x00,0xb3,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
458 | 0x00,0x00,0x03,0x8d,0xff,0xff,0xd2,0x30,0x21,0xb0,0xa0,0x00,0x00,0xc0,0x02,0x24, | ||
459 | 0x08,0x00,0x45,0x26,0x04,0x00,0x06,0x8d,0x24,0x18,0x62,0x00,0xff,0x3f,0xa5,0x30, | ||
460 | 0xf0,0xff,0x02,0x3c,0x25,0x18,0x65,0x00,0xff,0xff,0x42,0x34,0x24,0x18,0x62,0x00, | ||
461 | 0x00,0x80,0x05,0x3c,0x25,0x18,0x65,0x00,0xff,0x01,0xc6,0x34,0x00,0x00,0x03,0xad, | ||
462 | 0x04,0x00,0x06,0xad,0x21,0x48,0x80,0x00,0xff,0xff,0xe7,0x30,0x18,0x00,0x12,0xa5, | ||
463 | 0x1a,0x00,0x07,0xa1,0x18,0x00,0x03,0x8d,0xff,0x7f,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
464 | 0x24,0x18,0x62,0x00,0x02,0x80,0x15,0x3c,0x18,0x00,0x03,0xad,0x68,0x15,0xa5,0x26, | ||
465 | 0xd6,0x63,0xa3,0x90,0x00,0x00,0x00,0x00,0x01,0x00,0x62,0x24,0xd6,0x63,0xa2,0xa0, | ||
466 | 0x18,0x00,0x04,0x8d,0xff,0x80,0x02,0x3c,0x20,0x00,0x45,0x26,0xff,0xff,0x42,0x34, | ||
467 | 0x7f,0x00,0x63,0x30,0xff,0xff,0xb2,0x30,0x24,0x20,0x82,0x00,0x00,0x1e,0x03,0x00, | ||
468 | 0x25,0xb0,0x02,0x3c,0xc0,0x00,0x42,0x34,0x25,0x20,0x83,0x00,0x07,0x00,0x45,0x32, | ||
469 | 0x18,0x00,0x04,0xad,0x00,0x00,0x52,0xa4,0x03,0x00,0xa0,0x10,0xff,0xff,0x42,0x32, | ||
470 | 0x08,0x00,0x42,0x26,0xff,0xff,0x42,0x30,0x68,0x15,0xb4,0x26,0x54,0x65,0x86,0x8e, | ||
471 | 0x58,0x65,0x90,0x8e,0xf8,0xff,0x52,0x30,0x21,0x10,0xd2,0x00,0x2b,0x10,0x02,0x02, | ||
472 | 0x31,0x00,0x40,0x10,0xff,0x00,0x33,0x31,0x23,0x80,0x06,0x02,0x21,0x28,0xc0,0x02, | ||
473 | 0xff,0xff,0x07,0x32,0x01,0x00,0x11,0x24,0x21,0x20,0x60,0x02,0x10,0x01,0x00,0x0c, | ||
474 | 0x10,0x00,0xb1,0xaf,0x23,0x18,0x50,0x02,0xff,0xff,0x72,0x30,0x22,0x10,0x02,0x3c, | ||
475 | 0x21,0x10,0x42,0x02,0x21,0x20,0x60,0x02,0x4d,0x01,0x00,0x0c,0x54,0x65,0x82,0xae, | ||
476 | 0x21,0x28,0xd0,0x02,0x21,0x38,0x40,0x02,0x21,0x20,0x60,0x02,0x10,0x00,0xb1,0xaf, | ||
477 | 0x22,0x10,0x06,0x3c,0x10,0x01,0x00,0x0c,0x68,0x15,0xb1,0x26,0x54,0x65,0x23,0x8e, | ||
478 | 0x25,0xb0,0x10,0x3c,0xb0,0x03,0x02,0x36,0x21,0x20,0x60,0x02,0x00,0x00,0x43,0xac, | ||
479 | 0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00,0x54,0x65,0x25,0x8e,0xec,0x00,0x02,0x36, | ||
480 | 0xbd,0x00,0x04,0x36,0x00,0x00,0x45,0xac,0x00,0x00,0x83,0x90,0xc2,0x00,0x10,0x36, | ||
481 | 0x34,0x00,0xbf,0x8f,0x10,0x00,0x63,0x34,0x00,0x00,0x83,0xa0,0x30,0x00,0xb6,0x8f, | ||
482 | 0x00,0x00,0x05,0xa6,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f, | ||
483 | 0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f,0x01,0x00,0x02,0x24, | ||
484 | 0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0x21,0x28,0xc0,0x02,0x21,0x20,0x60,0x02, | ||
485 | 0x21,0x38,0x40,0x02,0x01,0x00,0x02,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa2,0xaf, | ||
486 | 0x54,0x65,0x83,0x8e,0x68,0x15,0xb1,0x26,0x25,0xb0,0x10,0x3c,0x21,0x18,0x72,0x00, | ||
487 | 0x54,0x65,0x83,0xae,0x54,0x65,0x23,0x8e,0xb0,0x03,0x02,0x36,0x21,0x20,0x60,0x02, | ||
488 | 0x00,0x00,0x43,0xac,0x4d,0x01,0x00,0x0c,0x00,0x00,0x00,0x00,0x54,0x65,0x25,0x8e, | ||
489 | 0xec,0x00,0x02,0x36,0xbd,0x00,0x04,0x36,0x00,0x00,0x45,0xac,0x00,0x00,0x83,0x90, | ||
490 | 0xc2,0x00,0x10,0x36,0x34,0x00,0xbf,0x8f,0x10,0x00,0x63,0x34,0x00,0x00,0x83,0xa0, | ||
491 | 0x30,0x00,0xb6,0x8f,0x00,0x00,0x05,0xa6,0x2c,0x00,0xb5,0x8f,0x28,0x00,0xb4,0x8f, | ||
492 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
493 | 0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27, | ||
494 | 0x25,0xb0,0x02,0x3c,0x14,0x00,0xb1,0xaf,0x18,0x00,0xbf,0xaf,0x10,0x00,0xb0,0xaf, | ||
495 | 0xbf,0x00,0x42,0x34,0x00,0x00,0x43,0x90,0x21,0x28,0x00,0x00,0x08,0x00,0x06,0x24, | ||
496 | 0x04,0x00,0x63,0x2c,0x12,0x00,0x60,0x14,0x21,0x88,0x80,0x00,0x00,0x60,0x02,0x40, | ||
497 | 0x01,0x00,0x41,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x02,0x80,0x03,0x3c, | ||
498 | 0x00,0x7b,0x63,0x24,0x04,0x00,0x64,0x8c,0x00,0x00,0x23,0xae,0x04,0x00,0x71,0xac, | ||
499 | 0x00,0x00,0x91,0xac,0x04,0x00,0x24,0xae,0x00,0x60,0x82,0x40,0x18,0x00,0xbf,0x8f, | ||
500 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
501 | 0x08,0x00,0x82,0x94,0x02,0x80,0x04,0x3c,0x97,0x45,0x00,0x0c,0x25,0x20,0x44,0x00, | ||
502 | 0x00,0x60,0x10,0x40,0x01,0x00,0x01,0x36,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
503 | 0x08,0x00,0x25,0x8e,0x0c,0x00,0x26,0x96,0x14,0x00,0x27,0x96,0xf0,0x06,0x00,0x0c, | ||
504 | 0x09,0x00,0x04,0x24,0x04,0x00,0x23,0x8e,0x00,0x00,0x22,0x8e,0x21,0x20,0x20,0x02, | ||
505 | 0x00,0x00,0x62,0xac,0x04,0x00,0x43,0xac,0x00,0x00,0x31,0xae,0xbd,0x4e,0x00,0x0c, | ||
506 | 0x04,0x00,0x31,0xae,0x00,0x60,0x90,0x40,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f, | ||
507 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0x02,0x80,0x02,0x3c, | ||
508 | 0x68,0x15,0x47,0x24,0x8c,0x64,0xe3,0x90,0xff,0xff,0xa5,0x30,0x09,0x00,0xa3,0x10, | ||
509 | 0x21,0x20,0xc0,0x00,0xfc,0x64,0xe2,0x8c,0x00,0x00,0x00,0x00,0x08,0x00,0xc2,0xac, | ||
510 | 0x06,0x65,0xe3,0x94,0x0e,0x00,0x02,0x24,0x14,0x00,0xc2,0xac,0x8b,0x07,0x00,0x08, | ||
511 | 0x0c,0x00,0xc3,0xac,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x00,0x80,0x03,0x3c, | ||
512 | 0x25,0xb0,0x02,0x3c,0xd0,0xff,0xbd,0x27,0x4c,0x1f,0x63,0x24,0x18,0x03,0x42,0x34, | ||
513 | 0x28,0x00,0xbf,0xaf,0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf, | ||
514 | 0x18,0x00,0xb0,0xaf,0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
515 | 0x00,0x60,0x81,0x40,0x2a,0xb0,0x02,0x3c,0x36,0x00,0x42,0x34,0x00,0x00,0x43,0x90, | ||
516 | 0x02,0x80,0x13,0x3c,0x68,0x15,0x66,0x26,0xc0,0x18,0x03,0x00,0x5c,0x65,0xc5,0x8c, | ||
517 | 0x23,0xb0,0x04,0x3c,0xf0,0x07,0x63,0x30,0xff,0x1f,0x02,0x3c,0x21,0x18,0x64,0x00, | ||
518 | 0xff,0xff,0x42,0x34,0x24,0x20,0x62,0x00,0x23,0x88,0x85,0x00,0x2b,0x38,0x85,0x00, | ||
519 | 0x00,0x04,0x22,0x26,0x00,0x65,0xc3,0x8c,0x0b,0x88,0x47,0x00,0x01,0x04,0x25,0x2e, | ||
520 | 0xfc,0x64,0xc3,0xac,0x60,0x65,0xc4,0xac,0x06,0x65,0xc0,0xa4,0x11,0x00,0xa0,0x14, | ||
521 | 0x05,0x65,0xc0,0xa0,0x00,0xfc,0x83,0x24,0x23,0x10,0x02,0x3c,0x0b,0x18,0x87,0x00, | ||
522 | 0xff,0x03,0x42,0x34,0x2b,0x10,0x43,0x00,0x33,0x00,0x40,0x14,0x00,0x00,0x00,0x00, | ||
523 | 0x23,0x88,0x83,0x00,0x2b,0x10,0x83,0x00,0x5c,0x65,0xc3,0xac,0x03,0x00,0x40,0x10, | ||
524 | 0x01,0x04,0x25,0x2e,0x00,0x04,0x31,0x26,0x01,0x04,0x25,0x2e,0x0e,0x00,0xa0,0x10, | ||
525 | 0x68,0x15,0x70,0x26,0x68,0x15,0x70,0x26,0x60,0x65,0x03,0x8e,0x5c,0x65,0x04,0x8e, | ||
526 | 0x00,0x00,0x00,0x00,0x2b,0x10,0x83,0x00,0x25,0x00,0x40,0x14,0x2b,0x10,0x64,0x00, | ||
527 | 0x51,0x00,0x40,0x14,0x25,0xb0,0x02,0x3c,0x80,0x00,0x03,0x24,0xd0,0x03,0x42,0x34, | ||
528 | 0x00,0x00,0x43,0xac,0x68,0x15,0x70,0x26,0x5c,0x65,0x03,0x96,0x2a,0xb0,0x02,0x3c, | ||
529 | 0x35,0x00,0x42,0x34,0xc2,0x88,0x03,0x00,0x00,0x00,0x51,0xa0,0x8f,0x10,0x00,0x0c, | ||
530 | 0x00,0x00,0x00,0x00,0x06,0x65,0x03,0x96,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34, | ||
531 | 0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
532 | 0x00,0x60,0x81,0x40,0xfc,0x4a,0x02,0x8e,0x80,0x00,0x03,0x3c,0x41,0xb0,0x04,0x3c, | ||
533 | 0x25,0x10,0x43,0x00,0x00,0x00,0x82,0xac,0x28,0x00,0xbf,0x8f,0xfc,0x4a,0x02,0xae, | ||
534 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
535 | 0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27,0x00,0x08,0x00,0x08,0x00,0xfc,0x63,0x24, | ||
536 | 0xfc,0x64,0x05,0x8e,0x21,0x30,0x80,0x00,0xff,0xff,0x27,0x32,0x09,0x00,0x04,0x24, | ||
537 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0xfc,0x64,0x03,0x8e,0x06,0x65,0x05,0x96, | ||
538 | 0x5c,0x65,0x02,0x8e,0x21,0x18,0x71,0x00,0x21,0x28,0x25,0x02,0x21,0x10,0x51,0x00, | ||
539 | 0x09,0x00,0x04,0x24,0x5c,0x65,0x02,0xae,0xfc,0x64,0x03,0xae,0x4d,0x01,0x00,0x0c, | ||
540 | 0x06,0x65,0x05,0xa6,0x68,0x15,0x70,0x26,0x5c,0x65,0x03,0x96,0x2a,0xb0,0x02,0x3c, | ||
541 | 0x35,0x00,0x42,0x34,0xc2,0x88,0x03,0x00,0x00,0x00,0x51,0xa0,0x8f,0x10,0x00,0x0c, | ||
542 | 0x00,0x00,0x00,0x00,0x06,0x65,0x03,0x96,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34, | ||
543 | 0x00,0x00,0x43,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
544 | 0x00,0x60,0x81,0x40,0xfc,0x4a,0x02,0x8e,0x80,0x00,0x03,0x3c,0x41,0xb0,0x04,0x3c, | ||
545 | 0x25,0x10,0x43,0x00,0x00,0x00,0x82,0xac,0x28,0x00,0xbf,0x8f,0xfc,0x4a,0x02,0xae, | ||
546 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
547 | 0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27,0x64,0x65,0x02,0x8e,0xfc,0x64,0x05,0x8e, | ||
548 | 0x21,0x30,0x80,0x00,0x23,0x88,0x44,0x00,0xff,0xff,0x27,0x32,0x09,0x00,0x04,0x24, | ||
549 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0xfc,0x64,0x03,0x8e,0x06,0x65,0x02,0x96, | ||
550 | 0x60,0x65,0x12,0x96,0x21,0x18,0x71,0x00,0x21,0x10,0x22,0x02,0x23,0x10,0x11,0x3c, | ||
551 | 0xfc,0x64,0x03,0xae,0x06,0x65,0x02,0xa6,0x06,0x00,0x40,0x16,0x5c,0x65,0x11,0xae, | ||
552 | 0x09,0x00,0x04,0x24,0x4d,0x01,0x00,0x0c,0x68,0x15,0x70,0x26,0x46,0x08,0x00,0x08, | ||
553 | 0x00,0x00,0x00,0x00,0x4d,0x01,0x00,0x0c,0x09,0x00,0x04,0x24,0xfc,0x64,0x05,0x8e, | ||
554 | 0x09,0x00,0x04,0x24,0x23,0x10,0x06,0x3c,0x21,0x38,0x40,0x02,0x10,0x01,0x00,0x0c, | ||
555 | 0x10,0x00,0xa0,0xaf,0xfc,0x64,0x03,0x8e,0x06,0x65,0x02,0x96,0x21,0x20,0x51,0x02, | ||
556 | 0x21,0x18,0x72,0x00,0x21,0x10,0x42,0x02,0x5c,0x65,0x04,0xae,0x09,0x00,0x04,0x24, | ||
557 | 0xfc,0x64,0x03,0xae,0x75,0x08,0x00,0x08,0x06,0x65,0x02,0xa6,0x02,0x80,0x09,0x3c, | ||
558 | 0x68,0x15,0x28,0x25,0xdc,0x63,0x06,0x8d,0xff,0xff,0x02,0x34,0x3f,0x00,0xc2,0x10, | ||
559 | 0x21,0x38,0x80,0x00,0x2b,0x10,0xc7,0x00,0x30,0x00,0x40,0x10,0x02,0x19,0x06,0x00, | ||
560 | 0x21,0x10,0xc7,0x00,0x23,0x10,0x43,0x00,0x10,0x00,0x46,0x24,0xdc,0x63,0x06,0xad, | ||
561 | 0x68,0x15,0x26,0x25,0x04,0x40,0xc4,0x8c,0xe0,0x63,0x02,0xad,0xff,0xff,0x02,0x34, | ||
562 | 0x2f,0x00,0x82,0x10,0x00,0x00,0x00,0x00,0x2b,0x10,0x87,0x00,0x1f,0x00,0x40,0x10, | ||
563 | 0x02,0x19,0x04,0x00,0x21,0x10,0x87,0x00,0x23,0x10,0x43,0x00,0x10,0x00,0x44,0x24, | ||
564 | 0x04,0x40,0xc4,0xac,0xe0,0x63,0xc2,0xac,0xc0,0x10,0x05,0x00,0x21,0x10,0x45,0x00, | ||
565 | 0x80,0x10,0x02,0x00,0x21,0x10,0x45,0x00,0x68,0x15,0x23,0x25,0x80,0x10,0x02,0x00, | ||
566 | 0x21,0x28,0x43,0x00,0x68,0x51,0xa6,0x8c,0x00,0x21,0x07,0x00,0xff,0xff,0xc2,0x38, | ||
567 | 0x0a,0x30,0x82,0x00,0x2b,0x18,0xc7,0x00,0x07,0x00,0x60,0x10,0x21,0x10,0xc7,0x00, | ||
568 | 0x02,0x19,0x06,0x00,0x23,0x10,0x43,0x00,0x10,0x00,0x46,0x24,0x68,0x51,0xa6,0xac, | ||
569 | 0x08,0x00,0xe0,0x03,0x6c,0x51,0xa2,0xac,0x02,0x19,0x06,0x00,0x23,0x10,0x43,0x00, | ||
570 | 0x68,0x51,0xa2,0xac,0x08,0x00,0xe0,0x03,0x6c,0x51,0xa2,0xac,0x21,0x10,0x87,0x00, | ||
571 | 0x23,0x10,0x43,0x00,0xa5,0x08,0x00,0x08,0x04,0x40,0xc2,0xac,0x21,0x10,0xc7,0x00, | ||
572 | 0x68,0x15,0x26,0x25,0x04,0x40,0xc4,0x8c,0x23,0x10,0x43,0x00,0xdc,0x63,0x02,0xad, | ||
573 | 0xe0,0x63,0x02,0xad,0xff,0xff,0x02,0x34,0xd4,0xff,0x82,0x14,0x2b,0x10,0x87,0x00, | ||
574 | 0x00,0x21,0x07,0x00,0x9e,0x08,0x00,0x08,0x04,0x40,0xc4,0xac,0x00,0x31,0x04,0x00, | ||
575 | 0x91,0x08,0x00,0x08,0xdc,0x63,0x06,0xad,0x63,0x00,0x82,0x24,0x77,0x00,0x42,0x2c, | ||
576 | 0x00,0x00,0x85,0x28,0x04,0x00,0x40,0x10,0x21,0x18,0x00,0x00,0x64,0x00,0x82,0x24, | ||
577 | 0x64,0x00,0x03,0x24,0x0b,0x18,0x45,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
578 | 0x0c,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x3f,0x00,0x42,0x30,0x04,0x00,0x42,0x28, | ||
579 | 0x17,0x00,0x40,0x10,0x25,0xb0,0x02,0x3c,0x24,0x08,0x42,0x34,0x00,0x00,0x43,0x8c, | ||
580 | 0x00,0x00,0x00,0x00,0x00,0x02,0x63,0x30,0x16,0x00,0x60,0x14,0x01,0x00,0x02,0x24, | ||
581 | 0x05,0x00,0xa3,0x90,0x00,0x00,0x00,0x00,0x82,0x21,0x03,0x00,0x28,0x00,0x82,0x10, | ||
582 | 0xf5,0xff,0x02,0x24,0x02,0x00,0x82,0x28,0x39,0x00,0x40,0x14,0x02,0x00,0x02,0x24, | ||
583 | 0x2e,0x00,0x82,0x10,0xe9,0xff,0x02,0x24,0x03,0x00,0x02,0x24,0x24,0x00,0x82,0x10, | ||
584 | 0x3e,0x00,0x63,0x30,0x05,0x00,0xc4,0x24,0xd2,0x08,0x00,0x08,0x00,0x00,0x00,0x00, | ||
585 | 0x04,0x00,0xa4,0x90,0x00,0x00,0x00,0x00,0x42,0x20,0x04,0x00,0xd2,0x08,0x00,0x08, | ||
586 | 0x96,0xff,0x84,0x24,0x05,0x00,0xa3,0x90,0x00,0x00,0x00,0x00,0x60,0x00,0x64,0x30, | ||
587 | 0x42,0x21,0x04,0x00,0x0e,0x00,0x82,0x10,0x1f,0x00,0x62,0x30,0x02,0x00,0x82,0x28, | ||
588 | 0x1d,0x00,0x40,0x14,0x02,0x00,0x02,0x24,0x14,0x00,0x82,0x10,0x1f,0x00,0x62,0x30, | ||
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606 | 0x21,0xb8,0x80,0x00,0x21,0xb0,0x80,0x00,0x01,0x00,0x14,0x24,0x21,0x20,0x00,0x00, | ||
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608 | 0x01,0x00,0x22,0x26,0x04,0x00,0x02,0x8e,0x00,0xf0,0x03,0x3c,0x00,0x20,0x04,0x3c, | ||
609 | 0x24,0x10,0x43,0x00,0x1e,0x00,0x44,0x10,0x06,0x00,0x22,0x26,0xff,0xff,0x51,0x30, | ||
610 | 0x82,0x16,0x05,0x00,0x01,0x00,0x42,0x30,0x34,0x00,0x54,0x10,0x00,0x00,0x00,0x00, | ||
611 | 0x80,0x20,0x11,0x00,0x2a,0x10,0x92,0x00,0xed,0xff,0x40,0x14,0x00,0x00,0x00,0x00, | ||
612 | 0xbd,0x4e,0x00,0x0c,0x21,0x20,0xc0,0x03,0x02,0x80,0x02,0x3c,0x08,0x04,0x44,0x24, | ||
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614 | 0x25,0xb0,0x03,0x3c,0x04,0x01,0x62,0x34,0x00,0x00,0x43,0x8c,0x44,0x65,0xa7,0x8e, | ||
615 | 0x00,0x00,0x00,0x00,0xcf,0xff,0xe3,0x14,0x48,0x65,0xa3,0xae,0x25,0xb0,0x03,0x3c, | ||
616 | 0x00,0x01,0x62,0x34,0x00,0x00,0x47,0xac,0x66,0x09,0x00,0x08,0x44,0x65,0xa7,0xae, | ||
617 | 0xb0,0x4c,0xe2,0x8e,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0xb0,0x4c,0xe2,0xae, | ||
618 | 0x0c,0x00,0x04,0x8e,0x0c,0x00,0x02,0x24,0x3f,0x00,0x83,0x30,0x64,0x00,0x62,0x10, | ||
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622 | 0xbc,0x4c,0xe2,0x8e,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0xbc,0x4c,0xe2,0xae, | ||
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625 | 0xc2,0x13,0x05,0x00,0x1e,0x00,0x42,0x30,0x21,0x10,0x51,0x00,0x60,0x09,0x00,0x08, | ||
626 | 0xff,0xff,0x51,0x30,0x02,0x40,0xc2,0x92,0x00,0x00,0x00,0x00,0x1e,0x00,0x40,0x14, | ||
627 | 0x02,0x80,0x03,0x3c,0x04,0x00,0x03,0x8e,0x00,0x00,0x00,0x00,0x02,0x14,0x03,0x00, | ||
628 | 0x0f,0x00,0x42,0x30,0x17,0x00,0x40,0x14,0x02,0x17,0x03,0x00,0x03,0x00,0x44,0x30, | ||
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630 | 0x03,0x00,0x02,0x24,0x10,0x00,0x82,0x10,0x02,0x80,0x03,0x3c,0x0f,0x00,0x80,0x10, | ||
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632 | 0x25,0xb0,0x02,0x3c,0xd4,0x02,0x42,0x34,0x21,0x20,0x00,0x02,0x00,0x00,0x43,0xac, | ||
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634 | 0x21,0x28,0x00,0x00,0x02,0x80,0x03,0x3c,0x68,0x15,0x63,0x24,0x02,0x40,0x62,0x90, | ||
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636 | 0x68,0x15,0x84,0x24,0x02,0x40,0x83,0x90,0x02,0x00,0x02,0x24,0x68,0x00,0x62,0x10, | ||
637 | 0x00,0x00,0x00,0x00,0x25,0xb0,0x03,0x3c,0x4c,0x00,0x63,0x34,0x00,0x00,0x62,0x90, | ||
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639 | 0x00,0x00,0x05,0x8e,0x00,0x00,0x00,0x00,0xc2,0x13,0x05,0x00,0x1e,0x00,0x42,0x30, | ||
640 | 0x21,0x10,0x51,0x00,0x60,0x09,0x00,0x08,0xff,0xff,0x51,0x30,0xd0,0x02,0x02,0x24, | ||
641 | 0x68,0x15,0x84,0x24,0xdc,0x63,0x82,0xac,0x00,0x00,0x05,0x8e,0xd3,0x09,0x00,0x08, | ||
642 | 0xc2,0x13,0x05,0x00,0xb8,0x4c,0xa2,0x8c,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24, | ||
643 | 0xb8,0x4c,0xa2,0xac,0x0c,0x00,0x04,0x8e,0x86,0x09,0x00,0x08,0x3f,0x00,0x83,0x30, | ||
644 | 0xb4,0x4c,0xe2,0x8e,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0xb4,0x4c,0xe2,0xae, | ||
645 | 0x0c,0x00,0x04,0x8e,0x82,0x09,0x00,0x08,0x3f,0x00,0x83,0x30,0x4c,0x65,0xa2,0x8e, | ||
646 | 0xff,0xff,0x71,0x30,0x23,0x10,0x47,0x00,0xff,0xff,0x50,0x30,0x21,0x18,0x11,0x02, | ||
647 | 0xff,0xff,0x72,0x30,0xa1,0x4e,0x00,0x0c,0x21,0x20,0x40,0x02,0x76,0x00,0x40,0x10, | ||
648 | 0x21,0xf0,0x40,0x00,0x08,0x00,0x42,0x8c,0x44,0x65,0xa6,0x8e,0x21,0x38,0x00,0x02, | ||
649 | 0x21,0x18,0x52,0x00,0x21,0x28,0x40,0x00,0x08,0x00,0x04,0x24,0x14,0x65,0xa3,0xae, | ||
650 | 0x18,0x65,0xa2,0xae,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x4d,0x01,0x00,0x0c, | ||
651 | 0x08,0x00,0x04,0x24,0x18,0x65,0xa5,0x8e,0x25,0xb0,0x03,0x3c,0x24,0x10,0x02,0x3c, | ||
652 | 0x21,0x28,0xb0,0x00,0x00,0x01,0x70,0x34,0x00,0x00,0x02,0xae,0x21,0x38,0x20,0x02, | ||
653 | 0x08,0x00,0x04,0x24,0x24,0x10,0x06,0x3c,0x44,0x65,0xa2,0xae,0x10,0x01,0x00,0x0c, | ||
654 | 0x10,0x00,0xa0,0xaf,0x48,0x65,0xa3,0x8e,0x08,0x00,0x04,0x24,0x4d,0x01,0x00,0x0c, | ||
655 | 0x44,0x65,0xa3,0xae,0x44,0x65,0xa2,0x8e,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0xae, | ||
656 | 0x46,0x09,0x00,0x08,0x02,0x80,0x02,0x3c,0x23,0x10,0x67,0x00,0xff,0xff,0x52,0x30, | ||
657 | 0xa1,0x4e,0x00,0x0c,0x21,0x20,0x40,0x02,0x56,0x00,0x40,0x10,0x21,0xf0,0x40,0x00, | ||
658 | 0x08,0x00,0x42,0x8c,0x44,0x65,0xa6,0x8e,0x08,0x00,0x04,0x24,0x21,0x18,0x52,0x00, | ||
659 | 0x21,0x28,0x40,0x00,0x21,0x38,0x40,0x02,0x14,0x65,0xa3,0xae,0x18,0x65,0xa2,0xae, | ||
660 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x48,0x65,0xa3,0x8e,0x08,0x00,0x04,0x24, | ||
661 | 0x4d,0x01,0x00,0x0c,0x44,0x65,0xa3,0xae,0x44,0x65,0xa3,0x8e,0x25,0xb0,0x04,0x3c, | ||
662 | 0x00,0x01,0x82,0x34,0x00,0x00,0x43,0xac,0x46,0x09,0x00,0x08,0x02,0x80,0x02,0x3c, | ||
663 | 0x04,0x00,0x03,0x8e,0x00,0x00,0x00,0x00,0x02,0x14,0x03,0x00,0x0f,0x00,0x42,0x30, | ||
664 | 0x08,0x00,0x42,0x28,0x93,0xff,0x40,0x10,0x02,0x17,0x03,0x00,0x03,0x00,0x42,0x30, | ||
665 | 0x90,0xff,0x40,0x14,0x80,0x10,0x11,0x00,0x21,0x28,0x53,0x00,0xec,0xff,0xa3,0x8c, | ||
666 | 0x25,0xb0,0x02,0x3c,0xd4,0x02,0x42,0x34,0x21,0x20,0x00,0x02,0x00,0x00,0x43,0xac, | ||
667 | 0xdc,0x08,0x00,0x0c,0x00,0x00,0x00,0x00,0x21,0x20,0x40,0x00,0x8b,0x08,0x00,0x0c, | ||
668 | 0x21,0x28,0x00,0x00,0xca,0x09,0x00,0x08,0x25,0xb0,0x03,0x3c,0x04,0x00,0x03,0x8e, | ||
669 | 0x00,0x00,0x00,0x00,0x02,0x14,0x03,0x00,0x0f,0x00,0x42,0x30,0x08,0x00,0x42,0x28, | ||
670 | 0x06,0x00,0x40,0x10,0x00,0xc0,0x02,0x3c,0x02,0x17,0x03,0x00,0x03,0x00,0x42,0x30, | ||
671 | 0x0c,0x00,0x40,0x10,0x80,0x10,0x11,0x00,0x00,0xc0,0x02,0x3c,0x24,0x10,0x62,0x00, | ||
672 | 0x6f,0xff,0x40,0x14,0x02,0x80,0x04,0x3c,0x02,0x17,0x03,0x00,0x03,0x00,0x42,0x30, | ||
673 | 0x03,0x00,0x03,0x24,0x6b,0xff,0x43,0x10,0x68,0x15,0x84,0x24,0x67,0xff,0x40,0x10, | ||
674 | 0x80,0x10,0x11,0x00,0x21,0x28,0x53,0x00,0xec,0xff,0xa3,0x8c,0x25,0xb0,0x02,0x3c, | ||
675 | 0xd4,0x02,0x42,0x34,0x21,0x20,0x00,0x02,0x00,0x00,0x43,0xac,0xdc,0x08,0x00,0x0c, | ||
676 | 0x00,0x00,0x00,0x00,0x21,0x20,0x40,0x00,0x8b,0x08,0x00,0x0c,0x21,0x28,0x00,0x00, | ||
677 | 0xc4,0x09,0x00,0x08,0x02,0x80,0x04,0x3c,0x25,0xb0,0x04,0x3c,0x44,0x44,0x02,0x3c, | ||
678 | 0xbc,0x02,0x83,0x34,0x44,0x44,0x42,0x34,0x00,0x00,0x62,0xac,0x67,0x09,0x00,0x08, | ||
679 | 0x02,0x80,0x02,0x3c,0x48,0x65,0xa5,0x8e,0x25,0xb0,0x04,0x3c,0x66,0x66,0x02,0x3c, | ||
680 | 0x00,0x01,0x83,0x34,0x66,0x66,0x42,0x34,0xbc,0x02,0x84,0x34,0x00,0x00,0x65,0xac, | ||
681 | 0x00,0x00,0x82,0xac,0x66,0x09,0x00,0x08,0x44,0x65,0xa5,0xae,0x00,0x60,0x02,0x40, | ||
682 | 0x01,0x00,0x41,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x02,0x80,0x03,0x3c, | ||
683 | 0xd8,0x8c,0x64,0xac,0x00,0x60,0x82,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
684 | 0x02,0x80,0x02,0x3c,0xd8,0x8c,0x45,0x8c,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
685 | 0x18,0x03,0x42,0x34,0x10,0x2a,0x63,0x24,0x00,0x00,0x43,0xac,0x04,0x00,0x02,0x24, | ||
686 | 0x1e,0x00,0xa2,0x10,0x05,0x00,0xa2,0x2c,0x10,0x00,0x40,0x10,0x05,0x00,0x02,0x24, | ||
687 | 0x03,0x00,0x02,0x24,0x08,0x00,0xa2,0x10,0x00,0x19,0x04,0x00,0x80,0x10,0x04,0x00, | ||
688 | 0x21,0x10,0x44,0x00,0xc0,0x10,0x02,0x00,0x23,0x10,0x44,0x00,0x00,0x11,0x02,0x00, | ||
689 | 0x21,0x10,0x44,0x00,0x40,0x19,0x02,0x00,0xff,0xff,0x63,0x24,0xfe,0xff,0x60,0x14, | ||
690 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xf3,0xff,0xa2,0x10, | ||
691 | 0x06,0x00,0x02,0x24,0xf2,0xff,0xa2,0x14,0x80,0x10,0x04,0x00,0x40,0x11,0x04,0x00, | ||
692 | 0x23,0x10,0x44,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x44,0x00,0x00,0x19,0x02,0x00, | ||
693 | 0x23,0x18,0x62,0x00,0x9a,0x0a,0x00,0x08,0x00,0x19,0x03,0x00,0x80,0x10,0x04,0x00, | ||
694 | 0x21,0x10,0x44,0x00,0xc0,0x10,0x02,0x00,0x23,0x10,0x44,0x00,0x00,0x11,0x02,0x00, | ||
695 | 0x21,0x10,0x44,0x00,0x9a,0x0a,0x00,0x08,0x00,0x19,0x02,0x00,0x02,0x80,0x02,0x3c, | ||
696 | 0xd8,0x8c,0x45,0x8c,0x00,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c,0x18,0x03,0x42,0x34, | ||
697 | 0xcc,0x2a,0x63,0x24,0x00,0x00,0x43,0xac,0x05,0x00,0x02,0x24,0x10,0x00,0xa2,0x10, | ||
698 | 0x06,0x00,0xa2,0x2c,0x09,0x00,0x40,0x14,0x04,0x00,0x02,0x24,0x06,0x00,0x02,0x24, | ||
699 | 0x0f,0x00,0xa2,0x10,0x00,0x11,0x04,0x00,0xff,0xff,0x84,0x24,0xfe,0xff,0x80,0x14, | ||
700 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xfa,0xff,0xa2,0x14, | ||
701 | 0x80,0x10,0x04,0x00,0x21,0x10,0x44,0x00,0xc2,0x0a,0x00,0x08,0x40,0x20,0x02,0x00, | ||
702 | 0x80,0x10,0x04,0x00,0x21,0x10,0x44,0x00,0xc2,0x0a,0x00,0x08,0x80,0x20,0x02,0x00, | ||
703 | 0x23,0x10,0x44,0x00,0xc2,0x0a,0x00,0x08,0x40,0x20,0x02,0x00,0xff,0xff,0x85,0x30, | ||
704 | 0x21,0x30,0x00,0x00,0x25,0xb0,0x03,0x3c,0x2a,0xb0,0x04,0x3c,0xb4,0x00,0x63,0x34, | ||
705 | 0x01,0x00,0xa2,0x24,0x31,0x00,0x84,0x34,0x00,0x00,0x65,0xa0,0x00,0x00,0x85,0xa0, | ||
706 | 0xff,0xff,0x45,0x30,0x12,0x00,0xa0,0x10,0x01,0x00,0x03,0x24,0x28,0xb0,0x07,0x3c, | ||
707 | 0xe8,0x0a,0x00,0x08,0xff,0xff,0x08,0x24,0x00,0x00,0x83,0xa0,0x01,0x00,0x63,0x24, | ||
708 | 0xff,0xff,0x63,0x30,0x2b,0x10,0xa3,0x00,0x09,0x00,0x40,0x14,0x08,0x00,0xc6,0x24, | ||
709 | 0xf9,0xff,0x65,0x14,0x21,0x20,0xc7,0x00,0x01,0x00,0x63,0x24,0xff,0xff,0x63,0x30, | ||
710 | 0x2b,0x10,0xa3,0x00,0x00,0x00,0x88,0xa0,0xf9,0xff,0x40,0x10,0x08,0x00,0xc6,0x24, | ||
711 | 0x00,0x01,0xa2,0x2c,0x13,0x00,0x40,0x10,0x21,0x18,0xa0,0x00,0xff,0x00,0x08,0x24, | ||
712 | 0x28,0xb0,0x07,0x3c,0xfc,0x0a,0x00,0x08,0xff,0xff,0x09,0x24,0xff,0xff,0x43,0x30, | ||
713 | 0x00,0x00,0xa2,0xa0,0x00,0x01,0x62,0x2c,0x0a,0x00,0x40,0x10,0x08,0x00,0xc6,0x24, | ||
714 | 0x01,0x00,0x62,0x24,0xf9,0xff,0x68,0x14,0x21,0x28,0xc7,0x00,0x00,0x01,0x02,0x24, | ||
715 | 0xff,0xff,0x43,0x30,0x00,0x01,0x62,0x2c,0x00,0x00,0xa9,0xa0,0xf8,0xff,0x40,0x14, | ||
716 | 0x08,0x00,0xc6,0x24,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xd8,0xff,0xbd,0x27, | ||
717 | 0x24,0x00,0xbf,0xaf,0x20,0x00,0xb4,0xaf,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf, | ||
718 | 0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
719 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x25,0xb0,0x10,0x3c,0x42,0x00,0x14,0x36, | ||
720 | 0xff,0xff,0x02,0x24,0x00,0x00,0x82,0xa2,0xd8,0x00,0x05,0x36,0x40,0x00,0x11,0x36, | ||
721 | 0xa8,0x00,0x13,0x36,0xa0,0x00,0x12,0x36,0x00,0x10,0x03,0x24,0xa4,0x00,0x10,0x36, | ||
722 | 0x00,0x80,0x02,0x3c,0x00,0x00,0x23,0xa6,0x00,0x00,0xa0,0xa0,0x00,0x00,0x40,0xae, | ||
723 | 0x00,0x00,0x00,0xae,0x00,0x00,0x62,0xae,0x00,0x00,0xa3,0x90,0x80,0xff,0x02,0x24, | ||
724 | 0xfd,0x00,0x04,0x24,0x25,0x18,0x62,0x00,0xfc,0x17,0x02,0x24,0x00,0x00,0xa3,0xa0, | ||
725 | 0x00,0x00,0x22,0xa6,0xd3,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c, | ||
726 | 0x68,0x15,0x42,0x24,0x68,0x4b,0x45,0x8c,0x60,0x4b,0x43,0x8c,0x64,0x4b,0x44,0x8c, | ||
727 | 0xfc,0x37,0x02,0x24,0x00,0x00,0x43,0xae,0x00,0x00,0x04,0xae,0x00,0x00,0x65,0xae, | ||
728 | 0x00,0x00,0x22,0xa6,0x00,0x00,0x80,0xa2,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
729 | 0x00,0x60,0x81,0x40,0x24,0x00,0xbf,0x8f,0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f, | ||
730 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03, | ||
731 | 0x28,0x00,0xbd,0x27,0xd0,0xff,0xbd,0x27,0x2c,0x00,0xbf,0xaf,0x28,0x00,0xb6,0xaf, | ||
732 | 0x24,0x00,0xb5,0xaf,0x20,0x00,0xb4,0xaf,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf, | ||
733 | 0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
734 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x25,0xb0,0x10,0x3c,0x40,0x00,0x05,0x36, | ||
735 | 0x00,0x00,0xa2,0x94,0x24,0xfa,0x03,0x24,0xa8,0x00,0x13,0x36,0x24,0x10,0x43,0x00, | ||
736 | 0x00,0x00,0xa2,0xa4,0xa0,0x00,0x12,0x36,0xa4,0x00,0x10,0x36,0x00,0x00,0x55,0x8e, | ||
737 | 0x00,0x00,0x16,0x8e,0x00,0x00,0x71,0x8e,0x00,0x80,0x14,0x3c,0xfc,0x37,0x02,0x24, | ||
738 | 0x00,0x00,0x40,0xae,0xfd,0x00,0x04,0x24,0x00,0x00,0x00,0xae,0x21,0x88,0x34,0x02, | ||
739 | 0x00,0x00,0x74,0xae,0x00,0x00,0xa2,0xa4,0xd3,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
740 | 0x00,0x00,0x55,0xae,0x00,0x00,0x16,0xae,0x00,0x00,0x71,0xae,0x00,0x60,0x01,0x40, | ||
741 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x2c,0x00,0xbf,0x8f,0x28,0x00,0xb6,0x8f, | ||
742 | 0x24,0x00,0xb5,0x8f,0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f, | ||
743 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27, | ||
744 | 0xd0,0xff,0xbd,0x27,0x2c,0x00,0xbf,0xaf,0x28,0x00,0xb6,0xaf,0x24,0x00,0xb5,0xaf, | ||
745 | 0x20,0x00,0xb4,0xaf,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf,0x14,0x00,0xb1,0xaf, | ||
746 | 0x10,0x00,0xb0,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
747 | 0x00,0x60,0x81,0x40,0x25,0xb0,0x10,0x3c,0x40,0x00,0x05,0x36,0x00,0x00,0xa2,0x94, | ||
748 | 0xaf,0xff,0x03,0x24,0xa8,0x00,0x13,0x36,0x24,0x10,0x43,0x00,0x00,0x00,0xa2,0xa4, | ||
749 | 0xa0,0x00,0x12,0x36,0xa4,0x00,0x10,0x36,0x00,0x00,0x55,0x8e,0x00,0x00,0x16,0x8e, | ||
750 | 0x00,0x00,0x71,0x8e,0x00,0x80,0x14,0x3c,0xfc,0x37,0x02,0x24,0x00,0x00,0x40,0xae, | ||
751 | 0xfd,0x00,0x04,0x24,0x00,0x00,0x00,0xae,0x21,0x88,0x34,0x02,0x00,0x00,0x74,0xae, | ||
752 | 0x00,0x00,0xa2,0xa4,0xd3,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x55,0xae, | ||
753 | 0x00,0x00,0x16,0xae,0x00,0x00,0x71,0xae,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
754 | 0x00,0x60,0x81,0x40,0x2c,0x00,0xbf,0x8f,0x28,0x00,0xb6,0x8f,0x24,0x00,0xb5,0x8f, | ||
755 | 0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
756 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27,0x00,0x60,0x01,0x40, | ||
757 | 0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x25,0xb0,0x04,0x3c, | ||
758 | 0x40,0x00,0x84,0x34,0x00,0x00,0x82,0x94,0xd8,0xfd,0x03,0x24,0x24,0x10,0x43,0x00, | ||
759 | 0xfc,0x37,0x03,0x24,0x00,0x00,0x82,0xa4,0x00,0x00,0x83,0xa4,0x00,0x60,0x01,0x40, | ||
760 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
761 | 0x00,0x00,0x82,0x8c,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xff,0xff,0xc6,0x30, | ||
762 | 0x10,0x00,0x02,0x24,0x0c,0x00,0xc2,0x10,0x11,0x00,0xc3,0x28,0x06,0x00,0x60,0x10, | ||
763 | 0x20,0x00,0x02,0x24,0x08,0x00,0x02,0x24,0x0d,0x00,0xc2,0x10,0x00,0x00,0x00,0x00, | ||
764 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x06,0x00,0xc2,0x10,0x00,0x00,0x00,0x00, | ||
765 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x85,0xa4,0x08,0x00,0xe0,0x03, | ||
766 | 0x00,0x00,0x00,0x00,0x00,0x00,0x85,0xac,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
767 | 0x00,0x00,0x85,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
768 | 0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x25,0xb0,0x02,0x3c, | ||
769 | 0x0a,0x00,0x42,0x34,0x00,0x00,0x43,0x90,0xff,0xff,0xa5,0x24,0x00,0x2c,0x05,0x00, | ||
770 | 0xfd,0x00,0x63,0x30,0x03,0x2c,0x05,0x00,0xff,0xff,0x87,0x30,0x00,0x00,0x43,0xa0, | ||
771 | 0x1a,0x00,0xa0,0x04,0x00,0x00,0x00,0x00,0x21,0x30,0x40,0x00,0x07,0x10,0xa7,0x00, | ||
772 | 0x01,0x00,0x42,0x30,0xfd,0x00,0x64,0x30,0x00,0x00,0x42,0x38,0x02,0x00,0x63,0x34, | ||
773 | 0x0a,0x18,0x82,0x00,0x00,0x00,0xc3,0xa0,0x04,0x00,0x63,0x34,0x00,0x00,0xc3,0xa0, | ||
774 | 0x09,0x00,0x02,0x24,0xff,0xff,0x42,0x24,0xff,0xff,0x41,0x04,0xff,0xff,0x42,0x24, | ||
775 | 0xfb,0x00,0x63,0x30,0x00,0x00,0xc3,0xa0,0x04,0x00,0x02,0x24,0xff,0xff,0x42,0x24, | ||
776 | 0xff,0xff,0x41,0x04,0xff,0xff,0x42,0x24,0xff,0xff,0xa2,0x24,0x00,0x2c,0x02,0x00, | ||
777 | 0x03,0x2c,0x05,0x00,0xea,0xff,0xa1,0x04,0x07,0x10,0xa7,0x00,0x08,0x00,0xe0,0x03, | ||
778 | 0x00,0x00,0x00,0x00,0x25,0xb0,0x02,0x3c,0x0a,0x00,0x42,0x34,0x00,0x00,0x43,0x90, | ||
779 | 0xff,0xff,0x84,0x24,0x00,0x24,0x04,0x00,0x03,0x24,0x04,0x00,0xff,0x00,0x65,0x30, | ||
780 | 0x1d,0x00,0x80,0x04,0x21,0x38,0x00,0x00,0x21,0x30,0x40,0x00,0x01,0x00,0x08,0x24, | ||
781 | 0x04,0x00,0xa5,0x34,0x00,0x00,0xc5,0xa0,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00, | ||
782 | 0xff,0x00,0x45,0x30,0x01,0x00,0xa3,0x30,0x05,0x00,0x60,0x10,0x04,0x00,0x02,0x24, | ||
783 | 0x04,0x10,0x88,0x00,0x25,0x10,0x47,0x00,0xff,0xff,0x47,0x30,0x04,0x00,0x02,0x24, | ||
784 | 0xff,0xff,0x42,0x24,0xff,0xff,0x41,0x04,0xff,0xff,0x42,0x24,0xfb,0x00,0xa5,0x30, | ||
785 | 0x00,0x00,0xc5,0xa0,0x09,0x00,0x02,0x24,0xff,0xff,0x42,0x24,0xff,0xff,0x41,0x04, | ||
786 | 0xff,0xff,0x42,0x24,0xff,0xff,0x82,0x24,0x00,0x24,0x02,0x00,0x03,0x24,0x04,0x00, | ||
787 | 0xe7,0xff,0x81,0x04,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0xe0,0x00, | ||
788 | 0xe0,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0x25,0xb0,0x10,0x3c,0x0a,0x00,0x10,0x36, | ||
789 | 0x18,0x00,0xbf,0xaf,0x14,0x00,0xb1,0xaf,0x00,0x00,0x02,0x92,0xff,0xff,0x91,0x30, | ||
790 | 0x03,0x00,0x05,0x24,0xc0,0x00,0x42,0x30,0x80,0x00,0x43,0x34,0x00,0x00,0x03,0xa2, | ||
791 | 0x04,0x00,0x63,0x34,0x00,0x00,0x03,0xa2,0xfb,0x00,0x63,0x30,0x00,0x00,0x03,0xa2, | ||
792 | 0x08,0x00,0x63,0x34,0x00,0x00,0x03,0xa2,0x04,0x00,0x63,0x34,0x00,0x00,0x03,0xa2, | ||
793 | 0xfb,0x00,0x63,0x30,0x00,0x00,0x03,0xa2,0xd7,0x0b,0x00,0x0c,0x06,0x00,0x04,0x24, | ||
794 | 0x42,0x20,0x11,0x00,0xd7,0x0b,0x00,0x0c,0x06,0x00,0x05,0x24,0xfd,0x0b,0x00,0x0c, | ||
795 | 0x10,0x00,0x04,0x24,0x00,0x00,0x03,0x92,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f, | ||
796 | 0xc0,0x00,0x63,0x30,0x00,0x00,0x03,0xa2,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03, | ||
797 | 0x20,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0xff,0xff,0xb1,0x30, | ||
798 | 0x18,0x00,0xb2,0xaf,0x10,0x00,0xb0,0xaf,0x1c,0x00,0xbf,0xaf,0x21,0x90,0xc0,0x00, | ||
799 | 0x0a,0x00,0x20,0x12,0xff,0xff,0x90,0x30,0x24,0x0c,0x00,0x0c,0x21,0x20,0x00,0x02, | ||
800 | 0xfe,0xff,0x23,0x26,0x02,0x00,0x04,0x26,0x00,0x00,0x42,0xa6,0xff,0xff,0x71,0x30, | ||
801 | 0xff,0xff,0x90,0x30,0xf8,0xff,0x20,0x16,0x02,0x00,0x52,0x26,0x1c,0x00,0xbf,0x8f, | ||
802 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03, | ||
803 | 0x20,0x00,0xbd,0x27,0x25,0xb0,0x03,0x3c,0x0a,0x00,0x68,0x34,0x00,0x00,0x02,0x91, | ||
804 | 0xff,0xff,0xa5,0x30,0xff,0x00,0x84,0x30,0x1f,0x00,0xa0,0x10,0xff,0x00,0x47,0x30, | ||
805 | 0x21,0x48,0x00,0x01,0x0c,0x00,0x6c,0x34,0x0b,0x00,0x6b,0x34,0xc0,0xff,0x0a,0x24, | ||
806 | 0x21,0x68,0x00,0x01,0x25,0x10,0xea,0x00,0xff,0x00,0x47,0x30,0x00,0x00,0x64,0xa1, | ||
807 | 0x00,0x00,0x27,0xa1,0x00,0x00,0x22,0x91,0x00,0x00,0x00,0x00,0xff,0x00,0x47,0x30, | ||
808 | 0xc0,0x00,0xe3,0x30,0x08,0x00,0x60,0x10,0x00,0x00,0x00,0x00,0x21,0x40,0xa0,0x01, | ||
809 | 0x00,0x00,0x02,0x91,0x00,0x00,0x00,0x00,0xff,0x00,0x47,0x30,0xc0,0x00,0xe3,0x30, | ||
810 | 0xfb,0xff,0x60,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x82,0x8d,0xfc,0xff,0xa3,0x24, | ||
811 | 0x04,0x00,0x84,0x24,0xff,0xff,0x65,0x30,0x00,0x00,0xc2,0xac,0xff,0x00,0x84,0x30, | ||
812 | 0xe8,0xff,0xa0,0x14,0x04,0x00,0xc6,0x24,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
813 | 0xff,0x00,0x84,0x30,0x21,0x68,0xe0,0x00,0xff,0xff,0xa5,0x30,0xc0,0x50,0x04,0x00, | ||
814 | 0x00,0x60,0x0c,0x40,0x01,0x00,0x81,0x35,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
815 | 0x00,0x00,0xc2,0x90,0x01,0x00,0xc3,0x90,0x25,0xb0,0x07,0x3c,0x00,0x14,0x02,0x00, | ||
816 | 0x25,0x28,0xa2,0x00,0x00,0x1e,0x03,0x00,0x01,0x80,0x08,0x3c,0x25,0x20,0xa3,0x00, | ||
817 | 0x40,0x02,0xe9,0x34,0x25,0x18,0x48,0x01,0x44,0x02,0xe7,0x34,0x00,0x00,0xe4,0xac, | ||
818 | 0x00,0x00,0x23,0xad,0x03,0x00,0xc2,0x90,0x02,0x00,0xc4,0x90,0x04,0x00,0xc3,0x90, | ||
819 | 0x05,0x00,0xc5,0x90,0x00,0x12,0x02,0x00,0x25,0x20,0x82,0x00,0x00,0x1c,0x03,0x00, | ||
820 | 0x01,0x00,0x4a,0x25,0x25,0x20,0x83,0x00,0x00,0x2e,0x05,0x00,0x25,0x40,0x48,0x01, | ||
821 | 0x25,0x20,0x85,0x00,0x00,0x00,0xe4,0xac,0x01,0x00,0x4a,0x25,0x00,0x00,0x28,0xad, | ||
822 | 0x01,0x80,0x0b,0x3c,0x21,0x40,0x00,0x00,0x21,0x10,0xa8,0x01,0x01,0x00,0x43,0x90, | ||
823 | 0x00,0x00,0x45,0x90,0x02,0x00,0x44,0x90,0x03,0x00,0x46,0x90,0x00,0x1a,0x03,0x00, | ||
824 | 0x25,0x28,0xa3,0x00,0x00,0x24,0x04,0x00,0x25,0x28,0xa4,0x00,0x00,0x36,0x06,0x00, | ||
825 | 0x04,0x00,0x08,0x25,0x25,0x10,0x4b,0x01,0x25,0x20,0xa6,0x00,0x10,0x00,0x03,0x2d, | ||
826 | 0x00,0x00,0xe4,0xac,0x01,0x00,0x4a,0x25,0x00,0x00,0x22,0xad,0xee,0xff,0x60,0x14, | ||
827 | 0x00,0x00,0x00,0x00,0x00,0x60,0x8c,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
828 | 0xff,0xff,0x84,0x30,0x42,0xb0,0x08,0x3c,0x80,0x10,0x04,0x00,0x21,0x10,0x48,0x00, | ||
829 | 0x04,0x00,0x46,0xac,0x00,0x00,0x07,0x91,0x40,0x18,0x04,0x00,0x03,0x00,0x06,0x24, | ||
830 | 0xff,0x00,0xe7,0x30,0x04,0x30,0x66,0x00,0x01,0x00,0x02,0x24,0x04,0x10,0x62,0x00, | ||
831 | 0x25,0x30,0xc7,0x00,0xff,0xff,0xa5,0x30,0x25,0x10,0x47,0x00,0x02,0x00,0xa0,0x14, | ||
832 | 0xff,0x00,0xc7,0x30,0xff,0x00,0x47,0x30,0x42,0xb0,0x02,0x3c,0x00,0x00,0x47,0xa0, | ||
833 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x42,0xb0,0x02,0x3c,0x03,0x00,0x47,0x34, | ||
834 | 0x00,0x00,0xe3,0x90,0xff,0x00,0x84,0x30,0x04,0x00,0x84,0x24,0xff,0x00,0x65,0x30, | ||
835 | 0x01,0x00,0x02,0x24,0x04,0x30,0x82,0x00,0x07,0x18,0x85,0x00,0x25,0xb0,0x02,0x3c, | ||
836 | 0xe8,0x03,0x42,0x34,0x01,0x00,0x63,0x30,0x21,0x20,0xc0,0x00,0x00,0x00,0x45,0xa0, | ||
837 | 0x02,0x00,0x60,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0xe6,0xa0,0x08,0x00,0xe0,0x03, | ||
838 | 0x24,0x10,0x85,0x00,0x00,0x60,0x03,0x40,0x01,0x00,0x61,0x34,0x01,0x00,0x21,0x38, | ||
839 | 0x00,0x60,0x81,0x40,0x02,0x80,0x02,0x3c,0xdc,0x8c,0x42,0x24,0x04,0x00,0x45,0x8c, | ||
840 | 0x00,0x00,0x82,0xac,0x04,0x00,0x44,0xac,0x00,0x00,0xa4,0xac,0x04,0x00,0x85,0xac, | ||
841 | 0x00,0x60,0x83,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x14,0x00,0x83,0x90, | ||
842 | 0x01,0x00,0x02,0x24,0x08,0x00,0x86,0xac,0x18,0x00,0x85,0xac,0x00,0x00,0x84,0xac, | ||
843 | 0x03,0x00,0x62,0x10,0x04,0x00,0x84,0xac,0xed,0x0c,0x00,0x08,0x0c,0x00,0x80,0xac, | ||
844 | 0x0c,0x00,0x82,0x8c,0xed,0x0c,0x00,0x08,0x10,0x00,0x82,0xac,0x00,0x60,0x03,0x40, | ||
845 | 0x01,0x00,0x61,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x04,0x00,0x85,0x8c, | ||
846 | 0x00,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0xac,0x04,0x00,0x45,0xac, | ||
847 | 0x00,0x00,0x84,0xac,0x04,0x00,0x84,0xac,0x00,0x60,0x83,0x40,0x08,0x00,0xe0,0x03, | ||
848 | 0x00,0x00,0x00,0x00,0xd0,0xff,0xbd,0x27,0x28,0x00,0xb6,0xaf,0x24,0x00,0xb5,0xaf, | ||
849 | 0x20,0x00,0xb4,0xaf,0x14,0x00,0xb1,0xaf,0x2c,0x00,0xbf,0xaf,0x1c,0x00,0xb3,0xaf, | ||
850 | 0x18,0x00,0xb2,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x80,0x16,0x3c,0x02,0x80,0x14,0x3c, | ||
851 | 0x02,0x80,0x11,0x3c,0x02,0x80,0x15,0x3c,0xc4,0x7d,0x24,0x8e,0x25,0xb0,0x02,0x3c, | ||
852 | 0x54,0x34,0xc3,0x26,0x18,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0xdc,0x8c,0x90,0x8e, | ||
853 | 0x18,0x00,0x80,0x10,0xdc,0x8c,0x82,0x26,0x15,0x00,0x02,0x12,0x00,0x00,0x00,0x00, | ||
854 | 0x21,0x98,0x40,0x00,0x01,0x00,0x12,0x24,0x14,0x00,0x02,0x92,0x00,0x00,0x00,0x00, | ||
855 | 0x1d,0x00,0x52,0x10,0x00,0x00,0x00,0x00,0x09,0x00,0x40,0x14,0x00,0x00,0x00,0x00, | ||
856 | 0x0c,0x00,0x03,0x8e,0xc4,0x7d,0x22,0x8e,0x00,0x00,0x00,0x00,0x23,0x20,0x62,0x00, | ||
857 | 0x2b,0x10,0x43,0x00,0x0e,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0xae, | ||
858 | 0x00,0x00,0x10,0x8e,0x00,0x00,0x00,0x00,0xef,0xff,0x13,0x16,0x00,0x00,0x00,0x00, | ||
859 | 0xc4,0x7d,0x20,0xae,0x08,0x0c,0xa4,0x26,0x21,0x28,0x00,0x00,0x21,0x30,0x00,0x00, | ||
860 | 0x31,0x1c,0x00,0x0c,0x21,0x38,0x00,0x00,0x22,0x0d,0x00,0x08,0x00,0x00,0x00,0x00, | ||
861 | 0x08,0x00,0x02,0x8e,0x18,0x00,0x04,0x8e,0x09,0xf8,0x40,0x00,0x00,0x00,0x00,0x00, | ||
862 | 0x3c,0x0d,0x00,0x08,0x0c,0x00,0x02,0xae,0x0c,0x00,0x03,0x8e,0xc4,0x7d,0x22,0x8e, | ||
863 | 0x00,0x00,0x00,0x00,0x23,0x20,0x62,0x00,0x2b,0x10,0x43,0x00,0xe7,0xff,0x40,0x14, | ||
864 | 0x00,0x00,0x00,0x00,0x08,0x00,0x02,0x8e,0x18,0x00,0x04,0x8e,0x09,0xf8,0x40,0x00, | ||
865 | 0x00,0x00,0x00,0x00,0x10,0x00,0x03,0x8e,0x3c,0x0d,0x00,0x08,0x0c,0x00,0x03,0xae, | ||
866 | 0xff,0x00,0xa5,0x30,0x25,0xb0,0x02,0x3c,0x21,0x28,0xa2,0x00,0xff,0x00,0x84,0x30, | ||
867 | 0x60,0x01,0xa4,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xff,0x00,0x84,0x30, | ||
868 | 0x01,0x00,0x03,0x24,0x10,0x00,0x02,0x3c,0x04,0x18,0x83,0x00,0xf0,0x70,0x42,0x34, | ||
869 | 0x15,0x00,0x84,0x2c,0x06,0x00,0x80,0x10,0x24,0x28,0x62,0x00,0x0f,0x00,0x63,0x30, | ||
870 | 0x04,0x00,0xa0,0x14,0x01,0x00,0x02,0x24,0x02,0x00,0x60,0x14,0x02,0x00,0x02,0x24, | ||
871 | 0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xff,0x00,0xa5,0x30, | ||
872 | 0x04,0x00,0xa2,0x2c,0x14,0x00,0x40,0x10,0xff,0x00,0x84,0x30,0x02,0x80,0x03,0x3c, | ||
873 | 0x8e,0x7d,0x62,0x90,0x00,0x00,0x00,0x00,0xef,0xff,0x42,0x24,0xff,0x00,0x42,0x30, | ||
874 | 0x02,0x00,0x42,0x2c,0x0e,0x00,0x40,0x10,0x02,0x00,0x03,0x24,0x24,0x00,0x83,0x10, | ||
875 | 0x0f,0x10,0x02,0x3c,0x03,0x00,0x82,0x28,0x14,0x00,0x40,0x10,0x03,0x00,0x02,0x24, | ||
876 | 0x01,0x00,0x02,0x24,0x2f,0x00,0x82,0x10,0x00,0x00,0x00,0x00,0xff,0x1f,0x02,0x3c, | ||
877 | 0x08,0x00,0xe0,0x03,0xff,0xff,0x42,0x34,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
878 | 0x35,0x00,0x83,0x10,0x0f,0x1f,0x02,0x3c,0x03,0x00,0x82,0x28,0x16,0x00,0x40,0x10, | ||
879 | 0x03,0x00,0x02,0x24,0x01,0x00,0x02,0x24,0xf4,0xff,0x82,0x14,0x00,0x00,0x00,0x00, | ||
880 | 0x0f,0x1f,0x02,0x3c,0x08,0x00,0xe0,0x03,0x00,0x80,0x42,0x34,0xf0,0xff,0x82,0x14, | ||
881 | 0xff,0x1f,0x02,0x3c,0x01,0x00,0x02,0x24,0x29,0x00,0xa2,0x10,0x0f,0x10,0x02,0x3c, | ||
882 | 0x02,0x00,0xa2,0x28,0x1f,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x28,0x00,0xa3,0x10, | ||
883 | 0x00,0x00,0x00,0x00,0xe5,0xff,0xa4,0x14,0x00,0x00,0x00,0x00,0x0f,0x10,0x02,0x3c, | ||
884 | 0x08,0x00,0xe0,0x03,0x00,0xf0,0x42,0x34,0xe1,0xff,0x82,0x14,0xff,0x1f,0x02,0x3c, | ||
885 | 0x01,0x00,0x02,0x24,0x1c,0x00,0xa2,0x10,0x0f,0x00,0x02,0x3c,0x02,0x00,0xa2,0x28, | ||
886 | 0x0b,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x1c,0x00,0xa3,0x10,0x00,0x00,0x00,0x00, | ||
887 | 0xd6,0xff,0xa4,0x14,0x00,0x00,0x00,0x00,0x0f,0x00,0x02,0x3c,0x08,0x00,0xe0,0x03, | ||
888 | 0x00,0xf0,0x42,0x34,0x0f,0x10,0x02,0x3c,0x08,0x00,0xe0,0x03,0x00,0x80,0x42,0x34, | ||
889 | 0xce,0xff,0xa0,0x14,0x00,0x00,0x00,0x00,0x0f,0x00,0x02,0x3c,0x08,0x00,0xe0,0x03, | ||
890 | 0x15,0xf0,0x42,0x34,0xc9,0xff,0xa0,0x14,0x00,0x00,0x00,0x00,0x0f,0x10,0x02,0x3c, | ||
891 | 0x08,0x00,0xe0,0x03,0x15,0xf0,0x42,0x34,0x08,0x00,0xe0,0x03,0x00,0xf0,0x42,0x34, | ||
892 | 0x08,0x00,0xe0,0x03,0x10,0xf0,0x42,0x34,0x08,0x00,0xe0,0x03,0x10,0xf0,0x42,0x34, | ||
893 | 0x0f,0x10,0x02,0x3c,0x08,0x00,0xe0,0x03,0x05,0xf0,0x42,0x34,0x0f,0x00,0x02,0x3c, | ||
894 | 0x08,0x00,0xe0,0x03,0x05,0xf0,0x42,0x34,0xc0,0x40,0x04,0x00,0x21,0x18,0x04,0x01, | ||
895 | 0x80,0x18,0x03,0x00,0x21,0x18,0x64,0x00,0x02,0x80,0x02,0x3c,0x80,0x18,0x03,0x00, | ||
896 | 0x68,0x15,0x42,0x24,0x21,0x18,0x62,0x00,0x74,0x51,0x66,0x8c,0x21,0x38,0x60,0x00, | ||
897 | 0x7a,0x51,0x60,0xa0,0x7b,0x51,0x60,0xa0,0x1c,0x00,0x05,0x24,0xdf,0x0d,0x00,0x08, | ||
898 | 0x01,0x00,0x03,0x24,0x08,0x00,0xa0,0x04,0x21,0x10,0x04,0x01,0x04,0x10,0xa3,0x00, | ||
899 | 0x24,0x10,0xc2,0x00,0xfb,0xff,0x40,0x10,0xff,0xff,0xa5,0x24,0x01,0x00,0xa5,0x24, | ||
900 | 0x7a,0x51,0xe5,0xa0,0x21,0x10,0x04,0x01,0x80,0x10,0x02,0x00,0x21,0x10,0x44,0x00, | ||
901 | 0x02,0x80,0x03,0x3c,0x80,0x10,0x02,0x00,0x68,0x15,0x63,0x24,0x21,0x18,0x43,0x00, | ||
902 | 0x74,0x51,0x66,0x8c,0x21,0x28,0x00,0x00,0xf3,0x0d,0x00,0x08,0x01,0x00,0x07,0x24, | ||
903 | 0x1d,0x00,0xa2,0x28,0x08,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x04,0x10,0xa7,0x00, | ||
904 | 0x24,0x10,0xc2,0x00,0xfa,0xff,0x40,0x10,0x01,0x00,0xa5,0x24,0xff,0xff,0xa5,0x24, | ||
905 | 0x08,0x00,0xe0,0x03,0x7b,0x51,0x65,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
906 | 0xc8,0xff,0xbd,0x27,0x28,0x00,0xb6,0xaf,0x02,0x80,0x16,0x3c,0x30,0x00,0xbe,0xaf, | ||
907 | 0x2c,0x00,0xb7,0xaf,0x24,0x00,0xb5,0xaf,0x20,0x00,0xb4,0xaf,0x18,0x00,0xb2,0xaf, | ||
908 | 0x14,0x00,0xb1,0xaf,0x01,0x00,0x15,0x24,0x21,0x88,0x00,0x00,0x68,0x15,0xde,0x26, | ||
909 | 0x21,0xa0,0x00,0x00,0x21,0x90,0x00,0x00,0x25,0xb0,0x17,0x3c,0x34,0x00,0xbf,0xaf, | ||
910 | 0x1c,0x00,0xb3,0xaf,0x14,0x0e,0x00,0x08,0x10,0x00,0xb0,0xaf,0x01,0x00,0x31,0x26, | ||
911 | 0x20,0x00,0x22,0x2e,0x94,0x00,0x52,0x26,0x2e,0x00,0x40,0x10,0x94,0x00,0x94,0x26, | ||
912 | 0x68,0x15,0xc2,0x26,0x21,0x30,0x42,0x02,0x78,0x51,0xc5,0x8c,0x00,0x00,0x00,0x00, | ||
913 | 0x02,0x13,0x05,0x00,0x01,0x00,0x42,0x30,0xf4,0xff,0x55,0x14,0x42,0x1a,0x05,0x00, | ||
914 | 0x68,0x51,0xc2,0x8c,0x07,0x00,0x64,0x30,0x02,0x11,0x02,0x00,0x7f,0x00,0x43,0x30, | ||
915 | 0x2d,0x00,0x95,0x10,0x07,0x00,0xb3,0x30,0x02,0x00,0x82,0x28,0x3a,0x00,0x40,0x14, | ||
916 | 0x02,0x00,0x02,0x24,0x30,0x00,0x82,0x10,0x03,0x00,0x02,0x24,0x3c,0x00,0x82,0x10, | ||
917 | 0x1a,0x00,0x62,0x2c,0x21,0x80,0x9e,0x02,0x78,0x51,0x02,0x8e,0x04,0x00,0x63,0x2e, | ||
918 | 0x42,0x12,0x02,0x00,0x0a,0x00,0x60,0x10,0x07,0x00,0x44,0x30,0x73,0x0d,0x00,0x0c, | ||
919 | 0x21,0x28,0x60,0x02,0x80,0x20,0x13,0x00,0x70,0x51,0x02,0xae,0x21,0x20,0x97,0x00, | ||
920 | 0x84,0x01,0x83,0x8c,0x00,0x00,0x00,0x00,0x24,0x18,0x62,0x00,0x74,0x51,0x03,0xae, | ||
921 | 0xce,0x0d,0x00,0x0c,0x21,0x20,0x20,0x02,0x21,0x10,0x37,0x02,0x01,0x00,0x31,0x26, | ||
922 | 0x60,0x01,0x43,0x90,0x20,0x00,0x22,0x2e,0x94,0x00,0x52,0x26,0xd4,0xff,0x40,0x14, | ||
923 | 0x94,0x00,0x94,0x26,0x34,0x00,0xbf,0x8f,0x30,0x00,0xbe,0x8f,0x2c,0x00,0xb7,0x8f, | ||
924 | 0x28,0x00,0xb6,0x8f,0x24,0x00,0xb5,0x8f,0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f, | ||
925 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00, | ||
926 | 0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0x32,0x00,0x62,0x2c,0xda,0xff,0x40,0x10, | ||
927 | 0x21,0x80,0x9e,0x02,0xff,0xf1,0x03,0x24,0x24,0x10,0xa3,0x00,0x00,0x04,0x42,0x34, | ||
928 | 0x29,0x0e,0x00,0x08,0x78,0x51,0xc2,0xac,0x38,0x00,0x62,0x2c,0x12,0x00,0x40,0x14, | ||
929 | 0x14,0x00,0x62,0x2c,0xff,0xf1,0x03,0x24,0x24,0x10,0xa3,0x00,0x00,0x02,0x42,0x34, | ||
930 | 0x29,0x0e,0x00,0x08,0x78,0x51,0xc2,0xac,0xcb,0xff,0x80,0x14,0x21,0x80,0x9e,0x02, | ||
931 | 0xff,0xf1,0x03,0x24,0x24,0x10,0xa3,0x00,0x2a,0x0e,0x00,0x08,0x78,0x51,0xc2,0xac, | ||
932 | 0xc5,0xff,0x40,0x14,0x21,0x80,0x9e,0x02,0xff,0xf1,0x03,0x24,0x24,0x10,0xa3,0x00, | ||
933 | 0x54,0x0e,0x00,0x08,0x00,0x04,0x42,0x34,0xbf,0xff,0x40,0x10,0x21,0x80,0x9e,0x02, | ||
934 | 0xff,0xf1,0x03,0x24,0x24,0x10,0xa3,0x00,0x00,0x06,0x42,0x34,0x2a,0x0e,0x00,0x08, | ||
935 | 0x78,0x51,0xc2,0xac,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xd8,0xff,0xbd,0x27, | ||
936 | 0x10,0x00,0xb0,0xaf,0xc0,0x80,0x04,0x00,0x21,0x80,0x04,0x02,0x80,0x80,0x10,0x00, | ||
937 | 0x21,0x80,0x04,0x02,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0x80,0x80,0x10,0x00, | ||
938 | 0x20,0x00,0xbf,0xaf,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf,0x21,0x80,0x02,0x02, | ||
939 | 0x14,0x00,0xb1,0xaf,0x78,0x51,0x03,0x8e,0x25,0xb0,0x02,0x3c,0x80,0x01,0x53,0x34, | ||
940 | 0x07,0x00,0x63,0x30,0x80,0x18,0x03,0x00,0x21,0x18,0x62,0x00,0x00,0x00,0x71,0x92, | ||
941 | 0x70,0x51,0x05,0x8e,0x84,0x01,0x62,0x8c,0x21,0x90,0x80,0x00,0xff,0x00,0x31,0x32, | ||
942 | 0x24,0x10,0x45,0x00,0xce,0x0d,0x00,0x0c,0x74,0x51,0x02,0xae,0x7a,0x51,0x04,0x92, | ||
943 | 0x5c,0x0d,0x00,0x0c,0xff,0x00,0x45,0x32,0x7a,0x51,0x04,0x92,0x63,0x0d,0x00,0x0c, | ||
944 | 0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x38,0x04,0x00,0x03,0x24,0x0a,0x88,0x62,0x00, | ||
945 | 0x00,0x00,0x71,0xa2,0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f, | ||
946 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27, | ||
947 | 0xff,0xff,0x84,0x30,0x00,0x02,0x82,0x30,0x07,0x00,0x03,0x24,0x0d,0x00,0x40,0x14, | ||
948 | 0x0b,0x00,0x84,0x30,0x0c,0x00,0x82,0x2c,0x0a,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
949 | 0x02,0x80,0x03,0x3c,0x80,0x10,0x04,0x00,0xf0,0x91,0x63,0x24,0x21,0x10,0x43,0x00, | ||
950 | 0x00,0x00,0x44,0x8c,0x00,0x00,0x00,0x00,0x08,0x00,0x80,0x00,0x00,0x00,0x00,0x00, | ||
951 | 0x07,0x00,0x03,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00,0x06,0x00,0x03,0x24, | ||
952 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00,0x05,0x00,0x03,0x24,0x08,0x00,0xe0,0x03, | ||
953 | 0x21,0x10,0x60,0x00,0x04,0x00,0x03,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
954 | 0x03,0x00,0x03,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00,0x02,0x00,0x03,0x24, | ||
955 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00,0x01,0x00,0x03,0x24,0x08,0x00,0xe0,0x03, | ||
956 | 0x21,0x10,0x60,0x00,0x21,0x18,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
957 | 0xa0,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c,0x58,0x00,0xbe,0xaf,0x54,0x00,0xb7,0xaf, | ||
958 | 0x50,0x00,0xb6,0xaf,0x4c,0x00,0xb5,0xaf,0x48,0x00,0xb4,0xaf,0x40,0x00,0xb2,0xaf, | ||
959 | 0x3c,0x00,0xb1,0xaf,0x5c,0x00,0xbf,0xaf,0x44,0x00,0xb3,0xaf,0x38,0x00,0xb0,0xaf, | ||
960 | 0x20,0x92,0x42,0x24,0x00,0x00,0x53,0x8c,0x08,0x00,0x03,0x24,0x02,0x80,0x0b,0x3c, | ||
961 | 0x21,0x90,0x00,0x00,0x21,0xa0,0x00,0x00,0x21,0xb8,0x00,0x00,0x21,0xf0,0x00,0x00, | ||
962 | 0x21,0xa8,0x00,0x00,0x21,0xb0,0x00,0x00,0x21,0x88,0x60,0x02,0x10,0x00,0xa3,0xaf, | ||
963 | 0x14,0x00,0xa0,0xaf,0x18,0x00,0xa0,0xaf,0x1c,0x00,0xa0,0xaf,0x20,0x00,0xa0,0xaf, | ||
964 | 0x24,0x00,0xa0,0xaf,0x28,0x00,0xa0,0xaf,0x7a,0x0f,0x00,0x08,0x2c,0x00,0xa0,0xaf, | ||
965 | 0x44,0x51,0x22,0xae,0x60,0x51,0x24,0x8e,0x5c,0x51,0x27,0x8e,0x48,0x51,0x28,0x8e, | ||
966 | 0x4c,0x51,0x25,0x8e,0x54,0x51,0x26,0x8e,0x58,0x51,0x23,0x8e,0x21,0x38,0xe4,0x00, | ||
967 | 0x02,0x80,0x04,0x3c,0x68,0x15,0x84,0x24,0x21,0x10,0x04,0x02,0x21,0x40,0x05,0x01, | ||
968 | 0x21,0x30,0xc3,0x00,0xca,0x44,0x42,0x90,0x44,0x51,0x2a,0x8e,0x0c,0x00,0xe0,0x10, | ||
969 | 0x21,0x48,0x00,0x00,0x2b,0x48,0x47,0x00,0x0b,0x00,0x20,0x15,0x02,0x80,0x02,0x3c, | ||
970 | 0x07,0x00,0x02,0x2e,0x59,0x01,0x40,0x14,0xc0,0x10,0x07,0x00,0x0c,0x00,0x02,0x24, | ||
971 | 0x55,0x01,0x02,0x12,0x0d,0x00,0x02,0x24,0x54,0x01,0x02,0x12,0xc0,0x10,0x07,0x00, | ||
972 | 0x92,0x00,0x20,0x11,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0x80,0x18,0x10,0x00, | ||
973 | 0x21,0x18,0x62,0x00,0x21,0x20,0x30,0x02,0xb6,0x51,0x85,0x90,0xec,0x44,0x62,0x8c, | ||
974 | 0x00,0x00,0x00,0x00,0x04,0x10,0xa2,0x00,0x2b,0x10,0x4a,0x00,0x87,0x00,0x40,0x10, | ||
975 | 0x00,0x00,0x00,0x00,0xd4,0x51,0x22,0x8e,0x01,0x00,0x07,0x24,0x04,0x18,0x07,0x02, | ||
976 | 0x24,0x10,0x43,0x00,0xf0,0x00,0x40,0x10,0x1c,0x00,0x02,0x2e,0x21,0x28,0x30,0x02, | ||
977 | 0x7c,0x51,0xa6,0x90,0xb6,0x51,0xa2,0x90,0x0a,0x00,0x04,0x24,0xff,0x00,0xc3,0x30, | ||
978 | 0x04,0x20,0x44,0x00,0x2a,0x18,0x64,0x00,0xe7,0x00,0x60,0x10,0x1c,0x00,0x02,0x2e, | ||
979 | 0x01,0x00,0xc2,0x24,0xff,0x00,0x43,0x30,0x56,0x01,0x64,0x10,0x7c,0x51,0xa2,0xa0, | ||
980 | 0x68,0x15,0x65,0x25,0x80,0x10,0x10,0x00,0x21,0x10,0x45,0x00,0x60,0x45,0x44,0x8c, | ||
981 | 0xec,0x44,0x43,0x8c,0x21,0x30,0xc5,0x02,0x40,0x10,0x04,0x00,0x21,0x10,0x44,0x00, | ||
982 | 0x21,0x18,0x62,0x00,0x82,0x50,0x03,0x00,0x44,0x51,0xca,0xac,0x8c,0x65,0xa3,0x8c, | ||
983 | 0xff,0xff,0x02,0x34,0x07,0x00,0x62,0x10,0x21,0x20,0x00,0x02,0x21,0x20,0x00,0x02, | ||
984 | 0xff,0x00,0x45,0x32,0x5c,0x0d,0x00,0x0c,0x30,0x00,0xab,0xaf,0x30,0x00,0xab,0x8f, | ||
985 | 0x21,0x20,0x00,0x02,0x63,0x0d,0x00,0x0c,0x30,0x00,0xab,0xaf,0x10,0x00,0xa4,0x8f, | ||
986 | 0x01,0x00,0x42,0x38,0x04,0x00,0x03,0x24,0x0a,0x20,0x62,0x00,0x10,0x00,0xa4,0xaf, | ||
987 | 0x30,0x00,0xab,0x8f,0x11,0x00,0x40,0x16,0x68,0x15,0x62,0x25,0x58,0x51,0x47,0x8c, | ||
988 | 0x54,0x51,0x43,0x8c,0x4c,0x51,0x44,0x94,0x48,0x51,0x45,0x94,0x50,0x51,0x46,0x94, | ||
989 | 0x21,0x18,0x67,0x00,0x00,0x24,0x04,0x00,0x25,0xb0,0x02,0x3c,0x00,0x1c,0x03,0x00, | ||
990 | 0x21,0x28,0xa4,0x00,0x21,0x30,0xc3,0x00,0x6c,0x0c,0x44,0x34,0x68,0x0c,0x42,0x34, | ||
991 | 0x00,0x00,0x45,0xac,0x00,0x00,0x86,0xac,0x68,0x15,0x62,0x25,0x21,0x10,0x82,0x02, | ||
992 | 0x58,0x51,0x40,0xac,0x5c,0x51,0x40,0xac,0x60,0x51,0x40,0xac,0x48,0x51,0x40,0xac, | ||
993 | 0x4c,0x51,0x40,0xac,0x50,0x51,0x40,0xac,0x54,0x51,0x40,0xac,0x2c,0x00,0xa2,0x8f, | ||
994 | 0x28,0x00,0xa4,0x8f,0x01,0x00,0x52,0x26,0x94,0x00,0x42,0x24,0x2c,0x00,0xa2,0xaf, | ||
995 | 0x24,0x00,0xa2,0x8f,0x94,0x00,0x84,0x24,0x28,0x00,0xa4,0xaf,0x94,0x00,0x42,0x24, | ||
996 | 0x20,0x00,0xa4,0x8f,0x24,0x00,0xa2,0xaf,0x1c,0x00,0xa2,0x8f,0x94,0x00,0x84,0x24, | ||
997 | 0x20,0x00,0xa4,0xaf,0x94,0x00,0x42,0x24,0x18,0x00,0xa4,0x8f,0x1c,0x00,0xa2,0xaf, | ||
998 | 0x14,0x00,0xa2,0x8f,0x94,0x00,0x84,0x24,0x20,0x00,0x43,0x2a,0x94,0x00,0x42,0x24, | ||
999 | 0x94,0x00,0x31,0x26,0x94,0x00,0xd6,0x26,0x94,0x00,0xb5,0x26,0x18,0x00,0xa4,0xaf, | ||
1000 | 0x14,0x00,0xa2,0xaf,0x94,0x00,0xde,0x27,0x94,0x00,0x73,0x26,0x94,0x00,0xf7,0x26, | ||
1001 | 0xe5,0x00,0x60,0x10,0x94,0x00,0x94,0x26,0x78,0x51,0x22,0x8e,0x00,0x00,0x00,0x00, | ||
1002 | 0x02,0x13,0x02,0x00,0x01,0x00,0x42,0x30,0xd3,0xff,0x40,0x10,0x25,0xb0,0x02,0x3c, | ||
1003 | 0x21,0x10,0x42,0x02,0x60,0x01,0x44,0x90,0x60,0x51,0x23,0x8e,0x5c,0x51,0x26,0x8e, | ||
1004 | 0xff,0x00,0x90,0x30,0x02,0x80,0x04,0x3c,0x68,0x15,0x84,0x24,0x21,0x10,0x04,0x02, | ||
1005 | 0x73,0x44,0x44,0x90,0x56,0x44,0x45,0x90,0x44,0x51,0x27,0x8e,0x18,0x00,0x64,0x00, | ||
1006 | 0x12,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0xc5,0x00, | ||
1007 | 0x12,0x30,0x00,0x00,0x21,0x30,0xc3,0x00,0x2b,0x10,0xe6,0x00,0x54,0xff,0x40,0x10, | ||
1008 | 0x23,0x10,0xe6,0x00,0xe9,0x0e,0x00,0x08,0x44,0x51,0x20,0xae,0x62,0x00,0xe0,0x10, | ||
1009 | 0x00,0x00,0x00,0x00,0x63,0x00,0x20,0x15,0x68,0x15,0x62,0x25,0x40,0x10,0x07,0x00, | ||
1010 | 0x21,0x10,0x47,0x00,0x82,0x10,0x02,0x00,0x2b,0x10,0x46,0x00,0x99,0xff,0x40,0x10, | ||
1011 | 0x21,0x20,0x00,0x02,0x68,0x15,0x68,0x25,0x21,0x20,0xa8,0x02,0x21,0x30,0x90,0x00, | ||
1012 | 0xd4,0x51,0x83,0x8c,0x01,0x00,0x05,0x24,0x04,0x10,0x05,0x02,0x99,0x51,0xc7,0x90, | ||
1013 | 0x27,0x10,0x02,0x00,0x24,0x18,0x62,0x00,0xd4,0x51,0x83,0xac,0x09,0x00,0xe5,0x10, | ||
1014 | 0x7c,0x51,0xc0,0xa0,0x18,0x00,0xa2,0x8f,0x21,0x38,0x00,0x00,0x21,0x20,0x48,0x00, | ||
1015 | 0x21,0x18,0x87,0x00,0x01,0x00,0xe7,0x24,0x1d,0x00,0xe2,0x28,0xfc,0xff,0x40,0x14, | ||
1016 | 0xb6,0x51,0x60,0xa0,0x14,0x00,0xa4,0x8f,0x68,0x15,0x63,0x25,0x21,0x50,0x60,0x00, | ||
1017 | 0x21,0x10,0x83,0x00,0x21,0x10,0x50,0x00,0x99,0x51,0x40,0xa0,0x02,0x80,0x03,0x3c, | ||
1018 | 0x02,0x80,0x02,0x3c,0x4c,0x91,0x49,0x24,0xd8,0x90,0x68,0x24,0x21,0x38,0x00,0x00, | ||
1019 | 0x80,0x18,0x07,0x00,0x21,0x10,0x69,0x00,0x21,0x20,0x68,0x00,0x00,0x00,0x46,0x8c, | ||
1020 | 0x00,0x00,0x85,0x8c,0x01,0x00,0xe7,0x24,0x21,0x18,0x6a,0x00,0x1d,0x00,0xe2,0x28, | ||
1021 | 0xec,0x44,0x65,0xac,0xf6,0xff,0x40,0x14,0x60,0x45,0x66,0xac,0x14,0x00,0x00,0x12, | ||
1022 | 0x68,0x15,0x63,0x25,0x7b,0x51,0x62,0x92,0xff,0xff,0x07,0x26,0x2a,0x10,0xe2,0x00, | ||
1023 | 0x0e,0x00,0x40,0x14,0x02,0x80,0x0b,0x3c,0x68,0x15,0x62,0x25,0x21,0x10,0xc2,0x03, | ||
1024 | 0x7b,0x51,0x45,0x90,0x74,0x51,0x44,0x8c,0x01,0x00,0x06,0x24,0x04,0x18,0xe6,0x00, | ||
1025 | 0x24,0x10,0x83,0x00,0xb3,0x00,0x43,0x10,0x00,0x00,0x00,0x00,0xff,0xff,0xe7,0x24, | ||
1026 | 0x2a,0x10,0xe5,0x00,0xfa,0xff,0x40,0x10,0x04,0x18,0xe6,0x00,0x68,0x15,0x63,0x25, | ||
1027 | 0x80,0x10,0x10,0x00,0x21,0x10,0x43,0x00,0x60,0x45,0x45,0x8c,0xec,0x44,0x44,0x8c, | ||
1028 | 0x02,0x80,0x03,0x3c,0x40,0x10,0x05,0x00,0x8e,0x7d,0x66,0x90,0x21,0x10,0x45,0x00, | ||
1029 | 0x21,0x20,0x82,0x00,0x22,0x00,0x02,0x24,0x98,0x00,0xc2,0x10,0x82,0x50,0x04,0x00, | ||
1030 | 0xd4,0x51,0x63,0x8e,0x01,0x00,0x02,0x24,0x04,0x10,0x02,0x02,0x25,0x18,0x62,0x00, | ||
1031 | 0xd4,0x51,0x63,0xae,0x68,0x15,0x63,0x25,0x21,0x10,0xe3,0x02,0x44,0x51,0x4a,0xac, | ||
1032 | 0x8c,0x65,0x64,0x8c,0xff,0xff,0x02,0x34,0x3c,0xff,0x82,0x14,0x21,0x20,0x00,0x02, | ||
1033 | 0x39,0x0f,0x00,0x08,0x00,0x00,0x00,0x00,0x3e,0xff,0x20,0x11,0x21,0x20,0x00,0x02, | ||
1034 | 0x68,0x15,0x62,0x25,0x80,0x18,0x10,0x00,0x21,0x18,0x62,0x00,0x60,0x45,0x64,0x8c, | ||
1035 | 0x00,0x00,0x00,0x00,0x2b,0x20,0x44,0x01,0x36,0xff,0x80,0x10,0x21,0x20,0x00,0x02, | ||
1036 | 0xa2,0x0f,0x00,0x08,0x68,0x15,0x68,0x25,0x1e,0xff,0x40,0x10,0x68,0x15,0x65,0x25, | ||
1037 | 0x21,0x20,0x30,0x02,0x99,0x51,0x83,0x90,0x01,0x00,0x02,0x24,0x63,0x00,0x62,0x10, | ||
1038 | 0x02,0x80,0x02,0x3c,0x2c,0x00,0xa3,0x8f,0x68,0x15,0x42,0x24,0x21,0x38,0x00,0x00, | ||
1039 | 0x21,0x20,0x62,0x00,0x21,0x18,0x87,0x00,0x01,0x00,0xe7,0x24,0x1d,0x00,0xe2,0x28, | ||
1040 | 0xfc,0xff,0x40,0x14,0xb6,0x51,0x60,0xa0,0x28,0x00,0xa3,0x8f,0x02,0x80,0x0b,0x3c, | ||
1041 | 0x68,0x15,0x65,0x25,0x21,0x30,0x65,0x00,0xd4,0x51,0xc2,0x8c,0x01,0x00,0x03,0x24, | ||
1042 | 0x04,0x18,0x03,0x02,0x27,0x18,0x03,0x00,0x21,0x20,0xd0,0x00,0x24,0x10,0x43,0x00, | ||
1043 | 0x99,0x51,0x80,0xa0,0xd4,0x51,0xc2,0xac,0x12,0x00,0x00,0x16,0x7c,0x51,0x80,0xa0, | ||
1044 | 0x7a,0x51,0xc2,0x90,0x00,0x00,0x00,0x00,0x0e,0x00,0x40,0x10,0x01,0x00,0x07,0x24, | ||
1045 | 0x24,0x00,0xa4,0x8f,0x01,0x00,0x06,0x24,0x21,0x10,0x85,0x00,0x7a,0x51,0x44,0x90, | ||
1046 | 0x74,0x51,0x45,0x8c,0x04,0x18,0xe6,0x00,0x24,0x10,0xa3,0x00,0x5b,0x00,0x43,0x10, | ||
1047 | 0x00,0x00,0x00,0x00,0x01,0x00,0xe7,0x24,0x2a,0x10,0x87,0x00,0xfa,0xff,0x40,0x10, | ||
1048 | 0x04,0x18,0xe6,0x00,0x20,0x00,0xa2,0x8f,0x02,0x80,0x0b,0x3c,0x68,0x15,0x64,0x25, | ||
1049 | 0x21,0x18,0x44,0x00,0x7a,0x51,0x62,0x90,0x01,0x00,0x07,0x26,0x2a,0x10,0x47,0x00, | ||
1050 | 0x0e,0x00,0x40,0x14,0x01,0x00,0x06,0x24,0x1c,0x00,0xa3,0x8f,0x00,0x00,0x00,0x00, | ||
1051 | 0x21,0x10,0x64,0x00,0x7a,0x51,0x45,0x90,0x74,0x51,0x44,0x8c,0x04,0x18,0xe6,0x00, | ||
1052 | 0x24,0x10,0x83,0x00,0x42,0x00,0x43,0x10,0x00,0x00,0x00,0x00,0x01,0x00,0xe7,0x24, | ||
1053 | 0x2a,0x10,0xa7,0x00,0xfa,0xff,0x40,0x10,0x04,0x18,0xe6,0x00,0x02,0x80,0x02,0x3c, | ||
1054 | 0x8e,0x7d,0x44,0x90,0x22,0x00,0x03,0x24,0xd6,0xfe,0x83,0x14,0x68,0x15,0x65,0x25, | ||
1055 | 0xee,0xff,0x02,0x26,0xff,0x00,0x42,0x30,0x02,0x00,0x42,0x2c,0x18,0x00,0x03,0x24, | ||
1056 | 0x25,0x0f,0x00,0x08,0x0b,0x80,0x62,0x00,0xc0,0x10,0x07,0x00,0x23,0x10,0x47,0x00, | ||
1057 | 0xc2,0x10,0x02,0x00,0x2b,0x10,0x48,0x00,0xb6,0xfe,0x40,0x14,0x00,0x00,0x00,0x00, | ||
1058 | 0x04,0x0f,0x00,0x08,0x00,0x00,0x00,0x00,0x10,0x00,0xa3,0x8f,0x5c,0x00,0xbf,0x8f, | ||
1059 | 0x58,0x00,0xbe,0x8f,0x54,0x00,0xb7,0x8f,0x50,0x00,0xb6,0x8f,0x4c,0x00,0xb5,0x8f, | ||
1060 | 0x48,0x00,0xb4,0x8f,0x44,0x00,0xb3,0x8f,0x40,0x00,0xb2,0x8f,0x3c,0x00,0xb1,0x8f, | ||
1061 | 0x38,0x00,0xb0,0x8f,0x25,0xb0,0x02,0x3c,0x80,0x01,0x42,0x34,0x60,0x00,0xbd,0x27, | ||
1062 | 0x00,0x00,0x43,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x18,0x00,0x02,0x2e, | ||
1063 | 0x0a,0x00,0x40,0x14,0x05,0x00,0x02,0x2e,0xb6,0x51,0x83,0x90,0x00,0x00,0x00,0x00, | ||
1064 | 0x05,0x00,0x62,0x2c,0xa0,0xff,0x40,0x10,0x01,0x00,0x62,0x24,0x16,0x10,0x00,0x08, | ||
1065 | 0xb6,0x51,0x82,0xa0,0x24,0x0f,0x00,0x08,0x99,0x51,0xa7,0xa0,0x04,0x00,0x40,0x10, | ||
1066 | 0x00,0x00,0x00,0x00,0xb6,0x51,0x83,0x90,0x75,0x10,0x00,0x08,0x03,0x00,0x62,0x2c, | ||
1067 | 0xb6,0x51,0x83,0x90,0x75,0x10,0x00,0x08,0x04,0x00,0x62,0x2c,0x13,0x00,0x02,0x24, | ||
1068 | 0x67,0xff,0x02,0x16,0x68,0x15,0x63,0x25,0xf3,0x0f,0x00,0x08,0x21,0x10,0xe3,0x02, | ||
1069 | 0xff,0x00,0xf0,0x30,0x4c,0x10,0x00,0x08,0x02,0x80,0x02,0x3c,0x35,0x10,0x00,0x08, | ||
1070 | 0xff,0x00,0xf0,0x30,0xdf,0x0f,0x00,0x08,0xff,0x00,0xf0,0x30,0xd8,0xff,0xbd,0x27, | ||
1071 | 0x02,0x80,0x02,0x3c,0x14,0x00,0xb1,0xaf,0x24,0x00,0xbf,0xaf,0x20,0x00,0xb4,0xaf, | ||
1072 | 0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf,0x10,0x00,0xb0,0xaf,0x68,0x15,0x45,0x24, | ||
1073 | 0x05,0x65,0xa4,0x90,0x00,0x65,0xa3,0x8c,0xfc,0x64,0xa2,0x8c,0x21,0x88,0x64,0x00, | ||
1074 | 0x2b,0x10,0x22,0x02,0x60,0x00,0x40,0x10,0x21,0x80,0xa0,0x00,0x02,0x80,0x14,0x3c, | ||
1075 | 0x21,0x98,0xa0,0x00,0xa8,0x10,0x00,0x08,0x21,0x90,0xa0,0x00,0xfc,0x64,0x42,0x8e, | ||
1076 | 0x10,0x00,0x31,0x26,0x2b,0x10,0x22,0x02,0x57,0x00,0x40,0x10,0x21,0x80,0x40,0x02, | ||
1077 | 0x05,0x65,0x02,0x92,0xff,0xff,0x23,0x32,0x02,0x80,0x05,0x3c,0x10,0x00,0x42,0x24, | ||
1078 | 0x25,0x28,0x65,0x00,0x2c,0x79,0x84,0x26,0x10,0x00,0x06,0x24,0x9f,0x45,0x00,0x0c, | ||
1079 | 0x05,0x65,0x02,0xa2,0xc8,0x63,0x06,0x8e,0x00,0x00,0x00,0x00,0x42,0x24,0x06,0x00, | ||
1080 | 0x1f,0x00,0x84,0x30,0xc0,0x10,0x04,0x00,0x21,0x10,0x44,0x00,0x80,0x10,0x02,0x00, | ||
1081 | 0x21,0x10,0x44,0x00,0x80,0x10,0x02,0x00,0x21,0x38,0x50,0x00,0x78,0x51,0xe3,0x8c, | ||
1082 | 0x00,0x00,0x00,0x00,0x02,0x1b,0x03,0x00,0x01,0x00,0x63,0x30,0xe3,0xff,0x60,0x10, | ||
1083 | 0x25,0xb0,0x02,0x3c,0xc4,0x63,0x05,0x8e,0x21,0x10,0x82,0x00,0x60,0x01,0x44,0x90, | ||
1084 | 0x82,0x1d,0x05,0x00,0x3f,0x00,0x63,0x30,0x04,0x00,0x0a,0x24,0x05,0x00,0x62,0x28, | ||
1085 | 0x21,0x40,0x40,0x01,0x0b,0x40,0x62,0x00,0x07,0x00,0xa0,0x04,0xff,0x00,0x89,0x30, | ||
1086 | 0x64,0x51,0xe2,0x8c,0x04,0x00,0x08,0x24,0x01,0x00,0x42,0x24,0x64,0x51,0xe2,0xac, | ||
1087 | 0xc8,0x63,0x66,0x8e,0x00,0x00,0x00,0x00,0x02,0x13,0x06,0x00,0x1f,0x00,0x42,0x30, | ||
1088 | 0x08,0x00,0x42,0x28,0xcd,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0xc4,0x63,0x62,0x8e, | ||
1089 | 0x00,0x00,0x00,0x00,0x3f,0x00,0x42,0x30,0xc8,0xff,0x49,0x14,0x00,0x00,0x00,0x00, | ||
1090 | 0x29,0x00,0x00,0x11,0x01,0x00,0x02,0x24,0x2e,0x00,0x02,0x11,0x02,0x00,0x02,0x24, | ||
1091 | 0x33,0x00,0x02,0x11,0x03,0x00,0x02,0x24,0x38,0x00,0x02,0x11,0x00,0x00,0x00,0x00, | ||
1092 | 0x3b,0x00,0x0a,0x11,0x00,0x00,0x00,0x00,0x68,0x51,0xe2,0x8c,0x21,0x18,0x33,0x01, | ||
1093 | 0x90,0x44,0x64,0x90,0x02,0x11,0x02,0x00,0x2b,0x10,0x44,0x00,0x3e,0x00,0x40,0x14, | ||
1094 | 0x00,0x00,0x00,0x00,0x5c,0x51,0xe3,0x8c,0x80,0x10,0x09,0x00,0x21,0x10,0x49,0x00, | ||
1095 | 0x01,0x00,0x63,0x24,0x21,0x10,0x53,0x00,0x5c,0x51,0xe3,0xac,0x21,0x10,0x48,0x00, | ||
1096 | 0x34,0x43,0x44,0x90,0x44,0x51,0xe3,0x8c,0x00,0x00,0x00,0x00,0x21,0x18,0x64,0x00, | ||
1097 | 0x44,0x51,0xe3,0xac,0xfc,0x64,0x42,0x8e,0x10,0x00,0x31,0x26,0x2b,0x10,0x22,0x02, | ||
1098 | 0xab,0xff,0x40,0x14,0x21,0x80,0x40,0x02,0x24,0x00,0xbf,0x8f,0x20,0x00,0xb4,0x8f, | ||
1099 | 0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f, | ||
1100 | 0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27,0x48,0x51,0xe2,0x8c,0x00,0x00,0x00,0x00, | ||
1101 | 0x01,0x00,0x42,0x24,0x48,0x51,0xe2,0xac,0x01,0x00,0x02,0x24,0xd4,0xff,0x02,0x15, | ||
1102 | 0x02,0x00,0x02,0x24,0x4c,0x51,0xe2,0x8c,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24, | ||
1103 | 0x4c,0x51,0xe2,0xac,0x02,0x00,0x02,0x24,0xcf,0xff,0x02,0x15,0x03,0x00,0x02,0x24, | ||
1104 | 0x50,0x51,0xe2,0x8c,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0x50,0x51,0xe2,0xac, | ||
1105 | 0x03,0x00,0x02,0x24,0xca,0xff,0x02,0x15,0x00,0x00,0x00,0x00,0x54,0x51,0xe2,0x8c, | ||
1106 | 0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0xc7,0xff,0x0a,0x15,0x54,0x51,0xe2,0xac, | ||
1107 | 0x58,0x51,0xe2,0x8c,0x21,0x18,0x33,0x01,0x01,0x00,0x42,0x24,0x58,0x51,0xe2,0xac, | ||
1108 | 0x68,0x51,0xe2,0x8c,0x90,0x44,0x64,0x90,0x02,0x11,0x02,0x00,0x2b,0x10,0x44,0x00, | ||
1109 | 0xc4,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0x60,0x51,0xe3,0x8c,0x80,0x10,0x09,0x00, | ||
1110 | 0x21,0x10,0x49,0x00,0x01,0x00,0x63,0x24,0x21,0x10,0x53,0x00,0x60,0x51,0xe3,0xac, | ||
1111 | 0x21,0x10,0x48,0x00,0xc5,0x43,0x44,0x90,0x44,0x51,0xe3,0x8c,0x00,0x00,0x00,0x00, | ||
1112 | 0x21,0x18,0x64,0x00,0xf9,0x10,0x00,0x08,0x44,0x51,0xe3,0xac,0x25,0xb0,0x02,0x3c, | ||
1113 | 0x25,0xb0,0x05,0x3c,0x02,0x80,0x03,0x3c,0x58,0x00,0x4a,0x34,0x5c,0x00,0x4b,0x34, | ||
1114 | 0x4c,0x00,0xa2,0x34,0x00,0x00,0x44,0x90,0x68,0x15,0x66,0x24,0xed,0x4a,0xc2,0x90, | ||
1115 | 0x29,0xb0,0x07,0x3c,0x03,0x00,0x84,0x30,0x21,0x18,0xc0,0x00,0x0f,0x00,0x44,0x10, | ||
1116 | 0x04,0x00,0xe8,0x34,0x07,0x00,0x80,0x14,0x58,0x0c,0xa9,0x34,0xe6,0x42,0xc2,0x90, | ||
1117 | 0x1c,0x00,0x06,0x24,0x03,0x00,0x40,0x14,0x50,0x0c,0xa5,0x34,0x00,0x00,0xa6,0xa0, | ||
1118 | 0x00,0x00,0x26,0xa1,0x00,0x00,0x42,0x8d,0xed,0x4a,0x64,0xa0,0x00,0x00,0xe2,0xac, | ||
1119 | 0x00,0x00,0x62,0x8d,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0xad,0x08,0x00,0xe0,0x03, | ||
1120 | 0x21,0x10,0x00,0x00,0x25,0xb0,0x0d,0x3c,0xe8,0xff,0xbd,0x27,0x10,0x00,0xbf,0xaf, | ||
1121 | 0x2d,0x0a,0xa7,0x35,0xa2,0x0d,0xa2,0x35,0xa4,0x0d,0xa3,0x35,0xa6,0x0d,0xa4,0x35, | ||
1122 | 0xa8,0x0d,0xa5,0x35,0x00,0x00,0x48,0x94,0x00,0x00,0x69,0x94,0x00,0x00,0x8a,0x94, | ||
1123 | 0x00,0x00,0xab,0x94,0x00,0x00,0xe3,0x90,0x5b,0x0a,0xa4,0x35,0x5c,0x0a,0xa6,0x35, | ||
1124 | 0x00,0x2e,0x03,0x00,0x03,0x2e,0x05,0x00,0x40,0x00,0xa2,0x34,0x00,0x00,0xe2,0xa0, | ||
1125 | 0x00,0x00,0x85,0x90,0x00,0x00,0xc3,0x90,0x02,0x80,0x0e,0x3c,0x68,0x15,0xcc,0x25, | ||
1126 | 0xff,0xff,0x22,0x31,0xff,0x00,0xa5,0x30,0xff,0xff,0x04,0x31,0x21,0x20,0x82,0x00, | ||
1127 | 0xff,0x00,0x63,0x30,0x00,0x40,0x87,0x8d,0x00,0x2a,0x05,0x00,0xff,0xff,0x46,0x31, | ||
1128 | 0x21,0x28,0xa3,0x00,0xff,0xff,0x62,0x31,0x21,0x20,0x86,0x00,0x21,0x20,0x82,0x00, | ||
1129 | 0xff,0xff,0xa3,0x30,0x64,0x0c,0xa2,0x35,0x00,0x00,0x45,0xa4,0x21,0x20,0x83,0x00, | ||
1130 | 0x0f,0x00,0xe7,0x30,0x01,0x00,0x02,0x24,0xe0,0x42,0x84,0xad,0xd8,0x42,0x88,0xa5, | ||
1131 | 0xda,0x42,0x89,0xa5,0xdc,0x42,0x8a,0xa5,0xde,0x42,0x8b,0xa5,0x07,0x00,0xe2,0x10, | ||
1132 | 0xe4,0x42,0x85,0xa5,0xa8,0x56,0x00,0x0c,0x00,0x00,0x00,0x00,0x10,0x00,0xbf,0x8f, | ||
1133 | 0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27,0x4c,0x00,0xa3,0x35, | ||
1134 | 0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x03,0x00,0x42,0x30,0x67,0x00,0x47,0x10, | ||
1135 | 0x68,0x15,0xc4,0x25,0xe6,0x42,0x82,0x90,0x00,0x00,0x00,0x00,0x2d,0x00,0x40,0x10, | ||
1136 | 0x01,0x00,0x03,0x24,0x68,0x15,0xc5,0x25,0xe6,0x42,0xa3,0x90,0xff,0x00,0x02,0x24, | ||
1137 | 0xec,0xff,0x62,0x14,0x25,0xb0,0x03,0x3c,0xc8,0x42,0xa2,0x94,0xe0,0x42,0xa6,0x8c, | ||
1138 | 0x50,0x0c,0x63,0x34,0x00,0x00,0x64,0x90,0x2b,0x10,0xc2,0x00,0x5e,0x00,0x40,0x14, | ||
1139 | 0x7f,0x00,0x84,0x30,0xca,0x42,0xa2,0x94,0x00,0x00,0x00,0x00,0x2b,0x10,0xc2,0x00, | ||
1140 | 0x09,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0xcc,0x42,0xa2,0x94,0x00,0x00,0x00,0x00, | ||
1141 | 0x2b,0x10,0xc2,0x00,0x02,0x00,0x40,0x10,0x02,0x00,0x82,0x24,0x01,0x00,0x82,0x24, | ||
1142 | 0xff,0x00,0x44,0x30,0x68,0x15,0xc5,0x25,0xd0,0x42,0xa3,0x90,0x00,0x00,0x00,0x00, | ||
1143 | 0x2b,0x10,0x64,0x00,0x4e,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x21,0x20,0x60,0x00, | ||
1144 | 0x68,0x15,0xc3,0x25,0xe0,0x42,0x62,0x8c,0x00,0x00,0x00,0x00,0xe9,0x03,0x42,0x2c, | ||
1145 | 0x02,0x00,0x40,0x14,0x25,0xb0,0x02,0x3c,0xd0,0x42,0x64,0x90,0x58,0x0c,0x43,0x34, | ||
1146 | 0x50,0x0c,0x42,0x34,0x00,0x00,0x44,0xa0,0x00,0x00,0x64,0xa0,0x85,0x11,0x00,0x08, | ||
1147 | 0x00,0x00,0x00,0x00,0x00,0x40,0x82,0x8c,0x00,0x00,0x00,0x00,0x02,0x12,0x02,0x00, | ||
1148 | 0x0f,0x00,0x42,0x30,0xd0,0xff,0x43,0x14,0x68,0x15,0xc5,0x25,0x25,0xb0,0x02,0x3c, | ||
1149 | 0x4c,0x00,0x42,0x34,0x00,0x00,0x43,0x90,0x00,0x00,0x00,0x00,0x03,0x00,0x63,0x30, | ||
1150 | 0xb8,0xff,0x60,0x10,0xff,0xff,0x02,0x34,0xdc,0x63,0x83,0x8c,0x00,0x00,0x00,0x00, | ||
1151 | 0xb4,0xff,0x62,0x10,0x00,0x00,0x00,0x00,0xe0,0x42,0x83,0x8c,0x00,0x00,0x00,0x00, | ||
1152 | 0x65,0x00,0x62,0x2c,0x3b,0x00,0x40,0x14,0x28,0x00,0x62,0x2c,0xd2,0x42,0x83,0x90, | ||
1153 | 0x00,0x00,0x00,0x00,0x00,0x16,0x03,0x00,0x03,0x16,0x02,0x00,0xfe,0xff,0x42,0x24, | ||
1154 | 0xfc,0xff,0x42,0x28,0x02,0x00,0x40,0x10,0xfe,0xff,0x62,0x24,0xfc,0xff,0x02,0x24, | ||
1155 | 0xd2,0x42,0x82,0xa0,0x68,0x15,0xc4,0x25,0xdc,0x63,0x82,0x8c,0xd2,0x42,0x83,0x90, | ||
1156 | 0xce,0x42,0x86,0x90,0x02,0x11,0x02,0x00,0x7f,0x00,0x42,0x30,0x0a,0x00,0x45,0x24, | ||
1157 | 0x23,0x18,0xa3,0x00,0x00,0x2e,0x03,0x00,0x03,0x2e,0x05,0x00,0xff,0x00,0xc2,0x30, | ||
1158 | 0x2a,0x10,0x45,0x00,0x17,0x00,0x40,0x10,0x25,0xb0,0x02,0x3c,0x00,0x2e,0x06,0x00, | ||
1159 | 0x03,0x2e,0x05,0x00,0x58,0x0c,0x43,0x34,0x50,0x0c,0x42,0x34,0x00,0x00,0x45,0xa0, | ||
1160 | 0x00,0x00,0x65,0xa0,0x85,0x11,0x00,0x08,0x00,0x00,0x00,0x00,0xe6,0x42,0x82,0x91, | ||
1161 | 0x00,0x00,0x00,0x00,0x97,0xff,0x40,0x14,0x00,0x00,0x00,0x00,0xff,0xff,0x02,0x24, | ||
1162 | 0x91,0x11,0x00,0x08,0xe6,0x42,0x82,0xa1,0xac,0x11,0x00,0x08,0xff,0xff,0x82,0x24, | ||
1163 | 0xd1,0x42,0xa3,0x90,0x00,0x00,0x00,0x00,0x2b,0x10,0x83,0x00,0xb4,0x11,0x00,0x08, | ||
1164 | 0x0b,0x20,0x62,0x00,0xcf,0x42,0x83,0x80,0x00,0x00,0x00,0x00,0xff,0x00,0x62,0x30, | ||
1165 | 0x2a,0x10,0xa2,0x00,0x0b,0x28,0x62,0x00,0x25,0xb0,0x02,0x3c,0x58,0x0c,0x43,0x34, | ||
1166 | 0x50,0x0c,0x42,0x34,0x00,0x00,0x45,0xa0,0x00,0x00,0x65,0xa0,0x85,0x11,0x00,0x08, | ||
1167 | 0x00,0x00,0x00,0x00,0xcf,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0xd2,0x42,0x83,0x90, | ||
1168 | 0x00,0x00,0x00,0x00,0x00,0x16,0x03,0x00,0x03,0x16,0x02,0x00,0x02,0x00,0x42,0x24, | ||
1169 | 0x0d,0x00,0x42,0x28,0x03,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0xe0,0x11,0x00,0x08, | ||
1170 | 0x0c,0x00,0x02,0x24,0xe0,0x11,0x00,0x08,0x02,0x00,0x62,0x24,0xc0,0xff,0xbd,0x27, | ||
1171 | 0x18,0x00,0xb0,0xaf,0x25,0xb0,0x10,0x3c,0x28,0x00,0xb4,0xaf,0x24,0x00,0xb3,0xaf, | ||
1172 | 0x1c,0x00,0xb1,0xaf,0x3c,0x00,0xbf,0xaf,0x38,0x00,0xbe,0xaf,0x34,0x00,0xb7,0xaf, | ||
1173 | 0x30,0x00,0xb6,0xaf,0x2c,0x00,0xb5,0xaf,0x20,0x00,0xb2,0xaf,0xd8,0x00,0x06,0x36, | ||
1174 | 0x00,0x00,0xc3,0x90,0x02,0x80,0x02,0x3c,0x68,0x15,0x54,0x24,0x2a,0xb0,0x11,0x3c, | ||
1175 | 0xa0,0xff,0x02,0x24,0x25,0x18,0x62,0x00,0x34,0x00,0x25,0x36,0xfe,0xff,0x02,0x24, | ||
1176 | 0xbc,0x42,0x92,0x92,0x40,0x00,0x04,0x24,0x00,0x00,0xc3,0xa0,0x00,0x00,0xa2,0xa0, | ||
1177 | 0xa1,0x4e,0x00,0x0c,0x00,0x96,0x12,0x00,0x21,0x98,0x40,0x00,0x6b,0x00,0x60,0x12, | ||
1178 | 0x00,0x40,0x02,0x3c,0x08,0x00,0x63,0x8e,0xb0,0x03,0x02,0x36,0x21,0x20,0x60,0x02, | ||
1179 | 0x00,0x00,0x43,0xac,0x3a,0x45,0x00,0x0c,0x21,0xb8,0x80,0x02,0x01,0x00,0x1e,0x24, | ||
1180 | 0x42,0x00,0x16,0x36,0x03,0x0c,0x11,0x36,0x17,0x0e,0x15,0x36,0x04,0x00,0x14,0x24, | ||
1181 | 0x2a,0xb0,0x03,0x3c,0x06,0x00,0x63,0x34,0x00,0x00,0x62,0x94,0x00,0x00,0x00,0x00, | ||
1182 | 0x00,0xff,0x42,0x30,0x0a,0x00,0x40,0x18,0x00,0x00,0x00,0x00,0x02,0x80,0x04,0x3c, | ||
1183 | 0xc8,0x94,0x84,0x24,0x00,0x00,0x83,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0x62,0x94, | ||
1184 | 0x00,0x00,0x00,0x00,0x00,0xff,0x42,0x30,0xfc,0xff,0x40,0x1c,0x00,0x00,0x00,0x00, | ||
1185 | 0x08,0x00,0x65,0x8e,0x20,0x10,0x06,0x3c,0x00,0xfe,0xc6,0x34,0x40,0x00,0x07,0x24, | ||
1186 | 0x01,0x00,0x04,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xbe,0xaf,0x4d,0x01,0x00,0x0c, | ||
1187 | 0x01,0x00,0x04,0x24,0x2a,0xb0,0x02,0x3c,0x05,0x00,0x42,0x34,0xff,0xff,0x03,0x24, | ||
1188 | 0x00,0x00,0x5e,0xa0,0x00,0x00,0xc3,0xa2,0x00,0x00,0x22,0x92,0xc1,0x42,0xe5,0x92, | ||
1189 | 0x2a,0xb0,0x04,0x3c,0x02,0x00,0x03,0x24,0x40,0x00,0x42,0x34,0x05,0x00,0x84,0x34, | ||
1190 | 0x00,0x00,0x22,0xa2,0x00,0x00,0x83,0xa0,0xef,0xff,0x02,0x24,0x00,0x00,0xb0,0x92, | ||
1191 | 0x64,0x00,0x04,0x24,0x00,0x00,0xa5,0xa2,0x00,0x00,0xc2,0xa2,0xb3,0x0a,0x00,0x0c, | ||
1192 | 0x00,0x00,0x00,0x00,0x00,0x00,0x22,0x92,0xbf,0xff,0x03,0x24,0x84,0x03,0x04,0x24, | ||
1193 | 0x24,0x10,0x43,0x00,0x00,0x00,0x22,0xa2,0xb3,0x0a,0x00,0x0c,0xff,0x00,0x10,0x32, | ||
1194 | 0x25,0xb0,0x02,0x3c,0xf4,0x08,0x42,0x34,0x00,0x00,0x44,0x8c,0x00,0x00,0xb0,0xa2, | ||
1195 | 0x00,0x00,0xc0,0xa2,0x00,0x00,0x22,0x92,0xbe,0x42,0xe3,0x92,0x1f,0x00,0x85,0x30, | ||
1196 | 0x40,0x00,0x42,0x34,0x00,0x00,0x22,0xa2,0x00,0x80,0x02,0x3c,0xdf,0x07,0x42,0x34, | ||
1197 | 0x2b,0x18,0xa3,0x00,0x09,0x00,0x60,0x10,0x24,0x20,0x82,0x00,0xbf,0x42,0xe2,0x92, | ||
1198 | 0x00,0x00,0x00,0x00,0x2b,0x10,0x45,0x00,0x05,0x00,0x40,0x10,0x02,0x80,0x02,0x3c, | ||
1199 | 0x01,0x00,0x02,0x3c,0x25,0x10,0xa2,0x00,0x21,0x90,0x42,0x02,0x02,0x80,0x02,0x3c, | ||
1200 | 0x8e,0x7d,0x43,0x90,0x22,0x00,0x02,0x24,0x1c,0x00,0x62,0x10,0x92,0x00,0x02,0x24, | ||
1201 | 0x1b,0x00,0x62,0x10,0x02,0x80,0x03,0x3c,0xff,0xff,0x94,0x26,0xb3,0x0a,0x00,0x0c, | ||
1202 | 0xf4,0x01,0x04,0x24,0xab,0xff,0x81,0x06,0x2a,0xb0,0x03,0x3c,0x04,0x00,0x60,0x12, | ||
1203 | 0x25,0xb0,0x02,0x3c,0xbd,0x4e,0x00,0x0c,0x21,0x20,0x60,0x02,0x25,0xb0,0x02,0x3c, | ||
1204 | 0xd8,0x02,0x42,0x34,0x00,0x00,0x52,0xac,0x21,0x10,0x40,0x02,0x3c,0x00,0xbf,0x8f, | ||
1205 | 0x38,0x00,0xbe,0x8f,0x34,0x00,0xb7,0x8f,0x30,0x00,0xb6,0x8f,0x2c,0x00,0xb5,0x8f, | ||
1206 | 0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f, | ||
1207 | 0x18,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x40,0x00,0xbd,0x27,0x02,0x80,0x03,0x3c, | ||
1208 | 0x68,0x15,0x63,0x24,0xbe,0x42,0x62,0x90,0xc0,0x07,0x83,0x30,0x82,0x19,0x03,0x00, | ||
1209 | 0x2b,0x10,0x62,0x00,0xe0,0xff,0x40,0x10,0x02,0x80,0x04,0x3c,0x68,0x15,0x84,0x24, | ||
1210 | 0xbf,0x42,0x82,0x90,0x00,0x00,0x00,0x00,0x2b,0x10,0x43,0x00,0xda,0xff,0x40,0x10, | ||
1211 | 0x00,0x12,0x03,0x00,0x10,0x00,0x03,0x3c,0x25,0x10,0x43,0x00,0x9a,0x12,0x00,0x08, | ||
1212 | 0x21,0x90,0x42,0x02,0xe8,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0x0f,0x00,0x10,0x3c, | ||
1213 | 0xff,0xff,0x05,0x36,0xf0,0xf8,0x06,0x34,0x14,0x00,0xbf,0xaf,0xba,0x44,0x00,0x0c, | ||
1214 | 0x15,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0xff,0xff,0x05,0x36, | ||
1215 | 0x56,0x30,0x06,0x24,0xba,0x44,0x00,0x0c,0x1a,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c, | ||
1216 | 0x64,0x00,0x04,0x24,0x02,0x80,0x0b,0x3c,0x68,0x15,0x64,0x25,0x04,0x43,0x83,0x90, | ||
1217 | 0x04,0x00,0x02,0x24,0x19,0x00,0x62,0x10,0x25,0xb0,0x02,0x3c,0x14,0x43,0x8a,0x8c, | ||
1218 | 0x18,0x43,0x88,0x8c,0x25,0xb0,0x02,0x3c,0x1c,0x0e,0x49,0x34,0x00,0x0e,0x43,0x34, | ||
1219 | 0x04,0x0e,0x44,0x34,0x08,0x0e,0x45,0x34,0x10,0x0e,0x46,0x34,0x14,0x0e,0x47,0x34, | ||
1220 | 0x18,0x0e,0x42,0x34,0x00,0x00,0x6a,0xac,0x00,0x00,0x8a,0xac,0x00,0x00,0xa8,0xac, | ||
1221 | 0x00,0x00,0xca,0xac,0x00,0x00,0xea,0xac,0x00,0x00,0x4a,0xac,0x00,0x00,0x2a,0xad, | ||
1222 | 0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f,0x68,0x15,0x63,0x25,0x04,0x00,0x02,0x24, | ||
1223 | 0x18,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03,0x04,0x43,0x62,0xa0,0x00,0x0e,0x42,0x34, | ||
1224 | 0x00,0x00,0x43,0x8c,0x14,0x43,0x8a,0x8c,0x00,0x00,0x00,0x00,0xe4,0xff,0x6a,0x14, | ||
1225 | 0x00,0x00,0x00,0x00,0xec,0x12,0x00,0x08,0x00,0x00,0x00,0x00,0xe8,0xff,0xbd,0x27, | ||
1226 | 0x10,0x00,0xb0,0xaf,0x0f,0x00,0x10,0x3c,0xff,0xff,0x05,0x36,0xf0,0xf8,0x06,0x34, | ||
1227 | 0x14,0x00,0xbf,0xaf,0xba,0x44,0x00,0x0c,0x15,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c, | ||
1228 | 0x64,0x00,0x04,0x24,0xff,0xff,0x05,0x36,0x56,0x30,0x06,0x24,0xba,0x44,0x00,0x0c, | ||
1229 | 0x1a,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x02,0x80,0x04,0x3c, | ||
1230 | 0x68,0x15,0x83,0x24,0x04,0x43,0x65,0x90,0x21,0x70,0x60,0x00,0x10,0x10,0x03,0x3c, | ||
1231 | 0x25,0xb0,0x02,0x3c,0x10,0x10,0x66,0x34,0x01,0x00,0x03,0x24,0x1c,0x0e,0x4d,0x34, | ||
1232 | 0x00,0x0e,0x4a,0x34,0x04,0x0e,0x4b,0x34,0x08,0x0e,0x4c,0x34,0x10,0x0e,0x47,0x34, | ||
1233 | 0x14,0x0e,0x48,0x34,0x0f,0x00,0xa3,0x10,0x18,0x0e,0x49,0x34,0x10,0x10,0x02,0x24, | ||
1234 | 0x00,0x00,0x46,0xad,0x00,0x00,0x66,0xad,0x00,0x00,0x82,0xad,0x00,0x00,0xe6,0xac, | ||
1235 | 0x00,0x00,0x06,0xad,0x00,0x00,0x26,0xad,0x00,0x00,0xa6,0xad,0x14,0x00,0xbf,0x8f, | ||
1236 | 0x10,0x00,0xb0,0x8f,0x01,0x00,0x02,0x24,0x18,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03, | ||
1237 | 0x04,0x43,0xc2,0xa1,0x00,0x00,0x44,0x8d,0x00,0x00,0x00,0x00,0xf0,0xff,0x86,0x14, | ||
1238 | 0x10,0x10,0x02,0x24,0x23,0x13,0x00,0x08,0x00,0x00,0x00,0x00,0xe0,0xff,0xbd,0x27, | ||
1239 | 0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x01,0x00,0x11,0x3c,0x0f,0x00,0x10,0x3c, | ||
1240 | 0xff,0xff,0x05,0x36,0xf4,0x98,0x26,0x36,0x18,0x00,0xbf,0xaf,0xba,0x44,0x00,0x0c, | ||
1241 | 0x15,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0xff,0xff,0x05,0x36, | ||
1242 | 0x56,0x30,0x26,0x36,0xba,0x44,0x00,0x0c,0x1a,0x00,0x04,0x24,0x02,0x80,0x10,0x3c, | ||
1243 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x68,0x15,0x04,0x26,0x04,0x43,0x82,0x90, | ||
1244 | 0x00,0x00,0x00,0x00,0x0d,0x00,0x40,0x14,0x25,0xb0,0x02,0x3c,0x00,0x0e,0x42,0x34, | ||
1245 | 0x00,0x00,0x43,0x8c,0xec,0x42,0x8f,0x8c,0x00,0x00,0x00,0x00,0x08,0x00,0x6f,0x14, | ||
1246 | 0x68,0x15,0x02,0x26,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f, | ||
1247 | 0x20,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03,0x04,0x43,0x40,0xa0,0xec,0x42,0x8f,0x8c, | ||
1248 | 0xe8,0x42,0x88,0x8c,0xf0,0x42,0x8a,0x8c,0xf4,0x42,0x8b,0x8c,0xf8,0x42,0x8c,0x8c, | ||
1249 | 0xfc,0x42,0x8d,0x8c,0x25,0xb0,0x02,0x3c,0x00,0x43,0x8e,0x8c,0x1c,0x0e,0x49,0x34, | ||
1250 | 0x08,0x0e,0x43,0x34,0x00,0x0e,0x44,0x34,0x04,0x0e,0x45,0x34,0x10,0x0e,0x46,0x34, | ||
1251 | 0x14,0x0e,0x47,0x34,0x18,0x0e,0x42,0x34,0x00,0x00,0x68,0xac,0x18,0x00,0xbf,0x8f, | ||
1252 | 0x00,0x00,0x8f,0xac,0x14,0x00,0xb1,0x8f,0x00,0x00,0xaa,0xac,0x00,0x00,0xcb,0xac, | ||
1253 | 0x00,0x00,0xec,0xac,0x00,0x00,0x4d,0xac,0x68,0x15,0x02,0x26,0x10,0x00,0xb0,0x8f, | ||
1254 | 0x20,0x00,0xbd,0x27,0x00,0x00,0x2e,0xad,0x08,0x00,0xe0,0x03,0x04,0x43,0x40,0xa0, | ||
1255 | 0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x01,0x00,0x11,0x3c, | ||
1256 | 0x0f,0x00,0x10,0x3c,0xff,0xff,0x05,0x36,0xf4,0x98,0x26,0x36,0x18,0x00,0xbf,0xaf, | ||
1257 | 0xba,0x44,0x00,0x0c,0x15,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24, | ||
1258 | 0xff,0xff,0x05,0x36,0x56,0x30,0x26,0x36,0xba,0x44,0x00,0x0c,0x1a,0x00,0x04,0x24, | ||
1259 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x02,0x80,0x18,0x3c,0x68,0x15,0x05,0x27, | ||
1260 | 0x04,0x43,0xa3,0x90,0x03,0x00,0x02,0x24,0x2a,0x00,0x62,0x10,0x25,0xb0,0x02,0x3c, | ||
1261 | 0xec,0x42,0xaf,0x8c,0x08,0x43,0xa3,0x8c,0xe8,0x42,0xa2,0x8c,0xf0,0x42,0xac,0x8c, | ||
1262 | 0xf4,0x42,0xad,0x8c,0xf8,0x42,0xa9,0x8c,0xfc,0x42,0xaa,0x8c,0x00,0x43,0xab,0x8c, | ||
1263 | 0x21,0x70,0x43,0x00,0xff,0xff,0x02,0x3c,0x25,0xb0,0x03,0x3c,0xff,0x00,0x42,0x34, | ||
1264 | 0x00,0xff,0xc4,0x31,0x04,0x0e,0x65,0x34,0x10,0x0e,0x66,0x34,0x14,0x0e,0x67,0x34, | ||
1265 | 0x18,0x0e,0x68,0x34,0x24,0x80,0xc2,0x01,0x08,0x0e,0x71,0x34,0x00,0x0e,0x62,0x34, | ||
1266 | 0x01,0x3f,0x84,0x2c,0x1c,0x0e,0x63,0x34,0x00,0x00,0x4f,0xac,0x00,0x00,0xac,0xac, | ||
1267 | 0x00,0x00,0xcd,0xac,0x00,0x00,0xe9,0xac,0x00,0x00,0x0a,0xad,0x00,0x00,0x6b,0xac, | ||
1268 | 0x0a,0x00,0x80,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x2e,0xae,0x18,0x00,0xbf,0x8f, | ||
1269 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x68,0x15,0x03,0x27,0x03,0x00,0x02,0x24, | ||
1270 | 0x20,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03,0x04,0x43,0x62,0xa0,0xa6,0x13,0x00,0x08, | ||
1271 | 0x00,0x3f,0x0e,0x36,0x00,0x0e,0x42,0x34,0x00,0x00,0x43,0x8c,0xec,0x42,0xaf,0x8c, | ||
1272 | 0x00,0x00,0x00,0x00,0xd3,0xff,0x6f,0x14,0x00,0x00,0x00,0x00,0xa7,0x13,0x00,0x08, | ||
1273 | 0x00,0x00,0x00,0x00,0xd0,0xff,0xbd,0x27,0x18,0x00,0xb2,0xaf,0x02,0x80,0x12,0x3c, | ||
1274 | 0x24,0x00,0xb5,0xaf,0x20,0x00,0xb4,0xaf,0x28,0x00,0xbf,0xaf,0x1c,0x00,0xb3,0xaf, | ||
1275 | 0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x68,0x15,0x44,0x26,0x02,0x80,0x14,0x3c, | ||
1276 | 0x00,0x40,0x85,0x8c,0xdc,0x63,0x83,0x8c,0x8e,0x7d,0x86,0x92,0x25,0xb0,0x02,0x3c, | ||
1277 | 0x0f,0x0c,0x42,0x34,0x00,0x00,0x46,0xa0,0x02,0x19,0x03,0x00,0xf0,0xf0,0xa5,0x30, | ||
1278 | 0x00,0x10,0x02,0x24,0x04,0x43,0x93,0x90,0x71,0x00,0xa2,0x10,0x7f,0x00,0x75,0x30, | ||
1279 | 0x25,0xb0,0x09,0x3c,0x4c,0x00,0x23,0x35,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00, | ||
1280 | 0x03,0x00,0x42,0x30,0x09,0x00,0x40,0x10,0x68,0x15,0x45,0x26,0x68,0x15,0x4a,0x26, | ||
1281 | 0x00,0x40,0x42,0x8d,0x00,0x00,0x00,0x00,0x02,0x13,0x02,0x00,0x0f,0x00,0x42,0x30, | ||
1282 | 0x33,0x00,0x40,0x10,0x00,0x0e,0x25,0x35,0x68,0x15,0x45,0x26,0x04,0x43,0xa2,0x8c, | ||
1283 | 0x00,0x00,0x00,0x00,0x02,0x12,0x02,0x00,0x0f,0x00,0x40,0x14,0x68,0x15,0x4a,0x26, | ||
1284 | 0x25,0xb0,0x02,0x3c,0x84,0x01,0x42,0x34,0x00,0x00,0x44,0x8c,0x0d,0x00,0x03,0x24, | ||
1285 | 0x7e,0x00,0x83,0x10,0x3e,0x00,0x02,0x24,0x4a,0x00,0x03,0x24,0x1f,0x43,0xa2,0xa0, | ||
1286 | 0x1c,0x43,0xa3,0xa0,0x45,0x00,0x02,0x24,0x43,0x00,0x03,0x24,0x1d,0x43,0xa2,0xa0, | ||
1287 | 0x1e,0x43,0xa3,0xa0,0x68,0x15,0x4a,0x26,0xdc,0x63,0x4c,0x8d,0x04,0x40,0x42,0x8d, | ||
1288 | 0x00,0x40,0x4b,0x8d,0x1e,0x43,0x4d,0x91,0x1c,0x43,0x4e,0x91,0x25,0xb0,0x09,0x3c, | ||
1289 | 0x02,0x11,0x02,0x00,0x60,0x0c,0x27,0x35,0x02,0x19,0x0c,0x00,0x98,0x0c,0x24,0x35, | ||
1290 | 0x00,0x00,0xe3,0xa0,0x66,0x0c,0x25,0x35,0x00,0x00,0x82,0xa0,0x67,0x0c,0x26,0x35, | ||
1291 | 0xf0,0xf0,0x68,0x31,0x10,0x10,0x02,0x24,0x00,0x00,0xad,0xa0,0x00,0x00,0xce,0xa0, | ||
1292 | 0x43,0x00,0x02,0x11,0xff,0xff,0x02,0x34,0x28,0x00,0xbf,0x8f,0x24,0x00,0xb5,0x8f, | ||
1293 | 0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
1294 | 0x10,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27, | ||
1295 | 0x00,0x00,0xa2,0x8c,0x00,0x00,0x00,0x00,0x5d,0x00,0x40,0x10,0x10,0x0e,0x28,0x35, | ||
1296 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
1297 | 0x08,0x0e,0x22,0x35,0x04,0x0e,0x24,0x35,0x00,0x00,0x43,0x8c,0x00,0x00,0xa5,0x8c, | ||
1298 | 0x00,0x00,0x82,0x8c,0xe8,0x42,0x43,0xad,0xec,0x42,0x45,0xad,0xf0,0x42,0x42,0xad, | ||
1299 | 0x14,0x0e,0x24,0x35,0x18,0x0e,0x22,0x35,0x1c,0x0e,0x25,0x35,0x00,0x00,0x08,0x8d, | ||
1300 | 0x8e,0x7d,0x8b,0x92,0x00,0x00,0x86,0x8c,0x00,0xff,0x63,0x30,0x00,0x00,0x47,0x8c, | ||
1301 | 0x00,0x00,0xa4,0x8c,0x9a,0x0c,0x22,0x35,0x02,0x1a,0x03,0x00,0x00,0x00,0x43,0xa0, | ||
1302 | 0x22,0x00,0x02,0x24,0xf4,0x42,0x48,0xad,0xf8,0x42,0x46,0xad,0xfc,0x42,0x47,0xad, | ||
1303 | 0x58,0x00,0x62,0x11,0x00,0x43,0x44,0xad,0x92,0x00,0x02,0x24,0x56,0x00,0x62,0x11, | ||
1304 | 0x0d,0x08,0x22,0x35,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
1305 | 0x68,0x15,0x44,0x26,0x00,0x40,0x83,0x8c,0xff,0xff,0x02,0x3c,0xff,0x0f,0x42,0x34, | ||
1306 | 0x24,0x18,0x62,0x00,0x00,0x10,0x63,0x34,0xde,0x13,0x00,0x08,0x00,0x40,0x83,0xac, | ||
1307 | 0x01,0x00,0x02,0x24,0x35,0x00,0x62,0x12,0x04,0x00,0x02,0x24,0x33,0x00,0x62,0x12, | ||
1308 | 0x68,0x15,0x43,0x26,0xff,0xff,0x02,0x24,0xd0,0x13,0x00,0x08,0x04,0x43,0x62,0xa0, | ||
1309 | 0xbd,0xff,0x82,0x11,0x02,0x12,0x0b,0x00,0x0f,0x00,0x48,0x30,0x01,0x00,0x03,0x24, | ||
1310 | 0xb9,0xff,0x03,0x15,0x4c,0x00,0x23,0x35,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00, | ||
1311 | 0x03,0x00,0x42,0x30,0xb4,0xff,0x40,0x10,0x03,0x00,0x02,0x24,0x5f,0x00,0x62,0x12, | ||
1312 | 0x04,0x00,0x62,0x2a,0x45,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x64,0x00,0x60,0x12, | ||
1313 | 0xff,0x00,0xa2,0x31,0xac,0xff,0x68,0x16,0xff,0x00,0xc2,0x31,0x2b,0x10,0xa2,0x02, | ||
1314 | 0x52,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x1f,0x43,0x42,0x91,0x00,0x00,0x00,0x00, | ||
1315 | 0x2b,0x10,0x55,0x00,0x44,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x2f,0x13,0x00,0x0c, | ||
1316 | 0x00,0x00,0x00,0x00,0x06,0x14,0x00,0x08,0x00,0x00,0x00,0x00,0x3b,0x00,0x02,0x24, | ||
1317 | 0x46,0x00,0x03,0x24,0x1f,0x43,0xa2,0xa0,0x1c,0x43,0xa3,0xa0,0x41,0x00,0x02,0x24, | ||
1318 | 0x40,0x00,0x03,0x24,0x1d,0x43,0xa2,0xa0,0xf1,0x13,0x00,0x08,0x1e,0x43,0xa3,0xa0, | ||
1319 | 0x00,0x00,0x03,0x8d,0x3f,0x3f,0x02,0x3c,0x3f,0x3f,0x42,0x34,0xa0,0xff,0x62,0x14, | ||
1320 | 0x00,0x00,0x00,0x00,0xdf,0x13,0x00,0x08,0x68,0x15,0x45,0x26,0x0f,0x00,0x10,0x3c, | ||
1321 | 0x01,0x00,0x11,0x3c,0xff,0xff,0x05,0x36,0xf4,0x98,0x26,0x36,0xba,0x44,0x00,0x0c, | ||
1322 | 0x15,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0xff,0xff,0x05,0x36, | ||
1323 | 0x56,0x30,0x26,0x36,0xba,0x44,0x00,0x0c,0x1a,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c, | ||
1324 | 0x64,0x00,0x04,0x24,0x68,0x15,0x43,0x26,0xff,0xff,0x02,0x24,0xd0,0x13,0x00,0x08, | ||
1325 | 0x04,0x43,0x62,0xa0,0x0d,0x08,0x22,0x35,0x00,0x00,0x43,0x90,0x00,0x00,0x00,0x00, | ||
1326 | 0x0f,0x00,0x63,0x30,0x08,0x00,0x62,0x2c,0x0f,0x00,0x63,0x38,0xa5,0xff,0x40,0x14, | ||
1327 | 0x01,0x00,0x65,0x24,0x00,0x16,0x05,0x00,0x00,0x24,0x05,0x00,0x00,0x1a,0x05,0x00, | ||
1328 | 0x25,0x10,0x44,0x00,0x25,0x10,0x43,0x00,0x25,0x10,0x45,0x00,0x25,0x18,0x65,0x00, | ||
1329 | 0x18,0x43,0x43,0xad,0x35,0x14,0x00,0x08,0x14,0x43,0x42,0xad,0x04,0x00,0x02,0x24, | ||
1330 | 0x0d,0x00,0x62,0x12,0xff,0x00,0x02,0x24,0x67,0xff,0x62,0x16,0xff,0x00,0xa2,0x31, | ||
1331 | 0x2b,0x10,0xa2,0x02,0x1d,0x00,0x40,0x14,0xff,0x00,0xc2,0x31,0x2b,0x10,0xa2,0x02, | ||
1332 | 0x0a,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0xfb,0x12,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
1333 | 0x06,0x14,0x00,0x08,0x00,0x00,0x00,0x00,0x1d,0x43,0x42,0x91,0x00,0x00,0x00,0x00, | ||
1334 | 0x2b,0x10,0x55,0x00,0xf8,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0xc5,0x12,0x00,0x0c, | ||
1335 | 0x00,0x00,0x00,0x00,0x06,0x14,0x00,0x08,0x00,0x00,0x00,0x00,0x20,0x43,0x42,0x91, | ||
1336 | 0x00,0x00,0x00,0x00,0x2b,0x10,0xa2,0x02,0xac,0xff,0x40,0x10,0x00,0x00,0x00,0x00, | ||
1337 | 0x70,0x13,0x00,0x0c,0x00,0x00,0x00,0x00,0x06,0x14,0x00,0x08,0x00,0x00,0x00,0x00, | ||
1338 | 0x2b,0x10,0xa2,0x02,0xe8,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0x21,0x43,0x42,0x91, | ||
1339 | 0x00,0x00,0x00,0x00,0x2b,0x10,0x55,0x00,0xa0,0xff,0x40,0x14,0x00,0x00,0x00,0x00, | ||
1340 | 0x70,0x13,0x00,0x0c,0x00,0x00,0x00,0x00,0x06,0x14,0x00,0x08,0x00,0x00,0x00,0x00, | ||
1341 | 0x02,0x80,0x08,0x3c,0x68,0x15,0x05,0x25,0xdc,0x63,0xa4,0x8c,0xe6,0x42,0xa3,0x90, | ||
1342 | 0x02,0x11,0x04,0x00,0x1f,0x00,0x60,0x14,0x7f,0x00,0x46,0x30,0x25,0xb0,0x07,0x3c, | ||
1343 | 0x4c,0x00,0xe2,0x34,0x00,0x00,0x43,0x90,0x00,0x00,0x00,0x00,0x19,0x00,0x60,0x10, | ||
1344 | 0x00,0x00,0x00,0x00,0xff,0xff,0x02,0x34,0x16,0x00,0x82,0x10,0x00,0x00,0x00,0x00, | ||
1345 | 0x00,0x08,0xe3,0x34,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x30, | ||
1346 | 0x12,0x00,0x40,0x10,0x4b,0x00,0xc2,0x2c,0x29,0x00,0x40,0x10,0x01,0x00,0x04,0x24, | ||
1347 | 0xd8,0xff,0xc2,0x24,0x1e,0x00,0x42,0x2c,0x2f,0x00,0x40,0x10,0x23,0x00,0xc2,0x2c, | ||
1348 | 0x68,0x15,0x04,0x25,0xd3,0x42,0x82,0x90,0x00,0x00,0x00,0x00,0x29,0x00,0x40,0x10, | ||
1349 | 0x25,0xb0,0x02,0x3c,0x20,0x00,0x03,0x24,0x87,0x0c,0x42,0x34,0x00,0x00,0x43,0xa0, | ||
1350 | 0xd3,0x42,0x80,0xa0,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x0f,0x00,0x40,0x10, | ||
1351 | 0x01,0x00,0x04,0x24,0xd8,0xff,0xc2,0x24,0x1e,0x00,0x42,0x2c,0x2c,0x00,0x40,0x10, | ||
1352 | 0x23,0x00,0xc2,0x2c,0x68,0x15,0x04,0x25,0xd3,0x42,0x82,0x90,0x00,0x00,0x00,0x00, | ||
1353 | 0x26,0x00,0x40,0x10,0x25,0xb0,0x02,0x3c,0x44,0x00,0x03,0x24,0x30,0x0c,0x42,0x34, | ||
1354 | 0x00,0x00,0x43,0xa0,0xed,0x14,0x00,0x08,0xd3,0x42,0x80,0xa0,0xd3,0x42,0xa2,0x90, | ||
1355 | 0x00,0x00,0x00,0x00,0xef,0xff,0x44,0x10,0x30,0x0c,0xe3,0x34,0x43,0x00,0x02,0x24, | ||
1356 | 0xd3,0x42,0xa4,0xa0,0x00,0x00,0x62,0xa0,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1357 | 0xd3,0x42,0xa2,0x90,0x00,0x00,0x00,0x00,0xd5,0xff,0x44,0x10,0x87,0x0c,0xe3,0x34, | ||
1358 | 0x10,0x00,0x02,0x24,0xd3,0x42,0xa4,0xa0,0x00,0x00,0x62,0xa0,0x06,0x15,0x00,0x08, | ||
1359 | 0x00,0x00,0x00,0x00,0x23,0x00,0xc2,0x2c,0xda,0xff,0x40,0x10,0x00,0x00,0x00,0x00, | ||
1360 | 0x68,0x15,0x04,0x25,0xd3,0x42,0x82,0x90,0x02,0x00,0x03,0x24,0xd5,0xff,0x43,0x10, | ||
1361 | 0x00,0x00,0x00,0x00,0x25,0xb0,0x02,0x3c,0x87,0x0c,0x42,0x34,0xd3,0x42,0x83,0xa0, | ||
1362 | 0x00,0x00,0x40,0xa0,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x23,0x00,0xc2,0x2c, | ||
1363 | 0xcc,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0x68,0x15,0x04,0x25,0xd3,0x42,0x82,0x90, | ||
1364 | 0x02,0x00,0x03,0x24,0xc7,0xff,0x43,0x10,0x00,0x00,0x00,0x00,0x25,0xb0,0x02,0x3c, | ||
1365 | 0xd3,0x42,0x83,0xa0,0x30,0x0c,0x42,0x34,0x42,0x00,0x03,0x24,0x00,0x00,0x43,0xa0, | ||
1366 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x02,0x80,0x02,0x3c,0x68,0x15,0x45,0x24, | ||
1367 | 0xd5,0x42,0xa3,0x90,0x02,0x00,0x02,0x24,0x03,0x00,0x62,0x10,0x00,0x00,0x00,0x00, | ||
1368 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0xdc,0x63,0xa2,0x8c,0x25,0xb0,0x03,0x3c, | ||
1369 | 0x0a,0x0a,0x68,0x34,0x02,0x11,0x02,0x00,0x7f,0x00,0x42,0x30,0x1a,0x00,0x44,0x2c, | ||
1370 | 0x14,0x00,0x42,0x2c,0x01,0x0a,0x66,0x34,0x0b,0x00,0x40,0x14,0x2e,0x0a,0x67,0x34, | ||
1371 | 0xf3,0xff,0x80,0x14,0x00,0x00,0x00,0x00,0xd4,0x42,0xa4,0x90,0x01,0x00,0x02,0x24, | ||
1372 | 0x01,0x0a,0x67,0x34,0x0f,0x00,0x82,0x10,0x2e,0x0a,0x66,0x34,0xd4,0x42,0xa0,0xa0, | ||
1373 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x40,0x00,0x02,0x24,0x00,0x00,0xc2,0xa0, | ||
1374 | 0x01,0x00,0x03,0x24,0xdf,0xff,0x02,0x24,0xd4,0x42,0xa3,0xa0,0x00,0x00,0xe2,0xa0, | ||
1375 | 0x03,0x00,0x03,0x24,0x21,0x10,0x00,0x00,0x00,0x00,0x03,0xa1,0x08,0x00,0xe0,0x03, | ||
1376 | 0x00,0x00,0x00,0x00,0x47,0x00,0x02,0x24,0x00,0x00,0xe2,0xa0,0xd3,0xff,0x03,0x24, | ||
1377 | 0x83,0xff,0x02,0x24,0x00,0x00,0xc3,0xa0,0x00,0x00,0x02,0xa1,0x48,0x15,0x00,0x08, | ||
1378 | 0xd4,0x42,0xa0,0xa0,0xd0,0xff,0xbd,0x27,0x1c,0x00,0xb1,0xaf,0x28,0x00,0xbf,0xaf, | ||
1379 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x18,0x00,0xb0,0xaf,0xff,0xff,0x11,0x24, | ||
1380 | 0x02,0x80,0x13,0x3c,0x41,0xb0,0x02,0x3c,0x68,0x15,0x66,0x26,0x04,0x00,0x42,0x34, | ||
1381 | 0x00,0x00,0x47,0x8c,0x00,0x4b,0xc5,0x8c,0x02,0x80,0x03,0x3c,0x96,0x7d,0x64,0x90, | ||
1382 | 0xfc,0x4a,0xc8,0x8c,0x02,0x80,0x02,0x3c,0xb8,0x7d,0x49,0x90,0x25,0xb0,0x0a,0x3c, | ||
1383 | 0x25,0x90,0xa7,0x00,0xb0,0x03,0x42,0x35,0x00,0x00,0x52,0xac,0x00,0x24,0x04,0x00, | ||
1384 | 0x00,0x00,0x48,0xac,0x84,0x02,0x43,0x35,0x8c,0x02,0x45,0x35,0x01,0x00,0x02,0x24, | ||
1385 | 0x00,0x00,0x72,0xac,0x00,0x00,0xa4,0xac,0xb9,0x04,0x22,0x11,0x00,0x4b,0xd2,0xac, | ||
1386 | 0x68,0x15,0x66,0x26,0xfc,0x4a,0xc2,0x8c,0x00,0x00,0x00,0x00,0x24,0x28,0x52,0x00, | ||
1387 | 0x01,0x00,0xa3,0x30,0x09,0x00,0x60,0x10,0x04,0x00,0xa2,0x30,0x00,0x4b,0xc2,0x8c, | ||
1388 | 0x25,0xb0,0x03,0x3c,0x01,0x00,0x04,0x24,0x01,0x00,0x42,0x38,0xb0,0x03,0x63,0x34, | ||
1389 | 0x00,0x00,0x64,0xac,0x00,0x4b,0xc2,0xac,0x04,0x00,0xa2,0x30,0x09,0x00,0x40,0x10, | ||
1390 | 0x08,0x00,0xa2,0x30,0x00,0x4b,0xc2,0x8c,0x25,0xb0,0x03,0x3c,0x04,0x00,0x04,0x24, | ||
1391 | 0x04,0x00,0x42,0x38,0xb0,0x03,0x63,0x34,0x00,0x00,0x64,0xac,0x00,0x4b,0xc2,0xac, | ||
1392 | 0x08,0x00,0xa2,0x30,0x0e,0x00,0x40,0x10,0x68,0x15,0x64,0x26,0xc9,0x64,0xc2,0x90, | ||
1393 | 0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24, | ||
1394 | 0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0xc9,0x64,0xc0,0xa0,0x00,0x4b,0xc2,0x8c, | ||
1395 | 0x00,0x00,0x00,0x00,0x08,0x00,0x42,0x38,0x00,0x4b,0xc2,0xac,0x68,0x15,0x64,0x26, | ||
1396 | 0xfc,0x4a,0x82,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00,0x10,0x00,0x42,0x30, | ||
1397 | 0x0d,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00, | ||
1398 | 0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34, | ||
1399 | 0x00,0x00,0x43,0xa0,0xc9,0x64,0x80,0xa0,0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1400 | 0x10,0x00,0x42,0x38,0x00,0x4b,0x82,0xac,0x68,0x15,0x64,0x26,0xfc,0x4a,0x82,0x8c, | ||
1401 | 0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00,0x20,0x00,0x42,0x30,0x0e,0x00,0x40,0x10, | ||
1402 | 0x00,0x00,0x00,0x00,0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18, | ||
1403 | 0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0, | ||
1404 | 0xc9,0x64,0x80,0xa0,0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00,0x20,0x00,0x42,0x38, | ||
1405 | 0x00,0x4b,0x82,0xac,0x68,0x15,0x64,0x26,0xfc,0x4a,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1406 | 0x24,0x10,0x52,0x00,0x40,0x00,0x42,0x30,0x0d,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
1407 | 0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c, | ||
1408 | 0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0xc9,0x64,0x80,0xa0, | ||
1409 | 0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00,0x40,0x00,0x42,0x38,0x00,0x4b,0x82,0xac, | ||
1410 | 0x68,0x15,0x64,0x26,0xfc,0x4a,0x82,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00, | ||
1411 | 0x80,0x00,0x42,0x30,0x0e,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0xc9,0x64,0x82,0x90, | ||
1412 | 0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24, | ||
1413 | 0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0xc9,0x64,0x80,0xa0,0x00,0x4b,0x82,0x8c, | ||
1414 | 0x00,0x00,0x00,0x00,0x80,0x00,0x42,0x38,0x00,0x4b,0x82,0xac,0x68,0x15,0x64,0x26, | ||
1415 | 0xfc,0x4a,0x82,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00,0x00,0x01,0x42,0x30, | ||
1416 | 0x0d,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00, | ||
1417 | 0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34, | ||
1418 | 0x00,0x00,0x43,0xa0,0xc9,0x64,0x80,0xa0,0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1419 | 0x00,0x01,0x42,0x38,0x00,0x4b,0x82,0xac,0x68,0x15,0x64,0x26,0xfc,0x4a,0x82,0x8c, | ||
1420 | 0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00,0x00,0x02,0x42,0x30,0x0e,0x00,0x40,0x10, | ||
1421 | 0x00,0x00,0x00,0x00,0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18, | ||
1422 | 0x2a,0xb0,0x02,0x3c,0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0, | ||
1423 | 0xc9,0x64,0x80,0xa0,0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00,0x00,0x02,0x42,0x38, | ||
1424 | 0x00,0x4b,0x82,0xac,0x68,0x15,0x64,0x26,0xfc,0x4a,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1425 | 0x24,0x10,0x52,0x00,0x00,0x04,0x42,0x30,0x0d,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
1426 | 0xc9,0x64,0x82,0x90,0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x18,0x2a,0xb0,0x02,0x3c, | ||
1427 | 0x02,0x00,0x03,0x24,0x01,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0xc9,0x64,0x80,0xa0, | ||
1428 | 0x00,0x4b,0x82,0x8c,0x00,0x00,0x00,0x00,0x00,0x04,0x42,0x38,0x00,0x4b,0x82,0xac, | ||
1429 | 0x68,0x15,0x63,0x26,0xfc,0x4a,0x62,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00, | ||
1430 | 0x00,0x08,0x42,0x30,0x3a,0x00,0x40,0x10,0x2a,0xb0,0x05,0x3c,0x00,0x00,0xa8,0x8c, | ||
1431 | 0xff,0x00,0x02,0x24,0xff,0x00,0x04,0x31,0x31,0x00,0x82,0x10,0x00,0x80,0x02,0x31, | ||
1432 | 0x08,0x04,0x40,0x14,0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01, | ||
1433 | 0x05,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0xc9,0x64,0x62,0x90,0x00,0x00,0x00,0x00, | ||
1434 | 0x0b,0x00,0x40,0x18,0xff,0x00,0x02,0x24,0x08,0x64,0x62,0x90,0x20,0xb0,0x03,0x3c, | ||
1435 | 0x00,0x12,0x02,0x00,0x21,0x10,0x43,0x00,0x0c,0x00,0x48,0x8c,0x25,0xb0,0x03,0x3c, | ||
1436 | 0xb0,0x03,0x63,0x34,0x00,0x00,0x68,0xac,0xff,0x00,0x04,0x31,0xff,0x00,0x02,0x24, | ||
1437 | 0x1a,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31,0xc0,0x64,0x05,0x8e, | ||
1438 | 0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00, | ||
1439 | 0x54,0x64,0x03,0xae,0x21,0x20,0x00,0x00,0x08,0x64,0x08,0xa2,0x20,0x00,0x07,0x24, | ||
1440 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0xfc,0x4a,0x05,0x8e,0x02,0x80,0x06,0x3c, | ||
1441 | 0x6c,0x7e,0xc4,0x8c,0xff,0xc7,0x02,0x24,0x24,0x28,0xa2,0x00,0x25,0xb0,0x02,0x3c, | ||
1442 | 0x04,0x00,0x84,0x34,0x80,0x03,0x42,0x34,0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac, | ||
1443 | 0x00,0x00,0x65,0xac,0x6c,0x7e,0xc4,0xac,0xfc,0x4a,0x05,0xae,0x68,0x15,0x63,0x26, | ||
1444 | 0x00,0x4b,0x62,0x8c,0x00,0x00,0x00,0x00,0x00,0x08,0x42,0x38,0x00,0x4b,0x62,0xac, | ||
1445 | 0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00, | ||
1446 | 0x00,0x10,0x42,0x30,0x38,0x00,0x40,0x10,0x2a,0xb0,0x02,0x3c,0x08,0x00,0x43,0x34, | ||
1447 | 0x00,0x00,0x68,0x8c,0xff,0x00,0x02,0x24,0xff,0x00,0x04,0x31,0x2c,0x00,0x82,0x10, | ||
1448 | 0x00,0x80,0x02,0x31,0xca,0x03,0x40,0x14,0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c, | ||
1449 | 0x24,0x10,0x02,0x01,0x0b,0x00,0x40,0x10,0xff,0x00,0x02,0x24,0x10,0x64,0xa2,0x90, | ||
1450 | 0x20,0xb0,0x03,0x3c,0x00,0x12,0x02,0x00,0x21,0x10,0x43,0x00,0x0c,0x00,0x48,0x8c, | ||
1451 | 0x25,0xb0,0x03,0x3c,0xb0,0x03,0x63,0x34,0x00,0x00,0x68,0xac,0xff,0x00,0x04,0x31, | ||
1452 | 0xff,0x00,0x02,0x24,0x1a,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31, | ||
1453 | 0xd8,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1454 | 0x21,0x30,0x60,0x00,0x6c,0x64,0x03,0xae,0x01,0x00,0x04,0x24,0x10,0x64,0x08,0xa2, | ||
1455 | 0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0xfc,0x4a,0x05,0x8e, | ||
1456 | 0x02,0x80,0x06,0x3c,0x6c,0x7e,0xc4,0x8c,0xff,0xc7,0x02,0x24,0x24,0x28,0xa2,0x00, | ||
1457 | 0x25,0xb0,0x02,0x3c,0x10,0x00,0x84,0x34,0x80,0x03,0x42,0x34,0x41,0xb0,0x03,0x3c, | ||
1458 | 0x00,0x00,0x44,0xac,0x00,0x00,0x65,0xac,0x6c,0x7e,0xc4,0xac,0xfc,0x4a,0x05,0xae, | ||
1459 | 0x68,0x15,0x63,0x26,0x00,0x4b,0x62,0x8c,0x00,0x00,0x00,0x00,0x00,0x10,0x42,0x38, | ||
1460 | 0x00,0x4b,0x62,0xac,0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x00,0x00,0x00,0x00, | ||
1461 | 0x24,0x10,0x52,0x00,0x00,0x20,0x42,0x30,0x37,0x00,0x40,0x10,0x2a,0xb0,0x02,0x3c, | ||
1462 | 0x04,0x00,0x43,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x02,0x24,0xff,0x00,0x04,0x31, | ||
1463 | 0xab,0x03,0x82,0x10,0x00,0x80,0x02,0x31,0x90,0x03,0x40,0x14,0x00,0x80,0x02,0x3c, | ||
1464 | 0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x0b,0x00,0x40,0x10,0xff,0x00,0x02,0x24, | ||
1465 | 0x0c,0x64,0xa2,0x90,0x20,0xb0,0x03,0x3c,0x00,0x12,0x02,0x00,0x21,0x10,0x43,0x00, | ||
1466 | 0x0c,0x00,0x48,0x8c,0x25,0xb0,0x03,0x3c,0xb0,0x03,0x63,0x34,0x00,0x00,0x68,0xac, | ||
1467 | 0xff,0x00,0x04,0x31,0xff,0x00,0x02,0x24,0x1a,0x00,0x82,0x10,0xff,0x00,0x03,0x31, | ||
1468 | 0x68,0x15,0x70,0x26,0xcc,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00, | ||
1469 | 0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00,0x60,0x64,0x03,0xae,0x01,0x00,0x04,0x24, | ||
1470 | 0x0c,0x64,0x08,0xa2,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
1471 | 0xfc,0x4a,0x05,0x8e,0x02,0x80,0x06,0x3c,0x6c,0x7e,0xc4,0x8c,0xff,0xc7,0x02,0x24, | ||
1472 | 0x24,0x28,0xa2,0x00,0x25,0xb0,0x02,0x3c,0x20,0x00,0x84,0x34,0x80,0x03,0x42,0x34, | ||
1473 | 0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac,0x00,0x00,0x65,0xac,0x6c,0x7e,0xc4,0xac, | ||
1474 | 0xfc,0x4a,0x05,0xae,0x68,0x15,0x63,0x26,0x00,0x4b,0x62,0x8c,0x00,0x00,0x00,0x00, | ||
1475 | 0x00,0x20,0x42,0x38,0x00,0x4b,0x62,0xac,0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c, | ||
1476 | 0x00,0x00,0x00,0x00,0x24,0x10,0x52,0x00,0x00,0x80,0x42,0x30,0x59,0x00,0x40,0x10, | ||
1477 | 0x2a,0xb0,0x06,0x3c,0x0c,0x00,0xc3,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x07,0x24, | ||
1478 | 0xff,0x00,0x04,0x31,0x78,0x03,0x87,0x10,0x00,0x80,0x02,0x31,0x24,0x00,0x40,0x14, | ||
1479 | 0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x22,0x00,0x40,0x10, | ||
1480 | 0xff,0x00,0x02,0x24,0x40,0x00,0xc6,0x34,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00, | ||
1481 | 0xff,0x00,0x44,0x30,0x0f,0x00,0x87,0x10,0x68,0x15,0x62,0x26,0xe8,0x63,0xa4,0xa0, | ||
1482 | 0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x09,0x00,0x83,0x10, | ||
1483 | 0x68,0x15,0x62,0x26,0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90, | ||
1484 | 0x21,0x18,0x80,0x00,0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0xe8,0x63,0xe3,0xa0, | ||
1485 | 0x68,0x15,0x62,0x26,0xe8,0x63,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00, | ||
1486 | 0x21,0x18,0x62,0x00,0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34, | ||
1487 | 0xff,0x00,0x04,0x31,0x00,0x00,0x48,0xac,0x16,0x17,0x00,0x08,0xff,0x00,0x02,0x24, | ||
1488 | 0x00,0x00,0x62,0xac,0xff,0x00,0x02,0x24,0x24,0x00,0x82,0x10,0x68,0x15,0x70,0x26, | ||
1489 | 0xff,0x00,0x03,0x31,0x90,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00, | ||
1490 | 0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00,0xe8,0x63,0x08,0xa2,0x24,0x64,0x03,0xae, | ||
1491 | 0x03,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
1492 | 0x02,0x80,0x0a,0x3c,0x7c,0x7e,0x47,0x91,0x02,0x80,0x09,0x3c,0x6c,0x7e,0x25,0x8d, | ||
1493 | 0xfc,0x4a,0x06,0x8e,0x01,0x00,0x08,0x3c,0x80,0xff,0x02,0x24,0x25,0x38,0xe2,0x00, | ||
1494 | 0x00,0x80,0x03,0x35,0x80,0x00,0xa5,0x34,0x27,0x18,0x03,0x00,0x00,0x26,0x07,0x00, | ||
1495 | 0x25,0xb0,0x02,0x3c,0x24,0x30,0xc3,0x00,0x25,0x20,0x85,0x00,0x80,0x03,0x42,0x34, | ||
1496 | 0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac,0x27,0x88,0x08,0x00,0x00,0x00,0x66,0xac, | ||
1497 | 0x6c,0x7e,0x25,0xad,0x7c,0x7e,0x47,0xa1,0xfc,0x4a,0x06,0xae,0x68,0x15,0x63,0x26, | ||
1498 | 0x00,0x4b,0x62,0x8c,0x00,0x00,0x00,0x00,0x00,0x80,0x42,0x38,0x00,0x4b,0x62,0xac, | ||
1499 | 0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x01,0x00,0x03,0x3c,0x24,0x10,0x52,0x00, | ||
1500 | 0x24,0x10,0x51,0x00,0x24,0x10,0x43,0x00,0x56,0x00,0x40,0x10,0x2a,0xb0,0x06,0x3c, | ||
1501 | 0x10,0x00,0xc3,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x07,0x24,0xff,0x00,0x04,0x31, | ||
1502 | 0x23,0x03,0x87,0x10,0x25,0xb0,0x02,0x3c,0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14, | ||
1503 | 0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10, | ||
1504 | 0xff,0x00,0x02,0x24,0x41,0x00,0xc6,0x34,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00, | ||
1505 | 0xff,0x00,0x44,0x30,0x0e,0x00,0x87,0x10,0x68,0x15,0x62,0x26,0xec,0x63,0xa4,0xa0, | ||
1506 | 0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10, | ||
1507 | 0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00, | ||
1508 | 0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0xec,0x63,0xe3,0xa0,0x68,0x15,0x62,0x26, | ||
1509 | 0xec,0x63,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1510 | 0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31, | ||
1511 | 0x00,0x00,0x48,0xac,0x75,0x17,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac, | ||
1512 | 0xff,0x00,0x02,0x24,0x22,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31, | ||
1513 | 0x90,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1514 | 0x21,0x30,0x60,0x00,0xec,0x63,0x08,0xa2,0x24,0x64,0x03,0xae,0x03,0x00,0x04,0x24, | ||
1515 | 0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x02,0x80,0x09,0x3c, | ||
1516 | 0x7c,0x7e,0x27,0x91,0x02,0x80,0x08,0x3c,0x6c,0x7e,0x05,0x8d,0xfc,0x4a,0x06,0x8e, | ||
1517 | 0x01,0x00,0x02,0x3c,0x00,0x80,0x42,0x34,0x40,0x00,0xe7,0x34,0x27,0x10,0x02,0x00, | ||
1518 | 0x24,0x30,0xc2,0x00,0x80,0x00,0xa5,0x34,0x00,0x26,0x07,0x00,0x25,0xb0,0x02,0x3c, | ||
1519 | 0x25,0x20,0x85,0x00,0x80,0x03,0x42,0x34,0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac, | ||
1520 | 0x00,0x00,0x66,0xac,0x6c,0x7e,0x05,0xad,0x7c,0x7e,0x27,0xa1,0xfc,0x4a,0x06,0xae, | ||
1521 | 0x68,0x15,0x62,0x26,0x00,0x4b,0x43,0x8c,0x01,0x00,0x04,0x3c,0x26,0x18,0x64,0x00, | ||
1522 | 0x00,0x4b,0x43,0xac,0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x02,0x00,0x03,0x3c, | ||
1523 | 0x24,0x10,0x52,0x00,0x24,0x10,0x43,0x00,0x5a,0x00,0x40,0x10,0x2a,0xb0,0x06,0x3c, | ||
1524 | 0x14,0x00,0xc3,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x07,0x24,0xff,0x00,0x04,0x31, | ||
1525 | 0xcc,0x02,0x87,0x10,0x25,0xb0,0x02,0x3c,0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14, | ||
1526 | 0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10, | ||
1527 | 0xff,0x00,0x02,0x24,0x42,0x00,0xc6,0x34,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00, | ||
1528 | 0xff,0x00,0x44,0x30,0x0e,0x00,0x87,0x10,0x68,0x15,0x62,0x26,0xf0,0x63,0xa4,0xa0, | ||
1529 | 0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10, | ||
1530 | 0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00, | ||
1531 | 0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0xf0,0x63,0xe3,0xa0,0x68,0x15,0x62,0x26, | ||
1532 | 0xf0,0x63,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1533 | 0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31, | ||
1534 | 0x00,0x00,0x48,0xac,0xd1,0x17,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac, | ||
1535 | 0xff,0x00,0x02,0x24,0x25,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31, | ||
1536 | 0x9c,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1537 | 0x21,0x30,0x60,0x00,0xf0,0x63,0x08,0xa2,0x30,0x64,0x03,0xae,0x04,0x00,0x04,0x24, | ||
1538 | 0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x02,0x80,0x0a,0x3c, | ||
1539 | 0x7c,0x7e,0x47,0x91,0x02,0x80,0x09,0x3c,0x6c,0x7e,0x25,0x8d,0xfc,0x4a,0x06,0x8e, | ||
1540 | 0x06,0x00,0x02,0x3c,0x20,0x00,0xe7,0x34,0x27,0x10,0x02,0x00,0x24,0x30,0xc2,0x00, | ||
1541 | 0x00,0x01,0xa5,0x34,0x25,0xb0,0x03,0x3c,0x04,0x00,0x02,0x3c,0x00,0x26,0x07,0x00, | ||
1542 | 0x26,0x88,0x22,0x02,0xb0,0x03,0x68,0x34,0x25,0x20,0x85,0x00,0x80,0x03,0x63,0x34, | ||
1543 | 0x41,0xb0,0x02,0x3c,0x00,0x00,0x64,0xac,0x00,0x00,0x46,0xac,0x6c,0x7e,0x25,0xad, | ||
1544 | 0x7c,0x7e,0x47,0xa1,0xfc,0x4a,0x06,0xae,0x00,0x00,0x11,0xad,0x68,0x15,0x62,0x26, | ||
1545 | 0x00,0x4b,0x43,0x8c,0x02,0x00,0x04,0x3c,0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac, | ||
1546 | 0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x04,0x00,0x03,0x3c,0x24,0x10,0x52,0x00, | ||
1547 | 0x24,0x10,0x51,0x00,0x24,0x10,0x43,0x00,0x58,0x00,0x40,0x10,0x25,0xb0,0x03,0x3c, | ||
1548 | 0xb0,0x03,0x62,0x34,0x2a,0xb0,0x09,0x3c,0x00,0x00,0x51,0xac,0x18,0x00,0x26,0x35, | ||
1549 | 0x00,0x00,0xc8,0x8c,0xff,0x00,0x07,0x24,0xff,0x00,0x04,0x31,0x3a,0x02,0x87,0x10, | ||
1550 | 0x04,0x00,0x02,0x24,0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14,0x00,0x80,0x02,0x3c, | ||
1551 | 0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10,0xff,0x00,0x02,0x24, | ||
1552 | 0x43,0x00,0x26,0x35,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00,0xff,0x00,0x44,0x30, | ||
1553 | 0x0e,0x00,0x87,0x10,0x68,0x15,0x62,0x26,0xf4,0x63,0xa4,0xa0,0x00,0x00,0xc2,0x90, | ||
1554 | 0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10,0x21,0x38,0xa0,0x00, | ||
1555 | 0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00,0xfd,0xff,0x62,0x14, | ||
1556 | 0xff,0x00,0x44,0x30,0xf4,0x63,0xe3,0xa0,0x68,0x15,0x62,0x26,0xf4,0x63,0x43,0x90, | ||
1557 | 0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,0x0c,0x00,0x68,0x8c, | ||
1558 | 0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31,0x00,0x00,0x48,0xac, | ||
1559 | 0x34,0x18,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0xc2,0xac,0xff,0x00,0x02,0x24, | ||
1560 | 0x21,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31,0x9c,0x64,0x05,0x8e, | ||
1561 | 0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00, | ||
1562 | 0xf4,0x63,0x08,0xa2,0x30,0x64,0x03,0xae,0x04,0x00,0x04,0x24,0x20,0x00,0x07,0x24, | ||
1563 | 0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x02,0x80,0x09,0x3c,0x7c,0x7e,0x27,0x91, | ||
1564 | 0x02,0x80,0x08,0x3c,0x6c,0x7e,0x05,0x8d,0xfc,0x4a,0x06,0x8e,0x06,0x00,0x02,0x3c, | ||
1565 | 0x10,0x00,0xe7,0x34,0x27,0x10,0x02,0x00,0x24,0x30,0xc2,0x00,0x00,0x01,0xa5,0x34, | ||
1566 | 0x00,0x26,0x07,0x00,0x25,0xb0,0x02,0x3c,0x25,0x20,0x85,0x00,0x80,0x03,0x42,0x34, | ||
1567 | 0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac,0x00,0x00,0x66,0xac,0x6c,0x7e,0x05,0xad, | ||
1568 | 0x7c,0x7e,0x27,0xa1,0xfc,0x4a,0x06,0xae,0x68,0x15,0x62,0x26,0x00,0x4b,0x43,0x8c, | ||
1569 | 0x04,0x00,0x04,0x3c,0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac,0x68,0x15,0x65,0x26, | ||
1570 | 0xfc,0x4a,0xa2,0x8c,0x08,0x00,0x03,0x3c,0x24,0x10,0x52,0x00,0x24,0x10,0x43,0x00, | ||
1571 | 0x5a,0x00,0x40,0x10,0x2a,0xb0,0x06,0x3c,0x1c,0x00,0xc3,0x34,0x00,0x00,0x68,0x8c, | ||
1572 | 0xff,0x00,0x07,0x24,0xff,0x00,0x04,0x31,0x13,0x02,0x87,0x10,0x25,0xb0,0x02,0x3c, | ||
1573 | 0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14,0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c, | ||
1574 | 0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10,0xff,0x00,0x02,0x24,0x44,0x00,0xc6,0x34, | ||
1575 | 0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00,0xff,0x00,0x44,0x30,0x0e,0x00,0x87,0x10, | ||
1576 | 0x68,0x15,0x62,0x26,0xf8,0x63,0xa4,0xa0,0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30, | ||
1577 | 0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10,0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00, | ||
1578 | 0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00,0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30, | ||
1579 | 0xf8,0x63,0xe3,0xa0,0x68,0x15,0x62,0x26,0xf8,0x63,0x43,0x90,0x20,0xb0,0x02,0x3c, | ||
1580 | 0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c, | ||
1581 | 0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31,0x00,0x00,0x48,0xac,0x8f,0x18,0x00,0x08, | ||
1582 | 0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac,0xff,0x00,0x02,0x24,0x25,0x00,0x82,0x10, | ||
1583 | 0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31,0xa8,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c, | ||
1584 | 0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00,0xf8,0x63,0x08,0xa2, | ||
1585 | 0x3c,0x64,0x03,0xae,0x05,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c, | ||
1586 | 0x10,0x00,0xa0,0xaf,0x02,0x80,0x0a,0x3c,0x7c,0x7e,0x47,0x91,0x02,0x80,0x09,0x3c, | ||
1587 | 0x6c,0x7e,0x25,0x8d,0xfc,0x4a,0x06,0x8e,0x18,0x00,0x02,0x3c,0x08,0x00,0xe7,0x34, | ||
1588 | 0x27,0x10,0x02,0x00,0x24,0x30,0xc2,0x00,0x00,0x02,0xa5,0x34,0x25,0xb0,0x03,0x3c, | ||
1589 | 0x10,0x00,0x02,0x3c,0x00,0x26,0x07,0x00,0x26,0x88,0x22,0x02,0xb0,0x03,0x68,0x34, | ||
1590 | 0x25,0x20,0x85,0x00,0x80,0x03,0x63,0x34,0x41,0xb0,0x02,0x3c,0x00,0x00,0x64,0xac, | ||
1591 | 0x00,0x00,0x46,0xac,0x6c,0x7e,0x25,0xad,0x7c,0x7e,0x47,0xa1,0xfc,0x4a,0x06,0xae, | ||
1592 | 0x00,0x00,0x11,0xad,0x68,0x15,0x62,0x26,0x00,0x4b,0x43,0x8c,0x08,0x00,0x04,0x3c, | ||
1593 | 0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac,0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c, | ||
1594 | 0x10,0x00,0x03,0x3c,0x24,0x10,0x52,0x00,0x24,0x10,0x51,0x00,0x24,0x10,0x43,0x00, | ||
1595 | 0x58,0x00,0x40,0x10,0x25,0xb0,0x06,0x3c,0xb0,0x03,0xc2,0x34,0x2a,0xb0,0x09,0x3c, | ||
1596 | 0x00,0x00,0x51,0xac,0x20,0x00,0x23,0x35,0x00,0x00,0x68,0x8c,0xff,0x00,0x07,0x24, | ||
1597 | 0xff,0x00,0x04,0x31,0x80,0x01,0x87,0x10,0x90,0x03,0xc2,0x34,0x00,0x80,0x02,0x31, | ||
1598 | 0x23,0x00,0x40,0x14,0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01, | ||
1599 | 0x21,0x00,0x40,0x10,0xff,0x00,0x02,0x24,0x45,0x00,0x26,0x35,0x00,0x00,0xc2,0x90, | ||
1600 | 0x00,0x00,0x00,0x00,0xff,0x00,0x44,0x30,0x0e,0x00,0x87,0x10,0x68,0x15,0x62,0x26, | ||
1601 | 0x04,0x64,0xa4,0xa0,0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30, | ||
1602 | 0x07,0x00,0x83,0x10,0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90, | ||
1603 | 0x21,0x18,0x80,0x00,0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0x04,0x64,0xe3,0xa0, | ||
1604 | 0x68,0x15,0x62,0x26,0x04,0x64,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00, | ||
1605 | 0x21,0x18,0x62,0x00,0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34, | ||
1606 | 0xff,0x00,0x04,0x31,0x00,0x00,0x48,0xac,0xf2,0x18,0x00,0x08,0xff,0x00,0x02,0x24, | ||
1607 | 0x00,0x00,0x62,0xac,0xff,0x00,0x02,0x24,0x21,0x00,0x82,0x10,0x68,0x15,0x70,0x26, | ||
1608 | 0xff,0x00,0x03,0x31,0xa8,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00, | ||
1609 | 0x21,0x18,0x62,0x00,0x21,0x30,0x60,0x00,0x04,0x64,0x08,0xa2,0x3c,0x64,0x03,0xae, | ||
1610 | 0x05,0x00,0x04,0x24,0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf, | ||
1611 | 0x02,0x80,0x09,0x3c,0x7c,0x7e,0x27,0x91,0x02,0x80,0x08,0x3c,0x6c,0x7e,0x05,0x8d, | ||
1612 | 0xfc,0x4a,0x06,0x8e,0x18,0x00,0x02,0x3c,0x01,0x00,0xe7,0x34,0x27,0x10,0x02,0x00, | ||
1613 | 0x24,0x30,0xc2,0x00,0x00,0x02,0xa5,0x34,0x00,0x26,0x07,0x00,0x25,0xb0,0x02,0x3c, | ||
1614 | 0x25,0x20,0x85,0x00,0x80,0x03,0x42,0x34,0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac, | ||
1615 | 0x00,0x00,0x66,0xac,0x6c,0x7e,0x05,0xad,0x7c,0x7e,0x27,0xa1,0xfc,0x4a,0x06,0xae, | ||
1616 | 0x68,0x15,0x62,0x26,0x00,0x4b,0x43,0x8c,0x10,0x00,0x04,0x3c,0x26,0x18,0x64,0x00, | ||
1617 | 0x00,0x4b,0x43,0xac,0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x20,0x00,0x03,0x3c, | ||
1618 | 0x24,0x10,0x52,0x00,0x24,0x10,0x43,0x00,0x5a,0x00,0x40,0x10,0x2a,0xb0,0x06,0x3c, | ||
1619 | 0x24,0x00,0xc3,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x07,0x24,0xff,0x00,0x04,0x31, | ||
1620 | 0x28,0x01,0x87,0x10,0x25,0xb0,0x02,0x3c,0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14, | ||
1621 | 0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10, | ||
1622 | 0xff,0x00,0x02,0x24,0x46,0x00,0xc6,0x34,0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00, | ||
1623 | 0xff,0x00,0x44,0x30,0x0e,0x00,0x87,0x10,0x68,0x15,0x62,0x26,0xfc,0x63,0xa4,0xa0, | ||
1624 | 0x00,0x00,0xc2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10, | ||
1625 | 0x21,0x38,0xa0,0x00,0x21,0x28,0xc0,0x00,0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00, | ||
1626 | 0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0xfc,0x63,0xe3,0xa0,0x68,0x15,0x62,0x26, | ||
1627 | 0xfc,0x63,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1628 | 0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31, | ||
1629 | 0x00,0x00,0x48,0xac,0x4d,0x19,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac, | ||
1630 | 0xff,0x00,0x02,0x24,0x25,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31, | ||
1631 | 0xb4,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1632 | 0x21,0x30,0x60,0x00,0xfc,0x63,0x08,0xa2,0x48,0x64,0x03,0xae,0x06,0x00,0x04,0x24, | ||
1633 | 0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x02,0x80,0x0a,0x3c, | ||
1634 | 0x7c,0x7e,0x47,0x91,0x02,0x80,0x09,0x3c,0x6c,0x7e,0x25,0x8d,0xfc,0x4a,0x06,0x8e, | ||
1635 | 0x60,0x00,0x02,0x3c,0x04,0x00,0xe7,0x34,0x27,0x10,0x02,0x00,0x24,0x30,0xc2,0x00, | ||
1636 | 0x00,0x04,0xa5,0x34,0x25,0xb0,0x03,0x3c,0x40,0x00,0x02,0x3c,0x00,0x26,0x07,0x00, | ||
1637 | 0x26,0x88,0x22,0x02,0xb0,0x03,0x68,0x34,0x25,0x20,0x85,0x00,0x80,0x03,0x63,0x34, | ||
1638 | 0x41,0xb0,0x02,0x3c,0x00,0x00,0x64,0xac,0x00,0x00,0x46,0xac,0x6c,0x7e,0x25,0xad, | ||
1639 | 0x7c,0x7e,0x47,0xa1,0xfc,0x4a,0x06,0xae,0x00,0x00,0x11,0xad,0x68,0x15,0x62,0x26, | ||
1640 | 0x00,0x4b,0x43,0x8c,0x20,0x00,0x04,0x3c,0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac, | ||
1641 | 0x68,0x15,0x65,0x26,0xfc,0x4a,0xa2,0x8c,0x40,0x00,0x03,0x3c,0x24,0x10,0x52,0x00, | ||
1642 | 0x24,0x10,0x51,0x00,0x24,0x10,0x43,0x00,0x5a,0x00,0x40,0x10,0x68,0x15,0x70,0x26, | ||
1643 | 0x25,0xb0,0x02,0x3c,0x2a,0xb0,0x07,0x3c,0xb0,0x03,0x42,0x34,0x00,0x00,0x51,0xac, | ||
1644 | 0x28,0x00,0xe3,0x34,0x00,0x00,0x68,0x8c,0xff,0x00,0x06,0x24,0xff,0x00,0x04,0x31, | ||
1645 | 0xc9,0x00,0x86,0x10,0x25,0xbd,0x02,0x3c,0x00,0x80,0x02,0x31,0x23,0x00,0x40,0x14, | ||
1646 | 0x00,0x80,0x02,0x3c,0x00,0xff,0x02,0x3c,0x24,0x10,0x02,0x01,0x21,0x00,0x40,0x10, | ||
1647 | 0xff,0x00,0x02,0x24,0x47,0x00,0xe7,0x34,0x00,0x00,0xe2,0x90,0x00,0x00,0x00,0x00, | ||
1648 | 0xff,0x00,0x44,0x30,0x0e,0x00,0x86,0x10,0x68,0x15,0x62,0x26,0x00,0x64,0xa4,0xa0, | ||
1649 | 0x00,0x00,0xe2,0x90,0xff,0x00,0x83,0x30,0xff,0x00,0x44,0x30,0x07,0x00,0x83,0x10, | ||
1650 | 0x21,0x30,0xa0,0x00,0x21,0x28,0xe0,0x00,0x00,0x00,0xa2,0x90,0x21,0x18,0x80,0x00, | ||
1651 | 0xfd,0xff,0x62,0x14,0xff,0x00,0x44,0x30,0x00,0x64,0xc3,0xa0,0x68,0x15,0x62,0x26, | ||
1652 | 0x00,0x64,0x43,0x90,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1653 | 0x0c,0x00,0x68,0x8c,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0xff,0x00,0x04,0x31, | ||
1654 | 0x00,0x00,0x48,0xac,0xb1,0x19,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac, | ||
1655 | 0xff,0x00,0x02,0x24,0x21,0x00,0x82,0x10,0x68,0x15,0x70,0x26,0xff,0x00,0x03,0x31, | ||
1656 | 0xb4,0x64,0x05,0x8e,0x20,0x10,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00, | ||
1657 | 0x21,0x30,0x60,0x00,0x00,0x64,0x08,0xa2,0x48,0x64,0x03,0xae,0x06,0x00,0x04,0x24, | ||
1658 | 0x20,0x00,0x07,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xa0,0xaf,0x02,0x80,0x09,0x3c, | ||
1659 | 0x7c,0x7e,0x27,0x91,0x02,0x80,0x08,0x3c,0x6c,0x7e,0x05,0x8d,0xfc,0x4a,0x06,0x8e, | ||
1660 | 0x60,0x00,0x02,0x3c,0x02,0x00,0xe7,0x34,0x27,0x10,0x02,0x00,0x24,0x30,0xc2,0x00, | ||
1661 | 0x00,0x04,0xa5,0x34,0x00,0x26,0x07,0x00,0x25,0xb0,0x02,0x3c,0x25,0x20,0x85,0x00, | ||
1662 | 0x80,0x03,0x42,0x34,0x41,0xb0,0x03,0x3c,0x00,0x00,0x44,0xac,0x00,0x00,0x66,0xac, | ||
1663 | 0x6c,0x7e,0x05,0xad,0x7c,0x7e,0x27,0xa1,0xfc,0x4a,0x06,0xae,0x68,0x15,0x62,0x26, | ||
1664 | 0x00,0x4b,0x43,0x8c,0x40,0x00,0x04,0x3c,0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac, | ||
1665 | 0x68,0x15,0x70,0x26,0xfc,0x4a,0x06,0x8e,0x00,0x04,0x11,0x3c,0x24,0x10,0xd2,0x00, | ||
1666 | 0x24,0x10,0x51,0x00,0x4c,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x24,0x28,0xd2,0x00, | ||
1667 | 0x00,0x08,0x04,0x3c,0x24,0x10,0xa4,0x00,0x08,0x00,0x40,0x10,0x80,0x00,0x07,0x3c, | ||
1668 | 0x00,0x4b,0x03,0x8e,0x25,0xb0,0x02,0x3c,0xb0,0x03,0x42,0x34,0x26,0x18,0x64,0x00, | ||
1669 | 0x00,0x00,0x44,0xac,0x00,0x4b,0x03,0xae,0x80,0x00,0x07,0x3c,0x24,0x10,0xa7,0x00, | ||
1670 | 0x21,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x00,0x4b,0x03,0x8e,0x25,0xb0,0x08,0x3c, | ||
1671 | 0xb0,0x03,0x09,0x35,0x2a,0xb0,0x02,0x3c,0x00,0x00,0x23,0xad,0x36,0x00,0x42,0x34, | ||
1672 | 0x00,0x00,0x43,0x90,0x23,0xb0,0x04,0x3c,0xff,0x1f,0x02,0x3c,0xc0,0x18,0x03,0x00, | ||
1673 | 0xf0,0x07,0x63,0x30,0x5c,0x65,0x05,0x8e,0x21,0x18,0x64,0x00,0xff,0xff,0x42,0x34, | ||
1674 | 0x24,0x18,0x62,0x00,0x59,0x00,0x65,0x10,0x60,0x65,0x03,0xae,0x02,0x80,0x05,0x3c, | ||
1675 | 0x6c,0x7e,0xa3,0x8c,0x27,0x20,0x07,0x00,0x24,0x20,0xc4,0x00,0x00,0x08,0x63,0x34, | ||
1676 | 0x41,0xb0,0x02,0x3c,0x00,0x00,0x23,0xad,0x00,0x00,0x44,0xac,0x6c,0x7e,0xa3,0xac, | ||
1677 | 0xfc,0x4a,0x04,0xae,0x68,0x15,0x62,0x26,0x00,0x4b,0x43,0x8c,0x80,0x00,0x04,0x3c, | ||
1678 | 0x26,0x18,0x64,0x00,0x00,0x4b,0x43,0xac,0x68,0x15,0x66,0x26,0xfc,0x4a,0xc3,0x8c, | ||
1679 | 0x00,0x01,0x04,0x3c,0x24,0x28,0x72,0x00,0x24,0x10,0xa4,0x00,0x06,0x00,0x40,0x10, | ||
1680 | 0x25,0xb0,0x02,0x3c,0x00,0x4b,0xc3,0x8c,0xb0,0x03,0x42,0x34,0x26,0x18,0x64,0x00, | ||
1681 | 0x00,0x00,0x44,0xac,0x00,0x4b,0xc3,0xac,0x00,0x02,0x04,0x3c,0x24,0x10,0xa4,0x00, | ||
1682 | 0x06,0x00,0x40,0x10,0x25,0xb0,0x03,0x3c,0x00,0x4b,0xc2,0x8c,0xb0,0x03,0x63,0x34, | ||
1683 | 0x26,0x10,0x44,0x00,0x00,0x4b,0xc2,0xac,0x00,0x00,0x64,0xac,0x28,0x00,0xbf,0x8f, | ||
1684 | 0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f,0x18,0x00,0xb0,0x8f, | ||
1685 | 0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27,0x5b,0x4e,0x00,0x0c,0x07,0x00,0x04,0x24, | ||
1686 | 0x00,0x4b,0x03,0x8e,0xfc,0x4a,0x06,0x8e,0x25,0xb0,0x02,0x3c,0x26,0x18,0x71,0x00, | ||
1687 | 0xb0,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0xdf,0x19,0x00,0x08,0x00,0x4b,0x03,0xae, | ||
1688 | 0x56,0x01,0x42,0x35,0x00,0x00,0x43,0x94,0x00,0x00,0x00,0x00,0x44,0xfb,0x60,0x10, | ||
1689 | 0x00,0x00,0x00,0x00,0x5b,0x4e,0x00,0x0c,0x07,0x00,0x04,0x24,0x7d,0x15,0x00,0x08, | ||
1690 | 0x68,0x15,0x66,0x26,0x00,0x00,0xa2,0xac,0x48,0x16,0x00,0x08,0xff,0x00,0x02,0x24, | ||
1691 | 0x00,0x00,0x62,0xac,0x85,0x16,0x00,0x08,0xff,0x00,0x02,0x24,0x00,0x00,0x62,0xac, | ||
1692 | 0xc2,0x16,0x00,0x08,0xff,0x00,0x02,0x24,0x90,0x03,0x63,0x34,0x00,0x00,0x62,0xac, | ||
1693 | 0x57,0x18,0x00,0x08,0x68,0x15,0x62,0x26,0x00,0x00,0x40,0xac,0x15,0x19,0x00,0x08, | ||
1694 | 0x68,0x15,0x62,0x26,0x02,0x00,0x03,0x24,0x90,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
1695 | 0x74,0x19,0x00,0x08,0x68,0x15,0x62,0x26,0x01,0x00,0x03,0x24,0x90,0x03,0x42,0x34, | ||
1696 | 0x00,0x00,0x43,0xac,0xd4,0x19,0x00,0x08,0x68,0x15,0x62,0x26,0xd0,0x03,0x03,0x35, | ||
1697 | 0x80,0x00,0x02,0x24,0x00,0x00,0x62,0xac,0x0a,0x1a,0x00,0x08,0x68,0x15,0x62,0x26, | ||
1698 | 0x25,0xb0,0x02,0x3c,0x07,0x00,0x03,0x24,0x90,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
1699 | 0x68,0x15,0x63,0x26,0x00,0x4b,0x62,0x8c,0x00,0x00,0x00,0x00,0x00,0x20,0x42,0x38, | ||
1700 | 0xe2,0x16,0x00,0x08,0x00,0x4b,0x62,0xac,0x25,0xb0,0x02,0x3c,0x07,0x00,0x03,0x24, | ||
1701 | 0x90,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x68,0x15,0x63,0x26,0x00,0x4b,0x62,0x8c, | ||
1702 | 0x00,0x00,0x00,0x00,0x00,0x80,0x42,0x38,0x40,0x17,0x00,0x08,0x00,0x4b,0x62,0xac, | ||
1703 | 0x06,0x00,0x03,0x24,0x90,0x03,0x42,0x34,0x00,0x00,0x43,0xac,0x99,0x17,0x00,0x08, | ||
1704 | 0x68,0x15,0x62,0x26,0x05,0x00,0x03,0x24,0x90,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
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1757 | 0x00,0x00,0x5b,0xaf,0x21,0xd8,0xa0,0x03,0x82,0xda,0x1b,0x00,0x80,0xda,0x1b,0x00, | ||
1758 | 0x08,0x00,0x7b,0x27,0x04,0x00,0x61,0xaf,0x08,0x00,0x62,0xaf,0x0c,0x00,0x63,0xaf, | ||
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1769 | 0x25,0xb0,0x1b,0x3c,0x30,0x03,0x7b,0x37,0x00,0x00,0x00,0x00,0x00,0x00,0x7a,0xaf, | ||
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1774 | 0x30,0x00,0x6c,0xaf,0x34,0x00,0x6d,0xaf,0x38,0x00,0x6e,0xaf,0x3c,0x00,0x6f,0xaf, | ||
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1777 | 0x54,0x00,0x75,0xaf,0x58,0x00,0x76,0xaf,0x5c,0x00,0x77,0xaf,0x60,0x00,0x78,0xaf, | ||
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1779 | 0x74,0x00,0x7f,0xaf,0x78,0x00,0x68,0xaf,0x7c,0x00,0x69,0xaf,0x80,0x00,0x6a,0xaf, | ||
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1782 | 0x0a,0x00,0x60,0x13,0x00,0x00,0x00,0x00,0x00,0x80,0x08,0x3c,0x74,0x55,0x08,0x25, | ||
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1788 | 0x6c,0x7e,0x5a,0x27,0x04,0x00,0x5b,0x97,0x25,0xb0,0x08,0x3c,0x30,0x03,0x08,0x35, | ||
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1790 | 0x08,0xec,0x9b,0x27,0x00,0x00,0x00,0x00,0x04,0x00,0x61,0x8f,0xfc,0x03,0x70,0x7b, | ||
1791 | 0x7c,0x00,0x62,0x7b,0xbc,0x00,0x64,0x7b,0xfc,0x00,0x66,0x7b,0x3c,0x01,0x68,0x7b, | ||
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1793 | 0xfc,0x01,0x6e,0x7b,0x3c,0x02,0x70,0x7b,0x7c,0x02,0x72,0x7b,0xbc,0x02,0x74,0x7b, | ||
1794 | 0xfc,0x02,0x76,0x7b,0x3c,0x03,0x78,0x7b,0x7c,0x03,0x7c,0x7b,0xbc,0x03,0x7e,0x7b, | ||
1795 | 0x80,0x00,0x7b,0x8f,0x2f,0x1c,0x00,0x08,0x00,0x00,0x00,0x00,0x21,0xd8,0xa0,0x03, | ||
1796 | 0x82,0xda,0x1b,0x00,0x80,0xda,0x1b,0x00,0x08,0x00,0x7b,0x27,0x08,0x00,0x5b,0xaf, | ||
1797 | 0xfc,0xef,0x9d,0x27,0x00,0x00,0x4a,0x8f,0x00,0x00,0x00,0x00,0x21,0x00,0x40,0x11, | ||
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1799 | 0x21,0x58,0x00,0x00,0x01,0x00,0x6b,0x25,0x1a,0x00,0x40,0x11,0x24,0x70,0x4b,0x01, | ||
1800 | 0x14,0x00,0xc0,0x11,0x01,0x00,0x04,0x24,0x00,0x00,0x00,0x00,0x04,0x00,0x44,0xa3, | ||
1801 | 0x26,0x50,0x4b,0x01,0x00,0x00,0x4a,0xaf,0x80,0x80,0x09,0x00,0x21,0x80,0x08,0x02, | ||
1802 | 0x00,0x00,0x10,0x8e,0x00,0x00,0x00,0x00,0x09,0xf8,0x00,0x02,0x00,0x00,0x00,0x00, | ||
1803 | 0x00,0x80,0x1b,0x3c,0xe8,0x6f,0x7b,0x27,0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x27, | ||
1804 | 0x00,0x00,0x5b,0xaf,0x02,0x80,0x1a,0x3c,0x6c,0x7e,0x5a,0x27,0xe1,0xff,0x00,0x10, | ||
1805 | 0x00,0x00,0x00,0x00,0x01,0x00,0x29,0x25,0x40,0x58,0x0b,0x00,0xf2,0x1b,0x00,0x08, | ||
1806 | 0x00,0x00,0x00,0x00,0x02,0x80,0x1b,0x3c,0x6c,0x7e,0x7b,0x27,0x21,0x60,0x00,0x00, | ||
1807 | 0x04,0x00,0x6c,0xa7,0x08,0x00,0x7a,0x8f,0x00,0x00,0x00,0x00,0xf8,0xff,0x5a,0x27, | ||
1808 | 0x00,0x00,0x5a,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0x5a,0x27,0x84,0x00,0x44,0x8f, | ||
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1810 | 0xfc,0x03,0x50,0x7b,0x7c,0x00,0x42,0x7b,0xbc,0x00,0x44,0x7b,0xfc,0x00,0x46,0x7b, | ||
1811 | 0x3c,0x01,0x48,0x7b,0x13,0x00,0x00,0x02,0x11,0x00,0x20,0x02,0x7c,0x01,0x4a,0x7b, | ||
1812 | 0xbc,0x01,0x4c,0x7b,0xfc,0x01,0x4e,0x7b,0x3c,0x02,0x50,0x7b,0x7c,0x02,0x52,0x7b, | ||
1813 | 0xbc,0x02,0x54,0x7b,0xfc,0x02,0x56,0x7b,0x3c,0x03,0x58,0x7b,0x7c,0x03,0x5c,0x7b, | ||
1814 | 0xbc,0x03,0x5e,0x7b,0x80,0x00,0x5b,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0x60,0x03, | ||
1815 | 0x10,0x00,0x00,0x42,0x00,0x60,0x05,0x40,0x42,0x28,0x05,0x00,0x40,0x28,0x05,0x00, | ||
1816 | 0x00,0x60,0x85,0x40,0x04,0x00,0x81,0xac,0x08,0x00,0x82,0xac,0x0c,0x00,0x83,0xac, | ||
1817 | 0x20,0x00,0x88,0xac,0x24,0x00,0x89,0xac,0x28,0x00,0x8a,0xac,0x2c,0x00,0x8b,0xac, | ||
1818 | 0x30,0x00,0x8c,0xac,0x34,0x00,0x8d,0xac,0x38,0x00,0x8e,0xac,0x3c,0x00,0x8f,0xac, | ||
1819 | 0x12,0x40,0x00,0x00,0x10,0x48,0x00,0x00,0x40,0x00,0x90,0xac,0x44,0x00,0x91,0xac, | ||
1820 | 0x48,0x00,0x92,0xac,0x4c,0x00,0x93,0xac,0x50,0x00,0x94,0xac,0x54,0x00,0x95,0xac, | ||
1821 | 0x58,0x00,0x96,0xac,0x5c,0x00,0x97,0xac,0x60,0x00,0x98,0xac,0x64,0x00,0x99,0xac, | ||
1822 | 0x68,0x00,0x9c,0xac,0x6c,0x00,0x9d,0xac,0x70,0x00,0x9e,0xac,0x74,0x00,0x9f,0xac, | ||
1823 | 0x78,0x00,0x88,0xac,0x7c,0x00,0x89,0xac,0x80,0x00,0x9f,0xac,0xf8,0xff,0x84,0x24, | ||
1824 | 0x00,0x00,0x84,0x8c,0x00,0x00,0x00,0x00,0x08,0x00,0x84,0x24,0x84,0x00,0x86,0x8c, | ||
1825 | 0x00,0x00,0x00,0x00,0xf9,0xff,0xc0,0x10,0x00,0x00,0x00,0x00,0x21,0xd8,0x80,0x00, | ||
1826 | 0x01,0x00,0xba,0x24,0x04,0x00,0x61,0x8f,0xfc,0x03,0x70,0x7b,0x7c,0x00,0x62,0x7b, | ||
1827 | 0xbc,0x00,0x64,0x7b,0xfc,0x00,0x66,0x7b,0x3c,0x01,0x68,0x7b,0x13,0x00,0x00,0x02, | ||
1828 | 0x11,0x00,0x20,0x02,0x7c,0x01,0x6a,0x7b,0xbc,0x01,0x6c,0x7b,0xfc,0x01,0x6e,0x7b, | ||
1829 | 0x3c,0x02,0x70,0x7b,0x7c,0x02,0x72,0x7b,0xbc,0x02,0x74,0x7b,0xfc,0x02,0x76,0x7b, | ||
1830 | 0x3c,0x03,0x78,0x7b,0x7c,0x03,0x7c,0x7b,0xbc,0x03,0x7e,0x7b,0x80,0x00,0x7b,0x8f, | ||
1831 | 0x00,0x00,0x00,0x00,0x08,0x00,0x60,0x03,0x00,0x60,0x9a,0x40,0x00,0x60,0x05,0x40, | ||
1832 | 0x42,0x28,0x05,0x00,0x40,0x28,0x05,0x00,0x00,0x60,0x85,0x40,0x04,0x00,0x81,0xac, | ||
1833 | 0x08,0x00,0x82,0xac,0x0c,0x00,0x83,0xac,0x20,0x00,0x88,0xac,0x24,0x00,0x89,0xac, | ||
1834 | 0x28,0x00,0x8a,0xac,0x2c,0x00,0x8b,0xac,0x30,0x00,0x8c,0xac,0x34,0x00,0x8d,0xac, | ||
1835 | 0x38,0x00,0x8e,0xac,0x3c,0x00,0x8f,0xac,0x12,0x40,0x00,0x00,0x10,0x48,0x00,0x00, | ||
1836 | 0x40,0x00,0x90,0xac,0x44,0x00,0x91,0xac,0x48,0x00,0x92,0xac,0x4c,0x00,0x93,0xac, | ||
1837 | 0x50,0x00,0x94,0xac,0x54,0x00,0x94,0xac,0x58,0x00,0x96,0xac,0x5c,0x00,0x96,0xac, | ||
1838 | 0x60,0x00,0x98,0xac,0x64,0x00,0x99,0xac,0x68,0x00,0x9c,0xac,0x6c,0x00,0x9d,0xac, | ||
1839 | 0x70,0x00,0x9e,0xac,0x78,0x00,0x88,0xac,0x7c,0x00,0x89,0xac,0x80,0x00,0x9f,0xac, | ||
1840 | 0x84,0x00,0x80,0xac,0xf8,0xff,0x84,0x24,0x00,0x00,0x84,0x8c,0x00,0x00,0x00,0x00, | ||
1841 | 0x08,0x00,0x84,0x24,0x84,0x00,0x86,0x8c,0xfa,0xff,0xc0,0x10,0x00,0x00,0x00,0x00, | ||
1842 | 0x21,0xd8,0x80,0x00,0x01,0x00,0xba,0x24,0x04,0x00,0x61,0x8f,0xfc,0x03,0x70,0x7b, | ||
1843 | 0x7c,0x00,0x62,0x7b,0xbc,0x00,0x64,0x7b,0xfc,0x00,0x66,0x7b,0x3c,0x01,0x68,0x7b, | ||
1844 | 0x13,0x00,0x00,0x02,0x11,0x00,0x20,0x02,0x7c,0x01,0x6a,0x7b,0xbc,0x01,0x6c,0x7b, | ||
1845 | 0xfc,0x01,0x6e,0x7b,0x3c,0x02,0x70,0x7b,0x7c,0x02,0x72,0x7b,0xbc,0x02,0x74,0x7b, | ||
1846 | 0xfc,0x02,0x76,0x7b,0x3c,0x03,0x78,0x7b,0x7c,0x03,0x7c,0x7b,0xbc,0x03,0x7e,0x7b, | ||
1847 | 0x80,0x00,0x7b,0x8f,0x08,0x00,0x60,0x03,0x00,0x60,0x9a,0x40,0x00,0x00,0x00,0x00, | ||
1848 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1849 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1850 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1851 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1852 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1853 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1854 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1855 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1856 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1857 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1858 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1859 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1860 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1861 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1862 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1863 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1864 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1865 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1866 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1867 | 0xc6,0x7f,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x1b,0x3c,0x00,0x00,0x7b,0x27, | ||
1868 | 0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x27,0x00,0x00,0x5b,0xaf,0x00,0x00,0x05,0x24, | ||
1869 | 0x03,0x00,0xa4,0x24,0x00,0xa0,0x80,0x40,0x00,0xa0,0x84,0x40,0x01,0x80,0x04,0x3c, | ||
1870 | 0x98,0x03,0x84,0x24,0x08,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1871 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1872 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1873 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1874 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1875 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1876 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1877 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1878 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1879 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1880 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1881 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1882 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1883 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1884 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1885 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1886 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1887 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1888 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1889 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1890 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1891 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1892 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1893 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1894 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1895 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1896 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1897 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1898 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1899 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1900 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1901 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1902 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1903 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1904 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1905 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1906 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1907 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1908 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1909 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1910 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1911 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1912 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1913 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1914 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1915 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1916 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1917 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1918 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1919 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1920 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1921 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1922 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1923 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1924 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
1925 | 0x01,0x80,0x1b,0x3c,0x98,0x03,0x7b,0x27,0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x27, | ||
1926 | 0x00,0x00,0x5b,0xaf,0x02,0x80,0x1a,0x3c,0x00,0x00,0x5a,0x27,0xfc,0x03,0x5d,0x27, | ||
1927 | 0x02,0x80,0x1c,0x3c,0x00,0x14,0x9c,0x27,0x00,0xf0,0x08,0x3c,0x00,0x0c,0x08,0x35, | ||
1928 | 0x00,0x60,0x88,0x40,0x02,0x80,0x04,0x3c,0x00,0x00,0x84,0x24,0xff,0x7f,0x05,0x3c, | ||
1929 | 0xff,0xff,0xa5,0x34,0x24,0x20,0x85,0x00,0x00,0x20,0x84,0x4c,0xff,0xff,0x05,0x34, | ||
1930 | 0x21,0x28,0xa4,0x00,0x00,0x28,0x85,0x4c,0x00,0x80,0x04,0x3c,0x00,0x00,0x84,0x24, | ||
1931 | 0xff,0x7f,0x05,0x3c,0xff,0xff,0xa5,0x34,0x24,0x20,0x85,0x00,0x00,0x00,0x84,0x4c, | ||
1932 | 0xff,0x7f,0x06,0x24,0x21,0x30,0xc4,0x00,0x24,0x30,0xc5,0x00,0x00,0x08,0x86,0x4c, | ||
1933 | 0x00,0xa0,0x04,0x40,0x10,0x00,0x84,0x34,0x00,0xa0,0x84,0x40,0x01,0x80,0x1b,0x3c, | ||
1934 | 0x24,0x04,0x7b,0x27,0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x27,0x00,0x00,0x5b,0xaf, | ||
1935 | 0x00,0x00,0x00,0x00,0x25,0xb0,0x04,0x3c,0x44,0x00,0x84,0x34,0x00,0x00,0x85,0x84, | ||
1936 | 0x20,0x00,0x06,0x24,0x25,0x28,0xa6,0x00,0x00,0x00,0x85,0xa4,0x01,0x80,0x1b,0x3c, | ||
1937 | 0x54,0x04,0x7b,0x27,0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x27,0x00,0x00,0x5b,0xaf, | ||
1938 | 0x25,0xb0,0x04,0x3c,0x44,0x00,0x84,0x34,0x00,0x00,0x85,0x8c,0x00,0x00,0x00,0x00, | ||
1939 | 0x10,0x00,0xa5,0x30,0xfc,0xff,0xa0,0x10,0x00,0x00,0x00,0x00,0xff,0x1f,0x07,0x3c, | ||
1940 | 0xff,0xff,0xe7,0x34,0x02,0x80,0x05,0x3c,0x88,0x7d,0xa5,0x24,0xff,0xff,0xa5,0x30, | ||
1941 | 0x40,0xb0,0x04,0x3c,0x25,0x28,0xa4,0x00,0x24,0x28,0xa7,0x00,0x21,0x30,0x00,0x00, | ||
1942 | 0x43,0xb0,0x02,0x3c,0x00,0x80,0x04,0x3c,0x40,0x00,0x84,0x34,0x00,0x00,0x45,0xac, | ||
1943 | 0x04,0x00,0x46,0xac,0x08,0x00,0x44,0xac,0x4e,0x58,0x00,0x08,0x00,0x00,0x00,0x00, | ||
1944 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x24,0xff,0xff,0x42,0x24, | ||
1945 | 0xff,0xff,0x41,0x04,0xff,0xff,0x42,0x24,0x08,0x00,0xe0,0x03,0x01,0x00,0x42,0x24, | ||
1946 | 0x00,0x60,0x02,0x40,0x01,0x00,0x41,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
1947 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x82,0xac,0x00,0x00,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1948 | 0x21,0x18,0x40,0x00,0x00,0x60,0x83,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x82,0xac, | ||
1949 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x08,0x00,0xe0,0x03, | ||
1950 | 0x00,0x00,0x00,0x00,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
1951 | 0x00,0x60,0x81,0x40,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x01,0x80,0x03,0x3c, | ||
1952 | 0x25,0xb0,0x02,0x3c,0x44,0x05,0x63,0x24,0x18,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
1953 | 0x04,0x00,0x85,0x8c,0x00,0x80,0x03,0x3c,0x01,0x00,0x02,0x24,0x25,0x28,0xa3,0x00, | ||
1954 | 0x00,0x00,0xa4,0x8c,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x01,0x80,0x03,0x3c, | ||
1955 | 0x25,0xb0,0x02,0x3c,0x74,0x05,0x63,0x24,0x18,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
1956 | 0x04,0x00,0x82,0x8c,0x02,0x00,0x83,0x94,0x00,0x80,0x07,0x3c,0x25,0x28,0x47,0x00, | ||
1957 | 0x00,0x00,0xa2,0x8c,0x10,0x00,0x02,0x24,0x13,0x00,0x62,0x10,0x11,0x00,0x66,0x28, | ||
1958 | 0x06,0x00,0xc0,0x10,0x20,0x00,0x02,0x24,0x08,0x00,0x02,0x24,0x17,0x00,0x62,0x10, | ||
1959 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0xfd,0xff,0x62,0x14, | ||
1960 | 0x00,0x00,0x00,0x00,0x08,0x00,0x83,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0xa3,0xac, | ||
1961 | 0x04,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x25,0x10,0x47,0x00,0x00,0x00,0x42,0x8c, | ||
1962 | 0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0x08,0x00,0x82,0x8c,0x00,0x00,0x00,0x00, | ||
1963 | 0x00,0x00,0xa2,0xa4,0x04,0x00,0x83,0x8c,0x00,0x00,0x00,0x00,0x25,0x18,0x67,0x00, | ||
1964 | 0x00,0x00,0x62,0x94,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0x08,0x00,0x82,0x8c, | ||
1965 | 0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0xa0,0x04,0x00,0x83,0x8c,0x00,0x00,0x00,0x00, | ||
1966 | 0x25,0x18,0x67,0x00,0x00,0x00,0x62,0x90,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
1967 | 0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0x02,0x80,0x11,0x3c,0x1c,0x00,0xbf,0xaf, | ||
1968 | 0x18,0x00,0xb2,0xaf,0x10,0x00,0xb0,0xaf,0x68,0x15,0x31,0x26,0xe4,0x64,0x30,0x96, | ||
1969 | 0x02,0x80,0x02,0x3c,0x01,0x80,0x03,0x3c,0x25,0x80,0x02,0x02,0x25,0xb0,0x02,0x3c, | ||
1970 | 0x38,0x06,0x63,0x24,0x18,0x03,0x42,0x34,0x60,0x00,0x04,0x26,0x80,0x00,0x05,0x26, | ||
1971 | 0x00,0x00,0x43,0xac,0xab,0x45,0x00,0x0c,0x03,0x00,0x06,0x24,0x21,0x20,0x00,0x02, | ||
1972 | 0x21,0x28,0x00,0x00,0x97,0x45,0x00,0x0c,0x08,0x00,0x06,0x24,0xe4,0x64,0x22,0x8e, | ||
1973 | 0x0c,0x00,0x03,0x24,0x0c,0x00,0x43,0xae,0x08,0x00,0x42,0xae,0x12,0x00,0x02,0x24, | ||
1974 | 0x14,0x00,0x42,0xae,0x21,0x20,0x40,0x02,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f, | ||
1975 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x8b,0x07,0x00,0x08,0x20,0x00,0xbd,0x27, | ||
1976 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1977 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1978 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1979 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1980 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1981 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
1982 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1983 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1984 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1985 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
1986 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
1987 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1988 | 0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1989 | 0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
1990 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
1991 | 0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24,0x02,0x80,0x02,0x3c,0x21,0x48,0x80,0x00, | ||
1992 | 0x68,0x15,0x48,0x24,0x21,0x38,0x00,0x00,0x21,0x28,0x27,0x01,0x00,0x00,0xa2,0x90, | ||
1993 | 0x21,0x20,0xe8,0x00,0x01,0x00,0xe7,0x24,0x38,0x4c,0x82,0xa0,0x1e,0x00,0xa3,0x90, | ||
1994 | 0x1e,0x00,0xe6,0x28,0x56,0x4c,0x83,0xa0,0x3c,0x00,0xa2,0x90,0x00,0x00,0x00,0x00, | ||
1995 | 0x74,0x4c,0x82,0xa0,0x5a,0x00,0xa3,0x90,0xf3,0xff,0xc0,0x14,0x92,0x4c,0x83,0xa0, | ||
1996 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
1997 | 0x20,0xbd,0x03,0x3c,0x58,0x00,0x63,0x34,0x00,0x00,0x62,0x90,0x0f,0x27,0x07,0x24, | ||
1998 | 0x20,0x00,0x42,0x34,0x00,0x00,0x62,0xa0,0xff,0xff,0xe7,0x24,0xff,0xff,0xe1,0x04, | ||
1999 | 0xff,0xff,0xe7,0x24,0x62,0xbd,0x04,0x3c,0x24,0x10,0x82,0x34,0x00,0x00,0x40,0xa0, | ||
2000 | 0x28,0x10,0x83,0x34,0x0c,0x11,0x86,0x34,0x0e,0x00,0x02,0x24,0x00,0x00,0x60,0xa0, | ||
2001 | 0x00,0x11,0x85,0x34,0x00,0x00,0xc2,0xa0,0x00,0x00,0xa7,0x8c,0xdf,0xff,0x02,0x24, | ||
2002 | 0x10,0x00,0x86,0x34,0x24,0x38,0xe2,0x00,0x49,0x0c,0x03,0x24,0xcf,0xff,0x02,0x24, | ||
2003 | 0x00,0x00,0xc3,0xac,0x04,0x00,0x84,0x34,0x00,0x00,0xa7,0xac,0x24,0x38,0xe2,0x00, | ||
2004 | 0x41,0x0c,0x02,0x24,0x00,0x00,0xa7,0xac,0x00,0x00,0x80,0xac,0x00,0x00,0xc2,0xac, | ||
2005 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0xd0,0xff,0xbd,0x27,0x25,0xb0,0x03,0x3c, | ||
2006 | 0x01,0x80,0x02,0x3c,0xb0,0x03,0x68,0x34,0x1c,0x00,0xb1,0xaf,0x18,0x03,0x63,0x34, | ||
2007 | 0xd8,0xff,0x91,0x24,0xa0,0x08,0x42,0x24,0x00,0x00,0x62,0xac,0x28,0x00,0xbf,0xaf, | ||
2008 | 0x00,0x00,0x11,0xad,0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x18,0x00,0xb0,0xaf, | ||
2009 | 0x02,0x80,0x13,0x3c,0x00,0x00,0x23,0x96,0x68,0x15,0x73,0x26,0xff,0xff,0x32,0x32, | ||
2010 | 0x40,0x10,0x02,0x3c,0x78,0x64,0x65,0x8e,0x25,0x90,0x42,0x02,0x02,0x80,0x10,0x3c, | ||
2011 | 0x8c,0x96,0x10,0x26,0x20,0x00,0x42,0x26,0x00,0x00,0x03,0xad,0x20,0x00,0x06,0x24, | ||
2012 | 0x00,0x00,0x02,0xad,0x21,0x38,0x00,0x02,0x0c,0x00,0x03,0xae,0x0a,0x00,0x04,0x24, | ||
2013 | 0x64,0x01,0x00,0x0c,0x08,0x00,0x02,0xae,0x04,0x00,0x23,0x8e,0xff,0xe0,0x02,0x24, | ||
2014 | 0x28,0x00,0x04,0x24,0x24,0x18,0x62,0x00,0x00,0x10,0x63,0x34,0x02,0x00,0x24,0xa2, | ||
2015 | 0x04,0x00,0x23,0xae,0x0c,0x00,0x02,0x8e,0x0a,0x00,0x04,0x24,0xf8,0xff,0x42,0x24, | ||
2016 | 0x4d,0x01,0x00,0x0c,0x00,0x00,0x22,0xa6,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
2017 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x0c,0x00,0x07,0x8e,0x20,0x10,0x06,0x3c, | ||
2018 | 0x21,0x28,0x40,0x02,0x20,0x00,0xe7,0x24,0x00,0xfe,0xc6,0x34,0xff,0xff,0xe7,0x30, | ||
2019 | 0x01,0x00,0x11,0x24,0x0a,0x00,0x04,0x24,0x10,0x01,0x00,0x0c,0x10,0x00,0xb1,0xaf, | ||
2020 | 0xd5,0x4a,0x63,0x92,0x2a,0xb0,0x10,0x3c,0x32,0x00,0x02,0x36,0x01,0x00,0x63,0x24, | ||
2021 | 0x00,0x00,0x43,0xa0,0x4d,0x01,0x00,0x0c,0x0a,0x00,0x04,0x24,0xc9,0x64,0x62,0x92, | ||
2022 | 0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x24,0xc9,0x64,0x62,0xa2,0x00,0x60,0x01,0x40, | ||
2023 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x01,0x00,0x10,0x36,0x00,0x00,0x11,0xa2, | ||
2024 | 0x28,0x00,0xbf,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f, | ||
2025 | 0x18,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27, | ||
2026 | 0x25,0xb0,0x05,0x3c,0x01,0x80,0x03,0x3c,0x21,0x38,0x80,0x00,0x18,0x03,0xa2,0x34, | ||
2027 | 0xe8,0x09,0x63,0x24,0x01,0x00,0x04,0x24,0x00,0x00,0x43,0xac,0x35,0x00,0xe4,0x10, | ||
2028 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x10,0x20,0x08,0xa2,0x34,0x02,0x00,0x02,0x24, | ||
2029 | 0x83,0x00,0xe2,0x10,0x03,0x00,0x02,0x24,0x5a,0x00,0xe2,0x10,0x00,0x00,0x00,0x00, | ||
2030 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x02,0x80,0x03,0x3c,0x00,0x00,0x44,0x8c, | ||
2031 | 0x68,0x15,0x66,0x24,0x70,0x08,0x02,0x24,0xe0,0x08,0x03,0x24,0x74,0x4b,0xc2,0xac, | ||
2032 | 0x40,0x08,0x02,0x24,0x78,0x4b,0xc3,0xac,0x84,0x4b,0xc2,0xac,0x78,0x08,0x03,0x24, | ||
2033 | 0x0c,0x08,0x02,0x24,0x88,0x4b,0xc3,0xac,0x8c,0x4b,0xc2,0xac,0x10,0x08,0x03,0x24, | ||
2034 | 0x20,0x08,0x02,0x24,0x90,0x4b,0xc3,0xac,0x94,0x4b,0xc2,0xac,0x24,0x08,0x03,0x24, | ||
2035 | 0x58,0x08,0x02,0x24,0x98,0x4b,0xc3,0xac,0x9c,0x4b,0xc2,0xac,0x50,0x0c,0x03,0x24, | ||
2036 | 0x54,0x0c,0x02,0x24,0xa0,0x4b,0xc3,0xac,0xa4,0x4b,0xc2,0xac,0x14,0x0c,0x03,0x24, | ||
2037 | 0x10,0x0c,0x02,0x24,0x60,0x08,0x05,0x24,0xa8,0x4b,0xc3,0xac,0xac,0x4b,0xc2,0xac, | ||
2038 | 0x80,0x0c,0x03,0x24,0x84,0x0c,0x02,0x24,0x00,0x01,0x84,0x30,0xb4,0x4b,0xc2,0xac, | ||
2039 | 0x80,0x4b,0xc5,0xac,0xb0,0x4b,0xc3,0xac,0x71,0x4b,0xc0,0xa0,0x7c,0x4b,0xc5,0xac, | ||
2040 | 0x02,0x00,0x80,0x10,0xa0,0x08,0x02,0x24,0xb8,0x08,0x02,0x24,0x08,0x00,0xe0,0x03, | ||
2041 | 0xb8,0x4b,0xc2,0xac,0x28,0x08,0xa2,0x34,0x02,0x80,0x03,0x3c,0x00,0x00,0x44,0x8c, | ||
2042 | 0x68,0x15,0x66,0x24,0x70,0x08,0x02,0x24,0xe0,0x08,0x03,0x24,0x74,0x4b,0xc2,0xac, | ||
2043 | 0x44,0x08,0x02,0x24,0x78,0x4b,0xc3,0xac,0x84,0x4b,0xc2,0xac,0x78,0x08,0x03,0x24, | ||
2044 | 0x0c,0x08,0x02,0x24,0x88,0x4b,0xc3,0xac,0x8c,0x4b,0xc2,0xac,0x14,0x08,0x03,0x24, | ||
2045 | 0x28,0x08,0x02,0x24,0x90,0x4b,0xc3,0xac,0x94,0x4b,0xc2,0xac,0x2c,0x08,0x03,0x24, | ||
2046 | 0x58,0x08,0x02,0x24,0x98,0x4b,0xc3,0xac,0x9c,0x4b,0xc2,0xac,0x58,0x0c,0x03,0x24, | ||
2047 | 0x5c,0x0c,0x02,0x24,0xa0,0x4b,0xc3,0xac,0xa4,0x4b,0xc2,0xac,0x1c,0x0c,0x03,0x24, | ||
2048 | 0x18,0x0c,0x02,0x24,0x64,0x08,0x05,0x24,0xa8,0x4b,0xc3,0xac,0xac,0x4b,0xc2,0xac, | ||
2049 | 0x88,0x0c,0x03,0x24,0x8c,0x0c,0x02,0x24,0x00,0x01,0x84,0x30,0xb4,0x4b,0xc2,0xac, | ||
2050 | 0x71,0x4b,0xc7,0xa0,0x80,0x4b,0xc5,0xac,0xb0,0x4b,0xc3,0xac,0x7c,0x4b,0xc5,0xac, | ||
2051 | 0xd6,0xff,0x80,0x10,0xa4,0x08,0x02,0x24,0xbc,0x08,0x02,0x24,0x08,0x00,0xe0,0x03, | ||
2052 | 0xb8,0x4b,0xc2,0xac,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0xac,0x08,0x03,0x24, | ||
2053 | 0xb8,0x4b,0x43,0xac,0x74,0x08,0x03,0x24,0xe4,0x08,0x04,0x24,0x74,0x4b,0x43,0xac, | ||
2054 | 0x4c,0x08,0x03,0x24,0x78,0x4b,0x44,0xac,0x84,0x4b,0x43,0xac,0x7c,0x08,0x04,0x24, | ||
2055 | 0x0c,0x08,0x03,0x24,0x88,0x4b,0x44,0xac,0x8c,0x4b,0x43,0xac,0x1c,0x08,0x04,0x24, | ||
2056 | 0x38,0x08,0x03,0x24,0x90,0x4b,0x44,0xac,0x94,0x4b,0x43,0xac,0x3c,0x08,0x04,0x24, | ||
2057 | 0x5c,0x08,0x03,0x24,0x98,0x4b,0x44,0xac,0x9c,0x4b,0x43,0xac,0x68,0x0c,0x04,0x24, | ||
2058 | 0x6c,0x0c,0x03,0x24,0xa0,0x4b,0x44,0xac,0xa4,0x4b,0x43,0xac,0x2c,0x0c,0x04,0x24, | ||
2059 | 0x28,0x0c,0x03,0x24,0x6c,0x08,0x05,0x24,0xa8,0x4b,0x44,0xac,0xac,0x4b,0x43,0xac, | ||
2060 | 0x98,0x0c,0x04,0x24,0x9c,0x0c,0x03,0x24,0x71,0x4b,0x47,0xa0,0x80,0x4b,0x45,0xac, | ||
2061 | 0xb0,0x4b,0x44,0xac,0xb4,0x4b,0x43,0xac,0x08,0x00,0xe0,0x03,0x7c,0x4b,0x45,0xac, | ||
2062 | 0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0xa8,0x08,0x03,0x24,0xb8,0x4b,0x43,0xac, | ||
2063 | 0x74,0x08,0x03,0x24,0xe4,0x08,0x04,0x24,0x74,0x4b,0x43,0xac,0x48,0x08,0x03,0x24, | ||
2064 | 0x78,0x4b,0x44,0xac,0x84,0x4b,0x43,0xac,0x7c,0x08,0x04,0x24,0x0c,0x08,0x03,0x24, | ||
2065 | 0x88,0x4b,0x44,0xac,0x8c,0x4b,0x43,0xac,0x18,0x08,0x04,0x24,0x30,0x08,0x03,0x24, | ||
2066 | 0x90,0x4b,0x44,0xac,0x94,0x4b,0x43,0xac,0x34,0x08,0x04,0x24,0x5c,0x08,0x03,0x24, | ||
2067 | 0x98,0x4b,0x44,0xac,0x9c,0x4b,0x43,0xac,0x60,0x0c,0x04,0x24,0x64,0x0c,0x03,0x24, | ||
2068 | 0xa0,0x4b,0x44,0xac,0xa4,0x4b,0x43,0xac,0x24,0x0c,0x04,0x24,0x20,0x0c,0x03,0x24, | ||
2069 | 0x68,0x08,0x05,0x24,0xa8,0x4b,0x44,0xac,0xac,0x4b,0x43,0xac,0x90,0x0c,0x04,0x24, | ||
2070 | 0x94,0x0c,0x03,0x24,0x71,0x4b,0x47,0xa0,0x80,0x4b,0x45,0xac,0xb0,0x4b,0x44,0xac, | ||
2071 | 0xb4,0x4b,0x43,0xac,0x08,0x00,0xe0,0x03,0x7c,0x4b,0x45,0xac,0x36,0x43,0x00,0x08, | ||
2072 | 0x21,0x18,0x00,0x00,0x20,0x00,0x62,0x2c,0x06,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
2073 | 0x06,0x10,0x64,0x00,0x01,0x00,0x42,0x30,0xfa,0xff,0x40,0x10,0x01,0x00,0x63,0x24, | ||
2074 | 0xff,0xff,0x63,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00,0xd8,0xff,0xbd,0x27, | ||
2075 | 0x25,0xb0,0x02,0x3c,0x18,0x00,0xb2,0xaf,0x21,0x90,0x82,0x00,0xff,0xff,0x02,0x24, | ||
2076 | 0x1c,0x00,0xb3,0xaf,0x14,0x00,0xb1,0xaf,0x20,0x00,0xbf,0xaf,0x10,0x00,0xb0,0xaf, | ||
2077 | 0x21,0x88,0xa0,0x00,0x21,0x20,0xa0,0x00,0x21,0x18,0x40,0x02,0x10,0x00,0xa2,0x10, | ||
2078 | 0x21,0x98,0xc0,0x00,0x00,0x00,0x50,0x8e,0x31,0x43,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2079 | 0x04,0x10,0x53,0x00,0x27,0x18,0x11,0x00,0x25,0x18,0x62,0x00,0x24,0x18,0x70,0x00, | ||
2080 | 0x00,0x00,0x43,0xae,0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f, | ||
2081 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27, | ||
2082 | 0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2083 | 0x10,0x00,0xb0,0x8f,0x28,0x00,0xbd,0x27,0x00,0x00,0x66,0xac,0x08,0x00,0xe0,0x03, | ||
2084 | 0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c,0x21,0x30,0x80,0x00,0xec,0x60,0x44,0x8c, | ||
2085 | 0x3d,0x43,0x00,0x08,0xff,0xff,0x05,0x24,0xe0,0xff,0xbd,0x27,0x25,0xb0,0x02,0x3c, | ||
2086 | 0x18,0x00,0xbf,0xaf,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x21,0x20,0x82,0x00, | ||
2087 | 0x00,0x00,0x90,0x8c,0x21,0x88,0xa0,0x00,0x31,0x43,0x00,0x0c,0x21,0x20,0xa0,0x00, | ||
2088 | 0x24,0x80,0x11,0x02,0x06,0x10,0x50,0x00,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f, | ||
2089 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0xd0,0xff,0xbd,0x27, | ||
2090 | 0x14,0x00,0xb1,0xaf,0x02,0x80,0x11,0x3c,0x28,0x00,0xbf,0xaf,0x20,0x00,0xb4,0xaf, | ||
2091 | 0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf,0x24,0x00,0xb5,0xaf,0x10,0x00,0xb0,0xaf, | ||
2092 | 0x68,0x15,0x31,0x26,0x98,0x4b,0x22,0x8e,0x25,0xb0,0x12,0x3c,0x24,0x08,0x53,0x36, | ||
2093 | 0x21,0x10,0x52,0x00,0x00,0x00,0x70,0x8e,0x00,0x00,0x55,0x8c,0x7f,0x80,0x03,0x3c, | ||
2094 | 0xff,0x7f,0x02,0x3c,0xff,0xff,0x63,0x34,0xff,0xff,0x42,0x34,0x24,0x10,0x02,0x02, | ||
2095 | 0x24,0x18,0xa3,0x02,0xc0,0x25,0x04,0x00,0x25,0x18,0x64,0x00,0x00,0x80,0x14,0x3c, | ||
2096 | 0x00,0x00,0x62,0xae,0x01,0x00,0x04,0x24,0x84,0x0a,0x00,0x0c,0x25,0xa8,0x74,0x00, | ||
2097 | 0x98,0x4b,0x22,0x8e,0x25,0x80,0x14,0x02,0x01,0x00,0x04,0x24,0x21,0x10,0x52,0x00, | ||
2098 | 0x00,0x00,0x55,0xac,0x84,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xae, | ||
2099 | 0x84,0x0a,0x00,0x0c,0x01,0x00,0x04,0x24,0xb8,0x4b,0x24,0x8e,0x0f,0x00,0x05,0x3c, | ||
2100 | 0x28,0x00,0xbf,0x8f,0x24,0x00,0xb5,0x8f,0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f, | ||
2101 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0xff,0xff,0xa5,0x34, | ||
2102 | 0x68,0x43,0x00,0x08,0x30,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf, | ||
2103 | 0x02,0x80,0x11,0x3c,0x10,0x00,0xb0,0xaf,0x18,0x00,0xbf,0xaf,0x68,0x15,0x27,0x26, | ||
2104 | 0x73,0x4b,0xe5,0x90,0x01,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c,0xb0,0x0e,0x63,0x24, | ||
2105 | 0x18,0x03,0x42,0x34,0x02,0x00,0x06,0x24,0x00,0x00,0x43,0xac,0x34,0x00,0xa6,0x10, | ||
2106 | 0x21,0x80,0x80,0x00,0x03,0x00,0x03,0x24,0x3a,0x00,0xa3,0x10,0x2e,0x00,0x02,0x2e, | ||
2107 | 0x10,0x00,0x02,0x2e,0x07,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0xff,0x00,0x04,0x32, | ||
2108 | 0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x79,0x43,0x00,0x08, | ||
2109 | 0x20,0x00,0xbd,0x27,0xfa,0xff,0xa6,0x14,0xff,0x00,0x04,0x32,0x71,0x4b,0xe4,0x90, | ||
2110 | 0x01,0x00,0x02,0x24,0x33,0x00,0x82,0x10,0x02,0x00,0x82,0x28,0x38,0x00,0x40,0x14, | ||
2111 | 0x00,0x00,0x00,0x00,0x38,0x00,0x85,0x10,0x68,0x15,0x22,0x26,0x2e,0x00,0x83,0x10, | ||
2112 | 0x00,0x00,0x00,0x00,0x00,0x08,0x04,0x24,0x68,0x43,0x00,0x0c,0xff,0xff,0x05,0x24, | ||
2113 | 0xff,0xfc,0x06,0x3c,0xff,0xff,0xc6,0x34,0x24,0x30,0x46,0x00,0x00,0x08,0x04,0x24, | ||
2114 | 0x3d,0x43,0x00,0x0c,0xff,0xff,0x05,0x24,0x68,0x15,0x22,0x26,0x71,0x4b,0x44,0x90, | ||
2115 | 0x01,0x00,0x03,0x24,0x07,0x00,0x83,0x10,0x02,0x00,0x82,0x28,0x2c,0x00,0x40,0x14, | ||
2116 | 0x02,0x00,0x02,0x24,0x2c,0x00,0x82,0x10,0x03,0x00,0x02,0x24,0xdb,0xff,0x82,0x14, | ||
2117 | 0x00,0x00,0x00,0x00,0x68,0x15,0x22,0x26,0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x3c, | ||
2118 | 0x3d,0x43,0x00,0x0c,0x21,0x30,0x00,0x00,0xc2,0x43,0x00,0x08,0xff,0x00,0x04,0x32, | ||
2119 | 0x25,0x00,0x82,0x2c,0xcc,0xff,0x40,0x14,0x03,0x00,0x03,0x24,0x18,0x00,0xbf,0x8f, | ||
2120 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2121 | 0x20,0x00,0xbd,0x27,0xc7,0xff,0x40,0x14,0x10,0x00,0x02,0x2e,0x18,0x00,0xbf,0x8f, | ||
2122 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2123 | 0x20,0x00,0xbd,0x27,0x68,0x15,0x22,0x26,0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x3c, | ||
2124 | 0x3d,0x43,0x00,0x0c,0x0f,0x00,0x06,0x24,0xd4,0x43,0x00,0x08,0x00,0x08,0x04,0x24, | ||
2125 | 0xcc,0xff,0x80,0x14,0x68,0x15,0x22,0x26,0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x24, | ||
2126 | 0x3d,0x43,0x00,0x0c,0x0f,0x00,0x06,0x24,0xd4,0x43,0x00,0x08,0x00,0x08,0x04,0x24, | ||
2127 | 0xb2,0xff,0x80,0x14,0x00,0x00,0x00,0x00,0x68,0x15,0x22,0x26,0x74,0x4b,0x44,0x8c, | ||
2128 | 0x0f,0x00,0x05,0x24,0x3d,0x43,0x00,0x0c,0x21,0x30,0x00,0x00,0xc2,0x43,0x00,0x08, | ||
2129 | 0xff,0x00,0x04,0x32,0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0x02,0x80,0x11,0x3c, | ||
2130 | 0x68,0x15,0x28,0x26,0x73,0x4b,0x06,0x91,0x01,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
2131 | 0x5c,0x10,0x63,0x24,0x18,0x03,0x42,0x34,0x02,0x00,0x07,0x24,0x18,0x00,0xb2,0xaf, | ||
2132 | 0x10,0x00,0xb0,0xaf,0x1c,0x00,0xbf,0xaf,0x00,0x00,0x43,0xac,0x21,0x90,0xa0,0x00, | ||
2133 | 0x39,0x00,0xc7,0x10,0xff,0x00,0x90,0x30,0x03,0x00,0x03,0x24,0x3f,0x00,0xc3,0x10, | ||
2134 | 0x2e,0x00,0x02,0x2e,0x10,0x00,0x02,0x2e,0x0c,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
2135 | 0x0f,0x00,0x04,0x3c,0xff,0xff,0x84,0x34,0x24,0x20,0x44,0x02,0x00,0x15,0x10,0x00, | ||
2136 | 0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f, | ||
2137 | 0x25,0x20,0x44,0x00,0x63,0x43,0x00,0x08,0x20,0x00,0xbd,0x27,0xf5,0xff,0xc7,0x14, | ||
2138 | 0x0f,0x00,0x04,0x3c,0x71,0x4b,0x04,0x91,0x01,0x00,0x02,0x24,0x33,0x00,0x82,0x10, | ||
2139 | 0x02,0x00,0x82,0x28,0x38,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x38,0x00,0x86,0x10, | ||
2140 | 0x68,0x15,0x22,0x26,0x2e,0x00,0x83,0x10,0x00,0x00,0x00,0x00,0x00,0x08,0x04,0x24, | ||
2141 | 0x68,0x43,0x00,0x0c,0xff,0xff,0x05,0x24,0xff,0xfc,0x06,0x3c,0xff,0xff,0xc6,0x34, | ||
2142 | 0x24,0x30,0x46,0x00,0x00,0x08,0x04,0x24,0x3d,0x43,0x00,0x0c,0xff,0xff,0x05,0x24, | ||
2143 | 0x68,0x15,0x22,0x26,0x71,0x4b,0x44,0x90,0x01,0x00,0x03,0x24,0x07,0x00,0x83,0x10, | ||
2144 | 0x02,0x00,0x82,0x28,0x2c,0x00,0x40,0x14,0x02,0x00,0x02,0x24,0x2c,0x00,0x82,0x10, | ||
2145 | 0x03,0x00,0x02,0x24,0xd6,0xff,0x82,0x14,0x00,0x00,0x00,0x00,0x68,0x15,0x22,0x26, | ||
2146 | 0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x3c,0x3d,0x43,0x00,0x0c,0x21,0x30,0x00,0x00, | ||
2147 | 0x2f,0x44,0x00,0x08,0x0f,0x00,0x04,0x3c,0x25,0x00,0x02,0x2e,0xc7,0xff,0x40,0x14, | ||
2148 | 0x03,0x00,0x03,0x24,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2149 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0xc1,0xff,0x40,0x14, | ||
2150 | 0x00,0x00,0x00,0x00,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2151 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0x68,0x15,0x22,0x26, | ||
2152 | 0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x3c,0x3d,0x43,0x00,0x0c,0x0f,0x00,0x06,0x24, | ||
2153 | 0x46,0x44,0x00,0x08,0x00,0x08,0x04,0x24,0xcc,0xff,0x80,0x14,0x68,0x15,0x22,0x26, | ||
2154 | 0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x24,0x3d,0x43,0x00,0x0c,0x0f,0x00,0x06,0x24, | ||
2155 | 0x46,0x44,0x00,0x08,0x00,0x08,0x04,0x24,0xad,0xff,0x80,0x14,0x00,0x00,0x00,0x00, | ||
2156 | 0x68,0x15,0x22,0x26,0x74,0x4b,0x44,0x8c,0x0f,0x00,0x05,0x24,0x3d,0x43,0x00,0x0c, | ||
2157 | 0x21,0x30,0x00,0x00,0x2f,0x44,0x00,0x08,0x0f,0x00,0x04,0x3c,0xe8,0xff,0xbd,0x27, | ||
2158 | 0x10,0x00,0xb0,0xaf,0x21,0x80,0x80,0x00,0x14,0x00,0xbf,0xaf,0x79,0x43,0x00,0x0c, | ||
2159 | 0x21,0x20,0x00,0x00,0x40,0x01,0x44,0x34,0x21,0x18,0x40,0x00,0x1f,0x00,0x02,0x2e, | ||
2160 | 0x00,0x23,0x04,0x00,0x10,0x00,0x40,0x10,0x10,0x00,0x05,0x2e,0x00,0x01,0x64,0x34, | ||
2161 | 0x06,0x00,0xa0,0x10,0x00,0x23,0x04,0x00,0x21,0x10,0x00,0x02,0x14,0x00,0xbf,0x8f, | ||
2162 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27,0x63,0x43,0x00,0x0c, | ||
2163 | 0xf1,0xff,0x10,0x26,0x21,0x10,0x00,0x02,0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f, | ||
2164 | 0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27,0x63,0x43,0x00,0x0c,0xe2,0xff,0x10,0x26, | ||
2165 | 0x21,0x10,0x00,0x02,0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03, | ||
2166 | 0x18,0x00,0xbd,0x27,0x25,0xb0,0x02,0x3c,0x27,0x38,0x05,0x00,0x21,0x40,0x82,0x00, | ||
2167 | 0xff,0xff,0x02,0x24,0x07,0x00,0xa2,0x10,0x25,0x38,0xe6,0x00,0x00,0x00,0x02,0x8d, | ||
2168 | 0x00,0x00,0x00,0x00,0x24,0x10,0xe2,0x00,0x00,0x00,0x02,0xad,0x08,0x00,0xe0,0x03, | ||
2169 | 0x00,0x00,0x00,0x00,0x00,0x00,0x06,0xad,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2170 | 0x01,0x80,0x02,0x3c,0x25,0xb0,0x03,0x3c,0xe8,0x12,0x42,0x24,0x18,0x03,0x63,0x34, | ||
2171 | 0xd8,0xff,0xbd,0x27,0x00,0x00,0x62,0xac,0x0f,0x00,0x02,0x3c,0x14,0x00,0xb1,0xaf, | ||
2172 | 0xff,0xff,0x42,0x34,0x21,0x88,0xa0,0x00,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf, | ||
2173 | 0x20,0x00,0xbf,0xaf,0x10,0x00,0xb0,0xaf,0x21,0x90,0xc0,0x00,0x21,0x28,0xc0,0x00, | ||
2174 | 0x0a,0x00,0x22,0x12,0x21,0x98,0x80,0x00,0xac,0x43,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2175 | 0x21,0x20,0x20,0x02,0x31,0x43,0x00,0x0c,0x21,0x80,0x40,0x00,0x04,0x10,0x52,0x00, | ||
2176 | 0x27,0x28,0x11,0x00,0x25,0x28,0xa2,0x00,0x24,0x28,0xb0,0x00,0xff,0x00,0x64,0x32, | ||
2177 | 0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2178 | 0x10,0x00,0xb0,0x8f,0x17,0x44,0x00,0x08,0x28,0x00,0xbd,0x27,0x01,0x80,0x03,0x3c, | ||
2179 | 0x25,0xb0,0x02,0x3c,0x74,0x13,0x63,0x24,0x18,0x03,0x42,0x34,0xe0,0xff,0xbd,0x27, | ||
2180 | 0x00,0x00,0x43,0xac,0x18,0x00,0xbf,0xaf,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf, | ||
2181 | 0xac,0x43,0x00,0x0c,0x21,0x88,0xa0,0x00,0x21,0x80,0x40,0x00,0x31,0x43,0x00,0x0c, | ||
2182 | 0x21,0x20,0x20,0x02,0x24,0x80,0x11,0x02,0x06,0x10,0x50,0x00,0x18,0x00,0xbf,0x8f, | ||
2183 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
2184 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2185 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2186 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2187 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2188 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2189 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2190 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2191 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2192 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2193 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2194 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2195 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x01,0x00,0x02,0x24, | ||
2196 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2197 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2198 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2199 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2200 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2201 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2202 | 0xc8,0xff,0xbd,0x27,0x2c,0x00,0xb1,0xaf,0xff,0xff,0x05,0x24,0x21,0x88,0x80,0x00, | ||
2203 | 0x02,0x00,0x06,0x24,0x10,0x00,0xa4,0x27,0x34,0x00,0xbf,0xaf,0x30,0x00,0xb2,0xaf, | ||
2204 | 0x97,0x45,0x00,0x0c,0x28,0x00,0xb0,0xaf,0x08,0x00,0x30,0x96,0x02,0x80,0x02,0x3c, | ||
2205 | 0x21,0x28,0x00,0x00,0x25,0x80,0x02,0x02,0x21,0x20,0x00,0x02,0x97,0x45,0x00,0x0c, | ||
2206 | 0x10,0x00,0x06,0x24,0x20,0x00,0x02,0x96,0x24,0x00,0x04,0x26,0x10,0x00,0xa5,0x27, | ||
2207 | 0x03,0xff,0x42,0x30,0xc8,0x00,0x42,0x34,0x20,0x00,0x02,0xa6,0x9f,0x45,0x00,0x0c, | ||
2208 | 0x06,0x00,0x06,0x24,0x25,0xb0,0x03,0x3c,0x50,0x00,0x62,0x34,0x00,0x00,0x44,0x8c, | ||
2209 | 0x54,0x00,0x65,0x34,0x58,0x00,0x66,0x34,0x18,0x00,0xa4,0xaf,0x00,0x00,0xa2,0x8c, | ||
2210 | 0x5c,0x00,0x63,0x34,0x2a,0x00,0x04,0x26,0x1c,0x00,0xa2,0xaf,0x00,0x00,0xc7,0x8c, | ||
2211 | 0x18,0x00,0xa5,0x27,0x06,0x00,0x06,0x24,0x20,0x00,0xa7,0xaf,0x00,0x00,0x62,0x8c, | ||
2212 | 0x1a,0x00,0x12,0x24,0x9f,0x45,0x00,0x0c,0x24,0x00,0xa2,0xaf,0x30,0x00,0x04,0x26, | ||
2213 | 0x20,0x00,0xa5,0x27,0x9f,0x45,0x00,0x0c,0x06,0x00,0x06,0x24,0x13,0x00,0x03,0x24, | ||
2214 | 0x14,0x00,0x23,0xae,0x0c,0x00,0x32,0xae,0x08,0x00,0x05,0x8e,0x04,0x00,0x04,0x8e, | ||
2215 | 0xff,0xdf,0x02,0x3c,0x14,0x00,0x06,0x8e,0xff,0xff,0x42,0x34,0x10,0x00,0x07,0x8e, | ||
2216 | 0xff,0xe0,0x03,0x24,0x24,0x28,0xa2,0x00,0x00,0x40,0x02,0x3c,0x24,0x20,0x83,0x00, | ||
2217 | 0x25,0x28,0xa2,0x00,0xff,0x81,0x03,0x24,0xfe,0xff,0x02,0x3c,0x24,0x30,0xc3,0x00, | ||
2218 | 0xff,0xff,0x42,0x34,0x00,0x12,0x84,0x34,0x00,0x80,0x03,0x3c,0x24,0x20,0x82,0x00, | ||
2219 | 0x25,0x38,0xe3,0x00,0x00,0x26,0xc6,0x34,0x80,0x00,0xa5,0x34,0x20,0x00,0x02,0x24, | ||
2220 | 0x00,0x00,0x12,0xa6,0x10,0x00,0x07,0xae,0x02,0x00,0x02,0xa2,0x14,0x00,0x06,0xae, | ||
2221 | 0x04,0x00,0x04,0xae,0x08,0x00,0x05,0xae,0x34,0x00,0xbf,0x8f,0x30,0x00,0xb2,0x8f, | ||
2222 | 0x2c,0x00,0xb1,0x8f,0x28,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27, | ||
2223 | 0x93,0x45,0x00,0x08,0xff,0x00,0xa5,0x30,0x00,0x00,0x85,0xa0,0xff,0xff,0xc6,0x24, | ||
2224 | 0x01,0x00,0x84,0x24,0xfc,0xff,0xc0,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2225 | 0x00,0x00,0x00,0x00,0x05,0x00,0xc0,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x85,0xac, | ||
2226 | 0xff,0xff,0xc6,0x24,0xfd,0xff,0xc0,0x14,0x04,0x00,0x84,0x24,0x08,0x00,0xe0,0x03, | ||
2227 | 0x00,0x00,0x00,0x00,0x21,0x38,0x80,0x00,0x08,0x00,0xc0,0x10,0xff,0xff,0xc3,0x24, | ||
2228 | 0xff,0xff,0x06,0x24,0x00,0x00,0xa2,0x90,0xff,0xff,0x63,0x24,0x01,0x00,0xa5,0x24, | ||
2229 | 0x00,0x00,0xe2,0xa0,0xfb,0xff,0x66,0x14,0x01,0x00,0xe7,0x24,0x08,0x00,0xe0,0x03, | ||
2230 | 0x21,0x10,0x80,0x00,0x21,0x38,0x80,0x00,0x08,0x00,0xc0,0x10,0xff,0xff,0xc3,0x24, | ||
2231 | 0xff,0xff,0x06,0x24,0x00,0x00,0xa2,0x8c,0xff,0xff,0x63,0x24,0x04,0x00,0xa5,0x24, | ||
2232 | 0x00,0x00,0xe2,0xac,0xfb,0xff,0x66,0x14,0x04,0x00,0xe7,0x24,0x08,0x00,0xe0,0x03, | ||
2233 | 0x21,0x10,0x80,0x00,0x2b,0x10,0xa4,0x00,0x0d,0x00,0x40,0x14,0xff,0xff,0x02,0x24, | ||
2234 | 0xff,0xff,0xc6,0x24,0x08,0x00,0xc2,0x10,0x21,0x18,0x80,0x00,0xff,0xff,0x07,0x24, | ||
2235 | 0x00,0x00,0xa2,0x90,0xff,0xff,0xc6,0x24,0x01,0x00,0xa5,0x24,0x00,0x00,0x62,0xa0, | ||
2236 | 0xfb,0xff,0xc7,0x14,0x01,0x00,0x63,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x80,0x00, | ||
2237 | 0x21,0x28,0xa6,0x00,0x21,0x18,0x86,0x00,0xff,0xff,0xc6,0x24,0xfa,0xff,0xc2,0x10, | ||
2238 | 0x00,0x00,0x00,0x00,0xff,0xff,0x07,0x24,0xff,0xff,0xa5,0x24,0x00,0x00,0xa2,0x90, | ||
2239 | 0xff,0xff,0x63,0x24,0xff,0xff,0xc6,0x24,0xfb,0xff,0xc7,0x14,0x00,0x00,0x62,0xa0, | ||
2240 | 0x08,0x00,0xe0,0x03,0x21,0x10,0x80,0x00,0x0c,0x00,0xc0,0x10,0x00,0x00,0x00,0x00, | ||
2241 | 0x00,0x00,0x82,0x90,0x00,0x00,0xa3,0x90,0x01,0x00,0x84,0x24,0x23,0x10,0x43,0x00, | ||
2242 | 0x00,0x16,0x02,0x00,0x03,0x16,0x02,0x00,0x04,0x00,0x40,0x14,0x01,0x00,0xa5,0x24, | ||
2243 | 0xff,0xff,0xc6,0x24,0xf6,0xff,0xc0,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2244 | 0x21,0x10,0xc0,0x00,0xea,0x45,0x00,0x08,0x21,0x18,0x86,0x00,0x00,0x00,0x82,0x90, | ||
2245 | 0x00,0x00,0x00,0x00,0x04,0x00,0x45,0x10,0x00,0x00,0x00,0x00,0x01,0x00,0x84,0x24, | ||
2246 | 0xfa,0xff,0x83,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x80,0x00, | ||
2247 | 0x09,0x00,0xc0,0x10,0xff,0xff,0xc3,0x24,0xff,0x00,0xa5,0x30,0xff,0xff,0x06,0x24, | ||
2248 | 0x00,0x00,0x82,0x90,0xff,0xff,0x63,0x24,0x05,0x00,0x45,0x10,0x01,0x00,0x84,0x24, | ||
2249 | 0xfb,0xff,0x66,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00, | ||
2250 | 0x08,0x00,0xe0,0x03,0xff,0xff,0x82,0x24,0x21,0x38,0x00,0x00,0x1f,0x00,0xc0,0x10, | ||
2251 | 0x21,0x18,0x00,0x00,0x02,0x80,0x02,0x3c,0x80,0x95,0x4b,0x24,0x00,0x00,0x87,0x90, | ||
2252 | 0x00,0x00,0xa3,0x90,0xff,0xff,0xc6,0x24,0x01,0x00,0x84,0x24,0x21,0x10,0xeb,0x00, | ||
2253 | 0x16,0x00,0xe0,0x10,0x01,0x00,0xa5,0x24,0x14,0x00,0x60,0x10,0x21,0x48,0x6b,0x00, | ||
2254 | 0x10,0x00,0xe3,0x10,0x20,0x00,0xe8,0x24,0x00,0x00,0x42,0x90,0x00,0x00,0x00,0x00, | ||
2255 | 0x01,0x00,0x42,0x30,0x02,0x00,0x40,0x10,0x20,0x00,0x6a,0x24,0xff,0x00,0x07,0x31, | ||
2256 | 0x00,0x00,0x22,0x91,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x30,0x02,0x00,0x40,0x10, | ||
2257 | 0xff,0x00,0xe7,0x30,0xff,0x00,0x43,0x31,0xff,0x00,0x63,0x30,0x03,0x00,0xe3,0x14, | ||
2258 | 0x00,0x00,0x00,0x00,0xe5,0xff,0xc0,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2259 | 0x23,0x10,0xe3,0x00,0x21,0x18,0x80,0x00,0x00,0x00,0xa2,0x90,0x01,0x00,0xa5,0x24, | ||
2260 | 0x00,0x00,0x82,0xa0,0xfc,0xff,0x40,0x14,0x01,0x00,0x84,0x24,0x08,0x00,0xe0,0x03, | ||
2261 | 0x21,0x10,0x60,0x00,0x21,0x38,0x80,0x00,0xff,0xff,0x03,0x24,0xff,0xff,0xc6,0x24, | ||
2262 | 0x06,0x00,0xc3,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0x90,0x01,0x00,0xa5,0x24, | ||
2263 | 0x00,0x00,0x82,0xa0,0xf9,0xff,0x40,0x14,0x01,0x00,0x84,0x24,0x08,0x00,0xe0,0x03, | ||
2264 | 0x21,0x10,0xe0,0x00,0x00,0x00,0x82,0x80,0x39,0x46,0x00,0x08,0x21,0x18,0x80,0x00, | ||
2265 | 0x01,0x00,0x84,0x24,0x00,0x00,0x82,0x80,0x00,0x00,0x00,0x00,0xfc,0xff,0x40,0x14, | ||
2266 | 0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0x90,0x01,0x00,0xa5,0x24,0x00,0x00,0x82,0xa0, | ||
2267 | 0xfc,0xff,0x40,0x14,0x01,0x00,0x84,0x24,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
2268 | 0x12,0x00,0xc0,0x10,0x21,0x18,0x80,0x00,0x00,0x00,0x82,0x80,0x4a,0x46,0x00,0x08, | ||
2269 | 0x00,0x00,0x00,0x00,0x01,0x00,0x84,0x24,0x00,0x00,0x82,0x80,0x00,0x00,0x00,0x00, | ||
2270 | 0xfc,0xff,0x40,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0x90,0x01,0x00,0xa5,0x24, | ||
2271 | 0x00,0x00,0x82,0xa0,0x05,0x00,0x40,0x10,0x01,0x00,0x84,0x24,0xff,0xff,0xc6,0x24, | ||
2272 | 0xf9,0xff,0xc0,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xa0,0x08,0x00,0xe0,0x03, | ||
2273 | 0x21,0x10,0x60,0x00,0x00,0x00,0x83,0x90,0x00,0x00,0xa2,0x90,0x01,0x00,0x84,0x24, | ||
2274 | 0x23,0x10,0x62,0x00,0x00,0x16,0x02,0x00,0x03,0x16,0x02,0x00,0x03,0x00,0x40,0x14, | ||
2275 | 0x01,0x00,0xa5,0x24,0xf7,0xff,0x60,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2276 | 0x00,0x00,0x00,0x00,0x21,0x10,0x00,0x00,0x0b,0x00,0xc0,0x10,0x00,0x00,0x00,0x00, | ||
2277 | 0x00,0x00,0xa2,0x90,0x00,0x00,0x83,0x90,0xff,0xff,0xc6,0x24,0x23,0x10,0x62,0x00, | ||
2278 | 0x00,0x16,0x02,0x00,0x03,0x16,0x02,0x00,0x03,0x00,0x40,0x14,0x01,0x00,0xa5,0x24, | ||
2279 | 0xf5,0xff,0x60,0x14,0x01,0x00,0x84,0x24,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2280 | 0x00,0x00,0x83,0x80,0x00,0x2e,0x05,0x00,0x21,0x10,0x80,0x00,0x7b,0x46,0x00,0x08, | ||
2281 | 0x03,0x2e,0x05,0x00,0x07,0x00,0x60,0x10,0x01,0x00,0x42,0x24,0x00,0x00,0x43,0x80, | ||
2282 | 0x00,0x00,0x00,0x00,0xfb,0xff,0x65,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
2283 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x00,0x00,0x00,0x82,0x80, | ||
2284 | 0x87,0x46,0x00,0x08,0x21,0x18,0x80,0x00,0x01,0x00,0x63,0x24,0x00,0x00,0x62,0x80, | ||
2285 | 0x00,0x00,0x00,0x00,0xfc,0xff,0x40,0x14,0x23,0x10,0x64,0x00,0x08,0x00,0xe0,0x03, | ||
2286 | 0x00,0x00,0x00,0x00,0xe0,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0x21,0x80,0xa0,0x00, | ||
2287 | 0x14,0x00,0xb1,0xaf,0x18,0x00,0xbf,0xaf,0x21,0x88,0x80,0x00,0x81,0x46,0x00,0x0c, | ||
2288 | 0x00,0x86,0x10,0x00,0x21,0x18,0x51,0x00,0x03,0x86,0x10,0x00,0x00,0x00,0x62,0x80, | ||
2289 | 0x00,0x00,0x00,0x00,0x0a,0x00,0x50,0x10,0x21,0x10,0x60,0x00,0xff,0xff,0x63,0x24, | ||
2290 | 0x2b,0x10,0x71,0x00,0xf9,0xff,0x40,0x10,0x21,0x10,0x00,0x00,0x18,0x00,0xbf,0x8f, | ||
2291 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
2292 | 0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03, | ||
2293 | 0x20,0x00,0xbd,0x27,0x21,0x30,0x80,0x00,0x0d,0x00,0xa0,0x10,0xff,0xff,0xa3,0x24, | ||
2294 | 0x00,0x00,0x82,0x80,0x00,0x00,0x00,0x00,0x09,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
2295 | 0xff,0xff,0x05,0x24,0xff,0xff,0x63,0x24,0x05,0x00,0x65,0x10,0x01,0x00,0xc6,0x24, | ||
2296 | 0x00,0x00,0xc2,0x80,0x00,0x00,0x00,0x00,0xfa,0xff,0x40,0x14,0x00,0x00,0x00,0x00, | ||
2297 | 0x08,0x00,0xe0,0x03,0x23,0x10,0xc4,0x00,0x00,0x00,0x82,0x90,0x00,0x00,0x00,0x00, | ||
2298 | 0x19,0x00,0x40,0x10,0x21,0x40,0x00,0x00,0x00,0x00,0xa9,0x80,0x00,0x00,0x00,0x00, | ||
2299 | 0x17,0x00,0x20,0x11,0x21,0x30,0xa0,0x00,0x00,0x3e,0x02,0x00,0x03,0x3e,0x07,0x00, | ||
2300 | 0x21,0x18,0x20,0x01,0x15,0x00,0xe3,0x10,0x00,0x00,0x00,0x00,0x01,0x00,0xc6,0x24, | ||
2301 | 0x00,0x00,0xc2,0x90,0x00,0x00,0x00,0x00,0x00,0x1e,0x02,0x00,0x03,0x1e,0x03,0x00, | ||
2302 | 0xf8,0xff,0x60,0x14,0x00,0x16,0x02,0x00,0x03,0x16,0x02,0x00,0x06,0x00,0x40,0x10, | ||
2303 | 0x00,0x00,0x00,0x00,0x01,0x00,0x84,0x24,0x00,0x00,0x82,0x90,0x00,0x00,0x00,0x00, | ||
2304 | 0xeb,0xff,0x40,0x14,0x01,0x00,0x08,0x25,0x08,0x00,0xe0,0x03,0x21,0x10,0x00,0x01, | ||
2305 | 0x00,0x00,0xa2,0x90,0xcc,0x46,0x00,0x08,0x00,0x16,0x02,0x00,0x00,0x00,0xc2,0x90, | ||
2306 | 0xcc,0x46,0x00,0x08,0x00,0x16,0x02,0x00,0x00,0x00,0x87,0x90,0x00,0x00,0x00,0x00, | ||
2307 | 0x14,0x00,0xe0,0x10,0x21,0x10,0x80,0x00,0x00,0x00,0xa4,0x90,0x00,0x00,0x00,0x00, | ||
2308 | 0x00,0x1e,0x04,0x00,0x03,0x1e,0x03,0x00,0x09,0x00,0x60,0x10,0x21,0x30,0xa0,0x00, | ||
2309 | 0x00,0x3e,0x07,0x00,0x03,0x3e,0x07,0x00,0x0b,0x00,0xe3,0x10,0x01,0x00,0xc6,0x24, | ||
2310 | 0x00,0x00,0xc3,0x80,0x00,0x00,0x00,0x00,0xfb,0xff,0x60,0x14,0x00,0x00,0x00,0x00, | ||
2311 | 0x01,0x00,0x42,0x24,0x00,0x00,0x47,0x90,0x00,0x00,0x00,0x00,0xf0,0xff,0xe0,0x14, | ||
2312 | 0x00,0x00,0x00,0x00,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2313 | 0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x18,0x00,0xbf,0xaf, | ||
2314 | 0x21,0x80,0x80,0x00,0x1d,0x00,0x80,0x10,0x21,0x88,0xa0,0x00,0xb8,0x46,0x00,0x0c, | ||
2315 | 0x21,0x20,0x00,0x02,0x21,0x80,0x02,0x02,0x00,0x00,0x02,0x82,0x21,0x28,0x20,0x02, | ||
2316 | 0x21,0x20,0x00,0x02,0x22,0x00,0x40,0x10,0x21,0x18,0x00,0x00,0xdc,0x46,0x00,0x0c, | ||
2317 | 0x00,0x00,0x00,0x00,0x05,0x00,0x40,0x10,0x21,0x18,0x40,0x00,0x00,0x00,0x42,0x80, | ||
2318 | 0x00,0x00,0x00,0x00,0x0a,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c, | ||
2319 | 0xa8,0x96,0x43,0xac,0x21,0x18,0x00,0x02,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f, | ||
2320 | 0x10,0x00,0xb0,0x8f,0x21,0x10,0x60,0x00,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
2321 | 0x00,0x00,0x60,0xa0,0x0d,0x47,0x00,0x08,0x01,0x00,0x63,0x24,0x02,0x80,0x02,0x3c, | ||
2322 | 0xa8,0x96,0x50,0x8c,0x00,0x00,0x00,0x00,0xf3,0xff,0x00,0x12,0x21,0x18,0x00,0x00, | ||
2323 | 0xb8,0x46,0x00,0x0c,0x21,0x20,0x00,0x02,0x21,0x80,0x02,0x02,0x00,0x00,0x02,0x82, | ||
2324 | 0x21,0x28,0x20,0x02,0x21,0x20,0x00,0x02,0xe0,0xff,0x40,0x14,0x21,0x18,0x00,0x00, | ||
2325 | 0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x02,0x80,0x02,0x3c, | ||
2326 | 0xa8,0x96,0x40,0xac,0x20,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
2327 | 0xe0,0xff,0xbd,0x27,0x18,0x00,0xb2,0xaf,0x14,0x00,0xb1,0xaf,0x1c,0x00,0xbf,0xaf, | ||
2328 | 0x10,0x00,0xb0,0xaf,0x00,0x00,0x90,0x8c,0x21,0x90,0x80,0x00,0x21,0x88,0xa0,0x00, | ||
2329 | 0x21,0x18,0x00,0x00,0x0f,0x00,0x00,0x12,0x21,0x20,0x00,0x02,0xb8,0x46,0x00,0x0c, | ||
2330 | 0x00,0x00,0x00,0x00,0x21,0x80,0x02,0x02,0x00,0x00,0x02,0x82,0x21,0x28,0x20,0x02, | ||
2331 | 0x21,0x20,0x00,0x02,0x07,0x00,0x40,0x10,0x21,0x18,0x00,0x00,0xdc,0x46,0x00,0x0c, | ||
2332 | 0x00,0x00,0x00,0x00,0x21,0x18,0x40,0x00,0x09,0x00,0x40,0x14,0x00,0x00,0x42,0xae, | ||
2333 | 0x21,0x18,0x00,0x02,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2334 | 0x10,0x00,0xb0,0x8f,0x21,0x10,0x60,0x00,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
2335 | 0x00,0x00,0x42,0x80,0x00,0x00,0x00,0x00,0xf5,0xff,0x40,0x10,0x01,0x00,0x64,0x24, | ||
2336 | 0x00,0x00,0x60,0xa0,0x46,0x47,0x00,0x08,0x00,0x00,0x44,0xae,0xd8,0xff,0xbd,0x27, | ||
2337 | 0x14,0x00,0xb1,0xaf,0x21,0x88,0x80,0x00,0x21,0x20,0xa0,0x00,0x1c,0x00,0xb3,0xaf, | ||
2338 | 0x18,0x00,0xb2,0xaf,0x20,0x00,0xbf,0xaf,0x10,0x00,0xb0,0xaf,0x81,0x46,0x00,0x0c, | ||
2339 | 0x21,0x98,0xa0,0x00,0x21,0x90,0x40,0x00,0x08,0x00,0x40,0x16,0x21,0x10,0x20,0x02, | ||
2340 | 0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2341 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27,0x81,0x46,0x00,0x0c, | ||
2342 | 0x21,0x20,0x20,0x02,0x21,0x80,0x40,0x00,0x2a,0x10,0x52,0x00,0x0a,0x00,0x40,0x14, | ||
2343 | 0x00,0x00,0x00,0x00,0x21,0x20,0x20,0x02,0x21,0x28,0x60,0x02,0x21,0x30,0x40,0x02, | ||
2344 | 0xd4,0x45,0x00,0x0c,0xff,0xff,0x10,0x26,0x0b,0x00,0x40,0x10,0x2a,0x18,0x12,0x02, | ||
2345 | 0xf8,0xff,0x60,0x10,0x01,0x00,0x31,0x26,0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f, | ||
2346 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00, | ||
2347 | 0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27,0x62,0x47,0x00,0x08,0x21,0x10,0x20,0x02, | ||
2348 | 0x01,0x80,0x02,0x3c,0xc0,0xff,0xbd,0x27,0x08,0x1e,0x44,0x24,0x25,0xb0,0x02,0x3c, | ||
2349 | 0x28,0x00,0xb4,0xaf,0x02,0x80,0x03,0x3c,0x25,0xb0,0x14,0x3c,0x18,0x03,0x42,0x34, | ||
2350 | 0x38,0x00,0xbe,0xaf,0x34,0x00,0xb7,0xaf,0x30,0x00,0xb6,0xaf,0x2c,0x00,0xb5,0xaf, | ||
2351 | 0x24,0x00,0xb3,0xaf,0x3c,0x00,0xbf,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf, | ||
2352 | 0x18,0x00,0xb0,0xaf,0x68,0x15,0x73,0x24,0x00,0x00,0x44,0xac,0x02,0x80,0x16,0x3c, | ||
2353 | 0x02,0x80,0x15,0x3c,0xc4,0x02,0x9e,0x36,0x64,0x03,0x97,0x36,0x01,0x80,0x04,0x3c, | ||
2354 | 0x08,0x1e,0x82,0x24,0x18,0x03,0x83,0x36,0x00,0x00,0x62,0xac,0xa0,0x02,0x87,0x36, | ||
2355 | 0x00,0x00,0xe4,0x8c,0xd8,0x63,0x63,0x8e,0xff,0x0f,0x02,0x3c,0xff,0xff,0x46,0x34, | ||
2356 | 0x24,0x80,0x86,0x00,0x01,0x00,0x05,0x3c,0x01,0x00,0x63,0x24,0x2b,0x10,0xb0,0x00, | ||
2357 | 0x07,0x00,0x40,0x10,0xd8,0x63,0x63,0xae,0xa4,0x02,0x82,0x36,0x00,0x00,0x51,0x8c, | ||
2358 | 0x00,0xb0,0x03,0x3c,0x25,0x80,0x03,0x02,0x00,0x00,0x11,0xae,0x00,0x00,0xe0,0xac, | ||
2359 | 0xb0,0x02,0x84,0x36,0x00,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x24,0x80,0x46,0x00, | ||
2360 | 0x2b,0x18,0xb0,0x00,0x08,0x00,0x60,0x10,0xc0,0x02,0x82,0x36,0x00,0xb0,0x02,0x3c, | ||
2361 | 0x25,0x80,0x02,0x02,0x00,0x00,0x11,0x8e,0xb4,0x02,0x82,0x36,0x00,0x00,0x51,0xac, | ||
2362 | 0x00,0x00,0x80,0xac,0xc0,0x02,0x82,0x36,0x00,0x00,0x50,0x8c,0xff,0x00,0x08,0x3c, | ||
2363 | 0xff,0xff,0x02,0x35,0x2b,0x10,0x50,0x00,0x47,0x00,0x40,0x10,0x00,0x00,0x00,0x00, | ||
2364 | 0x00,0x00,0x82,0x8e,0x00,0xff,0x06,0x3c,0xac,0x02,0x84,0x36,0x01,0x00,0x45,0x24, | ||
2365 | 0xbc,0x02,0x83,0x36,0xff,0x00,0xc2,0x34,0x00,0xfd,0x07,0x3c,0x00,0x00,0x85,0xac, | ||
2366 | 0x00,0x00,0x70,0xac,0x24,0x18,0x02,0x02,0x07,0x00,0xe2,0x34,0x00,0x00,0x85,0x8c, | ||
2367 | 0x52,0x03,0x62,0x10,0x25,0xb0,0x12,0x3c,0x2b,0x10,0x43,0x00,0xa2,0x00,0x40,0x14, | ||
2368 | 0xa4,0x00,0xe2,0x34,0x00,0xf8,0x04,0x3c,0x15,0x00,0x82,0x34,0x57,0x03,0x62,0x10, | ||
2369 | 0x2b,0x10,0x43,0x00,0xc8,0x00,0x40,0x14,0x00,0xf9,0x05,0x3c,0x00,0xf0,0x05,0x3c, | ||
2370 | 0x20,0x00,0xa2,0x34,0x67,0x03,0x62,0x10,0x2b,0x10,0x43,0x00,0x20,0x01,0x40,0x14, | ||
2371 | 0x10,0x00,0x82,0x34,0x70,0x03,0x65,0x10,0x2b,0x10,0xa3,0x00,0xc8,0x01,0x40,0x14, | ||
2372 | 0x02,0x00,0xa2,0x34,0x00,0xd0,0x02,0x3c,0x2a,0x02,0x62,0x10,0x2b,0x10,0x43,0x00, | ||
2373 | 0xaf,0x02,0x40,0x14,0x00,0xe0,0x02,0x3c,0x00,0xc0,0x02,0x3c,0xbb,0x03,0x62,0x10, | ||
2374 | 0xff,0x00,0x03,0x3c,0x00,0xf0,0x02,0x3c,0x24,0x30,0x02,0x02,0x18,0x00,0xc2,0x10, | ||
2375 | 0x02,0x1d,0x10,0x00,0x00,0x70,0x05,0x3c,0x24,0x10,0x05,0x02,0x02,0x4f,0x02,0x00, | ||
2376 | 0x0f,0x00,0x02,0x3c,0xff,0xff,0x42,0x34,0x00,0x50,0x07,0x3c,0xff,0x00,0x68,0x30, | ||
2377 | 0xff,0x00,0x04,0x32,0x96,0x01,0xc7,0x10,0x24,0x18,0x02,0x02,0x2b,0x10,0xe6,0x00, | ||
2378 | 0x8a,0x01,0x40,0x14,0x00,0x80,0x02,0x3c,0x00,0x20,0x02,0x3c,0x1a,0x03,0xc2,0x10, | ||
2379 | 0x2b,0x10,0x46,0x00,0x82,0x02,0x40,0x14,0x00,0x30,0x02,0x3c,0x17,0x03,0xc0,0x10, | ||
2380 | 0x80,0x10,0x08,0x00,0x00,0x10,0x02,0x3c,0x14,0x03,0xc2,0x10,0x80,0x10,0x08,0x00, | ||
2381 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
2382 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x00,0x00,0xe2,0x92,0x25,0xb0,0x07,0x3c, | ||
2383 | 0xc8,0x7d,0xc2,0xa2,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
2384 | 0xc8,0x7d,0xc2,0x92,0x00,0x00,0x00,0x00,0x01,0x00,0x42,0x30,0x4e,0x00,0x40,0x10, | ||
2385 | 0x02,0x80,0x03,0x3c,0x00,0x40,0x62,0x8e,0xf0,0xff,0x03,0x24,0xd7,0x42,0x60,0xa2, | ||
2386 | 0x24,0x10,0x43,0x00,0x01,0x00,0x42,0x34,0x00,0x40,0x62,0xae,0xc8,0x7d,0xc2,0x92, | ||
2387 | 0x00,0x00,0x00,0x00,0x02,0x00,0x42,0x30,0x3d,0x00,0x40,0x10,0x0f,0xff,0x03,0x24, | ||
2388 | 0x00,0x40,0x62,0x8e,0x00,0x00,0x00,0x00,0x24,0x10,0x43,0x00,0x10,0x00,0x42,0x34, | ||
2389 | 0x00,0x40,0x62,0xae,0xc8,0x7d,0xc2,0x92,0x00,0x00,0x00,0x00,0x04,0x00,0x42,0x30, | ||
2390 | 0x30,0x00,0x40,0x10,0xff,0xf0,0x03,0x24,0x00,0x40,0x62,0x8e,0x00,0x00,0x00,0x00, | ||
2391 | 0x24,0x10,0x43,0x00,0x00,0x01,0x42,0x34,0x25,0xb0,0x05,0x3c,0x00,0x40,0x62,0xae, | ||
2392 | 0x4c,0x00,0xa3,0x34,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x03,0x00,0x42,0x30, | ||
2393 | 0x05,0x00,0x40,0x14,0xff,0xff,0x02,0x3c,0x00,0x40,0x63,0x8e,0xff,0x0f,0x42,0x34, | ||
2394 | 0x24,0x18,0x62,0x00,0x00,0x40,0x63,0xae,0x00,0x7b,0xa4,0x8e,0x01,0x80,0x06,0x3c, | ||
2395 | 0x08,0x1f,0xc2,0x24,0x18,0x03,0xa3,0x34,0x00,0x7b,0xa6,0x26,0x00,0x00,0x62,0xac, | ||
2396 | 0x10,0x00,0x86,0x10,0x02,0x80,0x02,0x3c,0xbf,0x00,0xb2,0x34,0x68,0x15,0x51,0x24, | ||
2397 | 0x21,0x80,0xc0,0x00,0x00,0x00,0x42,0x92,0x00,0x00,0x00,0x00,0x04,0x00,0x42,0x2c, | ||
2398 | 0x09,0x00,0x40,0x10,0x02,0x80,0x07,0x3c,0x98,0x65,0x24,0x8e,0x8b,0x07,0x00,0x0c, | ||
2399 | 0x00,0x00,0x00,0x00,0x00,0x7b,0xa2,0x8e,0x00,0x00,0x00,0x00,0xf5,0xff,0x50,0x14, | ||
2400 | 0x00,0x00,0x00,0x00,0x02,0x80,0x07,0x3c,0x08,0x08,0xe4,0x24,0x21,0x28,0x00,0x00, | ||
2401 | 0x21,0x30,0x00,0x00,0x31,0x1c,0x00,0x0c,0x21,0x38,0x00,0x00,0x9a,0x47,0x00,0x08, | ||
2402 | 0x01,0x80,0x04,0x3c,0x00,0x40,0x62,0x8e,0x30,0x48,0x00,0x08,0x24,0x10,0x43,0x00, | ||
2403 | 0x00,0x40,0x62,0x8e,0x04,0x43,0x64,0x92,0x24,0x10,0x43,0x00,0x00,0x40,0x62,0xae, | ||
2404 | 0x27,0x48,0x00,0x08,0x04,0x43,0x64,0xae,0x68,0x15,0x66,0x24,0x00,0x40,0xc2,0x8c, | ||
2405 | 0xd7,0x42,0xc4,0x90,0xf0,0xff,0x03,0x24,0x24,0x10,0x43,0x00,0xb3,0xff,0x80,0x14, | ||
2406 | 0x00,0x40,0xc2,0xac,0x1c,0x00,0x04,0x24,0x58,0x0c,0xe5,0x34,0x50,0x0c,0xe3,0x34, | ||
2407 | 0x01,0x00,0x02,0x24,0xd7,0x42,0xc2,0xa0,0x00,0x00,0x64,0xa0,0x00,0x00,0xa4,0xa0, | ||
2408 | 0x1d,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xb2,0x02,0x62,0x10,0x2b,0x10,0x43,0x00, | ||
2409 | 0x3f,0x00,0x40,0x14,0xaf,0x00,0xe2,0x34,0x20,0x00,0xe2,0x34,0xc0,0x02,0x62,0x10, | ||
2410 | 0x2b,0x10,0x43,0x00,0xe3,0x00,0x40,0x14,0x29,0x00,0xe2,0x34,0x15,0x00,0xe2,0x34, | ||
2411 | 0x0c,0x03,0x62,0x10,0x2b,0x10,0x43,0x00,0x9d,0x01,0x40,0x14,0x17,0x00,0xe2,0x34, | ||
2412 | 0x09,0x00,0xe2,0x34,0xd8,0x03,0x62,0x10,0x2b,0x10,0x62,0x00,0x81,0x02,0x40,0x14, | ||
2413 | 0x14,0x00,0xe2,0x34,0x64,0xff,0x62,0x14,0x00,0xf0,0x02,0x3c,0xff,0x00,0x07,0x3c, | ||
2414 | 0x00,0xff,0xe7,0x34,0x24,0x10,0x07,0x02,0x7a,0xff,0x40,0x10,0xc0,0x02,0x82,0x36, | ||
2415 | 0x04,0x43,0x64,0x92,0xff,0x00,0x02,0x3c,0x24,0x10,0x02,0x02,0x00,0xff,0x03,0x32, | ||
2416 | 0x02,0x14,0x02,0x00,0x02,0x1a,0x03,0x00,0xfb,0xff,0x45,0x24,0x1c,0x43,0x62,0xa2, | ||
2417 | 0x00,0x01,0x84,0x34,0xfb,0xff,0x66,0x24,0xc0,0x02,0x82,0x36,0x04,0x43,0x64,0xae, | ||
2418 | 0x1d,0x43,0x65,0xa2,0x1f,0x43,0x66,0xa2,0x1e,0x43,0x63,0xa2,0x00,0x00,0x40,0xac, | ||
2419 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x05,0x00,0xa2,0x34,0x91,0x02,0x62,0x10, | ||
2420 | 0x2b,0x10,0x43,0x00,0x8e,0x00,0x40,0x14,0x00,0x00,0x00,0x00,0xde,0x02,0x65,0x10, | ||
2421 | 0x2b,0x10,0xa3,0x00,0x32,0x01,0x40,0x14,0x02,0x00,0xa2,0x34,0x17,0x00,0x82,0x34, | ||
2422 | 0x61,0x04,0x62,0x10,0x2b,0x10,0x62,0x00,0xa9,0x03,0x40,0x14,0x18,0x00,0x82,0x34, | ||
2423 | 0x3d,0xff,0x62,0x14,0x00,0xf0,0x02,0x3c,0x74,0x0b,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2424 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2425 | 0xa8,0x02,0x62,0x10,0x2b,0x10,0x43,0x00,0x95,0x00,0x40,0x14,0x0c,0x00,0xc2,0x34, | ||
2426 | 0xaa,0x00,0xe2,0x34,0xdc,0x02,0x62,0x10,0x2b,0x10,0x43,0x00,0xd9,0x00,0x40,0x14, | ||
2427 | 0xac,0x00,0xe2,0x34,0xa6,0x00,0xe2,0x34,0x1c,0x04,0x62,0x10,0x2b,0x10,0x62,0x00, | ||
2428 | 0x69,0x03,0x40,0x14,0xa7,0x00,0xe2,0x34,0x27,0xff,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2429 | 0x00,0xff,0x02,0x32,0xff,0x00,0x04,0x3c,0x02,0x8a,0x02,0x00,0x24,0x18,0x04,0x02, | ||
2430 | 0x01,0x00,0x02,0x24,0xa6,0x04,0x22,0x12,0x02,0x1c,0x03,0x00,0x02,0x00,0x02,0x24, | ||
2431 | 0xc9,0x04,0x22,0x12,0x03,0x00,0x02,0x24,0xdf,0x04,0x22,0x12,0x04,0x00,0x02,0x24, | ||
2432 | 0xd1,0x04,0x22,0x12,0x08,0x00,0x02,0x24,0x2e,0x05,0x22,0x12,0x09,0x00,0x02,0x24, | ||
2433 | 0x1e,0x05,0x22,0x12,0x0a,0x00,0x02,0x24,0x0e,0x05,0x22,0x12,0x0b,0x00,0x02,0x24, | ||
2434 | 0xfe,0x04,0x22,0x12,0x0c,0x00,0x02,0x24,0x5e,0x05,0x22,0x12,0x0d,0x00,0x02,0x24, | ||
2435 | 0x4e,0x05,0x22,0x12,0x0e,0x00,0x02,0x24,0x3e,0x05,0x22,0x12,0x0f,0x00,0x02,0x24, | ||
2436 | 0x2e,0x05,0x22,0x12,0x10,0x00,0x02,0x24,0x22,0xff,0x22,0x16,0xc0,0x02,0x82,0x36, | ||
2437 | 0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00, | ||
2438 | 0x80,0x10,0x02,0x00,0x21,0x10,0x53,0x00,0x4c,0x51,0x43,0x94,0x48,0x51,0x44,0x94, | ||
2439 | 0x25,0xb0,0x06,0x3c,0x00,0x1c,0x03,0x00,0x21,0x20,0x83,0x00,0x00,0x00,0xc4,0xaf, | ||
2440 | 0x58,0x51,0x45,0x8c,0x54,0x51,0x43,0x8c,0x50,0x51,0x44,0x94,0xc8,0x02,0xc6,0x34, | ||
2441 | 0x21,0x18,0x65,0x00,0x00,0x1c,0x03,0x00,0x21,0x20,0x83,0x00,0xc0,0x02,0x82,0x36, | ||
2442 | 0x00,0x00,0xc4,0xac,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2443 | 0x66,0x02,0x62,0x10,0x2b,0x10,0x43,0x00,0xbf,0x00,0x40,0x14,0x12,0x00,0x82,0x34, | ||
2444 | 0x00,0xf1,0x04,0x3c,0x01,0x00,0x82,0x34,0xc1,0x02,0x62,0x10,0x2b,0x10,0x43,0x00, | ||
2445 | 0xb7,0x01,0x40,0x14,0x02,0x00,0x82,0x34,0xe3,0xfe,0x64,0x14,0x00,0xf0,0x02,0x3c, | ||
2446 | 0xff,0x00,0x04,0x3c,0x00,0xff,0x84,0x34,0x24,0x10,0x04,0x02,0x02,0x8a,0x02,0x00, | ||
2447 | 0x80,0x1a,0x11,0x00,0x00,0xf4,0x63,0x24,0x94,0x00,0x82,0x36,0x00,0x00,0x51,0xa4, | ||
2448 | 0x26,0xb0,0x04,0x3c,0x42,0x89,0x03,0x00,0x98,0x00,0x86,0x36,0xff,0x01,0x02,0x24, | ||
2449 | 0x10,0x00,0x03,0x24,0x9a,0x00,0x85,0x36,0x00,0x00,0xa2,0xa4,0x7c,0x00,0x89,0x34, | ||
2450 | 0x00,0x00,0xc3,0xa4,0x01,0x00,0x02,0x24,0x04,0x00,0x03,0x24,0x96,0x00,0x87,0x36, | ||
2451 | 0x7a,0x00,0x84,0x34,0xb0,0x03,0x88,0x36,0x25,0xb0,0x06,0x3c,0x00,0x00,0xe2,0xa4, | ||
2452 | 0x44,0x00,0xc6,0x34,0x00,0x00,0x83,0xa0,0x00,0x00,0x11,0xad,0x00,0x00,0x31,0xa5, | ||
2453 | 0x00,0x00,0xc3,0x94,0xff,0xfd,0x02,0x24,0x24,0x18,0x62,0x00,0x00,0x00,0xc3,0xa4, | ||
2454 | 0x00,0x00,0xc2,0x94,0x00,0x00,0x00,0x00,0x00,0x02,0x42,0x34,0x00,0x00,0xc2,0xa4, | ||
2455 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2456 | 0x65,0x01,0x67,0x10,0x2b,0x10,0xe3,0x00,0xc5,0x00,0x40,0x14,0x02,0x00,0xe2,0x34, | ||
2457 | 0x07,0x00,0xa2,0x34,0xfc,0x02,0x62,0x10,0x2b,0x10,0x62,0x00,0xa9,0x01,0x40,0x14, | ||
2458 | 0x20,0x00,0xa2,0x34,0xb0,0xfe,0x62,0x14,0x00,0xf0,0x02,0x3c,0xff,0x00,0x03,0x3c, | ||
2459 | 0x00,0xff,0x63,0x34,0x24,0x10,0x03,0x02,0x02,0x3a,0x02,0x00,0x80,0x04,0xe0,0x10, | ||
2460 | 0x02,0x80,0x04,0x3c,0x05,0x00,0x02,0x24,0xc2,0xfe,0xe2,0x14,0xc0,0x02,0x82,0x36, | ||
2461 | 0x02,0x80,0x06,0x3c,0x8f,0x7d,0xc2,0x90,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf, | ||
2462 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2463 | 0x2e,0x02,0x62,0x10,0x2b,0x10,0x43,0x00,0x98,0x00,0x40,0x14,0x0e,0x00,0xc2,0x34, | ||
2464 | 0x01,0x00,0xc2,0x34,0xab,0x03,0x62,0x10,0x2b,0x10,0x43,0x00,0x48,0x01,0x40,0x14, | ||
2465 | 0x00,0xff,0x02,0x3c,0x94,0xfe,0x66,0x14,0x00,0xf0,0x02,0x3c,0x5b,0x4e,0x00,0x0c, | ||
2466 | 0x21,0x20,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2467 | 0x00,0x00,0x00,0x00,0x4c,0x02,0x62,0x10,0x2b,0x10,0x43,0x00,0xa6,0x00,0x40,0x14, | ||
2468 | 0xa1,0x00,0xe2,0x34,0x22,0x00,0xe2,0x34,0xbd,0x02,0x62,0x10,0x2b,0x10,0x62,0x00, | ||
2469 | 0x88,0x01,0x40,0x14,0x00,0x20,0x02,0x3c,0x28,0x00,0xe2,0x34,0x82,0xfe,0x62,0x14, | ||
2470 | 0x00,0xf0,0x02,0x3c,0x0f,0x00,0x04,0x3c,0xff,0xff,0x85,0x34,0x60,0x00,0x06,0x24, | ||
2471 | 0xba,0x44,0x00,0x0c,0x24,0x00,0x04,0x24,0x84,0x0a,0x00,0x0c,0xe8,0x03,0x04,0x24, | ||
2472 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
2473 | 0x0f,0x00,0x06,0x3c,0x24,0x00,0x04,0x24,0xdd,0x44,0x00,0x0c,0xff,0xff,0xc5,0x34, | ||
2474 | 0x1f,0x00,0x51,0x30,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
2475 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0xc0,0x02,0x82,0x36,0x00,0x00,0xd1,0xa3, | ||
2476 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x18,0x02,0xc2,0x10, | ||
2477 | 0x2b,0x10,0x46,0x00,0x01,0x01,0x40,0x14,0x00,0xa0,0x02,0x3c,0x00,0x60,0x02,0x3c, | ||
2478 | 0x04,0x00,0xc2,0x10,0x80,0x10,0x08,0x00,0x7a,0xfe,0xc5,0x14,0xc0,0x02,0x82,0x36, | ||
2479 | 0x80,0x10,0x08,0x00,0x21,0x10,0x48,0x00,0x21,0x10,0x53,0x00,0x21,0x10,0x49,0x00, | ||
2480 | 0xc1,0x43,0x44,0xa0,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2481 | 0x00,0x00,0x00,0x00,0x3f,0x03,0x62,0x10,0x2b,0x10,0x62,0x00,0xb6,0x02,0x40,0x14, | ||
2482 | 0xad,0x00,0xe2,0x34,0xc7,0x03,0x62,0x10,0xae,0x00,0xe2,0x34,0x4e,0xfe,0x62,0x14, | ||
2483 | 0x00,0xf0,0x02,0x3c,0xff,0x00,0x02,0x3c,0x24,0x20,0x02,0x02,0x00,0xff,0x05,0x32, | ||
2484 | 0x02,0x24,0x04,0x00,0x69,0x4f,0x00,0x0c,0x02,0x2a,0x05,0x00,0x00,0x00,0xc2,0xa3, | ||
2485 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2486 | 0x4b,0x02,0x62,0x10,0x2b,0x10,0x62,0x00,0x17,0x01,0x40,0x14,0x03,0x00,0xa2,0x34, | ||
2487 | 0x82,0x03,0x62,0x10,0x08,0x00,0xa2,0x34,0x3b,0xfe,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2488 | 0x00,0xff,0x02,0x32,0x02,0x82,0x02,0x00,0xcc,0x02,0x83,0x36,0x00,0x00,0x70,0xac, | ||
2489 | 0x12,0x04,0x00,0x12,0x01,0x00,0x02,0x24,0x9c,0x04,0x02,0x12,0x00,0x00,0x00,0x00, | ||
2490 | 0x7a,0x42,0x00,0x0c,0x21,0x20,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2491 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x4e,0x02,0x62,0x10,0x2b,0x10,0x62,0x00, | ||
2492 | 0xe4,0x00,0x40,0x14,0x00,0xff,0x02,0x32,0x13,0x00,0x82,0x34,0x4c,0x03,0x62,0x10, | ||
2493 | 0x14,0x00,0x82,0x34,0x24,0xfe,0x62,0x14,0x00,0xf0,0x02,0x3c,0xd3,0x0a,0x00,0x0c, | ||
2494 | 0xfd,0x00,0x04,0x24,0x10,0x10,0x03,0x3c,0xa0,0x00,0x82,0x36,0x10,0x10,0x63,0x34, | ||
2495 | 0x00,0xc0,0x07,0x3c,0x25,0xb0,0x06,0x3c,0x00,0x00,0x43,0xac,0xa4,0x00,0x84,0x36, | ||
2496 | 0x00,0xa1,0xe7,0x34,0xa8,0x00,0xc6,0x34,0xc0,0x02,0x82,0x36,0x00,0x00,0x80,0xac, | ||
2497 | 0x00,0x00,0xc7,0xac,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2498 | 0x60,0x02,0x62,0x10,0x2b,0x10,0x62,0x00,0xf6,0x00,0x40,0x14,0x03,0x00,0xa2,0x34, | ||
2499 | 0x4b,0x03,0x62,0x10,0x04,0x00,0xa2,0x34,0x0b,0xfe,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2500 | 0xf4,0x63,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36, | ||
2501 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x61,0x02,0x62,0x10, | ||
2502 | 0x2b,0x10,0x62,0x00,0xfe,0x00,0x40,0x14,0x01,0x00,0x02,0x24,0x0f,0x00,0xc2,0x34, | ||
2503 | 0x63,0x03,0x62,0x10,0x10,0x00,0xc2,0x34,0xfb,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2504 | 0x00,0xff,0x03,0x32,0x00,0xff,0x02,0x34,0x9d,0x03,0x62,0x10,0xc0,0x02,0x82,0x36, | ||
2505 | 0x8c,0x65,0x60,0xae,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2506 | 0x47,0x02,0x62,0x10,0x2b,0x10,0x62,0x00,0x02,0x01,0x40,0x14,0x03,0x00,0xe2,0x34, | ||
2507 | 0x8d,0x03,0x62,0x10,0x04,0x00,0xe2,0x34,0xeb,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2508 | 0x1e,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2509 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x9b,0x01,0x62,0x10,0x2b,0x10,0x43,0x00, | ||
2510 | 0xcf,0x00,0x40,0x14,0xa2,0x00,0xe2,0x34,0xa0,0x00,0xe2,0x34,0xde,0xfd,0x62,0x14, | ||
2511 | 0x00,0xf0,0x02,0x3c,0x00,0x0f,0x02,0x32,0x02,0x22,0x02,0x00,0x01,0x00,0x03,0x24, | ||
2512 | 0x3c,0x04,0x83,0x10,0x02,0x00,0x02,0x24,0x34,0x04,0x82,0x10,0x03,0x00,0x02,0x24, | ||
2513 | 0x46,0x03,0x82,0x10,0x00,0x00,0x00,0x00,0xde,0x4f,0x00,0x0c,0x21,0x20,0x00,0x00, | ||
2514 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2515 | 0x46,0x02,0x62,0x10,0x2b,0x10,0x62,0x00,0xe6,0xfd,0x40,0x14,0xc0,0x02,0x82,0x36, | ||
2516 | 0x18,0x00,0xe2,0x34,0x45,0x03,0x62,0x10,0x19,0x00,0xe2,0x34,0xc6,0xfd,0x62,0x14, | ||
2517 | 0x00,0xf0,0x02,0x3c,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x94,0x0e,0x83,0x36, | ||
2518 | 0x9c,0x0e,0x82,0x36,0xa4,0x0e,0x84,0x36,0xac,0x0e,0x87,0x36,0x00,0x00,0x65,0x8c, | ||
2519 | 0x00,0x00,0x48,0x8c,0x00,0x00,0x8a,0x8c,0x00,0x00,0xe6,0x8c,0x02,0x80,0x07,0x3c, | ||
2520 | 0x68,0x15,0xed,0x24,0xb4,0x0e,0x82,0x36,0x00,0x00,0x47,0x8c,0x0c,0x40,0xa3,0x8d, | ||
2521 | 0xff,0x03,0x02,0x3c,0x10,0x40,0xa4,0x8d,0x24,0x28,0xa2,0x00,0x24,0x30,0xc2,0x00, | ||
2522 | 0xbc,0x0e,0x82,0x36,0x00,0x00,0x4b,0x8c,0x00,0xfc,0x02,0x24,0x02,0x2c,0x05,0x00, | ||
2523 | 0x24,0x18,0x62,0x00,0x02,0x34,0x06,0x00,0x24,0x20,0x82,0x00,0xc4,0x0e,0x82,0x36, | ||
2524 | 0x25,0x18,0x65,0x00,0x25,0x20,0x86,0x00,0x00,0x00,0x45,0x8c,0xff,0x03,0x06,0x3c, | ||
2525 | 0xf0,0xff,0x02,0x3c,0xff,0x03,0x42,0x34,0x24,0x38,0xe6,0x00,0x82,0x39,0x07,0x00, | ||
2526 | 0x24,0x20,0x82,0x00,0x24,0x40,0x06,0x01,0x08,0x40,0xa9,0x8d,0x25,0x20,0x87,0x00, | ||
2527 | 0xcc,0x0e,0x8c,0x36,0xff,0x03,0x07,0x3c,0x00,0x00,0x86,0x8d,0x24,0x18,0x62,0x00, | ||
2528 | 0x24,0x50,0x47,0x01,0x24,0x58,0x67,0x01,0x82,0x41,0x08,0x00,0xff,0x9f,0x02,0x3c, | ||
2529 | 0x0f,0xc0,0x07,0x3c,0xff,0xff,0xe7,0x34,0xff,0xff,0x42,0x34,0x25,0x18,0x68,0x00, | ||
2530 | 0x24,0x48,0x22,0x01,0x24,0x18,0x67,0x00,0xff,0x03,0x02,0x3c,0x24,0x20,0x87,0x00, | ||
2531 | 0xff,0x00,0x07,0x3c,0x24,0x28,0xa2,0x00,0x24,0x30,0xc2,0x00,0x00,0x51,0x0a,0x00, | ||
2532 | 0x00,0x20,0x02,0x3c,0x00,0x59,0x0b,0x00,0x00,0xff,0xe7,0x34,0x25,0x48,0x22,0x01, | ||
2533 | 0x25,0x18,0x6a,0x00,0x25,0x20,0x8b,0x00,0x02,0x2c,0x05,0x00,0x02,0x34,0x06,0x00, | ||
2534 | 0x24,0x10,0x07,0x02,0x08,0x40,0xa9,0xad,0x0c,0x40,0xa3,0xad,0x10,0x40,0xa4,0xad, | ||
2535 | 0x14,0x40,0xa5,0xa5,0x4e,0x03,0x40,0x10,0x16,0x40,0xa6,0xa5,0xff,0x00,0x02,0x3c, | ||
2536 | 0x24,0x10,0x02,0x02,0x02,0x14,0x02,0x00,0x02,0x1a,0x10,0x00,0xc7,0x42,0xa2,0xa1, | ||
2537 | 0xc3,0x42,0xa3,0xa1,0xc3,0x42,0x62,0x92,0x25,0xb0,0x03,0x3c,0x61,0x0c,0x63,0x34, | ||
2538 | 0x10,0x00,0xa4,0x27,0x00,0x00,0x62,0xa0,0x7a,0x54,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2539 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2540 | 0x95,0x00,0xc2,0x10,0x00,0x40,0x02,0x3c,0x09,0xff,0xc2,0x10,0xc0,0x02,0x82,0x36, | ||
2541 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x7b,0x02,0xc2,0x10, | ||
2542 | 0x2b,0x10,0x46,0x00,0x83,0x00,0x40,0x14,0x00,0xb0,0x02,0x3c,0x00,0x90,0x02,0x3c, | ||
2543 | 0x78,0xfd,0xc2,0x14,0xc0,0x02,0x82,0x36,0x21,0x10,0x13,0x01,0x73,0x44,0x44,0xa0, | ||
2544 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2545 | 0x55,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c,0x6a,0x56,0x00,0x0c,0x21,0x20,0x00,0x02, | ||
2546 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2547 | 0x07,0x00,0x42,0x34,0x4c,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c,0x5b,0x4e,0x00,0x0c, | ||
2548 | 0x07,0x00,0x04,0x24,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2549 | 0x00,0x00,0x00,0x00,0x02,0x1a,0x02,0x00,0x21,0x88,0x00,0x00,0xaf,0x4a,0x00,0x08, | ||
2550 | 0x27,0xb0,0x06,0x3c,0x01,0x00,0x31,0x26,0x00,0x01,0x22,0x2e,0x08,0x00,0x40,0x10, | ||
2551 | 0xff,0x00,0x22,0x2e,0x00,0x00,0xc2,0x94,0x00,0x00,0x00,0x00,0xff,0x00,0x42,0x30, | ||
2552 | 0xf8,0xff,0x43,0x14,0x08,0x00,0xc6,0x24,0x00,0x00,0xd1,0xa7,0xff,0x00,0x22,0x2e, | ||
2553 | 0x50,0xfd,0x40,0x14,0xc0,0x02,0x82,0x36,0x12,0x87,0x02,0x3c,0x00,0x00,0xc2,0xaf, | ||
2554 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2555 | 0x2d,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2556 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xff,0x00,0x03,0x3c,0x00,0xff,0x63,0x34, | ||
2557 | 0x24,0x10,0x03,0x02,0x02,0x82,0x02,0x00,0xcc,0x02,0x83,0x36,0x00,0x00,0x70,0xac, | ||
2558 | 0x00,0x00,0xd1,0x8f,0x21,0x10,0x14,0x02,0x00,0x00,0x51,0xac,0x00,0x00,0x51,0x8c, | ||
2559 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xd1,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2560 | 0x00,0x00,0x00,0x00,0x00,0x64,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf, | ||
2561 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2562 | 0xf4,0x02,0x62,0x10,0xa3,0x00,0xe2,0x34,0x0f,0xfd,0x62,0x14,0x00,0xf0,0x02,0x3c, | ||
2563 | 0xc0,0x02,0x82,0x36,0x8c,0x65,0x60,0xae,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2564 | 0x00,0x00,0x00,0x00,0xec,0x63,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf, | ||
2565 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2566 | 0xe6,0x63,0x62,0xa6,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2567 | 0x00,0x00,0x00,0x00,0x08,0x40,0x63,0x8e,0xff,0x9f,0x07,0x3c,0xff,0xff,0xe7,0x34, | ||
2568 | 0x02,0x2c,0x10,0x00,0x00,0x1f,0x04,0x32,0x24,0x18,0x67,0x00,0x25,0x18,0x62,0x00, | ||
2569 | 0x02,0x8a,0x04,0x00,0x3f,0x00,0xa5,0x30,0xc0,0x02,0x82,0x36,0x08,0x40,0x63,0xae, | ||
2570 | 0xbc,0x42,0x71,0xa2,0xc1,0x42,0x65,0xa2,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2571 | 0x00,0x00,0x00,0x00,0x00,0x00,0xe2,0x92,0x00,0x00,0x00,0x00,0xfa,0x00,0x42,0x30, | ||
2572 | 0x00,0x00,0xe2,0xa2,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2573 | 0x00,0x00,0x00,0x00,0x00,0x00,0xe2,0x92,0x00,0x00,0x00,0x00,0xfd,0x00,0x42,0x30, | ||
2574 | 0x00,0x00,0xe2,0xa2,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2575 | 0x00,0x00,0x00,0x00,0xf7,0xfc,0xc2,0x14,0xc0,0x02,0x82,0x36,0x80,0x10,0x08,0x00, | ||
2576 | 0x21,0x10,0x53,0x00,0x60,0x45,0x43,0xac,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2577 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x80,0x10,0x08,0x00,0x21,0x10,0x48,0x00, | ||
2578 | 0x21,0x10,0x53,0x00,0x21,0x10,0x49,0x00,0x34,0x43,0x44,0xa0,0xc0,0x02,0x82,0x36, | ||
2579 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x77,0x56,0x00,0x0c, | ||
2580 | 0x21,0x20,0x00,0x02,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2581 | 0x00,0x00,0x00,0x00,0xff,0xff,0x02,0x34,0x8c,0x65,0x62,0xae,0xc0,0x02,0x82,0x36, | ||
2582 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x07,0x0b,0x00,0x0c, | ||
2583 | 0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2584 | 0x00,0x00,0x00,0x00,0xf0,0x63,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf, | ||
2585 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2586 | 0x08,0x40,0x62,0x8e,0xff,0x9f,0x03,0x3c,0xff,0xff,0x63,0x34,0x24,0x10,0x43,0x00, | ||
2587 | 0x08,0x40,0x62,0xae,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2588 | 0x00,0x00,0x00,0x00,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
2589 | 0x00,0x60,0x81,0x40,0x22,0x51,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x60,0x01,0x40, | ||
2590 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2591 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xff,0x00,0x07,0x3c,0x00,0xff,0xe7,0x34, | ||
2592 | 0x24,0x10,0x07,0x02,0x02,0x82,0x02,0x00,0xcc,0x02,0x43,0x36,0x00,0x00,0x70,0xac, | ||
2593 | 0x21,0x10,0x12,0x02,0x00,0x00,0x51,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0xaf, | ||
2594 | 0x00,0x00,0x51,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2595 | 0x00,0x00,0x00,0x00,0xb7,0x4f,0x00,0x0c,0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36, | ||
2596 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x21,0x88,0x00,0x00, | ||
2597 | 0x6c,0x4b,0x00,0x08,0x27,0xb0,0x04,0x3c,0x01,0x00,0x31,0x26,0x00,0x01,0x22,0x2e, | ||
2598 | 0x0a,0x00,0x40,0x10,0xff,0x00,0x22,0x2e,0x00,0x00,0x83,0x94,0x00,0x00,0x00,0x00, | ||
2599 | 0xff,0xff,0x67,0x30,0xff,0x00,0xe2,0x30,0xf0,0x00,0x42,0x28,0xf6,0xff,0x40,0x14, | ||
2600 | 0x08,0x00,0x84,0x24,0x00,0x00,0xc7,0xa7,0xff,0x00,0x22,0x2e,0x91,0xfc,0x40,0x14, | ||
2601 | 0xc0,0x02,0x82,0x36,0x12,0x87,0x02,0x3c,0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36, | ||
2602 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xe4,0x63,0x62,0x96, | ||
2603 | 0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xa7,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2604 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x04,0x64,0x62,0x92,0x00,0x00,0x00,0x00, | ||
2605 | 0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2606 | 0x00,0x00,0x00,0x00,0x00,0xff,0x02,0x32,0x02,0x12,0x02,0x00,0x03,0x00,0x43,0x2c, | ||
2607 | 0x02,0x00,0x60,0x10,0x00,0x00,0x00,0x00,0x02,0x40,0x62,0xa2,0x02,0x40,0x63,0x92, | ||
2608 | 0x90,0x0c,0x42,0x36,0x00,0x00,0x43,0xa0,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2609 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xd7,0x56,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2610 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2611 | 0x21,0x10,0x13,0x01,0x56,0x44,0x44,0xa0,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2612 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xff,0x00,0x03,0x3c,0x24,0x20,0x03,0x02, | ||
2613 | 0x73,0x0e,0x00,0x0c,0x02,0x24,0x04,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2614 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x02,0x1c,0x10,0x00,0x00,0x1f,0x02,0x32, | ||
2615 | 0x02,0x8a,0x02,0x00,0x3f,0x00,0x65,0x30,0xc1,0x42,0x65,0xa2,0xbc,0x42,0x71,0xa2, | ||
2616 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
2617 | 0x1f,0x12,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf,0x00,0x60,0x01,0x40, | ||
2618 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x03,0x40,0x62,0x92,0x0e,0x0c,0x44,0x36, | ||
2619 | 0x01,0x00,0x42,0x24,0xff,0x00,0x43,0x30,0x00,0x00,0x83,0xa0,0x03,0x40,0x62,0xa2, | ||
2620 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2621 | 0x00,0xff,0x02,0x32,0x02,0x3a,0x02,0x00,0x1a,0x01,0xe0,0x10,0x4f,0x00,0x82,0x36, | ||
2622 | 0x94,0x00,0x42,0x36,0x00,0x00,0x43,0x94,0xff,0xff,0xe2,0x24,0xb0,0x03,0x45,0x36, | ||
2623 | 0xff,0xff,0x71,0x30,0x1b,0x00,0x27,0x02,0x02,0x00,0xe0,0x14,0x00,0x00,0x00,0x00, | ||
2624 | 0x0d,0x00,0x07,0x00,0xff,0xff,0x47,0x30,0x00,0x00,0xb1,0xac,0x80,0xff,0x02,0x24, | ||
2625 | 0x00,0x19,0x07,0x00,0x25,0x18,0x62,0x00,0x4f,0x00,0x44,0x36,0x9e,0x00,0x46,0x36, | ||
2626 | 0x00,0x00,0xa7,0xac,0x00,0x00,0x83,0xa0,0x25,0xb0,0x04,0x3c,0x44,0x00,0x84,0x34, | ||
2627 | 0x12,0x88,0x00,0x00,0x80,0x12,0x11,0x00,0x00,0xfc,0x42,0x24,0x00,0x00,0xb1,0xac, | ||
2628 | 0x00,0x00,0xd1,0xa4,0x42,0x89,0x02,0x00,0x26,0xb0,0x02,0x3c,0x7c,0x00,0x42,0x34, | ||
2629 | 0x00,0x00,0xb1,0xac,0x00,0x00,0x51,0xa4,0x25,0xb0,0x02,0x3c,0x44,0x00,0x42,0x34, | ||
2630 | 0x00,0x00,0x43,0x94,0xff,0xfd,0x02,0x24,0x24,0x18,0x62,0x00,0x00,0x00,0x83,0xa4, | ||
2631 | 0x00,0x00,0x82,0x94,0x00,0x00,0x00,0x00,0x00,0x02,0x42,0x34,0x00,0x00,0x82,0xa4, | ||
2632 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2633 | 0x24,0x10,0x08,0x02,0xcc,0x02,0x43,0x36,0x00,0xff,0x04,0x32,0x02,0x3c,0x02,0x00, | ||
2634 | 0x00,0x00,0x70,0xac,0x04,0x00,0xe0,0x10,0x02,0x82,0x04,0x00,0x01,0x00,0x02,0x24, | ||
2635 | 0x02,0x00,0xe2,0x10,0x01,0x00,0x04,0x24,0x21,0x20,0x00,0x00,0x7a,0x42,0x00,0x0c, | ||
2636 | 0x00,0x00,0x00,0x00,0x0f,0x00,0x06,0x3c,0x21,0x20,0x00,0x02,0xdd,0x44,0x00,0x0c, | ||
2637 | 0xff,0xff,0xc5,0x34,0x0f,0x00,0x07,0x3c,0xff,0xff,0xe7,0x34,0x24,0x88,0x47,0x00, | ||
2638 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xd1,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2639 | 0x00,0x00,0x00,0x00,0x28,0xb0,0x02,0x3c,0x00,0x00,0x43,0x90,0xff,0x00,0x02,0x24, | ||
2640 | 0xff,0x00,0x70,0x30,0xf3,0xfb,0x02,0x12,0xc0,0x02,0x82,0x36,0x28,0xb0,0x05,0x3c, | ||
2641 | 0xff,0x00,0x04,0x24,0xc0,0x10,0x10,0x00,0x21,0x10,0x45,0x00,0x00,0x00,0x43,0x90, | ||
2642 | 0x00,0x00,0x00,0x00,0xff,0x00,0x70,0x30,0xfb,0xff,0x04,0x16,0xc0,0x10,0x10,0x00, | ||
2643 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2644 | 0x00,0x1f,0x02,0x32,0x02,0x1c,0x10,0x00,0x02,0x8a,0x02,0x00,0x3f,0x00,0x65,0x30, | ||
2645 | 0xc0,0x02,0x82,0x36,0xbc,0x42,0x71,0xa2,0xc1,0x42,0x65,0xa2,0x00,0x00,0x40,0xac, | ||
2646 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xff,0x00,0x07,0x3c,0x24,0x20,0x07,0x02, | ||
2647 | 0x15,0x51,0x00,0x0c,0x02,0x24,0x04,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2648 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xe8,0x63,0x62,0x92,0x00,0x00,0x00,0x00, | ||
2649 | 0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2650 | 0x00,0x00,0x00,0x00,0xfc,0x63,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf, | ||
2651 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2652 | 0x00,0x00,0xe2,0x92,0x00,0x00,0x00,0x00,0xff,0x00,0x51,0x30,0x05,0x00,0x23,0x36, | ||
2653 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xe3,0xa2,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2654 | 0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36,0xe6,0x63,0x60,0xa6,0x00,0x00,0x40,0xac, | ||
2655 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xbd,0x56,0x00,0x0c,0x21,0x20,0x00,0x02, | ||
2656 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2657 | 0x41,0x0b,0x00,0x0c,0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2658 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0xe2,0x92,0x00,0x00,0x00,0x00, | ||
2659 | 0xff,0x00,0x51,0x30,0x02,0x00,0x23,0x36,0xc0,0x02,0x82,0x36,0x00,0x00,0xe3,0xa2, | ||
2660 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c, | ||
2661 | 0xec,0x91,0x42,0x24,0x00,0x00,0x47,0x8c,0xc0,0x02,0x43,0x36,0x25,0xb0,0x0c,0x3c, | ||
2662 | 0x08,0x40,0xe4,0x8c,0x00,0x00,0x60,0xac,0x42,0x17,0x04,0x00,0x03,0x00,0x42,0x30, | ||
2663 | 0x60,0x00,0x40,0x14,0x03,0x0d,0x42,0x36,0x00,0x00,0x45,0x90,0x10,0x40,0xe6,0x8c, | ||
2664 | 0xff,0x9f,0x03,0x3c,0xff,0xff,0x63,0x34,0xff,0x3f,0x02,0x3c,0x24,0x20,0x83,0x00, | ||
2665 | 0xff,0xff,0x42,0x34,0x00,0x20,0x03,0x3c,0x24,0x58,0xc2,0x00,0x25,0x20,0x83,0x00, | ||
2666 | 0x00,0x40,0x02,0x3c,0x70,0x00,0xa5,0x30,0x25,0x58,0x62,0x01,0x08,0x01,0xa0,0x10, | ||
2667 | 0x08,0x40,0xe4,0xac,0x94,0x0e,0x82,0x35,0x9c,0x0e,0x83,0x35,0xa4,0x0e,0x86,0x35, | ||
2668 | 0x00,0x00,0x45,0x8c,0xac,0x0e,0x87,0x35,0x00,0x00,0x68,0x8c,0x00,0x00,0xca,0x8c, | ||
2669 | 0x02,0x80,0x06,0x3c,0x00,0x00,0xe4,0x8c,0x68,0x15,0xc6,0x24,0x0c,0x40,0xc3,0x8c, | ||
2670 | 0xb4,0x0e,0x82,0x35,0x00,0x00,0x47,0x8c,0xff,0x03,0x02,0x3c,0x00,0xfc,0x06,0x24, | ||
2671 | 0x24,0x28,0xa2,0x00,0x24,0x20,0x82,0x00,0xbc,0x0e,0x82,0x35,0x00,0x00,0x49,0x8c, | ||
2672 | 0x02,0x2c,0x05,0x00,0x24,0x10,0x66,0x01,0x24,0x18,0x66,0x00,0x02,0x24,0x04,0x00, | ||
2673 | 0xc4,0x0e,0x86,0x35,0x25,0x18,0x65,0x00,0x25,0x10,0x44,0x00,0x00,0x00,0xc5,0x8c, | ||
2674 | 0xff,0x03,0x04,0x3c,0xf0,0xff,0x06,0x3c,0xff,0x03,0xc6,0x34,0x24,0x38,0xe4,0x00, | ||
2675 | 0xcc,0x0e,0x8b,0x35,0x24,0x40,0x04,0x01,0x82,0x39,0x07,0x00,0x00,0x00,0x64,0x8d, | ||
2676 | 0x24,0x10,0x46,0x00,0x24,0x18,0x66,0x00,0x25,0x10,0x47,0x00,0x82,0x41,0x08,0x00, | ||
2677 | 0xff,0x03,0x07,0x3c,0x0f,0xc0,0x06,0x3c,0x24,0x50,0x47,0x01,0x24,0x48,0x27,0x01, | ||
2678 | 0xff,0xff,0xc6,0x34,0x25,0x18,0x68,0x00,0x24,0x28,0xa7,0x00,0x24,0x20,0x87,0x00, | ||
2679 | 0x00,0x51,0x0a,0x00,0x24,0x18,0x66,0x00,0x00,0x49,0x09,0x00,0x24,0x10,0x46,0x00, | ||
2680 | 0x02,0x80,0x07,0x3c,0x68,0x15,0xe7,0x24,0x25,0x18,0x6a,0x00,0x25,0x10,0x49,0x00, | ||
2681 | 0x02,0x2c,0x05,0x00,0x02,0x24,0x04,0x00,0x0c,0x40,0xe3,0xac,0x10,0x40,0xe2,0xac, | ||
2682 | 0x14,0x40,0xe5,0xa4,0x16,0x40,0xe4,0xa4,0x02,0x80,0x02,0x3c,0x68,0x15,0x43,0x24, | ||
2683 | 0x0c,0x40,0x62,0x8c,0x00,0x00,0x00,0x00,0xbd,0x00,0x40,0x04,0x00,0x00,0x00,0x00, | ||
2684 | 0x00,0xff,0x02,0x32,0xc6,0x00,0x40,0x10,0x00,0x00,0x00,0x00,0x02,0x12,0x02,0x00, | ||
2685 | 0xc3,0x42,0x62,0xa0,0x7a,0x54,0x00,0x0c,0x10,0x00,0xa4,0x27,0xc2,0x53,0x00,0x0c, | ||
2686 | 0x00,0x00,0x00,0x00,0x0c,0x40,0x62,0x8e,0x00,0x80,0x03,0x3c,0x25,0x10,0x43,0x00, | ||
2687 | 0x0c,0x40,0x62,0xae,0xc3,0x42,0x62,0x92,0x25,0xb0,0x03,0x3c,0x61,0x0c,0x63,0x34, | ||
2688 | 0x00,0x00,0x62,0xa0,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2689 | 0x00,0x00,0x00,0x00,0xcf,0x4e,0x00,0x0c,0x21,0x20,0x00,0x02,0xc0,0x02,0x82,0x36, | ||
2690 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x17,0x51,0x00,0x0c, | ||
2691 | 0x00,0x00,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2692 | 0x00,0x00,0x00,0x00,0x9e,0x00,0x83,0x36,0x00,0x00,0x40,0xa0,0x00,0x00,0x60,0xa4, | ||
2693 | 0x94,0x00,0x82,0x36,0x00,0x00,0x43,0x94,0x25,0xb0,0x06,0x3c,0x44,0x00,0xc6,0x34, | ||
2694 | 0xff,0xff,0x71,0x30,0x80,0x12,0x11,0x00,0x00,0xf8,0x42,0x24,0x42,0x89,0x02,0x00, | ||
2695 | 0x26,0xb0,0x02,0x3c,0xb0,0x03,0x83,0x36,0x7c,0x00,0x42,0x34,0x00,0x00,0x71,0xac, | ||
2696 | 0x00,0x00,0x51,0xa4,0x00,0x00,0xc3,0x94,0xff,0xfd,0x02,0x24,0x24,0x18,0x62,0x00, | ||
2697 | 0x00,0x00,0xc3,0xa4,0x00,0x00,0xc2,0x94,0x00,0x00,0x00,0x00,0x00,0x02,0x42,0x34, | ||
2698 | 0x00,0x00,0xc2,0xa4,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2699 | 0x00,0x00,0x00,0x00,0x5b,0x4e,0x00,0x0c,0x01,0x00,0x04,0x24,0xc0,0x02,0x82,0x36, | ||
2700 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x80,0x10,0x08,0x00, | ||
2701 | 0x21,0x10,0x53,0x00,0xec,0x44,0x43,0xac,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2702 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xa7,0x0b,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2703 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2704 | 0x28,0xb0,0x11,0x3c,0x00,0x00,0x22,0x96,0xff,0x00,0x04,0x3c,0x24,0x18,0x04,0x02, | ||
2705 | 0x02,0x24,0x03,0x00,0xff,0x00,0x42,0x30,0x0a,0x00,0x82,0x10,0xff,0x7f,0x02,0x3c, | ||
2706 | 0x08,0x00,0x31,0x26,0x00,0x00,0x22,0x96,0xff,0xff,0x23,0x32,0xff,0x00,0x42,0x30, | ||
2707 | 0x03,0x00,0x82,0x10,0x00,0x08,0x63,0x2c,0xf9,0xff,0x60,0x14,0x00,0x00,0x00,0x00, | ||
2708 | 0xff,0x7f,0x02,0x3c,0xff,0xff,0x42,0x34,0x24,0x10,0x22,0x02,0x00,0x00,0xc2,0xaf, | ||
2709 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2710 | 0xf8,0x63,0x62,0x92,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36, | ||
2711 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xff,0x00,0x03,0x3c, | ||
2712 | 0x24,0x10,0x03,0x02,0x00,0xff,0x04,0x32,0xcc,0x02,0x83,0x36,0x02,0x3c,0x02,0x00, | ||
2713 | 0x00,0x00,0x70,0xac,0x04,0x00,0xe0,0x10,0x02,0x82,0x04,0x00,0x01,0x00,0x02,0x24, | ||
2714 | 0x02,0x00,0xe2,0x10,0x01,0x00,0x04,0x24,0x21,0x20,0x00,0x00,0x7a,0x42,0x00,0x0c, | ||
2715 | 0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x8f,0x0f,0x00,0x06,0x3c,0xff,0xff,0xc5,0x34, | ||
2716 | 0x21,0x20,0x00,0x02,0xba,0x44,0x00,0x0c,0x21,0x30,0x20,0x02,0x0f,0x00,0x07,0x3c, | ||
2717 | 0x21,0x20,0x00,0x02,0xdd,0x44,0x00,0x0c,0xff,0xff,0xe5,0x34,0x00,0x00,0xc2,0xaf, | ||
2718 | 0x21,0x88,0x40,0x00,0x25,0xb0,0x02,0x3c,0xc8,0x02,0x42,0x34,0x00,0x00,0x51,0xac, | ||
2719 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2720 | 0x25,0xb0,0x06,0x3c,0xff,0x00,0x02,0x24,0x56,0x01,0xc6,0x34,0x00,0x00,0xc2,0xa4, | ||
2721 | 0x01,0x00,0x03,0x24,0x02,0x80,0x07,0x3c,0xc0,0x02,0x82,0x36,0xb8,0x7d,0xe3,0xa0, | ||
2722 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xde,0x4f,0x00,0x0c, | ||
2723 | 0x03,0x00,0x04,0x24,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2724 | 0x00,0x00,0x00,0x00,0xde,0x4e,0x00,0x0c,0x21,0x20,0x00,0x02,0xc0,0x02,0x82,0x36, | ||
2725 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x40,0x62,0x8e, | ||
2726 | 0xff,0x9f,0x04,0x3c,0xff,0xff,0x84,0x34,0x24,0x10,0x44,0x00,0x08,0x40,0x62,0xae, | ||
2727 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2728 | 0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00, | ||
2729 | 0x80,0x10,0x02,0x00,0x21,0x10,0x53,0x00,0x70,0x51,0x43,0x8c,0xc0,0x02,0x82,0x36, | ||
2730 | 0x00,0x00,0xc3,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2731 | 0x7a,0x54,0x00,0x0c,0x10,0x00,0xa4,0x27,0xc3,0x42,0x62,0x92,0x25,0xb0,0x03,0x3c, | ||
2732 | 0x61,0x0c,0x63,0x34,0x00,0x00,0x62,0xa0,0xd4,0x4c,0x00,0x08,0xc0,0x02,0x82,0x36, | ||
2733 | 0x22,0x51,0x00,0x0c,0x10,0x40,0xeb,0xac,0xbd,0x4c,0x00,0x08,0x02,0x80,0x02,0x3c, | ||
2734 | 0xc6,0x4c,0x00,0x08,0x12,0x00,0x02,0x24,0x1a,0x57,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
2735 | 0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2736 | 0xff,0xff,0x02,0x34,0x8c,0x65,0x62,0xae,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac, | ||
2737 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00, | ||
2738 | 0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x53,0x00, | ||
2739 | 0x74,0x51,0x43,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc3,0xaf,0x00,0x00,0x40,0xac, | ||
2740 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00, | ||
2741 | 0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x53,0x00, | ||
2742 | 0xd4,0x51,0x43,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc3,0xaf,0x00,0x00,0x40,0xac, | ||
2743 | 0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00, | ||
2744 | 0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x02,0x80,0x06,0x3c,0x80,0x10,0x02,0x00, | ||
2745 | 0xe0,0x66,0xc3,0x24,0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c,0xc0,0x02,0x82,0x36, | ||
2746 | 0x00,0x00,0xc4,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00, | ||
2747 | 0x12,0x00,0x02,0x24,0xc7,0x42,0xa2,0xa1,0x77,0x4a,0x00,0x08,0xc3,0x42,0xa2,0xa1, | ||
2748 | 0x88,0x7d,0x82,0x94,0x00,0x00,0x00,0x00,0x00,0x00,0xc2,0xaf,0xc0,0x02,0x82,0x36, | ||
2749 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x7a,0x42,0x00,0x0c, | ||
2750 | 0x21,0x20,0x00,0x00,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2751 | 0x00,0x00,0x00,0x00,0xff,0x00,0x06,0x3c,0x00,0xff,0xc6,0x34,0x00,0x00,0xc5,0x8f, | ||
2752 | 0x24,0x20,0x06,0x02,0xe1,0x50,0x00,0x0c,0x02,0x22,0x04,0x00,0xc0,0x02,0x82,0x36, | ||
2753 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00, | ||
2754 | 0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x02,0x80,0x07,0x3c, | ||
2755 | 0x80,0x10,0x02,0x00,0xf0,0x66,0xe3,0x24,0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c, | ||
2756 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2757 | 0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00, | ||
2758 | 0x21,0x10,0x43,0x00,0x02,0x80,0x06,0x3c,0x80,0x10,0x02,0x00,0xec,0x66,0xc3,0x24, | ||
2759 | 0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf, | ||
2760 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00, | ||
2761 | 0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x02,0x80,0x04,0x3c, | ||
2762 | 0xe8,0x66,0x83,0x24,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c, | ||
2763 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2764 | 0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00, | ||
2765 | 0x21,0x10,0x43,0x00,0x02,0x80,0x07,0x3c,0x80,0x10,0x02,0x00,0xe4,0x66,0xe3,0x24, | ||
2766 | 0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf, | ||
2767 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00, | ||
2768 | 0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x02,0x80,0x04,0x3c, | ||
2769 | 0x00,0x67,0x83,0x24,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c, | ||
2770 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2771 | 0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00, | ||
2772 | 0x21,0x10,0x43,0x00,0x02,0x80,0x07,0x3c,0x80,0x10,0x02,0x00,0xfc,0x66,0xe3,0x24, | ||
2773 | 0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf, | ||
2774 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00, | ||
2775 | 0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00,0x02,0x80,0x06,0x3c, | ||
2776 | 0x80,0x10,0x02,0x00,0xf8,0x66,0xc3,0x24,0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c, | ||
2777 | 0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2778 | 0x00,0x00,0x00,0x00,0xc0,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x80,0x10,0x02,0x00, | ||
2779 | 0x21,0x10,0x43,0x00,0x02,0x80,0x04,0x3c,0xf4,0x66,0x83,0x24,0x80,0x10,0x02,0x00, | ||
2780 | 0x21,0x10,0x43,0x00,0x00,0x00,0x44,0x8c,0xc0,0x02,0x82,0x36,0x00,0x00,0xc4,0xaf, | ||
2781 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0xde,0x4f,0x00,0x0c, | ||
2782 | 0x02,0x00,0x04,0x24,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2783 | 0x00,0x00,0x00,0x00,0xde,0x4f,0x00,0x0c,0x01,0x00,0x04,0x24,0xc0,0x02,0x82,0x36, | ||
2784 | 0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08,0x00,0x00,0x00,0x00,0x7a,0x42,0x00,0x0c, | ||
2785 | 0x01,0x00,0x04,0x24,0xc0,0x02,0x82,0x36,0x00,0x00,0x40,0xac,0x08,0x48,0x00,0x08, | ||
2786 | 0x00,0x00,0x00,0x00,0x25,0xb0,0x05,0x3c,0x01,0x00,0x06,0x24,0x01,0x80,0x02,0x3c, | ||
2787 | 0x04,0x30,0x86,0x00,0xf1,0x02,0xa7,0x34,0xed,0x02,0xa4,0x34,0x6c,0x39,0x42,0x24, | ||
2788 | 0x18,0x03,0xa5,0x34,0x08,0x00,0x03,0x24,0x00,0x00,0xa2,0xac,0x00,0x00,0xe3,0xa0, | ||
2789 | 0x00,0x00,0x80,0xa0,0x00,0x00,0x86,0xa0,0x00,0x00,0x80,0xa0,0x00,0x00,0x86,0xa0, | ||
2790 | 0x00,0x00,0x80,0xa0,0x00,0x00,0x86,0xa0,0x00,0x00,0x80,0xa0,0x00,0x00,0x86,0xa0, | ||
2791 | 0x00,0x00,0x80,0xa0,0x00,0x00,0xe0,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2792 | 0x01,0x80,0x02,0x3c,0x25,0xb0,0x03,0x3c,0xc8,0x39,0x42,0x24,0x18,0x03,0x63,0x34, | ||
2793 | 0x00,0x00,0x62,0xac,0x00,0x00,0x83,0x90,0x30,0x00,0x02,0x24,0x05,0x00,0x62,0x10, | ||
2794 | 0x21,0x20,0x00,0x00,0x31,0x00,0x02,0x24,0x02,0x00,0x62,0x10,0x01,0x00,0x04,0x24, | ||
2795 | 0x07,0x00,0x04,0x24,0x5b,0x4e,0x00,0x08,0x00,0x00,0x00,0x00,0x01,0x80,0x02,0x3c, | ||
2796 | 0x25,0xb0,0x03,0x3c,0x04,0x3a,0x42,0x24,0x18,0x03,0x63,0x34,0x02,0x80,0x04,0x3c, | ||
2797 | 0x00,0x00,0x62,0xac,0x08,0x00,0xe0,0x03,0xc4,0x7d,0x80,0xac,0x02,0x80,0x02,0x3c, | ||
2798 | 0x08,0x7b,0x42,0x24,0xc0,0x20,0x04,0x00,0x21,0x20,0x82,0x00,0x21,0x28,0x00,0x00, | ||
2799 | 0x00,0x60,0x06,0x40,0x01,0x00,0xc1,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40, | ||
2800 | 0x00,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x09,0x00,0x44,0x10,0x00,0x00,0x00,0x00, | ||
2801 | 0x04,0x00,0x43,0x8c,0x21,0x28,0x40,0x00,0x00,0x00,0x42,0x8c,0x00,0x00,0x00,0x00, | ||
2802 | 0x00,0x00,0x62,0xac,0x04,0x00,0x43,0xac,0x00,0x00,0xa5,0xac,0x04,0x00,0xa5,0xac, | ||
2803 | 0x00,0x60,0x86,0x40,0x08,0x00,0xe0,0x03,0x21,0x10,0xa0,0x00,0x21,0x18,0x80,0x00, | ||
2804 | 0xe8,0xff,0xbd,0x27,0x01,0x01,0x62,0x2c,0x10,0x00,0xbf,0xaf,0x01,0x00,0x04,0x24, | ||
2805 | 0x01,0x02,0x65,0x2c,0x0a,0x00,0x40,0x14,0x21,0x30,0x00,0x00,0x02,0x00,0x04,0x24, | ||
2806 | 0x07,0x00,0xa0,0x14,0x01,0x08,0x62,0x2c,0x05,0x00,0x40,0x14,0x03,0x00,0x04,0x24, | ||
2807 | 0x10,0x00,0xbf,0x8f,0x21,0x10,0xc0,0x00,0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27, | ||
2808 | 0x89,0x4e,0x00,0x0c,0x00,0x00,0x00,0x00,0x10,0x00,0xbf,0x8f,0x21,0x30,0x40,0x00, | ||
2809 | 0x21,0x10,0xc0,0x00,0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27,0x02,0x80,0x03,0x3c, | ||
2810 | 0x20,0x7b,0x62,0x8c,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x00,0x60,0x06,0x40, | ||
2811 | 0x01,0x00,0xc1,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x10,0x00,0x83,0x8c, | ||
2812 | 0x02,0x80,0x02,0x3c,0x08,0x7b,0x42,0x24,0xc0,0x18,0x03,0x00,0x21,0x18,0x62,0x00, | ||
2813 | 0x00,0x00,0x65,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0x85,0xac,0x04,0x00,0xa4,0xac, | ||
2814 | 0x00,0x00,0x64,0xac,0x04,0x00,0x83,0xac,0x00,0x60,0x86,0x40,0x08,0x00,0xe0,0x03, | ||
2815 | 0x00,0x00,0x00,0x00,0x02,0x24,0x04,0x00,0xff,0x00,0x84,0x30,0xc0,0x18,0x04,0x00, | ||
2816 | 0x21,0x18,0x64,0x00,0x80,0x18,0x03,0x00,0x21,0x18,0x64,0x00,0x02,0x80,0x02,0x3c, | ||
2817 | 0x68,0x15,0x42,0x24,0x80,0x18,0x03,0x00,0x21,0x18,0x62,0x00,0x78,0x51,0x64,0x8c, | ||
2818 | 0xff,0xf1,0x02,0x24,0x24,0x20,0x82,0x00,0x08,0x00,0xe0,0x03,0x78,0x51,0x64,0xac, | ||
2819 | 0x02,0x24,0x04,0x00,0xff,0x00,0x84,0x30,0xc0,0x18,0x04,0x00,0x21,0x18,0x64,0x00, | ||
2820 | 0x80,0x18,0x03,0x00,0x21,0x18,0x64,0x00,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24, | ||
2821 | 0x80,0x18,0x03,0x00,0x21,0x18,0x62,0x00,0x78,0x51,0x64,0x8c,0xff,0xf1,0x02,0x24, | ||
2822 | 0x24,0x20,0x82,0x00,0x00,0x02,0x84,0x34,0x08,0x00,0xe0,0x03,0x78,0x51,0x64,0xac, | ||
2823 | 0xe0,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0xc0,0x80,0x04,0x00,0x21,0x80,0x04,0x02, | ||
2824 | 0x80,0x80,0x10,0x00,0x21,0x80,0x04,0x02,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24, | ||
2825 | 0x80,0x80,0x10,0x00,0x21,0x80,0x02,0x02,0x1c,0x00,0xbf,0xaf,0x18,0x00,0xb2,0xaf, | ||
2826 | 0x14,0x00,0xb1,0xaf,0x78,0x51,0x05,0x8e,0xff,0x1f,0x02,0x3c,0x25,0xb0,0x12,0x3c, | ||
2827 | 0xff,0xff,0x42,0x34,0x70,0x51,0x02,0xae,0x84,0x01,0x43,0x36,0xf8,0xff,0x02,0x24, | ||
2828 | 0x00,0x00,0x66,0x8c,0x24,0x28,0xa2,0x00,0xff,0xfe,0x02,0x24,0x24,0x28,0xa2,0x00, | ||
2829 | 0xff,0xef,0x03,0x24,0x24,0x28,0xa3,0x00,0x74,0x51,0x06,0xae,0x78,0x51,0x05,0xae, | ||
2830 | 0xce,0x0d,0x00,0x0c,0x21,0x88,0x80,0x00,0x7a,0x51,0x02,0x92,0x21,0x88,0x32,0x02, | ||
2831 | 0x1c,0x00,0xbf,0x8f,0x60,0x01,0x22,0xa2,0x18,0x00,0xb2,0x8f,0x64,0x51,0x00,0xae, | ||
2832 | 0x48,0x51,0x00,0xae,0x4c,0x51,0x00,0xae,0x50,0x51,0x00,0xae,0x54,0x51,0x00,0xae, | ||
2833 | 0x58,0x51,0x00,0xae,0x5c,0x51,0x00,0xae,0x60,0x51,0x00,0xae,0x14,0x00,0xb1,0x8f, | ||
2834 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0xff,0x00,0xa5,0x30, | ||
2835 | 0xc0,0x10,0x05,0x00,0x21,0x10,0x45,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x45,0x00, | ||
2836 | 0x02,0x80,0x03,0x3c,0x68,0x15,0x63,0x24,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00, | ||
2837 | 0x78,0x51,0x43,0x8c,0x25,0xb0,0x05,0x3c,0xff,0x00,0xc6,0x30,0x21,0x30,0xc5,0x00, | ||
2838 | 0xaf,0x01,0xc2,0x90,0x07,0x00,0x63,0x30,0x80,0x18,0x03,0x00,0x21,0x18,0x65,0x00, | ||
2839 | 0xff,0x00,0x88,0x30,0xff,0x00,0x49,0x30,0x84,0x01,0x66,0x8c,0x21,0x50,0x00,0x00, | ||
2840 | 0x21,0x58,0x00,0x00,0x2b,0x00,0x20,0x11,0x21,0x20,0x00,0x01,0x2b,0x00,0xc0,0x10, | ||
2841 | 0x2b,0x10,0x09,0x01,0x21,0x28,0x00,0x00,0x3e,0x4f,0x00,0x08,0x01,0x00,0x07,0x24, | ||
2842 | 0xff,0x00,0x65,0x30,0x1d,0x00,0xa2,0x2c,0x07,0x00,0x40,0x10,0xff,0xff,0x02,0x25, | ||
2843 | 0x04,0x10,0xa7,0x00,0x24,0x10,0x46,0x00,0xf9,0xff,0x40,0x10,0x01,0x00,0xa3,0x24, | ||
2844 | 0x21,0x58,0xa0,0x00,0xff,0xff,0x02,0x25,0xff,0x00,0x45,0x30,0x2b,0x18,0xab,0x00, | ||
2845 | 0x0f,0x00,0x60,0x14,0x2b,0x10,0x49,0x01,0x01,0x00,0x04,0x24,0x04,0x10,0xa4,0x00, | ||
2846 | 0x24,0x10,0x46,0x00,0xff,0xff,0xa7,0x24,0x04,0x00,0x40,0x10,0x01,0x00,0x43,0x25, | ||
2847 | 0x17,0x00,0x49,0x11,0xff,0x00,0x6a,0x30,0x21,0x40,0xa0,0x00,0xff,0x00,0xe5,0x30, | ||
2848 | 0x2b,0x10,0xab,0x00,0xf6,0xff,0x40,0x10,0x04,0x10,0xa4,0x00,0x2b,0x10,0x49,0x01, | ||
2849 | 0x08,0x00,0x40,0x10,0x21,0x20,0x00,0x01,0x23,0x10,0x2a,0x01,0x2a,0x10,0x62,0x01, | ||
2850 | 0x04,0x00,0x40,0x14,0x21,0x20,0x00,0x00,0x23,0x10,0x69,0x01,0x21,0x10,0x4a,0x00, | ||
2851 | 0xff,0x00,0x44,0x30,0x08,0x00,0xe0,0x03,0x21,0x10,0x80,0x00,0xfd,0xff,0x40,0x14, | ||
2852 | 0x21,0x20,0x00,0x00,0x23,0x10,0x09,0x01,0x5f,0x4f,0x00,0x08,0xff,0x00,0x44,0x30, | ||
2853 | 0x21,0x20,0x00,0x01,0x08,0x00,0xe0,0x03,0x21,0x10,0x80,0x00,0xff,0x00,0x84,0x30, | ||
2854 | 0xc0,0x10,0x04,0x00,0x21,0x10,0x44,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x44,0x00, | ||
2855 | 0x02,0x80,0x03,0x3c,0x68,0x15,0x63,0x24,0x80,0x10,0x02,0x00,0x21,0x10,0x43,0x00, | ||
2856 | 0x25,0xb0,0x06,0x3c,0x78,0x51,0x43,0x8c,0xff,0x00,0xa5,0x30,0x21,0x20,0x86,0x00, | ||
2857 | 0x21,0x28,0xa6,0x00,0x60,0x01,0x82,0x90,0xaf,0x01,0xa4,0x90,0x07,0x00,0x63,0x30, | ||
2858 | 0x80,0x18,0x03,0x00,0x21,0x18,0x66,0x00,0xff,0x00,0x48,0x30,0xff,0x00,0x89,0x30, | ||
2859 | 0x84,0x01,0x66,0x8c,0x21,0x50,0x00,0x00,0x21,0x58,0x00,0x00,0x2b,0x00,0x20,0x11, | ||
2860 | 0x21,0x20,0x00,0x01,0x2b,0x00,0xc0,0x10,0x2b,0x10,0x09,0x01,0x21,0x28,0x00,0x00, | ||
2861 | 0x8c,0x4f,0x00,0x08,0x01,0x00,0x07,0x24,0xff,0x00,0x65,0x30,0x1d,0x00,0xa2,0x2c, | ||
2862 | 0x07,0x00,0x40,0x10,0xff,0xff,0x02,0x25,0x04,0x10,0xa7,0x00,0x24,0x10,0x46,0x00, | ||
2863 | 0xf9,0xff,0x40,0x10,0x01,0x00,0xa3,0x24,0x21,0x58,0xa0,0x00,0xff,0xff,0x02,0x25, | ||
2864 | 0xff,0x00,0x45,0x30,0x2b,0x18,0xab,0x00,0x0f,0x00,0x60,0x14,0x2b,0x10,0x49,0x01, | ||
2865 | 0x01,0x00,0x04,0x24,0x04,0x10,0xa4,0x00,0x24,0x10,0x46,0x00,0xff,0xff,0xa7,0x24, | ||
2866 | 0x04,0x00,0x40,0x10,0x01,0x00,0x43,0x25,0x17,0x00,0x49,0x11,0xff,0x00,0x6a,0x30, | ||
2867 | 0x21,0x40,0xa0,0x00,0xff,0x00,0xe5,0x30,0x2b,0x10,0xab,0x00,0xf6,0xff,0x40,0x10, | ||
2868 | 0x04,0x10,0xa4,0x00,0x2b,0x10,0x49,0x01,0x08,0x00,0x40,0x10,0x21,0x20,0x00,0x01, | ||
2869 | 0x23,0x10,0x2a,0x01,0x2a,0x10,0x62,0x01,0x04,0x00,0x40,0x14,0x21,0x20,0x00,0x00, | ||
2870 | 0x23,0x10,0x69,0x01,0x21,0x10,0x4a,0x00,0xff,0x00,0x44,0x30,0x08,0x00,0xe0,0x03, | ||
2871 | 0x21,0x10,0x80,0x00,0xfd,0xff,0x40,0x14,0x21,0x20,0x00,0x00,0x23,0x10,0x09,0x01, | ||
2872 | 0xad,0x4f,0x00,0x08,0xff,0x00,0x44,0x30,0x21,0x20,0x00,0x01,0x08,0x00,0xe0,0x03, | ||
2873 | 0x21,0x10,0x80,0x00,0xe0,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c,0x10,0x00,0xb0,0xaf, | ||
2874 | 0x68,0x15,0x50,0x24,0x18,0x00,0xb2,0xaf,0x14,0x00,0xb1,0xaf,0x1c,0x00,0xbf,0xaf, | ||
2875 | 0x21,0x88,0x00,0x00,0x21,0x90,0x00,0x02,0xee,0x4e,0x00,0x0c,0x21,0x20,0x20,0x02, | ||
2876 | 0x7a,0x51,0x02,0x92,0x21,0x28,0x00,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x52,0x00, | ||
2877 | 0xec,0x44,0x44,0x8c,0x60,0x45,0x43,0x8c,0x00,0x00,0x00,0x00,0x21,0x18,0x64,0x00, | ||
2878 | 0x42,0x18,0x03,0x00,0x44,0x51,0x03,0xae,0x21,0x10,0x05,0x02,0x01,0x00,0xa5,0x24, | ||
2879 | 0x1d,0x00,0xa3,0x28,0xb6,0x51,0x40,0xa0,0x7c,0x51,0x40,0xa0,0xfa,0xff,0x60,0x14, | ||
2880 | 0x99,0x51,0x40,0xa0,0x01,0x00,0x31,0x26,0x20,0x00,0x22,0x2a,0xd4,0x51,0x00,0xae, | ||
2881 | 0xe9,0xff,0x40,0x14,0x94,0x00,0x10,0x26,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f, | ||
2882 | 0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
2883 | 0xc8,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c,0x30,0x00,0xbe,0xaf,0x28,0x00,0xb6,0xaf, | ||
2884 | 0x68,0x15,0x46,0x24,0x34,0x00,0xbf,0xaf,0x2c,0x00,0xb7,0xaf,0x24,0x00,0xb5,0xaf, | ||
2885 | 0x20,0x00,0xb4,0xaf,0x1c,0x00,0xb3,0xaf,0x18,0x00,0xb2,0xaf,0x14,0x00,0xb1,0xaf, | ||
2886 | 0x10,0x00,0xb0,0xaf,0x8c,0x65,0xc2,0x8c,0xff,0x00,0x8d,0x30,0xff,0x00,0x03,0x24, | ||
2887 | 0xff,0xff,0x42,0x38,0x21,0xf0,0x00,0x00,0xff,0xff,0x04,0x34,0x0a,0xf0,0x62,0x00, | ||
2888 | 0x8c,0x65,0xc4,0xac,0xb0,0x00,0xa0,0x11,0x08,0x00,0x16,0x24,0x02,0x80,0x02,0x3c, | ||
2889 | 0xb8,0x90,0x45,0x24,0x90,0x44,0xc4,0x24,0xff,0x4f,0x00,0x08,0x21,0x88,0x00,0x00, | ||
2890 | 0x01,0x00,0x31,0x26,0x00,0x00,0x82,0xa0,0x1d,0x00,0x22,0x2a,0x0b,0x00,0x40,0x10, | ||
2891 | 0x01,0x00,0x84,0x24,0x21,0x10,0x25,0x02,0x00,0x00,0x42,0x90,0x00,0x00,0x00,0x00, | ||
2892 | 0xf7,0xff,0x40,0x10,0xfd,0xff,0x43,0x24,0x01,0x00,0x31,0x26,0x1d,0x00,0x22,0x2a, | ||
2893 | 0x00,0x00,0x83,0xa0,0xf7,0xff,0x40,0x14,0x01,0x00,0x84,0x24,0x02,0x80,0x02,0x3c, | ||
2894 | 0x68,0x15,0x4a,0x24,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x50,0x8e,0x6c,0x24, | ||
2895 | 0xd8,0x8d,0x4b,0x24,0x21,0x88,0x00,0x00,0x21,0x48,0x00,0x00,0x21,0x30,0x00,0x00, | ||
2896 | 0x21,0x40,0x2a,0x01,0x21,0x38,0x2c,0x01,0x21,0x10,0xe6,0x00,0x91,0x00,0x44,0x90, | ||
2897 | 0x00,0x00,0x45,0x90,0x21,0x18,0x06,0x01,0x01,0x00,0xc6,0x24,0x05,0x00,0xc2,0x28, | ||
2898 | 0xc5,0x43,0x64,0xa0,0xf8,0xff,0x40,0x14,0x34,0x43,0x65,0xa0,0x21,0x10,0x2b,0x02, | ||
2899 | 0x1d,0x00,0x44,0x90,0x00,0x00,0x45,0x90,0x21,0x18,0x2a,0x02,0x01,0x00,0x31,0x26, | ||
2900 | 0x1d,0x00,0x22,0x2a,0x73,0x44,0x64,0xa0,0x56,0x44,0x65,0xa0,0xeb,0xff,0x40,0x14, | ||
2901 | 0x05,0x00,0x29,0x25,0xa6,0x00,0xa0,0x11,0x02,0x80,0x02,0x3c,0x68,0x15,0x48,0x24, | ||
2902 | 0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x4c,0x91,0x69,0x24,0xd8,0x90,0x47,0x24, | ||
2903 | 0x21,0x88,0x00,0x00,0x80,0x18,0x11,0x00,0x21,0x10,0x69,0x00,0x21,0x20,0x67,0x00, | ||
2904 | 0x00,0x00,0x46,0x8c,0x00,0x00,0x85,0x8c,0x01,0x00,0x31,0x26,0x21,0x18,0x68,0x00, | ||
2905 | 0x04,0x00,0x22,0x2a,0xec,0x44,0x65,0xac,0xf6,0xff,0x40,0x14,0x60,0x45,0x66,0xac, | ||
2906 | 0x02,0x80,0x02,0x3c,0x68,0x15,0x49,0x24,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c, | ||
2907 | 0x4c,0x91,0x68,0x24,0xd8,0x90,0x47,0x24,0x04,0x00,0x11,0x24,0x80,0x20,0x11,0x00, | ||
2908 | 0x21,0x10,0x88,0x00,0x21,0x30,0x87,0x00,0x00,0x00,0x45,0x8c,0x00,0x00,0xc3,0x8c, | ||
2909 | 0x01,0x00,0x31,0x26,0x21,0x20,0x89,0x00,0x82,0x28,0x05,0x00,0x82,0x18,0x03,0x00, | ||
2910 | 0x1d,0x00,0x22,0x2a,0xec,0x44,0x83,0xac,0xf4,0xff,0x40,0x14,0x60,0x45,0x85,0xac, | ||
2911 | 0x02,0x80,0x02,0x3c,0x68,0x15,0x55,0x24,0x21,0x88,0x00,0x00,0x21,0xb8,0xa0,0x02, | ||
2912 | 0x21,0xa0,0x00,0x00,0x5a,0x50,0x00,0x08,0x21,0x90,0xa0,0x02,0x01,0x00,0x31,0x26, | ||
2913 | 0x20,0x00,0x22,0x2a,0x94,0x00,0x52,0x26,0x38,0x00,0x40,0x10,0x94,0x00,0x94,0x26, | ||
2914 | 0x78,0x51,0x44,0x8e,0x01,0x00,0x03,0x24,0x02,0x13,0x04,0x00,0x01,0x00,0x53,0x30, | ||
2915 | 0xf6,0xff,0x63,0x16,0x07,0x00,0x82,0x30,0x25,0xb0,0x03,0x3c,0x80,0x10,0x02,0x00, | ||
2916 | 0x21,0x10,0x43,0x00,0x84,0x01,0x45,0x8c,0x70,0x51,0x43,0x8e,0x21,0x20,0x20,0x02, | ||
2917 | 0x24,0x28,0xa3,0x00,0xce,0x0d,0x00,0x0c,0x74,0x51,0x45,0xae,0x7a,0x51,0x44,0x92, | ||
2918 | 0x5c,0x0d,0x00,0x0c,0xff,0x00,0x25,0x32,0x7a,0x51,0x50,0x92,0x00,0x00,0x00,0x00, | ||
2919 | 0x21,0x20,0x00,0x02,0x63,0x0d,0x00,0x0c,0x80,0x80,0x10,0x00,0x21,0x80,0x17,0x02, | ||
2920 | 0x48,0x51,0x40,0xae,0x4c,0x51,0x40,0xae,0x50,0x51,0x40,0xae,0x54,0x51,0x40,0xae, | ||
2921 | 0x58,0x51,0x40,0xae,0x5c,0x51,0x40,0xae,0x60,0x51,0x40,0xae,0x64,0x51,0x40,0xae, | ||
2922 | 0xec,0x44,0x04,0x8e,0x60,0x45,0x03,0x8e,0x26,0x10,0x53,0x00,0x21,0x30,0x00,0x00, | ||
2923 | 0x21,0x18,0x64,0x00,0x42,0x18,0x03,0x00,0x04,0x00,0x04,0x24,0x0a,0xb0,0x82,0x00, | ||
2924 | 0x44,0x51,0x43,0xae,0x21,0x20,0x95,0x02,0x21,0x10,0x86,0x00,0x01,0x00,0xc6,0x24, | ||
2925 | 0x1d,0x00,0xc3,0x28,0xb6,0x51,0x40,0xa0,0x7c,0x51,0x40,0xa0,0xfa,0xff,0x60,0x14, | ||
2926 | 0x99,0x51,0x40,0xa0,0x01,0x00,0x31,0x26,0x20,0x00,0x22,0x2a,0xd4,0x51,0x80,0xac, | ||
2927 | 0x94,0x00,0x52,0x26,0xca,0xff,0x40,0x14,0x94,0x00,0x94,0x26,0x25,0xb0,0x02,0x3c, | ||
2928 | 0x80,0x01,0x42,0x34,0x00,0x00,0x56,0xa0,0x03,0x00,0xc0,0x17,0x02,0x80,0x03,0x3c, | ||
2929 | 0x68,0x15,0x62,0x24,0x8c,0x65,0x40,0xac,0x34,0x00,0xbf,0x8f,0x30,0x00,0xbe,0x8f, | ||
2930 | 0x2c,0x00,0xb7,0x8f,0x28,0x00,0xb6,0x8f,0x24,0x00,0xb5,0x8f,0x20,0x00,0xb4,0x8f, | ||
2931 | 0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f, | ||
2932 | 0x08,0x00,0xe0,0x03,0x38,0x00,0xbd,0x27,0x02,0x80,0x02,0x3c,0xb8,0x90,0x45,0x24, | ||
2933 | 0x90,0x44,0xc4,0x24,0x21,0x88,0x00,0x00,0x21,0x10,0x25,0x02,0x00,0x00,0x43,0x90, | ||
2934 | 0x01,0x00,0x31,0x26,0x1d,0x00,0x22,0x2a,0x00,0x00,0x83,0xa0,0xfa,0xff,0x40,0x14, | ||
2935 | 0x01,0x00,0x84,0x24,0x02,0x80,0x02,0x3c,0x68,0x15,0x4a,0x24,0x02,0x80,0x03,0x3c, | ||
2936 | 0x02,0x80,0x02,0x3c,0x74,0x8f,0x6c,0x24,0x14,0x8e,0x4b,0x24,0x21,0x88,0x00,0x00, | ||
2937 | 0x21,0x48,0x00,0x00,0x21,0x30,0x00,0x00,0x21,0x40,0x2a,0x01,0x21,0x38,0x2c,0x01, | ||
2938 | 0x21,0x10,0xe6,0x00,0x91,0x00,0x44,0x90,0x00,0x00,0x45,0x90,0x21,0x18,0x06,0x01, | ||
2939 | 0x01,0x00,0xc6,0x24,0x05,0x00,0xc2,0x28,0xc5,0x43,0x64,0xa0,0xf8,0xff,0x40,0x14, | ||
2940 | 0x34,0x43,0x65,0xa0,0x21,0x10,0x2b,0x02,0x1d,0x00,0x44,0x90,0x00,0x00,0x45,0x90, | ||
2941 | 0x21,0x18,0x2a,0x02,0x01,0x00,0x31,0x26,0x1d,0x00,0x22,0x2a,0x73,0x44,0x64,0xa0, | ||
2942 | 0x56,0x44,0x65,0xa0,0xeb,0xff,0x40,0x14,0x05,0x00,0x29,0x25,0x02,0x80,0x02,0x3c, | ||
2943 | 0x68,0x15,0x49,0x24,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x4c,0x91,0x68,0x24, | ||
2944 | 0xd8,0x90,0x47,0x24,0x21,0x88,0x00,0x00,0x80,0x18,0x11,0x00,0x21,0x10,0x68,0x00, | ||
2945 | 0x21,0x20,0x67,0x00,0x00,0x00,0x46,0x8c,0x00,0x00,0x85,0x8c,0x01,0x00,0x31,0x26, | ||
2946 | 0x21,0x18,0x69,0x00,0x1d,0x00,0x22,0x2a,0xec,0x44,0x65,0xac,0xf6,0xff,0x40,0x14, | ||
2947 | 0x60,0x45,0x66,0xac,0x4f,0x50,0x00,0x08,0x02,0x80,0x02,0x3c,0xd8,0xff,0xbd,0x27, | ||
2948 | 0xff,0xff,0x84,0x30,0x18,0x00,0xb2,0xaf,0xf0,0x01,0x92,0x30,0x02,0x91,0x12,0x00, | ||
2949 | 0x14,0x00,0xb1,0xaf,0xc0,0x88,0x12,0x00,0x21,0x88,0x32,0x02,0x80,0x88,0x11,0x00, | ||
2950 | 0x21,0x88,0x32,0x02,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0x80,0x88,0x11,0x00, | ||
2951 | 0x21,0x88,0x22,0x02,0x20,0x00,0xbf,0xaf,0x1c,0x00,0xb3,0xaf,0x10,0x00,0xb0,0xaf, | ||
2952 | 0x78,0x51,0x30,0x8e,0x00,0x02,0x82,0x30,0xff,0xfe,0x03,0x24,0x2b,0x10,0x02,0x00, | ||
2953 | 0x00,0x10,0x10,0x36,0x24,0x80,0x03,0x02,0x00,0x12,0x02,0x00,0x25,0x80,0x02,0x02, | ||
2954 | 0x70,0x51,0x25,0xae,0x78,0x51,0x30,0xae,0xa0,0x0e,0x00,0x0c,0x21,0x98,0xa0,0x00, | ||
2955 | 0xf8,0xff,0x03,0x24,0x24,0x80,0x03,0x02,0x07,0x00,0x42,0x30,0x25,0x80,0x02,0x02, | ||
2956 | 0x07,0x00,0x03,0x32,0x25,0xb0,0x02,0x3c,0x80,0x18,0x03,0x00,0x78,0x51,0x30,0xae, | ||
2957 | 0x21,0x18,0x62,0x00,0x84,0x01,0x62,0x8c,0x21,0x20,0x40,0x02,0x24,0x10,0x53,0x00, | ||
2958 | 0xce,0x0d,0x00,0x0c,0x74,0x51,0x22,0xae,0x7a,0x51,0x24,0x92,0x21,0x28,0x40,0x02, | ||
2959 | 0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
2960 | 0x10,0x00,0xb0,0x8f,0x5c,0x0d,0x00,0x08,0x28,0x00,0xbd,0x27,0xee,0x4e,0x00,0x08, | ||
2961 | 0xff,0x00,0x84,0x30,0x02,0x80,0x02,0x3c,0x68,0x15,0x43,0x24,0x1f,0x00,0x04,0x24, | ||
2962 | 0x78,0x51,0x62,0x8c,0xff,0xff,0x84,0x24,0x00,0x10,0x42,0x34,0x78,0x51,0x62,0xac, | ||
2963 | 0xfb,0xff,0x81,0x04,0x94,0x00,0x63,0x24,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
2964 | 0x78,0xff,0xbd,0x27,0x60,0x00,0xb0,0xaf,0x25,0xb0,0x10,0x3c,0x70,0x00,0xb4,0xaf, | ||
2965 | 0xc4,0x02,0x14,0x36,0x00,0x00,0x80,0xae,0x74,0x00,0xb5,0xaf,0x6c,0x00,0xb3,0xaf, | ||
2966 | 0x68,0x00,0xb2,0xaf,0x64,0x00,0xb1,0xaf,0x84,0x00,0xbf,0xaf,0x80,0x00,0xbe,0xaf, | ||
2967 | 0x7c,0x00,0xb7,0xaf,0x78,0x00,0xb6,0xaf,0x04,0x00,0x02,0x36,0x04,0x0c,0x13,0x36, | ||
2968 | 0x00,0x00,0x43,0x8c,0x00,0x00,0x62,0x8e,0x0f,0x00,0x11,0x3c,0x24,0x18,0x71,0x00, | ||
2969 | 0x08,0x0c,0x12,0x36,0x4c,0x00,0xa2,0xaf,0x02,0xac,0x03,0x00,0x00,0x00,0x43,0x8e, | ||
2970 | 0x00,0x00,0x00,0x00,0x50,0x00,0xa3,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
2971 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x21,0x20,0x00,0x00,0xdd,0x44,0x00,0x0c, | ||
2972 | 0xff,0xff,0x25,0x36,0x10,0x00,0xa2,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
2973 | 0x00,0x60,0x81,0x40,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x7a,0x42,0x00,0x0c, | ||
2974 | 0x01,0x00,0x04,0x24,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
2975 | 0x00,0x60,0x81,0x40,0x21,0x20,0x00,0x00,0xdd,0x44,0x00,0x0c,0xff,0xff,0x25,0x36, | ||
2976 | 0x14,0x00,0xa2,0xaf,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
2977 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x7a,0x42,0x00,0x0c,0x21,0x20,0x00,0x00, | ||
2978 | 0xe0,0x0e,0x05,0x36,0x00,0x00,0xad,0x8c,0xdc,0x0e,0x06,0x36,0x70,0x0e,0x07,0x36, | ||
2979 | 0x18,0x00,0xad,0xaf,0x00,0x00,0xc2,0x8c,0x74,0x0e,0x08,0x36,0x78,0x0e,0x09,0x36, | ||
2980 | 0x1c,0x00,0xa2,0xaf,0x00,0x00,0xe3,0x8c,0x7c,0x0e,0x0a,0x36,0x80,0x0e,0x0b,0x36, | ||
2981 | 0x20,0x00,0xa3,0xaf,0x00,0x00,0x0d,0x8d,0x84,0x0e,0x0c,0x36,0x88,0x0e,0x17,0x36, | ||
2982 | 0x24,0x00,0xad,0xaf,0x00,0x00,0x22,0x8d,0x8c,0x0e,0x0e,0x36,0xd0,0x0e,0x18,0x36, | ||
2983 | 0x28,0x00,0xa2,0xaf,0x00,0x00,0x43,0x8d,0xd8,0x0e,0x11,0x36,0xd4,0x0e,0x10,0x36, | ||
2984 | 0x2c,0x00,0xa3,0xaf,0x00,0x00,0x6d,0x8d,0xed,0x3f,0x04,0x3c,0xfb,0x92,0x84,0x34, | ||
2985 | 0x30,0x00,0xad,0xaf,0x00,0x00,0x82,0x8d,0x25,0xb0,0x1e,0x3c,0x21,0xb0,0x00,0x00, | ||
2986 | 0x34,0x00,0xa2,0xaf,0x00,0x00,0xe3,0x8e,0xff,0x03,0x0f,0x3c,0x38,0x00,0xa3,0xaf, | ||
2987 | 0x00,0x00,0xcd,0x8d,0x00,0x00,0x00,0x00,0x3c,0x00,0xad,0xaf,0x00,0x00,0x02,0x8f, | ||
2988 | 0x00,0x00,0x00,0x00,0x40,0x00,0xa2,0xaf,0x00,0x00,0x03,0x8e,0x00,0x00,0x00,0x00, | ||
2989 | 0x44,0x00,0xa3,0xaf,0x00,0x00,0x2d,0x8e,0x00,0x00,0x00,0x00,0x48,0x00,0xad,0xaf, | ||
2990 | 0x00,0x00,0xa4,0xac,0x00,0x00,0xc4,0xac,0x00,0x00,0xe4,0xac,0x00,0x00,0x04,0xad, | ||
2991 | 0x00,0x00,0x24,0xad,0x00,0x00,0x44,0xad,0x00,0x00,0x64,0xad,0x00,0x00,0x84,0xad, | ||
2992 | 0x00,0x00,0xe4,0xae,0x00,0x00,0xc4,0xad,0x00,0x00,0x04,0xaf,0x00,0x00,0x04,0xae, | ||
2993 | 0x00,0x00,0x24,0xae,0xd0,0x51,0x00,0x08,0x00,0x00,0x00,0x00,0x7a,0x00,0xa2,0x12, | ||
2994 | 0x00,0x10,0x03,0x3c,0xac,0x0e,0xc2,0x37,0x94,0x0e,0xc3,0x37,0x25,0xb0,0x09,0x3c, | ||
2995 | 0x00,0x00,0x4a,0x8c,0xbc,0x0e,0x29,0x35,0x00,0x00,0x64,0x8c,0xb4,0x0e,0xc2,0x37, | ||
2996 | 0x9c,0x0e,0xc3,0x37,0x00,0x00,0x45,0x8c,0x00,0x00,0x66,0x8c,0x00,0x00,0x27,0x8d, | ||
2997 | 0x24,0x20,0x8f,0x00,0x00,0xd8,0x02,0x3c,0x24,0x10,0x42,0x01,0x24,0x28,0xaf,0x00, | ||
2998 | 0x24,0x30,0xcf,0x00,0x24,0x38,0xef,0x00,0x02,0x24,0x04,0x00,0x20,0x01,0x03,0x24, | ||
2999 | 0x01,0x00,0x42,0x2c,0x02,0x2c,0x05,0x00,0x02,0x34,0x06,0x00,0xf2,0x00,0x83,0x10, | ||
3000 | 0x02,0x3c,0x07,0x00,0xf0,0x00,0xa3,0x10,0x20,0x00,0x03,0x24,0xee,0x00,0xc3,0x10, | ||
3001 | 0x00,0x00,0x00,0x00,0xec,0x00,0xe3,0x10,0x01,0x00,0x08,0x24,0x80,0x00,0x03,0x24, | ||
3002 | 0x08,0x00,0x83,0x10,0x21,0x20,0x00,0x00,0x06,0x00,0xa3,0x10,0x21,0x20,0x00,0x00, | ||
3003 | 0xe0,0x03,0x03,0x24,0x03,0x00,0xc3,0x10,0x00,0x00,0x00,0x00,0xe5,0x00,0xe3,0x10, | ||
3004 | 0x01,0x00,0x04,0x24,0x06,0x00,0x40,0x10,0x09,0x00,0x02,0x24,0x04,0x00,0x00,0x11, | ||
3005 | 0x00,0x00,0x00,0x00,0x6d,0x01,0x80,0x14,0x25,0xb0,0x12,0x3c,0x09,0x00,0x02,0x24, | ||
3006 | 0xde,0x00,0xc2,0x12,0x25,0xb0,0x04,0x3c,0x01,0x00,0xd6,0x26,0x0a,0x00,0xc2,0x2e, | ||
3007 | 0x1d,0x01,0x40,0x10,0x00,0x00,0x00,0x00,0xc8,0xff,0xa0,0x16,0x01,0x00,0x02,0x24, | ||
3008 | 0xa0,0x00,0x03,0x3c,0x25,0xb0,0x09,0x3c,0x30,0x54,0x62,0x34,0x04,0x0c,0x29,0x35, | ||
3009 | 0x00,0x00,0x22,0xad,0x25,0xb0,0x0d,0x3c,0x08,0x00,0x02,0x3c,0xe4,0x00,0x42,0x34, | ||
3010 | 0x08,0x0c,0xad,0x35,0x25,0xb0,0x09,0x3c,0x00,0x00,0xa2,0xad,0x28,0x0e,0x29,0x35, | ||
3011 | 0x80,0x80,0x02,0x3c,0x00,0x00,0x22,0xad,0x14,0x02,0x04,0x3c,0x16,0x68,0x02,0x3c, | ||
3012 | 0x48,0x01,0x83,0x34,0x40,0x0e,0xc5,0x37,0x44,0x0e,0xc6,0x37,0xa2,0x04,0x42,0x34, | ||
3013 | 0x25,0xb0,0x0d,0x3c,0x00,0x00,0xa3,0xac,0x4c,0x0e,0xad,0x35,0x00,0x00,0xc2,0xac, | ||
3014 | 0xd1,0x28,0x02,0x24,0x00,0x00,0xa2,0xad,0x14,0x02,0x03,0x3c,0x16,0x28,0x02,0x3c, | ||
3015 | 0x4d,0x01,0x63,0x34,0x60,0x0e,0xc7,0x37,0x64,0x0e,0xc8,0x37,0xba,0x08,0x42,0x34, | ||
3016 | 0x00,0x00,0xe3,0xac,0x25,0xb0,0x06,0x3c,0x00,0x00,0x02,0xad,0x00,0xfb,0x0d,0x3c, | ||
3017 | 0x25,0xb0,0x09,0x3c,0x00,0xf8,0x02,0x3c,0xd1,0x28,0x07,0x24,0x6c,0x0e,0xc6,0x34, | ||
3018 | 0x48,0x0e,0x29,0x35,0x01,0x00,0x42,0x34,0x01,0x00,0xad,0x35,0x00,0x00,0xc7,0xac, | ||
3019 | 0x03,0x00,0x04,0x24,0x00,0x00,0x2d,0xad,0x00,0x00,0x22,0xad,0x84,0x0a,0x00,0x0c, | ||
3020 | 0x58,0x00,0xaf,0xaf,0xa0,0x00,0x04,0x3c,0x25,0xb0,0x03,0x3c,0x25,0xb0,0x06,0x3c, | ||
3021 | 0x25,0xb0,0x07,0x3c,0xe4,0x00,0x02,0x24,0x33,0x54,0x84,0x34,0x04,0x0c,0x63,0x34, | ||
3022 | 0x08,0x0c,0xc6,0x34,0x28,0x0e,0xe7,0x34,0x00,0x00,0x64,0xac,0x00,0x00,0xc2,0xac, | ||
3023 | 0x00,0x00,0xe0,0xac,0x01,0x00,0x02,0x24,0x58,0x00,0xaf,0x8f,0x8a,0xff,0xa2,0x16, | ||
3024 | 0xac,0x0e,0xc2,0x37,0x00,0x10,0x03,0x3c,0x1f,0xdc,0x79,0x34,0x1f,0x8c,0x7f,0x34, | ||
3025 | 0x23,0x8c,0x6d,0x34,0xa0,0x00,0x03,0x3c,0x30,0x54,0x65,0x34,0x00,0x01,0x17,0x3c, | ||
3026 | 0x25,0xb0,0x09,0x3c,0x25,0xb0,0x03,0x3c,0x00,0x01,0xe2,0x36,0x20,0x08,0x29,0x35, | ||
3027 | 0x20,0x08,0x63,0x34,0x00,0x00,0x30,0x8d,0x00,0x00,0x62,0xac,0x25,0xb0,0x03,0x3c, | ||
3028 | 0x28,0x08,0x63,0x34,0x00,0x00,0x62,0xac,0x25,0xb0,0x02,0x3c,0x04,0x0c,0x42,0x34, | ||
3029 | 0x00,0x00,0x45,0xac,0x25,0xb0,0x03,0x3c,0x08,0x00,0x02,0x3c,0xe4,0x00,0x42,0x34, | ||
3030 | 0x08,0x0c,0x63,0x34,0x00,0x00,0x62,0xac,0x25,0xb0,0x03,0x3c,0x00,0x7c,0xf3,0x36, | ||
3031 | 0x00,0x48,0xf4,0x36,0x30,0x0e,0xc6,0x37,0x34,0x0e,0xc7,0x37,0x80,0x80,0x02,0x3c, | ||
3032 | 0x28,0x0e,0x63,0x34,0x00,0x00,0x62,0xac,0x00,0x00,0xd3,0xac,0x00,0x00,0xf4,0xac, | ||
3033 | 0x14,0x02,0x06,0x3c,0x16,0x68,0x07,0x3c,0x38,0x0e,0xc8,0x37,0x40,0x0e,0xca,0x37, | ||
3034 | 0x44,0x0e,0xcb,0x37,0x3c,0x0e,0xc9,0x37,0x02,0x01,0xc6,0x34,0xc7,0x04,0xe7,0x34, | ||
3035 | 0x00,0x00,0x19,0xad,0x25,0xb0,0x03,0x3c,0x00,0x00,0x3f,0xad,0x00,0x00,0x46,0xad, | ||
3036 | 0x25,0xb0,0x09,0x3c,0x00,0x00,0x67,0xad,0x25,0xb0,0x06,0x3c,0x00,0x10,0x07,0x3c, | ||
3037 | 0x50,0x0e,0xcc,0x37,0x58,0x0e,0xce,0x37,0x5c,0x0e,0xd8,0x37,0xd1,0x28,0x02,0x24, | ||
3038 | 0x23,0xdc,0xe7,0x34,0x4c,0x0e,0x29,0x35,0x6c,0x0e,0x63,0x34,0x54,0x0e,0xc6,0x34, | ||
3039 | 0x00,0x00,0x22,0xad,0x00,0x00,0x62,0xac,0x14,0x02,0x09,0x3c,0x00,0x00,0x93,0xad, | ||
3040 | 0x25,0xb0,0x02,0x3c,0x00,0x00,0xd4,0xac,0x00,0x00,0xc7,0xad,0x00,0x00,0x0d,0xaf, | ||
3041 | 0x16,0x28,0x0d,0x3c,0x48,0x0e,0x42,0x34,0x00,0xf8,0x06,0x3c,0x02,0x01,0x29,0x35, | ||
3042 | 0x07,0x0d,0xad,0x35,0x00,0xfb,0x03,0x3c,0x60,0x0e,0xd1,0x37,0x64,0x0e,0xd2,0x37, | ||
3043 | 0x00,0x00,0x29,0xae,0x03,0x00,0x04,0x24,0x00,0x00,0x4d,0xae,0x00,0x00,0x43,0xac, | ||
3044 | 0x00,0x00,0x46,0xac,0x84,0x0a,0x00,0x0c,0x58,0x00,0xaf,0xaf,0x00,0x02,0x02,0x3c, | ||
3045 | 0x25,0xb0,0x07,0x3c,0x25,0xb0,0x09,0x3c,0xd1,0x28,0x42,0x34,0x4c,0x0e,0xe7,0x34, | ||
3046 | 0x6c,0x0e,0x29,0x35,0x25,0xb0,0x0d,0x3c,0x00,0x00,0xe2,0xac,0x48,0x0e,0xad,0x35, | ||
3047 | 0x00,0x00,0x22,0xad,0x00,0xf8,0x03,0x3c,0x00,0xfb,0x02,0x3c,0x00,0x00,0xa2,0xad, | ||
3048 | 0x03,0x00,0x04,0x24,0x00,0x00,0xa3,0xad,0x84,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3049 | 0x4c,0x00,0xa6,0x8f,0x25,0xb0,0x04,0x3c,0x04,0x0c,0x84,0x34,0x00,0x00,0x86,0xac, | ||
3050 | 0x50,0x00,0xa9,0x8f,0x25,0xb0,0x07,0x3c,0x25,0xb0,0x0d,0x3c,0x00,0x01,0x10,0x32, | ||
3051 | 0x08,0x0c,0xe7,0x34,0x28,0x0e,0xad,0x35,0x00,0x00,0xe9,0xac,0x2b,0x80,0x10,0x00, | ||
3052 | 0x00,0x00,0xa0,0xad,0x58,0x00,0xaf,0x8f,0x17,0xff,0x00,0x16,0xac,0x0e,0xc2,0x37, | ||
3053 | 0x25,0xb0,0x02,0x3c,0x25,0xb0,0x03,0x3c,0x20,0x08,0x42,0x34,0x28,0x08,0x63,0x34, | ||
3054 | 0x00,0x00,0x57,0xac,0x25,0xb0,0x09,0x3c,0x00,0x00,0x77,0xac,0xac,0x0e,0xc2,0x37, | ||
3055 | 0x94,0x0e,0xc3,0x37,0x00,0x00,0x4a,0x8c,0xbc,0x0e,0x29,0x35,0x00,0x00,0x64,0x8c, | ||
3056 | 0xb4,0x0e,0xc2,0x37,0x9c,0x0e,0xc3,0x37,0x00,0x00,0x45,0x8c,0x00,0x00,0x66,0x8c, | ||
3057 | 0x00,0x00,0x27,0x8d,0x24,0x20,0x8f,0x00,0x00,0xd8,0x02,0x3c,0x24,0x10,0x42,0x01, | ||
3058 | 0x24,0x28,0xaf,0x00,0x24,0x30,0xcf,0x00,0x24,0x38,0xef,0x00,0x02,0x24,0x04,0x00, | ||
3059 | 0x20,0x01,0x03,0x24,0x01,0x00,0x42,0x2c,0x02,0x2c,0x05,0x00,0x02,0x34,0x06,0x00, | ||
3060 | 0x10,0xff,0x83,0x14,0x02,0x3c,0x07,0x00,0x80,0x00,0x03,0x24,0x16,0xff,0x83,0x14, | ||
3061 | 0x21,0x40,0x00,0x00,0xc3,0x51,0x00,0x08,0x21,0x20,0x00,0x00,0xff,0xff,0x02,0x34, | ||
3062 | 0xc4,0x02,0x84,0x34,0x00,0x00,0x82,0xac,0x94,0x0e,0xc3,0x37,0x9c,0x0e,0xc2,0x37, | ||
3063 | 0xa4,0x0e,0xc4,0x37,0xac,0x0e,0xc7,0x37,0x00,0x00,0x66,0x8c,0x00,0x00,0x49,0x8c, | ||
3064 | 0x00,0x00,0x8b,0x8c,0x00,0x00,0xe5,0x8c,0x02,0x80,0x07,0x3c,0x68,0x15,0xe7,0x24, | ||
3065 | 0x0c,0x40,0xe3,0x8c,0x10,0x40,0xe4,0x8c,0xb4,0x0e,0xc2,0x37,0x00,0x00,0x47,0x8c, | ||
3066 | 0x25,0xb0,0x0d,0x3c,0x00,0xfc,0x02,0x24,0x24,0x30,0xcf,0x00,0x24,0x28,0xaf,0x00, | ||
3067 | 0xbc,0x0e,0xad,0x35,0x00,0x00,0xa8,0x8d,0x24,0x20,0x82,0x00,0x02,0x34,0x06,0x00, | ||
3068 | 0x24,0x18,0x62,0x00,0x02,0x2c,0x05,0x00,0xc4,0x0e,0xca,0x37,0xcc,0x0e,0xcc,0x37, | ||
3069 | 0xf0,0xff,0x02,0x3c,0xff,0x03,0x42,0x34,0x25,0x18,0x66,0x00,0x25,0x20,0x85,0x00, | ||
3070 | 0x00,0x00,0x46,0x8d,0x24,0x48,0x2f,0x01,0x00,0x00,0x85,0x8d,0x24,0x38,0xef,0x00, | ||
3071 | 0x24,0x20,0x82,0x00,0x24,0x18,0x62,0x00,0x82,0x49,0x09,0x00,0x82,0x39,0x07,0x00, | ||
3072 | 0x0f,0xc0,0x02,0x3c,0xff,0xff,0x42,0x34,0x25,0x18,0x69,0x00,0x25,0x20,0x87,0x00, | ||
3073 | 0x24,0x58,0x6f,0x01,0x24,0x40,0x0f,0x01,0x24,0x20,0x82,0x00,0x24,0x18,0x62,0x00, | ||
3074 | 0x00,0x59,0x0b,0x00,0x00,0x41,0x08,0x00,0x24,0x30,0xcf,0x00,0x24,0x28,0xaf,0x00, | ||
3075 | 0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24,0x25,0x18,0x6b,0x00,0x25,0x20,0x88,0x00, | ||
3076 | 0x02,0x34,0x06,0x00,0x02,0x2c,0x05,0x00,0x01,0x00,0xd6,0x26,0x0c,0x40,0x43,0xac, | ||
3077 | 0x10,0x40,0x44,0xac,0x14,0x40,0x46,0xa4,0x16,0x40,0x45,0xa4,0x0a,0x00,0xc2,0x2e, | ||
3078 | 0xe5,0xfe,0x40,0x14,0x00,0x00,0x00,0x00,0x18,0x00,0xad,0x8f,0x25,0xb0,0x02,0x3c, | ||
3079 | 0xe0,0x0e,0x43,0x34,0x10,0x00,0xa6,0x8f,0x00,0x00,0x6d,0xac,0x1c,0x00,0xa3,0x8f, | ||
3080 | 0xdc,0x0e,0x47,0x34,0x70,0x0e,0x48,0x34,0x00,0x00,0xe3,0xac,0x20,0x00,0xa7,0x8f, | ||
3081 | 0x74,0x0e,0x49,0x34,0x78,0x0e,0x4a,0x34,0x00,0x00,0x07,0xad,0x24,0x00,0xad,0x8f, | ||
3082 | 0x7c,0x0e,0x4b,0x34,0x80,0x0e,0x4c,0x34,0x00,0x00,0x2d,0xad,0x28,0x00,0xa3,0x8f, | ||
3083 | 0x25,0xb0,0x0d,0x3c,0x84,0x0e,0xad,0x35,0x00,0x00,0x43,0xad,0x2c,0x00,0xa7,0x8f, | ||
3084 | 0x88,0x0e,0x52,0x34,0x8c,0x0e,0x4e,0x34,0x00,0x00,0x67,0xad,0x30,0x00,0xa9,0x8f, | ||
3085 | 0xd4,0x0e,0x51,0x34,0xd0,0x0e,0x42,0x34,0x00,0x00,0x89,0xad,0x34,0x00,0xa3,0x8f, | ||
3086 | 0x0f,0x00,0x10,0x3c,0xff,0xff,0x05,0x36,0x00,0x00,0xa3,0xad,0x38,0x00,0xa7,0x8f, | ||
3087 | 0x21,0x20,0x00,0x00,0x00,0x00,0x47,0xae,0x3c,0x00,0xa9,0x8f,0x00,0x00,0x00,0x00, | ||
3088 | 0x00,0x00,0xc9,0xad,0x40,0x00,0xad,0x8f,0x00,0x00,0x00,0x00,0x00,0x00,0x4d,0xac, | ||
3089 | 0x44,0x00,0xa2,0x8f,0x00,0x00,0x00,0x00,0x00,0x00,0x22,0xae,0x48,0x00,0xa3,0x8f, | ||
3090 | 0x00,0x00,0x00,0x00,0x00,0x00,0x43,0xae,0xba,0x44,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3091 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x7a,0x42,0x00,0x0c,0x01,0x00,0x04,0x24, | ||
3092 | 0x14,0x00,0xa6,0x8f,0xff,0xff,0x05,0x36,0xba,0x44,0x00,0x0c,0x21,0x20,0x00,0x00, | ||
3093 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x84,0x00,0xbf,0x8f,0x80,0x00,0xbe,0x8f, | ||
3094 | 0x7c,0x00,0xb7,0x8f,0x78,0x00,0xb6,0x8f,0x74,0x00,0xb5,0x8f,0x70,0x00,0xb4,0x8f, | ||
3095 | 0x6c,0x00,0xb3,0x8f,0x68,0x00,0xb2,0x8f,0x64,0x00,0xb1,0x8f,0x60,0x00,0xb0,0x8f, | ||
3096 | 0x21,0x20,0x00,0x00,0x7a,0x42,0x00,0x08,0x88,0x00,0xbd,0x27,0x94,0x0e,0x42,0x36, | ||
3097 | 0x9c,0x0e,0x43,0x36,0xa4,0x0e,0x44,0x36,0xac,0x0e,0x45,0x36,0x02,0x80,0x0d,0x3c, | ||
3098 | 0x00,0x00,0x47,0x8c,0x68,0x15,0xad,0x25,0x00,0x00,0x6a,0x8c,0x00,0x00,0x8c,0x8c, | ||
3099 | 0x00,0x00,0xa3,0x8c,0x10,0x40,0xa4,0x8d,0xb4,0x0e,0x42,0x36,0x00,0x00,0x48,0x8c, | ||
3100 | 0x0c,0x40,0xa5,0x8d,0x25,0xb0,0x02,0x3c,0x00,0xfc,0x13,0x24,0xbc,0x0e,0x42,0x34, | ||
3101 | 0x24,0x18,0x6f,0x00,0x00,0x00,0x49,0x8c,0x02,0x1c,0x03,0x00,0x24,0x38,0xef,0x00, | ||
3102 | 0x24,0x20,0x93,0x00,0xf0,0xff,0x06,0x3c,0x25,0x20,0x83,0x00,0xff,0x03,0xc6,0x34, | ||
3103 | 0x02,0x3c,0x07,0x00,0xc4,0x0e,0x42,0x36,0x24,0x28,0xb3,0x00,0x24,0x40,0x0f,0x01, | ||
3104 | 0xcc,0x0e,0x4b,0x36,0x25,0x28,0xa7,0x00,0x24,0x20,0x86,0x00,0x00,0x00,0x47,0x8c, | ||
3105 | 0x24,0x50,0x4f,0x01,0x00,0x00,0x63,0x8d,0x82,0x41,0x08,0x00,0x0f,0xc0,0x02,0x3c, | ||
3106 | 0xff,0xff,0x42,0x34,0x25,0x20,0x88,0x00,0x82,0x51,0x0a,0x00,0x24,0x28,0xa6,0x00, | ||
3107 | 0x24,0x48,0x2f,0x01,0x24,0x88,0x82,0x00,0x25,0x28,0xaa,0x00,0x24,0x60,0x8f,0x01, | ||
3108 | 0x00,0x49,0x09,0x00,0x25,0x88,0x29,0x02,0x24,0x28,0xa2,0x00,0x24,0x18,0x6f,0x00, | ||
3109 | 0x00,0x61,0x0c,0x00,0x24,0x38,0xef,0x00,0x25,0x28,0xac,0x00,0x02,0x3c,0x07,0x00, | ||
3110 | 0x02,0x1c,0x03,0x00,0x82,0x27,0x11,0x00,0x01,0x00,0x02,0x24,0x16,0x40,0xa3,0xa5, | ||
3111 | 0x14,0x40,0xa7,0xa5,0x0c,0x40,0xa5,0xad,0x4a,0x00,0x82,0x10,0x10,0x40,0xb1,0xad, | ||
3112 | 0x80,0x0c,0x4c,0x36,0x00,0x00,0x8a,0x8d,0x82,0x72,0x05,0x00,0xff,0x03,0xce,0x31, | ||
3113 | 0x00,0x02,0xc3,0x31,0x25,0x10,0xd3,0x01,0x0b,0x70,0x43,0x00,0x82,0x85,0x0a,0x00, | ||
3114 | 0x18,0x00,0xd0,0x01,0xff,0x03,0xaf,0x30,0x00,0x02,0xa3,0x30,0x25,0x10,0xf3,0x01, | ||
3115 | 0x0b,0x78,0x43,0x00,0x02,0x75,0x11,0x00,0xff,0x03,0xce,0x31,0xc0,0xff,0x08,0x3c, | ||
3116 | 0x25,0x18,0xd3,0x01,0x00,0x02,0xc2,0x31,0x00,0xfc,0x06,0x35,0x0b,0x70,0x62,0x00, | ||
3117 | 0x24,0x38,0x46,0x01,0x94,0x0c,0x4a,0x36,0xff,0x0f,0x09,0x3c,0xff,0xff,0x29,0x35, | ||
3118 | 0x88,0x0c,0x54,0x36,0x12,0x20,0x00,0x00,0x02,0x22,0x04,0x00,0x3f,0x00,0x82,0x30, | ||
3119 | 0x18,0x00,0xf0,0x01,0x82,0x7a,0x11,0x00,0xff,0x03,0xef,0x31,0x00,0x14,0x02,0x00, | ||
3120 | 0x25,0x38,0xe2,0x00,0x00,0x02,0xe3,0x31,0x25,0x10,0xf3,0x01,0x0b,0x78,0x43,0x00, | ||
3121 | 0xc0,0x03,0x84,0x30,0x80,0x25,0x04,0x00,0x9c,0x0c,0x4b,0x36,0x12,0x28,0x00,0x00, | ||
3122 | 0x02,0x2a,0x05,0x00,0xff,0x03,0xa2,0x30,0x25,0x10,0xe2,0x00,0x00,0x00,0x82,0xad, | ||
3123 | 0x00,0x00,0x42,0x8d,0x00,0x00,0x00,0x00,0x24,0x10,0x49,0x00,0x25,0x10,0x44,0x00, | ||
3124 | 0x00,0x00,0x42,0xad,0x00,0x00,0x8a,0x8e,0x00,0x00,0x00,0x00,0x24,0x40,0x48,0x01, | ||
3125 | 0x82,0x85,0x08,0x00,0x18,0x00,0xd0,0x01,0x24,0x30,0x46,0x01,0x12,0x18,0x00,0x00, | ||
3126 | 0x02,0x1a,0x03,0x00,0x3f,0x00,0x62,0x30,0x18,0x00,0xf0,0x01,0x00,0x14,0x02,0x00, | ||
3127 | 0x25,0x30,0xc2,0x00,0xc0,0x03,0x63,0x30,0x80,0x1d,0x03,0x00,0x12,0x20,0x00,0x00, | ||
3128 | 0x02,0x22,0x04,0x00,0xff,0x03,0x82,0x30,0x25,0x10,0xc2,0x00,0x00,0x00,0x82,0xae, | ||
3129 | 0x00,0x00,0x62,0x8d,0x00,0x00,0x00,0x00,0x24,0x10,0x49,0x00,0x25,0x10,0x43,0x00, | ||
3130 | 0x00,0x00,0x62,0xad,0x00,0x17,0x16,0x00,0x25,0xb0,0x03,0x3c,0xdd,0xdd,0x42,0x34, | ||
3131 | 0xc4,0x02,0x63,0x34,0x00,0x00,0x62,0xac,0xec,0x52,0x00,0x08,0x00,0x00,0x00,0x00, | ||
3132 | 0xe0,0xff,0xbd,0x27,0x44,0x00,0x02,0x24,0x10,0x00,0xa2,0xa3,0x49,0x00,0x03,0x24, | ||
3133 | 0x47,0x00,0x02,0x24,0x02,0x80,0x07,0x3c,0x8c,0x97,0xe7,0x24,0x11,0x00,0xa3,0xa3, | ||
3134 | 0x12,0x00,0xa2,0xa3,0x10,0x27,0x03,0x24,0x01,0x00,0x02,0x24,0x01,0x80,0x06,0x3c, | ||
3135 | 0x10,0x00,0xa5,0x27,0x21,0x20,0xe0,0x00,0xe8,0x51,0xc6,0x24,0x0c,0x00,0xe3,0xac, | ||
3136 | 0x14,0x00,0xe2,0xa0,0x18,0x00,0xbf,0xaf,0xfb,0x0c,0x00,0x0c,0x13,0x00,0xa0,0xa3, | ||
3137 | 0x18,0x00,0xbf,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27, | ||
3138 | 0xd0,0xff,0xbd,0x27,0x25,0xb0,0x02,0x3c,0x20,0x00,0xb4,0xaf,0x1c,0x00,0xb3,0xaf, | ||
3139 | 0x03,0x0d,0x44,0x34,0x2c,0x00,0xbf,0xaf,0x28,0x00,0xb6,0xaf,0x24,0x00,0xb5,0xaf, | ||
3140 | 0x18,0x00,0xb2,0xaf,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x00,0x83,0x90, | ||
3141 | 0x42,0x00,0x45,0x34,0xff,0x00,0x73,0x30,0x70,0x00,0x74,0x32,0x29,0x00,0x80,0x16, | ||
3142 | 0x8f,0x00,0x62,0x32,0xff,0xff,0x02,0x24,0x00,0x00,0xa2,0xa0,0x00,0x60,0x01,0x40, | ||
3143 | 0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x0f,0x00,0x11,0x3c, | ||
3144 | 0x18,0x00,0x04,0x24,0xdd,0x44,0x00,0x0c,0xff,0xff,0x25,0x36,0x21,0x80,0x40,0x00, | ||
3145 | 0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0xb3,0x0a,0x00,0x0c, | ||
3146 | 0x64,0x00,0x04,0x24,0x00,0x80,0x06,0x36,0xff,0xff,0x25,0x36,0xba,0x44,0x00,0x0c, | ||
3147 | 0x18,0x00,0x04,0x24,0x84,0x0a,0x00,0x0c,0x03,0x00,0x04,0x24,0x21,0x30,0xa0,0x02, | ||
3148 | 0xff,0xff,0x25,0x36,0x5c,0x00,0x80,0x16,0x21,0x20,0x00,0x00,0x2c,0x00,0xbf,0x8f, | ||
3149 | 0x28,0x00,0xb6,0x8f,0x24,0x00,0xb5,0x8f,0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f, | ||
3150 | 0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f,0x25,0xb0,0x02,0x3c, | ||
3151 | 0x42,0x00,0x42,0x34,0x30,0x00,0xbd,0x27,0x00,0x00,0x40,0xa0,0x08,0x00,0xe0,0x03, | ||
3152 | 0x00,0x00,0x00,0x00,0x00,0x00,0x82,0xa0,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
3153 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x0f,0x00,0x11,0x3c,0x21,0x20,0x00,0x00, | ||
3154 | 0xdd,0x44,0x00,0x0c,0xff,0xff,0x25,0x36,0x21,0xa8,0x40,0x00,0x00,0x60,0x01,0x40, | ||
3155 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24, | ||
3156 | 0x7a,0x42,0x00,0x0c,0x01,0x00,0x04,0x24,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
3157 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x21,0x20,0x00,0x00,0xdd,0x44,0x00,0x0c, | ||
3158 | 0xff,0xff,0x25,0x36,0x21,0xb0,0x40,0x00,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
3159 | 0x00,0x60,0x81,0x40,0x64,0x00,0x04,0x24,0xb3,0x0a,0x00,0x0c,0x08,0x00,0x10,0x3c, | ||
3160 | 0xff,0xff,0x10,0x36,0x7a,0x42,0x00,0x0c,0x21,0x20,0x00,0x00,0x01,0x00,0x12,0x3c, | ||
3161 | 0x24,0x30,0xb0,0x02,0x25,0x30,0xd2,0x00,0xff,0xff,0x25,0x36,0xba,0x44,0x00,0x0c, | ||
3162 | 0x21,0x20,0x00,0x00,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0x24,0x80,0xd0,0x02, | ||
3163 | 0x7a,0x42,0x00,0x0c,0x01,0x00,0x04,0x24,0x25,0x30,0x12,0x02,0xff,0xff,0x25,0x36, | ||
3164 | 0xba,0x44,0x00,0x0c,0x21,0x20,0x00,0x00,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24, | ||
3165 | 0x7a,0x42,0x00,0x0c,0x21,0x20,0x00,0x00,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34, | ||
3166 | 0x01,0x00,0x21,0x38,0x00,0x60,0x81,0x40,0x0f,0x00,0x11,0x3c,0x18,0x00,0x04,0x24, | ||
3167 | 0xdd,0x44,0x00,0x0c,0xff,0xff,0x25,0x36,0x21,0x80,0x40,0x00,0x00,0x60,0x01,0x40, | ||
3168 | 0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24, | ||
3169 | 0x00,0x80,0x06,0x36,0xff,0xff,0x25,0x36,0xba,0x44,0x00,0x0c,0x18,0x00,0x04,0x24, | ||
3170 | 0x84,0x0a,0x00,0x0c,0x03,0x00,0x04,0x24,0x21,0x30,0xa0,0x02,0xff,0xff,0x25,0x36, | ||
3171 | 0xa6,0xff,0x80,0x12,0x21,0x20,0x00,0x00,0x25,0xb0,0x02,0x3c,0x03,0x0d,0x42,0x34, | ||
3172 | 0x00,0x00,0x53,0xa0,0xba,0x44,0x00,0x0c,0x00,0x00,0x00,0x00,0xb3,0x0a,0x00,0x0c, | ||
3173 | 0x64,0x00,0x04,0x24,0x7a,0x42,0x00,0x0c,0x01,0x00,0x04,0x24,0xff,0xff,0x25,0x36, | ||
3174 | 0x21,0x30,0xc0,0x02,0xba,0x44,0x00,0x0c,0x21,0x20,0x00,0x00,0xb3,0x0a,0x00,0x0c, | ||
3175 | 0x64,0x00,0x04,0x24,0x2c,0x00,0xbf,0x8f,0x28,0x00,0xb6,0x8f,0x24,0x00,0xb5,0x8f, | ||
3176 | 0x20,0x00,0xb4,0x8f,0x1c,0x00,0xb3,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
3177 | 0x10,0x00,0xb0,0x8f,0x21,0x20,0x00,0x00,0x7a,0x42,0x00,0x08,0x30,0x00,0xbd,0x27, | ||
3178 | 0xd0,0xff,0xbd,0x27,0x28,0x00,0xb4,0xaf,0x02,0x80,0x14,0x3c,0x2c,0x00,0xbf,0xaf, | ||
3179 | 0x24,0x00,0xb3,0xaf,0x20,0x00,0xb2,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf, | ||
3180 | 0x68,0x15,0x86,0x26,0x0c,0x40,0xc2,0x8c,0x00,0x00,0x00,0x00,0x82,0x17,0x02,0x00, | ||
3181 | 0x01,0x00,0x42,0x30,0x07,0x00,0x40,0x14,0x68,0x15,0x85,0x26,0x08,0x40,0xc2,0x8c, | ||
3182 | 0x01,0x00,0x03,0x24,0x42,0x17,0x02,0x00,0x03,0x00,0x42,0x30,0xf0,0x00,0x43,0x10, | ||
3183 | 0x25,0xb0,0x02,0x3c,0x0c,0x40,0xa2,0x8c,0x01,0x00,0x03,0x24,0x82,0x17,0x02,0x00, | ||
3184 | 0x01,0x00,0x44,0x30,0x0a,0x00,0x83,0x10,0x00,0x00,0x00,0x00,0x2c,0x00,0xbf,0x8f, | ||
3185 | 0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f, | ||
3186 | 0x18,0x00,0xb0,0x8f,0x21,0x10,0x00,0x00,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27, | ||
3187 | 0x08,0x40,0xa2,0x8c,0x00,0x00,0x00,0x00,0x42,0x17,0x02,0x00,0x03,0x00,0x42,0x30, | ||
3188 | 0xf2,0xff,0x44,0x14,0x25,0xb0,0x02,0x3c,0x0e,0x0c,0x44,0x34,0x00,0x00,0x83,0x90, | ||
3189 | 0x00,0x01,0x02,0x24,0xff,0x00,0x63,0x30,0x01,0x00,0x63,0x24,0x8b,0x01,0x62,0x10, | ||
3190 | 0x00,0x00,0x00,0x00,0x00,0x00,0x83,0xa0,0x68,0x15,0x84,0x26,0x10,0x40,0x82,0x8c, | ||
3191 | 0x01,0x00,0x03,0x24,0x82,0x17,0x02,0x00,0xa4,0x01,0x43,0x10,0x0f,0x00,0x10,0x3c, | ||
3192 | 0xc7,0x42,0x92,0x90,0x68,0x15,0x90,0x26,0xc6,0x42,0x03,0x92,0x25,0xb0,0x11,0x3c, | ||
3193 | 0x62,0x0c,0x22,0x36,0x00,0x00,0x52,0xa0,0x17,0x01,0x60,0x10,0x01,0x00,0x02,0x24, | ||
3194 | 0x03,0x0d,0x23,0x36,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x70,0x00,0x42,0x30, | ||
3195 | 0x3e,0x01,0x40,0x14,0x63,0x0c,0x23,0x36,0xc4,0x42,0x02,0x96,0x00,0x00,0x00,0x00, | ||
3196 | 0x23,0x20,0x52,0x00,0x2b,0x18,0x52,0x00,0x23,0x10,0x42,0x02,0x0a,0x10,0x83,0x00, | ||
3197 | 0x03,0x00,0x42,0x2c,0x0b,0x01,0x40,0x10,0x00,0x00,0x00,0x00,0xc4,0x42,0x03,0x96, | ||
3198 | 0x63,0x0c,0x22,0x36,0x00,0x00,0x43,0xa0,0x68,0x15,0x83,0x26,0xc3,0x42,0x62,0x90, | ||
3199 | 0x08,0x40,0x66,0x8c,0xc2,0x42,0x72,0xa0,0x23,0x20,0x52,0x00,0x2b,0x38,0x42,0x02, | ||
3200 | 0x23,0x50,0x42,0x02,0x02,0x2c,0x06,0x00,0x0b,0x50,0x87,0x00,0x3f,0x00,0xa5,0x30, | ||
3201 | 0x3f,0x00,0xc4,0x30,0x24,0x00,0x02,0x24,0x20,0x00,0x03,0x24,0x23,0x10,0x44,0x00, | ||
3202 | 0x2d,0x01,0x40,0x15,0x23,0x18,0x65,0x00,0x21,0x30,0x80,0x00,0x21,0x48,0xa0,0x00, | ||
3203 | 0x02,0x80,0x0b,0x3c,0x68,0x15,0x83,0x26,0x80,0x10,0x06,0x00,0x21,0x10,0x43,0x00, | ||
3204 | 0x0c,0x40,0x63,0x8c,0x18,0x40,0x44,0x8c,0xff,0x03,0x67,0x30,0x1b,0x01,0xe0,0x10, | ||
3205 | 0x82,0x2d,0x04,0x00,0x00,0x02,0x62,0x30,0x04,0x00,0x40,0x10,0x18,0x00,0xe5,0x00, | ||
3206 | 0x00,0xfc,0x02,0x24,0x25,0x38,0xe2,0x00,0x18,0x00,0xe5,0x00,0x82,0x22,0x03,0x00, | ||
3207 | 0xff,0x03,0x84,0x30,0x00,0x02,0x83,0x30,0x12,0x10,0x00,0x00,0x02,0x12,0x02,0x00, | ||
3208 | 0x03,0x00,0x60,0x10,0xff,0x03,0x48,0x30,0x00,0xfc,0x02,0x24,0x25,0x20,0x82,0x00, | ||
3209 | 0x18,0x00,0x85,0x00,0x80,0x2d,0x05,0x00,0x25,0xb0,0x06,0x3c,0x80,0x0c,0xc7,0x34, | ||
3210 | 0x94,0x0c,0xc6,0x34,0x12,0x20,0x00,0x00,0x02,0x22,0x04,0x00,0x3f,0x00,0x82,0x30, | ||
3211 | 0x00,0x14,0x02,0x00,0x25,0x28,0xa2,0x00,0x25,0x28,0xa8,0x00,0x10,0x00,0xa5,0xaf, | ||
3212 | 0x00,0x00,0xe5,0xac,0x00,0x00,0xc3,0x8c,0xff,0x0f,0x02,0x3c,0xc0,0x03,0x84,0x30, | ||
3213 | 0xff,0xff,0x42,0x34,0x80,0x25,0x04,0x00,0x24,0x18,0x62,0x00,0x25,0x18,0x64,0x00, | ||
3214 | 0x10,0x00,0xa3,0xaf,0x00,0x00,0xc3,0xac,0x68,0x15,0x83,0x26,0x08,0x40,0x62,0x8c, | ||
3215 | 0x00,0x00,0x00,0x00,0x08,0x01,0x40,0x04,0xc0,0x28,0x09,0x00,0x21,0x28,0xa3,0x00, | ||
3216 | 0xac,0x40,0xa3,0x90,0x25,0xb0,0x04,0x3c,0x22,0x0a,0x82,0x34,0x00,0x00,0x43,0xa0, | ||
3217 | 0xad,0x40,0xa6,0x90,0x23,0x0a,0x82,0x34,0x24,0x0a,0x87,0x34,0x00,0x00,0x46,0xa0, | ||
3218 | 0xae,0x40,0xa3,0x90,0x25,0x0a,0x86,0x34,0x26,0x0a,0x88,0x34,0x00,0x00,0xe3,0xa0, | ||
3219 | 0xaf,0x40,0xa2,0x90,0x27,0x0a,0x87,0x34,0x28,0x0a,0x89,0x34,0x00,0x00,0xc2,0xa0, | ||
3220 | 0xb0,0x40,0xa3,0x90,0x29,0x0a,0x84,0x34,0x00,0x00,0x03,0xa1,0xb1,0x40,0xa2,0x90, | ||
3221 | 0x00,0x00,0x00,0x00,0x00,0x00,0xe2,0xa0,0xb2,0x40,0xa3,0x90,0x00,0x00,0x00,0x00, | ||
3222 | 0x00,0x00,0x23,0xa1,0xb3,0x40,0xa2,0x90,0x00,0x00,0x00,0x00,0x00,0x00,0x82,0xa0, | ||
3223 | 0x8e,0x7d,0x63,0x91,0x22,0x00,0x02,0x24,0x03,0x00,0x62,0x10,0x92,0x00,0x02,0x24, | ||
3224 | 0x62,0xff,0x62,0x14,0x00,0x00,0x00,0x00,0x68,0x15,0x82,0x26,0x08,0x40,0x43,0x8c, | ||
3225 | 0x01,0x00,0x44,0x39,0x24,0x00,0x02,0x24,0x02,0x1a,0x03,0x00,0x3f,0x00,0x63,0x30, | ||
3226 | 0x01,0x00,0x84,0x30,0x04,0x01,0x80,0x10,0x23,0x28,0x43,0x00,0x42,0x18,0x0a,0x00, | ||
3227 | 0x40,0x10,0x03,0x00,0x21,0x50,0x43,0x00,0x68,0x15,0x83,0x26,0xc3,0x42,0x62,0x90, | ||
3228 | 0x00,0x00,0x00,0x00,0x2b,0x10,0x42,0x02,0x08,0x01,0x40,0x10,0x21,0x20,0x00,0x00, | ||
3229 | 0x2b,0x10,0x45,0x01,0x07,0x00,0x40,0x10,0x24,0x00,0x04,0x24,0x08,0x40,0x62,0x8c, | ||
3230 | 0x00,0x00,0x00,0x00,0x02,0x12,0x02,0x00,0x3f,0x00,0x42,0x30,0x21,0x20,0x4a,0x00, | ||
3231 | 0x68,0x15,0x83,0x26,0x80,0x10,0x04,0x00,0x10,0x40,0x66,0x8c,0x21,0x10,0x43,0x00, | ||
3232 | 0x18,0x40,0x44,0x8c,0x82,0x3a,0x06,0x00,0xff,0x03,0xe7,0x30,0xf0,0x00,0xe0,0x10, | ||
3233 | 0x82,0x2d,0x04,0x00,0x00,0x02,0xe2,0x30,0x04,0x00,0x40,0x10,0x18,0x00,0xe5,0x00, | ||
3234 | 0x00,0xfc,0x02,0x24,0x25,0x38,0xe2,0x00,0x18,0x00,0xe5,0x00,0x02,0x25,0x06,0x00, | ||
3235 | 0xff,0x03,0x84,0x30,0x00,0x02,0x83,0x30,0x12,0x10,0x00,0x00,0x02,0x12,0x02,0x00, | ||
3236 | 0x03,0x00,0x60,0x10,0xff,0x03,0x48,0x30,0x00,0xfc,0x02,0x24,0x25,0x20,0x82,0x00, | ||
3237 | 0x18,0x00,0x85,0x00,0x80,0x2d,0x05,0x00,0x25,0xb0,0x06,0x3c,0x88,0x0c,0xc7,0x34, | ||
3238 | 0x9c,0x0c,0xc6,0x34,0x12,0x20,0x00,0x00,0x02,0x22,0x04,0x00,0x3f,0x00,0x82,0x30, | ||
3239 | 0x00,0x14,0x02,0x00,0x25,0x28,0xa2,0x00,0x25,0x28,0xa8,0x00,0x10,0x00,0xa5,0xaf, | ||
3240 | 0x00,0x00,0xe5,0xac,0x00,0x00,0xc3,0x8c,0xff,0x0f,0x02,0x3c,0xc0,0x03,0x84,0x30, | ||
3241 | 0xff,0xff,0x42,0x34,0x80,0x25,0x04,0x00,0x24,0x18,0x62,0x00,0x25,0x18,0x64,0x00, | ||
3242 | 0x10,0x00,0xa3,0xaf,0x00,0x00,0xc3,0xac,0x95,0x54,0x00,0x08,0x00,0x00,0x00,0x00, | ||
3243 | 0x80,0x0c,0x42,0x34,0x00,0x00,0x43,0x8c,0xc0,0xff,0x02,0x3c,0x21,0x88,0x00,0x00, | ||
3244 | 0x24,0x28,0x62,0x00,0xc0,0xff,0x04,0x3c,0x8a,0x55,0x00,0x08,0x18,0x40,0xc3,0x24, | ||
3245 | 0x01,0x00,0x31,0x26,0x25,0x00,0x22,0x2e,0x0d,0x00,0x40,0x10,0x02,0x80,0x0b,0x3c, | ||
3246 | 0x00,0x00,0x62,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x44,0x00,0xf8,0xff,0x45,0x14, | ||
3247 | 0x04,0x00,0x63,0x24,0x08,0x40,0xc2,0x8c,0xc0,0xff,0x03,0x24,0x3f,0x00,0x24,0x32, | ||
3248 | 0x24,0x10,0x43,0x00,0x25,0x10,0x44,0x00,0x08,0x40,0xc2,0xac,0x02,0x80,0x0b,0x3c, | ||
3249 | 0x8e,0x7d,0x63,0x91,0x22,0x00,0x02,0x24,0x3e,0x00,0x62,0x10,0x92,0x00,0x02,0x24, | ||
3250 | 0x3d,0x00,0x62,0x10,0x25,0xb0,0x02,0x3c,0x25,0xb0,0x02,0x3c,0x24,0x0a,0x42,0x34, | ||
3251 | 0x00,0x00,0x44,0x8c,0x3f,0x3f,0x03,0x3c,0x3f,0x3f,0x63,0x34,0x24,0x20,0x83,0x00, | ||
3252 | 0x02,0x80,0x02,0x3c,0x02,0x80,0x03,0x3c,0x16,0x56,0x53,0x24,0x1e,0x57,0x72,0x24, | ||
3253 | 0x21,0x88,0x00,0x00,0xb1,0x55,0x00,0x08,0x10,0x00,0xa4,0xaf,0xd4,0x45,0x00,0x0c, | ||
3254 | 0x00,0x00,0x00,0x00,0x47,0x00,0x40,0x10,0x68,0x15,0x85,0x26,0x01,0x00,0x31,0x26, | ||
3255 | 0x21,0x00,0x22,0x2e,0x17,0x00,0x40,0x10,0x68,0x15,0x84,0x26,0xc0,0x80,0x11,0x00, | ||
3256 | 0x10,0x00,0xa4,0x27,0x21,0x28,0x13,0x02,0xd4,0x45,0x00,0x0c,0x04,0x00,0x06,0x24, | ||
3257 | 0x21,0x28,0x12,0x02,0x10,0x00,0xa4,0x27,0xf0,0xff,0x40,0x14,0x04,0x00,0x06,0x24, | ||
3258 | 0x68,0x15,0x85,0x26,0x08,0x40,0xa3,0x8c,0xc0,0xff,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
3259 | 0x3f,0x00,0x24,0x32,0x24,0x18,0x62,0x00,0x00,0x24,0x04,0x00,0xff,0x7f,0x02,0x3c, | ||
3260 | 0x25,0x18,0x64,0x00,0xff,0xff,0x42,0x34,0x24,0x18,0x62,0x00,0x08,0x40,0xa3,0xac, | ||
3261 | 0x68,0x15,0x84,0x26,0x0c,0x40,0x83,0x8c,0x00,0x40,0x02,0x3c,0x25,0x18,0x62,0x00, | ||
3262 | 0x25,0xb0,0x02,0x3c,0x0e,0x0c,0x42,0x34,0x0c,0x40,0x83,0xac,0x00,0x00,0x40,0xa0, | ||
3263 | 0x8f,0x54,0x00,0x08,0x68,0x15,0x85,0x26,0xc6,0x42,0x02,0xa2,0xba,0x54,0x00,0x08, | ||
3264 | 0xc4,0x42,0x12,0xa6,0xda,0x53,0x00,0x0c,0x00,0x00,0x00,0x00,0xc9,0x54,0x00,0x08, | ||
3265 | 0xc4,0x42,0x12,0xa6,0x25,0xb0,0x02,0x3c,0x88,0x0c,0x42,0x34,0x00,0x00,0x44,0x8c, | ||
3266 | 0x02,0x80,0x03,0x3c,0x68,0x15,0x66,0x24,0xc0,0xff,0x02,0x3c,0x24,0x28,0x82,0x00, | ||
3267 | 0x21,0x88,0x00,0x00,0xc0,0xff,0x04,0x3c,0xe6,0x55,0x00,0x08,0x18,0x40,0xc3,0x24, | ||
3268 | 0x01,0x00,0x31,0x26,0x25,0x00,0x22,0x2e,0xb8,0xff,0x40,0x10,0x25,0xb0,0x02,0x3c, | ||
3269 | 0x00,0x00,0x62,0x8c,0x00,0x00,0x00,0x00,0x24,0x10,0x44,0x00,0xf8,0xff,0x45,0x14, | ||
3270 | 0x04,0x00,0x63,0x24,0x08,0x40,0xc2,0x8c,0x3f,0x00,0x23,0x32,0xff,0xc0,0x04,0x24, | ||
3271 | 0x24,0x10,0x44,0x00,0x00,0x1a,0x03,0x00,0x25,0x10,0x43,0x00,0x9c,0x55,0x00,0x08, | ||
3272 | 0x08,0x40,0xc2,0xac,0x08,0x40,0xa3,0x8c,0xc0,0xff,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
3273 | 0x3f,0x00,0x24,0x32,0x24,0x18,0x62,0x00,0x00,0x24,0x04,0x00,0x25,0x18,0x64,0x00, | ||
3274 | 0x00,0x80,0x02,0x3c,0xc5,0x55,0x00,0x08,0x25,0x18,0x62,0x00,0xcc,0xff,0x02,0x24, | ||
3275 | 0x00,0x00,0x62,0xa0,0xcd,0x54,0x00,0x08,0x68,0x15,0x83,0x26,0x25,0xb0,0x02,0x3c, | ||
3276 | 0x94,0x0c,0x43,0x34,0x80,0x0c,0x42,0x34,0x00,0x00,0x44,0xac,0x00,0x00,0x60,0xac, | ||
3277 | 0x0d,0x55,0x00,0x08,0x68,0x15,0x83,0x26,0x2f,0x00,0xe0,0x10,0x21,0x30,0x00,0x00, | ||
3278 | 0x2b,0x10,0x42,0x01,0x21,0x20,0x8a,0x00,0x00,0x00,0x42,0x38,0x24,0x00,0x06,0x24, | ||
3279 | 0x2b,0x18,0x43,0x01,0x0b,0x30,0x82,0x00,0xcd,0xfe,0x60,0x10,0x20,0x00,0x09,0x24, | ||
3280 | 0x68,0x15,0x83,0x26,0x0a,0x40,0x62,0x94,0x02,0x80,0x0b,0x3c,0x3f,0x00,0x42,0x30, | ||
3281 | 0xe0,0x54,0x00,0x08,0x21,0x48,0x4a,0x00,0x21,0x28,0xa3,0x00,0xb4,0x41,0xa3,0x90, | ||
3282 | 0x25,0xb0,0x04,0x3c,0x22,0x0a,0x82,0x34,0x00,0x00,0x43,0xa0,0xb5,0x41,0xa6,0x90, | ||
3283 | 0x23,0x0a,0x82,0x34,0x24,0x0a,0x87,0x34,0x00,0x00,0x46,0xa0,0xb6,0x41,0xa3,0x90, | ||
3284 | 0x25,0x0a,0x86,0x34,0x26,0x0a,0x88,0x34,0x00,0x00,0xe3,0xa0,0xb7,0x41,0xa2,0x90, | ||
3285 | 0x27,0x0a,0x87,0x34,0x28,0x0a,0x89,0x34,0x00,0x00,0xc2,0xa0,0xb8,0x41,0xa3,0x90, | ||
3286 | 0x29,0x0a,0x84,0x34,0x00,0x00,0x03,0xa1,0xb9,0x41,0xa2,0x90,0x00,0x00,0x00,0x00, | ||
3287 | 0x00,0x00,0xe2,0xa0,0xba,0x41,0xa3,0x90,0x00,0x00,0x00,0x00,0x00,0x00,0x23,0xa1, | ||
3288 | 0xbb,0x41,0xa2,0x90,0x2d,0x55,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xa0, | ||
3289 | 0xad,0x54,0x00,0x08,0x68,0x15,0x84,0x26,0x23,0x10,0x8a,0x00,0x2b,0x18,0x44,0x01, | ||
3290 | 0x2b,0x20,0x45,0x01,0x0b,0x30,0x43,0x00,0xa1,0xfe,0x80,0x14,0x23,0x48,0xaa,0x00, | ||
3291 | 0xde,0x54,0x00,0x08,0x21,0x48,0x00,0x00,0xff,0xff,0x43,0x25,0x42,0x18,0x03,0x00, | ||
3292 | 0x40,0x10,0x03,0x00,0x21,0x10,0x43,0x00,0x40,0x55,0x00,0x08,0x01,0x00,0x4a,0x24, | ||
3293 | 0x25,0xb0,0x02,0x3c,0x9c,0x0c,0x43,0x34,0x88,0x0c,0x42,0x34,0x00,0x00,0x44,0xac, | ||
3294 | 0x00,0x00,0x60,0xac,0x95,0x54,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x40,0x62,0x8c, | ||
3295 | 0x00,0x00,0x00,0x00,0x02,0x12,0x02,0x00,0x3f,0x00,0x42,0x30,0x23,0x18,0x4a,0x00, | ||
3296 | 0x2b,0x10,0x42,0x01,0x4e,0x55,0x00,0x08,0x0b,0x20,0x62,0x00,0xff,0xff,0x05,0x36, | ||
3297 | 0x60,0x00,0x06,0x24,0xba,0x44,0x00,0x0c,0x24,0x00,0x04,0x24,0x84,0x0a,0x00,0x0c, | ||
3298 | 0xe8,0x03,0x04,0x24,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38, | ||
3299 | 0x00,0x60,0x81,0x40,0x24,0x00,0x04,0x24,0xdd,0x44,0x00,0x0c,0xff,0xff,0x05,0x36, | ||
3300 | 0x1f,0x00,0x52,0x30,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
3301 | 0xb3,0x0a,0x00,0x0c,0x64,0x00,0x04,0x24,0xb4,0x54,0x00,0x08,0x68,0x15,0x90,0x26, | ||
3302 | 0x00,0xff,0x84,0x30,0x02,0x22,0x04,0x00,0x08,0x00,0x80,0x10,0x02,0x80,0x02,0x3c, | ||
3303 | 0xff,0x00,0x02,0x24,0x04,0x00,0x82,0x10,0xcc,0xff,0x03,0x24,0x02,0x80,0x02,0x3c, | ||
3304 | 0x08,0x00,0xe0,0x03,0x4e,0x58,0x43,0xa0,0x02,0x80,0x02,0x3c,0x08,0x00,0xe0,0x03, | ||
3305 | 0x4e,0x58,0x44,0xa0,0x02,0x24,0x04,0x00,0xff,0x00,0x84,0x30,0xc0,0x10,0x04,0x00, | ||
3306 | 0x21,0x10,0x44,0x00,0x80,0x10,0x02,0x00,0x21,0x10,0x44,0x00,0x02,0x80,0x03,0x3c, | ||
3307 | 0x80,0x10,0x02,0x00,0x68,0x15,0x63,0x24,0x20,0x00,0x84,0x2c,0x09,0x00,0x80,0x10, | ||
3308 | 0x21,0x10,0x43,0x00,0x68,0x51,0x43,0x8c,0x25,0xb0,0x02,0x3c,0xc4,0x02,0x42,0x34, | ||
3309 | 0x02,0x19,0x03,0x00,0x7f,0x00,0x63,0x30,0x00,0x00,0x43,0xac,0x08,0x00,0xe0,0x03, | ||
3310 | 0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c,0x44,0x79,0x43,0x8c,0x25,0xb0,0x02,0x3c, | ||
3311 | 0xc4,0x02,0x42,0x34,0x02,0x19,0x03,0x00,0x7f,0x00,0x63,0x30,0x00,0x00,0x43,0xac, | ||
3312 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xff,0x00,0x85,0x30,0xd2,0xff,0xa3,0x24, | ||
3313 | 0xfe,0xff,0xa2,0x24,0xda,0xff,0xa4,0x24,0x04,0x00,0x63,0x2c,0x08,0x00,0x84,0x2c, | ||
3314 | 0x06,0x00,0x60,0x14,0xff,0x00,0x42,0x30,0xf0,0xff,0xa2,0x24,0xfc,0xff,0xa3,0x24, | ||
3315 | 0x16,0x00,0x46,0x2c,0x03,0x00,0x80,0x10,0xff,0x00,0x62,0x30,0x08,0x00,0xe0,0x03, | ||
3316 | 0x00,0x00,0x00,0x00,0xfa,0xff,0xa3,0x24,0xfc,0xff,0xc0,0x10,0x21,0x10,0xa0,0x00, | ||
3317 | 0x08,0x00,0xe0,0x03,0xff,0x00,0x62,0x30,0x25,0xb0,0x04,0x3c,0x03,0x0d,0x85,0x34, | ||
3318 | 0x00,0x00,0xa3,0x90,0x2d,0x0a,0x84,0x34,0xff,0x00,0x63,0x30,0x08,0x00,0x63,0x34, | ||
3319 | 0x00,0x00,0xa3,0xa0,0x00,0x00,0xa2,0x90,0x00,0x00,0x00,0x00,0xf7,0x00,0x42,0x30, | ||
3320 | 0x00,0x00,0xa2,0xa0,0x00,0x00,0x83,0x90,0x00,0x00,0x00,0x00,0x3f,0x00,0x63,0x30, | ||
3321 | 0x00,0x00,0x83,0xa0,0x00,0x00,0x82,0x90,0x80,0xff,0x03,0x24,0x25,0x10,0x43,0x00, | ||
3322 | 0x00,0x00,0x82,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x25,0xb0,0x02,0x3c, | ||
3323 | 0xff,0x00,0x03,0x3c,0x82,0x01,0x49,0x34,0x81,0x01,0x48,0x34,0x24,0x10,0x83,0x00, | ||
3324 | 0x02,0x3c,0x02,0x00,0x00,0xff,0x63,0x34,0x02,0x80,0x02,0x3c,0x68,0x15,0x45,0x24, | ||
3325 | 0x02,0x32,0x04,0x00,0x01,0x00,0x02,0x24,0x24,0x20,0x83,0x00,0xc2,0x4c,0xa2,0xa0, | ||
3326 | 0xb0,0x4c,0xa0,0xac,0xb4,0x4c,0xa0,0xac,0xb8,0x4c,0xa0,0xac,0x06,0x00,0x80,0x14, | ||
3327 | 0xbc,0x4c,0xa0,0xac,0x00,0x00,0x02,0x91,0x00,0x00,0x23,0x91,0xc0,0x4c,0xa2,0xa0, | ||
3328 | 0x08,0x00,0xe0,0x03,0xc1,0x4c,0xa3,0xa0,0xc1,0x4c,0xa7,0xa0,0x08,0x00,0xe0,0x03, | ||
3329 | 0xc0,0x4c,0xa6,0xa0,0x02,0x80,0x03,0x3c,0x68,0x15,0x63,0x24,0xc1,0x4c,0x66,0x90, | ||
3330 | 0xc0,0x4c,0x65,0x90,0x25,0xb0,0x02,0x3c,0x82,0x01,0x44,0x34,0x81,0x01,0x42,0x34, | ||
3331 | 0x00,0x00,0x45,0xa0,0x00,0x00,0x86,0xa0,0x08,0x00,0xe0,0x03,0xc2,0x4c,0x60,0xa0, | ||
3332 | 0x02,0x80,0x08,0x3c,0x68,0x15,0x04,0x25,0xc2,0x4c,0x82,0x90,0x00,0x00,0x00,0x00, | ||
3333 | 0x15,0x00,0x40,0x10,0x21,0x18,0x00,0x00,0xb4,0x4c,0x82,0x8c,0xb0,0x4c,0x85,0x8c, | ||
3334 | 0x25,0xb0,0x03,0x3c,0x40,0x11,0x02,0x00,0x2b,0x10,0xa2,0x00,0x82,0x01,0x67,0x34, | ||
3335 | 0x0f,0x00,0x40,0x10,0x81,0x01,0x66,0x34,0xc1,0x4c,0x83,0x90,0xc0,0x4c,0x82,0x90, | ||
3336 | 0xf0,0x00,0x63,0x30,0x1f,0x00,0x42,0x30,0x00,0x00,0xc2,0xa0,0x00,0x00,0xe3,0xa0, | ||
3337 | 0x68,0x15,0x02,0x25,0x01,0x00,0x03,0x24,0xbc,0x4c,0x40,0xac,0xb0,0x4c,0x40,0xac, | ||
3338 | 0xb4,0x4c,0x40,0xac,0xb8,0x4c,0x40,0xac,0x08,0x00,0xe0,0x03,0x21,0x10,0x60,0x00, | ||
3339 | 0xb8,0x4c,0x82,0x8c,0x25,0xb0,0x03,0x3c,0x82,0x01,0x69,0x34,0x40,0x11,0x02,0x00, | ||
3340 | 0x2b,0x10,0xa2,0x00,0x0e,0x00,0x40,0x14,0x81,0x01,0x66,0x34,0xbc,0x4c,0x82,0x8c, | ||
3341 | 0x00,0x00,0x00,0x00,0x40,0x11,0x02,0x00,0x2b,0x10,0xa2,0x00,0x08,0x00,0x40,0x14, | ||
3342 | 0x00,0x00,0x00,0x00,0xc1,0x4c,0x83,0x90,0xc0,0x4c,0x82,0x90,0x00,0x00,0x00,0x00, | ||
3343 | 0x00,0x00,0xc2,0xa0,0x00,0x00,0x23,0xa1,0xf7,0x56,0x00,0x08,0x68,0x15,0x02,0x25, | ||
3344 | 0xc1,0x4c,0x83,0x90,0xc0,0x4c,0x82,0x90,0xf0,0x00,0x63,0x30,0x7f,0x00,0x42,0x30, | ||
3345 | 0x00,0x00,0xc2,0xa0,0x00,0x00,0x23,0xa1,0xf7,0x56,0x00,0x08,0x68,0x15,0x02,0x25, | ||
3346 | 0x02,0x00,0x03,0x24,0x02,0x80,0x02,0x3c,0x08,0x00,0xe0,0x03,0x3d,0x58,0x43,0xa0, | ||
3347 | 0xcc,0xff,0x03,0x24,0x02,0x80,0x02,0x3c,0x08,0x00,0xe0,0x03,0x3d,0x58,0x43,0xa0, | ||
3348 | 0x25,0xb0,0x03,0x3c,0x33,0x02,0x65,0x34,0x00,0x11,0x04,0x00,0x00,0x00,0xa2,0xa0, | ||
3349 | 0x30,0x02,0x63,0x34,0x00,0x00,0x65,0x8c,0x0f,0x00,0x02,0x3c,0xff,0xff,0x42,0x34, | ||
3350 | 0x24,0x28,0xa2,0x00,0x01,0x00,0x03,0x24,0x04,0x18,0x83,0x00,0x02,0x00,0xa0,0x10, | ||
3351 | 0x21,0x10,0x00,0x00,0xff,0xff,0x62,0x30,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
3352 | 0xe0,0xff,0xbd,0x27,0x14,0x00,0xb1,0xaf,0x25,0xb0,0x11,0x3c,0x18,0x00,0xb2,0xaf, | ||
3353 | 0x4c,0x00,0x22,0x36,0x1c,0x00,0xbf,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x00,0x44,0x90, | ||
3354 | 0x02,0x80,0x03,0x3c,0x02,0x00,0x02,0x24,0xff,0x00,0x84,0x30,0x07,0x00,0x82,0x10, | ||
3355 | 0x68,0x15,0x72,0x24,0x1c,0x00,0xbf,0x8f,0x18,0x00,0xb2,0x8f,0x14,0x00,0xb1,0x8f, | ||
3356 | 0x10,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0xe6,0x63,0x43,0x96, | ||
3357 | 0x01,0x00,0x02,0x24,0xf7,0xff,0x62,0x14,0x21,0x20,0x00,0x00,0x22,0x57,0x00,0x0c, | ||
3358 | 0x00,0x00,0x00,0x00,0x04,0x00,0x04,0x24,0x22,0x57,0x00,0x0c,0x21,0x80,0x40,0x00, | ||
3359 | 0x25,0x80,0x02,0x02,0x33,0x02,0x23,0x36,0x08,0x00,0x02,0x24,0xff,0xff,0x10,0x32, | ||
3360 | 0x40,0x00,0x25,0x36,0x00,0x00,0x62,0xa0,0xea,0xff,0x00,0x16,0x00,0x00,0x00,0x00, | ||
3361 | 0x00,0x00,0xa2,0x94,0xe4,0x63,0x43,0x96,0xff,0xdf,0x42,0x30,0x00,0x20,0x44,0x34, | ||
3362 | 0x01,0x00,0x63,0x24,0xe4,0x63,0x43,0xa6,0x00,0x00,0xa2,0xa4,0x00,0x00,0xa4,0xa4, | ||
3363 | 0x3f,0x57,0x00,0x08,0x00,0x00,0x00,0x00,0x01,0x80,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
3364 | 0x18,0x03,0x42,0x34,0x80,0x5d,0x63,0x24,0x00,0x00,0x43,0xac,0x63,0x00,0x02,0x24, | ||
3365 | 0xff,0xff,0x42,0x24,0xff,0xff,0x41,0x04,0xff,0xff,0x42,0x24,0x02,0x80,0x02,0x3c, | ||
3366 | 0x88,0x7d,0x45,0x94,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x8b,0x7d,0x66,0x90, | ||
3367 | 0x98,0x7d,0x47,0x90,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0xa3,0x7d,0x69,0x90, | ||
3368 | 0xa5,0x7d,0x4a,0x90,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0xa8,0x7d,0x6b,0x90, | ||
3369 | 0xaa,0x7d,0x4c,0x90,0x07,0x00,0x03,0x24,0x02,0x80,0x02,0x3c,0x25,0xb0,0x04,0x3c, | ||
3370 | 0x95,0x7d,0x43,0xa0,0xb0,0x03,0x84,0x34,0x02,0x80,0x02,0x3c,0x02,0x80,0x18,0x3c, | ||
3371 | 0x8a,0x7d,0x08,0x93,0x00,0x00,0x85,0xac,0x96,0x7d,0x40,0xa0,0x02,0x80,0x02,0x3c, | ||
3372 | 0x00,0x00,0x86,0xac,0x02,0x80,0x0f,0x3c,0x97,0x7d,0x40,0xa0,0x02,0x80,0x02,0x3c, | ||
3373 | 0x00,0x00,0x87,0xac,0x68,0x15,0xee,0x25,0xb8,0x7d,0x40,0xa0,0xfd,0xff,0x02,0x24, | ||
3374 | 0xd5,0x4a,0xc2,0xa1,0x01,0x00,0x03,0x24,0x00,0x78,0x02,0x24,0xd4,0x4a,0xc3,0xa1, | ||
3375 | 0xd8,0x4a,0xc2,0xa5,0xff,0x07,0x03,0x24,0x0f,0x00,0x0d,0x31,0x02,0x00,0x02,0x24, | ||
3376 | 0xda,0x4a,0xc3,0xa5,0x00,0x00,0x88,0xac,0x00,0x00,0x89,0xac,0x00,0x00,0x8a,0xac, | ||
3377 | 0x00,0x00,0x8b,0xac,0x00,0x00,0x8c,0xac,0x17,0x00,0xa2,0x11,0x02,0x80,0x02,0x3c, | ||
3378 | 0x8a,0x7d,0x02,0x93,0x01,0x00,0x03,0x24,0x0f,0x00,0x42,0x30,0x05,0x00,0x43,0x10, | ||
3379 | 0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c,0xca,0x7d,0x40,0xa4,0x08,0x00,0xe0,0x03, | ||
3380 | 0x00,0x00,0x00,0x00,0x00,0x80,0x02,0x3c,0x68,0x15,0xe4,0x25,0x02,0xbc,0x42,0x34, | ||
3381 | 0x68,0x4b,0x82,0xac,0x15,0x15,0x03,0x3c,0x02,0x02,0x02,0x3c,0x07,0x07,0x63,0x34, | ||
3382 | 0x64,0x4b,0x82,0xac,0x02,0x80,0x02,0x3c,0x60,0x4b,0x83,0xac,0xca,0x7d,0x40,0xa4, | ||
3383 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x8f,0x7d,0x44,0x90,0x06,0x00,0x03,0x24, | ||
3384 | 0x15,0x00,0x83,0x10,0x0b,0x00,0x02,0x24,0x0a,0x00,0x82,0x10,0x00,0xe0,0x02,0x3c, | ||
3385 | 0x68,0x15,0xe4,0x25,0x00,0xb2,0x42,0x34,0x00,0x1c,0x03,0x3c,0x68,0x4b,0x82,0xac, | ||
3386 | 0x00,0x1c,0x63,0x34,0x00,0x04,0x02,0x24,0x60,0x4b,0x83,0xac,0x9a,0x57,0x00,0x08, | ||
3387 | 0x64,0x4b,0x82,0xac,0x00,0x80,0x02,0x3c,0x00,0xbc,0x42,0x34,0x15,0x15,0x03,0x3c, | ||
3388 | 0x68,0x4b,0xc2,0xad,0x07,0x07,0x63,0x34,0x03,0x03,0x02,0x3c,0x60,0x4b,0xc3,0xad, | ||
3389 | 0x9a,0x57,0x00,0x08,0x64,0x4b,0xc2,0xad,0x00,0xc0,0x02,0x3c,0x00,0xb2,0x42,0x34, | ||
3390 | 0x1c,0x1c,0x03,0x3c,0x68,0x4b,0xc2,0xad,0x07,0x07,0x63,0x34,0x00,0x04,0x02,0x24, | ||
3391 | 0x60,0x4b,0xc3,0xad,0x9a,0x57,0x00,0x08,0x64,0x4b,0xc2,0xad,0x25,0xb0,0x02,0x3c, | ||
3392 | 0x4d,0x00,0x44,0x34,0xff,0x00,0x03,0x3c,0xec,0x02,0x42,0x34,0x00,0x00,0x43,0xac, | ||
3393 | 0x00,0x00,0x80,0xa0,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x01,0x80,0x03,0x3c, | ||
3394 | 0x25,0xb0,0x02,0x3c,0x64,0x5f,0x63,0x24,0x18,0x03,0x42,0x34,0x00,0x00,0x43,0xac, | ||
3395 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x7f,0x00,0x02,0x3c,0xfd,0xbf,0x45,0x34, | ||
3396 | 0x80,0x04,0x03,0x3c,0x25,0x28,0xa3,0x00,0x00,0x08,0x04,0x3c,0x02,0x80,0x02,0x3c, | ||
3397 | 0x68,0x15,0x42,0x24,0x25,0x28,0xa4,0x00,0x41,0xb0,0x03,0x3c,0x00,0x00,0x65,0xac, | ||
3398 | 0x04,0x4b,0x45,0xac,0xfc,0x4a,0x45,0xac,0x08,0x00,0x63,0x34,0x86,0x00,0x05,0x24, | ||
3399 | 0x00,0x00,0x65,0xa4,0x08,0x4b,0x45,0xa4,0x00,0x4b,0x40,0xac,0x0a,0x4b,0x40,0xa4, | ||
3400 | 0x0c,0x4b,0x45,0xa4,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40, | ||
3401 | 0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xf8,0x57,0x00,0x08,0x00,0x00,0x00,0x00, | ||
3402 | 0x42,0xb0,0x02,0x3c,0xa0,0xff,0x03,0x24,0x01,0x00,0x42,0x34,0xe8,0xff,0xbd,0x27, | ||
3403 | 0x21,0x20,0x00,0x00,0x01,0x00,0x05,0x24,0x00,0x01,0x06,0x24,0x00,0x00,0x43,0xa0, | ||
3404 | 0x10,0x00,0xbf,0xaf,0xc4,0x0c,0x00,0x0c,0x00,0x00,0x00,0x00,0x10,0x00,0xbf,0x8f, | ||
3405 | 0x03,0x00,0x04,0x24,0x01,0x00,0x05,0x24,0x40,0x1f,0x06,0x24,0xc4,0x0c,0x00,0x08, | ||
3406 | 0x18,0x00,0xbd,0x27,0xe8,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0x14,0x00,0xbf,0xaf, | ||
3407 | 0x21,0x5b,0x00,0x0c,0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c,0x68,0x15,0x42,0x24, | ||
3408 | 0x48,0x01,0x03,0x24,0xe0,0x63,0x43,0xac,0xdc,0x63,0x43,0xac,0x21,0x80,0x40,0x00, | ||
3409 | 0x1f,0x00,0x03,0x24,0xff,0xff,0x63,0x24,0xc4,0x4c,0x40,0xa4,0xc6,0x4c,0x40,0xa4, | ||
3410 | 0xc8,0x4c,0x40,0xa4,0xca,0x4c,0x40,0xa4,0xcc,0x4c,0x40,0xa4,0xce,0x4c,0x40,0xa4, | ||
3411 | 0xd0,0x4c,0x40,0xa4,0xd2,0x4c,0x40,0xa4,0xd4,0x4c,0x40,0xa4,0xf5,0xff,0x61,0x04, | ||
3412 | 0x24,0x00,0x42,0x24,0x25,0xb0,0x02,0x3c,0x10,0x00,0x03,0x24,0xb0,0x03,0x42,0x34, | ||
3413 | 0x02,0x80,0x04,0x3c,0x8c,0x58,0x84,0x24,0x00,0x00,0x43,0xac,0x21,0x28,0x00,0x00, | ||
3414 | 0x97,0x45,0x00,0x0c,0x04,0x00,0x06,0x24,0xef,0x5b,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3415 | 0x71,0x5c,0x00,0x0c,0x8c,0x65,0x00,0xae,0xa7,0x5d,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3416 | 0x4b,0x5e,0x00,0x0c,0x00,0x00,0x00,0x00,0x02,0x80,0x03,0x3c,0x8e,0x7d,0x64,0x90, | ||
3417 | 0x92,0x00,0x02,0x24,0x03,0x00,0x82,0x10,0x00,0x00,0x00,0x00,0xf7,0x5d,0x00,0x0c, | ||
3418 | 0x00,0x00,0x00,0x00,0xdd,0x5d,0x00,0x0c,0x00,0x00,0x00,0x00,0x8b,0x5c,0x00,0x0c, | ||
3419 | 0x00,0x00,0x00,0x00,0xe4,0x63,0x00,0xa6,0x67,0x5e,0x00,0x0c,0xe6,0x63,0x00,0xa6, | ||
3420 | 0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f,0x02,0x80,0x04,0x3c,0x02,0x80,0x05,0x3c, | ||
3421 | 0xf8,0x7a,0x82,0x24,0x00,0x7b,0xa3,0x24,0x18,0x00,0xbd,0x27,0x04,0x00,0x42,0xac, | ||
3422 | 0xf8,0x7a,0x82,0xac,0x00,0x7b,0xa3,0xac,0x08,0x00,0xe0,0x03,0x04,0x00,0x63,0xac, | ||
3423 | 0xe8,0xff,0xbd,0x27,0x10,0x00,0xb0,0xaf,0x01,0x80,0x02,0x3c,0x25,0xb0,0x10,0x3c, | ||
3424 | 0x18,0x03,0x03,0x36,0x38,0x61,0x42,0x24,0x00,0x00,0x62,0xac,0x14,0x00,0xbf,0xaf, | ||
3425 | 0x60,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0xd5,0x58,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3426 | 0x01,0x00,0x03,0x24,0x02,0x80,0x02,0x3c,0xfd,0x5a,0x00,0x0c,0xdb,0x60,0x43,0xa0, | ||
3427 | 0xd1,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0x32,0x41,0x00,0x0c,0x00,0x00,0x00,0x00, | ||
3428 | 0x0b,0x58,0x00,0x0c,0x00,0x00,0x00,0x00,0x44,0x00,0x03,0x36,0x00,0x00,0x62,0x94, | ||
3429 | 0x00,0x00,0x00,0x00,0x40,0x00,0x42,0x34,0x00,0x00,0x62,0xa4,0xd9,0x57,0x00,0x0c, | ||
3430 | 0x00,0x00,0x00,0x00,0xfa,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0xc9,0x5a,0x00,0x0c, | ||
3431 | 0x00,0x00,0x00,0x00,0x8e,0x5a,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x80,0x04,0x3c, | ||
3432 | 0xb4,0x24,0x84,0x24,0xe6,0x5a,0x00,0x0c,0x01,0x00,0x05,0x24,0x01,0x80,0x04,0x3c, | ||
3433 | 0x08,0x1e,0x84,0x24,0xe6,0x5a,0x00,0x0c,0x02,0x00,0x05,0x24,0x81,0x4e,0x00,0x0c, | ||
3434 | 0x00,0x00,0x00,0x00,0x00,0x80,0x04,0x3c,0x54,0x34,0x84,0x24,0xe6,0x5a,0x00,0x0c, | ||
3435 | 0x03,0x00,0x05,0x24,0x02,0x80,0x02,0x3c,0x98,0x7d,0x43,0x90,0x43,0x00,0x04,0x36, | ||
3436 | 0x29,0x00,0x60,0x10,0xd8,0x00,0x10,0x36,0x07,0x00,0x02,0x24,0x2b,0x00,0x62,0x10, | ||
3437 | 0x25,0xb0,0x04,0x3c,0x10,0x02,0x86,0x34,0x43,0x00,0x85,0x34,0x03,0x00,0x02,0x24, | ||
3438 | 0x10,0x00,0x03,0x24,0x00,0x00,0xa2,0xa0,0xd8,0x00,0x84,0x34,0x00,0x00,0xc3,0xa0, | ||
3439 | 0x00,0x00,0x82,0x90,0x80,0xff,0x03,0x24,0x42,0xb0,0x05,0x3c,0x25,0x10,0x43,0x00, | ||
3440 | 0x00,0x00,0x82,0xa0,0x25,0xb0,0x04,0x3c,0x44,0x00,0x84,0x34,0x00,0x00,0x82,0x94, | ||
3441 | 0x00,0x00,0x00,0x00,0xc0,0x00,0x42,0x34,0x00,0x00,0x82,0xa4,0x00,0x00,0xa3,0x90, | ||
3442 | 0x00,0x00,0x00,0x00,0x01,0x00,0x63,0x34,0x00,0x00,0xa3,0xa0,0xe0,0x57,0x00,0x0c, | ||
3443 | 0x00,0x00,0x00,0x00,0x02,0x80,0x04,0x3c,0x08,0x00,0x84,0x24,0x21,0x28,0x00,0x00, | ||
3444 | 0x21,0x30,0x00,0x00,0x31,0x1c,0x00,0x0c,0x21,0x38,0x00,0x00,0xf8,0x57,0x00,0x0c, | ||
3445 | 0x00,0x00,0x00,0x00,0x14,0x00,0xbf,0x8f,0x10,0x00,0xb0,0x8f,0x01,0x00,0x02,0x24, | ||
3446 | 0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27,0x00,0x00,0x80,0xa0,0x00,0x00,0x03,0x92, | ||
3447 | 0x80,0xff,0x02,0x24,0x25,0x18,0x62,0x00,0x00,0x00,0x03,0xa2,0x25,0xb0,0x04,0x3c, | ||
3448 | 0x44,0x00,0x84,0x34,0x00,0x00,0x82,0x94,0x42,0xb0,0x05,0x3c,0xc0,0x00,0x42,0x34, | ||
3449 | 0x00,0x00,0x82,0xa4,0x00,0x00,0xa3,0x90,0x00,0x00,0x00,0x00,0x01,0x00,0x63,0x34, | ||
3450 | 0x00,0x00,0xa3,0xa0,0xe0,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0x02,0x80,0x04,0x3c, | ||
3451 | 0x08,0x00,0x84,0x24,0x21,0x28,0x00,0x00,0x21,0x30,0x00,0x00,0x31,0x1c,0x00,0x0c, | ||
3452 | 0x21,0x38,0x00,0x00,0xf8,0x57,0x00,0x0c,0x00,0x00,0x00,0x00,0x14,0x00,0xbf,0x8f, | ||
3453 | 0x10,0x00,0xb0,0x8f,0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x18,0x00,0xbd,0x27, | ||
3454 | 0x21,0x20,0x00,0x00,0x20,0xb0,0x06,0x3c,0xff,0xff,0x05,0x34,0x21,0x18,0x86,0x00, | ||
3455 | 0x04,0x00,0x84,0x24,0x2a,0x10,0xa4,0x00,0x00,0x00,0x60,0xac,0xfb,0xff,0x40,0x10, | ||
3456 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0xb8,0xff,0xbd,0x27, | ||
3457 | 0x25,0xb0,0x04,0x3c,0x44,0x00,0xbf,0xaf,0x40,0x00,0xbe,0xaf,0x3c,0x00,0xb7,0xaf, | ||
3458 | 0x38,0x00,0xb6,0xaf,0x34,0x00,0xb5,0xaf,0x30,0x00,0xb4,0xaf,0x2c,0x00,0xb3,0xaf, | ||
3459 | 0x28,0x00,0xb2,0xaf,0x24,0x00,0xb1,0xaf,0x20,0x00,0xb0,0xaf,0x0a,0x00,0x83,0x34, | ||
3460 | 0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x20,0x00,0x42,0x30,0x0c,0x00,0x40,0x10, | ||
3461 | 0x4c,0x87,0x02,0x3c,0x00,0x00,0x62,0x90,0x00,0x00,0x00,0x00,0x10,0x00,0x42,0x30, | ||
3462 | 0x66,0x01,0x40,0x10,0x4c,0x87,0x02,0x3c,0x54,0x00,0x83,0x34,0x50,0x00,0x82,0x34, | ||
3463 | 0x00,0x00,0x45,0xac,0x00,0x00,0x65,0xa4,0xf9,0x58,0x00,0x08,0x02,0x80,0x03,0x3c, | ||
3464 | 0x54,0x00,0x85,0x34,0x00,0xe0,0x42,0x34,0x50,0x00,0x84,0x34,0x12,0x01,0x03,0x24, | ||
3465 | 0x00,0x00,0x82,0xac,0x00,0x00,0xa3,0xac,0x02,0x80,0x03,0x3c,0x68,0x15,0x62,0x24, | ||
3466 | 0xd5,0x4a,0x43,0x90,0xda,0x4a,0x45,0x94,0x25,0xb0,0x1e,0x3c,0x1c,0x00,0xa3,0xa3, | ||
3467 | 0x60,0x4b,0x43,0x8c,0x58,0x00,0xc6,0x37,0xff,0xff,0x04,0x24,0x10,0x00,0xa3,0xaf, | ||
3468 | 0x64,0x4b,0x43,0x8c,0x5c,0x00,0xc7,0x37,0x60,0x00,0xc8,0x37,0x14,0x00,0xa3,0xaf, | ||
3469 | 0x68,0x4b,0x42,0x8c,0x64,0x00,0xc9,0x37,0x8a,0x00,0xca,0x37,0x18,0x00,0xa2,0xaf, | ||
3470 | 0x24,0x10,0x02,0x3c,0x21,0x28,0xa2,0x00,0x4c,0x81,0x02,0x3c,0x00,0xe0,0x42,0x34, | ||
3471 | 0x00,0x00,0xc2,0xac,0x96,0x01,0x03,0x24,0x28,0x28,0x02,0x24,0x00,0x00,0xe3,0xac, | ||
3472 | 0x89,0x00,0xcb,0x37,0x00,0x00,0x04,0xad,0x8c,0x00,0xcc,0x37,0x00,0x00,0x24,0xad, | ||
3473 | 0x09,0x00,0x03,0x24,0x00,0x00,0x42,0xa5,0x10,0x10,0x02,0x24,0x00,0x00,0x63,0xa1, | ||
3474 | 0x8e,0x00,0xcd,0x37,0x00,0x00,0x82,0xa5,0x0a,0x0a,0x03,0x24,0x13,0x00,0x02,0x24, | ||
3475 | 0x90,0x00,0xce,0x37,0x00,0x00,0xa3,0xa5,0x00,0x00,0xc2,0xa1,0x25,0xb0,0x02,0x3c, | ||
3476 | 0x40,0x00,0x03,0x24,0x91,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0x25,0xb0,0x03,0x3c, | ||
3477 | 0x3a,0x01,0x02,0x24,0x92,0x00,0x63,0x34,0x00,0x00,0x62,0xa4,0xb5,0x00,0xd1,0x37, | ||
3478 | 0x21,0x00,0x03,0x24,0x00,0x00,0x23,0xa2,0x10,0x00,0xa2,0x8f,0xa0,0x00,0xd2,0x37, | ||
3479 | 0xa4,0x00,0xd3,0x37,0x00,0x00,0x42,0xae,0x14,0x00,0xa3,0x8f,0xa8,0x00,0xd4,0x37, | ||
3480 | 0xac,0x00,0xd5,0x37,0x00,0x00,0x63,0xae,0x18,0x00,0xa2,0x8f,0x25,0xb0,0x03,0x3c, | ||
3481 | 0xb0,0x00,0x63,0x34,0x00,0x00,0x82,0xae,0x21,0x10,0x02,0x3c,0xff,0x77,0x42,0x34, | ||
3482 | 0x00,0x00,0xa2,0xae,0x25,0xb0,0x02,0x3c,0xd8,0x00,0x42,0x34,0x00,0x00,0x65,0xac, | ||
3483 | 0x00,0x00,0x40,0xa0,0x1c,0x00,0xa2,0x93,0x25,0xb0,0x03,0x3c,0xb4,0x00,0x63,0x34, | ||
3484 | 0x00,0x00,0x62,0xa0,0x25,0xb0,0x03,0x3c,0x04,0x00,0x02,0x24,0xb6,0x00,0x63,0x34, | ||
3485 | 0x00,0x00,0x62,0xa0,0x25,0xb0,0x03,0x3c,0x0f,0x00,0x02,0x24,0xba,0x00,0x63,0x34, | ||
3486 | 0xb9,0x00,0xdf,0x37,0x00,0x00,0xe4,0xa3,0x00,0x00,0x62,0xa4,0x25,0xb0,0x02,0x3c, | ||
3487 | 0x1a,0x01,0x42,0x34,0x16,0x01,0xd0,0x37,0x18,0x01,0xcf,0x37,0x00,0x00,0x00,0xa6, | ||
3488 | 0x25,0xb0,0x03,0x3c,0x00,0x00,0xe0,0xa5,0x00,0x00,0x40,0xa4,0xff,0xff,0x02,0x3c, | ||
3489 | 0xff,0x0f,0x42,0x34,0xdc,0x00,0x63,0x34,0x00,0x00,0x62,0xac,0x2f,0x00,0x03,0x3c, | ||
3490 | 0x25,0xb0,0x02,0x3c,0x32,0x32,0x63,0x34,0xd0,0x01,0x42,0x34,0x00,0x00,0x43,0xac, | ||
3491 | 0x5e,0x00,0x02,0x3c,0x25,0xb0,0x03,0x3c,0x32,0x43,0x42,0x34,0xd4,0x01,0x63,0x34, | ||
3492 | 0x00,0x00,0x62,0xac,0x08,0x00,0x03,0x3c,0x25,0xb0,0x02,0x3c,0x30,0xa5,0x63,0x34, | ||
3493 | 0xd8,0x01,0x42,0x34,0x00,0x00,0x43,0xac,0xdc,0x01,0xc4,0x37,0x02,0x80,0x03,0x3c, | ||
3494 | 0x49,0xa5,0x02,0x34,0x8e,0x7d,0x6d,0x90,0x00,0x00,0x82,0xac,0xc2,0x00,0x02,0x3c, | ||
3495 | 0x1a,0x06,0x03,0x24,0x51,0x10,0x42,0x34,0xe0,0x01,0xc5,0x37,0xf4,0x01,0xc6,0x37, | ||
3496 | 0xf8,0x01,0xc7,0x37,0x07,0x07,0x04,0x24,0x00,0x00,0xa3,0xa4,0x00,0x02,0xc8,0x37, | ||
3497 | 0x00,0x00,0xc4,0xa4,0x26,0x00,0x03,0x24,0x00,0x00,0xe2,0xac,0x03,0x02,0xc9,0x37, | ||
3498 | 0x04,0x00,0x02,0x24,0x00,0x00,0x03,0xa5,0x36,0x02,0xca,0x37,0x00,0x00,0x22,0xa1, | ||
3499 | 0xc0,0x01,0x03,0x24,0x0c,0x00,0x02,0x24,0x34,0x02,0xcb,0x37,0x00,0x00,0x42,0xa1, | ||
3500 | 0x37,0x02,0xcc,0x37,0x00,0x00,0x63,0xa5,0x03,0x00,0x02,0x24,0x22,0x00,0x03,0x24, | ||
3501 | 0x00,0x00,0x82,0xa1,0xd6,0x00,0xa3,0x11,0x1b,0x1b,0x02,0x3c,0x13,0x13,0x02,0x3c, | ||
3502 | 0x13,0x13,0x42,0x34,0x60,0x01,0xc3,0x37,0x64,0x01,0xc4,0x37,0x68,0x01,0xc5,0x37, | ||
3503 | 0x7c,0x01,0xca,0x37,0x6c,0x01,0xc6,0x37,0x70,0x01,0xc7,0x37,0x74,0x01,0xc8,0x37, | ||
3504 | 0x78,0x01,0xc9,0x37,0x00,0x00,0x62,0xac,0x00,0x00,0x82,0xac,0x02,0x80,0x03,0x3c, | ||
3505 | 0x00,0x00,0xa2,0xac,0x00,0x00,0xc2,0xac,0x00,0x00,0xe2,0xac,0x00,0x00,0x02,0xad, | ||
3506 | 0x00,0x00,0x22,0xad,0x00,0x00,0x42,0xad,0x8e,0x7d,0x65,0x90,0x25,0xb0,0x0c,0x3c, | ||
3507 | 0x01,0x70,0x03,0x3c,0x80,0x01,0x82,0x35,0x08,0x5f,0x63,0x34,0x22,0x00,0x04,0x24, | ||
3508 | 0x00,0x00,0x43,0xac,0xb5,0x00,0xa4,0x10,0x0f,0x1f,0x02,0x3c,0x92,0x00,0x02,0x24, | ||
3509 | 0xb2,0x00,0xa2,0x10,0x0f,0x1f,0x02,0x3c,0x0f,0x10,0x02,0x3c,0x00,0xf0,0x51,0x34, | ||
3510 | 0xf7,0x01,0x92,0x35,0x15,0xf0,0x4d,0x34,0x77,0x00,0x0e,0x24,0x84,0x01,0x87,0x35, | ||
3511 | 0x88,0x01,0x88,0x35,0x10,0xf0,0x44,0x34,0x8c,0x01,0x85,0x35,0x05,0xf0,0x42,0x34, | ||
3512 | 0x00,0x00,0xed,0xac,0x90,0x01,0x83,0x35,0x00,0x00,0x04,0xad,0x94,0x01,0x86,0x35, | ||
3513 | 0x00,0x00,0xa2,0xac,0xf5,0x0f,0x02,0x24,0x00,0x00,0x71,0xac,0x25,0xb0,0x05,0x3c, | ||
3514 | 0x00,0x00,0xc2,0xac,0x98,0x01,0x89,0x35,0x9c,0x01,0x8a,0x35,0xf0,0x0f,0x03,0x24, | ||
3515 | 0x0d,0x00,0x02,0x24,0x00,0x00,0x23,0xad,0xa0,0x01,0x8b,0x35,0x00,0x00,0x42,0xad, | ||
3516 | 0xa7,0x01,0xb7,0x34,0xf6,0x01,0x8c,0x35,0xff,0xff,0x02,0x24,0x00,0x00,0x6d,0xad, | ||
3517 | 0x00,0x00,0x8e,0xa1,0x00,0x00,0x4e,0xa2,0x00,0x00,0xe2,0xa2,0x25,0xb0,0x02,0x3c, | ||
3518 | 0xa8,0x01,0xb6,0x34,0xff,0xff,0x09,0x24,0xac,0x01,0x42,0x34,0x00,0x00,0xc9,0xae, | ||
3519 | 0x03,0x04,0x04,0x3c,0x00,0x00,0x49,0xac,0x07,0x08,0x03,0x3c,0x25,0xb0,0x02,0x3c, | ||
3520 | 0x01,0x02,0x84,0x34,0x05,0x06,0x63,0x34,0xb4,0x01,0xb1,0x34,0xb8,0x01,0xb2,0x34, | ||
3521 | 0xbc,0x01,0xb3,0x34,0xb0,0x01,0x42,0x34,0x00,0x00,0x44,0xac,0x00,0x00,0x23,0xae, | ||
3522 | 0x25,0xb0,0x02,0x3c,0x00,0x00,0x44,0xae,0x00,0x00,0x63,0xae,0x25,0xb0,0x03,0x3c, | ||
3523 | 0x0c,0x00,0x06,0x24,0xc0,0x01,0xb4,0x34,0xc1,0x01,0xb5,0x34,0x0d,0x00,0x08,0x24, | ||
3524 | 0xc2,0x01,0x63,0x34,0xc3,0x01,0x42,0x34,0x00,0x00,0x86,0xa2,0xc4,0x01,0xab,0x34, | ||
3525 | 0x00,0x00,0xa6,0xa2,0xc5,0x01,0xac,0x34,0x00,0x00,0x66,0xa0,0x0e,0x00,0x07,0x24, | ||
3526 | 0x00,0x00,0x48,0xa0,0xc6,0x01,0xaa,0x34,0xc7,0x01,0xad,0x34,0x0f,0x00,0x02,0x24, | ||
3527 | 0x00,0x00,0x68,0xa1,0x00,0x00,0x87,0xa1,0x00,0x00,0x47,0xa1,0x00,0x00,0xa2,0xa1, | ||
3528 | 0x57,0x01,0x02,0x3c,0x48,0x00,0xbf,0x34,0x46,0x00,0xae,0x34,0x0e,0xe2,0x42,0x34, | ||
3529 | 0x00,0x00,0xc0,0xa5,0x4c,0x00,0xbe,0x34,0x00,0x00,0xe2,0xaf,0x4d,0x00,0xb9,0x34, | ||
3530 | 0x80,0xff,0x02,0x24,0x00,0x00,0xc0,0xa3,0x00,0x00,0x22,0xa3,0x25,0xb0,0x02,0x3c, | ||
3531 | 0xbc,0x00,0x03,0x24,0x40,0x00,0x42,0x34,0x00,0x00,0x43,0xa4,0x25,0xb0,0x03,0x3c, | ||
3532 | 0x64,0x03,0xb8,0x34,0xfc,0x37,0x02,0x24,0x40,0x00,0x63,0x34,0x00,0x00,0x00,0xa3, | ||
3533 | 0xd8,0x00,0xa7,0x34,0x00,0x00,0x62,0xa4,0x00,0x00,0xe3,0x90,0x2a,0xb0,0x04,0x3c, | ||
3534 | 0x80,0xff,0x02,0x24,0x26,0xb0,0x06,0x3c,0x25,0x18,0x62,0x00,0x30,0x00,0x89,0x34, | ||
3535 | 0x20,0x20,0x02,0x24,0x38,0x00,0x84,0x34,0x00,0x00,0xe3,0xa0,0x79,0x00,0xc8,0x34, | ||
3536 | 0x00,0x00,0x82,0xa4,0x40,0x00,0x03,0x24,0x16,0x00,0x02,0x24,0x00,0x00,0x23,0xa1, | ||
3537 | 0x94,0x00,0xaa,0x34,0x00,0x00,0x02,0xa1,0x98,0x00,0xab,0x34,0x64,0x00,0x03,0x24, | ||
3538 | 0x22,0x00,0x02,0x24,0x00,0x00,0x43,0xa5,0x7c,0x00,0xd1,0x34,0x00,0x00,0x62,0xa5, | ||
3539 | 0x04,0x00,0x12,0x24,0x9c,0x00,0xac,0x34,0x7a,0x00,0xc6,0x34,0x20,0x0c,0x02,0x24, | ||
3540 | 0x0a,0x00,0x03,0x24,0x00,0x00,0xd2,0xa0,0x9a,0x00,0xad,0x34,0x00,0x00,0x22,0xa6, | ||
3541 | 0x96,0x00,0xae,0x34,0x00,0x00,0x83,0xa1,0xff,0x03,0x02,0x24,0x02,0x00,0x03,0x24, | ||
3542 | 0x00,0x00,0xa2,0xa5,0x00,0x00,0xc3,0xa5,0x25,0xb0,0x03,0x3c,0x20,0x00,0x02,0x24, | ||
3543 | 0xb7,0x00,0x63,0x34,0x00,0x00,0x62,0xa0,0x25,0xb0,0x02,0x3c,0x09,0x00,0x03,0x24, | ||
3544 | 0x89,0x00,0x42,0x34,0x00,0x00,0x43,0xa0,0x44,0x00,0xa5,0x34,0x00,0x00,0xa2,0x94, | ||
3545 | 0x02,0x80,0x03,0x3c,0x68,0x15,0x66,0x24,0xff,0xfd,0x03,0x24,0x24,0x10,0x43,0x00, | ||
3546 | 0x00,0x00,0xa2,0xa4,0x00,0x00,0xa3,0x94,0xd5,0x4a,0xc4,0x90,0x29,0xb0,0x02,0x3c, | ||
3547 | 0x40,0x00,0x42,0x34,0x00,0x02,0x63,0x34,0x00,0x00,0xa3,0xa4,0x00,0x00,0x52,0xa0, | ||
3548 | 0xd3,0x0a,0x00,0x0c,0x00,0x00,0x00,0x00,0x44,0x00,0xbf,0x8f,0x40,0x00,0xbe,0x8f, | ||
3549 | 0x3c,0x00,0xb7,0x8f,0x38,0x00,0xb6,0x8f,0x34,0x00,0xb5,0x8f,0x30,0x00,0xb4,0x8f, | ||
3550 | 0x2c,0x00,0xb3,0x8f,0x28,0x00,0xb2,0x8f,0x24,0x00,0xb1,0x8f,0x20,0x00,0xb0,0x8f, | ||
3551 | 0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x48,0x00,0xbd,0x27,0x54,0x00,0x85,0x34, | ||
3552 | 0x00,0xe0,0x42,0x34,0x50,0x00,0x84,0x34,0x12,0x01,0x03,0x24,0x00,0x00,0x82,0xac, | ||
3553 | 0x00,0x00,0xa3,0xa4,0xf9,0x58,0x00,0x08,0x02,0x80,0x03,0x3c,0x00,0xf0,0x51,0x34, | ||
3554 | 0xf7,0x01,0x92,0x35,0x15,0xf0,0x4d,0x34,0xad,0x59,0x00,0x08,0xff,0xff,0x0e,0x24, | ||
3555 | 0x8b,0x59,0x00,0x08,0x1b,0x1b,0x42,0x34,0x25,0xb0,0x03,0x3c,0x25,0xb0,0x08,0x3c, | ||
3556 | 0xfc,0x37,0x02,0x24,0x40,0x00,0x63,0x34,0x02,0x80,0x04,0x3c,0x00,0x00,0x62,0xa4, | ||
3557 | 0x14,0x80,0x84,0x24,0xff,0x00,0x07,0x24,0xb0,0x03,0x06,0x35,0x00,0x00,0x83,0x94, | ||
3558 | 0x00,0x00,0x00,0x00,0xff,0x00,0x62,0x30,0x21,0x18,0x68,0x00,0x0a,0x00,0x47,0x10, | ||
3559 | 0xff,0x00,0x65,0x30,0x04,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xac, | ||
3560 | 0x00,0x00,0xc3,0xac,0x04,0x00,0x82,0x8c,0x08,0x00,0x84,0x24,0x00,0x00,0xc2,0xac, | ||
3561 | 0xf2,0xff,0xa7,0x14,0x00,0x00,0x00,0x00,0x25,0xb0,0x08,0x3c,0x01,0x80,0x02,0x3c, | ||
3562 | 0x0c,0x7a,0x44,0x24,0xff,0x00,0x07,0x24,0xb0,0x03,0x06,0x35,0x00,0x00,0x83,0x94, | ||
3563 | 0x00,0x00,0x00,0x00,0xff,0x00,0x62,0x30,0x21,0x18,0x68,0x00,0x0a,0x00,0x47,0x10, | ||
3564 | 0xff,0x00,0x65,0x30,0x04,0x00,0x82,0x8c,0x00,0x00,0x00,0x00,0x00,0x00,0x62,0xac, | ||
3565 | 0x00,0x00,0xc3,0xac,0x04,0x00,0x82,0x8c,0x08,0x00,0x84,0x24,0x00,0x00,0xc2,0xac, | ||
3566 | 0xf2,0xff,0xa7,0x14,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00, | ||
3567 | 0x01,0x80,0x02,0x3c,0x02,0x80,0x05,0x3c,0x10,0x6b,0x42,0x24,0x02,0x80,0x03,0x3c, | ||
3568 | 0xcc,0x7d,0xa2,0xac,0x00,0x80,0x02,0x3c,0x6c,0x7e,0x60,0xac,0xcc,0x7d,0xa4,0x24, | ||
3569 | 0x02,0x80,0x03,0x3c,0xc8,0x06,0x42,0x24,0x70,0x7e,0x60,0xa4,0x08,0x00,0x82,0xac, | ||
3570 | 0x02,0x80,0x03,0x3c,0x00,0x80,0x02,0x3c,0x72,0x7e,0x60,0xa4,0x02,0x80,0x06,0x3c, | ||
3571 | 0x08,0x0a,0x42,0x24,0x00,0x80,0x03,0x3c,0x74,0x7e,0xc7,0x24,0x14,0x00,0x82,0xac, | ||
3572 | 0x38,0x08,0x63,0x24,0x02,0x80,0x02,0x3c,0x74,0x7e,0xc0,0xac,0x10,0x00,0x83,0xac, | ||
3573 | 0x04,0x00,0xe0,0xac,0x7c,0x7e,0x40,0xa0,0x00,0x80,0x02,0x3c,0x88,0x19,0x42,0x24, | ||
3574 | 0x3c,0x00,0x82,0xac,0x00,0x80,0x03,0x3c,0x00,0x80,0x02,0x3c,0x24,0x0c,0x63,0x24, | ||
3575 | 0x78,0x0f,0x42,0x24,0x1c,0x00,0x83,0xac,0x20,0x00,0x82,0xac,0x00,0x80,0x03,0x3c, | ||
3576 | 0x00,0x80,0x02,0x3c,0xc8,0x12,0x63,0x24,0x28,0x16,0x42,0x24,0x24,0x00,0x83,0xac, | ||
3577 | 0x28,0x00,0x82,0xac,0x00,0x80,0x03,0x3c,0x01,0x80,0x02,0x3c,0x4c,0x1f,0x63,0x24, | ||
3578 | 0xd0,0x04,0x42,0x24,0x2c,0x00,0x83,0xac,0x30,0x00,0x82,0xac,0x00,0x80,0x03,0x3c, | ||
3579 | 0x00,0x80,0x02,0x3c,0xe4,0x19,0x63,0x24,0x00,0x03,0x42,0x24,0x38,0x00,0x83,0xac, | ||
3580 | 0x08,0x00,0xe0,0x03,0x4c,0x00,0x82,0xac,0x25,0xb0,0x02,0x3c,0x08,0x00,0x42,0x34, | ||
3581 | 0x00,0x00,0x43,0x8c,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x02,0x80,0x0e,0x3c, | ||
3582 | 0x02,0x80,0x08,0x3c,0x02,0x80,0x02,0x3c,0x02,0x80,0x03,0x3c,0xf8,0x03,0x4d,0x24, | ||
3583 | 0x00,0x14,0x6c,0x24,0x01,0x00,0x07,0x24,0x00,0x00,0xcb,0x25,0xff,0xff,0x0a,0x24, | ||
3584 | 0x00,0x04,0x09,0x25,0x80,0x1a,0x07,0x00,0x21,0x10,0x6b,0x00,0x00,0x00,0x42,0xac, | ||
3585 | 0x90,0x00,0x4a,0xac,0x00,0x04,0x04,0x8d,0x01,0x00,0xe7,0x24,0x08,0x00,0x45,0x24, | ||
3586 | 0x21,0x18,0x6d,0x00,0x05,0x00,0xe6,0x28,0x04,0x00,0x82,0xac,0x00,0x00,0x44,0xac, | ||
3587 | 0x04,0x00,0x49,0xac,0x00,0x04,0x02,0xad,0x8c,0x00,0x40,0xac,0x6c,0x00,0xa3,0xac, | ||
3588 | 0xf0,0xff,0xc0,0x14,0x68,0x00,0xac,0xac,0x08,0x00,0xe0,0x03,0x00,0x00,0xc9,0xad, | ||
3589 | 0x05,0x00,0xa2,0x2c,0x13,0x00,0x40,0x10,0xff,0xff,0x07,0x24,0x02,0x80,0x02,0x3c, | ||
3590 | 0x80,0x1a,0x05,0x00,0x00,0x00,0x42,0x24,0x0e,0x00,0xa0,0x10,0x21,0x30,0x62,0x00, | ||
3591 | 0x90,0x00,0xc3,0x8c,0xff,0xff,0x02,0x24,0x0a,0x00,0x62,0x14,0x00,0x00,0x00,0x00, | ||
3592 | 0x8c,0x00,0xc2,0x8c,0x00,0x00,0x00,0x00,0x06,0x00,0x40,0x14,0x00,0x00,0x00,0x00, | ||
3593 | 0x01,0x00,0x02,0x24,0x88,0x00,0xc4,0xac,0x8c,0x00,0xc2,0xac,0x90,0x00,0xc5,0xac, | ||
3594 | 0x21,0x38,0xa0,0x00,0x08,0x00,0xe0,0x03,0x21,0x10,0xe0,0x00,0x25,0xb0,0x04,0x3c, | ||
3595 | 0x01,0x80,0x02,0x3c,0x18,0x03,0x85,0x34,0xf4,0x6b,0x42,0x24,0xe0,0xff,0xbd,0x27, | ||
3596 | 0x00,0x00,0xa2,0xac,0x1b,0x00,0x86,0x34,0xdb,0xff,0x03,0x24,0x27,0x00,0x84,0x34, | ||
3597 | 0x07,0x00,0x02,0x24,0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x00,0x83,0xa0, | ||
3598 | 0x18,0x00,0xbf,0xaf,0x00,0x00,0xc2,0xa0,0x01,0x00,0x11,0x24,0x21,0x80,0x00,0x00, | ||
3599 | 0x7a,0x42,0x00,0x0c,0x21,0x20,0x00,0x02,0x01,0x00,0x02,0x26,0xff,0x00,0x50,0x30, | ||
3600 | 0x2b,0x18,0x30,0x02,0xfa,0xff,0x60,0x10,0x00,0x00,0x00,0x00,0x7a,0x42,0x00,0x0c, | ||
3601 | 0x21,0x20,0x00,0x00,0x18,0x00,0xbf,0x8f,0x14,0x00,0xb1,0x8f,0x10,0x00,0xb0,0x8f, | ||
3602 | 0x01,0x00,0x02,0x24,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0x08,0x00,0xe0,0x03, | ||
3603 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x02,0x80,0x02,0x3c, | ||
3604 | 0x68,0x15,0x42,0x24,0x40,0x10,0x03,0x3c,0xff,0xff,0x44,0x30,0x25,0xc0,0x83,0x00, | ||
3605 | 0x94,0x64,0x58,0xac,0x40,0x00,0x18,0x27,0xa0,0x64,0x58,0xac,0x40,0x00,0x18,0x27, | ||
3606 | 0xac,0x64,0x58,0xac,0x40,0x00,0x18,0x27,0xb8,0x64,0x58,0xac,0x40,0x00,0x18,0x27, | ||
3607 | 0xe0,0xff,0xbd,0x27,0xc4,0x64,0x58,0xac,0x40,0x00,0x18,0x27,0x1c,0x00,0xb7,0xaf, | ||
3608 | 0x18,0x00,0xb6,0xaf,0x14,0x00,0xb5,0xaf,0x10,0x00,0xb4,0xaf,0x0c,0x00,0xb3,0xaf, | ||
3609 | 0x08,0x00,0xb2,0xaf,0x04,0x00,0xb1,0xaf,0x00,0x00,0xb0,0xaf,0xd0,0x64,0x58,0xac, | ||
3610 | 0xa0,0x64,0x45,0x8c,0xac,0x64,0x46,0x8c,0xb8,0x64,0x47,0x8c,0xc4,0x64,0x48,0x8c, | ||
3611 | 0xd0,0x64,0x49,0x8c,0x40,0x00,0x18,0x27,0xdc,0x64,0x58,0xac,0x21,0x50,0x00,0x03, | ||
3612 | 0x25,0x20,0x83,0x00,0x40,0x00,0x18,0x27,0x20,0x10,0x03,0x3c,0x90,0x64,0x44,0xac, | ||
3613 | 0x9c,0x64,0x45,0xac,0xa8,0x64,0x46,0xac,0xb4,0x64,0x47,0xac,0xc0,0x64,0x48,0xac, | ||
3614 | 0xcc,0x64,0x49,0xac,0x25,0xb0,0x06,0x3c,0x28,0x64,0x43,0xac,0x24,0x64,0x43,0xac, | ||
3615 | 0x34,0x64,0x43,0xac,0x30,0x64,0x43,0xac,0x40,0x64,0x43,0xac,0x3c,0x64,0x43,0xac, | ||
3616 | 0x4c,0x64,0x43,0xac,0x48,0x64,0x43,0xac,0xe8,0x64,0x58,0xac,0x00,0x02,0x18,0x27, | ||
3617 | 0xd8,0x64,0x4a,0xac,0x00,0x65,0x58,0xac,0x58,0x64,0x43,0xac,0x54,0x64,0x43,0xac, | ||
3618 | 0x64,0x64,0x43,0xac,0x60,0x64,0x43,0xac,0x70,0x64,0x43,0xac,0x6c,0x64,0x43,0xac, | ||
3619 | 0xac,0x00,0xc4,0x34,0xb0,0x00,0xc5,0x34,0x00,0x00,0x92,0x8c,0xe8,0x64,0x50,0x8c, | ||
3620 | 0x00,0x00,0xb3,0x8c,0x21,0x10,0x04,0x3c,0x23,0x10,0x09,0x3c,0x22,0x10,0x0c,0x3c, | ||
3621 | 0x02,0x80,0x14,0x3c,0x02,0x80,0x15,0x3c,0x02,0x80,0x16,0x3c,0x02,0x80,0x17,0x3c, | ||
3622 | 0x24,0x10,0x05,0x3c,0x21,0x88,0x00,0x03,0x08,0x7b,0x87,0x26,0x00,0x04,0x18,0x27, | ||
3623 | 0x10,0x7b,0xa8,0x26,0x18,0x7b,0xca,0x26,0x20,0x7b,0xeb,0x26,0x00,0x04,0x2d,0x35, | ||
3624 | 0x00,0x40,0x8e,0x34,0x00,0x80,0x8f,0x35,0x00,0x01,0xc6,0x34,0xe4,0x64,0x50,0xac, | ||
3625 | 0xfc,0x64,0x51,0xac,0x64,0x65,0x4d,0xac,0x28,0x65,0x52,0xac,0x34,0x65,0x4e,0xac, | ||
3626 | 0x58,0x65,0x4f,0xac,0x4c,0x65,0x53,0xac,0x00,0x00,0xc5,0xac,0x48,0x65,0x45,0xac, | ||
3627 | 0x68,0x65,0x43,0xac,0x74,0x65,0x58,0xac,0x7c,0x64,0x43,0xac,0x78,0x64,0x43,0xac, | ||
3628 | 0x06,0x65,0x40,0xa4,0x05,0x65,0x40,0xa0,0x04,0x65,0x40,0xa0,0x5c,0x65,0x49,0xac, | ||
3629 | 0x60,0x65,0x49,0xac,0x20,0x65,0x44,0xac,0x24,0x65,0x44,0xac,0x2c,0x65,0x44,0xac, | ||
3630 | 0x30,0x65,0x44,0xac,0x50,0x65,0x4c,0xac,0x54,0x65,0x4c,0xac,0x44,0x65,0x45,0xac, | ||
3631 | 0x6c,0x65,0x43,0xac,0x78,0x65,0x58,0xac,0x04,0x00,0x08,0xad,0x08,0x7b,0x87,0xae, | ||
3632 | 0x04,0x00,0x4a,0xad,0x10,0x7b,0xa8,0xae,0x04,0x00,0x6b,0xad,0x18,0x7b,0xca,0xae, | ||
3633 | 0x20,0x7b,0xeb,0xae,0x04,0x00,0xe7,0xac,0x02,0x80,0x02,0x3c,0x00,0x14,0x43,0x24, | ||
3634 | 0x21,0x20,0xe0,0x00,0x03,0x00,0x06,0x24,0x21,0x10,0x80,0x00,0xff,0xff,0xc6,0x24, | ||
3635 | 0x08,0x00,0x78,0xac,0x00,0x00,0x63,0xac,0x10,0x00,0x60,0xac,0x00,0x00,0x67,0xac, | ||
3636 | 0x21,0x20,0x60,0x00,0x04,0x00,0x62,0xac,0x00,0x00,0x43,0xac,0x00,0x01,0x18,0x27, | ||
3637 | 0xf5,0xff,0xc1,0x04,0x18,0x00,0x63,0x24,0x02,0x80,0x02,0x3c,0x10,0x7b,0x49,0x24, | ||
3638 | 0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x04,0x00,0x28,0x8d,0x60,0x14,0x4b,0x24, | ||
3639 | 0x04,0x00,0xe4,0xac,0x00,0x14,0x6a,0x24,0x01,0x00,0x07,0x24,0x21,0x28,0x00,0x00, | ||
3640 | 0x07,0x00,0x06,0x24,0x21,0x20,0xab,0x00,0x21,0x10,0xaa,0x00,0xff,0xff,0xc6,0x24, | ||
3641 | 0x68,0x00,0x58,0xac,0x70,0x00,0x47,0xac,0x18,0x00,0xa5,0x24,0x00,0x00,0x89,0xac, | ||
3642 | 0x04,0x00,0x88,0xac,0x00,0x00,0x04,0xad,0x00,0x01,0x18,0x27,0xf5,0xff,0xc1,0x04, | ||
3643 | 0x21,0x40,0x80,0x00,0x02,0x80,0x02,0x3c,0x18,0x7b,0x4a,0x24,0x02,0x80,0x03,0x3c, | ||
3644 | 0x02,0x80,0x02,0x3c,0x04,0x00,0x45,0x8d,0x20,0x15,0x4b,0x24,0x04,0x00,0x24,0xad, | ||
3645 | 0x02,0x00,0x07,0x24,0x00,0x14,0x69,0x24,0x21,0x20,0x00,0x00,0x01,0x00,0x06,0x24, | ||
3646 | 0x21,0x40,0x8b,0x00,0x21,0x10,0x89,0x00,0xff,0xff,0xc6,0x24,0x28,0x01,0x58,0xac, | ||
3647 | 0x30,0x01,0x47,0xac,0x18,0x00,0x84,0x24,0x00,0x00,0x0a,0xad,0x04,0x00,0x05,0xad, | ||
3648 | 0x00,0x00,0xa8,0xac,0x00,0x02,0x18,0x27,0xf5,0xff,0xc1,0x04,0x21,0x28,0x00,0x01, | ||
3649 | 0x02,0x80,0x05,0x3c,0x20,0x7b,0xa5,0x24,0x04,0x00,0xa6,0x8c,0x1c,0x00,0xb7,0x8f, | ||
3650 | 0x18,0x00,0xb6,0x8f,0x14,0x00,0xb5,0x8f,0x10,0x00,0xb4,0x8f,0x0c,0x00,0xb3,0x8f, | ||
3651 | 0x08,0x00,0xb2,0x8f,0x04,0x00,0xb1,0x8f,0x00,0x00,0xb0,0x8f,0x02,0x80,0x07,0x3c, | ||
3652 | 0x02,0x80,0x03,0x3c,0x50,0x15,0xe4,0x24,0x00,0x14,0x63,0x24,0x03,0x00,0x02,0x24, | ||
3653 | 0x20,0x00,0xbd,0x27,0x58,0x01,0x78,0xac,0x04,0x00,0x48,0xad,0x04,0x00,0xa4,0xac, | ||
3654 | 0x60,0x01,0x62,0xac,0x50,0x15,0xe5,0xac,0x04,0x00,0x86,0xac,0x08,0x00,0xe0,0x03, | ||
3655 | 0x00,0x00,0xc4,0xac,0xd0,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c,0x20,0x00,0xb2,0xaf, | ||
3656 | 0x02,0x80,0x03,0x3c,0x4c,0x91,0x52,0x24,0x02,0x80,0x02,0x3c,0x28,0x00,0xb4,0xaf, | ||
3657 | 0x24,0x00,0xb3,0xaf,0x1c,0x00,0xb1,0xaf,0x18,0x00,0xb0,0xaf,0x2c,0x00,0xbf,0xaf, | ||
3658 | 0xd8,0x90,0x73,0x24,0x68,0x15,0x50,0x24,0x21,0x88,0x00,0x00,0x02,0x80,0x14,0x3c, | ||
3659 | 0xee,0x4e,0x00,0x0c,0x21,0x20,0x20,0x02,0x78,0x51,0x05,0x8e,0x6c,0x00,0x66,0x8e, | ||
3660 | 0xb8,0x90,0x82,0x26,0x6c,0x00,0x43,0x8e,0x1b,0x00,0x44,0x90,0xff,0xf1,0x02,0x24, | ||
3661 | 0x21,0x18,0x66,0x00,0x24,0x28,0xa2,0x00,0x00,0x21,0x04,0x00,0x42,0x18,0x03,0x00, | ||
3662 | 0x00,0x02,0xa5,0x34,0x44,0x51,0x03,0xae,0x68,0x51,0x04,0xae,0x78,0x51,0x05,0xae, | ||
3663 | 0x6c,0x51,0x04,0xae,0x21,0x30,0x00,0x00,0x21,0x10,0x06,0x02,0x01,0x00,0xc6,0x24, | ||
3664 | 0x1d,0x00,0xc3,0x28,0x99,0x51,0x40,0xa0,0x7c,0x51,0x40,0xa0,0xfa,0xff,0x60,0x14, | ||
3665 | 0xb6,0x51,0x40,0xa0,0x01,0x00,0x31,0x26,0x20,0x00,0x22,0x2a,0xd4,0x51,0x00,0xae, | ||
3666 | 0xe3,0xff,0x40,0x14,0x94,0x00,0x10,0x26,0x02,0x80,0x02,0x3c,0x02,0x80,0x03,0x3c, | ||
3667 | 0x68,0x15,0x4b,0x24,0x02,0x80,0x02,0x3c,0x4c,0x91,0x6f,0x24,0xd8,0x90,0x4d,0x24, | ||
3668 | 0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0xb8,0x90,0x6e,0x24,0x98,0x90,0x4c,0x24, | ||
3669 | 0x21,0x88,0x00,0x00,0x80,0x18,0x11,0x00,0x21,0x20,0x6d,0x00,0x21,0x10,0x6f,0x00, | ||
3670 | 0x21,0x28,0x2e,0x02,0x21,0x30,0x2c,0x02,0x00,0x00,0x88,0x8c,0x00,0x00,0xa9,0x90, | ||
3671 | 0x00,0x00,0xc7,0x90,0x00,0x00,0x4a,0x8c,0x21,0x10,0x2b,0x02,0x01,0x00,0x31,0x26, | ||
3672 | 0x21,0x18,0x6b,0x00,0x1d,0x00,0x24,0x2a,0xec,0x44,0x68,0xac,0xca,0x44,0x47,0xa0, | ||
3673 | 0x60,0x45,0x6a,0xac,0xef,0xff,0x80,0x14,0x90,0x44,0x49,0xa0,0x02,0x80,0x02,0x3c, | ||
3674 | 0x68,0x15,0x4a,0x24,0x02,0x80,0x03,0x3c,0x02,0x80,0x02,0x3c,0x74,0x8f,0x6b,0x24, | ||
3675 | 0x14,0x8e,0x4c,0x24,0x21,0x88,0x00,0x00,0x21,0x48,0x00,0x00,0x21,0x30,0x00,0x00, | ||
3676 | 0x21,0x40,0x2a,0x01,0x21,0x38,0x2b,0x01,0x21,0x10,0xe6,0x00,0x91,0x00,0x44,0x90, | ||
3677 | 0x00,0x00,0x45,0x90,0x21,0x18,0x06,0x01,0x01,0x00,0xc6,0x24,0x05,0x00,0xc2,0x28, | ||
3678 | 0xc5,0x43,0x64,0xa0,0xf8,0xff,0x40,0x14,0x34,0x43,0x65,0xa0,0x21,0x10,0x2c,0x02, | ||
3679 | 0x1d,0x00,0x44,0x90,0x00,0x00,0x45,0x90,0x21,0x18,0x2a,0x02,0x01,0x00,0x31,0x26, | ||
3680 | 0x1d,0x00,0x22,0x2a,0x73,0x44,0x64,0xa0,0x56,0x44,0x65,0xa0,0xeb,0xff,0x40,0x14, | ||
3681 | 0x05,0x00,0x29,0x25,0x52,0x00,0x02,0x24,0x10,0x00,0xa2,0xa3,0x41,0x00,0x03,0x24, | ||
3682 | 0x4d,0x00,0x02,0x24,0x02,0x80,0x07,0x3c,0x1c,0x97,0xe7,0x24,0x11,0x00,0xa3,0xa3, | ||
3683 | 0x12,0x00,0xa2,0xa3,0xe8,0x03,0x03,0x24,0x01,0x00,0x02,0x24,0x00,0x80,0x06,0x3c, | ||
3684 | 0x10,0x00,0xa5,0x27,0x21,0x20,0xe0,0x00,0xf0,0x37,0xc6,0x24,0x0c,0x00,0xe3,0xac, | ||
3685 | 0x14,0x00,0xe2,0xa0,0xfb,0x0c,0x00,0x0c,0x13,0x00,0xa0,0xa3,0x2c,0x00,0xbf,0x8f, | ||
3686 | 0x28,0x00,0xb4,0x8f,0x24,0x00,0xb3,0x8f,0x20,0x00,0xb2,0x8f,0x1c,0x00,0xb1,0x8f, | ||
3687 | 0x18,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x30,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27, | ||
3688 | 0x02,0x80,0x02,0x3c,0x42,0x00,0x03,0x24,0x10,0x00,0xa3,0xa3,0x55,0x60,0x40,0xa0, | ||
3689 | 0x4e,0x00,0x03,0x24,0x43,0x00,0x02,0x24,0x02,0x80,0x07,0x3c,0x54,0x97,0xe7,0x24, | ||
3690 | 0x11,0x00,0xa2,0xa3,0x12,0x00,0xa3,0xa3,0xd0,0x07,0x02,0x24,0x01,0x00,0x03,0x24, | ||
3691 | 0x00,0x80,0x06,0x3c,0x10,0x00,0xa5,0x27,0x21,0x20,0xe0,0x00,0xdc,0x44,0xc6,0x24, | ||
3692 | 0x0c,0x00,0xe2,0xac,0x14,0x00,0xe3,0xa0,0x18,0x00,0xbf,0xaf,0xfb,0x0c,0x00,0x0c, | ||
3693 | 0x13,0x00,0xa0,0xa3,0x18,0x00,0xbf,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
3694 | 0x20,0x00,0xbd,0x27,0x48,0xfd,0xbd,0x27,0xb4,0x02,0xb3,0xaf,0x02,0x80,0x02,0x3c, | ||
3695 | 0x02,0x80,0x13,0x3c,0x24,0x92,0x46,0x24,0x68,0x15,0x63,0x26,0xb0,0x02,0xb2,0xaf, | ||
3696 | 0xac,0x02,0xb1,0xaf,0xa8,0x02,0xb0,0xaf,0x03,0x40,0x60,0xa0,0x21,0x38,0xa0,0x03, | ||
3697 | 0x90,0x00,0xc8,0x24,0x00,0x00,0xc2,0x8c,0x04,0x00,0xc3,0x8c,0x08,0x00,0xc4,0x8c, | ||
3698 | 0x0c,0x00,0xc5,0x8c,0x10,0x00,0xc6,0x24,0x00,0x00,0xe2,0xac,0x04,0x00,0xe3,0xac, | ||
3699 | 0x08,0x00,0xe4,0xac,0x0c,0x00,0xe5,0xac,0xf6,0xff,0xc8,0x14,0x10,0x00,0xe7,0x24, | ||
3700 | 0x00,0x00,0xc3,0x8c,0x02,0x80,0x02,0x3c,0xb8,0x92,0x58,0x24,0x00,0x00,0xe3,0xac, | ||
3701 | 0x98,0x00,0xb9,0x27,0x00,0x01,0x12,0x27,0x01,0x00,0x02,0x93,0x05,0x00,0x03,0x93, | ||
3702 | 0x09,0x00,0x04,0x93,0x0d,0x00,0x05,0x93,0x00,0x00,0x11,0x93,0x02,0x00,0x0d,0x93, | ||
3703 | 0x04,0x00,0x10,0x93,0x06,0x00,0x0c,0x93,0x08,0x00,0x0f,0x93,0x0a,0x00,0x07,0x93, | ||
3704 | 0x0c,0x00,0x0e,0x93,0x0e,0x00,0x06,0x93,0x03,0x00,0x08,0x93,0x07,0x00,0x09,0x93, | ||
3705 | 0x0b,0x00,0x0a,0x93,0x0f,0x00,0x0b,0x93,0x00,0x12,0x02,0x00,0x00,0x1a,0x03,0x00, | ||
3706 | 0x00,0x22,0x04,0x00,0x00,0x2a,0x05,0x00,0x25,0x10,0x51,0x00,0x25,0x18,0x70,0x00, | ||
3707 | 0x25,0x20,0x8f,0x00,0x25,0x28,0xae,0x00,0x00,0x6c,0x0d,0x00,0x00,0x64,0x0c,0x00, | ||
3708 | 0x00,0x3c,0x07,0x00,0x00,0x34,0x06,0x00,0x25,0x68,0xa2,0x01,0x25,0x60,0x83,0x01, | ||
3709 | 0x25,0x38,0xe4,0x00,0x25,0x30,0xc5,0x00,0x00,0x46,0x08,0x00,0x00,0x4e,0x09,0x00, | ||
3710 | 0x00,0x56,0x0a,0x00,0x00,0x5e,0x0b,0x00,0x25,0x40,0x0d,0x01,0x25,0x48,0x2c,0x01, | ||
3711 | 0x25,0x50,0x47,0x01,0x25,0x58,0x66,0x01,0x10,0x00,0x18,0x27,0x00,0x00,0x28,0xaf, | ||
3712 | 0x04,0x00,0x29,0xaf,0x08,0x00,0x2a,0xaf,0x0c,0x00,0x2b,0xaf,0xd2,0xff,0x12,0x17, | ||
3713 | 0x10,0x00,0x39,0x27,0x01,0x00,0x02,0x93,0x05,0x00,0x03,0x93,0x00,0x00,0x09,0x93, | ||
3714 | 0x02,0x00,0x04,0x93,0x04,0x00,0x08,0x93,0x06,0x00,0x05,0x93,0x07,0x00,0x06,0x93, | ||
3715 | 0x03,0x00,0x07,0x93,0x00,0x12,0x02,0x00,0x00,0x1a,0x03,0x00,0x25,0x10,0x49,0x00, | ||
3716 | 0x25,0x18,0x68,0x00,0x00,0x24,0x04,0x00,0x00,0x2c,0x05,0x00,0x25,0x20,0x82,0x00, | ||
3717 | 0x25,0x28,0xa3,0x00,0x00,0x3e,0x07,0x00,0x00,0x36,0x06,0x00,0x02,0x80,0x02,0x3c, | ||
3718 | 0x25,0x38,0xe4,0x00,0x25,0x30,0xc5,0x00,0xc0,0x93,0x58,0x24,0x04,0x00,0x26,0xaf, | ||
3719 | 0x00,0x00,0x27,0xaf,0x00,0x01,0x12,0x27,0xa0,0x01,0xb9,0x27,0x01,0x00,0x02,0x93, | ||
3720 | 0x05,0x00,0x03,0x93,0x09,0x00,0x04,0x93,0x0d,0x00,0x05,0x93,0x00,0x00,0x11,0x93, | ||
3721 | 0x02,0x00,0x0d,0x93,0x04,0x00,0x10,0x93,0x06,0x00,0x0c,0x93,0x08,0x00,0x0f,0x93, | ||
3722 | 0x0a,0x00,0x07,0x93,0x0c,0x00,0x0e,0x93,0x0e,0x00,0x06,0x93,0x03,0x00,0x08,0x93, | ||
3723 | 0x07,0x00,0x09,0x93,0x0b,0x00,0x0a,0x93,0x0f,0x00,0x0b,0x93,0x00,0x12,0x02,0x00, | ||
3724 | 0x00,0x1a,0x03,0x00,0x00,0x22,0x04,0x00,0x00,0x2a,0x05,0x00,0x25,0x10,0x51,0x00, | ||
3725 | 0x25,0x18,0x70,0x00,0x25,0x20,0x8f,0x00,0x25,0x28,0xae,0x00,0x00,0x6c,0x0d,0x00, | ||
3726 | 0x00,0x64,0x0c,0x00,0x00,0x3c,0x07,0x00,0x00,0x34,0x06,0x00,0x25,0x68,0xa2,0x01, | ||
3727 | 0x25,0x60,0x83,0x01,0x25,0x38,0xe4,0x00,0x25,0x30,0xc5,0x00,0x00,0x46,0x08,0x00, | ||
3728 | 0x00,0x4e,0x09,0x00,0x00,0x56,0x0a,0x00,0x00,0x5e,0x0b,0x00,0x25,0x40,0x0d,0x01, | ||
3729 | 0x25,0x48,0x2c,0x01,0x25,0x50,0x47,0x01,0x25,0x58,0x66,0x01,0x10,0x00,0x18,0x27, | ||
3730 | 0x00,0x00,0x28,0xaf,0x04,0x00,0x29,0xaf,0x08,0x00,0x2a,0xaf,0x0c,0x00,0x2b,0xaf, | ||
3731 | 0xd2,0xff,0x12,0x17,0x10,0x00,0x39,0x27,0x01,0x00,0x02,0x93,0x05,0x00,0x03,0x93, | ||
3732 | 0x00,0x00,0x09,0x93,0x02,0x00,0x04,0x93,0x04,0x00,0x08,0x93,0x06,0x00,0x05,0x93, | ||
3733 | 0x07,0x00,0x06,0x93,0x03,0x00,0x07,0x93,0x00,0x12,0x02,0x00,0x00,0x1a,0x03,0x00, | ||
3734 | 0x25,0x10,0x49,0x00,0x25,0x18,0x68,0x00,0x00,0x24,0x04,0x00,0x00,0x2c,0x05,0x00, | ||
3735 | 0x25,0x20,0x82,0x00,0x25,0x28,0xa3,0x00,0x00,0x3e,0x07,0x00,0x00,0x36,0x06,0x00, | ||
3736 | 0x25,0x30,0xc5,0x00,0x25,0x38,0xe4,0x00,0x02,0x80,0x02,0x3c,0x04,0x00,0x26,0xaf, | ||
3737 | 0x00,0x00,0x27,0xaf,0x68,0x15,0x46,0x24,0x21,0x50,0x00,0x00,0x80,0x20,0x0a,0x00, | ||
3738 | 0x21,0x10,0x9d,0x00,0x00,0x00,0x45,0x8c,0x01,0x00,0x43,0x25,0xff,0x00,0x6a,0x30, | ||
3739 | 0x21,0x20,0x86,0x00,0x25,0x00,0x42,0x2d,0xf8,0xff,0x40,0x14,0x18,0x40,0x85,0xac, | ||
3740 | 0x02,0x80,0x02,0x3c,0x68,0x15,0x4b,0x24,0x21,0x50,0x00,0x00,0xc0,0x10,0x0a,0x00, | ||
3741 | 0x21,0x48,0x5d,0x00,0x21,0x38,0x00,0x00,0x21,0x40,0x4b,0x00,0x21,0x10,0x27,0x01, | ||
3742 | 0xa0,0x01,0x46,0x90,0x98,0x00,0x45,0x90,0x01,0x00,0xe4,0x24,0x21,0x18,0x07,0x01, | ||
3743 | 0xff,0x00,0x87,0x30,0x08,0x00,0xe2,0x2c,0xb4,0x41,0x66,0xa0,0xf7,0xff,0x40,0x14, | ||
3744 | 0xac,0x40,0x65,0xa0,0x01,0x00,0x42,0x25,0xff,0x00,0x4a,0x30,0x21,0x00,0x43,0x2d, | ||
3745 | 0xef,0xff,0x60,0x14,0xc0,0x10,0x0a,0x00,0x25,0xb0,0x02,0x3c,0x0a,0x00,0x42,0x34, | ||
3746 | 0x00,0x00,0x43,0x90,0x00,0x00,0x00,0x00,0x20,0x00,0x63,0x30,0x42,0x00,0x60,0x10, | ||
3747 | 0x68,0x15,0x64,0x26,0x33,0x00,0x02,0x24,0xc1,0x42,0x62,0xa1,0x1c,0x00,0x03,0x24, | ||
3748 | 0x0f,0x00,0x02,0x24,0xbc,0x42,0x63,0xa1,0xbd,0x42,0x62,0xa1,0x68,0x15,0x65,0x26, | ||
3749 | 0x08,0x40,0xa4,0x8c,0xff,0x7f,0x08,0x3c,0xff,0xff,0x08,0x35,0xc0,0xff,0x02,0x24, | ||
3750 | 0x24,0x20,0x88,0x00,0x24,0x20,0x82,0x00,0x0c,0x00,0x84,0x34,0xff,0xc0,0x02,0x24, | ||
3751 | 0x24,0x20,0x82,0x00,0xc0,0xff,0x02,0x3c,0xff,0xff,0x42,0x34,0x00,0x18,0x84,0x34, | ||
3752 | 0xbf,0xff,0x03,0x3c,0x24,0x20,0x82,0x00,0xff,0xff,0x63,0x34,0x7f,0xff,0x02,0x3c, | ||
3753 | 0x24,0x20,0x83,0x00,0xff,0xff,0x42,0x34,0x24,0x20,0x82,0x00,0x0c,0x40,0xa6,0x8c, | ||
3754 | 0x7f,0xff,0x03,0x24,0x40,0x40,0x84,0x34,0xff,0xff,0x02,0x3c,0x24,0x20,0x83,0x00, | ||
3755 | 0xff,0x7f,0x42,0x34,0xff,0xbf,0x03,0x3c,0x10,0x40,0xa7,0x8c,0x24,0x20,0x82,0x00, | ||
3756 | 0xff,0xff,0x63,0x34,0xff,0x9f,0x02,0x3c,0x24,0x30,0xc3,0x00,0xff,0xff,0x42,0x34, | ||
3757 | 0xff,0x3f,0x03,0x3c,0x24,0x20,0x82,0x00,0xff,0xff,0x63,0x34,0x12,0x00,0x02,0x24, | ||
3758 | 0xb4,0x02,0xb3,0x8f,0xb0,0x02,0xb2,0x8f,0xac,0x02,0xb1,0x8f,0xa8,0x02,0xb0,0x8f, | ||
3759 | 0x24,0x38,0xe3,0x00,0xc7,0x42,0xa2,0xa0,0x1f,0x00,0x03,0x24,0x01,0x00,0x02,0x24, | ||
3760 | 0x24,0x30,0xc8,0x00,0xbe,0x42,0xa3,0xa0,0xc0,0x42,0xa2,0xa0,0xff,0x00,0x03,0x24, | ||
3761 | 0xff,0xff,0x02,0x24,0xb8,0x02,0xbd,0x27,0x08,0x40,0xa4,0xac,0x10,0x40,0xa7,0xac, | ||
3762 | 0x0c,0x40,0xa6,0xac,0xc2,0x42,0xa2,0xa0,0xc4,0x42,0xa3,0xa4,0xbf,0x42,0xa0,0xa0, | ||
3763 | 0x08,0x00,0xe0,0x03,0xc6,0x42,0xa0,0xa0,0x33,0x00,0x02,0x24,0xc1,0x42,0x82,0xa0, | ||
3764 | 0x0d,0x00,0x03,0x24,0x03,0x00,0x02,0x24,0xbc,0x42,0x83,0xa0,0x65,0x5d,0x00,0x08, | ||
3765 | 0xbd,0x42,0x82,0xa0,0xe0,0xff,0xbd,0x27,0x02,0x80,0x07,0x3c,0x68,0x15,0xe7,0x24, | ||
3766 | 0x18,0x00,0xbf,0xaf,0x00,0x40,0xe3,0x8c,0xf0,0xff,0x02,0x24,0x02,0x80,0x08,0x3c, | ||
3767 | 0x24,0x18,0x62,0x00,0xff,0xf0,0x02,0x24,0x24,0x18,0x62,0x00,0x00,0x40,0xe3,0xac, | ||
3768 | 0x1c,0x00,0x03,0x24,0x36,0x00,0x02,0x24,0xcf,0x42,0xe3,0xa0,0x20,0x00,0x03,0x24, | ||
3769 | 0xce,0x42,0xe2,0xa0,0xd1,0x42,0xe3,0xa0,0x32,0x00,0x02,0x24,0x20,0x00,0x03,0x24, | ||
3770 | 0xd0,0x42,0xe2,0xa0,0xc8,0x42,0xe3,0xa4,0x0a,0x00,0x02,0x24,0x00,0x02,0x03,0x24, | ||
3771 | 0xd2,0x42,0xe2,0xa0,0xcc,0x42,0xe3,0xa4,0x00,0x01,0x02,0x24,0x49,0x00,0x03,0x24, | ||
3772 | 0x38,0x97,0x08,0x25,0xff,0xff,0x0a,0x34,0x01,0x00,0x09,0x24,0x11,0x00,0xa3,0xa3, | ||
3773 | 0xca,0x42,0xe2,0xa4,0xd0,0x07,0x03,0x24,0x44,0x00,0x02,0x24,0x00,0x80,0x06,0x3c, | ||
3774 | 0x10,0x00,0xa2,0xa3,0x10,0x00,0xa5,0x27,0x47,0x00,0x02,0x24,0x21,0x20,0x00,0x01, | ||
3775 | 0x54,0x45,0xc6,0x24,0x04,0x40,0xea,0xac,0x02,0x40,0xe9,0xa0,0x0c,0x00,0x03,0xad, | ||
3776 | 0x14,0x00,0x09,0xa1,0xe6,0x42,0xe0,0xa0,0xdc,0x63,0xea,0xac,0xd7,0x42,0xe0,0xa0, | ||
3777 | 0x12,0x00,0xa2,0xa3,0xfb,0x0c,0x00,0x0c,0x13,0x00,0xa0,0xa3,0x18,0x00,0xbf,0x8f, | ||
3778 | 0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03,0x20,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27, | ||
3779 | 0x02,0x80,0x02,0x3c,0x50,0x00,0x03,0x24,0x10,0x00,0xa3,0xa3,0x2a,0x62,0x40,0xa0, | ||
3780 | 0x41,0x00,0x03,0x24,0x52,0x00,0x02,0x24,0x02,0x80,0x07,0x3c,0xc4,0x97,0xe7,0x24, | ||
3781 | 0x11,0x00,0xa2,0xa3,0x12,0x00,0xa3,0xa3,0xd0,0x07,0x02,0x24,0x01,0x00,0x03,0x24, | ||
3782 | 0x01,0x80,0x06,0x3c,0x10,0x00,0xa5,0x27,0x21,0x20,0xe0,0x00,0x88,0x5b,0xc6,0x24, | ||
3783 | 0x0c,0x00,0xe2,0xac,0x14,0x00,0xe3,0xa0,0x18,0x00,0xbf,0xaf,0xfb,0x0c,0x00,0x0c, | ||
3784 | 0x13,0x00,0xa0,0xa3,0x18,0x00,0xbf,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
3785 | 0x20,0x00,0xbd,0x27,0xd8,0xff,0xbd,0x27,0x18,0x00,0xb0,0xaf,0x02,0x80,0x10,0x3c, | ||
3786 | 0x68,0x15,0x10,0x26,0x20,0x00,0xbf,0xaf,0x1c,0x00,0xb1,0xaf,0x00,0x40,0x09,0x8e, | ||
3787 | 0xff,0xff,0x02,0x24,0xff,0x00,0x4b,0x30,0x0f,0xff,0x02,0x24,0x24,0x48,0x22,0x01, | ||
3788 | 0xff,0xff,0x02,0x3c,0xff,0x0f,0x42,0x34,0x24,0x48,0x22,0x01,0x01,0x00,0x07,0x3c, | ||
3789 | 0x47,0x00,0x02,0x24,0x3b,0x00,0x03,0x24,0x02,0x80,0x08,0x3c,0x10,0x00,0xa2,0xa3, | ||
3790 | 0x11,0x00,0xa3,0xa3,0xe0,0x97,0x08,0x25,0x56,0x30,0xea,0x34,0xd0,0x07,0x02,0x24, | ||
3791 | 0x01,0x00,0x03,0x24,0xf4,0x98,0xe7,0x34,0x00,0x80,0x06,0x3c,0x04,0x43,0x0b,0xae, | ||
3792 | 0x00,0x40,0x09,0xae,0x43,0x00,0x11,0x24,0x10,0x00,0xa5,0x27,0x0c,0x43,0x07,0xae, | ||
3793 | 0x10,0x43,0x0a,0xae,0x0c,0x00,0x02,0xad,0x14,0x00,0x03,0xa1,0x08,0x43,0x00,0xae, | ||
3794 | 0x14,0x43,0x00,0xae,0x18,0x43,0x00,0xae,0x21,0x20,0x00,0x01,0xe4,0x4e,0xc6,0x24, | ||
3795 | 0x12,0x00,0xb1,0xa3,0xfb,0x0c,0x00,0x0c,0x13,0x00,0xa0,0xa3,0x1e,0x00,0x02,0x24, | ||
3796 | 0x21,0x43,0x02,0xa2,0x4a,0x00,0x03,0x24,0x45,0x00,0x02,0x24,0x1c,0x43,0x03,0xa2, | ||
3797 | 0x1d,0x43,0x02,0xa2,0x23,0x00,0x03,0x24,0x3e,0x00,0x02,0x24,0x1e,0x43,0x11,0xa2, | ||
3798 | 0x1f,0x43,0x02,0xa2,0x20,0x43,0x03,0xa2,0x20,0x00,0xbf,0x8f,0x1c,0x00,0xb1,0x8f, | ||
3799 | 0x18,0x00,0xb0,0x8f,0x08,0x00,0xe0,0x03,0x28,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27, | ||
3800 | 0x3b,0x00,0x02,0x24,0x43,0x00,0x03,0x24,0x10,0x00,0xa2,0xa3,0x11,0x00,0xa3,0xa3, | ||
3801 | 0x36,0x00,0x02,0x24,0x02,0x80,0x03,0x3c,0x02,0x80,0x07,0x3c,0xfc,0x97,0xe7,0x24, | ||
3802 | 0x12,0x00,0xa2,0xa3,0x3b,0x58,0x60,0xa0,0xd0,0x07,0x02,0x24,0x01,0x00,0x03,0x24, | ||
3803 | 0x00,0x80,0x06,0x3c,0x10,0x00,0xa5,0x27,0x21,0x20,0xe0,0x00,0x20,0x53,0xc6,0x24, | ||
3804 | 0x0c,0x00,0xe2,0xac,0x14,0x00,0xe3,0xa0,0x18,0x00,0xbf,0xaf,0xfb,0x0c,0x00,0x0c, | ||
3805 | 0x13,0x00,0xa0,0xa3,0x18,0x00,0xbf,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
3806 | 0x20,0x00,0xbd,0x27,0xff,0xff,0x07,0x24,0x02,0x80,0x02,0x3c,0xe0,0xff,0xbd,0x27, | ||
3807 | 0x3d,0x58,0x47,0xa0,0x3b,0x00,0x03,0x24,0x43,0x00,0x02,0x24,0x10,0x00,0xa3,0xa3, | ||
3808 | 0x11,0x00,0xa2,0xa3,0x36,0x00,0x03,0x24,0x16,0x00,0x02,0x24,0x02,0x80,0x08,0x3c, | ||
3809 | 0x18,0x98,0x08,0x25,0x12,0x00,0xa3,0xa3,0x13,0x00,0xa2,0xa3,0xd0,0x07,0x03,0x24, | ||
3810 | 0x01,0x00,0x02,0x24,0x00,0x80,0x06,0x3c,0x10,0x00,0xa5,0x27,0x21,0x20,0x00,0x01, | ||
3811 | 0x0c,0x00,0x03,0xad,0x14,0x00,0x02,0xa1,0x18,0x00,0xbf,0xaf,0xfb,0x0c,0x00,0x0c, | ||
3812 | 0xb8,0x54,0xc6,0x24,0x18,0x00,0xbf,0x8f,0x00,0x00,0x00,0x00,0x08,0x00,0xe0,0x03, | ||
3813 | 0x20,0x00,0xbd,0x27,0xe0,0xff,0xbd,0x27,0x02,0x80,0x02,0x3c,0x52,0x00,0x03,0x24, | ||
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3844 | 0x01,0x00,0x2f,0x07,0x78,0x0c,0x00,0x00,0x01,0x00,0x30,0x05,0x78,0x0c,0x00,0x00, | ||
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3846 | 0x01,0x00,0x33,0x01,0x78,0x0c,0x00,0x00,0x01,0x00,0x34,0x01,0x78,0x0c,0x00,0x00, | ||
3847 | 0x01,0x00,0x35,0x01,0x78,0x0c,0x00,0x00,0x01,0x00,0x36,0x01,0x78,0x0c,0x00,0x00, | ||
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3849 | 0x01,0x00,0x39,0x01,0x78,0x0c,0x00,0x00,0x01,0x00,0x3a,0x01,0x78,0x0c,0x00,0x00, | ||
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3852 | 0x01,0x00,0x3f,0x01,0x78,0x0c,0x00,0x00,0x01,0x00,0x40,0x5e,0x78,0x0c,0x00,0x00, | ||
3853 | 0x01,0x00,0x41,0x5e,0x78,0x0c,0x00,0x00,0x01,0x00,0x42,0x5e,0x78,0x0c,0x00,0x00, | ||
3854 | 0x01,0x00,0x43,0x5e,0x78,0x0c,0x00,0x00,0x01,0x00,0x44,0x5d,0x78,0x0c,0x00,0x00, | ||
3855 | 0x01,0x00,0x45,0x5b,0x78,0x0c,0x00,0x00,0x01,0x00,0x46,0x59,0x78,0x0c,0x00,0x00, | ||
3856 | 0x01,0x00,0x47,0x57,0x78,0x0c,0x00,0x00,0x01,0x00,0x48,0x55,0x78,0x0c,0x00,0x00, | ||
3857 | 0x01,0x00,0x49,0x53,0x78,0x0c,0x00,0x00,0x01,0x00,0x4a,0x51,0x78,0x0c,0x00,0x00, | ||
3858 | 0x01,0x00,0x4b,0x4f,0x78,0x0c,0x00,0x00,0x01,0x00,0x4c,0x4d,0x78,0x0c,0x00,0x00, | ||
3859 | 0x01,0x00,0x4d,0x4b,0x78,0x0c,0x00,0x00,0x01,0x00,0x4e,0x49,0x78,0x0c,0x00,0x00, | ||
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3864 | 0x01,0x00,0x57,0x37,0x78,0x0c,0x00,0x00,0x01,0x00,0x58,0x35,0x78,0x0c,0x00,0x00, | ||
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3919 | 0xff,0x10,0x10,0x80,0x14,0x08,0x00,0x00,0x10,0x3d,0x0c,0x02,0x18,0x08,0x00,0x00, | ||
3920 | 0xc5,0x03,0x00,0x00,0x1c,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x00, | ||
3921 | 0x04,0x00,0x00,0x00,0x24,0x08,0x00,0x00,0x00,0x02,0x69,0x00,0x28,0x08,0x00,0x00, | ||
3922 | 0x04,0x00,0x00,0x00,0x2c,0x08,0x00,0x00,0x00,0x02,0x69,0x00,0x30,0x08,0x00,0x00, | ||
3923 | 0x04,0x00,0x00,0x00,0x34,0x08,0x00,0x00,0x00,0x02,0x69,0x00,0x38,0x08,0x00,0x00, | ||
3924 | 0x04,0x00,0x00,0x00,0x3c,0x08,0x00,0x00,0x00,0x02,0x69,0x00,0x40,0x08,0x00,0x00, | ||
3925 | 0x00,0x00,0x00,0x00,0x44,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x48,0x08,0x00,0x00, | ||
3926 | 0x00,0x00,0x00,0x00,0x4c,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x50,0x08,0x00,0x00, | ||
3927 | 0x00,0x00,0x00,0x00,0x54,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x58,0x08,0x00,0x00, | ||
3928 | 0x65,0xa9,0x65,0xa9,0x5c,0x08,0x00,0x00,0x65,0xa9,0x65,0xa9,0x60,0x08,0x00,0x00, | ||
3929 | 0x30,0x01,0x7f,0x0f,0x64,0x08,0x00,0x00,0x30,0x01,0x7f,0x0f,0x68,0x08,0x00,0x00, | ||
3930 | 0x30,0x01,0x7f,0x0f,0x6c,0x08,0x00,0x00,0x30,0x01,0x7f,0x0f,0x70,0x08,0x00,0x00, | ||
3931 | 0x00,0x03,0x00,0x03,0x74,0x08,0x00,0x00,0x00,0x03,0x00,0x03,0x78,0x08,0x00,0x00, | ||
3932 | 0x00,0x00,0x00,0x00,0x7c,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x08,0x00,0x00, | ||
3933 | 0x00,0x00,0x00,0x00,0x94,0x08,0x00,0x00,0xfe,0xff,0xff,0xff,0x98,0x08,0x00,0x00, | ||
3934 | 0x10,0x20,0x30,0x40,0x9c,0x08,0x00,0x00,0x50,0x60,0x70,0x00,0xb0,0x08,0x00,0x00, | ||
3935 | 0x00,0x00,0x00,0x00,0xe0,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0xe4,0x08,0x00,0x00, | ||
3936 | 0x00,0x00,0x00,0x00,0x00,0x0e,0x00,0x00,0x03,0x03,0x03,0x03,0x04,0x0e,0x00,0x00, | ||
3937 | 0x03,0x03,0x03,0x03,0x08,0x0e,0x00,0x00,0x03,0x03,0x00,0x00,0x0c,0x0e,0x00,0x00, | ||
3938 | 0x00,0x00,0x00,0x00,0x10,0x0e,0x00,0x00,0x03,0x03,0x03,0x03,0x14,0x0e,0x00,0x00, | ||
3939 | 0x03,0x03,0x03,0x03,0x18,0x0e,0x00,0x00,0x03,0x03,0x03,0x03,0x1c,0x0e,0x00,0x00, | ||
3940 | 0x03,0x03,0x03,0x03,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x09,0x00,0x00, | ||
3941 | 0x23,0x00,0x00,0x00,0x08,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x0c,0x09,0x00,0x00, | ||
3942 | 0x33,0x13,0x32,0x03,0x08,0x0a,0x00,0x00,0x00,0x86,0x88,0x8f,0x2c,0x0a,0x00,0x00, | ||
3943 | 0x00,0x00,0x92,0x00,0x00,0x0c,0x00,0x00,0x80,0x00,0x00,0x00,0x04,0x0c,0x00,0x00, | ||
3944 | 0x33,0x54,0x00,0x00,0x08,0x0c,0x00,0x00,0xe4,0x00,0x00,0x00,0x0c,0x0c,0x00,0x00, | ||
3945 | 0x6c,0x6c,0x6c,0x6c,0x10,0x0c,0x00,0x00,0x00,0x00,0x00,0x08,0x14,0x0c,0x00,0x00, | ||
3946 | 0x00,0x01,0x00,0x40,0x18,0x0c,0x00,0x00,0x00,0x00,0x00,0x08,0x1c,0x0c,0x00,0x00, | ||
3947 | 0x00,0x01,0x00,0x40,0x20,0x0c,0x00,0x00,0x00,0x00,0x00,0x08,0x24,0x0c,0x00,0x00, | ||
3948 | 0x00,0x01,0x00,0x40,0x28,0x0c,0x00,0x00,0x00,0x00,0x00,0x08,0x2c,0x0c,0x00,0x00, | ||
3949 | 0x00,0x01,0x00,0x40,0x30,0x0c,0x00,0x00,0x44,0x6a,0xe9,0x8d,0x34,0x0c,0x00,0x00, | ||
3950 | 0xcd,0x52,0x96,0x46,0x38,0x0c,0x00,0x00,0x90,0x5a,0x01,0x48,0x3c,0x0c,0x00,0x00, | ||
3951 | 0x64,0x97,0x97,0x1a,0x40,0x0c,0x00,0x00,0x3f,0x42,0x7c,0x1f,0x44,0x0c,0x00,0x00, | ||
3952 | 0xb7,0x00,0x01,0x00,0x48,0x0c,0x00,0x00,0x00,0x00,0x02,0xec,0x4c,0x0c,0x00,0x00, | ||
3953 | 0x03,0x03,0xfc,0x00,0x50,0x0c,0x00,0x00,0x1c,0x34,0x54,0x69,0x54,0x0c,0x00,0x00, | ||
3954 | 0x94,0x00,0x3c,0x43,0x58,0x0c,0x00,0x00,0x1c,0x34,0x54,0x69,0x5c,0x0c,0x00,0x00, | ||
3955 | 0x94,0x00,0x3c,0x43,0x60,0x0c,0x00,0x00,0x1c,0x34,0x54,0x69,0x64,0x0c,0x00,0x00, | ||
3956 | 0x94,0x00,0x3c,0x43,0x68,0x0c,0x00,0x00,0x1c,0x34,0x54,0x69,0x6c,0x0c,0x00,0x00, | ||
3957 | 0x94,0x00,0x3c,0x43,0x70,0x0c,0x00,0x00,0x0d,0x00,0x5a,0x2c,0x74,0x0c,0x00,0x00, | ||
3958 | 0x1b,0x15,0x86,0x01,0x78,0x0c,0x00,0x00,0x1f,0x00,0x00,0x00,0x7c,0x0c,0x00,0x00, | ||
3959 | 0x12,0x16,0xb9,0x00,0x80,0x0c,0x00,0x00,0x80,0x00,0x00,0x20,0x84,0x0c,0x00,0x00, | ||
3960 | 0x00,0x00,0x00,0x00,0x88,0x0c,0x00,0x00,0x80,0x00,0x00,0x20,0x8c,0x0c,0x00,0x00, | ||
3961 | 0x00,0x00,0x20,0x08,0x90,0x0c,0x00,0x00,0x00,0x01,0x00,0x40,0x94,0x0c,0x00,0x00, | ||
3962 | 0x00,0x00,0x00,0x00,0x98,0x0c,0x00,0x00,0x00,0x01,0x00,0x40,0x9c,0x0c,0x00,0x00, | ||
3963 | 0x00,0x00,0x00,0x00,0xa0,0x0c,0x00,0x00,0x92,0x24,0x49,0x00,0xa4,0x0c,0x00,0x00, | ||
3964 | 0x00,0x00,0x00,0x00,0xa8,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xac,0x0c,0x00,0x00, | ||
3965 | 0x00,0x00,0x00,0x00,0xb0,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xb4,0x0c,0x00,0x00, | ||
3966 | 0x00,0x00,0x00,0x00,0xb8,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xbc,0x0c,0x00,0x00, | ||
3967 | 0x92,0x24,0x49,0x00,0xc0,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xc4,0x0c,0x00,0x00, | ||
3968 | 0x00,0x00,0x00,0x00,0xc8,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xcc,0x0c,0x00,0x00, | ||
3969 | 0x00,0x00,0x00,0x00,0xd0,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0xd4,0x0c,0x00,0x00, | ||
3970 | 0x00,0x00,0x00,0x00,0xd8,0x0c,0x00,0x00,0x27,0x24,0xb2,0x64,0xdc,0x0c,0x00,0x00, | ||
3971 | 0x32,0x69,0x76,0x00,0xe0,0x0c,0x00,0x00,0x22,0x22,0x22,0x00,0xe4,0x0c,0x00,0x00, | ||
3972 | 0x00,0x00,0x00,0x00,0xe8,0x0c,0x00,0x00,0x02,0x43,0x64,0x07,0x00,0x0d,0x00,0x00, | ||
3973 | 0x80,0x07,0x00,0x00,0x04,0x0d,0x00,0x00,0x03,0x04,0x00,0x00,0x08,0x0d,0x00,0x00, | ||
3974 | 0x7f,0x90,0x00,0x00,0x0c,0x0d,0x00,0x00,0x01,0x00,0x00,0x00,0x10,0x0d,0x00,0x00, | ||
3975 | 0x99,0x99,0x69,0xa0,0x14,0x0d,0x00,0x00,0x67,0x3c,0x99,0x99,0x18,0x0d,0x00,0x00, | ||
3976 | 0x6b,0x5b,0x8f,0x6a,0x1c,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x0d,0x00,0x00, | ||
3977 | 0x00,0x00,0x00,0x00,0x24,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x28,0x0d,0x00,0x00, | ||
3978 | 0x00,0x00,0x00,0x00,0x2c,0x0d,0x00,0x00,0x75,0x19,0x97,0xcc,0x30,0x0d,0x00,0x00, | ||
3979 | 0x00,0x00,0x00,0x00,0x34,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x0d,0x00,0x00, | ||
3980 | 0x00,0x00,0x00,0x00,0x3c,0x0d,0x00,0x00,0x93,0x72,0x02,0x00,0x40,0x0d,0x00,0x00, | ||
3981 | 0x00,0x00,0x00,0x00,0x44,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x48,0x0d,0x00,0x00, | ||
3982 | 0x00,0x00,0x00,0x00,0x50,0x0d,0x00,0x00,0x0a,0x14,0x37,0x64,0x54,0x0d,0x00,0x00, | ||
3983 | 0x02,0xbd,0x4d,0x02,0x58,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x5c,0x0d,0x00,0x00, | ||
3984 | 0x64,0x20,0x03,0x30,0x60,0x0d,0x00,0x00,0x68,0xde,0x53,0x46,0x64,0x0d,0x00,0x00, | ||
3985 | 0x3c,0x8a,0x51,0x00,0x68,0x0d,0x00,0x00,0x06,0x01,0x00,0x00,0xff,0x00,0x00,0x00, | ||
3986 | 0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00, | ||
3987 | 0x44,0x05,0x01,0x80,0x10,0x00,0x00,0x00,0x74,0x05,0x01,0x80,0x10,0x00,0x00,0x00, | ||
3988 | 0xe0,0x2e,0x00,0x80,0x10,0x00,0x00,0x00,0xec,0x2e,0x00,0x80,0x10,0x00,0x00,0x00, | ||
3989 | 0xa0,0x08,0x01,0x80,0x08,0x00,0x00,0x00,0x38,0x06,0x01,0x80,0x00,0xb7,0x00,0x00, | ||
3990 | 0x01,0xe0,0x0e,0x00,0x02,0x4d,0x04,0x00,0x03,0x41,0x04,0x00,0x04,0xc3,0x08,0x00, | ||
3991 | 0x05,0x72,0x0c,0x00,0x06,0xe6,0x00,0x00,0x07,0x2a,0x08,0x00,0x08,0x3f,0x00,0x00, | ||
3992 | 0x09,0x35,0x03,0x00,0x0a,0xd4,0x09,0x00,0x0b,0xbb,0x07,0x00,0x0c,0x50,0x08,0x00, | ||
3993 | 0x0d,0xdf,0x0c,0x00,0x0e,0x2b,0x00,0x00,0x0f,0x14,0x01,0x00,0x00,0xb7,0x01,0x00, | ||
3994 | 0x01,0x01,0x00,0x00,0x02,0x00,0x04,0x00,0x01,0x02,0x00,0x00,0x02,0x01,0x04,0x00, | ||
3995 | 0x01,0x03,0x00,0x00,0x02,0x02,0x04,0x00,0x01,0x04,0x00,0x00,0x02,0x03,0x04,0x00, | ||
3996 | 0x01,0x05,0x00,0x00,0x02,0x04,0x04,0x00,0x01,0x06,0x00,0x00,0x02,0x05,0x04,0x00, | ||
3997 | 0x01,0x07,0x00,0x00,0x02,0x08,0x04,0x00,0x01,0x08,0x00,0x00,0x02,0x09,0x04,0x00, | ||
3998 | 0x01,0x09,0x00,0x00,0x02,0x0a,0x04,0x00,0x01,0x0a,0x00,0x00,0x02,0x0b,0x04,0x00, | ||
3999 | 0x01,0x0b,0x00,0x00,0x02,0x02,0x05,0x00,0x01,0x0c,0x00,0x00,0x02,0x03,0x05,0x00, | ||
4000 | 0x01,0x0d,0x00,0x00,0x02,0x04,0x05,0x00,0x01,0x0e,0x00,0x00,0x02,0x05,0x05,0x00, | ||
4001 | 0x01,0x0f,0x00,0x00,0x02,0x40,0x05,0x00,0x01,0x10,0x00,0x00,0x02,0x41,0x05,0x00, | ||
4002 | 0x01,0x11,0x00,0x00,0x02,0x42,0x05,0x00,0x01,0x12,0x00,0x00,0x02,0x43,0x05,0x00, | ||
4003 | 0x01,0x13,0x00,0x00,0x02,0x44,0x05,0x00,0x01,0x14,0x00,0x00,0x02,0x45,0x05,0x00, | ||
4004 | 0x01,0x15,0x00,0x00,0x02,0x80,0x05,0x00,0x01,0x16,0x00,0x00,0x02,0x81,0x05,0x00, | ||
4005 | 0x01,0x17,0x00,0x00,0x02,0x82,0x05,0x00,0x01,0x18,0x00,0x00,0x02,0x83,0x05,0x00, | ||
4006 | 0x01,0x19,0x00,0x00,0x02,0x84,0x05,0x00,0x01,0x1a,0x00,0x00,0x02,0x85,0x05,0x00, | ||
4007 | 0x01,0x1b,0x00,0x00,0x02,0x88,0x05,0x00,0x01,0x1c,0x00,0x00,0x02,0x89,0x05,0x00, | ||
4008 | 0x01,0x1d,0x00,0x00,0x02,0x8a,0x05,0x00,0x01,0x1e,0x00,0x00,0x02,0x8b,0x05,0x00, | ||
4009 | 0x01,0x1f,0x00,0x00,0x02,0x43,0x06,0x00,0x01,0x20,0x00,0x00,0x02,0x44,0x06,0x00, | ||
4010 | 0x01,0x21,0x00,0x00,0x02,0x45,0x06,0x00,0x01,0x22,0x00,0x00,0x02,0x80,0x06,0x00, | ||
4011 | 0x01,0x23,0x00,0x00,0x02,0x81,0x06,0x00,0x01,0x24,0x00,0x00,0x02,0x82,0x06,0x00, | ||
4012 | 0x01,0x25,0x00,0x00,0x02,0x83,0x06,0x00,0x01,0x26,0x00,0x00,0x02,0x84,0x06,0x00, | ||
4013 | 0x01,0x27,0x00,0x00,0x02,0x85,0x06,0x00,0x01,0x28,0x00,0x00,0x02,0x88,0x06,0x00, | ||
4014 | 0x01,0x29,0x00,0x00,0x02,0x89,0x06,0x00,0x01,0x2a,0x00,0x00,0x02,0x8a,0x06,0x00, | ||
4015 | 0x01,0x2b,0x00,0x00,0x02,0x8b,0x06,0x00,0x01,0x2c,0x00,0x00,0x02,0x8c,0x06,0x00, | ||
4016 | 0x01,0x2d,0x00,0x00,0x02,0x42,0x07,0x00,0x01,0x2e,0x00,0x00,0x02,0x43,0x07,0x00, | ||
4017 | 0x01,0x2f,0x00,0x00,0x02,0x44,0x07,0x00,0x01,0x30,0x00,0x00,0x02,0x45,0x07,0x00, | ||
4018 | 0x01,0x31,0x00,0x00,0x02,0x80,0x07,0x00,0x01,0x32,0x00,0x00,0x02,0x81,0x07,0x00, | ||
4019 | 0x01,0x33,0x00,0x00,0x02,0x82,0x07,0x00,0x01,0x34,0x00,0x00,0x02,0x83,0x07,0x00, | ||
4020 | 0x01,0x35,0x00,0x00,0x02,0x84,0x07,0x00,0x01,0x36,0x00,0x00,0x02,0x85,0x07,0x00, | ||
4021 | 0x01,0x37,0x00,0x00,0x02,0x88,0x07,0x00,0x01,0x38,0x00,0x00,0x02,0x89,0x07,0x00, | ||
4022 | 0x01,0x39,0x00,0x00,0x02,0x8a,0x07,0x00,0x01,0x3a,0x00,0x00,0x02,0x8b,0x07,0x00, | ||
4023 | 0x01,0x3b,0x00,0x00,0x02,0x8c,0x07,0x00,0x01,0x3c,0x00,0x00,0x02,0x8d,0x07,0x00, | ||
4024 | 0x01,0x3d,0x00,0x00,0x02,0x90,0x07,0x00,0x01,0x3e,0x00,0x00,0x02,0x91,0x07,0x00, | ||
4025 | 0x01,0x3f,0x00,0x00,0x02,0x92,0x07,0x00,0x01,0x40,0x00,0x00,0x02,0x93,0x07,0x00, | ||
4026 | 0x01,0x41,0x00,0x00,0x02,0x94,0x07,0x00,0x01,0x42,0x00,0x00,0x02,0x95,0x07,0x00, | ||
4027 | 0x01,0x43,0x00,0x00,0x02,0x98,0x07,0x00,0x01,0x44,0x00,0x00,0x02,0x99,0x07,0x00, | ||
4028 | 0x01,0x45,0x00,0x00,0x02,0x9a,0x07,0x00,0x01,0x46,0x00,0x00,0x02,0x9b,0x07,0x00, | ||
4029 | 0x01,0x47,0x00,0x00,0x02,0x9c,0x07,0x00,0x01,0x48,0x00,0x00,0x02,0x9d,0x07,0x00, | ||
4030 | 0x01,0x49,0x00,0x00,0x02,0xa0,0x07,0x00,0x01,0x4a,0x00,0x00,0x02,0xa1,0x07,0x00, | ||
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4081 | 0x01,0x41,0x00,0x00,0x02,0x94,0x07,0x00,0x01,0x42,0x00,0x00,0x02,0x95,0x07,0x00, | ||
4082 | 0x01,0x43,0x00,0x00,0x02,0x98,0x07,0x00,0x01,0x44,0x00,0x00,0x02,0x99,0x07,0x00, | ||
4083 | 0x01,0x45,0x00,0x00,0x02,0x9a,0x07,0x00,0x01,0x46,0x00,0x00,0x02,0x9b,0x07,0x00, | ||
4084 | 0x01,0x47,0x00,0x00,0x02,0x9c,0x07,0x00,0x01,0x48,0x00,0x00,0x02,0x9d,0x07,0x00, | ||
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4140 | 0x30,0x08,0x10,0x20,0x30,0x30,0x30,0x30,0x30,0x30,0x00,0x00,0x08,0x08,0x08,0x08, | ||
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4142 | 0x08,0x08,0x08,0x08,0x08,0x20,0x20,0x20,0x20,0x08,0x08,0x08,0x08,0x18,0x18,0x18, | ||
4143 | 0x18,0x18,0x20,0x30,0x30,0x10,0x20,0x20,0x20,0x20,0x20,0x30,0x30,0x08,0x10,0x20, | ||
4144 | 0x30,0x30,0x30,0x30,0x30,0x30,0x00,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08, | ||
4145 | 0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x00, | ||
4146 | 0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00, | ||
4147 | 0x0a,0x09,0x08,0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x12,0x11,0x10,0x08,0x00,0x22, | ||
4148 | 0x21,0x20,0x18,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09, | ||
4149 | 0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x22,0x21,0x20,0x18,0x00,0x22,0x21,0x20, | ||
4150 | 0x18,0x00,0x22,0x21,0x1c,0x08,0x00,0x22,0x20,0x18,0x08,0x00,0x0a,0x09,0x08,0x02, | ||
4151 | 0x00,0x0a,0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x02,0x00, | ||
4152 | 0x0a,0x09,0x08,0x00,0x00,0x22,0x21,0x20,0x10,0x00,0x22,0x21,0x20,0x08,0x00,0x22, | ||
4153 | 0x21,0x1c,0x08,0x00,0x31,0x30,0x18,0x00,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09, | ||
4154 | 0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x1a,0x19,0x18, | ||
4155 | 0x10,0x00,0x1a,0x19,0x18,0x10,0x00,0x1a,0x19,0x18,0x10,0x00,0x1a,0x19,0x18,0x10, | ||
4156 | 0x00,0x1a,0x19,0x18,0x10,0x00,0x22,0x21,0x20,0x08,0x00,0x31,0x2c,0x10,0x10,0x00, | ||
4157 | 0x31,0x28,0x10,0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x22,0x21,0x20,0x18,0x00,0x22, | ||
4158 | 0x21,0x20,0x18,0x00,0x22,0x21,0x20,0x08,0x00,0x22,0x21,0x14,0x08,0x00,0x22,0x20, | ||
4159 | 0x18,0x08,0x00,0x31,0x30,0x20,0x10,0x00,0x31,0x2c,0x10,0x10,0x00,0x0a,0x09,0x08, | ||
4160 | 0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x22,0x21,0x20,0x18,0x00,0x22,0x21,0x20,0x18, | ||
4161 | 0x00,0x31,0x30,0x20,0x10,0x00,0x31,0x2f,0x10,0x10,0x00,0x31,0x2f,0x10,0x10,0x00, | ||
4162 | 0x31,0x10,0x10,0x00,0x00,0x31,0x2c,0x10,0x10,0x00,0x00,0x00,0x0a,0x09,0x08,0x04, | ||
4163 | 0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00, | ||
4164 | 0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a, | ||
4165 | 0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x12,0x11, | ||
4166 | 0x10,0x08,0x00,0x22,0x21,0x20,0x18,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08, | ||
4167 | 0x04,0x00,0x0a,0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x00,0x00,0x0a,0x09,0x08,0x00, | ||
4168 | 0x00,0x22,0x21,0x20,0x18,0x00,0x22,0x21,0x1c,0x08,0x00,0x22,0x21,0x14,0x08,0x00, | ||
4169 | 0x0a,0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x02,0x00,0x0a, | ||
4170 | 0x09,0x08,0x02,0x00,0x0a,0x09,0x08,0x00,0x00,0x22,0x21,0x20,0x10,0x00,0x22,0x21, | ||
4171 | 0x20,0x08,0x00,0x22,0x21,0x14,0x08,0x00,0x22,0x21,0x14,0x08,0x00,0x0a,0x09,0x08, | ||
4172 | 0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04,0x00,0x0a,0x09,0x08,0x04, | ||
4173 | 0x00,0x1a,0x19,0x18,0x10,0x00,0x1a,0x19,0x18,0x10,0x00,0x1a,0x19,0x18,0x10,0x00, | ||
4174 | 0x1a,0x19,0x18,0x10,0x00,0x1a,0x19,0x18,0x10,0x00,0x22,0x21,0x20,0x08,0x00,0x31, | ||
4175 | 0x2c,0x10,0x10,0x00,0x31,0x28,0x10,0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x22,0x21, | ||
4176 | 0x20,0x18,0x00,0x22,0x21,0x20,0x18,0x00,0x22,0x21,0x20,0x08,0x00,0x22,0x21,0x14, | ||
4177 | 0x08,0x00,0x22,0x20,0x18,0x08,0x00,0x31,0x30,0x20,0x10,0x00,0x31,0x2c,0x10,0x10, | ||
4178 | 0x00,0x0a,0x09,0x08,0x00,0x00,0x12,0x11,0x10,0x08,0x00,0x22,0x21,0x20,0x18,0x00, | ||
4179 | 0x22,0x21,0x20,0x18,0x00,0x31,0x30,0x20,0x10,0x00,0x31,0x2f,0x10,0x10,0x00,0x31, | ||
4180 | 0x2f,0x10,0x10,0x00,0x31,0x10,0x10,0x00,0x00,0x31,0x2c,0x10,0x10,0x00,0x00,0x00, | ||
4181 | 0x01,0x02,0x04,0x08,0x02,0x04,0x08,0x0c,0x10,0x18,0x20,0x30,0x02,0x04,0x08,0x0c, | ||
4182 | 0x10,0x18,0x20,0x30,0x06,0x0c,0x10,0x18,0x24,0x30,0x3c,0x48,0x48,0x00,0x00,0x00, | ||
4183 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x27,0x2c,0x19,0x1b,0x1e,0x20, | ||
4184 | 0x23,0x29,0x2a,0x2b,0x00,0x00,0x00,0x00,0x25,0x29,0x2b,0x2e,0x2e,0x00,0x00,0x00, | ||
4185 | 0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,0x00,0x00,0x00, | ||
4186 | 0x18,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00, | ||
4187 | 0x60,0x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x00,0xd8,0x00,0x00,0x00, | ||
4188 | 0x50,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0xa0,0x00,0x00,0x00,0xc8,0x00,0x00,0x00, | ||
4189 | 0x40,0x01,0x00,0x00,0x90,0x01,0x00,0x00,0xe0,0x01,0x00,0x00,0x30,0x02,0x00,0x00, | ||
4190 | 0x2c,0x01,0x00,0x00,0x40,0x01,0x00,0x00,0xe0,0x01,0x00,0x00,0xd0,0x02,0x00,0x00, | ||
4191 | 0x80,0x0c,0x00,0x00,0x80,0x0c,0x00,0x00,0x80,0x0c,0x00,0x00,0xa0,0x0f,0x00,0x00, | ||
4192 | 0xa0,0x0f,0x00,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x04,0x00,0x00,0x00, | ||
4193 | 0x08,0x00,0x00,0x00,0x0c,0x00,0x00,0x00,0x12,0x00,0x00,0x00,0x18,0x00,0x00,0x00, | ||
4194 | 0x24,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x60,0x00,0x00,0x00, | ||
4195 | 0x6c,0x00,0x00,0x00,0x28,0x00,0x00,0x00,0x3c,0x00,0x00,0x00,0x50,0x00,0x00,0x00, | ||
4196 | 0x64,0x00,0x00,0x00,0xa0,0x00,0x00,0x00,0xc8,0x00,0x00,0x00,0xf0,0x00,0x00,0x00, | ||
4197 | 0x18,0x01,0x00,0x00,0x64,0x00,0x00,0x00,0xa0,0x00,0x00,0x00,0xf0,0x00,0x00,0x00, | ||
4198 | 0x68,0x01,0x00,0x00,0x40,0x06,0x00,0x00,0x40,0x06,0x00,0x00,0x40,0x06,0x00,0x00, | ||
4199 | 0xd0,0x07,0x00,0x00,0xd0,0x07,0x00,0x00,0x2c,0x05,0x00,0x80,0x20,0x05,0x00,0x80, | ||
4200 | 0x14,0x05,0x00,0x80,0x08,0x05,0x00,0x80,0xfc,0x04,0x00,0x80,0xf0,0x04,0x00,0x80, | ||
4201 | 0xe4,0x04,0x00,0x80,0xd8,0x04,0x00,0x80,0xcc,0x04,0x00,0x80,0xc0,0x04,0x00,0x80, | ||
4202 | 0x78,0x04,0x00,0x80,0x68,0x15,0x02,0x80,0xc0,0x3a,0x00,0x80,0xcc,0x3a,0x00,0x80, | ||
4203 | 0xd8,0x3a,0x00,0x80,0xe4,0x3a,0x00,0x80,0xc0,0x3a,0x00,0x80,0xc0,0x3a,0x00,0x80, | ||
4204 | 0xc0,0x3a,0x00,0x80,0xc0,0x3a,0x00,0x80,0xf0,0x3a,0x00,0x80,0xfc,0x3a,0x00,0x80, | ||
4205 | 0x08,0x3b,0x00,0x80,0x14,0x3b,0x00,0x80,0x68,0x15,0x02,0x80,0xfe,0x01,0x80,0x7f, | ||
4206 | 0xe2,0x01,0x80,0x78,0xc7,0x01,0xc0,0x71,0xae,0x01,0x80,0x6b,0x95,0x01,0x40,0x65, | ||
4207 | 0x7f,0x01,0xc0,0x5f,0x69,0x01,0x40,0x5a,0x55,0x01,0x40,0x55,0x42,0x01,0x80,0x50, | ||
4208 | 0x30,0x01,0x00,0x4c,0x1f,0x01,0xc0,0x47,0x0f,0x01,0xc0,0x43,0x00,0x01,0x00,0x40, | ||
4209 | 0xf2,0x00,0x80,0x3c,0xe4,0x00,0x00,0x39,0xd7,0x00,0xc0,0x35,0xcb,0x00,0xc0,0x32, | ||
4210 | 0xc0,0x00,0x00,0x30,0xb5,0x00,0x40,0x2d,0xab,0x00,0xc0,0x2a,0xa2,0x00,0x80,0x28, | ||
4211 | 0x98,0x00,0x00,0x26,0x90,0x00,0x00,0x24,0x88,0x00,0x00,0x22,0x80,0x00,0x00,0x20, | ||
4212 | 0x79,0x00,0x40,0x1e,0x72,0x00,0x80,0x1c,0x6c,0x00,0x00,0x1b,0x66,0x00,0x80,0x19, | ||
4213 | 0x60,0x00,0x00,0x18,0x5b,0x00,0xc0,0x16,0x56,0x00,0x80,0x15,0x51,0x00,0x40,0x14, | ||
4214 | 0x4c,0x00,0x00,0x13,0x48,0x00,0x00,0x12,0x44,0x00,0x00,0x11,0x40,0x00,0x00,0x10, | ||
4215 | 0x36,0x35,0x2e,0x25,0x1c,0x12,0x09,0x04,0x33,0x32,0x2b,0x23,0x1a,0x11,0x08,0x04, | ||
4216 | 0x30,0x2f,0x29,0x21,0x19,0x10,0x08,0x03,0x2d,0x2d,0x27,0x1f,0x18,0x0f,0x08,0x03, | ||
4217 | 0x2b,0x2a,0x25,0x1e,0x16,0x0e,0x07,0x03,0x28,0x28,0x22,0x1c,0x15,0x0d,0x07,0x03, | ||
4218 | 0x26,0x25,0x21,0x1b,0x14,0x0d,0x06,0x03,0x24,0x23,0x1f,0x19,0x13,0x0c,0x06,0x03, | ||
4219 | 0x22,0x21,0x1d,0x18,0x11,0x0b,0x06,0x02,0x20,0x20,0x1b,0x16,0x11,0x08,0x05,0x02, | ||
4220 | 0x1f,0x1e,0x1a,0x15,0x10,0x0a,0x05,0x02,0x1d,0x1c,0x18,0x14,0x0f,0x0a,0x05,0x02, | ||
4221 | 0x1b,0x1a,0x17,0x13,0x0e,0x09,0x04,0x02,0x1a,0x19,0x16,0x12,0x0d,0x09,0x04,0x02, | ||
4222 | 0x18,0x17,0x15,0x11,0x0c,0x08,0x04,0x02,0x17,0x16,0x13,0x10,0x0c,0x08,0x04,0x02, | ||
4223 | 0x16,0x15,0x12,0x0f,0x0b,0x07,0x04,0x01,0x14,0x14,0x11,0x0e,0x0b,0x07,0x03,0x02, | ||
4224 | 0x13,0x13,0x10,0x0d,0x0a,0x06,0x03,0x01,0x12,0x12,0x0f,0x0c,0x09,0x06,0x03,0x01, | ||
4225 | 0x11,0x11,0x0f,0x0c,0x09,0x06,0x03,0x01,0x10,0x10,0x0e,0x0b,0x08,0x05,0x03,0x01, | ||
4226 | 0x0f,0x0f,0x0d,0x0b,0x08,0x05,0x03,0x01,0x0e,0x0e,0x0c,0x0a,0x08,0x05,0x02,0x01, | ||
4227 | 0x0d,0x0d,0x0c,0x0a,0x07,0x05,0x02,0x01,0x0d,0x0c,0x0b,0x09,0x07,0x04,0x02,0x01, | ||
4228 | 0x0c,0x0c,0x0a,0x09,0x06,0x04,0x02,0x01,0x0b,0x0b,0x0a,0x08,0x06,0x04,0x02,0x01, | ||
4229 | 0x0b,0x0a,0x09,0x08,0x06,0x04,0x02,0x01,0x0a,0x0a,0x09,0x07,0x05,0x03,0x02,0x01, | ||
4230 | 0x0a,0x09,0x08,0x07,0x05,0x03,0x02,0x01,0x09,0x09,0x08,0x06,0x05,0x03,0x01,0x01, | ||
4231 | 0x09,0x08,0x07,0x06,0x04,0x03,0x01,0x01,0x36,0x35,0x2e,0x1b,0x00,0x00,0x00,0x00, | ||
4232 | 0x33,0x32,0x2b,0x19,0x00,0x00,0x00,0x00,0x30,0x2f,0x29,0x18,0x00,0x00,0x00,0x00, | ||
4233 | 0x2d,0x2d,0x17,0x17,0x00,0x00,0x00,0x00,0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00, | ||
4234 | 0x28,0x28,0x24,0x14,0x00,0x00,0x00,0x00,0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00, | ||
4235 | 0x24,0x23,0x1f,0x12,0x00,0x00,0x00,0x00,0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00, | ||
4236 | 0x20,0x20,0x1b,0x10,0x00,0x00,0x00,0x00,0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00, | ||
4237 | 0x1d,0x1c,0x18,0x0e,0x00,0x00,0x00,0x00,0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00, | ||
4238 | 0x1a,0x19,0x16,0x0d,0x00,0x00,0x00,0x00,0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00, | ||
4239 | 0x17,0x16,0x13,0x0b,0x00,0x00,0x00,0x00,0x16,0x15,0x12,0x0b,0x00,0x00,0x00,0x00, | ||
4240 | 0x14,0x14,0x11,0x0a,0x00,0x00,0x00,0x00,0x13,0x13,0x10,0x0a,0x00,0x00,0x00,0x00, | ||
4241 | 0x12,0x12,0x0f,0x09,0x00,0x00,0x00,0x00,0x11,0x11,0x0f,0x09,0x00,0x00,0x00,0x00, | ||
4242 | 0x10,0x10,0x0e,0x08,0x00,0x00,0x00,0x00,0x0f,0x0f,0x0d,0x08,0x00,0x00,0x00,0x00, | ||
4243 | 0x0e,0x0e,0x0c,0x07,0x00,0x00,0x00,0x00,0x0d,0x0d,0x0c,0x07,0x00,0x00,0x00,0x00, | ||
4244 | 0x0d,0x0c,0x0b,0x06,0x00,0x00,0x00,0x00,0x0c,0x0c,0x0a,0x06,0x00,0x00,0x00,0x00, | ||
4245 | 0x0b,0x0b,0x0a,0x06,0x00,0x00,0x00,0x00,0x0b,0x0a,0x09,0x05,0x00,0x00,0x00,0x00, | ||
4246 | 0x0a,0x0a,0x09,0x05,0x00,0x00,0x00,0x00,0x0a,0x09,0x08,0x05,0x00,0x00,0x00,0x00, | ||
4247 | 0x09,0x09,0x08,0x05,0x00,0x00,0x00,0x00,0x09,0x08,0x07,0x04,0x00,0x00,0x00,0x00, | ||
4248 | 0x06,0x00,0x2a,0xb0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4249 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4250 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4251 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4252 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4253 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4254 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4255 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4256 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4257 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4258 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4259 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08, | ||
4260 | 0x08,0x28,0x28,0x28,0x28,0x28,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08, | ||
4261 | 0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10, | ||
4262 | 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04, | ||
4263 | 0x04,0x04,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x41,0x41,0x41,0x41,0x41,0x41,0x01, | ||
4264 | 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, | ||
4265 | 0x01,0x01,0x01,0x10,0x10,0x10,0x10,0x10,0x10,0x42,0x42,0x42,0x42,0x42,0x42,0x02, | ||
4266 | 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, | ||
4267 | 0x02,0x02,0x02,0x10,0x10,0x10,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4268 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4269 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10, | ||
4270 | 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10, | ||
4271 | 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, | ||
4272 | 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x10, | ||
4273 | 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, | ||
4274 | 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10, | ||
4275 | 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x00,0x19,0x77,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4276 | 0x00,0x26,0x72,0xb0,0x00,0x26,0x72,0xb0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | ||
4277 | 0x00,0x00,0x00,0x00,0x00,0x26,0x65,0x60,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x02, | ||
4278 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0xf2,0x30,0xb8,0xff,0xff,0xff,0xff, | ||
4279 | }; | ||
4280 | |||
4281 | u8 Rtl8192SUFwMainArray[MainArrayLength] = { | 5 | u8 Rtl8192SUFwMainArray[MainArrayLength] = { |
4282 | 0x0, }; | 6 | 0x0, }; |
4283 | 7 | ||
diff --git a/drivers/staging/rtl8192su/r8192SU_HWImg.h b/drivers/staging/rtl8192su/r8192SU_HWImg.h index 96b15252ea86..36e84aff6ed6 100644 --- a/drivers/staging/rtl8192su/r8192SU_HWImg.h +++ b/drivers/staging/rtl8192su/r8192SU_HWImg.h | |||
@@ -5,8 +5,6 @@ | |||
5 | 5 | ||
6 | /*Created on 2009/ 3/ 6, 5:29*/ | 6 | /*Created on 2009/ 3/ 6, 5:29*/ |
7 | 7 | ||
8 | #define ImgArrayLength 68368 | ||
9 | extern u8 Rtl8192SUFwImgArray[ImgArrayLength]; | ||
10 | #define MainArrayLength 1 | 8 | #define MainArrayLength 1 |
11 | extern u8 Rtl8192SUFwMainArray[MainArrayLength]; | 9 | extern u8 Rtl8192SUFwMainArray[MainArrayLength]; |
12 | #define DataArrayLength 1 | 10 | #define DataArrayLength 1 |
diff --git a/drivers/staging/rtl8192su/r8192S_firmware.c b/drivers/staging/rtl8192su/r8192S_firmware.c index 3561adf0468a..752a3f1fb3f5 100644 --- a/drivers/staging/rtl8192su/r8192S_firmware.c +++ b/drivers/staging/rtl8192su/r8192S_firmware.c | |||
@@ -360,117 +360,58 @@ bool FirmwareDownload92S(struct net_device *dev) | |||
360 | 360 | ||
361 | RT_TRACE(COMP_FIRMWARE, " --->FirmwareDownload92S()\n"); | 361 | RT_TRACE(COMP_FIRMWARE, " --->FirmwareDownload92S()\n"); |
362 | 362 | ||
363 | //3// | 363 | /* |
364 | //3 //<1> Open Image file, and map file to contineous memory if open file success. | 364 | * Load the firmware from RTL8192SU/rtl8192sfw.bin |
365 | //3 // or read image file from array. Default load from BIN file | 365 | */ |
366 | //3// | 366 | if(pFirmware->szFwTmpBufferLen == 0) |
367 | priv->firmware_source = FW_SOURCE_IMG_FILE;// We should decided by Reg. | ||
368 | |||
369 | switch( priv->firmware_source ) | ||
370 | { | 367 | { |
371 | case FW_SOURCE_IMG_FILE: | 368 | rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->udev->dev); |
372 | if(pFirmware->szFwTmpBufferLen == 0) | 369 | if(rc < 0 ) { |
373 | { | 370 | RT_TRACE(COMP_ERR, "request firmware fail!\n"); |
374 | 371 | goto DownloadFirmware_Fail; | |
375 | rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->udev->dev);//===>1 | 372 | } |
376 | if(rc < 0 ) { | ||
377 | RT_TRACE(COMP_ERR, "request firmware fail!\n"); | ||
378 | goto DownloadFirmware_Fail; | ||
379 | } | ||
380 | |||
381 | if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) | ||
382 | { | ||
383 | RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n"); | ||
384 | release_firmware(fw_entry); | ||
385 | goto DownloadFirmware_Fail; | ||
386 | } | ||
387 | 373 | ||
388 | memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size); | 374 | if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) { |
389 | pFirmware->szFwTmpBufferLen = fw_entry->size; | 375 | RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n"); |
390 | release_firmware(fw_entry); | 376 | release_firmware(fw_entry); |
391 | 377 | goto DownloadFirmware_Fail; | |
392 | pucMappedFile = pFirmware->szFwTmpBuffer; | ||
393 | file_length = pFirmware->szFwTmpBufferLen; | ||
394 | |||
395 | //Retrieve FW header. | ||
396 | pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile; | ||
397 | pFwHdr = pFirmware->pFwHeader; | ||
398 | RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \ | ||
399 | pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \ | ||
400 | pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE); | ||
401 | pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0); | ||
402 | if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) | ||
403 | { | ||
404 | RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\ | ||
405 | __FUNCTION__); | ||
406 | goto DownloadFirmware_Fail; | ||
407 | } else { | ||
408 | pucMappedFile+=FwHdrSize; | ||
409 | |||
410 | //Retrieve IMEM image. | ||
411 | memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE); | ||
412 | pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE; | ||
413 | } | ||
414 | |||
415 | if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) | ||
416 | { | ||
417 | RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\ | ||
418 | __FUNCTION__); | ||
419 | goto DownloadFirmware_Fail; | ||
420 | } else { | ||
421 | pucMappedFile += pFirmware->FwIMEMLen; | ||
422 | |||
423 | /* Retriecve EMEM image */ | ||
424 | memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);//===>6 | ||
425 | pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; | ||
426 | } | ||
427 | |||
428 | |||
429 | } | 378 | } |
430 | break; | ||
431 | 379 | ||
432 | case FW_SOURCE_HEADER_FILE: | 380 | memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size); |
433 | #if 1 | 381 | pFirmware->szFwTmpBufferLen = fw_entry->size; |
434 | #define Rtl819XFwImageArray Rtl8192SUFwImgArray | 382 | release_firmware(fw_entry); |
435 | //2008.11.10 Add by tynli. | 383 | |
436 | pucMappedFile = Rtl819XFwImageArray; | 384 | pucMappedFile = pFirmware->szFwTmpBuffer; |
437 | ulFileLength = ImgArrayLength; | 385 | file_length = pFirmware->szFwTmpBufferLen; |
438 | 386 | ||
439 | RT_TRACE(COMP_INIT,"Fw download from header.\n"); | 387 | /* Retrieve FW header. */ |
440 | /* Retrieve FW header*/ | ||
441 | pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile; | 388 | pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile; |
442 | pFwHdr = pFirmware->pFwHeader; | 389 | pFwHdr = pFirmware->pFwHeader; |
443 | RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \ | 390 | RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \ |
444 | pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \ | 391 | pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \ |
445 | pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE); | 392 | pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE); |
446 | pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0); | 393 | pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0); |
447 | 394 | if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) { | |
448 | if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) | 395 | RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\ |
449 | { | 396 | __FUNCTION__); |
450 | printk("FirmwareDownload92S(): memory for data image is less than IMEM required\n"); | ||
451 | goto DownloadFirmware_Fail; | 397 | goto DownloadFirmware_Fail; |
452 | } else { | 398 | } else { |
453 | pucMappedFile+=FwHdrSize; | 399 | pucMappedFile+=FwHdrSize; |
454 | //Retrieve IMEM image. | 400 | /* Retrieve IMEM image. */ |
455 | memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE); | 401 | memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE); |
456 | pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE; | 402 | pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE; |
457 | } | 403 | } |
458 | 404 | ||
459 | if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) | 405 | if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) { |
460 | { | 406 | RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\ |
461 | printk(" FirmwareDownload92S(): memory for data image is less than EMEM required\n"); | 407 | __FUNCTION__); |
462 | goto DownloadFirmware_Fail; | 408 | goto DownloadFirmware_Fail; |
463 | } else { | 409 | } else { |
464 | pucMappedFile+= pFirmware->FwIMEMLen; | 410 | pucMappedFile += pFirmware->FwIMEMLen; |
465 | 411 | /* Retriecve EMEM image */ | |
466 | //Retriecve EMEM image. | 412 | memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);//===>6 |
467 | memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE); | 413 | pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; |
468 | pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE; | 414 | } |
469 | } | ||
470 | #endif | ||
471 | break; | ||
472 | default: | ||
473 | break; | ||
474 | } | 415 | } |
475 | 416 | ||
476 | FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus); | 417 | FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus); |
@@ -538,3 +479,4 @@ bool FirmwareDownload92S(struct net_device *dev) | |||
538 | return rtStatus; | 479 | return rtStatus; |
539 | } | 480 | } |
540 | 481 | ||
482 | MODULE_FIRMWARE("RTL8192SU/rtl8192sfw.bin"); | ||
diff --git a/drivers/staging/rtl8192su/r8192S_firmware.h b/drivers/staging/rtl8192su/r8192S_firmware.h index c525380e6473..2c2cf8032ded 100644 --- a/drivers/staging/rtl8192su/r8192S_firmware.h +++ b/drivers/staging/rtl8192su/r8192S_firmware.h | |||
@@ -59,12 +59,6 @@ typedef enum _desc_packet_type_e{ | |||
59 | DESC_PACKET_TYPE_NORMAL = 1, | 59 | DESC_PACKET_TYPE_NORMAL = 1, |
60 | }desc_packet_type_e; | 60 | }desc_packet_type_e; |
61 | 61 | ||
62 | typedef enum _firmware_source{ | ||
63 | FW_SOURCE_IMG_FILE = 0, | ||
64 | FW_SOURCE_HEADER_FILE = 1, | ||
65 | }firmware_source_e, *pfirmware_source_e; | ||
66 | |||
67 | |||
68 | typedef enum _opt_rst_type{ | 62 | typedef enum _opt_rst_type{ |
69 | OPT_SYSTEM_RESET = 0, | 63 | OPT_SYSTEM_RESET = 0, |
70 | OPT_FIRMWARE_RESET = 1, | 64 | OPT_FIRMWARE_RESET = 1, |
@@ -185,7 +179,6 @@ typedef enum _FIRMWARE_8192S_STATUS{ | |||
185 | #define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 //64k | 179 | #define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 //64k |
186 | 180 | ||
187 | typedef struct _rt_firmware{ | 181 | typedef struct _rt_firmware{ |
188 | firmware_source_e eFWSource; | ||
189 | PRT_8192S_FIRMWARE_HDR pFwHeader; | 182 | PRT_8192S_FIRMWARE_HDR pFwHeader; |
190 | FIRMWARE_8192S_STATUS FWStatus; | 183 | FIRMWARE_8192S_STATUS FWStatus; |
191 | u16 FirmwareVersion; | 184 | u16 FirmwareVersion; |
diff --git a/drivers/staging/rtl8192su/r8192S_phy.c b/drivers/staging/rtl8192su/r8192S_phy.c index 77ab026288d3..63d4e5fd7b18 100644 --- a/drivers/staging/rtl8192su/r8192S_phy.c +++ b/drivers/staging/rtl8192su/r8192S_phy.c | |||
@@ -2407,8 +2407,8 @@ void PHY_SetBWModeCallback8192S(struct net_device *dev) | |||
2407 | break; | 2407 | break; |
2408 | 2408 | ||
2409 | default: | 2409 | default: |
2410 | RT_TRACE(COMP_DBG, "SetBWModeCallback8190Pci():\ | 2410 | RT_TRACE(COMP_DBG, "SetBWModeCallback8190Pci(): unknown Bandwidth: %#X\n", |
2411 | unknown Bandwidth: %#X\n",priv->CurrentChannelBW); | 2411 | priv->CurrentChannelBW); |
2412 | break; | 2412 | break; |
2413 | } | 2413 | } |
2414 | 2414 | ||
@@ -3398,8 +3398,8 @@ void SwChnlCallback8192SUsb(struct net_device *dev) | |||
3398 | u32 delay; | 3398 | u32 delay; |
3399 | // bool ret; | 3399 | // bool ret; |
3400 | 3400 | ||
3401 | RT_TRACE(COMP_SCAN, "==>SwChnlCallback8190Pci(), switch to channel\ | 3401 | RT_TRACE(COMP_SCAN, "==>SwChnlCallback8190Pci(), switch to channel %d\n", |
3402 | %d\n", priv->chan); | 3402 | priv->chan); |
3403 | 3403 | ||
3404 | 3404 | ||
3405 | if(!priv->up) | 3405 | if(!priv->up) |
@@ -3525,8 +3525,8 @@ void SetBWModeCallback8192SUsb(struct net_device *dev) | |||
3525 | break; | 3525 | break; |
3526 | 3526 | ||
3527 | default: | 3527 | default: |
3528 | RT_TRACE(COMP_DBG, "SetChannelBandwidth8190Pci():\ | 3528 | RT_TRACE(COMP_DBG, "SetChannelBandwidth8190Pci(): unknown Bandwidth: %#X\n", |
3529 | unknown Bandwidth: %#X\n",priv->CurrentChannelBW); | 3529 | priv->CurrentChannelBW); |
3530 | break; | 3530 | break; |
3531 | } | 3531 | } |
3532 | 3532 | ||
@@ -3660,8 +3660,8 @@ void SetBWModeCallback8192SUsbWorkItem(struct net_device *dev) | |||
3660 | break; | 3660 | break; |
3661 | 3661 | ||
3662 | default: | 3662 | default: |
3663 | RT_TRACE(COMP_DBG, "SetBWModeCallback8192SUsbWorkItem():\ | 3663 | RT_TRACE(COMP_DBG, "SetBWModeCallback8192SUsbWorkItem(): unknown Bandwidth: %#X\n", |
3664 | unknown Bandwidth: %#X\n",priv->CurrentChannelBW); | 3664 | priv->CurrentChannelBW); |
3665 | break; | 3665 | break; |
3666 | } | 3666 | } |
3667 | 3667 | ||
diff --git a/drivers/staging/rtl8192su/r8192U.h b/drivers/staging/rtl8192su/r8192U.h index 2a11e0113d3a..ba87623f32ee 100644 --- a/drivers/staging/rtl8192su/r8192U.h +++ b/drivers/staging/rtl8192su/r8192U.h | |||
@@ -1258,7 +1258,6 @@ typedef struct r8192_priv | |||
1258 | u8 Rf_Mode; //add for Firmware RF -R/W switch | 1258 | u8 Rf_Mode; //add for Firmware RF -R/W switch |
1259 | prt_firmware pFirmware; | 1259 | prt_firmware pFirmware; |
1260 | rtl819xUsb_loopback_e LoopbackMode; | 1260 | rtl819xUsb_loopback_e LoopbackMode; |
1261 | firmware_source_e firmware_source; | ||
1262 | bool usb_error; | 1261 | bool usb_error; |
1263 | 1262 | ||
1264 | u16 EEPROMTxPowerDiff; | 1263 | u16 EEPROMTxPowerDiff; |
diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c index 6f424fe8a237..7d0305cc2106 100644 --- a/drivers/staging/rtl8192su/r8192U_core.c +++ b/drivers/staging/rtl8192su/r8192U_core.c | |||
@@ -110,7 +110,7 @@ u32 rt_global_debug_component = \ | |||
110 | #define TOTAL_CAM_ENTRY 32 | 110 | #define TOTAL_CAM_ENTRY 32 |
111 | #define CAM_CONTENT_COUNT 8 | 111 | #define CAM_CONTENT_COUNT 8 |
112 | 112 | ||
113 | static struct usb_device_id rtl8192_usb_id_tbl[] = { | 113 | static const struct usb_device_id rtl8192_usb_id_tbl[] = { |
114 | /* Realtek */ | 114 | /* Realtek */ |
115 | {USB_DEVICE(0x0bda, 0x8192)}, | 115 | {USB_DEVICE(0x0bda, 0x8192)}, |
116 | {USB_DEVICE(0x0bda, 0x8709)}, | 116 | {USB_DEVICE(0x0bda, 0x8709)}, |
@@ -2340,25 +2340,24 @@ short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb) | |||
2340 | skb->len, rtl8192_tx_isr, skb); | 2340 | skb->len, rtl8192_tx_isr, skb); |
2341 | 2341 | ||
2342 | status = usb_submit_urb(tx_urb, GFP_ATOMIC); | 2342 | status = usb_submit_urb(tx_urb, GFP_ATOMIC); |
2343 | if (!status){ | 2343 | if (!status) { |
2344 | //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27 | 2344 | /* |
2345 | * we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. | ||
2346 | * Otherwise, it will be halt to wait for another packet. WB. 2008.08.27 | ||
2347 | */ | ||
2345 | bool bSend0Byte = false; | 2348 | bool bSend0Byte = false; |
2346 | u8 zero = 0; | 2349 | u8 zero = 0; |
2347 | if(udev->speed == USB_SPEED_HIGH) | 2350 | if(udev->speed == USB_SPEED_HIGH) { |
2348 | { | ||
2349 | if (skb->len > 0 && skb->len % 512 == 0) | 2351 | if (skb->len > 0 && skb->len % 512 == 0) |
2350 | bSend0Byte = true; | 2352 | bSend0Byte = true; |
2351 | } | 2353 | } |
2352 | else | 2354 | else { |
2353 | { | ||
2354 | if (skb->len > 0 && skb->len % 64 == 0) | 2355 | if (skb->len > 0 && skb->len % 64 == 0) |
2355 | bSend0Byte = true; | 2356 | bSend0Byte = true; |
2356 | } | 2357 | } |
2357 | if (bSend0Byte) | 2358 | if (bSend0Byte) { |
2358 | { | ||
2359 | #if 1 | ||
2360 | tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC); | 2359 | tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC); |
2361 | if(!tx_urb_zero){ | 2360 | if(!tx_urb_zero) { |
2362 | RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n"); | 2361 | RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n"); |
2363 | return -ENOMEM; | 2362 | return -ENOMEM; |
2364 | } | 2363 | } |
@@ -2366,16 +2365,23 @@ short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb) | |||
2366 | usb_sndbulkpipe(udev,idx_pipe), &zero, | 2365 | usb_sndbulkpipe(udev,idx_pipe), &zero, |
2367 | 0, tx_zero_isr, dev); | 2366 | 0, tx_zero_isr, dev); |
2368 | status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC); | 2367 | status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC); |
2369 | if (status){ | 2368 | switch (status) { |
2370 | RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status); | 2369 | case 0: |
2371 | return -1; | 2370 | break; |
2371 | case -ECONNRESET: | ||
2372 | case -ENOENT: | ||
2373 | case -ESHUTDOWN: | ||
2374 | break; | ||
2375 | default: | ||
2376 | RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", | ||
2377 | atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status); | ||
2378 | return -1; | ||
2372 | } | 2379 | } |
2373 | #endif | ||
2374 | } | 2380 | } |
2375 | dev->trans_start = jiffies; | 2381 | dev->trans_start = jiffies; |
2376 | atomic_inc(&priv->tx_pending[tcb_desc->queue_index]); | 2382 | atomic_inc(&priv->tx_pending[tcb_desc->queue_index]); |
2377 | return 0; | 2383 | return 0; |
2378 | }else{ | 2384 | } else { |
2379 | RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), | 2385 | RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), |
2380 | status); | 2386 | status); |
2381 | return -1; | 2387 | return -1; |
@@ -2952,7 +2958,7 @@ void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode) | |||
2952 | wireless_mode = WIRELESS_MODE_B; | 2958 | wireless_mode = WIRELESS_MODE_B; |
2953 | } | 2959 | } |
2954 | } | 2960 | } |
2955 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA | 2961 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA |
2956 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); | 2962 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); |
2957 | #endif | 2963 | #endif |
2958 | //LZM 090306 usb crash here, mark it temp | 2964 | //LZM 090306 usb crash here, mark it temp |
@@ -3359,6 +3365,46 @@ u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype) | |||
3359 | return RFtype; | 3365 | return RFtype; |
3360 | } | 3366 | } |
3361 | 3367 | ||
3368 | void update_hal_variables(struct r8192_priv *priv) | ||
3369 | { | ||
3370 | int rf_path; | ||
3371 | int i; | ||
3372 | u8 index; | ||
3373 | |||
3374 | for (rf_path = 0; rf_path < 2; rf_path++) { | ||
3375 | for (i = 0; i < 3; i++) { | ||
3376 | RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfCckChnlAreaTxPwr[rf_path][i]); | ||
3377 | RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]); | ||
3378 | RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]); | ||
3379 | } | ||
3380 | /* Assign dedicated channel tx power */ | ||
3381 | for(i = 0; i < 14; i++) { | ||
3382 | /* channel 1-3 use the same Tx Power Level. */ | ||
3383 | if (i < 3) /* Channel 1-3 */ | ||
3384 | index = 0; | ||
3385 | else if (i < 9) /* Channel 4-9 */ | ||
3386 | index = 1; | ||
3387 | else /* Channel 10-14 */ | ||
3388 | index = 2; | ||
3389 | /* Record A & B CCK /OFDM - 1T/2T Channel area tx power */ | ||
3390 | priv->RfTxPwrLevelCck[rf_path][i] = priv->RfCckChnlAreaTxPwr[rf_path][index]; | ||
3391 | priv->RfTxPwrLevelOfdm1T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr1T[rf_path][index]; | ||
3392 | priv->RfTxPwrLevelOfdm2T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr2T[rf_path][index]; | ||
3393 | if (rf_path == 0) { | ||
3394 | priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ; | ||
3395 | priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i]; | ||
3396 | } | ||
3397 | } | ||
3398 | for(i = 0; i < 14; i++) { | ||
3399 | RT_TRACE((COMP_INIT), | ||
3400 | "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n", | ||
3401 | rf_path, i, priv->RfTxPwrLevelCck[rf_path][i], | ||
3402 | priv->RfTxPwrLevelOfdm1T[rf_path][i] , | ||
3403 | priv->RfTxPwrLevelOfdm2T[rf_path][i] ); | ||
3404 | } | ||
3405 | } | ||
3406 | } | ||
3407 | |||
3362 | // | 3408 | // |
3363 | // Description: | 3409 | // Description: |
3364 | // Config HW adapter information into initial value. | 3410 | // Config HW adapter information into initial value. |
@@ -3374,7 +3420,7 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) | |||
3374 | struct r8192_priv *priv = ieee80211_priv(dev); | 3420 | struct r8192_priv *priv = ieee80211_priv(dev); |
3375 | //u16 i,usValue; | 3421 | //u16 i,usValue; |
3376 | //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; | 3422 | //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; |
3377 | u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117 | 3423 | u8 rf_path; // For EEPROM/EFUSE After V0.6_1117 |
3378 | int i; | 3424 | int i; |
3379 | 3425 | ||
3380 | RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n"); | 3426 | RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n"); |
@@ -3426,10 +3472,9 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) | |||
3426 | write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); | 3472 | write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); |
3427 | write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); | 3473 | write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); |
3428 | 3474 | ||
3429 | RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", | 3475 | RT_TRACE(COMP_INIT, |
3430 | dev->dev_addr[0], dev->dev_addr[1], | 3476 | "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n", |
3431 | dev->dev_addr[2], dev->dev_addr[3], | 3477 | dev->dev_addr); |
3432 | dev->dev_addr[4], dev->dev_addr[5]); | ||
3433 | 3478 | ||
3434 | priv->EEPROMBoardType = EEPROM_Default_BoardType; | 3479 | priv->EEPROMBoardType = EEPROM_Default_BoardType; |
3435 | priv->rf_type = RF_1T2R; //RF_2T2R | 3480 | priv->rf_type = RF_1T2R; //RF_2T2R |
@@ -3455,42 +3500,7 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev) | |||
3455 | } | 3500 | } |
3456 | } | 3501 | } |
3457 | 3502 | ||
3458 | for (i = 0; i < 3; i++) | 3503 | update_hal_variables(priv); |
3459 | { | ||
3460 | //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, | ||
3461 | //priv->RfCckChnlAreaTxPwr[rf_path][i]); | ||
3462 | //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, | ||
3463 | //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]); | ||
3464 | //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, | ||
3465 | //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]); | ||
3466 | } | ||
3467 | |||
3468 | // Assign dedicated channel tx power | ||
3469 | for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level. | ||
3470 | { | ||
3471 | if (i < 3) // Cjanel 1-3 | ||
3472 | index = 0; | ||
3473 | else if (i < 9) // Channel 4-9 | ||
3474 | index = 1; | ||
3475 | else // Channel 10-14 | ||
3476 | index = 2; | ||
3477 | |||
3478 | // Record A & B CCK /OFDM - 1T/2T Channel area tx power | ||
3479 | priv->RfTxPwrLevelCck[rf_path][i] = | ||
3480 | priv->RfCckChnlAreaTxPwr[rf_path][index]; | ||
3481 | priv->RfTxPwrLevelOfdm1T[rf_path][i] = | ||
3482 | priv->RfOfdmChnlAreaTxPwr1T[rf_path][index]; | ||
3483 | priv->RfTxPwrLevelOfdm2T[rf_path][i] = | ||
3484 | priv->RfOfdmChnlAreaTxPwr2T[rf_path][index]; | ||
3485 | } | ||
3486 | |||
3487 | for(i=0; i<14; i++) | ||
3488 | { | ||
3489 | //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n", | ||
3490 | //rf_path, i, priv->RfTxPwrLevelCck[0][i], | ||
3491 | //priv->RfTxPwrLevelOfdm1T[0][i] , | ||
3492 | //priv->RfTxPwrLevelOfdm2T[0][i] ); | ||
3493 | } | ||
3494 | 3504 | ||
3495 | // | 3505 | // |
3496 | // Update remained HAL variables. | 3506 | // Update remained HAL variables. |
@@ -3767,10 +3777,9 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) | |||
3767 | write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); | 3777 | write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); |
3768 | write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); | 3778 | write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); |
3769 | 3779 | ||
3770 | RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", | 3780 | RT_TRACE(COMP_INIT, |
3771 | dev->dev_addr[0], dev->dev_addr[1], | 3781 | "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n", |
3772 | dev->dev_addr[2], dev->dev_addr[3], | 3782 | dev->dev_addr); |
3773 | dev->dev_addr[4], dev->dev_addr[5]); | ||
3774 | 3783 | ||
3775 | // | 3784 | // |
3776 | // Get CustomerID(Boad Type) | 3785 | // Get CustomerID(Boad Type) |
@@ -3901,53 +3910,7 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev) | |||
3901 | } | 3910 | } |
3902 | 3911 | ||
3903 | } | 3912 | } |
3904 | // | 3913 | update_hal_variables(priv); |
3905 | // Update Tx Power HAL variables. | ||
3906 | // | ||
3907 | for (rf_path = 0; rf_path < 2; rf_path++) | ||
3908 | { | ||
3909 | for (i = 0; i < 3; i++) | ||
3910 | { | ||
3911 | RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, | ||
3912 | priv->RfCckChnlAreaTxPwr[rf_path][i]); | ||
3913 | RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, | ||
3914 | priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]); | ||
3915 | RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]); | ||
3916 | } | ||
3917 | |||
3918 | // Assign dedicated channel tx power | ||
3919 | for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level. | ||
3920 | { | ||
3921 | if (i < 3) // Cjanel 1-3 | ||
3922 | index = 0; | ||
3923 | else if (i < 9) // Channel 4-9 | ||
3924 | index = 1; | ||
3925 | else // Channel 10-14 | ||
3926 | index = 2; | ||
3927 | |||
3928 | // Record A & B CCK /OFDM - 1T/2T Channel area tx power | ||
3929 | priv->RfTxPwrLevelCck[rf_path][i] = | ||
3930 | priv->RfCckChnlAreaTxPwr[rf_path][index]; | ||
3931 | priv->RfTxPwrLevelOfdm1T[rf_path][i] = | ||
3932 | priv->RfOfdmChnlAreaTxPwr1T[rf_path][index]; | ||
3933 | priv->RfTxPwrLevelOfdm2T[rf_path][i] = | ||
3934 | priv->RfOfdmChnlAreaTxPwr2T[rf_path][index]; | ||
3935 | if (rf_path == 0) | ||
3936 | { | ||
3937 | priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ; | ||
3938 | priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i]; | ||
3939 | } | ||
3940 | } | ||
3941 | |||
3942 | for(i=0; i<14; i++) | ||
3943 | { | ||
3944 | RT_TRACE((COMP_INIT), | ||
3945 | "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n", | ||
3946 | rf_path, i, priv->RfTxPwrLevelCck[rf_path][i], | ||
3947 | priv->RfTxPwrLevelOfdm1T[rf_path][i] , | ||
3948 | priv->RfTxPwrLevelOfdm2T[rf_path][i] ); | ||
3949 | } | ||
3950 | } | ||
3951 | } | 3914 | } |
3952 | 3915 | ||
3953 | // | 3916 | // |
@@ -7677,7 +7640,7 @@ void setKey( struct net_device *dev, | |||
7677 | if (EntryNo >= TOTAL_CAM_ENTRY) | 7640 | if (EntryNo >= TOTAL_CAM_ENTRY) |
7678 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); | 7641 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); |
7679 | 7642 | ||
7680 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr)); | 7643 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr); |
7681 | 7644 | ||
7682 | if (DefaultKey) | 7645 | if (DefaultKey) |
7683 | usConfig |= BIT15 | (KeyType<<2); | 7646 | usConfig |= BIT15 | (KeyType<<2); |
diff --git a/drivers/staging/rtl8192su/r8192U_dm.c b/drivers/staging/rtl8192su/r8192U_dm.c index 7891e9640272..fa5e24416dde 100644 --- a/drivers/staging/rtl8192su/r8192U_dm.c +++ b/drivers/staging/rtl8192su/r8192U_dm.c | |||
@@ -2697,7 +2697,7 @@ static void dm_check_edca_turbo( | |||
2697 | u8* peername[11] = {"unknown", "realtek", "realtek_92se", "broadcom", "ralink", "atheros", "cisco", "marvell", "92u_softap", "self_softap"}; | 2697 | u8* peername[11] = {"unknown", "realtek", "realtek_92se", "broadcom", "ralink", "atheros", "cisco", "marvell", "92u_softap", "self_softap"}; |
2698 | static int wb_tmp = 0; | 2698 | static int wb_tmp = 0; |
2699 | if (wb_tmp == 0){ | 2699 | if (wb_tmp == 0){ |
2700 | printk("%s():iot peer is %#x:%s, bssid:"MAC_FMT"\n",__FUNCTION__,pHTInfo->IOTPeer,peername[pHTInfo->IOTPeer], MAC_ARG(priv->ieee80211->current_network.bssid)); | 2700 | printk("%s():iot peer is %#x:%s, bssid:%pM\n",__FUNCTION__,pHTInfo->IOTPeer,peername[pHTInfo->IOTPeer], priv->ieee80211->current_network.bssid); |
2701 | wb_tmp = 1; | 2701 | wb_tmp = 1; |
2702 | } | 2702 | } |
2703 | } | 2703 | } |
diff --git a/drivers/staging/rtl8192u/Kconfig b/drivers/staging/rtl8192u/Kconfig index 9913ab8fb359..0439c90b4163 100644 --- a/drivers/staging/rtl8192u/Kconfig +++ b/drivers/staging/rtl8192u/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | config RTL8192U | 1 | config RTL8192U |
2 | tristate "RealTek RTL8192U Wireless LAN NIC driver" | 2 | tristate "RealTek RTL8192U Wireless LAN NIC driver" |
3 | depends on PCI && WLAN && USB | 3 | depends on PCI && WLAN && USB |
4 | depends on WIRELESS_EXT | 4 | select WIRELESS_EXT |
5 | select WEXT_PRIV | ||
5 | default N | 6 | default N |
6 | ---help--- | 7 | ---help--- |
diff --git a/drivers/staging/rtl8192u/Makefile b/drivers/staging/rtl8192u/Makefile index 2d59c4ef6c5b..738f4a80ec67 100644 --- a/drivers/staging/rtl8192u/Makefile +++ b/drivers/staging/rtl8192u/Makefile | |||
@@ -3,7 +3,7 @@ NIC_SELECT = RTL8192U | |||
3 | EXTRA_CFLAGS += -std=gnu89 | 3 | EXTRA_CFLAGS += -std=gnu89 |
4 | EXTRA_CFLAGS += -O2 | 4 | EXTRA_CFLAGS += -O2 |
5 | 5 | ||
6 | EXTRA_CFLAGS += -mhard-float -DCONFIG_FORCE_HARD_FLOAT=y | 6 | EXTRA_CFLAGS += -DCONFIG_FORCE_HARD_FLOAT=y |
7 | EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX | 7 | EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX |
8 | EXTRA_CFLAGS += -DTHOMAS_BEACON -DTHOMAS_TASKLET -DTHOMAS_SKB -DTHOMAS_TURBO | 8 | EXTRA_CFLAGS += -DTHOMAS_BEACON -DTHOMAS_TASKLET -DTHOMAS_SKB -DTHOMAS_TURBO |
9 | #EXTRA_CFLAGS += -DUSB_TX_DRIVER_AGGREGATION_ENABLE | 9 | #EXTRA_CFLAGS += -DUSB_TX_DRIVER_AGGREGATION_ENABLE |
diff --git a/drivers/staging/rtl8192u/ieee80211.h b/drivers/staging/rtl8192u/ieee80211.h index 3a47f1213e85..9d05ed6791ee 100644 --- a/drivers/staging/rtl8192u/ieee80211.h +++ b/drivers/staging/rtl8192u/ieee80211.h | |||
@@ -551,9 +551,6 @@ do { if (ieee80211_debug_level & (level)) \ | |||
551 | 551 | ||
552 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ | 552 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ |
553 | 553 | ||
554 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
555 | #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] | ||
556 | |||
557 | /* | 554 | /* |
558 | * To use the debug system; | 555 | * To use the debug system; |
559 | * | 556 | * |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211.h b/drivers/staging/rtl8192u/ieee80211/ieee80211.h index 10908e123b86..39847c81e29c 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211.h +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211.h | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/jiffies.h> | 30 | #include <linux/jiffies.h> |
31 | #include <linux/timer.h> | 31 | #include <linux/timer.h> |
32 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
33 | #include <linux/semaphore.h> | ||
33 | 34 | ||
34 | #include <linux/delay.h> | 35 | #include <linux/delay.h> |
35 | #include <linux/wireless.h> | 36 | #include <linux/wireless.h> |
@@ -551,9 +552,6 @@ do { if (ieee80211_debug_level & (level)) \ | |||
551 | 552 | ||
552 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ | 553 | /* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ |
553 | 554 | ||
554 | #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" | ||
555 | #define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] | ||
556 | |||
557 | /* | 555 | /* |
558 | * To use the debug system; | 556 | * To use the debug system; |
559 | * | 557 | * |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c index 0b33bf463320..0b57632bcff9 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c | |||
@@ -288,7 +288,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
288 | if (!(keyidx & (1 << 5))) { | 288 | if (!(keyidx & (1 << 5))) { |
289 | if (net_ratelimit()) { | 289 | if (net_ratelimit()) { |
290 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" | 290 | printk(KERN_DEBUG "CCMP: received packet without ExtIV" |
291 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 291 | " flag from %pM\n", hdr->addr2); |
292 | } | 292 | } |
293 | key->dot11RSNAStatsCCMPFormatErrors++; | 293 | key->dot11RSNAStatsCCMPFormatErrors++; |
294 | return -2; | 294 | return -2; |
@@ -301,9 +301,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
301 | } | 301 | } |
302 | if (!key->key_set) { | 302 | if (!key->key_set) { |
303 | if (net_ratelimit()) { | 303 | if (net_ratelimit()) { |
304 | printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT | 304 | printk(KERN_DEBUG "CCMP: received packet from %pM" |
305 | " with keyid=%d that does not have a configured" | 305 | " with keyid=%d that does not have a configured" |
306 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 306 | " key\n", hdr->addr2, keyidx); |
307 | } | 307 | } |
308 | return -3; | 308 | return -3; |
309 | } | 309 | } |
@@ -318,11 +318,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
318 | 318 | ||
319 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { | 319 | if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { |
320 | if (net_ratelimit()) { | 320 | if (net_ratelimit()) { |
321 | printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT | 321 | printk(KERN_DEBUG "CCMP: replay detected: STA=%pM" |
322 | " previous PN %02x%02x%02x%02x%02x%02x " | 322 | " previous PN %pm received PN %pm\n", |
323 | "received PN %02x%02x%02x%02x%02x%02x\n", | 323 | hdr->addr2, key->rx_pn, pn); |
324 | MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn), | ||
325 | MAC_ARG(pn)); | ||
326 | } | 324 | } |
327 | key->dot11RSNAStatsCCMPReplays++; | 325 | key->dot11RSNAStatsCCMPReplays++; |
328 | return -4; | 326 | return -4; |
@@ -359,7 +357,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
359 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { | 357 | if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { |
360 | if (net_ratelimit()) { | 358 | if (net_ratelimit()) { |
361 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" | 359 | printk(KERN_DEBUG "CCMP: decrypt failed: STA=" |
362 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 360 | "%pM\n", hdr->addr2); |
363 | } | 361 | } |
364 | key->dot11RSNAStatsCCMPDecryptErrors++; | 362 | key->dot11RSNAStatsCCMPDecryptErrors++; |
365 | return -5; | 363 | return -5; |
@@ -435,11 +433,10 @@ static char * ieee80211_ccmp_print_stats(char *p, void *priv) | |||
435 | { | 433 | { |
436 | struct ieee80211_ccmp_data *ccmp = priv; | 434 | struct ieee80211_ccmp_data *ccmp = priv; |
437 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " | 435 | p += sprintf(p, "key[%d] alg=CCMP key_set=%d " |
438 | "tx_pn=%02x%02x%02x%02x%02x%02x " | 436 | "tx_pn=%pm rx_pn=%pm " |
439 | "rx_pn=%02x%02x%02x%02x%02x%02x " | ||
440 | "format_errors=%d replays=%d decrypt_errors=%d\n", | 437 | "format_errors=%d replays=%d decrypt_errors=%d\n", |
441 | ccmp->key_idx, ccmp->key_set, | 438 | ccmp->key_idx, ccmp->key_set, |
442 | MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn), | 439 | ccmp->tx_pn, ccmp->rx_pn, |
443 | ccmp->dot11RSNAStatsCCMPFormatErrors, | 440 | ccmp->dot11RSNAStatsCCMPFormatErrors, |
444 | ccmp->dot11RSNAStatsCCMPReplays, | 441 | ccmp->dot11RSNAStatsCCMPReplays, |
445 | ccmp->dot11RSNAStatsCCMPDecryptErrors); | 442 | ccmp->dot11RSNAStatsCCMPDecryptErrors); |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c index 841b99955b79..9510507d8d05 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c | |||
@@ -410,7 +410,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
410 | if (!(keyidx & (1 << 5))) { | 410 | if (!(keyidx & (1 << 5))) { |
411 | if (net_ratelimit()) { | 411 | if (net_ratelimit()) { |
412 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" | 412 | printk(KERN_DEBUG "TKIP: received packet without ExtIV" |
413 | " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 413 | " flag from %pM\n", hdr->addr2); |
414 | } | 414 | } |
415 | return -2; | 415 | return -2; |
416 | } | 416 | } |
@@ -422,9 +422,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
422 | } | 422 | } |
423 | if (!tkey->key_set) { | 423 | if (!tkey->key_set) { |
424 | if (net_ratelimit()) { | 424 | if (net_ratelimit()) { |
425 | printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT | 425 | printk(KERN_DEBUG "TKIP: received packet from %pM" |
426 | " with keyid=%d that does not have a configured" | 426 | " with keyid=%d that does not have a configured" |
427 | " key\n", MAC_ARG(hdr->addr2), keyidx); | 427 | " key\n", hdr->addr2, keyidx); |
428 | } | 428 | } |
429 | return -3; | 429 | return -3; |
430 | } | 430 | } |
@@ -437,9 +437,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
437 | if (iv32 < tkey->rx_iv32 || | 437 | if (iv32 < tkey->rx_iv32 || |
438 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { | 438 | (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { |
439 | if (net_ratelimit()) { | 439 | if (net_ratelimit()) { |
440 | printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT | 440 | printk(KERN_DEBUG "TKIP: replay detected: STA=%pM" |
441 | " previous TSC %08x%04x received TSC " | 441 | " previous TSC %08x%04x received TSC " |
442 | "%08x%04x\n", MAC_ARG(hdr->addr2), | 442 | "%08x%04x\n", hdr->addr2, |
443 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); | 443 | tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); |
444 | } | 444 | } |
445 | tkey->dot11RSNAStatsTKIPReplays++; | 445 | tkey->dot11RSNAStatsTKIPReplays++; |
@@ -460,8 +460,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
460 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { | 460 | if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { |
461 | if (net_ratelimit()) { | 461 | if (net_ratelimit()) { |
462 | printk(KERN_DEBUG ": TKIP: failed to decrypt " | 462 | printk(KERN_DEBUG ": TKIP: failed to decrypt " |
463 | "received packet from " MAC_FMT "\n", | 463 | "received packet from %pM\n", |
464 | MAC_ARG(hdr->addr2)); | 464 | hdr->addr2); |
465 | } | 465 | } |
466 | return -7; | 466 | return -7; |
467 | } | 467 | } |
@@ -480,7 +480,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) | |||
480 | } | 480 | } |
481 | if (net_ratelimit()) { | 481 | if (net_ratelimit()) { |
482 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" | 482 | printk(KERN_DEBUG "TKIP: ICV error detected: STA=" |
483 | MAC_FMT "\n", MAC_ARG(hdr->addr2)); | 483 | "%pM\n", hdr->addr2); |
484 | } | 484 | } |
485 | tkey->dot11RSNAStatsTKIPICVErrors++; | 485 | tkey->dot11RSNAStatsTKIPICVErrors++; |
486 | return -5; | 486 | return -5; |
@@ -635,8 +635,8 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx, | |||
635 | struct ieee80211_hdr_4addr *hdr; | 635 | struct ieee80211_hdr_4addr *hdr; |
636 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 636 | hdr = (struct ieee80211_hdr_4addr *) skb->data; |
637 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " | 637 | printk(KERN_DEBUG "%s: Michael MIC verification failed for " |
638 | "MSDU from " MAC_FMT " keyidx=%d\n", | 638 | "MSDU from %pM keyidx=%d\n", |
639 | skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2), | 639 | skb->dev ? skb->dev->name : "N/A", hdr->addr2, |
640 | keyidx); | 640 | keyidx); |
641 | if (skb->dev) | 641 | if (skb->dev) |
642 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); | 642 | ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c index 7a8690f449b4..b752017a4d18 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c | |||
@@ -260,7 +260,7 @@ static int store_debug_level(struct file *file, const char *buffer, | |||
260 | unsigned long count, void *data) | 260 | unsigned long count, void *data) |
261 | { | 261 | { |
262 | char buf[] = "0x00000000"; | 262 | char buf[] = "0x00000000"; |
263 | unsigned long len = min(sizeof(buf) - 1, count); | 263 | unsigned long len = min_t(unsigned long, sizeof(buf) - 1, count); |
264 | char *p = (char *)buf; | 264 | char *p = (char *)buf; |
265 | unsigned long val; | 265 | unsigned long val; |
266 | 266 | ||
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c index 0e003c5bb000..7e9b367594a0 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c | |||
@@ -360,8 +360,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
360 | strcmp(crypt->ops->name, "TKIP") == 0) { | 360 | strcmp(crypt->ops->name, "TKIP") == 0) { |
361 | if (net_ratelimit()) { | 361 | if (net_ratelimit()) { |
362 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 362 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
363 | "received packet from " MAC_FMT "\n", | 363 | "received packet from %pM\n", |
364 | ieee->dev->name, MAC_ARG(hdr->addr2)); | 364 | ieee->dev->name, hdr->addr2); |
365 | } | 365 | } |
366 | return -1; | 366 | return -1; |
367 | } | 367 | } |
@@ -372,8 +372,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, | |||
372 | atomic_dec(&crypt->refcnt); | 372 | atomic_dec(&crypt->refcnt); |
373 | if (res < 0) { | 373 | if (res < 0) { |
374 | IEEE80211_DEBUG_DROP( | 374 | IEEE80211_DEBUG_DROP( |
375 | "decryption failed (SA=" MAC_FMT | 375 | "decryption failed (SA=%pM" |
376 | ") res=%d\n", MAC_ARG(hdr->addr2), res); | 376 | ") res=%d\n", hdr->addr2, res); |
377 | if (res == -2) | 377 | if (res == -2) |
378 | IEEE80211_DEBUG_DROP("Decryption failed ICV " | 378 | IEEE80211_DEBUG_DROP("Decryption failed ICV " |
379 | "mismatch (key %d)\n", | 379 | "mismatch (key %d)\n", |
@@ -410,8 +410,8 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s | |||
410 | atomic_dec(&crypt->refcnt); | 410 | atomic_dec(&crypt->refcnt); |
411 | if (res < 0) { | 411 | if (res < 0) { |
412 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" | 412 | printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" |
413 | " (SA=" MAC_FMT " keyidx=%d)\n", | 413 | " (SA=%pM keyidx=%d)\n", |
414 | ieee->dev->name, MAC_ARG(hdr->addr2), keyidx); | 414 | ieee->dev->name, hdr->addr2, keyidx); |
415 | return -1; | 415 | return -1; |
416 | } | 416 | } |
417 | 417 | ||
@@ -1016,8 +1016,8 @@ int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1016 | * frames silently instead of filling system log with | 1016 | * frames silently instead of filling system log with |
1017 | * these reports. */ | 1017 | * these reports. */ |
1018 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" | 1018 | IEEE80211_DEBUG_DROP("Decryption failed (not set)" |
1019 | " (SA=" MAC_FMT ")\n", | 1019 | " (SA=%pM)\n", |
1020 | MAC_ARG(hdr->addr2)); | 1020 | hdr->addr2); |
1021 | ieee->ieee_stats.rx_discards_undecryptable++; | 1021 | ieee->ieee_stats.rx_discards_undecryptable++; |
1022 | goto rx_dropped; | 1022 | goto rx_dropped; |
1023 | } | 1023 | } |
@@ -1256,8 +1256,8 @@ int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1256 | } else { | 1256 | } else { |
1257 | IEEE80211_DEBUG_DROP( | 1257 | IEEE80211_DEBUG_DROP( |
1258 | "encryption configured, but RX " | 1258 | "encryption configured, but RX " |
1259 | "frame not encrypted (SA=" MAC_FMT ")\n", | 1259 | "frame not encrypted (SA=%pM)\n", |
1260 | MAC_ARG(hdr->addr2)); | 1260 | hdr->addr2); |
1261 | goto rx_dropped; | 1261 | goto rx_dropped; |
1262 | } | 1262 | } |
1263 | } | 1263 | } |
@@ -1276,9 +1276,9 @@ int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, | |||
1276 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { | 1276 | !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { |
1277 | IEEE80211_DEBUG_DROP( | 1277 | IEEE80211_DEBUG_DROP( |
1278 | "dropped unencrypted RX data " | 1278 | "dropped unencrypted RX data " |
1279 | "frame from " MAC_FMT | 1279 | "frame from %pM" |
1280 | " (drop_unencrypted=1)\n", | 1280 | " (drop_unencrypted=1)\n", |
1281 | MAC_ARG(hdr->addr2)); | 1281 | hdr->addr2); |
1282 | goto rx_dropped; | 1282 | goto rx_dropped; |
1283 | } | 1283 | } |
1284 | /* | 1284 | /* |
@@ -2260,11 +2260,11 @@ static inline int ieee80211_network_init( | |||
2260 | } | 2260 | } |
2261 | 2261 | ||
2262 | if (network->mode == 0) { | 2262 | if (network->mode == 0) { |
2263 | IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' " | 2263 | IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' " |
2264 | "network.\n", | 2264 | "network.\n", |
2265 | escape_essid(network->ssid, | 2265 | escape_essid(network->ssid, |
2266 | network->ssid_len), | 2266 | network->ssid_len), |
2267 | MAC_ARG(network->bssid)); | 2267 | network->bssid); |
2268 | return 1; | 2268 | return 1; |
2269 | } | 2269 | } |
2270 | 2270 | ||
@@ -2439,9 +2439,9 @@ static inline void ieee80211_process_probe_response( | |||
2439 | 2439 | ||
2440 | memset(&network, 0, sizeof(struct ieee80211_network)); | 2440 | memset(&network, 0, sizeof(struct ieee80211_network)); |
2441 | IEEE80211_DEBUG_SCAN( | 2441 | IEEE80211_DEBUG_SCAN( |
2442 | "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", | 2442 | "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", |
2443 | escape_essid(info_element->data, info_element->len), | 2443 | escape_essid(info_element->data, info_element->len), |
2444 | MAC_ARG(beacon->header.addr3), | 2444 | beacon->header.addr3, |
2445 | (beacon->capability & (1<<0xf)) ? '1' : '0', | 2445 | (beacon->capability & (1<<0xf)) ? '1' : '0', |
2446 | (beacon->capability & (1<<0xe)) ? '1' : '0', | 2446 | (beacon->capability & (1<<0xe)) ? '1' : '0', |
2447 | (beacon->capability & (1<<0xd)) ? '1' : '0', | 2447 | (beacon->capability & (1<<0xd)) ? '1' : '0', |
@@ -2460,10 +2460,10 @@ static inline void ieee80211_process_probe_response( | |||
2460 | (beacon->capability & (1<<0x0)) ? '1' : '0'); | 2460 | (beacon->capability & (1<<0x0)) ? '1' : '0'); |
2461 | 2461 | ||
2462 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { | 2462 | if (ieee80211_network_init(ieee, beacon, &network, stats)) { |
2463 | IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n", | 2463 | IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n", |
2464 | escape_essid(info_element->data, | 2464 | escape_essid(info_element->data, |
2465 | info_element->len), | 2465 | info_element->len), |
2466 | MAC_ARG(beacon->header.addr3), | 2466 | beacon->header.addr3, |
2467 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2467 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2468 | IEEE80211_STYPE_PROBE_RESP ? | 2468 | IEEE80211_STYPE_PROBE_RESP ? |
2469 | "PROBE RESPONSE" : "BEACON"); | 2469 | "PROBE RESPONSE" : "BEACON"); |
@@ -2574,11 +2574,11 @@ static inline void ieee80211_process_probe_response( | |||
2574 | /* If there are no more slots, expire the oldest */ | 2574 | /* If there are no more slots, expire the oldest */ |
2575 | list_del(&oldest->list); | 2575 | list_del(&oldest->list); |
2576 | target = oldest; | 2576 | target = oldest; |
2577 | IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from " | 2577 | IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from " |
2578 | "network list.\n", | 2578 | "network list.\n", |
2579 | escape_essid(target->ssid, | 2579 | escape_essid(target->ssid, |
2580 | target->ssid_len), | 2580 | target->ssid_len), |
2581 | MAC_ARG(target->bssid)); | 2581 | target->bssid); |
2582 | } else { | 2582 | } else { |
2583 | /* Otherwise just pull from the free list */ | 2583 | /* Otherwise just pull from the free list */ |
2584 | target = list_entry(ieee->network_free_list.next, | 2584 | target = list_entry(ieee->network_free_list.next, |
@@ -2588,10 +2588,10 @@ static inline void ieee80211_process_probe_response( | |||
2588 | 2588 | ||
2589 | 2589 | ||
2590 | #ifdef CONFIG_IEEE80211_DEBUG | 2590 | #ifdef CONFIG_IEEE80211_DEBUG |
2591 | IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n", | 2591 | IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n", |
2592 | escape_essid(network.ssid, | 2592 | escape_essid(network.ssid, |
2593 | network.ssid_len), | 2593 | network.ssid_len), |
2594 | MAC_ARG(network.bssid), | 2594 | network.bssid, |
2595 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2595 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2596 | IEEE80211_STYPE_PROBE_RESP ? | 2596 | IEEE80211_STYPE_PROBE_RESP ? |
2597 | "PROBE RESPONSE" : "BEACON"); | 2597 | "PROBE RESPONSE" : "BEACON"); |
@@ -2601,10 +2601,10 @@ static inline void ieee80211_process_probe_response( | |||
2601 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) | 2601 | if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) |
2602 | ieee80211_softmac_new_net(ieee,&network); | 2602 | ieee80211_softmac_new_net(ieee,&network); |
2603 | } else { | 2603 | } else { |
2604 | IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n", | 2604 | IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n", |
2605 | escape_essid(target->ssid, | 2605 | escape_essid(target->ssid, |
2606 | target->ssid_len), | 2606 | target->ssid_len), |
2607 | MAC_ARG(target->bssid), | 2607 | target->bssid, |
2608 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == | 2608 | WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == |
2609 | IEEE80211_STYPE_PROBE_RESP ? | 2609 | IEEE80211_STYPE_PROBE_RESP ? |
2610 | "PROBE RESPONSE" : "BEACON"); | 2610 | "PROBE RESPONSE" : "BEACON"); |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c index 8a86e93465c8..27d925712cdd 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c | |||
@@ -1731,7 +1731,7 @@ ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb) | |||
1731 | ieee80211_resp_to_assoc_rq(ieee, dest); | 1731 | ieee80211_resp_to_assoc_rq(ieee, dest); |
1732 | } | 1732 | } |
1733 | 1733 | ||
1734 | printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest)); | 1734 | printk(KERN_INFO"New client associated: %pM\n", dest); |
1735 | //FIXME | 1735 | //FIXME |
1736 | } | 1736 | } |
1737 | 1737 | ||
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c index b29c36bac377..48537d948945 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c | |||
@@ -200,8 +200,8 @@ int ieee80211_encrypt_fragment( | |||
200 | header = (struct ieee80211_hdr *) frag->data; | 200 | header = (struct ieee80211_hdr *) frag->data; |
201 | if (net_ratelimit()) { | 201 | if (net_ratelimit()) { |
202 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " | 202 | printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " |
203 | "TX packet to " MAC_FMT "\n", | 203 | "TX packet to %pM\n", |
204 | ieee->dev->name, MAC_ARG(header->addr1)); | 204 | ieee->dev->name, header->addr1); |
205 | } | 205 | } |
206 | return -1; | 206 | return -1; |
207 | } | 207 | } |
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c index 5f12d62658c9..c0b2c02b0ac4 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c | |||
@@ -289,10 +289,10 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee, | |||
289 | else | 289 | else |
290 | IEEE80211_DEBUG_SCAN( | 290 | IEEE80211_DEBUG_SCAN( |
291 | "Not showing network '%s (" | 291 | "Not showing network '%s (" |
292 | MAC_FMT ")' due to age (%lums).\n", | 292 | "%pM)' due to age (%lums).\n", |
293 | escape_essid(network->ssid, | 293 | escape_essid(network->ssid, |
294 | network->ssid_len), | 294 | network->ssid_len), |
295 | MAC_ARG(network->bssid), | 295 | network->bssid, |
296 | (jiffies - network->last_scanned) / (HZ / 100)); | 296 | (jiffies - network->last_scanned) / (HZ / 100)); |
297 | } | 297 | } |
298 | 298 | ||
@@ -718,7 +718,7 @@ int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee, | |||
718 | } else | 718 | } else |
719 | idx = ieee->tx_keyidx; | 719 | idx = ieee->tx_keyidx; |
720 | 720 | ||
721 | if (!ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY && | 721 | if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) && |
722 | ext->alg != IW_ENCODE_ALG_WEP) | 722 | ext->alg != IW_ENCODE_ALG_WEP) |
723 | if (idx != 0 || ieee->iw_mode != IW_MODE_INFRA) | 723 | if (idx != 0 || ieee->iw_mode != IW_MODE_INFRA) |
724 | return -EINVAL; | 724 | return -EINVAL; |
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c index 512a57aebde3..27d083a70eb2 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c | |||
@@ -113,7 +113,7 @@ static struct sk_buff* ieee80211_ADDBA(struct ieee80211_device* ieee, u8* Dst, P | |||
113 | u16 tmp = 0; | 113 | u16 tmp = 0; |
114 | u16 len = ieee->tx_headroom + 9; | 114 | u16 len = ieee->tx_headroom + 9; |
115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) | 115 | //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2)) |
116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __FUNCTION__, type, MAC_ARG(Dst), ieee->dev); | 116 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:%pM, ieee->dev:%p\n", __FUNCTION__, type, Dst, ieee->dev); |
117 | if (pBA == NULL||ieee == NULL) | 117 | if (pBA == NULL||ieee == NULL) |
118 | { | 118 | { |
119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); | 119 | IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee); |
@@ -201,7 +201,7 @@ static struct sk_buff* ieee80211_DELBA( | |||
201 | u16 len = 6 + ieee->tx_headroom; | 201 | u16 len = 6 + ieee->tx_headroom; |
202 | 202 | ||
203 | if (net_ratelimit()) | 203 | if (net_ratelimit()) |
204 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __FUNCTION__, ReasonCode, MAC_ARG(dst)); | 204 | IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:%pM\n", __FUNCTION__, ReasonCode, dst); |
205 | 205 | ||
206 | memset(&DelbaParamSet, 0, 2); | 206 | memset(&DelbaParamSet, 0, 2); |
207 | 207 | ||
@@ -355,7 +355,7 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb) | |||
355 | pBaTimeoutVal = (u16*)(tag + 5); | 355 | pBaTimeoutVal = (u16*)(tag + 5); |
356 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); | 356 | pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); |
357 | 357 | ||
358 | printk("====================>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst)); | 358 | printk("====================>rx ADDBAREQ from :%pM\n", dst); |
359 | //some other capability is not ready now. | 359 | //some other capability is not ready now. |
360 | if( (ieee->current_network.qos_data.active == 0) || | 360 | if( (ieee->current_network.qos_data.active == 0) || |
361 | (ieee->pHTInfo->bCurrentHTSupport == false)) //|| | 361 | (ieee->pHTInfo->bCurrentHTSupport == false)) //|| |
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c index 2c4eb38c89a8..50f4f5943e75 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c | |||
@@ -41,7 +41,7 @@ static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02}; | |||
41 | //static u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0}; | 41 | //static u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0}; |
42 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; | 42 | static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94}; |
43 | 43 | ||
44 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Shoud we put the | 44 | // 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Should we put the |
45 | // code in other place?? | 45 | // code in other place?? |
46 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; | 46 | //static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96}; |
47 | /******************************************************************************************************************** | 47 | /******************************************************************************************************************** |
@@ -1342,7 +1342,7 @@ void HTUseDefaultSetting(struct ieee80211_device* ieee) | |||
1342 | 1342 | ||
1343 | pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor; | 1343 | pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor; |
1344 | 1344 | ||
1345 | pHTInfo->CurrentMPDUDensity = pHTInfo->CurrentMPDUDensity; | 1345 | pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density; |
1346 | 1346 | ||
1347 | // Set BWOpMode register | 1347 | // Set BWOpMode register |
1348 | 1348 | ||
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c index 5373d565af24..d1275e887f0c 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c | |||
@@ -290,7 +290,7 @@ PTS_COMMON_INFO SearchAdmitTRStream(struct ieee80211_device *ieee, u8* Addr, u8 | |||
290 | if(search_dir[dir] ==false ) | 290 | if(search_dir[dir] ==false ) |
291 | continue; | 291 | continue; |
292 | list_for_each_entry(pRet, psearch_list, List){ | 292 | list_for_each_entry(pRet, psearch_list, List){ |
293 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:"MAC_FMT", TID:%d, dir:%d\n", MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); | 293 | // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection); |
294 | if (memcmp(pRet->Addr, Addr, 6) == 0) | 294 | if (memcmp(pRet->Addr, Addr, 6) == 0) |
295 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) | 295 | if (pRet->TSpec.f.TSInfo.field.ucTSID == TID) |
296 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) | 296 | if(pRet->TSpec.f.TSInfo.field.ucDirection == dir) |
@@ -445,7 +445,7 @@ bool GetTs( | |||
445 | ResetRxTsEntry(tmp); | 445 | ResetRxTsEntry(tmp); |
446 | } | 446 | } |
447 | 447 | ||
448 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT"\n", UP, Dir, MAC_ARG(Addr)); | 448 | IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:%pM\n", UP, Dir, Addr); |
449 | // Prepare TS Info releated field | 449 | // Prepare TS Info releated field |
450 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field | 450 | pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field |
451 | pTSInfo->field.ucTSID = UP; // TSID | 451 | pTSInfo->field.ucTSID = UP; // TSID |
@@ -531,7 +531,7 @@ void RemoveTsEntry( | |||
531 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) | 531 | void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) |
532 | { | 532 | { |
533 | PTS_COMMON_INFO pTS, pTmpTS; | 533 | PTS_COMMON_INFO pTS, pTmpTS; |
534 | printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr)); | 534 | printk("===========>RemovePeerTS,%pM\n", Addr); |
535 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) | 535 | list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) |
536 | { | 536 | { |
537 | if (memcmp(pTS->Addr, Addr, 6) == 0) | 537 | if (memcmp(pTS->Addr, Addr, 6) == 0) |
diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index adade13e1e19..f1e085ba1cf1 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c | |||
@@ -104,7 +104,7 @@ u32 rt_global_debug_component = \ | |||
104 | #define TOTAL_CAM_ENTRY 32 | 104 | #define TOTAL_CAM_ENTRY 32 |
105 | #define CAM_CONTENT_COUNT 8 | 105 | #define CAM_CONTENT_COUNT 8 |
106 | 106 | ||
107 | static struct usb_device_id rtl8192_usb_id_tbl[] = { | 107 | static const struct usb_device_id rtl8192_usb_id_tbl[] = { |
108 | /* Realtek */ | 108 | /* Realtek */ |
109 | {USB_DEVICE(0x0bda, 0x8192)}, | 109 | {USB_DEVICE(0x0bda, 0x8192)}, |
110 | {USB_DEVICE(0x0bda, 0x8709)}, | 110 | {USB_DEVICE(0x0bda, 0x8709)}, |
@@ -2719,7 +2719,7 @@ void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode) | |||
2719 | wireless_mode = WIRELESS_MODE_B; | 2719 | wireless_mode = WIRELESS_MODE_B; |
2720 | } | 2720 | } |
2721 | } | 2721 | } |
2722 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA | 2722 | #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA |
2723 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); | 2723 | ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting ); |
2724 | #endif | 2724 | #endif |
2725 | priv->ieee80211->mode = wireless_mode; | 2725 | priv->ieee80211->mode = wireless_mode; |
@@ -2976,7 +2976,7 @@ static void rtl8192_read_eeprom_info(struct net_device* dev) | |||
2976 | memcpy(dev->dev_addr, bMac_Tmp_Addr, 6); | 2976 | memcpy(dev->dev_addr, bMac_Tmp_Addr, 6); |
2977 | //should I set IDR0 here? | 2977 | //should I set IDR0 here? |
2978 | } | 2978 | } |
2979 | RT_TRACE(COMP_EPROM, "MAC addr:"MAC_FMT"\n", MAC_ARG(dev->dev_addr)); | 2979 | RT_TRACE(COMP_EPROM, "MAC addr:%pM\n", dev->dev_addr); |
2980 | priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R | 2980 | priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R |
2981 | priv->rf_chip = RF_8256; | 2981 | priv->rf_chip = RF_8256; |
2982 | 2982 | ||
@@ -6037,7 +6037,7 @@ void setKey( struct net_device *dev, | |||
6037 | if (EntryNo >= TOTAL_CAM_ENTRY) | 6037 | if (EntryNo >= TOTAL_CAM_ENTRY) |
6038 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); | 6038 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); |
6039 | 6039 | ||
6040 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr)); | 6040 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr); |
6041 | 6041 | ||
6042 | if (DefaultKey) | 6042 | if (DefaultKey) |
6043 | usConfig |= BIT15 | (KeyType<<2); | 6043 | usConfig |= BIT15 | (KeyType<<2); |
diff --git a/drivers/staging/samsung-laptop/samsung-laptop.c b/drivers/staging/samsung-laptop/samsung-laptop.c index 4877138a9f96..dd7ea4c075db 100644 --- a/drivers/staging/samsung-laptop/samsung-laptop.c +++ b/drivers/staging/samsung-laptop/samsung-laptop.c | |||
@@ -99,7 +99,8 @@ static struct rfkill *rfk; | |||
99 | 99 | ||
100 | static int force; | 100 | static int force; |
101 | module_param(force, bool, 0); | 101 | module_param(force, bool, 0); |
102 | MODULE_PARM_DESC(force, "Disable the DMI check and forces the driver to be loaded"); | 102 | MODULE_PARM_DESC(force, |
103 | "Disable the DMI check and forces the driver to be loaded"); | ||
103 | 104 | ||
104 | static int debug; | 105 | static int debug; |
105 | module_param(debug, bool, S_IRUGO | S_IWUSR); | 106 | module_param(debug, bool, S_IRUGO | S_IWUSR); |
@@ -370,7 +371,8 @@ static struct dmi_system_id __initdata samsung_dmi_table[] = { | |||
370 | { | 371 | { |
371 | .ident = "N128", | 372 | .ident = "N128", |
372 | .matches = { | 373 | .matches = { |
373 | DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), | 374 | DMI_MATCH(DMI_SYS_VENDOR, |
375 | "SAMSUNG ELECTRONICS CO., LTD."), | ||
374 | DMI_MATCH(DMI_PRODUCT_NAME, "N128"), | 376 | DMI_MATCH(DMI_PRODUCT_NAME, "N128"), |
375 | DMI_MATCH(DMI_BOARD_NAME, "N128"), | 377 | DMI_MATCH(DMI_BOARD_NAME, "N128"), |
376 | }, | 378 | }, |
@@ -379,7 +381,8 @@ static struct dmi_system_id __initdata samsung_dmi_table[] = { | |||
379 | { | 381 | { |
380 | .ident = "N130", | 382 | .ident = "N130", |
381 | .matches = { | 383 | .matches = { |
382 | DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), | 384 | DMI_MATCH(DMI_SYS_VENDOR, |
385 | "SAMSUNG ELECTRONICS CO., LTD."), | ||
383 | DMI_MATCH(DMI_PRODUCT_NAME, "N130"), | 386 | DMI_MATCH(DMI_PRODUCT_NAME, "N130"), |
384 | DMI_MATCH(DMI_BOARD_NAME, "N130"), | 387 | DMI_MATCH(DMI_BOARD_NAME, "N130"), |
385 | }, | 388 | }, |
diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c index e7bc9ec63a8c..265de7949a78 100644 --- a/drivers/staging/sep/sep_driver.c +++ b/drivers/staging/sep/sep_driver.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <linux/cdev.h> | 35 | #include <linux/cdev.h> |
36 | #include <linux/kdev_t.h> | 36 | #include <linux/kdev_t.h> |
37 | #include <linux/mutex.h> | 37 | #include <linux/mutex.h> |
38 | #include <linux/sched.h> | ||
38 | #include <linux/mm.h> | 39 | #include <linux/mm.h> |
39 | #include <linux/poll.h> | 40 | #include <linux/poll.h> |
40 | #include <linux/wait.h> | 41 | #include <linux/wait.h> |
@@ -182,8 +183,8 @@ static DECLARE_WAIT_QUEUE_HEAD(sep_event); | |||
182 | static int sep_load_firmware(struct sep_device *sep) | 183 | static int sep_load_firmware(struct sep_device *sep) |
183 | { | 184 | { |
184 | const struct firmware *fw; | 185 | const struct firmware *fw; |
185 | char *cache_name = "cache.image.bin"; | 186 | char *cache_name = "sep/cache.image.bin"; |
186 | char *res_name = "resident.image.bin"; | 187 | char *res_name = "sep/resident.image.bin"; |
187 | int error; | 188 | int error; |
188 | 189 | ||
189 | edbg("SEP Driver:rar_virtual is %p\n", sep->rar_addr); | 190 | edbg("SEP Driver:rar_virtual is %p\n", sep->rar_addr); |
@@ -222,6 +223,9 @@ static int sep_load_firmware(struct sep_device *sep) | |||
222 | return 0; | 223 | return 0; |
223 | } | 224 | } |
224 | 225 | ||
226 | MODULE_FIRMWARE("sep/cache.image.bin"); | ||
227 | MODULE_FIRMWARE("sep/resident.image.bin"); | ||
228 | |||
225 | /** | 229 | /** |
226 | * sep_map_and_alloc_shared_area - allocate shared block | 230 | * sep_map_and_alloc_shared_area - allocate shared block |
227 | * @sep: security processor | 231 | * @sep: security processor |
@@ -273,8 +277,8 @@ static dma_addr_t sep_shared_virt_to_bus(struct sep_device *sep, | |||
273 | void *virt_address) | 277 | void *virt_address) |
274 | { | 278 | { |
275 | dma_addr_t pa = sep->shared_bus + (virt_address - sep->shared_addr); | 279 | dma_addr_t pa = sep->shared_bus + (virt_address - sep->shared_addr); |
276 | edbg("sep: virt to bus b %08llx v %p\n", | 280 | edbg("sep: virt to bus b %08llx v %p\n", (unsigned long long) pa, |
277 | (unsigned long long)pa, virt_address); | 281 | virt_address); |
278 | return pa; | 282 | return pa; |
279 | } | 283 | } |
280 | 284 | ||
@@ -380,8 +384,7 @@ static int sep_mmap(struct file *filp, struct vm_area_struct *vma) | |||
380 | shared area */ | 384 | shared area */ |
381 | if ((vma->vm_end - vma->vm_start) > SEP_DRIVER_MMMAP_AREA_SIZE) { | 385 | if ((vma->vm_end - vma->vm_start) > SEP_DRIVER_MMMAP_AREA_SIZE) { |
382 | edbg("SEP Driver mmap requested size is more than allowed\n"); | 386 | edbg("SEP Driver mmap requested size is more than allowed\n"); |
383 | printk(KERN_WARNING "SEP Driver mmap requested size is more \ | 387 | printk(KERN_WARNING "SEP Driver mmap requested size is more than allowed\n"); |
384 | than allowed\n"); | ||
385 | printk(KERN_WARNING "SEP Driver vma->vm_end is %08lx\n", vma->vm_end); | 388 | printk(KERN_WARNING "SEP Driver vma->vm_end is %08lx\n", vma->vm_end); |
386 | printk(KERN_WARNING "SEP Driver vma->vm_end is %08lx\n", vma->vm_start); | 389 | printk(KERN_WARNING "SEP Driver vma->vm_end is %08lx\n", vma->vm_start); |
387 | return -EAGAIN; | 390 | return -EAGAIN; |
@@ -941,8 +944,9 @@ static int sep_lock_user_pages(struct sep_device *sep, | |||
941 | dbg("data_size is %lu\n", data_size); | 944 | dbg("data_size is %lu\n", data_size); |
942 | while (1); | 945 | while (1); |
943 | } | 946 | } |
944 | edbg("lli_array[%lu].physical_address is %08lx, \ | 947 | edbg("lli_array[%lu].physical_address is %08lx, lli_array[%lu].block_size is %lu\n", |
945 | lli_array[%lu].block_size is %lu\n", count, lli_array[count].physical_address, count, lli_array[count].block_size); | 948 | count, lli_array[count].physical_address, |
949 | count, lli_array[count].block_size); | ||
946 | } | 950 | } |
947 | 951 | ||
948 | /* set output params */ | 952 | /* set output params */ |
@@ -1771,7 +1775,7 @@ static struct sep_flow_context_t *sep_find_flow_context(struct sep_device *sep, | |||
1771 | static int sep_create_flow_dma_tables_handler(struct sep_device *sep, | 1775 | static int sep_create_flow_dma_tables_handler(struct sep_device *sep, |
1772 | unsigned long arg) | 1776 | unsigned long arg) |
1773 | { | 1777 | { |
1774 | int error; | 1778 | int error = -ENOENT; |
1775 | struct sep_driver_build_flow_table_t command_args; | 1779 | struct sep_driver_build_flow_table_t command_args; |
1776 | /* first table - output */ | 1780 | /* first table - output */ |
1777 | struct sep_lli_entry_t first_table_data; | 1781 | struct sep_lli_entry_t first_table_data; |
@@ -2232,7 +2236,7 @@ static int sep_set_flow_id_handler(struct sep_device *sep, | |||
2232 | return error; | 2236 | return error; |
2233 | } | 2237 | } |
2234 | 2238 | ||
2235 | static int sep_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) | 2239 | static long sep_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) |
2236 | { | 2240 | { |
2237 | int error = 0; | 2241 | int error = 0; |
2238 | struct sep_device *sep = filp->private_data; | 2242 | struct sep_device *sep = filp->private_data; |
@@ -2586,7 +2590,7 @@ end_function: | |||
2586 | return error; | 2590 | return error; |
2587 | } | 2591 | } |
2588 | 2592 | ||
2589 | static struct pci_device_id sep_pci_id_tbl[] = { | 2593 | static const struct pci_device_id sep_pci_id_tbl[] = { |
2590 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080c)}, | 2594 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080c)}, |
2591 | {0} | 2595 | {0} |
2592 | }; | 2596 | }; |
@@ -2607,7 +2611,7 @@ static dev_t sep_devno; | |||
2607 | /* the files operations structure of the driver */ | 2611 | /* the files operations structure of the driver */ |
2608 | static struct file_operations sep_file_operations = { | 2612 | static struct file_operations sep_file_operations = { |
2609 | .owner = THIS_MODULE, | 2613 | .owner = THIS_MODULE, |
2610 | .ioctl = sep_ioctl, | 2614 | .unlocked_ioctl = sep_ioctl, |
2611 | .poll = sep_poll, | 2615 | .poll = sep_poll, |
2612 | .open = sep_open, | 2616 | .open = sep_open, |
2613 | .release = sep_release, | 2617 | .release = sep_release, |
diff --git a/drivers/staging/serqt_usb2/serqt_usb2.c b/drivers/staging/serqt_usb2/serqt_usb2.c index 060e9de3b065..44f2d4eaf84b 100644 --- a/drivers/staging/serqt_usb2/serqt_usb2.c +++ b/drivers/staging/serqt_usb2/serqt_usb2.c | |||
@@ -126,7 +126,7 @@ static int debug; | |||
126 | #define MODEM_CTRL 0x40 | 126 | #define MODEM_CTRL 0x40 |
127 | #define RS232_MODE 0x00 | 127 | #define RS232_MODE 0x00 |
128 | 128 | ||
129 | static struct usb_device_id serqt_id_table[] = { | 129 | static const struct usb_device_id serqt_id_table[] = { |
130 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU100)}, | 130 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU100)}, |
131 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU200)}, | 131 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_SSU200)}, |
132 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU100)}, | 132 | {USB_DEVICE(USB_VENDOR_ID_QUATECH, QUATECH_DSU100)}, |
@@ -1277,7 +1277,7 @@ static void qt_set_termios(struct tty_struct *tty, | |||
1277 | if (cflag & CSTOPB) | 1277 | if (cflag & CSTOPB) |
1278 | new_LCR |= SERIAL_TWO_STOPB; | 1278 | new_LCR |= SERIAL_TWO_STOPB; |
1279 | else | 1279 | else |
1280 | new_LCR |= SERIAL_TWO_STOPB; | 1280 | new_LCR |= SERIAL_ONE_STOPB; |
1281 | 1281 | ||
1282 | dbg("%s - 4\n", __func__); | 1282 | dbg("%s - 4\n", __func__); |
1283 | 1283 | ||
diff --git a/drivers/staging/slicoss/slic.h b/drivers/staging/slicoss/slic.h index ccf7625b8bb3..eb3a619c6a94 100644 --- a/drivers/staging/slicoss/slic.h +++ b/drivers/staging/slicoss/slic.h | |||
@@ -527,15 +527,6 @@ struct adapter { | |||
527 | (largestat) += ((newstat) - (oldstat)); \ | 527 | (largestat) += ((newstat) - (oldstat)); \ |
528 | } | 528 | } |
529 | 529 | ||
530 | #define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \ | ||
531 | { \ | ||
532 | _Result = true; \ | ||
533 | if (*(u32 *)(_AddrA) != *(u32 *)(_AddrB)) \ | ||
534 | _Result = false; \ | ||
535 | if (*(u16 *)(&((_AddrA)[4])) != *(u16 *)(&((_AddrB)[4]))) \ | ||
536 | _Result = false; \ | ||
537 | } | ||
538 | |||
539 | #if defined(CONFIG_X86_64) || defined(CONFIG_IA64) | 530 | #if defined(CONFIG_X86_64) || defined(CONFIG_IA64) |
540 | #define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \ | 531 | #define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \ |
541 | 0x00000000FFFFFFFF) | 532 | 0x00000000FFFFFFFF) |
diff --git a/drivers/staging/slicoss/slicoss.c b/drivers/staging/slicoss/slicoss.c index f5cc01ba4145..7daeced317c4 100644 --- a/drivers/staging/slicoss/slicoss.c +++ b/drivers/staging/slicoss/slicoss.c | |||
@@ -101,7 +101,7 @@ static struct net_device_stats *slic_get_stats(struct net_device *dev); | |||
101 | static int slic_entry_open(struct net_device *dev); | 101 | static int slic_entry_open(struct net_device *dev); |
102 | static int slic_entry_halt(struct net_device *dev); | 102 | static int slic_entry_halt(struct net_device *dev); |
103 | static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | 103 | static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
104 | static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev); | 104 | static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev); |
105 | static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb, | 105 | static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb, |
106 | void *cmd, u32 skbtype, u32 status); | 106 | void *cmd, u32 skbtype, u32 status); |
107 | static void slic_config_pci(struct pci_dev *pcidev); | 107 | static void slic_config_pci(struct pci_dev *pcidev); |
@@ -194,14 +194,10 @@ MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); | |||
194 | module_param(intagg_delay, int, 0); | 194 | module_param(intagg_delay, int, 0); |
195 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); | 195 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
196 | 196 | ||
197 | static struct pci_device_id slic_pci_tbl[] __devinitdata = { | 197 | static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = { |
198 | {PCI_VENDOR_ID_ALACRITECH, | 198 | { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, |
199 | SLIC_1GB_DEVICE_ID, | 199 | { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, |
200 | PCI_ANY_ID, PCI_ANY_ID,}, | 200 | { 0 } |
201 | {PCI_VENDOR_ID_ALACRITECH, | ||
202 | SLIC_2GB_DEVICE_ID, | ||
203 | PCI_ANY_ID, PCI_ANY_ID,}, | ||
204 | {0,} | ||
205 | }; | 201 | }; |
206 | 202 | ||
207 | MODULE_DEVICE_TABLE(pci, slic_pci_tbl); | 203 | MODULE_DEVICE_TABLE(pci, slic_pci_tbl); |
@@ -292,7 +288,7 @@ static void slic_init_adapter(struct net_device *netdev, | |||
292 | { | 288 | { |
293 | ushort index; | 289 | ushort index; |
294 | struct slic_handle *pslic_handle; | 290 | struct slic_handle *pslic_handle; |
295 | struct adapter *adapter = (struct adapter *)netdev_priv(netdev); | 291 | struct adapter *adapter = netdev_priv(netdev); |
296 | 292 | ||
297 | /* adapter->pcidev = pcidev;*/ | 293 | /* adapter->pcidev = pcidev;*/ |
298 | adapter->vendid = pci_tbl_entry->vendor; | 294 | adapter->vendid = pci_tbl_entry->vendor; |
@@ -370,6 +366,7 @@ static int __devinit slic_entry_probe(struct pci_dev *pcidev, | |||
370 | ulong mmio_start = 0; | 366 | ulong mmio_start = 0; |
371 | ulong mmio_len = 0; | 367 | ulong mmio_len = 0; |
372 | struct sliccard *card = NULL; | 368 | struct sliccard *card = NULL; |
369 | int pci_using_dac = 0; | ||
373 | 370 | ||
374 | slic_global.dynamic_intagg = dynamic_intagg; | 371 | slic_global.dynamic_intagg = dynamic_intagg; |
375 | 372 | ||
@@ -383,16 +380,26 @@ static int __devinit slic_entry_probe(struct pci_dev *pcidev, | |||
383 | printk(KERN_DEBUG "%s\n", slic_proc_version); | 380 | printk(KERN_DEBUG "%s\n", slic_proc_version); |
384 | } | 381 | } |
385 | 382 | ||
386 | err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64)); | 383 | if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { |
387 | if (err) { | 384 | pci_using_dac = 1; |
388 | err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)); | 385 | if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) { |
389 | if (err) | 386 | dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for " |
387 | "consistent allocations\n"); | ||
390 | goto err_out_disable_pci; | 388 | goto err_out_disable_pci; |
389 | } | ||
390 | } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) { | ||
391 | pci_using_dac = 0; | ||
392 | pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); | ||
393 | } else { | ||
394 | dev_err(&pcidev->dev, "no usable DMA configuration\n"); | ||
395 | goto err_out_disable_pci; | ||
391 | } | 396 | } |
392 | 397 | ||
393 | err = pci_request_regions(pcidev, DRV_NAME); | 398 | err = pci_request_regions(pcidev, DRV_NAME); |
394 | if (err) | 399 | if (err) { |
400 | dev_err(&pcidev->dev, "can't obtain PCI resources\n"); | ||
395 | goto err_out_disable_pci; | 401 | goto err_out_disable_pci; |
402 | } | ||
396 | 403 | ||
397 | pci_set_master(pcidev); | 404 | pci_set_master(pcidev); |
398 | 405 | ||
@@ -408,6 +415,8 @@ static int __devinit slic_entry_probe(struct pci_dev *pcidev, | |||
408 | adapter = netdev_priv(netdev); | 415 | adapter = netdev_priv(netdev); |
409 | adapter->netdev = netdev; | 416 | adapter->netdev = netdev; |
410 | adapter->pcidev = pcidev; | 417 | adapter->pcidev = pcidev; |
418 | if (pci_using_dac) | ||
419 | netdev->features |= NETIF_F_HIGHDMA; | ||
411 | 420 | ||
412 | mmio_start = pci_resource_start(pcidev, 0); | 421 | mmio_start = pci_resource_start(pcidev, 0); |
413 | mmio_len = pci_resource_len(pcidev, 0); | 422 | mmio_len = pci_resource_len(pcidev, 0); |
@@ -484,7 +493,7 @@ err_out_disable_pci: | |||
484 | 493 | ||
485 | static int slic_entry_open(struct net_device *dev) | 494 | static int slic_entry_open(struct net_device *dev) |
486 | { | 495 | { |
487 | struct adapter *adapter = (struct adapter *) netdev_priv(dev); | 496 | struct adapter *adapter = netdev_priv(dev); |
488 | struct sliccard *card = adapter->card; | 497 | struct sliccard *card = adapter->card; |
489 | u32 locked = 0; | 498 | u32 locked = 0; |
490 | int status; | 499 | int status; |
@@ -534,7 +543,7 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev) | |||
534 | struct net_device *dev = pci_get_drvdata(pcidev); | 543 | struct net_device *dev = pci_get_drvdata(pcidev); |
535 | u32 mmio_start = 0; | 544 | u32 mmio_start = 0; |
536 | uint mmio_len = 0; | 545 | uint mmio_len = 0; |
537 | struct adapter *adapter = (struct adapter *) netdev_priv(dev); | 546 | struct adapter *adapter = netdev_priv(dev); |
538 | struct sliccard *card; | 547 | struct sliccard *card; |
539 | struct mcast_address *mcaddr, *mlist; | 548 | struct mcast_address *mcaddr, *mlist; |
540 | 549 | ||
@@ -581,7 +590,7 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev) | |||
581 | 590 | ||
582 | static int slic_entry_halt(struct net_device *dev) | 591 | static int slic_entry_halt(struct net_device *dev) |
583 | { | 592 | { |
584 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 593 | struct adapter *adapter = netdev_priv(dev); |
585 | struct sliccard *card = adapter->card; | 594 | struct sliccard *card = adapter->card; |
586 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | 595 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; |
587 | 596 | ||
@@ -624,7 +633,7 @@ static int slic_entry_halt(struct net_device *dev) | |||
624 | 633 | ||
625 | static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | 634 | static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
626 | { | 635 | { |
627 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 636 | struct adapter *adapter = netdev_priv(dev); |
628 | struct ethtool_cmd edata; | 637 | struct ethtool_cmd edata; |
629 | struct ethtool_cmd ecmd; | 638 | struct ethtool_cmd ecmd; |
630 | u32 data[7]; | 639 | u32 data[7]; |
@@ -649,8 +658,7 @@ static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
649 | 658 | ||
650 | if (copy_from_user(data, rq->ifr_data, 28)) { | 659 | if (copy_from_user(data, rq->ifr_data, 28)) { |
651 | PRINT_ERROR | 660 | PRINT_ERROR |
652 | ("slic: copy_from_user FAILED getting \ | 661 | ("slic: copy_from_user FAILED getting initial simba param\n"); |
653 | initial simba param\n"); | ||
654 | return -EFAULT; | 662 | return -EFAULT; |
655 | } | 663 | } |
656 | 664 | ||
@@ -665,8 +673,7 @@ static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
665 | (tracemon_request == | 673 | (tracemon_request == |
666 | SLIC_DUMP_IN_PROGRESS)) { | 674 | SLIC_DUMP_IN_PROGRESS)) { |
667 | PRINT_ERROR | 675 | PRINT_ERROR |
668 | ("ATK Diagnostic Trace Dump Requested but \ | 676 | ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n"); |
669 | already in progress... ignore\n"); | ||
670 | } else { | 677 | } else { |
671 | PRINT_ERROR | 678 | PRINT_ERROR |
672 | ("ATK Diagnostic Trace Dump Requested\n"); | 679 | ("ATK Diagnostic Trace Dump Requested\n"); |
@@ -784,10 +791,10 @@ static void slic_xmit_build_request(struct adapter *adapter, | |||
784 | 791 | ||
785 | #define NORMAL_ETHFRAME 0 | 792 | #define NORMAL_ETHFRAME 0 |
786 | 793 | ||
787 | static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev) | 794 | static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) |
788 | { | 795 | { |
789 | struct sliccard *card; | 796 | struct sliccard *card; |
790 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 797 | struct adapter *adapter = netdev_priv(dev); |
791 | struct slic_hostcmd *hcmd = NULL; | 798 | struct slic_hostcmd *hcmd = NULL; |
792 | u32 status = 0; | 799 | u32 status = 0; |
793 | u32 skbtype = NORMAL_ETHFRAME; | 800 | u32 skbtype = NORMAL_ETHFRAME; |
@@ -1071,7 +1078,7 @@ static void slic_xmit_complete(struct adapter *adapter) | |||
1071 | static irqreturn_t slic_interrupt(int irq, void *dev_id) | 1078 | static irqreturn_t slic_interrupt(int irq, void *dev_id) |
1072 | { | 1079 | { |
1073 | struct net_device *dev = (struct net_device *)dev_id; | 1080 | struct net_device *dev = (struct net_device *)dev_id; |
1074 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 1081 | struct adapter *adapter = netdev_priv(dev); |
1075 | u32 isr; | 1082 | u32 isr; |
1076 | 1083 | ||
1077 | if ((adapter->pshmem) && (adapter->pshmem->isr)) { | 1084 | if ((adapter->pshmem) && (adapter->pshmem->isr)) { |
@@ -1229,22 +1236,21 @@ static void slic_init_cleanup(struct adapter *adapter) | |||
1229 | 1236 | ||
1230 | static struct net_device_stats *slic_get_stats(struct net_device *dev) | 1237 | static struct net_device_stats *slic_get_stats(struct net_device *dev) |
1231 | { | 1238 | { |
1232 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 1239 | struct adapter *adapter = netdev_priv(dev); |
1233 | struct net_device_stats *stats; | ||
1234 | 1240 | ||
1235 | ASSERT(adapter); | 1241 | ASSERT(adapter); |
1236 | stats = &adapter->stats; | 1242 | dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; |
1237 | stats->collisions = adapter->slic_stats.iface.xmit_collisions; | 1243 | dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; |
1238 | stats->rx_errors = adapter->slic_stats.iface.rcv_errors; | 1244 | dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; |
1239 | stats->tx_errors = adapter->slic_stats.iface.xmt_errors; | 1245 | dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; |
1240 | stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards; | 1246 | dev->stats.tx_heartbeat_errors = 0; |
1241 | stats->tx_heartbeat_errors = 0; | 1247 | dev->stats.tx_aborted_errors = 0; |
1242 | stats->tx_aborted_errors = 0; | 1248 | dev->stats.tx_window_errors = 0; |
1243 | stats->tx_window_errors = 0; | 1249 | dev->stats.tx_fifo_errors = 0; |
1244 | stats->tx_fifo_errors = 0; | 1250 | dev->stats.rx_frame_errors = 0; |
1245 | stats->rx_frame_errors = 0; | 1251 | dev->stats.rx_length_errors = 0; |
1246 | stats->rx_length_errors = 0; | 1252 | |
1247 | return &adapter->stats; | 1253 | return &dev->stats; |
1248 | } | 1254 | } |
1249 | 1255 | ||
1250 | /* | 1256 | /* |
@@ -1254,13 +1260,11 @@ static struct net_device_stats *slic_get_stats(struct net_device *dev) | |||
1254 | static int slic_mcast_add_list(struct adapter *adapter, char *address) | 1260 | static int slic_mcast_add_list(struct adapter *adapter, char *address) |
1255 | { | 1261 | { |
1256 | struct mcast_address *mcaddr, *mlist; | 1262 | struct mcast_address *mcaddr, *mlist; |
1257 | bool equaladdr; | ||
1258 | 1263 | ||
1259 | /* Check to see if it already exists */ | 1264 | /* Check to see if it already exists */ |
1260 | mlist = adapter->mcastaddrs; | 1265 | mlist = adapter->mcastaddrs; |
1261 | while (mlist) { | 1266 | while (mlist) { |
1262 | ETHER_EQ_ADDR(mlist->address, address, equaladdr); | 1267 | if (!compare_ether_addr(mlist->address, address)) |
1263 | if (equaladdr) | ||
1264 | return STATUS_SUCCESS; | 1268 | return STATUS_SUCCESS; |
1265 | mlist = mlist->next; | 1269 | mlist = mlist->next; |
1266 | } | 1270 | } |
@@ -1360,7 +1364,7 @@ static void slic_mcast_set_bit(struct adapter *adapter, char *address) | |||
1360 | 1364 | ||
1361 | static void slic_mcast_set_list(struct net_device *dev) | 1365 | static void slic_mcast_set_list(struct net_device *dev) |
1362 | { | 1366 | { |
1363 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 1367 | struct adapter *adapter = netdev_priv(dev); |
1364 | int status = STATUS_SUCCESS; | 1368 | int status = STATUS_SUCCESS; |
1365 | char *addresses; | 1369 | char *addresses; |
1366 | struct dev_mc_list *mc_list; | 1370 | struct dev_mc_list *mc_list; |
@@ -1852,6 +1856,9 @@ static int slic_card_download_gbrcv(struct adapter *adapter) | |||
1852 | return 0; | 1856 | return 0; |
1853 | } | 1857 | } |
1854 | 1858 | ||
1859 | MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); | ||
1860 | MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); | ||
1861 | |||
1855 | static int slic_card_download(struct adapter *adapter) | 1862 | static int slic_card_download(struct adapter *adapter) |
1856 | { | 1863 | { |
1857 | const struct firmware *fw; | 1864 | const struct firmware *fw; |
@@ -1963,6 +1970,9 @@ static int slic_card_download(struct adapter *adapter) | |||
1963 | return STATUS_SUCCESS; | 1970 | return STATUS_SUCCESS; |
1964 | } | 1971 | } |
1965 | 1972 | ||
1973 | MODULE_FIRMWARE("slicoss/oasisdownload.sys"); | ||
1974 | MODULE_FIRMWARE("slicoss/gbdownload.sys"); | ||
1975 | |||
1966 | static void slic_adapter_set_hwaddr(struct adapter *adapter) | 1976 | static void slic_adapter_set_hwaddr(struct adapter *adapter) |
1967 | { | 1977 | { |
1968 | struct sliccard *card = adapter->card; | 1978 | struct sliccard *card = adapter->card; |
@@ -2466,7 +2476,6 @@ static bool slic_mac_filter(struct adapter *adapter, | |||
2466 | u32 opts = adapter->macopts; | 2476 | u32 opts = adapter->macopts; |
2467 | u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0]; | 2477 | u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0]; |
2468 | u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4]; | 2478 | u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4]; |
2469 | bool equaladdr; | ||
2470 | 2479 | ||
2471 | if (opts & MAC_PROMISC) | 2480 | if (opts & MAC_PROMISC) |
2472 | return true; | 2481 | return true; |
@@ -2490,10 +2499,8 @@ static bool slic_mac_filter(struct adapter *adapter, | |||
2490 | struct mcast_address *mcaddr = adapter->mcastaddrs; | 2499 | struct mcast_address *mcaddr = adapter->mcastaddrs; |
2491 | 2500 | ||
2492 | while (mcaddr) { | 2501 | while (mcaddr) { |
2493 | ETHER_EQ_ADDR(mcaddr->address, | 2502 | if (!compare_ether_addr(mcaddr->address, |
2494 | ether_frame->ether_dhost, | 2503 | ether_frame->ether_dhost)) { |
2495 | equaladdr); | ||
2496 | if (equaladdr) { | ||
2497 | adapter->rcv_multicasts++; | 2504 | adapter->rcv_multicasts++; |
2498 | adapter->stats.multicast++; | 2505 | adapter->stats.multicast++; |
2499 | return true; | 2506 | return true; |
@@ -2515,7 +2522,7 @@ static bool slic_mac_filter(struct adapter *adapter, | |||
2515 | 2522 | ||
2516 | static int slic_mac_set_address(struct net_device *dev, void *ptr) | 2523 | static int slic_mac_set_address(struct net_device *dev, void *ptr) |
2517 | { | 2524 | { |
2518 | struct adapter *adapter = (struct adapter *)netdev_priv(dev); | 2525 | struct adapter *adapter = netdev_priv(dev); |
2519 | struct sockaddr *addr = ptr; | 2526 | struct sockaddr *addr = ptr; |
2520 | 2527 | ||
2521 | if (netif_running(dev)) | 2528 | if (netif_running(dev)) |
@@ -2523,6 +2530,9 @@ static int slic_mac_set_address(struct net_device *dev, void *ptr) | |||
2523 | if (!adapter) | 2530 | if (!adapter) |
2524 | return -EBUSY; | 2531 | return -EBUSY; |
2525 | 2532 | ||
2533 | if (!is_valid_ether_addr(addr->sa_data)) | ||
2534 | return -EINVAL; | ||
2535 | |||
2526 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | 2536 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
2527 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); | 2537 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
2528 | 2538 | ||
@@ -3960,10 +3970,8 @@ static void slic_debug_adapter_create(struct adapter *adapter) | |||
3960 | 3970 | ||
3961 | static void slic_debug_adapter_destroy(struct adapter *adapter) | 3971 | static void slic_debug_adapter_destroy(struct adapter *adapter) |
3962 | { | 3972 | { |
3963 | if (adapter->debugfs_entry) { | 3973 | debugfs_remove(adapter->debugfs_entry); |
3964 | debugfs_remove(adapter->debugfs_entry); | 3974 | adapter->debugfs_entry = NULL; |
3965 | adapter->debugfs_entry = NULL; | ||
3966 | } | ||
3967 | } | 3975 | } |
3968 | 3976 | ||
3969 | static void slic_debug_card_create(struct sliccard *card) | 3977 | static void slic_debug_card_create(struct sliccard *card) |
diff --git a/drivers/staging/sm7xx/Kconfig b/drivers/staging/sm7xx/Kconfig index 204dbfc3c38b..315102c7fed1 100644 --- a/drivers/staging/sm7xx/Kconfig +++ b/drivers/staging/sm7xx/Kconfig | |||
@@ -6,10 +6,3 @@ config FB_SM7XX | |||
6 | select FB_CFB_IMAGEBLIT | 6 | select FB_CFB_IMAGEBLIT |
7 | help | 7 | help |
8 | Frame Buffer driver for the Silicon Motion SM7XX serial graphic card. | 8 | Frame Buffer driver for the Silicon Motion SM7XX serial graphic card. |
9 | |||
10 | config FB_SM7XX_ACCEL | ||
11 | bool "Siliconmotion Acceleration functions (EXPERIMENTAL)" | ||
12 | depends on FB_SM7XX && EXPERIMENTAL | ||
13 | help | ||
14 | This will compile the Trident frame buffer device with | ||
15 | acceleration functions. | ||
diff --git a/drivers/staging/sm7xx/TODO b/drivers/staging/sm7xx/TODO index 1f61f5e11cf5..a66d9e406497 100644 --- a/drivers/staging/sm7xx/TODO +++ b/drivers/staging/sm7xx/TODO | |||
@@ -1,5 +1,6 @@ | |||
1 | TODO: | 1 | TODO: |
2 | - Dual head support | 2 | - Dual head support |
3 | - 2D acceleration support | ||
3 | - use kernel coding style | 4 | - use kernel coding style |
4 | - checkpatch.pl clean | 5 | - checkpatch.pl clean |
5 | - refine the code and remove unused code | 6 | - refine the code and remove unused code |
diff --git a/drivers/staging/sm7xx/smtc2d.c b/drivers/staging/sm7xx/smtc2d.c deleted file mode 100644 index 2fff0a0052d1..000000000000 --- a/drivers/staging/sm7xx/smtc2d.c +++ /dev/null | |||
@@ -1,979 +0,0 @@ | |||
1 | /* | ||
2 | * Silicon Motion SM7XX 2D drawing engine functions. | ||
3 | * | ||
4 | * Copyright (C) 2006 Silicon Motion Technology Corp. | ||
5 | * Author: Boyod boyod.yang@siliconmotion.com.cn | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzhangjin@gmail.com | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file COPYING in the main directory of this archive for | ||
12 | * more details. | ||
13 | * | ||
14 | * Version 0.10.26192.21.01 | ||
15 | * - Add PowerPC support | ||
16 | * - Add 2D support for Lynx - | ||
17 | * Verified on 2.6.19.2 | ||
18 | * Boyod.yang <boyod.yang@siliconmotion.com.cn> | ||
19 | */ | ||
20 | |||
21 | unsigned char smtc_de_busy; | ||
22 | |||
23 | void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData) | ||
24 | { | ||
25 | writel(nData, smtc_2DBaseAddress + nOffset); | ||
26 | } | ||
27 | |||
28 | unsigned long SMTC_read2Dreg(unsigned long nOffset) | ||
29 | { | ||
30 | return readl(smtc_2DBaseAddress + nOffset); | ||
31 | } | ||
32 | |||
33 | void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData) | ||
34 | { | ||
35 | writel(nData, smtc_2Ddataport + nOffset); | ||
36 | } | ||
37 | |||
38 | /********************************************************************** | ||
39 | * | ||
40 | * deInit | ||
41 | * | ||
42 | * Purpose | ||
43 | * Drawing engine initialization. | ||
44 | * | ||
45 | **********************************************************************/ | ||
46 | |||
47 | void deInit(unsigned int nModeWidth, unsigned int nModeHeight, | ||
48 | unsigned int bpp) | ||
49 | { | ||
50 | /* Get current power configuration. */ | ||
51 | unsigned char clock; | ||
52 | clock = smtc_seqr(0x21); | ||
53 | |||
54 | /* initialize global 'mutex lock' variable */ | ||
55 | smtc_de_busy = 0; | ||
56 | |||
57 | /* Enable 2D Drawing Engine */ | ||
58 | smtc_seqw(0x21, clock & 0xF8); | ||
59 | |||
60 | SMTC_write2Dreg(DE_CLIP_TL, | ||
61 | FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) | | ||
62 | FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) | | ||
63 | FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) | | ||
64 | FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0)); | ||
65 | |||
66 | if (bpp >= 24) { | ||
67 | SMTC_write2Dreg(DE_PITCH, | ||
68 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
69 | nModeWidth * 3) | FIELD_VALUE(0, | ||
70 | DE_PITCH, | ||
71 | SOURCE, | ||
72 | nModeWidth | ||
73 | * 3)); | ||
74 | } else { | ||
75 | SMTC_write2Dreg(DE_PITCH, | ||
76 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
77 | nModeWidth) | FIELD_VALUE(0, | ||
78 | DE_PITCH, | ||
79 | SOURCE, | ||
80 | nModeWidth)); | ||
81 | } | ||
82 | |||
83 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
84 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
85 | nModeWidth) | FIELD_VALUE(0, | ||
86 | DE_WINDOW_WIDTH, | ||
87 | SOURCE, | ||
88 | nModeWidth)); | ||
89 | |||
90 | switch (bpp) { | ||
91 | case 8: | ||
92 | SMTC_write2Dreg(DE_STRETCH_FORMAT, | ||
93 | FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY, | ||
94 | NORMAL) | FIELD_VALUE(0, | ||
95 | DE_STRETCH_FORMAT, | ||
96 | PATTERN_Y, | ||
97 | 0) | | ||
98 | FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X, | ||
99 | 0) | FIELD_SET(0, DE_STRETCH_FORMAT, | ||
100 | PIXEL_FORMAT, | ||
101 | 8) | FIELD_SET(0, | ||
102 | DE_STRETCH_FORMAT, | ||
103 | ADDRESSING, | ||
104 | XY) | | ||
105 | FIELD_VALUE(0, DE_STRETCH_FORMAT, | ||
106 | SOURCE_HEIGHT, 3)); | ||
107 | break; | ||
108 | case 24: | ||
109 | SMTC_write2Dreg(DE_STRETCH_FORMAT, | ||
110 | FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY, | ||
111 | NORMAL) | FIELD_VALUE(0, | ||
112 | DE_STRETCH_FORMAT, | ||
113 | PATTERN_Y, | ||
114 | 0) | | ||
115 | FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X, | ||
116 | 0) | FIELD_SET(0, DE_STRETCH_FORMAT, | ||
117 | PIXEL_FORMAT, | ||
118 | 24) | FIELD_SET(0, | ||
119 | DE_STRETCH_FORMAT, | ||
120 | ADDRESSING, | ||
121 | XY) | | ||
122 | FIELD_VALUE(0, DE_STRETCH_FORMAT, | ||
123 | SOURCE_HEIGHT, 3)); | ||
124 | break; | ||
125 | case 16: | ||
126 | default: | ||
127 | SMTC_write2Dreg(DE_STRETCH_FORMAT, | ||
128 | FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY, | ||
129 | NORMAL) | FIELD_VALUE(0, | ||
130 | DE_STRETCH_FORMAT, | ||
131 | PATTERN_Y, | ||
132 | 0) | | ||
133 | FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X, | ||
134 | 0) | FIELD_SET(0, DE_STRETCH_FORMAT, | ||
135 | PIXEL_FORMAT, | ||
136 | 16) | FIELD_SET(0, | ||
137 | DE_STRETCH_FORMAT, | ||
138 | ADDRESSING, | ||
139 | XY) | | ||
140 | FIELD_VALUE(0, DE_STRETCH_FORMAT, | ||
141 | SOURCE_HEIGHT, 3)); | ||
142 | break; | ||
143 | } | ||
144 | |||
145 | SMTC_write2Dreg(DE_MASKS, | ||
146 | FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) | | ||
147 | FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF)); | ||
148 | SMTC_write2Dreg(DE_COLOR_COMPARE_MASK, | ||
149 | FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \ | ||
150 | 0xFFFFFF)); | ||
151 | SMTC_write2Dreg(DE_COLOR_COMPARE, | ||
152 | FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF)); | ||
153 | } | ||
154 | |||
155 | void deVerticalLine(unsigned long dst_base, | ||
156 | unsigned long dst_pitch, | ||
157 | unsigned long nX, | ||
158 | unsigned long nY, | ||
159 | unsigned long dst_height, unsigned long nColor) | ||
160 | { | ||
161 | deWaitForNotBusy(); | ||
162 | |||
163 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
164 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, | ||
165 | dst_base)); | ||
166 | |||
167 | SMTC_write2Dreg(DE_PITCH, | ||
168 | FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) | | ||
169 | FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch)); | ||
170 | |||
171 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
172 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
173 | dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH, | ||
174 | SOURCE, | ||
175 | dst_pitch)); | ||
176 | |||
177 | SMTC_write2Dreg(DE_FOREGROUND, | ||
178 | FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor)); | ||
179 | |||
180 | SMTC_write2Dreg(DE_DESTINATION, | ||
181 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
182 | FIELD_VALUE(0, DE_DESTINATION, X, nX) | | ||
183 | FIELD_VALUE(0, DE_DESTINATION, Y, nY)); | ||
184 | |||
185 | SMTC_write2Dreg(DE_DIMENSION, | ||
186 | FIELD_VALUE(0, DE_DIMENSION, X, 1) | | ||
187 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height)); | ||
188 | |||
189 | SMTC_write2Dreg(DE_CONTROL, | ||
190 | FIELD_SET(0, DE_CONTROL, STATUS, START) | | ||
191 | FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) | | ||
192 | FIELD_SET(0, DE_CONTROL, MAJOR, Y) | | ||
193 | FIELD_SET(0, DE_CONTROL, STEP_X, NEGATIVE) | | ||
194 | FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) | | ||
195 | FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) | | ||
196 | FIELD_SET(0, DE_CONTROL, COMMAND, SHORT_STROKE) | | ||
197 | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | | ||
198 | FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C)); | ||
199 | |||
200 | smtc_de_busy = 1; | ||
201 | } | ||
202 | |||
203 | void deHorizontalLine(unsigned long dst_base, | ||
204 | unsigned long dst_pitch, | ||
205 | unsigned long nX, | ||
206 | unsigned long nY, | ||
207 | unsigned long dst_width, unsigned long nColor) | ||
208 | { | ||
209 | deWaitForNotBusy(); | ||
210 | |||
211 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
212 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, | ||
213 | dst_base)); | ||
214 | |||
215 | SMTC_write2Dreg(DE_PITCH, | ||
216 | FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) | | ||
217 | FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch)); | ||
218 | |||
219 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
220 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
221 | dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH, | ||
222 | SOURCE, | ||
223 | dst_pitch)); | ||
224 | SMTC_write2Dreg(DE_FOREGROUND, | ||
225 | FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor)); | ||
226 | SMTC_write2Dreg(DE_DESTINATION, | ||
227 | FIELD_SET(0, DE_DESTINATION, WRAP, | ||
228 | DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X, | ||
229 | nX) | FIELD_VALUE(0, | ||
230 | DE_DESTINATION, | ||
231 | Y, | ||
232 | nY)); | ||
233 | SMTC_write2Dreg(DE_DIMENSION, | ||
234 | FIELD_VALUE(0, DE_DIMENSION, X, | ||
235 | dst_width) | FIELD_VALUE(0, DE_DIMENSION, | ||
236 | Y_ET, 1)); | ||
237 | SMTC_write2Dreg(DE_CONTROL, | ||
238 | FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0, | ||
239 | DE_CONTROL, | ||
240 | DIRECTION, | ||
241 | RIGHT_TO_LEFT) | ||
242 | | FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0, | ||
243 | DE_CONTROL, | ||
244 | STEP_X, | ||
245 | POSITIVE) | ||
246 | | FIELD_SET(0, DE_CONTROL, STEP_Y, | ||
247 | NEGATIVE) | FIELD_SET(0, DE_CONTROL, | ||
248 | LAST_PIXEL, | ||
249 | OFF) | FIELD_SET(0, | ||
250 | DE_CONTROL, | ||
251 | COMMAND, | ||
252 | SHORT_STROKE) | ||
253 | | FIELD_SET(0, DE_CONTROL, ROP_SELECT, | ||
254 | ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP, | ||
255 | 0x0C)); | ||
256 | |||
257 | smtc_de_busy = 1; | ||
258 | } | ||
259 | |||
260 | void deLine(unsigned long dst_base, | ||
261 | unsigned long dst_pitch, | ||
262 | unsigned long nX1, | ||
263 | unsigned long nY1, | ||
264 | unsigned long nX2, unsigned long nY2, unsigned long nColor) | ||
265 | { | ||
266 | unsigned long nCommand = | ||
267 | FIELD_SET(0, DE_CONTROL, STATUS, START) | | ||
268 | FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) | | ||
269 | FIELD_SET(0, DE_CONTROL, MAJOR, X) | | ||
270 | FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) | | ||
271 | FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) | | ||
272 | FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) | | ||
273 | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | | ||
274 | FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C); | ||
275 | unsigned long DeltaX; | ||
276 | unsigned long DeltaY; | ||
277 | |||
278 | /* Calculate delta X */ | ||
279 | if (nX1 <= nX2) | ||
280 | DeltaX = nX2 - nX1; | ||
281 | else { | ||
282 | DeltaX = nX1 - nX2; | ||
283 | nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE); | ||
284 | } | ||
285 | |||
286 | /* Calculate delta Y */ | ||
287 | if (nY1 <= nY2) | ||
288 | DeltaY = nY2 - nY1; | ||
289 | else { | ||
290 | DeltaY = nY1 - nY2; | ||
291 | nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE); | ||
292 | } | ||
293 | |||
294 | /* Determine the major axis */ | ||
295 | if (DeltaX < DeltaY) | ||
296 | nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y); | ||
297 | |||
298 | /* Vertical line? */ | ||
299 | if (nX1 == nX2) | ||
300 | deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor); | ||
301 | |||
302 | /* Horizontal line? */ | ||
303 | else if (nY1 == nY2) | ||
304 | deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \ | ||
305 | DeltaX, nColor); | ||
306 | |||
307 | /* Diagonal line? */ | ||
308 | else if (DeltaX == DeltaY) { | ||
309 | deWaitForNotBusy(); | ||
310 | |||
311 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
312 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, | ||
313 | ADDRESS, dst_base)); | ||
314 | |||
315 | SMTC_write2Dreg(DE_PITCH, | ||
316 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
317 | dst_pitch) | FIELD_VALUE(0, | ||
318 | DE_PITCH, | ||
319 | SOURCE, | ||
320 | dst_pitch)); | ||
321 | |||
322 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
323 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
324 | dst_pitch) | FIELD_VALUE(0, | ||
325 | DE_WINDOW_WIDTH, | ||
326 | SOURCE, | ||
327 | dst_pitch)); | ||
328 | |||
329 | SMTC_write2Dreg(DE_FOREGROUND, | ||
330 | FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor)); | ||
331 | |||
332 | SMTC_write2Dreg(DE_DESTINATION, | ||
333 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
334 | FIELD_VALUE(0, DE_DESTINATION, X, 1) | | ||
335 | FIELD_VALUE(0, DE_DESTINATION, Y, nY1)); | ||
336 | |||
337 | SMTC_write2Dreg(DE_DIMENSION, | ||
338 | FIELD_VALUE(0, DE_DIMENSION, X, 1) | | ||
339 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX)); | ||
340 | |||
341 | SMTC_write2Dreg(DE_CONTROL, | ||
342 | FIELD_SET(nCommand, DE_CONTROL, COMMAND, | ||
343 | SHORT_STROKE)); | ||
344 | } | ||
345 | |||
346 | /* Generic line */ | ||
347 | else { | ||
348 | unsigned int k1, k2, et, w; | ||
349 | if (DeltaX < DeltaY) { | ||
350 | k1 = 2 * DeltaX; | ||
351 | et = k1 - DeltaY; | ||
352 | k2 = et - DeltaY; | ||
353 | w = DeltaY + 1; | ||
354 | } else { | ||
355 | k1 = 2 * DeltaY; | ||
356 | et = k1 - DeltaX; | ||
357 | k2 = et - DeltaX; | ||
358 | w = DeltaX + 1; | ||
359 | } | ||
360 | |||
361 | deWaitForNotBusy(); | ||
362 | |||
363 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
364 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, | ||
365 | ADDRESS, dst_base)); | ||
366 | |||
367 | SMTC_write2Dreg(DE_PITCH, | ||
368 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
369 | dst_pitch) | FIELD_VALUE(0, | ||
370 | DE_PITCH, | ||
371 | SOURCE, | ||
372 | dst_pitch)); | ||
373 | |||
374 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
375 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
376 | dst_pitch) | FIELD_VALUE(0, | ||
377 | DE_WINDOW_WIDTH, | ||
378 | SOURCE, | ||
379 | dst_pitch)); | ||
380 | |||
381 | SMTC_write2Dreg(DE_FOREGROUND, | ||
382 | FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor)); | ||
383 | |||
384 | SMTC_write2Dreg(DE_SOURCE, | ||
385 | FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | | ||
386 | FIELD_VALUE(0, DE_SOURCE, X_K1, k1) | | ||
387 | FIELD_VALUE(0, DE_SOURCE, Y_K2, k2)); | ||
388 | |||
389 | SMTC_write2Dreg(DE_DESTINATION, | ||
390 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
391 | FIELD_VALUE(0, DE_DESTINATION, X, nX1) | | ||
392 | FIELD_VALUE(0, DE_DESTINATION, Y, nY1)); | ||
393 | |||
394 | SMTC_write2Dreg(DE_DIMENSION, | ||
395 | FIELD_VALUE(0, DE_DIMENSION, X, w) | | ||
396 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, et)); | ||
397 | |||
398 | SMTC_write2Dreg(DE_CONTROL, | ||
399 | FIELD_SET(nCommand, DE_CONTROL, COMMAND, | ||
400 | LINE_DRAW)); | ||
401 | } | ||
402 | |||
403 | smtc_de_busy = 1; | ||
404 | } | ||
405 | |||
406 | void deFillRect(unsigned long dst_base, | ||
407 | unsigned long dst_pitch, | ||
408 | unsigned long dst_X, | ||
409 | unsigned long dst_Y, | ||
410 | unsigned long dst_width, | ||
411 | unsigned long dst_height, unsigned long nColor) | ||
412 | { | ||
413 | deWaitForNotBusy(); | ||
414 | |||
415 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
416 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, | ||
417 | dst_base)); | ||
418 | |||
419 | if (dst_pitch) { | ||
420 | SMTC_write2Dreg(DE_PITCH, | ||
421 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
422 | dst_pitch) | FIELD_VALUE(0, | ||
423 | DE_PITCH, | ||
424 | SOURCE, | ||
425 | dst_pitch)); | ||
426 | |||
427 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
428 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
429 | dst_pitch) | FIELD_VALUE(0, | ||
430 | DE_WINDOW_WIDTH, | ||
431 | SOURCE, | ||
432 | dst_pitch)); | ||
433 | } | ||
434 | |||
435 | SMTC_write2Dreg(DE_FOREGROUND, | ||
436 | FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor)); | ||
437 | |||
438 | SMTC_write2Dreg(DE_DESTINATION, | ||
439 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
440 | FIELD_VALUE(0, DE_DESTINATION, X, dst_X) | | ||
441 | FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y)); | ||
442 | |||
443 | SMTC_write2Dreg(DE_DIMENSION, | ||
444 | FIELD_VALUE(0, DE_DIMENSION, X, dst_width) | | ||
445 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height)); | ||
446 | |||
447 | SMTC_write2Dreg(DE_CONTROL, | ||
448 | FIELD_SET(0, DE_CONTROL, STATUS, START) | | ||
449 | FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) | | ||
450 | FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) | | ||
451 | FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) | | ||
452 | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | | ||
453 | FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C)); | ||
454 | |||
455 | smtc_de_busy = 1; | ||
456 | } | ||
457 | |||
458 | /********************************************************************** | ||
459 | * | ||
460 | * deRotatePattern | ||
461 | * | ||
462 | * Purpose | ||
463 | * Rotate the given pattern if necessary | ||
464 | * | ||
465 | * Parameters | ||
466 | * [in] | ||
467 | * pPattern - Pointer to DE_SURFACE structure containing | ||
468 | * pattern attributes | ||
469 | * patternX - X position (0-7) of pattern origin | ||
470 | * patternY - Y position (0-7) of pattern origin | ||
471 | * | ||
472 | * [out] | ||
473 | * pattern_dstaddr - Pointer to pre-allocated buffer containing | ||
474 | * rotated pattern | ||
475 | * | ||
476 | **********************************************************************/ | ||
477 | void deRotatePattern(unsigned char *pattern_dstaddr, | ||
478 | unsigned long pattern_src_addr, | ||
479 | unsigned long pattern_BPP, | ||
480 | unsigned long pattern_stride, int patternX, int patternY) | ||
481 | { | ||
482 | unsigned int i; | ||
483 | unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT]; | ||
484 | unsigned int x, y; | ||
485 | unsigned char *pjPatByte; | ||
486 | |||
487 | if (pattern_dstaddr != NULL) { | ||
488 | deWaitForNotBusy(); | ||
489 | |||
490 | if (patternX || patternY) { | ||
491 | /* Rotate pattern */ | ||
492 | pjPatByte = (unsigned char *)pattern; | ||
493 | |||
494 | switch (pattern_BPP) { | ||
495 | case 8: | ||
496 | { | ||
497 | for (y = 0; y < 8; y++) { | ||
498 | unsigned char *pjBuffer = | ||
499 | pattern_dstaddr + | ||
500 | ((patternY + y) & 7) * 8; | ||
501 | for (x = 0; x < 8; x++) { | ||
502 | pjBuffer[(patternX + | ||
503 | x) & 7] = | ||
504 | pjPatByte[x]; | ||
505 | } | ||
506 | pjPatByte += pattern_stride; | ||
507 | } | ||
508 | break; | ||
509 | } | ||
510 | |||
511 | case 16: | ||
512 | { | ||
513 | for (y = 0; y < 8; y++) { | ||
514 | unsigned short *pjBuffer = | ||
515 | (unsigned short *) | ||
516 | pattern_dstaddr + | ||
517 | ((patternY + y) & 7) * 8; | ||
518 | for (x = 0; x < 8; x++) { | ||
519 | pjBuffer[(patternX + | ||
520 | x) & 7] = | ||
521 | ((unsigned short *) | ||
522 | pjPatByte)[x]; | ||
523 | } | ||
524 | pjPatByte += pattern_stride; | ||
525 | } | ||
526 | break; | ||
527 | } | ||
528 | |||
529 | case 32: | ||
530 | { | ||
531 | for (y = 0; y < 8; y++) { | ||
532 | unsigned long *pjBuffer = | ||
533 | (unsigned long *) | ||
534 | pattern_dstaddr + | ||
535 | ((patternY + y) & 7) * 8; | ||
536 | for (x = 0; x < 8; x++) { | ||
537 | pjBuffer[(patternX + | ||
538 | x) & 7] = | ||
539 | ((unsigned long *) | ||
540 | pjPatByte)[x]; | ||
541 | } | ||
542 | pjPatByte += pattern_stride; | ||
543 | } | ||
544 | break; | ||
545 | } | ||
546 | } | ||
547 | } else { | ||
548 | /*Don't rotate,just copy pattern into pattern_dstaddr*/ | ||
549 | for (i = 0; i < (pattern_BPP * 2); i++) { | ||
550 | ((unsigned long *)pattern_dstaddr)[i] = | ||
551 | pattern[i]; | ||
552 | } | ||
553 | } | ||
554 | |||
555 | } | ||
556 | } | ||
557 | |||
558 | /********************************************************************** | ||
559 | * | ||
560 | * deCopy | ||
561 | * | ||
562 | * Purpose | ||
563 | * Copy a rectangular area of the source surface to a destination surface | ||
564 | * | ||
565 | * Remarks | ||
566 | * Source bitmap must have the same color depth (BPP) as the destination | ||
567 | * bitmap. | ||
568 | * | ||
569 | **********************************************************************/ | ||
570 | void deCopy(unsigned long dst_base, | ||
571 | unsigned long dst_pitch, | ||
572 | unsigned long dst_BPP, | ||
573 | unsigned long dst_X, | ||
574 | unsigned long dst_Y, | ||
575 | unsigned long dst_width, | ||
576 | unsigned long dst_height, | ||
577 | unsigned long src_base, | ||
578 | unsigned long src_pitch, | ||
579 | unsigned long src_X, | ||
580 | unsigned long src_Y, pTransparent pTransp, unsigned char nROP2) | ||
581 | { | ||
582 | unsigned long nDirection = 0; | ||
583 | unsigned long nTransparent = 0; | ||
584 | /* Direction of ROP2 operation: | ||
585 | * 1 = Left to Right, | ||
586 | * (-1) = Right to Left | ||
587 | */ | ||
588 | unsigned long opSign = 1; | ||
589 | /* xWidth is in pixels */ | ||
590 | unsigned long xWidth = 192 / (dst_BPP / 8); | ||
591 | unsigned long de_ctrl = 0; | ||
592 | |||
593 | deWaitForNotBusy(); | ||
594 | |||
595 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, | ||
596 | FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, | ||
597 | dst_base)); | ||
598 | |||
599 | SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, | ||
600 | FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS, | ||
601 | src_base)); | ||
602 | |||
603 | if (dst_pitch && src_pitch) { | ||
604 | SMTC_write2Dreg(DE_PITCH, | ||
605 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
606 | dst_pitch) | FIELD_VALUE(0, | ||
607 | DE_PITCH, | ||
608 | SOURCE, | ||
609 | src_pitch)); | ||
610 | |||
611 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
612 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
613 | dst_pitch) | FIELD_VALUE(0, | ||
614 | DE_WINDOW_WIDTH, | ||
615 | SOURCE, | ||
616 | src_pitch)); | ||
617 | } | ||
618 | |||
619 | /* Set transparent bits if necessary */ | ||
620 | if (pTransp != NULL) { | ||
621 | nTransparent = | ||
622 | pTransp->match | pTransp->select | pTransp->control; | ||
623 | |||
624 | /* Set color compare register */ | ||
625 | SMTC_write2Dreg(DE_COLOR_COMPARE, | ||
626 | FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, | ||
627 | pTransp->color)); | ||
628 | } | ||
629 | |||
630 | /* Determine direction of operation */ | ||
631 | if (src_Y < dst_Y) { | ||
632 | /* +----------+ | ||
633 | |S | | ||
634 | | +----------+ | ||
635 | | | | | | ||
636 | | | | | | ||
637 | +---|------+ | | ||
638 | | D | | ||
639 | +----------+ */ | ||
640 | |||
641 | nDirection = BOTTOM_TO_TOP; | ||
642 | } else if (src_Y > dst_Y) { | ||
643 | /* +----------+ | ||
644 | |D | | ||
645 | | +----------+ | ||
646 | | | | | | ||
647 | | | | | | ||
648 | +---|------+ | | ||
649 | | S | | ||
650 | +----------+ */ | ||
651 | |||
652 | nDirection = TOP_TO_BOTTOM; | ||
653 | } else { | ||
654 | /* src_Y == dst_Y */ | ||
655 | |||
656 | if (src_X <= dst_X) { | ||
657 | /* +------+---+------+ | ||
658 | |S | | D| | ||
659 | | | | | | ||
660 | | | | | | ||
661 | | | | | | ||
662 | +------+---+------+ */ | ||
663 | |||
664 | nDirection = RIGHT_TO_LEFT; | ||
665 | } else { | ||
666 | /* src_X > dst_X */ | ||
667 | |||
668 | /* +------+---+------+ | ||
669 | |D | | S| | ||
670 | | | | | | ||
671 | | | | | | ||
672 | | | | | | ||
673 | +------+---+------+ */ | ||
674 | |||
675 | nDirection = LEFT_TO_RIGHT; | ||
676 | } | ||
677 | } | ||
678 | |||
679 | if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) { | ||
680 | src_X += dst_width - 1; | ||
681 | src_Y += dst_height - 1; | ||
682 | dst_X += dst_width - 1; | ||
683 | dst_Y += dst_height - 1; | ||
684 | opSign = (-1); | ||
685 | } | ||
686 | |||
687 | if (dst_BPP >= 24) { | ||
688 | src_X *= 3; | ||
689 | src_Y *= 3; | ||
690 | dst_X *= 3; | ||
691 | dst_Y *= 3; | ||
692 | dst_width *= 3; | ||
693 | if ((nDirection == BOTTOM_TO_TOP) | ||
694 | || (nDirection == RIGHT_TO_LEFT)) { | ||
695 | src_X += 2; | ||
696 | dst_X += 2; | ||
697 | } | ||
698 | } | ||
699 | |||
700 | /* Workaround for 192 byte hw bug */ | ||
701 | if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) { | ||
702 | /* | ||
703 | * Perform the ROP2 operation in chunks of (xWidth * | ||
704 | * dst_height) | ||
705 | */ | ||
706 | while (1) { | ||
707 | deWaitForNotBusy(); | ||
708 | |||
709 | SMTC_write2Dreg(DE_SOURCE, | ||
710 | FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | | ||
711 | FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) | | ||
712 | FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y)); | ||
713 | |||
714 | SMTC_write2Dreg(DE_DESTINATION, | ||
715 | FIELD_SET(0, DE_DESTINATION, WRAP, | ||
716 | DISABLE) | FIELD_VALUE(0, | ||
717 | DE_DESTINATION, | ||
718 | X, | ||
719 | dst_X) | ||
720 | | FIELD_VALUE(0, DE_DESTINATION, Y, | ||
721 | dst_Y)); | ||
722 | |||
723 | SMTC_write2Dreg(DE_DIMENSION, | ||
724 | FIELD_VALUE(0, DE_DIMENSION, X, | ||
725 | xWidth) | FIELD_VALUE(0, | ||
726 | DE_DIMENSION, | ||
727 | Y_ET, | ||
728 | dst_height)); | ||
729 | |||
730 | de_ctrl = | ||
731 | FIELD_VALUE(0, DE_CONTROL, ROP, | ||
732 | nROP2) | nTransparent | FIELD_SET(0, | ||
733 | DE_CONTROL, | ||
734 | ROP_SELECT, | ||
735 | ROP2) | ||
736 | | FIELD_SET(0, DE_CONTROL, COMMAND, | ||
737 | BITBLT) | ((nDirection == | ||
738 | 1) ? FIELD_SET(0, | ||
739 | DE_CONTROL, | ||
740 | DIRECTION, | ||
741 | RIGHT_TO_LEFT) | ||
742 | : FIELD_SET(0, DE_CONTROL, | ||
743 | DIRECTION, | ||
744 | LEFT_TO_RIGHT)) | | ||
745 | FIELD_SET(0, DE_CONTROL, STATUS, START); | ||
746 | |||
747 | SMTC_write2Dreg(DE_CONTROL, de_ctrl); | ||
748 | |||
749 | src_X += (opSign * xWidth); | ||
750 | dst_X += (opSign * xWidth); | ||
751 | dst_width -= xWidth; | ||
752 | |||
753 | if (dst_width <= 0) { | ||
754 | /* ROP2 operation is complete */ | ||
755 | break; | ||
756 | } | ||
757 | |||
758 | if (xWidth > dst_width) | ||
759 | xWidth = dst_width; | ||
760 | } | ||
761 | } else { | ||
762 | deWaitForNotBusy(); | ||
763 | SMTC_write2Dreg(DE_SOURCE, | ||
764 | FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | | ||
765 | FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) | | ||
766 | FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y)); | ||
767 | |||
768 | SMTC_write2Dreg(DE_DESTINATION, | ||
769 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
770 | FIELD_VALUE(0, DE_DESTINATION, X, dst_X) | | ||
771 | FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y)); | ||
772 | |||
773 | SMTC_write2Dreg(DE_DIMENSION, | ||
774 | FIELD_VALUE(0, DE_DIMENSION, X, dst_width) | | ||
775 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height)); | ||
776 | |||
777 | de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) | | ||
778 | nTransparent | | ||
779 | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | | ||
780 | FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) | | ||
781 | ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION, | ||
782 | RIGHT_TO_LEFT) | ||
783 | : FIELD_SET(0, DE_CONTROL, DIRECTION, | ||
784 | LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL, | ||
785 | STATUS, START); | ||
786 | SMTC_write2Dreg(DE_CONTROL, de_ctrl); | ||
787 | } | ||
788 | |||
789 | smtc_de_busy = 1; | ||
790 | } | ||
791 | |||
792 | /* | ||
793 | * This function sets the pixel format that will apply to the 2D Engine. | ||
794 | */ | ||
795 | void deSetPixelFormat(unsigned long bpp) | ||
796 | { | ||
797 | unsigned long de_format; | ||
798 | |||
799 | de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT); | ||
800 | |||
801 | switch (bpp) { | ||
802 | case 8: | ||
803 | de_format = | ||
804 | FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8); | ||
805 | break; | ||
806 | default: | ||
807 | case 16: | ||
808 | de_format = | ||
809 | FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16); | ||
810 | break; | ||
811 | case 32: | ||
812 | de_format = | ||
813 | FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32); | ||
814 | break; | ||
815 | } | ||
816 | |||
817 | SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format); | ||
818 | } | ||
819 | |||
820 | /* | ||
821 | * System memory to Video memory monochrome expansion. | ||
822 | * | ||
823 | * Source is monochrome image in system memory. This function expands the | ||
824 | * monochrome data to color image in video memory. | ||
825 | */ | ||
826 | |||
827 | long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf, | ||
828 | long srcDelta, | ||
829 | unsigned long startBit, | ||
830 | unsigned long dBase, | ||
831 | unsigned long dPitch, | ||
832 | unsigned long bpp, | ||
833 | unsigned long dx, unsigned long dy, | ||
834 | unsigned long width, unsigned long height, | ||
835 | unsigned long fColor, | ||
836 | unsigned long bColor, | ||
837 | unsigned long rop2) { | ||
838 | unsigned long bytePerPixel; | ||
839 | unsigned long ulBytesPerScan; | ||
840 | unsigned long ul4BytesPerScan; | ||
841 | unsigned long ulBytesRemain; | ||
842 | unsigned long de_ctrl = 0; | ||
843 | unsigned char ajRemain[4]; | ||
844 | long i, j; | ||
845 | |||
846 | bytePerPixel = bpp / 8; | ||
847 | |||
848 | /* Just make sure the start bit is within legal range */ | ||
849 | startBit &= 7; | ||
850 | |||
851 | ulBytesPerScan = (width + startBit + 7) / 8; | ||
852 | ul4BytesPerScan = ulBytesPerScan & ~3; | ||
853 | ulBytesRemain = ulBytesPerScan & 3; | ||
854 | |||
855 | if (smtc_de_busy) | ||
856 | deWaitForNotBusy(); | ||
857 | |||
858 | /* | ||
859 | * 2D Source Base. Use 0 for HOST Blt. | ||
860 | */ | ||
861 | |||
862 | SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0); | ||
863 | |||
864 | /* | ||
865 | * 2D Destination Base. | ||
866 | * | ||
867 | * It is an address offset (128 bit aligned) from the beginning of | ||
868 | * frame buffer. | ||
869 | */ | ||
870 | |||
871 | SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase); | ||
872 | |||
873 | if (dPitch) { | ||
874 | |||
875 | /* | ||
876 | * Program pitch (distance between the 1st points of two | ||
877 | * adjacent lines). | ||
878 | * | ||
879 | * Note that input pitch is BYTE value, but the 2D Pitch | ||
880 | * register uses pixel values. Need Byte to pixel convertion. | ||
881 | */ | ||
882 | |||
883 | SMTC_write2Dreg(DE_PITCH, | ||
884 | FIELD_VALUE(0, DE_PITCH, DESTINATION, | ||
885 | dPitch / | ||
886 | bytePerPixel) | FIELD_VALUE(0, | ||
887 | DE_PITCH, | ||
888 | SOURCE, | ||
889 | dPitch / | ||
890 | bytePerPixel)); | ||
891 | |||
892 | /* Screen Window width in Pixels. | ||
893 | * | ||
894 | * 2D engine uses this value to calculate the linear address in | ||
895 | * frame buffer for a given point. | ||
896 | */ | ||
897 | |||
898 | SMTC_write2Dreg(DE_WINDOW_WIDTH, | ||
899 | FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, | ||
900 | (dPitch / | ||
901 | bytePerPixel)) | FIELD_VALUE(0, | ||
902 | DE_WINDOW_WIDTH, | ||
903 | SOURCE, | ||
904 | (dPitch | ||
905 | / | ||
906 | bytePerPixel))); | ||
907 | } | ||
908 | /* Note: For 2D Source in Host Write, only X_K1 field is needed, and | ||
909 | * Y_K2 field is not used. For mono bitmap, use startBit for X_K1. | ||
910 | */ | ||
911 | |||
912 | SMTC_write2Dreg(DE_SOURCE, | ||
913 | FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) | | ||
914 | FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) | | ||
915 | FIELD_VALUE(0, DE_SOURCE, Y_K2, 0)); | ||
916 | |||
917 | SMTC_write2Dreg(DE_DESTINATION, | ||
918 | FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) | | ||
919 | FIELD_VALUE(0, DE_DESTINATION, X, dx) | | ||
920 | FIELD_VALUE(0, DE_DESTINATION, Y, dy)); | ||
921 | |||
922 | SMTC_write2Dreg(DE_DIMENSION, | ||
923 | FIELD_VALUE(0, DE_DIMENSION, X, width) | | ||
924 | FIELD_VALUE(0, DE_DIMENSION, Y_ET, height)); | ||
925 | |||
926 | SMTC_write2Dreg(DE_FOREGROUND, fColor); | ||
927 | SMTC_write2Dreg(DE_BACKGROUND, bColor); | ||
928 | |||
929 | if (bpp) | ||
930 | deSetPixelFormat(bpp); | ||
931 | /* Set the pixel format of the destination */ | ||
932 | |||
933 | de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) | | ||
934 | FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) | | ||
935 | FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) | | ||
936 | FIELD_SET(0, DE_CONTROL, HOST, MONO) | | ||
937 | FIELD_SET(0, DE_CONTROL, STATUS, START); | ||
938 | |||
939 | SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency()); | ||
940 | |||
941 | /* Write MONO data (line by line) to 2D Engine data port */ | ||
942 | for (i = 0; i < height; i++) { | ||
943 | /* For each line, send the data in chunks of 4 bytes */ | ||
944 | for (j = 0; j < (ul4BytesPerScan / 4); j++) | ||
945 | SMTC_write2Ddataport(0, | ||
946 | *(unsigned long *)(pSrcbuf + | ||
947 | (j * 4))); | ||
948 | |||
949 | if (ulBytesRemain) { | ||
950 | memcpy(ajRemain, pSrcbuf + ul4BytesPerScan, | ||
951 | ulBytesRemain); | ||
952 | SMTC_write2Ddataport(0, *(unsigned long *)ajRemain); | ||
953 | } | ||
954 | |||
955 | pSrcbuf += srcDelta; | ||
956 | } | ||
957 | smtc_de_busy = 1; | ||
958 | |||
959 | return 0; | ||
960 | } | ||
961 | |||
962 | /* | ||
963 | * This function gets the transparency status from DE_CONTROL register. | ||
964 | * It returns a double word with the transparent fields properly set, | ||
965 | * while other fields are 0. | ||
966 | */ | ||
967 | unsigned long deGetTransparency(void) | ||
968 | { | ||
969 | unsigned long de_ctrl; | ||
970 | |||
971 | de_ctrl = SMTC_read2Dreg(DE_CONTROL); | ||
972 | |||
973 | de_ctrl &= | ||
974 | FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) | | ||
975 | FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT) | | ||
976 | FIELD_MASK(DE_CONTROL_TRANSPARENCY); | ||
977 | |||
978 | return de_ctrl; | ||
979 | } | ||
diff --git a/drivers/staging/sm7xx/smtc2d.h b/drivers/staging/sm7xx/smtc2d.h deleted file mode 100644 index 02b4fa29136c..000000000000 --- a/drivers/staging/sm7xx/smtc2d.h +++ /dev/null | |||
@@ -1,530 +0,0 @@ | |||
1 | /* | ||
2 | * Silicon Motion SM712 2D drawing engine functions. | ||
3 | * | ||
4 | * Copyright (C) 2006 Silicon Motion Technology Corp. | ||
5 | * Author: Ge Wang, gewang@siliconmotion.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzhangjin@gmail.com | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file COPYING in the main directory of this archive for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef NULL | ||
16 | #define NULL 0 | ||
17 | #endif | ||
18 | |||
19 | /* Internal macros */ | ||
20 | |||
21 | #define _F_START(f) (0 ? f) | ||
22 | #define _F_END(f) (1 ? f) | ||
23 | #define _F_SIZE(f) (1 + _F_END(f) - _F_START(f)) | ||
24 | #define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f)) | ||
25 | #define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f)) | ||
26 | #define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f)) | ||
27 | |||
28 | /* Global macros */ | ||
29 | |||
30 | #define FIELD_GET(x, reg, field) \ | ||
31 | ( \ | ||
32 | _F_NORMALIZE((x), reg ## _ ## field) \ | ||
33 | ) | ||
34 | |||
35 | #define FIELD_SET(x, reg, field, value) \ | ||
36 | ( \ | ||
37 | (x & ~_F_MASK(reg ## _ ## field)) \ | ||
38 | | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \ | ||
39 | ) | ||
40 | |||
41 | #define FIELD_VALUE(x, reg, field, value) \ | ||
42 | ( \ | ||
43 | (x & ~_F_MASK(reg ## _ ## field)) \ | ||
44 | | _F_DENORMALIZE(value, reg ## _ ## field) \ | ||
45 | ) | ||
46 | |||
47 | #define FIELD_CLEAR(reg, field) \ | ||
48 | ( \ | ||
49 | ~_F_MASK(reg ## _ ## field) \ | ||
50 | ) | ||
51 | |||
52 | /* Field Macros */ | ||
53 | |||
54 | #define FIELD_START(field) (0 ? field) | ||
55 | #define FIELD_END(field) (1 ? field) | ||
56 | #define FIELD_SIZE(field) \ | ||
57 | (1 + FIELD_END(field) - FIELD_START(field)) | ||
58 | |||
59 | #define FIELD_MASK(field) \ | ||
60 | (((1 << (FIELD_SIZE(field)-1)) \ | ||
61 | | ((1 << (FIELD_SIZE(field)-1)) - 1)) \ | ||
62 | << FIELD_START(field)) | ||
63 | |||
64 | #define FIELD_NORMALIZE(reg, field) \ | ||
65 | (((reg) & FIELD_MASK(field)) >> FIELD_START(field)) | ||
66 | |||
67 | #define FIELD_DENORMALIZE(field, value) \ | ||
68 | (((value) << FIELD_START(field)) & FIELD_MASK(field)) | ||
69 | |||
70 | #define FIELD_INIT(reg, field, value) \ | ||
71 | FIELD_DENORMALIZE(reg ## _ ## field, \ | ||
72 | reg ## _ ## field ## _ ## value) | ||
73 | |||
74 | #define FIELD_INIT_VAL(reg, field, value) \ | ||
75 | (FIELD_DENORMALIZE(reg ## _ ## field, value)) | ||
76 | |||
77 | #define FIELD_VAL_SET(x, r, f, v) ({ \ | ||
78 | x = (x & ~FIELD_MASK(r ## _ ## f)) \ | ||
79 | | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) \ | ||
80 | }) | ||
81 | |||
82 | #define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b))) | ||
83 | |||
84 | /* Transparent info definition */ | ||
85 | typedef struct { | ||
86 | unsigned long match; /* Matching pixel is OPAQUE/TRANSPARENT */ | ||
87 | unsigned long select; /* Transparency controlled by SRC/DST */ | ||
88 | unsigned long control; /* ENABLE/DISABLE transparency */ | ||
89 | unsigned long color; /* Transparent color */ | ||
90 | } Transparent, *pTransparent; | ||
91 | |||
92 | #define PIXEL_DEPTH_1_BP 0 /* 1 bit per pixel */ | ||
93 | #define PIXEL_DEPTH_8_BPP 1 /* 8 bits per pixel */ | ||
94 | #define PIXEL_DEPTH_16_BPP 2 /* 16 bits per pixel */ | ||
95 | #define PIXEL_DEPTH_32_BPP 3 /* 32 bits per pixel */ | ||
96 | #define PIXEL_DEPTH_YUV422 8 /* 16 bits per pixel YUV422 */ | ||
97 | #define PIXEL_DEPTH_YUV420 9 /* 16 bits per pixel YUV420 */ | ||
98 | |||
99 | #define PATTERN_WIDTH 8 | ||
100 | #define PATTERN_HEIGHT 8 | ||
101 | |||
102 | #define TOP_TO_BOTTOM 0 | ||
103 | #define BOTTOM_TO_TOP 1 | ||
104 | #define RIGHT_TO_LEFT BOTTOM_TO_TOP | ||
105 | #define LEFT_TO_RIGHT TOP_TO_BOTTOM | ||
106 | |||
107 | /* Constants used in Transparent structure */ | ||
108 | #define MATCH_OPAQUE 0x00000000 | ||
109 | #define MATCH_TRANSPARENT 0x00000400 | ||
110 | #define SOURCE 0x00000000 | ||
111 | #define DESTINATION 0x00000200 | ||
112 | |||
113 | /* 2D registers. */ | ||
114 | |||
115 | #define DE_SOURCE 0x000000 | ||
116 | #define DE_SOURCE_WRAP 31 : 31 | ||
117 | #define DE_SOURCE_WRAP_DISABLE 0 | ||
118 | #define DE_SOURCE_WRAP_ENABLE 1 | ||
119 | #define DE_SOURCE_X_K1 29 : 16 | ||
120 | #define DE_SOURCE_Y_K2 15 : 0 | ||
121 | |||
122 | #define DE_DESTINATION 0x000004 | ||
123 | #define DE_DESTINATION_WRAP 31 : 31 | ||
124 | #define DE_DESTINATION_WRAP_DISABLE 0 | ||
125 | #define DE_DESTINATION_WRAP_ENABLE 1 | ||
126 | #define DE_DESTINATION_X 28 : 16 | ||
127 | #define DE_DESTINATION_Y 15 : 0 | ||
128 | |||
129 | #define DE_DIMENSION 0x000008 | ||
130 | #define DE_DIMENSION_X 28 : 16 | ||
131 | #define DE_DIMENSION_Y_ET 15 : 0 | ||
132 | |||
133 | #define DE_CONTROL 0x00000C | ||
134 | #define DE_CONTROL_STATUS 31 : 31 | ||
135 | #define DE_CONTROL_STATUS_STOP 0 | ||
136 | #define DE_CONTROL_STATUS_START 1 | ||
137 | #define DE_CONTROL_PATTERN 30 : 30 | ||
138 | #define DE_CONTROL_PATTERN_MONO 0 | ||
139 | #define DE_CONTROL_PATTERN_COLOR 1 | ||
140 | #define DE_CONTROL_UPDATE_DESTINATION_X 29 : 29 | ||
141 | #define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0 | ||
142 | #define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1 | ||
143 | #define DE_CONTROL_QUICK_START 28 : 28 | ||
144 | #define DE_CONTROL_QUICK_START_DISABLE 0 | ||
145 | #define DE_CONTROL_QUICK_START_ENABLE 1 | ||
146 | #define DE_CONTROL_DIRECTION 27 : 27 | ||
147 | #define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0 | ||
148 | #define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1 | ||
149 | #define DE_CONTROL_MAJOR 26 : 26 | ||
150 | #define DE_CONTROL_MAJOR_X 0 | ||
151 | #define DE_CONTROL_MAJOR_Y 1 | ||
152 | #define DE_CONTROL_STEP_X 25 : 25 | ||
153 | #define DE_CONTROL_STEP_X_POSITIVE 1 | ||
154 | #define DE_CONTROL_STEP_X_NEGATIVE 0 | ||
155 | #define DE_CONTROL_STEP_Y 24 : 24 | ||
156 | #define DE_CONTROL_STEP_Y_POSITIVE 1 | ||
157 | #define DE_CONTROL_STEP_Y_NEGATIVE 0 | ||
158 | #define DE_CONTROL_STRETCH 23 : 23 | ||
159 | #define DE_CONTROL_STRETCH_DISABLE 0 | ||
160 | #define DE_CONTROL_STRETCH_ENABLE 1 | ||
161 | #define DE_CONTROL_HOST 22 : 22 | ||
162 | #define DE_CONTROL_HOST_COLOR 0 | ||
163 | #define DE_CONTROL_HOST_MONO 1 | ||
164 | #define DE_CONTROL_LAST_PIXEL 21 : 21 | ||
165 | #define DE_CONTROL_LAST_PIXEL_OFF 0 | ||
166 | #define DE_CONTROL_LAST_PIXEL_ON 1 | ||
167 | #define DE_CONTROL_COMMAND 20 : 16 | ||
168 | #define DE_CONTROL_COMMAND_BITBLT 0 | ||
169 | #define DE_CONTROL_COMMAND_RECTANGLE_FILL 1 | ||
170 | #define DE_CONTROL_COMMAND_DE_TILE 2 | ||
171 | #define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3 | ||
172 | #define DE_CONTROL_COMMAND_ALPHA_BLEND 4 | ||
173 | #define DE_CONTROL_COMMAND_RLE_STRIP 5 | ||
174 | #define DE_CONTROL_COMMAND_SHORT_STROKE 6 | ||
175 | #define DE_CONTROL_COMMAND_LINE_DRAW 7 | ||
176 | #define DE_CONTROL_COMMAND_HOST_WRITE 8 | ||
177 | #define DE_CONTROL_COMMAND_HOST_READ 9 | ||
178 | #define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10 | ||
179 | #define DE_CONTROL_COMMAND_ROTATE 11 | ||
180 | #define DE_CONTROL_COMMAND_FONT 12 | ||
181 | #define DE_CONTROL_COMMAND_TEXTURE_LOAD 15 | ||
182 | #define DE_CONTROL_ROP_SELECT 15 : 15 | ||
183 | #define DE_CONTROL_ROP_SELECT_ROP3 0 | ||
184 | #define DE_CONTROL_ROP_SELECT_ROP2 1 | ||
185 | #define DE_CONTROL_ROP2_SOURCE 14 : 14 | ||
186 | #define DE_CONTROL_ROP2_SOURCE_BITMAP 0 | ||
187 | #define DE_CONTROL_ROP2_SOURCE_PATTERN 1 | ||
188 | #define DE_CONTROL_MONO_DATA 13 : 12 | ||
189 | #define DE_CONTROL_MONO_DATA_NOT_PACKED 0 | ||
190 | #define DE_CONTROL_MONO_DATA_8_PACKED 1 | ||
191 | #define DE_CONTROL_MONO_DATA_16_PACKED 2 | ||
192 | #define DE_CONTROL_MONO_DATA_32_PACKED 3 | ||
193 | #define DE_CONTROL_REPEAT_ROTATE 11 : 11 | ||
194 | #define DE_CONTROL_REPEAT_ROTATE_DISABLE 0 | ||
195 | #define DE_CONTROL_REPEAT_ROTATE_ENABLE 1 | ||
196 | #define DE_CONTROL_TRANSPARENCY_MATCH 10 : 10 | ||
197 | #define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0 | ||
198 | #define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1 | ||
199 | #define DE_CONTROL_TRANSPARENCY_SELECT 9 : 9 | ||
200 | #define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0 | ||
201 | #define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1 | ||
202 | #define DE_CONTROL_TRANSPARENCY 8 : 8 | ||
203 | #define DE_CONTROL_TRANSPARENCY_DISABLE 0 | ||
204 | #define DE_CONTROL_TRANSPARENCY_ENABLE 1 | ||
205 | #define DE_CONTROL_ROP 7 : 0 | ||
206 | |||
207 | /* Pseudo fields. */ | ||
208 | |||
209 | #define DE_CONTROL_SHORT_STROKE_DIR 27 : 24 | ||
210 | #define DE_CONTROL_SHORT_STROKE_DIR_225 0 | ||
211 | #define DE_CONTROL_SHORT_STROKE_DIR_135 1 | ||
212 | #define DE_CONTROL_SHORT_STROKE_DIR_315 2 | ||
213 | #define DE_CONTROL_SHORT_STROKE_DIR_45 3 | ||
214 | #define DE_CONTROL_SHORT_STROKE_DIR_270 4 | ||
215 | #define DE_CONTROL_SHORT_STROKE_DIR_90 5 | ||
216 | #define DE_CONTROL_SHORT_STROKE_DIR_180 8 | ||
217 | #define DE_CONTROL_SHORT_STROKE_DIR_0 10 | ||
218 | #define DE_CONTROL_ROTATION 25 : 24 | ||
219 | #define DE_CONTROL_ROTATION_0 0 | ||
220 | #define DE_CONTROL_ROTATION_270 1 | ||
221 | #define DE_CONTROL_ROTATION_90 2 | ||
222 | #define DE_CONTROL_ROTATION_180 3 | ||
223 | |||
224 | #define DE_PITCH 0x000010 | ||
225 | #define DE_PITCH_DESTINATION 28 : 16 | ||
226 | #define DE_PITCH_SOURCE 12 : 0 | ||
227 | |||
228 | #define DE_FOREGROUND 0x000014 | ||
229 | #define DE_FOREGROUND_COLOR 31 : 0 | ||
230 | |||
231 | #define DE_BACKGROUND 0x000018 | ||
232 | #define DE_BACKGROUND_COLOR 31 : 0 | ||
233 | |||
234 | #define DE_STRETCH_FORMAT 0x00001C | ||
235 | #define DE_STRETCH_FORMAT_PATTERN_XY 30 : 30 | ||
236 | #define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0 | ||
237 | #define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1 | ||
238 | #define DE_STRETCH_FORMAT_PATTERN_Y 29 : 27 | ||
239 | #define DE_STRETCH_FORMAT_PATTERN_X 25 : 23 | ||
240 | #define DE_STRETCH_FORMAT_PIXEL_FORMAT 21 : 20 | ||
241 | #define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0 | ||
242 | #define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1 | ||
243 | #define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3 | ||
244 | #define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2 | ||
245 | #define DE_STRETCH_FORMAT_ADDRESSING 19 : 16 | ||
246 | #define DE_STRETCH_FORMAT_ADDRESSING_XY 0 | ||
247 | #define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15 | ||
248 | #define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11 : 0 | ||
249 | |||
250 | #define DE_COLOR_COMPARE 0x000020 | ||
251 | #define DE_COLOR_COMPARE_COLOR 23 : 0 | ||
252 | |||
253 | #define DE_COLOR_COMPARE_MASK 0x000024 | ||
254 | #define DE_COLOR_COMPARE_MASK_MASKS 23 : 0 | ||
255 | |||
256 | #define DE_MASKS 0x000028 | ||
257 | #define DE_MASKS_BYTE_MASK 31 : 16 | ||
258 | #define DE_MASKS_BIT_MASK 15 : 0 | ||
259 | |||
260 | #define DE_CLIP_TL 0x00002C | ||
261 | #define DE_CLIP_TL_TOP 31 : 16 | ||
262 | #define DE_CLIP_TL_STATUS 13 : 13 | ||
263 | #define DE_CLIP_TL_STATUS_DISABLE 0 | ||
264 | #define DE_CLIP_TL_STATUS_ENABLE 1 | ||
265 | #define DE_CLIP_TL_INHIBIT 12 : 12 | ||
266 | #define DE_CLIP_TL_INHIBIT_OUTSIDE 0 | ||
267 | #define DE_CLIP_TL_INHIBIT_INSIDE 1 | ||
268 | #define DE_CLIP_TL_LEFT 11 : 0 | ||
269 | |||
270 | #define DE_CLIP_BR 0x000030 | ||
271 | #define DE_CLIP_BR_BOTTOM 31 : 16 | ||
272 | #define DE_CLIP_BR_RIGHT 12 : 0 | ||
273 | |||
274 | #define DE_MONO_PATTERN_LOW 0x000034 | ||
275 | #define DE_MONO_PATTERN_LOW_PATTERN 31 : 0 | ||
276 | |||
277 | #define DE_MONO_PATTERN_HIGH 0x000038 | ||
278 | #define DE_MONO_PATTERN_HIGH_PATTERN 31 : 0 | ||
279 | |||
280 | #define DE_WINDOW_WIDTH 0x00003C | ||
281 | #define DE_WINDOW_WIDTH_DESTINATION 28 : 16 | ||
282 | #define DE_WINDOW_WIDTH_SOURCE 12 : 0 | ||
283 | |||
284 | #define DE_WINDOW_SOURCE_BASE 0x000040 | ||
285 | #define DE_WINDOW_SOURCE_BASE_EXT 27 : 27 | ||
286 | #define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0 | ||
287 | #define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1 | ||
288 | #define DE_WINDOW_SOURCE_BASE_CS 26 : 26 | ||
289 | #define DE_WINDOW_SOURCE_BASE_CS_0 0 | ||
290 | #define DE_WINDOW_SOURCE_BASE_CS_1 1 | ||
291 | #define DE_WINDOW_SOURCE_BASE_ADDRESS 25 : 0 | ||
292 | |||
293 | #define DE_WINDOW_DESTINATION_BASE 0x000044 | ||
294 | #define DE_WINDOW_DESTINATION_BASE_EXT 27 : 27 | ||
295 | #define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0 | ||
296 | #define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1 | ||
297 | #define DE_WINDOW_DESTINATION_BASE_CS 26 : 26 | ||
298 | #define DE_WINDOW_DESTINATION_BASE_CS_0 0 | ||
299 | #define DE_WINDOW_DESTINATION_BASE_CS_1 1 | ||
300 | #define DE_WINDOW_DESTINATION_BASE_ADDRESS 25 : 0 | ||
301 | |||
302 | #define DE_ALPHA 0x000048 | ||
303 | #define DE_ALPHA_VALUE 7 : 0 | ||
304 | |||
305 | #define DE_WRAP 0x00004C | ||
306 | #define DE_WRAP_X 31 : 16 | ||
307 | #define DE_WRAP_Y 15 : 0 | ||
308 | |||
309 | #define DE_STATUS 0x000050 | ||
310 | #define DE_STATUS_CSC 1 : 1 | ||
311 | #define DE_STATUS_CSC_CLEAR 0 | ||
312 | #define DE_STATUS_CSC_NOT_ACTIVE 0 | ||
313 | #define DE_STATUS_CSC_ACTIVE 1 | ||
314 | #define DE_STATUS_2D 0 : 0 | ||
315 | #define DE_STATUS_2D_CLEAR 0 | ||
316 | #define DE_STATUS_2D_NOT_ACTIVE 0 | ||
317 | #define DE_STATUS_2D_ACTIVE 1 | ||
318 | |||
319 | /* Color Space Conversion registers. */ | ||
320 | |||
321 | #define CSC_Y_SOURCE_BASE 0x0000C8 | ||
322 | #define CSC_Y_SOURCE_BASE_EXT 27 : 27 | ||
323 | #define CSC_Y_SOURCE_BASE_EXT_LOCAL 0 | ||
324 | #define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1 | ||
325 | #define CSC_Y_SOURCE_BASE_CS 26 : 26 | ||
326 | #define CSC_Y_SOURCE_BASE_CS_0 0 | ||
327 | #define CSC_Y_SOURCE_BASE_CS_1 1 | ||
328 | #define CSC_Y_SOURCE_BASE_ADDRESS 25 : 0 | ||
329 | |||
330 | #define CSC_CONSTANTS 0x0000CC | ||
331 | #define CSC_CONSTANTS_Y 31 : 24 | ||
332 | #define CSC_CONSTANTS_R 23 : 16 | ||
333 | #define CSC_CONSTANTS_G 15 : 8 | ||
334 | #define CSC_CONSTANTS_B 7 : 0 | ||
335 | |||
336 | #define CSC_Y_SOURCE_X 0x0000D0 | ||
337 | #define CSC_Y_SOURCE_X_INTEGER 26 : 16 | ||
338 | #define CSC_Y_SOURCE_X_FRACTION 15 : 3 | ||
339 | |||
340 | #define CSC_Y_SOURCE_Y 0x0000D4 | ||
341 | #define CSC_Y_SOURCE_Y_INTEGER 27 : 16 | ||
342 | #define CSC_Y_SOURCE_Y_FRACTION 15 : 3 | ||
343 | |||
344 | #define CSC_U_SOURCE_BASE 0x0000D8 | ||
345 | #define CSC_U_SOURCE_BASE_EXT 27 : 27 | ||
346 | #define CSC_U_SOURCE_BASE_EXT_LOCAL 0 | ||
347 | #define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1 | ||
348 | #define CSC_U_SOURCE_BASE_CS 26 : 26 | ||
349 | #define CSC_U_SOURCE_BASE_CS_0 0 | ||
350 | #define CSC_U_SOURCE_BASE_CS_1 1 | ||
351 | #define CSC_U_SOURCE_BASE_ADDRESS 25 : 0 | ||
352 | |||
353 | #define CSC_V_SOURCE_BASE 0x0000DC | ||
354 | #define CSC_V_SOURCE_BASE_EXT 27 : 27 | ||
355 | #define CSC_V_SOURCE_BASE_EXT_LOCAL 0 | ||
356 | #define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1 | ||
357 | #define CSC_V_SOURCE_BASE_CS 26 : 26 | ||
358 | #define CSC_V_SOURCE_BASE_CS_0 0 | ||
359 | #define CSC_V_SOURCE_BASE_CS_1 1 | ||
360 | #define CSC_V_SOURCE_BASE_ADDRESS 25 : 0 | ||
361 | |||
362 | #define CSC_SOURCE_DIMENSION 0x0000E0 | ||
363 | #define CSC_SOURCE_DIMENSION_X 31 : 16 | ||
364 | #define CSC_SOURCE_DIMENSION_Y 15 : 0 | ||
365 | |||
366 | #define CSC_SOURCE_PITCH 0x0000E4 | ||
367 | #define CSC_SOURCE_PITCH_Y 31 : 16 | ||
368 | #define CSC_SOURCE_PITCH_UV 15 : 0 | ||
369 | |||
370 | #define CSC_DESTINATION 0x0000E8 | ||
371 | #define CSC_DESTINATION_WRAP 31 : 31 | ||
372 | #define CSC_DESTINATION_WRAP_DISABLE 0 | ||
373 | #define CSC_DESTINATION_WRAP_ENABLE 1 | ||
374 | #define CSC_DESTINATION_X 27 : 16 | ||
375 | #define CSC_DESTINATION_Y 11 : 0 | ||
376 | |||
377 | #define CSC_DESTINATION_DIMENSION 0x0000EC | ||
378 | #define CSC_DESTINATION_DIMENSION_X 31 : 16 | ||
379 | #define CSC_DESTINATION_DIMENSION_Y 15 : 0 | ||
380 | |||
381 | #define CSC_DESTINATION_PITCH 0x0000F0 | ||
382 | #define CSC_DESTINATION_PITCH_X 31 : 16 | ||
383 | #define CSC_DESTINATION_PITCH_Y 15 : 0 | ||
384 | |||
385 | #define CSC_SCALE_FACTOR 0x0000F4 | ||
386 | #define CSC_SCALE_FACTOR_HORIZONTAL 31 : 16 | ||
387 | #define CSC_SCALE_FACTOR_VERTICAL 15 : 0 | ||
388 | |||
389 | #define CSC_DESTINATION_BASE 0x0000F8 | ||
390 | #define CSC_DESTINATION_BASE_EXT 27 : 27 | ||
391 | #define CSC_DESTINATION_BASE_EXT_LOCAL 0 | ||
392 | #define CSC_DESTINATION_BASE_EXT_EXTERNAL 1 | ||
393 | #define CSC_DESTINATION_BASE_CS 26 : 26 | ||
394 | #define CSC_DESTINATION_BASE_CS_0 0 | ||
395 | #define CSC_DESTINATION_BASE_CS_1 1 | ||
396 | #define CSC_DESTINATION_BASE_ADDRESS 25 : 0 | ||
397 | |||
398 | #define CSC_CONTROL 0x0000FC | ||
399 | #define CSC_CONTROL_STATUS 31 : 31 | ||
400 | #define CSC_CONTROL_STATUS_STOP 0 | ||
401 | #define CSC_CONTROL_STATUS_START 1 | ||
402 | #define CSC_CONTROL_SOURCE_FORMAT 30 : 28 | ||
403 | #define CSC_CONTROL_SOURCE_FORMAT_YUV422 0 | ||
404 | #define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1 | ||
405 | #define CSC_CONTROL_SOURCE_FORMAT_YUV420 2 | ||
406 | #define CSC_CONTROL_SOURCE_FORMAT_YVU9 3 | ||
407 | #define CSC_CONTROL_SOURCE_FORMAT_IYU1 4 | ||
408 | #define CSC_CONTROL_SOURCE_FORMAT_IYU2 5 | ||
409 | #define CSC_CONTROL_SOURCE_FORMAT_RGB565 6 | ||
410 | #define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7 | ||
411 | #define CSC_CONTROL_DESTINATION_FORMAT 27 : 26 | ||
412 | #define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0 | ||
413 | #define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1 | ||
414 | #define CSC_CONTROL_HORIZONTAL_FILTER 25 : 25 | ||
415 | #define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0 | ||
416 | #define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1 | ||
417 | #define CSC_CONTROL_VERTICAL_FILTER 24 : 24 | ||
418 | #define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0 | ||
419 | #define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1 | ||
420 | #define CSC_CONTROL_BYTE_ORDER 23 : 23 | ||
421 | #define CSC_CONTROL_BYTE_ORDER_YUYV 0 | ||
422 | #define CSC_CONTROL_BYTE_ORDER_UYVY 1 | ||
423 | |||
424 | #define DE_DATA_PORT_501 0x110000 | ||
425 | #define DE_DATA_PORT_712 0x400000 | ||
426 | #define DE_DATA_PORT_722 0x6000 | ||
427 | |||
428 | /* point to virtual Memory Map IO starting address */ | ||
429 | extern char *smtc_RegBaseAddress; | ||
430 | /* point to virtual video memory starting address */ | ||
431 | extern char *smtc_VRAMBaseAddress; | ||
432 | extern unsigned char smtc_de_busy; | ||
433 | |||
434 | extern unsigned long memRead32(unsigned long nOffset); | ||
435 | extern void memWrite32(unsigned long nOffset, unsigned long nData); | ||
436 | extern unsigned long SMTC_read2Dreg(unsigned long nOffset); | ||
437 | |||
438 | /* 2D functions */ | ||
439 | extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight, | ||
440 | unsigned int bpp); | ||
441 | |||
442 | extern void deWaitForNotBusy(void); | ||
443 | |||
444 | extern void deVerticalLine(unsigned long dst_base, | ||
445 | unsigned long dst_pitch, | ||
446 | unsigned long nX, | ||
447 | unsigned long nY, | ||
448 | unsigned long dst_height, | ||
449 | unsigned long nColor); | ||
450 | |||
451 | extern void deHorizontalLine(unsigned long dst_base, | ||
452 | unsigned long dst_pitch, | ||
453 | unsigned long nX, | ||
454 | unsigned long nY, | ||
455 | unsigned long dst_width, | ||
456 | unsigned long nColor); | ||
457 | |||
458 | extern void deLine(unsigned long dst_base, | ||
459 | unsigned long dst_pitch, | ||
460 | unsigned long nX1, | ||
461 | unsigned long nY1, | ||
462 | unsigned long nX2, | ||
463 | unsigned long nY2, | ||
464 | unsigned long nColor); | ||
465 | |||
466 | extern void deFillRect(unsigned long dst_base, | ||
467 | unsigned long dst_pitch, | ||
468 | unsigned long dst_X, | ||
469 | unsigned long dst_Y, | ||
470 | unsigned long dst_width, | ||
471 | unsigned long dst_height, | ||
472 | unsigned long nColor); | ||
473 | |||
474 | extern void deRotatePattern(unsigned char *pattern_dstaddr, | ||
475 | unsigned long pattern_src_addr, | ||
476 | unsigned long pattern_BPP, | ||
477 | unsigned long pattern_stride, | ||
478 | int patternX, | ||
479 | int patternY); | ||
480 | |||
481 | extern void deCopy(unsigned long dst_base, | ||
482 | unsigned long dst_pitch, | ||
483 | unsigned long dst_BPP, | ||
484 | unsigned long dst_X, | ||
485 | unsigned long dst_Y, | ||
486 | unsigned long dst_width, | ||
487 | unsigned long dst_height, | ||
488 | unsigned long src_base, | ||
489 | unsigned long src_pitch, | ||
490 | unsigned long src_X, | ||
491 | unsigned long src_Y, | ||
492 | pTransparent pTransp, | ||
493 | unsigned char nROP2); | ||
494 | |||
495 | /* | ||
496 | * System memory to Video memory monochrome expansion. | ||
497 | * | ||
498 | * Source is monochrome image in system memory. This function expands the | ||
499 | * monochrome data to color image in video memory. | ||
500 | * | ||
501 | * @pSrcbuf: pointer to start of source buffer in system memory | ||
502 | * @srcDelta: Pitch value (in bytes) of the source buffer, +ive means top | ||
503 | * down and -ive mean button up | ||
504 | * @startBit: Mono data can start at any bit in a byte, this value should | ||
505 | * be 0 to 7 | ||
506 | * @dBase: Address of destination : offset in frame buffer | ||
507 | * @dPitch: Pitch value of destination surface in BYTE | ||
508 | * @bpp: Color depth of destination surface | ||
509 | * @dx, dy: Starting coordinate of destination surface | ||
510 | * @width, height: width and height of rectange in pixel value | ||
511 | * @fColor,bColor: Foreground, Background color (corresponding to a 1, 0 in | ||
512 | * the monochrome data) | ||
513 | * @rop2: ROP value | ||
514 | */ | ||
515 | |||
516 | extern long deSystemMem2VideoMemMonoBlt( | ||
517 | const char *pSrcbuf, | ||
518 | long srcDelta, | ||
519 | unsigned long startBit, | ||
520 | unsigned long dBase, | ||
521 | unsigned long dPitch, | ||
522 | unsigned long bpp, | ||
523 | unsigned long dx, unsigned long dy, | ||
524 | unsigned long width, unsigned long height, | ||
525 | unsigned long fColor, | ||
526 | unsigned long bColor, | ||
527 | unsigned long rop2); | ||
528 | |||
529 | extern unsigned long deGetTransparency(void); | ||
530 | extern void deSetPixelFormat(unsigned long bpp); | ||
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c index a4f6f49aef48..9c82a1a81ccc 100644 --- a/drivers/staging/sm7xx/smtcfb.c +++ b/drivers/staging/sm7xx/smtcfb.c | |||
@@ -45,7 +45,6 @@ | |||
45 | struct screen_info smtc_screen_info; | 45 | struct screen_info smtc_screen_info; |
46 | 46 | ||
47 | #include "smtcfb.h" | 47 | #include "smtcfb.h" |
48 | #include "smtc2d.h" | ||
49 | 48 | ||
50 | #ifdef DEBUG | 49 | #ifdef DEBUG |
51 | #define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg) | 50 | #define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg) |
@@ -120,10 +119,6 @@ static struct vesa_mode_table vesa_mode[] = { | |||
120 | char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */ | 119 | char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */ |
121 | char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */ | 120 | char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */ |
122 | 121 | ||
123 | char *smtc_2DBaseAddress; /* 2D engine starting address */ | ||
124 | char *smtc_2Ddataport; /* 2D data port offset */ | ||
125 | short smtc_2Dacceleration; | ||
126 | |||
127 | static u32 colreg[17]; | 122 | static u32 colreg[17]; |
128 | static struct par_info hw; /* hardware information */ | 123 | static struct par_info hw; /* hardware information */ |
129 | 124 | ||
@@ -135,16 +130,6 @@ u16 smtc_ChipIDs[] = { | |||
135 | 130 | ||
136 | #define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16)) | 131 | #define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16)) |
137 | 132 | ||
138 | void deWaitForNotBusy(void) | ||
139 | { | ||
140 | unsigned long i = 0x1000000; | ||
141 | while (i--) { | ||
142 | if ((smtc_seqr(0x16) & 0x18) == 0x10) | ||
143 | break; | ||
144 | } | ||
145 | smtc_de_busy = 0; | ||
146 | } | ||
147 | |||
148 | static void sm712_set_timing(struct smtcfb_info *sfb, | 133 | static void sm712_set_timing(struct smtcfb_info *sfb, |
149 | struct par_info *ppar_info) | 134 | struct par_info *ppar_info) |
150 | { | 135 | { |
@@ -324,7 +309,7 @@ static inline unsigned int chan_to_field(unsigned int chan, | |||
324 | return chan << bf->offset; | 309 | return chan << bf->offset; |
325 | } | 310 | } |
326 | 311 | ||
327 | static int smtcfb_blank(int blank_mode, struct fb_info *info) | 312 | static int cfb_blank(int blank_mode, struct fb_info *info) |
328 | { | 313 | { |
329 | /* clear DPMS setting */ | 314 | /* clear DPMS setting */ |
330 | switch (blank_mode) { | 315 | switch (blank_mode) { |
@@ -622,93 +607,13 @@ smtcfb_write(struct fb_info *info, const char __user *buf, size_t count, | |||
622 | } | 607 | } |
623 | #endif /* ! __BIG_ENDIAN */ | 608 | #endif /* ! __BIG_ENDIAN */ |
624 | 609 | ||
625 | #include "smtc2d.c" | ||
626 | |||
627 | void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | ||
628 | { | ||
629 | struct par_info *p = (struct par_info *)info->par; | ||
630 | |||
631 | if (smtc_2Dacceleration) { | ||
632 | if (!area->width || !area->height) | ||
633 | return; | ||
634 | |||
635 | deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel, | ||
636 | area->dx, area->dy, area->width, area->height, | ||
637 | p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC); | ||
638 | |||
639 | } else | ||
640 | cfb_copyarea(info, area); | ||
641 | } | ||
642 | |||
643 | void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | ||
644 | { | ||
645 | struct par_info *p = (struct par_info *)info->par; | ||
646 | |||
647 | if (smtc_2Dacceleration) { | ||
648 | if (!rect->width || !rect->height) | ||
649 | return; | ||
650 | if (info->var.bits_per_pixel >= 24) | ||
651 | deFillRect(p->BaseAddressInVRAM, 0, rect->dx * 3, | ||
652 | rect->dy * 3, rect->width * 3, rect->height, | ||
653 | rect->color); | ||
654 | else | ||
655 | deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy, | ||
656 | rect->width, rect->height, rect->color); | ||
657 | } else | ||
658 | cfb_fillrect(info, rect); | ||
659 | } | ||
660 | |||
661 | void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image) | ||
662 | { | ||
663 | struct par_info *p = (struct par_info *)info->par; | ||
664 | u32 bg_col = 0, fg_col = 0; | ||
665 | |||
666 | if ((smtc_2Dacceleration) && (image->depth == 1)) { | ||
667 | if (smtc_de_busy) | ||
668 | deWaitForNotBusy(); | ||
669 | |||
670 | switch (info->var.bits_per_pixel) { | ||
671 | case 8: | ||
672 | bg_col = image->bg_color; | ||
673 | fg_col = image->fg_color; | ||
674 | break; | ||
675 | case 16: | ||
676 | bg_col = | ||
677 | ((u32 *) (info->pseudo_palette))[image->bg_color]; | ||
678 | fg_col = | ||
679 | ((u32 *) (info->pseudo_palette))[image->fg_color]; | ||
680 | break; | ||
681 | case 32: | ||
682 | bg_col = | ||
683 | ((u32 *) (info->pseudo_palette))[image->bg_color]; | ||
684 | fg_col = | ||
685 | ((u32 *) (info->pseudo_palette))[image->fg_color]; | ||
686 | break; | ||
687 | } | ||
688 | |||
689 | deSystemMem2VideoMemMonoBlt( | ||
690 | image->data, | ||
691 | image->width / 8, | ||
692 | 0, | ||
693 | p->BaseAddressInVRAM, | ||
694 | 0, | ||
695 | 0, | ||
696 | image->dx, image->dy, | ||
697 | image->width, image->height, | ||
698 | fg_col, bg_col, | ||
699 | 0x0C); | ||
700 | |||
701 | } else | ||
702 | cfb_imageblit(info, image); | ||
703 | } | ||
704 | |||
705 | static struct fb_ops smtcfb_ops = { | 610 | static struct fb_ops smtcfb_ops = { |
706 | .owner = THIS_MODULE, | 611 | .owner = THIS_MODULE, |
707 | .fb_setcolreg = smtc_setcolreg, | 612 | .fb_setcolreg = smtc_setcolreg, |
708 | .fb_blank = smtcfb_blank, | 613 | .fb_blank = cfb_blank, |
709 | .fb_fillrect = smtcfb_fillrect, | 614 | .fb_fillrect = cfb_fillrect, |
710 | .fb_imageblit = smtcfb_imageblit, | 615 | .fb_imageblit = cfb_imageblit, |
711 | .fb_copyarea = smtcfb_copyarea, | 616 | .fb_copyarea = cfb_copyarea, |
712 | #ifdef __BIG_ENDIAN | 617 | #ifdef __BIG_ENDIAN |
713 | .fb_read = smtcfb_read, | 618 | .fb_read = smtcfb_read, |
714 | .fb_write = smtcfb_write, | 619 | .fb_write = smtcfb_write, |
@@ -772,12 +677,6 @@ void smtcfb_setmode(struct smtcfb_info *sfb) | |||
772 | hw.height = sfb->fb.var.yres; | 677 | hw.height = sfb->fb.var.yres; |
773 | hw.hz = 60; | 678 | hw.hz = 60; |
774 | smtc_set_timing(sfb, &hw); | 679 | smtc_set_timing(sfb, &hw); |
775 | if (smtc_2Dacceleration) { | ||
776 | printk("2D acceleration enabled!\n"); | ||
777 | /* Init smtc drawing engine */ | ||
778 | deInit(sfb->fb.var.xres, sfb->fb.var.yres, | ||
779 | sfb->fb.var.bits_per_pixel); | ||
780 | } | ||
781 | } | 680 | } |
782 | 681 | ||
783 | /* | 682 | /* |
@@ -1004,9 +903,7 @@ static int __init smtcfb_pci_probe(struct pci_dev *pdev, | |||
1004 | #endif | 903 | #endif |
1005 | hw.m_pMMIO = (smtc_RegBaseAddress = | 904 | hw.m_pMMIO = (smtc_RegBaseAddress = |
1006 | smtc_VRAMBaseAddress + 0x00700000); | 905 | smtc_VRAMBaseAddress + 0x00700000); |
1007 | smtc_2DBaseAddress = (hw.m_pDPR = | 906 | hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000; |
1008 | smtc_VRAMBaseAddress + 0x00408000); | ||
1009 | smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712; | ||
1010 | hw.m_pVPR = hw.m_pLFB + 0x0040c000; | 907 | hw.m_pVPR = hw.m_pLFB + 0x0040c000; |
1011 | #ifdef __BIG_ENDIAN | 908 | #ifdef __BIG_ENDIAN |
1012 | if (sfb->fb.var.bits_per_pixel == 32) { | 909 | if (sfb->fb.var.bits_per_pixel == 32) { |
@@ -1035,27 +932,21 @@ static int __init smtcfb_pci_probe(struct pci_dev *pdev, | |||
1035 | if (sfb->fb.var.bits_per_pixel == 32) | 932 | if (sfb->fb.var.bits_per_pixel == 32) |
1036 | smtc_seqw(0x17, 0x30); | 933 | smtc_seqw(0x17, 0x30); |
1037 | #endif | 934 | #endif |
1038 | #ifdef CONFIG_FB_SM7XX_ACCEL | ||
1039 | smtc_2Dacceleration = 1; | ||
1040 | #endif | ||
1041 | break; | 935 | break; |
1042 | case 0x720: | 936 | case 0x720: |
1043 | sfb->fb.fix.mmio_start = pFramebufferPhysical; | 937 | sfb->fb.fix.mmio_start = pFramebufferPhysical; |
1044 | sfb->fb.fix.mmio_len = 0x00200000; | 938 | sfb->fb.fix.mmio_len = 0x00200000; |
1045 | smem_size = SM722_VIDEOMEMORYSIZE; | 939 | smem_size = SM722_VIDEOMEMORYSIZE; |
1046 | smtc_2DBaseAddress = (hw.m_pDPR = | 940 | hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000); |
1047 | ioremap(pFramebufferPhysical, 0x00a00000)); | ||
1048 | hw.m_pLFB = (smtc_VRAMBaseAddress = | 941 | hw.m_pLFB = (smtc_VRAMBaseAddress = |
1049 | smtc_2DBaseAddress + 0x00200000); | 942 | hw.m_pDPR + 0x00200000); |
1050 | hw.m_pMMIO = (smtc_RegBaseAddress = | 943 | hw.m_pMMIO = (smtc_RegBaseAddress = |
1051 | smtc_2DBaseAddress + 0x000c0000); | 944 | hw.m_pDPR + 0x000c0000); |
1052 | smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722; | 945 | hw.m_pVPR = hw.m_pDPR + 0x800; |
1053 | hw.m_pVPR = smtc_2DBaseAddress + 0x800; | ||
1054 | 946 | ||
1055 | smtc_seqw(0x62, 0xff); | 947 | smtc_seqw(0x62, 0xff); |
1056 | smtc_seqw(0x6a, 0x0d); | 948 | smtc_seqw(0x6a, 0x0d); |
1057 | smtc_seqw(0x6b, 0x02); | 949 | smtc_seqw(0x6b, 0x02); |
1058 | smtc_2Dacceleration = 0; | ||
1059 | break; | 950 | break; |
1060 | default: | 951 | default: |
1061 | printk(KERN_INFO | 952 | printk(KERN_INFO |
@@ -1103,7 +994,7 @@ static int __init smtcfb_pci_probe(struct pci_dev *pdev, | |||
1103 | 994 | ||
1104 | 995 | ||
1105 | /* Jason (08/11/2009) PCI_DRV wrapper essential structs */ | 996 | /* Jason (08/11/2009) PCI_DRV wrapper essential structs */ |
1106 | static struct pci_device_id smtcfb_pci_table[] = { | 997 | static const struct pci_device_id smtcfb_pci_table[] = { |
1107 | {0x126f, 0x710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 998 | {0x126f, 0x710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1108 | {0x126f, 0x712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 999 | {0x126f, 0x712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1109 | {0x126f, 0x720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 1000 | {0x126f, 0x720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
diff --git a/drivers/staging/udlfb/Kconfig b/drivers/staging/udlfb/Kconfig index 641692da0e4f..65bd5db4ca56 100644 --- a/drivers/staging/udlfb/Kconfig +++ b/drivers/staging/udlfb/Kconfig | |||
@@ -1,8 +1,14 @@ | |||
1 | config FB_UDL | 1 | config FB_UDL |
2 | tristate "Displaylink USB Framebuffer support" | 2 | tristate "Displaylink USB Framebuffer support" |
3 | depends on FB && USB | 3 | depends on FB && USB |
4 | select FB_MODE_HELPERS | ||
5 | select FB_SYS_FILLRECT | ||
6 | select FB_SYS_COPYAREA | ||
7 | select FB_SYS_IMAGEBLIT | ||
8 | select FB_SYS_FOPS | ||
9 | select FB_DEFERRED_IO | ||
4 | ---help--- | 10 | ---help--- |
5 | This is an experimental driver for DisplayLink USB devices | 11 | This is a kernel framebuffer driver for DisplayLink USB devices. |
6 | that provides a framebuffer device. A normal framebuffer can | 12 | Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and |
7 | be used with this driver, or xorg can be run on the device | 13 | mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices. |
8 | using it. | 14 | To compile as a module, choose M here: the module name is udlfb. |
diff --git a/drivers/staging/udlfb/udlfb.c b/drivers/staging/udlfb/udlfb.c index f5416af1e902..8f6223c8303a 100644 --- a/drivers/staging/udlfb/udlfb.c +++ b/drivers/staging/udlfb/udlfb.c | |||
@@ -1,17 +1,20 @@ | |||
1 | /***************************************************************************** | 1 | /* |
2 | * DLFB Kernel Driver * | 2 | * udlfb.c -- Framebuffer driver for DisplayLink USB controller |
3 | * Version 0.2 (udlfb) * | 3 | * |
4 | * (C) 2009 Roberto De Ioris <roberto@unbit.it> * | 4 | * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it> |
5 | * * | 5 | * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com> |
6 | * This file is licensed under the GPLv2. See COPYING in the package. * | 6 | * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com> |
7 | * Based on the amazing work of Florian Echtler and libdlo 0.1 * | 7 | * |
8 | * * | 8 | * This file is subject to the terms and conditions of the GNU General Public |
9 | * * | 9 | * License v2. See the file COPYING in the main directory of this archive for |
10 | * 10.06.09 release 0.2.3 (edid ioctl, fallback for unsupported modes) * | 10 | * more details. |
11 | * 05.06.09 release 0.2.2 (real screen blanking, rle compression, double buffer) * | 11 | * |
12 | * 31.05.09 release 0.2 * | 12 | * Layout is based on skeletonfb by James Simmons and Geert Uytterhoeven, |
13 | * 22.05.09 First public (ugly) release * | 13 | * usb-skeleton by GregKH. |
14 | *****************************************************************************/ | 14 | * |
15 | * Device-specific portions based on information from Displaylink, with work | ||
16 | * from Florian Echtler, Henrik Bjerregaard Pedersen, and others. | ||
17 | */ | ||
15 | 18 | ||
16 | #include <linux/module.h> | 19 | #include <linux/module.h> |
17 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
@@ -20,606 +23,672 @@ | |||
20 | #include <linux/uaccess.h> | 23 | #include <linux/uaccess.h> |
21 | #include <linux/mm.h> | 24 | #include <linux/mm.h> |
22 | #include <linux/fb.h> | 25 | #include <linux/fb.h> |
23 | #include <linux/mutex.h> | ||
24 | #include <linux/vmalloc.h> | 26 | #include <linux/vmalloc.h> |
25 | 27 | ||
26 | #include "udlfb.h" | 28 | #include "udlfb.h" |
27 | 29 | ||
28 | #define DRIVER_VERSION "DLFB 0.2" | 30 | static struct fb_fix_screeninfo dlfb_fix = { |
31 | .id = "udlfb", | ||
32 | .type = FB_TYPE_PACKED_PIXELS, | ||
33 | .visual = FB_VISUAL_TRUECOLOR, | ||
34 | .xpanstep = 0, | ||
35 | .ypanstep = 0, | ||
36 | .ywrapstep = 0, | ||
37 | .accel = FB_ACCEL_NONE, | ||
38 | }; | ||
29 | 39 | ||
30 | /* memory functions taken from vfb */ | 40 | static const u32 udlfb_info_flags = FBINFO_DEFAULT | FBINFO_READS_FAST | |
41 | #ifdef FBINFO_VIRTFB | ||
42 | FBINFO_VIRTFB | | ||
43 | #endif | ||
44 | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT | | ||
45 | FBINFO_HWACCEL_COPYAREA | FBINFO_MISC_ALWAYS_SETPAR; | ||
31 | 46 | ||
32 | static void *rvmalloc(unsigned long size) | 47 | /* |
33 | { | 48 | * There are many DisplayLink-based products, all with unique PIDs. We are able |
34 | void *mem; | 49 | * to support all volume ones (circa 2009) with a single driver, so we match |
35 | unsigned long adr; | 50 | * globally on VID. TODO: Probe() needs to detect when we might be running |
51 | * "future" chips, and bail on those, so a compatible driver can match. | ||
52 | */ | ||
53 | static struct usb_device_id id_table[] = { | ||
54 | {.idVendor = 0x17e9, .match_flags = USB_DEVICE_ID_MATCH_VENDOR,}, | ||
55 | {}, | ||
56 | }; | ||
57 | MODULE_DEVICE_TABLE(usb, id_table); | ||
36 | 58 | ||
37 | size = PAGE_ALIGN(size); | 59 | #ifndef CONFIG_FB_DEFERRED_IO |
38 | mem = vmalloc_32(size); | 60 | #warning message "kernel FB_DEFFERRED_IO option to support generic fbdev apps" |
39 | if (!mem) | 61 | #endif |
40 | return NULL; | ||
41 | 62 | ||
42 | memset(mem, 0, size); /* Clear the ram out, no junk to the user */ | 63 | #ifndef CONFIG_FB_SYS_IMAGEBLIT |
43 | adr = (unsigned long)mem; | 64 | #ifndef CONFIG_FB_SYS_IMAGEBLIT_MODULE |
44 | while (size > 0) { | 65 | #warning message "FB_SYS_* in kernel or module option to support fb console" |
45 | SetPageReserved(vmalloc_to_page((void *)adr)); | 66 | #endif |
46 | adr += PAGE_SIZE; | 67 | #endif |
47 | size -= PAGE_SIZE; | ||
48 | } | ||
49 | 68 | ||
50 | return mem; | 69 | #ifndef CONFIG_FB_MODE_HELPERS |
51 | } | 70 | #warning message "kernel FB_MODE_HELPERS required. Expect build break" |
71 | #endif | ||
52 | 72 | ||
53 | static void rvfree(void *mem, unsigned long size) | 73 | /* dlfb keeps a list of urbs for efficient bulk transfers */ |
54 | { | 74 | static void dlfb_urb_completion(struct urb *urb); |
55 | unsigned long adr; | 75 | static struct urb *dlfb_get_urb(struct dlfb_data *dev); |
76 | static int dlfb_submit_urb(struct dlfb_data *dev, struct urb * urb, size_t len); | ||
77 | static int dlfb_alloc_urb_list(struct dlfb_data *dev, int count, size_t size); | ||
78 | static void dlfb_free_urb_list(struct dlfb_data *dev); | ||
56 | 79 | ||
57 | if (!mem) | 80 | /* other symbols with dependents */ |
58 | return; | 81 | #ifdef CONFIG_FB_DEFERRED_IO |
82 | static struct fb_deferred_io dlfb_defio; | ||
83 | #endif | ||
59 | 84 | ||
60 | adr = (unsigned long)mem; | 85 | /* |
61 | while ((long)size > 0) { | 86 | * All DisplayLink bulk operations start with 0xAF, followed by specific code |
62 | ClearPageReserved(vmalloc_to_page((void *)adr)); | 87 | * All operations are written to buffers which then later get sent to device |
63 | adr += PAGE_SIZE; | 88 | */ |
64 | size -= PAGE_SIZE; | 89 | static char *dlfb_set_register(char *buf, u8 reg, u8 val) |
65 | } | 90 | { |
66 | vfree(mem); | 91 | *buf++ = 0xAF; |
92 | *buf++ = 0x20; | ||
93 | *buf++ = reg; | ||
94 | *buf++ = val; | ||
95 | return buf; | ||
67 | } | 96 | } |
68 | 97 | ||
69 | static int dlfb_mmap(struct fb_info *info, struct vm_area_struct *vma) | 98 | static char *dlfb_vidreg_lock(char *buf) |
70 | { | 99 | { |
71 | unsigned long start = vma->vm_start; | 100 | return dlfb_set_register(buf, 0xFF, 0x00); |
72 | unsigned long size = vma->vm_end - vma->vm_start; | ||
73 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | ||
74 | unsigned long page, pos; | ||
75 | |||
76 | printk("MMAP: %lu %u\n", offset + size, info->fix.smem_len); | ||
77 | |||
78 | if (offset + size > info->fix.smem_len) | ||
79 | return -EINVAL; | ||
80 | |||
81 | pos = (unsigned long)info->fix.smem_start + offset; | ||
82 | |||
83 | while (size > 0) { | ||
84 | page = vmalloc_to_pfn((void *)pos); | ||
85 | if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) | ||
86 | return -EAGAIN; | ||
87 | |||
88 | start += PAGE_SIZE; | ||
89 | pos += PAGE_SIZE; | ||
90 | if (size > PAGE_SIZE) | ||
91 | size -= PAGE_SIZE; | ||
92 | else | ||
93 | size = 0; | ||
94 | } | ||
95 | |||
96 | vma->vm_flags |= VM_RESERVED; /* avoid to swap out this VMA */ | ||
97 | return 0; | ||
98 | |||
99 | } | 101 | } |
100 | 102 | ||
101 | /* ioctl structure */ | 103 | static char *dlfb_vidreg_unlock(char *buf) |
102 | struct dloarea { | 104 | { |
103 | int x, y; | 105 | return dlfb_set_register(buf, 0xFF, 0xFF); |
104 | int w, h; | 106 | } |
105 | int x2, y2; | ||
106 | }; | ||
107 | 107 | ||
108 | /* | 108 | /* |
109 | static struct usb_device_id id_table [] = { | 109 | * On/Off for driving the DisplayLink framebuffer to the display |
110 | { USB_DEVICE(0x17e9, 0x023d) }, | 110 | */ |
111 | { } | 111 | static char *dlfb_enable_hvsync(char *buf, bool enable) |
112 | }; | 112 | { |
113 | */ | 113 | if (enable) |
114 | return dlfb_set_register(buf, 0x1F, 0x00); | ||
115 | else | ||
116 | return dlfb_set_register(buf, 0x1F, 0x01); | ||
117 | } | ||
114 | 118 | ||
115 | static struct usb_device_id id_table[] = { | 119 | static char *dlfb_set_color_depth(char *buf, u8 selection) |
116 | {.idVendor = 0x17e9, .match_flags = USB_DEVICE_ID_MATCH_VENDOR,}, | 120 | { |
117 | {}, | 121 | return dlfb_set_register(buf, 0x00, selection); |
118 | }; | 122 | } |
119 | MODULE_DEVICE_TABLE(usb, id_table); | ||
120 | 123 | ||
121 | static struct usb_driver dlfb_driver; | 124 | static char *dlfb_set_base16bpp(char *wrptr, u32 base) |
125 | { | ||
126 | /* the base pointer is 16 bits wide, 0x20 is hi byte. */ | ||
127 | wrptr = dlfb_set_register(wrptr, 0x20, base >> 16); | ||
128 | wrptr = dlfb_set_register(wrptr, 0x21, base >> 8); | ||
129 | return dlfb_set_register(wrptr, 0x22, base); | ||
130 | } | ||
122 | 131 | ||
123 | // thanks to Henrik Bjerregaard Pedersen for this function | 132 | /* |
124 | static char *rle_compress16(uint16_t * src, char *dst, int rem) | 133 | * DisplayLink HW has separate 16bpp and 8bpp framebuffers. |
134 | * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer | ||
135 | */ | ||
136 | static char *dlfb_set_base8bpp(char *wrptr, u32 base) | ||
125 | { | 137 | { |
138 | wrptr = dlfb_set_register(wrptr, 0x26, base >> 16); | ||
139 | wrptr = dlfb_set_register(wrptr, 0x27, base >> 8); | ||
140 | return dlfb_set_register(wrptr, 0x28, base); | ||
141 | } | ||
126 | 142 | ||
127 | int rl; | 143 | static char *dlfb_set_register_16(char *wrptr, u8 reg, u16 value) |
128 | uint16_t pix0; | 144 | { |
129 | char *end_if_raw = dst + 6 + 2 * rem; | 145 | wrptr = dlfb_set_register(wrptr, reg, value >> 8); |
146 | return dlfb_set_register(wrptr, reg+1, value); | ||
147 | } | ||
130 | 148 | ||
131 | dst += 6; // header will be filled in if RLE is worth it | 149 | /* |
150 | * This is kind of weird because the controller takes some | ||
151 | * register values in a different byte order than other registers. | ||
152 | */ | ||
153 | static char *dlfb_set_register_16be(char *wrptr, u8 reg, u16 value) | ||
154 | { | ||
155 | wrptr = dlfb_set_register(wrptr, reg, value); | ||
156 | return dlfb_set_register(wrptr, reg+1, value >> 8); | ||
157 | } | ||
132 | 158 | ||
133 | while (rem && dst < end_if_raw) { | 159 | /* |
134 | char *start = (char *)src; | 160 | * LFSR is linear feedback shift register. The reason we have this is |
161 | * because the display controller needs to minimize the clock depth of | ||
162 | * various counters used in the display path. So this code reverses the | ||
163 | * provided value into the lfsr16 value by counting backwards to get | ||
164 | * the value that needs to be set in the hardware comparator to get the | ||
165 | * same actual count. This makes sense once you read above a couple of | ||
166 | * times and think about it from a hardware perspective. | ||
167 | */ | ||
168 | static u16 dlfb_lfsr16(u16 actual_count) | ||
169 | { | ||
170 | u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */ | ||
135 | 171 | ||
136 | pix0 = *src++; | 172 | while (actual_count--) { |
137 | rl = 1; | 173 | lv = ((lv << 1) | |
138 | rem--; | 174 | (((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1)) |
139 | while (rem && *src == pix0) | 175 | & 0xFFFF; |
140 | rem--, rl++, src++; | ||
141 | *dst++ = rl; | ||
142 | *dst++ = start[1]; | ||
143 | *dst++ = start[0]; | ||
144 | } | 176 | } |
145 | 177 | ||
146 | return dst; | 178 | return (u16) lv; |
147 | } | 179 | } |
148 | 180 | ||
149 | /* | 181 | /* |
150 | Thanks to Henrik Bjerregaard Pedersen for rle implementation and code refactoring. | 182 | * This does LFSR conversion on the value that is to be written. |
151 | Next step is huffman compression. | 183 | * See LFSR explanation above for more detail. |
152 | */ | 184 | */ |
153 | 185 | static char *dlfb_set_register_lfsr16(char *wrptr, u8 reg, u16 value) | |
154 | static int | ||
155 | image_blit(struct dlfb_data *dev_info, int x, int y, int width, int height, | ||
156 | char *data) | ||
157 | { | 186 | { |
187 | return dlfb_set_register_16(wrptr, reg, dlfb_lfsr16(value)); | ||
188 | } | ||
158 | 189 | ||
159 | int i, j, base; | 190 | /* |
160 | int rem = width; | 191 | * This takes a standard fbdev screeninfo struct and all of its monitor mode |
161 | int ret; | 192 | * details and converts them into the DisplayLink equivalent register commands. |
162 | 193 | */ | |
163 | int firstdiff, thistime; | 194 | static char *dlfb_set_vid_cmds(char *wrptr, struct fb_var_screeninfo *var) |
164 | 195 | { | |
165 | char *bufptr; | 196 | u16 xds, yds; |
166 | 197 | u16 xde, yde; | |
167 | if (x + width > dev_info->info->var.xres) | 198 | u16 yec; |
168 | return -EINVAL; | ||
169 | |||
170 | if (y + height > dev_info->info->var.yres) | ||
171 | return -EINVAL; | ||
172 | 199 | ||
173 | mutex_lock(&dev_info->bulk_mutex); | 200 | /* x display start */ |
201 | xds = var->left_margin + var->hsync_len; | ||
202 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x01, xds); | ||
203 | /* x display end */ | ||
204 | xde = xds + var->xres; | ||
205 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x03, xde); | ||
174 | 206 | ||
175 | base = | 207 | /* y display start */ |
176 | dev_info->base16 + ((dev_info->info->var.xres * 2 * y) + (x * 2)); | 208 | yds = var->upper_margin + var->vsync_len; |
209 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x05, yds); | ||
210 | /* y display end */ | ||
211 | yde = yds + var->yres; | ||
212 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x07, yde); | ||
177 | 213 | ||
178 | data += (dev_info->info->var.xres * 2 * y) + (x * 2); | 214 | /* x end count is active + blanking - 1 */ |
215 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x09, | ||
216 | xde + var->right_margin - 1); | ||
179 | 217 | ||
180 | /* printk("IMAGE_BLIT\n"); */ | 218 | /* libdlo hardcodes hsync start to 1 */ |
219 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x0B, 1); | ||
181 | 220 | ||
182 | bufptr = dev_info->buf; | 221 | /* hsync end is width of sync pulse + 1 */ |
222 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x0D, var->hsync_len + 1); | ||
183 | 223 | ||
184 | for (i = y; i < y + height; i++) { | 224 | /* hpixels is active pixels */ |
225 | wrptr = dlfb_set_register_16(wrptr, 0x0F, var->xres); | ||
185 | 226 | ||
186 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 227 | /* yendcount is vertical active + vertical blanking */ |
187 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 228 | yec = var->yres + var->upper_margin + var->lower_margin + |
188 | bufptr = dev_info->buf; | 229 | var->vsync_len; |
189 | } | 230 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x11, yec); |
190 | 231 | ||
191 | rem = width; | 232 | /* libdlo hardcodes vsync start to 0 */ |
233 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x13, 0); | ||
192 | 234 | ||
193 | /* printk("WRITING LINE %d\n", i); */ | 235 | /* vsync end is width of vsync pulse */ |
236 | wrptr = dlfb_set_register_lfsr16(wrptr, 0x15, var->vsync_len); | ||
194 | 237 | ||
195 | while (rem) { | 238 | /* vpixels is active pixels */ |
239 | wrptr = dlfb_set_register_16(wrptr, 0x17, var->yres); | ||
196 | 240 | ||
197 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 241 | /* convert picoseconds to 5kHz multiple for pclk5k = x * 1E12/5k */ |
198 | ret = | 242 | wrptr = dlfb_set_register_16be(wrptr, 0x1B, |
199 | dlfb_bulk_msg(dev_info, | 243 | 200*1000*1000/var->pixclock); |
200 | bufptr - dev_info->buf); | ||
201 | bufptr = dev_info->buf; | ||
202 | } | ||
203 | // number of pixels to consider this time | ||
204 | thistime = rem; | ||
205 | if (thistime > 255) | ||
206 | thistime = 255; | ||
207 | |||
208 | // find position of first pixel that has changed | ||
209 | firstdiff = -1; | ||
210 | for (j = 0; j < thistime * 2; j++) { | ||
211 | if (dev_info->backing_buffer | ||
212 | [base - dev_info->base16 + j] != data[j]) { | ||
213 | firstdiff = j / 2; | ||
214 | break; | ||
215 | } | ||
216 | } | ||
217 | 244 | ||
218 | if (firstdiff >= 0) { | 245 | return wrptr; |
219 | char *end_of_rle; | 246 | } |
220 | |||
221 | end_of_rle = | ||
222 | rle_compress16((uint16_t *) (data + | ||
223 | firstdiff * 2), | ||
224 | bufptr, | ||
225 | thistime - firstdiff); | ||
226 | |||
227 | if (end_of_rle < | ||
228 | bufptr + 6 + 2 * (thistime - firstdiff)) { | ||
229 | bufptr[0] = 0xAF; | ||
230 | bufptr[1] = 0x69; | ||
231 | |||
232 | bufptr[2] = | ||
233 | (char)((base + | ||
234 | firstdiff * 2) >> 16); | ||
235 | bufptr[3] = | ||
236 | (char)((base + firstdiff * 2) >> 8); | ||
237 | bufptr[4] = | ||
238 | (char)(base + firstdiff * 2); | ||
239 | bufptr[5] = thistime - firstdiff; | ||
240 | |||
241 | bufptr = end_of_rle; | ||
242 | |||
243 | } else { | ||
244 | // fallback to raw (or some other encoding?) | ||
245 | *bufptr++ = 0xAF; | ||
246 | *bufptr++ = 0x68; | ||
247 | |||
248 | *bufptr++ = | ||
249 | (char)((base + | ||
250 | firstdiff * 2) >> 16); | ||
251 | *bufptr++ = | ||
252 | (char)((base + firstdiff * 2) >> 8); | ||
253 | *bufptr++ = | ||
254 | (char)(base + firstdiff * 2); | ||
255 | *bufptr++ = thistime - firstdiff; | ||
256 | // PUT COMPRESSION HERE | ||
257 | for (j = firstdiff * 2; | ||
258 | j < thistime * 2; j += 2) { | ||
259 | *bufptr++ = data[j + 1]; | ||
260 | *bufptr++ = data[j]; | ||
261 | } | ||
262 | } | ||
263 | } | ||
264 | 247 | ||
265 | base += thistime * 2; | 248 | /* |
266 | data += thistime * 2; | 249 | * This takes a standard fbdev screeninfo struct that was fetched or prepared |
267 | rem -= thistime; | 250 | * and then generates the appropriate command sequence that then drives the |
268 | } | 251 | * display controller. |
252 | */ | ||
253 | static int dlfb_set_video_mode(struct dlfb_data *dev, | ||
254 | struct fb_var_screeninfo *var) | ||
255 | { | ||
256 | char *buf; | ||
257 | char *wrptr; | ||
258 | int retval = 0; | ||
259 | int writesize; | ||
260 | struct urb *urb; | ||
269 | 261 | ||
270 | memcpy(dev_info->backing_buffer + (base - dev_info->base16) - | 262 | if (!atomic_read(&dev->usb_active)) |
271 | (width * 2), data - (width * 2), width * 2); | 263 | return -EPERM; |
272 | 264 | ||
273 | base += (dev_info->info->var.xres * 2) - (width * 2); | 265 | urb = dlfb_get_urb(dev); |
274 | data += (dev_info->info->var.xres * 2) - (width * 2); | 266 | if (!urb) |
267 | return -ENOMEM; | ||
268 | buf = (char *) urb->transfer_buffer; | ||
275 | 269 | ||
276 | } | 270 | /* |
271 | * This first section has to do with setting the base address on the | ||
272 | * controller * associated with the display. There are 2 base | ||
273 | * pointers, currently, we only * use the 16 bpp segment. | ||
274 | */ | ||
275 | wrptr = dlfb_vidreg_lock(buf); | ||
276 | wrptr = dlfb_set_color_depth(wrptr, 0x00); | ||
277 | /* set base for 16bpp segment to 0 */ | ||
278 | wrptr = dlfb_set_base16bpp(wrptr, 0); | ||
279 | /* set base for 8bpp segment to end of fb */ | ||
280 | wrptr = dlfb_set_base8bpp(wrptr, dev->info->fix.smem_len); | ||
277 | 281 | ||
278 | if (bufptr > dev_info->buf) { | 282 | wrptr = dlfb_set_vid_cmds(wrptr, var); |
279 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 283 | wrptr = dlfb_enable_hvsync(wrptr, true); |
280 | } | 284 | wrptr = dlfb_vidreg_unlock(wrptr); |
281 | 285 | ||
282 | mutex_unlock(&dev_info->bulk_mutex); | 286 | writesize = wrptr - buf; |
283 | 287 | ||
284 | return base; | 288 | retval = dlfb_submit_urb(dev, urb, writesize); |
285 | 289 | ||
290 | return retval; | ||
286 | } | 291 | } |
287 | 292 | ||
288 | static int | 293 | static int dlfb_ops_mmap(struct fb_info *info, struct vm_area_struct *vma) |
289 | draw_rect(struct dlfb_data *dev_info, int x, int y, int width, int height, | ||
290 | unsigned char red, unsigned char green, unsigned char blue) | ||
291 | { | 294 | { |
295 | unsigned long start = vma->vm_start; | ||
296 | unsigned long size = vma->vm_end - vma->vm_start; | ||
297 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | ||
298 | unsigned long page, pos; | ||
299 | struct dlfb_data *dev = info->par; | ||
292 | 300 | ||
293 | int i, j, base; | 301 | dl_notice("MMAP: %lu %u\n", offset + size, info->fix.smem_len); |
294 | int ret; | ||
295 | unsigned short col = | ||
296 | (((((red) & 0xF8) | ((green) >> 5)) & 0xFF) << 8) + | ||
297 | (((((green) & 0x1C) << 3) | ((blue) >> 3)) & 0xFF); | ||
298 | int rem = width; | ||
299 | |||
300 | char *bufptr; | ||
301 | 302 | ||
302 | if (x + width > dev_info->info->var.xres) | 303 | if (offset + size > info->fix.smem_len) |
303 | return -EINVAL; | 304 | return -EINVAL; |
304 | 305 | ||
305 | if (y + height > dev_info->info->var.yres) | 306 | pos = (unsigned long)info->fix.smem_start + offset; |
306 | return -EINVAL; | ||
307 | 307 | ||
308 | mutex_lock(&dev_info->bulk_mutex); | 308 | while (size > 0) { |
309 | page = vmalloc_to_pfn((void *)pos); | ||
310 | if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) | ||
311 | return -EAGAIN; | ||
309 | 312 | ||
310 | base = dev_info->base16 + (dev_info->info->var.xres * 2 * y) + (x * 2); | 313 | start += PAGE_SIZE; |
314 | pos += PAGE_SIZE; | ||
315 | if (size > PAGE_SIZE) | ||
316 | size -= PAGE_SIZE; | ||
317 | else | ||
318 | size = 0; | ||
319 | } | ||
311 | 320 | ||
312 | bufptr = dev_info->buf; | 321 | vma->vm_flags |= VM_RESERVED; /* avoid to swap out this VMA */ |
322 | return 0; | ||
313 | 323 | ||
314 | for (i = y; i < y + height; i++) { | 324 | } |
315 | 325 | ||
316 | for (j = 0; j < width * 2; j += 2) { | 326 | /* |
317 | dev_info->backing_buffer[base - dev_info->base16 + j] = | 327 | * Trims identical data from front and back of line |
318 | (char)(col >> 8); | 328 | * Sets new front buffer address and width |
319 | dev_info->backing_buffer[base - dev_info->base16 + j + | 329 | * And returns byte count of identical pixels |
320 | 1] = (char)(col); | 330 | * Assumes CPU natural alignment (unsigned long) |
321 | } | 331 | * for back and front buffer ptrs and width |
322 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 332 | */ |
323 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 333 | static int dlfb_trim_hline(const u8 *bback, const u8 **bfront, int *width_bytes) |
324 | bufptr = dev_info->buf; | 334 | { |
335 | int j, k; | ||
336 | const unsigned long *back = (const unsigned long *) bback; | ||
337 | const unsigned long *front = (const unsigned long *) *bfront; | ||
338 | const int width = *width_bytes / sizeof(unsigned long); | ||
339 | int identical = width; | ||
340 | int start = width; | ||
341 | int end = width; | ||
342 | |||
343 | prefetch((void *) front); | ||
344 | prefetch((void *) back); | ||
345 | |||
346 | for (j = 0; j < width; j++) { | ||
347 | if (back[j] != front[j]) { | ||
348 | start = j; | ||
349 | break; | ||
325 | } | 350 | } |
351 | } | ||
326 | 352 | ||
327 | rem = width; | 353 | for (k = width - 1; k > j; k--) { |
328 | 354 | if (back[k] != front[k]) { | |
329 | while (rem) { | 355 | end = k+1; |
330 | 356 | break; | |
331 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | ||
332 | ret = | ||
333 | dlfb_bulk_msg(dev_info, | ||
334 | bufptr - dev_info->buf); | ||
335 | bufptr = dev_info->buf; | ||
336 | } | ||
337 | |||
338 | *bufptr++ = 0xAF; | ||
339 | *bufptr++ = 0x69; | ||
340 | |||
341 | *bufptr++ = (char)(base >> 16); | ||
342 | *bufptr++ = (char)(base >> 8); | ||
343 | *bufptr++ = (char)(base); | ||
344 | |||
345 | if (rem > 255) { | ||
346 | *bufptr++ = 255; | ||
347 | *bufptr++ = 255; | ||
348 | rem -= 255; | ||
349 | base += 255 * 2; | ||
350 | } else { | ||
351 | *bufptr++ = rem; | ||
352 | *bufptr++ = rem; | ||
353 | base += rem * 2; | ||
354 | rem = 0; | ||
355 | } | ||
356 | |||
357 | *bufptr++ = (char)(col >> 8); | ||
358 | *bufptr++ = (char)(col); | ||
359 | |||
360 | } | 357 | } |
361 | |||
362 | base += (dev_info->info->var.xres * 2) - (width * 2); | ||
363 | |||
364 | } | 358 | } |
365 | 359 | ||
366 | if (bufptr > dev_info->buf) | 360 | identical = start + (width - end); |
367 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 361 | *bfront = (u8 *) &front[start]; |
362 | *width_bytes = (end - start) * sizeof(unsigned long); | ||
368 | 363 | ||
369 | mutex_unlock(&dev_info->bulk_mutex); | 364 | return identical * sizeof(unsigned long); |
370 | |||
371 | return 1; | ||
372 | } | 365 | } |
373 | 366 | ||
374 | static void swapfb(struct dlfb_data *dev_info) | 367 | /* |
368 | Render a command stream for an encoded horizontal line segment of pixels. | ||
369 | |||
370 | A command buffer holds several commands. | ||
371 | It always begins with a fresh command header | ||
372 | (the protocol doesn't require this, but we enforce it to allow | ||
373 | multiple buffers to be potentially encoded and sent in parallel). | ||
374 | A single command encodes one contiguous horizontal line of pixels | ||
375 | |||
376 | The function relies on the client to do all allocation, so that | ||
377 | rendering can be done directly to output buffers (e.g. USB URBs). | ||
378 | The function fills the supplied command buffer, providing information | ||
379 | on where it left off, so the client may call in again with additional | ||
380 | buffers if the line will take several buffers to complete. | ||
381 | |||
382 | A single command can transmit a maximum of 256 pixels, | ||
383 | regardless of the compression ratio (protocol design limit). | ||
384 | To the hardware, 0 for a size byte means 256 | ||
385 | |||
386 | Rather than 256 pixel commands which are either rl or raw encoded, | ||
387 | the rlx command simply assumes alternating raw and rl spans within one cmd. | ||
388 | This has a slightly larger header overhead, but produces more even results. | ||
389 | It also processes all data (read and write) in a single pass. | ||
390 | Performance benchmarks of common cases show it having just slightly better | ||
391 | compression than 256 pixel raw -or- rle commands, with similar CPU consumpion. | ||
392 | But for very rl friendly data, will compress not quite as well. | ||
393 | */ | ||
394 | static void dlfb_compress_hline( | ||
395 | const uint16_t **pixel_start_ptr, | ||
396 | const uint16_t *const pixel_end, | ||
397 | uint32_t *device_address_ptr, | ||
398 | uint8_t **command_buffer_ptr, | ||
399 | const uint8_t *const cmd_buffer_end) | ||
375 | { | 400 | { |
401 | const uint16_t *pixel = *pixel_start_ptr; | ||
402 | uint32_t dev_addr = *device_address_ptr; | ||
403 | uint8_t *cmd = *command_buffer_ptr; | ||
404 | const int bpp = 2; | ||
405 | |||
406 | while ((pixel_end > pixel) && | ||
407 | (cmd_buffer_end - MIN_RLX_CMD_BYTES > cmd)) { | ||
408 | uint8_t *raw_pixels_count_byte = 0; | ||
409 | uint8_t *cmd_pixels_count_byte = 0; | ||
410 | const uint16_t *raw_pixel_start = 0; | ||
411 | const uint16_t *cmd_pixel_start, *cmd_pixel_end = 0; | ||
412 | const uint32_t be_dev_addr = cpu_to_be32(dev_addr); | ||
413 | |||
414 | prefetchw((void *) cmd); /* pull in one cache line at least */ | ||
415 | |||
416 | *cmd++ = 0xAF; | ||
417 | *cmd++ = 0x6B; | ||
418 | *cmd++ = (uint8_t) ((be_dev_addr >> 8) & 0xFF); | ||
419 | *cmd++ = (uint8_t) ((be_dev_addr >> 16) & 0xFF); | ||
420 | *cmd++ = (uint8_t) ((be_dev_addr >> 24) & 0xFF); | ||
421 | |||
422 | cmd_pixels_count_byte = cmd++; /* we'll know this later */ | ||
423 | cmd_pixel_start = pixel; | ||
424 | |||
425 | raw_pixels_count_byte = cmd++; /* we'll know this later */ | ||
426 | raw_pixel_start = pixel; | ||
427 | |||
428 | cmd_pixel_end = pixel + min(MAX_CMD_PIXELS + 1, | ||
429 | min((int)(pixel_end - pixel), | ||
430 | (int)(cmd_buffer_end - cmd) / bpp)); | ||
431 | |||
432 | prefetch_range((void *) pixel, (cmd_pixel_end - pixel) * bpp); | ||
433 | |||
434 | while (pixel < cmd_pixel_end) { | ||
435 | const uint16_t * const repeating_pixel = pixel; | ||
436 | |||
437 | *(uint16_t *)cmd = cpu_to_be16p(pixel); | ||
438 | cmd += 2; | ||
439 | pixel++; | ||
440 | |||
441 | if (unlikely((pixel < cmd_pixel_end) && | ||
442 | (*pixel == *repeating_pixel))) { | ||
443 | /* go back and fill in raw pixel count */ | ||
444 | *raw_pixels_count_byte = ((repeating_pixel - | ||
445 | raw_pixel_start) + 1) & 0xFF; | ||
446 | |||
447 | while ((pixel < cmd_pixel_end) | ||
448 | && (*pixel == *repeating_pixel)) { | ||
449 | pixel++; | ||
450 | } | ||
376 | 451 | ||
377 | int tmpbase; | 452 | /* immediately after raw data is repeat byte */ |
378 | char *bufptr; | 453 | *cmd++ = ((pixel - repeating_pixel) - 1) & 0xFF; |
379 | |||
380 | mutex_lock(&dev_info->bulk_mutex); | ||
381 | |||
382 | tmpbase = dev_info->base16; | ||
383 | |||
384 | dev_info->base16 = dev_info->base16d; | ||
385 | dev_info->base16d = tmpbase; | ||
386 | 454 | ||
387 | bufptr = dev_info->buf; | 455 | /* Then start another raw pixel span */ |
456 | raw_pixel_start = pixel; | ||
457 | raw_pixels_count_byte = cmd++; | ||
458 | } | ||
459 | } | ||
388 | 460 | ||
389 | bufptr = dlfb_set_register(bufptr, 0xFF, 0x00); | 461 | if (pixel > raw_pixel_start) { |
462 | /* finalize last RAW span */ | ||
463 | *raw_pixels_count_byte = (pixel-raw_pixel_start) & 0xFF; | ||
464 | } | ||
390 | 465 | ||
391 | // set addresses | 466 | *cmd_pixels_count_byte = (pixel - cmd_pixel_start) & 0xFF; |
392 | bufptr = | 467 | dev_addr += (pixel - cmd_pixel_start) * bpp; |
393 | dlfb_set_register(bufptr, 0x20, (char)(dev_info->base16 >> 16)); | 468 | } |
394 | bufptr = dlfb_set_register(bufptr, 0x21, (char)(dev_info->base16 >> 8)); | ||
395 | bufptr = dlfb_set_register(bufptr, 0x22, (char)(dev_info->base16)); | ||
396 | 469 | ||
397 | bufptr = dlfb_set_register(bufptr, 0xFF, 0x00); | 470 | if (cmd_buffer_end <= MIN_RLX_CMD_BYTES + cmd) { |
471 | /* Fill leftover bytes with no-ops */ | ||
472 | if (cmd_buffer_end > cmd) | ||
473 | memset(cmd, 0xAF, cmd_buffer_end - cmd); | ||
474 | cmd = (uint8_t *) cmd_buffer_end; | ||
475 | } | ||
398 | 476 | ||
399 | dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 477 | *command_buffer_ptr = cmd; |
478 | *pixel_start_ptr = pixel; | ||
479 | *device_address_ptr = dev_addr; | ||
400 | 480 | ||
401 | mutex_unlock(&dev_info->bulk_mutex); | 481 | return; |
402 | } | 482 | } |
403 | 483 | ||
404 | static int copyfb(struct dlfb_data *dev_info) | 484 | /* |
485 | * There are 3 copies of every pixel: The front buffer that the fbdev | ||
486 | * client renders to, the actual framebuffer across the USB bus in hardware | ||
487 | * (that we can only write to, slowly, and can never read), and (optionally) | ||
488 | * our shadow copy that tracks what's been sent to that hardware buffer. | ||
489 | */ | ||
490 | static void dlfb_render_hline(struct dlfb_data *dev, struct urb **urb_ptr, | ||
491 | const char *front, char **urb_buf_ptr, | ||
492 | u32 byte_offset, u32 byte_width, | ||
493 | int *ident_ptr, int *sent_ptr) | ||
405 | { | 494 | { |
406 | int base; | 495 | const u8 *line_start, *line_end, *next_pixel; |
407 | int source; | 496 | u32 dev_addr = dev->base16 + byte_offset; |
408 | int rem; | 497 | struct urb *urb = *urb_ptr; |
409 | int i, ret; | 498 | u8 *cmd = *urb_buf_ptr; |
410 | 499 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; | |
411 | char *bufptr; | 500 | |
412 | 501 | line_start = (u8 *) (front + byte_offset); | |
413 | base = dev_info->base16d; | 502 | next_pixel = line_start; |
414 | 503 | line_end = next_pixel + byte_width; | |
415 | mutex_lock(&dev_info->bulk_mutex); | 504 | |
416 | 505 | if (dev->backing_buffer) { | |
417 | source = dev_info->base16; | 506 | int offset; |
418 | 507 | const u8 *back_start = (u8 *) (dev->backing_buffer | |
419 | bufptr = dev_info->buf; | 508 | + byte_offset); |
420 | 509 | ||
421 | for (i = 0; i < dev_info->info->var.yres; i++) { | 510 | *ident_ptr += dlfb_trim_hline(back_start, &next_pixel, |
422 | 511 | &byte_width); | |
423 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 512 | |
424 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 513 | offset = next_pixel - line_start; |
425 | bufptr = dev_info->buf; | 514 | line_end = next_pixel + byte_width; |
426 | } | 515 | dev_addr += offset; |
427 | 516 | back_start += offset; | |
428 | rem = dev_info->info->var.xres; | 517 | line_start += offset; |
429 | 518 | ||
430 | while (rem) { | 519 | memcpy((char *)back_start, (char *) line_start, |
431 | 520 | byte_width); | |
432 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 521 | } |
433 | ret = | ||
434 | dlfb_bulk_msg(dev_info, | ||
435 | bufptr - dev_info->buf); | ||
436 | bufptr = dev_info->buf; | ||
437 | |||
438 | } | ||
439 | |||
440 | *bufptr++ = 0xAF; | ||
441 | *bufptr++ = 0x6A; | ||
442 | |||
443 | *bufptr++ = (char)(base >> 16); | ||
444 | *bufptr++ = (char)(base >> 8); | ||
445 | *bufptr++ = (char)(base); | ||
446 | |||
447 | if (rem > 255) { | ||
448 | *bufptr++ = 255; | ||
449 | *bufptr++ = (char)(source >> 16); | ||
450 | *bufptr++ = (char)(source >> 8); | ||
451 | *bufptr++ = (char)(source); | ||
452 | |||
453 | rem -= 255; | ||
454 | base += 255 * 2; | ||
455 | source += 255 * 2; | ||
456 | |||
457 | } else { | ||
458 | *bufptr++ = rem; | ||
459 | *bufptr++ = (char)(source >> 16); | ||
460 | *bufptr++ = (char)(source >> 8); | ||
461 | *bufptr++ = (char)(source); | ||
462 | 522 | ||
463 | base += rem * 2; | 523 | while (next_pixel < line_end) { |
464 | source += rem * 2; | 524 | |
465 | rem = 0; | 525 | dlfb_compress_hline((const uint16_t **) &next_pixel, |
466 | } | 526 | (const uint16_t *) line_end, &dev_addr, |
527 | (u8 **) &cmd, (u8 *) cmd_end); | ||
528 | |||
529 | if (cmd >= cmd_end) { | ||
530 | int len = cmd - (u8 *) urb->transfer_buffer; | ||
531 | if (dlfb_submit_urb(dev, urb, len)) | ||
532 | return; /* lost pixels is set */ | ||
533 | *sent_ptr += len; | ||
534 | urb = dlfb_get_urb(dev); | ||
535 | if (!urb) | ||
536 | return; /* lost_pixels is set */ | ||
537 | *urb_ptr = urb; | ||
538 | cmd = urb->transfer_buffer; | ||
539 | cmd_end = &cmd[urb->transfer_buffer_length]; | ||
467 | } | 540 | } |
468 | } | 541 | } |
469 | 542 | ||
470 | if (bufptr > dev_info->buf) | 543 | *urb_buf_ptr = cmd; |
471 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | ||
472 | |||
473 | mutex_unlock(&dev_info->bulk_mutex); | ||
474 | |||
475 | return 1; | ||
476 | |||
477 | } | 544 | } |
478 | 545 | ||
479 | static int | 546 | int dlfb_handle_damage(struct dlfb_data *dev, int x, int y, |
480 | copyarea(struct dlfb_data *dev_info, int dx, int dy, int sx, int sy, | 547 | int width, int height, char *data) |
481 | int width, int height) | ||
482 | { | 548 | { |
483 | int base; | ||
484 | int source; | ||
485 | int rem; | ||
486 | int i, ret; | 549 | int i, ret; |
487 | 550 | char *cmd; | |
488 | char *bufptr; | 551 | cycles_t start_cycles, end_cycles; |
489 | 552 | int bytes_sent = 0; | |
490 | if (dx + width > dev_info->info->var.xres) | 553 | int bytes_identical = 0; |
554 | struct urb *urb; | ||
555 | int aligned_x; | ||
556 | |||
557 | start_cycles = get_cycles(); | ||
558 | |||
559 | aligned_x = DL_ALIGN_DOWN(x, sizeof(unsigned long)); | ||
560 | width = DL_ALIGN_UP(width + (x-aligned_x), sizeof(unsigned long)); | ||
561 | x = aligned_x; | ||
562 | |||
563 | if ((width <= 0) || | ||
564 | (x + width > dev->info->var.xres) || | ||
565 | (y + height > dev->info->var.yres)) | ||
491 | return -EINVAL; | 566 | return -EINVAL; |
492 | 567 | ||
493 | if (dy + height > dev_info->info->var.yres) | 568 | if (!atomic_read(&dev->usb_active)) |
494 | return -EINVAL; | 569 | return 0; |
495 | |||
496 | mutex_lock(&dev_info->bulk_mutex); | ||
497 | 570 | ||
498 | base = | 571 | urb = dlfb_get_urb(dev); |
499 | dev_info->base16 + (dev_info->info->var.xres * 2 * dy) + (dx * 2); | 572 | if (!urb) |
500 | source = (dev_info->info->var.xres * 2 * sy) + (sx * 2); | 573 | return 0; |
574 | cmd = urb->transfer_buffer; | ||
501 | 575 | ||
502 | bufptr = dev_info->buf; | 576 | for (i = y; i < y + height ; i++) { |
577 | const int line_offset = dev->info->fix.line_length * i; | ||
578 | const int byte_offset = line_offset + (x * BPP); | ||
503 | 579 | ||
504 | for (i = sy; i < sy + height; i++) { | 580 | dlfb_render_hline(dev, &urb, (char *) dev->info->fix.smem_start, |
581 | &cmd, byte_offset, width * BPP, | ||
582 | &bytes_identical, &bytes_sent); | ||
583 | } | ||
505 | 584 | ||
506 | memcpy(dev_info->backing_buffer + base - dev_info->base16, | 585 | if (cmd > (char *) urb->transfer_buffer) { |
507 | dev_info->backing_buffer + source, width * 2); | 586 | /* Send partial buffer remaining before exiting */ |
587 | int len = cmd - (char *) urb->transfer_buffer; | ||
588 | ret = dlfb_submit_urb(dev, urb, len); | ||
589 | bytes_sent += len; | ||
590 | } else | ||
591 | dlfb_urb_completion(urb); | ||
592 | |||
593 | atomic_add(bytes_sent, &dev->bytes_sent); | ||
594 | atomic_add(bytes_identical, &dev->bytes_identical); | ||
595 | atomic_add(width*height*2, &dev->bytes_rendered); | ||
596 | end_cycles = get_cycles(); | ||
597 | atomic_add(((unsigned int) ((end_cycles - start_cycles) | ||
598 | >> 10)), /* Kcycles */ | ||
599 | &dev->cpu_kcycles_used); | ||
508 | 600 | ||
509 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 601 | return 0; |
510 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 602 | } |
511 | bufptr = dev_info->buf; | ||
512 | } | ||
513 | |||
514 | rem = width; | ||
515 | 603 | ||
516 | while (rem) { | 604 | /* hardware has native COPY command (see libdlo), but not worth it for fbcon */ |
605 | static void dlfb_ops_copyarea(struct fb_info *info, | ||
606 | const struct fb_copyarea *area) | ||
607 | { | ||
517 | 608 | ||
518 | if (dev_info->bufend - bufptr < BUF_HIGH_WATER_MARK) { | 609 | struct dlfb_data *dev = info->par; |
519 | ret = | ||
520 | dlfb_bulk_msg(dev_info, | ||
521 | bufptr - dev_info->buf); | ||
522 | bufptr = dev_info->buf; | ||
523 | } | ||
524 | 610 | ||
525 | *bufptr++ = 0xAF; | 611 | #if defined CONFIG_FB_SYS_COPYAREA || defined CONFIG_FB_SYS_COPYAREA_MODULE |
526 | *bufptr++ = 0x6A; | ||
527 | 612 | ||
528 | *bufptr++ = (char)(base >> 16); | 613 | sys_copyarea(info, area); |
529 | *bufptr++ = (char)(base >> 8); | ||
530 | *bufptr++ = (char)(base); | ||
531 | 614 | ||
532 | if (rem > 255) { | 615 | dlfb_handle_damage(dev, area->dx, area->dy, |
533 | *bufptr++ = 255; | 616 | area->width, area->height, info->screen_base); |
534 | *bufptr++ = (char)(source >> 16); | 617 | #endif |
535 | *bufptr++ = (char)(source >> 8); | 618 | atomic_inc(&dev->copy_count); |
536 | *bufptr++ = (char)(source); | ||
537 | 619 | ||
538 | rem -= 255; | 620 | } |
539 | base += 255 * 2; | ||
540 | source += 255 * 2; | ||
541 | 621 | ||
542 | } else { | 622 | static void dlfb_ops_imageblit(struct fb_info *info, |
543 | *bufptr++ = rem; | 623 | const struct fb_image *image) |
544 | *bufptr++ = (char)(source >> 16); | 624 | { |
545 | *bufptr++ = (char)(source >> 8); | 625 | struct dlfb_data *dev = info->par; |
546 | *bufptr++ = (char)(source); | ||
547 | 626 | ||
548 | base += rem * 2; | 627 | #if defined CONFIG_FB_SYS_IMAGEBLIT || defined CONFIG_FB_SYS_IMAGEBLIT_MODULE |
549 | source += rem * 2; | ||
550 | rem = 0; | ||
551 | } | ||
552 | } | ||
553 | 628 | ||
554 | base += (dev_info->info->var.xres * 2) - (width * 2); | 629 | sys_imageblit(info, image); |
555 | source += (dev_info->info->var.xres * 2) - (width * 2); | ||
556 | } | ||
557 | 630 | ||
558 | if (bufptr > dev_info->buf) | 631 | dlfb_handle_damage(dev, image->dx, image->dy, |
559 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 632 | image->width, image->height, info->screen_base); |
560 | 633 | ||
561 | mutex_unlock(&dev_info->bulk_mutex); | 634 | #endif |
562 | 635 | ||
563 | return 1; | 636 | atomic_inc(&dev->blit_count); |
564 | } | 637 | } |
565 | 638 | ||
566 | static void dlfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | 639 | static void dlfb_ops_fillrect(struct fb_info *info, |
640 | const struct fb_fillrect *rect) | ||
567 | { | 641 | { |
568 | |||
569 | struct dlfb_data *dev = info->par; | 642 | struct dlfb_data *dev = info->par; |
570 | 643 | ||
571 | copyarea(dev, area->dx, area->dy, area->sx, area->sy, area->width, | 644 | #if defined CONFIG_FB_SYS_FILLRECT || defined CONFIG_FB_SYS_FILLRECT_MODULE |
572 | area->height); | ||
573 | 645 | ||
574 | /* printk("COPY AREA %d %d %d %d %d %d !!!\n", area->dx, area->dy, area->sx, area->sy, area->width, area->height); */ | 646 | sys_fillrect(info, rect); |
575 | 647 | ||
576 | } | 648 | dlfb_handle_damage(dev, rect->dx, rect->dy, rect->width, |
649 | rect->height, info->screen_base); | ||
650 | #endif | ||
577 | 651 | ||
578 | static void dlfb_imageblit(struct fb_info *info, const struct fb_image *image) | 652 | atomic_inc(&dev->fill_count); |
579 | { | ||
580 | 653 | ||
581 | int ret; | ||
582 | struct dlfb_data *dev = info->par; | ||
583 | /* printk("IMAGE BLIT (1) %d %d %d %d DEPTH %d {%p}!!!\n", image->dx, image->dy, image->width, image->height, image->depth, dev->udev); */ | ||
584 | cfb_imageblit(info, image); | ||
585 | ret = | ||
586 | image_blit(dev, image->dx, image->dy, image->width, image->height, | ||
587 | info->screen_base); | ||
588 | /* printk("IMAGE BLIT (2) %d %d %d %d DEPTH %d {%p} %d!!!\n", image->dx, image->dy, image->width, image->height, image->depth, dev->udev, ret); */ | ||
589 | } | 654 | } |
590 | 655 | ||
591 | static void dlfb_fillrect(struct fb_info *info, | 656 | static void dlfb_get_edid(struct dlfb_data *dev) |
592 | const struct fb_fillrect *region) | ||
593 | { | 657 | { |
594 | 658 | int i; | |
595 | unsigned char red, green, blue; | 659 | int ret; |
596 | struct dlfb_data *dev = info->par; | 660 | char rbuf[2]; |
597 | 661 | ||
598 | memcpy(&red, ®ion->color, 1); | 662 | for (i = 0; i < sizeof(dev->edid); i++) { |
599 | memcpy(&green, ®ion->color + 1, 1); | 663 | ret = usb_control_msg(dev->udev, |
600 | memcpy(&blue, ®ion->color + 2, 1); | 664 | usb_rcvctrlpipe(dev->udev, 0), (0x02), |
601 | draw_rect(dev, region->dx, region->dy, region->width, region->height, | 665 | (0x80 | (0x02 << 5)), i << 8, 0xA1, rbuf, 2, |
602 | red, green, blue); | 666 | 0); |
603 | /* printk("FILL RECT %d %d !!!\n", region->dx, region->dy); */ | 667 | dev->edid[i] = rbuf[1]; |
604 | 668 | } | |
605 | } | 669 | } |
606 | 670 | ||
607 | static int dlfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | 671 | static int dlfb_ops_ioctl(struct fb_info *info, unsigned int cmd, |
672 | unsigned long arg) | ||
608 | { | 673 | { |
609 | 674 | ||
610 | struct dlfb_data *dev_info = info->par; | 675 | struct dlfb_data *dev = info->par; |
611 | struct dloarea *area = NULL; | 676 | struct dloarea *area = NULL; |
612 | 677 | ||
613 | if (cmd == 0xAD) { | 678 | if (!atomic_read(&dev->usb_active)) |
679 | return 0; | ||
680 | |||
681 | /* TODO: Update X server to get this from sysfs instead */ | ||
682 | if (cmd == DLFB_IOCTL_RETURN_EDID) { | ||
614 | char *edid = (char *)arg; | 683 | char *edid = (char *)arg; |
615 | dlfb_edid(dev_info); | 684 | dlfb_get_edid(dev); |
616 | if (copy_to_user(edid, dev_info->edid, 128)) { | 685 | if (copy_to_user(edid, dev->edid, sizeof(dev->edid))) |
617 | return -EFAULT; | 686 | return -EFAULT; |
618 | } | ||
619 | return 0; | 687 | return 0; |
620 | } | 688 | } |
621 | 689 | ||
622 | if (cmd == 0xAA || cmd == 0xAB || cmd == 0xAC) { | 690 | /* TODO: Help propose a standard fb.h ioctl to report mmap damage */ |
691 | if (cmd == DLFB_IOCTL_REPORT_DAMAGE) { | ||
623 | 692 | ||
624 | area = (struct dloarea *)arg; | 693 | area = (struct dloarea *)arg; |
625 | 694 | ||
@@ -634,36 +703,20 @@ static int dlfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) | |||
634 | 703 | ||
635 | if (area->y > info->var.yres) | 704 | if (area->y > info->var.yres) |
636 | area->y = info->var.yres; | 705 | area->y = info->var.yres; |
637 | } | ||
638 | 706 | ||
639 | if (cmd == 0xAA) { | 707 | atomic_set(&dev->use_defio, 0); |
640 | image_blit(dev_info, area->x, area->y, area->w, area->h, | 708 | |
709 | dlfb_handle_damage(dev, area->x, area->y, area->w, area->h, | ||
641 | info->screen_base); | 710 | info->screen_base); |
711 | atomic_inc(&dev->damage_count); | ||
642 | } | 712 | } |
643 | if (cmd == 0xAC) { | ||
644 | copyfb(dev_info); | ||
645 | image_blit(dev_info, area->x, area->y, area->w, area->h, | ||
646 | info->screen_base); | ||
647 | swapfb(dev_info); | ||
648 | } else if (cmd == 0xAB) { | ||
649 | |||
650 | if (area->x2 < 0) | ||
651 | area->x2 = 0; | ||
652 | |||
653 | if (area->y2 < 0) | ||
654 | area->y2 = 0; | ||
655 | 713 | ||
656 | copyarea(dev_info, | ||
657 | area->x2, area->y2, area->x, area->y, area->w, | ||
658 | area->h); | ||
659 | } | ||
660 | return 0; | 714 | return 0; |
661 | } | 715 | } |
662 | 716 | ||
663 | /* taken from vesafb */ | 717 | /* taken from vesafb */ |
664 | |||
665 | static int | 718 | static int |
666 | dlfb_setcolreg(unsigned regno, unsigned red, unsigned green, | 719 | dlfb_ops_setcolreg(unsigned regno, unsigned red, unsigned green, |
667 | unsigned blue, unsigned transp, struct fb_info *info) | 720 | unsigned blue, unsigned transp, struct fb_info *info) |
668 | { | 721 | { |
669 | int err = 0; | 722 | int err = 0; |
@@ -688,234 +741,698 @@ dlfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |||
688 | return err; | 741 | return err; |
689 | } | 742 | } |
690 | 743 | ||
691 | static int dlfb_release(struct fb_info *info, int user) | 744 | /* |
745 | * It's common for several clients to have framebuffer open simultaneously. | ||
746 | * e.g. both fbcon and X. Makes things interesting. | ||
747 | */ | ||
748 | static int dlfb_ops_open(struct fb_info *info, int user) | ||
749 | { | ||
750 | struct dlfb_data *dev = info->par; | ||
751 | |||
752 | /* if (user == 0) | ||
753 | * We could special case kernel mode clients (fbcon) here | ||
754 | */ | ||
755 | |||
756 | mutex_lock(&dev->fb_open_lock); | ||
757 | |||
758 | dev->fb_count++; | ||
759 | |||
760 | #ifdef CONFIG_FB_DEFERRED_IO | ||
761 | if ((atomic_read(&dev->use_defio)) && (info->fbdefio == NULL)) { | ||
762 | /* enable defio */ | ||
763 | info->fbdefio = &dlfb_defio; | ||
764 | fb_deferred_io_init(info); | ||
765 | } | ||
766 | #endif | ||
767 | |||
768 | dl_notice("open /dev/fb%d user=%d fb_info=%p count=%d\n", | ||
769 | info->node, user, info, dev->fb_count); | ||
770 | |||
771 | mutex_unlock(&dev->fb_open_lock); | ||
772 | |||
773 | return 0; | ||
774 | } | ||
775 | |||
776 | static int dlfb_ops_release(struct fb_info *info, int user) | ||
777 | { | ||
778 | struct dlfb_data *dev = info->par; | ||
779 | |||
780 | mutex_lock(&dev->fb_open_lock); | ||
781 | |||
782 | dev->fb_count--; | ||
783 | |||
784 | #ifdef CONFIG_FB_DEFERRED_IO | ||
785 | if ((dev->fb_count == 0) && (info->fbdefio)) { | ||
786 | fb_deferred_io_cleanup(info); | ||
787 | info->fbdefio = NULL; | ||
788 | info->fbops->fb_mmap = dlfb_ops_mmap; | ||
789 | } | ||
790 | #endif | ||
791 | |||
792 | dl_notice("release /dev/fb%d user=%d count=%d\n", | ||
793 | info->node, user, dev->fb_count); | ||
794 | |||
795 | mutex_unlock(&dev->fb_open_lock); | ||
796 | |||
797 | return 0; | ||
798 | } | ||
799 | |||
800 | /* | ||
801 | * Called when all client interfaces to start transactions have been disabled, | ||
802 | * and all references to our device instance (dlfb_data) are released. | ||
803 | * Every transaction must have a reference, so we know are fully spun down | ||
804 | */ | ||
805 | static void dlfb_delete(struct kref *kref) | ||
806 | { | ||
807 | struct dlfb_data *dev = container_of(kref, struct dlfb_data, kref); | ||
808 | |||
809 | if (dev->backing_buffer) | ||
810 | vfree(dev->backing_buffer); | ||
811 | |||
812 | mutex_destroy(&dev->fb_open_lock); | ||
813 | |||
814 | kfree(dev); | ||
815 | } | ||
816 | |||
817 | /* | ||
818 | * Called by fbdev as last part of unregister_framebuffer() process | ||
819 | * No new clients can open connections. Deallocate everything fb_info. | ||
820 | */ | ||
821 | static void dlfb_ops_destroy(struct fb_info *info) | ||
822 | { | ||
823 | struct dlfb_data *dev = info->par; | ||
824 | |||
825 | if (info->cmap.len != 0) | ||
826 | fb_dealloc_cmap(&info->cmap); | ||
827 | if (info->monspecs.modedb) | ||
828 | fb_destroy_modedb(info->monspecs.modedb); | ||
829 | if (info->screen_base) | ||
830 | vfree(info->screen_base); | ||
831 | |||
832 | fb_destroy_modelist(&info->modelist); | ||
833 | |||
834 | framebuffer_release(info); | ||
835 | |||
836 | /* ref taken before register_framebuffer() for dlfb_data clients */ | ||
837 | kref_put(&dev->kref, dlfb_delete); | ||
838 | } | ||
839 | |||
840 | /* | ||
841 | * Check whether a video mode is supported by the DisplayLink chip | ||
842 | * We start from monitor's modes, so don't need to filter that here | ||
843 | */ | ||
844 | static int dlfb_is_valid_mode(struct fb_videomode *mode, | ||
845 | struct fb_info *info) | ||
846 | { | ||
847 | struct dlfb_data *dev = info->par; | ||
848 | |||
849 | if (mode->xres * mode->yres > dev->sku_pixel_limit) | ||
850 | return 0; | ||
851 | |||
852 | return 1; | ||
853 | } | ||
854 | |||
855 | static void dlfb_var_color_format(struct fb_var_screeninfo *var) | ||
856 | { | ||
857 | const struct fb_bitfield red = { 11, 5, 0 }; | ||
858 | const struct fb_bitfield green = { 5, 6, 0 }; | ||
859 | const struct fb_bitfield blue = { 0, 5, 0 }; | ||
860 | |||
861 | var->bits_per_pixel = 16; | ||
862 | var->red = red; | ||
863 | var->green = green; | ||
864 | var->blue = blue; | ||
865 | } | ||
866 | |||
867 | static int dlfb_ops_check_var(struct fb_var_screeninfo *var, | ||
868 | struct fb_info *info) | ||
692 | { | 869 | { |
693 | struct dlfb_data *dev_info = info->par; | 870 | struct fb_videomode mode; |
694 | image_blit(dev_info, 0, 0, info->var.xres, info->var.yres, | 871 | |
695 | info->screen_base); | 872 | /* TODO: support dynamically changing framebuffer size */ |
873 | if ((var->xres * var->yres * 2) > info->fix.smem_len) | ||
874 | return -EINVAL; | ||
875 | |||
876 | /* set device-specific elements of var unrelated to mode */ | ||
877 | dlfb_var_color_format(var); | ||
878 | |||
879 | fb_var_to_videomode(&mode, var); | ||
880 | |||
881 | if (!dlfb_is_valid_mode(&mode, info)) | ||
882 | return -EINVAL; | ||
883 | |||
696 | return 0; | 884 | return 0; |
697 | } | 885 | } |
698 | 886 | ||
699 | static int dlfb_blank(int blank_mode, struct fb_info *info) | 887 | static int dlfb_ops_set_par(struct fb_info *info) |
700 | { | 888 | { |
701 | struct dlfb_data *dev_info = info->par; | 889 | struct dlfb_data *dev = info->par; |
702 | char *bufptr = dev_info->buf; | 890 | |
891 | dl_notice("set_par mode %dx%d\n", info->var.xres, info->var.yres); | ||
703 | 892 | ||
704 | bufptr = dlfb_set_register(bufptr, 0xFF, 0x00); | 893 | return dlfb_set_video_mode(dev, &info->var); |
894 | } | ||
895 | |||
896 | static int dlfb_ops_blank(int blank_mode, struct fb_info *info) | ||
897 | { | ||
898 | struct dlfb_data *dev = info->par; | ||
899 | char *bufptr; | ||
900 | struct urb *urb; | ||
901 | |||
902 | urb = dlfb_get_urb(dev); | ||
903 | if (!urb) | ||
904 | return 0; | ||
905 | bufptr = (char *) urb->transfer_buffer; | ||
906 | |||
907 | /* overloading usb_active. UNBLANK can conflict with teardown */ | ||
908 | |||
909 | bufptr = dlfb_vidreg_lock(bufptr); | ||
705 | if (blank_mode != FB_BLANK_UNBLANK) { | 910 | if (blank_mode != FB_BLANK_UNBLANK) { |
706 | bufptr = dlfb_set_register(bufptr, 0x1F, 0x01); | 911 | atomic_set(&dev->usb_active, 0); |
912 | bufptr = dlfb_enable_hvsync(bufptr, false); | ||
707 | } else { | 913 | } else { |
708 | bufptr = dlfb_set_register(bufptr, 0x1F, 0x00); | 914 | atomic_set(&dev->usb_active, 1); |
915 | bufptr = dlfb_enable_hvsync(bufptr, true); | ||
709 | } | 916 | } |
710 | bufptr = dlfb_set_register(bufptr, 0xFF, 0xFF); | 917 | bufptr = dlfb_vidreg_unlock(bufptr); |
711 | 918 | ||
712 | dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 919 | dlfb_submit_urb(dev, urb, bufptr - (char *) urb->transfer_buffer); |
713 | 920 | ||
714 | return 0; | 921 | return 0; |
715 | } | 922 | } |
716 | 923 | ||
717 | static struct fb_ops dlfb_ops = { | 924 | static struct fb_ops dlfb_ops = { |
718 | .fb_setcolreg = dlfb_setcolreg, | 925 | .owner = THIS_MODULE, |
719 | .fb_fillrect = dlfb_fillrect, | 926 | .fb_setcolreg = dlfb_ops_setcolreg, |
720 | .fb_copyarea = dlfb_copyarea, | 927 | .fb_fillrect = dlfb_ops_fillrect, |
721 | .fb_imageblit = dlfb_imageblit, | 928 | .fb_copyarea = dlfb_ops_copyarea, |
722 | .fb_mmap = dlfb_mmap, | 929 | .fb_imageblit = dlfb_ops_imageblit, |
723 | .fb_ioctl = dlfb_ioctl, | 930 | .fb_mmap = dlfb_ops_mmap, |
724 | .fb_release = dlfb_release, | 931 | .fb_ioctl = dlfb_ops_ioctl, |
725 | .fb_blank = dlfb_blank, | 932 | .fb_open = dlfb_ops_open, |
933 | .fb_release = dlfb_ops_release, | ||
934 | .fb_blank = dlfb_ops_blank, | ||
935 | .fb_check_var = dlfb_ops_check_var, | ||
936 | .fb_set_par = dlfb_ops_set_par, | ||
726 | }; | 937 | }; |
727 | 938 | ||
728 | static int | 939 | /* |
729 | dlfb_probe(struct usb_interface *interface, const struct usb_device_id *id) | 940 | * Calls dlfb_get_edid() to query the EDID of attached monitor via usb cmds |
941 | * Then parses EDID into three places used by various parts of fbdev: | ||
942 | * fb_var_screeninfo contains the timing of the monitor's preferred mode | ||
943 | * fb_info.monspecs is full parsed EDID info, including monspecs.modedb | ||
944 | * fb_info.modelist is a linked list of all monitor & VESA modes which work | ||
945 | * | ||
946 | * If EDID is not readable/valid, then modelist is all VESA modes, | ||
947 | * monspecs is NULL, and fb_var_screeninfo is set to safe VESA mode | ||
948 | * Returns 0 if EDID parses successfully | ||
949 | */ | ||
950 | static int dlfb_parse_edid(struct dlfb_data *dev, | ||
951 | struct fb_var_screeninfo *var, | ||
952 | struct fb_info *info) | ||
730 | { | 953 | { |
731 | struct dlfb_data *dev_info; | 954 | int i; |
732 | struct fb_info *info; | 955 | const struct fb_videomode *default_vmode = NULL; |
956 | int result = 0; | ||
733 | 957 | ||
734 | int ret; | 958 | fb_destroy_modelist(&info->modelist); |
735 | char rbuf[4]; | 959 | memset(&info->monspecs, 0, sizeof(info->monspecs)); |
736 | 960 | ||
737 | dev_info = kzalloc(sizeof(*dev_info), GFP_KERNEL); | 961 | dlfb_get_edid(dev); |
738 | if (dev_info == NULL) { | 962 | fb_edid_to_monspecs(dev->edid, &info->monspecs); |
739 | printk("cannot allocate dev_info structure.\n"); | 963 | |
740 | return -ENOMEM; | 964 | if (info->monspecs.modedb_len > 0) { |
965 | |||
966 | for (i = 0; i < info->monspecs.modedb_len; i++) { | ||
967 | if (dlfb_is_valid_mode(&info->monspecs.modedb[i], info)) | ||
968 | fb_add_videomode(&info->monspecs.modedb[i], | ||
969 | &info->modelist); | ||
970 | } | ||
971 | |||
972 | default_vmode = fb_find_best_display(&info->monspecs, | ||
973 | &info->modelist); | ||
974 | } else { | ||
975 | struct fb_videomode fb_vmode = {0}; | ||
976 | |||
977 | dl_err("Unable to get valid EDID from device/display\n"); | ||
978 | result = 1; | ||
979 | |||
980 | /* | ||
981 | * Add the standard VESA modes to our modelist | ||
982 | * Since we don't have EDID, there may be modes that | ||
983 | * overspec monitor and/or are incorrect aspect ratio, etc. | ||
984 | * But at least the user has a chance to choose | ||
985 | */ | ||
986 | for (i = 0; i < VESA_MODEDB_SIZE; i++) { | ||
987 | if (dlfb_is_valid_mode((struct fb_videomode *) | ||
988 | &vesa_modes[i], info)) | ||
989 | fb_add_videomode(&vesa_modes[i], | ||
990 | &info->modelist); | ||
991 | } | ||
992 | |||
993 | /* | ||
994 | * default to resolution safe for projectors | ||
995 | * (since they are most common case without EDID) | ||
996 | */ | ||
997 | fb_vmode.xres = 800; | ||
998 | fb_vmode.yres = 600; | ||
999 | fb_vmode.refresh = 60; | ||
1000 | default_vmode = fb_find_nearest_mode(&fb_vmode, | ||
1001 | &info->modelist); | ||
741 | } | 1002 | } |
742 | 1003 | ||
743 | mutex_init(&dev_info->bulk_mutex); | 1004 | fb_videomode_to_var(var, default_vmode); |
1005 | dlfb_var_color_format(var); | ||
744 | 1006 | ||
745 | dev_info->udev = usb_get_dev(interface_to_usbdev(interface)); | 1007 | return result; |
746 | dev_info->interface = interface; | 1008 | } |
747 | 1009 | ||
748 | printk("DisplayLink device attached\n"); | 1010 | static ssize_t metrics_bytes_rendered_show(struct device *fbdev, |
1011 | struct device_attribute *a, char *buf) { | ||
1012 | struct fb_info *fb_info = dev_get_drvdata(fbdev); | ||
1013 | struct dlfb_data *dev = fb_info->par; | ||
1014 | return snprintf(buf, PAGE_SIZE, "%u\n", | ||
1015 | atomic_read(&dev->bytes_rendered)); | ||
1016 | } | ||
749 | 1017 | ||
750 | /* add framebuffer info to usb interface */ | 1018 | static ssize_t metrics_bytes_identical_show(struct device *fbdev, |
751 | usb_set_intfdata(interface, dev_info); | 1019 | struct device_attribute *a, char *buf) { |
1020 | struct fb_info *fb_info = dev_get_drvdata(fbdev); | ||
1021 | struct dlfb_data *dev = fb_info->par; | ||
1022 | return snprintf(buf, PAGE_SIZE, "%u\n", | ||
1023 | atomic_read(&dev->bytes_identical)); | ||
1024 | } | ||
752 | 1025 | ||
753 | dev_info->buf = kmalloc(BUF_SIZE, GFP_KERNEL); | 1026 | static ssize_t metrics_bytes_sent_show(struct device *fbdev, |
754 | /* usb_buffer_alloc(dev_info->udev, BUF_SIZE , GFP_KERNEL, &dev_info->tx_urb->transfer_dma); */ | 1027 | struct device_attribute *a, char *buf) { |
1028 | struct fb_info *fb_info = dev_get_drvdata(fbdev); | ||
1029 | struct dlfb_data *dev = fb_info->par; | ||
1030 | return snprintf(buf, PAGE_SIZE, "%u\n", | ||
1031 | atomic_read(&dev->bytes_sent)); | ||
1032 | } | ||
755 | 1033 | ||
756 | if (dev_info->buf == NULL) { | 1034 | static ssize_t metrics_cpu_kcycles_used_show(struct device *fbdev, |
757 | printk("unable to allocate memory for dlfb commands\n"); | 1035 | struct device_attribute *a, char *buf) { |
758 | goto out; | 1036 | struct fb_info *fb_info = dev_get_drvdata(fbdev); |
759 | } | 1037 | struct dlfb_data *dev = fb_info->par; |
760 | dev_info->bufend = dev_info->buf + BUF_SIZE; | 1038 | return snprintf(buf, PAGE_SIZE, "%u\n", |
1039 | atomic_read(&dev->cpu_kcycles_used)); | ||
1040 | } | ||
761 | 1041 | ||
762 | dev_info->tx_urb = usb_alloc_urb(0, GFP_KERNEL); | 1042 | static ssize_t metrics_misc_show(struct device *fbdev, |
763 | usb_fill_bulk_urb(dev_info->tx_urb, dev_info->udev, | 1043 | struct device_attribute *a, char *buf) { |
764 | usb_sndbulkpipe(dev_info->udev, 1), dev_info->buf, 0, | 1044 | struct fb_info *fb_info = dev_get_drvdata(fbdev); |
765 | dlfb_bulk_callback, dev_info); | 1045 | struct dlfb_data *dev = fb_info->par; |
1046 | return snprintf(buf, PAGE_SIZE, | ||
1047 | "Calls to\ndamage: %u\nblit: %u\n" | ||
1048 | "defio faults: %u\ncopy: %u\n" | ||
1049 | "fill: %u\n\n" | ||
1050 | "active framebuffer clients: %d\n" | ||
1051 | "urbs available %d(%d)\n" | ||
1052 | "Shadow framebuffer in use? %s\n" | ||
1053 | "Any lost pixels? %s\n", | ||
1054 | atomic_read(&dev->damage_count), | ||
1055 | atomic_read(&dev->blit_count), | ||
1056 | atomic_read(&dev->defio_fault_count), | ||
1057 | atomic_read(&dev->copy_count), | ||
1058 | atomic_read(&dev->fill_count), | ||
1059 | dev->fb_count, | ||
1060 | dev->urbs.available, dev->urbs.limit_sem.count, | ||
1061 | (dev->backing_buffer) ? "yes" : "no", | ||
1062 | atomic_read(&dev->lost_pixels) ? "yes" : "no"); | ||
1063 | } | ||
766 | 1064 | ||
767 | ret = | 1065 | static ssize_t edid_show(struct kobject *kobj, struct bin_attribute *a, |
768 | usb_control_msg(dev_info->udev, usb_rcvctrlpipe(dev_info->udev, 0), | 1066 | char *buf, loff_t off, size_t count) { |
769 | (0x06), (0x80 | (0x02 << 5)), 0, 0, rbuf, 4, 0); | 1067 | struct device *fbdev = container_of(kobj, struct device, kobj); |
770 | printk("ret control msg 0: %d %x%x%x%x\n", ret, rbuf[0], rbuf[1], | 1068 | struct fb_info *fb_info = dev_get_drvdata(fbdev); |
771 | rbuf[2], rbuf[3]); | 1069 | struct dlfb_data *dev = fb_info->par; |
1070 | char *edid = &dev->edid[0]; | ||
1071 | const size_t size = sizeof(dev->edid); | ||
772 | 1072 | ||
773 | dlfb_edid(dev_info); | 1073 | if (dlfb_parse_edid(dev, &fb_info->var, fb_info)) |
1074 | return 0; | ||
774 | 1075 | ||
775 | info = framebuffer_alloc(sizeof(u32) * 256, &dev_info->udev->dev); | 1076 | if (off >= size) |
1077 | return 0; | ||
776 | 1078 | ||
777 | if (!info) { | 1079 | if (off + count > size) |
778 | printk("non posso allocare il framebuffer displaylink"); | 1080 | count = size - off; |
779 | goto out; | 1081 | memcpy(buf, edid + off, count); |
780 | } | ||
781 | 1082 | ||
782 | fb_parse_edid(dev_info->edid, &info->var); | 1083 | return count; |
1084 | } | ||
783 | 1085 | ||
784 | printk("EDID XRES %d YRES %d\n", info->var.xres, info->var.yres); | ||
785 | 1086 | ||
786 | if (dlfb_set_video_mode(dev_info, info->var.xres, info->var.yres) != 0) { | 1087 | static ssize_t metrics_reset_store(struct device *fbdev, |
787 | info->var.xres = 1280; | 1088 | struct device_attribute *attr, |
788 | info->var.yres = 1024; | 1089 | const char *buf, size_t count) |
789 | if (dlfb_set_video_mode | 1090 | { |
790 | (dev_info, info->var.xres, info->var.yres) != 0) { | 1091 | struct fb_info *fb_info = dev_get_drvdata(fbdev); |
791 | goto out; | 1092 | struct dlfb_data *dev = fb_info->par; |
792 | } | 1093 | |
1094 | atomic_set(&dev->bytes_rendered, 0); | ||
1095 | atomic_set(&dev->bytes_identical, 0); | ||
1096 | atomic_set(&dev->bytes_sent, 0); | ||
1097 | atomic_set(&dev->cpu_kcycles_used, 0); | ||
1098 | atomic_set(&dev->blit_count, 0); | ||
1099 | atomic_set(&dev->copy_count, 0); | ||
1100 | atomic_set(&dev->fill_count, 0); | ||
1101 | atomic_set(&dev->defio_fault_count, 0); | ||
1102 | atomic_set(&dev->damage_count, 0); | ||
1103 | |||
1104 | return count; | ||
1105 | } | ||
1106 | |||
1107 | static ssize_t use_defio_show(struct device *fbdev, | ||
1108 | struct device_attribute *a, char *buf) { | ||
1109 | struct fb_info *fb_info = dev_get_drvdata(fbdev); | ||
1110 | struct dlfb_data *dev = fb_info->par; | ||
1111 | return snprintf(buf, PAGE_SIZE, "%d\n", | ||
1112 | atomic_read(&dev->use_defio)); | ||
1113 | } | ||
1114 | |||
1115 | static ssize_t use_defio_store(struct device *fbdev, | ||
1116 | struct device_attribute *attr, | ||
1117 | const char *buf, size_t count) | ||
1118 | { | ||
1119 | struct fb_info *fb_info = dev_get_drvdata(fbdev); | ||
1120 | struct dlfb_data *dev = fb_info->par; | ||
1121 | |||
1122 | if (count > 0) { | ||
1123 | if (buf[0] == '0') | ||
1124 | atomic_set(&dev->use_defio, 0); | ||
1125 | if (buf[0] == '1') | ||
1126 | atomic_set(&dev->use_defio, 1); | ||
793 | } | 1127 | } |
1128 | return count; | ||
1129 | } | ||
794 | 1130 | ||
795 | printk("found valid mode...%d\n", info->var.pixclock); | 1131 | static struct bin_attribute edid_attr = { |
1132 | .attr.name = "edid", | ||
1133 | .attr.mode = 0444, | ||
1134 | .size = 128, | ||
1135 | .read = edid_show, | ||
1136 | }; | ||
796 | 1137 | ||
797 | info->pseudo_palette = info->par; | 1138 | static struct device_attribute fb_device_attrs[] = { |
798 | info->par = dev_info; | 1139 | __ATTR_RO(metrics_bytes_rendered), |
1140 | __ATTR_RO(metrics_bytes_identical), | ||
1141 | __ATTR_RO(metrics_bytes_sent), | ||
1142 | __ATTR_RO(metrics_cpu_kcycles_used), | ||
1143 | __ATTR_RO(metrics_misc), | ||
1144 | __ATTR(metrics_reset, S_IWUGO, NULL, metrics_reset_store), | ||
1145 | __ATTR_RW(use_defio), | ||
1146 | }; | ||
799 | 1147 | ||
800 | dev_info->info = info; | 1148 | #ifdef CONFIG_FB_DEFERRED_IO |
1149 | static void dlfb_dpy_deferred_io(struct fb_info *info, | ||
1150 | struct list_head *pagelist) | ||
1151 | { | ||
1152 | struct page *cur; | ||
1153 | struct fb_deferred_io *fbdefio = info->fbdefio; | ||
1154 | struct dlfb_data *dev = info->par; | ||
1155 | struct urb *urb; | ||
1156 | char *cmd; | ||
1157 | cycles_t start_cycles, end_cycles; | ||
1158 | int bytes_sent = 0; | ||
1159 | int bytes_identical = 0; | ||
1160 | int bytes_rendered = 0; | ||
1161 | int fault_count = 0; | ||
1162 | |||
1163 | if (!atomic_read(&dev->use_defio)) | ||
1164 | return; | ||
801 | 1165 | ||
802 | info->flags = | 1166 | if (!atomic_read(&dev->usb_active)) |
803 | FBINFO_DEFAULT | FBINFO_READS_FAST | FBINFO_HWACCEL_IMAGEBLIT | | 1167 | return; |
804 | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; | 1168 | |
805 | info->fbops = &dlfb_ops; | 1169 | start_cycles = get_cycles(); |
806 | info->screen_base = rvmalloc(dev_info->screen_size); | ||
807 | 1170 | ||
808 | if (info->screen_base == NULL) { | 1171 | urb = dlfb_get_urb(dev); |
809 | printk | 1172 | if (!urb) |
810 | ("cannot allocate framebuffer virtual memory of %d bytes\n", | 1173 | return; |
811 | dev_info->screen_size); | 1174 | cmd = urb->transfer_buffer; |
812 | goto out0; | 1175 | |
1176 | /* walk the written page list and render each to device */ | ||
1177 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { | ||
1178 | dlfb_render_hline(dev, &urb, (char *) info->fix.smem_start, | ||
1179 | &cmd, cur->index << PAGE_SHIFT, | ||
1180 | PAGE_SIZE, &bytes_identical, &bytes_sent); | ||
1181 | bytes_rendered += PAGE_SIZE; | ||
1182 | fault_count++; | ||
813 | } | 1183 | } |
814 | 1184 | ||
815 | printk("screen base allocated !!!\n"); | 1185 | if (cmd > (char *) urb->transfer_buffer) { |
1186 | /* Send partial buffer remaining before exiting */ | ||
1187 | int len = cmd - (char *) urb->transfer_buffer; | ||
1188 | dlfb_submit_urb(dev, urb, len); | ||
1189 | bytes_sent += len; | ||
1190 | } else | ||
1191 | dlfb_urb_completion(urb); | ||
1192 | |||
1193 | atomic_add(fault_count, &dev->defio_fault_count); | ||
1194 | atomic_add(bytes_sent, &dev->bytes_sent); | ||
1195 | atomic_add(bytes_identical, &dev->bytes_identical); | ||
1196 | atomic_add(bytes_rendered, &dev->bytes_rendered); | ||
1197 | end_cycles = get_cycles(); | ||
1198 | atomic_add(((unsigned int) ((end_cycles - start_cycles) | ||
1199 | >> 10)), /* Kcycles */ | ||
1200 | &dev->cpu_kcycles_used); | ||
1201 | } | ||
816 | 1202 | ||
817 | dev_info->backing_buffer = kzalloc(dev_info->screen_size, GFP_KERNEL); | 1203 | static struct fb_deferred_io dlfb_defio = { |
1204 | .delay = 5, | ||
1205 | .deferred_io = dlfb_dpy_deferred_io, | ||
1206 | }; | ||
818 | 1207 | ||
819 | if (!dev_info->backing_buffer) | 1208 | #endif |
820 | printk("non posso allocare il backing buffer\n"); | ||
821 | 1209 | ||
822 | /* info->var = dev_info->si; */ | 1210 | /* |
1211 | * This is necessary before we can communicate with the display controller. | ||
1212 | */ | ||
1213 | static int dlfb_select_std_channel(struct dlfb_data *dev) | ||
1214 | { | ||
1215 | int ret; | ||
1216 | u8 set_def_chn[] = { 0x57, 0xCD, 0xDC, 0xA7, | ||
1217 | 0x1C, 0x88, 0x5E, 0x15, | ||
1218 | 0x60, 0xFE, 0xC6, 0x97, | ||
1219 | 0x16, 0x3D, 0x47, 0xF2 }; | ||
1220 | |||
1221 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), | ||
1222 | NR_USB_REQUEST_CHANNEL, | ||
1223 | (USB_DIR_OUT | USB_TYPE_VENDOR), 0, 0, | ||
1224 | set_def_chn, sizeof(set_def_chn), USB_CTRL_SET_TIMEOUT); | ||
1225 | return ret; | ||
1226 | } | ||
823 | 1227 | ||
824 | info->var.bits_per_pixel = 16; | ||
825 | info->var.activate = FB_ACTIVATE_TEST; | ||
826 | info->var.vmode = FB_VMODE_NONINTERLACED; | ||
827 | 1228 | ||
828 | info->var.red.offset = 11; | 1229 | static int dlfb_usb_probe(struct usb_interface *interface, |
829 | info->var.red.length = 5; | 1230 | const struct usb_device_id *id) |
830 | info->var.red.msb_right = 0; | 1231 | { |
1232 | struct usb_device *usbdev; | ||
1233 | struct dlfb_data *dev; | ||
1234 | struct fb_info *info; | ||
1235 | int videomemorysize; | ||
1236 | int i; | ||
1237 | unsigned char *videomemory; | ||
1238 | int retval = -ENOMEM; | ||
1239 | struct fb_var_screeninfo *var; | ||
1240 | int registered = 0; | ||
1241 | u16 *pix_framebuffer; | ||
1242 | |||
1243 | /* usb initialization */ | ||
1244 | |||
1245 | usbdev = interface_to_usbdev(interface); | ||
1246 | |||
1247 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | ||
1248 | if (dev == NULL) { | ||
1249 | err("dlfb_usb_probe: failed alloc of dev struct\n"); | ||
1250 | goto error; | ||
1251 | } | ||
831 | 1252 | ||
832 | info->var.green.offset = 5; | 1253 | /* we need to wait for both usb and fbdev to spin down on disconnect */ |
833 | info->var.green.length = 6; | 1254 | kref_init(&dev->kref); /* matching kref_put in usb .disconnect fn */ |
834 | info->var.green.msb_right = 0; | 1255 | kref_get(&dev->kref); /* matching kref_put in .fb_destroy function*/ |
835 | 1256 | ||
836 | info->var.blue.offset = 0; | 1257 | dev->udev = usbdev; |
837 | info->var.blue.length = 5; | 1258 | dev->gdev = &usbdev->dev; /* our generic struct device * */ |
838 | info->var.blue.msb_right = 0; | 1259 | usb_set_intfdata(interface, dev); |
839 | 1260 | ||
840 | /* info->var.pixclock = (10000000 / FB_W * 1000 / FB_H)/2 ; */ | 1261 | if (!dlfb_alloc_urb_list(dev, WRITES_IN_FLIGHT, MAX_TRANSFER)) { |
1262 | retval = -ENOMEM; | ||
1263 | dl_err("dlfb_alloc_urb_list failed\n"); | ||
1264 | goto error; | ||
1265 | } | ||
841 | 1266 | ||
842 | info->fix.smem_start = (unsigned long)info->screen_base; | 1267 | mutex_init(&dev->fb_open_lock); |
843 | info->fix.smem_len = PAGE_ALIGN(dev_info->screen_size); | 1268 | |
844 | if (strlen(dev_info->udev->product) > 15) { | 1269 | /* We don't register a new USB class. Our client interface is fbdev */ |
845 | memcpy(info->fix.id, dev_info->udev->product, 15); | 1270 | |
846 | } else { | 1271 | /* allocates framebuffer driver structure, not framebuffer memory */ |
847 | memcpy(info->fix.id, dev_info->udev->product, | 1272 | info = framebuffer_alloc(0, &usbdev->dev); |
848 | strlen(dev_info->udev->product)); | 1273 | if (!info) { |
1274 | retval = -ENOMEM; | ||
1275 | dl_err("framebuffer_alloc failed\n"); | ||
1276 | goto error; | ||
1277 | } | ||
1278 | dev->info = info; | ||
1279 | info->par = dev; | ||
1280 | info->pseudo_palette = dev->pseudo_palette; | ||
1281 | info->fbops = &dlfb_ops; | ||
1282 | |||
1283 | var = &info->var; | ||
1284 | |||
1285 | /* TODO set limit based on actual SKU detection */ | ||
1286 | dev->sku_pixel_limit = 2048 * 1152; | ||
1287 | |||
1288 | INIT_LIST_HEAD(&info->modelist); | ||
1289 | dlfb_parse_edid(dev, var, info); | ||
1290 | |||
1291 | /* | ||
1292 | * ok, now that we've got the size info, we can alloc our framebuffer. | ||
1293 | */ | ||
1294 | info->fix = dlfb_fix; | ||
1295 | info->fix.line_length = var->xres * (var->bits_per_pixel / 8); | ||
1296 | videomemorysize = info->fix.line_length * var->yres; | ||
1297 | |||
1298 | /* | ||
1299 | * The big chunk of system memory we use as a virtual framebuffer. | ||
1300 | * TODO: Handle fbcon cursor code calling blit in interrupt context | ||
1301 | */ | ||
1302 | videomemory = vmalloc(videomemorysize); | ||
1303 | if (!videomemory) { | ||
1304 | retval = -ENOMEM; | ||
1305 | dl_err("Virtual framebuffer alloc failed\n"); | ||
1306 | goto error; | ||
849 | } | 1307 | } |
850 | info->fix.type = FB_TYPE_PACKED_PIXELS; | ||
851 | info->fix.visual = FB_VISUAL_TRUECOLOR; | ||
852 | info->fix.accel = info->flags; | ||
853 | info->fix.line_length = dev_info->line_length; | ||
854 | 1308 | ||
855 | if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) | 1309 | info->screen_base = videomemory; |
856 | goto out1; | 1310 | info->fix.smem_len = PAGE_ALIGN(videomemorysize); |
1311 | info->fix.smem_start = (unsigned long) videomemory; | ||
1312 | info->flags = udlfb_info_flags; | ||
1313 | |||
1314 | |||
1315 | /* | ||
1316 | * Second framebuffer copy, mirroring the state of the framebuffer | ||
1317 | * on the physical USB device. We can function without this. | ||
1318 | * But with imperfect damage info we may end up sending pixels over USB | ||
1319 | * that were, in fact, unchanged -- wasting limited USB bandwidth | ||
1320 | */ | ||
1321 | dev->backing_buffer = vmalloc(videomemorysize); | ||
1322 | if (!dev->backing_buffer) | ||
1323 | dl_warn("No shadow/backing buffer allcoated\n"); | ||
1324 | else | ||
1325 | memset(dev->backing_buffer, 0, videomemorysize); | ||
1326 | |||
1327 | retval = fb_alloc_cmap(&info->cmap, 256, 0); | ||
1328 | if (retval < 0) { | ||
1329 | dl_err("fb_alloc_cmap failed %x\n", retval); | ||
1330 | goto error; | ||
1331 | } | ||
1332 | |||
1333 | /* ready to begin using device */ | ||
1334 | |||
1335 | #ifdef CONFIG_FB_DEFERRED_IO | ||
1336 | atomic_set(&dev->use_defio, 1); | ||
1337 | #endif | ||
1338 | atomic_set(&dev->usb_active, 1); | ||
1339 | dlfb_select_std_channel(dev); | ||
1340 | |||
1341 | dlfb_ops_check_var(var, info); | ||
1342 | dlfb_ops_set_par(info); | ||
1343 | |||
1344 | /* paint greenscreen */ | ||
1345 | pix_framebuffer = (u16 *) videomemory; | ||
1346 | for (i = 0; i < videomemorysize / 2; i++) | ||
1347 | pix_framebuffer[i] = 0x37e6; | ||
1348 | |||
1349 | dlfb_handle_damage(dev, 0, 0, info->var.xres, info->var.yres, | ||
1350 | videomemory); | ||
857 | 1351 | ||
858 | printk("colormap allocated\n"); | 1352 | retval = register_framebuffer(info); |
859 | if (register_framebuffer(info) < 0) | 1353 | if (retval < 0) { |
860 | goto out2; | 1354 | dl_err("register_framebuffer failed %d\n", retval); |
1355 | goto error; | ||
1356 | } | ||
1357 | registered = 1; | ||
1358 | |||
1359 | for (i = 0; i < ARRAY_SIZE(fb_device_attrs); i++) | ||
1360 | device_create_file(info->dev, &fb_device_attrs[i]); | ||
861 | 1361 | ||
862 | draw_rect(dev_info, 0, 0, dev_info->info->var.xres, | 1362 | device_create_bin_file(info->dev, &edid_attr); |
863 | dev_info->info->var.yres, 0x30, 0xff, 0x30); | ||
864 | 1363 | ||
1364 | dl_err("DisplayLink USB device /dev/fb%d attached. %dx%d resolution." | ||
1365 | " Using %dK framebuffer memory\n", info->node, | ||
1366 | var->xres, var->yres, | ||
1367 | ((dev->backing_buffer) ? | ||
1368 | videomemorysize * 2 : videomemorysize) >> 10); | ||
865 | return 0; | 1369 | return 0; |
866 | 1370 | ||
867 | out2: | 1371 | error: |
868 | fb_dealloc_cmap(&info->cmap); | 1372 | if (dev) { |
869 | out1: | 1373 | if (registered) { |
870 | rvfree(info->screen_base, dev_info->screen_size); | 1374 | unregister_framebuffer(info); |
871 | out0: | 1375 | dlfb_ops_destroy(info); |
872 | framebuffer_release(info); | 1376 | } else |
873 | out: | 1377 | kref_put(&dev->kref, dlfb_delete); |
874 | usb_set_intfdata(interface, NULL); | 1378 | |
875 | usb_put_dev(dev_info->udev); | 1379 | if (dev->urbs.count > 0) |
876 | kfree(dev_info); | 1380 | dlfb_free_urb_list(dev); |
877 | return -ENOMEM; | 1381 | kref_put(&dev->kref, dlfb_delete); /* last ref from kref_init */ |
1382 | |||
1383 | /* dev has been deallocated. Do not dereference */ | ||
1384 | } | ||
878 | 1385 | ||
1386 | return retval; | ||
879 | } | 1387 | } |
880 | 1388 | ||
881 | static void dlfb_disconnect(struct usb_interface *interface) | 1389 | static void dlfb_usb_disconnect(struct usb_interface *interface) |
882 | { | 1390 | { |
883 | struct dlfb_data *dev_info = usb_get_intfdata(interface); | 1391 | struct dlfb_data *dev; |
1392 | struct fb_info *info; | ||
1393 | int i; | ||
1394 | |||
1395 | dev = usb_get_intfdata(interface); | ||
1396 | info = dev->info; | ||
884 | 1397 | ||
885 | mutex_unlock(&dev_info->bulk_mutex); | 1398 | /* when non-active we'll update virtual framebuffer, but no new urbs */ |
1399 | atomic_set(&dev->usb_active, 0); | ||
886 | 1400 | ||
887 | usb_kill_urb(dev_info->tx_urb); | ||
888 | usb_free_urb(dev_info->tx_urb); | ||
889 | usb_set_intfdata(interface, NULL); | 1401 | usb_set_intfdata(interface, NULL); |
890 | usb_put_dev(dev_info->udev); | ||
891 | 1402 | ||
892 | if (dev_info->info) { | 1403 | for (i = 0; i < ARRAY_SIZE(fb_device_attrs); i++) |
893 | unregister_framebuffer(dev_info->info); | 1404 | device_remove_file(info->dev, &fb_device_attrs[i]); |
894 | fb_dealloc_cmap(&dev_info->info->cmap); | 1405 | |
895 | rvfree(dev_info->info->screen_base, dev_info->screen_size); | 1406 | device_remove_bin_file(info->dev, &edid_attr); |
896 | kfree(dev_info->backing_buffer); | ||
897 | framebuffer_release(dev_info->info); | ||
898 | 1407 | ||
1408 | /* this function will wait for all in-flight urbs to complete */ | ||
1409 | dlfb_free_urb_list(dev); | ||
1410 | |||
1411 | if (info) { | ||
1412 | dl_notice("Detaching /dev/fb%d\n", info->node); | ||
1413 | unregister_framebuffer(info); | ||
1414 | dlfb_ops_destroy(info); | ||
899 | } | 1415 | } |
900 | 1416 | ||
901 | kfree(dev_info); | 1417 | /* release reference taken by kref_init in probe() */ |
1418 | kref_put(&dev->kref, dlfb_delete); | ||
1419 | |||
1420 | /* consider dlfb_data freed */ | ||
902 | 1421 | ||
903 | printk("DisplayLink device disconnected\n"); | 1422 | return; |
904 | } | 1423 | } |
905 | 1424 | ||
906 | static struct usb_driver dlfb_driver = { | 1425 | static struct usb_driver dlfb_driver = { |
907 | .name = "udlfb", | 1426 | .name = "udlfb", |
908 | .probe = dlfb_probe, | 1427 | .probe = dlfb_usb_probe, |
909 | .disconnect = dlfb_disconnect, | 1428 | .disconnect = dlfb_usb_disconnect, |
910 | .id_table = id_table, | 1429 | .id_table = id_table, |
911 | }; | 1430 | }; |
912 | 1431 | ||
913 | static int __init dlfb_init(void) | 1432 | static int __init dlfb_module_init(void) |
914 | { | 1433 | { |
915 | int res; | 1434 | int res; |
916 | 1435 | ||
917 | dlfb_init_modes(); | ||
918 | |||
919 | res = usb_register(&dlfb_driver); | 1436 | res = usb_register(&dlfb_driver); |
920 | if (res) | 1437 | if (res) |
921 | err("usb_register failed. Error number %d", res); | 1438 | err("usb_register failed. Error number %d", res); |
@@ -925,14 +1442,186 @@ static int __init dlfb_init(void) | |||
925 | return res; | 1442 | return res; |
926 | } | 1443 | } |
927 | 1444 | ||
928 | static void __exit dlfb_exit(void) | 1445 | static void __exit dlfb_module_exit(void) |
929 | { | 1446 | { |
930 | usb_deregister(&dlfb_driver); | 1447 | usb_deregister(&dlfb_driver); |
931 | } | 1448 | } |
932 | 1449 | ||
933 | module_init(dlfb_init); | 1450 | module_init(dlfb_module_init); |
934 | module_exit(dlfb_exit); | 1451 | module_exit(dlfb_module_exit); |
935 | 1452 | ||
936 | MODULE_AUTHOR("Roberto De Ioris <roberto@unbit.it>"); | 1453 | static void dlfb_urb_completion(struct urb *urb) |
937 | MODULE_DESCRIPTION(DRIVER_VERSION); | 1454 | { |
1455 | struct urb_node *unode = urb->context; | ||
1456 | struct dlfb_data *dev = unode->dev; | ||
1457 | unsigned long flags; | ||
1458 | |||
1459 | /* sync/async unlink faults aren't errors */ | ||
1460 | if (urb->status) { | ||
1461 | if (!(urb->status == -ENOENT || | ||
1462 | urb->status == -ECONNRESET || | ||
1463 | urb->status == -ESHUTDOWN)) { | ||
1464 | dl_err("%s - nonzero write bulk status received: %d\n", | ||
1465 | __func__, urb->status); | ||
1466 | atomic_set(&dev->lost_pixels, 1); | ||
1467 | } | ||
1468 | } | ||
1469 | |||
1470 | urb->transfer_buffer_length = dev->urbs.size; /* reset to actual */ | ||
1471 | |||
1472 | spin_lock_irqsave(&dev->urbs.lock, flags); | ||
1473 | list_add_tail(&unode->entry, &dev->urbs.list); | ||
1474 | dev->urbs.available++; | ||
1475 | spin_unlock_irqrestore(&dev->urbs.lock, flags); | ||
1476 | |||
1477 | up(&dev->urbs.limit_sem); | ||
1478 | } | ||
1479 | |||
1480 | static void dlfb_free_urb_list(struct dlfb_data *dev) | ||
1481 | { | ||
1482 | int count = dev->urbs.count; | ||
1483 | struct list_head *node; | ||
1484 | struct urb_node *unode; | ||
1485 | struct urb *urb; | ||
1486 | int ret; | ||
1487 | unsigned long flags; | ||
1488 | |||
1489 | dl_notice("Waiting for completes and freeing all render urbs\n"); | ||
1490 | |||
1491 | /* keep waiting and freeing, until we've got 'em all */ | ||
1492 | while (count--) { | ||
1493 | /* Timeout means a memory leak and/or fault */ | ||
1494 | ret = down_timeout(&dev->urbs.limit_sem, FREE_URB_TIMEOUT); | ||
1495 | if (ret) { | ||
1496 | BUG_ON(ret); | ||
1497 | break; | ||
1498 | } | ||
1499 | spin_lock_irqsave(&dev->urbs.lock, flags); | ||
1500 | |||
1501 | node = dev->urbs.list.next; /* have reserved one with sem */ | ||
1502 | list_del_init(node); | ||
1503 | |||
1504 | spin_unlock_irqrestore(&dev->urbs.lock, flags); | ||
1505 | |||
1506 | unode = list_entry(node, struct urb_node, entry); | ||
1507 | urb = unode->urb; | ||
1508 | |||
1509 | /* Free each separately allocated piece */ | ||
1510 | usb_buffer_free(urb->dev, dev->urbs.size, | ||
1511 | urb->transfer_buffer, urb->transfer_dma); | ||
1512 | usb_free_urb(urb); | ||
1513 | kfree(node); | ||
1514 | } | ||
1515 | |||
1516 | kref_put(&dev->kref, dlfb_delete); | ||
1517 | |||
1518 | } | ||
1519 | |||
1520 | static int dlfb_alloc_urb_list(struct dlfb_data *dev, int count, size_t size) | ||
1521 | { | ||
1522 | int i = 0; | ||
1523 | struct urb *urb; | ||
1524 | struct urb_node *unode; | ||
1525 | char *buf; | ||
1526 | |||
1527 | spin_lock_init(&dev->urbs.lock); | ||
1528 | |||
1529 | dev->urbs.size = size; | ||
1530 | INIT_LIST_HEAD(&dev->urbs.list); | ||
1531 | |||
1532 | while (i < count) { | ||
1533 | unode = kzalloc(sizeof(struct urb_node), GFP_KERNEL); | ||
1534 | if (!unode) | ||
1535 | break; | ||
1536 | unode->dev = dev; | ||
1537 | |||
1538 | urb = usb_alloc_urb(0, GFP_KERNEL); | ||
1539 | if (!urb) { | ||
1540 | kfree(unode); | ||
1541 | break; | ||
1542 | } | ||
1543 | unode->urb = urb; | ||
1544 | |||
1545 | buf = usb_buffer_alloc(dev->udev, MAX_TRANSFER, GFP_KERNEL, | ||
1546 | &urb->transfer_dma); | ||
1547 | if (!buf) { | ||
1548 | kfree(unode); | ||
1549 | usb_free_urb(urb); | ||
1550 | break; | ||
1551 | } | ||
1552 | |||
1553 | /* urb->transfer_buffer_length set to actual before submit */ | ||
1554 | usb_fill_bulk_urb(urb, dev->udev, usb_sndbulkpipe(dev->udev, 1), | ||
1555 | buf, size, dlfb_urb_completion, unode); | ||
1556 | urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; | ||
1557 | |||
1558 | list_add_tail(&unode->entry, &dev->urbs.list); | ||
1559 | |||
1560 | i++; | ||
1561 | } | ||
1562 | |||
1563 | sema_init(&dev->urbs.limit_sem, i); | ||
1564 | dev->urbs.count = i; | ||
1565 | dev->urbs.available = i; | ||
1566 | |||
1567 | kref_get(&dev->kref); /* released in free_render_urbs() */ | ||
1568 | |||
1569 | dl_notice("allocated %d %d byte urbs \n", i, (int) size); | ||
1570 | |||
1571 | return i; | ||
1572 | } | ||
1573 | |||
1574 | static struct urb *dlfb_get_urb(struct dlfb_data *dev) | ||
1575 | { | ||
1576 | int ret = 0; | ||
1577 | struct list_head *entry; | ||
1578 | struct urb_node *unode; | ||
1579 | struct urb *urb = NULL; | ||
1580 | unsigned long flags; | ||
1581 | |||
1582 | /* Wait for an in-flight buffer to complete and get re-queued */ | ||
1583 | ret = down_timeout(&dev->urbs.limit_sem, GET_URB_TIMEOUT); | ||
1584 | if (ret) { | ||
1585 | atomic_set(&dev->lost_pixels, 1); | ||
1586 | dl_err("wait for urb interrupted: %x\n", ret); | ||
1587 | goto error; | ||
1588 | } | ||
1589 | |||
1590 | spin_lock_irqsave(&dev->urbs.lock, flags); | ||
1591 | |||
1592 | BUG_ON(list_empty(&dev->urbs.list)); /* reserved one with limit_sem */ | ||
1593 | entry = dev->urbs.list.next; | ||
1594 | list_del_init(entry); | ||
1595 | dev->urbs.available--; | ||
1596 | |||
1597 | spin_unlock_irqrestore(&dev->urbs.lock, flags); | ||
1598 | |||
1599 | unode = list_entry(entry, struct urb_node, entry); | ||
1600 | urb = unode->urb; | ||
1601 | |||
1602 | error: | ||
1603 | return urb; | ||
1604 | } | ||
1605 | |||
1606 | static int dlfb_submit_urb(struct dlfb_data *dev, struct urb *urb, size_t len) | ||
1607 | { | ||
1608 | int ret; | ||
1609 | |||
1610 | BUG_ON(len > dev->urbs.size); | ||
1611 | |||
1612 | urb->transfer_buffer_length = len; /* set to actual payload len */ | ||
1613 | ret = usb_submit_urb(urb, GFP_KERNEL); | ||
1614 | if (ret) { | ||
1615 | dlfb_urb_completion(urb); /* because no one else will */ | ||
1616 | atomic_set(&dev->lost_pixels, 1); | ||
1617 | dl_err("usb_submit_urb error %x\n", ret); | ||
1618 | } | ||
1619 | return ret; | ||
1620 | } | ||
1621 | |||
1622 | MODULE_AUTHOR("Roberto De Ioris <roberto@unbit.it>, " | ||
1623 | "Jaya Kumar <jayakumar.lkml@gmail.com>, " | ||
1624 | "Bernie Thompson <bernie@plugable.com>"); | ||
1625 | MODULE_DESCRIPTION("DisplayLink kernel framebuffer driver"); | ||
938 | MODULE_LICENSE("GPL"); | 1626 | MODULE_LICENSE("GPL"); |
1627 | |||
diff --git a/drivers/staging/udlfb/udlfb.h b/drivers/staging/udlfb/udlfb.h index 40ad85ea8e67..b07a69371f1f 100644 --- a/drivers/staging/udlfb/udlfb.h +++ b/drivers/staging/udlfb/udlfb.h | |||
@@ -1,225 +1,106 @@ | |||
1 | #ifndef UDLFB_H | 1 | #ifndef UDLFB_H |
2 | #define UDLFB_H | 2 | #define UDLFB_H |
3 | 3 | ||
4 | #define MAX_VMODES 4 | 4 | /* |
5 | #define FB_BPP 16 | 5 | * TODO: Propose standard fb.h ioctl for reporting damage, |
6 | * using _IOWR() and one of the existing area structs from fb.h | ||
7 | * Consider these ioctls deprecated, but they're still used by the | ||
8 | * DisplayLink X server as yet - need both to be modified in tandem | ||
9 | * when new ioctl(s) are ready. | ||
10 | */ | ||
11 | #define DLFB_IOCTL_RETURN_EDID 0xAD | ||
12 | #define DLFB_IOCTL_REPORT_DAMAGE 0xAA | ||
13 | struct dloarea { | ||
14 | int x, y; | ||
15 | int w, h; | ||
16 | int x2, y2; | ||
17 | }; | ||
6 | 18 | ||
7 | #define STD_CHANNEL "\x57\xCD\xDC\xA7\x1C\x88\x5E\x15" \ | 19 | struct urb_node { |
8 | "\x60\xFE\xC6\x97\x16\x3D\x47\xF2" | 20 | struct list_head entry; |
21 | struct dlfb_data *dev; | ||
22 | struct urb *urb; | ||
23 | }; | ||
9 | 24 | ||
10 | /* as libdlo */ | 25 | struct urb_list { |
11 | #define BUF_HIGH_WATER_MARK 1024 | 26 | struct list_head list; |
12 | #define BUF_SIZE (64*1024) | 27 | spinlock_t lock; |
28 | struct semaphore limit_sem; | ||
29 | int available; | ||
30 | int count; | ||
31 | size_t size; | ||
32 | }; | ||
13 | 33 | ||
14 | struct dlfb_data { | 34 | struct dlfb_data { |
15 | struct usb_device *udev; | 35 | struct usb_device *udev; |
16 | struct usb_interface *interface; | 36 | struct device *gdev; /* &udev->dev */ |
17 | struct urb *tx_urb, *ctrl_urb; | ||
18 | struct usb_ctrlrequest dr; | ||
19 | struct fb_info *info; | 37 | struct fb_info *info; |
20 | char *buf; | 38 | struct urb_list urbs; |
21 | char *bufend; | 39 | struct kref kref; |
22 | char *backing_buffer; | 40 | char *backing_buffer; |
23 | struct mutex bulk_mutex; | 41 | struct delayed_work deferred_work; |
42 | struct mutex fb_open_lock; | ||
43 | int fb_count; | ||
44 | atomic_t usb_active; /* 0 = update virtual buffer, but no usb traffic */ | ||
45 | atomic_t lost_pixels; /* 1 = a render op failed. Need screen refresh */ | ||
46 | atomic_t use_defio; /* 0 = rely on ioctls and blit/copy/fill rects */ | ||
24 | char edid[128]; | 47 | char edid[128]; |
25 | int screen_size; | 48 | int sku_pixel_limit; |
26 | int line_length; | ||
27 | struct completion done; | ||
28 | int base16; | 49 | int base16; |
29 | int base16d; | ||
30 | int base8; | 50 | int base8; |
31 | int base8d; | 51 | u32 pseudo_palette[256]; |
52 | /* blit-only rendering path metrics, exposed through sysfs */ | ||
53 | atomic_t bytes_rendered; /* raw pixel-bytes driver asked to render */ | ||
54 | atomic_t bytes_identical; /* saved effort with backbuffer comparison */ | ||
55 | atomic_t bytes_sent; /* to usb, after compression including overhead */ | ||
56 | atomic_t cpu_kcycles_used; /* transpired during pixel processing */ | ||
57 | /* interface usage metrics. Clients can call driver via several */ | ||
58 | atomic_t blit_count; | ||
59 | atomic_t copy_count; | ||
60 | atomic_t fill_count; | ||
61 | atomic_t damage_count; | ||
62 | atomic_t defio_fault_count; | ||
32 | }; | 63 | }; |
33 | 64 | ||
34 | struct dlfb_video_mode { | 65 | #define NR_USB_REQUEST_I2C_SUB_IO 0x02 |
35 | uint8_t col; | 66 | #define NR_USB_REQUEST_CHANNEL 0x12 |
36 | uint32_t hclock; | ||
37 | uint32_t vclock; | ||
38 | uint8_t unknown1[6]; | ||
39 | uint16_t xres; | ||
40 | uint8_t unknown2[6]; | ||
41 | uint16_t yres; | ||
42 | uint8_t unknown3[4]; | ||
43 | } __attribute__ ((__packed__)); | ||
44 | |||
45 | static struct dlfb_video_mode dlfb_video_modes[MAX_VMODES]; | ||
46 | |||
47 | static void dlfb_bulk_callback(struct urb *urb) | ||
48 | { | ||
49 | struct dlfb_data *dev_info = urb->context; | ||
50 | complete(&dev_info->done); | ||
51 | } | ||
52 | |||
53 | static void dlfb_edid(struct dlfb_data *dev_info) | ||
54 | { | ||
55 | int i; | ||
56 | int ret; | ||
57 | char rbuf[2]; | ||
58 | |||
59 | for (i = 0; i < 128; i++) { | ||
60 | ret = | ||
61 | usb_control_msg(dev_info->udev, | ||
62 | usb_rcvctrlpipe(dev_info->udev, 0), (0x02), | ||
63 | (0x80 | (0x02 << 5)), i << 8, 0xA1, rbuf, 2, | ||
64 | 0); | ||
65 | /*printk("ret control msg edid %d: %d [%d]\n",i, ret, rbuf[1]); */ | ||
66 | dev_info->edid[i] = rbuf[1]; | ||
67 | } | ||
68 | |||
69 | } | ||
70 | |||
71 | static int dlfb_bulk_msg(struct dlfb_data *dev_info, int len) | ||
72 | { | ||
73 | int ret; | ||
74 | |||
75 | init_completion(&dev_info->done); | ||
76 | |||
77 | dev_info->tx_urb->actual_length = 0; | ||
78 | dev_info->tx_urb->transfer_buffer_length = len; | ||
79 | |||
80 | ret = usb_submit_urb(dev_info->tx_urb, GFP_KERNEL); | ||
81 | if (!wait_for_completion_timeout(&dev_info->done, 1000)) { | ||
82 | usb_kill_urb(dev_info->tx_urb); | ||
83 | printk("usb timeout !!!\n"); | ||
84 | } | ||
85 | |||
86 | return dev_info->tx_urb->actual_length; | ||
87 | } | ||
88 | |||
89 | static void dlfb_init_modes(void) | ||
90 | { | ||
91 | dlfb_video_modes[0].col = 0; | ||
92 | memcpy(&dlfb_video_modes[0].hclock, "\x20\x3C\x7A\xC9", 4); | ||
93 | memcpy(&dlfb_video_modes[0].vclock, "\xF2\x6C\x48\xF9", 4); | ||
94 | memcpy(&dlfb_video_modes[0].unknown1, "\x70\x53\xFF\xFF\x21\x27", 6); | ||
95 | dlfb_video_modes[0].xres = 800; | ||
96 | memcpy(&dlfb_video_modes[0].unknown2, "\x91\xF3\xFF\xFF\xFF\xF9", 6); | ||
97 | dlfb_video_modes[0].yres = 480; | ||
98 | memcpy(&dlfb_video_modes[0].unknown3, "\x01\x02\xC8\x19", 4); | ||
99 | |||
100 | dlfb_video_modes[1].col = 0; | ||
101 | memcpy(&dlfb_video_modes[1].hclock, "\x36\x18\xD5\x10", 4); | ||
102 | memcpy(&dlfb_video_modes[1].vclock, "\x60\xA9\x7B\x33", 4); | ||
103 | memcpy(&dlfb_video_modes[1].unknown1, "\xA1\x2B\x27\x32\xFF\xFF", 6); | ||
104 | dlfb_video_modes[1].xres = 1024; | ||
105 | memcpy(&dlfb_video_modes[1].unknown2, "\xD9\x9A\xFF\xCA\xFF\xFF", 6); | ||
106 | dlfb_video_modes[1].yres = 768; | ||
107 | memcpy(&dlfb_video_modes[1].unknown3, "\x04\x03\xC8\x32", 4); | ||
108 | |||
109 | dlfb_video_modes[2].col = 0; | ||
110 | memcpy(&dlfb_video_modes[2].hclock, "\x98\xF8\x0D\x57", 4); | ||
111 | memcpy(&dlfb_video_modes[2].vclock, "\x2A\x55\x4D\x54", 4); | ||
112 | memcpy(&dlfb_video_modes[2].unknown1, "\xCA\x0D\xFF\xFF\x94\x43", 6); | ||
113 | dlfb_video_modes[2].xres = 1280; | ||
114 | memcpy(&dlfb_video_modes[2].unknown2, "\x9A\xA8\xFF\xFF\xFF\xF9", 6); | ||
115 | dlfb_video_modes[2].yres = 1024; | ||
116 | memcpy(&dlfb_video_modes[2].unknown3, "\x04\x02\x60\x54", 4); | ||
117 | |||
118 | dlfb_video_modes[3].col = 0; | ||
119 | memcpy(&dlfb_video_modes[3].hclock, "\x42\x24\x38\x36", 4); | ||
120 | memcpy(&dlfb_video_modes[3].vclock, "\xC1\x52\xD9\x29", 4); | ||
121 | memcpy(&dlfb_video_modes[3].unknown1, "\xEA\xB8\x32\x60\xFF\xFF", 6); | ||
122 | dlfb_video_modes[3].xres = 1400; | ||
123 | memcpy(&dlfb_video_modes[3].unknown2, "\xC9\x4E\xFF\xFF\xFF\xF2", 6); | ||
124 | dlfb_video_modes[3].yres = 1050; | ||
125 | memcpy(&dlfb_video_modes[3].unknown3, "\x04\x02\x1E\x5F", 4); | ||
126 | } | ||
127 | |||
128 | static char *dlfb_set_register(char *bufptr, uint8_t reg, uint8_t val) | ||
129 | { | ||
130 | *bufptr++ = 0xAF; | ||
131 | *bufptr++ = 0x20; | ||
132 | *bufptr++ = reg; | ||
133 | *bufptr++ = val; | ||
134 | |||
135 | return bufptr; | ||
136 | } | ||
137 | |||
138 | static int dlfb_set_video_mode(struct dlfb_data *dev_info, int width, int height) | ||
139 | { | ||
140 | int i, ret; | ||
141 | unsigned char j; | ||
142 | char *bufptr = dev_info->buf; | ||
143 | uint8_t *vdata; | ||
144 | |||
145 | for (i = 0; i < MAX_VMODES; i++) { | ||
146 | printk("INIT VIDEO %d %d %d\n", i, dlfb_video_modes[i].xres, | ||
147 | dlfb_video_modes[i].yres); | ||
148 | if (dlfb_video_modes[i].xres == width | ||
149 | && dlfb_video_modes[i].yres == height) { | ||
150 | |||
151 | dev_info->base16 = 0; | ||
152 | dev_info->base16d = width * height * (FB_BPP / 8); | ||
153 | |||
154 | //dev_info->base8 = width * height * (FB_BPP / 8); | ||
155 | |||
156 | dev_info->base8 = dev_info->base16; | ||
157 | dev_info->base8d = dev_info->base16d; | ||
158 | |||
159 | /* set encryption key (null) */ | ||
160 | memcpy(dev_info->buf, STD_CHANNEL, 16); | ||
161 | ret = | ||
162 | usb_control_msg(dev_info->udev, | ||
163 | usb_sndctrlpipe(dev_info->udev, 0), | ||
164 | 0x12, (0x02 << 5), 0, 0, | ||
165 | dev_info->buf, 16, 0); | ||
166 | printk("ret control msg 1 (STD_CHANNEL): %d\n", ret); | ||
167 | |||
168 | /* set registers */ | ||
169 | bufptr = dlfb_set_register(bufptr, 0xFF, 0x00); | ||
170 | |||
171 | /* set color depth */ | ||
172 | bufptr = dlfb_set_register(bufptr, 0x00, 0x00); | ||
173 | |||
174 | /* set addresses */ | ||
175 | bufptr = | ||
176 | dlfb_set_register(bufptr, 0x20, | ||
177 | (char)(dev_info->base16 >> 16)); | ||
178 | bufptr = | ||
179 | dlfb_set_register(bufptr, 0x21, | ||
180 | (char)(dev_info->base16 >> 8)); | ||
181 | bufptr = | ||
182 | dlfb_set_register(bufptr, 0x22, | ||
183 | (char)(dev_info->base16)); | ||
184 | |||
185 | bufptr = | ||
186 | dlfb_set_register(bufptr, 0x26, | ||
187 | (char)(dev_info->base8 >> 16)); | ||
188 | bufptr = | ||
189 | dlfb_set_register(bufptr, 0x27, | ||
190 | (char)(dev_info->base8 >> 8)); | ||
191 | bufptr = | ||
192 | dlfb_set_register(bufptr, 0x28, | ||
193 | (char)(dev_info->base8)); | ||
194 | 67 | ||
195 | /* set video mode */ | 68 | /* -BULK_SIZE as per usb-skeleton. Can we get full page and avoid overhead? */ |
196 | vdata = (uint8_t *)&dlfb_video_modes[i]; | 69 | #define BULK_SIZE 512 |
197 | for (j = 0; j < 29; j++) | 70 | #define MAX_TRANSFER (PAGE_SIZE*16 - BULK_SIZE) |
198 | bufptr = dlfb_set_register(bufptr, j, vdata[j]); | 71 | #define WRITES_IN_FLIGHT (4) |
199 | 72 | ||
200 | /* blank */ | 73 | #define GET_URB_TIMEOUT HZ |
201 | bufptr = dlfb_set_register(bufptr, 0x1F, 0x00); | 74 | #define FREE_URB_TIMEOUT (HZ*2) |
202 | 75 | ||
203 | /* end registers */ | 76 | #define BPP 2 |
204 | bufptr = dlfb_set_register(bufptr, 0xFF, 0xFF); | 77 | #define MAX_CMD_PIXELS 255 |
205 | 78 | ||
206 | /* send */ | 79 | #define RLX_HEADER_BYTES 7 |
207 | ret = dlfb_bulk_msg(dev_info, bufptr - dev_info->buf); | 80 | #define MIN_RLX_PIX_BYTES 4 |
208 | printk("ret bulk 2: %d %td\n", ret, | 81 | #define MIN_RLX_CMD_BYTES (RLX_HEADER_BYTES + MIN_RLX_PIX_BYTES) |
209 | bufptr - dev_info->buf); | ||
210 | 82 | ||
211 | /* flush */ | 83 | #define RLE_HEADER_BYTES 6 |
212 | ret = dlfb_bulk_msg(dev_info, 0); | 84 | #define MIN_RLE_PIX_BYTES 3 |
213 | printk("ret bulk 3: %d\n", ret); | 85 | #define MIN_RLE_CMD_BYTES (RLE_HEADER_BYTES + MIN_RLE_PIX_BYTES) |
214 | 86 | ||
215 | dev_info->screen_size = width * height * (FB_BPP / 8); | 87 | #define RAW_HEADER_BYTES 6 |
216 | dev_info->line_length = width * (FB_BPP / 8); | 88 | #define MIN_RAW_PIX_BYTES 2 |
89 | #define MIN_RAW_CMD_BYTES (RAW_HEADER_BYTES + MIN_RAW_PIX_BYTES) | ||
217 | 90 | ||
218 | return 0; | 91 | /* remove these once align.h patch is taken into kernel */ |
219 | } | 92 | #define DL_ALIGN_UP(x, a) ALIGN(x, a) |
220 | } | 93 | #define DL_ALIGN_DOWN(x, a) ALIGN(x-(a-1), a) |
221 | 94 | ||
222 | return -1; | 95 | /* remove once this gets added to sysfs.h */ |
223 | } | 96 | #define __ATTR_RW(attr) __ATTR(attr, 0644, attr##_show, attr##_store) |
224 | 97 | ||
98 | #define dl_err(format, arg...) \ | ||
99 | dev_err(dev->gdev, "dlfb: " format, ## arg) | ||
100 | #define dl_warn(format, arg...) \ | ||
101 | dev_warn(dev->gdev, "dlfb: " format, ## arg) | ||
102 | #define dl_notice(format, arg...) \ | ||
103 | dev_notice(dev->gdev, "dlfb: " format, ## arg) | ||
104 | #define dl_info(format, arg...) \ | ||
105 | dev_info(dev->gdev, "dlfb: " format, ## arg) | ||
225 | #endif | 106 | #endif |
diff --git a/drivers/staging/usbip/Kconfig b/drivers/staging/usbip/Kconfig index 350d5d65ccf3..2c1d10acb8b5 100644 --- a/drivers/staging/usbip/Kconfig +++ b/drivers/staging/usbip/Kconfig | |||
@@ -34,3 +34,10 @@ config USB_IP_HOST | |||
34 | 34 | ||
35 | To compile this driver as a module, choose M here: the | 35 | To compile this driver as a module, choose M here: the |
36 | module will be called usbip. | 36 | module will be called usbip. |
37 | |||
38 | config USB_IP_DEBUG_ENABLE | ||
39 | bool "USB-IP Debug Enable" | ||
40 | depends on USB_IP_COMMON | ||
41 | default N | ||
42 | ---help--- | ||
43 | This enables the debug messages from the USB-IP drivers. | ||
diff --git a/drivers/staging/usbip/Makefile b/drivers/staging/usbip/Makefile index 179f4211f96b..6f2916b1807a 100644 --- a/drivers/staging/usbip/Makefile +++ b/drivers/staging/usbip/Makefile | |||
@@ -7,6 +7,6 @@ vhci-hcd-objs := vhci_sysfs.o vhci_tx.o vhci_rx.o vhci_hcd.o | |||
7 | obj-$(CONFIG_USB_IP_HOST) += usbip.o | 7 | obj-$(CONFIG_USB_IP_HOST) += usbip.o |
8 | usbip-objs := stub_dev.o stub_main.o stub_rx.o stub_tx.o | 8 | usbip-objs := stub_dev.o stub_main.o stub_rx.o stub_tx.o |
9 | 9 | ||
10 | ifeq ($(CONFIG_USB_DEBUG),y) | 10 | ifeq ($(CONFIG_USB_IP_DEBUG_ENABLE),y) |
11 | EXTRA_CFLAGS += -DDEBUG | 11 | EXTRA_CFLAGS += -DDEBUG |
12 | endif | 12 | endif |
diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c index ddb6f5fd04d5..7a45da8f9565 100644 --- a/drivers/staging/usbip/usbip_common.c +++ b/drivers/staging/usbip/usbip_common.c | |||
@@ -33,7 +33,7 @@ | |||
33 | /*-------------------------------------------------------------------------*/ | 33 | /*-------------------------------------------------------------------------*/ |
34 | /* debug routines */ | 34 | /* debug routines */ |
35 | 35 | ||
36 | #ifdef CONFIG_USB_DEBUG | 36 | #ifdef CONFIG_USB_IP_DEBUG_ENABLE |
37 | unsigned long usbip_debug_flag = 0xffffffff; | 37 | unsigned long usbip_debug_flag = 0xffffffff; |
38 | #else | 38 | #else |
39 | unsigned long usbip_debug_flag; | 39 | unsigned long usbip_debug_flag; |
@@ -55,10 +55,7 @@ static ssize_t show_flag(struct device *dev, struct device_attribute *attr, | |||
55 | static ssize_t store_flag(struct device *dev, struct device_attribute *attr, | 55 | static ssize_t store_flag(struct device *dev, struct device_attribute *attr, |
56 | const char *buf, size_t count) | 56 | const char *buf, size_t count) |
57 | { | 57 | { |
58 | unsigned long flag; | 58 | sscanf(buf, "%lx", &usbip_debug_flag); |
59 | |||
60 | sscanf(buf, "%lx", &flag); | ||
61 | usbip_debug_flag = flag; | ||
62 | 59 | ||
63 | return count; | 60 | return count; |
64 | } | 61 | } |
@@ -66,33 +63,8 @@ DEVICE_ATTR(usbip_debug, (S_IRUGO | S_IWUSR), show_flag, store_flag); | |||
66 | 63 | ||
67 | static void usbip_dump_buffer(char *buff, int bufflen) | 64 | static void usbip_dump_buffer(char *buff, int bufflen) |
68 | { | 65 | { |
69 | int i; | 66 | print_hex_dump(KERN_DEBUG, "usb-ip", DUMP_PREFIX_OFFSET, 16, 4, |
70 | 67 | buff, bufflen, false); | |
71 | if (bufflen > 128) { | ||
72 | for (i = 0; i < 128; i++) { | ||
73 | if (i%24 == 0) | ||
74 | printk(KERN_DEBUG " "); | ||
75 | printk(KERN_DEBUG "%02x ", (unsigned char) buff[i]); | ||
76 | if (i%4 == 3) | ||
77 | printk(KERN_DEBUG "| "); | ||
78 | if (i%24 == 23) | ||
79 | printk(KERN_DEBUG "\n"); | ||
80 | } | ||
81 | printk(KERN_DEBUG "... (%d byte)\n", bufflen); | ||
82 | return; | ||
83 | } | ||
84 | |||
85 | for (i = 0; i < bufflen; i++) { | ||
86 | if (i%24 == 0) | ||
87 | printk(KERN_DEBUG " "); | ||
88 | printk(KERN_DEBUG "%02x ", (unsigned char) buff[i]); | ||
89 | if (i%4 == 3) | ||
90 | printk(KERN_DEBUG "| "); | ||
91 | if (i%24 == 23) | ||
92 | printk(KERN_DEBUG "\n"); | ||
93 | } | ||
94 | printk(KERN_DEBUG "\n"); | ||
95 | |||
96 | } | 68 | } |
97 | 69 | ||
98 | static void usbip_dump_pipe(unsigned int p) | 70 | static void usbip_dump_pipe(unsigned int p) |
@@ -558,60 +530,6 @@ err: | |||
558 | } | 530 | } |
559 | EXPORT_SYMBOL_GPL(usbip_xmit); | 531 | EXPORT_SYMBOL_GPL(usbip_xmit); |
560 | 532 | ||
561 | |||
562 | /* now a usrland utility should set options. */ | ||
563 | #if 0 | ||
564 | int setquickack(struct socket *socket) | ||
565 | { | ||
566 | mm_segment_t oldfs; | ||
567 | int val = 1; | ||
568 | int ret; | ||
569 | |||
570 | oldfs = get_fs(); | ||
571 | set_fs(get_ds()); | ||
572 | ret = socket->ops->setsockopt(socket, SOL_TCP, TCP_QUICKACK, | ||
573 | (char __user *) &val, sizeof(ret)); | ||
574 | set_fs(oldfs); | ||
575 | |||
576 | return ret; | ||
577 | } | ||
578 | |||
579 | int setnodelay(struct socket *socket) | ||
580 | { | ||
581 | mm_segment_t oldfs; | ||
582 | int val = 1; | ||
583 | int ret; | ||
584 | |||
585 | oldfs = get_fs(); | ||
586 | set_fs(get_ds()); | ||
587 | ret = socket->ops->setsockopt(socket, SOL_TCP, TCP_NODELAY, | ||
588 | (char __user *) &val, sizeof(ret)); | ||
589 | set_fs(oldfs); | ||
590 | |||
591 | return ret; | ||
592 | } | ||
593 | |||
594 | int setkeepalive(struct socket *socket) | ||
595 | { | ||
596 | mm_segment_t oldfs; | ||
597 | int val = 1; | ||
598 | int ret; | ||
599 | |||
600 | oldfs = get_fs(); | ||
601 | set_fs(get_ds()); | ||
602 | ret = socket->ops->setsockopt(socket, SOL_SOCKET, SO_KEEPALIVE, | ||
603 | (char __user *) &val, sizeof(ret)); | ||
604 | set_fs(oldfs); | ||
605 | |||
606 | return ret; | ||
607 | } | ||
608 | |||
609 | void setreuse(struct socket *socket) | ||
610 | { | ||
611 | socket->sk->sk_reuse = 1; | ||
612 | } | ||
613 | #endif | ||
614 | |||
615 | struct socket *sockfd_to_socket(unsigned int sockfd) | 533 | struct socket *sockfd_to_socket(unsigned int sockfd) |
616 | { | 534 | { |
617 | struct socket *socket; | 535 | struct socket *socket; |
diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h index 1ca3eab8af18..6f1dcb197d13 100644 --- a/drivers/staging/usbip/usbip_common.h +++ b/drivers/staging/usbip/usbip_common.h | |||
@@ -33,12 +33,12 @@ | |||
33 | */ | 33 | */ |
34 | 34 | ||
35 | /** | 35 | /** |
36 | * usbip_udbg - print debug messages if CONFIG_USB_DEBUG is defined | 36 | * usbip_udbg - print debug messages if CONFIG_USB_IP_DEBUG_ENABLE is defined |
37 | * @fmt: | 37 | * @fmt: |
38 | * @args: | 38 | * @args: |
39 | */ | 39 | */ |
40 | 40 | ||
41 | #ifdef CONFIG_USB_DEBUG | 41 | #ifdef CONFIG_USB_IP_DEBUG_ENABLE |
42 | 42 | ||
43 | #define usbip_udbg(fmt, args...) \ | 43 | #define usbip_udbg(fmt, args...) \ |
44 | do { \ | 44 | do { \ |
@@ -47,11 +47,11 @@ | |||
47 | __FILE__, __LINE__, __func__, ##args); \ | 47 | __FILE__, __LINE__, __func__, ##args); \ |
48 | } while (0) | 48 | } while (0) |
49 | 49 | ||
50 | #else /* CONFIG_USB_DEBUG */ | 50 | #else /* CONFIG_USB_IP_DEBUG_ENABLE */ |
51 | 51 | ||
52 | #define usbip_udbg(fmt, args...) do { } while (0) | 52 | #define usbip_udbg(fmt, args...) do { } while (0) |
53 | 53 | ||
54 | #endif /* CONFIG_USB_DEBUG */ | 54 | #endif /* CONFIG_USB_IP_DEBUG_ENABLE */ |
55 | 55 | ||
56 | 56 | ||
57 | enum { | 57 | enum { |
diff --git a/drivers/staging/vme/Kconfig b/drivers/staging/vme/Kconfig index ae628a58b0c6..6411ae51ed3f 100644 --- a/drivers/staging/vme/Kconfig +++ b/drivers/staging/vme/Kconfig | |||
@@ -14,4 +14,6 @@ source "drivers/staging/vme/bridges/Kconfig" | |||
14 | 14 | ||
15 | source "drivers/staging/vme/devices/Kconfig" | 15 | source "drivers/staging/vme/devices/Kconfig" |
16 | 16 | ||
17 | source "drivers/staging/vme/boards/Kconfig" | ||
18 | |||
17 | endif # VME | 19 | endif # VME |
diff --git a/drivers/staging/vme/Makefile b/drivers/staging/vme/Makefile index 8c3b90ee5853..b4ea3f8d0a50 100644 --- a/drivers/staging/vme/Makefile +++ b/drivers/staging/vme/Makefile | |||
@@ -5,3 +5,4 @@ obj-$(CONFIG_VME_BUS) += vme.o | |||
5 | 5 | ||
6 | obj-y += bridges/ | 6 | obj-y += bridges/ |
7 | obj-y += devices/ | 7 | obj-y += devices/ |
8 | obj-y += boards/ | ||
diff --git a/drivers/staging/vme/TODO b/drivers/staging/vme/TODO index 2201ff6f74d1..82c222b4a146 100644 --- a/drivers/staging/vme/TODO +++ b/drivers/staging/vme/TODO | |||
@@ -4,28 +4,6 @@ | |||
4 | API | 4 | API |
5 | === | 5 | === |
6 | 6 | ||
7 | DMA Resource Allocation incomplete | ||
8 | ---------------------------------- | ||
9 | |||
10 | The current DMA resource Allocation provides no means of selecting the | ||
11 | suitability of a DMA controller based on it's supported modes of operation, as | ||
12 | opposed to the resource allocation mechanisms for master and slave windows: | ||
13 | |||
14 | struct vme_resource *vme_dma_request(struct device *dev); | ||
15 | |||
16 | As opposed to: | ||
17 | |||
18 | struct vme_resource * vme_master_request(struct device *dev, | ||
19 | vme_address_t aspace, vme_cycle_t cycle, vme_width_t width); | ||
20 | |||
21 | The TSI148 can perform, VME-to-PCI, PCI-to-VME, PATTERN-to-VME, PATTERN-to-PCI, | ||
22 | VME-to-VME and PCI-to-PCI transfers. The CA91C142 can only provide VME-to-PCI | ||
23 | and PCI-to-VME. | ||
24 | |||
25 | Add a mechanism to select a VME controller based on source/target type, | ||
26 | required aspace, cycle and width requirements. | ||
27 | |||
28 | |||
29 | Master window broadcast select mask | 7 | Master window broadcast select mask |
30 | ----------------------------------- | 8 | ----------------------------------- |
31 | 9 | ||
@@ -59,7 +37,6 @@ chips. They are currently not supported at all by the API. | |||
59 | Core | 37 | Core |
60 | ==== | 38 | ==== |
61 | 39 | ||
62 | - Rename vme_master_resource's "pci_resource" to be bus agnostic. | ||
63 | - Improve generic sanity checks (Such as does an offset and size fit within a | 40 | - Improve generic sanity checks (Such as does an offset and size fit within a |
64 | window and parameter checking). | 41 | window and parameter checking). |
65 | 42 | ||
@@ -69,7 +46,6 @@ Bridge Support | |||
69 | Tempe (tsi148) | 46 | Tempe (tsi148) |
70 | -------------- | 47 | -------------- |
71 | 48 | ||
72 | - Driver can currently only support a single bridge. | ||
73 | - 2eSST Broadcast mode. | 49 | - 2eSST Broadcast mode. |
74 | - Mailboxes unsupported. | 50 | - Mailboxes unsupported. |
75 | - Improve error detection. | 51 | - Improve error detection. |
@@ -80,10 +56,6 @@ Tempe (tsi148) | |||
80 | Universe II (ca91c142) | 56 | Universe II (ca91c142) |
81 | ---------------------- | 57 | ---------------------- |
82 | 58 | ||
83 | - Driver can currently only support a single bridge. | ||
84 | - DMA unsupported. | ||
85 | - RMW transactions unsupported. | ||
86 | - Location Monitors unsupported. | ||
87 | - Mailboxes unsupported. | 59 | - Mailboxes unsupported. |
88 | - Error Detection. | 60 | - Error Detection. |
89 | - Control of prefetch size, threshold. | 61 | - Control of prefetch size, threshold. |
diff --git a/drivers/staging/vme/boards/Kconfig b/drivers/staging/vme/boards/Kconfig new file mode 100644 index 000000000000..761631353527 --- /dev/null +++ b/drivers/staging/vme/boards/Kconfig | |||
@@ -0,0 +1,9 @@ | |||
1 | comment "VME Board Drivers" | ||
2 | |||
3 | config VMIVME_7805 | ||
4 | tristate "VMIVME-7805" | ||
5 | help | ||
6 | If you say Y here you get support for the VMIVME-7805 board. | ||
7 | This board has an additional control interface to the Universe II | ||
8 | chip. This driver has to be included if you want to access VME bus | ||
9 | with VMIVME-7805 board. | ||
diff --git a/drivers/staging/vme/boards/Makefile b/drivers/staging/vme/boards/Makefile new file mode 100644 index 000000000000..43658340885d --- /dev/null +++ b/drivers/staging/vme/boards/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | # | ||
2 | # Makefile for the VME board drivers. | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_VMIVME_7805) += vme_vmivme7805.o | ||
diff --git a/drivers/staging/vme/boards/vme_vmivme7805.c b/drivers/staging/vme/boards/vme_vmivme7805.c new file mode 100644 index 000000000000..843c9edde555 --- /dev/null +++ b/drivers/staging/vme/boards/vme_vmivme7805.c | |||
@@ -0,0 +1,124 @@ | |||
1 | /* | ||
2 | * Support for the VMIVME-7805 board access to the Universe II bridge. | ||
3 | * | ||
4 | * Author: Arthur Benilov <arthur.benilov@iba-group.com> | ||
5 | * Copyright 2010 Ion Beam Application, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/version.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/pci.h> | ||
18 | #include <linux/poll.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include "vme_vmivme7805.h" | ||
22 | |||
23 | static int __init vmic_init(void); | ||
24 | static int vmic_probe(struct pci_dev *, const struct pci_device_id *); | ||
25 | static void vmic_remove(struct pci_dev *); | ||
26 | static void __exit vmic_exit(void); | ||
27 | |||
28 | /** Base address to access FPGA register */ | ||
29 | static void *vmic_base; | ||
30 | |||
31 | static char driver_name[] = "vmivme_7805"; | ||
32 | |||
33 | static struct pci_device_id vmic_ids[] = { | ||
34 | { PCI_DEVICE(PCI_VENDOR_ID_VMIC, PCI_DEVICE_ID_VTIMR) }, | ||
35 | { }, | ||
36 | }; | ||
37 | |||
38 | static struct pci_driver vmic_driver = { | ||
39 | .name = driver_name, | ||
40 | .id_table = vmic_ids, | ||
41 | .probe = vmic_probe, | ||
42 | .remove = vmic_remove, | ||
43 | }; | ||
44 | |||
45 | static int __init vmic_init(void) | ||
46 | { | ||
47 | return pci_register_driver(&vmic_driver); | ||
48 | } | ||
49 | |||
50 | static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id) | ||
51 | { | ||
52 | int retval; | ||
53 | u32 data; | ||
54 | |||
55 | /* Enable the device */ | ||
56 | retval = pci_enable_device(pdev); | ||
57 | if (retval) { | ||
58 | dev_err(&pdev->dev, "Unable to enable device\n"); | ||
59 | goto err; | ||
60 | } | ||
61 | |||
62 | /* Map Registers */ | ||
63 | retval = pci_request_regions(pdev, driver_name); | ||
64 | if (retval) { | ||
65 | dev_err(&pdev->dev, "Unable to reserve resources\n"); | ||
66 | goto err_resource; | ||
67 | } | ||
68 | |||
69 | /* Map registers in BAR 0 */ | ||
70 | vmic_base = ioremap_nocache(pci_resource_start(pdev, 0), 16); | ||
71 | if (!vmic_base) { | ||
72 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); | ||
73 | retval = -EIO; | ||
74 | goto err_remap; | ||
75 | } | ||
76 | |||
77 | /* Clear the FPGA VME IF contents */ | ||
78 | iowrite32(0, vmic_base + VME_CONTROL); | ||
79 | |||
80 | /* Clear any initial BERR */ | ||
81 | data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF; | ||
82 | data |= BM_VME_CONTROL_BERRST; | ||
83 | iowrite32(data, vmic_base + VME_CONTROL); | ||
84 | |||
85 | /* Enable the vme interface and byte swapping */ | ||
86 | data = ioread32(vmic_base + VME_CONTROL) & 0x00000FFF; | ||
87 | data = data | BM_VME_CONTROL_MASTER_ENDIAN | | ||
88 | BM_VME_CONTROL_SLAVE_ENDIAN | | ||
89 | BM_VME_CONTROL_ABLE | | ||
90 | BM_VME_CONTROL_BERRI | | ||
91 | BM_VME_CONTROL_BPENA | | ||
92 | BM_VME_CONTROL_VBENA; | ||
93 | iowrite32(data, vmic_base + VME_CONTROL); | ||
94 | |||
95 | return 0; | ||
96 | |||
97 | err_remap: | ||
98 | pci_release_regions(pdev); | ||
99 | err_resource: | ||
100 | pci_disable_device(pdev); | ||
101 | err: | ||
102 | return retval; | ||
103 | } | ||
104 | |||
105 | static void vmic_remove(struct pci_dev *pdev) | ||
106 | { | ||
107 | iounmap(vmic_base); | ||
108 | pci_release_regions(pdev); | ||
109 | pci_disable_device(pdev); | ||
110 | |||
111 | } | ||
112 | |||
113 | static void __exit vmic_exit(void) | ||
114 | { | ||
115 | pci_unregister_driver(&vmic_driver); | ||
116 | } | ||
117 | |||
118 | MODULE_DESCRIPTION("VMIVME-7805 board support driver"); | ||
119 | MODULE_AUTHOR("Arthur Benilov <arthur.benilov@iba-group.com>"); | ||
120 | MODULE_LICENSE("GPL"); | ||
121 | |||
122 | module_init(vmic_init); | ||
123 | module_exit(vmic_exit); | ||
124 | |||
diff --git a/drivers/staging/vme/boards/vme_vmivme7805.h b/drivers/staging/vme/boards/vme_vmivme7805.h new file mode 100644 index 000000000000..44c2c449808c --- /dev/null +++ b/drivers/staging/vme/boards/vme_vmivme7805.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * vmivme_7805.h | ||
3 | * | ||
4 | * Support for the VMIVME-7805 board access to the Universe II bridge. | ||
5 | * | ||
6 | * Author: Arthur Benilov <arthur.benilov@iba-group.com> | ||
7 | * Copyright 2010 Ion Beam Application, Inc. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | |||
15 | |||
16 | #ifndef _VMIVME_7805_H | ||
17 | #define _VMIVME_7805_H | ||
18 | |||
19 | #ifndef PCI_VENDOR_ID_VMIC | ||
20 | #define PCI_VENDOR_ID_VMIC 0x114A | ||
21 | #endif | ||
22 | |||
23 | #ifndef PCI_DEVICE_ID_VTIMR | ||
24 | #define PCI_DEVICE_ID_VTIMR 0x0004 | ||
25 | #endif | ||
26 | |||
27 | #define VME_CONTROL 0x0000 | ||
28 | #define BM_VME_CONTROL_MASTER_ENDIAN 0x0001 | ||
29 | #define BM_VME_CONTROL_SLAVE_ENDIAN 0x0002 | ||
30 | #define BM_VME_CONTROL_ABLE 0x0004 | ||
31 | #define BM_VME_CONTROL_BERRI 0x0040 | ||
32 | #define BM_VME_CONTROL_BERRST 0x0080 | ||
33 | #define BM_VME_CONTROL_BPENA 0x0400 | ||
34 | #define BM_VME_CONTROL_VBENA 0x0800 | ||
35 | |||
36 | #endif /* _VMIVME_7805_H */ | ||
37 | |||
diff --git a/drivers/staging/vme/bridges/Kconfig b/drivers/staging/vme/bridges/Kconfig index 023cceba0c59..9331064e0476 100644 --- a/drivers/staging/vme/bridges/Kconfig +++ b/drivers/staging/vme/bridges/Kconfig | |||
@@ -2,12 +2,14 @@ comment "VME Bridge Drivers" | |||
2 | 2 | ||
3 | config VME_CA91CX42 | 3 | config VME_CA91CX42 |
4 | tristate "Universe II" | 4 | tristate "Universe II" |
5 | depends on VIRT_TO_BUS | ||
5 | help | 6 | help |
6 | If you say Y here you get support for the Tundra CA91C142 | 7 | If you say Y here you get support for the Tundra CA91C142 |
7 | (Universe II) VME bridge chip. | 8 | (Universe II) VME bridge chip. |
8 | 9 | ||
9 | config VME_TSI148 | 10 | config VME_TSI148 |
10 | tristate "Tempe" | 11 | tristate "Tempe" |
12 | depends on VIRT_TO_BUS | ||
11 | help | 13 | help |
12 | If you say Y here you get support for the Tundra TSI148 VME bridge | 14 | If you say Y here you get support for the Tundra TSI148 VME bridge |
13 | chip. | 15 | chip. |
diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.c b/drivers/staging/vme/bridges/vme_ca91cx42.c index 1cf3e91db59d..2795ff2411e0 100644 --- a/drivers/staging/vme/bridges/vme_ca91cx42.c +++ b/drivers/staging/vme/bridges/vme_ca91cx42.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * Support for the Tundra Universe I/II VME-PCI Bridge Chips | 2 | * Support for the Tundra Universe I/II VME-PCI Bridge Chips |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 5 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
6 | * | 6 | * |
7 | * Based on work by Tom Armistead and Ajit Prem | 7 | * Based on work by Tom Armistead and Ajit Prem |
8 | * Copyright 2004 Motorola Inc. | 8 | * Copyright 2004 Motorola Inc. |
@@ -38,25 +38,12 @@ static int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *); | |||
38 | static void ca91cx42_remove(struct pci_dev *); | 38 | static void ca91cx42_remove(struct pci_dev *); |
39 | static void __exit ca91cx42_exit(void); | 39 | static void __exit ca91cx42_exit(void); |
40 | 40 | ||
41 | struct vme_bridge *ca91cx42_bridge; | 41 | /* Module parameters */ |
42 | wait_queue_head_t dma_queue; | 42 | static int geoid; |
43 | wait_queue_head_t iack_queue; | ||
44 | wait_queue_head_t lm_queue; | ||
45 | wait_queue_head_t mbox_queue; | ||
46 | |||
47 | void (*lm_callback[4])(int); /* Called in interrupt handler, be careful! */ | ||
48 | void *crcsr_kernel; | ||
49 | dma_addr_t crcsr_bus; | ||
50 | |||
51 | struct mutex vme_rmw; /* Only one RMW cycle at a time */ | ||
52 | struct mutex vme_int; /* | ||
53 | * Only one VME interrupt can be | ||
54 | * generated at a time, provide locking | ||
55 | */ | ||
56 | 43 | ||
57 | static char driver_name[] = "vme_ca91cx42"; | 44 | static char driver_name[] = "vme_ca91cx42"; |
58 | 45 | ||
59 | static struct pci_device_id ca91cx42_ids[] = { | 46 | static const struct pci_device_id ca91cx42_ids[] = { |
60 | { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_CA91C142) }, | 47 | { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_CA91C142) }, |
61 | { }, | 48 | { }, |
62 | }; | 49 | }; |
@@ -68,14 +55,14 @@ static struct pci_driver ca91cx42_driver = { | |||
68 | .remove = ca91cx42_remove, | 55 | .remove = ca91cx42_remove, |
69 | }; | 56 | }; |
70 | 57 | ||
71 | static u32 ca91cx42_DMA_irqhandler(void) | 58 | static u32 ca91cx42_DMA_irqhandler(struct ca91cx42_driver *bridge) |
72 | { | 59 | { |
73 | wake_up(&dma_queue); | 60 | wake_up(&(bridge->dma_queue)); |
74 | 61 | ||
75 | return CA91CX42_LINT_DMA; | 62 | return CA91CX42_LINT_DMA; |
76 | } | 63 | } |
77 | 64 | ||
78 | static u32 ca91cx42_LM_irqhandler(u32 stat) | 65 | static u32 ca91cx42_LM_irqhandler(struct ca91cx42_driver *bridge, u32 stat) |
79 | { | 66 | { |
80 | int i; | 67 | int i; |
81 | u32 serviced = 0; | 68 | u32 serviced = 0; |
@@ -83,7 +70,7 @@ static u32 ca91cx42_LM_irqhandler(u32 stat) | |||
83 | for (i = 0; i < 4; i++) { | 70 | for (i = 0; i < 4; i++) { |
84 | if (stat & CA91CX42_LINT_LM[i]) { | 71 | if (stat & CA91CX42_LINT_LM[i]) { |
85 | /* We only enable interrupts if the callback is set */ | 72 | /* We only enable interrupts if the callback is set */ |
86 | lm_callback[i](i); | 73 | bridge->lm_callback[i](i); |
87 | serviced |= CA91CX42_LINT_LM[i]; | 74 | serviced |= CA91CX42_LINT_LM[i]; |
88 | } | 75 | } |
89 | } | 76 | } |
@@ -92,40 +79,25 @@ static u32 ca91cx42_LM_irqhandler(u32 stat) | |||
92 | } | 79 | } |
93 | 80 | ||
94 | /* XXX This needs to be split into 4 queues */ | 81 | /* XXX This needs to be split into 4 queues */ |
95 | static u32 ca91cx42_MB_irqhandler(int mbox_mask) | 82 | static u32 ca91cx42_MB_irqhandler(struct ca91cx42_driver *bridge, int mbox_mask) |
96 | { | 83 | { |
97 | wake_up(&mbox_queue); | 84 | wake_up(&(bridge->mbox_queue)); |
98 | 85 | ||
99 | return CA91CX42_LINT_MBOX; | 86 | return CA91CX42_LINT_MBOX; |
100 | } | 87 | } |
101 | 88 | ||
102 | static u32 ca91cx42_IACK_irqhandler(void) | 89 | static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge) |
103 | { | 90 | { |
104 | wake_up(&iack_queue); | 91 | wake_up(&(bridge->iack_queue)); |
105 | 92 | ||
106 | return CA91CX42_LINT_SW_IACK; | 93 | return CA91CX42_LINT_SW_IACK; |
107 | } | 94 | } |
108 | 95 | ||
109 | #if 0 | 96 | static u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge) |
110 | int ca91cx42_bus_error_chk(int clrflag) | ||
111 | { | ||
112 | int tmp; | ||
113 | tmp = ioread32(ca91cx42_bridge->base + PCI_COMMAND); | ||
114 | if (tmp & 0x08000000) { /* S_TA is Set */ | ||
115 | if (clrflag) | ||
116 | iowrite32(tmp | 0x08000000, | ||
117 | ca91cx42_bridge->base + PCI_COMMAND); | ||
118 | return 1; | ||
119 | } | ||
120 | return 0; | ||
121 | } | ||
122 | #endif | ||
123 | |||
124 | static u32 ca91cx42_VERR_irqhandler(void) | ||
125 | { | 97 | { |
126 | int val; | 98 | int val; |
127 | 99 | ||
128 | val = ioread32(ca91cx42_bridge->base + DGCS); | 100 | val = ioread32(bridge->base + DGCS); |
129 | 101 | ||
130 | if (!(val & 0x00000800)) { | 102 | if (!(val & 0x00000800)) { |
131 | printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " | 103 | printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " |
@@ -135,11 +107,11 @@ static u32 ca91cx42_VERR_irqhandler(void) | |||
135 | return CA91CX42_LINT_VERR; | 107 | return CA91CX42_LINT_VERR; |
136 | } | 108 | } |
137 | 109 | ||
138 | static u32 ca91cx42_LERR_irqhandler(void) | 110 | static u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge) |
139 | { | 111 | { |
140 | int val; | 112 | int val; |
141 | 113 | ||
142 | val = ioread32(ca91cx42_bridge->base + DGCS); | 114 | val = ioread32(bridge->base + DGCS); |
143 | 115 | ||
144 | if (!(val & 0x00000800)) { | 116 | if (!(val & 0x00000800)) { |
145 | printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read " | 117 | printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read " |
@@ -151,13 +123,18 @@ static u32 ca91cx42_LERR_irqhandler(void) | |||
151 | } | 123 | } |
152 | 124 | ||
153 | 125 | ||
154 | static u32 ca91cx42_VIRQ_irqhandler(int stat) | 126 | static u32 ca91cx42_VIRQ_irqhandler(struct vme_bridge *ca91cx42_bridge, |
127 | int stat) | ||
155 | { | 128 | { |
156 | int vec, i, serviced = 0; | 129 | int vec, i, serviced = 0; |
130 | struct ca91cx42_driver *bridge; | ||
131 | |||
132 | bridge = ca91cx42_bridge->driver_priv; | ||
133 | |||
157 | 134 | ||
158 | for (i = 7; i > 0; i--) { | 135 | for (i = 7; i > 0; i--) { |
159 | if (stat & (1 << i)) { | 136 | if (stat & (1 << i)) { |
160 | vec = ioread32(ca91cx42_bridge->base + | 137 | vec = ioread32(bridge->base + |
161 | CA91CX42_V_STATID[i]) & 0xff; | 138 | CA91CX42_V_STATID[i]) & 0xff; |
162 | 139 | ||
163 | vme_irq_handler(ca91cx42_bridge, i, vec); | 140 | vme_irq_handler(ca91cx42_bridge, i, vec); |
@@ -169,15 +146,18 @@ static u32 ca91cx42_VIRQ_irqhandler(int stat) | |||
169 | return serviced; | 146 | return serviced; |
170 | } | 147 | } |
171 | 148 | ||
172 | static irqreturn_t ca91cx42_irqhandler(int irq, void *dev_id) | 149 | static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr) |
173 | { | 150 | { |
174 | u32 stat, enable, serviced = 0; | 151 | u32 stat, enable, serviced = 0; |
152 | struct vme_bridge *ca91cx42_bridge; | ||
153 | struct ca91cx42_driver *bridge; | ||
175 | 154 | ||
176 | if (dev_id != ca91cx42_bridge->base) | 155 | ca91cx42_bridge = ptr; |
177 | return IRQ_NONE; | ||
178 | 156 | ||
179 | enable = ioread32(ca91cx42_bridge->base + LINT_EN); | 157 | bridge = ca91cx42_bridge->driver_priv; |
180 | stat = ioread32(ca91cx42_bridge->base + LINT_STAT); | 158 | |
159 | enable = ioread32(bridge->base + LINT_EN); | ||
160 | stat = ioread32(bridge->base + LINT_STAT); | ||
181 | 161 | ||
182 | /* Only look at unmasked interrupts */ | 162 | /* Only look at unmasked interrupts */ |
183 | stat &= enable; | 163 | stat &= enable; |
@@ -186,42 +166,45 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *dev_id) | |||
186 | return IRQ_NONE; | 166 | return IRQ_NONE; |
187 | 167 | ||
188 | if (stat & CA91CX42_LINT_DMA) | 168 | if (stat & CA91CX42_LINT_DMA) |
189 | serviced |= ca91cx42_DMA_irqhandler(); | 169 | serviced |= ca91cx42_DMA_irqhandler(bridge); |
190 | if (stat & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | | 170 | if (stat & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | |
191 | CA91CX42_LINT_LM3)) | 171 | CA91CX42_LINT_LM3)) |
192 | serviced |= ca91cx42_LM_irqhandler(stat); | 172 | serviced |= ca91cx42_LM_irqhandler(bridge, stat); |
193 | if (stat & CA91CX42_LINT_MBOX) | 173 | if (stat & CA91CX42_LINT_MBOX) |
194 | serviced |= ca91cx42_MB_irqhandler(stat); | 174 | serviced |= ca91cx42_MB_irqhandler(bridge, stat); |
195 | if (stat & CA91CX42_LINT_SW_IACK) | 175 | if (stat & CA91CX42_LINT_SW_IACK) |
196 | serviced |= ca91cx42_IACK_irqhandler(); | 176 | serviced |= ca91cx42_IACK_irqhandler(bridge); |
197 | if (stat & CA91CX42_LINT_VERR) | 177 | if (stat & CA91CX42_LINT_VERR) |
198 | serviced |= ca91cx42_VERR_irqhandler(); | 178 | serviced |= ca91cx42_VERR_irqhandler(bridge); |
199 | if (stat & CA91CX42_LINT_LERR) | 179 | if (stat & CA91CX42_LINT_LERR) |
200 | serviced |= ca91cx42_LERR_irqhandler(); | 180 | serviced |= ca91cx42_LERR_irqhandler(bridge); |
201 | if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | | 181 | if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | |
202 | CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | | 182 | CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | |
203 | CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | | 183 | CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | |
204 | CA91CX42_LINT_VIRQ7)) | 184 | CA91CX42_LINT_VIRQ7)) |
205 | serviced |= ca91cx42_VIRQ_irqhandler(stat); | 185 | serviced |= ca91cx42_VIRQ_irqhandler(ca91cx42_bridge, stat); |
206 | 186 | ||
207 | /* Clear serviced interrupts */ | 187 | /* Clear serviced interrupts */ |
208 | iowrite32(stat, ca91cx42_bridge->base + LINT_STAT); | 188 | iowrite32(stat, bridge->base + LINT_STAT); |
209 | 189 | ||
210 | return IRQ_HANDLED; | 190 | return IRQ_HANDLED; |
211 | } | 191 | } |
212 | 192 | ||
213 | static int ca91cx42_irq_init(struct vme_bridge *bridge) | 193 | static int ca91cx42_irq_init(struct vme_bridge *ca91cx42_bridge) |
214 | { | 194 | { |
215 | int result, tmp; | 195 | int result, tmp; |
216 | struct pci_dev *pdev; | 196 | struct pci_dev *pdev; |
197 | struct ca91cx42_driver *bridge; | ||
198 | |||
199 | bridge = ca91cx42_bridge->driver_priv; | ||
217 | 200 | ||
218 | /* Need pdev */ | 201 | /* Need pdev */ |
219 | pdev = container_of(bridge->parent, struct pci_dev, dev); | 202 | pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); |
220 | 203 | ||
221 | /* Initialise list for VME bus errors */ | 204 | /* Initialise list for VME bus errors */ |
222 | INIT_LIST_HEAD(&(bridge->vme_errors)); | 205 | INIT_LIST_HEAD(&(ca91cx42_bridge->vme_errors)); |
223 | 206 | ||
224 | mutex_init(&(bridge->irq_mtx)); | 207 | mutex_init(&(ca91cx42_bridge->irq_mtx)); |
225 | 208 | ||
226 | /* Disable interrupts from PCI to VME */ | 209 | /* Disable interrupts from PCI to VME */ |
227 | iowrite32(0, bridge->base + VINT_EN); | 210 | iowrite32(0, bridge->base + VINT_EN); |
@@ -232,7 +215,7 @@ static int ca91cx42_irq_init(struct vme_bridge *bridge) | |||
232 | iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); | 215 | iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); |
233 | 216 | ||
234 | result = request_irq(pdev->irq, ca91cx42_irqhandler, IRQF_SHARED, | 217 | result = request_irq(pdev->irq, ca91cx42_irqhandler, IRQF_SHARED, |
235 | driver_name, pdev); | 218 | driver_name, ca91cx42_bridge); |
236 | if (result) { | 219 | if (result) { |
237 | dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", | 220 | dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", |
238 | pdev->irq); | 221 | pdev->irq); |
@@ -254,15 +237,16 @@ static int ca91cx42_irq_init(struct vme_bridge *bridge) | |||
254 | return 0; | 237 | return 0; |
255 | } | 238 | } |
256 | 239 | ||
257 | static void ca91cx42_irq_exit(struct pci_dev *pdev) | 240 | static void ca91cx42_irq_exit(struct ca91cx42_driver *bridge, |
241 | struct pci_dev *pdev) | ||
258 | { | 242 | { |
259 | /* Disable interrupts from PCI to VME */ | 243 | /* Disable interrupts from PCI to VME */ |
260 | iowrite32(0, ca91cx42_bridge->base + VINT_EN); | 244 | iowrite32(0, bridge->base + VINT_EN); |
261 | 245 | ||
262 | /* Disable PCI interrupts */ | 246 | /* Disable PCI interrupts */ |
263 | iowrite32(0, ca91cx42_bridge->base + LINT_EN); | 247 | iowrite32(0, bridge->base + LINT_EN); |
264 | /* Clear Any Pending PCI Interrupts */ | 248 | /* Clear Any Pending PCI Interrupts */ |
265 | iowrite32(0x00FFFFFF, ca91cx42_bridge->base + LINT_STAT); | 249 | iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); |
266 | 250 | ||
267 | free_irq(pdev->irq, pdev); | 251 | free_irq(pdev->irq, pdev); |
268 | } | 252 | } |
@@ -270,21 +254,25 @@ static void ca91cx42_irq_exit(struct pci_dev *pdev) | |||
270 | /* | 254 | /* |
271 | * Set up an VME interrupt | 255 | * Set up an VME interrupt |
272 | */ | 256 | */ |
273 | void ca91cx42_irq_set(int level, int state, int sync) | 257 | void ca91cx42_irq_set(struct vme_bridge *ca91cx42_bridge, int level, int state, |
258 | int sync) | ||
274 | 259 | ||
275 | { | 260 | { |
276 | struct pci_dev *pdev; | 261 | struct pci_dev *pdev; |
277 | u32 tmp; | 262 | u32 tmp; |
263 | struct ca91cx42_driver *bridge; | ||
264 | |||
265 | bridge = ca91cx42_bridge->driver_priv; | ||
278 | 266 | ||
279 | /* Enable IRQ level */ | 267 | /* Enable IRQ level */ |
280 | tmp = ioread32(ca91cx42_bridge->base + LINT_EN); | 268 | tmp = ioread32(bridge->base + LINT_EN); |
281 | 269 | ||
282 | if (state == 0) | 270 | if (state == 0) |
283 | tmp &= ~CA91CX42_LINT_VIRQ[level]; | 271 | tmp &= ~CA91CX42_LINT_VIRQ[level]; |
284 | else | 272 | else |
285 | tmp |= CA91CX42_LINT_VIRQ[level]; | 273 | tmp |= CA91CX42_LINT_VIRQ[level]; |
286 | 274 | ||
287 | iowrite32(tmp, ca91cx42_bridge->base + LINT_EN); | 275 | iowrite32(tmp, bridge->base + LINT_EN); |
288 | 276 | ||
289 | if ((state == 0) && (sync != 0)) { | 277 | if ((state == 0) && (sync != 0)) { |
290 | pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, | 278 | pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, |
@@ -294,34 +282,38 @@ void ca91cx42_irq_set(int level, int state, int sync) | |||
294 | } | 282 | } |
295 | } | 283 | } |
296 | 284 | ||
297 | int ca91cx42_irq_generate(int level, int statid) | 285 | int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level, |
286 | int statid) | ||
298 | { | 287 | { |
299 | u32 tmp; | 288 | u32 tmp; |
289 | struct ca91cx42_driver *bridge; | ||
290 | |||
291 | bridge = ca91cx42_bridge->driver_priv; | ||
300 | 292 | ||
301 | /* Universe can only generate even vectors */ | 293 | /* Universe can only generate even vectors */ |
302 | if (statid & 1) | 294 | if (statid & 1) |
303 | return -EINVAL; | 295 | return -EINVAL; |
304 | 296 | ||
305 | mutex_lock(&(vme_int)); | 297 | mutex_lock(&(bridge->vme_int)); |
306 | 298 | ||
307 | tmp = ioread32(ca91cx42_bridge->base + VINT_EN); | 299 | tmp = ioread32(bridge->base + VINT_EN); |
308 | 300 | ||
309 | /* Set Status/ID */ | 301 | /* Set Status/ID */ |
310 | iowrite32(statid << 24, ca91cx42_bridge->base + STATID); | 302 | iowrite32(statid << 24, bridge->base + STATID); |
311 | 303 | ||
312 | /* Assert VMEbus IRQ */ | 304 | /* Assert VMEbus IRQ */ |
313 | tmp = tmp | (1 << (level + 24)); | 305 | tmp = tmp | (1 << (level + 24)); |
314 | iowrite32(tmp, ca91cx42_bridge->base + VINT_EN); | 306 | iowrite32(tmp, bridge->base + VINT_EN); |
315 | 307 | ||
316 | /* Wait for IACK */ | 308 | /* Wait for IACK */ |
317 | wait_event_interruptible(iack_queue, 0); | 309 | wait_event_interruptible(bridge->iack_queue, 0); |
318 | 310 | ||
319 | /* Return interrupt to low state */ | 311 | /* Return interrupt to low state */ |
320 | tmp = ioread32(ca91cx42_bridge->base + VINT_EN); | 312 | tmp = ioread32(bridge->base + VINT_EN); |
321 | tmp = tmp & ~(1 << (level + 24)); | 313 | tmp = tmp & ~(1 << (level + 24)); |
322 | iowrite32(tmp, ca91cx42_bridge->base + VINT_EN); | 314 | iowrite32(tmp, bridge->base + VINT_EN); |
323 | 315 | ||
324 | mutex_unlock(&(vme_int)); | 316 | mutex_unlock(&(bridge->vme_int)); |
325 | 317 | ||
326 | return 0; | 318 | return 0; |
327 | } | 319 | } |
@@ -330,9 +322,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, | |||
330 | unsigned long long vme_base, unsigned long long size, | 322 | unsigned long long vme_base, unsigned long long size, |
331 | dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) | 323 | dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) |
332 | { | 324 | { |
333 | unsigned int i, addr = 0, granularity = 0; | 325 | unsigned int i, addr = 0, granularity; |
334 | unsigned int temp_ctl = 0; | 326 | unsigned int temp_ctl = 0; |
335 | unsigned int vme_bound, pci_offset; | 327 | unsigned int vme_bound, pci_offset; |
328 | struct ca91cx42_driver *bridge; | ||
329 | |||
330 | bridge = image->parent->driver_priv; | ||
336 | 331 | ||
337 | i = image->number; | 332 | i = image->number; |
338 | 333 | ||
@@ -366,13 +361,9 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, | |||
366 | * Bound address is a valid address for the window, adjust | 361 | * Bound address is a valid address for the window, adjust |
367 | * accordingly | 362 | * accordingly |
368 | */ | 363 | */ |
369 | vme_bound = vme_base + size - granularity; | 364 | vme_bound = vme_base + size; |
370 | pci_offset = pci_base - vme_base; | 365 | pci_offset = pci_base - vme_base; |
371 | 366 | ||
372 | /* XXX Need to check that vme_base, vme_bound and pci_offset aren't | ||
373 | * too big for registers | ||
374 | */ | ||
375 | |||
376 | if ((i == 0) || (i == 4)) | 367 | if ((i == 0) || (i == 4)) |
377 | granularity = 0x1000; | 368 | granularity = 0x1000; |
378 | else | 369 | else |
@@ -392,26 +383,14 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, | |||
392 | } | 383 | } |
393 | 384 | ||
394 | /* Disable while we are mucking around */ | 385 | /* Disable while we are mucking around */ |
395 | temp_ctl = ioread32(ca91cx42_bridge->base + CA91CX42_VSI_CTL[i]); | 386 | temp_ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); |
396 | temp_ctl &= ~CA91CX42_VSI_CTL_EN; | 387 | temp_ctl &= ~CA91CX42_VSI_CTL_EN; |
397 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_VSI_CTL[i]); | 388 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
398 | 389 | ||
399 | /* Setup mapping */ | 390 | /* Setup mapping */ |
400 | iowrite32(vme_base, ca91cx42_bridge->base + CA91CX42_VSI_BS[i]); | 391 | iowrite32(vme_base, bridge->base + CA91CX42_VSI_BS[i]); |
401 | iowrite32(vme_bound, ca91cx42_bridge->base + CA91CX42_VSI_BD[i]); | 392 | iowrite32(vme_bound, bridge->base + CA91CX42_VSI_BD[i]); |
402 | iowrite32(pci_offset, ca91cx42_bridge->base + CA91CX42_VSI_TO[i]); | 393 | iowrite32(pci_offset, bridge->base + CA91CX42_VSI_TO[i]); |
403 | |||
404 | /* XXX Prefetch stuff currently unsupported */ | ||
405 | #if 0 | ||
406 | if (vmeIn->wrPostEnable) | ||
407 | temp_ctl |= CA91CX42_VSI_CTL_PWEN; | ||
408 | if (vmeIn->prefetchEnable) | ||
409 | temp_ctl |= CA91CX42_VSI_CTL_PREN; | ||
410 | if (vmeIn->rmwLock) | ||
411 | temp_ctl |= CA91CX42_VSI_CTL_LLRMW; | ||
412 | if (vmeIn->data64BitCapable) | ||
413 | temp_ctl |= CA91CX42_VSI_CTL_LD64EN; | ||
414 | #endif | ||
415 | 394 | ||
416 | /* Setup address space */ | 395 | /* Setup address space */ |
417 | temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M; | 396 | temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M; |
@@ -429,12 +408,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, | |||
429 | temp_ctl |= CA91CX42_VSI_CTL_PGM_DATA; | 408 | temp_ctl |= CA91CX42_VSI_CTL_PGM_DATA; |
430 | 409 | ||
431 | /* Write ctl reg without enable */ | 410 | /* Write ctl reg without enable */ |
432 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_VSI_CTL[i]); | 411 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
433 | 412 | ||
434 | if (enabled) | 413 | if (enabled) |
435 | temp_ctl |= CA91CX42_VSI_CTL_EN; | 414 | temp_ctl |= CA91CX42_VSI_CTL_EN; |
436 | 415 | ||
437 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_VSI_CTL[i]); | 416 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
438 | 417 | ||
439 | return 0; | 418 | return 0; |
440 | } | 419 | } |
@@ -445,6 +424,9 @@ int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, | |||
445 | { | 424 | { |
446 | unsigned int i, granularity = 0, ctl = 0; | 425 | unsigned int i, granularity = 0, ctl = 0; |
447 | unsigned long long vme_bound, pci_offset; | 426 | unsigned long long vme_bound, pci_offset; |
427 | struct ca91cx42_driver *bridge; | ||
428 | |||
429 | bridge = image->parent->driver_priv; | ||
448 | 430 | ||
449 | i = image->number; | 431 | i = image->number; |
450 | 432 | ||
@@ -454,11 +436,11 @@ int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, | |||
454 | granularity = 0x10000; | 436 | granularity = 0x10000; |
455 | 437 | ||
456 | /* Read Registers */ | 438 | /* Read Registers */ |
457 | ctl = ioread32(ca91cx42_bridge->base + CA91CX42_VSI_CTL[i]); | 439 | ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); |
458 | 440 | ||
459 | *vme_base = ioread32(ca91cx42_bridge->base + CA91CX42_VSI_BS[i]); | 441 | *vme_base = ioread32(bridge->base + CA91CX42_VSI_BS[i]); |
460 | vme_bound = ioread32(ca91cx42_bridge->base + CA91CX42_VSI_BD[i]); | 442 | vme_bound = ioread32(bridge->base + CA91CX42_VSI_BD[i]); |
461 | pci_offset = ioread32(ca91cx42_bridge->base + CA91CX42_VSI_TO[i]); | 443 | pci_offset = ioread32(bridge->base + CA91CX42_VSI_TO[i]); |
462 | 444 | ||
463 | *pci_base = (dma_addr_t)vme_base + pci_offset; | 445 | *pci_base = (dma_addr_t)vme_base + pci_offset; |
464 | *size = (unsigned long long)((vme_bound - *vme_base) + granularity); | 446 | *size = (unsigned long long)((vme_bound - *vme_base) + granularity); |
@@ -502,6 +484,9 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, | |||
502 | unsigned long long existing_size; | 484 | unsigned long long existing_size; |
503 | int retval = 0; | 485 | int retval = 0; |
504 | struct pci_dev *pdev; | 486 | struct pci_dev *pdev; |
487 | struct vme_bridge *ca91cx42_bridge; | ||
488 | |||
489 | ca91cx42_bridge = image->parent; | ||
505 | 490 | ||
506 | /* Find pci_dev container of dev */ | 491 | /* Find pci_dev container of dev */ |
507 | if (ca91cx42_bridge->parent == NULL) { | 492 | if (ca91cx42_bridge->parent == NULL) { |
@@ -510,8 +495,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, | |||
510 | } | 495 | } |
511 | pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); | 496 | pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); |
512 | 497 | ||
513 | existing_size = (unsigned long long)(image->pci_resource.end - | 498 | existing_size = (unsigned long long)(image->bus_resource.end - |
514 | image->pci_resource.start); | 499 | image->bus_resource.start); |
515 | 500 | ||
516 | /* If the existing size is OK, return */ | 501 | /* If the existing size is OK, return */ |
517 | if (existing_size == (size - 1)) | 502 | if (existing_size == (size - 1)) |
@@ -520,15 +505,15 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, | |||
520 | if (existing_size != 0) { | 505 | if (existing_size != 0) { |
521 | iounmap(image->kern_base); | 506 | iounmap(image->kern_base); |
522 | image->kern_base = NULL; | 507 | image->kern_base = NULL; |
523 | if (image->pci_resource.name != NULL) | 508 | if (image->bus_resource.name != NULL) |
524 | kfree(image->pci_resource.name); | 509 | kfree(image->bus_resource.name); |
525 | release_resource(&(image->pci_resource)); | 510 | release_resource(&(image->bus_resource)); |
526 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 511 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
527 | } | 512 | } |
528 | 513 | ||
529 | if (image->pci_resource.name == NULL) { | 514 | if (image->bus_resource.name == NULL) { |
530 | image->pci_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); | 515 | image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); |
531 | if (image->pci_resource.name == NULL) { | 516 | if (image->bus_resource.name == NULL) { |
532 | printk(KERN_ERR "Unable to allocate memory for resource" | 517 | printk(KERN_ERR "Unable to allocate memory for resource" |
533 | " name\n"); | 518 | " name\n"); |
534 | retval = -ENOMEM; | 519 | retval = -ENOMEM; |
@@ -536,26 +521,26 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, | |||
536 | } | 521 | } |
537 | } | 522 | } |
538 | 523 | ||
539 | sprintf((char *)image->pci_resource.name, "%s.%d", | 524 | sprintf((char *)image->bus_resource.name, "%s.%d", |
540 | ca91cx42_bridge->name, image->number); | 525 | ca91cx42_bridge->name, image->number); |
541 | 526 | ||
542 | image->pci_resource.start = 0; | 527 | image->bus_resource.start = 0; |
543 | image->pci_resource.end = (unsigned long)size; | 528 | image->bus_resource.end = (unsigned long)size; |
544 | image->pci_resource.flags = IORESOURCE_MEM; | 529 | image->bus_resource.flags = IORESOURCE_MEM; |
545 | 530 | ||
546 | retval = pci_bus_alloc_resource(pdev->bus, | 531 | retval = pci_bus_alloc_resource(pdev->bus, |
547 | &(image->pci_resource), size, size, PCIBIOS_MIN_MEM, | 532 | &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, |
548 | 0, NULL, NULL); | 533 | 0, NULL, NULL); |
549 | if (retval) { | 534 | if (retval) { |
550 | printk(KERN_ERR "Failed to allocate mem resource for " | 535 | printk(KERN_ERR "Failed to allocate mem resource for " |
551 | "window %d size 0x%lx start 0x%lx\n", | 536 | "window %d size 0x%lx start 0x%lx\n", |
552 | image->number, (unsigned long)size, | 537 | image->number, (unsigned long)size, |
553 | (unsigned long)image->pci_resource.start); | 538 | (unsigned long)image->bus_resource.start); |
554 | goto err_resource; | 539 | goto err_resource; |
555 | } | 540 | } |
556 | 541 | ||
557 | image->kern_base = ioremap_nocache( | 542 | image->kern_base = ioremap_nocache( |
558 | image->pci_resource.start, size); | 543 | image->bus_resource.start, size); |
559 | if (image->kern_base == NULL) { | 544 | if (image->kern_base == NULL) { |
560 | printk(KERN_ERR "Failed to remap resource\n"); | 545 | printk(KERN_ERR "Failed to remap resource\n"); |
561 | retval = -ENOMEM; | 546 | retval = -ENOMEM; |
@@ -567,24 +552,24 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, | |||
567 | iounmap(image->kern_base); | 552 | iounmap(image->kern_base); |
568 | image->kern_base = NULL; | 553 | image->kern_base = NULL; |
569 | err_remap: | 554 | err_remap: |
570 | release_resource(&(image->pci_resource)); | 555 | release_resource(&(image->bus_resource)); |
571 | err_resource: | 556 | err_resource: |
572 | kfree(image->pci_resource.name); | 557 | kfree(image->bus_resource.name); |
573 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 558 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
574 | err_name: | 559 | err_name: |
575 | return retval; | 560 | return retval; |
576 | } | 561 | } |
577 | 562 | ||
578 | /* | 563 | /* |
579 | * * Free and unmap PCI Resource | 564 | * Free and unmap PCI Resource |
580 | * */ | 565 | */ |
581 | static void ca91cx42_free_resource(struct vme_master_resource *image) | 566 | static void ca91cx42_free_resource(struct vme_master_resource *image) |
582 | { | 567 | { |
583 | iounmap(image->kern_base); | 568 | iounmap(image->kern_base); |
584 | image->kern_base = NULL; | 569 | image->kern_base = NULL; |
585 | release_resource(&(image->pci_resource)); | 570 | release_resource(&(image->bus_resource)); |
586 | kfree(image->pci_resource.name); | 571 | kfree(image->bus_resource.name); |
587 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 572 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
588 | } | 573 | } |
589 | 574 | ||
590 | 575 | ||
@@ -593,17 +578,27 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, | |||
593 | vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) | 578 | vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) |
594 | { | 579 | { |
595 | int retval = 0; | 580 | int retval = 0; |
596 | unsigned int i; | 581 | unsigned int i, granularity = 0; |
597 | unsigned int temp_ctl = 0; | 582 | unsigned int temp_ctl = 0; |
598 | unsigned long long pci_bound, vme_offset, pci_base; | 583 | unsigned long long pci_bound, vme_offset, pci_base; |
584 | struct ca91cx42_driver *bridge; | ||
585 | |||
586 | bridge = image->parent->driver_priv; | ||
587 | |||
588 | i = image->number; | ||
589 | |||
590 | if ((i == 0) || (i == 4)) | ||
591 | granularity = 0x1000; | ||
592 | else | ||
593 | granularity = 0x10000; | ||
599 | 594 | ||
600 | /* Verify input data */ | 595 | /* Verify input data */ |
601 | if (vme_base & 0xFFF) { | 596 | if (vme_base & (granularity - 1)) { |
602 | printk(KERN_ERR "Invalid VME Window alignment\n"); | 597 | printk(KERN_ERR "Invalid VME Window alignment\n"); |
603 | retval = -EINVAL; | 598 | retval = -EINVAL; |
604 | goto err_window; | 599 | goto err_window; |
605 | } | 600 | } |
606 | if (size & 0xFFF) { | 601 | if (size & (granularity - 1)) { |
607 | printk(KERN_ERR "Invalid VME Window alignment\n"); | 602 | printk(KERN_ERR "Invalid VME Window alignment\n"); |
608 | retval = -EINVAL; | 603 | retval = -EINVAL; |
609 | goto err_window; | 604 | goto err_window; |
@@ -611,9 +606,6 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, | |||
611 | 606 | ||
612 | spin_lock(&(image->lock)); | 607 | spin_lock(&(image->lock)); |
613 | 608 | ||
614 | /* XXX We should do this much later, so that we can exit without | ||
615 | * needing to redo the mapping... | ||
616 | */ | ||
617 | /* | 609 | /* |
618 | * Let's allocate the resource here rather than further up the stack as | 610 | * Let's allocate the resource here rather than further up the stack as |
619 | * it avoids pushing loads of bus dependant stuff up the stack | 611 | * it avoids pushing loads of bus dependant stuff up the stack |
@@ -627,27 +619,19 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, | |||
627 | goto err_res; | 619 | goto err_res; |
628 | } | 620 | } |
629 | 621 | ||
630 | pci_base = (unsigned long long)image->pci_resource.start; | 622 | pci_base = (unsigned long long)image->bus_resource.start; |
631 | 623 | ||
632 | /* | 624 | /* |
633 | * Bound address is a valid address for the window, adjust | 625 | * Bound address is a valid address for the window, adjust |
634 | * according to window granularity. | 626 | * according to window granularity. |
635 | */ | 627 | */ |
636 | pci_bound = pci_base + (size - 0x1000); | 628 | pci_bound = pci_base + size; |
637 | vme_offset = vme_base - pci_base; | 629 | vme_offset = vme_base - pci_base; |
638 | 630 | ||
639 | i = image->number; | ||
640 | |||
641 | /* Disable while we are mucking around */ | 631 | /* Disable while we are mucking around */ |
642 | temp_ctl = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_CTL[i]); | 632 | temp_ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); |
643 | temp_ctl &= ~CA91CX42_LSI_CTL_EN; | 633 | temp_ctl &= ~CA91CX42_LSI_CTL_EN; |
644 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_LSI_CTL[i]); | 634 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
645 | |||
646 | /* XXX Prefetch stuff currently unsupported */ | ||
647 | #if 0 | ||
648 | if (vmeOut->wrPostEnable) | ||
649 | temp_ctl |= 0x40000000; | ||
650 | #endif | ||
651 | 635 | ||
652 | /* Setup cycle types */ | 636 | /* Setup cycle types */ |
653 | temp_ctl &= ~CA91CX42_LSI_CTL_VCT_M; | 637 | temp_ctl &= ~CA91CX42_LSI_CTL_VCT_M; |
@@ -718,17 +702,17 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, | |||
718 | temp_ctl |= CA91CX42_LSI_CTL_PGM_PGM; | 702 | temp_ctl |= CA91CX42_LSI_CTL_PGM_PGM; |
719 | 703 | ||
720 | /* Setup mapping */ | 704 | /* Setup mapping */ |
721 | iowrite32(pci_base, ca91cx42_bridge->base + CA91CX42_LSI_BS[i]); | 705 | iowrite32(pci_base, bridge->base + CA91CX42_LSI_BS[i]); |
722 | iowrite32(pci_bound, ca91cx42_bridge->base + CA91CX42_LSI_BD[i]); | 706 | iowrite32(pci_bound, bridge->base + CA91CX42_LSI_BD[i]); |
723 | iowrite32(vme_offset, ca91cx42_bridge->base + CA91CX42_LSI_TO[i]); | 707 | iowrite32(vme_offset, bridge->base + CA91CX42_LSI_TO[i]); |
724 | 708 | ||
725 | /* Write ctl reg without enable */ | 709 | /* Write ctl reg without enable */ |
726 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_LSI_CTL[i]); | 710 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
727 | 711 | ||
728 | if (enabled) | 712 | if (enabled) |
729 | temp_ctl |= CA91CX42_LSI_CTL_EN; | 713 | temp_ctl |= CA91CX42_LSI_CTL_EN; |
730 | 714 | ||
731 | iowrite32(temp_ctl, ca91cx42_bridge->base + CA91CX42_LSI_CTL[i]); | 715 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
732 | 716 | ||
733 | spin_unlock(&(image->lock)); | 717 | spin_unlock(&(image->lock)); |
734 | return 0; | 718 | return 0; |
@@ -747,17 +731,20 @@ int __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, | |||
747 | { | 731 | { |
748 | unsigned int i, ctl; | 732 | unsigned int i, ctl; |
749 | unsigned long long pci_base, pci_bound, vme_offset; | 733 | unsigned long long pci_base, pci_bound, vme_offset; |
734 | struct ca91cx42_driver *bridge; | ||
735 | |||
736 | bridge = image->parent->driver_priv; | ||
750 | 737 | ||
751 | i = image->number; | 738 | i = image->number; |
752 | 739 | ||
753 | ctl = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_CTL[i]); | 740 | ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); |
754 | 741 | ||
755 | pci_base = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_BS[i]); | 742 | pci_base = ioread32(bridge->base + CA91CX42_LSI_BS[i]); |
756 | vme_offset = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_TO[i]); | 743 | vme_offset = ioread32(bridge->base + CA91CX42_LSI_TO[i]); |
757 | pci_bound = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_BD[i]); | 744 | pci_bound = ioread32(bridge->base + CA91CX42_LSI_BD[i]); |
758 | 745 | ||
759 | *vme_base = pci_base + vme_offset; | 746 | *vme_base = pci_base + vme_offset; |
760 | *size = (pci_bound - pci_base) + 0x1000; | 747 | *size = (unsigned long long)(pci_bound - pci_base); |
761 | 748 | ||
762 | *enabled = 0; | 749 | *enabled = 0; |
763 | *aspace = 0; | 750 | *aspace = 0; |
@@ -822,12 +809,6 @@ int __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, | |||
822 | break; | 809 | break; |
823 | } | 810 | } |
824 | 811 | ||
825 | /* XXX Prefetch stuff currently unsupported */ | ||
826 | #if 0 | ||
827 | if (ctl & 0x40000000) | ||
828 | vmeOut->wrPostEnable = 1; | ||
829 | #endif | ||
830 | |||
831 | return 0; | 812 | return 0; |
832 | } | 813 | } |
833 | 814 | ||
@@ -850,7 +831,7 @@ int ca91cx42_master_get(struct vme_master_resource *image, int *enabled, | |||
850 | ssize_t ca91cx42_master_read(struct vme_master_resource *image, void *buf, | 831 | ssize_t ca91cx42_master_read(struct vme_master_resource *image, void *buf, |
851 | size_t count, loff_t offset) | 832 | size_t count, loff_t offset) |
852 | { | 833 | { |
853 | int retval; | 834 | ssize_t retval; |
854 | 835 | ||
855 | spin_lock(&(image->lock)); | 836 | spin_lock(&(image->lock)); |
856 | 837 | ||
@@ -877,12 +858,528 @@ ssize_t ca91cx42_master_write(struct vme_master_resource *image, void *buf, | |||
877 | return retval; | 858 | return retval; |
878 | } | 859 | } |
879 | 860 | ||
880 | int ca91cx42_slot_get(void) | 861 | unsigned int ca91cx42_master_rmw(struct vme_master_resource *image, |
862 | unsigned int mask, unsigned int compare, unsigned int swap, | ||
863 | loff_t offset) | ||
864 | { | ||
865 | u32 pci_addr, result; | ||
866 | int i; | ||
867 | struct ca91cx42_driver *bridge; | ||
868 | struct device *dev; | ||
869 | |||
870 | bridge = image->parent->driver_priv; | ||
871 | dev = image->parent->parent; | ||
872 | |||
873 | /* Find the PCI address that maps to the desired VME address */ | ||
874 | i = image->number; | ||
875 | |||
876 | /* Locking as we can only do one of these at a time */ | ||
877 | mutex_lock(&(bridge->vme_rmw)); | ||
878 | |||
879 | /* Lock image */ | ||
880 | spin_lock(&(image->lock)); | ||
881 | |||
882 | pci_addr = (u32)image->kern_base + offset; | ||
883 | |||
884 | /* Address must be 4-byte aligned */ | ||
885 | if (pci_addr & 0x3) { | ||
886 | dev_err(dev, "RMW Address not 4-byte aligned\n"); | ||
887 | return -EINVAL; | ||
888 | } | ||
889 | |||
890 | /* Ensure RMW Disabled whilst configuring */ | ||
891 | iowrite32(0, bridge->base + SCYC_CTL); | ||
892 | |||
893 | /* Configure registers */ | ||
894 | iowrite32(mask, bridge->base + SCYC_EN); | ||
895 | iowrite32(compare, bridge->base + SCYC_CMP); | ||
896 | iowrite32(swap, bridge->base + SCYC_SWP); | ||
897 | iowrite32(pci_addr, bridge->base + SCYC_ADDR); | ||
898 | |||
899 | /* Enable RMW */ | ||
900 | iowrite32(CA91CX42_SCYC_CTL_CYC_RMW, bridge->base + SCYC_CTL); | ||
901 | |||
902 | /* Kick process off with a read to the required address. */ | ||
903 | result = ioread32(image->kern_base + offset); | ||
904 | |||
905 | /* Disable RMW */ | ||
906 | iowrite32(0, bridge->base + SCYC_CTL); | ||
907 | |||
908 | spin_unlock(&(image->lock)); | ||
909 | |||
910 | mutex_unlock(&(bridge->vme_rmw)); | ||
911 | |||
912 | return result; | ||
913 | } | ||
914 | |||
915 | int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, | ||
916 | struct vme_dma_attr *dest, size_t count) | ||
917 | { | ||
918 | struct ca91cx42_dma_entry *entry, *prev; | ||
919 | struct vme_dma_pci *pci_attr; | ||
920 | struct vme_dma_vme *vme_attr; | ||
921 | dma_addr_t desc_ptr; | ||
922 | int retval = 0; | ||
923 | |||
924 | /* XXX descriptor must be aligned on 64-bit boundaries */ | ||
925 | entry = (struct ca91cx42_dma_entry *) | ||
926 | kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL); | ||
927 | if (entry == NULL) { | ||
928 | printk(KERN_ERR "Failed to allocate memory for dma resource " | ||
929 | "structure\n"); | ||
930 | retval = -ENOMEM; | ||
931 | goto err_mem; | ||
932 | } | ||
933 | |||
934 | /* Test descriptor alignment */ | ||
935 | if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) { | ||
936 | printk("Descriptor not aligned to 16 byte boundary as " | ||
937 | "required: %p\n", &(entry->descriptor)); | ||
938 | retval = -EINVAL; | ||
939 | goto err_align; | ||
940 | } | ||
941 | |||
942 | memset(&(entry->descriptor), 0, sizeof(struct ca91cx42_dma_descriptor)); | ||
943 | |||
944 | if (dest->type == VME_DMA_VME) { | ||
945 | entry->descriptor.dctl |= CA91CX42_DCTL_L2V; | ||
946 | vme_attr = (struct vme_dma_vme *)dest->private; | ||
947 | pci_attr = (struct vme_dma_pci *)src->private; | ||
948 | } else { | ||
949 | vme_attr = (struct vme_dma_vme *)src->private; | ||
950 | pci_attr = (struct vme_dma_pci *)dest->private; | ||
951 | } | ||
952 | |||
953 | /* Check we can do fullfill required attributes */ | ||
954 | if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | | ||
955 | VME_USER2)) != 0) { | ||
956 | |||
957 | printk(KERN_ERR "Unsupported cycle type\n"); | ||
958 | retval = -EINVAL; | ||
959 | goto err_aspace; | ||
960 | } | ||
961 | |||
962 | if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | | ||
963 | VME_PROG | VME_DATA)) != 0) { | ||
964 | |||
965 | printk(KERN_ERR "Unsupported cycle type\n"); | ||
966 | retval = -EINVAL; | ||
967 | goto err_cycle; | ||
968 | } | ||
969 | |||
970 | /* Check to see if we can fullfill source and destination */ | ||
971 | if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || | ||
972 | ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { | ||
973 | |||
974 | printk(KERN_ERR "Cannot perform transfer with this " | ||
975 | "source-destination combination\n"); | ||
976 | retval = -EINVAL; | ||
977 | goto err_direct; | ||
978 | } | ||
979 | |||
980 | /* Setup cycle types */ | ||
981 | if (vme_attr->cycle & VME_BLT) | ||
982 | entry->descriptor.dctl |= CA91CX42_DCTL_VCT_BLT; | ||
983 | |||
984 | /* Setup data width */ | ||
985 | switch (vme_attr->dwidth) { | ||
986 | case VME_D8: | ||
987 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D8; | ||
988 | break; | ||
989 | case VME_D16: | ||
990 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D16; | ||
991 | break; | ||
992 | case VME_D32: | ||
993 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D32; | ||
994 | break; | ||
995 | case VME_D64: | ||
996 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; | ||
997 | break; | ||
998 | default: | ||
999 | printk(KERN_ERR "Invalid data width\n"); | ||
1000 | return -EINVAL; | ||
1001 | } | ||
1002 | |||
1003 | /* Setup address space */ | ||
1004 | switch (vme_attr->aspace) { | ||
1005 | case VME_A16: | ||
1006 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A16; | ||
1007 | break; | ||
1008 | case VME_A24: | ||
1009 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A24; | ||
1010 | break; | ||
1011 | case VME_A32: | ||
1012 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A32; | ||
1013 | break; | ||
1014 | case VME_USER1: | ||
1015 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER1; | ||
1016 | break; | ||
1017 | case VME_USER2: | ||
1018 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; | ||
1019 | break; | ||
1020 | default: | ||
1021 | printk(KERN_ERR "Invalid address space\n"); | ||
1022 | return -EINVAL; | ||
1023 | break; | ||
1024 | } | ||
1025 | |||
1026 | if (vme_attr->cycle & VME_SUPER) | ||
1027 | entry->descriptor.dctl |= CA91CX42_DCTL_SUPER_SUPR; | ||
1028 | if (vme_attr->cycle & VME_PROG) | ||
1029 | entry->descriptor.dctl |= CA91CX42_DCTL_PGM_PGM; | ||
1030 | |||
1031 | entry->descriptor.dtbc = count; | ||
1032 | entry->descriptor.dla = pci_attr->address; | ||
1033 | entry->descriptor.dva = vme_attr->address; | ||
1034 | entry->descriptor.dcpp = CA91CX42_DCPP_NULL; | ||
1035 | |||
1036 | /* Add to list */ | ||
1037 | list_add_tail(&(entry->list), &(list->entries)); | ||
1038 | |||
1039 | /* Fill out previous descriptors "Next Address" */ | ||
1040 | if (entry->list.prev != &(list->entries)) { | ||
1041 | prev = list_entry(entry->list.prev, struct ca91cx42_dma_entry, | ||
1042 | list); | ||
1043 | /* We need the bus address for the pointer */ | ||
1044 | desc_ptr = virt_to_bus(&(entry->descriptor)); | ||
1045 | prev->descriptor.dcpp = desc_ptr & ~CA91CX42_DCPP_M; | ||
1046 | } | ||
1047 | |||
1048 | return 0; | ||
1049 | |||
1050 | err_cycle: | ||
1051 | err_aspace: | ||
1052 | err_direct: | ||
1053 | err_align: | ||
1054 | kfree(entry); | ||
1055 | err_mem: | ||
1056 | return retval; | ||
1057 | } | ||
1058 | |||
1059 | static int ca91cx42_dma_busy(struct vme_bridge *ca91cx42_bridge) | ||
1060 | { | ||
1061 | u32 tmp; | ||
1062 | struct ca91cx42_driver *bridge; | ||
1063 | |||
1064 | bridge = ca91cx42_bridge->driver_priv; | ||
1065 | |||
1066 | tmp = ioread32(bridge->base + DGCS); | ||
1067 | |||
1068 | if (tmp & CA91CX42_DGCS_ACT) | ||
1069 | return 0; | ||
1070 | else | ||
1071 | return 1; | ||
1072 | } | ||
1073 | |||
1074 | int ca91cx42_dma_list_exec(struct vme_dma_list *list) | ||
1075 | { | ||
1076 | struct vme_dma_resource *ctrlr; | ||
1077 | struct ca91cx42_dma_entry *entry; | ||
1078 | int retval = 0; | ||
1079 | dma_addr_t bus_addr; | ||
1080 | u32 val; | ||
1081 | |||
1082 | struct ca91cx42_driver *bridge; | ||
1083 | |||
1084 | ctrlr = list->parent; | ||
1085 | |||
1086 | bridge = ctrlr->parent->driver_priv; | ||
1087 | |||
1088 | mutex_lock(&(ctrlr->mtx)); | ||
1089 | |||
1090 | if (!(list_empty(&(ctrlr->running)))) { | ||
1091 | /* | ||
1092 | * XXX We have an active DMA transfer and currently haven't | ||
1093 | * sorted out the mechanism for "pending" DMA transfers. | ||
1094 | * Return busy. | ||
1095 | */ | ||
1096 | /* Need to add to pending here */ | ||
1097 | mutex_unlock(&(ctrlr->mtx)); | ||
1098 | return -EBUSY; | ||
1099 | } else { | ||
1100 | list_add(&(list->list), &(ctrlr->running)); | ||
1101 | } | ||
1102 | |||
1103 | /* Get first bus address and write into registers */ | ||
1104 | entry = list_first_entry(&(list->entries), struct ca91cx42_dma_entry, | ||
1105 | list); | ||
1106 | |||
1107 | bus_addr = virt_to_bus(&(entry->descriptor)); | ||
1108 | |||
1109 | mutex_unlock(&(ctrlr->mtx)); | ||
1110 | |||
1111 | iowrite32(0, bridge->base + DTBC); | ||
1112 | iowrite32(bus_addr & ~CA91CX42_DCPP_M, bridge->base + DCPP); | ||
1113 | |||
1114 | /* Start the operation */ | ||
1115 | val = ioread32(bridge->base + DGCS); | ||
1116 | |||
1117 | /* XXX Could set VMEbus On and Off Counters here */ | ||
1118 | val &= (CA91CX42_DGCS_VON_M | CA91CX42_DGCS_VOFF_M); | ||
1119 | |||
1120 | val |= (CA91CX42_DGCS_CHAIN | CA91CX42_DGCS_STOP | CA91CX42_DGCS_HALT | | ||
1121 | CA91CX42_DGCS_DONE | CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | | ||
1122 | CA91CX42_DGCS_PERR); | ||
1123 | |||
1124 | iowrite32(val, bridge->base + DGCS); | ||
1125 | |||
1126 | val |= CA91CX42_DGCS_GO; | ||
1127 | |||
1128 | iowrite32(val, bridge->base + DGCS); | ||
1129 | |||
1130 | wait_event_interruptible(bridge->dma_queue, | ||
1131 | ca91cx42_dma_busy(ctrlr->parent)); | ||
1132 | |||
1133 | /* | ||
1134 | * Read status register, this register is valid until we kick off a | ||
1135 | * new transfer. | ||
1136 | */ | ||
1137 | val = ioread32(bridge->base + DGCS); | ||
1138 | |||
1139 | if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | | ||
1140 | CA91CX42_DGCS_PERR)) { | ||
1141 | |||
1142 | printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val); | ||
1143 | val = ioread32(bridge->base + DCTL); | ||
1144 | } | ||
1145 | |||
1146 | /* Remove list from running list */ | ||
1147 | mutex_lock(&(ctrlr->mtx)); | ||
1148 | list_del(&(list->list)); | ||
1149 | mutex_unlock(&(ctrlr->mtx)); | ||
1150 | |||
1151 | return retval; | ||
1152 | |||
1153 | } | ||
1154 | |||
1155 | int ca91cx42_dma_list_empty(struct vme_dma_list *list) | ||
1156 | { | ||
1157 | struct list_head *pos, *temp; | ||
1158 | struct ca91cx42_dma_entry *entry; | ||
1159 | |||
1160 | /* detach and free each entry */ | ||
1161 | list_for_each_safe(pos, temp, &(list->entries)) { | ||
1162 | list_del(pos); | ||
1163 | entry = list_entry(pos, struct ca91cx42_dma_entry, list); | ||
1164 | kfree(entry); | ||
1165 | } | ||
1166 | |||
1167 | return 0; | ||
1168 | } | ||
1169 | |||
1170 | /* | ||
1171 | * All 4 location monitors reside at the same base - this is therefore a | ||
1172 | * system wide configuration. | ||
1173 | * | ||
1174 | * This does not enable the LM monitor - that should be done when the first | ||
1175 | * callback is attached and disabled when the last callback is removed. | ||
1176 | */ | ||
1177 | int ca91cx42_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, | ||
1178 | vme_address_t aspace, vme_cycle_t cycle) | ||
1179 | { | ||
1180 | u32 temp_base, lm_ctl = 0; | ||
1181 | int i; | ||
1182 | struct ca91cx42_driver *bridge; | ||
1183 | struct device *dev; | ||
1184 | |||
1185 | bridge = lm->parent->driver_priv; | ||
1186 | dev = lm->parent->parent; | ||
1187 | |||
1188 | /* Check the alignment of the location monitor */ | ||
1189 | temp_base = (u32)lm_base; | ||
1190 | if (temp_base & 0xffff) { | ||
1191 | dev_err(dev, "Location monitor must be aligned to 64KB " | ||
1192 | "boundary"); | ||
1193 | return -EINVAL; | ||
1194 | } | ||
1195 | |||
1196 | mutex_lock(&(lm->mtx)); | ||
1197 | |||
1198 | /* If we already have a callback attached, we can't move it! */ | ||
1199 | for (i = 0; i < lm->monitors; i++) { | ||
1200 | if (bridge->lm_callback[i] != NULL) { | ||
1201 | mutex_unlock(&(lm->mtx)); | ||
1202 | dev_err(dev, "Location monitor callback attached, " | ||
1203 | "can't reset\n"); | ||
1204 | return -EBUSY; | ||
1205 | } | ||
1206 | } | ||
1207 | |||
1208 | switch (aspace) { | ||
1209 | case VME_A16: | ||
1210 | lm_ctl |= CA91CX42_LM_CTL_AS_A16; | ||
1211 | break; | ||
1212 | case VME_A24: | ||
1213 | lm_ctl |= CA91CX42_LM_CTL_AS_A24; | ||
1214 | break; | ||
1215 | case VME_A32: | ||
1216 | lm_ctl |= CA91CX42_LM_CTL_AS_A32; | ||
1217 | break; | ||
1218 | default: | ||
1219 | mutex_unlock(&(lm->mtx)); | ||
1220 | dev_err(dev, "Invalid address space\n"); | ||
1221 | return -EINVAL; | ||
1222 | break; | ||
1223 | } | ||
1224 | |||
1225 | if (cycle & VME_SUPER) | ||
1226 | lm_ctl |= CA91CX42_LM_CTL_SUPR; | ||
1227 | if (cycle & VME_USER) | ||
1228 | lm_ctl |= CA91CX42_LM_CTL_NPRIV; | ||
1229 | if (cycle & VME_PROG) | ||
1230 | lm_ctl |= CA91CX42_LM_CTL_PGM; | ||
1231 | if (cycle & VME_DATA) | ||
1232 | lm_ctl |= CA91CX42_LM_CTL_DATA; | ||
1233 | |||
1234 | iowrite32(lm_base, bridge->base + LM_BS); | ||
1235 | iowrite32(lm_ctl, bridge->base + LM_CTL); | ||
1236 | |||
1237 | mutex_unlock(&(lm->mtx)); | ||
1238 | |||
1239 | return 0; | ||
1240 | } | ||
1241 | |||
1242 | /* Get configuration of the callback monitor and return whether it is enabled | ||
1243 | * or disabled. | ||
1244 | */ | ||
1245 | int ca91cx42_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, | ||
1246 | vme_address_t *aspace, vme_cycle_t *cycle) | ||
1247 | { | ||
1248 | u32 lm_ctl, enabled = 0; | ||
1249 | struct ca91cx42_driver *bridge; | ||
1250 | |||
1251 | bridge = lm->parent->driver_priv; | ||
1252 | |||
1253 | mutex_lock(&(lm->mtx)); | ||
1254 | |||
1255 | *lm_base = (unsigned long long)ioread32(bridge->base + LM_BS); | ||
1256 | lm_ctl = ioread32(bridge->base + LM_CTL); | ||
1257 | |||
1258 | if (lm_ctl & CA91CX42_LM_CTL_EN) | ||
1259 | enabled = 1; | ||
1260 | |||
1261 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A16) | ||
1262 | *aspace = VME_A16; | ||
1263 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A24) | ||
1264 | *aspace = VME_A24; | ||
1265 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A32) | ||
1266 | *aspace = VME_A32; | ||
1267 | |||
1268 | *cycle = 0; | ||
1269 | if (lm_ctl & CA91CX42_LM_CTL_SUPR) | ||
1270 | *cycle |= VME_SUPER; | ||
1271 | if (lm_ctl & CA91CX42_LM_CTL_NPRIV) | ||
1272 | *cycle |= VME_USER; | ||
1273 | if (lm_ctl & CA91CX42_LM_CTL_PGM) | ||
1274 | *cycle |= VME_PROG; | ||
1275 | if (lm_ctl & CA91CX42_LM_CTL_DATA) | ||
1276 | *cycle |= VME_DATA; | ||
1277 | |||
1278 | mutex_unlock(&(lm->mtx)); | ||
1279 | |||
1280 | return enabled; | ||
1281 | } | ||
1282 | |||
1283 | /* | ||
1284 | * Attach a callback to a specific location monitor. | ||
1285 | * | ||
1286 | * Callback will be passed the monitor triggered. | ||
1287 | */ | ||
1288 | int ca91cx42_lm_attach(struct vme_lm_resource *lm, int monitor, | ||
1289 | void (*callback)(int)) | ||
1290 | { | ||
1291 | u32 lm_ctl, tmp; | ||
1292 | struct ca91cx42_driver *bridge; | ||
1293 | struct device *dev; | ||
1294 | |||
1295 | bridge = lm->parent->driver_priv; | ||
1296 | dev = lm->parent->parent; | ||
1297 | |||
1298 | mutex_lock(&(lm->mtx)); | ||
1299 | |||
1300 | /* Ensure that the location monitor is configured - need PGM or DATA */ | ||
1301 | lm_ctl = ioread32(bridge->base + LM_CTL); | ||
1302 | if ((lm_ctl & (CA91CX42_LM_CTL_PGM | CA91CX42_LM_CTL_DATA)) == 0) { | ||
1303 | mutex_unlock(&(lm->mtx)); | ||
1304 | dev_err(dev, "Location monitor not properly configured\n"); | ||
1305 | return -EINVAL; | ||
1306 | } | ||
1307 | |||
1308 | /* Check that a callback isn't already attached */ | ||
1309 | if (bridge->lm_callback[monitor] != NULL) { | ||
1310 | mutex_unlock(&(lm->mtx)); | ||
1311 | dev_err(dev, "Existing callback attached\n"); | ||
1312 | return -EBUSY; | ||
1313 | } | ||
1314 | |||
1315 | /* Attach callback */ | ||
1316 | bridge->lm_callback[monitor] = callback; | ||
1317 | |||
1318 | /* Enable Location Monitor interrupt */ | ||
1319 | tmp = ioread32(bridge->base + LINT_EN); | ||
1320 | tmp |= CA91CX42_LINT_LM[monitor]; | ||
1321 | iowrite32(tmp, bridge->base + LINT_EN); | ||
1322 | |||
1323 | /* Ensure that global Location Monitor Enable set */ | ||
1324 | if ((lm_ctl & CA91CX42_LM_CTL_EN) == 0) { | ||
1325 | lm_ctl |= CA91CX42_LM_CTL_EN; | ||
1326 | iowrite32(lm_ctl, bridge->base + LM_CTL); | ||
1327 | } | ||
1328 | |||
1329 | mutex_unlock(&(lm->mtx)); | ||
1330 | |||
1331 | return 0; | ||
1332 | } | ||
1333 | |||
1334 | /* | ||
1335 | * Detach a callback function forn a specific location monitor. | ||
1336 | */ | ||
1337 | int ca91cx42_lm_detach(struct vme_lm_resource *lm, int monitor) | ||
1338 | { | ||
1339 | u32 tmp; | ||
1340 | struct ca91cx42_driver *bridge; | ||
1341 | |||
1342 | bridge = lm->parent->driver_priv; | ||
1343 | |||
1344 | mutex_lock(&(lm->mtx)); | ||
1345 | |||
1346 | /* Disable Location Monitor and ensure previous interrupts are clear */ | ||
1347 | tmp = ioread32(bridge->base + LINT_EN); | ||
1348 | tmp &= ~CA91CX42_LINT_LM[monitor]; | ||
1349 | iowrite32(tmp, bridge->base + LINT_EN); | ||
1350 | |||
1351 | iowrite32(CA91CX42_LINT_LM[monitor], | ||
1352 | bridge->base + LINT_STAT); | ||
1353 | |||
1354 | /* Detach callback */ | ||
1355 | bridge->lm_callback[monitor] = NULL; | ||
1356 | |||
1357 | /* If all location monitors disabled, disable global Location Monitor */ | ||
1358 | if ((tmp & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | | ||
1359 | CA91CX42_LINT_LM3)) == 0) { | ||
1360 | tmp = ioread32(bridge->base + LM_CTL); | ||
1361 | tmp &= ~CA91CX42_LM_CTL_EN; | ||
1362 | iowrite32(tmp, bridge->base + LM_CTL); | ||
1363 | } | ||
1364 | |||
1365 | mutex_unlock(&(lm->mtx)); | ||
1366 | |||
1367 | return 0; | ||
1368 | } | ||
1369 | |||
1370 | int ca91cx42_slot_get(struct vme_bridge *ca91cx42_bridge) | ||
881 | { | 1371 | { |
882 | u32 slot = 0; | 1372 | u32 slot = 0; |
1373 | struct ca91cx42_driver *bridge; | ||
1374 | |||
1375 | bridge = ca91cx42_bridge->driver_priv; | ||
1376 | |||
1377 | if (!geoid) { | ||
1378 | slot = ioread32(bridge->base + VCSR_BS); | ||
1379 | slot = ((slot & CA91CX42_VCSR_BS_SLOT_M) >> 27); | ||
1380 | } else | ||
1381 | slot = geoid; | ||
883 | 1382 | ||
884 | slot = ioread32(ca91cx42_bridge->base + VCSR_BS); | ||
885 | slot = ((slot & CA91CX42_VCSR_BS_SLOT_M) >> 27); | ||
886 | return (int)slot; | 1383 | return (int)slot; |
887 | 1384 | ||
888 | } | 1385 | } |
@@ -900,19 +1397,21 @@ static int __init ca91cx42_init(void) | |||
900 | * Auto-ID or Geographic address. This function ensures that the window is | 1397 | * Auto-ID or Geographic address. This function ensures that the window is |
901 | * enabled at an offset consistent with the boards geopgraphic address. | 1398 | * enabled at an offset consistent with the boards geopgraphic address. |
902 | */ | 1399 | */ |
903 | static int ca91cx42_crcsr_init(struct pci_dev *pdev) | 1400 | static int ca91cx42_crcsr_init(struct vme_bridge *ca91cx42_bridge, |
1401 | struct pci_dev *pdev) | ||
904 | { | 1402 | { |
905 | unsigned int crcsr_addr; | 1403 | unsigned int crcsr_addr; |
906 | int tmp, slot; | 1404 | int tmp, slot; |
1405 | struct ca91cx42_driver *bridge; | ||
1406 | |||
1407 | bridge = ca91cx42_bridge->driver_priv; | ||
1408 | |||
1409 | slot = ca91cx42_slot_get(ca91cx42_bridge); | ||
1410 | |||
1411 | /* Write CSR Base Address if slot ID is supplied as a module param */ | ||
1412 | if (geoid) | ||
1413 | iowrite32(geoid << 27, bridge->base + VCSR_BS); | ||
907 | 1414 | ||
908 | /* XXX We may need to set this somehow as the Universe II does not support | ||
909 | * geographical addressing. | ||
910 | */ | ||
911 | #if 0 | ||
912 | if (vme_slotnum != -1) | ||
913 | iowrite32(vme_slotnum << 27, ca91cx42_bridge->base + VCSR_BS); | ||
914 | #endif | ||
915 | slot = ca91cx42_slot_get(); | ||
916 | dev_info(&pdev->dev, "CR/CSR Offset: %d\n", slot); | 1415 | dev_info(&pdev->dev, "CR/CSR Offset: %d\n", slot); |
917 | if (slot == 0) { | 1416 | if (slot == 0) { |
918 | dev_err(&pdev->dev, "Slot number is unset, not configuring " | 1417 | dev_err(&pdev->dev, "Slot number is unset, not configuring " |
@@ -921,39 +1420,44 @@ static int ca91cx42_crcsr_init(struct pci_dev *pdev) | |||
921 | } | 1420 | } |
922 | 1421 | ||
923 | /* Allocate mem for CR/CSR image */ | 1422 | /* Allocate mem for CR/CSR image */ |
924 | crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, | 1423 | bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, |
925 | &crcsr_bus); | 1424 | &(bridge->crcsr_bus)); |
926 | if (crcsr_kernel == NULL) { | 1425 | if (bridge->crcsr_kernel == NULL) { |
927 | dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " | 1426 | dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " |
928 | "image\n"); | 1427 | "image\n"); |
929 | return -ENOMEM; | 1428 | return -ENOMEM; |
930 | } | 1429 | } |
931 | 1430 | ||
932 | memset(crcsr_kernel, 0, VME_CRCSR_BUF_SIZE); | 1431 | memset(bridge->crcsr_kernel, 0, VME_CRCSR_BUF_SIZE); |
933 | 1432 | ||
934 | crcsr_addr = slot * (512 * 1024); | 1433 | crcsr_addr = slot * (512 * 1024); |
935 | iowrite32(crcsr_bus - crcsr_addr, ca91cx42_bridge->base + VCSR_TO); | 1434 | iowrite32(bridge->crcsr_bus - crcsr_addr, bridge->base + VCSR_TO); |
936 | 1435 | ||
937 | tmp = ioread32(ca91cx42_bridge->base + VCSR_CTL); | 1436 | tmp = ioread32(bridge->base + VCSR_CTL); |
938 | tmp |= CA91CX42_VCSR_CTL_EN; | 1437 | tmp |= CA91CX42_VCSR_CTL_EN; |
939 | iowrite32(tmp, ca91cx42_bridge->base + VCSR_CTL); | 1438 | iowrite32(tmp, bridge->base + VCSR_CTL); |
940 | 1439 | ||
941 | return 0; | 1440 | return 0; |
942 | } | 1441 | } |
943 | 1442 | ||
944 | static void ca91cx42_crcsr_exit(struct pci_dev *pdev) | 1443 | static void ca91cx42_crcsr_exit(struct vme_bridge *ca91cx42_bridge, |
1444 | struct pci_dev *pdev) | ||
945 | { | 1445 | { |
946 | u32 tmp; | 1446 | u32 tmp; |
1447 | struct ca91cx42_driver *bridge; | ||
1448 | |||
1449 | bridge = ca91cx42_bridge->driver_priv; | ||
947 | 1450 | ||
948 | /* Turn off CR/CSR space */ | 1451 | /* Turn off CR/CSR space */ |
949 | tmp = ioread32(ca91cx42_bridge->base + VCSR_CTL); | 1452 | tmp = ioread32(bridge->base + VCSR_CTL); |
950 | tmp &= ~CA91CX42_VCSR_CTL_EN; | 1453 | tmp &= ~CA91CX42_VCSR_CTL_EN; |
951 | iowrite32(tmp, ca91cx42_bridge->base + VCSR_CTL); | 1454 | iowrite32(tmp, bridge->base + VCSR_CTL); |
952 | 1455 | ||
953 | /* Free image */ | 1456 | /* Free image */ |
954 | iowrite32(0, ca91cx42_bridge->base + VCSR_TO); | 1457 | iowrite32(0, bridge->base + VCSR_TO); |
955 | 1458 | ||
956 | pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, crcsr_kernel, crcsr_bus); | 1459 | pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, bridge->crcsr_kernel, |
1460 | bridge->crcsr_bus); | ||
957 | } | 1461 | } |
958 | 1462 | ||
959 | static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | 1463 | static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
@@ -961,11 +1465,11 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
961 | int retval, i; | 1465 | int retval, i; |
962 | u32 data; | 1466 | u32 data; |
963 | struct list_head *pos = NULL; | 1467 | struct list_head *pos = NULL; |
1468 | struct vme_bridge *ca91cx42_bridge; | ||
1469 | struct ca91cx42_driver *ca91cx42_device; | ||
964 | struct vme_master_resource *master_image; | 1470 | struct vme_master_resource *master_image; |
965 | struct vme_slave_resource *slave_image; | 1471 | struct vme_slave_resource *slave_image; |
966 | #if 0 | ||
967 | struct vme_dma_resource *dma_ctrlr; | 1472 | struct vme_dma_resource *dma_ctrlr; |
968 | #endif | ||
969 | struct vme_lm_resource *lm; | 1473 | struct vme_lm_resource *lm; |
970 | 1474 | ||
971 | /* We want to support more than one of each bridge so we need to | 1475 | /* We want to support more than one of each bridge so we need to |
@@ -982,6 +1486,19 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
982 | 1486 | ||
983 | memset(ca91cx42_bridge, 0, sizeof(struct vme_bridge)); | 1487 | memset(ca91cx42_bridge, 0, sizeof(struct vme_bridge)); |
984 | 1488 | ||
1489 | ca91cx42_device = kmalloc(sizeof(struct ca91cx42_driver), GFP_KERNEL); | ||
1490 | |||
1491 | if (ca91cx42_device == NULL) { | ||
1492 | dev_err(&pdev->dev, "Failed to allocate memory for device " | ||
1493 | "structure\n"); | ||
1494 | retval = -ENOMEM; | ||
1495 | goto err_driver; | ||
1496 | } | ||
1497 | |||
1498 | memset(ca91cx42_device, 0, sizeof(struct ca91cx42_driver)); | ||
1499 | |||
1500 | ca91cx42_bridge->driver_priv = ca91cx42_device; | ||
1501 | |||
985 | /* Enable the device */ | 1502 | /* Enable the device */ |
986 | retval = pci_enable_device(pdev); | 1503 | retval = pci_enable_device(pdev); |
987 | if (retval) { | 1504 | if (retval) { |
@@ -997,16 +1514,16 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
997 | } | 1514 | } |
998 | 1515 | ||
999 | /* map registers in BAR 0 */ | 1516 | /* map registers in BAR 0 */ |
1000 | ca91cx42_bridge->base = ioremap_nocache(pci_resource_start(pdev, 0), | 1517 | ca91cx42_device->base = ioremap_nocache(pci_resource_start(pdev, 0), |
1001 | 4096); | 1518 | 4096); |
1002 | if (!ca91cx42_bridge->base) { | 1519 | if (!ca91cx42_device->base) { |
1003 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); | 1520 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
1004 | retval = -EIO; | 1521 | retval = -EIO; |
1005 | goto err_remap; | 1522 | goto err_remap; |
1006 | } | 1523 | } |
1007 | 1524 | ||
1008 | /* Check to see if the mapping worked out */ | 1525 | /* Check to see if the mapping worked out */ |
1009 | data = ioread32(ca91cx42_bridge->base + CA91CX42_PCI_ID) & 0x0000FFFF; | 1526 | data = ioread32(ca91cx42_device->base + CA91CX42_PCI_ID) & 0x0000FFFF; |
1010 | if (data != PCI_VENDOR_ID_TUNDRA) { | 1527 | if (data != PCI_VENDOR_ID_TUNDRA) { |
1011 | dev_err(&pdev->dev, "PCI_ID check failed\n"); | 1528 | dev_err(&pdev->dev, "PCI_ID check failed\n"); |
1012 | retval = -EIO; | 1529 | retval = -EIO; |
@@ -1014,11 +1531,10 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1014 | } | 1531 | } |
1015 | 1532 | ||
1016 | /* Initialize wait queues & mutual exclusion flags */ | 1533 | /* Initialize wait queues & mutual exclusion flags */ |
1017 | /* XXX These need to be moved to the vme_bridge structure */ | 1534 | init_waitqueue_head(&(ca91cx42_device->dma_queue)); |
1018 | init_waitqueue_head(&dma_queue); | 1535 | init_waitqueue_head(&(ca91cx42_device->iack_queue)); |
1019 | init_waitqueue_head(&iack_queue); | 1536 | mutex_init(&(ca91cx42_device->vme_int)); |
1020 | mutex_init(&(vme_int)); | 1537 | mutex_init(&(ca91cx42_device->vme_rmw)); |
1021 | mutex_init(&(vme_rmw)); | ||
1022 | 1538 | ||
1023 | ca91cx42_bridge->parent = &(pdev->dev); | 1539 | ca91cx42_bridge->parent = &(pdev->dev); |
1024 | strcpy(ca91cx42_bridge->name, driver_name); | 1540 | strcpy(ca91cx42_bridge->name, driver_name); |
@@ -1050,7 +1566,7 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1050 | master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | | 1566 | master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | |
1051 | VME_SUPER | VME_USER | VME_PROG | VME_DATA; | 1567 | VME_SUPER | VME_USER | VME_PROG | VME_DATA; |
1052 | master_image->width_attr = VME_D8 | VME_D16 | VME_D32 | VME_D64; | 1568 | master_image->width_attr = VME_D8 | VME_D16 | VME_D32 | VME_D64; |
1053 | memset(&(master_image->pci_resource), 0, | 1569 | memset(&(master_image->bus_resource), 0, |
1054 | sizeof(struct resource)); | 1570 | sizeof(struct resource)); |
1055 | master_image->kern_base = NULL; | 1571 | master_image->kern_base = NULL; |
1056 | list_add_tail(&(master_image->list), | 1572 | list_add_tail(&(master_image->list), |
@@ -1084,7 +1600,7 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1084 | list_add_tail(&(slave_image->list), | 1600 | list_add_tail(&(slave_image->list), |
1085 | &(ca91cx42_bridge->slave_resources)); | 1601 | &(ca91cx42_bridge->slave_resources)); |
1086 | } | 1602 | } |
1087 | #if 0 | 1603 | |
1088 | /* Add dma engines to list */ | 1604 | /* Add dma engines to list */ |
1089 | INIT_LIST_HEAD(&(ca91cx42_bridge->dma_resources)); | 1605 | INIT_LIST_HEAD(&(ca91cx42_bridge->dma_resources)); |
1090 | for (i = 0; i < CA91C142_MAX_DMA; i++) { | 1606 | for (i = 0; i < CA91C142_MAX_DMA; i++) { |
@@ -1100,12 +1616,14 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1100 | mutex_init(&(dma_ctrlr->mtx)); | 1616 | mutex_init(&(dma_ctrlr->mtx)); |
1101 | dma_ctrlr->locked = 0; | 1617 | dma_ctrlr->locked = 0; |
1102 | dma_ctrlr->number = i; | 1618 | dma_ctrlr->number = i; |
1619 | dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM | | ||
1620 | VME_DMA_MEM_TO_VME; | ||
1103 | INIT_LIST_HEAD(&(dma_ctrlr->pending)); | 1621 | INIT_LIST_HEAD(&(dma_ctrlr->pending)); |
1104 | INIT_LIST_HEAD(&(dma_ctrlr->running)); | 1622 | INIT_LIST_HEAD(&(dma_ctrlr->running)); |
1105 | list_add_tail(&(dma_ctrlr->list), | 1623 | list_add_tail(&(dma_ctrlr->list), |
1106 | &(ca91cx42_bridge->dma_resources)); | 1624 | &(ca91cx42_bridge->dma_resources)); |
1107 | } | 1625 | } |
1108 | #endif | 1626 | |
1109 | /* Add location monitor to list */ | 1627 | /* Add location monitor to list */ |
1110 | INIT_LIST_HEAD(&(ca91cx42_bridge->lm_resources)); | 1628 | INIT_LIST_HEAD(&(ca91cx42_bridge->lm_resources)); |
1111 | lm = kmalloc(sizeof(struct vme_lm_resource), GFP_KERNEL); | 1629 | lm = kmalloc(sizeof(struct vme_lm_resource), GFP_KERNEL); |
@@ -1128,33 +1646,26 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1128 | ca91cx42_bridge->master_set = ca91cx42_master_set; | 1646 | ca91cx42_bridge->master_set = ca91cx42_master_set; |
1129 | ca91cx42_bridge->master_read = ca91cx42_master_read; | 1647 | ca91cx42_bridge->master_read = ca91cx42_master_read; |
1130 | ca91cx42_bridge->master_write = ca91cx42_master_write; | 1648 | ca91cx42_bridge->master_write = ca91cx42_master_write; |
1131 | #if 0 | ||
1132 | ca91cx42_bridge->master_rmw = ca91cx42_master_rmw; | 1649 | ca91cx42_bridge->master_rmw = ca91cx42_master_rmw; |
1133 | ca91cx42_bridge->dma_list_add = ca91cx42_dma_list_add; | 1650 | ca91cx42_bridge->dma_list_add = ca91cx42_dma_list_add; |
1134 | ca91cx42_bridge->dma_list_exec = ca91cx42_dma_list_exec; | 1651 | ca91cx42_bridge->dma_list_exec = ca91cx42_dma_list_exec; |
1135 | ca91cx42_bridge->dma_list_empty = ca91cx42_dma_list_empty; | 1652 | ca91cx42_bridge->dma_list_empty = ca91cx42_dma_list_empty; |
1136 | #endif | ||
1137 | ca91cx42_bridge->irq_set = ca91cx42_irq_set; | 1653 | ca91cx42_bridge->irq_set = ca91cx42_irq_set; |
1138 | ca91cx42_bridge->irq_generate = ca91cx42_irq_generate; | 1654 | ca91cx42_bridge->irq_generate = ca91cx42_irq_generate; |
1139 | #if 0 | ||
1140 | ca91cx42_bridge->lm_set = ca91cx42_lm_set; | 1655 | ca91cx42_bridge->lm_set = ca91cx42_lm_set; |
1141 | ca91cx42_bridge->lm_get = ca91cx42_lm_get; | 1656 | ca91cx42_bridge->lm_get = ca91cx42_lm_get; |
1142 | ca91cx42_bridge->lm_attach = ca91cx42_lm_attach; | 1657 | ca91cx42_bridge->lm_attach = ca91cx42_lm_attach; |
1143 | ca91cx42_bridge->lm_detach = ca91cx42_lm_detach; | 1658 | ca91cx42_bridge->lm_detach = ca91cx42_lm_detach; |
1144 | #endif | ||
1145 | ca91cx42_bridge->slot_get = ca91cx42_slot_get; | 1659 | ca91cx42_bridge->slot_get = ca91cx42_slot_get; |
1146 | 1660 | ||
1147 | data = ioread32(ca91cx42_bridge->base + MISC_CTL); | 1661 | data = ioread32(ca91cx42_device->base + MISC_CTL); |
1148 | dev_info(&pdev->dev, "Board is%s the VME system controller\n", | 1662 | dev_info(&pdev->dev, "Board is%s the VME system controller\n", |
1149 | (data & CA91CX42_MISC_CTL_SYSCON) ? "" : " not"); | 1663 | (data & CA91CX42_MISC_CTL_SYSCON) ? "" : " not"); |
1150 | dev_info(&pdev->dev, "Slot ID is %d\n", ca91cx42_slot_get()); | 1664 | dev_info(&pdev->dev, "Slot ID is %d\n", |
1665 | ca91cx42_slot_get(ca91cx42_bridge)); | ||
1151 | 1666 | ||
1152 | if (ca91cx42_crcsr_init(pdev)) { | 1667 | if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev)) { |
1153 | dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); | 1668 | dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); |
1154 | retval = -EINVAL; | ||
1155 | #if 0 | ||
1156 | goto err_crcsr; | ||
1157 | #endif | ||
1158 | } | 1669 | } |
1159 | 1670 | ||
1160 | /* Need to save ca91cx42_bridge pointer locally in link list for use in | 1671 | /* Need to save ca91cx42_bridge pointer locally in link list for use in |
@@ -1166,14 +1677,13 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1166 | goto err_reg; | 1677 | goto err_reg; |
1167 | } | 1678 | } |
1168 | 1679 | ||
1680 | pci_set_drvdata(pdev, ca91cx42_bridge); | ||
1681 | |||
1169 | return 0; | 1682 | return 0; |
1170 | 1683 | ||
1171 | vme_unregister_bridge(ca91cx42_bridge); | 1684 | vme_unregister_bridge(ca91cx42_bridge); |
1172 | err_reg: | 1685 | err_reg: |
1173 | ca91cx42_crcsr_exit(pdev); | 1686 | ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); |
1174 | #if 0 | ||
1175 | err_crcsr: | ||
1176 | #endif | ||
1177 | err_lm: | 1687 | err_lm: |
1178 | /* resources are stored in link list */ | 1688 | /* resources are stored in link list */ |
1179 | list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { | 1689 | list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { |
@@ -1181,7 +1691,6 @@ err_lm: | |||
1181 | list_del(pos); | 1691 | list_del(pos); |
1182 | kfree(lm); | 1692 | kfree(lm); |
1183 | } | 1693 | } |
1184 | #if 0 | ||
1185 | err_dma: | 1694 | err_dma: |
1186 | /* resources are stored in link list */ | 1695 | /* resources are stored in link list */ |
1187 | list_for_each(pos, &(ca91cx42_bridge->dma_resources)) { | 1696 | list_for_each(pos, &(ca91cx42_bridge->dma_resources)) { |
@@ -1189,7 +1698,6 @@ err_dma: | |||
1189 | list_del(pos); | 1698 | list_del(pos); |
1190 | kfree(dma_ctrlr); | 1699 | kfree(dma_ctrlr); |
1191 | } | 1700 | } |
1192 | #endif | ||
1193 | err_slave: | 1701 | err_slave: |
1194 | /* resources are stored in link list */ | 1702 | /* resources are stored in link list */ |
1195 | list_for_each(pos, &(ca91cx42_bridge->slave_resources)) { | 1703 | list_for_each(pos, &(ca91cx42_bridge->slave_resources)) { |
@@ -1206,15 +1714,17 @@ err_master: | |||
1206 | kfree(master_image); | 1714 | kfree(master_image); |
1207 | } | 1715 | } |
1208 | 1716 | ||
1209 | ca91cx42_irq_exit(pdev); | 1717 | ca91cx42_irq_exit(ca91cx42_device, pdev); |
1210 | err_irq: | 1718 | err_irq: |
1211 | err_test: | 1719 | err_test: |
1212 | iounmap(ca91cx42_bridge->base); | 1720 | iounmap(ca91cx42_device->base); |
1213 | err_remap: | 1721 | err_remap: |
1214 | pci_release_regions(pdev); | 1722 | pci_release_regions(pdev); |
1215 | err_resource: | 1723 | err_resource: |
1216 | pci_disable_device(pdev); | 1724 | pci_disable_device(pdev); |
1217 | err_enable: | 1725 | err_enable: |
1726 | kfree(ca91cx42_device); | ||
1727 | err_driver: | ||
1218 | kfree(ca91cx42_bridge); | 1728 | kfree(ca91cx42_bridge); |
1219 | err_struct: | 1729 | err_struct: |
1220 | return retval; | 1730 | return retval; |
@@ -1228,32 +1738,37 @@ void ca91cx42_remove(struct pci_dev *pdev) | |||
1228 | struct vme_slave_resource *slave_image; | 1738 | struct vme_slave_resource *slave_image; |
1229 | struct vme_dma_resource *dma_ctrlr; | 1739 | struct vme_dma_resource *dma_ctrlr; |
1230 | struct vme_lm_resource *lm; | 1740 | struct vme_lm_resource *lm; |
1741 | struct ca91cx42_driver *bridge; | ||
1742 | struct vme_bridge *ca91cx42_bridge = pci_get_drvdata(pdev); | ||
1743 | |||
1744 | bridge = ca91cx42_bridge->driver_priv; | ||
1745 | |||
1231 | 1746 | ||
1232 | /* Turn off Ints */ | 1747 | /* Turn off Ints */ |
1233 | iowrite32(0, ca91cx42_bridge->base + LINT_EN); | 1748 | iowrite32(0, bridge->base + LINT_EN); |
1234 | 1749 | ||
1235 | /* Turn off the windows */ | 1750 | /* Turn off the windows */ |
1236 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI0_CTL); | 1751 | iowrite32(0x00800000, bridge->base + LSI0_CTL); |
1237 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI1_CTL); | 1752 | iowrite32(0x00800000, bridge->base + LSI1_CTL); |
1238 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI2_CTL); | 1753 | iowrite32(0x00800000, bridge->base + LSI2_CTL); |
1239 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI3_CTL); | 1754 | iowrite32(0x00800000, bridge->base + LSI3_CTL); |
1240 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI4_CTL); | 1755 | iowrite32(0x00800000, bridge->base + LSI4_CTL); |
1241 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI5_CTL); | 1756 | iowrite32(0x00800000, bridge->base + LSI5_CTL); |
1242 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI6_CTL); | 1757 | iowrite32(0x00800000, bridge->base + LSI6_CTL); |
1243 | iowrite32(0x00800000, ca91cx42_bridge->base + LSI7_CTL); | 1758 | iowrite32(0x00800000, bridge->base + LSI7_CTL); |
1244 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI0_CTL); | 1759 | iowrite32(0x00F00000, bridge->base + VSI0_CTL); |
1245 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI1_CTL); | 1760 | iowrite32(0x00F00000, bridge->base + VSI1_CTL); |
1246 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI2_CTL); | 1761 | iowrite32(0x00F00000, bridge->base + VSI2_CTL); |
1247 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI3_CTL); | 1762 | iowrite32(0x00F00000, bridge->base + VSI3_CTL); |
1248 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI4_CTL); | 1763 | iowrite32(0x00F00000, bridge->base + VSI4_CTL); |
1249 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI5_CTL); | 1764 | iowrite32(0x00F00000, bridge->base + VSI5_CTL); |
1250 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI6_CTL); | 1765 | iowrite32(0x00F00000, bridge->base + VSI6_CTL); |
1251 | iowrite32(0x00F00000, ca91cx42_bridge->base + VSI7_CTL); | 1766 | iowrite32(0x00F00000, bridge->base + VSI7_CTL); |
1252 | 1767 | ||
1253 | vme_unregister_bridge(ca91cx42_bridge); | 1768 | vme_unregister_bridge(ca91cx42_bridge); |
1254 | #if 0 | 1769 | |
1255 | ca91cx42_crcsr_exit(pdev); | 1770 | ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); |
1256 | #endif | 1771 | |
1257 | /* resources are stored in link list */ | 1772 | /* resources are stored in link list */ |
1258 | list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { | 1773 | list_for_each(pos, &(ca91cx42_bridge->lm_resources)) { |
1259 | lm = list_entry(pos, struct vme_lm_resource, list); | 1774 | lm = list_entry(pos, struct vme_lm_resource, list); |
@@ -1283,9 +1798,9 @@ void ca91cx42_remove(struct pci_dev *pdev) | |||
1283 | kfree(master_image); | 1798 | kfree(master_image); |
1284 | } | 1799 | } |
1285 | 1800 | ||
1286 | ca91cx42_irq_exit(pdev); | 1801 | ca91cx42_irq_exit(bridge, pdev); |
1287 | 1802 | ||
1288 | iounmap(ca91cx42_bridge->base); | 1803 | iounmap(bridge->base); |
1289 | 1804 | ||
1290 | pci_release_regions(pdev); | 1805 | pci_release_regions(pdev); |
1291 | 1806 | ||
@@ -1299,588 +1814,11 @@ static void __exit ca91cx42_exit(void) | |||
1299 | pci_unregister_driver(&ca91cx42_driver); | 1814 | pci_unregister_driver(&ca91cx42_driver); |
1300 | } | 1815 | } |
1301 | 1816 | ||
1817 | MODULE_PARM_DESC(geoid, "Override geographical addressing"); | ||
1818 | module_param(geoid, int, 0); | ||
1819 | |||
1302 | MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge"); | 1820 | MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge"); |
1303 | MODULE_LICENSE("GPL"); | 1821 | MODULE_LICENSE("GPL"); |
1304 | 1822 | ||
1305 | module_init(ca91cx42_init); | 1823 | module_init(ca91cx42_init); |
1306 | module_exit(ca91cx42_exit); | 1824 | module_exit(ca91cx42_exit); |
1307 | |||
1308 | /*---------------------------------------------------------------------------- | ||
1309 | * STAGING | ||
1310 | *--------------------------------------------------------------------------*/ | ||
1311 | |||
1312 | #if 0 | ||
1313 | #define SWIZZLE(X) ( ((X & 0xFF000000) >> 24) | ((X & 0x00FF0000) >> 8) | ((X & 0x0000FF00) << 8) | ((X & 0x000000FF) << 24)) | ||
1314 | |||
1315 | int ca91cx42_master_rmw(vmeRmwCfg_t *vmeRmw) | ||
1316 | { | ||
1317 | int temp_ctl = 0; | ||
1318 | int tempBS = 0; | ||
1319 | int tempBD = 0; | ||
1320 | int tempTO = 0; | ||
1321 | int vmeBS = 0; | ||
1322 | int vmeBD = 0; | ||
1323 | int *rmw_pci_data_ptr = NULL; | ||
1324 | int *vaDataPtr = NULL; | ||
1325 | int i; | ||
1326 | vmeOutWindowCfg_t vmeOut; | ||
1327 | if (vmeRmw->maxAttempts < 1) { | ||
1328 | return -EINVAL; | ||
1329 | } | ||
1330 | if (vmeRmw->targetAddrU) { | ||
1331 | return -EINVAL; | ||
1332 | } | ||
1333 | /* Find the PCI address that maps to the desired VME address */ | ||
1334 | for (i = 0; i < 8; i++) { | ||
1335 | temp_ctl = ioread32(ca91cx42_bridge->base + | ||
1336 | CA91CX42_LSI_CTL[i]); | ||
1337 | if ((temp_ctl & 0x80000000) == 0) { | ||
1338 | continue; | ||
1339 | } | ||
1340 | memset(&vmeOut, 0, sizeof(vmeOut)); | ||
1341 | vmeOut.windowNbr = i; | ||
1342 | ca91cx42_get_out_bound(&vmeOut); | ||
1343 | if (vmeOut.addrSpace != vmeRmw->addrSpace) { | ||
1344 | continue; | ||
1345 | } | ||
1346 | tempBS = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_BS[i]); | ||
1347 | tempBD = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_BD[i]); | ||
1348 | tempTO = ioread32(ca91cx42_bridge->base + CA91CX42_LSI_TO[i]); | ||
1349 | vmeBS = tempBS + tempTO; | ||
1350 | vmeBD = tempBD + tempTO; | ||
1351 | if ((vmeRmw->targetAddr >= vmeBS) && | ||
1352 | (vmeRmw->targetAddr < vmeBD)) { | ||
1353 | rmw_pci_data_ptr = | ||
1354 | (int *)(tempBS + (vmeRmw->targetAddr - vmeBS)); | ||
1355 | vaDataPtr = | ||
1356 | (int *)(out_image_va[i] + | ||
1357 | (vmeRmw->targetAddr - vmeBS)); | ||
1358 | break; | ||
1359 | } | ||
1360 | } | ||
1361 | |||
1362 | /* If no window - fail. */ | ||
1363 | if (rmw_pci_data_ptr == NULL) { | ||
1364 | return -EINVAL; | ||
1365 | } | ||
1366 | /* Setup the RMW registers. */ | ||
1367 | iowrite32(0, ca91cx42_bridge->base + SCYC_CTL); | ||
1368 | iowrite32(SWIZZLE(vmeRmw->enableMask), ca91cx42_bridge->base + SCYC_EN); | ||
1369 | iowrite32(SWIZZLE(vmeRmw->compareData), ca91cx42_bridge->base + | ||
1370 | SCYC_CMP); | ||
1371 | iowrite32(SWIZZLE(vmeRmw->swapData), ca91cx42_bridge->base + SCYC_SWP); | ||
1372 | iowrite32((int)rmw_pci_data_ptr, ca91cx42_bridge->base + SCYC_ADDR); | ||
1373 | iowrite32(1, ca91cx42_bridge->base + SCYC_CTL); | ||
1374 | |||
1375 | /* Run the RMW cycle until either success or max attempts. */ | ||
1376 | vmeRmw->numAttempts = 1; | ||
1377 | while (vmeRmw->numAttempts <= vmeRmw->maxAttempts) { | ||
1378 | |||
1379 | if ((ioread32(vaDataPtr) & vmeRmw->enableMask) == | ||
1380 | (vmeRmw->swapData & vmeRmw->enableMask)) { | ||
1381 | |||
1382 | iowrite32(0, ca91cx42_bridge->base + SCYC_CTL); | ||
1383 | break; | ||
1384 | |||
1385 | } | ||
1386 | vmeRmw->numAttempts++; | ||
1387 | } | ||
1388 | |||
1389 | /* If no success, set num Attempts to be greater than max attempts */ | ||
1390 | if (vmeRmw->numAttempts > vmeRmw->maxAttempts) { | ||
1391 | vmeRmw->numAttempts = vmeRmw->maxAttempts + 1; | ||
1392 | } | ||
1393 | |||
1394 | return 0; | ||
1395 | } | ||
1396 | |||
1397 | int uniSetupDctlReg(vmeDmaPacket_t * vmeDma, int *dctlregreturn) | ||
1398 | { | ||
1399 | unsigned int dctlreg = 0x80; | ||
1400 | struct vmeAttr *vmeAttr; | ||
1401 | |||
1402 | if (vmeDma->srcBus == VME_DMA_VME) { | ||
1403 | dctlreg = 0; | ||
1404 | vmeAttr = &vmeDma->srcVmeAttr; | ||
1405 | } else { | ||
1406 | dctlreg = 0x80000000; | ||
1407 | vmeAttr = &vmeDma->dstVmeAttr; | ||
1408 | } | ||
1409 | |||
1410 | switch (vmeAttr->maxDataWidth) { | ||
1411 | case VME_D8: | ||
1412 | break; | ||
1413 | case VME_D16: | ||
1414 | dctlreg |= 0x00400000; | ||
1415 | break; | ||
1416 | case VME_D32: | ||
1417 | dctlreg |= 0x00800000; | ||
1418 | break; | ||
1419 | case VME_D64: | ||
1420 | dctlreg |= 0x00C00000; | ||
1421 | break; | ||
1422 | } | ||
1423 | |||
1424 | switch (vmeAttr->addrSpace) { | ||
1425 | case VME_A16: | ||
1426 | break; | ||
1427 | case VME_A24: | ||
1428 | dctlreg |= 0x00010000; | ||
1429 | break; | ||
1430 | case VME_A32: | ||
1431 | dctlreg |= 0x00020000; | ||
1432 | break; | ||
1433 | case VME_USER1: | ||
1434 | dctlreg |= 0x00060000; | ||
1435 | break; | ||
1436 | case VME_USER2: | ||
1437 | dctlreg |= 0x00070000; | ||
1438 | break; | ||
1439 | |||
1440 | case VME_A64: /* not supported in Universe DMA */ | ||
1441 | case VME_CRCSR: | ||
1442 | case VME_USER3: | ||
1443 | case VME_USER4: | ||
1444 | return -EINVAL; | ||
1445 | break; | ||
1446 | } | ||
1447 | if (vmeAttr->userAccessType == VME_PROG) { | ||
1448 | dctlreg |= 0x00004000; | ||
1449 | } | ||
1450 | if (vmeAttr->dataAccessType == VME_SUPER) { | ||
1451 | dctlreg |= 0x00001000; | ||
1452 | } | ||
1453 | if (vmeAttr->xferProtocol != VME_SCT) { | ||
1454 | dctlreg |= 0x00000100; | ||
1455 | } | ||
1456 | *dctlregreturn = dctlreg; | ||
1457 | return 0; | ||
1458 | } | ||
1459 | |||
1460 | unsigned int | ||
1461 | ca91cx42_start_dma(int channel, unsigned int dgcsreg, TDMA_Cmd_Packet *vmeLL) | ||
1462 | { | ||
1463 | unsigned int val; | ||
1464 | |||
1465 | /* Setup registers as needed for direct or chained. */ | ||
1466 | if (dgcsreg & 0x8000000) { | ||
1467 | iowrite32(0, ca91cx42_bridge->base + DTBC); | ||
1468 | iowrite32((unsigned int)vmeLL, ca91cx42_bridge->base + DCPP); | ||
1469 | } else { | ||
1470 | #if 0 | ||
1471 | printk(KERN_ERR "Starting: DGCS = %08x\n", dgcsreg); | ||
1472 | printk(KERN_ERR "Starting: DVA = %08x\n", | ||
1473 | ioread32(&vmeLL->dva)); | ||
1474 | printk(KERN_ERR "Starting: DLV = %08x\n", | ||
1475 | ioread32(&vmeLL->dlv)); | ||
1476 | printk(KERN_ERR "Starting: DTBC = %08x\n", | ||
1477 | ioread32(&vmeLL->dtbc)); | ||
1478 | printk(KERN_ERR "Starting: DCTL = %08x\n", | ||
1479 | ioread32(&vmeLL->dctl)); | ||
1480 | #endif | ||
1481 | /* Write registers */ | ||
1482 | iowrite32(ioread32(&vmeLL->dva), ca91cx42_bridge->base + DVA); | ||
1483 | iowrite32(ioread32(&vmeLL->dlv), ca91cx42_bridge->base + DLA); | ||
1484 | iowrite32(ioread32(&vmeLL->dtbc), ca91cx42_bridge->base + DTBC); | ||
1485 | iowrite32(ioread32(&vmeLL->dctl), ca91cx42_bridge->base + DCTL); | ||
1486 | iowrite32(0, ca91cx42_bridge->base + DCPP); | ||
1487 | } | ||
1488 | |||
1489 | /* Start the operation */ | ||
1490 | iowrite32(dgcsreg, ca91cx42_bridge->base + DGCS); | ||
1491 | val = get_tbl(); | ||
1492 | iowrite32(dgcsreg | 0x8000000F, ca91cx42_bridge->base + DGCS); | ||
1493 | return val; | ||
1494 | } | ||
1495 | |||
1496 | TDMA_Cmd_Packet *ca91cx42_setup_dma(vmeDmaPacket_t * vmeDma) | ||
1497 | { | ||
1498 | vmeDmaPacket_t *vmeCur; | ||
1499 | int maxPerPage; | ||
1500 | int currentLLcount; | ||
1501 | TDMA_Cmd_Packet *startLL; | ||
1502 | TDMA_Cmd_Packet *currentLL; | ||
1503 | TDMA_Cmd_Packet *nextLL; | ||
1504 | unsigned int dctlreg = 0; | ||
1505 | |||
1506 | maxPerPage = PAGESIZE / sizeof(TDMA_Cmd_Packet) - 1; | ||
1507 | startLL = (TDMA_Cmd_Packet *) __get_free_pages(GFP_KERNEL, 0); | ||
1508 | if (startLL == 0) { | ||
1509 | return startLL; | ||
1510 | } | ||
1511 | /* First allocate pages for descriptors and create linked list */ | ||
1512 | vmeCur = vmeDma; | ||
1513 | currentLL = startLL; | ||
1514 | currentLLcount = 0; | ||
1515 | while (vmeCur != 0) { | ||
1516 | if (vmeCur->pNextPacket != 0) { | ||
1517 | currentLL->dcpp = (unsigned int)(currentLL + 1); | ||
1518 | currentLLcount++; | ||
1519 | if (currentLLcount >= maxPerPage) { | ||
1520 | currentLL->dcpp = | ||
1521 | __get_free_pages(GFP_KERNEL, 0); | ||
1522 | currentLLcount = 0; | ||
1523 | } | ||
1524 | currentLL = (TDMA_Cmd_Packet *) currentLL->dcpp; | ||
1525 | } else { | ||
1526 | currentLL->dcpp = (unsigned int)0; | ||
1527 | } | ||
1528 | vmeCur = vmeCur->pNextPacket; | ||
1529 | } | ||
1530 | |||
1531 | /* Next fill in information for each descriptor */ | ||
1532 | vmeCur = vmeDma; | ||
1533 | currentLL = startLL; | ||
1534 | while (vmeCur != 0) { | ||
1535 | if (vmeCur->srcBus == VME_DMA_VME) { | ||
1536 | iowrite32(vmeCur->srcAddr, ¤tLL->dva); | ||
1537 | iowrite32(vmeCur->dstAddr, ¤tLL->dlv); | ||
1538 | } else { | ||
1539 | iowrite32(vmeCur->srcAddr, ¤tLL->dlv); | ||
1540 | iowrite32(vmeCur->dstAddr, ¤tLL->dva); | ||
1541 | } | ||
1542 | uniSetupDctlReg(vmeCur, &dctlreg); | ||
1543 | iowrite32(dctlreg, ¤tLL->dctl); | ||
1544 | iowrite32(vmeCur->byteCount, ¤tLL->dtbc); | ||
1545 | |||
1546 | currentLL = (TDMA_Cmd_Packet *) currentLL->dcpp; | ||
1547 | vmeCur = vmeCur->pNextPacket; | ||
1548 | } | ||
1549 | |||
1550 | /* Convert Links to PCI addresses. */ | ||
1551 | currentLL = startLL; | ||
1552 | while (currentLL != 0) { | ||
1553 | nextLL = (TDMA_Cmd_Packet *) currentLL->dcpp; | ||
1554 | if (nextLL == 0) { | ||
1555 | iowrite32(1, ¤tLL->dcpp); | ||
1556 | } else { | ||
1557 | iowrite32((unsigned int)virt_to_bus(nextLL), | ||
1558 | ¤tLL->dcpp); | ||
1559 | } | ||
1560 | currentLL = nextLL; | ||
1561 | } | ||
1562 | |||
1563 | /* Return pointer to descriptors list */ | ||
1564 | return startLL; | ||
1565 | } | ||
1566 | |||
1567 | int ca91cx42_free_dma(TDMA_Cmd_Packet *startLL) | ||
1568 | { | ||
1569 | TDMA_Cmd_Packet *currentLL; | ||
1570 | TDMA_Cmd_Packet *prevLL; | ||
1571 | TDMA_Cmd_Packet *nextLL; | ||
1572 | unsigned int dcppreg; | ||
1573 | |||
1574 | /* Convert Links to virtual addresses. */ | ||
1575 | currentLL = startLL; | ||
1576 | while (currentLL != 0) { | ||
1577 | dcppreg = ioread32(¤tLL->dcpp); | ||
1578 | dcppreg &= ~6; | ||
1579 | if (dcppreg & 1) { | ||
1580 | currentLL->dcpp = 0; | ||
1581 | } else { | ||
1582 | currentLL->dcpp = (unsigned int)bus_to_virt(dcppreg); | ||
1583 | } | ||
1584 | currentLL = (TDMA_Cmd_Packet *) currentLL->dcpp; | ||
1585 | } | ||
1586 | |||
1587 | /* Free all pages associated with the descriptors. */ | ||
1588 | currentLL = startLL; | ||
1589 | prevLL = currentLL; | ||
1590 | while (currentLL != 0) { | ||
1591 | nextLL = (TDMA_Cmd_Packet *) currentLL->dcpp; | ||
1592 | if (currentLL + 1 != nextLL) { | ||
1593 | free_pages((int)prevLL, 0); | ||
1594 | prevLL = nextLL; | ||
1595 | } | ||
1596 | currentLL = nextLL; | ||
1597 | } | ||
1598 | |||
1599 | /* Return pointer to descriptors list */ | ||
1600 | return 0; | ||
1601 | } | ||
1602 | |||
1603 | int ca91cx42_do_dma(vmeDmaPacket_t *vmeDma) | ||
1604 | { | ||
1605 | unsigned int dgcsreg = 0; | ||
1606 | unsigned int dctlreg = 0; | ||
1607 | int val; | ||
1608 | int channel, x; | ||
1609 | vmeDmaPacket_t *curDma; | ||
1610 | TDMA_Cmd_Packet *dmaLL; | ||
1611 | |||
1612 | /* Sanity check the VME chain. */ | ||
1613 | channel = vmeDma->channel_number; | ||
1614 | if (channel > 0) { | ||
1615 | return -EINVAL; | ||
1616 | } | ||
1617 | curDma = vmeDma; | ||
1618 | while (curDma != 0) { | ||
1619 | if (curDma->byteCount == 0) { | ||
1620 | return -EINVAL; | ||
1621 | } | ||
1622 | if (curDma->byteCount >= 0x1000000) { | ||
1623 | return -EINVAL; | ||
1624 | } | ||
1625 | if ((curDma->srcAddr & 7) != (curDma->dstAddr & 7)) { | ||
1626 | return -EINVAL; | ||
1627 | } | ||
1628 | switch (curDma->srcBus) { | ||
1629 | case VME_DMA_PCI: | ||
1630 | if (curDma->dstBus != VME_DMA_VME) { | ||
1631 | return -EINVAL; | ||
1632 | } | ||
1633 | break; | ||
1634 | case VME_DMA_VME: | ||
1635 | if (curDma->dstBus != VME_DMA_PCI) { | ||
1636 | return -EINVAL; | ||
1637 | } | ||
1638 | break; | ||
1639 | default: | ||
1640 | return -EINVAL; | ||
1641 | break; | ||
1642 | } | ||
1643 | if (uniSetupDctlReg(curDma, &dctlreg) < 0) { | ||
1644 | return -EINVAL; | ||
1645 | } | ||
1646 | |||
1647 | curDma = curDma->pNextPacket; | ||
1648 | if (curDma == vmeDma) { /* Endless Loop! */ | ||
1649 | return -EINVAL; | ||
1650 | } | ||
1651 | } | ||
1652 | |||
1653 | /* calculate control register */ | ||
1654 | if (vmeDma->pNextPacket != 0) { | ||
1655 | dgcsreg = 0x8000000; | ||
1656 | } else { | ||
1657 | dgcsreg = 0; | ||
1658 | } | ||
1659 | |||
1660 | for (x = 0; x < 8; x++) { /* vme block size */ | ||
1661 | if ((256 << x) >= vmeDma->maxVmeBlockSize) { | ||
1662 | break; | ||
1663 | } | ||
1664 | } | ||
1665 | if (x == 8) | ||
1666 | x = 7; | ||
1667 | dgcsreg |= (x << 20); | ||
1668 | |||
1669 | if (vmeDma->vmeBackOffTimer) { | ||
1670 | for (x = 1; x < 8; x++) { /* vme timer */ | ||
1671 | if ((16 << (x - 1)) >= vmeDma->vmeBackOffTimer) { | ||
1672 | break; | ||
1673 | } | ||
1674 | } | ||
1675 | if (x == 8) | ||
1676 | x = 7; | ||
1677 | dgcsreg |= (x << 16); | ||
1678 | } | ||
1679 | /*` Setup the dma chain */ | ||
1680 | dmaLL = ca91cx42_setup_dma(vmeDma); | ||
1681 | |||
1682 | /* Start the DMA */ | ||
1683 | if (dgcsreg & 0x8000000) { | ||
1684 | vmeDma->vmeDmaStartTick = | ||
1685 | ca91cx42_start_dma(channel, dgcsreg, | ||
1686 | (TDMA_Cmd_Packet *) virt_to_phys(dmaLL)); | ||
1687 | } else { | ||
1688 | vmeDma->vmeDmaStartTick = | ||
1689 | ca91cx42_start_dma(channel, dgcsreg, dmaLL); | ||
1690 | } | ||
1691 | |||
1692 | wait_event_interruptible(dma_queue, | ||
1693 | ioread32(ca91cx42_bridge->base + DGCS) & 0x800); | ||
1694 | |||
1695 | val = ioread32(ca91cx42_bridge->base + DGCS); | ||
1696 | iowrite32(val | 0xF00, ca91cx42_bridge->base + DGCS); | ||
1697 | |||
1698 | vmeDma->vmeDmaStatus = 0; | ||
1699 | |||
1700 | if (!(val & 0x00000800)) { | ||
1701 | vmeDma->vmeDmaStatus = val & 0x700; | ||
1702 | printk(KERN_ERR "ca91c042: DMA Error in ca91cx42_DMA_irqhandler" | ||
1703 | " DGCS=%08X\n", val); | ||
1704 | val = ioread32(ca91cx42_bridge->base + DCPP); | ||
1705 | printk(KERN_ERR "ca91c042: DCPP=%08X\n", val); | ||
1706 | val = ioread32(ca91cx42_bridge->base + DCTL); | ||
1707 | printk(KERN_ERR "ca91c042: DCTL=%08X\n", val); | ||
1708 | val = ioread32(ca91cx42_bridge->base + DTBC); | ||
1709 | printk(KERN_ERR "ca91c042: DTBC=%08X\n", val); | ||
1710 | val = ioread32(ca91cx42_bridge->base + DLA); | ||
1711 | printk(KERN_ERR "ca91c042: DLA=%08X\n", val); | ||
1712 | val = ioread32(ca91cx42_bridge->base + DVA); | ||
1713 | printk(KERN_ERR "ca91c042: DVA=%08X\n", val); | ||
1714 | |||
1715 | } | ||
1716 | /* Free the dma chain */ | ||
1717 | ca91cx42_free_dma(dmaLL); | ||
1718 | |||
1719 | return 0; | ||
1720 | } | ||
1721 | |||
1722 | int ca91cx42_lm_set(vmeLmCfg_t *vmeLm) | ||
1723 | { | ||
1724 | int temp_ctl = 0; | ||
1725 | |||
1726 | if (vmeLm->addrU) | ||
1727 | return -EINVAL; | ||
1728 | |||
1729 | switch (vmeLm->addrSpace) { | ||
1730 | case VME_A64: | ||
1731 | case VME_USER3: | ||
1732 | case VME_USER4: | ||
1733 | return -EINVAL; | ||
1734 | case VME_A16: | ||
1735 | temp_ctl |= 0x00000; | ||
1736 | break; | ||
1737 | case VME_A24: | ||
1738 | temp_ctl |= 0x10000; | ||
1739 | break; | ||
1740 | case VME_A32: | ||
1741 | temp_ctl |= 0x20000; | ||
1742 | break; | ||
1743 | case VME_CRCSR: | ||
1744 | temp_ctl |= 0x50000; | ||
1745 | break; | ||
1746 | case VME_USER1: | ||
1747 | temp_ctl |= 0x60000; | ||
1748 | break; | ||
1749 | case VME_USER2: | ||
1750 | temp_ctl |= 0x70000; | ||
1751 | break; | ||
1752 | } | ||
1753 | |||
1754 | /* Disable while we are mucking around */ | ||
1755 | iowrite32(0x00000000, ca91cx42_bridge->base + LM_CTL); | ||
1756 | |||
1757 | iowrite32(vmeLm->addr, ca91cx42_bridge->base + LM_BS); | ||
1758 | |||
1759 | /* Setup CTL register. */ | ||
1760 | if (vmeLm->userAccessType & VME_SUPER) | ||
1761 | temp_ctl |= 0x00200000; | ||
1762 | if (vmeLm->userAccessType & VME_USER) | ||
1763 | temp_ctl |= 0x00100000; | ||
1764 | if (vmeLm->dataAccessType & VME_PROG) | ||
1765 | temp_ctl |= 0x00800000; | ||
1766 | if (vmeLm->dataAccessType & VME_DATA) | ||
1767 | temp_ctl |= 0x00400000; | ||
1768 | |||
1769 | |||
1770 | /* Write ctl reg and enable */ | ||
1771 | iowrite32(0x80000000 | temp_ctl, ca91cx42_bridge->base + LM_CTL); | ||
1772 | temp_ctl = ioread32(ca91cx42_bridge->base + LM_CTL); | ||
1773 | |||
1774 | return 0; | ||
1775 | } | ||
1776 | |||
1777 | int ca91cx42_wait_lm(vmeLmCfg_t *vmeLm) | ||
1778 | { | ||
1779 | unsigned long flags; | ||
1780 | unsigned int tmp; | ||
1781 | |||
1782 | spin_lock_irqsave(&lm_lock, flags); | ||
1783 | spin_unlock_irqrestore(&lm_lock, flags); | ||
1784 | if (tmp == 0) { | ||
1785 | if (vmeLm->lmWait < 10) | ||
1786 | vmeLm->lmWait = 10; | ||
1787 | interruptible_sleep_on_timeout(&lm_queue, vmeLm->lmWait); | ||
1788 | } | ||
1789 | iowrite32(0x00000000, ca91cx42_bridge->base + LM_CTL); | ||
1790 | |||
1791 | return 0; | ||
1792 | } | ||
1793 | |||
1794 | |||
1795 | |||
1796 | int ca91cx42_set_arbiter(vmeArbiterCfg_t *vmeArb) | ||
1797 | { | ||
1798 | int temp_ctl = 0; | ||
1799 | int vbto = 0; | ||
1800 | |||
1801 | temp_ctl = ioread32(ca91cx42_bridge->base + MISC_CTL); | ||
1802 | temp_ctl &= 0x00FFFFFF; | ||
1803 | |||
1804 | if (vmeArb->globalTimeoutTimer == 0xFFFFFFFF) { | ||
1805 | vbto = 7; | ||
1806 | } else if (vmeArb->globalTimeoutTimer > 1024) { | ||
1807 | return -EINVAL; | ||
1808 | } else if (vmeArb->globalTimeoutTimer == 0) { | ||
1809 | vbto = 0; | ||
1810 | } else { | ||
1811 | vbto = 1; | ||
1812 | while ((16 * (1 << (vbto - 1))) < vmeArb->globalTimeoutTimer) | ||
1813 | vbto += 1; | ||
1814 | } | ||
1815 | temp_ctl |= (vbto << 28); | ||
1816 | |||
1817 | if (vmeArb->arbiterMode == VME_PRIORITY_MODE) | ||
1818 | temp_ctl |= 1 << 26; | ||
1819 | |||
1820 | if (vmeArb->arbiterTimeoutFlag) | ||
1821 | temp_ctl |= 2 << 24; | ||
1822 | |||
1823 | iowrite32(temp_ctl, ca91cx42_bridge->base + MISC_CTL); | ||
1824 | return 0; | ||
1825 | } | ||
1826 | |||
1827 | int ca91cx42_get_arbiter(vmeArbiterCfg_t *vmeArb) | ||
1828 | { | ||
1829 | int temp_ctl = 0; | ||
1830 | int vbto = 0; | ||
1831 | |||
1832 | temp_ctl = ioread32(ca91cx42_bridge->base + MISC_CTL); | ||
1833 | |||
1834 | vbto = (temp_ctl >> 28) & 0xF; | ||
1835 | if (vbto != 0) | ||
1836 | vmeArb->globalTimeoutTimer = (16 * (1 << (vbto - 1))); | ||
1837 | |||
1838 | if (temp_ctl & (1 << 26)) | ||
1839 | vmeArb->arbiterMode = VME_PRIORITY_MODE; | ||
1840 | else | ||
1841 | vmeArb->arbiterMode = VME_R_ROBIN_MODE; | ||
1842 | |||
1843 | if (temp_ctl & (3 << 24)) | ||
1844 | vmeArb->arbiterTimeoutFlag = 1; | ||
1845 | |||
1846 | return 0; | ||
1847 | } | ||
1848 | |||
1849 | int ca91cx42_set_requestor(vmeRequesterCfg_t *vmeReq) | ||
1850 | { | ||
1851 | int temp_ctl = 0; | ||
1852 | |||
1853 | temp_ctl = ioread32(ca91cx42_bridge->base + MAST_CTL); | ||
1854 | temp_ctl &= 0xFF0FFFFF; | ||
1855 | |||
1856 | if (vmeReq->releaseMode == 1) | ||
1857 | temp_ctl |= (1 << 20); | ||
1858 | |||
1859 | if (vmeReq->fairMode == 1) | ||
1860 | temp_ctl |= (1 << 21); | ||
1861 | |||
1862 | temp_ctl |= (vmeReq->requestLevel << 22); | ||
1863 | |||
1864 | iowrite32(temp_ctl, ca91cx42_bridge->base + MAST_CTL); | ||
1865 | return 0; | ||
1866 | } | ||
1867 | |||
1868 | int ca91cx42_get_requestor(vmeRequesterCfg_t *vmeReq) | ||
1869 | { | ||
1870 | int temp_ctl = 0; | ||
1871 | |||
1872 | temp_ctl = ioread32(ca91cx42_bridge->base + MAST_CTL); | ||
1873 | |||
1874 | if (temp_ctl & (1 << 20)) | ||
1875 | vmeReq->releaseMode = 1; | ||
1876 | |||
1877 | if (temp_ctl & (1 << 21)) | ||
1878 | vmeReq->fairMode = 1; | ||
1879 | |||
1880 | vmeReq->requestLevel = (temp_ctl & 0xC00000) >> 22; | ||
1881 | |||
1882 | return 0; | ||
1883 | } | ||
1884 | |||
1885 | |||
1886 | #endif | ||
diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.h b/drivers/staging/vme/bridges/vme_ca91cx42.h index 95a42c240a20..e72c65b193ec 100644 --- a/drivers/staging/vme/bridges/vme_ca91cx42.h +++ b/drivers/staging/vme/bridges/vme_ca91cx42.h | |||
@@ -7,8 +7,8 @@ | |||
7 | * Updated by Ajit Prem | 7 | * Updated by Ajit Prem |
8 | * Copyright 2004 Motorola Inc. | 8 | * Copyright 2004 Motorola Inc. |
9 | * | 9 | * |
10 | * Further updated by Martyn Welch <martyn.welch@gefanuc.com> | 10 | * Further updated by Martyn Welch <martyn.welch@ge.com> |
11 | * Copyright 2009 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 11 | * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc. |
12 | * | 12 | * |
13 | * Derived from ca91c042.h by Michael Wyrick | 13 | * Derived from ca91c042.h by Michael Wyrick |
14 | * | 14 | * |
@@ -37,11 +37,27 @@ | |||
37 | #define CA91C142_MAX_DMA 1 /* Max DMA Controllers */ | 37 | #define CA91C142_MAX_DMA 1 /* Max DMA Controllers */ |
38 | #define CA91C142_MAX_MAILBOX 4 /* Max Mail Box registers */ | 38 | #define CA91C142_MAX_MAILBOX 4 /* Max Mail Box registers */ |
39 | 39 | ||
40 | /* Structure used to hold driver specific information */ | ||
41 | struct ca91cx42_driver { | ||
42 | void *base; /* Base Address of device registers */ | ||
43 | wait_queue_head_t dma_queue; | ||
44 | wait_queue_head_t iack_queue; | ||
45 | wait_queue_head_t mbox_queue; | ||
46 | void (*lm_callback[4])(int); /* Called in interrupt handler */ | ||
47 | void *crcsr_kernel; | ||
48 | dma_addr_t crcsr_bus; | ||
49 | struct mutex vme_rmw; /* Only one RMW cycle at a time */ | ||
50 | struct mutex vme_int; /* | ||
51 | * Only one VME interrupt can be | ||
52 | * generated at a time, provide locking | ||
53 | */ | ||
54 | }; | ||
55 | |||
40 | /* See Page 2-77 in the Universe User Manual */ | 56 | /* See Page 2-77 in the Universe User Manual */ |
41 | struct ca91cx42_dma_descriptor { | 57 | struct ca91cx42_dma_descriptor { |
42 | unsigned int dctl; /* DMA Control */ | 58 | unsigned int dctl; /* DMA Control */ |
43 | unsigned int dtbc; /* Transfer Byte Count */ | 59 | unsigned int dtbc; /* Transfer Byte Count */ |
44 | unsigned int dlv; /* PCI Address */ | 60 | unsigned int dla; /* PCI Address */ |
45 | unsigned int res1; /* Reserved */ | 61 | unsigned int res1; /* Reserved */ |
46 | unsigned int dva; /* Vme Address */ | 62 | unsigned int dva; /* Vme Address */ |
47 | unsigned int res2; /* Reserved */ | 63 | unsigned int res2; /* Reserved */ |
@@ -237,32 +253,6 @@ static const int CA91CX42_VSI_TO[] = { VSI0_TO, VSI1_TO, VSI2_TO, VSI3_TO, | |||
237 | #define VCSR_SET 0x0FF8 | 253 | #define VCSR_SET 0x0FF8 |
238 | #define VCSR_BS 0x0FFC | 254 | #define VCSR_BS 0x0FFC |
239 | 255 | ||
240 | // DMA General Control/Status Register DGCS (0x220) | ||
241 | // 32-24 || GO | STOPR | HALTR | 0 || CHAIN | 0 | 0 | 0 || | ||
242 | // 23-16 || VON || VOFF || | ||
243 | // 15-08 || ACT | STOP | HALT | 0 || DONE | LERR | VERR | P_ERR || | ||
244 | // 07-00 || 0 | INT_S | INT_H | 0 || I_DNE | I_LER | I_VER | I_PER || | ||
245 | |||
246 | // VON - Length Per DMA VMEBus Transfer | ||
247 | // 0000 = None | ||
248 | // 0001 = 256 Bytes | ||
249 | // 0010 = 512 | ||
250 | // 0011 = 1024 | ||
251 | // 0100 = 2048 | ||
252 | // 0101 = 4096 | ||
253 | // 0110 = 8192 | ||
254 | // 0111 = 16384 | ||
255 | |||
256 | // VOFF - wait between DMA tenures | ||
257 | // 0000 = 0 us | ||
258 | // 0001 = 16 | ||
259 | // 0010 = 32 | ||
260 | // 0011 = 64 | ||
261 | // 0100 = 128 | ||
262 | // 0101 = 256 | ||
263 | // 0110 = 512 | ||
264 | // 0111 = 1024 | ||
265 | |||
266 | /* | 256 | /* |
267 | * PCI Class Register | 257 | * PCI Class Register |
268 | * offset 008 | 258 | * offset 008 |
@@ -326,6 +316,16 @@ static const int CA91CX42_VSI_TO[] = { VSI0_TO, VSI1_TO, VSI2_TO, VSI3_TO, | |||
326 | #define CA91CX42_LSI_CTL_VCT_MBLT (1<<8) | 316 | #define CA91CX42_LSI_CTL_VCT_MBLT (1<<8) |
327 | #define CA91CX42_LSI_CTL_LAS (1<<0) | 317 | #define CA91CX42_LSI_CTL_LAS (1<<0) |
328 | 318 | ||
319 | /* | ||
320 | * SCYC_CTL Register | ||
321 | * offset 178 | ||
322 | */ | ||
323 | #define CA91CX42_SCYC_CTL_LAS_PCIMEM 0 | ||
324 | #define CA91CX42_SCYC_CTL_LAS_PCIIO (1<<2) | ||
325 | |||
326 | #define CA91CX42_SCYC_CTL_CYC_M (3<<0) | ||
327 | #define CA91CX42_SCYC_CTL_CYC_RMW (1<<0) | ||
328 | #define CA91CX42_SCYC_CTL_CYC_ADOH (1<<1) | ||
329 | 329 | ||
330 | /* | 330 | /* |
331 | * LMISC Register | 331 | * LMISC Register |
@@ -355,6 +355,71 @@ static const int CA91CX42_VSI_TO[] = { VSI0_TO, VSI1_TO, VSI2_TO, VSI3_TO, | |||
355 | #define CA91CX42_BM_SLSI_RESERVED 0x3F0F0000 | 355 | #define CA91CX42_BM_SLSI_RESERVED 0x3F0F0000 |
356 | 356 | ||
357 | /* | 357 | /* |
358 | * DCTL Register | ||
359 | * offset 200 | ||
360 | */ | ||
361 | #define CA91CX42_DCTL_L2V (1<<31) | ||
362 | #define CA91CX42_DCTL_VDW_M (3<<22) | ||
363 | #define CA91CX42_DCTL_VDW_M (3<<22) | ||
364 | #define CA91CX42_DCTL_VDW_D8 0 | ||
365 | #define CA91CX42_DCTL_VDW_D16 (1<<22) | ||
366 | #define CA91CX42_DCTL_VDW_D32 (1<<23) | ||
367 | #define CA91CX42_DCTL_VDW_D64 (3<<22) | ||
368 | |||
369 | #define CA91CX42_DCTL_VAS_M (7<<16) | ||
370 | #define CA91CX42_DCTL_VAS_A16 0 | ||
371 | #define CA91CX42_DCTL_VAS_A24 (1<<16) | ||
372 | #define CA91CX42_DCTL_VAS_A32 (1<<17) | ||
373 | #define CA91CX42_DCTL_VAS_USER1 (3<<17) | ||
374 | #define CA91CX42_DCTL_VAS_USER2 (7<<16) | ||
375 | |||
376 | #define CA91CX42_DCTL_PGM_M (1<<14) | ||
377 | #define CA91CX42_DCTL_PGM_DATA 0 | ||
378 | #define CA91CX42_DCTL_PGM_PGM (1<<14) | ||
379 | |||
380 | #define CA91CX42_DCTL_SUPER_M (1<<12) | ||
381 | #define CA91CX42_DCTL_SUPER_NPRIV 0 | ||
382 | #define CA91CX42_DCTL_SUPER_SUPR (1<<12) | ||
383 | |||
384 | #define CA91CX42_DCTL_VCT_M (1<<8) | ||
385 | #define CA91CX42_DCTL_VCT_BLT (1<<8) | ||
386 | #define CA91CX42_DCTL_LD64EN (1<<7) | ||
387 | |||
388 | /* | ||
389 | * DCPP Register | ||
390 | * offset 218 | ||
391 | */ | ||
392 | #define CA91CX42_DCPP_M 0xf | ||
393 | #define CA91CX42_DCPP_NULL (1<<0) | ||
394 | |||
395 | /* | ||
396 | * DMA General Control/Status Register (DGCS) | ||
397 | * offset 220 | ||
398 | */ | ||
399 | #define CA91CX42_DGCS_GO (1<<31) | ||
400 | #define CA91CX42_DGCS_STOP_REQ (1<<30) | ||
401 | #define CA91CX42_DGCS_HALT_REQ (1<<29) | ||
402 | #define CA91CX42_DGCS_CHAIN (1<<27) | ||
403 | |||
404 | #define CA91CX42_DGCS_VON_M (7<<20) | ||
405 | |||
406 | #define CA91CX42_DGCS_VOFF_M (0xf<<16) | ||
407 | |||
408 | #define CA91CX42_DGCS_ACT (1<<15) | ||
409 | #define CA91CX42_DGCS_STOP (1<<14) | ||
410 | #define CA91CX42_DGCS_HALT (1<<13) | ||
411 | #define CA91CX42_DGCS_DONE (1<<11) | ||
412 | #define CA91CX42_DGCS_LERR (1<<10) | ||
413 | #define CA91CX42_DGCS_VERR (1<<9) | ||
414 | #define CA91CX42_DGCS_PERR (1<<8) | ||
415 | #define CA91CX42_DGCS_INT_STOP (1<<6) | ||
416 | #define CA91CX42_DGCS_INT_HALT (1<<5) | ||
417 | #define CA91CX42_DGCS_INT_DONE (1<<3) | ||
418 | #define CA91CX42_DGCS_INT_LERR (1<<2) | ||
419 | #define CA91CX42_DGCS_INT_VERR (1<<1) | ||
420 | #define CA91CX42_DGCS_INT_PERR (1<<0) | ||
421 | |||
422 | /* | ||
358 | * PCI Interrupt Enable Register | 423 | * PCI Interrupt Enable Register |
359 | * offset 300 | 424 | * offset 300 |
360 | */ | 425 | */ |
@@ -475,6 +540,19 @@ static const int CA91CX42_LINT_LM[] = { CA91CX42_LINT_LM0, CA91CX42_LINT_LM1, | |||
475 | #define CA91CX42_VSI_CTL_LAS_PCI_IO (1<<0) | 540 | #define CA91CX42_VSI_CTL_LAS_PCI_IO (1<<0) |
476 | #define CA91CX42_VSI_CTL_LAS_PCI_CONF (1<<1) | 541 | #define CA91CX42_VSI_CTL_LAS_PCI_CONF (1<<1) |
477 | 542 | ||
543 | /* LM_CTL Register | ||
544 | * offset F64 | ||
545 | */ | ||
546 | #define CA91CX42_LM_CTL_EN (1<<31) | ||
547 | #define CA91CX42_LM_CTL_PGM (1<<23) | ||
548 | #define CA91CX42_LM_CTL_DATA (1<<22) | ||
549 | #define CA91CX42_LM_CTL_SUPR (1<<21) | ||
550 | #define CA91CX42_LM_CTL_NPRIV (1<<20) | ||
551 | #define CA91CX42_LM_CTL_AS_M (5<<16) | ||
552 | #define CA91CX42_LM_CTL_AS_A16 0 | ||
553 | #define CA91CX42_LM_CTL_AS_A24 (1<<16) | ||
554 | #define CA91CX42_LM_CTL_AS_A32 (1<<17) | ||
555 | |||
478 | /* | 556 | /* |
479 | * VRAI_CTL Register | 557 | * VRAI_CTL Register |
480 | * offset F70 | 558 | * offset F70 |
diff --git a/drivers/staging/vme/bridges/vme_tsi148.c b/drivers/staging/vme/bridges/vme_tsi148.c index 89a7dccb934f..faf652edb70f 100644 --- a/drivers/staging/vme/bridges/vme_tsi148.c +++ b/drivers/staging/vme/bridges/vme_tsi148.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * Support for the Tundra TSI148 VME-PCI Bridge Chip | 2 | * Support for the Tundra TSI148 VME-PCI Bridge Chip |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 5 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
6 | * | 6 | * |
7 | * Based on work by Tom Armistead and Ajit Prem | 7 | * Based on work by Tom Armistead and Ajit Prem |
8 | * Copyright 2004 Motorola Inc. | 8 | * Copyright 2004 Motorola Inc. |
@@ -59,28 +59,14 @@ int tsi148_dma_list_add (struct vme_dma_list *, struct vme_dma_attr *, | |||
59 | int tsi148_dma_list_exec(struct vme_dma_list *); | 59 | int tsi148_dma_list_exec(struct vme_dma_list *); |
60 | int tsi148_dma_list_empty(struct vme_dma_list *); | 60 | int tsi148_dma_list_empty(struct vme_dma_list *); |
61 | int tsi148_generate_irq(int, int); | 61 | int tsi148_generate_irq(int, int); |
62 | int tsi148_slot_get(void); | 62 | |
63 | 63 | /* Module parameter */ | |
64 | /* Modue parameter */ | 64 | static int err_chk; |
65 | int err_chk = 0; | 65 | static int geoid; |
66 | |||
67 | /* XXX These should all be in a per device structure */ | ||
68 | struct vme_bridge *tsi148_bridge; | ||
69 | wait_queue_head_t dma_queue[2]; | ||
70 | wait_queue_head_t iack_queue; | ||
71 | void (*lm_callback[4])(int); /* Called in interrupt handler, be careful! */ | ||
72 | void *crcsr_kernel; | ||
73 | dma_addr_t crcsr_bus; | ||
74 | struct vme_master_resource *flush_image; | ||
75 | struct mutex vme_rmw; /* Only one RMW cycle at a time */ | ||
76 | struct mutex vme_int; /* | ||
77 | * Only one VME interrupt can be | ||
78 | * generated at a time, provide locking | ||
79 | */ | ||
80 | 66 | ||
81 | static char driver_name[] = "vme_tsi148"; | 67 | static char driver_name[] = "vme_tsi148"; |
82 | 68 | ||
83 | static struct pci_device_id tsi148_ids[] = { | 69 | static const struct pci_device_id tsi148_ids[] = { |
84 | { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_TSI148) }, | 70 | { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_TSI148) }, |
85 | { }, | 71 | { }, |
86 | }; | 72 | }; |
@@ -109,16 +95,17 @@ static void reg_split(unsigned long long variable, unsigned int *high, | |||
109 | /* | 95 | /* |
110 | * Wakes up DMA queue. | 96 | * Wakes up DMA queue. |
111 | */ | 97 | */ |
112 | static u32 tsi148_DMA_irqhandler(int channel_mask) | 98 | static u32 tsi148_DMA_irqhandler(struct tsi148_driver *bridge, |
99 | int channel_mask) | ||
113 | { | 100 | { |
114 | u32 serviced = 0; | 101 | u32 serviced = 0; |
115 | 102 | ||
116 | if (channel_mask & TSI148_LCSR_INTS_DMA0S) { | 103 | if (channel_mask & TSI148_LCSR_INTS_DMA0S) { |
117 | wake_up(&dma_queue[0]); | 104 | wake_up(&(bridge->dma_queue[0])); |
118 | serviced |= TSI148_LCSR_INTC_DMA0C; | 105 | serviced |= TSI148_LCSR_INTC_DMA0C; |
119 | } | 106 | } |
120 | if (channel_mask & TSI148_LCSR_INTS_DMA1S) { | 107 | if (channel_mask & TSI148_LCSR_INTS_DMA1S) { |
121 | wake_up(&dma_queue[1]); | 108 | wake_up(&(bridge->dma_queue[1])); |
122 | serviced |= TSI148_LCSR_INTC_DMA1C; | 109 | serviced |= TSI148_LCSR_INTC_DMA1C; |
123 | } | 110 | } |
124 | 111 | ||
@@ -128,7 +115,7 @@ static u32 tsi148_DMA_irqhandler(int channel_mask) | |||
128 | /* | 115 | /* |
129 | * Wake up location monitor queue | 116 | * Wake up location monitor queue |
130 | */ | 117 | */ |
131 | static u32 tsi148_LM_irqhandler(u32 stat) | 118 | static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat) |
132 | { | 119 | { |
133 | int i; | 120 | int i; |
134 | u32 serviced = 0; | 121 | u32 serviced = 0; |
@@ -136,7 +123,7 @@ static u32 tsi148_LM_irqhandler(u32 stat) | |||
136 | for (i = 0; i < 4; i++) { | 123 | for (i = 0; i < 4; i++) { |
137 | if(stat & TSI148_LCSR_INTS_LMS[i]) { | 124 | if(stat & TSI148_LCSR_INTS_LMS[i]) { |
138 | /* We only enable interrupts if the callback is set */ | 125 | /* We only enable interrupts if the callback is set */ |
139 | lm_callback[i](i); | 126 | bridge->lm_callback[i](i); |
140 | serviced |= TSI148_LCSR_INTC_LMC[i]; | 127 | serviced |= TSI148_LCSR_INTC_LMC[i]; |
141 | } | 128 | } |
142 | } | 129 | } |
@@ -149,7 +136,7 @@ static u32 tsi148_LM_irqhandler(u32 stat) | |||
149 | * | 136 | * |
150 | * XXX This functionality is not exposed up though API. | 137 | * XXX This functionality is not exposed up though API. |
151 | */ | 138 | */ |
152 | static u32 tsi148_MB_irqhandler(u32 stat) | 139 | static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) |
153 | { | 140 | { |
154 | int i; | 141 | int i; |
155 | u32 val; | 142 | u32 val; |
@@ -157,8 +144,7 @@ static u32 tsi148_MB_irqhandler(u32 stat) | |||
157 | 144 | ||
158 | for (i = 0; i < 4; i++) { | 145 | for (i = 0; i < 4; i++) { |
159 | if(stat & TSI148_LCSR_INTS_MBS[i]) { | 146 | if(stat & TSI148_LCSR_INTS_MBS[i]) { |
160 | val = ioread32be(tsi148_bridge->base + | 147 | val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); |
161 | TSI148_GCSR_MBOX[i]); | ||
162 | printk("VME Mailbox %d received: 0x%x\n", i, val); | 148 | printk("VME Mailbox %d received: 0x%x\n", i, val); |
163 | serviced |= TSI148_LCSR_INTC_MBC[i]; | 149 | serviced |= TSI148_LCSR_INTC_MBC[i]; |
164 | } | 150 | } |
@@ -170,22 +156,21 @@ static u32 tsi148_MB_irqhandler(u32 stat) | |||
170 | /* | 156 | /* |
171 | * Display error & status message when PERR (PCI) exception interrupt occurs. | 157 | * Display error & status message when PERR (PCI) exception interrupt occurs. |
172 | */ | 158 | */ |
173 | static u32 tsi148_PERR_irqhandler(void) | 159 | static u32 tsi148_PERR_irqhandler(struct tsi148_driver *bridge) |
174 | { | 160 | { |
175 | printk(KERN_ERR | 161 | printk(KERN_ERR |
176 | "PCI Exception at address: 0x%08x:%08x, attributes: %08x\n", | 162 | "PCI Exception at address: 0x%08x:%08x, attributes: %08x\n", |
177 | ioread32be(tsi148_bridge->base + TSI148_LCSR_EDPAU), | 163 | ioread32be(bridge->base + TSI148_LCSR_EDPAU), |
178 | ioread32be(tsi148_bridge->base + TSI148_LCSR_EDPAL), | 164 | ioread32be(bridge->base + TSI148_LCSR_EDPAL), |
179 | ioread32be(tsi148_bridge->base + TSI148_LCSR_EDPAT) | 165 | ioread32be(bridge->base + TSI148_LCSR_EDPAT) |
180 | ); | 166 | ); |
181 | printk(KERN_ERR | 167 | printk(KERN_ERR |
182 | "PCI-X attribute reg: %08x, PCI-X split completion reg: %08x\n", | 168 | "PCI-X attribute reg: %08x, PCI-X split completion reg: %08x\n", |
183 | ioread32be(tsi148_bridge->base + TSI148_LCSR_EDPXA), | 169 | ioread32be(bridge->base + TSI148_LCSR_EDPXA), |
184 | ioread32be(tsi148_bridge->base + TSI148_LCSR_EDPXS) | 170 | ioread32be(bridge->base + TSI148_LCSR_EDPXS) |
185 | ); | 171 | ); |
186 | 172 | ||
187 | iowrite32be(TSI148_LCSR_EDPAT_EDPCL, | 173 | iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT); |
188 | tsi148_bridge->base + TSI148_LCSR_EDPAT); | ||
189 | 174 | ||
190 | return TSI148_LCSR_INTC_PERRC; | 175 | return TSI148_LCSR_INTC_PERRC; |
191 | } | 176 | } |
@@ -193,16 +178,19 @@ static u32 tsi148_PERR_irqhandler(void) | |||
193 | /* | 178 | /* |
194 | * Save address and status when VME error interrupt occurs. | 179 | * Save address and status when VME error interrupt occurs. |
195 | */ | 180 | */ |
196 | static u32 tsi148_VERR_irqhandler(void) | 181 | static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) |
197 | { | 182 | { |
198 | unsigned int error_addr_high, error_addr_low; | 183 | unsigned int error_addr_high, error_addr_low; |
199 | unsigned long long error_addr; | 184 | unsigned long long error_addr; |
200 | u32 error_attrib; | 185 | u32 error_attrib; |
201 | struct vme_bus_error *error; | 186 | struct vme_bus_error *error; |
187 | struct tsi148_driver *bridge; | ||
188 | |||
189 | bridge = tsi148_bridge->driver_priv; | ||
202 | 190 | ||
203 | error_addr_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_VEAU); | 191 | error_addr_high = ioread32be(bridge->base + TSI148_LCSR_VEAU); |
204 | error_addr_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_VEAL); | 192 | error_addr_low = ioread32be(bridge->base + TSI148_LCSR_VEAL); |
205 | error_attrib = ioread32be(tsi148_bridge->base + TSI148_LCSR_VEAT); | 193 | error_attrib = ioread32be(bridge->base + TSI148_LCSR_VEAT); |
206 | 194 | ||
207 | reg_join(error_addr_high, error_addr_low, &error_addr); | 195 | reg_join(error_addr_high, error_addr_low, &error_addr); |
208 | 196 | ||
@@ -226,8 +214,7 @@ static u32 tsi148_VERR_irqhandler(void) | |||
226 | } | 214 | } |
227 | 215 | ||
228 | /* Clear Status */ | 216 | /* Clear Status */ |
229 | iowrite32be(TSI148_LCSR_VEAT_VESCL, | 217 | iowrite32be(TSI148_LCSR_VEAT_VESCL, bridge->base + TSI148_LCSR_VEAT); |
230 | tsi148_bridge->base + TSI148_LCSR_VEAT); | ||
231 | 218 | ||
232 | return TSI148_LCSR_INTC_VERRC; | 219 | return TSI148_LCSR_INTC_VERRC; |
233 | } | 220 | } |
@@ -235,9 +222,9 @@ static u32 tsi148_VERR_irqhandler(void) | |||
235 | /* | 222 | /* |
236 | * Wake up IACK queue. | 223 | * Wake up IACK queue. |
237 | */ | 224 | */ |
238 | static u32 tsi148_IACK_irqhandler(void) | 225 | static u32 tsi148_IACK_irqhandler(struct tsi148_driver *bridge) |
239 | { | 226 | { |
240 | wake_up(&iack_queue); | 227 | wake_up(&(bridge->iack_queue)); |
241 | 228 | ||
242 | return TSI148_LCSR_INTC_IACKC; | 229 | return TSI148_LCSR_INTC_IACKC; |
243 | } | 230 | } |
@@ -245,9 +232,13 @@ static u32 tsi148_IACK_irqhandler(void) | |||
245 | /* | 232 | /* |
246 | * Calling VME bus interrupt callback if provided. | 233 | * Calling VME bus interrupt callback if provided. |
247 | */ | 234 | */ |
248 | static u32 tsi148_VIRQ_irqhandler(u32 stat) | 235 | static u32 tsi148_VIRQ_irqhandler(struct vme_bridge *tsi148_bridge, |
236 | u32 stat) | ||
249 | { | 237 | { |
250 | int vec, i, serviced = 0; | 238 | int vec, i, serviced = 0; |
239 | struct tsi148_driver *bridge; | ||
240 | |||
241 | bridge = tsi148_bridge->driver_priv; | ||
251 | 242 | ||
252 | for (i = 7; i > 0; i--) { | 243 | for (i = 7; i > 0; i--) { |
253 | if (stat & (1 << i)) { | 244 | if (stat & (1 << i)) { |
@@ -257,8 +248,7 @@ static u32 tsi148_VIRQ_irqhandler(u32 stat) | |||
257 | * 8-bit IACK cycles on the bus, read from offset | 248 | * 8-bit IACK cycles on the bus, read from offset |
258 | * 3. | 249 | * 3. |
259 | */ | 250 | */ |
260 | vec = ioread8(tsi148_bridge->base + | 251 | vec = ioread8(bridge->base + TSI148_LCSR_VIACK[i] + 3); |
261 | TSI148_LCSR_VIACK[i] + 3); | ||
262 | 252 | ||
263 | vme_irq_handler(tsi148_bridge, i, vec); | 253 | vme_irq_handler(tsi148_bridge, i, vec); |
264 | 254 | ||
@@ -273,13 +263,19 @@ static u32 tsi148_VIRQ_irqhandler(u32 stat) | |||
273 | * Top level interrupt handler. Clears appropriate interrupt status bits and | 263 | * Top level interrupt handler. Clears appropriate interrupt status bits and |
274 | * then calls appropriate sub handler(s). | 264 | * then calls appropriate sub handler(s). |
275 | */ | 265 | */ |
276 | static irqreturn_t tsi148_irqhandler(int irq, void *dev_id) | 266 | static irqreturn_t tsi148_irqhandler(int irq, void *ptr) |
277 | { | 267 | { |
278 | u32 stat, enable, serviced = 0; | 268 | u32 stat, enable, serviced = 0; |
269 | struct vme_bridge *tsi148_bridge; | ||
270 | struct tsi148_driver *bridge; | ||
271 | |||
272 | tsi148_bridge = ptr; | ||
273 | |||
274 | bridge = tsi148_bridge->driver_priv; | ||
279 | 275 | ||
280 | /* Determine which interrupts are unmasked and set */ | 276 | /* Determine which interrupts are unmasked and set */ |
281 | enable = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO); | 277 | enable = ioread32be(bridge->base + TSI148_LCSR_INTEO); |
282 | stat = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTS); | 278 | stat = ioread32be(bridge->base + TSI148_LCSR_INTS); |
283 | 279 | ||
284 | /* Only look at unmasked interrupts */ | 280 | /* Only look at unmasked interrupts */ |
285 | stat &= enable; | 281 | stat &= enable; |
@@ -291,61 +287,63 @@ static irqreturn_t tsi148_irqhandler(int irq, void *dev_id) | |||
291 | /* Call subhandlers as appropriate */ | 287 | /* Call subhandlers as appropriate */ |
292 | /* DMA irqs */ | 288 | /* DMA irqs */ |
293 | if (stat & (TSI148_LCSR_INTS_DMA1S | TSI148_LCSR_INTS_DMA0S)) | 289 | if (stat & (TSI148_LCSR_INTS_DMA1S | TSI148_LCSR_INTS_DMA0S)) |
294 | serviced |= tsi148_DMA_irqhandler(stat); | 290 | serviced |= tsi148_DMA_irqhandler(bridge, stat); |
295 | 291 | ||
296 | /* Location monitor irqs */ | 292 | /* Location monitor irqs */ |
297 | if (stat & (TSI148_LCSR_INTS_LM3S | TSI148_LCSR_INTS_LM2S | | 293 | if (stat & (TSI148_LCSR_INTS_LM3S | TSI148_LCSR_INTS_LM2S | |
298 | TSI148_LCSR_INTS_LM1S | TSI148_LCSR_INTS_LM0S)) | 294 | TSI148_LCSR_INTS_LM1S | TSI148_LCSR_INTS_LM0S)) |
299 | serviced |= tsi148_LM_irqhandler(stat); | 295 | serviced |= tsi148_LM_irqhandler(bridge, stat); |
300 | 296 | ||
301 | /* Mail box irqs */ | 297 | /* Mail box irqs */ |
302 | if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S | | 298 | if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S | |
303 | TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S)) | 299 | TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S)) |
304 | serviced |= tsi148_MB_irqhandler(stat); | 300 | serviced |= tsi148_MB_irqhandler(bridge, stat); |
305 | 301 | ||
306 | /* PCI bus error */ | 302 | /* PCI bus error */ |
307 | if (stat & TSI148_LCSR_INTS_PERRS) | 303 | if (stat & TSI148_LCSR_INTS_PERRS) |
308 | serviced |= tsi148_PERR_irqhandler(); | 304 | serviced |= tsi148_PERR_irqhandler(bridge); |
309 | 305 | ||
310 | /* VME bus error */ | 306 | /* VME bus error */ |
311 | if (stat & TSI148_LCSR_INTS_VERRS) | 307 | if (stat & TSI148_LCSR_INTS_VERRS) |
312 | serviced |= tsi148_VERR_irqhandler(); | 308 | serviced |= tsi148_VERR_irqhandler(tsi148_bridge); |
313 | 309 | ||
314 | /* IACK irq */ | 310 | /* IACK irq */ |
315 | if (stat & TSI148_LCSR_INTS_IACKS) | 311 | if (stat & TSI148_LCSR_INTS_IACKS) |
316 | serviced |= tsi148_IACK_irqhandler(); | 312 | serviced |= tsi148_IACK_irqhandler(bridge); |
317 | 313 | ||
318 | /* VME bus irqs */ | 314 | /* VME bus irqs */ |
319 | if (stat & (TSI148_LCSR_INTS_IRQ7S | TSI148_LCSR_INTS_IRQ6S | | 315 | if (stat & (TSI148_LCSR_INTS_IRQ7S | TSI148_LCSR_INTS_IRQ6S | |
320 | TSI148_LCSR_INTS_IRQ5S | TSI148_LCSR_INTS_IRQ4S | | 316 | TSI148_LCSR_INTS_IRQ5S | TSI148_LCSR_INTS_IRQ4S | |
321 | TSI148_LCSR_INTS_IRQ3S | TSI148_LCSR_INTS_IRQ2S | | 317 | TSI148_LCSR_INTS_IRQ3S | TSI148_LCSR_INTS_IRQ2S | |
322 | TSI148_LCSR_INTS_IRQ1S)) | 318 | TSI148_LCSR_INTS_IRQ1S)) |
323 | serviced |= tsi148_VIRQ_irqhandler(stat); | 319 | serviced |= tsi148_VIRQ_irqhandler(tsi148_bridge, stat); |
324 | 320 | ||
325 | /* Clear serviced interrupts */ | 321 | /* Clear serviced interrupts */ |
326 | iowrite32be(serviced, tsi148_bridge->base + TSI148_LCSR_INTC); | 322 | iowrite32be(serviced, bridge->base + TSI148_LCSR_INTC); |
327 | 323 | ||
328 | return IRQ_HANDLED; | 324 | return IRQ_HANDLED; |
329 | } | 325 | } |
330 | 326 | ||
331 | static int tsi148_irq_init(struct vme_bridge *bridge) | 327 | static int tsi148_irq_init(struct vme_bridge *tsi148_bridge) |
332 | { | 328 | { |
333 | int result; | 329 | int result; |
334 | unsigned int tmp; | 330 | unsigned int tmp; |
335 | struct pci_dev *pdev; | 331 | struct pci_dev *pdev; |
332 | struct tsi148_driver *bridge; | ||
333 | |||
334 | pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); | ||
336 | 335 | ||
337 | /* Need pdev */ | 336 | bridge = tsi148_bridge->driver_priv; |
338 | pdev = container_of(bridge->parent, struct pci_dev, dev); | ||
339 | 337 | ||
340 | /* Initialise list for VME bus errors */ | 338 | /* Initialise list for VME bus errors */ |
341 | INIT_LIST_HEAD(&(bridge->vme_errors)); | 339 | INIT_LIST_HEAD(&(tsi148_bridge->vme_errors)); |
342 | 340 | ||
343 | mutex_init(&(bridge->irq_mtx)); | 341 | mutex_init(&(tsi148_bridge->irq_mtx)); |
344 | 342 | ||
345 | result = request_irq(pdev->irq, | 343 | result = request_irq(pdev->irq, |
346 | tsi148_irqhandler, | 344 | tsi148_irqhandler, |
347 | IRQF_SHARED, | 345 | IRQF_SHARED, |
348 | driver_name, pdev); | 346 | driver_name, tsi148_bridge); |
349 | if (result) { | 347 | if (result) { |
350 | dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", | 348 | dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", |
351 | pdev->irq); | 349 | pdev->irq); |
@@ -359,7 +357,7 @@ static int tsi148_irq_init(struct vme_bridge *bridge) | |||
359 | TSI148_LCSR_INTEO_PERREO | TSI148_LCSR_INTEO_VERREO | | 357 | TSI148_LCSR_INTEO_PERREO | TSI148_LCSR_INTEO_VERREO | |
360 | TSI148_LCSR_INTEO_IACKEO; | 358 | TSI148_LCSR_INTEO_IACKEO; |
361 | 359 | ||
362 | /* XXX This leaves the following interrupts masked. | 360 | /* This leaves the following interrupts masked. |
363 | * TSI148_LCSR_INTEO_VIEEO | 361 | * TSI148_LCSR_INTEO_VIEEO |
364 | * TSI148_LCSR_INTEO_SYSFLEO | 362 | * TSI148_LCSR_INTEO_SYSFLEO |
365 | * TSI148_LCSR_INTEO_ACFLEO | 363 | * TSI148_LCSR_INTEO_ACFLEO |
@@ -392,14 +390,14 @@ static int tsi148_irq_init(struct vme_bridge *bridge) | |||
392 | return 0; | 390 | return 0; |
393 | } | 391 | } |
394 | 392 | ||
395 | static void tsi148_irq_exit(struct pci_dev *pdev) | 393 | static void tsi148_irq_exit(struct tsi148_driver *bridge, struct pci_dev *pdev) |
396 | { | 394 | { |
397 | /* Turn off interrupts */ | 395 | /* Turn off interrupts */ |
398 | iowrite32be(0x0, tsi148_bridge->base + TSI148_LCSR_INTEO); | 396 | iowrite32be(0x0, bridge->base + TSI148_LCSR_INTEO); |
399 | iowrite32be(0x0, tsi148_bridge->base + TSI148_LCSR_INTEN); | 397 | iowrite32be(0x0, bridge->base + TSI148_LCSR_INTEN); |
400 | 398 | ||
401 | /* Clear all interrupts */ | 399 | /* Clear all interrupts */ |
402 | iowrite32be(0xFFFFFFFF, tsi148_bridge->base + TSI148_LCSR_INTC); | 400 | iowrite32be(0xFFFFFFFF, bridge->base + TSI148_LCSR_INTC); |
403 | 401 | ||
404 | /* Detach interrupt handler */ | 402 | /* Detach interrupt handler */ |
405 | free_irq(pdev->irq, pdev); | 403 | free_irq(pdev->irq, pdev); |
@@ -408,11 +406,11 @@ static void tsi148_irq_exit(struct pci_dev *pdev) | |||
408 | /* | 406 | /* |
409 | * Check to see if an IACk has been received, return true (1) or false (0). | 407 | * Check to see if an IACk has been received, return true (1) or false (0). |
410 | */ | 408 | */ |
411 | int tsi148_iack_received(void) | 409 | int tsi148_iack_received(struct tsi148_driver *bridge) |
412 | { | 410 | { |
413 | u32 tmp; | 411 | u32 tmp; |
414 | 412 | ||
415 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_VICR); | 413 | tmp = ioread32be(bridge->base + TSI148_LCSR_VICR); |
416 | 414 | ||
417 | if (tmp & TSI148_LCSR_VICR_IRQS) | 415 | if (tmp & TSI148_LCSR_VICR_IRQS) |
418 | return 0; | 416 | return 0; |
@@ -423,20 +421,24 @@ int tsi148_iack_received(void) | |||
423 | /* | 421 | /* |
424 | * Configure VME interrupt | 422 | * Configure VME interrupt |
425 | */ | 423 | */ |
426 | void tsi148_irq_set(int level, int state, int sync) | 424 | void tsi148_irq_set(struct vme_bridge *tsi148_bridge, int level, |
425 | int state, int sync) | ||
427 | { | 426 | { |
428 | struct pci_dev *pdev; | 427 | struct pci_dev *pdev; |
429 | u32 tmp; | 428 | u32 tmp; |
429 | struct tsi148_driver *bridge; | ||
430 | |||
431 | bridge = tsi148_bridge->driver_priv; | ||
430 | 432 | ||
431 | /* We need to do the ordering differently for enabling and disabling */ | 433 | /* We need to do the ordering differently for enabling and disabling */ |
432 | if (state == 0) { | 434 | if (state == 0) { |
433 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEN); | 435 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEN); |
434 | tmp &= ~TSI148_LCSR_INTEN_IRQEN[level - 1]; | 436 | tmp &= ~TSI148_LCSR_INTEN_IRQEN[level - 1]; |
435 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEN); | 437 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEN); |
436 | 438 | ||
437 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO); | 439 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEO); |
438 | tmp &= ~TSI148_LCSR_INTEO_IRQEO[level - 1]; | 440 | tmp &= ~TSI148_LCSR_INTEO_IRQEO[level - 1]; |
439 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEO); | 441 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO); |
440 | 442 | ||
441 | if (sync != 0) { | 443 | if (sync != 0) { |
442 | pdev = container_of(tsi148_bridge->parent, | 444 | pdev = container_of(tsi148_bridge->parent, |
@@ -445,13 +447,13 @@ void tsi148_irq_set(int level, int state, int sync) | |||
445 | synchronize_irq(pdev->irq); | 447 | synchronize_irq(pdev->irq); |
446 | } | 448 | } |
447 | } else { | 449 | } else { |
448 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO); | 450 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEO); |
449 | tmp |= TSI148_LCSR_INTEO_IRQEO[level - 1]; | 451 | tmp |= TSI148_LCSR_INTEO_IRQEO[level - 1]; |
450 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEO); | 452 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO); |
451 | 453 | ||
452 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEN); | 454 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEN); |
453 | tmp |= TSI148_LCSR_INTEN_IRQEN[level - 1]; | 455 | tmp |= TSI148_LCSR_INTEN_IRQEN[level - 1]; |
454 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEN); | 456 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEN); |
455 | } | 457 | } |
456 | } | 458 | } |
457 | 459 | ||
@@ -459,28 +461,32 @@ void tsi148_irq_set(int level, int state, int sync) | |||
459 | * Generate a VME bus interrupt at the requested level & vector. Wait for | 461 | * Generate a VME bus interrupt at the requested level & vector. Wait for |
460 | * interrupt to be acked. | 462 | * interrupt to be acked. |
461 | */ | 463 | */ |
462 | int tsi148_irq_generate(int level, int statid) | 464 | int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, int statid) |
463 | { | 465 | { |
464 | u32 tmp; | 466 | u32 tmp; |
467 | struct tsi148_driver *bridge; | ||
468 | |||
469 | bridge = tsi148_bridge->driver_priv; | ||
465 | 470 | ||
466 | mutex_lock(&(vme_int)); | 471 | mutex_lock(&(bridge->vme_int)); |
467 | 472 | ||
468 | /* Read VICR register */ | 473 | /* Read VICR register */ |
469 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_VICR); | 474 | tmp = ioread32be(bridge->base + TSI148_LCSR_VICR); |
470 | 475 | ||
471 | /* Set Status/ID */ | 476 | /* Set Status/ID */ |
472 | tmp = (tmp & ~TSI148_LCSR_VICR_STID_M) | | 477 | tmp = (tmp & ~TSI148_LCSR_VICR_STID_M) | |
473 | (statid & TSI148_LCSR_VICR_STID_M); | 478 | (statid & TSI148_LCSR_VICR_STID_M); |
474 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_VICR); | 479 | iowrite32be(tmp, bridge->base + TSI148_LCSR_VICR); |
475 | 480 | ||
476 | /* Assert VMEbus IRQ */ | 481 | /* Assert VMEbus IRQ */ |
477 | tmp = tmp | TSI148_LCSR_VICR_IRQL[level]; | 482 | tmp = tmp | TSI148_LCSR_VICR_IRQL[level]; |
478 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_VICR); | 483 | iowrite32be(tmp, bridge->base + TSI148_LCSR_VICR); |
479 | 484 | ||
480 | /* XXX Consider implementing a timeout? */ | 485 | /* XXX Consider implementing a timeout? */ |
481 | wait_event_interruptible(iack_queue, tsi148_iack_received()); | 486 | wait_event_interruptible(bridge->iack_queue, |
487 | tsi148_iack_received(bridge)); | ||
482 | 488 | ||
483 | mutex_unlock(&(vme_int)); | 489 | mutex_unlock(&(bridge->vme_int)); |
484 | 490 | ||
485 | return 0; | 491 | return 0; |
486 | } | 492 | } |
@@ -488,8 +494,8 @@ int tsi148_irq_generate(int level, int statid) | |||
488 | /* | 494 | /* |
489 | * Find the first error in this address range | 495 | * Find the first error in this address range |
490 | */ | 496 | */ |
491 | static struct vme_bus_error *tsi148_find_error(vme_address_t aspace, | 497 | static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, |
492 | unsigned long long address, size_t count) | 498 | vme_address_t aspace, unsigned long long address, size_t count) |
493 | { | 499 | { |
494 | struct list_head *err_pos; | 500 | struct list_head *err_pos; |
495 | struct vme_bus_error *vme_err, *valid = NULL; | 501 | struct vme_bus_error *vme_err, *valid = NULL; |
@@ -520,8 +526,8 @@ static struct vme_bus_error *tsi148_find_error(vme_address_t aspace, | |||
520 | /* | 526 | /* |
521 | * Clear errors in the provided address range. | 527 | * Clear errors in the provided address range. |
522 | */ | 528 | */ |
523 | static void tsi148_clear_errors(vme_address_t aspace, | 529 | static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, |
524 | unsigned long long address, size_t count) | 530 | vme_address_t aspace, unsigned long long address, size_t count) |
525 | { | 531 | { |
526 | struct list_head *err_pos, *temp; | 532 | struct list_head *err_pos, *temp; |
527 | struct vme_bus_error *vme_err; | 533 | struct vme_bus_error *vme_err; |
@@ -561,16 +567,9 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, | |||
561 | unsigned int vme_bound_low, vme_bound_high; | 567 | unsigned int vme_bound_low, vme_bound_high; |
562 | unsigned int pci_offset_low, pci_offset_high; | 568 | unsigned int pci_offset_low, pci_offset_high; |
563 | unsigned long long vme_bound, pci_offset; | 569 | unsigned long long vme_bound, pci_offset; |
570 | struct tsi148_driver *bridge; | ||
564 | 571 | ||
565 | #if 0 | 572 | bridge = image->parent->driver_priv; |
566 | printk("Set slave image %d to:\n", image->number); | ||
567 | printk("\tEnabled: %s\n", (enabled == 1)? "yes" : "no"); | ||
568 | printk("\tVME Base:0x%llx\n", vme_base); | ||
569 | printk("\tWindow Size:0x%llx\n", size); | ||
570 | printk("\tPCI Base:0x%lx\n", (unsigned long)pci_base); | ||
571 | printk("\tAddress Space:0x%x\n", aspace); | ||
572 | printk("\tTransfer Cycle Properties:0x%x\n", cycle); | ||
573 | #endif | ||
574 | 573 | ||
575 | i = image->number; | 574 | i = image->number; |
576 | 575 | ||
@@ -627,49 +626,27 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, | |||
627 | return -EINVAL; | 626 | return -EINVAL; |
628 | } | 627 | } |
629 | 628 | ||
630 | #if 0 | ||
631 | printk("\tVME Bound:0x%llx\n", vme_bound); | ||
632 | printk("\tPCI Offset:0x%llx\n", pci_offset); | ||
633 | #endif | ||
634 | |||
635 | /* Disable while we are mucking around */ | 629 | /* Disable while we are mucking around */ |
636 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 630 | temp_ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
637 | TSI148_LCSR_OFFSET_ITAT); | 631 | TSI148_LCSR_OFFSET_ITAT); |
638 | temp_ctl &= ~TSI148_LCSR_ITAT_EN; | 632 | temp_ctl &= ~TSI148_LCSR_ITAT_EN; |
639 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 633 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] + |
640 | TSI148_LCSR_OFFSET_ITAT); | 634 | TSI148_LCSR_OFFSET_ITAT); |
641 | 635 | ||
642 | /* Setup mapping */ | 636 | /* Setup mapping */ |
643 | iowrite32be(vme_base_high, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 637 | iowrite32be(vme_base_high, bridge->base + TSI148_LCSR_IT[i] + |
644 | TSI148_LCSR_OFFSET_ITSAU); | 638 | TSI148_LCSR_OFFSET_ITSAU); |
645 | iowrite32be(vme_base_low, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 639 | iowrite32be(vme_base_low, bridge->base + TSI148_LCSR_IT[i] + |
646 | TSI148_LCSR_OFFSET_ITSAL); | 640 | TSI148_LCSR_OFFSET_ITSAL); |
647 | iowrite32be(vme_bound_high, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 641 | iowrite32be(vme_bound_high, bridge->base + TSI148_LCSR_IT[i] + |
648 | TSI148_LCSR_OFFSET_ITEAU); | 642 | TSI148_LCSR_OFFSET_ITEAU); |
649 | iowrite32be(vme_bound_low, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 643 | iowrite32be(vme_bound_low, bridge->base + TSI148_LCSR_IT[i] + |
650 | TSI148_LCSR_OFFSET_ITEAL); | 644 | TSI148_LCSR_OFFSET_ITEAL); |
651 | iowrite32be(pci_offset_high, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 645 | iowrite32be(pci_offset_high, bridge->base + TSI148_LCSR_IT[i] + |
652 | TSI148_LCSR_OFFSET_ITOFU); | 646 | TSI148_LCSR_OFFSET_ITOFU); |
653 | iowrite32be(pci_offset_low, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 647 | iowrite32be(pci_offset_low, bridge->base + TSI148_LCSR_IT[i] + |
654 | TSI148_LCSR_OFFSET_ITOFL); | 648 | TSI148_LCSR_OFFSET_ITOFL); |
655 | 649 | ||
656 | /* XXX Prefetch stuff currently unsupported */ | ||
657 | #if 0 | ||
658 | |||
659 | for (x = 0; x < 4; x++) { | ||
660 | if ((64 << x) >= vmeIn->prefetchSize) { | ||
661 | break; | ||
662 | } | ||
663 | } | ||
664 | if (x == 4) | ||
665 | x--; | ||
666 | temp_ctl |= (x << 16); | ||
667 | |||
668 | if (vmeIn->prefetchThreshold) | ||
669 | if (vmeIn->prefetchThreshold) | ||
670 | temp_ctl |= 0x40000; | ||
671 | #endif | ||
672 | |||
673 | /* Setup 2eSST speeds */ | 650 | /* Setup 2eSST speeds */ |
674 | temp_ctl &= ~TSI148_LCSR_ITAT_2eSSTM_M; | 651 | temp_ctl &= ~TSI148_LCSR_ITAT_2eSSTM_M; |
675 | switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { | 652 | switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { |
@@ -712,13 +689,13 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, | |||
712 | temp_ctl |= TSI148_LCSR_ITAT_DATA; | 689 | temp_ctl |= TSI148_LCSR_ITAT_DATA; |
713 | 690 | ||
714 | /* Write ctl reg without enable */ | 691 | /* Write ctl reg without enable */ |
715 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 692 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] + |
716 | TSI148_LCSR_OFFSET_ITAT); | 693 | TSI148_LCSR_OFFSET_ITAT); |
717 | 694 | ||
718 | if (enabled) | 695 | if (enabled) |
719 | temp_ctl |= TSI148_LCSR_ITAT_EN; | 696 | temp_ctl |= TSI148_LCSR_ITAT_EN; |
720 | 697 | ||
721 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 698 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] + |
722 | TSI148_LCSR_OFFSET_ITAT); | 699 | TSI148_LCSR_OFFSET_ITAT); |
723 | 700 | ||
724 | return 0; | 701 | return 0; |
@@ -726,8 +703,6 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, | |||
726 | 703 | ||
727 | /* | 704 | /* |
728 | * Get slave window configuration. | 705 | * Get slave window configuration. |
729 | * | ||
730 | * XXX Prefetch currently unsupported. | ||
731 | */ | 706 | */ |
732 | int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, | 707 | int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, |
733 | unsigned long long *vme_base, unsigned long long *size, | 708 | unsigned long long *vme_base, unsigned long long *size, |
@@ -738,25 +713,27 @@ int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, | |||
738 | unsigned int vme_bound_low, vme_bound_high; | 713 | unsigned int vme_bound_low, vme_bound_high; |
739 | unsigned int pci_offset_low, pci_offset_high; | 714 | unsigned int pci_offset_low, pci_offset_high; |
740 | unsigned long long vme_bound, pci_offset; | 715 | unsigned long long vme_bound, pci_offset; |
716 | struct tsi148_driver *bridge; | ||
741 | 717 | ||
718 | bridge = image->parent->driver_priv; | ||
742 | 719 | ||
743 | i = image->number; | 720 | i = image->number; |
744 | 721 | ||
745 | /* Read registers */ | 722 | /* Read registers */ |
746 | ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 723 | ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
747 | TSI148_LCSR_OFFSET_ITAT); | 724 | TSI148_LCSR_OFFSET_ITAT); |
748 | 725 | ||
749 | vme_base_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 726 | vme_base_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
750 | TSI148_LCSR_OFFSET_ITSAU); | 727 | TSI148_LCSR_OFFSET_ITSAU); |
751 | vme_base_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 728 | vme_base_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
752 | TSI148_LCSR_OFFSET_ITSAL); | 729 | TSI148_LCSR_OFFSET_ITSAL); |
753 | vme_bound_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 730 | vme_bound_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
754 | TSI148_LCSR_OFFSET_ITEAU); | 731 | TSI148_LCSR_OFFSET_ITEAU); |
755 | vme_bound_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 732 | vme_bound_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
756 | TSI148_LCSR_OFFSET_ITEAL); | 733 | TSI148_LCSR_OFFSET_ITEAL); |
757 | pci_offset_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 734 | pci_offset_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
758 | TSI148_LCSR_OFFSET_ITOFU); | 735 | TSI148_LCSR_OFFSET_ITOFU); |
759 | pci_offset_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_IT[i] + | 736 | pci_offset_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] + |
760 | TSI148_LCSR_OFFSET_ITOFL); | 737 | TSI148_LCSR_OFFSET_ITOFL); |
761 | 738 | ||
762 | /* Convert 64-bit variables to 2x 32-bit variables */ | 739 | /* Convert 64-bit variables to 2x 32-bit variables */ |
@@ -833,6 +810,9 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
833 | unsigned long long existing_size; | 810 | unsigned long long existing_size; |
834 | int retval = 0; | 811 | int retval = 0; |
835 | struct pci_dev *pdev; | 812 | struct pci_dev *pdev; |
813 | struct vme_bridge *tsi148_bridge; | ||
814 | |||
815 | tsi148_bridge = image->parent; | ||
836 | 816 | ||
837 | /* Find pci_dev container of dev */ | 817 | /* Find pci_dev container of dev */ |
838 | if (tsi148_bridge->parent == NULL) { | 818 | if (tsi148_bridge->parent == NULL) { |
@@ -841,8 +821,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
841 | } | 821 | } |
842 | pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); | 822 | pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); |
843 | 823 | ||
844 | existing_size = (unsigned long long)(image->pci_resource.end - | 824 | existing_size = (unsigned long long)(image->bus_resource.end - |
845 | image->pci_resource.start); | 825 | image->bus_resource.start); |
846 | 826 | ||
847 | /* If the existing size is OK, return */ | 827 | /* If the existing size is OK, return */ |
848 | if ((size != 0) && (existing_size == (size - 1))) | 828 | if ((size != 0) && (existing_size == (size - 1))) |
@@ -851,10 +831,10 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
851 | if (existing_size != 0) { | 831 | if (existing_size != 0) { |
852 | iounmap(image->kern_base); | 832 | iounmap(image->kern_base); |
853 | image->kern_base = NULL; | 833 | image->kern_base = NULL; |
854 | if (image->pci_resource.name != NULL) | 834 | if (image->bus_resource.name != NULL) |
855 | kfree(image->pci_resource.name); | 835 | kfree(image->bus_resource.name); |
856 | release_resource(&(image->pci_resource)); | 836 | release_resource(&(image->bus_resource)); |
857 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 837 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
858 | } | 838 | } |
859 | 839 | ||
860 | /* Exit here if size is zero */ | 840 | /* Exit here if size is zero */ |
@@ -862,9 +842,9 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
862 | return 0; | 842 | return 0; |
863 | } | 843 | } |
864 | 844 | ||
865 | if (image->pci_resource.name == NULL) { | 845 | if (image->bus_resource.name == NULL) { |
866 | image->pci_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); | 846 | image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); |
867 | if (image->pci_resource.name == NULL) { | 847 | if (image->bus_resource.name == NULL) { |
868 | printk(KERN_ERR "Unable to allocate memory for resource" | 848 | printk(KERN_ERR "Unable to allocate memory for resource" |
869 | " name\n"); | 849 | " name\n"); |
870 | retval = -ENOMEM; | 850 | retval = -ENOMEM; |
@@ -872,26 +852,26 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
872 | } | 852 | } |
873 | } | 853 | } |
874 | 854 | ||
875 | sprintf((char *)image->pci_resource.name, "%s.%d", tsi148_bridge->name, | 855 | sprintf((char *)image->bus_resource.name, "%s.%d", tsi148_bridge->name, |
876 | image->number); | 856 | image->number); |
877 | 857 | ||
878 | image->pci_resource.start = 0; | 858 | image->bus_resource.start = 0; |
879 | image->pci_resource.end = (unsigned long)size; | 859 | image->bus_resource.end = (unsigned long)size; |
880 | image->pci_resource.flags = IORESOURCE_MEM; | 860 | image->bus_resource.flags = IORESOURCE_MEM; |
881 | 861 | ||
882 | retval = pci_bus_alloc_resource(pdev->bus, | 862 | retval = pci_bus_alloc_resource(pdev->bus, |
883 | &(image->pci_resource), size, size, PCIBIOS_MIN_MEM, | 863 | &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, |
884 | 0, NULL, NULL); | 864 | 0, NULL, NULL); |
885 | if (retval) { | 865 | if (retval) { |
886 | printk(KERN_ERR "Failed to allocate mem resource for " | 866 | printk(KERN_ERR "Failed to allocate mem resource for " |
887 | "window %d size 0x%lx start 0x%lx\n", | 867 | "window %d size 0x%lx start 0x%lx\n", |
888 | image->number, (unsigned long)size, | 868 | image->number, (unsigned long)size, |
889 | (unsigned long)image->pci_resource.start); | 869 | (unsigned long)image->bus_resource.start); |
890 | goto err_resource; | 870 | goto err_resource; |
891 | } | 871 | } |
892 | 872 | ||
893 | image->kern_base = ioremap_nocache( | 873 | image->kern_base = ioremap_nocache( |
894 | image->pci_resource.start, size); | 874 | image->bus_resource.start, size); |
895 | if (image->kern_base == NULL) { | 875 | if (image->kern_base == NULL) { |
896 | printk(KERN_ERR "Failed to remap resource\n"); | 876 | printk(KERN_ERR "Failed to remap resource\n"); |
897 | retval = -ENOMEM; | 877 | retval = -ENOMEM; |
@@ -903,10 +883,10 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, | |||
903 | iounmap(image->kern_base); | 883 | iounmap(image->kern_base); |
904 | image->kern_base = NULL; | 884 | image->kern_base = NULL; |
905 | err_remap: | 885 | err_remap: |
906 | release_resource(&(image->pci_resource)); | 886 | release_resource(&(image->bus_resource)); |
907 | err_resource: | 887 | err_resource: |
908 | kfree(image->pci_resource.name); | 888 | kfree(image->bus_resource.name); |
909 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 889 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
910 | err_name: | 890 | err_name: |
911 | return retval; | 891 | return retval; |
912 | } | 892 | } |
@@ -918,9 +898,9 @@ static void tsi148_free_resource(struct vme_master_resource *image) | |||
918 | { | 898 | { |
919 | iounmap(image->kern_base); | 899 | iounmap(image->kern_base); |
920 | image->kern_base = NULL; | 900 | image->kern_base = NULL; |
921 | release_resource(&(image->pci_resource)); | 901 | release_resource(&(image->bus_resource)); |
922 | kfree(image->pci_resource.name); | 902 | kfree(image->bus_resource.name); |
923 | memset(&(image->pci_resource), 0, sizeof(struct resource)); | 903 | memset(&(image->bus_resource), 0, sizeof(struct resource)); |
924 | } | 904 | } |
925 | 905 | ||
926 | /* | 906 | /* |
@@ -937,6 +917,9 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, | |||
937 | unsigned int pci_bound_low, pci_bound_high; | 917 | unsigned int pci_bound_low, pci_bound_high; |
938 | unsigned int vme_offset_low, vme_offset_high; | 918 | unsigned int vme_offset_low, vme_offset_high; |
939 | unsigned long long pci_bound, vme_offset, pci_base; | 919 | unsigned long long pci_bound, vme_offset, pci_base; |
920 | struct tsi148_driver *bridge; | ||
921 | |||
922 | bridge = image->parent->driver_priv; | ||
940 | 923 | ||
941 | /* Verify input data */ | 924 | /* Verify input data */ |
942 | if (vme_base & 0xFFFF) { | 925 | if (vme_base & 0xFFFF) { |
@@ -970,7 +953,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, | |||
970 | pci_bound = 0; | 953 | pci_bound = 0; |
971 | vme_offset = 0; | 954 | vme_offset = 0; |
972 | } else { | 955 | } else { |
973 | pci_base = (unsigned long long)image->pci_resource.start; | 956 | pci_base = (unsigned long long)image->bus_resource.start; |
974 | 957 | ||
975 | /* | 958 | /* |
976 | * Bound address is a valid address for the window, adjust | 959 | * Bound address is a valid address for the window, adjust |
@@ -1007,26 +990,12 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, | |||
1007 | i = image->number; | 990 | i = image->number; |
1008 | 991 | ||
1009 | /* Disable while we are mucking around */ | 992 | /* Disable while we are mucking around */ |
1010 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 993 | temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1011 | TSI148_LCSR_OFFSET_OTAT); | 994 | TSI148_LCSR_OFFSET_OTAT); |
1012 | temp_ctl &= ~TSI148_LCSR_OTAT_EN; | 995 | temp_ctl &= ~TSI148_LCSR_OTAT_EN; |
1013 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 996 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + |
1014 | TSI148_LCSR_OFFSET_OTAT); | 997 | TSI148_LCSR_OFFSET_OTAT); |
1015 | 998 | ||
1016 | /* XXX Prefetch stuff currently unsupported */ | ||
1017 | #if 0 | ||
1018 | if (vmeOut->prefetchEnable) { | ||
1019 | temp_ctl |= 0x40000; | ||
1020 | for (x = 0; x < 4; x++) { | ||
1021 | if ((2 << x) >= vmeOut->prefetchSize) | ||
1022 | break; | ||
1023 | } | ||
1024 | if (x == 4) | ||
1025 | x = 3; | ||
1026 | temp_ctl |= (x << 16); | ||
1027 | } | ||
1028 | #endif | ||
1029 | |||
1030 | /* Setup 2eSST speeds */ | 999 | /* Setup 2eSST speeds */ |
1031 | temp_ctl &= ~TSI148_LCSR_OTAT_2eSSTM_M; | 1000 | temp_ctl &= ~TSI148_LCSR_OTAT_2eSSTM_M; |
1032 | switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { | 1001 | switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { |
@@ -1126,33 +1095,27 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, | |||
1126 | temp_ctl |= TSI148_LCSR_OTAT_PGM; | 1095 | temp_ctl |= TSI148_LCSR_OTAT_PGM; |
1127 | 1096 | ||
1128 | /* Setup mapping */ | 1097 | /* Setup mapping */ |
1129 | iowrite32be(pci_base_high, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1098 | iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] + |
1130 | TSI148_LCSR_OFFSET_OTSAU); | 1099 | TSI148_LCSR_OFFSET_OTSAU); |
1131 | iowrite32be(pci_base_low, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1100 | iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] + |
1132 | TSI148_LCSR_OFFSET_OTSAL); | 1101 | TSI148_LCSR_OFFSET_OTSAL); |
1133 | iowrite32be(pci_bound_high, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1102 | iowrite32be(pci_bound_high, bridge->base + TSI148_LCSR_OT[i] + |
1134 | TSI148_LCSR_OFFSET_OTEAU); | 1103 | TSI148_LCSR_OFFSET_OTEAU); |
1135 | iowrite32be(pci_bound_low, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1104 | iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] + |
1136 | TSI148_LCSR_OFFSET_OTEAL); | 1105 | TSI148_LCSR_OFFSET_OTEAL); |
1137 | iowrite32be(vme_offset_high, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1106 | iowrite32be(vme_offset_high, bridge->base + TSI148_LCSR_OT[i] + |
1138 | TSI148_LCSR_OFFSET_OTOFU); | 1107 | TSI148_LCSR_OFFSET_OTOFU); |
1139 | iowrite32be(vme_offset_low, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1108 | iowrite32be(vme_offset_low, bridge->base + TSI148_LCSR_OT[i] + |
1140 | TSI148_LCSR_OFFSET_OTOFL); | 1109 | TSI148_LCSR_OFFSET_OTOFL); |
1141 | 1110 | ||
1142 | /* XXX We need to deal with OTBS */ | ||
1143 | #if 0 | ||
1144 | iowrite32be(vmeOut->bcastSelect2esst, tsi148_bridge->base + | ||
1145 | TSI148_LCSR_OT[i] + TSI148_LCSR_OFFSET_OTBS); | ||
1146 | #endif | ||
1147 | |||
1148 | /* Write ctl reg without enable */ | 1111 | /* Write ctl reg without enable */ |
1149 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1112 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + |
1150 | TSI148_LCSR_OFFSET_OTAT); | 1113 | TSI148_LCSR_OFFSET_OTAT); |
1151 | 1114 | ||
1152 | if (enabled) | 1115 | if (enabled) |
1153 | temp_ctl |= TSI148_LCSR_OTAT_EN; | 1116 | temp_ctl |= TSI148_LCSR_OTAT_EN; |
1154 | 1117 | ||
1155 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1118 | iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + |
1156 | TSI148_LCSR_OFFSET_OTAT); | 1119 | TSI148_LCSR_OFFSET_OTAT); |
1157 | 1120 | ||
1158 | spin_unlock(&(image->lock)); | 1121 | spin_unlock(&(image->lock)); |
@@ -1183,23 +1146,26 @@ int __tsi148_master_get( struct vme_master_resource *image, int *enabled, | |||
1183 | unsigned int vme_offset_low, vme_offset_high; | 1146 | unsigned int vme_offset_low, vme_offset_high; |
1184 | 1147 | ||
1185 | unsigned long long pci_base, pci_bound, vme_offset; | 1148 | unsigned long long pci_base, pci_bound, vme_offset; |
1149 | struct tsi148_driver *bridge; | ||
1150 | |||
1151 | bridge = image->parent->driver_priv; | ||
1186 | 1152 | ||
1187 | i = image->number; | 1153 | i = image->number; |
1188 | 1154 | ||
1189 | ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1155 | ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1190 | TSI148_LCSR_OFFSET_OTAT); | 1156 | TSI148_LCSR_OFFSET_OTAT); |
1191 | 1157 | ||
1192 | pci_base_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1158 | pci_base_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1193 | TSI148_LCSR_OFFSET_OTSAU); | 1159 | TSI148_LCSR_OFFSET_OTSAU); |
1194 | pci_base_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1160 | pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1195 | TSI148_LCSR_OFFSET_OTSAL); | 1161 | TSI148_LCSR_OFFSET_OTSAL); |
1196 | pci_bound_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1162 | pci_bound_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1197 | TSI148_LCSR_OFFSET_OTEAU); | 1163 | TSI148_LCSR_OFFSET_OTEAU); |
1198 | pci_bound_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1164 | pci_bound_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1199 | TSI148_LCSR_OFFSET_OTEAL); | 1165 | TSI148_LCSR_OFFSET_OTEAL); |
1200 | vme_offset_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1166 | vme_offset_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1201 | TSI148_LCSR_OFFSET_OTOFU); | 1167 | TSI148_LCSR_OFFSET_OTOFU); |
1202 | vme_offset_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1168 | vme_offset_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1203 | TSI148_LCSR_OFFSET_OTOFL); | 1169 | TSI148_LCSR_OFFSET_OTOFL); |
1204 | 1170 | ||
1205 | /* Convert 64-bit variables to 2x 32-bit variables */ | 1171 | /* Convert 64-bit variables to 2x 32-bit variables */ |
@@ -1305,6 +1271,9 @@ ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, | |||
1305 | vme_cycle_t cycle; | 1271 | vme_cycle_t cycle; |
1306 | vme_width_t dwidth; | 1272 | vme_width_t dwidth; |
1307 | struct vme_bus_error *vme_err = NULL; | 1273 | struct vme_bus_error *vme_err = NULL; |
1274 | struct vme_bridge *tsi148_bridge; | ||
1275 | |||
1276 | tsi148_bridge = image->parent; | ||
1308 | 1277 | ||
1309 | spin_lock(&(image->lock)); | 1278 | spin_lock(&(image->lock)); |
1310 | 1279 | ||
@@ -1317,13 +1286,15 @@ ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, | |||
1317 | __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, | 1286 | __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, |
1318 | &dwidth); | 1287 | &dwidth); |
1319 | 1288 | ||
1320 | vme_err = tsi148_find_error(aspace, vme_base + offset, count); | 1289 | vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, |
1290 | count); | ||
1321 | if(vme_err != NULL) { | 1291 | if(vme_err != NULL) { |
1322 | dev_err(image->parent->parent, "First VME read error detected " | 1292 | dev_err(image->parent->parent, "First VME read error detected " |
1323 | "an at address 0x%llx\n", vme_err->address); | 1293 | "an at address 0x%llx\n", vme_err->address); |
1324 | retval = vme_err->address - (vme_base + offset); | 1294 | retval = vme_err->address - (vme_base + offset); |
1325 | /* Clear down save errors in this address range */ | 1295 | /* Clear down save errors in this address range */ |
1326 | tsi148_clear_errors(aspace, vme_base + offset, count); | 1296 | tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, |
1297 | count); | ||
1327 | } | 1298 | } |
1328 | 1299 | ||
1329 | skip_chk: | 1300 | skip_chk: |
@@ -1333,9 +1304,6 @@ skip_chk: | |||
1333 | } | 1304 | } |
1334 | 1305 | ||
1335 | 1306 | ||
1336 | /* XXX We need to change vme_master_resource->mtx to a spinlock so that read | ||
1337 | * and write functions can be used in an interrupt context | ||
1338 | */ | ||
1339 | ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, | 1307 | ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, |
1340 | size_t count, loff_t offset) | 1308 | size_t count, loff_t offset) |
1341 | { | 1309 | { |
@@ -1346,6 +1314,12 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, | |||
1346 | vme_width_t dwidth; | 1314 | vme_width_t dwidth; |
1347 | 1315 | ||
1348 | struct vme_bus_error *vme_err = NULL; | 1316 | struct vme_bus_error *vme_err = NULL; |
1317 | struct vme_bridge *tsi148_bridge; | ||
1318 | struct tsi148_driver *bridge; | ||
1319 | |||
1320 | tsi148_bridge = image->parent; | ||
1321 | |||
1322 | bridge = tsi148_bridge->driver_priv; | ||
1349 | 1323 | ||
1350 | spin_lock(&(image->lock)); | 1324 | spin_lock(&(image->lock)); |
1351 | 1325 | ||
@@ -1373,15 +1347,17 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, | |||
1373 | __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, | 1347 | __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, |
1374 | &dwidth); | 1348 | &dwidth); |
1375 | 1349 | ||
1376 | ioread16(flush_image->kern_base + 0x7F000); | 1350 | ioread16(bridge->flush_image->kern_base + 0x7F000); |
1377 | 1351 | ||
1378 | vme_err = tsi148_find_error(aspace, vme_base + offset, count); | 1352 | vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, |
1353 | count); | ||
1379 | if(vme_err != NULL) { | 1354 | if(vme_err != NULL) { |
1380 | printk("First VME write error detected an at address 0x%llx\n", | 1355 | printk("First VME write error detected an at address 0x%llx\n", |
1381 | vme_err->address); | 1356 | vme_err->address); |
1382 | retval = vme_err->address - (vme_base + offset); | 1357 | retval = vme_err->address - (vme_base + offset); |
1383 | /* Clear down save errors in this address range */ | 1358 | /* Clear down save errors in this address range */ |
1384 | tsi148_clear_errors(aspace, vme_base + offset, count); | 1359 | tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, |
1360 | count); | ||
1385 | } | 1361 | } |
1386 | 1362 | ||
1387 | skip_chk: | 1363 | skip_chk: |
@@ -1403,48 +1379,50 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image, | |||
1403 | unsigned int pci_addr_high, pci_addr_low; | 1379 | unsigned int pci_addr_high, pci_addr_low; |
1404 | u32 tmp, result; | 1380 | u32 tmp, result; |
1405 | int i; | 1381 | int i; |
1382 | struct tsi148_driver *bridge; | ||
1406 | 1383 | ||
1384 | bridge = image->parent->driver_priv; | ||
1407 | 1385 | ||
1408 | /* Find the PCI address that maps to the desired VME address */ | 1386 | /* Find the PCI address that maps to the desired VME address */ |
1409 | i = image->number; | 1387 | i = image->number; |
1410 | 1388 | ||
1411 | /* Locking as we can only do one of these at a time */ | 1389 | /* Locking as we can only do one of these at a time */ |
1412 | mutex_lock(&(vme_rmw)); | 1390 | mutex_lock(&(bridge->vme_rmw)); |
1413 | 1391 | ||
1414 | /* Lock image */ | 1392 | /* Lock image */ |
1415 | spin_lock(&(image->lock)); | 1393 | spin_lock(&(image->lock)); |
1416 | 1394 | ||
1417 | pci_addr_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1395 | pci_addr_high = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1418 | TSI148_LCSR_OFFSET_OTSAU); | 1396 | TSI148_LCSR_OFFSET_OTSAU); |
1419 | pci_addr_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_OT[i] + | 1397 | pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + |
1420 | TSI148_LCSR_OFFSET_OTSAL); | 1398 | TSI148_LCSR_OFFSET_OTSAL); |
1421 | 1399 | ||
1422 | reg_join(pci_addr_high, pci_addr_low, &pci_addr); | 1400 | reg_join(pci_addr_high, pci_addr_low, &pci_addr); |
1423 | reg_split(pci_addr + offset, &pci_addr_high, &pci_addr_low); | 1401 | reg_split(pci_addr + offset, &pci_addr_high, &pci_addr_low); |
1424 | 1402 | ||
1425 | /* Configure registers */ | 1403 | /* Configure registers */ |
1426 | iowrite32be(mask, tsi148_bridge->base + TSI148_LCSR_RMWEN); | 1404 | iowrite32be(mask, bridge->base + TSI148_LCSR_RMWEN); |
1427 | iowrite32be(compare, tsi148_bridge->base + TSI148_LCSR_RMWC); | 1405 | iowrite32be(compare, bridge->base + TSI148_LCSR_RMWC); |
1428 | iowrite32be(swap, tsi148_bridge->base + TSI148_LCSR_RMWS); | 1406 | iowrite32be(swap, bridge->base + TSI148_LCSR_RMWS); |
1429 | iowrite32be(pci_addr_high, tsi148_bridge->base + TSI148_LCSR_RMWAU); | 1407 | iowrite32be(pci_addr_high, bridge->base + TSI148_LCSR_RMWAU); |
1430 | iowrite32be(pci_addr_low, tsi148_bridge->base + TSI148_LCSR_RMWAL); | 1408 | iowrite32be(pci_addr_low, bridge->base + TSI148_LCSR_RMWAL); |
1431 | 1409 | ||
1432 | /* Enable RMW */ | 1410 | /* Enable RMW */ |
1433 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_VMCTRL); | 1411 | tmp = ioread32be(bridge->base + TSI148_LCSR_VMCTRL); |
1434 | tmp |= TSI148_LCSR_VMCTRL_RMWEN; | 1412 | tmp |= TSI148_LCSR_VMCTRL_RMWEN; |
1435 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_VMCTRL); | 1413 | iowrite32be(tmp, bridge->base + TSI148_LCSR_VMCTRL); |
1436 | 1414 | ||
1437 | /* Kick process off with a read to the required address. */ | 1415 | /* Kick process off with a read to the required address. */ |
1438 | result = ioread32be(image->kern_base + offset); | 1416 | result = ioread32be(image->kern_base + offset); |
1439 | 1417 | ||
1440 | /* Disable RMW */ | 1418 | /* Disable RMW */ |
1441 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_VMCTRL); | 1419 | tmp = ioread32be(bridge->base + TSI148_LCSR_VMCTRL); |
1442 | tmp &= ~TSI148_LCSR_VMCTRL_RMWEN; | 1420 | tmp &= ~TSI148_LCSR_VMCTRL_RMWEN; |
1443 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_VMCTRL); | 1421 | iowrite32be(tmp, bridge->base + TSI148_LCSR_VMCTRL); |
1444 | 1422 | ||
1445 | spin_unlock(&(image->lock)); | 1423 | spin_unlock(&(image->lock)); |
1446 | 1424 | ||
1447 | mutex_unlock(&(vme_rmw)); | 1425 | mutex_unlock(&(bridge->vme_rmw)); |
1448 | 1426 | ||
1449 | return result; | 1427 | return result; |
1450 | } | 1428 | } |
@@ -1637,8 +1615,6 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, | |||
1637 | 1615 | ||
1638 | /* | 1616 | /* |
1639 | * Add a link list descriptor to the list | 1617 | * Add a link list descriptor to the list |
1640 | * | ||
1641 | * XXX Need to handle 2eSST Broadcast select bits | ||
1642 | */ | 1618 | */ |
1643 | int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, | 1619 | int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, |
1644 | struct vme_dma_attr *dest, size_t count) | 1620 | struct vme_dma_attr *dest, size_t count) |
@@ -1651,7 +1627,7 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, | |||
1651 | dma_addr_t desc_ptr; | 1627 | dma_addr_t desc_ptr; |
1652 | int retval = 0; | 1628 | int retval = 0; |
1653 | 1629 | ||
1654 | /* XXX descriptor must be aligned on 64-bit boundaries */ | 1630 | /* Descriptor must be aligned on 64-bit boundaries */ |
1655 | entry = (struct tsi148_dma_entry *)kmalloc( | 1631 | entry = (struct tsi148_dma_entry *)kmalloc( |
1656 | sizeof(struct tsi148_dma_entry), GFP_KERNEL); | 1632 | sizeof(struct tsi148_dma_entry), GFP_KERNEL); |
1657 | if (entry == NULL) { | 1633 | if (entry == NULL) { |
@@ -1788,11 +1764,14 @@ err_mem: | |||
1788 | /* | 1764 | /* |
1789 | * Check to see if the provided DMA channel is busy. | 1765 | * Check to see if the provided DMA channel is busy. |
1790 | */ | 1766 | */ |
1791 | static int tsi148_dma_busy(int channel) | 1767 | static int tsi148_dma_busy(struct vme_bridge *tsi148_bridge, int channel) |
1792 | { | 1768 | { |
1793 | u32 tmp; | 1769 | u32 tmp; |
1770 | struct tsi148_driver *bridge; | ||
1771 | |||
1772 | bridge = tsi148_bridge->driver_priv; | ||
1794 | 1773 | ||
1795 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_DMA[channel] + | 1774 | tmp = ioread32be(bridge->base + TSI148_LCSR_DMA[channel] + |
1796 | TSI148_LCSR_OFFSET_DSTA); | 1775 | TSI148_LCSR_OFFSET_DSTA); |
1797 | 1776 | ||
1798 | if (tmp & TSI148_LCSR_DSTA_BSY) | 1777 | if (tmp & TSI148_LCSR_DSTA_BSY) |
@@ -1815,12 +1794,12 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) | |||
1815 | dma_addr_t bus_addr; | 1794 | dma_addr_t bus_addr; |
1816 | u32 bus_addr_high, bus_addr_low; | 1795 | u32 bus_addr_high, bus_addr_low; |
1817 | u32 val, dctlreg = 0; | 1796 | u32 val, dctlreg = 0; |
1818 | #if 0 | 1797 | struct tsi148_driver *bridge; |
1819 | int x; | ||
1820 | #endif | ||
1821 | 1798 | ||
1822 | ctrlr = list->parent; | 1799 | ctrlr = list->parent; |
1823 | 1800 | ||
1801 | bridge = ctrlr->parent->driver_priv; | ||
1802 | |||
1824 | mutex_lock(&(ctrlr->mtx)); | 1803 | mutex_lock(&(ctrlr->mtx)); |
1825 | 1804 | ||
1826 | channel = ctrlr->number; | 1805 | channel = ctrlr->number; |
@@ -1837,48 +1816,6 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) | |||
1837 | } else { | 1816 | } else { |
1838 | list_add(&(list->list), &(ctrlr->running)); | 1817 | list_add(&(list->list), &(ctrlr->running)); |
1839 | } | 1818 | } |
1840 | #if 0 | ||
1841 | /* XXX Still todo */ | ||
1842 | for (x = 0; x < 8; x++) { /* vme block size */ | ||
1843 | if ((32 << x) >= vmeDma->maxVmeBlockSize) { | ||
1844 | break; | ||
1845 | } | ||
1846 | } | ||
1847 | if (x == 8) | ||
1848 | x = 7; | ||
1849 | dctlreg |= (x << 12); | ||
1850 | |||
1851 | for (x = 0; x < 8; x++) { /* pci block size */ | ||
1852 | if ((32 << x) >= vmeDma->maxPciBlockSize) { | ||
1853 | break; | ||
1854 | } | ||
1855 | } | ||
1856 | if (x == 8) | ||
1857 | x = 7; | ||
1858 | dctlreg |= (x << 4); | ||
1859 | |||
1860 | if (vmeDma->vmeBackOffTimer) { | ||
1861 | for (x = 1; x < 8; x++) { /* vme timer */ | ||
1862 | if ((1 << (x - 1)) >= vmeDma->vmeBackOffTimer) { | ||
1863 | break; | ||
1864 | } | ||
1865 | } | ||
1866 | if (x == 8) | ||
1867 | x = 7; | ||
1868 | dctlreg |= (x << 8); | ||
1869 | } | ||
1870 | |||
1871 | if (vmeDma->pciBackOffTimer) { | ||
1872 | for (x = 1; x < 8; x++) { /* pci timer */ | ||
1873 | if ((1 << (x - 1)) >= vmeDma->pciBackOffTimer) { | ||
1874 | break; | ||
1875 | } | ||
1876 | } | ||
1877 | if (x == 8) | ||
1878 | x = 7; | ||
1879 | dctlreg |= (x << 0); | ||
1880 | } | ||
1881 | #endif | ||
1882 | 1819 | ||
1883 | /* Get first bus address and write into registers */ | 1820 | /* Get first bus address and write into registers */ |
1884 | entry = list_first_entry(&(list->entries), struct tsi148_dma_entry, | 1821 | entry = list_first_entry(&(list->entries), struct tsi148_dma_entry, |
@@ -1890,21 +1827,22 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) | |||
1890 | 1827 | ||
1891 | reg_split(bus_addr, &bus_addr_high, &bus_addr_low); | 1828 | reg_split(bus_addr, &bus_addr_high, &bus_addr_low); |
1892 | 1829 | ||
1893 | iowrite32be(bus_addr_high, tsi148_bridge->base + | 1830 | iowrite32be(bus_addr_high, bridge->base + |
1894 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAU); | 1831 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAU); |
1895 | iowrite32be(bus_addr_low, tsi148_bridge->base + | 1832 | iowrite32be(bus_addr_low, bridge->base + |
1896 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAL); | 1833 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DNLAL); |
1897 | 1834 | ||
1898 | /* Start the operation */ | 1835 | /* Start the operation */ |
1899 | iowrite32be(dctlreg | TSI148_LCSR_DCTL_DGO, tsi148_bridge->base + | 1836 | iowrite32be(dctlreg | TSI148_LCSR_DCTL_DGO, bridge->base + |
1900 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL); | 1837 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL); |
1901 | 1838 | ||
1902 | wait_event_interruptible(dma_queue[channel], tsi148_dma_busy(channel)); | 1839 | wait_event_interruptible(bridge->dma_queue[channel], |
1840 | tsi148_dma_busy(ctrlr->parent, channel)); | ||
1903 | /* | 1841 | /* |
1904 | * Read status register, this register is valid until we kick off a | 1842 | * Read status register, this register is valid until we kick off a |
1905 | * new transfer. | 1843 | * new transfer. |
1906 | */ | 1844 | */ |
1907 | val = ioread32be(tsi148_bridge->base + TSI148_LCSR_DMA[channel] + | 1845 | val = ioread32be(bridge->base + TSI148_LCSR_DMA[channel] + |
1908 | TSI148_LCSR_OFFSET_DSTA); | 1846 | TSI148_LCSR_OFFSET_DSTA); |
1909 | 1847 | ||
1910 | if (val & TSI148_LCSR_DSTA_VBE) { | 1848 | if (val & TSI148_LCSR_DSTA_VBE) { |
@@ -1952,12 +1890,15 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, | |||
1952 | { | 1890 | { |
1953 | u32 lm_base_high, lm_base_low, lm_ctl = 0; | 1891 | u32 lm_base_high, lm_base_low, lm_ctl = 0; |
1954 | int i; | 1892 | int i; |
1893 | struct tsi148_driver *bridge; | ||
1894 | |||
1895 | bridge = lm->parent->driver_priv; | ||
1955 | 1896 | ||
1956 | mutex_lock(&(lm->mtx)); | 1897 | mutex_lock(&(lm->mtx)); |
1957 | 1898 | ||
1958 | /* If we already have a callback attached, we can't move it! */ | 1899 | /* If we already have a callback attached, we can't move it! */ |
1959 | for (i = 0; i < lm->monitors; i++) { | 1900 | for (i = 0; i < lm->monitors; i++) { |
1960 | if(lm_callback[i] != NULL) { | 1901 | if (bridge->lm_callback[i] != NULL) { |
1961 | mutex_unlock(&(lm->mtx)); | 1902 | mutex_unlock(&(lm->mtx)); |
1962 | printk("Location monitor callback attached, can't " | 1903 | printk("Location monitor callback attached, can't " |
1963 | "reset\n"); | 1904 | "reset\n"); |
@@ -1996,9 +1937,9 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, | |||
1996 | 1937 | ||
1997 | reg_split(lm_base, &lm_base_high, &lm_base_low); | 1938 | reg_split(lm_base, &lm_base_high, &lm_base_low); |
1998 | 1939 | ||
1999 | iowrite32be(lm_base_high, tsi148_bridge->base + TSI148_LCSR_LMBAU); | 1940 | iowrite32be(lm_base_high, bridge->base + TSI148_LCSR_LMBAU); |
2000 | iowrite32be(lm_base_low, tsi148_bridge->base + TSI148_LCSR_LMBAL); | 1941 | iowrite32be(lm_base_low, bridge->base + TSI148_LCSR_LMBAL); |
2001 | iowrite32be(lm_ctl, tsi148_bridge->base + TSI148_LCSR_LMAT); | 1942 | iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT); |
2002 | 1943 | ||
2003 | mutex_unlock(&(lm->mtx)); | 1944 | mutex_unlock(&(lm->mtx)); |
2004 | 1945 | ||
@@ -2012,12 +1953,15 @@ int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, | |||
2012 | vme_address_t *aspace, vme_cycle_t *cycle) | 1953 | vme_address_t *aspace, vme_cycle_t *cycle) |
2013 | { | 1954 | { |
2014 | u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; | 1955 | u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; |
1956 | struct tsi148_driver *bridge; | ||
1957 | |||
1958 | bridge = lm->parent->driver_priv; | ||
2015 | 1959 | ||
2016 | mutex_lock(&(lm->mtx)); | 1960 | mutex_lock(&(lm->mtx)); |
2017 | 1961 | ||
2018 | lm_base_high = ioread32be(tsi148_bridge->base + TSI148_LCSR_LMBAU); | 1962 | lm_base_high = ioread32be(bridge->base + TSI148_LCSR_LMBAU); |
2019 | lm_base_low = ioread32be(tsi148_bridge->base + TSI148_LCSR_LMBAL); | 1963 | lm_base_low = ioread32be(bridge->base + TSI148_LCSR_LMBAL); |
2020 | lm_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_LMAT); | 1964 | lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); |
2021 | 1965 | ||
2022 | reg_join(lm_base_high, lm_base_low, lm_base); | 1966 | reg_join(lm_base_high, lm_base_low, lm_base); |
2023 | 1967 | ||
@@ -2060,11 +2004,14 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, | |||
2060 | void (*callback)(int)) | 2004 | void (*callback)(int)) |
2061 | { | 2005 | { |
2062 | u32 lm_ctl, tmp; | 2006 | u32 lm_ctl, tmp; |
2007 | struct tsi148_driver *bridge; | ||
2008 | |||
2009 | bridge = lm->parent->driver_priv; | ||
2063 | 2010 | ||
2064 | mutex_lock(&(lm->mtx)); | 2011 | mutex_lock(&(lm->mtx)); |
2065 | 2012 | ||
2066 | /* Ensure that the location monitor is configured - need PGM or DATA */ | 2013 | /* Ensure that the location monitor is configured - need PGM or DATA */ |
2067 | lm_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_LMAT); | 2014 | lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); |
2068 | if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { | 2015 | if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { |
2069 | mutex_unlock(&(lm->mtx)); | 2016 | mutex_unlock(&(lm->mtx)); |
2070 | printk("Location monitor not properly configured\n"); | 2017 | printk("Location monitor not properly configured\n"); |
@@ -2072,28 +2019,28 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, | |||
2072 | } | 2019 | } |
2073 | 2020 | ||
2074 | /* Check that a callback isn't already attached */ | 2021 | /* Check that a callback isn't already attached */ |
2075 | if (lm_callback[monitor] != NULL) { | 2022 | if (bridge->lm_callback[monitor] != NULL) { |
2076 | mutex_unlock(&(lm->mtx)); | 2023 | mutex_unlock(&(lm->mtx)); |
2077 | printk("Existing callback attached\n"); | 2024 | printk("Existing callback attached\n"); |
2078 | return -EBUSY; | 2025 | return -EBUSY; |
2079 | } | 2026 | } |
2080 | 2027 | ||
2081 | /* Attach callback */ | 2028 | /* Attach callback */ |
2082 | lm_callback[monitor] = callback; | 2029 | bridge->lm_callback[monitor] = callback; |
2083 | 2030 | ||
2084 | /* Enable Location Monitor interrupt */ | 2031 | /* Enable Location Monitor interrupt */ |
2085 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEN); | 2032 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEN); |
2086 | tmp |= TSI148_LCSR_INTEN_LMEN[monitor]; | 2033 | tmp |= TSI148_LCSR_INTEN_LMEN[monitor]; |
2087 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEN); | 2034 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEN); |
2088 | 2035 | ||
2089 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO); | 2036 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEO); |
2090 | tmp |= TSI148_LCSR_INTEO_LMEO[monitor]; | 2037 | tmp |= TSI148_LCSR_INTEO_LMEO[monitor]; |
2091 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEO); | 2038 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO); |
2092 | 2039 | ||
2093 | /* Ensure that global Location Monitor Enable set */ | 2040 | /* Ensure that global Location Monitor Enable set */ |
2094 | if ((lm_ctl & TSI148_LCSR_LMAT_EN) == 0) { | 2041 | if ((lm_ctl & TSI148_LCSR_LMAT_EN) == 0) { |
2095 | lm_ctl |= TSI148_LCSR_LMAT_EN; | 2042 | lm_ctl |= TSI148_LCSR_LMAT_EN; |
2096 | iowrite32be(lm_ctl, tsi148_bridge->base + TSI148_LCSR_LMAT); | 2043 | iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT); |
2097 | } | 2044 | } |
2098 | 2045 | ||
2099 | mutex_unlock(&(lm->mtx)); | 2046 | mutex_unlock(&(lm->mtx)); |
@@ -2107,30 +2054,33 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, | |||
2107 | int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor) | 2054 | int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor) |
2108 | { | 2055 | { |
2109 | u32 lm_en, tmp; | 2056 | u32 lm_en, tmp; |
2057 | struct tsi148_driver *bridge; | ||
2058 | |||
2059 | bridge = lm->parent->driver_priv; | ||
2110 | 2060 | ||
2111 | mutex_lock(&(lm->mtx)); | 2061 | mutex_lock(&(lm->mtx)); |
2112 | 2062 | ||
2113 | /* Disable Location Monitor and ensure previous interrupts are clear */ | 2063 | /* Disable Location Monitor and ensure previous interrupts are clear */ |
2114 | lm_en = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEN); | 2064 | lm_en = ioread32be(bridge->base + TSI148_LCSR_INTEN); |
2115 | lm_en &= ~TSI148_LCSR_INTEN_LMEN[monitor]; | 2065 | lm_en &= ~TSI148_LCSR_INTEN_LMEN[monitor]; |
2116 | iowrite32be(lm_en, tsi148_bridge->base + TSI148_LCSR_INTEN); | 2066 | iowrite32be(lm_en, bridge->base + TSI148_LCSR_INTEN); |
2117 | 2067 | ||
2118 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_INTEO); | 2068 | tmp = ioread32be(bridge->base + TSI148_LCSR_INTEO); |
2119 | tmp &= ~TSI148_LCSR_INTEO_LMEO[monitor]; | 2069 | tmp &= ~TSI148_LCSR_INTEO_LMEO[monitor]; |
2120 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_INTEO); | 2070 | iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO); |
2121 | 2071 | ||
2122 | iowrite32be(TSI148_LCSR_INTC_LMC[monitor], | 2072 | iowrite32be(TSI148_LCSR_INTC_LMC[monitor], |
2123 | tsi148_bridge->base + TSI148_LCSR_INTC); | 2073 | bridge->base + TSI148_LCSR_INTC); |
2124 | 2074 | ||
2125 | /* Detach callback */ | 2075 | /* Detach callback */ |
2126 | lm_callback[monitor] = NULL; | 2076 | bridge->lm_callback[monitor] = NULL; |
2127 | 2077 | ||
2128 | /* If all location monitors disabled, disable global Location Monitor */ | 2078 | /* If all location monitors disabled, disable global Location Monitor */ |
2129 | if ((lm_en & (TSI148_LCSR_INTS_LM0S | TSI148_LCSR_INTS_LM1S | | 2079 | if ((lm_en & (TSI148_LCSR_INTS_LM0S | TSI148_LCSR_INTS_LM1S | |
2130 | TSI148_LCSR_INTS_LM2S | TSI148_LCSR_INTS_LM3S)) == 0) { | 2080 | TSI148_LCSR_INTS_LM2S | TSI148_LCSR_INTS_LM3S)) == 0) { |
2131 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_LMAT); | 2081 | tmp = ioread32be(bridge->base + TSI148_LCSR_LMAT); |
2132 | tmp &= ~TSI148_LCSR_LMAT_EN; | 2082 | tmp &= ~TSI148_LCSR_LMAT_EN; |
2133 | iowrite32be(tmp, tsi148_bridge->base + TSI148_LCSR_LMAT); | 2083 | iowrite32be(tmp, bridge->base + TSI148_LCSR_LMAT); |
2134 | } | 2084 | } |
2135 | 2085 | ||
2136 | mutex_unlock(&(lm->mtx)); | 2086 | mutex_unlock(&(lm->mtx)); |
@@ -2141,12 +2091,19 @@ int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor) | |||
2141 | /* | 2091 | /* |
2142 | * Determine Geographical Addressing | 2092 | * Determine Geographical Addressing |
2143 | */ | 2093 | */ |
2144 | int tsi148_slot_get(void) | 2094 | int tsi148_slot_get(struct vme_bridge *tsi148_bridge) |
2145 | { | 2095 | { |
2146 | u32 slot = 0; | 2096 | u32 slot = 0; |
2097 | struct tsi148_driver *bridge; | ||
2098 | |||
2099 | bridge = tsi148_bridge->driver_priv; | ||
2100 | |||
2101 | if (!geoid) { | ||
2102 | slot = ioread32be(bridge->base + TSI148_LCSR_VSTAT); | ||
2103 | slot = slot & TSI148_LCSR_VSTAT_GA_M; | ||
2104 | } else | ||
2105 | slot = geoid; | ||
2147 | 2106 | ||
2148 | slot = ioread32be(tsi148_bridge->base + TSI148_LCSR_VSTAT); | ||
2149 | slot = slot & TSI148_LCSR_VSTAT_GA_M; | ||
2150 | return (int)slot; | 2107 | return (int)slot; |
2151 | } | 2108 | } |
2152 | 2109 | ||
@@ -2167,45 +2124,50 @@ static int __init tsi148_init(void) | |||
2167 | * boards registers, this means there is a fix length 508kB window which must | 2124 | * boards registers, this means there is a fix length 508kB window which must |
2168 | * be mapped onto PCI memory. | 2125 | * be mapped onto PCI memory. |
2169 | */ | 2126 | */ |
2170 | static int tsi148_crcsr_init(struct pci_dev *pdev) | 2127 | static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, |
2128 | struct pci_dev *pdev) | ||
2171 | { | 2129 | { |
2172 | u32 cbar, crat, vstat; | 2130 | u32 cbar, crat, vstat; |
2173 | u32 crcsr_bus_high, crcsr_bus_low; | 2131 | u32 crcsr_bus_high, crcsr_bus_low; |
2174 | int retval; | 2132 | int retval; |
2133 | struct tsi148_driver *bridge; | ||
2134 | |||
2135 | bridge = tsi148_bridge->driver_priv; | ||
2175 | 2136 | ||
2176 | /* Allocate mem for CR/CSR image */ | 2137 | /* Allocate mem for CR/CSR image */ |
2177 | crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, | 2138 | bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, |
2178 | &crcsr_bus); | 2139 | &(bridge->crcsr_bus)); |
2179 | if (crcsr_kernel == NULL) { | 2140 | if (bridge->crcsr_kernel == NULL) { |
2180 | dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " | 2141 | dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " |
2181 | "image\n"); | 2142 | "image\n"); |
2182 | return -ENOMEM; | 2143 | return -ENOMEM; |
2183 | } | 2144 | } |
2184 | 2145 | ||
2185 | memset(crcsr_kernel, 0, VME_CRCSR_BUF_SIZE); | 2146 | memset(bridge->crcsr_kernel, 0, VME_CRCSR_BUF_SIZE); |
2186 | 2147 | ||
2187 | reg_split(crcsr_bus, &crcsr_bus_high, &crcsr_bus_low); | 2148 | reg_split(bridge->crcsr_bus, &crcsr_bus_high, &crcsr_bus_low); |
2188 | 2149 | ||
2189 | iowrite32be(crcsr_bus_high, tsi148_bridge->base + TSI148_LCSR_CROU); | 2150 | iowrite32be(crcsr_bus_high, bridge->base + TSI148_LCSR_CROU); |
2190 | iowrite32be(crcsr_bus_low, tsi148_bridge->base + TSI148_LCSR_CROL); | 2151 | iowrite32be(crcsr_bus_low, bridge->base + TSI148_LCSR_CROL); |
2191 | 2152 | ||
2192 | /* Ensure that the CR/CSR is configured at the correct offset */ | 2153 | /* Ensure that the CR/CSR is configured at the correct offset */ |
2193 | cbar = ioread32be(tsi148_bridge->base + TSI148_CBAR); | 2154 | cbar = ioread32be(bridge->base + TSI148_CBAR); |
2194 | cbar = (cbar & TSI148_CRCSR_CBAR_M)>>3; | 2155 | cbar = (cbar & TSI148_CRCSR_CBAR_M)>>3; |
2195 | 2156 | ||
2196 | vstat = tsi148_slot_get(); | 2157 | vstat = tsi148_slot_get(tsi148_bridge); |
2197 | 2158 | ||
2198 | if (cbar != vstat) { | 2159 | if (cbar != vstat) { |
2160 | cbar = vstat; | ||
2199 | dev_info(&pdev->dev, "Setting CR/CSR offset\n"); | 2161 | dev_info(&pdev->dev, "Setting CR/CSR offset\n"); |
2200 | iowrite32be(cbar<<3, tsi148_bridge->base + TSI148_CBAR); | 2162 | iowrite32be(cbar<<3, bridge->base + TSI148_CBAR); |
2201 | } | 2163 | } |
2202 | dev_info(&pdev->dev, "CR/CSR Offset: %d\n", cbar); | 2164 | dev_info(&pdev->dev, "CR/CSR Offset: %d\n", cbar); |
2203 | 2165 | ||
2204 | crat = ioread32be(tsi148_bridge->base + TSI148_LCSR_CRAT); | 2166 | crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); |
2205 | if (crat & TSI148_LCSR_CRAT_EN) { | 2167 | if (crat & TSI148_LCSR_CRAT_EN) { |
2206 | dev_info(&pdev->dev, "Enabling CR/CSR space\n"); | 2168 | dev_info(&pdev->dev, "Enabling CR/CSR space\n"); |
2207 | iowrite32be(crat | TSI148_LCSR_CRAT_EN, | 2169 | iowrite32be(crat | TSI148_LCSR_CRAT_EN, |
2208 | tsi148_bridge->base + TSI148_LCSR_CRAT); | 2170 | bridge->base + TSI148_LCSR_CRAT); |
2209 | } else | 2171 | } else |
2210 | dev_info(&pdev->dev, "CR/CSR already enabled\n"); | 2172 | dev_info(&pdev->dev, "CR/CSR already enabled\n"); |
2211 | 2173 | ||
@@ -2214,8 +2176,9 @@ static int tsi148_crcsr_init(struct pci_dev *pdev) | |||
2214 | * through VME writes. | 2176 | * through VME writes. |
2215 | */ | 2177 | */ |
2216 | if(err_chk) { | 2178 | if(err_chk) { |
2217 | retval = tsi148_master_set(flush_image, 1, (vstat * 0x80000), | 2179 | retval = tsi148_master_set(bridge->flush_image, 1, |
2218 | 0x80000, VME_CRCSR, VME_SCT, VME_D16); | 2180 | (vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT, |
2181 | VME_D16); | ||
2219 | if (retval) | 2182 | if (retval) |
2220 | dev_err(&pdev->dev, "Configuring flush image failed\n"); | 2183 | dev_err(&pdev->dev, "Configuring flush image failed\n"); |
2221 | } | 2184 | } |
@@ -2224,20 +2187,25 @@ static int tsi148_crcsr_init(struct pci_dev *pdev) | |||
2224 | 2187 | ||
2225 | } | 2188 | } |
2226 | 2189 | ||
2227 | static void tsi148_crcsr_exit(struct pci_dev *pdev) | 2190 | static void tsi148_crcsr_exit(struct vme_bridge *tsi148_bridge, |
2191 | struct pci_dev *pdev) | ||
2228 | { | 2192 | { |
2229 | u32 crat; | 2193 | u32 crat; |
2194 | struct tsi148_driver *bridge; | ||
2195 | |||
2196 | bridge = tsi148_bridge->driver_priv; | ||
2230 | 2197 | ||
2231 | /* Turn off CR/CSR space */ | 2198 | /* Turn off CR/CSR space */ |
2232 | crat = ioread32be(tsi148_bridge->base + TSI148_LCSR_CRAT); | 2199 | crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); |
2233 | iowrite32be(crat & ~TSI148_LCSR_CRAT_EN, | 2200 | iowrite32be(crat & ~TSI148_LCSR_CRAT_EN, |
2234 | tsi148_bridge->base + TSI148_LCSR_CRAT); | 2201 | bridge->base + TSI148_LCSR_CRAT); |
2235 | 2202 | ||
2236 | /* Free image */ | 2203 | /* Free image */ |
2237 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_CROU); | 2204 | iowrite32be(0, bridge->base + TSI148_LCSR_CROU); |
2238 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_CROL); | 2205 | iowrite32be(0, bridge->base + TSI148_LCSR_CROL); |
2239 | 2206 | ||
2240 | pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, crcsr_kernel, crcsr_bus); | 2207 | pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, bridge->crcsr_kernel, |
2208 | bridge->crcsr_bus); | ||
2241 | } | 2209 | } |
2242 | 2210 | ||
2243 | static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | 2211 | static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
@@ -2245,6 +2213,8 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2245 | int retval, i, master_num; | 2213 | int retval, i, master_num; |
2246 | u32 data; | 2214 | u32 data; |
2247 | struct list_head *pos = NULL; | 2215 | struct list_head *pos = NULL; |
2216 | struct vme_bridge *tsi148_bridge; | ||
2217 | struct tsi148_driver *tsi148_device; | ||
2248 | struct vme_master_resource *master_image; | 2218 | struct vme_master_resource *master_image; |
2249 | struct vme_slave_resource *slave_image; | 2219 | struct vme_slave_resource *slave_image; |
2250 | struct vme_dma_resource *dma_ctrlr; | 2220 | struct vme_dma_resource *dma_ctrlr; |
@@ -2264,6 +2234,18 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2264 | 2234 | ||
2265 | memset(tsi148_bridge, 0, sizeof(struct vme_bridge)); | 2235 | memset(tsi148_bridge, 0, sizeof(struct vme_bridge)); |
2266 | 2236 | ||
2237 | tsi148_device = kmalloc(sizeof(struct tsi148_driver), GFP_KERNEL); | ||
2238 | if (tsi148_device == NULL) { | ||
2239 | dev_err(&pdev->dev, "Failed to allocate memory for device " | ||
2240 | "structure\n"); | ||
2241 | retval = -ENOMEM; | ||
2242 | goto err_driver; | ||
2243 | } | ||
2244 | |||
2245 | memset(tsi148_device, 0, sizeof(struct tsi148_driver)); | ||
2246 | |||
2247 | tsi148_bridge->driver_priv = tsi148_device; | ||
2248 | |||
2267 | /* Enable the device */ | 2249 | /* Enable the device */ |
2268 | retval = pci_enable_device(pdev); | 2250 | retval = pci_enable_device(pdev); |
2269 | if (retval) { | 2251 | if (retval) { |
@@ -2279,15 +2261,16 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2279 | } | 2261 | } |
2280 | 2262 | ||
2281 | /* map registers in BAR 0 */ | 2263 | /* map registers in BAR 0 */ |
2282 | tsi148_bridge->base = ioremap_nocache(pci_resource_start(pdev, 0), 4096); | 2264 | tsi148_device->base = ioremap_nocache(pci_resource_start(pdev, 0), |
2283 | if (!tsi148_bridge->base) { | 2265 | 4096); |
2266 | if (!tsi148_device->base) { | ||
2284 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); | 2267 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
2285 | retval = -EIO; | 2268 | retval = -EIO; |
2286 | goto err_remap; | 2269 | goto err_remap; |
2287 | } | 2270 | } |
2288 | 2271 | ||
2289 | /* Check to see if the mapping worked out */ | 2272 | /* Check to see if the mapping worked out */ |
2290 | data = ioread32(tsi148_bridge->base + TSI148_PCFS_ID) & 0x0000FFFF; | 2273 | data = ioread32(tsi148_device->base + TSI148_PCFS_ID) & 0x0000FFFF; |
2291 | if (data != PCI_VENDOR_ID_TUNDRA) { | 2274 | if (data != PCI_VENDOR_ID_TUNDRA) { |
2292 | dev_err(&pdev->dev, "CRG region check failed\n"); | 2275 | dev_err(&pdev->dev, "CRG region check failed\n"); |
2293 | retval = -EIO; | 2276 | retval = -EIO; |
@@ -2295,12 +2278,11 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2295 | } | 2278 | } |
2296 | 2279 | ||
2297 | /* Initialize wait queues & mutual exclusion flags */ | 2280 | /* Initialize wait queues & mutual exclusion flags */ |
2298 | /* XXX These need to be moved to the vme_bridge structure */ | 2281 | init_waitqueue_head(&(tsi148_device->dma_queue[0])); |
2299 | init_waitqueue_head(&dma_queue[0]); | 2282 | init_waitqueue_head(&(tsi148_device->dma_queue[1])); |
2300 | init_waitqueue_head(&dma_queue[1]); | 2283 | init_waitqueue_head(&(tsi148_device->iack_queue)); |
2301 | init_waitqueue_head(&iack_queue); | 2284 | mutex_init(&(tsi148_device->vme_int)); |
2302 | mutex_init(&(vme_int)); | 2285 | mutex_init(&(tsi148_device->vme_rmw)); |
2303 | mutex_init(&(vme_rmw)); | ||
2304 | 2286 | ||
2305 | tsi148_bridge->parent = &(pdev->dev); | 2287 | tsi148_bridge->parent = &(pdev->dev); |
2306 | strcpy(tsi148_bridge->name, driver_name); | 2288 | strcpy(tsi148_bridge->name, driver_name); |
@@ -2320,29 +2302,29 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2320 | master_num = TSI148_MAX_MASTER; | 2302 | master_num = TSI148_MAX_MASTER; |
2321 | if(err_chk){ | 2303 | if(err_chk){ |
2322 | master_num--; | 2304 | master_num--; |
2323 | /* XXX */ | 2305 | |
2324 | flush_image = (struct vme_master_resource *)kmalloc( | 2306 | tsi148_device->flush_image = (struct vme_master_resource *) |
2325 | sizeof(struct vme_master_resource), GFP_KERNEL); | 2307 | kmalloc(sizeof(struct vme_master_resource), GFP_KERNEL); |
2326 | if (flush_image == NULL) { | 2308 | if (tsi148_device->flush_image == NULL) { |
2327 | dev_err(&pdev->dev, "Failed to allocate memory for " | 2309 | dev_err(&pdev->dev, "Failed to allocate memory for " |
2328 | "flush resource structure\n"); | 2310 | "flush resource structure\n"); |
2329 | retval = -ENOMEM; | 2311 | retval = -ENOMEM; |
2330 | goto err_master; | 2312 | goto err_master; |
2331 | } | 2313 | } |
2332 | flush_image->parent = tsi148_bridge; | 2314 | tsi148_device->flush_image->parent = tsi148_bridge; |
2333 | spin_lock_init(&(flush_image->lock)); | 2315 | spin_lock_init(&(tsi148_device->flush_image->lock)); |
2334 | flush_image->locked = 1; | 2316 | tsi148_device->flush_image->locked = 1; |
2335 | flush_image->number = master_num; | 2317 | tsi148_device->flush_image->number = master_num; |
2336 | flush_image->address_attr = VME_A16 | VME_A24 | VME_A32 | | 2318 | tsi148_device->flush_image->address_attr = VME_A16 | VME_A24 | |
2337 | VME_A64; | 2319 | VME_A32 | VME_A64; |
2338 | flush_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | | 2320 | tsi148_device->flush_image->cycle_attr = VME_SCT | VME_BLT | |
2339 | VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 | | 2321 | VME_MBLT | VME_2eVME | VME_2eSST | VME_2eSSTB | |
2340 | VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER | | 2322 | VME_2eSST160 | VME_2eSST267 | VME_2eSST320 | VME_SUPER | |
2341 | VME_PROG | VME_DATA; | 2323 | VME_USER | VME_PROG | VME_DATA; |
2342 | flush_image->width_attr = VME_D16 | VME_D32; | 2324 | tsi148_device->flush_image->width_attr = VME_D16 | VME_D32; |
2343 | memset(&(flush_image->pci_resource), 0, | 2325 | memset(&(tsi148_device->flush_image->bus_resource), 0, |
2344 | sizeof(struct resource)); | 2326 | sizeof(struct resource)); |
2345 | flush_image->kern_base = NULL; | 2327 | tsi148_device->flush_image->kern_base = NULL; |
2346 | } | 2328 | } |
2347 | 2329 | ||
2348 | /* Add master windows to list */ | 2330 | /* Add master windows to list */ |
@@ -2367,7 +2349,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2367 | VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER | | 2349 | VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER | |
2368 | VME_PROG | VME_DATA; | 2350 | VME_PROG | VME_DATA; |
2369 | master_image->width_attr = VME_D16 | VME_D32; | 2351 | master_image->width_attr = VME_D16 | VME_D32; |
2370 | memset(&(master_image->pci_resource), 0, | 2352 | memset(&(master_image->bus_resource), 0, |
2371 | sizeof(struct resource)); | 2353 | sizeof(struct resource)); |
2372 | master_image->kern_base = NULL; | 2354 | master_image->kern_base = NULL; |
2373 | list_add_tail(&(master_image->list), | 2355 | list_add_tail(&(master_image->list), |
@@ -2415,6 +2397,10 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2415 | mutex_init(&(dma_ctrlr->mtx)); | 2397 | mutex_init(&(dma_ctrlr->mtx)); |
2416 | dma_ctrlr->locked = 0; | 2398 | dma_ctrlr->locked = 0; |
2417 | dma_ctrlr->number = i; | 2399 | dma_ctrlr->number = i; |
2400 | dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM | | ||
2401 | VME_DMA_MEM_TO_VME | VME_DMA_VME_TO_VME | | ||
2402 | VME_DMA_MEM_TO_MEM | VME_DMA_PATTERN_TO_VME | | ||
2403 | VME_DMA_PATTERN_TO_MEM; | ||
2418 | INIT_LIST_HEAD(&(dma_ctrlr->pending)); | 2404 | INIT_LIST_HEAD(&(dma_ctrlr->pending)); |
2419 | INIT_LIST_HEAD(&(dma_ctrlr->running)); | 2405 | INIT_LIST_HEAD(&(dma_ctrlr->running)); |
2420 | list_add_tail(&(dma_ctrlr->list), | 2406 | list_add_tail(&(dma_ctrlr->list), |
@@ -2455,40 +2441,42 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2455 | tsi148_bridge->lm_detach = tsi148_lm_detach; | 2441 | tsi148_bridge->lm_detach = tsi148_lm_detach; |
2456 | tsi148_bridge->slot_get = tsi148_slot_get; | 2442 | tsi148_bridge->slot_get = tsi148_slot_get; |
2457 | 2443 | ||
2458 | data = ioread32be(tsi148_bridge->base + TSI148_LCSR_VSTAT); | 2444 | data = ioread32be(tsi148_device->base + TSI148_LCSR_VSTAT); |
2459 | dev_info(&pdev->dev, "Board is%s the VME system controller\n", | 2445 | dev_info(&pdev->dev, "Board is%s the VME system controller\n", |
2460 | (data & TSI148_LCSR_VSTAT_SCONS)? "" : " not"); | 2446 | (data & TSI148_LCSR_VSTAT_SCONS)? "" : " not"); |
2461 | dev_info(&pdev->dev, "VME geographical address is %d\n", | 2447 | if (!geoid) |
2462 | data & TSI148_LCSR_VSTAT_GA_M); | 2448 | dev_info(&pdev->dev, "VME geographical address is %d\n", |
2449 | data & TSI148_LCSR_VSTAT_GA_M); | ||
2450 | else | ||
2451 | dev_info(&pdev->dev, "VME geographical address is set to %d\n", | ||
2452 | geoid); | ||
2453 | |||
2463 | dev_info(&pdev->dev, "VME Write and flush and error check is %s\n", | 2454 | dev_info(&pdev->dev, "VME Write and flush and error check is %s\n", |
2464 | err_chk ? "enabled" : "disabled"); | 2455 | err_chk ? "enabled" : "disabled"); |
2465 | 2456 | ||
2466 | if(tsi148_crcsr_init(pdev)) { | 2457 | if (tsi148_crcsr_init(tsi148_bridge, pdev)) |
2467 | dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); | 2458 | dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); |
2468 | goto err_crcsr; | 2459 | goto err_crcsr; |
2469 | 2460 | ||
2470 | } | ||
2471 | |||
2472 | /* Need to save tsi148_bridge pointer locally in link list for use in | ||
2473 | * tsi148_remove() | ||
2474 | */ | ||
2475 | retval = vme_register_bridge(tsi148_bridge); | 2461 | retval = vme_register_bridge(tsi148_bridge); |
2476 | if (retval != 0) { | 2462 | if (retval != 0) { |
2477 | dev_err(&pdev->dev, "Chip Registration failed.\n"); | 2463 | dev_err(&pdev->dev, "Chip Registration failed.\n"); |
2478 | goto err_reg; | 2464 | goto err_reg; |
2479 | } | 2465 | } |
2480 | 2466 | ||
2467 | pci_set_drvdata(pdev, tsi148_bridge); | ||
2468 | |||
2481 | /* Clear VME bus "board fail", and "power-up reset" lines */ | 2469 | /* Clear VME bus "board fail", and "power-up reset" lines */ |
2482 | data = ioread32be(tsi148_bridge->base + TSI148_LCSR_VSTAT); | 2470 | data = ioread32be(tsi148_device->base + TSI148_LCSR_VSTAT); |
2483 | data &= ~TSI148_LCSR_VSTAT_BRDFL; | 2471 | data &= ~TSI148_LCSR_VSTAT_BRDFL; |
2484 | data |= TSI148_LCSR_VSTAT_CPURST; | 2472 | data |= TSI148_LCSR_VSTAT_CPURST; |
2485 | iowrite32be(data, tsi148_bridge->base + TSI148_LCSR_VSTAT); | 2473 | iowrite32be(data, tsi148_device->base + TSI148_LCSR_VSTAT); |
2486 | 2474 | ||
2487 | return 0; | 2475 | return 0; |
2488 | 2476 | ||
2489 | vme_unregister_bridge(tsi148_bridge); | 2477 | vme_unregister_bridge(tsi148_bridge); |
2490 | err_reg: | 2478 | err_reg: |
2491 | tsi148_crcsr_exit(pdev); | 2479 | tsi148_crcsr_exit(tsi148_bridge, pdev); |
2492 | err_crcsr: | 2480 | err_crcsr: |
2493 | err_lm: | 2481 | err_lm: |
2494 | /* resources are stored in link list */ | 2482 | /* resources are stored in link list */ |
@@ -2519,15 +2507,17 @@ err_master: | |||
2519 | kfree(master_image); | 2507 | kfree(master_image); |
2520 | } | 2508 | } |
2521 | 2509 | ||
2522 | tsi148_irq_exit(pdev); | 2510 | tsi148_irq_exit(tsi148_device, pdev); |
2523 | err_irq: | 2511 | err_irq: |
2524 | err_test: | 2512 | err_test: |
2525 | iounmap(tsi148_bridge->base); | 2513 | iounmap(tsi148_device->base); |
2526 | err_remap: | 2514 | err_remap: |
2527 | pci_release_regions(pdev); | 2515 | pci_release_regions(pdev); |
2528 | err_resource: | 2516 | err_resource: |
2529 | pci_disable_device(pdev); | 2517 | pci_disable_device(pdev); |
2530 | err_enable: | 2518 | err_enable: |
2519 | kfree(tsi148_device); | ||
2520 | err_driver: | ||
2531 | kfree(tsi148_bridge); | 2521 | kfree(tsi148_bridge); |
2532 | err_struct: | 2522 | err_struct: |
2533 | return retval; | 2523 | return retval; |
@@ -2541,56 +2531,58 @@ static void tsi148_remove(struct pci_dev *pdev) | |||
2541 | struct vme_slave_resource *slave_image; | 2531 | struct vme_slave_resource *slave_image; |
2542 | struct vme_dma_resource *dma_ctrlr; | 2532 | struct vme_dma_resource *dma_ctrlr; |
2543 | int i; | 2533 | int i; |
2534 | struct tsi148_driver *bridge; | ||
2535 | struct vme_bridge *tsi148_bridge = pci_get_drvdata(pdev); | ||
2544 | 2536 | ||
2545 | dev_dbg(&pdev->dev, "Driver is being unloaded.\n"); | 2537 | bridge = tsi148_bridge->driver_priv; |
2546 | 2538 | ||
2547 | /* XXX We need to find the pdev->dev in the list of vme_bridge->dev's */ | 2539 | |
2540 | dev_dbg(&pdev->dev, "Driver is being unloaded.\n"); | ||
2548 | 2541 | ||
2549 | /* | 2542 | /* |
2550 | * Shutdown all inbound and outbound windows. | 2543 | * Shutdown all inbound and outbound windows. |
2551 | */ | 2544 | */ |
2552 | for (i = 0; i < 8; i++) { | 2545 | for (i = 0; i < 8; i++) { |
2553 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_IT[i] + | 2546 | iowrite32be(0, bridge->base + TSI148_LCSR_IT[i] + |
2554 | TSI148_LCSR_OFFSET_ITAT); | 2547 | TSI148_LCSR_OFFSET_ITAT); |
2555 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_OT[i] + | 2548 | iowrite32be(0, bridge->base + TSI148_LCSR_OT[i] + |
2556 | TSI148_LCSR_OFFSET_OTAT); | 2549 | TSI148_LCSR_OFFSET_OTAT); |
2557 | } | 2550 | } |
2558 | 2551 | ||
2559 | /* | 2552 | /* |
2560 | * Shutdown Location monitor. | 2553 | * Shutdown Location monitor. |
2561 | */ | 2554 | */ |
2562 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_LMAT); | 2555 | iowrite32be(0, bridge->base + TSI148_LCSR_LMAT); |
2563 | 2556 | ||
2564 | /* | 2557 | /* |
2565 | * Shutdown CRG map. | 2558 | * Shutdown CRG map. |
2566 | */ | 2559 | */ |
2567 | iowrite32be(0, tsi148_bridge->base + TSI148_LCSR_CSRAT); | 2560 | iowrite32be(0, bridge->base + TSI148_LCSR_CSRAT); |
2568 | 2561 | ||
2569 | /* | 2562 | /* |
2570 | * Clear error status. | 2563 | * Clear error status. |
2571 | */ | 2564 | */ |
2572 | iowrite32be(0xFFFFFFFF, tsi148_bridge->base + TSI148_LCSR_EDPAT); | 2565 | iowrite32be(0xFFFFFFFF, bridge->base + TSI148_LCSR_EDPAT); |
2573 | iowrite32be(0xFFFFFFFF, tsi148_bridge->base + TSI148_LCSR_VEAT); | 2566 | iowrite32be(0xFFFFFFFF, bridge->base + TSI148_LCSR_VEAT); |
2574 | iowrite32be(0x07000700, tsi148_bridge->base + TSI148_LCSR_PSTAT); | 2567 | iowrite32be(0x07000700, bridge->base + TSI148_LCSR_PSTAT); |
2575 | 2568 | ||
2576 | /* | 2569 | /* |
2577 | * Remove VIRQ interrupt (if any) | 2570 | * Remove VIRQ interrupt (if any) |
2578 | */ | 2571 | */ |
2579 | if (ioread32be(tsi148_bridge->base + TSI148_LCSR_VICR) & 0x800) { | 2572 | if (ioread32be(bridge->base + TSI148_LCSR_VICR) & 0x800) |
2580 | iowrite32be(0x8000, tsi148_bridge->base + TSI148_LCSR_VICR); | 2573 | iowrite32be(0x8000, bridge->base + TSI148_LCSR_VICR); |
2581 | } | ||
2582 | 2574 | ||
2583 | /* | 2575 | /* |
2584 | * Map all Interrupts to PCI INTA | 2576 | * Map all Interrupts to PCI INTA |
2585 | */ | 2577 | */ |
2586 | iowrite32be(0x0, tsi148_bridge->base + TSI148_LCSR_INTM1); | 2578 | iowrite32be(0x0, bridge->base + TSI148_LCSR_INTM1); |
2587 | iowrite32be(0x0, tsi148_bridge->base + TSI148_LCSR_INTM2); | 2579 | iowrite32be(0x0, bridge->base + TSI148_LCSR_INTM2); |
2588 | 2580 | ||
2589 | tsi148_irq_exit(pdev); | 2581 | tsi148_irq_exit(bridge, pdev); |
2590 | 2582 | ||
2591 | vme_unregister_bridge(tsi148_bridge); | 2583 | vme_unregister_bridge(tsi148_bridge); |
2592 | 2584 | ||
2593 | tsi148_crcsr_exit(pdev); | 2585 | tsi148_crcsr_exit(tsi148_bridge, pdev); |
2594 | 2586 | ||
2595 | /* resources are stored in link list */ | 2587 | /* resources are stored in link list */ |
2596 | list_for_each(pos, &(tsi148_bridge->dma_resources)) { | 2588 | list_for_each(pos, &(tsi148_bridge->dma_resources)) { |
@@ -2608,19 +2600,22 @@ static void tsi148_remove(struct pci_dev *pdev) | |||
2608 | 2600 | ||
2609 | /* resources are stored in link list */ | 2601 | /* resources are stored in link list */ |
2610 | list_for_each(pos, &(tsi148_bridge->master_resources)) { | 2602 | list_for_each(pos, &(tsi148_bridge->master_resources)) { |
2611 | master_image = list_entry(pos, struct vme_master_resource, list); | 2603 | master_image = list_entry(pos, struct vme_master_resource, |
2604 | list); | ||
2612 | list_del(pos); | 2605 | list_del(pos); |
2613 | kfree(master_image); | 2606 | kfree(master_image); |
2614 | } | 2607 | } |
2615 | 2608 | ||
2616 | tsi148_irq_exit(pdev); | 2609 | tsi148_irq_exit(bridge, pdev); |
2617 | 2610 | ||
2618 | iounmap(tsi148_bridge->base); | 2611 | iounmap(bridge->base); |
2619 | 2612 | ||
2620 | pci_release_regions(pdev); | 2613 | pci_release_regions(pdev); |
2621 | 2614 | ||
2622 | pci_disable_device(pdev); | 2615 | pci_disable_device(pdev); |
2623 | 2616 | ||
2617 | kfree(tsi148_bridge->driver_priv); | ||
2618 | |||
2624 | kfree(tsi148_bridge); | 2619 | kfree(tsi148_bridge); |
2625 | } | 2620 | } |
2626 | 2621 | ||
@@ -2634,250 +2629,11 @@ static void __exit tsi148_exit(void) | |||
2634 | MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); | 2629 | MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); |
2635 | module_param(err_chk, bool, 0); | 2630 | module_param(err_chk, bool, 0); |
2636 | 2631 | ||
2632 | MODULE_PARM_DESC(geoid, "Override geographical addressing"); | ||
2633 | module_param(geoid, int, 0); | ||
2634 | |||
2637 | MODULE_DESCRIPTION("VME driver for the Tundra Tempe VME bridge"); | 2635 | MODULE_DESCRIPTION("VME driver for the Tundra Tempe VME bridge"); |
2638 | MODULE_LICENSE("GPL"); | 2636 | MODULE_LICENSE("GPL"); |
2639 | 2637 | ||
2640 | module_init(tsi148_init); | 2638 | module_init(tsi148_init); |
2641 | module_exit(tsi148_exit); | 2639 | module_exit(tsi148_exit); |
2642 | |||
2643 | /*---------------------------------------------------------------------------- | ||
2644 | * STAGING | ||
2645 | *--------------------------------------------------------------------------*/ | ||
2646 | |||
2647 | #if 0 | ||
2648 | /* | ||
2649 | * Direct Mode DMA transfer | ||
2650 | * | ||
2651 | * XXX Not looking at direct mode for now, we can always use link list mode | ||
2652 | * with a single entry. | ||
2653 | */ | ||
2654 | int tsi148_dma_run(struct vme_dma_resource *resource, struct vme_dma_attr src, | ||
2655 | struct vme_dma_attr dest, size_t count) | ||
2656 | { | ||
2657 | u32 dctlreg = 0; | ||
2658 | unsigned int tmp; | ||
2659 | int val; | ||
2660 | int channel, x; | ||
2661 | struct vmeDmaPacket *cur_dma; | ||
2662 | struct tsi148_dma_descriptor *dmaLL; | ||
2663 | |||
2664 | /* direct mode */ | ||
2665 | dctlreg = 0x800000; | ||
2666 | |||
2667 | for (x = 0; x < 8; x++) { /* vme block size */ | ||
2668 | if ((32 << x) >= vmeDma->maxVmeBlockSize) { | ||
2669 | break; | ||
2670 | } | ||
2671 | } | ||
2672 | if (x == 8) | ||
2673 | x = 7; | ||
2674 | dctlreg |= (x << 12); | ||
2675 | |||
2676 | for (x = 0; x < 8; x++) { /* pci block size */ | ||
2677 | if ((32 << x) >= vmeDma->maxPciBlockSize) { | ||
2678 | break; | ||
2679 | } | ||
2680 | } | ||
2681 | if (x == 8) | ||
2682 | x = 7; | ||
2683 | dctlreg |= (x << 4); | ||
2684 | |||
2685 | if (vmeDma->vmeBackOffTimer) { | ||
2686 | for (x = 1; x < 8; x++) { /* vme timer */ | ||
2687 | if ((1 << (x - 1)) >= vmeDma->vmeBackOffTimer) { | ||
2688 | break; | ||
2689 | } | ||
2690 | } | ||
2691 | if (x == 8) | ||
2692 | x = 7; | ||
2693 | dctlreg |= (x << 8); | ||
2694 | } | ||
2695 | |||
2696 | if (vmeDma->pciBackOffTimer) { | ||
2697 | for (x = 1; x < 8; x++) { /* pci timer */ | ||
2698 | if ((1 << (x - 1)) >= vmeDma->pciBackOffTimer) { | ||
2699 | break; | ||
2700 | } | ||
2701 | } | ||
2702 | if (x == 8) | ||
2703 | x = 7; | ||
2704 | dctlreg |= (x << 0); | ||
2705 | } | ||
2706 | |||
2707 | /* Program registers for DMA transfer */ | ||
2708 | iowrite32be(dmaLL->dsau, tsi148_bridge->base + | ||
2709 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DSAU); | ||
2710 | iowrite32be(dmaLL->dsal, tsi148_bridge->base + | ||
2711 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DSAL); | ||
2712 | iowrite32be(dmaLL->ddau, tsi148_bridge->base + | ||
2713 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DDAU); | ||
2714 | iowrite32be(dmaLL->ddal, tsi148_bridge->base + | ||
2715 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DDAL); | ||
2716 | iowrite32be(dmaLL->dsat, tsi148_bridge->base + | ||
2717 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DSAT); | ||
2718 | iowrite32be(dmaLL->ddat, tsi148_bridge->base + | ||
2719 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DDAT); | ||
2720 | iowrite32be(dmaLL->dcnt, tsi148_bridge->base + | ||
2721 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCNT); | ||
2722 | iowrite32be(dmaLL->ddbs, tsi148_bridge->base + | ||
2723 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DDBS); | ||
2724 | |||
2725 | /* Start the operation */ | ||
2726 | iowrite32be(dctlreg | 0x2000000, tsi148_bridge->base + | ||
2727 | TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL); | ||
2728 | |||
2729 | tmp = ioread32be(tsi148_bridge->base + TSI148_LCSR_DMA[channel] + | ||
2730 | TSI148_LCSR_OFFSET_DSTA); | ||
2731 | wait_event_interruptible(dma_queue[channel], (tmp & 0x1000000) == 0); | ||
2732 | |||
2733 | /* | ||
2734 | * Read status register, we should probably do this in some error | ||
2735 | * handler rather than here so that we can be sure we haven't kicked off | ||
2736 | * another DMA transfer. | ||
2737 | */ | ||
2738 | val = ioread32be(tsi148_bridge->base + TSI148_LCSR_DMA[channel] + | ||
2739 | TSI148_LCSR_OFFSET_DSTA); | ||
2740 | |||
2741 | vmeDma->vmeDmaStatus = 0; | ||
2742 | if (val & 0x10000000) { | ||
2743 | printk(KERN_ERR | ||
2744 | "DMA Error in DMA_tempe_irqhandler DSTA=%08X\n", | ||
2745 | val); | ||
2746 | vmeDma->vmeDmaStatus = val; | ||
2747 | |||
2748 | } | ||
2749 | return (0); | ||
2750 | } | ||
2751 | #endif | ||
2752 | |||
2753 | #if 0 | ||
2754 | |||
2755 | /* Global VME controller information */ | ||
2756 | struct pci_dev *vme_pci_dev; | ||
2757 | |||
2758 | /* | ||
2759 | * Set the VME bus arbiter with the requested attributes | ||
2760 | */ | ||
2761 | int tempe_set_arbiter(vmeArbiterCfg_t * vmeArb) | ||
2762 | { | ||
2763 | int temp_ctl = 0; | ||
2764 | int gto = 0; | ||
2765 | |||
2766 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_VCTRL); | ||
2767 | temp_ctl &= 0xFFEFFF00; | ||
2768 | |||
2769 | if (vmeArb->globalTimeoutTimer == 0xFFFFFFFF) { | ||
2770 | gto = 8; | ||
2771 | } else if (vmeArb->globalTimeoutTimer > 2048) { | ||
2772 | return (-EINVAL); | ||
2773 | } else if (vmeArb->globalTimeoutTimer == 0) { | ||
2774 | gto = 0; | ||
2775 | } else { | ||
2776 | gto = 1; | ||
2777 | while ((16 * (1 << (gto - 1))) < vmeArb->globalTimeoutTimer) { | ||
2778 | gto += 1; | ||
2779 | } | ||
2780 | } | ||
2781 | temp_ctl |= gto; | ||
2782 | |||
2783 | if (vmeArb->arbiterMode != VME_PRIORITY_MODE) { | ||
2784 | temp_ctl |= 1 << 6; | ||
2785 | } | ||
2786 | |||
2787 | if (vmeArb->arbiterTimeoutFlag) { | ||
2788 | temp_ctl |= 1 << 7; | ||
2789 | } | ||
2790 | |||
2791 | if (vmeArb->noEarlyReleaseFlag) { | ||
2792 | temp_ctl |= 1 << 20; | ||
2793 | } | ||
2794 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_VCTRL); | ||
2795 | |||
2796 | return (0); | ||
2797 | } | ||
2798 | |||
2799 | /* | ||
2800 | * Return the attributes of the VME bus arbiter. | ||
2801 | */ | ||
2802 | int tempe_get_arbiter(vmeArbiterCfg_t * vmeArb) | ||
2803 | { | ||
2804 | int temp_ctl = 0; | ||
2805 | int gto = 0; | ||
2806 | |||
2807 | |||
2808 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_VCTRL); | ||
2809 | |||
2810 | gto = temp_ctl & 0xF; | ||
2811 | if (gto != 0) { | ||
2812 | vmeArb->globalTimeoutTimer = (16 * (1 << (gto - 1))); | ||
2813 | } | ||
2814 | |||
2815 | if (temp_ctl & (1 << 6)) { | ||
2816 | vmeArb->arbiterMode = VME_R_ROBIN_MODE; | ||
2817 | } else { | ||
2818 | vmeArb->arbiterMode = VME_PRIORITY_MODE; | ||
2819 | } | ||
2820 | |||
2821 | if (temp_ctl & (1 << 7)) { | ||
2822 | vmeArb->arbiterTimeoutFlag = 1; | ||
2823 | } | ||
2824 | |||
2825 | if (temp_ctl & (1 << 20)) { | ||
2826 | vmeArb->noEarlyReleaseFlag = 1; | ||
2827 | } | ||
2828 | |||
2829 | return (0); | ||
2830 | } | ||
2831 | |||
2832 | /* | ||
2833 | * Set the VME bus requestor with the requested attributes | ||
2834 | */ | ||
2835 | int tempe_set_requestor(vmeRequesterCfg_t * vmeReq) | ||
2836 | { | ||
2837 | int temp_ctl = 0; | ||
2838 | |||
2839 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_VMCTRL); | ||
2840 | temp_ctl &= 0xFFFF0000; | ||
2841 | |||
2842 | if (vmeReq->releaseMode == 1) { | ||
2843 | temp_ctl |= (1 << 3); | ||
2844 | } | ||
2845 | |||
2846 | if (vmeReq->fairMode == 1) { | ||
2847 | temp_ctl |= (1 << 2); | ||
2848 | } | ||
2849 | |||
2850 | temp_ctl |= (vmeReq->timeonTimeoutTimer & 7) << 8; | ||
2851 | temp_ctl |= (vmeReq->timeoffTimeoutTimer & 7) << 12; | ||
2852 | temp_ctl |= vmeReq->requestLevel; | ||
2853 | |||
2854 | iowrite32be(temp_ctl, tsi148_bridge->base + TSI148_LCSR_VMCTRL); | ||
2855 | return (0); | ||
2856 | } | ||
2857 | |||
2858 | /* | ||
2859 | * Return the attributes of the VME bus requestor | ||
2860 | */ | ||
2861 | int tempe_get_requestor(vmeRequesterCfg_t * vmeReq) | ||
2862 | { | ||
2863 | int temp_ctl = 0; | ||
2864 | |||
2865 | temp_ctl = ioread32be(tsi148_bridge->base + TSI148_LCSR_VMCTRL); | ||
2866 | |||
2867 | if (temp_ctl & 0x18) { | ||
2868 | vmeReq->releaseMode = 1; | ||
2869 | } | ||
2870 | |||
2871 | if (temp_ctl & (1 << 2)) { | ||
2872 | vmeReq->fairMode = 1; | ||
2873 | } | ||
2874 | |||
2875 | vmeReq->requestLevel = temp_ctl & 3; | ||
2876 | vmeReq->timeonTimeoutTimer = (temp_ctl >> 8) & 7; | ||
2877 | vmeReq->timeoffTimeoutTimer = (temp_ctl >> 12) & 7; | ||
2878 | |||
2879 | return (0); | ||
2880 | } | ||
2881 | |||
2882 | |||
2883 | #endif | ||
diff --git a/drivers/staging/vme/bridges/vme_tsi148.h b/drivers/staging/vme/bridges/vme_tsi148.h index 6f0f705ce6be..9e5f7fa1d744 100644 --- a/drivers/staging/vme/bridges/vme_tsi148.h +++ b/drivers/staging/vme/bridges/vme_tsi148.h | |||
@@ -33,6 +33,22 @@ | |||
33 | #define TSI148_MAX_MAILBOX 4 /* Max Mail Box registers */ | 33 | #define TSI148_MAX_MAILBOX 4 /* Max Mail Box registers */ |
34 | #define TSI148_MAX_SEMAPHORE 8 /* Max Semaphores */ | 34 | #define TSI148_MAX_SEMAPHORE 8 /* Max Semaphores */ |
35 | 35 | ||
36 | /* Structure used to hold driver specific information */ | ||
37 | struct tsi148_driver { | ||
38 | void *base; /* Base Address of device registers */ | ||
39 | wait_queue_head_t dma_queue[2]; | ||
40 | wait_queue_head_t iack_queue; | ||
41 | void (*lm_callback[4])(int); /* Called in interrupt handler */ | ||
42 | void *crcsr_kernel; | ||
43 | dma_addr_t crcsr_bus; | ||
44 | struct vme_master_resource *flush_image; | ||
45 | struct mutex vme_rmw; /* Only one RMW cycle at a time */ | ||
46 | struct mutex vme_int; /* | ||
47 | * Only one VME interrupt can be | ||
48 | * generated at a time, provide locking | ||
49 | */ | ||
50 | }; | ||
51 | |||
36 | /* | 52 | /* |
37 | * Layout of a DMAC Linked-List Descriptor | 53 | * Layout of a DMAC Linked-List Descriptor |
38 | * | 54 | * |
diff --git a/drivers/staging/vme/devices/vme_user.c b/drivers/staging/vme/devices/vme_user.c index e228942ee081..c60c80fb241d 100644 --- a/drivers/staging/vme/devices/vme_user.c +++ b/drivers/staging/vme/devices/vme_user.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * VMEbus User access driver | 2 | * VMEbus User access driver |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 5 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
6 | * | 6 | * |
7 | * Based on work by: | 7 | * Based on work by: |
8 | * Tom Armistead and Ajit Prem | 8 | * Tom Armistead and Ajit Prem |
@@ -400,8 +400,39 @@ static ssize_t vme_user_write(struct file *file, const char *buf, size_t count, | |||
400 | 400 | ||
401 | static loff_t vme_user_llseek(struct file *file, loff_t off, int whence) | 401 | static loff_t vme_user_llseek(struct file *file, loff_t off, int whence) |
402 | { | 402 | { |
403 | printk(KERN_ERR "Llseek currently incomplete\n"); | 403 | loff_t absolute = -1; |
404 | return -EINVAL; | 404 | unsigned int minor = MINOR(file->f_dentry->d_inode->i_rdev); |
405 | size_t image_size; | ||
406 | |||
407 | down(&image[minor].sem); | ||
408 | image_size = vme_get_size(image[minor].resource); | ||
409 | |||
410 | switch (whence) { | ||
411 | case SEEK_SET: | ||
412 | absolute = off; | ||
413 | break; | ||
414 | case SEEK_CUR: | ||
415 | absolute = file->f_pos + off; | ||
416 | break; | ||
417 | case SEEK_END: | ||
418 | absolute = image_size + off; | ||
419 | break; | ||
420 | default: | ||
421 | up(&image[minor].sem); | ||
422 | return -EINVAL; | ||
423 | break; | ||
424 | } | ||
425 | |||
426 | if ((absolute < 0) || (absolute >= image_size)) { | ||
427 | up(&image[minor].sem); | ||
428 | return -EINVAL; | ||
429 | } | ||
430 | |||
431 | file->f_pos = absolute; | ||
432 | |||
433 | up(&image[minor].sem); | ||
434 | |||
435 | return absolute; | ||
405 | } | 436 | } |
406 | 437 | ||
407 | /* | 438 | /* |
@@ -574,8 +605,8 @@ static int __init vme_user_init(void) | |||
574 | * in future revisions if that ever becomes necessary. | 605 | * in future revisions if that ever becomes necessary. |
575 | */ | 606 | */ |
576 | if (bus_num > USER_BUS_MAX) { | 607 | if (bus_num > USER_BUS_MAX) { |
577 | printk(KERN_ERR "%s: Driver only able to handle %d PIO2 " | 608 | printk(KERN_ERR "%s: Driver only able to handle %d buses\n", |
578 | "Cards\n", driver_name, USER_BUS_MAX); | 609 | driver_name, USER_BUS_MAX); |
579 | bus_num = USER_BUS_MAX; | 610 | bus_num = USER_BUS_MAX; |
580 | } | 611 | } |
581 | 612 | ||
@@ -670,8 +701,12 @@ static int __init vme_user_probe(struct device *dev, int cur_bus, int cur_slot) | |||
670 | /* Request slave resources and allocate buffers (128kB wide) */ | 701 | /* Request slave resources and allocate buffers (128kB wide) */ |
671 | for (i = SLAVE_MINOR; i < (SLAVE_MAX + 1); i++) { | 702 | for (i = SLAVE_MINOR; i < (SLAVE_MAX + 1); i++) { |
672 | /* XXX Need to properly request attributes */ | 703 | /* XXX Need to properly request attributes */ |
704 | /* For ca91cx42 bridge there are only two slave windows | ||
705 | * supporting A16 addressing, so we request A24 supported | ||
706 | * by all windows. | ||
707 | */ | ||
673 | image[i].resource = vme_slave_request(vme_user_bridge, | 708 | image[i].resource = vme_slave_request(vme_user_bridge, |
674 | VME_A16, VME_SCT); | 709 | VME_A24, VME_SCT); |
675 | if (image[i].resource == NULL) { | 710 | if (image[i].resource == NULL) { |
676 | printk(KERN_WARNING "Unable to allocate slave " | 711 | printk(KERN_WARNING "Unable to allocate slave " |
677 | "resource\n"); | 712 | "resource\n"); |
@@ -703,6 +738,14 @@ static int __init vme_user_probe(struct device *dev, int cur_bus, int cur_slot) | |||
703 | "resource\n"); | 738 | "resource\n"); |
704 | goto err_master; | 739 | goto err_master; |
705 | } | 740 | } |
741 | image[i].size_buf = PCI_BUF_SIZE; | ||
742 | image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL); | ||
743 | if (image[i].kern_buf == NULL) { | ||
744 | printk(KERN_WARNING "Unable to allocate memory for " | ||
745 | "master window buffers\n"); | ||
746 | err = -ENOMEM; | ||
747 | goto err_master_buf; | ||
748 | } | ||
706 | } | 749 | } |
707 | 750 | ||
708 | /* Create sysfs entries - on udev systems this creates the dev files */ | 751 | /* Create sysfs entries - on udev systems this creates the dev files */ |
@@ -756,6 +799,9 @@ err_sysfs: | |||
756 | 799 | ||
757 | /* Ensure counter set correcty to unalloc all master windows */ | 800 | /* Ensure counter set correcty to unalloc all master windows */ |
758 | i = MASTER_MAX + 1; | 801 | i = MASTER_MAX + 1; |
802 | err_master_buf: | ||
803 | for (i = MASTER_MINOR; i < (MASTER_MAX + 1); i++) | ||
804 | kfree(image[i].kern_buf); | ||
759 | err_master: | 805 | err_master: |
760 | while (i > MASTER_MINOR) { | 806 | while (i > MASTER_MINOR) { |
761 | i--; | 807 | i--; |
@@ -791,6 +837,9 @@ static int __exit vme_user_remove(struct device *dev, int cur_bus, int cur_slot) | |||
791 | } | 837 | } |
792 | class_destroy(vme_user_sysfs_class); | 838 | class_destroy(vme_user_sysfs_class); |
793 | 839 | ||
840 | for (i = MASTER_MINOR; i < (MASTER_MAX + 1); i++) | ||
841 | kfree(image[i].kern_buf); | ||
842 | |||
794 | for (i = SLAVE_MINOR; i < (SLAVE_MAX + 1); i++) { | 843 | for (i = SLAVE_MINOR; i < (SLAVE_MAX + 1); i++) { |
795 | vme_slave_set(image[i].resource, 0, 0, 0, 0, VME_A32, 0); | 844 | vme_slave_set(image[i].resource, 0, 0, 0, 0, VME_A32, 0); |
796 | vme_slave_free(image[i].resource); | 845 | vme_slave_free(image[i].resource); |
@@ -818,7 +867,7 @@ MODULE_PARM_DESC(bus, "Enumeration of VMEbus to which the driver is connected"); | |||
818 | module_param_array(bus, int, &bus_num, 0); | 867 | module_param_array(bus, int, &bus_num, 0); |
819 | 868 | ||
820 | MODULE_DESCRIPTION("VME User Space Access Driver"); | 869 | MODULE_DESCRIPTION("VME User Space Access Driver"); |
821 | MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com"); | 870 | MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com"); |
822 | MODULE_LICENSE("GPL"); | 871 | MODULE_LICENSE("GPL"); |
823 | 872 | ||
824 | module_init(vme_user_init); | 873 | module_init(vme_user_init); |
diff --git a/drivers/staging/vme/vme.c b/drivers/staging/vme/vme.c index 994fdb9b2127..d6d84ebeeec0 100644 --- a/drivers/staging/vme/vme.c +++ b/drivers/staging/vme/vme.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * VME Bridge Framework | 2 | * VME Bridge Framework |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 5 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
6 | * | 6 | * |
7 | * Based on work by Tom Armistead and Ajit Prem | 7 | * Based on work by Tom Armistead and Ajit Prem |
8 | * Copyright 2004 Motorola Inc. | 8 | * Copyright 2004 Motorola Inc. |
@@ -37,8 +37,8 @@ | |||
37 | static unsigned int vme_bus_numbers; | 37 | static unsigned int vme_bus_numbers; |
38 | DEFINE_MUTEX(vme_bus_num_mtx); | 38 | DEFINE_MUTEX(vme_bus_num_mtx); |
39 | 39 | ||
40 | static void __exit vme_exit (void); | 40 | static void __exit vme_exit(void); |
41 | static int __init vme_init (void); | 41 | static int __init vme_init(void); |
42 | 42 | ||
43 | 43 | ||
44 | /* | 44 | /* |
@@ -86,26 +86,26 @@ static struct vme_bridge *find_bridge(struct vme_resource *resource) | |||
86 | * XXX VME bridges could be available on buses other than PCI. At the momment | 86 | * XXX VME bridges could be available on buses other than PCI. At the momment |
87 | * this framework only supports PCI devices. | 87 | * this framework only supports PCI devices. |
88 | */ | 88 | */ |
89 | void * vme_alloc_consistent(struct vme_resource *resource, size_t size, | 89 | void *vme_alloc_consistent(struct vme_resource *resource, size_t size, |
90 | dma_addr_t *dma) | 90 | dma_addr_t *dma) |
91 | { | 91 | { |
92 | struct vme_bridge *bridge; | 92 | struct vme_bridge *bridge; |
93 | struct pci_dev *pdev; | 93 | struct pci_dev *pdev; |
94 | 94 | ||
95 | if(resource == NULL) { | 95 | if (resource == NULL) { |
96 | printk("No resource\n"); | 96 | printk(KERN_ERR "No resource\n"); |
97 | return NULL; | 97 | return NULL; |
98 | } | 98 | } |
99 | 99 | ||
100 | bridge = find_bridge(resource); | 100 | bridge = find_bridge(resource); |
101 | if(bridge == NULL) { | 101 | if (bridge == NULL) { |
102 | printk("Can't find bridge\n"); | 102 | printk(KERN_ERR "Can't find bridge\n"); |
103 | return NULL; | 103 | return NULL; |
104 | } | 104 | } |
105 | 105 | ||
106 | /* Find pci_dev container of dev */ | 106 | /* Find pci_dev container of dev */ |
107 | if (bridge->parent == NULL) { | 107 | if (bridge->parent == NULL) { |
108 | printk("Dev entry NULL\n"); | 108 | printk(KERN_ERR "Dev entry NULL\n"); |
109 | return NULL; | 109 | return NULL; |
110 | } | 110 | } |
111 | pdev = container_of(bridge->parent, struct pci_dev, dev); | 111 | pdev = container_of(bridge->parent, struct pci_dev, dev); |
@@ -126,14 +126,14 @@ void vme_free_consistent(struct vme_resource *resource, size_t size, | |||
126 | struct vme_bridge *bridge; | 126 | struct vme_bridge *bridge; |
127 | struct pci_dev *pdev; | 127 | struct pci_dev *pdev; |
128 | 128 | ||
129 | if(resource == NULL) { | 129 | if (resource == NULL) { |
130 | printk("No resource\n"); | 130 | printk(KERN_ERR "No resource\n"); |
131 | return; | 131 | return; |
132 | } | 132 | } |
133 | 133 | ||
134 | bridge = find_bridge(resource); | 134 | bridge = find_bridge(resource); |
135 | if(bridge == NULL) { | 135 | if (bridge == NULL) { |
136 | printk("Can't find bridge\n"); | 136 | printk(KERN_ERR "Can't find bridge\n"); |
137 | return; | 137 | return; |
138 | } | 138 | } |
139 | 139 | ||
@@ -216,7 +216,7 @@ static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, | |||
216 | /* User Defined */ | 216 | /* User Defined */ |
217 | break; | 217 | break; |
218 | default: | 218 | default: |
219 | printk("Invalid address space\n"); | 219 | printk(KERN_ERR "Invalid address space\n"); |
220 | retval = -EINVAL; | 220 | retval = -EINVAL; |
221 | break; | 221 | break; |
222 | } | 222 | } |
@@ -228,7 +228,7 @@ static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, | |||
228 | * Request a slave image with specific attributes, return some unique | 228 | * Request a slave image with specific attributes, return some unique |
229 | * identifier. | 229 | * identifier. |
230 | */ | 230 | */ |
231 | struct vme_resource * vme_slave_request(struct device *dev, | 231 | struct vme_resource *vme_slave_request(struct device *dev, |
232 | vme_address_t address, vme_cycle_t cycle) | 232 | vme_address_t address, vme_cycle_t cycle) |
233 | { | 233 | { |
234 | struct vme_bridge *bridge; | 234 | struct vme_bridge *bridge; |
@@ -249,13 +249,13 @@ struct vme_resource * vme_slave_request(struct device *dev, | |||
249 | struct vme_slave_resource, list); | 249 | struct vme_slave_resource, list); |
250 | 250 | ||
251 | if (slave_image == NULL) { | 251 | if (slave_image == NULL) { |
252 | printk("Registered NULL Slave resource\n"); | 252 | printk(KERN_ERR "Registered NULL Slave resource\n"); |
253 | continue; | 253 | continue; |
254 | } | 254 | } |
255 | 255 | ||
256 | /* Find an unlocked and compatible image */ | 256 | /* Find an unlocked and compatible image */ |
257 | mutex_lock(&(slave_image->mtx)); | 257 | mutex_lock(&(slave_image->mtx)); |
258 | if(((slave_image->address_attr & address) == address) && | 258 | if (((slave_image->address_attr & address) == address) && |
259 | ((slave_image->cycle_attr & cycle) == cycle) && | 259 | ((slave_image->cycle_attr & cycle) == cycle) && |
260 | (slave_image->locked == 0)) { | 260 | (slave_image->locked == 0)) { |
261 | 261 | ||
@@ -292,7 +292,7 @@ err_bus: | |||
292 | } | 292 | } |
293 | EXPORT_SYMBOL(vme_slave_request); | 293 | EXPORT_SYMBOL(vme_slave_request); |
294 | 294 | ||
295 | int vme_slave_set (struct vme_resource *resource, int enabled, | 295 | int vme_slave_set(struct vme_resource *resource, int enabled, |
296 | unsigned long long vme_base, unsigned long long size, | 296 | unsigned long long vme_base, unsigned long long size, |
297 | dma_addr_t buf_base, vme_address_t aspace, vme_cycle_t cycle) | 297 | dma_addr_t buf_base, vme_address_t aspace, vme_cycle_t cycle) |
298 | { | 298 | { |
@@ -301,25 +301,25 @@ int vme_slave_set (struct vme_resource *resource, int enabled, | |||
301 | int retval; | 301 | int retval; |
302 | 302 | ||
303 | if (resource->type != VME_SLAVE) { | 303 | if (resource->type != VME_SLAVE) { |
304 | printk("Not a slave resource\n"); | 304 | printk(KERN_ERR "Not a slave resource\n"); |
305 | return -EINVAL; | 305 | return -EINVAL; |
306 | } | 306 | } |
307 | 307 | ||
308 | image = list_entry(resource->entry, struct vme_slave_resource, list); | 308 | image = list_entry(resource->entry, struct vme_slave_resource, list); |
309 | 309 | ||
310 | if (bridge->slave_set == NULL) { | 310 | if (bridge->slave_set == NULL) { |
311 | printk("Function not supported\n"); | 311 | printk(KERN_ERR "Function not supported\n"); |
312 | return -ENOSYS; | 312 | return -ENOSYS; |
313 | } | 313 | } |
314 | 314 | ||
315 | if(!(((image->address_attr & aspace) == aspace) && | 315 | if (!(((image->address_attr & aspace) == aspace) && |
316 | ((image->cycle_attr & cycle) == cycle))) { | 316 | ((image->cycle_attr & cycle) == cycle))) { |
317 | printk("Invalid attributes\n"); | 317 | printk(KERN_ERR "Invalid attributes\n"); |
318 | return -EINVAL; | 318 | return -EINVAL; |
319 | } | 319 | } |
320 | 320 | ||
321 | retval = vme_check_window(aspace, vme_base, size); | 321 | retval = vme_check_window(aspace, vme_base, size); |
322 | if(retval) | 322 | if (retval) |
323 | return retval; | 323 | return retval; |
324 | 324 | ||
325 | return bridge->slave_set(image, enabled, vme_base, size, buf_base, | 325 | return bridge->slave_set(image, enabled, vme_base, size, buf_base, |
@@ -327,7 +327,7 @@ int vme_slave_set (struct vme_resource *resource, int enabled, | |||
327 | } | 327 | } |
328 | EXPORT_SYMBOL(vme_slave_set); | 328 | EXPORT_SYMBOL(vme_slave_set); |
329 | 329 | ||
330 | int vme_slave_get (struct vme_resource *resource, int *enabled, | 330 | int vme_slave_get(struct vme_resource *resource, int *enabled, |
331 | unsigned long long *vme_base, unsigned long long *size, | 331 | unsigned long long *vme_base, unsigned long long *size, |
332 | dma_addr_t *buf_base, vme_address_t *aspace, vme_cycle_t *cycle) | 332 | dma_addr_t *buf_base, vme_address_t *aspace, vme_cycle_t *cycle) |
333 | { | 333 | { |
@@ -335,14 +335,14 @@ int vme_slave_get (struct vme_resource *resource, int *enabled, | |||
335 | struct vme_slave_resource *image; | 335 | struct vme_slave_resource *image; |
336 | 336 | ||
337 | if (resource->type != VME_SLAVE) { | 337 | if (resource->type != VME_SLAVE) { |
338 | printk("Not a slave resource\n"); | 338 | printk(KERN_ERR "Not a slave resource\n"); |
339 | return -EINVAL; | 339 | return -EINVAL; |
340 | } | 340 | } |
341 | 341 | ||
342 | image = list_entry(resource->entry, struct vme_slave_resource, list); | 342 | image = list_entry(resource->entry, struct vme_slave_resource, list); |
343 | 343 | ||
344 | if (bridge->slave_get == NULL) { | 344 | if (bridge->slave_get == NULL) { |
345 | printk("vme_slave_get not supported\n"); | 345 | printk(KERN_ERR "vme_slave_get not supported\n"); |
346 | return -EINVAL; | 346 | return -EINVAL; |
347 | } | 347 | } |
348 | 348 | ||
@@ -356,14 +356,14 @@ void vme_slave_free(struct vme_resource *resource) | |||
356 | struct vme_slave_resource *slave_image; | 356 | struct vme_slave_resource *slave_image; |
357 | 357 | ||
358 | if (resource->type != VME_SLAVE) { | 358 | if (resource->type != VME_SLAVE) { |
359 | printk("Not a slave resource\n"); | 359 | printk(KERN_ERR "Not a slave resource\n"); |
360 | return; | 360 | return; |
361 | } | 361 | } |
362 | 362 | ||
363 | slave_image = list_entry(resource->entry, struct vme_slave_resource, | 363 | slave_image = list_entry(resource->entry, struct vme_slave_resource, |
364 | list); | 364 | list); |
365 | if (slave_image == NULL) { | 365 | if (slave_image == NULL) { |
366 | printk("Can't find slave resource\n"); | 366 | printk(KERN_ERR "Can't find slave resource\n"); |
367 | return; | 367 | return; |
368 | } | 368 | } |
369 | 369 | ||
@@ -384,7 +384,7 @@ EXPORT_SYMBOL(vme_slave_free); | |||
384 | * Request a master image with specific attributes, return some unique | 384 | * Request a master image with specific attributes, return some unique |
385 | * identifier. | 385 | * identifier. |
386 | */ | 386 | */ |
387 | struct vme_resource * vme_master_request(struct device *dev, | 387 | struct vme_resource *vme_master_request(struct device *dev, |
388 | vme_address_t address, vme_cycle_t cycle, vme_width_t dwidth) | 388 | vme_address_t address, vme_cycle_t cycle, vme_width_t dwidth) |
389 | { | 389 | { |
390 | struct vme_bridge *bridge; | 390 | struct vme_bridge *bridge; |
@@ -411,7 +411,7 @@ struct vme_resource * vme_master_request(struct device *dev, | |||
411 | 411 | ||
412 | /* Find an unlocked and compatible image */ | 412 | /* Find an unlocked and compatible image */ |
413 | spin_lock(&(master_image->lock)); | 413 | spin_lock(&(master_image->lock)); |
414 | if(((master_image->address_attr & address) == address) && | 414 | if (((master_image->address_attr & address) == address) && |
415 | ((master_image->cycle_attr & cycle) == cycle) && | 415 | ((master_image->cycle_attr & cycle) == cycle) && |
416 | ((master_image->width_attr & dwidth) == dwidth) && | 416 | ((master_image->width_attr & dwidth) == dwidth) && |
417 | (master_image->locked == 0)) { | 417 | (master_image->locked == 0)) { |
@@ -452,7 +452,7 @@ err_bus: | |||
452 | } | 452 | } |
453 | EXPORT_SYMBOL(vme_master_request); | 453 | EXPORT_SYMBOL(vme_master_request); |
454 | 454 | ||
455 | int vme_master_set (struct vme_resource *resource, int enabled, | 455 | int vme_master_set(struct vme_resource *resource, int enabled, |
456 | unsigned long long vme_base, unsigned long long size, | 456 | unsigned long long vme_base, unsigned long long size, |
457 | vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) | 457 | vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) |
458 | { | 458 | { |
@@ -461,26 +461,26 @@ int vme_master_set (struct vme_resource *resource, int enabled, | |||
461 | int retval; | 461 | int retval; |
462 | 462 | ||
463 | if (resource->type != VME_MASTER) { | 463 | if (resource->type != VME_MASTER) { |
464 | printk("Not a master resource\n"); | 464 | printk(KERN_ERR "Not a master resource\n"); |
465 | return -EINVAL; | 465 | return -EINVAL; |
466 | } | 466 | } |
467 | 467 | ||
468 | image = list_entry(resource->entry, struct vme_master_resource, list); | 468 | image = list_entry(resource->entry, struct vme_master_resource, list); |
469 | 469 | ||
470 | if (bridge->master_set == NULL) { | 470 | if (bridge->master_set == NULL) { |
471 | printk("vme_master_set not supported\n"); | 471 | printk(KERN_WARNING "vme_master_set not supported\n"); |
472 | return -EINVAL; | 472 | return -EINVAL; |
473 | } | 473 | } |
474 | 474 | ||
475 | if(!(((image->address_attr & aspace) == aspace) && | 475 | if (!(((image->address_attr & aspace) == aspace) && |
476 | ((image->cycle_attr & cycle) == cycle) && | 476 | ((image->cycle_attr & cycle) == cycle) && |
477 | ((image->width_attr & dwidth) == dwidth))) { | 477 | ((image->width_attr & dwidth) == dwidth))) { |
478 | printk("Invalid attributes\n"); | 478 | printk(KERN_WARNING "Invalid attributes\n"); |
479 | return -EINVAL; | 479 | return -EINVAL; |
480 | } | 480 | } |
481 | 481 | ||
482 | retval = vme_check_window(aspace, vme_base, size); | 482 | retval = vme_check_window(aspace, vme_base, size); |
483 | if(retval) | 483 | if (retval) |
484 | return retval; | 484 | return retval; |
485 | 485 | ||
486 | return bridge->master_set(image, enabled, vme_base, size, aspace, | 486 | return bridge->master_set(image, enabled, vme_base, size, aspace, |
@@ -488,7 +488,7 @@ int vme_master_set (struct vme_resource *resource, int enabled, | |||
488 | } | 488 | } |
489 | EXPORT_SYMBOL(vme_master_set); | 489 | EXPORT_SYMBOL(vme_master_set); |
490 | 490 | ||
491 | int vme_master_get (struct vme_resource *resource, int *enabled, | 491 | int vme_master_get(struct vme_resource *resource, int *enabled, |
492 | unsigned long long *vme_base, unsigned long long *size, | 492 | unsigned long long *vme_base, unsigned long long *size, |
493 | vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) | 493 | vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) |
494 | { | 494 | { |
@@ -496,14 +496,14 @@ int vme_master_get (struct vme_resource *resource, int *enabled, | |||
496 | struct vme_master_resource *image; | 496 | struct vme_master_resource *image; |
497 | 497 | ||
498 | if (resource->type != VME_MASTER) { | 498 | if (resource->type != VME_MASTER) { |
499 | printk("Not a master resource\n"); | 499 | printk(KERN_ERR "Not a master resource\n"); |
500 | return -EINVAL; | 500 | return -EINVAL; |
501 | } | 501 | } |
502 | 502 | ||
503 | image = list_entry(resource->entry, struct vme_master_resource, list); | 503 | image = list_entry(resource->entry, struct vme_master_resource, list); |
504 | 504 | ||
505 | if (bridge->master_get == NULL) { | 505 | if (bridge->master_get == NULL) { |
506 | printk("vme_master_set not supported\n"); | 506 | printk(KERN_WARNING "vme_master_set not supported\n"); |
507 | return -EINVAL; | 507 | return -EINVAL; |
508 | } | 508 | } |
509 | 509 | ||
@@ -515,7 +515,7 @@ EXPORT_SYMBOL(vme_master_get); | |||
515 | /* | 515 | /* |
516 | * Read data out of VME space into a buffer. | 516 | * Read data out of VME space into a buffer. |
517 | */ | 517 | */ |
518 | ssize_t vme_master_read (struct vme_resource *resource, void *buf, size_t count, | 518 | ssize_t vme_master_read(struct vme_resource *resource, void *buf, size_t count, |
519 | loff_t offset) | 519 | loff_t offset) |
520 | { | 520 | { |
521 | struct vme_bridge *bridge = find_bridge(resource); | 521 | struct vme_bridge *bridge = find_bridge(resource); |
@@ -523,12 +523,12 @@ ssize_t vme_master_read (struct vme_resource *resource, void *buf, size_t count, | |||
523 | size_t length; | 523 | size_t length; |
524 | 524 | ||
525 | if (bridge->master_read == NULL) { | 525 | if (bridge->master_read == NULL) { |
526 | printk("Reading from resource not supported\n"); | 526 | printk(KERN_WARNING "Reading from resource not supported\n"); |
527 | return -EINVAL; | 527 | return -EINVAL; |
528 | } | 528 | } |
529 | 529 | ||
530 | if (resource->type != VME_MASTER) { | 530 | if (resource->type != VME_MASTER) { |
531 | printk("Not a master resource\n"); | 531 | printk(KERN_ERR "Not a master resource\n"); |
532 | return -EINVAL; | 532 | return -EINVAL; |
533 | } | 533 | } |
534 | 534 | ||
@@ -537,7 +537,7 @@ ssize_t vme_master_read (struct vme_resource *resource, void *buf, size_t count, | |||
537 | length = vme_get_size(resource); | 537 | length = vme_get_size(resource); |
538 | 538 | ||
539 | if (offset > length) { | 539 | if (offset > length) { |
540 | printk("Invalid Offset\n"); | 540 | printk(KERN_WARNING "Invalid Offset\n"); |
541 | return -EFAULT; | 541 | return -EFAULT; |
542 | } | 542 | } |
543 | 543 | ||
@@ -552,7 +552,7 @@ EXPORT_SYMBOL(vme_master_read); | |||
552 | /* | 552 | /* |
553 | * Write data out to VME space from a buffer. | 553 | * Write data out to VME space from a buffer. |
554 | */ | 554 | */ |
555 | ssize_t vme_master_write (struct vme_resource *resource, void *buf, | 555 | ssize_t vme_master_write(struct vme_resource *resource, void *buf, |
556 | size_t count, loff_t offset) | 556 | size_t count, loff_t offset) |
557 | { | 557 | { |
558 | struct vme_bridge *bridge = find_bridge(resource); | 558 | struct vme_bridge *bridge = find_bridge(resource); |
@@ -560,12 +560,12 @@ ssize_t vme_master_write (struct vme_resource *resource, void *buf, | |||
560 | size_t length; | 560 | size_t length; |
561 | 561 | ||
562 | if (bridge->master_write == NULL) { | 562 | if (bridge->master_write == NULL) { |
563 | printk("Writing to resource not supported\n"); | 563 | printk(KERN_WARNING "Writing to resource not supported\n"); |
564 | return -EINVAL; | 564 | return -EINVAL; |
565 | } | 565 | } |
566 | 566 | ||
567 | if (resource->type != VME_MASTER) { | 567 | if (resource->type != VME_MASTER) { |
568 | printk("Not a master resource\n"); | 568 | printk(KERN_ERR "Not a master resource\n"); |
569 | return -EINVAL; | 569 | return -EINVAL; |
570 | } | 570 | } |
571 | 571 | ||
@@ -574,7 +574,7 @@ ssize_t vme_master_write (struct vme_resource *resource, void *buf, | |||
574 | length = vme_get_size(resource); | 574 | length = vme_get_size(resource); |
575 | 575 | ||
576 | if (offset > length) { | 576 | if (offset > length) { |
577 | printk("Invalid Offset\n"); | 577 | printk(KERN_WARNING "Invalid Offset\n"); |
578 | return -EFAULT; | 578 | return -EFAULT; |
579 | } | 579 | } |
580 | 580 | ||
@@ -588,19 +588,19 @@ EXPORT_SYMBOL(vme_master_write); | |||
588 | /* | 588 | /* |
589 | * Perform RMW cycle to provided location. | 589 | * Perform RMW cycle to provided location. |
590 | */ | 590 | */ |
591 | unsigned int vme_master_rmw (struct vme_resource *resource, unsigned int mask, | 591 | unsigned int vme_master_rmw(struct vme_resource *resource, unsigned int mask, |
592 | unsigned int compare, unsigned int swap, loff_t offset) | 592 | unsigned int compare, unsigned int swap, loff_t offset) |
593 | { | 593 | { |
594 | struct vme_bridge *bridge = find_bridge(resource); | 594 | struct vme_bridge *bridge = find_bridge(resource); |
595 | struct vme_master_resource *image; | 595 | struct vme_master_resource *image; |
596 | 596 | ||
597 | if (bridge->master_rmw == NULL) { | 597 | if (bridge->master_rmw == NULL) { |
598 | printk("Writing to resource not supported\n"); | 598 | printk(KERN_WARNING "Writing to resource not supported\n"); |
599 | return -EINVAL; | 599 | return -EINVAL; |
600 | } | 600 | } |
601 | 601 | ||
602 | if (resource->type != VME_MASTER) { | 602 | if (resource->type != VME_MASTER) { |
603 | printk("Not a master resource\n"); | 603 | printk(KERN_ERR "Not a master resource\n"); |
604 | return -EINVAL; | 604 | return -EINVAL; |
605 | } | 605 | } |
606 | 606 | ||
@@ -615,14 +615,14 @@ void vme_master_free(struct vme_resource *resource) | |||
615 | struct vme_master_resource *master_image; | 615 | struct vme_master_resource *master_image; |
616 | 616 | ||
617 | if (resource->type != VME_MASTER) { | 617 | if (resource->type != VME_MASTER) { |
618 | printk("Not a master resource\n"); | 618 | printk(KERN_ERR "Not a master resource\n"); |
619 | return; | 619 | return; |
620 | } | 620 | } |
621 | 621 | ||
622 | master_image = list_entry(resource->entry, struct vme_master_resource, | 622 | master_image = list_entry(resource->entry, struct vme_master_resource, |
623 | list); | 623 | list); |
624 | if (master_image == NULL) { | 624 | if (master_image == NULL) { |
625 | printk("Can't find master resource\n"); | 625 | printk(KERN_ERR "Can't find master resource\n"); |
626 | return; | 626 | return; |
627 | } | 627 | } |
628 | 628 | ||
@@ -643,7 +643,7 @@ EXPORT_SYMBOL(vme_master_free); | |||
643 | * Request a DMA controller with specific attributes, return some unique | 643 | * Request a DMA controller with specific attributes, return some unique |
644 | * identifier. | 644 | * identifier. |
645 | */ | 645 | */ |
646 | struct vme_resource *vme_dma_request(struct device *dev) | 646 | struct vme_resource *vme_dma_request(struct device *dev, vme_dma_route_t route) |
647 | { | 647 | { |
648 | struct vme_bridge *bridge; | 648 | struct vme_bridge *bridge; |
649 | struct list_head *dma_pos = NULL; | 649 | struct list_head *dma_pos = NULL; |
@@ -666,13 +666,15 @@ struct vme_resource *vme_dma_request(struct device *dev) | |||
666 | struct vme_dma_resource, list); | 666 | struct vme_dma_resource, list); |
667 | 667 | ||
668 | if (dma_ctrlr == NULL) { | 668 | if (dma_ctrlr == NULL) { |
669 | printk("Registered NULL DMA resource\n"); | 669 | printk(KERN_ERR "Registered NULL DMA resource\n"); |
670 | continue; | 670 | continue; |
671 | } | 671 | } |
672 | 672 | ||
673 | /* Find an unlocked controller */ | 673 | /* Find an unlocked and compatible controller */ |
674 | mutex_lock(&(dma_ctrlr->mtx)); | 674 | mutex_lock(&(dma_ctrlr->mtx)); |
675 | if(dma_ctrlr->locked == 0) { | 675 | if (((dma_ctrlr->route_attr & route) == route) && |
676 | (dma_ctrlr->locked == 0)) { | ||
677 | |||
676 | dma_ctrlr->locked = 1; | 678 | dma_ctrlr->locked = 1; |
677 | mutex_unlock(&(dma_ctrlr->mtx)); | 679 | mutex_unlock(&(dma_ctrlr->mtx)); |
678 | allocated_ctrlr = dma_ctrlr; | 680 | allocated_ctrlr = dma_ctrlr; |
@@ -715,16 +717,15 @@ struct vme_dma_list *vme_new_dma_list(struct vme_resource *resource) | |||
715 | struct vme_dma_list *dma_list; | 717 | struct vme_dma_list *dma_list; |
716 | 718 | ||
717 | if (resource->type != VME_DMA) { | 719 | if (resource->type != VME_DMA) { |
718 | printk("Not a DMA resource\n"); | 720 | printk(KERN_ERR "Not a DMA resource\n"); |
719 | return NULL; | 721 | return NULL; |
720 | } | 722 | } |
721 | 723 | ||
722 | ctrlr = list_entry(resource->entry, struct vme_dma_resource, list); | 724 | ctrlr = list_entry(resource->entry, struct vme_dma_resource, list); |
723 | 725 | ||
724 | dma_list = (struct vme_dma_list *)kmalloc( | 726 | dma_list = kmalloc(sizeof(struct vme_dma_list), GFP_KERNEL); |
725 | sizeof(struct vme_dma_list), GFP_KERNEL); | 727 | if (dma_list == NULL) { |
726 | if(dma_list == NULL) { | 728 | printk(KERN_ERR "Unable to allocate memory for new dma list\n"); |
727 | printk("Unable to allocate memory for new dma list\n"); | ||
728 | return NULL; | 729 | return NULL; |
729 | } | 730 | } |
730 | INIT_LIST_HEAD(&(dma_list->entries)); | 731 | INIT_LIST_HEAD(&(dma_list->entries)); |
@@ -744,17 +745,17 @@ struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, | |||
744 | struct vme_dma_attr *attributes; | 745 | struct vme_dma_attr *attributes; |
745 | struct vme_dma_pattern *pattern_attr; | 746 | struct vme_dma_pattern *pattern_attr; |
746 | 747 | ||
747 | attributes = (struct vme_dma_attr *)kmalloc( | 748 | attributes = kmalloc(sizeof(struct vme_dma_attr), GFP_KERNEL); |
748 | sizeof(struct vme_dma_attr), GFP_KERNEL); | 749 | if (attributes == NULL) { |
749 | if(attributes == NULL) { | 750 | printk(KERN_ERR "Unable to allocate memory for attributes " |
750 | printk("Unable to allocate memory for attributes structure\n"); | 751 | "structure\n"); |
751 | goto err_attr; | 752 | goto err_attr; |
752 | } | 753 | } |
753 | 754 | ||
754 | pattern_attr = (struct vme_dma_pattern *)kmalloc( | 755 | pattern_attr = kmalloc(sizeof(struct vme_dma_pattern), GFP_KERNEL); |
755 | sizeof(struct vme_dma_pattern), GFP_KERNEL); | 756 | if (pattern_attr == NULL) { |
756 | if(pattern_attr == NULL) { | 757 | printk(KERN_ERR "Unable to allocate memory for pattern " |
757 | printk("Unable to allocate memory for pattern attributes\n"); | 758 | "attributes\n"); |
758 | goto err_pat; | 759 | goto err_pat; |
759 | } | 760 | } |
760 | 761 | ||
@@ -784,17 +785,17 @@ struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t address) | |||
784 | 785 | ||
785 | /* XXX Run some sanity checks here */ | 786 | /* XXX Run some sanity checks here */ |
786 | 787 | ||
787 | attributes = (struct vme_dma_attr *)kmalloc( | 788 | attributes = kmalloc(sizeof(struct vme_dma_attr), GFP_KERNEL); |
788 | sizeof(struct vme_dma_attr), GFP_KERNEL); | 789 | if (attributes == NULL) { |
789 | if(attributes == NULL) { | 790 | printk(KERN_ERR "Unable to allocate memory for attributes " |
790 | printk("Unable to allocate memory for attributes structure\n"); | 791 | "structure\n"); |
791 | goto err_attr; | 792 | goto err_attr; |
792 | } | 793 | } |
793 | 794 | ||
794 | pci_attr = (struct vme_dma_pci *)kmalloc(sizeof(struct vme_dma_pci), | 795 | pci_attr = kmalloc(sizeof(struct vme_dma_pci), GFP_KERNEL); |
795 | GFP_KERNEL); | 796 | if (pci_attr == NULL) { |
796 | if(pci_attr == NULL) { | 797 | printk(KERN_ERR "Unable to allocate memory for pci " |
797 | printk("Unable to allocate memory for pci attributes\n"); | 798 | "attributes\n"); |
798 | goto err_pci; | 799 | goto err_pci; |
799 | } | 800 | } |
800 | 801 | ||
@@ -824,19 +825,18 @@ struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address, | |||
824 | struct vme_dma_attr *attributes; | 825 | struct vme_dma_attr *attributes; |
825 | struct vme_dma_vme *vme_attr; | 826 | struct vme_dma_vme *vme_attr; |
826 | 827 | ||
827 | /* XXX Run some sanity checks here */ | 828 | attributes = kmalloc( |
828 | |||
829 | attributes = (struct vme_dma_attr *)kmalloc( | ||
830 | sizeof(struct vme_dma_attr), GFP_KERNEL); | 829 | sizeof(struct vme_dma_attr), GFP_KERNEL); |
831 | if(attributes == NULL) { | 830 | if (attributes == NULL) { |
832 | printk("Unable to allocate memory for attributes structure\n"); | 831 | printk(KERN_ERR "Unable to allocate memory for attributes " |
832 | "structure\n"); | ||
833 | goto err_attr; | 833 | goto err_attr; |
834 | } | 834 | } |
835 | 835 | ||
836 | vme_attr = (struct vme_dma_vme *)kmalloc(sizeof(struct vme_dma_vme), | 836 | vme_attr = kmalloc(sizeof(struct vme_dma_vme), GFP_KERNEL); |
837 | GFP_KERNEL); | 837 | if (vme_attr == NULL) { |
838 | if(vme_attr == NULL) { | 838 | printk(KERN_ERR "Unable to allocate memory for vme " |
839 | printk("Unable to allocate memory for vme attributes\n"); | 839 | "attributes\n"); |
840 | goto err_vme; | 840 | goto err_vme; |
841 | } | 841 | } |
842 | 842 | ||
@@ -875,12 +875,12 @@ int vme_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, | |||
875 | int retval; | 875 | int retval; |
876 | 876 | ||
877 | if (bridge->dma_list_add == NULL) { | 877 | if (bridge->dma_list_add == NULL) { |
878 | printk("Link List DMA generation not supported\n"); | 878 | printk(KERN_WARNING "Link List DMA generation not supported\n"); |
879 | return -EINVAL; | 879 | return -EINVAL; |
880 | } | 880 | } |
881 | 881 | ||
882 | if (!mutex_trylock(&(list->mtx))) { | 882 | if (!mutex_trylock(&(list->mtx))) { |
883 | printk("Link List already submitted\n"); | 883 | printk(KERN_ERR "Link List already submitted\n"); |
884 | return -EINVAL; | 884 | return -EINVAL; |
885 | } | 885 | } |
886 | 886 | ||
@@ -898,7 +898,7 @@ int vme_dma_list_exec(struct vme_dma_list *list) | |||
898 | int retval; | 898 | int retval; |
899 | 899 | ||
900 | if (bridge->dma_list_exec == NULL) { | 900 | if (bridge->dma_list_exec == NULL) { |
901 | printk("Link List DMA execution not supported\n"); | 901 | printk(KERN_ERR "Link List DMA execution not supported\n"); |
902 | return -EINVAL; | 902 | return -EINVAL; |
903 | } | 903 | } |
904 | 904 | ||
@@ -918,12 +918,12 @@ int vme_dma_list_free(struct vme_dma_list *list) | |||
918 | int retval; | 918 | int retval; |
919 | 919 | ||
920 | if (bridge->dma_list_empty == NULL) { | 920 | if (bridge->dma_list_empty == NULL) { |
921 | printk("Emptying of Link Lists not supported\n"); | 921 | printk(KERN_WARNING "Emptying of Link Lists not supported\n"); |
922 | return -EINVAL; | 922 | return -EINVAL; |
923 | } | 923 | } |
924 | 924 | ||
925 | if (!mutex_trylock(&(list->mtx))) { | 925 | if (!mutex_trylock(&(list->mtx))) { |
926 | printk("Link List in use\n"); | 926 | printk(KERN_ERR "Link List in use\n"); |
927 | return -EINVAL; | 927 | return -EINVAL; |
928 | } | 928 | } |
929 | 929 | ||
@@ -933,7 +933,7 @@ int vme_dma_list_free(struct vme_dma_list *list) | |||
933 | */ | 933 | */ |
934 | retval = bridge->dma_list_empty(list); | 934 | retval = bridge->dma_list_empty(list); |
935 | if (retval) { | 935 | if (retval) { |
936 | printk("Unable to empty link-list entries\n"); | 936 | printk(KERN_ERR "Unable to empty link-list entries\n"); |
937 | mutex_unlock(&(list->mtx)); | 937 | mutex_unlock(&(list->mtx)); |
938 | return retval; | 938 | return retval; |
939 | } | 939 | } |
@@ -949,19 +949,19 @@ int vme_dma_free(struct vme_resource *resource) | |||
949 | struct vme_dma_resource *ctrlr; | 949 | struct vme_dma_resource *ctrlr; |
950 | 950 | ||
951 | if (resource->type != VME_DMA) { | 951 | if (resource->type != VME_DMA) { |
952 | printk("Not a DMA resource\n"); | 952 | printk(KERN_ERR "Not a DMA resource\n"); |
953 | return -EINVAL; | 953 | return -EINVAL; |
954 | } | 954 | } |
955 | 955 | ||
956 | ctrlr = list_entry(resource->entry, struct vme_dma_resource, list); | 956 | ctrlr = list_entry(resource->entry, struct vme_dma_resource, list); |
957 | 957 | ||
958 | if (!mutex_trylock(&(ctrlr->mtx))) { | 958 | if (!mutex_trylock(&(ctrlr->mtx))) { |
959 | printk("Resource busy, can't free\n"); | 959 | printk(KERN_ERR "Resource busy, can't free\n"); |
960 | return -EBUSY; | 960 | return -EBUSY; |
961 | } | 961 | } |
962 | 962 | ||
963 | if (!(list_empty(&(ctrlr->pending)) && list_empty(&(ctrlr->running)))) { | 963 | if (!(list_empty(&(ctrlr->pending)) && list_empty(&(ctrlr->running)))) { |
964 | printk("Resource still processing transfers\n"); | 964 | printk(KERN_WARNING "Resource still processing transfers\n"); |
965 | mutex_unlock(&(ctrlr->mtx)); | 965 | mutex_unlock(&(ctrlr->mtx)); |
966 | return -EBUSY; | 966 | return -EBUSY; |
967 | } | 967 | } |
@@ -991,7 +991,7 @@ void vme_irq_handler(struct vme_bridge *bridge, int level, int statid) | |||
991 | EXPORT_SYMBOL(vme_irq_handler); | 991 | EXPORT_SYMBOL(vme_irq_handler); |
992 | 992 | ||
993 | int vme_irq_request(struct device *dev, int level, int statid, | 993 | int vme_irq_request(struct device *dev, int level, int statid, |
994 | void (*callback)(int level, int vector, void *priv_data), | 994 | void (*callback)(int, int, void *), |
995 | void *priv_data) | 995 | void *priv_data) |
996 | { | 996 | { |
997 | struct vme_bridge *bridge; | 997 | struct vme_bridge *bridge; |
@@ -1002,7 +1002,7 @@ int vme_irq_request(struct device *dev, int level, int statid, | |||
1002 | return -EINVAL; | 1002 | return -EINVAL; |
1003 | } | 1003 | } |
1004 | 1004 | ||
1005 | if((level < 1) || (level > 7)) { | 1005 | if ((level < 1) || (level > 7)) { |
1006 | printk(KERN_ERR "Invalid interrupt level\n"); | 1006 | printk(KERN_ERR "Invalid interrupt level\n"); |
1007 | return -EINVAL; | 1007 | return -EINVAL; |
1008 | } | 1008 | } |
@@ -1025,7 +1025,7 @@ int vme_irq_request(struct device *dev, int level, int statid, | |||
1025 | bridge->irq[level - 1].callback[statid].func = callback; | 1025 | bridge->irq[level - 1].callback[statid].func = callback; |
1026 | 1026 | ||
1027 | /* Enable IRQ level */ | 1027 | /* Enable IRQ level */ |
1028 | bridge->irq_set(level, 1, 1); | 1028 | bridge->irq_set(bridge, level, 1, 1); |
1029 | 1029 | ||
1030 | mutex_unlock(&(bridge->irq_mtx)); | 1030 | mutex_unlock(&(bridge->irq_mtx)); |
1031 | 1031 | ||
@@ -1043,7 +1043,7 @@ void vme_irq_free(struct device *dev, int level, int statid) | |||
1043 | return; | 1043 | return; |
1044 | } | 1044 | } |
1045 | 1045 | ||
1046 | if((level < 1) || (level > 7)) { | 1046 | if ((level < 1) || (level > 7)) { |
1047 | printk(KERN_ERR "Invalid interrupt level\n"); | 1047 | printk(KERN_ERR "Invalid interrupt level\n"); |
1048 | return; | 1048 | return; |
1049 | } | 1049 | } |
@@ -1059,7 +1059,7 @@ void vme_irq_free(struct device *dev, int level, int statid) | |||
1059 | 1059 | ||
1060 | /* Disable IRQ level if no more interrupts attached at this level*/ | 1060 | /* Disable IRQ level if no more interrupts attached at this level*/ |
1061 | if (bridge->irq[level - 1].count == 0) | 1061 | if (bridge->irq[level - 1].count == 0) |
1062 | bridge->irq_set(level, 0, 1); | 1062 | bridge->irq_set(bridge, level, 0, 1); |
1063 | 1063 | ||
1064 | bridge->irq[level - 1].callback[statid].func = NULL; | 1064 | bridge->irq[level - 1].callback[statid].func = NULL; |
1065 | bridge->irq[level - 1].callback[statid].priv_data = NULL; | 1065 | bridge->irq[level - 1].callback[statid].priv_data = NULL; |
@@ -1078,17 +1078,17 @@ int vme_irq_generate(struct device *dev, int level, int statid) | |||
1078 | return -EINVAL; | 1078 | return -EINVAL; |
1079 | } | 1079 | } |
1080 | 1080 | ||
1081 | if((level < 1) || (level > 7)) { | 1081 | if ((level < 1) || (level > 7)) { |
1082 | printk(KERN_WARNING "Invalid interrupt level\n"); | 1082 | printk(KERN_WARNING "Invalid interrupt level\n"); |
1083 | return -EINVAL; | 1083 | return -EINVAL; |
1084 | } | 1084 | } |
1085 | 1085 | ||
1086 | if (bridge->irq_generate == NULL) { | 1086 | if (bridge->irq_generate == NULL) { |
1087 | printk("Interrupt generation not supported\n"); | 1087 | printk(KERN_WARNING "Interrupt generation not supported\n"); |
1088 | return -EINVAL; | 1088 | return -EINVAL; |
1089 | } | 1089 | } |
1090 | 1090 | ||
1091 | return bridge->irq_generate(level, statid); | 1091 | return bridge->irq_generate(bridge, level, statid); |
1092 | } | 1092 | } |
1093 | EXPORT_SYMBOL(vme_irq_generate); | 1093 | EXPORT_SYMBOL(vme_irq_generate); |
1094 | 1094 | ||
@@ -1189,8 +1189,6 @@ int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, | |||
1189 | return -EINVAL; | 1189 | return -EINVAL; |
1190 | } | 1190 | } |
1191 | 1191 | ||
1192 | /* XXX Check parameters */ | ||
1193 | |||
1194 | return bridge->lm_set(lm, lm_base, aspace, cycle); | 1192 | return bridge->lm_set(lm, lm_base, aspace, cycle); |
1195 | } | 1193 | } |
1196 | EXPORT_SYMBOL(vme_lm_set); | 1194 | EXPORT_SYMBOL(vme_lm_set); |
@@ -1297,11 +1295,11 @@ int vme_slot_get(struct device *bus) | |||
1297 | } | 1295 | } |
1298 | 1296 | ||
1299 | if (bridge->slot_get == NULL) { | 1297 | if (bridge->slot_get == NULL) { |
1300 | printk("vme_slot_get not supported\n"); | 1298 | printk(KERN_WARNING "vme_slot_get not supported\n"); |
1301 | return -EINVAL; | 1299 | return -EINVAL; |
1302 | } | 1300 | } |
1303 | 1301 | ||
1304 | return bridge->slot_get(); | 1302 | return bridge->slot_get(bridge); |
1305 | } | 1303 | } |
1306 | EXPORT_SYMBOL(vme_slot_get); | 1304 | EXPORT_SYMBOL(vme_slot_get); |
1307 | 1305 | ||
@@ -1331,7 +1329,7 @@ static void vme_free_bus_num(int bus) | |||
1331 | mutex_unlock(&vme_bus_num_mtx); | 1329 | mutex_unlock(&vme_bus_num_mtx); |
1332 | } | 1330 | } |
1333 | 1331 | ||
1334 | int vme_register_bridge (struct vme_bridge *bridge) | 1332 | int vme_register_bridge(struct vme_bridge *bridge) |
1335 | { | 1333 | { |
1336 | struct device *dev; | 1334 | struct device *dev; |
1337 | int retval; | 1335 | int retval; |
@@ -1358,7 +1356,7 @@ int vme_register_bridge (struct vme_bridge *bridge) | |||
1358 | dev_set_name(dev, "vme-%x.%x", bridge->num, i + 1); | 1356 | dev_set_name(dev, "vme-%x.%x", bridge->num, i + 1); |
1359 | 1357 | ||
1360 | retval = device_register(dev); | 1358 | retval = device_register(dev); |
1361 | if(retval) | 1359 | if (retval) |
1362 | goto err_reg; | 1360 | goto err_reg; |
1363 | } | 1361 | } |
1364 | 1362 | ||
@@ -1375,7 +1373,7 @@ err_reg: | |||
1375 | } | 1373 | } |
1376 | EXPORT_SYMBOL(vme_register_bridge); | 1374 | EXPORT_SYMBOL(vme_register_bridge); |
1377 | 1375 | ||
1378 | void vme_unregister_bridge (struct vme_bridge *bridge) | 1376 | void vme_unregister_bridge(struct vme_bridge *bridge) |
1379 | { | 1377 | { |
1380 | int i; | 1378 | int i; |
1381 | struct device *dev; | 1379 | struct device *dev; |
@@ -1392,7 +1390,7 @@ EXPORT_SYMBOL(vme_unregister_bridge); | |||
1392 | 1390 | ||
1393 | /* - Driver Registration --------------------------------------------------- */ | 1391 | /* - Driver Registration --------------------------------------------------- */ |
1394 | 1392 | ||
1395 | int vme_register_driver (struct vme_driver *drv) | 1393 | int vme_register_driver(struct vme_driver *drv) |
1396 | { | 1394 | { |
1397 | drv->driver.name = drv->name; | 1395 | drv->driver.name = drv->name; |
1398 | drv->driver.bus = &vme_bus_type; | 1396 | drv->driver.bus = &vme_bus_type; |
@@ -1401,7 +1399,7 @@ int vme_register_driver (struct vme_driver *drv) | |||
1401 | } | 1399 | } |
1402 | EXPORT_SYMBOL(vme_register_driver); | 1400 | EXPORT_SYMBOL(vme_register_driver); |
1403 | 1401 | ||
1404 | void vme_unregister_driver (struct vme_driver *drv) | 1402 | void vme_unregister_driver(struct vme_driver *drv) |
1405 | { | 1403 | { |
1406 | driver_unregister(&drv->driver); | 1404 | driver_unregister(&drv->driver); |
1407 | } | 1405 | } |
@@ -1418,10 +1416,10 @@ int vme_calc_slot(struct device *dev) | |||
1418 | 1416 | ||
1419 | /* Determine slot number */ | 1417 | /* Determine slot number */ |
1420 | num = 0; | 1418 | num = 0; |
1421 | while(num < VME_SLOTS_MAX) { | 1419 | while (num < VME_SLOTS_MAX) { |
1422 | if(&(bridge->dev[num]) == dev) { | 1420 | if (&(bridge->dev[num]) == dev) |
1423 | break; | 1421 | break; |
1424 | } | 1422 | |
1425 | num++; | 1423 | num++; |
1426 | } | 1424 | } |
1427 | if (num == VME_SLOTS_MAX) { | 1425 | if (num == VME_SLOTS_MAX) { |
@@ -1437,8 +1435,8 @@ err_dev: | |||
1437 | 1435 | ||
1438 | static struct vme_driver *dev_to_vme_driver(struct device *dev) | 1436 | static struct vme_driver *dev_to_vme_driver(struct device *dev) |
1439 | { | 1437 | { |
1440 | if(dev->driver == NULL) | 1438 | if (dev->driver == NULL) |
1441 | printk("Bugger dev->driver is NULL\n"); | 1439 | printk(KERN_ERR "Bugger dev->driver is NULL\n"); |
1442 | 1440 | ||
1443 | return container_of(dev->driver, struct vme_driver, driver); | 1441 | return container_of(dev->driver, struct vme_driver, driver); |
1444 | } | 1442 | } |
@@ -1462,7 +1460,7 @@ static int vme_bus_match(struct device *dev, struct device_driver *drv) | |||
1462 | } | 1460 | } |
1463 | 1461 | ||
1464 | i = 0; | 1462 | i = 0; |
1465 | while((driver->bind_table[i].bus != 0) || | 1463 | while ((driver->bind_table[i].bus != 0) || |
1466 | (driver->bind_table[i].slot != 0)) { | 1464 | (driver->bind_table[i].slot != 0)) { |
1467 | 1465 | ||
1468 | if (bridge->num == driver->bind_table[i].bus) { | 1466 | if (bridge->num == driver->bind_table[i].bus) { |
@@ -1493,9 +1491,8 @@ static int vme_bus_probe(struct device *dev) | |||
1493 | driver = dev_to_vme_driver(dev); | 1491 | driver = dev_to_vme_driver(dev); |
1494 | bridge = dev_to_bridge(dev); | 1492 | bridge = dev_to_bridge(dev); |
1495 | 1493 | ||
1496 | if(driver->probe != NULL) { | 1494 | if (driver->probe != NULL) |
1497 | retval = driver->probe(dev, bridge->num, vme_calc_slot(dev)); | 1495 | retval = driver->probe(dev, bridge->num, vme_calc_slot(dev)); |
1498 | } | ||
1499 | 1496 | ||
1500 | return retval; | 1497 | return retval; |
1501 | } | 1498 | } |
@@ -1509,9 +1506,8 @@ static int vme_bus_remove(struct device *dev) | |||
1509 | driver = dev_to_vme_driver(dev); | 1506 | driver = dev_to_vme_driver(dev); |
1510 | bridge = dev_to_bridge(dev); | 1507 | bridge = dev_to_bridge(dev); |
1511 | 1508 | ||
1512 | if(driver->remove != NULL) { | 1509 | if (driver->remove != NULL) |
1513 | retval = driver->remove(dev, bridge->num, vme_calc_slot(dev)); | 1510 | retval = driver->remove(dev, bridge->num, vme_calc_slot(dev)); |
1514 | } | ||
1515 | 1511 | ||
1516 | return retval; | 1512 | return retval; |
1517 | } | 1513 | } |
@@ -1524,18 +1520,18 @@ struct bus_type vme_bus_type = { | |||
1524 | }; | 1520 | }; |
1525 | EXPORT_SYMBOL(vme_bus_type); | 1521 | EXPORT_SYMBOL(vme_bus_type); |
1526 | 1522 | ||
1527 | static int __init vme_init (void) | 1523 | static int __init vme_init(void) |
1528 | { | 1524 | { |
1529 | return bus_register(&vme_bus_type); | 1525 | return bus_register(&vme_bus_type); |
1530 | } | 1526 | } |
1531 | 1527 | ||
1532 | static void __exit vme_exit (void) | 1528 | static void __exit vme_exit(void) |
1533 | { | 1529 | { |
1534 | bus_unregister(&vme_bus_type); | 1530 | bus_unregister(&vme_bus_type); |
1535 | } | 1531 | } |
1536 | 1532 | ||
1537 | MODULE_DESCRIPTION("VME bridge driver framework"); | 1533 | MODULE_DESCRIPTION("VME bridge driver framework"); |
1538 | MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com"); | 1534 | MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com"); |
1539 | MODULE_LICENSE("GPL"); | 1535 | MODULE_LICENSE("GPL"); |
1540 | 1536 | ||
1541 | module_init(vme_init); | 1537 | module_init(vme_init); |
diff --git a/drivers/staging/vme/vme.h b/drivers/staging/vme/vme.h index 97dc22e34caf..48768ca97e16 100644 --- a/drivers/staging/vme/vme.h +++ b/drivers/staging/vme/vme.h | |||
@@ -68,6 +68,14 @@ typedef u32 vme_pattern_t; | |||
68 | #define VME_DMA_PATTERN_WORD (1<<1) | 68 | #define VME_DMA_PATTERN_WORD (1<<1) |
69 | #define VME_DMA_PATTERN_INCREMENT (1<<2) | 69 | #define VME_DMA_PATTERN_INCREMENT (1<<2) |
70 | 70 | ||
71 | typedef u32 vme_dma_route_t; | ||
72 | #define VME_DMA_VME_TO_MEM (1<<0) | ||
73 | #define VME_DMA_MEM_TO_VME (1<<1) | ||
74 | #define VME_DMA_VME_TO_VME (1<<2) | ||
75 | #define VME_DMA_MEM_TO_MEM (1<<3) | ||
76 | #define VME_DMA_PATTERN_TO_VME (1<<4) | ||
77 | #define VME_DMA_PATTERN_TO_MEM (1<<5) | ||
78 | |||
71 | struct vme_dma_attr { | 79 | struct vme_dma_attr { |
72 | vme_dma_t type; | 80 | vme_dma_t type; |
73 | void *private; | 81 | void *private; |
@@ -98,32 +106,33 @@ struct vme_driver { | |||
98 | struct device_driver driver; | 106 | struct device_driver driver; |
99 | }; | 107 | }; |
100 | 108 | ||
101 | void * vme_alloc_consistent(struct vme_resource *, size_t, dma_addr_t *); | 109 | void *vme_alloc_consistent(struct vme_resource *, size_t, dma_addr_t *); |
102 | void vme_free_consistent(struct vme_resource *, size_t, void *, | 110 | void vme_free_consistent(struct vme_resource *, size_t, void *, |
103 | dma_addr_t); | 111 | dma_addr_t); |
104 | 112 | ||
105 | size_t vme_get_size(struct vme_resource *); | 113 | size_t vme_get_size(struct vme_resource *); |
106 | 114 | ||
107 | struct vme_resource * vme_slave_request(struct device *, vme_address_t, vme_cycle_t); | 115 | struct vme_resource *vme_slave_request(struct device *, vme_address_t, |
108 | int vme_slave_set (struct vme_resource *, int, unsigned long long, | 116 | vme_cycle_t); |
117 | int vme_slave_set(struct vme_resource *, int, unsigned long long, | ||
109 | unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); | 118 | unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); |
110 | int vme_slave_get (struct vme_resource *, int *, unsigned long long *, | 119 | int vme_slave_get(struct vme_resource *, int *, unsigned long long *, |
111 | unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); | 120 | unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); |
112 | void vme_slave_free(struct vme_resource *); | 121 | void vme_slave_free(struct vme_resource *); |
113 | 122 | ||
114 | struct vme_resource * vme_master_request(struct device *, vme_address_t, vme_cycle_t, | 123 | struct vme_resource *vme_master_request(struct device *, vme_address_t, |
115 | vme_width_t); | 124 | vme_cycle_t, vme_width_t); |
116 | int vme_master_set (struct vme_resource *, int, unsigned long long, | 125 | int vme_master_set(struct vme_resource *, int, unsigned long long, |
117 | unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); | 126 | unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); |
118 | int vme_master_get (struct vme_resource *, int *, unsigned long long *, | 127 | int vme_master_get(struct vme_resource *, int *, unsigned long long *, |
119 | unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); | 128 | unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); |
120 | ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); | 129 | ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); |
121 | ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); | 130 | ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); |
122 | unsigned int vme_master_rmw (struct vme_resource *, unsigned int, unsigned int, | 131 | unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int, |
123 | unsigned int, loff_t); | 132 | unsigned int, loff_t); |
124 | void vme_master_free(struct vme_resource *); | 133 | void vme_master_free(struct vme_resource *); |
125 | 134 | ||
126 | struct vme_resource *vme_dma_request(struct device *); | 135 | struct vme_resource *vme_dma_request(struct device *, vme_dma_route_t); |
127 | struct vme_dma_list *vme_new_dma_list(struct vme_resource *); | 136 | struct vme_dma_list *vme_new_dma_list(struct vme_resource *); |
128 | struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); | 137 | struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); |
129 | struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); | 138 | struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); |
@@ -153,8 +162,8 @@ void vme_lm_free(struct vme_resource *); | |||
153 | 162 | ||
154 | int vme_slot_get(struct device *); | 163 | int vme_slot_get(struct device *); |
155 | 164 | ||
156 | int vme_register_driver (struct vme_driver *); | 165 | int vme_register_driver(struct vme_driver *); |
157 | void vme_unregister_driver (struct vme_driver *); | 166 | void vme_unregister_driver(struct vme_driver *); |
158 | 167 | ||
159 | 168 | ||
160 | #endif /* _VME_H_ */ | 169 | #endif /* _VME_H_ */ |
diff --git a/drivers/staging/vme/vme_api.txt b/drivers/staging/vme/vme_api.txt index a5c1b1cd5fcc..a910a0c4388b 100644 --- a/drivers/staging/vme/vme_api.txt +++ b/drivers/staging/vme/vme_api.txt | |||
@@ -77,16 +77,21 @@ driver in question: | |||
77 | struct vme_resource * vme_slave_request(struct device *dev, | 77 | struct vme_resource * vme_slave_request(struct device *dev, |
78 | vme_address_t aspace, vme_cycle_t cycle); | 78 | vme_address_t aspace, vme_cycle_t cycle); |
79 | 79 | ||
80 | struct vme_resource *vme_dma_request(struct device *dev); | 80 | struct vme_resource *vme_dma_request(struct device *dev, |
81 | vme_dma_route_t route); | ||
81 | 82 | ||
82 | For slave windows these attributes are split into those of type 'vme_address_t' | 83 | For slave windows these attributes are split into those of type 'vme_address_t' |
83 | and 'vme_cycle_t'. Master windows add a further set of attributes 'vme_cycle_t'. | 84 | and 'vme_cycle_t'. Master windows add a further set of attributes |
84 | These attributes are defined as bitmasks and as such any combination of the | 85 | 'vme_cycle_t'. These attributes are defined as bitmasks and as such any |
85 | attributes can be requested for a single window, the core will assign a window | 86 | combination of the attributes can be requested for a single window, the core |
86 | that meets the requirements, returning a pointer of type vme_resource that | 87 | will assign a window that meets the requirements, returning a pointer of type |
87 | should be used to identify the allocated resource when it is used. If an | 88 | vme_resource that should be used to identify the allocated resource when it is |
88 | unallocated window fitting the requirements can not be found a NULL pointer will | 89 | used. For DMA controllers, the request function requires the potential |
89 | be returned. | 90 | direction of any transfers to be provided in the route attributes. This is |
91 | typically VME-to-MEM and/or MEM-to-VME, though some hardware can support | ||
92 | VME-to-VME and MEM-to-MEM transfers as well as test pattern generation. If an | ||
93 | unallocated window fitting the requirements can not be found a NULL pointer | ||
94 | will be returned. | ||
90 | 95 | ||
91 | Functions are also provided to free window allocations once they are no longer | 96 | Functions are also provided to free window allocations once they are no longer |
92 | required. These functions should be passed the pointer to the resource provided | 97 | required. These functions should be passed the pointer to the resource provided |
@@ -237,6 +242,12 @@ covered under "Transfer Attributes"): | |||
237 | struct vme_dma_attr *src, struct vme_dma_attr *dest, | 242 | struct vme_dma_attr *src, struct vme_dma_attr *dest, |
238 | size_t count); | 243 | size_t count); |
239 | 244 | ||
245 | NOTE: The detailed attributes of the transfers source and destination | ||
246 | are not checked until an entry is added to a DMA list, the request | ||
247 | for a DMA channel purely checks the directions in which the | ||
248 | controller is expected to transfer data. As a result it is | ||
249 | possible for this call to return an error, for example if the | ||
250 | source or destination is in an unsupported VME address space. | ||
240 | 251 | ||
241 | Transfer Attributes | 252 | Transfer Attributes |
242 | ------------------- | 253 | ------------------- |
diff --git a/drivers/staging/vme/vme_bridge.h b/drivers/staging/vme/vme_bridge.h index 851fa92559f6..b653ec02e1fc 100644 --- a/drivers/staging/vme/vme_bridge.h +++ b/drivers/staging/vme/vme_bridge.h | |||
@@ -19,7 +19,7 @@ struct vme_master_resource { | |||
19 | vme_address_t address_attr; | 19 | vme_address_t address_attr; |
20 | vme_cycle_t cycle_attr; | 20 | vme_cycle_t cycle_attr; |
21 | vme_width_t width_attr; | 21 | vme_width_t width_attr; |
22 | struct resource pci_resource; /* XXX Rename to be bus agnostic */ | 22 | struct resource bus_resource; |
23 | void *kern_base; | 23 | void *kern_base; |
24 | }; | 24 | }; |
25 | 25 | ||
@@ -64,6 +64,7 @@ struct vme_dma_resource { | |||
64 | int number; | 64 | int number; |
65 | struct list_head pending; | 65 | struct list_head pending; |
66 | struct list_head running; | 66 | struct list_head running; |
67 | vme_dma_route_t route_attr; | ||
67 | }; | 68 | }; |
68 | 69 | ||
69 | struct vme_lm_resource { | 70 | struct vme_lm_resource { |
@@ -101,7 +102,7 @@ struct vme_irq { | |||
101 | * Currently we assume that all chips are PCI-based | 102 | * Currently we assume that all chips are PCI-based |
102 | */ | 103 | */ |
103 | struct vme_bridge { | 104 | struct vme_bridge { |
104 | char name[VMENAMSIZ]; | 105 | char name[VMENAMSIZ]; |
105 | int num; | 106 | int num; |
106 | struct list_head master_resources; | 107 | struct list_head master_resources; |
107 | struct list_head slave_resources; | 108 | struct list_head slave_resources; |
@@ -112,7 +113,7 @@ struct vme_bridge { | |||
112 | 113 | ||
113 | /* Bridge Info - XXX Move to private structure? */ | 114 | /* Bridge Info - XXX Move to private structure? */ |
114 | struct device *parent; /* Generic device struct (pdev->dev for PCI) */ | 115 | struct device *parent; /* Generic device struct (pdev->dev for PCI) */ |
115 | void * base; /* Base Address of device registers */ | 116 | void *driver_priv; /* Private pointer for the bridge driver */ |
116 | 117 | ||
117 | struct device dev[VME_SLOTS_MAX]; /* Device registered with | 118 | struct device dev[VME_SLOTS_MAX]; /* Device registered with |
118 | * device model on VME bus | 119 | * device model on VME bus |
@@ -151,8 +152,8 @@ struct vme_bridge { | |||
151 | int (*dma_list_empty) (struct vme_dma_list *); | 152 | int (*dma_list_empty) (struct vme_dma_list *); |
152 | 153 | ||
153 | /* Interrupt Functions */ | 154 | /* Interrupt Functions */ |
154 | void (*irq_set) (int, int, int); | 155 | void (*irq_set) (struct vme_bridge *, int, int, int); |
155 | int (*irq_generate) (int, int); | 156 | int (*irq_generate) (struct vme_bridge *, int, int); |
156 | 157 | ||
157 | /* Location monitor functions */ | 158 | /* Location monitor functions */ |
158 | int (*lm_set) (struct vme_lm_resource *, unsigned long long, | 159 | int (*lm_set) (struct vme_lm_resource *, unsigned long long, |
@@ -163,102 +164,12 @@ struct vme_bridge { | |||
163 | int (*lm_detach) (struct vme_lm_resource *, int); | 164 | int (*lm_detach) (struct vme_lm_resource *, int); |
164 | 165 | ||
165 | /* CR/CSR space functions */ | 166 | /* CR/CSR space functions */ |
166 | int (*slot_get) (void); | 167 | int (*slot_get) (struct vme_bridge *); |
167 | /* Use standard master read and write functions to access CR/CSR */ | ||
168 | |||
169 | #if 0 | ||
170 | int (*set_prefetch) (void); | ||
171 | int (*get_prefetch) (void); | ||
172 | int (*set_arbiter) (void); | ||
173 | int (*get_arbiter) (void); | ||
174 | int (*set_requestor) (void); | ||
175 | int (*get_requestor) (void); | ||
176 | #endif | ||
177 | }; | 168 | }; |
178 | 169 | ||
179 | void vme_irq_handler(struct vme_bridge *, int, int); | 170 | void vme_irq_handler(struct vme_bridge *, int, int); |
180 | 171 | ||
181 | int vme_register_bridge (struct vme_bridge *); | 172 | int vme_register_bridge(struct vme_bridge *); |
182 | void vme_unregister_bridge (struct vme_bridge *); | 173 | void vme_unregister_bridge(struct vme_bridge *); |
183 | 174 | ||
184 | #endif /* _VME_BRIDGE_H_ */ | 175 | #endif /* _VME_BRIDGE_H_ */ |
185 | |||
186 | #if 0 | ||
187 | /* | ||
188 | * VMEbus GET INFO Arg Structure | ||
189 | */ | ||
190 | struct vmeInfoCfg { | ||
191 | int vmeSlotNum; /* VME slot number of interest */ | ||
192 | int boardResponded; /* Board responded */ | ||
193 | char sysConFlag; /* System controller flag */ | ||
194 | int vmeControllerID; /* Vendor/device ID of VME bridge */ | ||
195 | int vmeControllerRev; /* Revision of VME bridge */ | ||
196 | char osName[8]; /* Name of OS e.g. "Linux" */ | ||
197 | int vmeSharedDataValid; /* Validity of data struct */ | ||
198 | int vmeDriverRev; /* Revision of VME driver */ | ||
199 | unsigned int vmeAddrHi[8]; /* Address on VME bus */ | ||
200 | unsigned int vmeAddrLo[8]; /* Address on VME bus */ | ||
201 | unsigned int vmeSize[8]; /* Size on VME bus */ | ||
202 | unsigned int vmeAm[8]; /* Address modifier on VME bus */ | ||
203 | int reserved; /* For future use */ | ||
204 | }; | ||
205 | typedef struct vmeInfoCfg vmeInfoCfg_t; | ||
206 | |||
207 | /* | ||
208 | * VMEbus Requester Arg Structure | ||
209 | */ | ||
210 | struct vmeRequesterCfg { | ||
211 | int requestLevel; /* Requester Bus Request Level */ | ||
212 | char fairMode; /* Requester Fairness Mode Indicator */ | ||
213 | int releaseMode; /* Requester Bus Release Mode */ | ||
214 | int timeonTimeoutTimer; /* Master Time-on Time-out Timer */ | ||
215 | int timeoffTimeoutTimer; /* Master Time-off Time-out Timer */ | ||
216 | int reserved; /* For future use */ | ||
217 | }; | ||
218 | typedef struct vmeRequesterCfg vmeRequesterCfg_t; | ||
219 | |||
220 | /* | ||
221 | * VMEbus Arbiter Arg Structure | ||
222 | */ | ||
223 | struct vmeArbiterCfg { | ||
224 | vme_arbitration_t arbiterMode; /* Arbitration Scheduling Algorithm */ | ||
225 | char arbiterTimeoutFlag; /* Arbiter Time-out Timer Indicator */ | ||
226 | int globalTimeoutTimer; /* VMEbus Global Time-out Timer */ | ||
227 | char noEarlyReleaseFlag; /* No Early Release on BBUSY */ | ||
228 | int reserved; /* For future use */ | ||
229 | }; | ||
230 | typedef struct vmeArbiterCfg vmeArbiterCfg_t; | ||
231 | |||
232 | |||
233 | /* | ||
234 | * VMEbus RMW Configuration Data | ||
235 | */ | ||
236 | struct vmeRmwCfg { | ||
237 | unsigned int targetAddrU; /* VME Address (Upper) to trigger RMW cycle */ | ||
238 | unsigned int targetAddr; /* VME Address (Lower) to trigger RMW cycle */ | ||
239 | vme_address_t addrSpace; /* VME Address Space */ | ||
240 | int enableMask; /* Bit mask defining the bits of interest */ | ||
241 | int compareData; /* Data to be compared with the data read */ | ||
242 | int swapData; /* Data written to the VMEbus on success */ | ||
243 | int maxAttempts; /* Maximum times to try */ | ||
244 | int numAttempts; /* Number of attempts before success */ | ||
245 | int reserved; /* For future use */ | ||
246 | |||
247 | }; | ||
248 | typedef struct vmeRmwCfg vmeRmwCfg_t; | ||
249 | |||
250 | /* | ||
251 | * VMEbus Location Monitor Arg Structure | ||
252 | */ | ||
253 | struct vmeLmCfg { | ||
254 | unsigned int addrU; /* Location Monitor Address upper */ | ||
255 | unsigned int addr; /* Location Monitor Address lower */ | ||
256 | vme_address_t addrSpace; /* Address Space */ | ||
257 | int userAccessType; /* User/Supervisor Access Type */ | ||
258 | int dataAccessType; /* Data/Program Access Type */ | ||
259 | int lmWait; /* Time to wait for access */ | ||
260 | int lmEvents; /* Lm event mask */ | ||
261 | int reserved; /* For future use */ | ||
262 | }; | ||
263 | typedef struct vmeLmCfg vmeLmCfg_t; | ||
264 | #endif | ||
diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index db786142717f..bf4fd49709df 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c | |||
@@ -2788,16 +2788,18 @@ void CARDvUpdateBasicTopRate (PVOID pDeviceHandler) | |||
2788 | 2788 | ||
2789 | //Determines the highest basic rate. | 2789 | //Determines the highest basic rate. |
2790 | for (ii = RATE_54M; ii >= RATE_6M; ii --) { | 2790 | for (ii = RATE_54M; ii >= RATE_6M; ii --) { |
2791 | if ( (pDevice->wBasicRate) & ((WORD)(1<<ii)) ) | 2791 | if ( (pDevice->wBasicRate) & ((WORD)(1<<ii)) ) { |
2792 | byTopOFDM = ii; | 2792 | byTopOFDM = ii; |
2793 | break; | 2793 | break; |
2794 | } | ||
2794 | } | 2795 | } |
2795 | pDevice->byTopOFDMBasicRate = byTopOFDM; | 2796 | pDevice->byTopOFDMBasicRate = byTopOFDM; |
2796 | 2797 | ||
2797 | for (ii = RATE_11M;; ii --) { | 2798 | for (ii = RATE_11M;; ii --) { |
2798 | if ( (pDevice->wBasicRate) & ((WORD)(1<<ii)) ) | 2799 | if ( (pDevice->wBasicRate) & ((WORD)(1<<ii)) ) { |
2799 | byTopCCK = ii; | 2800 | byTopCCK = ii; |
2800 | break; | 2801 | break; |
2802 | } | ||
2801 | if (ii == RATE_1M) | 2803 | if (ii == RATE_1M) |
2802 | break; | 2804 | break; |
2803 | } | 2805 | } |
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index 0dadb765fece..1d643653a7ed 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c | |||
@@ -1105,10 +1105,7 @@ static void device_print_info(PSDevice pDevice) | |||
1105 | struct net_device* dev=pDevice->dev; | 1105 | struct net_device* dev=pDevice->dev; |
1106 | 1106 | ||
1107 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: %s\n",dev->name, get_chip_name(pDevice->chip_id)); | 1107 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: %s\n",dev->name, get_chip_name(pDevice->chip_id)); |
1108 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: MAC=%2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X", | 1108 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: MAC=%pM", dev->name, dev->dev_addr); |
1109 | dev->name, | ||
1110 | dev->dev_addr[0],dev->dev_addr[1],dev->dev_addr[2], | ||
1111 | dev->dev_addr[3],dev->dev_addr[4],dev->dev_addr[5]); | ||
1112 | #ifdef IO_MAP | 1109 | #ifdef IO_MAP |
1113 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO" IO=0x%lx ",(ULONG) pDevice->ioaddr); | 1110 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO" IO=0x%lx ",(ULONG) pDevice->ioaddr); |
1114 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO" IRQ=%d \n", pDevice->dev->irq); | 1111 | DBG_PRT(MSG_LEVEL_INFO, KERN_INFO" IRQ=%d \n", pDevice->dev->irq); |
diff --git a/drivers/staging/vt6655/iwctl.c b/drivers/staging/vt6655/iwctl.c index 108830ff3b32..78b49830a255 100644 --- a/drivers/staging/vt6655/iwctl.c +++ b/drivers/staging/vt6655/iwctl.c | |||
@@ -1472,7 +1472,7 @@ if((wrq->flags & IW_ENCODE_DISABLED)==0){ | |||
1472 | if ( index < 4 ) { | 1472 | if ( index < 4 ) { |
1473 | pDevice->byKeyIndex = index; | 1473 | pDevice->byKeyIndex = index; |
1474 | } | 1474 | } |
1475 | else if(!wrq->flags & IW_ENCODE_MODE) { | 1475 | else if(!(wrq->flags & IW_ENCODE_MODE)) { |
1476 | rc = -EINVAL; | 1476 | rc = -EINVAL; |
1477 | return rc; | 1477 | return rc; |
1478 | } | 1478 | } |
diff --git a/drivers/staging/winbond/core.h b/drivers/staging/winbond/core.h index 7d4bd5e8f69b..0a2060bf4f94 100644 --- a/drivers/staging/winbond/core.h +++ b/drivers/staging/winbond/core.h | |||
@@ -14,7 +14,7 @@ | |||
14 | struct wbsoft_priv { | 14 | struct wbsoft_priv { |
15 | u32 adapterIndex; // 20060703.4 Add for using padapterContext global adapter point | 15 | u32 adapterIndex; // 20060703.4 Add for using padapterContext global adapter point |
16 | 16 | ||
17 | WB_LOCALDESCRIPT sLocalPara; // Myself connected parameters | 17 | struct wb_local_para sLocalPara; // Myself connected parameters |
18 | 18 | ||
19 | MLME_FRAME sMlmeFrame; // connect to peerSTA parameters | 19 | MLME_FRAME sMlmeFrame; // connect to peerSTA parameters |
20 | 20 | ||
diff --git a/drivers/staging/winbond/localpara.h b/drivers/staging/winbond/localpara.h index 5626a76d69a4..fcf6a0442dc2 100644 --- a/drivers/staging/winbond/localpara.h +++ b/drivers/staging/winbond/localpara.h | |||
@@ -110,33 +110,20 @@ | |||
110 | // 20061108 WPS IE buffer | 110 | // 20061108 WPS IE buffer |
111 | #define MAX_IE_APPEND_SIZE 256 + 4 // Due to [E id][Length][OUI][Data] may 257 bytes | 111 | #define MAX_IE_APPEND_SIZE 256 + 4 // Due to [E id][Length][OUI][Data] may 257 bytes |
112 | 112 | ||
113 | typedef struct _EVENTLOG | 113 | struct chan_info |
114 | { | ||
115 | u16 Count; //Total count from start | ||
116 | u16 index; //Buffer index, 0 ~ 63 | ||
117 | u32 EventValue[64]; //BYTE 3~2 : count, BYTE 1 : Event, BYTE 0 : reason | ||
118 | } Event_Log, *pEvent_Log; | ||
119 | |||
120 | typedef struct _ChanInfo | ||
121 | { | 114 | { |
122 | u8 band; | 115 | u8 band; |
123 | u8 ChanNo; | 116 | u8 ChanNo; |
124 | } ChanInfo, *pChanInfo; | 117 | }; |
125 | 118 | ||
126 | typedef struct _CHAN_LIST | 119 | struct radio_off |
127 | { | ||
128 | u16 Count; | ||
129 | ChanInfo Channel[50]; // 100B | ||
130 | } CHAN_LIST, *psCHAN_LIST; | ||
131 | |||
132 | typedef struct _RadioOff | ||
133 | { | 120 | { |
134 | u8 boHwRadioOff; | 121 | u8 boHwRadioOff; |
135 | u8 boSwRadioOff; | 122 | u8 boSwRadioOff; |
136 | } RadioOff, *psRadioOff; | 123 | }; |
137 | 124 | ||
138 | //=========================================================================== | 125 | //=========================================================================== |
139 | typedef struct LOCAL_PARA | 126 | struct wb_local_para |
140 | { | 127 | { |
141 | u8 PermanentAddress[ MAC_ADDR_LENGTH + 2 ]; // read from EPROM, manufacture set for each NetCard | 128 | u8 PermanentAddress[ MAC_ADDR_LENGTH + 2 ]; // read from EPROM, manufacture set for each NetCard |
142 | u8 ThisMacAddress[ MAC_ADDR_LENGTH + 2 ]; // the driver will use actually. | 129 | u8 ThisMacAddress[ MAC_ADDR_LENGTH + 2 ]; // the driver will use actually. |
@@ -186,7 +173,7 @@ typedef struct LOCAL_PARA | |||
186 | u16 ListenInterval; // The listen interval when SME invoking MLME_ | 173 | u16 ListenInterval; // The listen interval when SME invoking MLME_ |
187 | // (Re)Associate_Request(). | 174 | // (Re)Associate_Request(). |
188 | 175 | ||
189 | RadioOff RadioOffStatus; | 176 | struct radio_off RadioOffStatus; |
190 | u8 Reserved0[2]; | 177 | u8 Reserved0[2]; |
191 | 178 | ||
192 | u8 boMsRadioOff; // Ndis demands to be true when set Disassoc. OID and be false when set SSID OID. | 179 | u8 boMsRadioOff; // Ndis demands to be true when set Disassoc. OID and be false when set SSID OID. |
@@ -196,7 +183,7 @@ typedef struct LOCAL_PARA | |||
196 | u8 RoamStatus; | 183 | u8 RoamStatus; |
197 | u8 reserved7[3]; | 184 | u8 reserved7[3]; |
198 | 185 | ||
199 | ChanInfo CurrentChan; //Current channel no. and channel band. It may be changed by scanning. | 186 | struct chan_info CurrentChan; //Current channel no. and channel band. It may be changed by scanning. |
200 | u8 boHandover; // Roaming, Hnadover to other AP. | 187 | u8 boHandover; // Roaming, Hnadover to other AP. |
201 | u8 boCCAbusy; | 188 | u8 boCCAbusy; |
202 | 189 | ||
@@ -253,19 +240,16 @@ typedef struct LOCAL_PARA | |||
253 | u32 _dot11WEPUndecryptableCount; | 240 | u32 _dot11WEPUndecryptableCount; |
254 | u32 _dot11FrameDuplicateCount; | 241 | u32 _dot11FrameDuplicateCount; |
255 | 242 | ||
256 | ChanInfo IbssChanSetting; // 2B. Start IBSS Channel setting by registry or WWU. | 243 | struct chan_info IbssChanSetting; // 2B. Start IBSS Channel setting by registry or WWU. |
257 | u8 reserved_5[2]; //It may not be used after considering RF type, | 244 | u8 reserved_5[2]; //It may not be used after considering RF type, |
258 | //region and modulation type. | 245 | //region and modulation type. |
259 | 246 | ||
260 | CHAN_LIST sSupportChanList; // 86B. It will be obtained according to RF type and region | ||
261 | u8 reserved_6[2]; //two variables are for wep key error detection added by ws 02/02/04 | 247 | u8 reserved_6[2]; //two variables are for wep key error detection added by ws 02/02/04 |
262 | 248 | ||
263 | u32 bWepKeyError; | 249 | u32 bWepKeyError; |
264 | u32 bToSelfPacketReceived; | 250 | u32 bToSelfPacketReceived; |
265 | u32 WepKeyDetectTimerCount; | 251 | u32 WepKeyDetectTimerCount; |
266 | 252 | ||
267 | Event_Log EventLog; | ||
268 | |||
269 | u16 SignalLostTh; | 253 | u16 SignalLostTh; |
270 | u16 SignalRoamTh; | 254 | u16 SignalRoamTh; |
271 | 255 | ||
@@ -274,6 +258,6 @@ typedef struct LOCAL_PARA | |||
274 | u16 IE_Append_size; | 258 | u16 IE_Append_size; |
275 | u16 reserved_7; | 259 | u16 reserved_7; |
276 | 260 | ||
277 | } WB_LOCALDESCRIPT, *PWB_LOCALDESCRIPT; | 261 | }; |
278 | 262 | ||
279 | #endif | 263 | #endif |
diff --git a/drivers/staging/winbond/mds_f.h b/drivers/staging/winbond/mds_f.h index ab1ea535f7db..e09dd4b879d4 100644 --- a/drivers/staging/winbond/mds_f.h +++ b/drivers/staging/winbond/mds_f.h | |||
@@ -11,9 +11,6 @@ void Mds_SendComplete( struct wbsoft_priv *adapter, PT02_DESCRIPTOR pT02 ); | |||
11 | void Mds_MpduProcess( struct wbsoft_priv *adapter, struct wb35_descriptor *pRxDes ); | 11 | void Mds_MpduProcess( struct wbsoft_priv *adapter, struct wb35_descriptor *pRxDes ); |
12 | extern void DataDmp(u8 *pdata, u32 len, u32 offset); | 12 | extern void DataDmp(u8 *pdata, u32 len, u32 offset); |
13 | 13 | ||
14 | // For Asynchronous indicating. The routine collocates with USB. | ||
15 | void Mds_MsduProcess( struct wbsoft_priv *adapter, PRXLAYER1 pRxLayer1, u8 SlotIndex); | ||
16 | |||
17 | // For data frame sending 20060802 | 14 | // For data frame sending 20060802 |
18 | u16 MDS_GetPacketSize( struct wbsoft_priv *adapter ); | 15 | u16 MDS_GetPacketSize( struct wbsoft_priv *adapter ); |
19 | void MDS_GetNextPacket( struct wbsoft_priv *adapter, struct wb35_descriptor *pDes ); | 16 | void MDS_GetNextPacket( struct wbsoft_priv *adapter, struct wb35_descriptor *pDes ); |
diff --git a/drivers/staging/winbond/mds_s.h b/drivers/staging/winbond/mds_s.h index e8e13bde4744..217ff0819a93 100644 --- a/drivers/staging/winbond/mds_s.h +++ b/drivers/staging/winbond/mds_s.h | |||
@@ -133,32 +133,4 @@ struct wb35_mds { | |||
133 | 133 | ||
134 | }; | 134 | }; |
135 | 135 | ||
136 | // | ||
137 | // Reveive Layer 1 Format. | ||
138 | //---------------------------- | ||
139 | typedef struct _RXLAYER1 | ||
140 | { | ||
141 | u16 SequenceNumber; // The sequence number of the last received packet. | ||
142 | u16 BufferTotalSize; | ||
143 | |||
144 | u32 InUsed; | ||
145 | u32 DecryptionMethod; // The desired defragment number of the next incoming packet. | ||
146 | |||
147 | u8 DeFragmentNumber; | ||
148 | u8 FrameType; | ||
149 | u8 TypeEncapsulated; | ||
150 | u8 BufferNumber; | ||
151 | |||
152 | u32 FirstFrameArrivedTime; | ||
153 | |||
154 | u8 LastFrameType; // 20061004 for fix intel 3945 's bug | ||
155 | u8 RESERVED[3]; //@@ anson | ||
156 | |||
157 | ///////////////////////////////////////////////////////////////////////////////////////////// | ||
158 | // For brand-new Rx system | ||
159 | u8 ReservedBuffer[ 2400 ];//If Buffer ID is reserved one, it must copy the data into this area | ||
160 | u8 *ReservedBufferPoint;// Point to the next availabe address of reserved buffer | ||
161 | |||
162 | }RXLAYER1, * PRXLAYER1; | ||
163 | |||
164 | #endif | 136 | #endif |
diff --git a/drivers/staging/winbond/mlme_s.h b/drivers/staging/winbond/mlme_s.h index ea12684a2b1d..1217a1c025e5 100644 --- a/drivers/staging/winbond/mlme_s.h +++ b/drivers/staging/winbond/mlme_s.h | |||
@@ -165,14 +165,6 @@ typedef struct _AUTHREQ { | |||
165 | 165 | ||
166 | } MLME_AUTHREQ_PARA, *psMLME_AUTHREQ_PARA; | 166 | } MLME_AUTHREQ_PARA, *psMLME_AUTHREQ_PARA; |
167 | 167 | ||
168 | struct _Reason_Code { | ||
169 | |||
170 | u8 peerMACaddr[MAC_ADDR_LENGTH]; | ||
171 | u16 wReasonCode; | ||
172 | }; | ||
173 | typedef struct _Reason_Code MLME_DEAUTHREQ_PARA, *psMLME_DEAUTHREQ_PARA; | ||
174 | typedef struct _Reason_Code MLME_DISASSOCREQ_PARA, *psMLME_DISASSOCREQ_PARA; | ||
175 | |||
176 | typedef struct _ASSOCREQ { | 168 | typedef struct _ASSOCREQ { |
177 | u8 PeerSTAAddr[MAC_ADDR_LENGTH]; | 169 | u8 PeerSTAAddr[MAC_ADDR_LENGTH]; |
178 | u16 CapabilityInfo; | 170 | u16 CapabilityInfo; |
diff --git a/drivers/staging/winbond/mto.h b/drivers/staging/winbond/mto.h index 4fe24b0f2791..fb4781d5781b 100644 --- a/drivers/staging/winbond/mto.h +++ b/drivers/staging/winbond/mto.h | |||
@@ -141,11 +141,6 @@ extern u16 MTO_Frag_Th_Tbl[]; | |||
141 | #define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()] | 141 | #define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()] |
142 | #define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()] | 142 | #define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()] |
143 | 143 | ||
144 | typedef struct { | ||
145 | u8 tx_rate; | ||
146 | u8 tx_retry_rate; | ||
147 | } TXRETRY_REC; | ||
148 | |||
149 | extern void MTO_Init(struct wbsoft_priv *); | 144 | extern void MTO_Init(struct wbsoft_priv *); |
150 | extern void MTO_PeriodicTimerExpired(struct wbsoft_priv *); | 145 | extern void MTO_PeriodicTimerExpired(struct wbsoft_priv *); |
151 | extern void MTO_SetDTORateRange(struct wbsoft_priv *, u8 *, u8); | 146 | extern void MTO_SetDTORateRange(struct wbsoft_priv *, u8 *, u8); |
diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c index d915cbdd38ed..5f5048af26a5 100644 --- a/drivers/staging/winbond/reg.c +++ b/drivers/staging/winbond/reg.c | |||
@@ -1823,12 +1823,12 @@ BBProcessor_initial( struct hw_data * pHwData ) | |||
1823 | reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6 | 1823 | reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6 |
1824 | } | 1824 | } |
1825 | 1825 | ||
1826 | void set_tx_power_per_channel_max2829( struct hw_data * pHwData, ChanInfo Channel) | 1826 | void set_tx_power_per_channel_max2829( struct hw_data * pHwData, struct chan_info Channel) |
1827 | { | 1827 | { |
1828 | RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify | 1828 | RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify |
1829 | } | 1829 | } |
1830 | 1830 | ||
1831 | void set_tx_power_per_channel_al2230( struct hw_data * pHwData, ChanInfo Channel ) | 1831 | void set_tx_power_per_channel_al2230( struct hw_data * pHwData, struct chan_info Channel ) |
1832 | { | 1832 | { |
1833 | u8 index = 100; | 1833 | u8 index = 100; |
1834 | 1834 | ||
@@ -1838,7 +1838,7 @@ void set_tx_power_per_channel_al2230( struct hw_data * pHwData, ChanInfo Chann | |||
1838 | RFSynthesizer_SetPowerIndex( pHwData, index ); | 1838 | RFSynthesizer_SetPowerIndex( pHwData, index ); |
1839 | } | 1839 | } |
1840 | 1840 | ||
1841 | void set_tx_power_per_channel_al7230( struct hw_data * pHwData, ChanInfo Channel) | 1841 | void set_tx_power_per_channel_al7230( struct hw_data * pHwData, struct chan_info Channel) |
1842 | { | 1842 | { |
1843 | u8 i, index = 100; | 1843 | u8 i, index = 100; |
1844 | 1844 | ||
@@ -1868,7 +1868,7 @@ void set_tx_power_per_channel_al7230( struct hw_data * pHwData, ChanInfo Chann | |||
1868 | RFSynthesizer_SetPowerIndex( pHwData, index ); | 1868 | RFSynthesizer_SetPowerIndex( pHwData, index ); |
1869 | } | 1869 | } |
1870 | 1870 | ||
1871 | void set_tx_power_per_channel_wb242( struct hw_data * pHwData, ChanInfo Channel) | 1871 | void set_tx_power_per_channel_wb242( struct hw_data * pHwData, struct chan_info Channel) |
1872 | { | 1872 | { |
1873 | u8 index = 100; | 1873 | u8 index = 100; |
1874 | 1874 | ||
@@ -1901,7 +1901,7 @@ void set_tx_power_per_channel_wb242( struct hw_data * pHwData, ChanInfo Channe | |||
1901 | // None. | 1901 | // None. |
1902 | //============================================================================================================= | 1902 | //============================================================================================================= |
1903 | void | 1903 | void |
1904 | RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, ChanInfo Channel ) | 1904 | RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, struct chan_info Channel ) |
1905 | { | 1905 | { |
1906 | struct wb35_reg *reg = &pHwData->reg; | 1906 | struct wb35_reg *reg = &pHwData->reg; |
1907 | u32 pltmp[16]; // The 16 is the maximum capability of hardware | 1907 | u32 pltmp[16]; // The 16 is the maximum capability of hardware |
diff --git a/drivers/staging/winbond/scan_s.h b/drivers/staging/winbond/scan_s.h index 775bb81f23cc..209717f5d47d 100644 --- a/drivers/staging/winbond/scan_s.h +++ b/drivers/staging/winbond/scan_s.h | |||
@@ -35,7 +35,6 @@ typedef struct _SCAN_REQ_PARA //mandatory parameters for SCAN request | |||
35 | { | 35 | { |
36 | u32 ScanType; //passive/active scan | 36 | u32 ScanType; //passive/active scan |
37 | 37 | ||
38 | CHAN_LIST sChannelList; // 86B | ||
39 | u8 reserved_1[2]; | 38 | u8 reserved_1[2]; |
40 | 39 | ||
41 | struct SSID_Element sSSID; // 34B. scan only for this SSID | 40 | struct SSID_Element sSSID; // 34B. scan only for this SSID |
diff --git a/drivers/staging/winbond/sme_api.h b/drivers/staging/winbond/sme_api.h index 549878302288..b5898294eb8a 100644 --- a/drivers/staging/winbond/sme_api.h +++ b/drivers/staging/winbond/sme_api.h | |||
@@ -193,8 +193,6 @@ s8 sme_get_cwmin_value(void *pcore_data, u8 *cwmin); | |||
193 | s8 sme_get_cwmax_value(void *pcore_data, u16 *cwmax); | 193 | s8 sme_get_cwmax_value(void *pcore_data, u16 *cwmax); |
194 | s8 sme_get_ms_radio_mode(void *pcore_data, u8 * pMsRadioOff); | 194 | s8 sme_get_ms_radio_mode(void *pcore_data, u8 * pMsRadioOff); |
195 | s8 sme_set_ms_radio_mode(void *pcore_data, u8 boMsRadioOff); | 195 | s8 sme_set_ms_radio_mode(void *pcore_data, u8 boMsRadioOff); |
196 | s8 sme_get_radio_mode(void *pcore_data, psRadioOff pRadioOffData); | ||
197 | s8 sme_set_radio_mode(void *pcore_data, RadioOff RadioOffData); | ||
198 | 196 | ||
199 | void sme_get_tx_power_level(void *pcore_data, u32 *TxPower); | 197 | void sme_get_tx_power_level(void *pcore_data, u32 *TxPower); |
200 | u8 sme_set_tx_power_level(void *pcore_data, u32 TxPower); | 198 | u8 sme_set_tx_power_level(void *pcore_data, u32 TxPower); |
@@ -203,7 +201,7 @@ void sme_get_rx_antenna(void *pcore_data, u32 *RxAntenna); | |||
203 | u8 sme_set_rx_antenna(void *pcore_data, u32 RxAntenna); | 201 | u8 sme_set_rx_antenna(void *pcore_data, u32 RxAntenna); |
204 | void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna); | 202 | void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna); |
205 | s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna); | 203 | s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna); |
206 | s8 sme_set_IBSS_chan(void *pcore_data, ChanInfo chan); | 204 | s8 sme_set_IBSS_chan(void *pcore_data, struct chan_info chan); |
207 | 205 | ||
208 | //20061108 WPS | 206 | //20061108 WPS |
209 | s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len); | 207 | s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len); |
diff --git a/drivers/staging/winbond/wb35reg_f.h b/drivers/staging/winbond/wb35reg_f.h index 30f5b5ad63ad..d352bce5c171 100644 --- a/drivers/staging/winbond/wb35reg_f.h +++ b/drivers/staging/winbond/wb35reg_f.h | |||
@@ -14,7 +14,7 @@ void Dxx_initial( struct hw_data * pHwData ); | |||
14 | void Mxx_initial( struct hw_data * pHwData ); | 14 | void Mxx_initial( struct hw_data * pHwData ); |
15 | void RFSynthesizer_initial( struct hw_data * pHwData ); | 15 | void RFSynthesizer_initial( struct hw_data * pHwData ); |
16 | //void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, s8 Channel ); | 16 | //void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, s8 Channel ); |
17 | void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, ChanInfo Channel ); | 17 | void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, struct chan_info Channel ); |
18 | void BBProcessor_initial( struct hw_data * pHwData ); | 18 | void BBProcessor_initial( struct hw_data * pHwData ); |
19 | void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060613.1 | 19 | void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060613.1 |
20 | //void RF_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060626.5.c Add | 20 | //void RF_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060626.5.c Add |
diff --git a/drivers/staging/winbond/wbusb.c b/drivers/staging/winbond/wbusb.c index 067082a7d759..ecf418dcefd9 100644 --- a/drivers/staging/winbond/wbusb.c +++ b/drivers/staging/winbond/wbusb.c | |||
@@ -23,7 +23,7 @@ MODULE_DESCRIPTION("IS89C35 802.11bg WLAN USB Driver"); | |||
23 | MODULE_LICENSE("GPL"); | 23 | MODULE_LICENSE("GPL"); |
24 | MODULE_VERSION("0.1"); | 24 | MODULE_VERSION("0.1"); |
25 | 25 | ||
26 | static struct usb_device_id wb35_table[] __devinitdata = { | 26 | static const struct usb_device_id wb35_table[] __devinitconst = { |
27 | { USB_DEVICE(0x0416, 0x0035) }, | 27 | { USB_DEVICE(0x0416, 0x0035) }, |
28 | { USB_DEVICE(0x18E8, 0x6201) }, | 28 | { USB_DEVICE(0x18E8, 0x6201) }, |
29 | { USB_DEVICE(0x18E8, 0x6206) }, | 29 | { USB_DEVICE(0x18E8, 0x6206) }, |
@@ -161,7 +161,7 @@ static void hal_set_radio_mode(struct hw_data *pHwData, unsigned char radio_off) | |||
161 | } | 161 | } |
162 | 162 | ||
163 | static void | 163 | static void |
164 | hal_set_current_channel_ex(struct hw_data *pHwData, ChanInfo channel) | 164 | hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info channel) |
165 | { | 165 | { |
166 | struct wb35_reg *reg = &pHwData->reg; | 166 | struct wb35_reg *reg = &pHwData->reg; |
167 | 167 | ||
@@ -180,10 +180,10 @@ hal_set_current_channel_ex(struct hw_data *pHwData, ChanInfo channel) | |||
180 | reg->M28_MacControl &= ~0xff; // Clean channel information field | 180 | reg->M28_MacControl &= ~0xff; // Clean channel information field |
181 | reg->M28_MacControl |= channel.ChanNo; | 181 | reg->M28_MacControl |= channel.ChanNo; |
182 | Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl, | 182 | Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl, |
183 | (s8 *) & channel, sizeof(ChanInfo)); | 183 | (s8 *) & channel, sizeof(struct chan_info)); |
184 | } | 184 | } |
185 | 185 | ||
186 | static void hal_set_current_channel(struct hw_data *pHwData, ChanInfo channel) | 186 | static void hal_set_current_channel(struct hw_data *pHwData, struct chan_info channel) |
187 | { | 187 | { |
188 | hal_set_current_channel_ex(pHwData, channel); | 188 | hal_set_current_channel_ex(pHwData, channel); |
189 | } | 189 | } |
@@ -253,7 +253,7 @@ static void hal_set_accept_beacon(struct hw_data *pHwData, u8 enable) | |||
253 | static int wbsoft_config(struct ieee80211_hw *dev, u32 changed) | 253 | static int wbsoft_config(struct ieee80211_hw *dev, u32 changed) |
254 | { | 254 | { |
255 | struct wbsoft_priv *priv = dev->priv; | 255 | struct wbsoft_priv *priv = dev->priv; |
256 | ChanInfo ch; | 256 | struct chan_info ch; |
257 | 257 | ||
258 | printk("wbsoft_config called\n"); | 258 | printk("wbsoft_config called\n"); |
259 | 259 | ||
diff --git a/drivers/staging/wlags49_h2/wl_main.c b/drivers/staging/wlags49_h2/wl_main.c index 16764a000942..cf0c38468b20 100644 --- a/drivers/staging/wlags49_h2/wl_main.c +++ b/drivers/staging/wlags49_h2/wl_main.c | |||
@@ -3792,7 +3792,7 @@ static int write_int(struct file *file, const char *buffer, unsigned long count, | |||
3792 | } | 3792 | } |
3793 | if (count > 0 ) { | 3793 | if (count > 0 ) { |
3794 | proc_number[count] = 0; | 3794 | proc_number[count] = 0; |
3795 | nr = wl_atoi( proc_number ); | 3795 | nr = simple_strtoul(proc_number , NULL, 0); |
3796 | *(unsigned int *)data = nr; | 3796 | *(unsigned int *)data = nr; |
3797 | if ( nr & 0x8000 ) { //;?kludgy but it is unclear to me were else to place this | 3797 | if ( nr & 0x8000 ) { //;?kludgy but it is unclear to me were else to place this |
3798 | #if DBG | 3798 | #if DBG |
diff --git a/drivers/staging/wlags49_h2/wl_netdev.c b/drivers/staging/wlags49_h2/wl_netdev.c index c33e225bc0e6..fa082d90fcad 100644 --- a/drivers/staging/wlags49_h2/wl_netdev.c +++ b/drivers/staging/wlags49_h2/wl_netdev.c | |||
@@ -360,7 +360,7 @@ int wl_open(struct net_device *dev) | |||
360 | wl_lock( lp, &flags ); | 360 | wl_lock( lp, &flags ); |
361 | 361 | ||
362 | if( status != HCF_SUCCESS ) { | 362 | if( status != HCF_SUCCESS ) { |
363 | // Unsuccesfull, try reset of the card to recover | 363 | // Unsuccessful, try reset of the card to recover |
364 | status = wl_reset( dev ); | 364 | status = wl_reset( dev ); |
365 | } | 365 | } |
366 | 366 | ||
diff --git a/drivers/staging/wlags49_h2/wl_pci.c b/drivers/staging/wlags49_h2/wl_pci.c index a3db111d4a95..01e4bec9fd5b 100644 --- a/drivers/staging/wlags49_h2/wl_pci.c +++ b/drivers/staging/wlags49_h2/wl_pci.c | |||
@@ -81,7 +81,6 @@ | |||
81 | #include <asm/system.h> | 81 | #include <asm/system.h> |
82 | #include <asm/io.h> | 82 | #include <asm/io.h> |
83 | #include <asm/irq.h> | 83 | #include <asm/irq.h> |
84 | #include <asm/system.h> | ||
85 | #include <asm/bitops.h> | 84 | #include <asm/bitops.h> |
86 | #include <asm/uaccess.h> | 85 | #include <asm/uaccess.h> |
87 | 86 | ||
diff --git a/drivers/staging/wlags49_h2/wl_profile.c b/drivers/staging/wlags49_h2/wl_profile.c index 715f027a923f..1e0c75f28557 100644 --- a/drivers/staging/wlags49_h2/wl_profile.c +++ b/drivers/staging/wlags49_h2/wl_profile.c | |||
@@ -383,15 +383,15 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
383 | DbgInfo->DebugFlag |= DBG_DEFAULTS; | 383 | DbgInfo->DebugFlag |= DBG_DEFAULTS; |
384 | } | 384 | } |
385 | } else { | 385 | } else { |
386 | DbgInfo->DebugFlag = wl_atoi( value ); //;?DebugFlag; | 386 | DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); //;?DebugFlag; |
387 | } | 387 | } |
388 | DbgInfo->DebugFlag = wl_atoi( value ); //;?Delete ASAP | 388 | DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); //;?Delete ASAP |
389 | } | 389 | } |
390 | #endif /* DBG */ | 390 | #endif /* DBG */ |
391 | if ( strcmp( key, PARM_NAME_AUTH_KEY_MGMT_SUITE ) == 0 ) { | 391 | if ( strcmp( key, PARM_NAME_AUTH_KEY_MGMT_SUITE ) == 0 ) { |
392 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTH_KEY_MGMT_SUITE, value ); | 392 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTH_KEY_MGMT_SUITE, value ); |
393 | 393 | ||
394 | value_convert = wl_atoi( value ); | 394 | value_convert = simple_strtoul(value, NULL, 0); |
395 | if (( value_convert >= PARM_MIN_AUTH_KEY_MGMT_SUITE ) || ( value_convert <= PARM_MAX_AUTH_KEY_MGMT_SUITE )) { | 395 | if (( value_convert >= PARM_MIN_AUTH_KEY_MGMT_SUITE ) || ( value_convert <= PARM_MAX_AUTH_KEY_MGMT_SUITE )) { |
396 | lp->AuthKeyMgmtSuite = value_convert; | 396 | lp->AuthKeyMgmtSuite = value_convert; |
397 | } else { | 397 | } else { |
@@ -401,7 +401,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
401 | else if ( strcmp( key, PARM_NAME_BRSC_2GHZ ) == 0 ) { | 401 | else if ( strcmp( key, PARM_NAME_BRSC_2GHZ ) == 0 ) { |
402 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_2GHZ, value ); | 402 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_2GHZ, value ); |
403 | 403 | ||
404 | value_convert = wl_atoi( value ); | 404 | value_convert = simple_strtoul(value, NULL, 0); |
405 | if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { | 405 | if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { |
406 | lp->brsc[0] = value_convert; | 406 | lp->brsc[0] = value_convert; |
407 | } else { | 407 | } else { |
@@ -411,7 +411,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
411 | else if ( strcmp( key, PARM_NAME_BRSC_5GHZ ) == 0 ) { | 411 | else if ( strcmp( key, PARM_NAME_BRSC_5GHZ ) == 0 ) { |
412 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_5GHZ, value ); | 412 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_5GHZ, value ); |
413 | 413 | ||
414 | value_convert = wl_atoi( value ); | 414 | value_convert = simple_strtoul(value, NULL, 0); |
415 | if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { | 415 | if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { |
416 | lp->brsc[1] = value_convert; | 416 | lp->brsc[1] = value_convert; |
417 | } else { | 417 | } else { |
@@ -448,7 +448,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
448 | else if ( strcmp( key, PARM_NAME_ENABLE_ENCRYPTION ) == 0 ) { | 448 | else if ( strcmp( key, PARM_NAME_ENABLE_ENCRYPTION ) == 0 ) { |
449 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_ENABLE_ENCRYPTION, value ); | 449 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_ENABLE_ENCRYPTION, value ); |
450 | 450 | ||
451 | value_convert = wl_atoi( value ); | 451 | value_convert = simple_strtoul(value, NULL, 0); |
452 | if (( value_convert >= PARM_MIN_ENABLE_ENCRYPTION ) && ( value_convert <= PARM_MAX_ENABLE_ENCRYPTION )) { | 452 | if (( value_convert >= PARM_MIN_ENABLE_ENCRYPTION ) && ( value_convert <= PARM_MAX_ENABLE_ENCRYPTION )) { |
453 | lp->EnableEncryption = value_convert; | 453 | lp->EnableEncryption = value_convert; |
454 | } else { | 454 | } else { |
@@ -529,7 +529,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
529 | else if ( strcmp( key, PARM_NAME_MULTICAST_RATE ) == 0 ) { | 529 | else if ( strcmp( key, PARM_NAME_MULTICAST_RATE ) == 0 ) { |
530 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RATE, value ); | 530 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RATE, value ); |
531 | 531 | ||
532 | value_convert = wl_atoi( value ); | 532 | value_convert = simple_strtoul(value, NULL, 0); |
533 | 533 | ||
534 | if (( value_convert >= PARM_MIN_MULTICAST_RATE ) && ( value_convert <= PARM_MAX_MULTICAST_RATE )) { | 534 | if (( value_convert >= PARM_MIN_MULTICAST_RATE ) && ( value_convert <= PARM_MAX_MULTICAST_RATE )) { |
535 | lp->MulticastRate[0] = value_convert; | 535 | lp->MulticastRate[0] = value_convert; |
@@ -540,7 +540,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
540 | else if ( strcmp( key, PARM_NAME_OWN_CHANNEL ) == 0 ) { | 540 | else if ( strcmp( key, PARM_NAME_OWN_CHANNEL ) == 0 ) { |
541 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_CHANNEL, value ); | 541 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_CHANNEL, value ); |
542 | 542 | ||
543 | value_convert = wl_atoi( value ); | 543 | value_convert = simple_strtoul(value, NULL, 0); |
544 | if ( wl_is_a_valid_chan( value_convert )) { | 544 | if ( wl_is_a_valid_chan( value_convert )) { |
545 | if ( value_convert > 14 ) { | 545 | if ( value_convert > 14 ) { |
546 | value_convert = value_convert | 0x100; | 546 | value_convert = value_convert | 0x100; |
@@ -567,7 +567,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
567 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD ) == 0 ) { | 567 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD ) == 0 ) { |
568 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD, value ); | 568 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD, value ); |
569 | 569 | ||
570 | value_convert = wl_atoi( value ); | 570 | value_convert = simple_strtoul(value, NULL, 0); |
571 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 571 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
572 | lp->RTSThreshold = value_convert; | 572 | lp->RTSThreshold = value_convert; |
573 | } else { | 573 | } else { |
@@ -577,7 +577,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
577 | else if ( strcmp( key, PARM_NAME_SRSC_2GHZ ) == 0 ) { | 577 | else if ( strcmp( key, PARM_NAME_SRSC_2GHZ ) == 0 ) { |
578 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_2GHZ, value ); | 578 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_2GHZ, value ); |
579 | 579 | ||
580 | value_convert = wl_atoi( value ); | 580 | value_convert = simple_strtoul(value, NULL, 0); |
581 | if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { | 581 | if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { |
582 | lp->srsc[0] = value_convert; | 582 | lp->srsc[0] = value_convert; |
583 | } else { | 583 | } else { |
@@ -587,7 +587,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
587 | else if ( strcmp( key, PARM_NAME_SRSC_5GHZ ) == 0 ) { | 587 | else if ( strcmp( key, PARM_NAME_SRSC_5GHZ ) == 0 ) { |
588 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_5GHZ, value ); | 588 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_5GHZ, value ); |
589 | 589 | ||
590 | value_convert = wl_atoi( value ); | 590 | value_convert = simple_strtoul(value, NULL, 0); |
591 | if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { | 591 | if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { |
592 | lp->srsc[1] = value_convert; | 592 | lp->srsc[1] = value_convert; |
593 | } else { | 593 | } else { |
@@ -597,7 +597,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
597 | else if ( strcmp( key, PARM_NAME_SYSTEM_SCALE ) == 0 ) { | 597 | else if ( strcmp( key, PARM_NAME_SYSTEM_SCALE ) == 0 ) { |
598 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SYSTEM_SCALE, value ); | 598 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SYSTEM_SCALE, value ); |
599 | 599 | ||
600 | value_convert = wl_atoi( value ); | 600 | value_convert = simple_strtoul(value, NULL, 0); |
601 | if (( value_convert >= PARM_MIN_SYSTEM_SCALE ) && ( value_convert <= PARM_MAX_SYSTEM_SCALE )) { | 601 | if (( value_convert >= PARM_MIN_SYSTEM_SCALE ) && ( value_convert <= PARM_MAX_SYSTEM_SCALE )) { |
602 | lp->DistanceBetweenAPs = value_convert; | 602 | lp->DistanceBetweenAPs = value_convert; |
603 | } else { | 603 | } else { |
@@ -607,9 +607,9 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
607 | else if ( strcmp( key, PARM_NAME_TX_KEY ) == 0 ) { | 607 | else if ( strcmp( key, PARM_NAME_TX_KEY ) == 0 ) { |
608 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_KEY, value ); | 608 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_KEY, value ); |
609 | 609 | ||
610 | value_convert = wl_atoi( value ); | 610 | value_convert = simple_strtoul(value, NULL, 0); |
611 | if (( value_convert >= PARM_MIN_TX_KEY ) && ( value_convert <= PARM_MAX_TX_KEY )) { | 611 | if (( value_convert >= PARM_MIN_TX_KEY ) && ( value_convert <= PARM_MAX_TX_KEY )) { |
612 | lp->TransmitKeyID = wl_atoi( value ); | 612 | lp->TransmitKeyID = simple_strtoul(value, NULL, 0); |
613 | } else { | 613 | } else { |
614 | DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_KEY ); | 614 | DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_KEY ); |
615 | } | 615 | } |
@@ -617,7 +617,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
617 | else if ( strcmp( key, PARM_NAME_TX_RATE ) == 0 ) { | 617 | else if ( strcmp( key, PARM_NAME_TX_RATE ) == 0 ) { |
618 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE, value ); | 618 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE, value ); |
619 | 619 | ||
620 | value_convert = wl_atoi( value ); | 620 | value_convert = simple_strtoul(value, NULL, 0); |
621 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 621 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
622 | lp->TxRateControl[0] = value_convert; | 622 | lp->TxRateControl[0] = value_convert; |
623 | } else { | 623 | } else { |
@@ -627,7 +627,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
627 | else if ( strcmp( key, PARM_NAME_TX_POW_LEVEL ) == 0 ) { | 627 | else if ( strcmp( key, PARM_NAME_TX_POW_LEVEL ) == 0 ) { |
628 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_POW_LEVEL, value ); | 628 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_POW_LEVEL, value ); |
629 | 629 | ||
630 | value_convert = wl_atoi( value ); | 630 | value_convert = simple_strtoul(value, NULL, 0); |
631 | if (( value_convert >= PARM_MIN_TX_POW_LEVEL ) || ( value_convert <= PARM_MAX_TX_POW_LEVEL )) { | 631 | if (( value_convert >= PARM_MIN_TX_POW_LEVEL ) || ( value_convert <= PARM_MAX_TX_POW_LEVEL )) { |
632 | lp->txPowLevel = value_convert; | 632 | lp->txPowLevel = value_convert; |
633 | } else { | 633 | } else { |
@@ -645,7 +645,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
645 | if ( strcmp( key, PARM_NAME_PORT_TYPE ) == 0 ) { | 645 | if ( strcmp( key, PARM_NAME_PORT_TYPE ) == 0 ) { |
646 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PORT_TYPE, value ); | 646 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PORT_TYPE, value ); |
647 | 647 | ||
648 | value_convert = wl_atoi( value ); | 648 | value_convert = simple_strtoul(value, NULL, 0); |
649 | if (( value_convert == PARM_MIN_PORT_TYPE ) || ( value_convert == PARM_MAX_PORT_TYPE )) { | 649 | if (( value_convert == PARM_MIN_PORT_TYPE ) || ( value_convert == PARM_MAX_PORT_TYPE )) { |
650 | lp->PortType = value_convert; | 650 | lp->PortType = value_convert; |
651 | } else { | 651 | } else { |
@@ -654,7 +654,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
654 | } | 654 | } |
655 | else if ( strcmp( key, PARM_NAME_PM_ENABLED ) == 0 ) { | 655 | else if ( strcmp( key, PARM_NAME_PM_ENABLED ) == 0 ) { |
656 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_ENABLED, value ); | 656 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_ENABLED, value ); |
657 | value_convert = wl_atoi( value ); | 657 | value_convert = simple_strtoul(value, NULL, 0); |
658 | /* ;? how about wl_main.c containing | 658 | /* ;? how about wl_main.c containing |
659 | * VALID_PARAM( PARM_PM_ENABLED <= WVLAN_PM_STATE_STANDARD || | 659 | * VALID_PARAM( PARM_PM_ENABLED <= WVLAN_PM_STATE_STANDARD || |
660 | * ( PARM_PM_ENABLED & 0x7FFF ) <= WVLAN_PM_STATE_STANDARD ); | 660 | * ( PARM_PM_ENABLED & 0x7FFF ) <= WVLAN_PM_STATE_STANDARD ); |
@@ -677,7 +677,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
677 | else if ( strcmp( key, PARM_NAME_MAX_SLEEP ) == 0 ) { | 677 | else if ( strcmp( key, PARM_NAME_MAX_SLEEP ) == 0 ) { |
678 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MAX_SLEEP, value ); | 678 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MAX_SLEEP, value ); |
679 | 679 | ||
680 | value_convert = wl_atoi( value ); | 680 | value_convert = simple_strtoul(value, NULL, 0); |
681 | if (( value_convert >= 0 ) && ( value_convert <= 65535 )) { | 681 | if (( value_convert >= 0 ) && ( value_convert <= 65535 )) { |
682 | lp->MaxSleepDuration = value_convert; | 682 | lp->MaxSleepDuration = value_convert; |
683 | } else { | 683 | } else { |
@@ -696,7 +696,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
696 | else if ( strcmp( key, PARM_NAME_AUTHENTICATION ) == 0 ) { | 696 | else if ( strcmp( key, PARM_NAME_AUTHENTICATION ) == 0 ) { |
697 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTHENTICATION, value ); | 697 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTHENTICATION, value ); |
698 | 698 | ||
699 | value_convert = wl_atoi( value ); | 699 | value_convert = simple_strtoul(value, NULL, 0); |
700 | if (( value_convert >= PARM_MIN_AUTHENTICATION ) && ( value_convert <= PARM_MAX_AUTHENTICATION )) { | 700 | if (( value_convert >= PARM_MIN_AUTHENTICATION ) && ( value_convert <= PARM_MAX_AUTHENTICATION )) { |
701 | lp->authentication = value_convert; | 701 | lp->authentication = value_convert; |
702 | } else { | 702 | } else { |
@@ -706,7 +706,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
706 | else if ( strcmp( key, PARM_NAME_OWN_ATIM_WINDOW ) == 0 ) { | 706 | else if ( strcmp( key, PARM_NAME_OWN_ATIM_WINDOW ) == 0 ) { |
707 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_ATIM_WINDOW, value ); | 707 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_ATIM_WINDOW, value ); |
708 | 708 | ||
709 | value_convert = wl_atoi( value ); | 709 | value_convert = simple_strtoul(value, NULL, 0); |
710 | if (( value_convert >= PARM_MIN_OWN_ATIM_WINDOW ) && ( value_convert <= PARM_MAX_OWN_ATIM_WINDOW )) { | 710 | if (( value_convert >= PARM_MIN_OWN_ATIM_WINDOW ) && ( value_convert <= PARM_MAX_OWN_ATIM_WINDOW )) { |
711 | lp->atimWindow = value_convert; | 711 | lp->atimWindow = value_convert; |
712 | } else { | 712 | } else { |
@@ -716,7 +716,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
716 | else if ( strcmp( key, PARM_NAME_PM_HOLDOVER_DURATION ) == 0 ) { | 716 | else if ( strcmp( key, PARM_NAME_PM_HOLDOVER_DURATION ) == 0 ) { |
717 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_HOLDOVER_DURATION, value ); | 717 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_HOLDOVER_DURATION, value ); |
718 | 718 | ||
719 | value_convert = wl_atoi( value ); | 719 | value_convert = simple_strtoul(value, NULL, 0); |
720 | if (( value_convert >= PARM_MIN_PM_HOLDOVER_DURATION ) && ( value_convert <= PARM_MAX_PM_HOLDOVER_DURATION )) { | 720 | if (( value_convert >= PARM_MIN_PM_HOLDOVER_DURATION ) && ( value_convert <= PARM_MAX_PM_HOLDOVER_DURATION )) { |
721 | lp->holdoverDuration = value_convert; | 721 | lp->holdoverDuration = value_convert; |
722 | } else { | 722 | } else { |
@@ -730,7 +730,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
730 | else if ( strcmp( key, PARM_NAME_CONNECTION_CONTROL ) == 0 ) { | 730 | else if ( strcmp( key, PARM_NAME_CONNECTION_CONTROL ) == 0 ) { |
731 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_CONNECTION_CONTROL, value ); | 731 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_CONNECTION_CONTROL, value ); |
732 | 732 | ||
733 | value_convert = wl_atoi( value ); | 733 | value_convert = simple_strtoul(value, NULL, 0); |
734 | if (( value_convert >= PARM_MIN_CONNECTION_CONTROL ) && ( value_convert <= PARM_MAX_CONNECTION_CONTROL )) { | 734 | if (( value_convert >= PARM_MIN_CONNECTION_CONTROL ) && ( value_convert <= PARM_MAX_CONNECTION_CONTROL )) { |
735 | lp->connectionControl = value_convert; | 735 | lp->connectionControl = value_convert; |
736 | } else { | 736 | } else { |
@@ -749,7 +749,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
749 | if ( strcmp( key, PARM_NAME_OWN_DTIM_PERIOD ) == 0 ) { | 749 | if ( strcmp( key, PARM_NAME_OWN_DTIM_PERIOD ) == 0 ) { |
750 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_DTIM_PERIOD, value ); | 750 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_DTIM_PERIOD, value ); |
751 | 751 | ||
752 | value_convert = wl_atoi( value ); | 752 | value_convert = simple_strtoul(value, NULL, 0); |
753 | if ( value_convert >= PARM_MIN_OWN_DTIM_PERIOD ) { | 753 | if ( value_convert >= PARM_MIN_OWN_DTIM_PERIOD ) { |
754 | lp->DTIMPeriod = value_convert; | 754 | lp->DTIMPeriod = value_convert; |
755 | } else { | 755 | } else { |
@@ -775,7 +775,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
775 | else if ( strcmp( key, PARM_NAME_OWN_BEACON_INTERVAL ) == 0 ) { | 775 | else if ( strcmp( key, PARM_NAME_OWN_BEACON_INTERVAL ) == 0 ) { |
776 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_BEACON_INTERVAL, value ); | 776 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_BEACON_INTERVAL, value ); |
777 | 777 | ||
778 | value_convert = wl_atoi( value ); | 778 | value_convert = simple_strtoul(value, NULL, 0); |
779 | if ( value_convert >= PARM_MIN_OWN_BEACON_INTERVAL ) { | 779 | if ( value_convert >= PARM_MIN_OWN_BEACON_INTERVAL ) { |
780 | lp->ownBeaconInterval = value_convert; | 780 | lp->ownBeaconInterval = value_convert; |
781 | } else { | 781 | } else { |
@@ -785,7 +785,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
785 | else if ( strcmp( key, PARM_NAME_COEXISTENCE ) == 0 ) { | 785 | else if ( strcmp( key, PARM_NAME_COEXISTENCE ) == 0 ) { |
786 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_COEXISTENCE, value ); | 786 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_COEXISTENCE, value ); |
787 | 787 | ||
788 | value_convert = wl_atoi( value ); | 788 | value_convert = simple_strtoul(value, NULL, 0); |
789 | if ( value_convert >= PARM_MIN_COEXISTENCE ) { | 789 | if ( value_convert >= PARM_MIN_COEXISTENCE ) { |
790 | lp->coexistence = value_convert; | 790 | lp->coexistence = value_convert; |
791 | } else { | 791 | } else { |
@@ -797,7 +797,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
797 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD1 ) == 0 ) { | 797 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD1 ) == 0 ) { |
798 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD1, value ); | 798 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD1, value ); |
799 | 799 | ||
800 | value_convert = wl_atoi( value ); | 800 | value_convert = simple_strtoul(value, NULL, 0); |
801 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 801 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
802 | lp->wds_port[0].rtsThreshold = value_convert; | 802 | lp->wds_port[0].rtsThreshold = value_convert; |
803 | } else { | 803 | } else { |
@@ -807,7 +807,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
807 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD2 ) == 0 ) { | 807 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD2 ) == 0 ) { |
808 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD2, value ); | 808 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD2, value ); |
809 | 809 | ||
810 | value_convert = wl_atoi( value ); | 810 | value_convert = simple_strtoul(value, NULL, 0); |
811 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 811 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
812 | lp->wds_port[1].rtsThreshold = value_convert; | 812 | lp->wds_port[1].rtsThreshold = value_convert; |
813 | } else { | 813 | } else { |
@@ -817,7 +817,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
817 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD3 ) == 0 ) { | 817 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD3 ) == 0 ) { |
818 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD3, value ); | 818 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD3, value ); |
819 | 819 | ||
820 | value_convert = wl_atoi( value ); | 820 | value_convert = simple_strtoul(value, NULL, 0); |
821 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 821 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
822 | lp->wds_port[2].rtsThreshold = value_convert; | 822 | lp->wds_port[2].rtsThreshold = value_convert; |
823 | } else { | 823 | } else { |
@@ -827,7 +827,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
827 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD4 ) == 0 ) { | 827 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD4 ) == 0 ) { |
828 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD4, value ); | 828 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD4, value ); |
829 | 829 | ||
830 | value_convert = wl_atoi( value ); | 830 | value_convert = simple_strtoul(value, NULL, 0); |
831 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 831 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
832 | lp->wds_port[3].rtsThreshold = value_convert; | 832 | lp->wds_port[3].rtsThreshold = value_convert; |
833 | } else { | 833 | } else { |
@@ -837,7 +837,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
837 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD5 ) == 0 ) { | 837 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD5 ) == 0 ) { |
838 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD5, value ); | 838 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD5, value ); |
839 | 839 | ||
840 | value_convert = wl_atoi( value ); | 840 | value_convert = simple_strtoul(value, NULL, 0); |
841 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 841 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
842 | lp->wds_port[4].rtsThreshold = value_convert; | 842 | lp->wds_port[4].rtsThreshold = value_convert; |
843 | } else { | 843 | } else { |
@@ -847,7 +847,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
847 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD6 ) == 0 ) { | 847 | else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD6 ) == 0 ) { |
848 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD6, value ); | 848 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD6, value ); |
849 | 849 | ||
850 | value_convert = wl_atoi( value ); | 850 | value_convert = simple_strtoul(value, NULL, 0); |
851 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { | 851 | if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { |
852 | lp->wds_port[5].rtsThreshold = value_convert; | 852 | lp->wds_port[5].rtsThreshold = value_convert; |
853 | } else { | 853 | } else { |
@@ -857,7 +857,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
857 | else if ( strcmp( key, PARM_NAME_TX_RATE1 ) == 0 ) { | 857 | else if ( strcmp( key, PARM_NAME_TX_RATE1 ) == 0 ) { |
858 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE1, value ); | 858 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE1, value ); |
859 | 859 | ||
860 | value_convert = wl_atoi( value ); | 860 | value_convert = simple_strtoul(value, NULL, 0); |
861 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 861 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
862 | lp->wds_port[0].txRateCntl = value_convert; | 862 | lp->wds_port[0].txRateCntl = value_convert; |
863 | } else { | 863 | } else { |
@@ -867,7 +867,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
867 | else if ( strcmp( key, PARM_NAME_TX_RATE2 ) == 0 ) { | 867 | else if ( strcmp( key, PARM_NAME_TX_RATE2 ) == 0 ) { |
868 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE2, value ); | 868 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE2, value ); |
869 | 869 | ||
870 | value_convert = wl_atoi( value ); | 870 | value_convert = simple_strtoul(value, NULL, 0); |
871 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 871 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
872 | lp->wds_port[1].txRateCntl = value_convert; | 872 | lp->wds_port[1].txRateCntl = value_convert; |
873 | } else { | 873 | } else { |
@@ -877,7 +877,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
877 | else if ( strcmp( key, PARM_NAME_TX_RATE3 ) == 0 ) { | 877 | else if ( strcmp( key, PARM_NAME_TX_RATE3 ) == 0 ) { |
878 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE3, value ); | 878 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE3, value ); |
879 | 879 | ||
880 | value_convert = wl_atoi( value ); | 880 | value_convert = simple_strtoul(value, NULL, 0); |
881 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 881 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
882 | lp->wds_port[2].txRateCntl = value_convert; | 882 | lp->wds_port[2].txRateCntl = value_convert; |
883 | } else { | 883 | } else { |
@@ -887,7 +887,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
887 | else if ( strcmp( key, PARM_NAME_TX_RATE4 ) == 0 ) { | 887 | else if ( strcmp( key, PARM_NAME_TX_RATE4 ) == 0 ) { |
888 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE4, value ); | 888 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE4, value ); |
889 | 889 | ||
890 | value_convert = wl_atoi( value ); | 890 | value_convert = simple_strtoul(value, NULL, 0); |
891 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 891 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
892 | lp->wds_port[3].txRateCntl = value_convert; | 892 | lp->wds_port[3].txRateCntl = value_convert; |
893 | } else { | 893 | } else { |
@@ -897,7 +897,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
897 | else if ( strcmp( key, PARM_NAME_TX_RATE5 ) == 0 ) { | 897 | else if ( strcmp( key, PARM_NAME_TX_RATE5 ) == 0 ) { |
898 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE5, value ); | 898 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE5, value ); |
899 | 899 | ||
900 | value_convert = wl_atoi( value ); | 900 | value_convert = simple_strtoul(value, NULL, 0); |
901 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 901 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
902 | lp->wds_port[4].txRateCntl = value_convert; | 902 | lp->wds_port[4].txRateCntl = value_convert; |
903 | } else { | 903 | } else { |
@@ -907,7 +907,7 @@ void translate_option( char *buffer, struct wl_private *lp ) | |||
907 | else if ( strcmp( key, PARM_NAME_TX_RATE6 ) == 0 ) { | 907 | else if ( strcmp( key, PARM_NAME_TX_RATE6 ) == 0 ) { |
908 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE6, value ); | 908 | DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE6, value ); |
909 | 909 | ||
910 | value_convert = wl_atoi( value ); | 910 | value_convert = simple_strtoul(value, NULL, 0); |
911 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { | 911 | if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { |
912 | lp->wds_port[5].txRateCntl = value_convert; | 912 | lp->wds_port[5].txRateCntl = value_convert; |
913 | } else { | 913 | } else { |
diff --git a/drivers/staging/wlags49_h2/wl_util.c b/drivers/staging/wlags49_h2/wl_util.c index ac1e7f38f982..bbdb9973d1e5 100644 --- a/drivers/staging/wlags49_h2/wl_util.c +++ b/drivers/staging/wlags49_h2/wl_util.c | |||
@@ -1536,52 +1536,3 @@ int wl_get_tallies(struct wl_private *lp, | |||
1536 | return ret; | 1536 | return ret; |
1537 | } | 1537 | } |
1538 | 1538 | ||
1539 | /******************************************************************************* | ||
1540 | * wl_atoi() | ||
1541 | ******************************************************************************* | ||
1542 | * | ||
1543 | * DESCRIPTION: | ||
1544 | * | ||
1545 | * Believe it or not, we need our own implementation of atoi in the kernel. | ||
1546 | * | ||
1547 | * PARAMETERS: | ||
1548 | * | ||
1549 | * string - the ASCII string to convert to an integer | ||
1550 | * | ||
1551 | * RETURNS: | ||
1552 | * | ||
1553 | * unsigned integer | ||
1554 | * | ||
1555 | ******************************************************************************/ | ||
1556 | unsigned int wl_atoi( char *string ) | ||
1557 | { | ||
1558 | unsigned int base = 10; //default to decimal | ||
1559 | unsigned int value = 0; | ||
1560 | unsigned int c; | ||
1561 | int i = strlen( string ); | ||
1562 | |||
1563 | if ( i > 2 && string[0] == '0' && ( string[1] | ('X'^'x') ) == 'x' ) { | ||
1564 | base = 16; | ||
1565 | string +=2; | ||
1566 | } | ||
1567 | while ( ( c = *string++ ) != '\0' ) { | ||
1568 | if ( value > UINT_MAX / base ) { //test for overrun | ||
1569 | DBG_FUNC( "wl_atoi" ); //don't overload the log file with good messages | ||
1570 | DBG_ENTER( DbgInfo ); | ||
1571 | DBG_ERROR( DbgInfo, "string \"%s\", lenght exceeds expectations\n", string ); | ||
1572 | printk( "<1>string \"%s\", lenght exceeds expectations\n", string ); | ||
1573 | DBG_LEAVE( DbgInfo ); | ||
1574 | break; | ||
1575 | } | ||
1576 | c -= '0'; | ||
1577 | if ( 0 <= c && c <= 9 ) value = base * value + c; | ||
1578 | else if ( base == 16 ) { | ||
1579 | c += '0'; | ||
1580 | c |= 'A'^'a'; | ||
1581 | c = c - 'a'+ 10; | ||
1582 | if ( 10 <= c && c <= 15 ) value = base * value + c; | ||
1583 | } | ||
1584 | } | ||
1585 | return value; | ||
1586 | } // wl_atoi | ||
1587 | |||
diff --git a/drivers/staging/wlags49_h2/wl_util.h b/drivers/staging/wlags49_h2/wl_util.h index 16cd6c578adb..561e85b5c9b2 100644 --- a/drivers/staging/wlags49_h2/wl_util.h +++ b/drivers/staging/wlags49_h2/wl_util.h | |||
@@ -100,6 +100,4 @@ void wl_process_updated_record( struct wl_private *lp ); | |||
100 | void wl_process_assoc_status( struct wl_private *lp ); | 100 | void wl_process_assoc_status( struct wl_private *lp ); |
101 | void wl_process_security_status( struct wl_private *lp ); | 101 | void wl_process_security_status( struct wl_private *lp ); |
102 | 102 | ||
103 | unsigned int wl_atoi( char *string ); | ||
104 | |||
105 | #endif // __WL_UTIL_H__ | 103 | #endif // __WL_UTIL_H__ |
diff --git a/drivers/staging/wlan-ng/Kconfig b/drivers/staging/wlan-ng/Kconfig index f44294b0d8dc..82fcc1665e92 100644 --- a/drivers/staging/wlan-ng/Kconfig +++ b/drivers/staging/wlan-ng/Kconfig | |||
@@ -1,6 +1,8 @@ | |||
1 | config PRISM2_USB | 1 | config PRISM2_USB |
2 | tristate "Prism2.5/3 USB driver" | 2 | tristate "Prism2.5/3 USB driver" |
3 | depends on WLAN && USB && WIRELESS_EXT | 3 | depends on WLAN && USB |
4 | select WIRELESS_EXT | ||
5 | select WEXT_PRIV | ||
4 | default n | 6 | default n |
5 | ---help--- | 7 | ---help--- |
6 | This is the wlan-ng prism 2.5/3 USB driver for a wide range of | 8 | This is the wlan-ng prism 2.5/3 USB driver for a wide range of |
diff --git a/drivers/staging/wlan-ng/hfa384x.h b/drivers/staging/wlan-ng/hfa384x.h index 46cce8159e59..1fa42e01e8cb 100644 --- a/drivers/staging/wlan-ng/hfa384x.h +++ b/drivers/staging/wlan-ng/hfa384x.h | |||
@@ -61,17 +61,17 @@ | |||
61 | #include <linux/if_ether.h> | 61 | #include <linux/if_ether.h> |
62 | 62 | ||
63 | /*--- Mins & Maxs -----------------------------------*/ | 63 | /*--- Mins & Maxs -----------------------------------*/ |
64 | #define HFA384x_PORTID_MAX ((u16)7) | 64 | #define HFA384x_PORTID_MAX ((u16)7) |
65 | #define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1)) | 65 | #define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1)) |
66 | #define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ | 66 | #define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ |
67 | #define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ | 67 | #define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ |
68 | #define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK */ | 68 | #define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK*/ |
69 | #define HFA384x_SCANRESULT_MAX ((u16)31) | 69 | #define HFA384x_SCANRESULT_MAX ((u16)31) |
70 | #define HFA384x_HSCANRESULT_MAX ((u16)31) | 70 | #define HFA384x_HSCANRESULT_MAX ((u16)31) |
71 | #define HFA384x_CHINFORESULT_MAX ((u16)16) | 71 | #define HFA384x_CHINFORESULT_MAX ((u16)16) |
72 | #define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ | 72 | #define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ |
73 | #define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN | 73 | #define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN |
74 | #define HFA384x_USB_RWMEM_MAXLEN 2048 | 74 | #define HFA384x_USB_RWMEM_MAXLEN 2048 |
75 | 75 | ||
76 | /*--- Support Constants -----------------------------*/ | 76 | /*--- Support Constants -----------------------------*/ |
77 | #define HFA384x_PORTTYPE_IBSS ((u16)0) | 77 | #define HFA384x_PORTTYPE_IBSS ((u16)0) |
@@ -115,8 +115,8 @@ | |||
115 | 115 | ||
116 | /* Make a 32-bit flat address from AUX format 16-bit page and offset */ | 116 | /* Make a 32-bit flat address from AUX format 16-bit page and offset */ |
117 | #define HFA384x_ADDR_AUX_MKFLAT(p, o) \ | 117 | #define HFA384x_ADDR_AUX_MKFLAT(p, o) \ |
118 | (((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \ | 118 | ((((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \ |
119 | ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)) | 119 | ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK))) |
120 | 120 | ||
121 | /* Make CMD format offset and page from a 32-bit flat address */ | 121 | /* Make CMD format offset and page from a 32-bit flat address */ |
122 | #define HFA384x_ADDR_CMD_MKPAGE(f) \ | 122 | #define HFA384x_ADDR_CMD_MKPAGE(f) \ |
@@ -135,12 +135,21 @@ | |||
135 | #define HFA384x_DLSTATE_FLASHENABLED 2 | 135 | #define HFA384x_DLSTATE_FLASHENABLED 2 |
136 | 136 | ||
137 | /*--- Register Field Masks --------------------------*/ | 137 | /*--- Register Field Masks --------------------------*/ |
138 | #define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9) | BIT(8))) | 138 | #define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) \ |
139 | #define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) | 139 | | BIT(12) | BIT(11) \ |
140 | | BIT(10) | BIT(9) \ | ||
141 | | BIT(8))) | ||
142 | #define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | \ | ||
143 | BIT(8))) | ||
140 | #define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8))) | 144 | #define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8))) |
141 | #define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0))) | 145 | #define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | \ |
146 | BIT(3) | BIT(2) | \ | ||
147 | BIT(1) | BIT(0))) | ||
142 | 148 | ||
143 | #define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9) | BIT(8))) | 149 | #define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) \ |
150 | | BIT(12) | BIT(11) \ | ||
151 | | BIT(10) | BIT(9) \ | ||
152 | | BIT(8))) | ||
144 | 153 | ||
145 | /*--- Command Code Constants --------------------------*/ | 154 | /*--- Command Code Constants --------------------------*/ |
146 | /*--- Controller Commands --------------------------*/ | 155 | /*--- Controller Commands --------------------------*/ |
@@ -244,8 +253,10 @@ Information RID Lengths: MAC Information | |||
244 | This is the length of JUST the DATA part of the RID (does not | 253 | This is the length of JUST the DATA part of the RID (does not |
245 | include the len or code fields) | 254 | include the len or code fields) |
246 | --------------------------------------------------------------------*/ | 255 | --------------------------------------------------------------------*/ |
247 | #define HFA384x_RID_DBMCOMMSQUALITY_LEN ((u16)sizeof(hfa384x_dbmcommsquality_t)) | 256 | #define HFA384x_RID_DBMCOMMSQUALITY_LEN \ |
248 | #define HFA384x_RID_JOINREQUEST_LEN ((u16)sizeof(hfa384x_JoinRequest_data_t)) | 257 | ((u16) sizeof(hfa384x_dbmcommsquality_t)) |
258 | #define HFA384x_RID_JOINREQUEST_LEN \ | ||
259 | ((u16)sizeof(hfa384x_JoinRequest_data_t)) | ||
249 | 260 | ||
250 | /*-------------------------------------------------------------------- | 261 | /*-------------------------------------------------------------------- |
251 | Information RIDs: Modem Information | 262 | Information RIDs: Modem Information |
@@ -322,9 +333,11 @@ PD Record codes | |||
322 | 333 | ||
323 | /*--- Register Test/Get/Set Field macros ------------------------*/ | 334 | /*--- Register Test/Get/Set Field macros ------------------------*/ |
324 | 335 | ||
325 | #define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) | 336 | #define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) |
326 | #define HFA384x_CMD_MACPORT_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) | 337 | #define HFA384x_CMD_MACPORT_SET(value) \ |
327 | #define HFA384x_CMD_PROGMODE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | 338 | ((u16)HFA384x_CMD_AINFO_SET(value)) |
339 | #define HFA384x_CMD_PROGMODE_SET(value) \ | ||
340 | ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | ||
328 | #define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) | 341 | #define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) |
329 | 342 | ||
330 | #define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) | 343 | #define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) |
@@ -402,7 +415,7 @@ typedef struct hfa384x_authenticateStation_data { | |||
402 | /*-- Configuration Record: WPAData (data portion only) --*/ | 415 | /*-- Configuration Record: WPAData (data portion only) --*/ |
403 | typedef struct hfa384x_WPAData { | 416 | typedef struct hfa384x_WPAData { |
404 | u16 datalen; | 417 | u16 datalen; |
405 | u8 data[0]; // max 80 | 418 | u8 data[0]; /* max 80 */ |
406 | } __attribute__ ((packed)) hfa384x_WPAData_t; | 419 | } __attribute__ ((packed)) hfa384x_WPAData_t; |
407 | 420 | ||
408 | /*-------------------------------------------------------------------- | 421 | /*-------------------------------------------------------------------- |
@@ -479,7 +492,8 @@ Communication Frames: Field Masks for Transmit Frames | |||
479 | #define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1)) | 492 | #define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1)) |
480 | #define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0)) | 493 | #define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0)) |
481 | /*-- Transmit Control Field --*/ | 494 | /*-- Transmit Control Field --*/ |
482 | #define HFA384x_TX_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) | 495 | #define HFA384x_TX_MACPORT ((u16)(BIT(10) | \ |
496 | BIT(9) | BIT(8))) | ||
483 | #define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3))) | 497 | #define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3))) |
484 | #define HFA384x_TX_TXEX ((u16)BIT(2)) | 498 | #define HFA384x_TX_TXEX ((u16)BIT(2)) |
485 | #define HFA384x_TX_TXOK ((u16)BIT(1)) | 499 | #define HFA384x_TX_TXOK ((u16)BIT(1)) |
@@ -496,7 +510,8 @@ Communication Frames: Test/Get/Set Field Values for Transmit Frames | |||
496 | #define HFA384x_TX_SET(v, m, s) ((((u16)(v))<<((u16)(s)))&((u16)(m))) | 510 | #define HFA384x_TX_SET(v, m, s) ((((u16)(v))<<((u16)(s)))&((u16)(m))) |
497 | 511 | ||
498 | #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) | 512 | #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) |
499 | #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, HFA384x_TX_STRUCTYPE, 3) | 513 | #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \ |
514 | HFA384x_TX_STRUCTYPE, 3) | ||
500 | #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) | 515 | #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) |
501 | #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) | 516 | #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) |
502 | /*-------------------------------------------------------------------- | 517 | /*-------------------------------------------------------------------- |
@@ -534,13 +549,17 @@ Communication Frames: Field Masks for Receive Frames | |||
534 | --------------------------------------------------------------------*/ | 549 | --------------------------------------------------------------------*/ |
535 | 550 | ||
536 | /*-- Status Fields --*/ | 551 | /*-- Status Fields --*/ |
537 | #define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) | 552 | #define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | \ |
553 | BIT(9) | \ | ||
554 | BIT(8))) | ||
538 | #define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0)) | 555 | #define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0)) |
539 | /*-------------------------------------------------------------------- | 556 | /*-------------------------------------------------------------------- |
540 | Communication Frames: Test/Get/Set Field Values for Receive Frames | 557 | Communication Frames: Test/Get/Set Field Values for Receive Frames |
541 | --------------------------------------------------------------------*/ | 558 | --------------------------------------------------------------------*/ |
542 | #define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8)) | 559 | #define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \ |
543 | #define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_FCSERR)) | 560 | & HFA384x_RXSTATUS_MACPORT) >> 8)) |
561 | #define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \ | ||
562 | & HFA384x_RXSTATUS_FCSERR)) | ||
544 | /*-------------------------------------------------------------------- | 563 | /*-------------------------------------------------------------------- |
545 | FRAME STRUCTURES: Information Types and Information Frame Structures | 564 | FRAME STRUCTURES: Information Types and Information Frame Structures |
546 | ---------------------------------------------------------------------- | 565 | ---------------------------------------------------------------------- |
@@ -1133,7 +1152,7 @@ struct hfa384x; | |||
1133 | 1152 | ||
1134 | typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *); | 1153 | typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *); |
1135 | 1154 | ||
1136 | typedef void (*ctlx_usercb_t) (struct hfa384x * hw, | 1155 | typedef void (*ctlx_usercb_t) (struct hfa384x *hw, |
1137 | void *ctlxresult, void *usercb_data); | 1156 | void *ctlxresult, void *usercb_data); |
1138 | 1157 | ||
1139 | typedef struct hfa384x_usbctlx { | 1158 | typedef struct hfa384x_usbctlx { |
@@ -1174,14 +1193,14 @@ typedef struct hfa484x_metacmd { | |||
1174 | } hfa384x_metacmd_t; | 1193 | } hfa384x_metacmd_t; |
1175 | 1194 | ||
1176 | #define MAX_GRP_ADDR 32 | 1195 | #define MAX_GRP_ADDR 32 |
1177 | #define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ | 1196 | #define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ |
1178 | 1197 | ||
1179 | #define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ | 1198 | #define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ |
1180 | #define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ | 1199 | #define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ |
1181 | #define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ | 1200 | #define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ |
1182 | #define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ | 1201 | #define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ |
1183 | #define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ | 1202 | #define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ |
1184 | #define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ | 1203 | #define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ |
1185 | 1204 | ||
1186 | /* XXX These are going away ASAP */ | 1205 | /* XXX These are going away ASAP */ |
1187 | typedef struct prism2sta_authlist { | 1206 | typedef struct prism2sta_authlist { |
@@ -1294,10 +1313,23 @@ typedef struct hfa384x { | |||
1294 | hfa384x_caplevel_t cap_sup_ap; | 1313 | hfa384x_caplevel_t cap_sup_ap; |
1295 | 1314 | ||
1296 | /* Actor compatibility ranges */ | 1315 | /* Actor compatibility ranges */ |
1297 | hfa384x_caplevel_t cap_act_pri_cfi; /* pri f/w to controller interface */ | 1316 | hfa384x_caplevel_t cap_act_pri_cfi; /* |
1298 | hfa384x_caplevel_t cap_act_sta_cfi; /* sta f/w to controller interface */ | 1317 | * pri f/w to controller |
1318 | * interface | ||
1319 | */ | ||
1320 | |||
1321 | hfa384x_caplevel_t cap_act_sta_cfi; /* | ||
1322 | * sta f/w to controller | ||
1323 | * interface | ||
1324 | */ | ||
1325 | |||
1299 | hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */ | 1326 | hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */ |
1300 | hfa384x_caplevel_t cap_act_ap_cfi; /* ap f/w to controller interface */ | 1327 | |
1328 | hfa384x_caplevel_t cap_act_ap_cfi; /* | ||
1329 | * ap f/w to controller | ||
1330 | * interface | ||
1331 | */ | ||
1332 | |||
1301 | hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */ | 1333 | hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */ |
1302 | 1334 | ||
1303 | u32 psusercount; /* Power save user count. */ | 1335 | u32 psusercount; /* Power save user count. */ |
@@ -1320,25 +1352,25 @@ typedef struct hfa384x { | |||
1320 | 1352 | ||
1321 | } hfa384x_t; | 1353 | } hfa384x_t; |
1322 | 1354 | ||
1323 | void hfa384x_create(hfa384x_t * hw, struct usb_device *usb); | 1355 | void hfa384x_create(hfa384x_t *hw, struct usb_device *usb); |
1324 | void hfa384x_destroy(hfa384x_t * hw); | 1356 | void hfa384x_destroy(hfa384x_t *hw); |
1325 | 1357 | ||
1326 | int | 1358 | int |
1327 | hfa384x_corereset(hfa384x_t * hw, int holdtime, int settletime, int genesis); | 1359 | hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis); |
1328 | int hfa384x_drvr_commtallies(hfa384x_t * hw); | 1360 | int hfa384x_drvr_commtallies(hfa384x_t *hw); |
1329 | int hfa384x_drvr_disable(hfa384x_t * hw, u16 macport); | 1361 | int hfa384x_drvr_disable(hfa384x_t *hw, u16 macport); |
1330 | int hfa384x_drvr_enable(hfa384x_t * hw, u16 macport); | 1362 | int hfa384x_drvr_enable(hfa384x_t *hw, u16 macport); |
1331 | int hfa384x_drvr_flashdl_enable(hfa384x_t * hw); | 1363 | int hfa384x_drvr_flashdl_enable(hfa384x_t *hw); |
1332 | int hfa384x_drvr_flashdl_disable(hfa384x_t * hw); | 1364 | int hfa384x_drvr_flashdl_disable(hfa384x_t *hw); |
1333 | int hfa384x_drvr_flashdl_write(hfa384x_t * hw, u32 daddr, void *buf, u32 len); | 1365 | int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len); |
1334 | int hfa384x_drvr_getconfig(hfa384x_t * hw, u16 rid, void *buf, u16 len); | 1366 | int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
1335 | int hfa384x_drvr_ramdl_enable(hfa384x_t * hw, u32 exeaddr); | 1367 | int hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr); |
1336 | int hfa384x_drvr_ramdl_disable(hfa384x_t * hw); | 1368 | int hfa384x_drvr_ramdl_disable(hfa384x_t *hw); |
1337 | int hfa384x_drvr_ramdl_write(hfa384x_t * hw, u32 daddr, void *buf, u32 len); | 1369 | int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len); |
1338 | int hfa384x_drvr_readpda(hfa384x_t * hw, void *buf, unsigned int len); | 1370 | int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len); |
1339 | int hfa384x_drvr_setconfig(hfa384x_t * hw, u16 rid, void *buf, u16 len); | 1371 | int hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
1340 | 1372 | ||
1341 | static inline int hfa384x_drvr_getconfig16(hfa384x_t * hw, u16 rid, void *val) | 1373 | static inline int hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val) |
1342 | { | 1374 | { |
1343 | int result = 0; | 1375 | int result = 0; |
1344 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); | 1376 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); |
@@ -1347,46 +1379,46 @@ static inline int hfa384x_drvr_getconfig16(hfa384x_t * hw, u16 rid, void *val) | |||
1347 | return result; | 1379 | return result; |
1348 | } | 1380 | } |
1349 | 1381 | ||
1350 | static inline int hfa384x_drvr_setconfig16(hfa384x_t * hw, u16 rid, u16 val) | 1382 | static inline int hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val) |
1351 | { | 1383 | { |
1352 | u16 value = cpu_to_le16(val); | 1384 | u16 value = cpu_to_le16(val); |
1353 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); | 1385 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
1354 | } | 1386 | } |
1355 | 1387 | ||
1356 | int | 1388 | int |
1357 | hfa384x_drvr_getconfig_async(hfa384x_t * hw, | 1389 | hfa384x_drvr_getconfig_async(hfa384x_t *hw, |
1358 | u16 rid, ctlx_usercb_t usercb, void *usercb_data); | 1390 | u16 rid, ctlx_usercb_t usercb, void *usercb_data); |
1359 | 1391 | ||
1360 | int | 1392 | int |
1361 | hfa384x_drvr_setconfig_async(hfa384x_t * hw, | 1393 | hfa384x_drvr_setconfig_async(hfa384x_t *hw, |
1362 | u16 rid, | 1394 | u16 rid, |
1363 | void *buf, | 1395 | void *buf, |
1364 | u16 len, ctlx_usercb_t usercb, void *usercb_data); | 1396 | u16 len, ctlx_usercb_t usercb, void *usercb_data); |
1365 | 1397 | ||
1366 | static inline int | 1398 | static inline int |
1367 | hfa384x_drvr_setconfig16_async(hfa384x_t * hw, u16 rid, u16 val) | 1399 | hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val) |
1368 | { | 1400 | { |
1369 | u16 value = cpu_to_le16(val); | 1401 | u16 value = cpu_to_le16(val); |
1370 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), | 1402 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
1371 | NULL, NULL); | 1403 | NULL, NULL); |
1372 | } | 1404 | } |
1373 | 1405 | ||
1374 | int hfa384x_drvr_start(hfa384x_t * hw); | 1406 | int hfa384x_drvr_start(hfa384x_t *hw); |
1375 | int hfa384x_drvr_stop(hfa384x_t * hw); | 1407 | int hfa384x_drvr_stop(hfa384x_t *hw); |
1376 | int | 1408 | int |
1377 | hfa384x_drvr_txframe(hfa384x_t * hw, struct sk_buff *skb, | 1409 | hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb, |
1378 | p80211_hdr_t * p80211_hdr, p80211_metawep_t * p80211_wep); | 1410 | p80211_hdr_t *p80211_hdr, p80211_metawep_t *p80211_wep); |
1379 | void hfa384x_tx_timeout(wlandevice_t * wlandev); | 1411 | void hfa384x_tx_timeout(wlandevice_t *wlandev); |
1380 | 1412 | ||
1381 | int hfa384x_cmd_initialize(hfa384x_t * hw); | 1413 | int hfa384x_cmd_initialize(hfa384x_t *hw); |
1382 | int hfa384x_cmd_enable(hfa384x_t * hw, u16 macport); | 1414 | int hfa384x_cmd_enable(hfa384x_t *hw, u16 macport); |
1383 | int hfa384x_cmd_disable(hfa384x_t * hw, u16 macport); | 1415 | int hfa384x_cmd_disable(hfa384x_t *hw, u16 macport); |
1384 | int hfa384x_cmd_allocate(hfa384x_t * hw, u16 len); | 1416 | int hfa384x_cmd_allocate(hfa384x_t *hw, u16 len); |
1385 | int hfa384x_cmd_monitor(hfa384x_t * hw, u16 enable); | 1417 | int hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable); |
1386 | int | 1418 | int |
1387 | hfa384x_cmd_download(hfa384x_t * hw, | 1419 | hfa384x_cmd_download(hfa384x_t *hw, |
1388 | u16 mode, u16 lowaddr, u16 highaddr, u16 codelen); | 1420 | u16 mode, u16 lowaddr, u16 highaddr, u16 codelen); |
1389 | 1421 | ||
1390 | #endif /* __KERNEL__ */ | 1422 | #endif /*__KERNEL__ */ |
1391 | 1423 | ||
1392 | #endif /* _HFA384x_H */ | 1424 | #endif /*_HFA384x_H */ |
diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c index 925678babd9e..5df56f0238d6 100644 --- a/drivers/staging/wlan-ng/hfa384x_usb.c +++ b/drivers/staging/wlan-ng/hfa384x_usb.c | |||
@@ -52,7 +52,7 @@ | |||
52 | * around the register accesses. The next higher level represents C-callable | 52 | * around the register accesses. The next higher level represents C-callable |
53 | * prism2 API functions that match the Intersil documentation as closely | 53 | * prism2 API functions that match the Intersil documentation as closely |
54 | * as is reasonable. The next higher layer implements common sequences | 54 | * as is reasonable. The next higher layer implements common sequences |
55 | * of invokations of the API layer (e.g. write to bap, followed by cmd). | 55 | * of invocations of the API layer (e.g. write to bap, followed by cmd). |
56 | * | 56 | * |
57 | * Common sequences: | 57 | * Common sequences: |
58 | * hfa384x_drvr_xxx Highest level abstractions provided by the | 58 | * hfa384x_drvr_xxx Highest level abstractions provided by the |
@@ -118,15 +118,15 @@ | |||
118 | #include <linux/wireless.h> | 118 | #include <linux/wireless.h> |
119 | #include <linux/netdevice.h> | 119 | #include <linux/netdevice.h> |
120 | #include <linux/timer.h> | 120 | #include <linux/timer.h> |
121 | #include <asm/io.h> | 121 | #include <linux/io.h> |
122 | #include <linux/delay.h> | 122 | #include <linux/delay.h> |
123 | #include <asm/byteorder.h> | 123 | #include <asm/byteorder.h> |
124 | #include <asm/bitops.h> | 124 | #include <linux/bitops.h> |
125 | #include <linux/list.h> | 125 | #include <linux/list.h> |
126 | #include <linux/usb.h> | 126 | #include <linux/usb.h> |
127 | #include <linux/byteorder/generic.h> | 127 | #include <linux/byteorder/generic.h> |
128 | 128 | ||
129 | #define SUBMIT_URB(u,f) usb_submit_urb(u,f) | 129 | #define SUBMIT_URB(u, f) usb_submit_urb(u, f) |
130 | 130 | ||
131 | #include "p80211types.h" | 131 | #include "p80211types.h" |
132 | #include "p80211hdr.h" | 132 | #include "p80211hdr.h" |
@@ -627,7 +627,7 @@ static hfa384x_usbctlx_t *usbctlx_alloc(void) | |||
627 | { | 627 | { |
628 | hfa384x_usbctlx_t *ctlx; | 628 | hfa384x_usbctlx_t *ctlx; |
629 | 629 | ||
630 | ctlx = kmalloc(sizeof(*ctlx), in_interrupt()? GFP_ATOMIC : GFP_KERNEL); | 630 | ctlx = kmalloc(sizeof(*ctlx), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); |
631 | if (ctlx != NULL) { | 631 | if (ctlx != NULL) { |
632 | memset(ctlx, 0, sizeof(*ctlx)); | 632 | memset(ctlx, 0, sizeof(*ctlx)); |
633 | init_completion(&ctlx->done); | 633 | init_completion(&ctlx->done); |
@@ -675,7 +675,7 @@ struct usbctlx_cmd_completor { | |||
675 | }; | 675 | }; |
676 | typedef struct usbctlx_cmd_completor usbctlx_cmd_completor_t; | 676 | typedef struct usbctlx_cmd_completor usbctlx_cmd_completor_t; |
677 | 677 | ||
678 | static int usbctlx_cmd_completor_fn(usbctlx_completor_t * head) | 678 | static int usbctlx_cmd_completor_fn(usbctlx_completor_t *head) |
679 | { | 679 | { |
680 | usbctlx_cmd_completor_t *complete = (usbctlx_cmd_completor_t *) head; | 680 | usbctlx_cmd_completor_t *complete = (usbctlx_cmd_completor_t *) head; |
681 | return usbctlx_get_status(complete->cmdresp, complete->result); | 681 | return usbctlx_get_status(complete->cmdresp, complete->result); |
@@ -1909,18 +1909,19 @@ int hfa384x_drvr_flashdl_enable(hfa384x_t *hw) | |||
1909 | return -EINVAL; | 1909 | return -EINVAL; |
1910 | 1910 | ||
1911 | /* Retrieve the buffer loc&size and timeout */ | 1911 | /* Retrieve the buffer loc&size and timeout */ |
1912 | if ((result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DOWNLOADBUFFER, | 1912 | result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DOWNLOADBUFFER, |
1913 | &(hw->bufinfo), | 1913 | &(hw->bufinfo), sizeof(hw->bufinfo)); |
1914 | sizeof(hw->bufinfo)))) { | 1914 | if (result) |
1915 | return result; | 1915 | return result; |
1916 | } | 1916 | |
1917 | hw->bufinfo.page = le16_to_cpu(hw->bufinfo.page); | 1917 | hw->bufinfo.page = le16_to_cpu(hw->bufinfo.page); |
1918 | hw->bufinfo.offset = le16_to_cpu(hw->bufinfo.offset); | 1918 | hw->bufinfo.offset = le16_to_cpu(hw->bufinfo.offset); |
1919 | hw->bufinfo.len = le16_to_cpu(hw->bufinfo.len); | 1919 | hw->bufinfo.len = le16_to_cpu(hw->bufinfo.len); |
1920 | if ((result = hfa384x_drvr_getconfig16(hw, HFA384x_RID_MAXLOADTIME, | 1920 | result = hfa384x_drvr_getconfig16(hw, HFA384x_RID_MAXLOADTIME, |
1921 | &(hw->dltimeout)))) { | 1921 | &(hw->dltimeout)); |
1922 | if (result) | ||
1922 | return result; | 1923 | return result; |
1923 | } | 1924 | |
1924 | hw->dltimeout = le16_to_cpu(hw->dltimeout); | 1925 | hw->dltimeout = le16_to_cpu(hw->dltimeout); |
1925 | 1926 | ||
1926 | pr_debug("flashdl_enable\n"); | 1927 | pr_debug("flashdl_enable\n"); |
@@ -3071,9 +3072,9 @@ static void hfa384x_usbctlxq_run(hfa384x_t *hw) | |||
3071 | hfa384x_ctlxout_callback, hw); | 3072 | hfa384x_ctlxout_callback, hw); |
3072 | hw->ctlx_urb.transfer_flags |= USB_QUEUE_BULK; | 3073 | hw->ctlx_urb.transfer_flags |= USB_QUEUE_BULK; |
3073 | 3074 | ||
3074 | /* Now submit the URB and update the CTLX's state | 3075 | /* Now submit the URB and update the CTLX's state */ |
3075 | */ | 3076 | result = SUBMIT_URB(&hw->ctlx_urb, GFP_ATOMIC); |
3076 | if ((result = SUBMIT_URB(&hw->ctlx_urb, GFP_ATOMIC)) == 0) { | 3077 | if (result == 0) { |
3077 | /* This CTLX is now running on the active queue */ | 3078 | /* This CTLX is now running on the active queue */ |
3078 | head->state = CTLX_REQ_SUBMITTED; | 3079 | head->state = CTLX_REQ_SUBMITTED; |
3079 | 3080 | ||
@@ -3599,7 +3600,8 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev, | |||
3599 | skblen - sizeof(p80211_caphdr_t)); | 3600 | skblen - sizeof(p80211_caphdr_t)); |
3600 | } | 3601 | } |
3601 | 3602 | ||
3602 | if ((skb = dev_alloc_skb(skblen)) == NULL) { | 3603 | skb = dev_alloc_skb(skblen); |
3604 | if (skb == NULL) { | ||
3603 | printk(KERN_ERR | 3605 | printk(KERN_ERR |
3604 | "alloc_skb failed trying to allocate %d bytes\n", | 3606 | "alloc_skb failed trying to allocate %d bytes\n", |
3605 | skblen); | 3607 | skblen); |
@@ -3642,7 +3644,7 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev, | |||
3642 | /* check for unencrypted stuff if WEP bit set. */ | 3644 | /* check for unencrypted stuff if WEP bit set. */ |
3643 | if (*(datap - hdrlen + 1) & 0x40) /* wep set */ | 3645 | if (*(datap - hdrlen + 1) & 0x40) /* wep set */ |
3644 | if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa)) | 3646 | if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa)) |
3645 | *(datap - hdrlen + 1) &= 0xbf; // clear wep; it's the 802.2 header! | 3647 | *(datap - hdrlen + 1) &= 0xbf; /* clear wep; it's the 802.2 header! */ |
3646 | } | 3648 | } |
3647 | 3649 | ||
3648 | if (hw->sniff_fcs) { | 3650 | if (hw->sniff_fcs) { |
@@ -3870,9 +3872,9 @@ retry: | |||
3870 | 3872 | ||
3871 | delresp: | 3873 | delresp: |
3872 | if (delete_resptimer) { | 3874 | if (delete_resptimer) { |
3873 | if ((timer_ok = del_timer(&hw->resptimer)) != 0) { | 3875 | timer_ok = del_timer(&hw->resptimer); |
3876 | if (timer_ok != 0) | ||
3874 | hw->resp_timer_done = 1; | 3877 | hw->resp_timer_done = 1; |
3875 | } | ||
3876 | } | 3878 | } |
3877 | 3879 | ||
3878 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | 3880 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
diff --git a/drivers/staging/wlan-ng/p80211conv.c b/drivers/staging/wlan-ng/p80211conv.c index 5952c671073f..a1605fbc8092 100644 --- a/drivers/staging/wlan-ng/p80211conv.c +++ b/drivers/staging/wlan-ng/p80211conv.c | |||
@@ -206,12 +206,11 @@ int skb_ether_to_p80211(wlandevice_t *wlandev, u32 ethconv, | |||
206 | /* XXXX need to pick keynum other than default? */ | 206 | /* XXXX need to pick keynum other than default? */ |
207 | 207 | ||
208 | p80211_wep->data = kmalloc(skb->len, GFP_ATOMIC); | 208 | p80211_wep->data = kmalloc(skb->len, GFP_ATOMIC); |
209 | 209 | foo = wep_encrypt(wlandev, skb->data, p80211_wep->data, | |
210 | if ((foo = wep_encrypt(wlandev, skb->data, p80211_wep->data, | 210 | skb->len, |
211 | skb->len, | 211 | (wlandev->hostwep &HOSTWEP_DEFAULTKEY_MASK), |
212 | (wlandev->hostwep & | 212 | p80211_wep->iv, p80211_wep->icv); |
213 | HOSTWEP_DEFAULTKEY_MASK), | 213 | if (foo) { |
214 | p80211_wep->iv, p80211_wep->icv))) { | ||
215 | printk(KERN_WARNING | 214 | printk(KERN_WARNING |
216 | "Host en-WEP failed, dropping frame (%d).\n", | 215 | "Host en-WEP failed, dropping frame (%d).\n", |
217 | foo); | 216 | foo); |
@@ -323,11 +322,12 @@ int skb_p80211_to_ether(wlandevice_t *wlandev, u32 ethconv, | |||
323 | skb->len); | 322 | skb->len); |
324 | return 1; | 323 | return 1; |
325 | } | 324 | } |
326 | if ((foo = wep_decrypt(wlandev, skb->data + payload_offset + 4, | 325 | foo = wep_decrypt(wlandev, skb->data + payload_offset + 4, |
327 | payload_length - 8, -1, | 326 | payload_length - 8, -1, |
328 | skb->data + payload_offset, | 327 | skb->data + payload_offset, |
329 | skb->data + payload_offset + | 328 | skb->data + payload_offset + |
330 | payload_length - 4))) { | 329 | payload_length - 4); |
330 | if (foo) { | ||
331 | /* de-wep failed, drop skb. */ | 331 | /* de-wep failed, drop skb. */ |
332 | pr_debug("Host de-WEP failed, dropping frame (%d).\n", | 332 | pr_debug("Host de-WEP failed, dropping frame (%d).\n", |
333 | foo); | 333 | foo); |
diff --git a/drivers/staging/wlan-ng/p80211conv.h b/drivers/staging/wlan-ng/p80211conv.h index 0c62df19fa7f..6fe163be24f6 100644 --- a/drivers/staging/wlan-ng/p80211conv.h +++ b/drivers/staging/wlan-ng/p80211conv.h | |||
@@ -153,8 +153,8 @@ struct wlandevice; | |||
153 | int skb_p80211_to_ether(struct wlandevice *wlandev, u32 ethconv, | 153 | int skb_p80211_to_ether(struct wlandevice *wlandev, u32 ethconv, |
154 | struct sk_buff *skb); | 154 | struct sk_buff *skb); |
155 | int skb_ether_to_p80211(struct wlandevice *wlandev, u32 ethconv, | 155 | int skb_ether_to_p80211(struct wlandevice *wlandev, u32 ethconv, |
156 | struct sk_buff *skb, p80211_hdr_t * p80211_hdr, | 156 | struct sk_buff *skb, p80211_hdr_t *p80211_hdr, |
157 | p80211_metawep_t * p80211_wep); | 157 | p80211_metawep_t *p80211_wep); |
158 | 158 | ||
159 | int p80211_stt_findproto(u16 proto); | 159 | int p80211_stt_findproto(u16 proto); |
160 | 160 | ||
diff --git a/drivers/staging/wlan-ng/p80211metadef.h b/drivers/staging/wlan-ng/p80211metadef.h index da8b6f53c74f..0ccfba1294de 100644 --- a/drivers/staging/wlan-ng/p80211metadef.h +++ b/drivers/staging/wlan-ng/p80211metadef.h | |||
@@ -190,9 +190,9 @@ | |||
190 | (P80211DID_MKSECTION(2) | \ | 190 | (P80211DID_MKSECTION(2) | \ |
191 | P80211DID_MKGROUP(1)) | 191 | P80211DID_MKGROUP(1)) |
192 | #define DIDmib_dot11mac_dot11OperationTable_dot11MACAddress \ | 192 | #define DIDmib_dot11mac_dot11OperationTable_dot11MACAddress \ |
193 | (P80211DID_MKSECTION(2) | \ | 193 | (P80211DID_MKSECTION(2) | \ |
194 | P80211DID_MKGROUP(1) | \ | 194 | P80211DID_MKGROUP(1) | \ |
195 | P80211DID_MKITEM(1) | 0x18000000) | 195 | P80211DID_MKITEM(1) | 0x18000000) |
196 | #define DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold \ | 196 | #define DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold \ |
197 | (P80211DID_MKSECTION(2) | \ | 197 | (P80211DID_MKSECTION(2) | \ |
198 | P80211DID_MKGROUP(1) | \ | 198 | P80211DID_MKGROUP(1) | \ |
@@ -210,18 +210,18 @@ | |||
210 | P80211DID_MKGROUP(1) | \ | 210 | P80211DID_MKGROUP(1) | \ |
211 | P80211DID_MKITEM(5) | 0x18000000) | 211 | P80211DID_MKITEM(5) | 0x18000000) |
212 | #define DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime \ | 212 | #define DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime \ |
213 | (P80211DID_MKSECTION(2) | \ | 213 | (P80211DID_MKSECTION(2) | \ |
214 | P80211DID_MKGROUP(1) | \ | 214 | P80211DID_MKGROUP(1) | \ |
215 | P80211DID_MKITEM(6) | 0x10000000) | 215 | P80211DID_MKITEM(6) | 0x10000000) |
216 | #define DIDmib_cat_dot11phy \ | 216 | #define DIDmib_cat_dot11phy \ |
217 | P80211DID_MKSECTION(3) | 217 | P80211DID_MKSECTION(3) |
218 | #define DIDmib_dot11phy_dot11PhyOperationTable \ | 218 | #define DIDmib_dot11phy_dot11PhyOperationTable \ |
219 | (P80211DID_MKSECTION(3) | \ | 219 | (P80211DID_MKSECTION(3) | \ |
220 | P80211DID_MKGROUP(1)) | 220 | P80211DID_MKGROUP(1)) |
221 | #define DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel \ | 221 | #define DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel \ |
222 | (P80211DID_MKSECTION(3) | \ | 222 | (P80211DID_MKSECTION(3) | \ |
223 | P80211DID_MKGROUP(3) | \ | 223 | P80211DID_MKGROUP(3) | \ |
224 | P80211DID_MKITEM(10) | 0x18000000) | 224 | P80211DID_MKITEM(10) | 0x18000000) |
225 | #define DIDmib_dot11phy_dot11PhyDSSSTable \ | 225 | #define DIDmib_dot11phy_dot11PhyDSSSTable \ |
226 | (P80211DID_MKSECTION(3) | \ | 226 | (P80211DID_MKSECTION(3) | \ |
227 | P80211DID_MKGROUP(5)) | 227 | P80211DID_MKGROUP(5)) |
diff --git a/drivers/staging/wlan-ng/p80211mgmt.h b/drivers/staging/wlan-ng/p80211mgmt.h index 14cdc86d1676..deb52f5fd780 100644 --- a/drivers/staging/wlan-ng/p80211mgmt.h +++ b/drivers/staging/wlan-ng/p80211mgmt.h | |||
@@ -100,7 +100,7 @@ | |||
100 | #ifndef _P80211MGMT_H | 100 | #ifndef _P80211MGMT_H |
101 | #define _P80211MGMT_H | 101 | #define _P80211MGMT_H |
102 | 102 | ||
103 | #ifndef _P80211HDR_H | 103 | #ifndef _P80211HDR_H |
104 | #include "p80211hdr.h" | 104 | #include "p80211hdr.h" |
105 | #endif | 105 | #endif |
106 | 106 | ||
@@ -496,25 +496,25 @@ typedef struct wlan_fr_deauthen { | |||
496 | 496 | ||
497 | } wlan_fr_deauthen_t; | 497 | } wlan_fr_deauthen_t; |
498 | 498 | ||
499 | void wlan_mgmt_encode_beacon(wlan_fr_beacon_t * f); | 499 | void wlan_mgmt_encode_beacon(wlan_fr_beacon_t *f); |
500 | void wlan_mgmt_decode_beacon(wlan_fr_beacon_t * f); | 500 | void wlan_mgmt_decode_beacon(wlan_fr_beacon_t *f); |
501 | void wlan_mgmt_encode_disassoc(wlan_fr_disassoc_t * f); | 501 | void wlan_mgmt_encode_disassoc(wlan_fr_disassoc_t *f); |
502 | void wlan_mgmt_decode_disassoc(wlan_fr_disassoc_t * f); | 502 | void wlan_mgmt_decode_disassoc(wlan_fr_disassoc_t *f); |
503 | void wlan_mgmt_encode_assocreq(wlan_fr_assocreq_t * f); | 503 | void wlan_mgmt_encode_assocreq(wlan_fr_assocreq_t *f); |
504 | void wlan_mgmt_decode_assocreq(wlan_fr_assocreq_t * f); | 504 | void wlan_mgmt_decode_assocreq(wlan_fr_assocreq_t *f); |
505 | void wlan_mgmt_encode_assocresp(wlan_fr_assocresp_t * f); | 505 | void wlan_mgmt_encode_assocresp(wlan_fr_assocresp_t *f); |
506 | void wlan_mgmt_decode_assocresp(wlan_fr_assocresp_t * f); | 506 | void wlan_mgmt_decode_assocresp(wlan_fr_assocresp_t *f); |
507 | void wlan_mgmt_encode_reassocreq(wlan_fr_reassocreq_t * f); | 507 | void wlan_mgmt_encode_reassocreq(wlan_fr_reassocreq_t *f); |
508 | void wlan_mgmt_decode_reassocreq(wlan_fr_reassocreq_t * f); | 508 | void wlan_mgmt_decode_reassocreq(wlan_fr_reassocreq_t *f); |
509 | void wlan_mgmt_encode_reassocresp(wlan_fr_reassocresp_t * f); | 509 | void wlan_mgmt_encode_reassocresp(wlan_fr_reassocresp_t *f); |
510 | void wlan_mgmt_decode_reassocresp(wlan_fr_reassocresp_t * f); | 510 | void wlan_mgmt_decode_reassocresp(wlan_fr_reassocresp_t *f); |
511 | void wlan_mgmt_encode_probereq(wlan_fr_probereq_t * f); | 511 | void wlan_mgmt_encode_probereq(wlan_fr_probereq_t *f); |
512 | void wlan_mgmt_decode_probereq(wlan_fr_probereq_t * f); | 512 | void wlan_mgmt_decode_probereq(wlan_fr_probereq_t *f); |
513 | void wlan_mgmt_encode_proberesp(wlan_fr_proberesp_t * f); | 513 | void wlan_mgmt_encode_proberesp(wlan_fr_proberesp_t *f); |
514 | void wlan_mgmt_decode_proberesp(wlan_fr_proberesp_t * f); | 514 | void wlan_mgmt_decode_proberesp(wlan_fr_proberesp_t *f); |
515 | void wlan_mgmt_encode_authen(wlan_fr_authen_t * f); | 515 | void wlan_mgmt_encode_authen(wlan_fr_authen_t *f); |
516 | void wlan_mgmt_decode_authen(wlan_fr_authen_t * f); | 516 | void wlan_mgmt_decode_authen(wlan_fr_authen_t *f); |
517 | void wlan_mgmt_encode_deauthen(wlan_fr_deauthen_t * f); | 517 | void wlan_mgmt_encode_deauthen(wlan_fr_deauthen_t *f); |
518 | void wlan_mgmt_decode_deauthen(wlan_fr_deauthen_t * f); | 518 | void wlan_mgmt_decode_deauthen(wlan_fr_deauthen_t *f); |
519 | 519 | ||
520 | #endif /* _P80211MGMT_H */ | 520 | #endif /* _P80211MGMT_H */ |
diff --git a/drivers/staging/wlan-ng/p80211netdev.c b/drivers/staging/wlan-ng/p80211netdev.c index 22424c8903ee..763ab1187a1c 100644 --- a/drivers/staging/wlan-ng/p80211netdev.c +++ b/drivers/staging/wlan-ng/p80211netdev.c | |||
@@ -586,7 +586,8 @@ static int p80211knetdev_do_ioctl(netdevice_t *dev, struct ifreq *ifr, int cmd) | |||
586 | } | 586 | } |
587 | 587 | ||
588 | /* Allocate a buf of size req->len */ | 588 | /* Allocate a buf of size req->len */ |
589 | if ((msgbuf = kmalloc(req->len, GFP_KERNEL))) { | 589 | msgbuf = kmalloc(req->len, GFP_KERNEL); |
590 | if (msgbuf) { | ||
590 | if (copy_from_user(msgbuf, (void __user *)req->data, req->len)) | 591 | if (copy_from_user(msgbuf, (void __user *)req->data, req->len)) |
591 | result = -EFAULT; | 592 | result = -EFAULT; |
592 | else | 593 | else |
@@ -646,7 +647,7 @@ static int p80211knetdev_set_mac_address(netdevice_t *dev, void *addr) | |||
646 | 647 | ||
647 | /* Set up some convenience pointers. */ | 648 | /* Set up some convenience pointers. */ |
648 | mibattr = &dot11req.mibattribute; | 649 | mibattr = &dot11req.mibattribute; |
649 | macaddr = (p80211item_pstr6_t *) & mibattr->data; | 650 | macaddr = (p80211item_pstr6_t *) &mibattr->data; |
650 | resultcode = &dot11req.resultcode; | 651 | resultcode = &dot11req.resultcode; |
651 | 652 | ||
652 | /* Set up a dot11req_mibset */ | 653 | /* Set up a dot11req_mibset */ |
@@ -674,7 +675,7 @@ static int p80211knetdev_set_mac_address(netdevice_t *dev, void *addr) | |||
674 | resultcode->data = 0; | 675 | resultcode->data = 0; |
675 | 676 | ||
676 | /* now fire the request */ | 677 | /* now fire the request */ |
677 | result = p80211req_dorequest(dev->ml_priv, (u8 *) & dot11req); | 678 | result = p80211req_dorequest(dev->ml_priv, (u8 *) &dot11req); |
678 | 679 | ||
679 | /* If the request wasn't successful, report an error and don't | 680 | /* If the request wasn't successful, report an error and don't |
680 | * change the netdev address | 681 | * change the netdev address |
diff --git a/drivers/staging/wlan-ng/p80211netdev.h b/drivers/staging/wlan-ng/p80211netdev.h index 8bd9dfb3b9b4..3c8c64800567 100644 --- a/drivers/staging/wlan-ng/p80211netdev.h +++ b/drivers/staging/wlan-ng/p80211netdev.h | |||
@@ -179,16 +179,16 @@ typedef struct wlandevice { | |||
179 | unsigned int ethconv; | 179 | unsigned int ethconv; |
180 | 180 | ||
181 | /* device methods (init by MSD, used by p80211 */ | 181 | /* device methods (init by MSD, used by p80211 */ |
182 | int (*open) (struct wlandevice * wlandev); | 182 | int (*open) (struct wlandevice *wlandev); |
183 | int (*close) (struct wlandevice * wlandev); | 183 | int (*close) (struct wlandevice *wlandev); |
184 | void (*reset) (struct wlandevice * wlandev); | 184 | void (*reset) (struct wlandevice *wlandev); |
185 | int (*txframe) (struct wlandevice * wlandev, struct sk_buff * skb, | 185 | int (*txframe) (struct wlandevice *wlandev, struct sk_buff *skb, |
186 | p80211_hdr_t * p80211_hdr, | 186 | p80211_hdr_t *p80211_hdr, |
187 | p80211_metawep_t * p80211_wep); | 187 | p80211_metawep_t *p80211_wep); |
188 | int (*mlmerequest) (struct wlandevice * wlandev, p80211msg_t * msg); | 188 | int (*mlmerequest) (struct wlandevice *wlandev, p80211msg_t *msg); |
189 | int (*set_multicast_list) (struct wlandevice * wlandev, | 189 | int (*set_multicast_list) (struct wlandevice *wlandev, |
190 | netdevice_t * dev); | 190 | netdevice_t *dev); |
191 | void (*tx_timeout) (struct wlandevice * wlandev); | 191 | void (*tx_timeout) (struct wlandevice *wlandev); |
192 | 192 | ||
193 | /* 802.11 State */ | 193 | /* 802.11 State */ |
194 | u8 bssid[WLAN_BSSID_LEN]; | 194 | u8 bssid[WLAN_BSSID_LEN]; |
@@ -227,16 +227,16 @@ typedef struct wlandevice { | |||
227 | } wlandevice_t; | 227 | } wlandevice_t; |
228 | 228 | ||
229 | /* WEP stuff */ | 229 | /* WEP stuff */ |
230 | int wep_change_key(wlandevice_t * wlandev, int keynum, u8 * key, int keylen); | 230 | int wep_change_key(wlandevice_t *wlandev, int keynum, u8 *key, int keylen); |
231 | int wep_decrypt(wlandevice_t * wlandev, u8 * buf, u32 len, int key_override, | 231 | int wep_decrypt(wlandevice_t *wlandev, u8 *buf, u32 len, int key_override, |
232 | u8 * iv, u8 * icv); | 232 | u8 *iv, u8 *icv); |
233 | int wep_encrypt(wlandevice_t * wlandev, u8 * buf, u8 * dst, u32 len, int keynum, | 233 | int wep_encrypt(wlandevice_t *wlandev, u8 *buf, u8 *dst, u32 len, int keynum, |
234 | u8 * iv, u8 * icv); | 234 | u8 *iv, u8 *icv); |
235 | 235 | ||
236 | int wlan_setup(wlandevice_t * wlandev); | 236 | int wlan_setup(wlandevice_t *wlandev); |
237 | int wlan_unsetup(wlandevice_t * wlandev); | 237 | int wlan_unsetup(wlandevice_t *wlandev); |
238 | int register_wlandev(wlandevice_t * wlandev); | 238 | int register_wlandev(wlandevice_t *wlandev); |
239 | int unregister_wlandev(wlandevice_t * wlandev); | 239 | int unregister_wlandev(wlandevice_t *wlandev); |
240 | void p80211netdev_rx(wlandevice_t * wlandev, struct sk_buff *skb); | 240 | void p80211netdev_rx(wlandevice_t *wlandev, struct sk_buff *skb); |
241 | void p80211netdev_hwremoved(wlandevice_t * wlandev); | 241 | void p80211netdev_hwremoved(wlandevice_t *wlandev); |
242 | #endif | 242 | #endif |
diff --git a/drivers/staging/wlan-ng/p80211req.c b/drivers/staging/wlan-ng/p80211req.c index c88156cdf681..c2e95f166828 100644 --- a/drivers/staging/wlan-ng/p80211req.c +++ b/drivers/staging/wlan-ng/p80211req.c | |||
@@ -94,7 +94,7 @@ static int p80211req_mibset_mibget(wlandevice_t *wlandev, | |||
94 | * Potentially blocks the caller, so it's a good idea to | 94 | * Potentially blocks the caller, so it's a good idea to |
95 | * not call this function from an interrupt context. | 95 | * not call this function from an interrupt context. |
96 | ----------------------------------------------------------------*/ | 96 | ----------------------------------------------------------------*/ |
97 | int p80211req_dorequest(wlandevice_t * wlandev, u8 * msgbuf) | 97 | int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf) |
98 | { | 98 | { |
99 | int result = 0; | 99 | int result = 0; |
100 | p80211msg_t *msg = (p80211msg_t *) msgbuf; | 100 | p80211msg_t *msg = (p80211msg_t *) msgbuf; |
diff --git a/drivers/staging/wlan-ng/p80211req.h b/drivers/staging/wlan-ng/p80211req.h index 5d9176762ba7..a95a45a6814d 100644 --- a/drivers/staging/wlan-ng/p80211req.h +++ b/drivers/staging/wlan-ng/p80211req.h | |||
@@ -48,6 +48,6 @@ | |||
48 | #ifndef _LINUX_P80211REQ_H | 48 | #ifndef _LINUX_P80211REQ_H |
49 | #define _LINUX_P80211REQ_H | 49 | #define _LINUX_P80211REQ_H |
50 | 50 | ||
51 | int p80211req_dorequest(wlandevice_t * wlandev, u8 * msgbuf); | 51 | int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf); |
52 | 52 | ||
53 | #endif | 53 | #endif |
diff --git a/drivers/staging/wlan-ng/p80211types.h b/drivers/staging/wlan-ng/p80211types.h index 2b83ab0c711b..41a99c59c6c5 100644 --- a/drivers/staging/wlan-ng/p80211types.h +++ b/drivers/staging/wlan-ng/p80211types.h | |||
@@ -168,12 +168,12 @@ | |||
168 | P80211DID_MASK_ISTABLE, \ | 168 | P80211DID_MASK_ISTABLE, \ |
169 | P80211DID_LSB_ISTABLE) | 169 | P80211DID_LSB_ISTABLE) |
170 | 170 | ||
171 | #define P80211DID_MKID(s,g,i,n,t,a) (P80211DID_MKSECTION(s) | \ | 171 | #define P80211DID_MKID(s, g, i, n, t, a) (P80211DID_MKSECTION(s) | \ |
172 | P80211DID_MKGROUP(g) | \ | 172 | P80211DID_MKGROUP(g) | \ |
173 | P80211DID_MKITEM(i) | \ | 173 | P80211DID_MKITEM(i) | \ |
174 | P80211DID_MKINDEX(n) | \ | 174 | P80211DID_MKINDEX(n) | \ |
175 | P80211DID_MKISTABLE(t) | \ | 175 | P80211DID_MKISTABLE(t) | \ |
176 | (a)) | 176 | (a)) |
177 | 177 | ||
178 | #define P80211DID_GET(a, m, l) ((((u32)(a)) >> (l)) & (m)) | 178 | #define P80211DID_GET(a, m, l) ((((u32)(a)) >> (l)) & (m)) |
179 | 179 | ||
@@ -340,11 +340,11 @@ struct catlistitem; | |||
340 | /* metadata items. Some components may choose to use more, */ | 340 | /* metadata items. Some components may choose to use more, */ |
341 | /* less or different metadata items. */ | 341 | /* less or different metadata items. */ |
342 | 342 | ||
343 | typedef void (*p80211_totext_t) (struct catlistitem *, u32 did, u8 * itembuf, | 343 | typedef void (*p80211_totext_t) (struct catlistitem *, u32 did, u8 *itembuf, |
344 | char *textbuf); | 344 | char *textbuf); |
345 | typedef void (*p80211_fromtext_t) (struct catlistitem *, u32 did, u8 * itembuf, | 345 | typedef void (*p80211_fromtext_t) (struct catlistitem *, u32 did, u8 *itembuf, |
346 | char *textbuf); | 346 | char *textbuf); |
347 | typedef u32(*p80211_valid_t) (struct catlistitem *, u32 did, u8 * itembuf); | 347 | typedef u32(*p80211_valid_t) (struct catlistitem *, u32 did, u8 *itembuf); |
348 | 348 | ||
349 | /*----------------------------------------------------------------*/ | 349 | /*----------------------------------------------------------------*/ |
350 | /* Enumeration Lists */ | 350 | /* Enumeration Lists */ |
diff --git a/drivers/staging/wlan-ng/p80211wext.c b/drivers/staging/wlan-ng/p80211wext.c index 74d8022adb24..2fa1dfa23783 100644 --- a/drivers/staging/wlan-ng/p80211wext.c +++ b/drivers/staging/wlan-ng/p80211wext.c | |||
@@ -46,8 +46,8 @@ | |||
46 | #include <linux/wireless.h> | 46 | #include <linux/wireless.h> |
47 | #include <net/iw_handler.h> | 47 | #include <net/iw_handler.h> |
48 | #include <linux/if_arp.h> | 48 | #include <linux/if_arp.h> |
49 | #include <asm/bitops.h> | 49 | #include <linux/bitops.h> |
50 | #include <asm/uaccess.h> | 50 | #include <linux/uaccess.h> |
51 | #include <asm/byteorder.h> | 51 | #include <asm/byteorder.h> |
52 | #include <linux/if_ether.h> | 52 | #include <linux/if_ether.h> |
53 | #include <linux/bitops.h> | 53 | #include <linux/bitops.h> |
@@ -134,10 +134,11 @@ static int p80211wext_dorequest(wlandevice_t *wlandev, u32 did, u32 data) | |||
134 | int result; | 134 | int result; |
135 | 135 | ||
136 | msg.msgcode = DIDmsg_dot11req_mibset; | 136 | msg.msgcode = DIDmsg_dot11req_mibset; |
137 | memset(&mibitem, 0, sizeof(mibitem)); | ||
137 | mibitem.did = did; | 138 | mibitem.did = did; |
138 | mibitem.data = data; | 139 | mibitem.data = data; |
139 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 140 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
140 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 141 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
141 | 142 | ||
142 | return result; | 143 | return result; |
143 | } | 144 | } |
@@ -174,7 +175,7 @@ static int p80211wext_autojoin(wlandevice_t *wlandev) | |||
174 | memcpy(msg.ssid.data.data, ssid, data.length); | 175 | memcpy(msg.ssid.data.data, ssid, data.length); |
175 | msg.ssid.data.len = data.length; | 176 | msg.ssid.data.len = data.length; |
176 | 177 | ||
177 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 178 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
178 | 179 | ||
179 | if (result) { | 180 | if (result) { |
180 | err = -EFAULT; | 181 | err = -EFAULT; |
@@ -211,7 +212,7 @@ struct iw_statistics *p80211wext_get_wireless_stats(netdevice_t *dev) | |||
211 | if (wlandev->mlmerequest == NULL) | 212 | if (wlandev->mlmerequest == NULL) |
212 | return NULL; | 213 | return NULL; |
213 | 214 | ||
214 | retval = wlandev->mlmerequest(wlandev, (p80211msg_t *) & quality); | 215 | retval = wlandev->mlmerequest(wlandev, (p80211msg_t *) &quality); |
215 | 216 | ||
216 | wstats->qual.qual = qual_as_percent(quality.link.data); /* overall link quality */ | 217 | wstats->qual.qual = qual_as_percent(quality.link.data); /* overall link quality */ |
217 | wstats->qual.level = quality.level.data; /* instant signal level */ | 218 | wstats->qual.level = quality.level.data; /* instant signal level */ |
@@ -269,9 +270,10 @@ static int p80211wext_giwfreq(netdevice_t *dev, | |||
269 | int err = 0; | 270 | int err = 0; |
270 | 271 | ||
271 | msg.msgcode = DIDmsg_dot11req_mibget; | 272 | msg.msgcode = DIDmsg_dot11req_mibget; |
273 | memset(&mibitem, 0, sizeof(mibitem)); | ||
272 | mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel; | 274 | mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel; |
273 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 275 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
274 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 276 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
275 | 277 | ||
276 | if (result) { | 278 | if (result) { |
277 | err = -EFAULT; | 279 | err = -EFAULT; |
@@ -309,6 +311,7 @@ static int p80211wext_siwfreq(netdevice_t *dev, | |||
309 | } | 311 | } |
310 | 312 | ||
311 | msg.msgcode = DIDmsg_dot11req_mibset; | 313 | msg.msgcode = DIDmsg_dot11req_mibset; |
314 | memset(&mibitem, 0, sizeof(mibitem)); | ||
312 | mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel; | 315 | mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel; |
313 | mibitem.status = P80211ENUM_msgitem_status_data_ok; | 316 | mibitem.status = P80211ENUM_msgitem_status_data_ok; |
314 | 317 | ||
@@ -318,7 +321,7 @@ static int p80211wext_siwfreq(netdevice_t *dev, | |||
318 | mibitem.data = p80211_mhz_to_channel(freq->m); | 321 | mibitem.data = p80211_mhz_to_channel(freq->m); |
319 | 322 | ||
320 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 323 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
321 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 324 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
322 | 325 | ||
323 | if (result) { | 326 | if (result) { |
324 | err = -EFAULT; | 327 | err = -EFAULT; |
@@ -396,10 +399,11 @@ static int p80211wext_siwmode(netdevice_t *dev, | |||
396 | 399 | ||
397 | /* Set Operation mode to the PORT TYPE RID */ | 400 | /* Set Operation mode to the PORT TYPE RID */ |
398 | msg.msgcode = DIDmsg_dot11req_mibset; | 401 | msg.msgcode = DIDmsg_dot11req_mibset; |
402 | memset(&mibitem, 0, sizeof(mibitem)); | ||
399 | mibitem.did = DIDmib_p2_p2Static_p2CnfPortType; | 403 | mibitem.did = DIDmib_p2_p2Static_p2CnfPortType; |
400 | mibitem.data = (*mode == IW_MODE_ADHOC) ? 0 : 1; | 404 | mibitem.data = (*mode == IW_MODE_ADHOC) ? 0 : 1; |
401 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 405 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
402 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 406 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
403 | 407 | ||
404 | if (result) | 408 | if (result) |
405 | err = -EFAULT; | 409 | err = -EFAULT; |
@@ -549,14 +553,14 @@ static int p80211wext_siwencode(netdevice_t *dev, | |||
549 | } | 553 | } |
550 | 554 | ||
551 | /* Check the Key index first. */ | 555 | /* Check the Key index first. */ |
552 | if ((i = (erq->flags & IW_ENCODE_INDEX))) { | 556 | i = (erq->flags & IW_ENCODE_INDEX); |
553 | 557 | if (i) { | |
554 | if ((i < 1) || (i > NUM_WEPKEYS)) { | 558 | if ((i < 1) || (i > NUM_WEPKEYS)) { |
555 | err = -EINVAL; | 559 | err = -EINVAL; |
556 | goto exit; | 560 | goto exit; |
557 | } else | 561 | } else { |
558 | i--; | 562 | i--; |
559 | 563 | } | |
560 | /* Set current key number only if no keys are given */ | 564 | /* Set current key number only if no keys are given */ |
561 | if (erq->flags & IW_ENCODE_NOKEY) { | 565 | if (erq->flags & IW_ENCODE_NOKEY) { |
562 | result = | 566 | result = |
@@ -621,7 +625,7 @@ static int p80211wext_siwencode(netdevice_t *dev, | |||
621 | 625 | ||
622 | msg.msgcode = DIDmsg_dot11req_mibset; | 626 | msg.msgcode = DIDmsg_dot11req_mibset; |
623 | memcpy(&msg.mibattribute.data, &pstr, sizeof(pstr)); | 627 | memcpy(&msg.mibattribute.data, &pstr, sizeof(pstr)); |
624 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 628 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
625 | 629 | ||
626 | if (result) { | 630 | if (result) { |
627 | err = -EFAULT; | 631 | err = -EFAULT; |
@@ -729,7 +733,7 @@ static int p80211wext_siwessid(netdevice_t *dev, | |||
729 | msg.ssid.data.len = length; | 733 | msg.ssid.data.len = length; |
730 | 734 | ||
731 | pr_debug("autojoin_ssid for %s \n", essid); | 735 | pr_debug("autojoin_ssid for %s \n", essid); |
732 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 736 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
733 | pr_debug("autojoin_ssid %d\n", result); | 737 | pr_debug("autojoin_ssid %d\n", result); |
734 | 738 | ||
735 | if (result) { | 739 | if (result) { |
@@ -771,9 +775,10 @@ static int p80211wext_giwrate(netdevice_t *dev, | |||
771 | int err = 0; | 775 | int err = 0; |
772 | 776 | ||
773 | msg.msgcode = DIDmsg_dot11req_mibget; | 777 | msg.msgcode = DIDmsg_dot11req_mibget; |
778 | memset(&mibitem, 0, sizeof(mibitem)); | ||
774 | mibitem.did = DIDmib_p2_p2MAC_p2CurrentTxRate; | 779 | mibitem.did = DIDmib_p2_p2MAC_p2CurrentTxRate; |
775 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 780 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
776 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 781 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
777 | 782 | ||
778 | if (result) { | 783 | if (result) { |
779 | err = -EFAULT; | 784 | err = -EFAULT; |
@@ -822,9 +827,10 @@ static int p80211wext_giwrts(netdevice_t *dev, | |||
822 | int err = 0; | 827 | int err = 0; |
823 | 828 | ||
824 | msg.msgcode = DIDmsg_dot11req_mibget; | 829 | msg.msgcode = DIDmsg_dot11req_mibget; |
830 | memset(&mibitem, 0, sizeof(mibitem)); | ||
825 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold; | 831 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold; |
826 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 832 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
827 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 833 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
828 | 834 | ||
829 | if (result) { | 835 | if (result) { |
830 | err = -EFAULT; | 836 | err = -EFAULT; |
@@ -857,6 +863,7 @@ static int p80211wext_siwrts(netdevice_t *dev, | |||
857 | } | 863 | } |
858 | 864 | ||
859 | msg.msgcode = DIDmsg_dot11req_mibget; | 865 | msg.msgcode = DIDmsg_dot11req_mibget; |
866 | memset(&mibitem, 0, sizeof(mibitem)); | ||
860 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold; | 867 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold; |
861 | if (rts->disabled) | 868 | if (rts->disabled) |
862 | mibitem.data = 2347; | 869 | mibitem.data = 2347; |
@@ -864,7 +871,7 @@ static int p80211wext_siwrts(netdevice_t *dev, | |||
864 | mibitem.data = rts->value; | 871 | mibitem.data = rts->value; |
865 | 872 | ||
866 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 873 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
867 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 874 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
868 | 875 | ||
869 | if (result) { | 876 | if (result) { |
870 | err = -EFAULT; | 877 | err = -EFAULT; |
@@ -886,10 +893,11 @@ static int p80211wext_giwfrag(netdevice_t *dev, | |||
886 | int err = 0; | 893 | int err = 0; |
887 | 894 | ||
888 | msg.msgcode = DIDmsg_dot11req_mibget; | 895 | msg.msgcode = DIDmsg_dot11req_mibget; |
896 | memset(&mibitem, 0, sizeof(mibitem)); | ||
889 | mibitem.did = | 897 | mibitem.did = |
890 | DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold; | 898 | DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold; |
891 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 899 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
892 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 900 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
893 | 901 | ||
894 | if (result) { | 902 | if (result) { |
895 | err = -EFAULT; | 903 | err = -EFAULT; |
@@ -922,6 +930,7 @@ static int p80211wext_siwfrag(netdevice_t *dev, | |||
922 | } | 930 | } |
923 | 931 | ||
924 | msg.msgcode = DIDmsg_dot11req_mibset; | 932 | msg.msgcode = DIDmsg_dot11req_mibset; |
933 | memset(&mibitem, 0, sizeof(mibitem)); | ||
925 | mibitem.did = | 934 | mibitem.did = |
926 | DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold; | 935 | DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold; |
927 | 936 | ||
@@ -931,7 +940,7 @@ static int p80211wext_siwfrag(netdevice_t *dev, | |||
931 | mibitem.data = frag->value; | 940 | mibitem.data = frag->value; |
932 | 941 | ||
933 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 942 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
934 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 943 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
935 | 944 | ||
936 | if (result) { | 945 | if (result) { |
937 | err = -EFAULT; | 946 | err = -EFAULT; |
@@ -962,10 +971,11 @@ static int p80211wext_giwretry(netdevice_t *dev, | |||
962 | u16 shortretry, longretry, lifetime; | 971 | u16 shortretry, longretry, lifetime; |
963 | 972 | ||
964 | msg.msgcode = DIDmsg_dot11req_mibget; | 973 | msg.msgcode = DIDmsg_dot11req_mibget; |
974 | memset(&mibitem, 0, sizeof(mibitem)); | ||
965 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit; | 975 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit; |
966 | 976 | ||
967 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 977 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
968 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 978 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
969 | 979 | ||
970 | if (result) { | 980 | if (result) { |
971 | err = -EFAULT; | 981 | err = -EFAULT; |
@@ -979,7 +989,7 @@ static int p80211wext_giwretry(netdevice_t *dev, | |||
979 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit; | 989 | mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit; |
980 | 990 | ||
981 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 991 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
982 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 992 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
983 | 993 | ||
984 | if (result) { | 994 | if (result) { |
985 | err = -EFAULT; | 995 | err = -EFAULT; |
@@ -994,7 +1004,7 @@ static int p80211wext_giwretry(netdevice_t *dev, | |||
994 | DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime; | 1004 | DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime; |
995 | 1005 | ||
996 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 1006 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
997 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1007 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
998 | 1008 | ||
999 | if (result) { | 1009 | if (result) { |
1000 | err = -EFAULT; | 1010 | err = -EFAULT; |
@@ -1037,6 +1047,8 @@ static int p80211wext_siwretry(netdevice_t *dev, | |||
1037 | int result; | 1047 | int result; |
1038 | int err = 0; | 1048 | int err = 0; |
1039 | 1049 | ||
1050 | memset(&mibitem, 0, sizeof(mibitem)); | ||
1051 | |||
1040 | if (!wlan_wext_write) { | 1052 | if (!wlan_wext_write) { |
1041 | err = (-EOPNOTSUPP); | 1053 | err = (-EOPNOTSUPP); |
1042 | goto exit; | 1054 | goto exit; |
@@ -1055,7 +1067,7 @@ static int p80211wext_siwretry(netdevice_t *dev, | |||
1055 | mibitem.data = rrq->value /= 1024; | 1067 | mibitem.data = rrq->value /= 1024; |
1056 | 1068 | ||
1057 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 1069 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
1058 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1070 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1059 | 1071 | ||
1060 | if (result) { | 1072 | if (result) { |
1061 | err = -EFAULT; | 1073 | err = -EFAULT; |
@@ -1069,7 +1081,7 @@ static int p80211wext_siwretry(netdevice_t *dev, | |||
1069 | 1081 | ||
1070 | memcpy(&msg.mibattribute.data, &mibitem, | 1082 | memcpy(&msg.mibattribute.data, &mibitem, |
1071 | sizeof(mibitem)); | 1083 | sizeof(mibitem)); |
1072 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1084 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1073 | 1085 | ||
1074 | if (result) { | 1086 | if (result) { |
1075 | err = -EFAULT; | 1087 | err = -EFAULT; |
@@ -1084,7 +1096,7 @@ static int p80211wext_siwretry(netdevice_t *dev, | |||
1084 | 1096 | ||
1085 | memcpy(&msg.mibattribute.data, &mibitem, | 1097 | memcpy(&msg.mibattribute.data, &mibitem, |
1086 | sizeof(mibitem)); | 1098 | sizeof(mibitem)); |
1087 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1099 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1088 | 1100 | ||
1089 | if (result) { | 1101 | if (result) { |
1090 | err = -EFAULT; | 1102 | err = -EFAULT; |
@@ -1114,6 +1126,7 @@ static int p80211wext_siwtxpow(netdevice_t *dev, | |||
1114 | } | 1126 | } |
1115 | 1127 | ||
1116 | msg.msgcode = DIDmsg_dot11req_mibset; | 1128 | msg.msgcode = DIDmsg_dot11req_mibset; |
1129 | memset(&mibitem, 0, sizeof(mibitem)); | ||
1117 | mibitem.did = | 1130 | mibitem.did = |
1118 | DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel; | 1131 | DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel; |
1119 | if (rrq->fixed == 0) | 1132 | if (rrq->fixed == 0) |
@@ -1121,7 +1134,7 @@ static int p80211wext_siwtxpow(netdevice_t *dev, | |||
1121 | else | 1134 | else |
1122 | mibitem.data = rrq->value; | 1135 | mibitem.data = rrq->value; |
1123 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 1136 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
1124 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1137 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1125 | 1138 | ||
1126 | if (result) { | 1139 | if (result) { |
1127 | err = -EFAULT; | 1140 | err = -EFAULT; |
@@ -1143,11 +1156,13 @@ static int p80211wext_giwtxpow(netdevice_t *dev, | |||
1143 | int err = 0; | 1156 | int err = 0; |
1144 | 1157 | ||
1145 | msg.msgcode = DIDmsg_dot11req_mibget; | 1158 | msg.msgcode = DIDmsg_dot11req_mibget; |
1159 | |||
1160 | memset(&mibitem, 0, sizeof(mibitem)); | ||
1146 | mibitem.did = | 1161 | mibitem.did = |
1147 | DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel; | 1162 | DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel; |
1148 | 1163 | ||
1149 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); | 1164 | memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); |
1150 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1165 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1151 | 1166 | ||
1152 | if (result) { | 1167 | if (result) { |
1153 | err = -EFAULT; | 1168 | err = -EFAULT; |
@@ -1295,7 +1310,7 @@ static int p80211wext_siwscan(netdevice_t *dev, | |||
1295 | msg.maxchanneltime.data = 250; | 1310 | msg.maxchanneltime.data = 250; |
1296 | msg.minchanneltime.data = 200; | 1311 | msg.minchanneltime.data = 200; |
1297 | 1312 | ||
1298 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1313 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1299 | if (result) | 1314 | if (result) |
1300 | err = prism2_result2err(msg.resultcode.data); | 1315 | err = prism2_result2err(msg.resultcode.data); |
1301 | 1316 | ||
@@ -1414,7 +1429,7 @@ static int p80211wext_giwscan(netdevice_t *dev, | |||
1414 | msg.msgcode = DIDmsg_dot11req_scan_results; | 1429 | msg.msgcode = DIDmsg_dot11req_scan_results; |
1415 | msg.bssindex.data = i; | 1430 | msg.bssindex.data = i; |
1416 | 1431 | ||
1417 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1432 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1418 | if ((result != 0) || | 1433 | if ((result != 0) || |
1419 | (msg.resultcode.data != P80211ENUM_resultcode_success)) { | 1434 | (msg.resultcode.data != P80211ENUM_resultcode_success)) { |
1420 | break; | 1435 | break; |
@@ -1489,7 +1504,7 @@ static int p80211wext_set_encodeext(struct net_device *dev, | |||
1489 | memcpy(wlandev->wep_keys[idx], ext->key, ext->key_len); | 1504 | memcpy(wlandev->wep_keys[idx], ext->key, ext->key_len); |
1490 | 1505 | ||
1491 | memset(&msg, 0, sizeof(msg)); | 1506 | memset(&msg, 0, sizeof(msg)); |
1492 | pstr = (p80211item_pstr32_t *) & msg.mibattribute.data; | 1507 | pstr = (p80211item_pstr32_t *) &msg.mibattribute.data; |
1493 | memcpy(pstr->data.data, ext->key, ext->key_len); | 1508 | memcpy(pstr->data.data, ext->key, ext->key_len); |
1494 | pstr->data.len = ext->key_len; | 1509 | pstr->data.len = ext->key_len; |
1495 | switch (idx) { | 1510 | switch (idx) { |
@@ -1513,7 +1528,7 @@ static int p80211wext_set_encodeext(struct net_device *dev, | |||
1513 | break; | 1528 | break; |
1514 | } | 1529 | } |
1515 | msg.msgcode = DIDmsg_dot11req_mibset; | 1530 | msg.msgcode = DIDmsg_dot11req_mibset; |
1516 | result = p80211req_dorequest(wlandev, (u8 *) & msg); | 1531 | result = p80211req_dorequest(wlandev, (u8 *) &msg); |
1517 | pr_debug("result (%d)\n", result); | 1532 | pr_debug("result (%d)\n", result); |
1518 | } | 1533 | } |
1519 | return result; | 1534 | return result; |
@@ -1729,15 +1744,11 @@ static iw_handler p80211wext_handlers[] = { | |||
1729 | 1744 | ||
1730 | struct iw_handler_def p80211wext_handler_def = { | 1745 | struct iw_handler_def p80211wext_handler_def = { |
1731 | .num_standard = ARRAY_SIZE(p80211wext_handlers), | 1746 | .num_standard = ARRAY_SIZE(p80211wext_handlers), |
1732 | .num_private = 0, | ||
1733 | .num_private_args = 0, | ||
1734 | .standard = p80211wext_handlers, | 1747 | .standard = p80211wext_handlers, |
1735 | .private = NULL, | ||
1736 | .private_args = NULL, | ||
1737 | .get_wireless_stats = p80211wext_get_wireless_stats | 1748 | .get_wireless_stats = p80211wext_get_wireless_stats |
1738 | }; | 1749 | }; |
1739 | 1750 | ||
1740 | int p80211wext_event_associated(wlandevice_t * wlandev, int assoc) | 1751 | int p80211wext_event_associated(wlandevice_t *wlandev, int assoc) |
1741 | { | 1752 | { |
1742 | union iwreq_data data; | 1753 | union iwreq_data data; |
1743 | 1754 | ||
diff --git a/drivers/staging/wlan-ng/prism2fw.c b/drivers/staging/wlan-ng/prism2fw.c index aaa70ed57710..4be54cea6ad7 100644 --- a/drivers/staging/wlan-ng/prism2fw.c +++ b/drivers/staging/wlan-ng/prism2fw.c | |||
@@ -53,6 +53,7 @@ | |||
53 | /* Local Constants */ | 53 | /* Local Constants */ |
54 | 54 | ||
55 | #define PRISM2_USB_FWFILE "prism2_ru.fw" | 55 | #define PRISM2_USB_FWFILE "prism2_ru.fw" |
56 | MODULE_FIRMWARE(PRISM2_USB_FWFILE); | ||
56 | 57 | ||
57 | #define S3DATA_MAX 5000 | 58 | #define S3DATA_MAX 5000 |
58 | #define S3PLUG_MAX 200 | 59 | #define S3PLUG_MAX 200 |
@@ -108,9 +109,9 @@ typedef struct pda { | |||
108 | } pda_t; | 109 | } pda_t; |
109 | 110 | ||
110 | typedef struct imgchunk { | 111 | typedef struct imgchunk { |
111 | u32 addr; /* start address */ | 112 | u32 addr; /* start address */ |
112 | u32 len; /* in bytes */ | 113 | u32 len; /* in bytes */ |
113 | u16 crc; /* CRC value (if it falls at a chunk boundary) */ | 114 | u16 crc; /* CRC value (if it falls at a chunk boundary) */ |
114 | u8 *data; | 115 | u8 *data; |
115 | } imgchunk_t; | 116 | } imgchunk_t; |
116 | 117 | ||
@@ -204,7 +205,7 @@ int prism2_fwtry(struct usb_device *udev, wlandevice_t *wlandev) | |||
204 | return 1; | 205 | return 1; |
205 | } | 206 | } |
206 | 207 | ||
207 | printk(KERN_INFO "prism2_usb: %s will be processed, size %d\n", | 208 | printk(KERN_INFO "prism2_usb: %s will be processed, size %zu\n", |
208 | PRISM2_USB_FWFILE, fw_entry->size); | 209 | PRISM2_USB_FWFILE, fw_entry->size); |
209 | prism2_fwapply((const struct ihex_binrec *)fw_entry->data, wlandev); | 210 | prism2_fwapply((const struct ihex_binrec *)fw_entry->data, wlandev); |
210 | 211 | ||
@@ -264,7 +265,7 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) | |||
264 | /* Build the PDA we're going to use. */ | 265 | /* Build the PDA we're going to use. */ |
265 | if (read_cardpda(&pda, wlandev)) { | 266 | if (read_cardpda(&pda, wlandev)) { |
266 | printk(KERN_ERR "load_cardpda failed, exiting.\n"); | 267 | printk(KERN_ERR "load_cardpda failed, exiting.\n"); |
267 | return (1); | 268 | return 1; |
268 | } | 269 | } |
269 | 270 | ||
270 | /* read the card's PRI-SUP */ | 271 | /* read the card's PRI-SUP */ |
@@ -286,9 +287,8 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) | |||
286 | 287 | ||
287 | /* DIDmsg_dot11req_mibget */ | 288 | /* DIDmsg_dot11req_mibget */ |
288 | prism2mgmt_mibset_mibget(wlandev, &getmsg); | 289 | prism2mgmt_mibset_mibget(wlandev, &getmsg); |
289 | if (getmsg.resultcode.data != P80211ENUM_resultcode_success) { | 290 | if (getmsg.resultcode.data != P80211ENUM_resultcode_success) |
290 | printk(KERN_ERR "Couldn't fetch PRI-SUP info\n"); | 291 | printk(KERN_ERR "Couldn't fetch PRI-SUP info\n"); |
291 | } | ||
292 | 292 | ||
293 | /* Already in host order */ | 293 | /* Already in host order */ |
294 | priid.role = *data++; | 294 | priid.role = *data++; |
@@ -301,19 +301,19 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) | |||
301 | result = read_fwfile(rfptr); | 301 | result = read_fwfile(rfptr); |
302 | if (result) { | 302 | if (result) { |
303 | printk(KERN_ERR "Failed to read the data exiting.\n"); | 303 | printk(KERN_ERR "Failed to read the data exiting.\n"); |
304 | return (1); | 304 | return 1; |
305 | } | 305 | } |
306 | 306 | ||
307 | result = validate_identity(); | 307 | result = validate_identity(); |
308 | 308 | ||
309 | if (result) { | 309 | if (result) { |
310 | printk(KERN_ERR "Incompatible firmware image.\n"); | 310 | printk(KERN_ERR "Incompatible firmware image.\n"); |
311 | return (1); | 311 | return 1; |
312 | } | 312 | } |
313 | 313 | ||
314 | if (startaddr == 0x00000000) { | 314 | if (startaddr == 0x00000000) { |
315 | printk(KERN_ERR "Can't RAM download a Flash image!\n"); | 315 | printk(KERN_ERR "Can't RAM download a Flash image!\n"); |
316 | return (1); | 316 | return 1; |
317 | } | 317 | } |
318 | 318 | ||
319 | /* Make the image chunks */ | 319 | /* Make the image chunks */ |
@@ -323,20 +323,20 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev) | |||
323 | result = plugimage(fchunk, nfchunks, s3plug, ns3plug, &pda); | 323 | result = plugimage(fchunk, nfchunks, s3plug, ns3plug, &pda); |
324 | if (result) { | 324 | if (result) { |
325 | printk(KERN_ERR "Failed to plug data.\n"); | 325 | printk(KERN_ERR "Failed to plug data.\n"); |
326 | return (1); | 326 | return 1; |
327 | } | 327 | } |
328 | 328 | ||
329 | /* Insert any CRCs */ | 329 | /* Insert any CRCs */ |
330 | if (crcimage(fchunk, nfchunks, s3crc, ns3crc)) { | 330 | if (crcimage(fchunk, nfchunks, s3crc, ns3crc)) { |
331 | printk(KERN_ERR "Failed to insert all CRCs\n"); | 331 | printk(KERN_ERR "Failed to insert all CRCs\n"); |
332 | return (1); | 332 | return 1; |
333 | } | 333 | } |
334 | 334 | ||
335 | /* Write the image */ | 335 | /* Write the image */ |
336 | result = writeimage(wlandev, fchunk, nfchunks); | 336 | result = writeimage(wlandev, fchunk, nfchunks); |
337 | if (result) { | 337 | if (result) { |
338 | printk(KERN_ERR "Failed to ramwrite image data.\n"); | 338 | printk(KERN_ERR "Failed to ramwrite image data.\n"); |
339 | return (1); | 339 | return 1; |
340 | } | 340 | } |
341 | 341 | ||
342 | /* clear any allocated memory */ | 342 | /* clear any allocated memory */ |
@@ -434,9 +434,8 @@ void free_chunks(imgchunk_t *fchunk, unsigned int *nfchunks) | |||
434 | { | 434 | { |
435 | int i; | 435 | int i; |
436 | for (i = 0; i < *nfchunks; i++) { | 436 | for (i = 0; i < *nfchunks; i++) { |
437 | if (fchunk[i].data != NULL) { | 437 | if (fchunk[i].data != NULL) |
438 | kfree(fchunk[i].data); | 438 | kfree(fchunk[i].data); |
439 | } | ||
440 | } | 439 | } |
441 | *nfchunks = 0; | 440 | *nfchunks = 0; |
442 | memset(fchunk, 0, sizeof(*fchunk)); | 441 | memset(fchunk, 0, sizeof(*fchunk)); |
@@ -531,7 +530,7 @@ int mkimage(imgchunk_t *clist, unsigned int *ccnt) | |||
531 | if (clist[i].data == NULL) { | 530 | if (clist[i].data == NULL) { |
532 | printk(KERN_ERR | 531 | printk(KERN_ERR |
533 | "failed to allocate image space, exitting.\n"); | 532 | "failed to allocate image space, exitting.\n"); |
534 | return (1); | 533 | return 1; |
535 | } | 534 | } |
536 | memset(clist[i].data, 0, clist[i].len); | 535 | memset(clist[i].data, 0, clist[i].len); |
537 | pr_debug("chunk[%d]: addr=0x%06x len=%d\n", | 536 | pr_debug("chunk[%d]: addr=0x%06x len=%d\n", |
@@ -545,15 +544,14 @@ int mkimage(imgchunk_t *clist, unsigned int *ccnt) | |||
545 | for (j = 0; j < *ccnt; j++) { | 544 | for (j = 0; j < *ccnt; j++) { |
546 | cstart = clist[j].addr; | 545 | cstart = clist[j].addr; |
547 | cend = cstart + clist[j].len - 1; | 546 | cend = cstart + clist[j].len - 1; |
548 | if (s3start >= cstart && s3end <= cend) { | 547 | if (s3start >= cstart && s3end <= cend) |
549 | break; | 548 | break; |
550 | } | ||
551 | } | 549 | } |
552 | if (((unsigned int)j) >= (*ccnt)) { | 550 | if (((unsigned int)j) >= (*ccnt)) { |
553 | printk(KERN_ERR | 551 | printk(KERN_ERR |
554 | "s3rec(a=0x%06x,l=%d), no chunk match, exiting.\n", | 552 | "s3rec(a=0x%06x,l=%d), no chunk match, exiting.\n", |
555 | s3start, s3data[i].len); | 553 | s3start, s3data[i].len); |
556 | return (1); | 554 | return 1; |
557 | } | 555 | } |
558 | coffset = s3start - cstart; | 556 | coffset = s3start - cstart; |
559 | memcpy(clist[j].data + coffset, s3data[i].data, s3data[i].len); | 557 | memcpy(clist[j].data + coffset, s3data[i].data, s3data[i].len); |
@@ -586,7 +584,7 @@ int mkpdrlist(pda_t *pda) | |||
586 | curroff = 0; | 584 | curroff = 0; |
587 | while (curroff < (HFA384x_PDA_LEN_MAX / 2) && | 585 | while (curroff < (HFA384x_PDA_LEN_MAX / 2) && |
588 | le16_to_cpu(pda16[curroff + 1]) != HFA384x_PDR_END_OF_PDA) { | 586 | le16_to_cpu(pda16[curroff + 1]) != HFA384x_PDR_END_OF_PDA) { |
589 | pda->rec[pda->nrec] = (hfa384x_pdrec_t *) & (pda16[curroff]); | 587 | pda->rec[pda->nrec] = (hfa384x_pdrec_t *) &(pda16[curroff]); |
590 | 588 | ||
591 | if (le16_to_cpu(pda->rec[pda->nrec]->code) == HFA384x_PDR_NICID) { | 589 | if (le16_to_cpu(pda->rec[pda->nrec]->code) == HFA384x_PDR_NICID) { |
592 | memcpy(&nicid, &pda->rec[pda->nrec]->data.nicid, | 590 | memcpy(&nicid, &pda->rec[pda->nrec]->data.nicid, |
@@ -623,10 +621,10 @@ int mkpdrlist(pda_t *pda) | |||
623 | printk(KERN_ERR | 621 | printk(KERN_ERR |
624 | "no end record found or invalid lengths in " | 622 | "no end record found or invalid lengths in " |
625 | "PDR data, exiting. %x %d\n", curroff, pda->nrec); | 623 | "PDR data, exiting. %x %d\n", curroff, pda->nrec); |
626 | return (1); | 624 | return 1; |
627 | } | 625 | } |
628 | if (le16_to_cpu(pda16[curroff + 1]) == HFA384x_PDR_END_OF_PDA) { | 626 | if (le16_to_cpu(pda16[curroff + 1]) == HFA384x_PDR_END_OF_PDA) { |
629 | pda->rec[pda->nrec] = (hfa384x_pdrec_t *) & (pda16[curroff]); | 627 | pda->rec[pda->nrec] = (hfa384x_pdrec_t *) &(pda16[curroff]); |
630 | (pda->nrec)++; | 628 | (pda->nrec)++; |
631 | } | 629 | } |
632 | return result; | 630 | return result; |
@@ -869,7 +867,7 @@ int read_fwfile(const struct ihex_binrec *record) | |||
869 | ptr16 = (u16 *) record->data; | 867 | ptr16 = (u16 *) record->data; |
870 | 868 | ||
871 | /* parse what was an S3 srec and put it in the right array */ | 869 | /* parse what was an S3 srec and put it in the right array */ |
872 | switch(addr) { | 870 | switch (addr) { |
873 | case S3ADDR_START: | 871 | case S3ADDR_START: |
874 | startaddr = *ptr32; | 872 | startaddr = *ptr32; |
875 | pr_debug(" S7 start addr, record=%d " | 873 | pr_debug(" S7 start addr, record=%d " |
@@ -890,7 +888,7 @@ int read_fwfile(const struct ihex_binrec *record) | |||
890 | s3plug[ns3plug].len); | 888 | s3plug[ns3plug].len); |
891 | 889 | ||
892 | ns3plug++; | 890 | ns3plug++; |
893 | if ( ns3plug == S3PLUG_MAX ) { | 891 | if (ns3plug == S3PLUG_MAX) { |
894 | printk(KERN_ERR "S3 plugrec limit reached - aborting\n"); | 892 | printk(KERN_ERR "S3 plugrec limit reached - aborting\n"); |
895 | return 1; | 893 | return 1; |
896 | } | 894 | } |
@@ -907,7 +905,7 @@ int read_fwfile(const struct ihex_binrec *record) | |||
907 | s3crc[ns3crc].len, | 905 | s3crc[ns3crc].len, |
908 | s3crc[ns3crc].dowrite); | 906 | s3crc[ns3crc].dowrite); |
909 | ns3crc++; | 907 | ns3crc++; |
910 | if ( ns3crc == S3CRC_MAX ) { | 908 | if (ns3crc == S3CRC_MAX) { |
911 | printk(KERN_ERR "S3 crcrec limit reached - aborting\n"); | 909 | printk(KERN_ERR "S3 crcrec limit reached - aborting\n"); |
912 | return 1; | 910 | return 1; |
913 | } | 911 | } |
@@ -921,12 +919,12 @@ int read_fwfile(const struct ihex_binrec *record) | |||
921 | rcnt, | 919 | rcnt, |
922 | s3info[ns3info].len, | 920 | s3info[ns3info].len, |
923 | s3info[ns3info].type); | 921 | s3info[ns3info].type); |
924 | if ( ((s3info[ns3info].len - 1) * sizeof(u16)) > sizeof(s3info[ns3info].info) ) { | 922 | if (((s3info[ns3info].len - 1) * sizeof(u16)) > sizeof(s3info[ns3info].info)) { |
925 | printk(KERN_ERR " S3 inforec length too long - aborting\n"); | 923 | printk(KERN_ERR " S3 inforec length too long - aborting\n"); |
926 | return 1; | 924 | return 1; |
927 | } | 925 | } |
928 | 926 | ||
929 | tmpinfo = (u16*)&(s3info[ns3info].info.version); | 927 | tmpinfo = (u16 *)&(s3info[ns3info].info.version); |
930 | pr_debug(" info="); | 928 | pr_debug(" info="); |
931 | for (i = 0; i < s3info[ns3info].len - 1; i++) { | 929 | for (i = 0; i < s3info[ns3info].len - 1; i++) { |
932 | tmpinfo[i] = *(ptr16 + 2 + i); | 930 | tmpinfo[i] = *(ptr16 + 2 + i); |
@@ -935,7 +933,7 @@ int read_fwfile(const struct ihex_binrec *record) | |||
935 | pr_debug("\n"); | 933 | pr_debug("\n"); |
936 | 934 | ||
937 | ns3info++; | 935 | ns3info++; |
938 | if ( ns3info == S3INFO_MAX ) { | 936 | if (ns3info == S3INFO_MAX) { |
939 | printk(KERN_ERR "S3 inforec limit reached - aborting\n"); | 937 | printk(KERN_ERR "S3 inforec limit reached - aborting\n"); |
940 | return 1; | 938 | return 1; |
941 | } | 939 | } |
@@ -945,7 +943,7 @@ int read_fwfile(const struct ihex_binrec *record) | |||
945 | s3data[ns3data].len = len; | 943 | s3data[ns3data].len = len; |
946 | s3data[ns3data].data = (uint8_t *) record->data; | 944 | s3data[ns3data].data = (uint8_t *) record->data; |
947 | ns3data++; | 945 | ns3data++; |
948 | if ( ns3data == S3DATA_MAX ) { | 946 | if (ns3data == S3DATA_MAX) { |
949 | printk(KERN_ERR "S3 datarec limit reached - aborting\n"); | 947 | printk(KERN_ERR "S3 datarec limit reached - aborting\n"); |
950 | return 1; | 948 | return 1; |
951 | } | 949 | } |
@@ -1023,7 +1021,7 @@ int writeimage(wlandevice_t *wlandev, imgchunk_t *fchunk, | |||
1023 | rstatemsg.enable.data = P80211ENUM_truth_true; | 1021 | rstatemsg.enable.data = P80211ENUM_truth_true; |
1024 | rstatemsg.exeaddr.data = startaddr; | 1022 | rstatemsg.exeaddr.data = startaddr; |
1025 | 1023 | ||
1026 | msgp = (p80211msg_t *) & rstatemsg; | 1024 | msgp = (p80211msg_t *) &rstatemsg; |
1027 | result = prism2mgmt_ramdl_state(wlandev, msgp); | 1025 | result = prism2mgmt_ramdl_state(wlandev, msgp); |
1028 | if (result) { | 1026 | if (result) { |
1029 | printk(KERN_ERR | 1027 | printk(KERN_ERR |
@@ -1063,7 +1061,7 @@ int writeimage(wlandevice_t *wlandev, imgchunk_t *fchunk, | |||
1063 | ("Sending xxxdl_write message addr=%06x len=%d.\n", | 1061 | ("Sending xxxdl_write message addr=%06x len=%d.\n", |
1064 | currdaddr, currlen); | 1062 | currdaddr, currlen); |
1065 | 1063 | ||
1066 | msgp = (p80211msg_t *) & rwritemsg; | 1064 | msgp = (p80211msg_t *) &rwritemsg; |
1067 | result = prism2mgmt_ramdl_write(wlandev, msgp); | 1065 | result = prism2mgmt_ramdl_write(wlandev, msgp); |
1068 | 1066 | ||
1069 | /* Check the results */ | 1067 | /* Check the results */ |
@@ -1090,7 +1088,7 @@ int writeimage(wlandevice_t *wlandev, imgchunk_t *fchunk, | |||
1090 | rstatemsg.enable.data = P80211ENUM_truth_false; | 1088 | rstatemsg.enable.data = P80211ENUM_truth_false; |
1091 | rstatemsg.exeaddr.data = 0; | 1089 | rstatemsg.exeaddr.data = 0; |
1092 | 1090 | ||
1093 | msgp = (p80211msg_t *) & rstatemsg; | 1091 | msgp = (p80211msg_t *) &rstatemsg; |
1094 | result = prism2mgmt_ramdl_state(wlandev, msgp); | 1092 | result = prism2mgmt_ramdl_state(wlandev, msgp); |
1095 | if (result) { | 1093 | if (result) { |
1096 | printk(KERN_ERR | 1094 | printk(KERN_ERR |
@@ -1161,7 +1159,7 @@ int validate_identity(void) | |||
1161 | /* SEC compat range */ | 1159 | /* SEC compat range */ |
1162 | if ((s3info[i].info.compat.role == 1) && | 1160 | if ((s3info[i].info.compat.role == 1) && |
1163 | (s3info[i].info.compat.id == 4)) { | 1161 | (s3info[i].info.compat.id == 4)) { |
1164 | 1162 | /* FIXME: isn't something missing here? */ | |
1165 | } | 1163 | } |
1166 | 1164 | ||
1167 | break; | 1165 | break; |
@@ -1196,8 +1194,9 @@ int validate_identity(void) | |||
1196 | pr_debug("Unknown inforec type %d\n", s3info[i].type); | 1194 | pr_debug("Unknown inforec type %d\n", s3info[i].type); |
1197 | } | 1195 | } |
1198 | } | 1196 | } |
1199 | // walk through | 1197 | /* walk through */ |
1200 | 1198 | ||
1201 | if (trump && (result != 2)) result = 0; | 1199 | if (trump && (result != 2)) |
1200 | result = 0; | ||
1202 | return result; | 1201 | return result; |
1203 | } | 1202 | } |
diff --git a/drivers/staging/wlan-ng/prism2mgmt.c b/drivers/staging/wlan-ng/prism2mgmt.c index 9f7d96cae8e3..ad163da72ae4 100644 --- a/drivers/staging/wlan-ng/prism2mgmt.c +++ b/drivers/staging/wlan-ng/prism2mgmt.c | |||
@@ -67,7 +67,7 @@ | |||
67 | #include <linux/wireless.h> | 67 | #include <linux/wireless.h> |
68 | #include <linux/netdevice.h> | 68 | #include <linux/netdevice.h> |
69 | #include <linux/delay.h> | 69 | #include <linux/delay.h> |
70 | #include <asm/io.h> | 70 | #include <linux/io.h> |
71 | #include <asm/byteorder.h> | 71 | #include <asm/byteorder.h> |
72 | #include <linux/random.h> | 72 | #include <linux/random.h> |
73 | #include <linux/usb.h> | 73 | #include <linux/usb.h> |
@@ -541,7 +541,7 @@ int prism2mgmt_start(wlandevice_t *wlandev, void *msgp) | |||
541 | /*** STATION ***/ | 541 | /*** STATION ***/ |
542 | /* Set the REQUIRED config items */ | 542 | /* Set the REQUIRED config items */ |
543 | /* SSID */ | 543 | /* SSID */ |
544 | pstr = (p80211pstrd_t *) & (msg->ssid.data); | 544 | pstr = (p80211pstrd_t *) &(msg->ssid.data); |
545 | prism2mgmt_pstr2bytestr(p2bytestr, pstr); | 545 | prism2mgmt_pstr2bytestr(p2bytestr, pstr); |
546 | result = hfa384x_drvr_setconfig(hw, HFA384x_RID_CNFOWNSSID, | 546 | result = hfa384x_drvr_setconfig(hw, HFA384x_RID_CNFOWNSSID, |
547 | bytebuf, HFA384x_RID_CNFOWNSSID_LEN); | 547 | bytebuf, HFA384x_RID_CNFOWNSSID_LEN); |
@@ -1034,7 +1034,7 @@ int prism2mgmt_autojoin(wlandevice_t *wlandev, void *msgp) | |||
1034 | 1034 | ||
1035 | /* Set the ssid */ | 1035 | /* Set the ssid */ |
1036 | memset(bytebuf, 0, 256); | 1036 | memset(bytebuf, 0, 256); |
1037 | pstr = (p80211pstrd_t *) & (msg->ssid.data); | 1037 | pstr = (p80211pstrd_t *) &(msg->ssid.data); |
1038 | prism2mgmt_pstr2bytestr(p2bytestr, pstr); | 1038 | prism2mgmt_pstr2bytestr(p2bytestr, pstr); |
1039 | result = hfa384x_drvr_setconfig(hw, HFA384x_RID_CNFDESIREDSSID, | 1039 | result = hfa384x_drvr_setconfig(hw, HFA384x_RID_CNFDESIREDSSID, |
1040 | bytebuf, | 1040 | bytebuf, |
@@ -1123,8 +1123,8 @@ int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp) | |||
1123 | if (hw->presniff_port_type != 0) { | 1123 | if (hw->presniff_port_type != 0) { |
1124 | word = hw->presniff_port_type; | 1124 | word = hw->presniff_port_type; |
1125 | result = hfa384x_drvr_setconfig16(hw, | 1125 | result = hfa384x_drvr_setconfig16(hw, |
1126 | HFA384x_RID_CNFPORTTYPE, | 1126 | HFA384x_RID_CNFPORTTYPE, |
1127 | word); | 1127 | word); |
1128 | if (result) { | 1128 | if (result) { |
1129 | pr_debug | 1129 | pr_debug |
1130 | ("failed to restore porttype, result=%d\n", | 1130 | ("failed to restore porttype, result=%d\n", |
@@ -1156,10 +1156,8 @@ int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp) | |||
1156 | if (wlandev->netdev->type == ARPHRD_ETHER) { | 1156 | if (wlandev->netdev->type == ARPHRD_ETHER) { |
1157 | /* Save macport 0 state */ | 1157 | /* Save macport 0 state */ |
1158 | result = hfa384x_drvr_getconfig16(hw, | 1158 | result = hfa384x_drvr_getconfig16(hw, |
1159 | HFA384x_RID_CNFPORTTYPE, | 1159 | HFA384x_RID_CNFPORTTYPE, |
1160 | & | 1160 | &(hw->presniff_port_type)); |
1161 | (hw-> | ||
1162 | presniff_port_type)); | ||
1163 | if (result) { | 1161 | if (result) { |
1164 | pr_debug | 1162 | pr_debug |
1165 | ("failed to read porttype, result=%d\n", | 1163 | ("failed to read porttype, result=%d\n", |
@@ -1168,10 +1166,8 @@ int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp) | |||
1168 | } | 1166 | } |
1169 | /* Save the wepflags state */ | 1167 | /* Save the wepflags state */ |
1170 | result = hfa384x_drvr_getconfig16(hw, | 1168 | result = hfa384x_drvr_getconfig16(hw, |
1171 | HFA384x_RID_CNFWEPFLAGS, | 1169 | HFA384x_RID_CNFWEPFLAGS, |
1172 | & | 1170 | &(hw->presniff_wepflags)); |
1173 | (hw-> | ||
1174 | presniff_wepflags)); | ||
1175 | if (result) { | 1171 | if (result) { |
1176 | pr_debug | 1172 | pr_debug |
1177 | ("failed to read wepflags, result=%d\n", | 1173 | ("failed to read wepflags, result=%d\n", |
@@ -1218,8 +1214,8 @@ int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp) | |||
1218 | /* Set the port type to pIbss */ | 1214 | /* Set the port type to pIbss */ |
1219 | word = HFA384x_PORTTYPE_PSUEDOIBSS; | 1215 | word = HFA384x_PORTTYPE_PSUEDOIBSS; |
1220 | result = hfa384x_drvr_setconfig16(hw, | 1216 | result = hfa384x_drvr_setconfig16(hw, |
1221 | HFA384x_RID_CNFPORTTYPE, | 1217 | HFA384x_RID_CNFPORTTYPE, |
1222 | word); | 1218 | word); |
1223 | if (result) { | 1219 | if (result) { |
1224 | pr_debug | 1220 | pr_debug |
1225 | ("failed to set porttype %d, result=%d\n", | 1221 | ("failed to set porttype %d, result=%d\n", |
@@ -1235,8 +1231,8 @@ int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp) | |||
1235 | HFA384x_WEPFLAGS_DISABLE_RXCRYPT; | 1231 | HFA384x_WEPFLAGS_DISABLE_RXCRYPT; |
1236 | result = | 1232 | result = |
1237 | hfa384x_drvr_setconfig16(hw, | 1233 | hfa384x_drvr_setconfig16(hw, |
1238 | HFA384x_RID_CNFWEPFLAGS, | 1234 | HFA384x_RID_CNFWEPFLAGS, |
1239 | word); | 1235 | word); |
1240 | } | 1236 | } |
1241 | 1237 | ||
1242 | if (result) { | 1238 | if (result) { |
diff --git a/drivers/staging/wlan-ng/prism2mgmt.h b/drivers/staging/wlan-ng/prism2mgmt.h index bdf2b3e03253..07eecebeb6cc 100644 --- a/drivers/staging/wlan-ng/prism2mgmt.h +++ b/drivers/staging/wlan-ng/prism2mgmt.h | |||
@@ -63,43 +63,43 @@ | |||
63 | extern int prism2_reset_holdtime; | 63 | extern int prism2_reset_holdtime; |
64 | extern int prism2_reset_settletime; | 64 | extern int prism2_reset_settletime; |
65 | 65 | ||
66 | u32 prism2sta_ifstate(wlandevice_t * wlandev, u32 ifstate); | 66 | u32 prism2sta_ifstate(wlandevice_t *wlandev, u32 ifstate); |
67 | 67 | ||
68 | void prism2sta_ev_info(wlandevice_t * wlandev, hfa384x_InfFrame_t * inf); | 68 | void prism2sta_ev_info(wlandevice_t *wlandev, hfa384x_InfFrame_t *inf); |
69 | void prism2sta_ev_txexc(wlandevice_t * wlandev, u16 status); | 69 | void prism2sta_ev_txexc(wlandevice_t *wlandev, u16 status); |
70 | void prism2sta_ev_tx(wlandevice_t * wlandev, u16 status); | 70 | void prism2sta_ev_tx(wlandevice_t *wlandev, u16 status); |
71 | void prism2sta_ev_rx(wlandevice_t * wlandev, struct sk_buff *skb); | 71 | void prism2sta_ev_rx(wlandevice_t *wlandev, struct sk_buff *skb); |
72 | void prism2sta_ev_alloc(wlandevice_t * wlandev); | 72 | void prism2sta_ev_alloc(wlandevice_t *wlandev); |
73 | 73 | ||
74 | int prism2mgmt_mibset_mibget(wlandevice_t * wlandev, void *msgp); | 74 | int prism2mgmt_mibset_mibget(wlandevice_t *wlandev, void *msgp); |
75 | int prism2mgmt_scan(wlandevice_t * wlandev, void *msgp); | 75 | int prism2mgmt_scan(wlandevice_t *wlandev, void *msgp); |
76 | int prism2mgmt_scan_results(wlandevice_t * wlandev, void *msgp); | 76 | int prism2mgmt_scan_results(wlandevice_t *wlandev, void *msgp); |
77 | int prism2mgmt_start(wlandevice_t * wlandev, void *msgp); | 77 | int prism2mgmt_start(wlandevice_t *wlandev, void *msgp); |
78 | int prism2mgmt_wlansniff(wlandevice_t * wlandev, void *msgp); | 78 | int prism2mgmt_wlansniff(wlandevice_t *wlandev, void *msgp); |
79 | int prism2mgmt_readpda(wlandevice_t * wlandev, void *msgp); | 79 | int prism2mgmt_readpda(wlandevice_t *wlandev, void *msgp); |
80 | int prism2mgmt_ramdl_state(wlandevice_t * wlandev, void *msgp); | 80 | int prism2mgmt_ramdl_state(wlandevice_t *wlandev, void *msgp); |
81 | int prism2mgmt_ramdl_write(wlandevice_t * wlandev, void *msgp); | 81 | int prism2mgmt_ramdl_write(wlandevice_t *wlandev, void *msgp); |
82 | int prism2mgmt_flashdl_state(wlandevice_t * wlandev, void *msgp); | 82 | int prism2mgmt_flashdl_state(wlandevice_t *wlandev, void *msgp); |
83 | int prism2mgmt_flashdl_write(wlandevice_t * wlandev, void *msgp); | 83 | int prism2mgmt_flashdl_write(wlandevice_t *wlandev, void *msgp); |
84 | int prism2mgmt_autojoin(wlandevice_t * wlandev, void *msgp); | 84 | int prism2mgmt_autojoin(wlandevice_t *wlandev, void *msgp); |
85 | 85 | ||
86 | /*--------------------------------------------------------------- | 86 | /*--------------------------------------------------------------- |
87 | * conversion functions going between wlan message data types and | 87 | * conversion functions going between wlan message data types and |
88 | * Prism2 data types | 88 | * Prism2 data types |
89 | ---------------------------------------------------------------*/ | 89 | ---------------------------------------------------------------*/ |
90 | /* byte area conversion functions*/ | 90 | /* byte area conversion functions*/ |
91 | void prism2mgmt_pstr2bytearea(u8 * bytearea, p80211pstrd_t * pstr); | 91 | void prism2mgmt_pstr2bytearea(u8 *bytearea, p80211pstrd_t *pstr); |
92 | void prism2mgmt_bytearea2pstr(u8 * bytearea, p80211pstrd_t * pstr, int len); | 92 | void prism2mgmt_bytearea2pstr(u8 *bytearea, p80211pstrd_t *pstr, int len); |
93 | 93 | ||
94 | /* byte string conversion functions*/ | 94 | /* byte string conversion functions*/ |
95 | void prism2mgmt_pstr2bytestr(hfa384x_bytestr_t * bytestr, p80211pstrd_t * pstr); | 95 | void prism2mgmt_pstr2bytestr(hfa384x_bytestr_t *bytestr, p80211pstrd_t *pstr); |
96 | void prism2mgmt_bytestr2pstr(hfa384x_bytestr_t * bytestr, p80211pstrd_t * pstr); | 96 | void prism2mgmt_bytestr2pstr(hfa384x_bytestr_t *bytestr, p80211pstrd_t *pstr); |
97 | 97 | ||
98 | /* functions to convert Group Addresses */ | 98 | /* functions to convert Group Addresses */ |
99 | void prism2mgmt_get_grpaddr(u32 did, p80211pstrd_t * pstr, hfa384x_t * priv); | 99 | void prism2mgmt_get_grpaddr(u32 did, p80211pstrd_t *pstr, hfa384x_t *priv); |
100 | int prism2mgmt_set_grpaddr(u32 did, | 100 | int prism2mgmt_set_grpaddr(u32 did, |
101 | u8 * prism2buf, p80211pstrd_t * pstr, | 101 | u8 *prism2buf, p80211pstrd_t *pstr, |
102 | hfa384x_t * priv); | 102 | hfa384x_t *priv); |
103 | int prism2mgmt_get_grpaddr_index(u32 did); | 103 | int prism2mgmt_get_grpaddr_index(u32 did); |
104 | 104 | ||
105 | void prism2sta_processing_defer(struct work_struct *data); | 105 | void prism2sta_processing_defer(struct work_struct *data); |
diff --git a/drivers/staging/wlan-ng/prism2mib.c b/drivers/staging/wlan-ng/prism2mib.c index 2fff0a110bcb..98a5d58c3f55 100644 --- a/drivers/staging/wlan-ng/prism2mib.c +++ b/drivers/staging/wlan-ng/prism2mib.c | |||
@@ -114,7 +114,7 @@ static int prism2mib_flag(mibrec_t *mib, | |||
114 | 114 | ||
115 | static int prism2mib_wepdefaultkey(mibrec_t *mib, | 115 | static int prism2mib_wepdefaultkey(mibrec_t *mib, |
116 | int isget, | 116 | int isget, |
117 | wlandevice_t * wlandev, | 117 | wlandevice_t *wlandev, |
118 | hfa384x_t *hw, | 118 | hfa384x_t *hw, |
119 | p80211msg_dot11req_mibset_t *msg, | 119 | p80211msg_dot11req_mibset_t *msg, |
120 | void *data); | 120 | void *data); |
@@ -726,7 +726,7 @@ static int prism2mib_priv(mibrec_t *mib, | |||
726 | if (isget) { | 726 | if (isget) { |
727 | hfa384x_drvr_getconfig(hw, | 727 | hfa384x_drvr_getconfig(hw, |
728 | HFA384x_RID_CNFWPADATA, | 728 | HFA384x_RID_CNFWPADATA, |
729 | (u8 *) & wpa, | 729 | (u8 *) &wpa, |
730 | sizeof(wpa)); | 730 | sizeof(wpa)); |
731 | pstr->len = le16_to_cpu(wpa.datalen); | 731 | pstr->len = le16_to_cpu(wpa.datalen); |
732 | memcpy(pstr->data, wpa.data, pstr->len); | 732 | memcpy(pstr->data, wpa.data, pstr->len); |
@@ -736,9 +736,9 @@ static int prism2mib_priv(mibrec_t *mib, | |||
736 | 736 | ||
737 | result = | 737 | result = |
738 | hfa384x_drvr_setconfig(hw, | 738 | hfa384x_drvr_setconfig(hw, |
739 | HFA384x_RID_CNFWPADATA, | 739 | HFA384x_RID_CNFWPADATA, |
740 | (u8 *) & wpa, | 740 | (u8 *) &wpa, |
741 | sizeof(wpa)); | 741 | sizeof(wpa)); |
742 | } | 742 | } |
743 | break; | 743 | break; |
744 | } | 744 | } |
diff --git a/drivers/staging/wlan-ng/prism2sta.c b/drivers/staging/wlan-ng/prism2sta.c index 50f301d65212..31ac8da39c81 100644 --- a/drivers/staging/wlan-ng/prism2sta.c +++ b/drivers/staging/wlan-ng/prism2sta.c | |||
@@ -64,7 +64,7 @@ | |||
64 | #include <linux/byteorder/generic.h> | 64 | #include <linux/byteorder/generic.h> |
65 | #include <linux/ctype.h> | 65 | #include <linux/ctype.h> |
66 | 66 | ||
67 | #include <asm/io.h> | 67 | #include <linux/io.h> |
68 | #include <linux/delay.h> | 68 | #include <linux/delay.h> |
69 | #include <asm/byteorder.h> | 69 | #include <asm/byteorder.h> |
70 | #include <linux/if_arp.h> | 70 | #include <linux/if_arp.h> |
@@ -1023,13 +1023,13 @@ static void prism2sta_inf_tallies(wlandevice_t *wlandev, | |||
1023 | 1023 | ||
1024 | cnt = sizeof(hfa384x_CommTallies32_t) / sizeof(u32); | 1024 | cnt = sizeof(hfa384x_CommTallies32_t) / sizeof(u32); |
1025 | if (inf->framelen > 22) { | 1025 | if (inf->framelen > 22) { |
1026 | dst = (u32 *) & hw->tallies; | 1026 | dst = (u32 *) &hw->tallies; |
1027 | src32 = (u32 *) & inf->info.commtallies32; | 1027 | src32 = (u32 *) &inf->info.commtallies32; |
1028 | for (i = 0; i < cnt; i++, dst++, src32++) | 1028 | for (i = 0; i < cnt; i++, dst++, src32++) |
1029 | *dst += le32_to_cpu(*src32); | 1029 | *dst += le32_to_cpu(*src32); |
1030 | } else { | 1030 | } else { |
1031 | dst = (u32 *) & hw->tallies; | 1031 | dst = (u32 *) &hw->tallies; |
1032 | src16 = (u16 *) & inf->info.commtallies16; | 1032 | src16 = (u16 *) &inf->info.commtallies16; |
1033 | for (i = 0; i < cnt; i++, dst++, src16++) | 1033 | for (i = 0; i < cnt; i++, dst++, src16++) |
1034 | *dst += le16_to_cpu(*src16); | 1034 | *dst += le16_to_cpu(*src16); |
1035 | } | 1035 | } |
@@ -1280,7 +1280,7 @@ void prism2sta_processing_defer(struct work_struct *data) | |||
1280 | HFA384x_RID_CURRENTSSID, result); | 1280 | HFA384x_RID_CURRENTSSID, result); |
1281 | goto failed; | 1281 | goto failed; |
1282 | } | 1282 | } |
1283 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) & ssid, | 1283 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) &ssid, |
1284 | (p80211pstrd_t *) & | 1284 | (p80211pstrd_t *) & |
1285 | wlandev->ssid); | 1285 | wlandev->ssid); |
1286 | 1286 | ||
@@ -1368,8 +1368,8 @@ void prism2sta_processing_defer(struct work_struct *data) | |||
1368 | HFA384x_RID_CURRENTSSID, result); | 1368 | HFA384x_RID_CURRENTSSID, result); |
1369 | goto failed; | 1369 | goto failed; |
1370 | } | 1370 | } |
1371 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) & ssid, | 1371 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) &ssid, |
1372 | (p80211pstrd_t *) & wlandev->ssid); | 1372 | (p80211pstrd_t *) &wlandev->ssid); |
1373 | 1373 | ||
1374 | hw->link_status = HFA384x_LINK_CONNECTED; | 1374 | hw->link_status = HFA384x_LINK_CONNECTED; |
1375 | netif_carrier_on(wlandev->netdev); | 1375 | netif_carrier_on(wlandev->netdev); |
@@ -2028,8 +2028,8 @@ void prism2sta_commsqual_defer(struct work_struct *data) | |||
2028 | HFA384x_RID_CURRENTSSID, result); | 2028 | HFA384x_RID_CURRENTSSID, result); |
2029 | goto done; | 2029 | goto done; |
2030 | } | 2030 | } |
2031 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) & ssid, | 2031 | prism2mgmt_bytestr2pstr((hfa384x_bytestr_t *) &ssid, |
2032 | (p80211pstrd_t *) & wlandev->ssid); | 2032 | (p80211pstrd_t *) &wlandev->ssid); |
2033 | 2033 | ||
2034 | /* Reschedule timer */ | 2034 | /* Reschedule timer */ |
2035 | mod_timer(&hw->commsqual_timer, jiffies + HZ); | 2035 | mod_timer(&hw->commsqual_timer, jiffies + HZ); |
diff --git a/drivers/staging/wlan-ng/prism2usb.c b/drivers/staging/wlan-ng/prism2usb.c index 9dde68be8d74..501d27f74c7d 100644 --- a/drivers/staging/wlan-ng/prism2usb.c +++ b/drivers/staging/wlan-ng/prism2usb.c | |||
@@ -24,8 +24,9 @@ static struct usb_device_id usb_prism_tbl[] = { | |||
24 | (0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps WLAN USB Adapter")}, | 24 | (0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps WLAN USB Adapter")}, |
25 | {PRISM_USB_DEVICE | 25 | {PRISM_USB_DEVICE |
26 | (0x067c, 0x1022, "Siemens SpeedStream 1022 11Mbps WLAN USB Adapter")}, | 26 | (0x067c, 0x1022, "Siemens SpeedStream 1022 11Mbps WLAN USB Adapter")}, |
27 | {PRISM_USB_DEVICE(0x049f, 0x0033, | 27 | {PRISM_USB_DEVICE |
28 | "Compaq/Intel W100 PRO/Wireless 11Mbps multiport WLAN Adapter")}, | 28 | (0x049f, 0x0033, |
29 | "Compaq/Intel W100 PRO/Wireless 11Mbps multiport WLAN Adapter")}, | ||
29 | {PRISM_USB_DEVICE | 30 | {PRISM_USB_DEVICE |
30 | (0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter")}, | 31 | (0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter")}, |
31 | {PRISM_USB_DEVICE | 32 | {PRISM_USB_DEVICE |
@@ -55,7 +56,6 @@ static struct usb_device_id usb_prism_tbl[] = { | |||
55 | (0x04f1, 0x3009, "JVC MP-XP7250 Builtin USB WLAN Adapter")}, | 56 | (0x04f1, 0x3009, "JVC MP-XP7250 Builtin USB WLAN Adapter")}, |
56 | {PRISM_USB_DEVICE(0x0846, 0x4110, "NetGear MA111")}, | 57 | {PRISM_USB_DEVICE(0x0846, 0x4110, "NetGear MA111")}, |
57 | {PRISM_USB_DEVICE(0x03f3, 0x0020, "Adaptec AWN-8020 USB WLAN Adapter")}, | 58 | {PRISM_USB_DEVICE(0x03f3, 0x0020, "Adaptec AWN-8020 USB WLAN Adapter")}, |
58 | /* {PRISM_USB_DEVICE(0x0ace, 0x1201, "ZyDAS ZD1201 Wireless USB Adapter")}, */ | ||
59 | {PRISM_USB_DEVICE(0x2821, 0x3300, "ASUS-WL140 Wireless USB Adapter")}, | 59 | {PRISM_USB_DEVICE(0x2821, 0x3300, "ASUS-WL140 Wireless USB Adapter")}, |
60 | {PRISM_USB_DEVICE(0x2001, 0x3700, "DWL-122 Wireless USB Adapter")}, | 60 | {PRISM_USB_DEVICE(0x2001, 0x3700, "DWL-122 Wireless USB Adapter")}, |
61 | {PRISM_USB_DEVICE | 61 | {PRISM_USB_DEVICE |