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authorLinus Torvalds <torvalds@linux-foundation.org>2010-06-27 10:39:38 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-06-27 10:39:38 -0400
commitd94b20497b419e8394654f995f94742bd6b06640 (patch)
tree73335fd96e4120fed9d1284a199030c4df449e0e
parent064c946a0cda77057277d5758f259b54484cfc5a (diff)
parentcd4de21f7e65a8cd04860f5661b3c18648ee52a1 (diff)
Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging: hwmon: (k8temp) Bypass core swapping on single-core processors hwmon: (i5k_amb) Fix sysfs attribute for lockdep hwmon: (k10temp) Do not blacklist known working CPU models
-rw-r--r--drivers/hwmon/i5k_amb.c6
-rw-r--r--drivers/hwmon/k10temp.c14
-rw-r--r--drivers/hwmon/k8temp.c2
3 files changed, 19 insertions, 3 deletions
diff --git a/drivers/hwmon/i5k_amb.c b/drivers/hwmon/i5k_amb.c
index e880e2c3871d..937983407e2a 100644
--- a/drivers/hwmon/i5k_amb.c
+++ b/drivers/hwmon/i5k_amb.c
@@ -289,6 +289,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
289 iattr->s_attr.dev_attr.attr.mode = S_IRUGO; 289 iattr->s_attr.dev_attr.attr.mode = S_IRUGO;
290 iattr->s_attr.dev_attr.show = show_label; 290 iattr->s_attr.dev_attr.show = show_label;
291 iattr->s_attr.index = k; 291 iattr->s_attr.index = k;
292 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
292 res = device_create_file(&pdev->dev, 293 res = device_create_file(&pdev->dev,
293 &iattr->s_attr.dev_attr); 294 &iattr->s_attr.dev_attr);
294 if (res) 295 if (res)
@@ -303,6 +304,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
303 iattr->s_attr.dev_attr.attr.mode = S_IRUGO; 304 iattr->s_attr.dev_attr.attr.mode = S_IRUGO;
304 iattr->s_attr.dev_attr.show = show_amb_temp; 305 iattr->s_attr.dev_attr.show = show_amb_temp;
305 iattr->s_attr.index = k; 306 iattr->s_attr.index = k;
307 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
306 res = device_create_file(&pdev->dev, 308 res = device_create_file(&pdev->dev,
307 &iattr->s_attr.dev_attr); 309 &iattr->s_attr.dev_attr);
308 if (res) 310 if (res)
@@ -318,6 +320,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
318 iattr->s_attr.dev_attr.show = show_amb_min; 320 iattr->s_attr.dev_attr.show = show_amb_min;
319 iattr->s_attr.dev_attr.store = store_amb_min; 321 iattr->s_attr.dev_attr.store = store_amb_min;
320 iattr->s_attr.index = k; 322 iattr->s_attr.index = k;
323 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
321 res = device_create_file(&pdev->dev, 324 res = device_create_file(&pdev->dev,
322 &iattr->s_attr.dev_attr); 325 &iattr->s_attr.dev_attr);
323 if (res) 326 if (res)
@@ -333,6 +336,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
333 iattr->s_attr.dev_attr.show = show_amb_mid; 336 iattr->s_attr.dev_attr.show = show_amb_mid;
334 iattr->s_attr.dev_attr.store = store_amb_mid; 337 iattr->s_attr.dev_attr.store = store_amb_mid;
335 iattr->s_attr.index = k; 338 iattr->s_attr.index = k;
339 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
336 res = device_create_file(&pdev->dev, 340 res = device_create_file(&pdev->dev,
337 &iattr->s_attr.dev_attr); 341 &iattr->s_attr.dev_attr);
338 if (res) 342 if (res)
@@ -348,6 +352,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
348 iattr->s_attr.dev_attr.show = show_amb_max; 352 iattr->s_attr.dev_attr.show = show_amb_max;
349 iattr->s_attr.dev_attr.store = store_amb_max; 353 iattr->s_attr.dev_attr.store = store_amb_max;
350 iattr->s_attr.index = k; 354 iattr->s_attr.index = k;
355 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
351 res = device_create_file(&pdev->dev, 356 res = device_create_file(&pdev->dev,
352 &iattr->s_attr.dev_attr); 357 &iattr->s_attr.dev_attr);
353 if (res) 358 if (res)
@@ -362,6 +367,7 @@ static int __devinit i5k_amb_hwmon_init(struct platform_device *pdev)
362 iattr->s_attr.dev_attr.attr.mode = S_IRUGO; 367 iattr->s_attr.dev_attr.attr.mode = S_IRUGO;
363 iattr->s_attr.dev_attr.show = show_amb_alarm; 368 iattr->s_attr.dev_attr.show = show_amb_alarm;
364 iattr->s_attr.index = k; 369 iattr->s_attr.index = k;
370 sysfs_attr_init(&iattr->s_attr.dev_attr.attr);
365 res = device_create_file(&pdev->dev, 371 res = device_create_file(&pdev->dev,
366 &iattr->s_attr.dev_attr); 372 &iattr->s_attr.dev_attr);
367 if (res) 373 if (res)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 099a2138cdf6..da5a2404cd3e 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -112,11 +112,21 @@ static bool __devinit has_erratum_319(struct pci_dev *pdev)
112 if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3) 112 if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
113 return false; 113 return false;
114 114
115 /* Differentiate between AM2+ (bad) and AM3 (good) */ 115 /* DDR3 memory implies socket AM3, which is good */
116 pci_bus_read_config_dword(pdev->bus, 116 pci_bus_read_config_dword(pdev->bus,
117 PCI_DEVFN(PCI_SLOT(pdev->devfn), 2), 117 PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
118 REG_DCT0_CONFIG_HIGH, &reg_dram_cfg); 118 REG_DCT0_CONFIG_HIGH, &reg_dram_cfg);
119 return !(reg_dram_cfg & DDR3_MODE); 119 if (reg_dram_cfg & DDR3_MODE)
120 return false;
121
122 /*
123 * Unfortunately it is possible to run a socket AM3 CPU with DDR2
124 * memory. We blacklist all the cores which do exist in socket AM2+
125 * format. It still isn't perfect, as RB-C2 cores exist in both AM2+
126 * and AM3 formats, but that's the best we can do.
127 */
128 return boot_cpu_data.x86_model < 4 ||
129 (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2);
120} 130}
121 131
122static int __devinit k10temp_probe(struct pci_dev *pdev, 132static int __devinit k10temp_probe(struct pci_dev *pdev,
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index 0ceb6d6200a3..f26acdb11681 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -120,7 +120,7 @@ static ssize_t show_temp(struct device *dev,
120 int temp; 120 int temp;
121 struct k8temp_data *data = k8temp_update_device(dev); 121 struct k8temp_data *data = k8temp_update_device(dev);
122 122
123 if (data->swap_core_select) 123 if (data->swap_core_select && (data->sensorsp & SEL_CORE))
124 core = core ? 0 : 1; 124 core = core ? 0 : 1;
125 125
126 temp = TEMP_FROM_REG(data->temp[core][place]) + data->temp_offset; 126 temp = TEMP_FROM_REG(data->temp[core][place]) + data->temp_offset;