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authorGreg Kroah-Hartman <gregkh@suse.de>2008-11-18 14:11:18 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-01-06 16:52:20 -0500
commitc73190fa2e3ab6b441170ce23bd4bd7a44e213fd (patch)
tree1c5a726891017fab20a0653b378840de3e3b7978
parentf52a8af70d50ffaf665862f6315352595dd94962 (diff)
Staging: comedi: dt9812: remove dt9812.h
An extra .h file is not needed for the dt9812 driver so merge it into the .c file. Cc: Anders Blomdell <anders.blomdell@control.lth.se> Cc: David Schleef <ds@schleef.org> Cc: Frank Mori Hess <fmhess@users.sourceforge.net> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat
-rw-r--r--drivers/staging/comedi/drivers/dt9812.c207
-rw-r--r--drivers/staging/comedi/drivers/dt9812.h210
2 files changed, 206 insertions, 211 deletions
diff --git a/drivers/staging/comedi/drivers/dt9812.c b/drivers/staging/comedi/drivers/dt9812.c
index e93c308c8325..3ded199cf1b0 100644
--- a/drivers/staging/comedi/drivers/dt9812.c
+++ b/drivers/staging/comedi/drivers/dt9812.c
@@ -53,7 +53,212 @@ for my needs.
53#include <linux/usb.h> 53#include <linux/usb.h>
54 54
55#include "../comedidev.h" 55#include "../comedidev.h"
56#include "dt9812.h" 56
57#define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
58#define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
59#define DT9812_MAX_READ_CMD_PIPE_SIZE 32
60
61/*
62 * See Silican Laboratories C8051F020/1/2/3 manual
63 */
64#define F020_SFR_P4 0x84
65#define F020_SFR_P1 0x90
66#define F020_SFR_P2 0xa0
67#define F020_SFR_P3 0xb0
68#define F020_SFR_AMX0CF 0xba
69#define F020_SFR_AMX0SL 0xbb
70#define F020_SFR_ADC0CF 0xbc
71#define F020_SFR_ADC0L 0xbe
72#define F020_SFR_ADC0H 0xbf
73#define F020_SFR_DAC0L 0xd2
74#define F020_SFR_DAC0H 0xd3
75#define F020_SFR_DAC0CN 0xd4
76#define F020_SFR_DAC1L 0xd5
77#define F020_SFR_DAC1H 0xd6
78#define F020_SFR_DAC1CN 0xd7
79#define F020_SFR_ADC0CN 0xe8
80
81#define F020_MASK_ADC0CF_AMP0GN0 0x01
82#define F020_MASK_ADC0CF_AMP0GN1 0x02
83#define F020_MASK_ADC0CF_AMP0GN2 0x04
84
85#define F020_MASK_ADC0CN_AD0EN 0x80
86#define F020_MASK_ADC0CN_AD0INT 0x20
87#define F020_MASK_ADC0CN_AD0BUSY 0x10
88
89#define F020_MASK_DACxCN_DACxEN 0x80
90
91typedef enum {
92 /* A/D D/A DI DO CT */
93 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
94 DT9812_DEVID_DT9812_2PT5,/* 8 2 8 8 1 0-2.44V */
95#if 0
96 DT9812_DEVID_DT9813, /* 16 2 4 4 1 +/- 10V */
97 DT9812_DEVID_DT9814 /* 24 2 0 0 1 +/- 10V */
98#endif
99} dt9812_devid_t;
100
101typedef enum {
102 DT9812_GAIN_0PT25 = 1,
103 DT9812_GAIN_0PT5 = 2,
104 DT9812_GAIN_1 = 4,
105 DT9812_GAIN_2 = 8,
106 DT9812_GAIN_4 = 16,
107 DT9812_GAIN_8 = 32,
108 DT9812_GAIN_16 = 64,
109} dt9812_gain_t;
110
111typedef enum {
112 DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
113 /* Write Flash memory */
114 DT9812_W_FLASH_DATA = 0,
115 /* Read Flash memory misc config info */
116 DT9812_R_FLASH_DATA = 1,
117
118 /*
119 * Register read/write commands for processor
120 */
121
122 /* Read a single byte of USB memory */
123 DT9812_R_SINGLE_BYTE_REG = 2,
124 /* Write a single byte of USB memory */
125 DT9812_W_SINGLE_BYTE_REG = 3,
126 /* Multiple Reads of USB memory */
127 DT9812_R_MULTI_BYTE_REG = 4,
128 /* Multiple Writes of USB memory */
129 DT9812_W_MULTI_BYTE_REG = 5,
130 /* Read, (AND) with mask, OR value, then write (single) */
131 DT9812_RMW_SINGLE_BYTE_REG = 6,
132 /* Read, (AND) with mask, OR value, then write (multiple) */
133 DT9812_RMW_MULTI_BYTE_REG = 7,
134
135 /*
136 * Register read/write commands for SMBus
137 */
138
139 /* Read a single byte of SMBus */
140 DT9812_R_SINGLE_BYTE_SMBUS = 8,
141 /* Write a single byte of SMBus */
142 DT9812_W_SINGLE_BYTE_SMBUS = 9,
143 /* Multiple Reads of SMBus */
144 DT9812_R_MULTI_BYTE_SMBUS = 10,
145 /* Multiple Writes of SMBus */
146 DT9812_W_MULTI_BYTE_SMBUS = 11,
147
148 /*
149 * Register read/write commands for a device
150 */
151
152 /* Read a single byte of a device */
153 DT9812_R_SINGLE_BYTE_DEV = 12,
154 /* Write a single byte of a device */
155 DT9812_W_SINGLE_BYTE_DEV = 13,
156 /* Multiple Reads of a device */
157 DT9812_R_MULTI_BYTE_DEV = 14,
158 /* Multiple Writes of a device */
159 DT9812_W_MULTI_BYTE_DEV = 15,
160
161 /* Not sure if we'll need this */
162 DT9812_W_DAC_THRESHOLD = 16,
163
164 /* Set interrupt on change mask */
165 DT9812_W_INT_ON_CHANGE_MASK = 17,
166
167 /* Write (or Clear) the CGL for the ADC */
168 DT9812_W_CGL = 18,
169 /* Multiple Reads of USB memory */
170 DT9812_R_MULTI_BYTE_USBMEM = 19,
171 /* Multiple Writes to USB memory */
172 DT9812_W_MULTI_BYTE_USBMEM = 20,
173
174 /* Issue a start command to a given subsystem */
175 DT9812_START_SUBSYSTEM = 21,
176 /* Issue a stop command to a given subsystem */
177 DT9812_STOP_SUBSYSTEM = 22,
178
179 /* calibrate the board using CAL_POT_CMD */
180 DT9812_CALIBRATE_POT = 23,
181 /* set the DAC FIFO size */
182 DT9812_W_DAC_FIFO_SIZE = 24,
183 /* Write or Clear the CGL for the DAC */
184 DT9812_W_CGL_DAC = 25,
185 /* Read a single value from a subsystem */
186 DT9812_R_SINGLE_VALUE_CMD = 26,
187 /* Write a single value to a subsystem */
188 DT9812_W_SINGLE_VALUE_CMD = 27,
189 /* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
190 DT9812_MAX_USB_FIRMWARE_CMD_CODE,
191} dt9812_usb_firmware_cmd_t;
192
193typedef struct {
194 u16 numbytes;
195 u16 address;
196} dt9812_flash_data_t;
197
198#define DT9812_MAX_NUM_MULTI_BYTE_RDS \
199 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
200
201typedef struct {
202 u8 count;
203 u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
204} dt9812_read_multi_t;
205
206typedef struct {
207 u8 address;
208 u8 value;
209} dt9812_write_byte_t;
210
211#define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
212 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t))
213
214typedef struct {
215 u8 count;
216 dt9812_write_byte_t write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
217} dt9812_write_multi_t;
218
219typedef struct {
220 u8 address;
221 u8 and_mask;
222 u8 or_value;
223} dt9812_rmw_byte_t;
224
225#define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
226 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t))
227
228typedef struct {
229 u8 count;
230 dt9812_rmw_byte_t rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
231} dt9812_rmw_multi_t;
232
233typedef struct dt9812_usb_cmd {
234
235 u32 cmd;
236 union {
237 dt9812_flash_data_t flash_data_info;
238 dt9812_read_multi_t read_multi_info;
239 dt9812_write_multi_t write_multi_info;
240 dt9812_rmw_multi_t rmw_multi_info;
241 } u;
242#if 0
243 WRITE_BYTE_INFO WriteByteInfo;
244 READ_BYTE_INFO ReadByteInfo;
245 WRITE_MULTI_INFO WriteMultiInfo;
246 READ_MULTI_INFO ReadMultiInfo;
247 RMW_BYTE_INFO RMWByteInfo;
248 RMW_MULTI_INFO RMWMultiInfo;
249 DAC_THRESHOLD_INFO DacThresholdInfo;
250 INT_ON_CHANGE_MASK_INFO IntOnChangeMaskInfo;
251 CGL_INFO CglInfo;
252 SUBSYSTEM_INFO SubsystemInfo;
253 CAL_POT_CMD CalPotCmd;
254 WRITE_DEV_BYTE_INFO WriteDevByteInfo;
255 READ_DEV_BYTE_INFO ReadDevByteInfo;
256 WRITE_DEV_MULTI_INFO WriteDevMultiInfo;
257 READ_DEV_MULTI_INFO ReadDevMultiInfo;
258 READ_SINGLE_VALUE_INFO ReadSingleValueInfo;
259 WRITE_SINGLE_VALUE_INFO WriteSingleValueInfo;
260#endif
261} dt9812_usb_cmd_t;
57 262
58#define DT9812_NUM_SLOTS 16 263#define DT9812_NUM_SLOTS 16
59 264
diff --git a/drivers/staging/comedi/drivers/dt9812.h b/drivers/staging/comedi/drivers/dt9812.h
deleted file mode 100644
index 471958a42220..000000000000
--- a/drivers/staging/comedi/drivers/dt9812.h
+++ /dev/null
@@ -1,210 +0,0 @@
1#ifndef __DT9812_H__
2#define __DT9812_H__
3
4#define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
5#define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
6#define DT9812_MAX_READ_CMD_PIPE_SIZE 32
7
8/*
9 * See Silican Laboratories C8051F020/1/2/3 manual
10 */
11#define F020_SFR_P4 0x84
12#define F020_SFR_P1 0x90
13#define F020_SFR_P2 0xa0
14#define F020_SFR_P3 0xb0
15#define F020_SFR_AMX0CF 0xba
16#define F020_SFR_AMX0SL 0xbb
17#define F020_SFR_ADC0CF 0xbc
18#define F020_SFR_ADC0L 0xbe
19#define F020_SFR_ADC0H 0xbf
20#define F020_SFR_DAC0L 0xd2
21#define F020_SFR_DAC0H 0xd3
22#define F020_SFR_DAC0CN 0xd4
23#define F020_SFR_DAC1L 0xd5
24#define F020_SFR_DAC1H 0xd6
25#define F020_SFR_DAC1CN 0xd7
26#define F020_SFR_ADC0CN 0xe8
27
28#define F020_MASK_ADC0CF_AMP0GN0 0x01
29#define F020_MASK_ADC0CF_AMP0GN1 0x02
30#define F020_MASK_ADC0CF_AMP0GN2 0x04
31
32#define F020_MASK_ADC0CN_AD0EN 0x80
33#define F020_MASK_ADC0CN_AD0INT 0x20
34#define F020_MASK_ADC0CN_AD0BUSY 0x10
35
36#define F020_MASK_DACxCN_DACxEN 0x80
37
38typedef enum {
39 /* A/D D/A DI DO CT */
40 DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
41 DT9812_DEVID_DT9812_2PT5,/* 8 2 8 8 1 0-2.44V */
42#if 0
43 DT9812_DEVID_DT9813, /* 16 2 4 4 1 +/- 10V */
44 DT9812_DEVID_DT9814 /* 24 2 0 0 1 +/- 10V */
45#endif
46} dt9812_devid_t;
47
48typedef enum {
49 DT9812_GAIN_0PT25 = 1,
50 DT9812_GAIN_0PT5 = 2,
51 DT9812_GAIN_1 = 4,
52 DT9812_GAIN_2 = 8,
53 DT9812_GAIN_4 = 16,
54 DT9812_GAIN_8 = 32,
55 DT9812_GAIN_16 = 64,
56} dt9812_gain_t;
57
58typedef enum {
59 DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
60 /* Write Flash memory */
61 DT9812_W_FLASH_DATA = 0,
62 /* Read Flash memory misc config info */
63 DT9812_R_FLASH_DATA = 1,
64
65 /*
66 * Register read/write commands for processor
67 */
68
69 /* Read a single byte of USB memory */
70 DT9812_R_SINGLE_BYTE_REG = 2,
71 /* Write a single byte of USB memory */
72 DT9812_W_SINGLE_BYTE_REG = 3,
73 /* Multiple Reads of USB memory */
74 DT9812_R_MULTI_BYTE_REG = 4,
75 /* Multiple Writes of USB memory */
76 DT9812_W_MULTI_BYTE_REG = 5,
77 /* Read, (AND) with mask, OR value, then write (single) */
78 DT9812_RMW_SINGLE_BYTE_REG = 6,
79 /* Read, (AND) with mask, OR value, then write (multiple) */
80 DT9812_RMW_MULTI_BYTE_REG = 7,
81
82 /*
83 * Register read/write commands for SMBus
84 */
85
86 /* Read a single byte of SMBus */
87 DT9812_R_SINGLE_BYTE_SMBUS = 8,
88 /* Write a single byte of SMBus */
89 DT9812_W_SINGLE_BYTE_SMBUS = 9,
90 /* Multiple Reads of SMBus */
91 DT9812_R_MULTI_BYTE_SMBUS = 10,
92 /* Multiple Writes of SMBus */
93 DT9812_W_MULTI_BYTE_SMBUS = 11,
94
95 /*
96 * Register read/write commands for a device
97 */
98
99 /* Read a single byte of a device */
100 DT9812_R_SINGLE_BYTE_DEV = 12,
101 /* Write a single byte of a device */
102 DT9812_W_SINGLE_BYTE_DEV = 13,
103 /* Multiple Reads of a device */
104 DT9812_R_MULTI_BYTE_DEV = 14,
105 /* Multiple Writes of a device */
106 DT9812_W_MULTI_BYTE_DEV = 15,
107
108 /* Not sure if we'll need this */
109 DT9812_W_DAC_THRESHOLD = 16,
110
111 /* Set interrupt on change mask */
112 DT9812_W_INT_ON_CHANGE_MASK = 17,
113
114 /* Write (or Clear) the CGL for the ADC */
115 DT9812_W_CGL = 18,
116 /* Multiple Reads of USB memory */
117 DT9812_R_MULTI_BYTE_USBMEM = 19,
118 /* Multiple Writes to USB memory */
119 DT9812_W_MULTI_BYTE_USBMEM = 20,
120
121 /* Issue a start command to a given subsystem */
122 DT9812_START_SUBSYSTEM = 21,
123 /* Issue a stop command to a given subsystem */
124 DT9812_STOP_SUBSYSTEM = 22,
125
126 /* calibrate the board using CAL_POT_CMD */
127 DT9812_CALIBRATE_POT = 23,
128 /* set the DAC FIFO size */
129 DT9812_W_DAC_FIFO_SIZE = 24,
130 /* Write or Clear the CGL for the DAC */
131 DT9812_W_CGL_DAC = 25,
132 /* Read a single value from a subsystem */
133 DT9812_R_SINGLE_VALUE_CMD = 26,
134 /* Write a single value to a subsystem */
135 DT9812_W_SINGLE_VALUE_CMD = 27,
136 /* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
137 DT9812_MAX_USB_FIRMWARE_CMD_CODE,
138} dt9812_usb_firmware_cmd_t;
139
140typedef struct {
141 u16 numbytes;
142 u16 address;
143} dt9812_flash_data_t;
144
145#define DT9812_MAX_NUM_MULTI_BYTE_RDS \
146 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
147
148typedef struct {
149 u8 count;
150 u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
151} dt9812_read_multi_t;
152
153typedef struct {
154 u8 address;
155 u8 value;
156} dt9812_write_byte_t;
157
158#define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
159 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t))
160
161typedef struct {
162 u8 count;
163 dt9812_write_byte_t write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
164} dt9812_write_multi_t;
165
166typedef struct {
167 u8 address;
168 u8 and_mask;
169 u8 or_value;
170} dt9812_rmw_byte_t;
171
172#define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
173 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t))
174
175typedef struct {
176 u8 count;
177 dt9812_rmw_byte_t rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
178} dt9812_rmw_multi_t;
179
180typedef struct dt9812_usb_cmd {
181
182 u32 cmd;
183 union {
184 dt9812_flash_data_t flash_data_info;
185 dt9812_read_multi_t read_multi_info;
186 dt9812_write_multi_t write_multi_info;
187 dt9812_rmw_multi_t rmw_multi_info;
188 } u;
189#if 0
190 WRITE_BYTE_INFO WriteByteInfo;
191 READ_BYTE_INFO ReadByteInfo;
192 WRITE_MULTI_INFO WriteMultiInfo;
193 READ_MULTI_INFO ReadMultiInfo;
194 RMW_BYTE_INFO RMWByteInfo;
195 RMW_MULTI_INFO RMWMultiInfo;
196 DAC_THRESHOLD_INFO DacThresholdInfo;
197 INT_ON_CHANGE_MASK_INFO IntOnChangeMaskInfo;
198 CGL_INFO CglInfo;
199 SUBSYSTEM_INFO SubsystemInfo;
200 CAL_POT_CMD CalPotCmd;
201 WRITE_DEV_BYTE_INFO WriteDevByteInfo;
202 READ_DEV_BYTE_INFO ReadDevByteInfo;
203 WRITE_DEV_MULTI_INFO WriteDevMultiInfo;
204 READ_DEV_MULTI_INFO ReadDevMultiInfo;
205 READ_SINGLE_VALUE_INFO ReadSingleValueInfo;
206 WRITE_SINGLE_VALUE_INFO WriteSingleValueInfo;
207#endif
208} dt9812_usb_cmd_t;
209
210#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 04:34:16 -0400