diff options
| author | Stephane Eranian <eranian@google.com> | 2010-01-18 03:58:01 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2010-01-21 07:40:41 -0500 |
| commit | b27d515a49169e5e2a92d621faac761074a8c5b1 (patch) | |
| tree | cc27b8a7c3b3d07df4a09c0eed9ca7aaf265ead1 | |
| parent | 92b6759857ea3ad19bc6871044e373f6251841d3 (diff) | |
perf: x86: Add support for the ANY bit
Propagate the ANY bit into the fixed counter config for v3 and higher.
Signed-off-by: Stephane Eranian <eranian@google.com>
[a.p.zijlstra@chello.nl: split from larger patch]
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <4b5430c6.0f975e0a.1bf9.ffff85fe@mx.google.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 1 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 8d9f8548a870..1380367dabd9 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #define MSR_ARCH_PERFMON_EVENTSEL1 0x187 | 19 | #define MSR_ARCH_PERFMON_EVENTSEL1 0x187 |
| 20 | 20 | ||
| 21 | #define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22) | 21 | #define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22) |
| 22 | #define ARCH_PERFMON_EVENTSEL_ANY (1 << 21) | ||
| 22 | #define ARCH_PERFMON_EVENTSEL_INT (1 << 20) | 23 | #define ARCH_PERFMON_EVENTSEL_INT (1 << 20) |
| 23 | #define ARCH_PERFMON_EVENTSEL_OS (1 << 17) | 24 | #define ARCH_PERFMON_EVENTSEL_OS (1 << 17) |
| 24 | #define ARCH_PERFMON_EVENTSEL_USR (1 << 16) | 25 | #define ARCH_PERFMON_EVENTSEL_USR (1 << 16) |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index d616c06e99b4..8c1c07073ccc 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
| @@ -1343,6 +1343,13 @@ intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx) | |||
| 1343 | bits |= 0x2; | 1343 | bits |= 0x2; |
| 1344 | if (hwc->config & ARCH_PERFMON_EVENTSEL_OS) | 1344 | if (hwc->config & ARCH_PERFMON_EVENTSEL_OS) |
| 1345 | bits |= 0x1; | 1345 | bits |= 0x1; |
| 1346 | |||
| 1347 | /* | ||
| 1348 | * ANY bit is supported in v3 and up | ||
| 1349 | */ | ||
| 1350 | if (x86_pmu.version > 2 && hwc->config & ARCH_PERFMON_EVENTSEL_ANY) | ||
| 1351 | bits |= 0x4; | ||
| 1352 | |||
| 1346 | bits <<= (idx * 4); | 1353 | bits <<= (idx * 4); |
| 1347 | mask = 0xfULL << (idx * 4); | 1354 | mask = 0xfULL << (idx * 4); |
| 1348 | 1355 | ||
