diff options
author | G, Manjunath Kondaiah <manjugk@ti.com> | 2010-12-20 21:27:18 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-12-20 21:38:29 -0500 |
commit | 82cbd1aebafd126f40a8ed0725a6feb6ed710576 (patch) | |
tree | 7b1ccc3bc527bf5da3d1163e013e2c9cfd30413c | |
parent | 745685df95961ebbf0bcafcf28f31217a75070ae (diff) |
OMAP2430: hwmod data: add system DMA
Add OMAP2430 DMA hwmod data and also add required
DMA device attributes.
Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 86 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/dma.h | 1 |
2 files changed, 87 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index f68409e9fd3e..c893e00b6544 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -43,6 +43,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod; | |||
43 | static struct omap_hwmod omap2430_gpio3_hwmod; | 43 | static struct omap_hwmod omap2430_gpio3_hwmod; |
44 | static struct omap_hwmod omap2430_gpio4_hwmod; | 44 | static struct omap_hwmod omap2430_gpio4_hwmod; |
45 | static struct omap_hwmod omap2430_gpio5_hwmod; | 45 | static struct omap_hwmod omap2430_gpio5_hwmod; |
46 | static struct omap_hwmod omap2430_dma_system_hwmod; | ||
46 | 47 | ||
47 | /* L3 -> L4_CORE interface */ | 48 | /* L3 -> L4_CORE interface */ |
48 | static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { | 49 | static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { |
@@ -840,6 +841,88 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { | |||
840 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | 841 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
841 | }; | 842 | }; |
842 | 843 | ||
844 | /* dma_system */ | ||
845 | static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { | ||
846 | .rev_offs = 0x0000, | ||
847 | .sysc_offs = 0x002c, | ||
848 | .syss_offs = 0x0028, | ||
849 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | ||
850 | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | ||
851 | SYSC_HAS_AUTOIDLE), | ||
852 | .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
853 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
854 | }; | ||
855 | |||
856 | static struct omap_hwmod_class omap2430_dma_hwmod_class = { | ||
857 | .name = "dma", | ||
858 | .sysc = &omap2430_dma_sysc, | ||
859 | }; | ||
860 | |||
861 | /* dma attributes */ | ||
862 | static struct omap_dma_dev_attr dma_dev_attr = { | ||
863 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | | ||
864 | IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, | ||
865 | .lch_count = 32, | ||
866 | }; | ||
867 | |||
868 | static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
869 | { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
870 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
871 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
872 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
873 | }; | ||
874 | |||
875 | static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { | ||
876 | { | ||
877 | .pa_start = 0x48056000, | ||
878 | .pa_end = 0x4a0560ff, | ||
879 | .flags = ADDR_TYPE_RT | ||
880 | }, | ||
881 | }; | ||
882 | |||
883 | /* dma_system -> L3 */ | ||
884 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { | ||
885 | .master = &omap2430_dma_system_hwmod, | ||
886 | .slave = &omap2430_l3_main_hwmod, | ||
887 | .clk = "core_l3_ck", | ||
888 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
889 | }; | ||
890 | |||
891 | /* dma_system master ports */ | ||
892 | static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = { | ||
893 | &omap2430_dma_system__l3, | ||
894 | }; | ||
895 | |||
896 | /* l4_core -> dma_system */ | ||
897 | static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { | ||
898 | .master = &omap2430_l4_core_hwmod, | ||
899 | .slave = &omap2430_dma_system_hwmod, | ||
900 | .clk = "sdma_ick", | ||
901 | .addr = omap2430_dma_system_addrs, | ||
902 | .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), | ||
903 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
904 | }; | ||
905 | |||
906 | /* dma_system slave ports */ | ||
907 | static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { | ||
908 | &omap2430_l4_core__dma_system, | ||
909 | }; | ||
910 | |||
911 | static struct omap_hwmod omap2430_dma_system_hwmod = { | ||
912 | .name = "dma", | ||
913 | .class = &omap2430_dma_hwmod_class, | ||
914 | .mpu_irqs = omap2430_dma_system_irqs, | ||
915 | .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), | ||
916 | .main_clk = "core_l3_ck", | ||
917 | .slaves = omap2430_dma_system_slaves, | ||
918 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), | ||
919 | .masters = omap2430_dma_system_masters, | ||
920 | .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), | ||
921 | .dev_attr = &dma_dev_attr, | ||
922 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
923 | .flags = HWMOD_NO_IDLEST, | ||
924 | }; | ||
925 | |||
843 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { | 926 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { |
844 | &omap2430_l3_main_hwmod, | 927 | &omap2430_l3_main_hwmod, |
845 | &omap2430_l4_core_hwmod, | 928 | &omap2430_l4_core_hwmod, |
@@ -859,6 +942,9 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = { | |||
859 | &omap2430_gpio3_hwmod, | 942 | &omap2430_gpio3_hwmod, |
860 | &omap2430_gpio4_hwmod, | 943 | &omap2430_gpio4_hwmod, |
861 | &omap2430_gpio5_hwmod, | 944 | &omap2430_gpio5_hwmod, |
945 | |||
946 | /* dma_system class*/ | ||
947 | &omap2430_dma_system_hwmod, | ||
862 | NULL, | 948 | NULL, |
863 | }; | 949 | }; |
864 | 950 | ||
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index c4665669a8a3..4b51d2b93b0e 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h | |||
@@ -301,6 +301,7 @@ | |||
301 | #define RESERVE_CHANNEL BIT(0x2) | 301 | #define RESERVE_CHANNEL BIT(0x2) |
302 | #define IS_CSSA_32 BIT(0x3) | 302 | #define IS_CSSA_32 BIT(0x3) |
303 | #define IS_CDSA_32 BIT(0x4) | 303 | #define IS_CDSA_32 BIT(0x4) |
304 | #define IS_RW_PRIORITY BIT(0x5) | ||
304 | 305 | ||
305 | enum omap_reg_offsets { | 306 | enum omap_reg_offsets { |
306 | 307 | ||