diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-08-19 22:54:38 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-19 22:54:38 -0400 |
commit | 65603789db56b915dd5e3ea0501a7773ecf4092d (patch) | |
tree | fbd367199986eb00e82a5c2e24b0e22d616b7690 | |
parent | e638fab91e5d1c4db3a80957546c32ed4bd75086 (diff) | |
parent | f8f8c0797d73624d6e81dbb9c9e8f85005500ebc (diff) |
Merge branch 'sh/r8a66597-udc'
-rw-r--r-- | arch/sh/boards/mach-kfr2r09/setup.c | 103 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7724/setup.c | 33 | ||||
-rw-r--r-- | drivers/usb/gadget/Kconfig | 18 | ||||
-rw-r--r-- | drivers/usb/gadget/Makefile | 1 | ||||
-rw-r--r-- | drivers/usb/gadget/gadget_chips.h | 8 | ||||
-rw-r--r-- | drivers/usb/gadget/r8a66597-udc.c | 1665 | ||||
-rw-r--r-- | drivers/usb/gadget/r8a66597-udc.h | 255 |
7 files changed, 2083 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c index bdb10c29ef18..1cbd6a3655c3 100644 --- a/arch/sh/boards/mach-kfr2r09/setup.c +++ b/arch/sh/boards/mach-kfr2r09/setup.c | |||
@@ -16,6 +16,8 @@ | |||
16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/input.h> | 18 | #include <linux/input.h> |
19 | #include <linux/i2c.h> | ||
20 | #include <linux/usb/r8a66597.h> | ||
19 | #include <video/sh_mobile_lcdc.h> | 21 | #include <video/sh_mobile_lcdc.h> |
20 | #include <asm/clock.h> | 22 | #include <asm/clock.h> |
21 | #include <asm/machvec.h> | 23 | #include <asm/machvec.h> |
@@ -175,6 +177,35 @@ static struct platform_device kfr2r09_sh_lcdc_device = { | |||
175 | }, | 177 | }, |
176 | }; | 178 | }; |
177 | 179 | ||
180 | static struct r8a66597_platdata kfr2r09_usb0_gadget_data = { | ||
181 | .on_chip = 1, | ||
182 | }; | ||
183 | |||
184 | static struct resource kfr2r09_usb0_gadget_resources[] = { | ||
185 | [0] = { | ||
186 | .start = 0x04d80000, | ||
187 | .end = 0x04d80123, | ||
188 | .flags = IORESOURCE_MEM, | ||
189 | }, | ||
190 | [1] = { | ||
191 | .start = 65, | ||
192 | .end = 65, | ||
193 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | static struct platform_device kfr2r09_usb0_gadget_device = { | ||
198 | .name = "r8a66597_udc", | ||
199 | .id = 0, | ||
200 | .dev = { | ||
201 | .dma_mask = NULL, /* not use dma */ | ||
202 | .coherent_dma_mask = 0xffffffff, | ||
203 | .platform_data = &kfr2r09_usb0_gadget_data, | ||
204 | }, | ||
205 | .num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources), | ||
206 | .resource = kfr2r09_usb0_gadget_resources, | ||
207 | }; | ||
208 | |||
178 | static struct platform_device *kfr2r09_devices[] __initdata = { | 209 | static struct platform_device *kfr2r09_devices[] __initdata = { |
179 | &kfr2r09_nor_flash_device, | 210 | &kfr2r09_nor_flash_device, |
180 | &kfr2r09_nand_flash_device, | 211 | &kfr2r09_nand_flash_device, |
@@ -186,6 +217,74 @@ static struct platform_device *kfr2r09_devices[] __initdata = { | |||
186 | #define BSC_CS0WCR 0xfec10024 | 217 | #define BSC_CS0WCR 0xfec10024 |
187 | #define BSC_CS4BCR 0xfec10010 | 218 | #define BSC_CS4BCR 0xfec10010 |
188 | #define BSC_CS4WCR 0xfec10030 | 219 | #define BSC_CS4WCR 0xfec10030 |
220 | #define PORT_MSELCRB 0xa4050182 | ||
221 | |||
222 | static int kfr2r09_usb0_gadget_i2c_setup(void) | ||
223 | { | ||
224 | struct i2c_adapter *a; | ||
225 | struct i2c_msg msg; | ||
226 | unsigned char buf[2]; | ||
227 | int ret; | ||
228 | |||
229 | a = i2c_get_adapter(0); | ||
230 | if (!a) | ||
231 | return -ENODEV; | ||
232 | |||
233 | /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */ | ||
234 | buf[0] = 0x13; | ||
235 | msg.addr = 0x09; | ||
236 | msg.buf = buf; | ||
237 | msg.len = 1; | ||
238 | msg.flags = 0; | ||
239 | ret = i2c_transfer(a, &msg, 1); | ||
240 | if (ret != 1) | ||
241 | return -ENODEV; | ||
242 | |||
243 | buf[0] = 0; | ||
244 | msg.addr = 0x09; | ||
245 | msg.buf = buf; | ||
246 | msg.len = 1; | ||
247 | msg.flags = I2C_M_RD; | ||
248 | ret = i2c_transfer(a, &msg, 1); | ||
249 | if (ret != 1) | ||
250 | return -ENODEV; | ||
251 | |||
252 | buf[1] = buf[0] | (1 << 1); | ||
253 | buf[0] = 0x13; | ||
254 | msg.addr = 0x09; | ||
255 | msg.buf = buf; | ||
256 | msg.len = 2; | ||
257 | msg.flags = 0; | ||
258 | ret = i2c_transfer(a, &msg, 1); | ||
259 | if (ret != 1) | ||
260 | return -ENODEV; | ||
261 | |||
262 | return 0; | ||
263 | } | ||
264 | |||
265 | static int kfr2r09_usb0_gadget_setup(void) | ||
266 | { | ||
267 | int plugged_in; | ||
268 | |||
269 | gpio_request(GPIO_PTN4, NULL); /* USB_DET */ | ||
270 | gpio_direction_input(GPIO_PTN4); | ||
271 | plugged_in = gpio_get_value(GPIO_PTN4); | ||
272 | if (!plugged_in) | ||
273 | return -ENODEV; /* no cable plugged in */ | ||
274 | |||
275 | if (kfr2r09_usb0_gadget_i2c_setup() != 0) | ||
276 | return -ENODEV; /* unable to configure using i2c */ | ||
277 | |||
278 | ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); | ||
279 | gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ | ||
280 | gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ | ||
281 | gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ | ||
282 | msleep(20); /* wait 20ms to let the clock settle */ | ||
283 | clk_enable(clk_get(NULL, "usb0")); | ||
284 | ctrl_outw(0x0600, 0xa40501d4); | ||
285 | |||
286 | return 0; | ||
287 | } | ||
189 | 288 | ||
190 | static int __init kfr2r09_devices_setup(void) | 289 | static int __init kfr2r09_devices_setup(void) |
191 | { | 290 | { |
@@ -245,6 +344,10 @@ static int __init kfr2r09_devices_setup(void) | |||
245 | gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */ | 344 | gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */ |
246 | gpio_direction_output(GPIO_PTU0, 1); | 345 | gpio_direction_output(GPIO_PTU0, 1); |
247 | 346 | ||
347 | /* setup USB function */ | ||
348 | if (kfr2r09_usb0_gadget_setup() == 0) | ||
349 | platform_device_register(&kfr2r09_usb0_gadget_device); | ||
350 | |||
248 | return platform_add_devices(kfr2r09_devices, | 351 | return platform_add_devices(kfr2r09_devices, |
249 | ARRAY_SIZE(kfr2r09_devices)); | 352 | ARRAY_SIZE(kfr2r09_devices)); |
250 | } | 353 | } |
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index c04e134474d8..e6bd09f2e14a 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c | |||
@@ -341,6 +341,35 @@ static struct platform_device sh7724_usb0_host_device = { | |||
341 | .resource = sh7724_usb0_host_resources, | 341 | .resource = sh7724_usb0_host_resources, |
342 | }; | 342 | }; |
343 | 343 | ||
344 | static struct r8a66597_platdata sh7724_usb1_gadget_data = { | ||
345 | .on_chip = 1, | ||
346 | }; | ||
347 | |||
348 | static struct resource sh7724_usb1_gadget_resources[] = { | ||
349 | [0] = { | ||
350 | .start = 0xa4d90000, | ||
351 | .end = 0xa4d90123, | ||
352 | .flags = IORESOURCE_MEM, | ||
353 | }, | ||
354 | [1] = { | ||
355 | .start = 66, | ||
356 | .end = 66, | ||
357 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
358 | }, | ||
359 | }; | ||
360 | |||
361 | static struct platform_device sh7724_usb1_gadget_device = { | ||
362 | .name = "r8a66597_udc", | ||
363 | .id = 1, /* USB1 */ | ||
364 | .dev = { | ||
365 | .dma_mask = NULL, /* not use dma */ | ||
366 | .coherent_dma_mask = 0xffffffff, | ||
367 | .platform_data = &sh7724_usb1_gadget_data, | ||
368 | }, | ||
369 | .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), | ||
370 | .resource = sh7724_usb1_gadget_resources, | ||
371 | }; | ||
372 | |||
344 | static struct platform_device *ms7724se_devices[] __initdata = { | 373 | static struct platform_device *ms7724se_devices[] __initdata = { |
345 | &heartbeat_device, | 374 | &heartbeat_device, |
346 | &smc91x_eth_device, | 375 | &smc91x_eth_device, |
@@ -351,6 +380,7 @@ static struct platform_device *ms7724se_devices[] __initdata = { | |||
351 | &keysc_device, | 380 | &keysc_device, |
352 | &sh_eth_device, | 381 | &sh_eth_device, |
353 | &sh7724_usb0_host_device, | 382 | &sh7724_usb0_host_device, |
383 | &sh7724_usb1_gadget_device, | ||
354 | }; | 384 | }; |
355 | 385 | ||
356 | #define EEPROM_OP 0xBA206000 | 386 | #define EEPROM_OP 0xBA206000 |
@@ -459,6 +489,9 @@ static int __init devices_setup(void) | |||
459 | /* enable USB0 port */ | 489 | /* enable USB0 port */ |
460 | ctrl_outw(0x0600, 0xa40501d4); | 490 | ctrl_outw(0x0600, 0xa40501d4); |
461 | 491 | ||
492 | /* enable USB1 port */ | ||
493 | ctrl_outw(0x0600, 0xa4050192); | ||
494 | |||
462 | /* enable IRQ 0,1,2 */ | 495 | /* enable IRQ 0,1,2 */ |
463 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | 496 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); |
464 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); | 497 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); |
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index b7f10bc25c2c..9f986b417c5b 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -251,6 +251,24 @@ config USB_PXA25X_SMALL | |||
251 | default y if USB_ETH | 251 | default y if USB_ETH |
252 | default y if USB_G_SERIAL | 252 | default y if USB_G_SERIAL |
253 | 253 | ||
254 | config USB_GADGET_R8A66597 | ||
255 | boolean "Renesas R8A66597 USB Peripheral Controller" | ||
256 | select USB_GADGET_DUALSPEED | ||
257 | help | ||
258 | R8A66597 is a discrete USB host and peripheral controller chip that | ||
259 | supports both full and high speed USB 2.0 data transfers. | ||
260 | It has nine configurable endpoints, and endpoint zero. | ||
261 | |||
262 | Say "y" to link the driver statically, or "m" to build a | ||
263 | dynamically linked module called "r8a66597_udc" and force all | ||
264 | gadget drivers to also be dynamically linked. | ||
265 | |||
266 | config USB_R8A66597 | ||
267 | tristate | ||
268 | depends on USB_GADGET_R8A66597 | ||
269 | default USB_GADGET | ||
270 | select USB_GADGET_SELECTED | ||
271 | |||
254 | config USB_GADGET_PXA27X | 272 | config USB_GADGET_PXA27X |
255 | boolean "PXA 27x" | 273 | boolean "PXA 27x" |
256 | depends on ARCH_PXA && (PXA27x || PXA3xx) | 274 | depends on ARCH_PXA && (PXA27x || PXA3xx) |
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index e6017e6bf6da..9d7b87c52e9f 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile | |||
@@ -23,6 +23,7 @@ ifeq ($(CONFIG_ARCH_MXC),y) | |||
23 | fsl_usb2_udc-objs += fsl_mx3_udc.o | 23 | fsl_usb2_udc-objs += fsl_mx3_udc.o |
24 | endif | 24 | endif |
25 | obj-$(CONFIG_USB_M66592) += m66592-udc.o | 25 | obj-$(CONFIG_USB_M66592) += m66592-udc.o |
26 | obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o | ||
26 | obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o | 27 | obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o |
27 | obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o | 28 | obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o |
28 | obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o | 29 | obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o |
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 8e0e9a0b7364..f2d270b202f2 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h | |||
@@ -173,6 +173,12 @@ | |||
173 | // CONFIG_USB_GADGET_AU1X00 | 173 | // CONFIG_USB_GADGET_AU1X00 |
174 | // ... | 174 | // ... |
175 | 175 | ||
176 | #ifdef CONFIG_USB_GADGET_R8A66597 | ||
177 | #define gadget_is_r8a66597(g) !strcmp("r8a66597_udc", (g)->name) | ||
178 | #else | ||
179 | #define gadget_is_r8a66597(g) 0 | ||
180 | #endif | ||
181 | |||
176 | 182 | ||
177 | /** | 183 | /** |
178 | * usb_gadget_controller_number - support bcdDevice id convention | 184 | * usb_gadget_controller_number - support bcdDevice id convention |
@@ -239,6 +245,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) | |||
239 | return 0x23; | 245 | return 0x23; |
240 | else if (gadget_is_langwell(gadget)) | 246 | else if (gadget_is_langwell(gadget)) |
241 | return 0x24; | 247 | return 0x24; |
248 | else if (gadget_is_r8a66597(gadget)) | ||
249 | return 0x25; | ||
242 | return -ENOENT; | 250 | return -ENOENT; |
243 | } | 251 | } |
244 | 252 | ||
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c new file mode 100644 index 000000000000..9ca867a85a05 --- /dev/null +++ b/drivers/usb/gadget/r8a66597-udc.c | |||
@@ -0,0 +1,1665 @@ | |||
1 | /* | ||
2 | * R8A66597 UDC (USB gadget) | ||
3 | * | ||
4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | ||
5 | * | ||
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; version 2 of the License. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/io.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/clk.h> | ||
29 | |||
30 | #include <linux/usb/ch9.h> | ||
31 | #include <linux/usb/gadget.h> | ||
32 | |||
33 | #include "r8a66597-udc.h" | ||
34 | |||
35 | #define DRIVER_VERSION "2009-08-18" | ||
36 | |||
37 | static const char udc_name[] = "r8a66597_udc"; | ||
38 | static const char *r8a66597_ep_name[] = { | ||
39 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | ||
40 | "ep8", "ep9", | ||
41 | }; | ||
42 | |||
43 | static void disable_controller(struct r8a66597 *r8a66597); | ||
44 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | ||
45 | static void irq_packet_write(struct r8a66597_ep *ep, | ||
46 | struct r8a66597_request *req); | ||
47 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
48 | gfp_t gfp_flags); | ||
49 | |||
50 | static void transfer_complete(struct r8a66597_ep *ep, | ||
51 | struct r8a66597_request *req, int status); | ||
52 | |||
53 | /*-------------------------------------------------------------------------*/ | ||
54 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | ||
55 | { | ||
56 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | ||
57 | } | ||
58 | |||
59 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | ||
60 | unsigned long reg) | ||
61 | { | ||
62 | u16 tmp; | ||
63 | |||
64 | tmp = r8a66597_read(r8a66597, INTENB0); | ||
65 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | ||
66 | INTENB0); | ||
67 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | ||
68 | r8a66597_write(r8a66597, tmp, INTENB0); | ||
69 | } | ||
70 | |||
71 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | ||
72 | unsigned long reg) | ||
73 | { | ||
74 | u16 tmp; | ||
75 | |||
76 | tmp = r8a66597_read(r8a66597, INTENB0); | ||
77 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | ||
78 | INTENB0); | ||
79 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | ||
80 | r8a66597_write(r8a66597, tmp, INTENB0); | ||
81 | } | ||
82 | |||
83 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | ||
84 | { | ||
85 | r8a66597_bset(r8a66597, CTRE, INTENB0); | ||
86 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | ||
87 | |||
88 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | ||
89 | } | ||
90 | |||
91 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | ||
92 | __releases(r8a66597->lock) | ||
93 | __acquires(r8a66597->lock) | ||
94 | { | ||
95 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | ||
96 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | ||
97 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
98 | |||
99 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | ||
100 | spin_unlock(&r8a66597->lock); | ||
101 | r8a66597->driver->disconnect(&r8a66597->gadget); | ||
102 | spin_lock(&r8a66597->lock); | ||
103 | |||
104 | disable_controller(r8a66597); | ||
105 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); | ||
106 | } | ||
107 | |||
108 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | ||
109 | { | ||
110 | u16 pid = 0; | ||
111 | unsigned long offset; | ||
112 | |||
113 | if (pipenum == 0) | ||
114 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | ||
115 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
116 | offset = get_pipectr_addr(pipenum); | ||
117 | pid = r8a66597_read(r8a66597, offset) & PID; | ||
118 | } else | ||
119 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
120 | |||
121 | return pid; | ||
122 | } | ||
123 | |||
124 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | ||
125 | u16 pid) | ||
126 | { | ||
127 | unsigned long offset; | ||
128 | |||
129 | if (pipenum == 0) | ||
130 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | ||
131 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
132 | offset = get_pipectr_addr(pipenum); | ||
133 | r8a66597_mdfy(r8a66597, pid, PID, offset); | ||
134 | } else | ||
135 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
136 | } | ||
137 | |||
138 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | ||
139 | { | ||
140 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | ||
141 | } | ||
142 | |||
143 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | ||
144 | { | ||
145 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | ||
146 | } | ||
147 | |||
148 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | ||
149 | { | ||
150 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | ||
151 | } | ||
152 | |||
153 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | ||
154 | { | ||
155 | u16 ret = 0; | ||
156 | unsigned long offset; | ||
157 | |||
158 | if (pipenum == 0) | ||
159 | ret = r8a66597_read(r8a66597, DCPCTR); | ||
160 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
161 | offset = get_pipectr_addr(pipenum); | ||
162 | ret = r8a66597_read(r8a66597, offset); | ||
163 | } else | ||
164 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
165 | |||
166 | return ret; | ||
167 | } | ||
168 | |||
169 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | ||
170 | { | ||
171 | unsigned long offset; | ||
172 | |||
173 | pipe_stop(r8a66597, pipenum); | ||
174 | |||
175 | if (pipenum == 0) | ||
176 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | ||
177 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
178 | offset = get_pipectr_addr(pipenum); | ||
179 | r8a66597_bset(r8a66597, SQCLR, offset); | ||
180 | } else | ||
181 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | ||
182 | } | ||
183 | |||
184 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | ||
185 | { | ||
186 | u16 tmp; | ||
187 | int size; | ||
188 | |||
189 | if (pipenum == 0) { | ||
190 | tmp = r8a66597_read(r8a66597, DCPCFG); | ||
191 | if ((tmp & R8A66597_CNTMD) != 0) | ||
192 | size = 256; | ||
193 | else { | ||
194 | tmp = r8a66597_read(r8a66597, DCPMAXP); | ||
195 | size = tmp & MAXP; | ||
196 | } | ||
197 | } else { | ||
198 | r8a66597_write(r8a66597, pipenum, PIPESEL); | ||
199 | tmp = r8a66597_read(r8a66597, PIPECFG); | ||
200 | if ((tmp & R8A66597_CNTMD) != 0) { | ||
201 | tmp = r8a66597_read(r8a66597, PIPEBUF); | ||
202 | size = ((tmp >> 10) + 1) * 64; | ||
203 | } else { | ||
204 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | ||
205 | size = tmp & MXPS; | ||
206 | } | ||
207 | } | ||
208 | |||
209 | return size; | ||
210 | } | ||
211 | |||
212 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | ||
213 | { | ||
214 | if (r8a66597->pdata->on_chip) | ||
215 | return MBW_32; | ||
216 | else | ||
217 | return MBW_16; | ||
218 | } | ||
219 | |||
220 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | ||
221 | { | ||
222 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | ||
223 | |||
224 | if (ep->use_dma) | ||
225 | return; | ||
226 | |||
227 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | ||
228 | |||
229 | ndelay(450); | ||
230 | |||
231 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | ||
232 | } | ||
233 | |||
234 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | ||
235 | struct r8a66597_pipe_info *info) | ||
236 | { | ||
237 | u16 bufnum = 0, buf_bsize = 0; | ||
238 | u16 pipecfg = 0; | ||
239 | |||
240 | if (info->pipe == 0) | ||
241 | return -EINVAL; | ||
242 | |||
243 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | ||
244 | |||
245 | if (info->dir_in) | ||
246 | pipecfg |= R8A66597_DIR; | ||
247 | pipecfg |= info->type; | ||
248 | pipecfg |= info->epnum; | ||
249 | switch (info->type) { | ||
250 | case R8A66597_INT: | ||
251 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | ||
252 | buf_bsize = 0; | ||
253 | break; | ||
254 | case R8A66597_BULK: | ||
255 | /* isochronous pipes may be used as bulk pipes */ | ||
256 | if (info->pipe > R8A66597_BASE_PIPENUM_BULK) | ||
257 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; | ||
258 | else | ||
259 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | ||
260 | |||
261 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | ||
262 | buf_bsize = 7; | ||
263 | pipecfg |= R8A66597_DBLB; | ||
264 | if (!info->dir_in) | ||
265 | pipecfg |= R8A66597_SHTNAK; | ||
266 | break; | ||
267 | case R8A66597_ISO: | ||
268 | bufnum = R8A66597_BASE_BUFNUM + | ||
269 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; | ||
270 | buf_bsize = 7; | ||
271 | break; | ||
272 | } | ||
273 | |||
274 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | ||
275 | pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n"); | ||
276 | return -ENOMEM; | ||
277 | } | ||
278 | |||
279 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | ||
280 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | ||
281 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | ||
282 | if (info->interval) | ||
283 | info->interval--; | ||
284 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | ||
285 | |||
286 | return 0; | ||
287 | } | ||
288 | |||
289 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | ||
290 | struct r8a66597_pipe_info *info) | ||
291 | { | ||
292 | if (info->pipe == 0) | ||
293 | return; | ||
294 | |||
295 | if (is_bulk_pipe(info->pipe)) | ||
296 | r8a66597->bulk--; | ||
297 | else if (is_interrupt_pipe(info->pipe)) | ||
298 | r8a66597->interrupt--; | ||
299 | else if (is_isoc_pipe(info->pipe)) { | ||
300 | r8a66597->isochronous--; | ||
301 | if (info->type == R8A66597_BULK) | ||
302 | r8a66597->bulk--; | ||
303 | } else | ||
304 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | ||
305 | info->pipe); | ||
306 | } | ||
307 | |||
308 | static void pipe_initialize(struct r8a66597_ep *ep) | ||
309 | { | ||
310 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
311 | |||
312 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | ||
313 | |||
314 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | ||
315 | r8a66597_write(r8a66597, 0, ep->pipectr); | ||
316 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | ||
317 | if (ep->use_dma) { | ||
318 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | ||
319 | |||
320 | ndelay(450); | ||
321 | |||
322 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | ||
323 | } | ||
324 | } | ||
325 | |||
326 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | ||
327 | struct r8a66597_ep *ep, | ||
328 | const struct usb_endpoint_descriptor *desc, | ||
329 | u16 pipenum, int dma) | ||
330 | { | ||
331 | ep->use_dma = 0; | ||
332 | ep->fifoaddr = CFIFO; | ||
333 | ep->fifosel = CFIFOSEL; | ||
334 | ep->fifoctr = CFIFOCTR; | ||
335 | ep->fifotrn = 0; | ||
336 | |||
337 | ep->pipectr = get_pipectr_addr(pipenum); | ||
338 | ep->pipenum = pipenum; | ||
339 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | ||
340 | r8a66597->pipenum2ep[pipenum] = ep; | ||
341 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | ||
342 | = ep; | ||
343 | INIT_LIST_HEAD(&ep->queue); | ||
344 | } | ||
345 | |||
346 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | ||
347 | { | ||
348 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
349 | u16 pipenum = ep->pipenum; | ||
350 | |||
351 | if (pipenum == 0) | ||
352 | return; | ||
353 | |||
354 | if (ep->use_dma) | ||
355 | r8a66597->num_dma--; | ||
356 | ep->pipenum = 0; | ||
357 | ep->busy = 0; | ||
358 | ep->use_dma = 0; | ||
359 | } | ||
360 | |||
361 | static int alloc_pipe_config(struct r8a66597_ep *ep, | ||
362 | const struct usb_endpoint_descriptor *desc) | ||
363 | { | ||
364 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
365 | struct r8a66597_pipe_info info; | ||
366 | int dma = 0; | ||
367 | unsigned char *counter; | ||
368 | int ret; | ||
369 | |||
370 | ep->desc = desc; | ||
371 | |||
372 | if (ep->pipenum) /* already allocated pipe */ | ||
373 | return 0; | ||
374 | |||
375 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | ||
376 | case USB_ENDPOINT_XFER_BULK: | ||
377 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | ||
378 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | ||
379 | printk(KERN_ERR "bulk pipe is insufficient\n"); | ||
380 | return -ENODEV; | ||
381 | } else { | ||
382 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | ||
383 | + r8a66597->isochronous; | ||
384 | counter = &r8a66597->isochronous; | ||
385 | } | ||
386 | } else { | ||
387 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | ||
388 | counter = &r8a66597->bulk; | ||
389 | } | ||
390 | info.type = R8A66597_BULK; | ||
391 | dma = 1; | ||
392 | break; | ||
393 | case USB_ENDPOINT_XFER_INT: | ||
394 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | ||
395 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | ||
396 | return -ENODEV; | ||
397 | } | ||
398 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | ||
399 | info.type = R8A66597_INT; | ||
400 | counter = &r8a66597->interrupt; | ||
401 | break; | ||
402 | case USB_ENDPOINT_XFER_ISOC: | ||
403 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | ||
404 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | ||
405 | return -ENODEV; | ||
406 | } | ||
407 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | ||
408 | info.type = R8A66597_ISO; | ||
409 | counter = &r8a66597->isochronous; | ||
410 | break; | ||
411 | default: | ||
412 | printk(KERN_ERR "unexpect xfer type\n"); | ||
413 | return -EINVAL; | ||
414 | } | ||
415 | ep->type = info.type; | ||
416 | |||
417 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | ||
418 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | ||
419 | info.interval = desc->bInterval; | ||
420 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | ||
421 | info.dir_in = 1; | ||
422 | else | ||
423 | info.dir_in = 0; | ||
424 | |||
425 | ret = pipe_buffer_setting(r8a66597, &info); | ||
426 | if (ret < 0) { | ||
427 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | ||
428 | return ret; | ||
429 | } | ||
430 | |||
431 | (*counter)++; | ||
432 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | ||
433 | r8a66597->bulk++; | ||
434 | |||
435 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | ||
436 | pipe_initialize(ep); | ||
437 | |||
438 | return 0; | ||
439 | } | ||
440 | |||
441 | static int free_pipe_config(struct r8a66597_ep *ep) | ||
442 | { | ||
443 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
444 | struct r8a66597_pipe_info info; | ||
445 | |||
446 | info.pipe = ep->pipenum; | ||
447 | info.type = ep->type; | ||
448 | pipe_buffer_release(r8a66597, &info); | ||
449 | r8a66597_ep_release(ep); | ||
450 | |||
451 | return 0; | ||
452 | } | ||
453 | |||
454 | /*-------------------------------------------------------------------------*/ | ||
455 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | ||
456 | { | ||
457 | enable_irq_ready(r8a66597, pipenum); | ||
458 | enable_irq_nrdy(r8a66597, pipenum); | ||
459 | } | ||
460 | |||
461 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | ||
462 | { | ||
463 | disable_irq_ready(r8a66597, pipenum); | ||
464 | disable_irq_nrdy(r8a66597, pipenum); | ||
465 | } | ||
466 | |||
467 | /* if complete is true, gadget driver complete function is not call */ | ||
468 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | ||
469 | { | ||
470 | r8a66597->ep[0].internal_ccpl = ccpl; | ||
471 | pipe_start(r8a66597, 0); | ||
472 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | ||
473 | } | ||
474 | |||
475 | static void start_ep0_write(struct r8a66597_ep *ep, | ||
476 | struct r8a66597_request *req) | ||
477 | { | ||
478 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
479 | |||
480 | pipe_change(r8a66597, ep->pipenum); | ||
481 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | ||
482 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
483 | if (req->req.length == 0) { | ||
484 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
485 | pipe_start(r8a66597, 0); | ||
486 | transfer_complete(ep, req, 0); | ||
487 | } else { | ||
488 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | ||
489 | irq_ep0_write(ep, req); | ||
490 | } | ||
491 | } | ||
492 | |||
493 | static void start_packet_write(struct r8a66597_ep *ep, | ||
494 | struct r8a66597_request *req) | ||
495 | { | ||
496 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
497 | u16 tmp; | ||
498 | |||
499 | pipe_change(r8a66597, ep->pipenum); | ||
500 | disable_irq_empty(r8a66597, ep->pipenum); | ||
501 | pipe_start(r8a66597, ep->pipenum); | ||
502 | |||
503 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
504 | if (unlikely((tmp & FRDY) == 0)) | ||
505 | pipe_irq_enable(r8a66597, ep->pipenum); | ||
506 | else | ||
507 | irq_packet_write(ep, req); | ||
508 | } | ||
509 | |||
510 | static void start_packet_read(struct r8a66597_ep *ep, | ||
511 | struct r8a66597_request *req) | ||
512 | { | ||
513 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
514 | u16 pipenum = ep->pipenum; | ||
515 | |||
516 | if (ep->pipenum == 0) { | ||
517 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | ||
518 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
519 | pipe_start(r8a66597, pipenum); | ||
520 | pipe_irq_enable(r8a66597, pipenum); | ||
521 | } else { | ||
522 | if (ep->use_dma) { | ||
523 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | ||
524 | pipe_change(r8a66597, pipenum); | ||
525 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | ||
526 | r8a66597_write(r8a66597, | ||
527 | (req->req.length + ep->ep.maxpacket - 1) | ||
528 | / ep->ep.maxpacket, | ||
529 | ep->fifotrn); | ||
530 | } | ||
531 | pipe_start(r8a66597, pipenum); /* trigger once */ | ||
532 | pipe_irq_enable(r8a66597, pipenum); | ||
533 | } | ||
534 | } | ||
535 | |||
536 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
537 | { | ||
538 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
539 | start_packet_write(ep, req); | ||
540 | else | ||
541 | start_packet_read(ep, req); | ||
542 | } | ||
543 | |||
544 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
545 | { | ||
546 | u16 ctsq; | ||
547 | |||
548 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | ||
549 | |||
550 | switch (ctsq) { | ||
551 | case CS_RDDS: | ||
552 | start_ep0_write(ep, req); | ||
553 | break; | ||
554 | case CS_WRDS: | ||
555 | start_packet_read(ep, req); | ||
556 | break; | ||
557 | |||
558 | case CS_WRND: | ||
559 | control_end(ep->r8a66597, 0); | ||
560 | break; | ||
561 | default: | ||
562 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | ||
563 | break; | ||
564 | } | ||
565 | } | ||
566 | |||
567 | static void init_controller(struct r8a66597 *r8a66597) | ||
568 | { | ||
569 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | ||
570 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | ||
571 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | ||
572 | |||
573 | if (r8a66597->pdata->on_chip) { | ||
574 | r8a66597_bset(r8a66597, 0x04, SYSCFG1); | ||
575 | r8a66597_bset(r8a66597, HSE, SYSCFG0); | ||
576 | |||
577 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
578 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
579 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | ||
580 | |||
581 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
582 | |||
583 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | ||
584 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | ||
585 | DMA0CFG); | ||
586 | } else { | ||
587 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | ||
588 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | ||
589 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | ||
590 | XTAL, SYSCFG0); | ||
591 | |||
592 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
593 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
594 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | ||
595 | |||
596 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | ||
597 | |||
598 | msleep(3); | ||
599 | |||
600 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | ||
601 | |||
602 | msleep(1); | ||
603 | |||
604 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
605 | |||
606 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | ||
607 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | ||
608 | DMA0CFG); | ||
609 | } | ||
610 | } | ||
611 | |||
612 | static void disable_controller(struct r8a66597 *r8a66597) | ||
613 | { | ||
614 | if (r8a66597->pdata->on_chip) { | ||
615 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
616 | |||
617 | /* disable interrupts */ | ||
618 | r8a66597_write(r8a66597, 0, INTENB0); | ||
619 | r8a66597_write(r8a66597, 0, INTENB1); | ||
620 | r8a66597_write(r8a66597, 0, BRDYENB); | ||
621 | r8a66597_write(r8a66597, 0, BEMPENB); | ||
622 | r8a66597_write(r8a66597, 0, NRDYENB); | ||
623 | |||
624 | /* clear status */ | ||
625 | r8a66597_write(r8a66597, 0, BRDYSTS); | ||
626 | r8a66597_write(r8a66597, 0, NRDYSTS); | ||
627 | r8a66597_write(r8a66597, 0, BEMPSTS); | ||
628 | |||
629 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
630 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | ||
631 | |||
632 | } else { | ||
633 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | ||
634 | udelay(1); | ||
635 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | ||
636 | udelay(1); | ||
637 | udelay(1); | ||
638 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | ||
639 | } | ||
640 | } | ||
641 | |||
642 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | ||
643 | { | ||
644 | u16 tmp; | ||
645 | |||
646 | if (!r8a66597->pdata->on_chip) { | ||
647 | tmp = r8a66597_read(r8a66597, SYSCFG0); | ||
648 | if (!(tmp & XCKE)) | ||
649 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | ||
650 | } | ||
651 | } | ||
652 | |||
653 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | ||
654 | { | ||
655 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | ||
656 | } | ||
657 | |||
658 | /*-------------------------------------------------------------------------*/ | ||
659 | static void transfer_complete(struct r8a66597_ep *ep, | ||
660 | struct r8a66597_request *req, int status) | ||
661 | __releases(r8a66597->lock) | ||
662 | __acquires(r8a66597->lock) | ||
663 | { | ||
664 | int restart = 0; | ||
665 | |||
666 | if (unlikely(ep->pipenum == 0)) { | ||
667 | if (ep->internal_ccpl) { | ||
668 | ep->internal_ccpl = 0; | ||
669 | return; | ||
670 | } | ||
671 | } | ||
672 | |||
673 | list_del_init(&req->queue); | ||
674 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
675 | req->req.status = -ESHUTDOWN; | ||
676 | else | ||
677 | req->req.status = status; | ||
678 | |||
679 | if (!list_empty(&ep->queue)) | ||
680 | restart = 1; | ||
681 | |||
682 | spin_unlock(&ep->r8a66597->lock); | ||
683 | req->req.complete(&ep->ep, &req->req); | ||
684 | spin_lock(&ep->r8a66597->lock); | ||
685 | |||
686 | if (restart) { | ||
687 | req = get_request_from_ep(ep); | ||
688 | if (ep->desc) | ||
689 | start_packet(ep, req); | ||
690 | } | ||
691 | } | ||
692 | |||
693 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
694 | { | ||
695 | int i; | ||
696 | u16 tmp; | ||
697 | unsigned bufsize; | ||
698 | size_t size; | ||
699 | void *buf; | ||
700 | u16 pipenum = ep->pipenum; | ||
701 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
702 | |||
703 | pipe_change(r8a66597, pipenum); | ||
704 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | ||
705 | |||
706 | i = 0; | ||
707 | do { | ||
708 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
709 | if (i++ > 100000) { | ||
710 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | ||
711 | "conflict. please power off this controller."); | ||
712 | return; | ||
713 | } | ||
714 | ndelay(1); | ||
715 | } while ((tmp & FRDY) == 0); | ||
716 | |||
717 | /* prepare parameters */ | ||
718 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
719 | buf = req->req.buf + req->req.actual; | ||
720 | size = min(bufsize, req->req.length - req->req.actual); | ||
721 | |||
722 | /* write fifo */ | ||
723 | if (req->req.buf) { | ||
724 | if (size > 0) | ||
725 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
726 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | ||
727 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
728 | } | ||
729 | |||
730 | /* update parameters */ | ||
731 | req->req.actual += size; | ||
732 | |||
733 | /* check transfer finish */ | ||
734 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
735 | || (size % ep->ep.maxpacket) | ||
736 | || (size == 0)) { | ||
737 | disable_irq_ready(r8a66597, pipenum); | ||
738 | disable_irq_empty(r8a66597, pipenum); | ||
739 | } else { | ||
740 | disable_irq_ready(r8a66597, pipenum); | ||
741 | enable_irq_empty(r8a66597, pipenum); | ||
742 | } | ||
743 | pipe_start(r8a66597, pipenum); | ||
744 | } | ||
745 | |||
746 | static void irq_packet_write(struct r8a66597_ep *ep, | ||
747 | struct r8a66597_request *req) | ||
748 | { | ||
749 | u16 tmp; | ||
750 | unsigned bufsize; | ||
751 | size_t size; | ||
752 | void *buf; | ||
753 | u16 pipenum = ep->pipenum; | ||
754 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
755 | |||
756 | pipe_change(r8a66597, pipenum); | ||
757 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
758 | if (unlikely((tmp & FRDY) == 0)) { | ||
759 | pipe_stop(r8a66597, pipenum); | ||
760 | pipe_irq_disable(r8a66597, pipenum); | ||
761 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | ||
762 | return; | ||
763 | } | ||
764 | |||
765 | /* prepare parameters */ | ||
766 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
767 | buf = req->req.buf + req->req.actual; | ||
768 | size = min(bufsize, req->req.length - req->req.actual); | ||
769 | |||
770 | /* write fifo */ | ||
771 | if (req->req.buf) { | ||
772 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
773 | if ((size == 0) | ||
774 | || ((size % ep->ep.maxpacket) != 0) | ||
775 | || ((bufsize != ep->ep.maxpacket) | ||
776 | && (bufsize > size))) | ||
777 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
778 | } | ||
779 | |||
780 | /* update parameters */ | ||
781 | req->req.actual += size; | ||
782 | /* check transfer finish */ | ||
783 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
784 | || (size % ep->ep.maxpacket) | ||
785 | || (size == 0)) { | ||
786 | disable_irq_ready(r8a66597, pipenum); | ||
787 | enable_irq_empty(r8a66597, pipenum); | ||
788 | } else { | ||
789 | disable_irq_empty(r8a66597, pipenum); | ||
790 | pipe_irq_enable(r8a66597, pipenum); | ||
791 | } | ||
792 | } | ||
793 | |||
794 | static void irq_packet_read(struct r8a66597_ep *ep, | ||
795 | struct r8a66597_request *req) | ||
796 | { | ||
797 | u16 tmp; | ||
798 | int rcv_len, bufsize, req_len; | ||
799 | int size; | ||
800 | void *buf; | ||
801 | u16 pipenum = ep->pipenum; | ||
802 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
803 | int finish = 0; | ||
804 | |||
805 | pipe_change(r8a66597, pipenum); | ||
806 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
807 | if (unlikely((tmp & FRDY) == 0)) { | ||
808 | req->req.status = -EPIPE; | ||
809 | pipe_stop(r8a66597, pipenum); | ||
810 | pipe_irq_disable(r8a66597, pipenum); | ||
811 | printk(KERN_ERR "read fifo not ready"); | ||
812 | return; | ||
813 | } | ||
814 | |||
815 | /* prepare parameters */ | ||
816 | rcv_len = tmp & DTLN; | ||
817 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
818 | |||
819 | buf = req->req.buf + req->req.actual; | ||
820 | req_len = req->req.length - req->req.actual; | ||
821 | if (rcv_len < bufsize) | ||
822 | size = min(rcv_len, req_len); | ||
823 | else | ||
824 | size = min(bufsize, req_len); | ||
825 | |||
826 | /* update parameters */ | ||
827 | req->req.actual += size; | ||
828 | |||
829 | /* check transfer finish */ | ||
830 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
831 | || (size % ep->ep.maxpacket) | ||
832 | || (size == 0)) { | ||
833 | pipe_stop(r8a66597, pipenum); | ||
834 | pipe_irq_disable(r8a66597, pipenum); | ||
835 | finish = 1; | ||
836 | } | ||
837 | |||
838 | /* read fifo */ | ||
839 | if (req->req.buf) { | ||
840 | if (size == 0) | ||
841 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
842 | else | ||
843 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
844 | |||
845 | } | ||
846 | |||
847 | if ((ep->pipenum != 0) && finish) | ||
848 | transfer_complete(ep, req, 0); | ||
849 | } | ||
850 | |||
851 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | ||
852 | { | ||
853 | u16 check; | ||
854 | u16 pipenum; | ||
855 | struct r8a66597_ep *ep; | ||
856 | struct r8a66597_request *req; | ||
857 | |||
858 | if ((status & BRDY0) && (enb & BRDY0)) { | ||
859 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | ||
860 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | ||
861 | |||
862 | ep = &r8a66597->ep[0]; | ||
863 | req = get_request_from_ep(ep); | ||
864 | irq_packet_read(ep, req); | ||
865 | } else { | ||
866 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | ||
867 | check = 1 << pipenum; | ||
868 | if ((status & check) && (enb & check)) { | ||
869 | r8a66597_write(r8a66597, ~check, BRDYSTS); | ||
870 | ep = r8a66597->pipenum2ep[pipenum]; | ||
871 | req = get_request_from_ep(ep); | ||
872 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
873 | irq_packet_write(ep, req); | ||
874 | else | ||
875 | irq_packet_read(ep, req); | ||
876 | } | ||
877 | } | ||
878 | } | ||
879 | } | ||
880 | |||
881 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | ||
882 | { | ||
883 | u16 tmp; | ||
884 | u16 check; | ||
885 | u16 pipenum; | ||
886 | struct r8a66597_ep *ep; | ||
887 | struct r8a66597_request *req; | ||
888 | |||
889 | if ((status & BEMP0) && (enb & BEMP0)) { | ||
890 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | ||
891 | |||
892 | ep = &r8a66597->ep[0]; | ||
893 | req = get_request_from_ep(ep); | ||
894 | irq_ep0_write(ep, req); | ||
895 | } else { | ||
896 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | ||
897 | check = 1 << pipenum; | ||
898 | if ((status & check) && (enb & check)) { | ||
899 | r8a66597_write(r8a66597, ~check, BEMPSTS); | ||
900 | tmp = control_reg_get(r8a66597, pipenum); | ||
901 | if ((tmp & INBUFM) == 0) { | ||
902 | disable_irq_empty(r8a66597, pipenum); | ||
903 | pipe_irq_disable(r8a66597, pipenum); | ||
904 | pipe_stop(r8a66597, pipenum); | ||
905 | ep = r8a66597->pipenum2ep[pipenum]; | ||
906 | req = get_request_from_ep(ep); | ||
907 | if (!list_empty(&ep->queue)) | ||
908 | transfer_complete(ep, req, 0); | ||
909 | } | ||
910 | } | ||
911 | } | ||
912 | } | ||
913 | } | ||
914 | |||
915 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
916 | __releases(r8a66597->lock) | ||
917 | __acquires(r8a66597->lock) | ||
918 | { | ||
919 | struct r8a66597_ep *ep; | ||
920 | u16 pid; | ||
921 | u16 status = 0; | ||
922 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
923 | |||
924 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
925 | case USB_RECIP_DEVICE: | ||
926 | status = 1 << USB_DEVICE_SELF_POWERED; | ||
927 | break; | ||
928 | case USB_RECIP_INTERFACE: | ||
929 | status = 0; | ||
930 | break; | ||
931 | case USB_RECIP_ENDPOINT: | ||
932 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
933 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | ||
934 | if (pid == PID_STALL) | ||
935 | status = 1 << USB_ENDPOINT_HALT; | ||
936 | else | ||
937 | status = 0; | ||
938 | break; | ||
939 | default: | ||
940 | pipe_stall(r8a66597, 0); | ||
941 | return; /* exit */ | ||
942 | } | ||
943 | |||
944 | r8a66597->ep0_data = cpu_to_le16(status); | ||
945 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | ||
946 | r8a66597->ep0_req->length = 2; | ||
947 | /* AV: what happens if we get called again before that gets through? */ | ||
948 | spin_unlock(&r8a66597->lock); | ||
949 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | ||
950 | spin_lock(&r8a66597->lock); | ||
951 | } | ||
952 | |||
953 | static void clear_feature(struct r8a66597 *r8a66597, | ||
954 | struct usb_ctrlrequest *ctrl) | ||
955 | { | ||
956 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
957 | case USB_RECIP_DEVICE: | ||
958 | control_end(r8a66597, 1); | ||
959 | break; | ||
960 | case USB_RECIP_INTERFACE: | ||
961 | control_end(r8a66597, 1); | ||
962 | break; | ||
963 | case USB_RECIP_ENDPOINT: { | ||
964 | struct r8a66597_ep *ep; | ||
965 | struct r8a66597_request *req; | ||
966 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
967 | |||
968 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
969 | pipe_stop(r8a66597, ep->pipenum); | ||
970 | control_reg_sqclr(r8a66597, ep->pipenum); | ||
971 | |||
972 | control_end(r8a66597, 1); | ||
973 | |||
974 | req = get_request_from_ep(ep); | ||
975 | if (ep->busy) { | ||
976 | ep->busy = 0; | ||
977 | if (list_empty(&ep->queue)) | ||
978 | break; | ||
979 | start_packet(ep, req); | ||
980 | } else if (!list_empty(&ep->queue)) | ||
981 | pipe_start(r8a66597, ep->pipenum); | ||
982 | } | ||
983 | break; | ||
984 | default: | ||
985 | pipe_stall(r8a66597, 0); | ||
986 | break; | ||
987 | } | ||
988 | } | ||
989 | |||
990 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
991 | { | ||
992 | |||
993 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
994 | case USB_RECIP_DEVICE: | ||
995 | control_end(r8a66597, 1); | ||
996 | break; | ||
997 | case USB_RECIP_INTERFACE: | ||
998 | control_end(r8a66597, 1); | ||
999 | break; | ||
1000 | case USB_RECIP_ENDPOINT: { | ||
1001 | struct r8a66597_ep *ep; | ||
1002 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
1003 | |||
1004 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
1005 | pipe_stall(r8a66597, ep->pipenum); | ||
1006 | |||
1007 | control_end(r8a66597, 1); | ||
1008 | } | ||
1009 | break; | ||
1010 | default: | ||
1011 | pipe_stall(r8a66597, 0); | ||
1012 | break; | ||
1013 | } | ||
1014 | } | ||
1015 | |||
1016 | /* if return value is true, call class driver's setup() */ | ||
1017 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
1018 | { | ||
1019 | u16 *p = (u16 *)ctrl; | ||
1020 | unsigned long offset = USBREQ; | ||
1021 | int i, ret = 0; | ||
1022 | |||
1023 | /* read fifo */ | ||
1024 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | ||
1025 | |||
1026 | for (i = 0; i < 4; i++) | ||
1027 | p[i] = r8a66597_read(r8a66597, offset + i*2); | ||
1028 | |||
1029 | /* check request */ | ||
1030 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | ||
1031 | switch (ctrl->bRequest) { | ||
1032 | case USB_REQ_GET_STATUS: | ||
1033 | get_status(r8a66597, ctrl); | ||
1034 | break; | ||
1035 | case USB_REQ_CLEAR_FEATURE: | ||
1036 | clear_feature(r8a66597, ctrl); | ||
1037 | break; | ||
1038 | case USB_REQ_SET_FEATURE: | ||
1039 | set_feature(r8a66597, ctrl); | ||
1040 | break; | ||
1041 | default: | ||
1042 | ret = 1; | ||
1043 | break; | ||
1044 | } | ||
1045 | } else | ||
1046 | ret = 1; | ||
1047 | return ret; | ||
1048 | } | ||
1049 | |||
1050 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | ||
1051 | { | ||
1052 | u16 speed = get_usb_speed(r8a66597); | ||
1053 | |||
1054 | switch (speed) { | ||
1055 | case HSMODE: | ||
1056 | r8a66597->gadget.speed = USB_SPEED_HIGH; | ||
1057 | break; | ||
1058 | case FSMODE: | ||
1059 | r8a66597->gadget.speed = USB_SPEED_FULL; | ||
1060 | break; | ||
1061 | default: | ||
1062 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | ||
1063 | printk(KERN_ERR "USB speed unknown\n"); | ||
1064 | } | ||
1065 | } | ||
1066 | |||
1067 | static void irq_device_state(struct r8a66597 *r8a66597) | ||
1068 | { | ||
1069 | u16 dvsq; | ||
1070 | |||
1071 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | ||
1072 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | ||
1073 | |||
1074 | if (dvsq == DS_DFLT) { | ||
1075 | /* bus reset */ | ||
1076 | r8a66597->driver->disconnect(&r8a66597->gadget); | ||
1077 | r8a66597_update_usb_speed(r8a66597); | ||
1078 | } | ||
1079 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | ||
1080 | r8a66597_update_usb_speed(r8a66597); | ||
1081 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | ||
1082 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
1083 | r8a66597_update_usb_speed(r8a66597); | ||
1084 | |||
1085 | r8a66597->old_dvsq = dvsq; | ||
1086 | } | ||
1087 | |||
1088 | static void irq_control_stage(struct r8a66597 *r8a66597) | ||
1089 | __releases(r8a66597->lock) | ||
1090 | __acquires(r8a66597->lock) | ||
1091 | { | ||
1092 | struct usb_ctrlrequest ctrl; | ||
1093 | u16 ctsq; | ||
1094 | |||
1095 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | ||
1096 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | ||
1097 | |||
1098 | switch (ctsq) { | ||
1099 | case CS_IDST: { | ||
1100 | struct r8a66597_ep *ep; | ||
1101 | struct r8a66597_request *req; | ||
1102 | ep = &r8a66597->ep[0]; | ||
1103 | req = get_request_from_ep(ep); | ||
1104 | transfer_complete(ep, req, 0); | ||
1105 | } | ||
1106 | break; | ||
1107 | |||
1108 | case CS_RDDS: | ||
1109 | case CS_WRDS: | ||
1110 | case CS_WRND: | ||
1111 | if (setup_packet(r8a66597, &ctrl)) { | ||
1112 | spin_unlock(&r8a66597->lock); | ||
1113 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | ||
1114 | < 0) | ||
1115 | pipe_stall(r8a66597, 0); | ||
1116 | spin_lock(&r8a66597->lock); | ||
1117 | } | ||
1118 | break; | ||
1119 | case CS_RDSS: | ||
1120 | case CS_WRSS: | ||
1121 | control_end(r8a66597, 0); | ||
1122 | break; | ||
1123 | default: | ||
1124 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | ||
1125 | break; | ||
1126 | } | ||
1127 | } | ||
1128 | |||
1129 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | ||
1130 | { | ||
1131 | struct r8a66597 *r8a66597 = _r8a66597; | ||
1132 | u16 intsts0; | ||
1133 | u16 intenb0; | ||
1134 | u16 brdysts, nrdysts, bempsts; | ||
1135 | u16 brdyenb, nrdyenb, bempenb; | ||
1136 | u16 savepipe; | ||
1137 | u16 mask0; | ||
1138 | |||
1139 | spin_lock(&r8a66597->lock); | ||
1140 | |||
1141 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | ||
1142 | intenb0 = r8a66597_read(r8a66597, INTENB0); | ||
1143 | |||
1144 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | ||
1145 | |||
1146 | mask0 = intsts0 & intenb0; | ||
1147 | if (mask0) { | ||
1148 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | ||
1149 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | ||
1150 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | ||
1151 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | ||
1152 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | ||
1153 | bempenb = r8a66597_read(r8a66597, BEMPENB); | ||
1154 | |||
1155 | if (mask0 & VBINT) { | ||
1156 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | ||
1157 | INTSTS0); | ||
1158 | r8a66597_start_xclock(r8a66597); | ||
1159 | |||
1160 | /* start vbus sampling */ | ||
1161 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | ||
1162 | & VBSTS; | ||
1163 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
1164 | |||
1165 | mod_timer(&r8a66597->timer, | ||
1166 | jiffies + msecs_to_jiffies(50)); | ||
1167 | } | ||
1168 | if (intsts0 & DVSQ) | ||
1169 | irq_device_state(r8a66597); | ||
1170 | |||
1171 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | ||
1172 | && (brdysts & brdyenb)) | ||
1173 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | ||
1174 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | ||
1175 | && (bempsts & bempenb)) | ||
1176 | irq_pipe_empty(r8a66597, bempsts, bempenb); | ||
1177 | |||
1178 | if (intsts0 & CTRT) | ||
1179 | irq_control_stage(r8a66597); | ||
1180 | } | ||
1181 | |||
1182 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | ||
1183 | |||
1184 | spin_unlock(&r8a66597->lock); | ||
1185 | return IRQ_HANDLED; | ||
1186 | } | ||
1187 | |||
1188 | static void r8a66597_timer(unsigned long _r8a66597) | ||
1189 | { | ||
1190 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | ||
1191 | unsigned long flags; | ||
1192 | u16 tmp; | ||
1193 | |||
1194 | spin_lock_irqsave(&r8a66597->lock, flags); | ||
1195 | tmp = r8a66597_read(r8a66597, SYSCFG0); | ||
1196 | if (r8a66597->scount > 0) { | ||
1197 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | ||
1198 | if (tmp == r8a66597->old_vbus) { | ||
1199 | r8a66597->scount--; | ||
1200 | if (r8a66597->scount == 0) { | ||
1201 | if (tmp == VBSTS) | ||
1202 | r8a66597_usb_connect(r8a66597); | ||
1203 | else | ||
1204 | r8a66597_usb_disconnect(r8a66597); | ||
1205 | } else { | ||
1206 | mod_timer(&r8a66597->timer, | ||
1207 | jiffies + msecs_to_jiffies(50)); | ||
1208 | } | ||
1209 | } else { | ||
1210 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
1211 | r8a66597->old_vbus = tmp; | ||
1212 | mod_timer(&r8a66597->timer, | ||
1213 | jiffies + msecs_to_jiffies(50)); | ||
1214 | } | ||
1215 | } | ||
1216 | spin_unlock_irqrestore(&r8a66597->lock, flags); | ||
1217 | } | ||
1218 | |||
1219 | /*-------------------------------------------------------------------------*/ | ||
1220 | static int r8a66597_enable(struct usb_ep *_ep, | ||
1221 | const struct usb_endpoint_descriptor *desc) | ||
1222 | { | ||
1223 | struct r8a66597_ep *ep; | ||
1224 | |||
1225 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1226 | return alloc_pipe_config(ep, desc); | ||
1227 | } | ||
1228 | |||
1229 | static int r8a66597_disable(struct usb_ep *_ep) | ||
1230 | { | ||
1231 | struct r8a66597_ep *ep; | ||
1232 | struct r8a66597_request *req; | ||
1233 | unsigned long flags; | ||
1234 | |||
1235 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1236 | BUG_ON(!ep); | ||
1237 | |||
1238 | while (!list_empty(&ep->queue)) { | ||
1239 | req = get_request_from_ep(ep); | ||
1240 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
1241 | transfer_complete(ep, req, -ECONNRESET); | ||
1242 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
1243 | } | ||
1244 | |||
1245 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | ||
1246 | return free_pipe_config(ep); | ||
1247 | } | ||
1248 | |||
1249 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | ||
1250 | gfp_t gfp_flags) | ||
1251 | { | ||
1252 | struct r8a66597_request *req; | ||
1253 | |||
1254 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | ||
1255 | if (!req) | ||
1256 | return NULL; | ||
1257 | |||
1258 | INIT_LIST_HEAD(&req->queue); | ||
1259 | |||
1260 | return &req->req; | ||
1261 | } | ||
1262 | |||
1263 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | ||
1264 | { | ||
1265 | struct r8a66597_request *req; | ||
1266 | |||
1267 | req = container_of(_req, struct r8a66597_request, req); | ||
1268 | kfree(req); | ||
1269 | } | ||
1270 | |||
1271 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
1272 | gfp_t gfp_flags) | ||
1273 | { | ||
1274 | struct r8a66597_ep *ep; | ||
1275 | struct r8a66597_request *req; | ||
1276 | unsigned long flags; | ||
1277 | int request = 0; | ||
1278 | |||
1279 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1280 | req = container_of(_req, struct r8a66597_request, req); | ||
1281 | |||
1282 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
1283 | return -ESHUTDOWN; | ||
1284 | |||
1285 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
1286 | |||
1287 | if (list_empty(&ep->queue)) | ||
1288 | request = 1; | ||
1289 | |||
1290 | list_add_tail(&req->queue, &ep->queue); | ||
1291 | req->req.actual = 0; | ||
1292 | req->req.status = -EINPROGRESS; | ||
1293 | |||
1294 | if (ep->desc == NULL) /* control */ | ||
1295 | start_ep0(ep, req); | ||
1296 | else { | ||
1297 | if (request && !ep->busy) | ||
1298 | start_packet(ep, req); | ||
1299 | } | ||
1300 | |||
1301 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
1302 | |||
1303 | return 0; | ||
1304 | } | ||
1305 | |||
1306 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | ||
1307 | { | ||
1308 | struct r8a66597_ep *ep; | ||
1309 | struct r8a66597_request *req; | ||
1310 | unsigned long flags; | ||
1311 | |||
1312 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1313 | req = container_of(_req, struct r8a66597_request, req); | ||
1314 | |||
1315 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
1316 | if (!list_empty(&ep->queue)) | ||
1317 | transfer_complete(ep, req, -ECONNRESET); | ||
1318 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
1319 | |||
1320 | return 0; | ||
1321 | } | ||
1322 | |||
1323 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | ||
1324 | { | ||
1325 | struct r8a66597_ep *ep; | ||
1326 | struct r8a66597_request *req; | ||
1327 | unsigned long flags; | ||
1328 | int ret = 0; | ||
1329 | |||
1330 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1331 | req = get_request_from_ep(ep); | ||
1332 | |||
1333 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
1334 | if (!list_empty(&ep->queue)) { | ||
1335 | ret = -EAGAIN; | ||
1336 | goto out; | ||
1337 | } | ||
1338 | if (value) { | ||
1339 | ep->busy = 1; | ||
1340 | pipe_stall(ep->r8a66597, ep->pipenum); | ||
1341 | } else { | ||
1342 | ep->busy = 0; | ||
1343 | pipe_stop(ep->r8a66597, ep->pipenum); | ||
1344 | } | ||
1345 | |||
1346 | out: | ||
1347 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
1348 | return ret; | ||
1349 | } | ||
1350 | |||
1351 | static void r8a66597_fifo_flush(struct usb_ep *_ep) | ||
1352 | { | ||
1353 | struct r8a66597_ep *ep; | ||
1354 | unsigned long flags; | ||
1355 | |||
1356 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
1357 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
1358 | if (list_empty(&ep->queue) && !ep->busy) { | ||
1359 | pipe_stop(ep->r8a66597, ep->pipenum); | ||
1360 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | ||
1361 | } | ||
1362 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
1363 | } | ||
1364 | |||
1365 | static struct usb_ep_ops r8a66597_ep_ops = { | ||
1366 | .enable = r8a66597_enable, | ||
1367 | .disable = r8a66597_disable, | ||
1368 | |||
1369 | .alloc_request = r8a66597_alloc_request, | ||
1370 | .free_request = r8a66597_free_request, | ||
1371 | |||
1372 | .queue = r8a66597_queue, | ||
1373 | .dequeue = r8a66597_dequeue, | ||
1374 | |||
1375 | .set_halt = r8a66597_set_halt, | ||
1376 | .fifo_flush = r8a66597_fifo_flush, | ||
1377 | }; | ||
1378 | |||
1379 | /*-------------------------------------------------------------------------*/ | ||
1380 | static struct r8a66597 *the_controller; | ||
1381 | |||
1382 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | ||
1383 | { | ||
1384 | struct r8a66597 *r8a66597 = the_controller; | ||
1385 | int retval; | ||
1386 | |||
1387 | if (!driver | ||
1388 | || driver->speed != USB_SPEED_HIGH | ||
1389 | || !driver->bind | ||
1390 | || !driver->setup) | ||
1391 | return -EINVAL; | ||
1392 | if (!r8a66597) | ||
1393 | return -ENODEV; | ||
1394 | if (r8a66597->driver) | ||
1395 | return -EBUSY; | ||
1396 | |||
1397 | /* hook up the driver */ | ||
1398 | driver->driver.bus = NULL; | ||
1399 | r8a66597->driver = driver; | ||
1400 | r8a66597->gadget.dev.driver = &driver->driver; | ||
1401 | |||
1402 | retval = device_add(&r8a66597->gadget.dev); | ||
1403 | if (retval) { | ||
1404 | printk(KERN_ERR "device_add error (%d)\n", retval); | ||
1405 | goto error; | ||
1406 | } | ||
1407 | |||
1408 | retval = driver->bind(&r8a66597->gadget); | ||
1409 | if (retval) { | ||
1410 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | ||
1411 | device_del(&r8a66597->gadget.dev); | ||
1412 | goto error; | ||
1413 | } | ||
1414 | |||
1415 | r8a66597_bset(r8a66597, VBSE, INTENB0); | ||
1416 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | ||
1417 | r8a66597_start_xclock(r8a66597); | ||
1418 | /* start vbus sampling */ | ||
1419 | r8a66597->old_vbus = r8a66597_read(r8a66597, | ||
1420 | INTSTS0) & VBSTS; | ||
1421 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
1422 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | ||
1423 | } | ||
1424 | |||
1425 | return 0; | ||
1426 | |||
1427 | error: | ||
1428 | r8a66597->driver = NULL; | ||
1429 | r8a66597->gadget.dev.driver = NULL; | ||
1430 | |||
1431 | return retval; | ||
1432 | } | ||
1433 | EXPORT_SYMBOL(usb_gadget_register_driver); | ||
1434 | |||
1435 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | ||
1436 | { | ||
1437 | struct r8a66597 *r8a66597 = the_controller; | ||
1438 | unsigned long flags; | ||
1439 | |||
1440 | if (driver != r8a66597->driver || !driver->unbind) | ||
1441 | return -EINVAL; | ||
1442 | |||
1443 | spin_lock_irqsave(&r8a66597->lock, flags); | ||
1444 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | ||
1445 | r8a66597_usb_disconnect(r8a66597); | ||
1446 | spin_unlock_irqrestore(&r8a66597->lock, flags); | ||
1447 | |||
1448 | r8a66597_bclr(r8a66597, VBSE, INTENB0); | ||
1449 | |||
1450 | driver->unbind(&r8a66597->gadget); | ||
1451 | |||
1452 | init_controller(r8a66597); | ||
1453 | disable_controller(r8a66597); | ||
1454 | |||
1455 | device_del(&r8a66597->gadget.dev); | ||
1456 | r8a66597->driver = NULL; | ||
1457 | return 0; | ||
1458 | } | ||
1459 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | ||
1460 | |||
1461 | /*-------------------------------------------------------------------------*/ | ||
1462 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | ||
1463 | { | ||
1464 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | ||
1465 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | ||
1466 | } | ||
1467 | |||
1468 | static struct usb_gadget_ops r8a66597_gadget_ops = { | ||
1469 | .get_frame = r8a66597_get_frame, | ||
1470 | }; | ||
1471 | |||
1472 | static int __exit r8a66597_remove(struct platform_device *pdev) | ||
1473 | { | ||
1474 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | ||
1475 | |||
1476 | del_timer_sync(&r8a66597->timer); | ||
1477 | iounmap((void *)r8a66597->reg); | ||
1478 | free_irq(platform_get_irq(pdev, 0), r8a66597); | ||
1479 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | ||
1480 | #ifdef CONFIG_HAVE_CLK | ||
1481 | if (r8a66597->pdata->on_chip) { | ||
1482 | clk_disable(r8a66597->clk); | ||
1483 | clk_put(r8a66597->clk); | ||
1484 | } | ||
1485 | #endif | ||
1486 | kfree(r8a66597); | ||
1487 | return 0; | ||
1488 | } | ||
1489 | |||
1490 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | ||
1491 | { | ||
1492 | } | ||
1493 | |||
1494 | static int __init r8a66597_probe(struct platform_device *pdev) | ||
1495 | { | ||
1496 | #ifdef CONFIG_HAVE_CLK | ||
1497 | char clk_name[8]; | ||
1498 | #endif | ||
1499 | struct resource *res, *ires; | ||
1500 | int irq; | ||
1501 | void __iomem *reg = NULL; | ||
1502 | struct r8a66597 *r8a66597 = NULL; | ||
1503 | int ret = 0; | ||
1504 | int i; | ||
1505 | unsigned long irq_trigger; | ||
1506 | |||
1507 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1508 | if (!res) { | ||
1509 | ret = -ENODEV; | ||
1510 | printk(KERN_ERR "platform_get_resource error.\n"); | ||
1511 | goto clean_up; | ||
1512 | } | ||
1513 | |||
1514 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
1515 | irq = ires->start; | ||
1516 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | ||
1517 | |||
1518 | if (irq < 0) { | ||
1519 | ret = -ENODEV; | ||
1520 | printk(KERN_ERR "platform_get_irq error.\n"); | ||
1521 | goto clean_up; | ||
1522 | } | ||
1523 | |||
1524 | reg = ioremap(res->start, resource_size(res)); | ||
1525 | if (reg == NULL) { | ||
1526 | ret = -ENOMEM; | ||
1527 | printk(KERN_ERR "ioremap error.\n"); | ||
1528 | goto clean_up; | ||
1529 | } | ||
1530 | |||
1531 | /* initialize ucd */ | ||
1532 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | ||
1533 | if (r8a66597 == NULL) { | ||
1534 | printk(KERN_ERR "kzalloc error\n"); | ||
1535 | goto clean_up; | ||
1536 | } | ||
1537 | |||
1538 | spin_lock_init(&r8a66597->lock); | ||
1539 | dev_set_drvdata(&pdev->dev, r8a66597); | ||
1540 | r8a66597->pdata = pdev->dev.platform_data; | ||
1541 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | ||
1542 | |||
1543 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | ||
1544 | device_initialize(&r8a66597->gadget.dev); | ||
1545 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | ||
1546 | r8a66597->gadget.is_dualspeed = 1; | ||
1547 | r8a66597->gadget.dev.parent = &pdev->dev; | ||
1548 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | ||
1549 | r8a66597->gadget.dev.release = pdev->dev.release; | ||
1550 | r8a66597->gadget.name = udc_name; | ||
1551 | |||
1552 | init_timer(&r8a66597->timer); | ||
1553 | r8a66597->timer.function = r8a66597_timer; | ||
1554 | r8a66597->timer.data = (unsigned long)r8a66597; | ||
1555 | r8a66597->reg = (unsigned long)reg; | ||
1556 | |||
1557 | #ifdef CONFIG_HAVE_CLK | ||
1558 | if (r8a66597->pdata->on_chip) { | ||
1559 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | ||
1560 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | ||
1561 | if (IS_ERR(r8a66597->clk)) { | ||
1562 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | ||
1563 | clk_name); | ||
1564 | ret = PTR_ERR(r8a66597->clk); | ||
1565 | goto clean_up; | ||
1566 | } | ||
1567 | clk_enable(r8a66597->clk); | ||
1568 | } | ||
1569 | #endif | ||
1570 | |||
1571 | disable_controller(r8a66597); /* make sure controller is disabled */ | ||
1572 | |||
1573 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | ||
1574 | udc_name, r8a66597); | ||
1575 | if (ret < 0) { | ||
1576 | printk(KERN_ERR "request_irq error (%d)\n", ret); | ||
1577 | goto clean_up2; | ||
1578 | } | ||
1579 | |||
1580 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | ||
1581 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | ||
1582 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | ||
1583 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | ||
1584 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | ||
1585 | |||
1586 | if (i != 0) { | ||
1587 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | ||
1588 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | ||
1589 | &r8a66597->gadget.ep_list); | ||
1590 | } | ||
1591 | ep->r8a66597 = r8a66597; | ||
1592 | INIT_LIST_HEAD(&ep->queue); | ||
1593 | ep->ep.name = r8a66597_ep_name[i]; | ||
1594 | ep->ep.ops = &r8a66597_ep_ops; | ||
1595 | ep->ep.maxpacket = 512; | ||
1596 | } | ||
1597 | r8a66597->ep[0].ep.maxpacket = 64; | ||
1598 | r8a66597->ep[0].pipenum = 0; | ||
1599 | r8a66597->ep[0].fifoaddr = CFIFO; | ||
1600 | r8a66597->ep[0].fifosel = CFIFOSEL; | ||
1601 | r8a66597->ep[0].fifoctr = CFIFOCTR; | ||
1602 | r8a66597->ep[0].fifotrn = 0; | ||
1603 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | ||
1604 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | ||
1605 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | ||
1606 | |||
1607 | the_controller = r8a66597; | ||
1608 | |||
1609 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | ||
1610 | GFP_KERNEL); | ||
1611 | if (r8a66597->ep0_req == NULL) | ||
1612 | goto clean_up3; | ||
1613 | r8a66597->ep0_req->complete = nop_completion; | ||
1614 | |||
1615 | init_controller(r8a66597); | ||
1616 | |||
1617 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | ||
1618 | return 0; | ||
1619 | |||
1620 | clean_up3: | ||
1621 | free_irq(irq, r8a66597); | ||
1622 | clean_up2: | ||
1623 | #ifdef CONFIG_HAVE_CLK | ||
1624 | if (r8a66597->pdata->on_chip) { | ||
1625 | clk_disable(r8a66597->clk); | ||
1626 | clk_put(r8a66597->clk); | ||
1627 | } | ||
1628 | #endif | ||
1629 | clean_up: | ||
1630 | if (r8a66597) { | ||
1631 | if (r8a66597->ep0_req) | ||
1632 | r8a66597_free_request(&r8a66597->ep[0].ep, | ||
1633 | r8a66597->ep0_req); | ||
1634 | kfree(r8a66597); | ||
1635 | } | ||
1636 | if (reg) | ||
1637 | iounmap(reg); | ||
1638 | |||
1639 | return ret; | ||
1640 | } | ||
1641 | |||
1642 | /*-------------------------------------------------------------------------*/ | ||
1643 | static struct platform_driver r8a66597_driver = { | ||
1644 | .remove = __exit_p(r8a66597_remove), | ||
1645 | .driver = { | ||
1646 | .name = (char *) udc_name, | ||
1647 | }, | ||
1648 | }; | ||
1649 | |||
1650 | static int __init r8a66597_udc_init(void) | ||
1651 | { | ||
1652 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | ||
1653 | } | ||
1654 | module_init(r8a66597_udc_init); | ||
1655 | |||
1656 | static void __exit r8a66597_udc_cleanup(void) | ||
1657 | { | ||
1658 | platform_driver_unregister(&r8a66597_driver); | ||
1659 | } | ||
1660 | module_exit(r8a66597_udc_cleanup); | ||
1661 | |||
1662 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | ||
1663 | MODULE_LICENSE("GPL"); | ||
1664 | MODULE_AUTHOR("Yoshihiro Shimoda"); | ||
1665 | |||
diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h new file mode 100644 index 000000000000..e653575d4ceb --- /dev/null +++ b/drivers/usb/gadget/r8a66597-udc.h | |||
@@ -0,0 +1,255 @@ | |||
1 | /* | ||
2 | * R8A66597 UDC | ||
3 | * | ||
4 | * Copyright (C) 2007-2009 Renesas Solutions Corp. | ||
5 | * | ||
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; version 2 of the License. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #ifndef __R8A66597_H__ | ||
24 | #define __R8A66597_H__ | ||
25 | |||
26 | #ifdef CONFIG_HAVE_CLK | ||
27 | #include <linux/clk.h> | ||
28 | #endif | ||
29 | |||
30 | #include <linux/usb/r8a66597.h> | ||
31 | |||
32 | #define R8A66597_MAX_SAMPLING 10 | ||
33 | |||
34 | #define R8A66597_MAX_NUM_PIPE 8 | ||
35 | #define R8A66597_MAX_NUM_BULK 3 | ||
36 | #define R8A66597_MAX_NUM_ISOC 2 | ||
37 | #define R8A66597_MAX_NUM_INT 2 | ||
38 | |||
39 | #define R8A66597_BASE_PIPENUM_BULK 3 | ||
40 | #define R8A66597_BASE_PIPENUM_ISOC 1 | ||
41 | #define R8A66597_BASE_PIPENUM_INT 6 | ||
42 | |||
43 | #define R8A66597_BASE_BUFNUM 6 | ||
44 | #define R8A66597_MAX_BUFNUM 0x4F | ||
45 | |||
46 | #define is_bulk_pipe(pipenum) \ | ||
47 | ((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \ | ||
48 | (pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK))) | ||
49 | #define is_interrupt_pipe(pipenum) \ | ||
50 | ((pipenum >= R8A66597_BASE_PIPENUM_INT) && \ | ||
51 | (pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT))) | ||
52 | #define is_isoc_pipe(pipenum) \ | ||
53 | ((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \ | ||
54 | (pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC))) | ||
55 | |||
56 | struct r8a66597_pipe_info { | ||
57 | u16 pipe; | ||
58 | u16 epnum; | ||
59 | u16 maxpacket; | ||
60 | u16 type; | ||
61 | u16 interval; | ||
62 | u16 dir_in; | ||
63 | }; | ||
64 | |||
65 | struct r8a66597_request { | ||
66 | struct usb_request req; | ||
67 | struct list_head queue; | ||
68 | }; | ||
69 | |||
70 | struct r8a66597_ep { | ||
71 | struct usb_ep ep; | ||
72 | struct r8a66597 *r8a66597; | ||
73 | |||
74 | struct list_head queue; | ||
75 | unsigned busy:1; | ||
76 | unsigned internal_ccpl:1; /* use only control */ | ||
77 | |||
78 | /* this member can able to after r8a66597_enable */ | ||
79 | unsigned use_dma:1; | ||
80 | u16 pipenum; | ||
81 | u16 type; | ||
82 | const struct usb_endpoint_descriptor *desc; | ||
83 | /* register address */ | ||
84 | unsigned char fifoaddr; | ||
85 | unsigned char fifosel; | ||
86 | unsigned char fifoctr; | ||
87 | unsigned char fifotrn; | ||
88 | unsigned char pipectr; | ||
89 | }; | ||
90 | |||
91 | struct r8a66597 { | ||
92 | spinlock_t lock; | ||
93 | unsigned long reg; | ||
94 | |||
95 | #ifdef CONFIG_HAVE_CLK | ||
96 | struct clk *clk; | ||
97 | #endif | ||
98 | struct r8a66597_platdata *pdata; | ||
99 | |||
100 | struct usb_gadget gadget; | ||
101 | struct usb_gadget_driver *driver; | ||
102 | |||
103 | struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE]; | ||
104 | struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE]; | ||
105 | struct r8a66597_ep *epaddr2ep[16]; | ||
106 | |||
107 | struct timer_list timer; | ||
108 | struct usb_request *ep0_req; /* for internal request */ | ||
109 | u16 ep0_data; /* for internal request */ | ||
110 | u16 old_vbus; | ||
111 | u16 scount; | ||
112 | u16 old_dvsq; | ||
113 | |||
114 | /* pipe config */ | ||
115 | unsigned char bulk; | ||
116 | unsigned char interrupt; | ||
117 | unsigned char isochronous; | ||
118 | unsigned char num_dma; | ||
119 | |||
120 | unsigned irq_sense_low:1; | ||
121 | }; | ||
122 | |||
123 | #define gadget_to_r8a66597(_gadget) \ | ||
124 | container_of(_gadget, struct r8a66597, gadget) | ||
125 | #define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget) | ||
126 | |||
127 | static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset) | ||
128 | { | ||
129 | return inw(r8a66597->reg + offset); | ||
130 | } | ||
131 | |||
132 | static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, | ||
133 | unsigned long offset, u16 *buf, | ||
134 | int len) | ||
135 | { | ||
136 | if (r8a66597->pdata->on_chip) { | ||
137 | unsigned long fifoaddr = r8a66597->reg + offset; | ||
138 | unsigned long count; | ||
139 | union { | ||
140 | unsigned long dword; | ||
141 | unsigned char byte[4]; | ||
142 | } data; | ||
143 | unsigned char *pb; | ||
144 | int i; | ||
145 | |||
146 | count = len / 4; | ||
147 | insl(fifoaddr, buf, count); | ||
148 | |||
149 | if (len & 0x00000003) { | ||
150 | data.dword = inl(fifoaddr); | ||
151 | pb = (unsigned char *)buf + count * 4; | ||
152 | for (i = 0; i < (len & 0x00000003); i++) | ||
153 | pb[i] = data.byte[i]; | ||
154 | } | ||
155 | } else { | ||
156 | len = (len + 1) / 2; | ||
157 | insw(r8a66597->reg + offset, buf, len); | ||
158 | } | ||
159 | } | ||
160 | |||
161 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, | ||
162 | unsigned long offset) | ||
163 | { | ||
164 | outw(val, r8a66597->reg + offset); | ||
165 | } | ||
166 | |||
167 | static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | ||
168 | unsigned long offset, u16 *buf, | ||
169 | int len) | ||
170 | { | ||
171 | unsigned long fifoaddr = r8a66597->reg + offset; | ||
172 | |||
173 | if (r8a66597->pdata->on_chip) { | ||
174 | unsigned long count; | ||
175 | unsigned char *pb; | ||
176 | int i; | ||
177 | |||
178 | count = len / 4; | ||
179 | outsl(fifoaddr, buf, count); | ||
180 | |||
181 | if (len & 0x00000003) { | ||
182 | pb = (unsigned char *)buf + count * 4; | ||
183 | for (i = 0; i < (len & 0x00000003); i++) { | ||
184 | if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) | ||
185 | outb(pb[i], fifoaddr + i); | ||
186 | else | ||
187 | outb(pb[i], fifoaddr + 3 - i); | ||
188 | } | ||
189 | } | ||
190 | } else { | ||
191 | int odd = len & 0x0001; | ||
192 | |||
193 | len = len / 2; | ||
194 | outsw(fifoaddr, buf, len); | ||
195 | if (unlikely(odd)) { | ||
196 | buf = &buf[len]; | ||
197 | outb((unsigned char)*buf, fifoaddr); | ||
198 | } | ||
199 | } | ||
200 | } | ||
201 | |||
202 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | ||
203 | u16 val, u16 pat, unsigned long offset) | ||
204 | { | ||
205 | u16 tmp; | ||
206 | tmp = r8a66597_read(r8a66597, offset); | ||
207 | tmp = tmp & (~pat); | ||
208 | tmp = tmp | val; | ||
209 | r8a66597_write(r8a66597, tmp, offset); | ||
210 | } | ||
211 | |||
212 | static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata) | ||
213 | { | ||
214 | u16 clock = 0; | ||
215 | |||
216 | switch (pdata->xtal) { | ||
217 | case R8A66597_PLATDATA_XTAL_12MHZ: | ||
218 | clock = XTAL12; | ||
219 | break; | ||
220 | case R8A66597_PLATDATA_XTAL_24MHZ: | ||
221 | clock = XTAL24; | ||
222 | break; | ||
223 | case R8A66597_PLATDATA_XTAL_48MHZ: | ||
224 | clock = XTAL48; | ||
225 | break; | ||
226 | default: | ||
227 | printk(KERN_ERR "r8a66597: platdata clock is wrong.\n"); | ||
228 | break; | ||
229 | } | ||
230 | |||
231 | return clock; | ||
232 | } | ||
233 | |||
234 | #define r8a66597_bclr(r8a66597, val, offset) \ | ||
235 | r8a66597_mdfy(r8a66597, 0, val, offset) | ||
236 | #define r8a66597_bset(r8a66597, val, offset) \ | ||
237 | r8a66597_mdfy(r8a66597, val, 0, offset) | ||
238 | |||
239 | #define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2) | ||
240 | |||
241 | #define enable_irq_ready(r8a66597, pipenum) \ | ||
242 | enable_pipe_irq(r8a66597, pipenum, BRDYENB) | ||
243 | #define disable_irq_ready(r8a66597, pipenum) \ | ||
244 | disable_pipe_irq(r8a66597, pipenum, BRDYENB) | ||
245 | #define enable_irq_empty(r8a66597, pipenum) \ | ||
246 | enable_pipe_irq(r8a66597, pipenum, BEMPENB) | ||
247 | #define disable_irq_empty(r8a66597, pipenum) \ | ||
248 | disable_pipe_irq(r8a66597, pipenum, BEMPENB) | ||
249 | #define enable_irq_nrdy(r8a66597, pipenum) \ | ||
250 | enable_pipe_irq(r8a66597, pipenum, NRDYENB) | ||
251 | #define disable_irq_nrdy(r8a66597, pipenum) \ | ||
252 | disable_pipe_irq(r8a66597, pipenum, NRDYENB) | ||
253 | |||
254 | #endif /* __R8A66597_H__ */ | ||
255 | |||