mmc: sdhci: add hooks for setting UHS in platform specific code

Allow platform specific code to set UHS registers if
implementation requires speciial platform specific handling

Signed-off-by: Philip Rakity <prakity@marvell.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Chris Ball <cjb@laptop.org>

2 files changed, 20 insertions, 15 deletions

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index fa3301644b15..cc63f5ed2310 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1346,27 +1346,30 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
                         sdhci_set_clock(host, clock);
                 }
 
-                ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-
-                /* Select Bus Speed Mode for host */
-                ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
-                if (ios->timing == MMC_TIMING_UHS_SDR12)
-                        ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
-                else if (ios->timing == MMC_TIMING_UHS_SDR25)
-                        ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
-                else if (ios->timing == MMC_TIMING_UHS_SDR50)
-                        ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
-                else if (ios->timing == MMC_TIMING_UHS_SDR104)
-                        ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
-                else if (ios->timing == MMC_TIMING_UHS_DDR50)
-                        ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
 
                 /* Reset SD Clock Enable */
                 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
                 clk &= ~SDHCI_CLOCK_CARD_EN;
                 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
-                sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+                if (host->ops->set_uhs_signaling)
+                        host->ops->set_uhs_signaling(host, ios->timing);
+                else {
+                        ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+                        /* Select Bus Speed Mode for host */
+                        ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+                        if (ios->timing == MMC_TIMING_UHS_SDR12)
+                                ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
+                        else if (ios->timing == MMC_TIMING_UHS_SDR25)
+                                ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
+                        else if (ios->timing == MMC_TIMING_UHS_SDR50)
+                                ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
+                        else if (ios->timing == MMC_TIMING_UHS_SDR104)
+                                ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
+                        else if (ios->timing == MMC_TIMING_UHS_DDR50)
+                                ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
+                        sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+                }
 
                 /* Re-enable SD Clock */
                 clock = host->clock;
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 8ea11b7cf89a..7e28eec97f04 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -270,6 +270,8 @@ struct sdhci_ops {
         unsigned int    (*get_ro)(struct sdhci_host *host);
         void    (*platform_reset_enter)(struct sdhci_host *host, u8 mask);
         void    (*platform_reset_exit)(struct sdhci_host *host, u8 mask);
+        int     (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
+
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS