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authorKevin Hilman <khilman@ti.com>2011-04-20 18:44:11 -0400
committerKevin Hilman <khilman@ti.com>2011-05-27 11:43:34 -0400
commit5ee1a81b84ee8b0bd0b4f8cdbac48b472863c1f2 (patch)
treee5c36eb9af2aa824f30f1c7dda84f2cfcc4f2fab
parent9a55d9752d8abfc62f1ab05ccc790d22a0c8e7c0 (diff)
GPIO: OMAP: move register offset defines into <plat/gpio.h>
Register offset defines are moved to <plat/gpio.h> so they can be used by SoC-specific device init code to fill out platform_data register offsets. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat
-rw-r--r--arch/arm/plat-omap/gpio.c103
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h103
2 files changed, 103 insertions, 103 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index efb869390199..44acabd5f530 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -30,109 +30,6 @@
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
32 32
33/*
34 * OMAP1510 GPIO registers
35 */
36#define OMAP1510_GPIO_DATA_INPUT 0x00
37#define OMAP1510_GPIO_DATA_OUTPUT 0x04
38#define OMAP1510_GPIO_DIR_CONTROL 0x08
39#define OMAP1510_GPIO_INT_CONTROL 0x0c
40#define OMAP1510_GPIO_INT_MASK 0x10
41#define OMAP1510_GPIO_INT_STATUS 0x14
42#define OMAP1510_GPIO_PIN_CONTROL 0x18
43
44#define OMAP1510_IH_GPIO_BASE 64
45
46/*
47 * OMAP1610 specific GPIO registers
48 */
49#define OMAP1610_GPIO_REVISION 0x0000
50#define OMAP1610_GPIO_SYSCONFIG 0x0010
51#define OMAP1610_GPIO_SYSSTATUS 0x0014
52#define OMAP1610_GPIO_IRQSTATUS1 0x0018
53#define OMAP1610_GPIO_IRQENABLE1 0x001c
54#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
55#define OMAP1610_GPIO_DATAIN 0x002c
56#define OMAP1610_GPIO_DATAOUT 0x0030
57#define OMAP1610_GPIO_DIRECTION 0x0034
58#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
59#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
60#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
61#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
62#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
63#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
64#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
65#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
66
67/*
68 * OMAP7XX specific GPIO registers
69 */
70#define OMAP7XX_GPIO_DATA_INPUT 0x00
71#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
72#define OMAP7XX_GPIO_DIR_CONTROL 0x08
73#define OMAP7XX_GPIO_INT_CONTROL 0x0c
74#define OMAP7XX_GPIO_INT_MASK 0x10
75#define OMAP7XX_GPIO_INT_STATUS 0x14
76
77/*
78 * omap2+ specific GPIO registers
79 */
80#define OMAP24XX_GPIO_REVISION 0x0000
81#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
82#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
83#define OMAP24XX_GPIO_IRQENABLE2 0x002c
84#define OMAP24XX_GPIO_IRQENABLE1 0x001c
85#define OMAP24XX_GPIO_WAKE_EN 0x0020
86#define OMAP24XX_GPIO_CTRL 0x0030
87#define OMAP24XX_GPIO_OE 0x0034
88#define OMAP24XX_GPIO_DATAIN 0x0038
89#define OMAP24XX_GPIO_DATAOUT 0x003c
90#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
91#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
92#define OMAP24XX_GPIO_RISINGDETECT 0x0048
93#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
94#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
95#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
96#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
97#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
98#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
99#define OMAP24XX_GPIO_SETWKUENA 0x0084
100#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
101#define OMAP24XX_GPIO_SETDATAOUT 0x0094
102
103#define OMAP4_GPIO_REVISION 0x0000
104#define OMAP4_GPIO_EOI 0x0020
105#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
106#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
107#define OMAP4_GPIO_IRQSTATUS0 0x002c
108#define OMAP4_GPIO_IRQSTATUS1 0x0030
109#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
110#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
111#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
112#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
113#define OMAP4_GPIO_IRQWAKEN0 0x0044
114#define OMAP4_GPIO_IRQWAKEN1 0x0048
115#define OMAP4_GPIO_IRQENABLE1 0x011c
116#define OMAP4_GPIO_WAKE_EN 0x0120
117#define OMAP4_GPIO_IRQSTATUS2 0x0128
118#define OMAP4_GPIO_IRQENABLE2 0x012c
119#define OMAP4_GPIO_CTRL 0x0130
120#define OMAP4_GPIO_OE 0x0134
121#define OMAP4_GPIO_DATAIN 0x0138
122#define OMAP4_GPIO_DATAOUT 0x013c
123#define OMAP4_GPIO_LEVELDETECT0 0x0140
124#define OMAP4_GPIO_LEVELDETECT1 0x0144
125#define OMAP4_GPIO_RISINGDETECT 0x0148
126#define OMAP4_GPIO_FALLINGDETECT 0x014c
127#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
128#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
129#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
130#define OMAP4_GPIO_SETIRQENABLE1 0x0164
131#define OMAP4_GPIO_CLEARWKUENA 0x0180
132#define OMAP4_GPIO_SETWKUENA 0x0184
133#define OMAP4_GPIO_CLEARDATAOUT 0x0190
134#define OMAP4_GPIO_SETDATAOUT 0x0194
135
136struct gpio_bank { 33struct gpio_bank {
137 unsigned long pbase; 34 unsigned long pbase;
138 void __iomem *base; 35 void __iomem *base;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index cac2e8ac6968..ec97e00cb581 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -52,6 +52,109 @@
52 52
53#define OMAP34XX_NR_GPIOS 6 53#define OMAP34XX_NR_GPIOS 6
54 54
55/*
56 * OMAP1510 GPIO registers
57 */
58#define OMAP1510_GPIO_DATA_INPUT 0x00
59#define OMAP1510_GPIO_DATA_OUTPUT 0x04
60#define OMAP1510_GPIO_DIR_CONTROL 0x08
61#define OMAP1510_GPIO_INT_CONTROL 0x0c
62#define OMAP1510_GPIO_INT_MASK 0x10
63#define OMAP1510_GPIO_INT_STATUS 0x14
64#define OMAP1510_GPIO_PIN_CONTROL 0x18
65
66#define OMAP1510_IH_GPIO_BASE 64
67
68/*
69 * OMAP1610 specific GPIO registers
70 */
71#define OMAP1610_GPIO_REVISION 0x0000
72#define OMAP1610_GPIO_SYSCONFIG 0x0010
73#define OMAP1610_GPIO_SYSSTATUS 0x0014
74#define OMAP1610_GPIO_IRQSTATUS1 0x0018
75#define OMAP1610_GPIO_IRQENABLE1 0x001c
76#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
77#define OMAP1610_GPIO_DATAIN 0x002c
78#define OMAP1610_GPIO_DATAOUT 0x0030
79#define OMAP1610_GPIO_DIRECTION 0x0034
80#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
81#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
82#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
83#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
84#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
85#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
86#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
87#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
88
89/*
90 * OMAP7XX specific GPIO registers
91 */
92#define OMAP7XX_GPIO_DATA_INPUT 0x00
93#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
94#define OMAP7XX_GPIO_DIR_CONTROL 0x08
95#define OMAP7XX_GPIO_INT_CONTROL 0x0c
96#define OMAP7XX_GPIO_INT_MASK 0x10
97#define OMAP7XX_GPIO_INT_STATUS 0x14
98
99/*
100 * omap2+ specific GPIO registers
101 */
102#define OMAP24XX_GPIO_REVISION 0x0000
103#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
104#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
105#define OMAP24XX_GPIO_IRQENABLE2 0x002c
106#define OMAP24XX_GPIO_IRQENABLE1 0x001c
107#define OMAP24XX_GPIO_WAKE_EN 0x0020
108#define OMAP24XX_GPIO_CTRL 0x0030
109#define OMAP24XX_GPIO_OE 0x0034
110#define OMAP24XX_GPIO_DATAIN 0x0038
111#define OMAP24XX_GPIO_DATAOUT 0x003c
112#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
113#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
114#define OMAP24XX_GPIO_RISINGDETECT 0x0048
115#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
116#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
117#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
118#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
119#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
120#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
121#define OMAP24XX_GPIO_SETWKUENA 0x0084
122#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
123#define OMAP24XX_GPIO_SETDATAOUT 0x0094
124
125#define OMAP4_GPIO_REVISION 0x0000
126#define OMAP4_GPIO_EOI 0x0020
127#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
128#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
129#define OMAP4_GPIO_IRQSTATUS0 0x002c
130#define OMAP4_GPIO_IRQSTATUS1 0x0030
131#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
132#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
133#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
134#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
135#define OMAP4_GPIO_IRQWAKEN0 0x0044
136#define OMAP4_GPIO_IRQWAKEN1 0x0048
137#define OMAP4_GPIO_IRQENABLE1 0x011c
138#define OMAP4_GPIO_WAKE_EN 0x0120
139#define OMAP4_GPIO_IRQSTATUS2 0x0128
140#define OMAP4_GPIO_IRQENABLE2 0x012c
141#define OMAP4_GPIO_CTRL 0x0130
142#define OMAP4_GPIO_OE 0x0134
143#define OMAP4_GPIO_DATAIN 0x0138
144#define OMAP4_GPIO_DATAOUT 0x013c
145#define OMAP4_GPIO_LEVELDETECT0 0x0140
146#define OMAP4_GPIO_LEVELDETECT1 0x0144
147#define OMAP4_GPIO_RISINGDETECT 0x0148
148#define OMAP4_GPIO_FALLINGDETECT 0x014c
149#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
150#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
151#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
152#define OMAP4_GPIO_SETIRQENABLE1 0x0164
153#define OMAP4_GPIO_CLEARWKUENA 0x0180
154#define OMAP4_GPIO_SETWKUENA 0x0184
155#define OMAP4_GPIO_CLEARDATAOUT 0x0190
156#define OMAP4_GPIO_SETDATAOUT 0x0194
157
55#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) 158#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
56#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) 159#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
57 160
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