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authorAlex Deucher <alexdeucher@gmail.com>2011-05-20 04:34:27 -0400
committerDave Airlie <airlied@redhat.com>2011-05-20 06:02:31 -0400
commit558e27db8f6a5e364dc6a88087f886049ac17e70 (patch)
tree69a8c88da40c9ed8fec7ce7d7dd198fd6dbb13da
parent39b3bdb62a3955db6467a075e77a8d0732caded9 (diff)
drm/radeon/kms/atom: add support for setting DP panel mode
Required for proper operation with DP bridges. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c19
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h2
3 files changed, 16 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 0f72f4d85c30..444954d95829 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -662,9 +662,9 @@ void dp_link_train(struct drm_encoder *encoder,
662 dp_set_downspread(radeon_connector, 0); 662 dp_set_downspread(radeon_connector, 0);
663 if (ASIC_IS_DCE4(rdev)) { 663 if (ASIC_IS_DCE4(rdev)) {
664 /* start training on the source */ 664 /* start training on the source */
665 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_START); 665 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_START, 0);
666 /* set training pattern 1 on the source */ 666 /* set training pattern 1 on the source */
667 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1); 667 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1, 0);
668 } else { 668 } else {
669 /* start training on the source */ 669 /* start training on the source */
670 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START, 670 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START,
@@ -733,7 +733,7 @@ void dp_link_train(struct drm_encoder *encoder,
733 dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2); 733 dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2);
734 /* set training pattern 2 on the source */ 734 /* set training pattern 2 on the source */
735 if (ASIC_IS_DCE4(rdev)) 735 if (ASIC_IS_DCE4(rdev))
736 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2); 736 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2, 0);
737 else 737 else
738 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, 738 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL,
739 dig_connector->dp_clock, enc_id, 1); 739 dig_connector->dp_clock, enc_id, 1);
@@ -777,7 +777,7 @@ void dp_link_train(struct drm_encoder *encoder,
777 777
778 /* disable the training pattern on the source */ 778 /* disable the training pattern on the source */
779 if (ASIC_IS_DCE4(rdev)) 779 if (ASIC_IS_DCE4(rdev))
780 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE); 780 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE, 0);
781 else 781 else
782 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_COMPLETE, 782 radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_COMPLETE,
783 dig_connector->dp_clock, enc_id, 0); 783 dig_connector->dp_clock, enc_id, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 43c001b28ecc..11d7b33472d3 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -771,7 +771,7 @@ union dig_encoder_control {
771}; 771};
772 772
773void 773void
774atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) 774atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode)
775{ 775{
776 struct drm_device *dev = encoder->dev; 776 struct drm_device *dev = encoder->dev;
777 struct radeon_device *rdev = dev->dev_private; 777 struct radeon_device *rdev = dev->dev_private;
@@ -817,7 +817,10 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
817 817
818 args.v1.ucAction = action; 818 args.v1.ucAction = action;
819 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 819 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
820 args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); 820 if (action == ATOM_ENCODER_CMD_SETUP_PANEL_MODE)
821 args.v3.ucPanelMode = panel_mode;
822 else
823 args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
821 824
822 if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) || 825 if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
823 (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST)) 826 (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST))
@@ -1416,7 +1419,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1416 } 1419 }
1417 dp_link_train(encoder, connector); 1420 dp_link_train(encoder, connector);
1418 if (ASIC_IS_DCE4(rdev)) 1421 if (ASIC_IS_DCE4(rdev))
1419 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON); 1422 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
1420 } 1423 }
1421 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) 1424 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
1422 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0); 1425 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
@@ -1429,7 +1432,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1429 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 1432 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1430 1433
1431 if (ASIC_IS_DCE4(rdev)) 1434 if (ASIC_IS_DCE4(rdev))
1432 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); 1435 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
1433 if (connector && 1436 if (connector &&
1434 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { 1437 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
1435 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 1438 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
@@ -1800,7 +1803,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1800 /* disable the transmitter */ 1803 /* disable the transmitter */
1801 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); 1804 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1802 /* setup and enable the encoder */ 1805 /* setup and enable the encoder */
1803 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP); 1806 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
1804 1807
1805 /* init and enable the transmitter */ 1808 /* init and enable the transmitter */
1806 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); 1809 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0);
@@ -1808,10 +1811,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1808 } else { 1811 } else {
1809 /* disable the encoder and transmitter */ 1812 /* disable the encoder and transmitter */
1810 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); 1813 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1811 atombios_dig_encoder_setup(encoder, ATOM_DISABLE); 1814 atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
1812 1815
1813 /* setup and enable the encoder and transmitter */ 1816 /* setup and enable the encoder and transmitter */
1814 atombios_dig_encoder_setup(encoder, ATOM_ENABLE); 1817 atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0);
1815 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0); 1818 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0);
1816 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); 1819 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
1817 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); 1820 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
@@ -2025,7 +2028,7 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
2025 else { 2028 else {
2026 /* disable the encoder and transmitter */ 2029 /* disable the encoder and transmitter */
2027 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); 2030 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
2028 atombios_dig_encoder_setup(encoder, ATOM_DISABLE); 2031 atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
2029 } 2032 }
2030 break; 2033 break;
2031 case ENCODER_OBJECT_ID_INTERNAL_DDI: 2034 case ENCODER_OBJECT_ID_INTERNAL_DDI:
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index bb43573ff3cf..ec2369ee7cc7 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -479,7 +479,7 @@ extern void dp_link_train(struct drm_encoder *encoder,
479 struct drm_connector *connector); 479 struct drm_connector *connector);
480extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 480extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
481extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); 481extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
482extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); 482extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
483extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, 483extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
484 int action, uint8_t lane_num, 484 int action, uint8_t lane_num,
485 uint8_t lane_set); 485 uint8_t lane_set);