diff options
author | Dmitry Belimov <d.belimov@gmail.com> | 2010-10-12 10:39:37 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-10-20 23:17:52 -0400 |
commit | 421d1b70718232dfbd386f67b135f5e23f569c6e (patch) | |
tree | bde0f361ef1e16b0ffc273baac1230d862d755a9 | |
parent | 709944eae2505eb4c93c0fff4bd4de18dfd8c570 (diff) |
[media] tm6000: Improve audio standards handling and add SECAM-DK
Rework audio. Add SECAM-DK, move SECAM to SECAM-B | SECAM-G.
Add some new audio standards and tricks for future, see
tm6000_set_audio_std.
For SECAM-DK it works.
Signed-off-by: Beholder Intl. Ltd. Dmitry Belimov <d.belimov@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/staging/tm6000/tm6000-stds.c | 344 |
1 files changed, 244 insertions, 100 deletions
diff --git a/drivers/staging/tm6000/tm6000-stds.c b/drivers/staging/tm6000/tm6000-stds.c index 506670282875..6a571f0856b1 100644 --- a/drivers/staging/tm6000/tm6000-stds.c +++ b/drivers/staging/tm6000/tm6000-stds.c | |||
@@ -112,6 +112,7 @@ static struct tm6000_std_tv_settings tv_stds[] = { | |||
112 | 112 | ||
113 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | 113 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, |
114 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | 114 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, |
115 | |||
115 | {TM6010_REQ07_R3F_RESET, 0x00}, | 116 | {TM6010_REQ07_R3F_RESET, 0x00}, |
116 | 117 | ||
117 | {0, 0, 0}, | 118 | {0, 0, 0}, |
@@ -172,8 +173,9 @@ static struct tm6000_std_tv_settings tv_stds[] = { | |||
172 | 173 | ||
173 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | 174 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, |
174 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | 175 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, |
175 | {TM6010_REQ08_R05_A_STANDARD_MOD, 0x21}, /* FIXME */ | 176 | |
176 | {TM6010_REQ07_R3F_RESET, 0x00}, | 177 | {TM6010_REQ07_R3F_RESET, 0x00}, |
178 | |||
177 | {0, 0, 0}, | 179 | {0, 0, 0}, |
178 | }, | 180 | }, |
179 | }, { | 181 | }, { |
@@ -232,12 +234,13 @@ static struct tm6000_std_tv_settings tv_stds[] = { | |||
232 | 234 | ||
233 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | 235 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, |
234 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | 236 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, |
235 | {TM6010_REQ08_R05_A_STANDARD_MOD, 0x76}, /* FIXME */ | 237 | |
236 | {TM6010_REQ07_R3F_RESET, 0x00}, | 238 | {TM6010_REQ07_R3F_RESET, 0x00}, |
239 | |||
237 | {0, 0, 0}, | 240 | {0, 0, 0}, |
238 | }, | 241 | }, |
239 | }, { | 242 | }, { |
240 | .id = V4L2_STD_SECAM, | 243 | .id = V4L2_STD_SECAM_B | V4L2_STD_SECAM_G, |
241 | .audio_default_std = BG_NICAM, | 244 | .audio_default_std = BG_NICAM, |
242 | .sif = { | 245 | .sif = { |
243 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, | 246 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
@@ -291,7 +294,66 @@ static struct tm6000_std_tv_settings tv_stds[] = { | |||
291 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | 294 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, |
292 | 295 | ||
293 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | 296 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, |
294 | {TM6010_REQ08_R05_A_STANDARD_MOD, 0x79}, | 297 | |
298 | {TM6010_REQ07_R3F_RESET, 0x00}, | ||
299 | {0, 0, 0}, | ||
300 | }, | ||
301 | }, { | ||
302 | .id = V4L2_STD_SECAM_DK, | ||
303 | .audio_default_std = DK_NICAM, | ||
304 | .sif = { | ||
305 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, | ||
306 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | ||
307 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | ||
308 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | ||
309 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | ||
310 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | ||
311 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | ||
312 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | ||
313 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | ||
314 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | ||
315 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | ||
316 | {0, 0, 0}, | ||
317 | }, | ||
318 | .nosif = { | ||
319 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, | ||
320 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | ||
321 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | ||
322 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | ||
323 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | ||
324 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | ||
325 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | ||
326 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | ||
327 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | ||
328 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | ||
329 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | ||
330 | {0, 0, 0}, | ||
331 | }, | ||
332 | .common = { | ||
333 | {TM6010_REQ07_R3F_RESET, 0x01}, | ||
334 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38}, | ||
335 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | ||
336 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | ||
337 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | ||
338 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31}, | ||
339 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | ||
340 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | ||
341 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | ||
342 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | ||
343 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | ||
344 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | ||
345 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | ||
346 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | ||
347 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | ||
348 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | ||
349 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | ||
350 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | ||
351 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | ||
352 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | ||
353 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | ||
354 | |||
355 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | ||
356 | |||
295 | {TM6010_REQ07_R3F_RESET, 0x00}, | 357 | {TM6010_REQ07_R3F_RESET, 0x00}, |
296 | {0, 0, 0}, | 358 | {0, 0, 0}, |
297 | }, | 359 | }, |
@@ -351,8 +413,9 @@ static struct tm6000_std_tv_settings tv_stds[] = { | |||
351 | 413 | ||
352 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd}, | 414 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd}, |
353 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | 415 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, |
354 | {TM6010_REQ08_R05_A_STANDARD_MOD, 0x22}, /* FIXME */ | 416 | |
355 | {TM6010_REQ07_R3F_RESET, 0x00}, | 417 | {TM6010_REQ07_R3F_RESET, 0x00}, |
418 | |||
356 | {0, 0, 0}, | 419 | {0, 0, 0}, |
357 | }, | 420 | }, |
358 | }, | 421 | }, |
@@ -531,6 +594,48 @@ static struct tm6000_std_settings composite_stds[] = { | |||
531 | {0, 0, 0}, | 594 | {0, 0, 0}, |
532 | }, | 595 | }, |
533 | }, { | 596 | }, { |
597 | .id = V4L2_STD_SECAM_DK, | ||
598 | .audio_default_std = DK_NICAM, | ||
599 | .common = { | ||
600 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, | ||
601 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | ||
602 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | ||
603 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | ||
604 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | ||
605 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | ||
606 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | ||
607 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | ||
608 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | ||
609 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | ||
610 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | ||
611 | |||
612 | {TM6010_REQ07_R3F_RESET, 0x01}, | ||
613 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38}, | ||
614 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | ||
615 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | ||
616 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | ||
617 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31}, | ||
618 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | ||
619 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | ||
620 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | ||
621 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | ||
622 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | ||
623 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | ||
624 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | ||
625 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | ||
626 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | ||
627 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | ||
628 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | ||
629 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | ||
630 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | ||
631 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | ||
632 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | ||
633 | |||
634 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | ||
635 | {TM6010_REQ07_R3F_RESET, 0x00}, | ||
636 | {0, 0, 0}, | ||
637 | }, | ||
638 | }, { | ||
534 | .id = V4L2_STD_NTSC, | 639 | .id = V4L2_STD_NTSC, |
535 | .audio_default_std = BTSC, | 640 | .audio_default_std = BTSC, |
536 | .common = { | 641 | .common = { |
@@ -749,6 +854,48 @@ static struct tm6000_std_settings svideo_stds[] = { | |||
749 | {0, 0, 0}, | 854 | {0, 0, 0}, |
750 | }, | 855 | }, |
751 | }, { | 856 | }, { |
857 | .id = V4L2_STD_SECAM_DK, | ||
858 | .audio_default_std = DK_NICAM, | ||
859 | .common = { | ||
860 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, | ||
861 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | ||
862 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | ||
863 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | ||
864 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | ||
865 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | ||
866 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | ||
867 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | ||
868 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | ||
869 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | ||
870 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | ||
871 | |||
872 | {TM6010_REQ07_R3F_RESET, 0x01}, | ||
873 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39}, | ||
874 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | ||
875 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | ||
876 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03}, | ||
877 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x31}, | ||
878 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | ||
879 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | ||
880 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | ||
881 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | ||
882 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | ||
883 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | ||
884 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | ||
885 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | ||
886 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | ||
887 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a}, | ||
888 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | ||
889 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | ||
890 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | ||
891 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | ||
892 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | ||
893 | |||
894 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | ||
895 | {TM6010_REQ07_R3F_RESET, 0x00}, | ||
896 | {0, 0, 0}, | ||
897 | }, | ||
898 | }, { | ||
752 | .id = V4L2_STD_NTSC, | 899 | .id = V4L2_STD_NTSC, |
753 | .audio_default_std = BTSC, | 900 | .audio_default_std = BTSC, |
754 | .common = { | 901 | .common = { |
@@ -799,129 +946,126 @@ static struct tm6000_std_settings svideo_stds[] = { | |||
799 | static int tm6000_set_audio_std(struct tm6000_core *dev, | 946 | static int tm6000_set_audio_std(struct tm6000_core *dev, |
800 | enum tm6000_audio_std std) | 947 | enum tm6000_audio_std std) |
801 | { | 948 | { |
949 | uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */ | ||
950 | uint8_t areg_05 = 0x09; /* Auto 4.5 = M Japan, Auto 6.5 = DK */ | ||
951 | uint8_t areg_06 = 0x02; /* Auto de-emphasis, mannual channel mode */ | ||
952 | uint8_t mono_flag = 0; /* No mono */ | ||
953 | uint8_t nicam_flag = 0; /* No NICAM */ | ||
954 | |||
802 | switch (std) { | 955 | switch (std) { |
956 | #if 0 | ||
957 | case DK_MONO: | ||
958 | mono_flag = 1; | ||
959 | break; | ||
960 | case DK_A2_1: | ||
961 | break; | ||
962 | case DK_A2_3: | ||
963 | areg_05 = 0x0b; | ||
964 | break; | ||
965 | case BG_MONO: | ||
966 | mono_flag = 1; | ||
967 | areg_05 = 0x05; | ||
968 | break; | ||
969 | #endif | ||
803 | case BG_NICAM: | 970 | case BG_NICAM: |
804 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 971 | areg_05 = 0x07; |
805 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x11); | 972 | nicam_flag = 1; |
806 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
807 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x01); | ||
808 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
809 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
810 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
811 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
812 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
813 | break; | 973 | break; |
814 | case BTSC: | 974 | case BTSC: |
815 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 975 | areg_05 = 0x02; |
816 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | ||
817 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
818 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x02); | ||
819 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
820 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
821 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
822 | tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0); | ||
823 | tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80); | ||
824 | tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0); | ||
825 | tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80); | ||
826 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
827 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
828 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
829 | break; | 976 | break; |
830 | case BG_A2: | 977 | case BG_A2: |
831 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 978 | areg_05 = 0x05; |
832 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | ||
833 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
834 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x05); | ||
835 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
836 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
837 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
838 | tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0); | ||
839 | tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80); | ||
840 | tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0); | ||
841 | tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80); | ||
842 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
843 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
844 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
845 | break; | 979 | break; |
846 | case DK_NICAM: | 980 | case DK_NICAM: |
847 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 981 | areg_05 = 0x06; |
848 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | 982 | nicam_flag = 1; |
849 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
850 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x06); | ||
851 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
852 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
853 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
854 | tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x0a); | ||
855 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
856 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
857 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
858 | break; | 983 | break; |
859 | case EIAJ: | 984 | case EIAJ: |
860 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 985 | areg_05 = 0x02; |
861 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | ||
862 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
863 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x03); | ||
864 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
865 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
866 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
867 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
868 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
869 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
870 | break; | 986 | break; |
871 | case FM_RADIO: | 987 | case FM_RADIO: |
872 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 988 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); |
873 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x01); | 989 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); |
874 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | 990 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); |
875 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x0c); | 991 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x0c); |
876 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00); | 992 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00); |
877 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x10); | 993 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x18); |
878 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | 994 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); |
879 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | 995 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); |
880 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | 996 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); |
997 | tm6000_set_reg(dev, TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT, 0x13); | ||
881 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | 998 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); |
999 | return 0; | ||
882 | break; | 1000 | break; |
883 | case I_NICAM: | 1001 | case I_NICAM: |
884 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 1002 | areg_05 = 0x08; |
885 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | 1003 | nicam_flag = 1; |
886 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
887 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x01); | ||
888 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
889 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
890 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
891 | tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x0a); | ||
892 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
893 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
894 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
895 | break; | 1004 | break; |
896 | case KOREA_A2: | 1005 | case KOREA_A2: |
897 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 1006 | areg_05 = 0x04; |
898 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04); | ||
899 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
900 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x04); | ||
901 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
902 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
903 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
904 | tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0); | ||
905 | tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80); | ||
906 | tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0); | ||
907 | tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0xf0); | ||
908 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
909 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
910 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
911 | break; | 1007 | break; |
912 | case L_NICAM: | 1008 | case L_NICAM: |
913 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 1009 | areg_02 = 0x02; /* GC1 Fixed gain +12dB */ |
914 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x02); | 1010 | areg_05 = 0x0a; |
915 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | 1011 | nicam_flag = 1; |
916 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x0a); | ||
917 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06); | ||
918 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
919 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
920 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
921 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
922 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
923 | break; | 1012 | break; |
924 | } | 1013 | } |
1014 | |||
1015 | #if 0 | ||
1016 | switch (tv_audio_mode) { | ||
1017 | case TV_MONO: | ||
1018 | areg_06 = (nicam_flag) ? 0x03 : 0x00; | ||
1019 | break; | ||
1020 | case TV_LANG_A: | ||
1021 | areg_06 = 0x00; | ||
1022 | break; | ||
1023 | case TV_LANG_B: | ||
1024 | areg_06 = 0x01; | ||
1025 | break; | ||
1026 | } | ||
1027 | #endif | ||
1028 | |||
1029 | if (mono_flag) | ||
1030 | areg_06 = 0x00; | ||
1031 | |||
1032 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | ||
1033 | tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, areg_02); | ||
1034 | tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00); | ||
1035 | tm6000_set_reg(dev, TM6010_REQ08_R04_A_SIF_AMP_CTRL, 0xa0); | ||
1036 | tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, areg_05); | ||
1037 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, areg_06); | ||
1038 | tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, 0x00); | ||
1039 | tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, 0x00); | ||
1040 | tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08); | ||
1041 | tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91); | ||
1042 | tm6000_set_reg(dev, TM6010_REQ08_R0B_A_ASD_THRES1, 0x20); | ||
1043 | tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x12); | ||
1044 | tm6000_set_reg(dev, TM6010_REQ08_R0D_A_AMD_THRES, 0x20); | ||
1045 | tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0); | ||
1046 | tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80); | ||
1047 | tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0); | ||
1048 | tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80); | ||
1049 | tm6000_set_reg(dev, TM6010_REQ08_R12_A_AGC_U, 0x12); | ||
1050 | tm6000_set_reg(dev, TM6010_REQ08_R13_A_AGC_ERR_T, 0xfe); | ||
1051 | tm6000_set_reg(dev, TM6010_REQ08_R14_A_AGC_GAIN_INIT, 0x20); | ||
1052 | tm6000_set_reg(dev, TM6010_REQ08_R15_A_AGC_STEP_THR, 0x14); | ||
1053 | tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe); | ||
1054 | tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01); | ||
1055 | tm6000_set_reg(dev, TM6010_REQ08_R18_A_TR_CTRL, 0xa0); | ||
1056 | tm6000_set_reg(dev, TM6010_REQ08_R19_A_FH_2FH_GAIN, 0x32); | ||
1057 | tm6000_set_reg(dev, TM6010_REQ08_R1A_A_NICAM_SER_MAX, 0x64); | ||
1058 | tm6000_set_reg(dev, TM6010_REQ08_R1B_A_NICAM_SER_MIN, 0x20); | ||
1059 | tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1c, 0x00); | ||
1060 | tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1d, 0x00); | ||
1061 | tm6000_set_reg(dev, TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT, 0x13); | ||
1062 | tm6000_set_reg(dev, TM6010_REQ08_R1F_A_TEST_INTF_SEL, 0x00); | ||
1063 | tm6000_set_reg(dev, TM6010_REQ08_R20_A_TEST_PIN_SEL, 0x00); | ||
1064 | tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3); | ||
1065 | tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00); | ||
1066 | tm6000_set_reg(dev, TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc); | ||
1067 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80); | ||
1068 | |||
925 | return 0; | 1069 | return 0; |
926 | } | 1070 | } |
927 | 1071 | ||