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authorFelix Fietkau <nbd@openwrt.org>2010-10-04 14:09:47 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-10-06 16:30:39 -0400
commit093115b7fd641f03d89404252044c976928764cb (patch)
tree079703d4d3be2f3b59d21b7bf0bf6bdaf8130f43
parent71ea420992149294e74da3fa34ca8f111326bb6d (diff)
ath9k_hw: clean up ANI state handling
ANI state is kept per channel, so instead of keeping an array of ANI states with an arbitrary size of 255, move the ANI state into the channel struct. Move some config settings that are not per-channel out of the per-channel struct to save some memory. With those changes, ath9k_ani_restart_old and ath9k_ani_restart_new can be merged into a single function. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c338
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h3
6 files changed, 110 insertions, 260 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index 9856a1b0ca2d..6bae601c63a3 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -114,27 +114,6 @@ static bool use_new_ani(struct ath_hw *ah)
114 return AR_SREV_9300_20_OR_LATER(ah) || modparam_force_new_ani; 114 return AR_SREV_9300_20_OR_LATER(ah) || modparam_force_new_ani;
115} 115}
116 116
117int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
118 struct ath9k_channel *chan)
119{
120 int i;
121
122 for (i = 0; i < ARRAY_SIZE(ah->ani); i++) {
123 if (ah->ani[i].c &&
124 ah->ani[i].c->channel == chan->channel)
125 return i;
126 if (ah->ani[i].c == NULL) {
127 ah->ani[i].c = chan;
128 return i;
129 }
130 }
131
132 ath_print(ath9k_hw_common(ah), ATH_DBG_ANI,
133 "No more channel states left. Using channel 0\n");
134
135 return 0;
136}
137
138static void ath9k_hw_update_mibstats(struct ath_hw *ah, 117static void ath9k_hw_update_mibstats(struct ath_hw *ah,
139 struct ath9k_mib_stats *stats) 118 struct ath9k_mib_stats *stats)
140{ 119{
@@ -145,76 +124,30 @@ static void ath9k_hw_update_mibstats(struct ath_hw *ah,
145 stats->beacons += REG_READ(ah, AR_BEACON_CNT); 124 stats->beacons += REG_READ(ah, AR_BEACON_CNT);
146} 125}
147 126
148static void ath9k_ani_restart_old(struct ath_hw *ah) 127static void ath9k_ani_restart(struct ath_hw *ah)
149{ 128{
150 struct ar5416AniState *aniState; 129 struct ar5416AniState *aniState;
151 struct ath_common *common = ath9k_hw_common(ah); 130 struct ath_common *common = ath9k_hw_common(ah);
131 u32 ofdm_base = 0, cck_base = 0;
152 132
153 if (!DO_ANI(ah)) 133 if (!DO_ANI(ah))
154 return; 134 return;
155 135
156 aniState = ah->curani; 136 aniState = &ah->curchan->ani;
157 aniState->listenTime = 0; 137 aniState->listenTime = 0;
158 138
159 if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) { 139 if (!use_new_ani(ah)) {
160 aniState->ofdmPhyErrBase = 0; 140 ofdm_base = AR_PHY_COUNTMAX - ah->config.ofdm_trig_high;
161 ath_print(common, ATH_DBG_ANI, 141 cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
162 "OFDM Trigger is too high for hw counters\n");
163 } else {
164 aniState->ofdmPhyErrBase =
165 AR_PHY_COUNTMAX - aniState->ofdmTrigHigh;
166 } 142 }
167 if (aniState->cckTrigHigh > AR_PHY_COUNTMAX) {
168 aniState->cckPhyErrBase = 0;
169 ath_print(common, ATH_DBG_ANI,
170 "CCK Trigger is too high for hw counters\n");
171 } else {
172 aniState->cckPhyErrBase =
173 AR_PHY_COUNTMAX - aniState->cckTrigHigh;
174 }
175 ath_print(common, ATH_DBG_ANI,
176 "Writing ofdmbase=%u cckbase=%u\n",
177 aniState->ofdmPhyErrBase,
178 aniState->cckPhyErrBase);
179
180 ENABLE_REGWRITE_BUFFER(ah);
181
182 REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);
183 REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);
184 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
185 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
186
187 REGWRITE_BUFFER_FLUSH(ah);
188
189 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
190
191 aniState->ofdmPhyErrCount = 0;
192 aniState->cckPhyErrCount = 0;
193}
194
195static void ath9k_ani_restart_new(struct ath_hw *ah)
196{
197 struct ar5416AniState *aniState;
198 struct ath_common *common = ath9k_hw_common(ah);
199
200 if (!DO_ANI(ah))
201 return;
202
203 aniState = ah->curani;
204 aniState->listenTime = 0;
205
206 aniState->ofdmPhyErrBase = 0;
207 aniState->cckPhyErrBase = 0;
208 143
209 ath_print(common, ATH_DBG_ANI, 144 ath_print(common, ATH_DBG_ANI,
210 "Writing ofdmbase=%08x cckbase=%08x\n", 145 "Writing ofdmbase=%u cckbase=%u\n", ofdm_base, cck_base);
211 aniState->ofdmPhyErrBase,
212 aniState->cckPhyErrBase);
213 146
214 ENABLE_REGWRITE_BUFFER(ah); 147 ENABLE_REGWRITE_BUFFER(ah);
215 148
216 REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase); 149 REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
217 REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase); 150 REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
218 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 151 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
219 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 152 REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
220 153
@@ -235,7 +168,7 @@ static void ath9k_hw_ani_ofdm_err_trigger_old(struct ath_hw *ah)
235 if (!DO_ANI(ah)) 168 if (!DO_ANI(ah))
236 return; 169 return;
237 170
238 aniState = ah->curani; 171 aniState = &ah->curchan->ani;
239 172
240 if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { 173 if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
241 if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 174 if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
@@ -307,7 +240,7 @@ static void ath9k_hw_ani_cck_err_trigger_old(struct ath_hw *ah)
307 if (!DO_ANI(ah)) 240 if (!DO_ANI(ah))
308 return; 241 return;
309 242
310 aniState = ah->curani; 243 aniState = &ah->curchan->ani;
311 if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) { 244 if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
312 if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 245 if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,
313 aniState->noiseImmunityLevel + 1)) { 246 aniState->noiseImmunityLevel + 1)) {
@@ -339,7 +272,7 @@ static void ath9k_hw_ani_cck_err_trigger_old(struct ath_hw *ah)
339/* Adjust the OFDM Noise Immunity Level */ 272/* Adjust the OFDM Noise Immunity Level */
340static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel) 273static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
341{ 274{
342 struct ar5416AniState *aniState = ah->curani; 275 struct ar5416AniState *aniState = &ah->curchan->ani;
343 struct ath_common *common = ath9k_hw_common(ah); 276 struct ath_common *common = ath9k_hw_common(ah);
344 const struct ani_ofdm_level_entry *entry_ofdm; 277 const struct ani_ofdm_level_entry *entry_ofdm;
345 const struct ani_cck_level_entry *entry_cck; 278 const struct ani_cck_level_entry *entry_cck;
@@ -391,7 +324,7 @@ static void ath9k_hw_ani_ofdm_err_trigger_new(struct ath_hw *ah)
391 if (!DO_ANI(ah)) 324 if (!DO_ANI(ah))
392 return; 325 return;
393 326
394 aniState = ah->curani; 327 aniState = &ah->curchan->ani;
395 328
396 if (aniState->ofdmNoiseImmunityLevel < ATH9K_ANI_OFDM_MAX_LEVEL) 329 if (aniState->ofdmNoiseImmunityLevel < ATH9K_ANI_OFDM_MAX_LEVEL)
397 ath9k_hw_set_ofdm_nil(ah, aniState->ofdmNoiseImmunityLevel + 1); 330 ath9k_hw_set_ofdm_nil(ah, aniState->ofdmNoiseImmunityLevel + 1);
@@ -402,7 +335,7 @@ static void ath9k_hw_ani_ofdm_err_trigger_new(struct ath_hw *ah)
402 */ 335 */
403static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel) 336static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel)
404{ 337{
405 struct ar5416AniState *aniState = ah->curani; 338 struct ar5416AniState *aniState = &ah->curchan->ani;
406 struct ath_common *common = ath9k_hw_common(ah); 339 struct ath_common *common = ath9k_hw_common(ah);
407 const struct ani_ofdm_level_entry *entry_ofdm; 340 const struct ani_ofdm_level_entry *entry_ofdm;
408 const struct ani_cck_level_entry *entry_cck; 341 const struct ani_cck_level_entry *entry_cck;
@@ -448,7 +381,7 @@ static void ath9k_hw_ani_cck_err_trigger_new(struct ath_hw *ah)
448 if (!DO_ANI(ah)) 381 if (!DO_ANI(ah))
449 return; 382 return;
450 383
451 aniState = ah->curani; 384 aniState = &ah->curchan->ani;
452 385
453 if (aniState->cckNoiseImmunityLevel < ATH9K_ANI_CCK_MAX_LEVEL) 386 if (aniState->cckNoiseImmunityLevel < ATH9K_ANI_CCK_MAX_LEVEL)
454 ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel + 1); 387 ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel + 1);
@@ -459,7 +392,7 @@ static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
459 struct ar5416AniState *aniState; 392 struct ar5416AniState *aniState;
460 int32_t rssi; 393 int32_t rssi;
461 394
462 aniState = ah->curani; 395 aniState = &ah->curchan->ani;
463 396
464 if (ah->opmode == NL80211_IFTYPE_AP) { 397 if (ah->opmode == NL80211_IFTYPE_AP) {
465 if (aniState->firstepLevel > 0) { 398 if (aniState->firstepLevel > 0) {
@@ -515,7 +448,7 @@ static void ath9k_hw_ani_lower_immunity_new(struct ath_hw *ah)
515{ 448{
516 struct ar5416AniState *aniState; 449 struct ar5416AniState *aniState;
517 450
518 aniState = ah->curani; 451 aniState = &ah->curchan->ani;
519 452
520 /* lower OFDM noise immunity */ 453 /* lower OFDM noise immunity */
521 if (aniState->ofdmNoiseImmunityLevel > 0 && 454 if (aniState->ofdmNoiseImmunityLevel > 0 &&
@@ -568,16 +501,13 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
568 struct ar5416AniState *aniState; 501 struct ar5416AniState *aniState;
569 struct ath9k_channel *chan = ah->curchan; 502 struct ath9k_channel *chan = ah->curchan;
570 struct ath_common *common = ath9k_hw_common(ah); 503 struct ath_common *common = ath9k_hw_common(ah);
571 int index;
572 504
573 if (!DO_ANI(ah)) 505 if (!DO_ANI(ah))
574 return; 506 return;
575 507
576 index = ath9k_hw_get_ani_channel_idx(ah, chan); 508 aniState = &ah->curchan->ani;
577 aniState = &ah->ani[index];
578 ah->curani = aniState;
579 509
580 if (DO_ANI(ah) && ah->opmode != NL80211_IFTYPE_STATION 510 if (ah->opmode != NL80211_IFTYPE_STATION
581 && ah->opmode != NL80211_IFTYPE_ADHOC) { 511 && ah->opmode != NL80211_IFTYPE_ADHOC) {
582 ath_print(common, ATH_DBG_ANI, 512 ath_print(common, ATH_DBG_ANI,
583 "Reset ANI state opmode %u\n", ah->opmode); 513 "Reset ANI state opmode %u\n", ah->opmode);
@@ -606,17 +536,7 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
606 ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) | 536 ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |
607 ATH9K_RX_FILTER_PHYERR); 537 ATH9K_RX_FILTER_PHYERR);
608 538
609 if (ah->opmode == NL80211_IFTYPE_AP) { 539 ath9k_ani_restart(ah);
610 ah->curani->ofdmTrigHigh =
611 ah->config.ofdm_trig_high;
612 ah->curani->ofdmTrigLow =
613 ah->config.ofdm_trig_low;
614 ah->curani->cckTrigHigh =
615 ah->config.cck_trig_high;
616 ah->curani->cckTrigLow =
617 ah->config.cck_trig_low;
618 }
619 ath9k_ani_restart_old(ah);
620 return; 540 return;
621 } 541 }
622 542
@@ -638,7 +558,7 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
638 558
639 ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) & 559 ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) &
640 ~ATH9K_RX_FILTER_PHYERR); 560 ~ATH9K_RX_FILTER_PHYERR);
641 ath9k_ani_restart_old(ah); 561 ath9k_ani_restart(ah);
642 562
643 ENABLE_REGWRITE_BUFFER(ah); 563 ENABLE_REGWRITE_BUFFER(ah);
644 564
@@ -655,7 +575,7 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
655 */ 575 */
656static void ath9k_ani_reset_new(struct ath_hw *ah, bool is_scanning) 576static void ath9k_ani_reset_new(struct ath_hw *ah, bool is_scanning)
657{ 577{
658 struct ar5416AniState *aniState = ah->curani; 578 struct ar5416AniState *aniState = &ah->curchan->ani;
659 struct ath9k_channel *chan = ah->curchan; 579 struct ath9k_channel *chan = ah->curchan;
660 struct ath_common *common = ath9k_hw_common(ah); 580 struct ath_common *common = ath9k_hw_common(ah);
661 581
@@ -731,7 +651,7 @@ static void ath9k_ani_reset_new(struct ath_hw *ah, bool is_scanning)
731 * enable phy counters if hw supports or if not, enable phy 651 * enable phy counters if hw supports or if not, enable phy
732 * interrupts (so we can count each one) 652 * interrupts (so we can count each one)
733 */ 653 */
734 ath9k_ani_restart_new(ah); 654 ath9k_ani_restart(ah);
735 655
736 ENABLE_REGWRITE_BUFFER(ah); 656 ENABLE_REGWRITE_BUFFER(ah);
737 657
@@ -749,16 +669,18 @@ static void ath9k_hw_ani_monitor_old(struct ath_hw *ah,
749 int32_t listenTime; 669 int32_t listenTime;
750 u32 phyCnt1, phyCnt2; 670 u32 phyCnt1, phyCnt2;
751 u32 ofdmPhyErrCnt, cckPhyErrCnt; 671 u32 ofdmPhyErrCnt, cckPhyErrCnt;
672 u32 ofdm_base = AR_PHY_COUNTMAX - ah->config.ofdm_trig_high;
673 u32 cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
752 674
753 if (!DO_ANI(ah)) 675 if (!DO_ANI(ah))
754 return; 676 return;
755 677
756 aniState = ah->curani; 678 aniState = &ah->curchan->ani;
757 679
758 listenTime = ath9k_hw_ani_get_listen_time(ah); 680 listenTime = ath9k_hw_ani_get_listen_time(ah);
759 if (listenTime < 0) { 681 if (listenTime < 0) {
760 ah->stats.ast_ani_lneg++; 682 ah->stats.ast_ani_lneg++;
761 ath9k_ani_restart_old(ah); 683 ath9k_ani_restart(ah);
762 return; 684 return;
763 } 685 }
764 686
@@ -769,60 +691,55 @@ static void ath9k_hw_ani_monitor_old(struct ath_hw *ah,
769 phyCnt1 = REG_READ(ah, AR_PHY_ERR_1); 691 phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
770 phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); 692 phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
771 693
772 if (phyCnt1 < aniState->ofdmPhyErrBase || 694 if (phyCnt1 < ofdm_base || phyCnt2 < cck_base) {
773 phyCnt2 < aniState->cckPhyErrBase) { 695 if (phyCnt1 < ofdm_base) {
774 if (phyCnt1 < aniState->ofdmPhyErrBase) {
775 ath_print(common, ATH_DBG_ANI, 696 ath_print(common, ATH_DBG_ANI,
776 "phyCnt1 0x%x, resetting " 697 "phyCnt1 0x%x, resetting "
777 "counter value to 0x%x\n", 698 "counter value to 0x%x\n",
778 phyCnt1, 699 phyCnt1, ofdm_base);
779 aniState->ofdmPhyErrBase); 700 REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
780 REG_WRITE(ah, AR_PHY_ERR_1,
781 aniState->ofdmPhyErrBase);
782 REG_WRITE(ah, AR_PHY_ERR_MASK_1, 701 REG_WRITE(ah, AR_PHY_ERR_MASK_1,
783 AR_PHY_ERR_OFDM_TIMING); 702 AR_PHY_ERR_OFDM_TIMING);
784 } 703 }
785 if (phyCnt2 < aniState->cckPhyErrBase) { 704 if (phyCnt2 < cck_base) {
786 ath_print(common, ATH_DBG_ANI, 705 ath_print(common, ATH_DBG_ANI,
787 "phyCnt2 0x%x, resetting " 706 "phyCnt2 0x%x, resetting "
788 "counter value to 0x%x\n", 707 "counter value to 0x%x\n",
789 phyCnt2, 708 phyCnt2, cck_base);
790 aniState->cckPhyErrBase); 709 REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
791 REG_WRITE(ah, AR_PHY_ERR_2,
792 aniState->cckPhyErrBase);
793 REG_WRITE(ah, AR_PHY_ERR_MASK_2, 710 REG_WRITE(ah, AR_PHY_ERR_MASK_2,
794 AR_PHY_ERR_CCK_TIMING); 711 AR_PHY_ERR_CCK_TIMING);
795 } 712 }
796 return; 713 return;
797 } 714 }
798 715
799 ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; 716 ofdmPhyErrCnt = phyCnt1 - ofdm_base;
800 ah->stats.ast_ani_ofdmerrs += 717 ah->stats.ast_ani_ofdmerrs +=
801 ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 718 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
802 aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 719 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
803 720
804 cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; 721 cckPhyErrCnt = phyCnt2 - cck_base;
805 ah->stats.ast_ani_cckerrs += 722 ah->stats.ast_ani_cckerrs +=
806 cckPhyErrCnt - aniState->cckPhyErrCount; 723 cckPhyErrCnt - aniState->cckPhyErrCount;
807 aniState->cckPhyErrCount = cckPhyErrCnt; 724 aniState->cckPhyErrCount = cckPhyErrCnt;
808 725
809 if (aniState->listenTime > 5 * ah->aniperiod) { 726 if (aniState->listenTime > 5 * ah->aniperiod) {
810 if (aniState->ofdmPhyErrCount <= aniState->listenTime * 727 if (aniState->ofdmPhyErrCount <= aniState->listenTime *
811 aniState->ofdmTrigLow / 1000 && 728 ah->config.ofdm_trig_low / 1000 &&
812 aniState->cckPhyErrCount <= aniState->listenTime * 729 aniState->cckPhyErrCount <= aniState->listenTime *
813 aniState->cckTrigLow / 1000) 730 ah->config.cck_trig_low / 1000)
814 ath9k_hw_ani_lower_immunity(ah); 731 ath9k_hw_ani_lower_immunity(ah);
815 ath9k_ani_restart_old(ah); 732 ath9k_ani_restart(ah);
816 } else if (aniState->listenTime > ah->aniperiod) { 733 } else if (aniState->listenTime > ah->aniperiod) {
817 if (aniState->ofdmPhyErrCount > aniState->listenTime * 734 if (aniState->ofdmPhyErrCount > aniState->listenTime *
818 aniState->ofdmTrigHigh / 1000) { 735 ah->config.ofdm_trig_high / 1000) {
819 ath9k_hw_ani_ofdm_err_trigger_old(ah); 736 ath9k_hw_ani_ofdm_err_trigger_old(ah);
820 ath9k_ani_restart_old(ah); 737 ath9k_ani_restart(ah);
821 } else if (aniState->cckPhyErrCount > 738 } else if (aniState->cckPhyErrCount >
822 aniState->listenTime * aniState->cckTrigHigh / 739 aniState->listenTime * ah->config.cck_trig_high /
823 1000) { 740 1000) {
824 ath9k_hw_ani_cck_err_trigger_old(ah); 741 ath9k_hw_ani_cck_err_trigger_old(ah);
825 ath9k_ani_restart_old(ah); 742 ath9k_ani_restart(ah);
826 } 743 }
827 } 744 }
828} 745}
@@ -833,14 +750,13 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
833 struct ar5416AniState *aniState; 750 struct ar5416AniState *aniState;
834 struct ath_common *common = ath9k_hw_common(ah); 751 struct ath_common *common = ath9k_hw_common(ah);
835 int32_t listenTime; 752 int32_t listenTime;
836 u32 phyCnt1, phyCnt2;
837 u32 ofdmPhyErrCnt, cckPhyErrCnt; 753 u32 ofdmPhyErrCnt, cckPhyErrCnt;
838 u32 ofdmPhyErrRate, cckPhyErrRate; 754 u32 ofdmPhyErrRate, cckPhyErrRate;
839 755
840 if (!DO_ANI(ah)) 756 if (!DO_ANI(ah))
841 return; 757 return;
842 758
843 aniState = ah->curani; 759 aniState = &ah->curchan->ani;
844 if (WARN_ON(!aniState)) 760 if (WARN_ON(!aniState))
845 return; 761 return;
846 762
@@ -851,7 +767,7 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
851 ath_print(common, ATH_DBG_ANI, 767 ath_print(common, ATH_DBG_ANI,
852 "listenTime=%d - on new ani monitor\n", 768 "listenTime=%d - on new ani monitor\n",
853 listenTime); 769 listenTime);
854 ath9k_ani_restart_new(ah); 770 ath9k_ani_restart(ah);
855 return; 771 return;
856 } 772 }
857 773
@@ -859,55 +775,20 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
859 775
860 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); 776 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
861 777
862 phyCnt1 = REG_READ(ah, AR_PHY_ERR_1); 778 ofdmPhyErrCnt = REG_READ(ah, AR_PHY_ERR_1);
863 phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); 779 cckPhyErrCnt = REG_READ(ah, AR_PHY_ERR_2);
864
865 if (phyCnt1 < aniState->ofdmPhyErrBase ||
866 phyCnt2 < aniState->cckPhyErrBase) {
867 if (phyCnt1 < aniState->ofdmPhyErrBase) {
868 ath_print(common, ATH_DBG_ANI,
869 "phyCnt1 0x%x, resetting "
870 "counter value to 0x%x\n",
871 phyCnt1,
872 aniState->ofdmPhyErrBase);
873 REG_WRITE(ah, AR_PHY_ERR_1,
874 aniState->ofdmPhyErrBase);
875 REG_WRITE(ah, AR_PHY_ERR_MASK_1,
876 AR_PHY_ERR_OFDM_TIMING);
877 }
878 if (phyCnt2 < aniState->cckPhyErrBase) {
879 ath_print(common, ATH_DBG_ANI,
880 "phyCnt2 0x%x, resetting "
881 "counter value to 0x%x\n",
882 phyCnt2,
883 aniState->cckPhyErrBase);
884 REG_WRITE(ah, AR_PHY_ERR_2,
885 aniState->cckPhyErrBase);
886 REG_WRITE(ah, AR_PHY_ERR_MASK_2,
887 AR_PHY_ERR_CCK_TIMING);
888 }
889 return;
890 }
891 780
892 ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase;
893 ah->stats.ast_ani_ofdmerrs += 781 ah->stats.ast_ani_ofdmerrs +=
894 ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 782 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
895 aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 783 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
896 784
897 cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase;
898 ah->stats.ast_ani_cckerrs += 785 ah->stats.ast_ani_cckerrs +=
899 cckPhyErrCnt - aniState->cckPhyErrCount; 786 cckPhyErrCnt - aniState->cckPhyErrCount;
900 aniState->cckPhyErrCount = cckPhyErrCnt; 787 aniState->cckPhyErrCount = cckPhyErrCnt;
901 788
902 ath_print(common, ATH_DBG_ANI, 789 ath_print(common, ATH_DBG_ANI,
903 "Errors: OFDM=0x%08x-0x%08x=%d " 790 "Errors: OFDM=%d, CCK=%d\n",
904 "CCK=0x%08x-0x%08x=%d\n", 791 ofdmPhyErrCnt, cckPhyErrCnt);
905 phyCnt1,
906 aniState->ofdmPhyErrBase,
907 ofdmPhyErrCnt,
908 phyCnt2,
909 aniState->cckPhyErrBase,
910 cckPhyErrCnt);
911 792
912 ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 / 793 ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 /
913 aniState->listenTime; 794 aniState->listenTime;
@@ -922,8 +803,8 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
922 cckPhyErrRate, aniState->ofdmsTurn); 803 cckPhyErrRate, aniState->ofdmsTurn);
923 804
924 if (aniState->listenTime > 5 * ah->aniperiod) { 805 if (aniState->listenTime > 5 * ah->aniperiod) {
925 if (ofdmPhyErrRate <= aniState->ofdmTrigLow && 806 if (ofdmPhyErrRate <= ah->config.ofdm_trig_low &&
926 cckPhyErrRate <= aniState->cckTrigLow) { 807 cckPhyErrRate <= ah->config.cck_trig_low) {
927 ath_print(common, ATH_DBG_ANI, 808 ath_print(common, ATH_DBG_ANI,
928 "1. listenTime=%d OFDM:%d errs=%d/s(<%d) " 809 "1. listenTime=%d OFDM:%d errs=%d/s(<%d) "
929 "CCK:%d errs=%d/s(<%d) -> " 810 "CCK:%d errs=%d/s(<%d) -> "
@@ -931,22 +812,22 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
931 aniState->listenTime, 812 aniState->listenTime,
932 aniState->ofdmNoiseImmunityLevel, 813 aniState->ofdmNoiseImmunityLevel,
933 ofdmPhyErrRate, 814 ofdmPhyErrRate,
934 aniState->ofdmTrigLow, 815 ah->config.ofdm_trig_low,
935 aniState->cckNoiseImmunityLevel, 816 aniState->cckNoiseImmunityLevel,
936 cckPhyErrRate, 817 cckPhyErrRate,
937 aniState->cckTrigLow); 818 ah->config.cck_trig_low);
938 ath9k_hw_ani_lower_immunity(ah); 819 ath9k_hw_ani_lower_immunity(ah);
939 aniState->ofdmsTurn = !aniState->ofdmsTurn; 820 aniState->ofdmsTurn = !aniState->ofdmsTurn;
940 } 821 }
941 ath_print(common, ATH_DBG_ANI, 822 ath_print(common, ATH_DBG_ANI,
942 "1 listenTime=%d ofdm=%d/s cck=%d/s - " 823 "1 listenTime=%d ofdm=%d/s cck=%d/s - "
943 "calling ath9k_ani_restart_new()\n", 824 "calling ath9k_ani_restart()\n",
944 aniState->listenTime, ofdmPhyErrRate, cckPhyErrRate); 825 aniState->listenTime, ofdmPhyErrRate, cckPhyErrRate);
945 ath9k_ani_restart_new(ah); 826 ath9k_ani_restart(ah);
946 } else if (aniState->listenTime > ah->aniperiod) { 827 } else if (aniState->listenTime > ah->aniperiod) {
947 /* check to see if need to raise immunity */ 828 /* check to see if need to raise immunity */
948 if (ofdmPhyErrRate > aniState->ofdmTrigHigh && 829 if (ofdmPhyErrRate > ah->config.ofdm_trig_high &&
949 (cckPhyErrRate <= aniState->cckTrigHigh || 830 (cckPhyErrRate <= ah->config.cck_trig_high ||
950 aniState->ofdmsTurn)) { 831 aniState->ofdmsTurn)) {
951 ath_print(common, ATH_DBG_ANI, 832 ath_print(common, ATH_DBG_ANI,
952 "2 listenTime=%d OFDM:%d errs=%d/s(>%d) -> " 833 "2 listenTime=%d OFDM:%d errs=%d/s(>%d) -> "
@@ -954,20 +835,20 @@ static void ath9k_hw_ani_monitor_new(struct ath_hw *ah,
954 aniState->listenTime, 835 aniState->listenTime,
955 aniState->ofdmNoiseImmunityLevel, 836 aniState->ofdmNoiseImmunityLevel,
956 ofdmPhyErrRate, 837 ofdmPhyErrRate,
957 aniState->ofdmTrigHigh); 838 ah->config.ofdm_trig_high);
958 ath9k_hw_ani_ofdm_err_trigger_new(ah); 839 ath9k_hw_ani_ofdm_err_trigger_new(ah);
959 ath9k_ani_restart_new(ah); 840 ath9k_ani_restart(ah);
960 aniState->ofdmsTurn = false; 841 aniState->ofdmsTurn = false;
961 } else if (cckPhyErrRate > aniState->cckTrigHigh) { 842 } else if (cckPhyErrRate > ah->config.cck_trig_high) {
962 ath_print(common, ATH_DBG_ANI, 843 ath_print(common, ATH_DBG_ANI,
963 "3 listenTime=%d CCK:%d errs=%d/s(>%d) -> " 844 "3 listenTime=%d CCK:%d errs=%d/s(>%d) -> "
964 "ath9k_hw_ani_cck_err_trigger_new()\n", 845 "ath9k_hw_ani_cck_err_trigger_new()\n",
965 aniState->listenTime, 846 aniState->listenTime,
966 aniState->cckNoiseImmunityLevel, 847 aniState->cckNoiseImmunityLevel,
967 cckPhyErrRate, 848 cckPhyErrRate,
968 aniState->cckTrigHigh); 849 ah->config.cck_trig_high);
969 ath9k_hw_ani_cck_err_trigger_new(ah); 850 ath9k_hw_ani_cck_err_trigger_new(ah);
970 ath9k_ani_restart_new(ah); 851 ath9k_ani_restart(ah);
971 aniState->ofdmsTurn = true; 852 aniState->ofdmsTurn = true;
972 } 853 }
973 } 854 }
@@ -1064,6 +945,8 @@ skip:
1064 */ 945 */
1065static void ath9k_hw_proc_mib_event_old(struct ath_hw *ah) 946static void ath9k_hw_proc_mib_event_old(struct ath_hw *ah)
1066{ 947{
948 u32 ofdm_base = AR_PHY_COUNTMAX - ah->config.ofdm_trig_high;
949 u32 cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
1067 u32 phyCnt1, phyCnt2; 950 u32 phyCnt1, phyCnt2;
1068 951
1069 /* Reset these counters regardless */ 952 /* Reset these counters regardless */
@@ -1090,16 +973,16 @@ static void ath9k_hw_proc_mib_event_old(struct ath_hw *ah)
1090 phyCnt2 = REG_READ(ah, AR_PHY_ERR_2); 973 phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
1091 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || 974 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
1092 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { 975 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
1093 struct ar5416AniState *aniState = ah->curani; 976 struct ar5416AniState *aniState = &ah->curchan->ani;
1094 u32 ofdmPhyErrCnt, cckPhyErrCnt; 977 u32 ofdmPhyErrCnt, cckPhyErrCnt;
1095 978
1096 /* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */ 979 /* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */
1097 ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase; 980 ofdmPhyErrCnt = phyCnt1 - ofdm_base;
1098 ah->stats.ast_ani_ofdmerrs += 981 ah->stats.ast_ani_ofdmerrs +=
1099 ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 982 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
1100 aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 983 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
1101 984
1102 cckPhyErrCnt = phyCnt2 - aniState->cckPhyErrBase; 985 cckPhyErrCnt = phyCnt2 - cck_base;
1103 ah->stats.ast_ani_cckerrs += 986 ah->stats.ast_ani_cckerrs +=
1104 cckPhyErrCnt - aniState->cckPhyErrCount; 987 cckPhyErrCnt - aniState->cckPhyErrCount;
1105 aniState->cckPhyErrCount = cckPhyErrCnt; 988 aniState->cckPhyErrCount = cckPhyErrCnt;
@@ -1110,12 +993,12 @@ static void ath9k_hw_proc_mib_event_old(struct ath_hw *ah)
1110 * clobbers the error counter so the trigger threshold 993 * clobbers the error counter so the trigger threshold
1111 * check will never be true. 994 * check will never be true.
1112 */ 995 */
1113 if (aniState->ofdmPhyErrCount > aniState->ofdmTrigHigh) 996 if (aniState->ofdmPhyErrCount > ah->config.ofdm_trig_high)
1114 ath9k_hw_ani_ofdm_err_trigger_new(ah); 997 ath9k_hw_ani_ofdm_err_trigger_new(ah);
1115 if (aniState->cckPhyErrCount > aniState->cckTrigHigh) 998 if (aniState->cckPhyErrCount > ah->config.cck_trig_high)
1116 ath9k_hw_ani_cck_err_trigger_old(ah); 999 ath9k_hw_ani_cck_err_trigger_old(ah);
1117 /* NB: always restart to insure the h/w counters are reset */ 1000 /* NB: always restart to insure the h/w counters are reset */
1118 ath9k_ani_restart_old(ah); 1001 ath9k_ani_restart(ah);
1119 } 1002 }
1120} 1003}
1121 1004
@@ -1154,7 +1037,7 @@ static void ath9k_hw_proc_mib_event_new(struct ath_hw *ah)
1154 /* NB: always restart to insure the h/w counters are reset */ 1037 /* NB: always restart to insure the h/w counters are reset */
1155 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || 1038 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
1156 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) 1039 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK))
1157 ath9k_ani_restart_new(ah); 1040 ath9k_ani_restart(ah);
1158} 1041}
1159 1042
1160void ath9k_hw_ani_setup(struct ath_hw *ah) 1043void ath9k_hw_ani_setup(struct ath_hw *ah)
@@ -1181,54 +1064,51 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
1181 1064
1182 ath_print(common, ATH_DBG_ANI, "Initialize ANI\n"); 1065 ath_print(common, ATH_DBG_ANI, "Initialize ANI\n");
1183 1066
1184 memset(ah->ani, 0, sizeof(ah->ani)); 1067 if (use_new_ani(ah)) {
1185 for (i = 0; i < ARRAY_SIZE(ah->ani); i++) { 1068 ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_NEW;
1186 if (use_new_ani(ah)) { 1069 ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW_NEW;
1187 ah->ani[i].ofdmTrigHigh = ATH9K_ANI_OFDM_TRIG_HIGH_NEW;
1188 ah->ani[i].ofdmTrigLow = ATH9K_ANI_OFDM_TRIG_LOW_NEW;
1189 1070
1190 ah->ani[i].cckTrigHigh = ATH9K_ANI_CCK_TRIG_HIGH_NEW; 1071 ah->config.cck_trig_high = ATH9K_ANI_CCK_TRIG_HIGH_NEW;
1191 ah->ani[i].cckTrigLow = ATH9K_ANI_CCK_TRIG_LOW_NEW; 1072 ah->config.cck_trig_low = ATH9K_ANI_CCK_TRIG_LOW_NEW;
1073 } else {
1074 ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_OLD;
1075 ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW_OLD;
1192 1076
1193 ah->ani[i].spurImmunityLevel = 1077 ah->config.cck_trig_high = ATH9K_ANI_CCK_TRIG_HIGH_OLD;
1194 ATH9K_ANI_SPUR_IMMUNE_LVL_NEW; 1078 ah->config.cck_trig_low = ATH9K_ANI_CCK_TRIG_LOW_OLD;
1079 }
1195 1080
1196 ah->ani[i].firstepLevel = ATH9K_ANI_FIRSTEP_LVL_NEW; 1081 for (i = 0; i < ARRAY_SIZE(ah->channels); i++) {
1082 struct ath9k_channel *chan = &ah->channels[i];
1083 struct ar5416AniState *ani = &chan->ani;
1084
1085 if (use_new_ani(ah)) {
1086 ani->spurImmunityLevel =
1087 ATH9K_ANI_SPUR_IMMUNE_LVL_NEW;
1197 1088
1198 ah->ani[i].ofdmPhyErrBase = 0; 1089 ani->firstepLevel = ATH9K_ANI_FIRSTEP_LVL_NEW;
1199 ah->ani[i].cckPhyErrBase = 0;
1200 1090
1201 if (AR_SREV_9300_20_OR_LATER(ah)) 1091 if (AR_SREV_9300_20_OR_LATER(ah))
1202 ah->ani[i].mrcCCKOff = 1092 ani->mrcCCKOff =
1203 !ATH9K_ANI_ENABLE_MRC_CCK; 1093 !ATH9K_ANI_ENABLE_MRC_CCK;
1204 else 1094 else
1205 ah->ani[i].mrcCCKOff = true; 1095 ani->mrcCCKOff = true;
1206 1096
1207 ah->ani[i].ofdmsTurn = true; 1097 ani->ofdmsTurn = true;
1208 } else { 1098 } else {
1209 ah->ani[i].ofdmTrigHigh = ATH9K_ANI_OFDM_TRIG_HIGH_OLD; 1099 ani->spurImmunityLevel =
1210 ah->ani[i].ofdmTrigLow = ATH9K_ANI_OFDM_TRIG_LOW_OLD;
1211
1212 ah->ani[i].cckTrigHigh = ATH9K_ANI_CCK_TRIG_HIGH_OLD;
1213 ah->ani[i].cckTrigLow = ATH9K_ANI_CCK_TRIG_LOW_OLD;
1214
1215 ah->ani[i].spurImmunityLevel =
1216 ATH9K_ANI_SPUR_IMMUNE_LVL_OLD; 1100 ATH9K_ANI_SPUR_IMMUNE_LVL_OLD;
1217 ah->ani[i].firstepLevel = ATH9K_ANI_FIRSTEP_LVL_OLD; 1101 ani->firstepLevel = ATH9K_ANI_FIRSTEP_LVL_OLD;
1218 1102
1219 ah->ani[i].ofdmPhyErrBase = 1103 ani->cckWeakSigThreshold =
1220 AR_PHY_COUNTMAX - ATH9K_ANI_OFDM_TRIG_HIGH_OLD;
1221 ah->ani[i].cckPhyErrBase =
1222 AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH_OLD;
1223 ah->ani[i].cckWeakSigThreshold =
1224 ATH9K_ANI_CCK_WEAK_SIG_THR; 1104 ATH9K_ANI_CCK_WEAK_SIG_THR;
1225 } 1105 }
1226 1106
1227 ah->ani[i].rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH; 1107 ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
1228 ah->ani[i].rssiThrLow = ATH9K_ANI_RSSI_THR_LOW; 1108 ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
1229 ah->ani[i].ofdmWeakSigDetectOff = 1109 ani->ofdmWeakSigDetectOff =
1230 !ATH9K_ANI_USE_OFDM_WEAK_SIG; 1110 !ATH9K_ANI_USE_OFDM_WEAK_SIG;
1231 ah->ani[i].cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL; 1111 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
1232 } 1112 }
1233 1113
1234 /* 1114 /*
@@ -1249,23 +1129,11 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
1249 ah->config.ani_poll_interval = ATH9K_ANI_POLLINTERVAL_OLD; 1129 ah->config.ani_poll_interval = ATH9K_ANI_POLLINTERVAL_OLD;
1250 } 1130 }
1251 1131
1252 ath_print(common, ATH_DBG_ANI,
1253 "Setting OfdmErrBase = 0x%08x\n",
1254 ah->ani[0].ofdmPhyErrBase);
1255 ath_print(common, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
1256 ah->ani[0].cckPhyErrBase);
1257
1258 ENABLE_REGWRITE_BUFFER(ah);
1259
1260 REG_WRITE(ah, AR_PHY_ERR_1, ah->ani[0].ofdmPhyErrBase);
1261 REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase);
1262
1263 REGWRITE_BUFFER_FLUSH(ah);
1264
1265 ath9k_enable_mib_counters(ah);
1266
1267 if (ah->config.enable_ani) 1132 if (ah->config.enable_ani)
1268 ah->proc_phyerr |= HAL_PROCESS_ANI; 1133 ah->proc_phyerr |= HAL_PROCESS_ANI;
1134
1135 ath9k_ani_restart(ah);
1136 ath9k_enable_mib_counters(ah);
1269} 1137}
1270 1138
1271void ath9k_hw_attach_ani_ops_old(struct ath_hw *ah) 1139void ath9k_hw_attach_ani_ops_old(struct ath_hw *ah)
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index 15f9d67a18c8..98cfd8154c71 100644
--- a/drivers/net/wireless/ath/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
@@ -19,7 +19,7 @@
19 19
20#define HAL_PROCESS_ANI 0x00000001 20#define HAL_PROCESS_ANI 0x00000001
21 21
22#define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI)) 22#define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan)
23 23
24#define BEACON_RSSI(ahp) (ahp->stats.avgbrssi) 24#define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
25 25
@@ -130,17 +130,11 @@ struct ar5416AniState {
130 u8 ofdmWeakSigDetectOff; 130 u8 ofdmWeakSigDetectOff;
131 u8 cckWeakSigThreshold; 131 u8 cckWeakSigThreshold;
132 u32 listenTime; 132 u32 listenTime;
133 u32 ofdmTrigHigh;
134 u32 ofdmTrigLow;
135 int32_t cckTrigHigh;
136 int32_t cckTrigLow;
137 int32_t rssiThrLow; 133 int32_t rssiThrLow;
138 int32_t rssiThrHigh; 134 int32_t rssiThrHigh;
139 u32 noiseFloor; 135 u32 noiseFloor;
140 u32 ofdmPhyErrCount; 136 u32 ofdmPhyErrCount;
141 u32 cckPhyErrCount; 137 u32 cckPhyErrCount;
142 u32 ofdmPhyErrBase;
143 u32 cckPhyErrBase;
144 int16_t pktRssi[2]; 138 int16_t pktRssi[2];
145 int16_t ofdmErrRssi[2]; 139 int16_t ofdmErrRssi[2];
146 int16_t cckErrRssi[2]; 140 int16_t cckErrRssi[2];
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 7b26292daf35..ea9f4497f58c 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -1048,7 +1048,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
1048 enum ath9k_ani_cmd cmd, 1048 enum ath9k_ani_cmd cmd,
1049 int param) 1049 int param)
1050{ 1050{
1051 struct ar5416AniState *aniState = ah->curani; 1051 struct ar5416AniState *aniState = &ah->curchan->ani;
1052 struct ath_common *common = ath9k_hw_common(ah); 1052 struct ath_common *common = ath9k_hw_common(ah);
1053 1053
1054 switch (cmd & ah->ani_function) { 1054 switch (cmd & ah->ani_function) {
@@ -1231,9 +1231,9 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
1231 enum ath9k_ani_cmd cmd, 1231 enum ath9k_ani_cmd cmd,
1232 int param) 1232 int param)
1233{ 1233{
1234 struct ar5416AniState *aniState = ah->curani;
1235 struct ath_common *common = ath9k_hw_common(ah); 1234 struct ath_common *common = ath9k_hw_common(ah);
1236 struct ath9k_channel *chan = ah->curchan; 1235 struct ath9k_channel *chan = ah->curchan;
1236 struct ar5416AniState *aniState = &chan->ani;
1237 s32 value, value2; 1237 s32 value, value2;
1238 1238
1239 switch (cmd & ah->ani_function) { 1239 switch (cmd & ah->ani_function) {
@@ -1518,16 +1518,12 @@ static void ar5008_hw_do_getnf(struct ath_hw *ah,
1518 */ 1518 */
1519static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah) 1519static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah)
1520{ 1520{
1521 struct ar5416AniState *aniState;
1522 struct ath_common *common = ath9k_hw_common(ah); 1521 struct ath_common *common = ath9k_hw_common(ah);
1523 struct ath9k_channel *chan = ah->curchan; 1522 struct ath9k_channel *chan = ah->curchan;
1523 struct ar5416AniState *aniState = &chan->ani;
1524 struct ath9k_ani_default *iniDef; 1524 struct ath9k_ani_default *iniDef;
1525 int index;
1526 u32 val; 1525 u32 val;
1527 1526
1528 index = ath9k_hw_get_ani_channel_idx(ah, chan);
1529 aniState = &ah->ani[index];
1530 ah->curani = aniState;
1531 iniDef = &aniState->iniDef; 1527 iniDef = &aniState->iniDef;
1532 1528
1533 ath_print(common, ATH_DBG_ANI, 1529 ath_print(common, ATH_DBG_ANI,
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index e15574caf61a..efb05599b84c 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -747,9 +747,9 @@ static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
747static bool ar9003_hw_ani_control(struct ath_hw *ah, 747static bool ar9003_hw_ani_control(struct ath_hw *ah,
748 enum ath9k_ani_cmd cmd, int param) 748 enum ath9k_ani_cmd cmd, int param)
749{ 749{
750 struct ar5416AniState *aniState = ah->curani;
751 struct ath_common *common = ath9k_hw_common(ah); 750 struct ath_common *common = ath9k_hw_common(ah);
752 struct ath9k_channel *chan = ah->curchan; 751 struct ath9k_channel *chan = ah->curchan;
752 struct ar5416AniState *aniState = &chan->ani;
753 s32 value, value2; 753 s32 value, value2;
754 754
755 switch (cmd & ah->ani_function) { 755 switch (cmd & ah->ani_function) {
@@ -1065,12 +1065,9 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah)
1065 struct ath_common *common = ath9k_hw_common(ah); 1065 struct ath_common *common = ath9k_hw_common(ah);
1066 struct ath9k_channel *chan = ah->curchan; 1066 struct ath9k_channel *chan = ah->curchan;
1067 struct ath9k_ani_default *iniDef; 1067 struct ath9k_ani_default *iniDef;
1068 int index;
1069 u32 val; 1068 u32 val;
1070 1069
1071 index = ath9k_hw_get_ani_channel_idx(ah, chan); 1070 aniState = &ah->curchan->ani;
1072 aniState = &ah->ani[index];
1073 ah->curani = aniState;
1074 iniDef = &aniState->iniDef; 1071 iniDef = &aniState->iniDef;
1075 1072
1076 ath_print(common, ATH_DBG_ANI, 1073 ath_print(common, ATH_DBG_ANI,
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 98c97653c21b..05e9935ef160 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -370,10 +370,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
370 ah->config.pcie_clock_req = 0; 370 ah->config.pcie_clock_req = 0;
371 ah->config.pcie_waen = 0; 371 ah->config.pcie_waen = 0;
372 ah->config.analog_shiftreg = 1; 372 ah->config.analog_shiftreg = 1;
373 ah->config.ofdm_trig_low = 200;
374 ah->config.ofdm_trig_high = 500;
375 ah->config.cck_trig_high = 200;
376 ah->config.cck_trig_low = 100;
377 ah->config.enable_ani = true; 373 ah->config.enable_ani = true;
378 374
379 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 375 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index d558c51236f9..506346384c4f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -346,6 +346,7 @@ struct ath9k_hw_cal_data {
346 346
347struct ath9k_channel { 347struct ath9k_channel {
348 struct ieee80211_channel *chan; 348 struct ieee80211_channel *chan;
349 struct ar5416AniState ani;
349 u16 channel; 350 u16 channel;
350 u32 channelFlags; 351 u32 channelFlags;
351 u32 chanmode; 352 u32 chanmode;
@@ -752,8 +753,6 @@ struct ath_hw {
752 /* ANI */ 753 /* ANI */
753 u32 proc_phyerr; 754 u32 proc_phyerr;
754 u32 aniperiod; 755 u32 aniperiod;
755 struct ar5416AniState *curani;
756 struct ar5416AniState ani[255];
757 int totalSizeDesired[5]; 756 int totalSizeDesired[5];
758 int coarse_high[5]; 757 int coarse_high[5];
759 int coarse_low[5]; 758 int coarse_low[5];