diff options
| author | jack wang <jack_wang@usish.com> | 2009-12-07 04:46:22 -0500 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@suse.de> | 2009-12-10 11:03:52 -0500 |
| commit | 0330dba36127768a2e2df2eabb902b5530102871 (patch) | |
| tree | 00ee880fd2f8d97e7c60cdeaaceed4cb6e673537 | |
| parent | afc5ca9ddc6c223dbea8a2f8816a88b21a0883b5 (diff) | |
[SCSI] pm8001: set SSC down-spreading only to get less errors on some 6G device.
Signed-off-by: Jack Wang <jack_wang@usish.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
| -rw-r--r-- | drivers/scsi/pm8001/pm8001_hwi.c | 65 |
1 files changed, 21 insertions, 44 deletions
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c index b4426b5b50bc..6e1bdd8e680e 100644 --- a/drivers/scsi/pm8001/pm8001_hwi.c +++ b/drivers/scsi/pm8001/pm8001_hwi.c | |||
| @@ -373,10 +373,7 @@ static int bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue) | |||
| 373 | static void __devinit | 373 | static void __devinit |
| 374 | mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) | 374 | mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) |
| 375 | { | 375 | { |
| 376 | u32 offset; | 376 | u32 value, offset, i; |
| 377 | u32 value; | ||
| 378 | u32 i, j; | ||
| 379 | u32 bit_cnt; | ||
| 380 | 377 | ||
| 381 | #define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000 | 378 | #define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000 |
| 382 | #define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000 | 379 | #define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000 |
| @@ -392,55 +389,35 @@ mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) | |||
| 392 | */ | 389 | */ |
| 393 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR)) | 390 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR)) |
| 394 | return; | 391 | return; |
| 395 | /* set SSC bit of PHY 0 - 3 */ | 392 | |
| 396 | for (i = 0; i < 4; i++) { | 393 | for (i = 0; i < 4; i++) { |
| 397 | offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i; | 394 | offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i; |
| 398 | value = pm8001_cr32(pm8001_ha, 2, offset); | 395 | pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); |
| 399 | if (SSCbit) { | ||
| 400 | value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT; | ||
| 401 | value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT); | ||
| 402 | } else { | ||
| 403 | value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT; | ||
| 404 | value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT); | ||
| 405 | } | ||
| 406 | bit_cnt = 0; | ||
| 407 | for (j = 0; j < 31; j++) | ||
| 408 | if ((value >> j) & 0x00000001) | ||
| 409 | bit_cnt++; | ||
| 410 | if (bit_cnt % 2) | ||
| 411 | value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY); | ||
| 412 | else | ||
| 413 | value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY; | ||
| 414 | |||
| 415 | pm8001_cw32(pm8001_ha, 2, offset, value); | ||
| 416 | } | 396 | } |
| 417 | |||
| 418 | /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ | 397 | /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ |
| 419 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR)) | 398 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR)) |
| 420 | return; | 399 | return; |
| 421 | |||
| 422 | /* set SSC bit of PHY 4 - 7 */ | ||
| 423 | for (i = 4; i < 8; i++) { | 400 | for (i = 4; i < 8; i++) { |
| 424 | offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); | 401 | offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); |
| 425 | value = pm8001_cr32(pm8001_ha, 2, offset); | 402 | pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); |
| 426 | if (SSCbit) { | ||
| 427 | value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT; | ||
| 428 | value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT); | ||
| 429 | } else { | ||
| 430 | value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT; | ||
| 431 | value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT); | ||
| 432 | } | ||
| 433 | bit_cnt = 0; | ||
| 434 | for (j = 0; j < 31; j++) | ||
| 435 | if ((value >> j) & 0x00000001) | ||
| 436 | bit_cnt++; | ||
| 437 | if (bit_cnt % 2) | ||
| 438 | value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY); | ||
| 439 | else | ||
| 440 | value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY; | ||
| 441 | |||
| 442 | pm8001_cw32(pm8001_ha, 2, offset, value); | ||
| 443 | } | 403 | } |
| 404 | /************************************************************* | ||
| 405 | Change the SSC upspreading value to 0x0 so that upspreading is disabled. | ||
| 406 | Device MABC SMOD0 Controls | ||
| 407 | Address: (via MEMBASE-III): | ||
| 408 | Using shifted destination address 0x0_0000: with Offset 0xD8 | ||
| 409 | |||
| 410 | 31:28 R/W Reserved Do not change | ||
| 411 | 27:24 R/W SAS_SMOD_SPRDUP 0000 | ||
| 412 | 23:20 R/W SAS_SMOD_SPRDDN 0000 | ||
| 413 | 19:0 R/W Reserved Do not change | ||
| 414 | Upon power-up this register will read as 0x8990c016, | ||
| 415 | and I would like you to change the SAS_SMOD_SPRDUP bits to 0b0000 | ||
| 416 | so that the written value will be 0x8090c016. | ||
| 417 | This will ensure only down-spreading SSC is enabled on the SPC. | ||
| 418 | *************************************************************/ | ||
| 419 | value = pm8001_cr32(pm8001_ha, 2, 0xd8); | ||
| 420 | pm8001_cw32(pm8001_ha, 2, 0xd8, 0x8000C016); | ||
| 444 | 421 | ||
| 445 | /*set the shifted destination address to 0x0 to avoid error operation */ | 422 | /*set the shifted destination address to 0x0 to avoid error operation */ |
| 446 | bar4_shift(pm8001_ha, 0x0); | 423 | bar4_shift(pm8001_ha, 0x0); |
