diff options
author | Bruno Randolf <randolf.bruno@googlemail.com> | 2010-07-11 11:40:28 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-07-26 14:08:17 -0400 |
commit | 98a0f86a54bb195c28ae1ccb5a5f5cda12cf7121 (patch) | |
tree | 9b4563fbf5ea0191dac4af7c8523fa35dba9f524 | |
parent | 1ed845375b1f2938acc4496a186e180892b00c71 (diff) |
MIPS: MTX-1: Fix PCI on the MeshCube and related boards
This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1:
Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke
PCI bus operation. The problem is caused by alchemy_gpio2_enable() which
resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected
to GPIO2 and they obviously do not to like the reset. Since GPIO2 is
correctly initialized by the boot monitor (YAMON) it is not necessary to
call this function, so just remove it.
Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid
problems in case gpiolib gets initialized after PCI. And since alchemy
gpio_set_value() calls au_sync() we don't have to au_sync() again later.
Signed-off-by: Bruno Randolf <br1@einfach.org>
To: linux-mips@linux-mips.org
To: manuel.lauss@googlemail.com
Patchwork: https://patchwork.linux-mips.org/patch/1448/
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/alchemy/mtx-1/board_setup.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index a9f0336e1f1f..52d883d37dd7 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c | |||
@@ -67,8 +67,6 @@ static void mtx1_power_off(void) | |||
67 | 67 | ||
68 | void __init board_setup(void) | 68 | void __init board_setup(void) |
69 | { | 69 | { |
70 | alchemy_gpio2_enable(); | ||
71 | |||
72 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 70 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
73 | /* Enable USB power switch */ | 71 | /* Enable USB power switch */ |
74 | alchemy_gpio_direction_output(204, 0); | 72 | alchemy_gpio_direction_output(204, 0); |
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert) | |||
117 | 115 | ||
118 | if (assert && devsel != 0) | 116 | if (assert && devsel != 0) |
119 | /* Suppress signal to Cardbus */ | 117 | /* Suppress signal to Cardbus */ |
120 | gpio_set_value(1, 0); /* set EXT_IO3 OFF */ | 118 | alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ |
121 | else | 119 | else |
122 | gpio_set_value(1, 1); /* set EXT_IO3 ON */ | 120 | alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */ |
123 | 121 | ||
124 | au_sync_udelay(1); | 122 | udelay(1); |
125 | return 1; | 123 | return 1; |
126 | } | 124 | } |
127 | 125 | ||