Automatic merge of rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git branch HEAD

184 files changed, 16084 insertions, 5078 deletions

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index e382f32d435e..dfd904f6883b 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -1163,7 +1163,7 @@ config PCI_DIRECT
 
 config PCI_MMCONFIG
         bool
-        depends on PCI && (PCI_GOMMCONFIG || (PCI_GOANY && ACPI))
+        depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
         select ACPI_BOOT
         default y
 
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index aeb5b4ef8c8b..a710dc4eb20e 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -118,7 +118,7 @@ struct _cpuid4_info {
 };
 
 #define MAX_CACHE_LEAVES                4
-static unsigned short __devinitdata     num_cache_leaves;
+static unsigned short                   num_cache_leaves;
 
 static int __devinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
 {
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 35bfe138cb1a..bc1bb6919e6a 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -1074,8 +1074,10 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
                         cpu_set(cpu, cpu_sibling_map[cpu]);
                 }
 
-                if (siblings != smp_num_siblings)
+                if (siblings != smp_num_siblings) {
                         printk(KERN_WARNING "WARNING: %d siblings found for CPU%d, should be %d\n", siblings, cpu, smp_num_siblings);
+                        smp_num_siblings = siblings;
+                }
 
                 if (c->x86_num_cores > 1) {
                         for (i = 0; i < NR_CPUS; i++) {
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index d6598da4b67b..da21b1d07c15 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -1029,7 +1029,6 @@ void pcibios_penalize_isa_irq(int irq)
 static int pirq_enable_irq(struct pci_dev *dev)
 {
         u8 pin;
-        extern int via_interrupt_line_quirk;
         struct pci_dev *temp_dev;
 
         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
@@ -1084,10 +1083,6 @@ static int pirq_enable_irq(struct pci_dev *dev)
                 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
                        'A' + pin, pci_name(dev), msg);
         }
-        /* VIA bridges use interrupt line for apic/pci steering across
-           the V-Link */
-        else if (via_interrupt_line_quirk)
-                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq & 15);
         return 0;
 }
 
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 600f23d7fd33..6e6377a69d5b 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1143,12 +1143,12 @@ config PCI_QSPAN
 
 config PCI_8260
         bool
-        depends on PCI && 8260 && !8272
+        depends on PCI && 8260
         default y
 
 config 8260_PCI9
         bool "  Enable workaround for MPC826x erratum PCI 9"
-        depends on PCI_8260
+        depends on PCI_8260 && !ADS8272
         default y
 
 choice
diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile
index f850fb0fb511..c9ac5f5fa9e4 100644
--- a/arch/ppc/boot/images/Makefile
+++ b/arch/ppc/boot/images/Makefile
@@ -22,7 +22,8 @@ targets += uImage
 $(obj)/uImage: $(obj)/vmlinux.gz
         $(Q)rm -f $@
         $(call if_changed,uimage)
-        @echo '  Image: $@' $(if $(wildcard $@),'is ready','not made')
+        @echo -n '  Image: $@ '
+        @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
 
 # Files generated that shall be removed upon make clean
 clean-files     := sImage vmapus vmlinux* miboot* zImage* uImage
diff --git a/arch/ppc/configs/mpc8555_cds_defconfig b/arch/ppc/configs/mpc8555_cds_defconfig
index 728bd9e1a8fa..15abebf46b96 100644
--- a/arch/ppc/configs/mpc8555_cds_defconfig
+++ b/arch/ppc/configs/mpc8555_cds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc1
-# Thu Jan 20 01:25:35 2005
+# Linux kernel version: 2.6.12-rc4
+# Tue May 17 11:56:01 2005
 #
 CONFIG_MMU=y
 CONFIG_GENERIC_HARDIRQS=y
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
 CONFIG_PPC=y
 CONFIG_PPC32=y
 CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 
 #
 # Code maturity level options
@@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 
 #
 # General setup
@@ -29,12 +31,14 @@ CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
 CONFIG_EMBEDDED=y
 # CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 # CONFIG_EPOLL is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -44,6 +48,7 @@ CONFIG_CC_ALIGN_LABELS=0
 CONFIG_CC_ALIGN_LOOPS=0
 CONFIG_CC_ALIGN_JUMPS=0
 # CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
 
 #
 # Loadable module support
@@ -62,10 +67,12 @@ CONFIG_CC_ALIGN_JUMPS=0
 CONFIG_E500=y
 CONFIG_BOOKE=y
 CONFIG_FSL_BOOKE=y
+# CONFIG_PHYS_64BIT is not set
 CONFIG_SPE=y
 CONFIG_MATH_EMULATION=y
 # CONFIG_CPU_FREQ is not set
 CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
 CONFIG_85xx=y
 CONFIG_PPC_INDIRECT_PCI_BE=y
 
@@ -76,6 +83,7 @@ CONFIG_PPC_INDIRECT_PCI_BE=y
 CONFIG_MPC8555_CDS=y
 # CONFIG_MPC8560_ADS is not set
 # CONFIG_SBC8560 is not set
+# CONFIG_STX_GP3 is not set
 CONFIG_MPC8555=y
 CONFIG_85xx_PCI2=y
 
@@ -90,6 +98,7 @@ CONFIG_CPM2=y
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_ISA_DMA_API=y
 
 #
 # Bus options
@@ -105,10 +114,6 @@ CONFIG_PCI_NAMES=y
 # CONFIG_PCCARD is not set
 
 #
-# PC-card bridges
-#
-
-#
 # Advanced setup
 #
 # CONFIG_ADVANCED_OPTIONS is not set
@@ -180,7 +185,59 @@ CONFIG_IOSCHED_CFQ=y
 #
 # ATA/ATAPI/MFM/RLL support
 #
-# CONFIG_IDE is not set
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+CONFIG_IDEPCI_SHARE_IRQ=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+CONFIG_BLK_DEV_VIA82CXXX=y
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+CONFIG_IDEDMA_AUTO=y
+# CONFIG_BLK_DEV_HD is not set
 
 #
 # SCSI device support
@@ -220,7 +277,6 @@ CONFIG_NET=y
 #
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -370,14 +426,6 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_EVBUG is not set
 
 #
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
 # Input Device Drivers
 #
 # CONFIG_INPUT_KEYBOARD is not set
@@ -387,6 +435,13 @@ CONFIG_SOUND_GAMEPORT=y
 # CONFIG_INPUT_MISC is not set
 
 #
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+
+#
 # Character devices
 #
 # CONFIG_VT is not set
@@ -406,6 +461,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_CPM is not set
+# CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
@@ -434,6 +490,11 @@ CONFIG_GEN_RTC=y
 # CONFIG_RAW_DRIVER is not set
 
 #
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
 # I2C support
 #
 CONFIG_I2C=y
@@ -456,11 +517,11 @@ CONFIG_I2C_CHARDEV=y
 # CONFIG_I2C_AMD8111 is not set
 # CONFIG_I2C_I801 is not set
 # CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
 # CONFIG_I2C_ISA is not set
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_NFORCE2 is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PIIX4 is not set
 # CONFIG_I2C_PROSAVAGE is not set
 # CONFIG_I2C_SAVAGE4 is not set
 # CONFIG_SCx200_ACB is not set
@@ -483,7 +544,9 @@ CONFIG_I2C_MPC=y
 # CONFIG_SENSORS_ASB100 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
 # CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
 # CONFIG_SENSORS_LM75 is not set
@@ -494,9 +557,11 @@ CONFIG_I2C_MPC=y
 # CONFIG_SENSORS_LM85 is not set
 # CONFIG_SENSORS_LM87 is not set
 # CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SIS5595 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_W83781D is not set
@@ -506,10 +571,12 @@ CONFIG_I2C_MPC=y
 #
 # Other I2C Chip support
 #
+# CONFIG_SENSORS_DS1337 is not set
 # CONFIG_SENSORS_EEPROM is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_M41T00 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -538,7 +605,6 @@ CONFIG_I2C_MPC=y
 # Graphics support
 #
 # CONFIG_FB is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
 # Sound
@@ -548,13 +614,9 @@ CONFIG_I2C_MPC=y
 #
 # USB support
 #
-# CONFIG_USB is not set
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
+# CONFIG_USB is not set
 
 #
 # USB Gadget Support
@@ -585,6 +647,10 @@ CONFIG_JBD=y
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+
+#
+# XFS support
+#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -646,7 +712,6 @@ CONFIG_NFS_FS=y
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
 CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -698,7 +763,9 @@ CONFIG_CRC32=y
 #
 # Kernel hacking
 #
+# CONFIG_PRINTK_TIME is not set
 # CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_KGDB_CONSOLE is not set
 # CONFIG_SERIAL_TEXT_DEBUG is not set
 
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index f22ddce36135..ce36e88ba627 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -232,7 +232,8 @@ skpinv:	addi	r6,r6,1				/* Increment */
         tlbwe
 
 /* 7. Jump to KERNELBASE mapping */
-        li      r7,0
+        lis     r7,MSR_KERNEL@h
+        ori     r7,r7,MSR_KERNEL@l
         bl      1f                      /* Find our address */
 1:      mflr    r9
         rlwimi  r6,r9,0,20,31
@@ -293,6 +294,18 @@ skpinv:	addi	r6,r6,1				/* Increment */
         mtspr   SPRN_HID0, r2
 #endif
 
+#if !defined(CONFIG_BDI_SWITCH)
+        /*
+         * The Abatron BDI JTAG debugger does not tolerate others
+         * mucking with the debug registers.
+         */
+        lis     r2,DBCR0_IDM@h
+        mtspr   SPRN_DBCR0,r2
+        /* clear any residual debug events */
+        li      r2,-1
+        mtspr   SPRN_DBSR,r2
+#endif
+
         /*
          * This is where the main kernel code starts.
          */
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index f8e7e324a173..c65731e8bc65 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -408,12 +408,7 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
 
         /* Early out if we are an invalid form of lswx */
         if ((instword & INST_STRING_MASK) == INST_LSWX)
-                if ((rA >= rT) || (NB_RB >= rT) || (rT == rA) || (rT == NB_RB))
-                        return -EINVAL;
-
-        /* Early out if we are an invalid form of lswi */
-        if ((instword & INST_STRING_MASK) == INST_LSWI)
-                if ((rA >= rT) || (rT == rA))
+                if ((rT == rA) || (rT == NB_RB))
                         return -EINVAL;
 
         EA = (rA == 0) ? 0 : regs->gpr[rA];
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index b3b0f51979d2..e6348b5a1ddc 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -127,7 +127,6 @@ mpc834x_sys_map_io(void)
 {
         /* we steal the lowest ioremap addr for virt space */
         io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
-        io_block_mapping(BCSR_VIRT_ADDR, BCSR_PHYS_ADDR, BCSR_SIZE, _PAGE_IO);
 }
 
 int
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index f4d055ae19c1..a2f6e49d7151 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -26,9 +26,14 @@
 #define VIRT_IMMRBAR            ((uint)0xfe000000)
 
 #define BCSR_PHYS_ADDR          ((uint)0xf8000000)
-#define BCSR_VIRT_ADDR          ((uint)0xfe100000)
 #define BCSR_SIZE               ((uint)(32 * 1024))
 
+#define BCSR_MISC_REG2_OFF      0x07
+#define BCSR_MISC_REG2_PORESET  0x01
+
+#define BCSR_MISC_REG3_OFF      0x08
+#define BCSR_MISC_REG3_CNFLOCK  0x80
+
 #ifdef CONFIG_PCI
 /* PCI interrupt controller */
 #define PIRQA        MPC83xx_IRQ_IRQ4
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 4d857d6d633d..583838ab02d8 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -210,6 +210,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
         ppc_md.progress = gen550_progress;
 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
+#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
+        ppc_md.early_serial_map = mpc85xx_early_serial_map;
+#endif  /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc8540ads_init(): exit", 0);
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 6c020d67ad70..e7cfa498568c 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -44,6 +44,7 @@
 #include <asm/machdep.h>
 #include <asm/prom.h>
 #include <asm/open_pic.h>
+#include <asm/i8259.h>
 #include <asm/bootinfo.h>
 #include <asm/pci-bridge.h>
 #include <asm/mpc85xx.h>
@@ -181,6 +182,7 @@ void __init
 mpc85xx_cds_init_IRQ(void)
 {
         bd_t *binfo = (bd_t *) __res;
+        int i;
 
         /* Determine the Physical Address of the OpenPIC regs */
         phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
@@ -198,6 +200,15 @@ mpc85xx_cds_init_IRQ(void)
          */
         openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
 
+#ifdef CONFIG_PCI
+        openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
+
+        for (i = 0; i < NUM_8259_INTERRUPTS; i++)
+                irq_desc[i].handler = &i8259_pic;
+
+        i8259_init(0);
+#endif
+
 #ifdef CONFIG_CPM2
         /* Setup CPM2 PIC */
         cpm2_init_IRQ();
@@ -231,7 +242,7 @@ mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
                          * interrupt on slot */
                 {
                         { 0, 1, 2, 3 }, /* 16 - PMC */
-                        { 3, 0, 0, 0 }, /* 17 P2P (Tsi320) */
+                        { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
                         { 0, 1, 2, 3 }, /* 18 - Slot 1 */
                         { 1, 2, 3, 0 }, /* 19 - Slot 2 */
                         { 2, 3, 0, 1 }, /* 20 - Slot 3 */
@@ -280,13 +291,135 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
                         return PCIBIOS_DEVICE_NOT_FOUND;
 #endif
         /* We explicitly do not go past the Tundra 320 Bridge */
-        if (bus == 1)
+        if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
                 return PCIBIOS_DEVICE_NOT_FOUND;
         if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
                 return PCIBIOS_DEVICE_NOT_FOUND;
         else
                 return PCIBIOS_SUCCESSFUL;
 }
+
+void __init
+mpc85xx_cds_enable_via(struct pci_controller *hose)
+{
+        u32 pci_class;
+        u16 vid, did;
+
+        early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
+        if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
+                return;
+
+        /* Configure P2P so that we can reach bus 1 */
+        early_write_config_byte(hose, 0, 0x88, PCI_PRIMARY_BUS, 0);
+        early_write_config_byte(hose, 0, 0x88, PCI_SECONDARY_BUS, 1);
+        early_write_config_byte(hose, 0, 0x88, PCI_SUBORDINATE_BUS, 0xff);
+
+        early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
+        early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
+
+        if ((vid != PCI_VENDOR_ID_VIA) ||
+                        (did != PCI_DEVICE_ID_VIA_82C686))
+                return;
+
+        /* Enable USB and IDE functions */
+        early_write_config_byte(hose, 1, 0x10, 0x48, 0x08);
+}
+
+void __init
+mpc85xx_cds_fixup_via(struct pci_controller *hose)
+{
+        u32 pci_class;
+        u16 vid, did;
+
+        early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
+        if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
+                return;
+
+        /*
+         * Force the backplane P2P bridge to have a window
+         * open from 0x00000000-0x00001fff in PCI I/O space.
+         * This allows legacy I/O (i8259, etc) on the VIA
+         * southbridge to be accessed.
+         */
+        early_write_config_byte(hose, 0, 0x88, PCI_IO_BASE, 0x00);
+        early_write_config_word(hose, 0, 0x88, PCI_IO_BASE_UPPER16, 0x0000);
+        early_write_config_byte(hose, 0, 0x88, PCI_IO_LIMIT, 0x10);
+        early_write_config_word(hose, 0, 0x88, PCI_IO_LIMIT_UPPER16, 0x0000);
+
+        early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
+        early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
+        if ((vid != PCI_VENDOR_ID_VIA) ||
+                        (did != PCI_DEVICE_ID_VIA_82C686))
+                return;
+
+        /*
+         * Since the P2P window was forced to cover the fixed
+         * legacy I/O addresses, it is necessary to manually
+         * place the base addresses for the IDE and USB functions
+         * within this window.
+         */
+        /* Function 1, IDE */
+        early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_0, 0x1ff8);
+        early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_1, 0x1ff4);
+        early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_2, 0x1fe8);
+        early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_3, 0x1fe4);
+        early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_4, 0x1fd0);
+
+        /* Function 2, USB ports 0-1 */
+        early_write_config_dword(hose, 1, 0x12, PCI_BASE_ADDRESS_4, 0x1fa0);
+
+        /* Function 3, USB ports 2-3 */
+        early_write_config_dword(hose, 1, 0x13, PCI_BASE_ADDRESS_4, 0x1f80);
+
+        /* Function 5, Power Management */
+        early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_0, 0x1e00);
+        early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_1, 0x1dfc);
+        early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_2, 0x1df8);
+
+        /* Function 6, AC97 Interface */
+        early_write_config_dword(hose, 1, 0x16, PCI_BASE_ADDRESS_0, 0x1c00);
+}
+
+void __init
+mpc85xx_cds_pcibios_fixup(void)
+{
+        struct pci_dev *dev = NULL;
+        u_char          c;
+
+        if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
+                                        PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
+                /*
+                 * U-Boot does not set the enable bits
+                 * for the IDE device. Force them on here.
+                 */
+                pci_read_config_byte(dev, 0x40, &c);
+                c |= 0x03; /* IDE: Chip Enable Bits */
+                pci_write_config_byte(dev, 0x40, c);
+
+                /*
+                 * Since only primary interface works, force the
+                 * IDE function to standard primary IDE interrupt
+                 * w/ 8259 offset
+                 */
+                dev->irq = 14;
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+        }
+
+        /*
+         * Force legacy USB interrupt routing
+         */
+        if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
+                                        PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
+                dev->irq = 10;
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
+        }
+
+        if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
+                                        PCI_DEVICE_ID_VIA_82C586_2, dev))) {
+                dev->irq = 11;
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
+        }
+}
 #endif /* CONFIG_PCI */
 
 TODC_ALLOC();
@@ -328,6 +461,9 @@ mpc85xx_cds_setup_arch(void)
         loops_per_jiffy = freq / HZ;
 
 #ifdef CONFIG_PCI
+        /* VIA IDE configuration */
+        ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
+
         /* setup PCI host bridges */
         mpc85xx_setup_hose();
 #endif
@@ -459,6 +595,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
         ppc_md.progress = gen550_progress;
 #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
+#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
+        ppc_md.early_serial_map = mpc85xx_early_serial_map;
+#endif  /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc85xx_cds_init(): exit", 0);
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
index 7627d77504bd..12b292c6ae32 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
@@ -77,4 +77,7 @@
 
 #define MPC85XX_PCI2_IO_SIZE         0x01000000
 
+#define NR_8259_INTS                 16
+#define CPM_IRQ_OFFSET               NR_8259_INTS
+
 #endif /* __MACH_MPC85XX_CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index 9ab05e590c3e..7b9e1543e175 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -221,6 +221,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
         ppc_md.progress = gen550_progress;
 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
+#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
+        ppc_md.early_serial_map = sbc8560_early_serial_map;
+#endif  /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
 
         if (ppc_md.progress)
                 ppc_md.progress("sbc8560_init(): exit", 0);
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index f7fb2786cd50..937f46df711e 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -85,14 +85,11 @@ static int no_schedule;
 static int has_cpu_l2lve;
 
 
-#define PMAC_CPU_LOW_SPEED      1
-#define PMAC_CPU_HIGH_SPEED     0
-
 /* There are only two frequency states for each processor. Values
  * are in kHz for the time being.
  */
-#define CPUFREQ_HIGH                  PMAC_CPU_HIGH_SPEED
-#define CPUFREQ_LOW                   PMAC_CPU_LOW_SPEED
+#define CPUFREQ_HIGH                  0
+#define CPUFREQ_LOW                   1
 
 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
         {CPUFREQ_HIGH,          0},
@@ -100,6 +97,11 @@ static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
         {0,                     CPUFREQ_TABLE_END},
 };
 
+static struct freq_attr* pmac_cpu_freqs_attr[] = {
+        &cpufreq_freq_attr_scaling_available_freqs,
+        NULL,
+};
+
 static inline void local_delay(unsigned long ms)
 {
         if (no_schedule)
@@ -269,6 +271,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
 #ifdef DEBUG_FREQ
         printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
 #endif
+        pmu_suspend();
+
         /* Disable all interrupt sources on openpic */
         pic_prio = openpic_get_priority();
         openpic_set_priority(0xf);
@@ -343,6 +347,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
         debug_calc_bogomips();
 #endif
 
+        pmu_resume();
+
         preempt_enable();
 
         return 0;
@@ -355,7 +361,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
         static unsigned long prev_l3cr;
 
         freqs.old = cur_freq;
-        freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
+        freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
         freqs.cpu = smp_processor_id();
 
         if (freqs.old == freqs.new)
@@ -363,7 +369,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
 
         if (notify)
                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        if (speed_mode == PMAC_CPU_LOW_SPEED &&
+        if (speed_mode == CPUFREQ_LOW &&
             cpu_has_feature(CPU_FTR_L3CR)) {
                 l3cr = _get_L3CR();
                 if (l3cr & L3CR_L3E) {
@@ -371,8 +377,8 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
                         _set_L3CR(0);
                 }
         }
-        set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED);
-        if (speed_mode == PMAC_CPU_HIGH_SPEED &&
+        set_speed_proc(speed_mode == CPUFREQ_LOW);
+        if (speed_mode == CPUFREQ_HIGH &&
             cpu_has_feature(CPU_FTR_L3CR)) {
                 l3cr = _get_L3CR();
                 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
@@ -380,7 +386,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
         }
         if (notify)
                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
+        cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
 
         return 0;
 }
@@ -423,7 +429,8 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
         policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
         policy->cur = cur_freq;
 
-        return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
+        cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
+        return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
 }
 
 static u32 __pmac read_gpio(struct device_node *np)
@@ -457,7 +464,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
         no_schedule = 1;
         sleep_freq = cur_freq;
         if (cur_freq == low_freq)
-                do_set_cpu_speed(PMAC_CPU_HIGH_SPEED, 0);
+                do_set_cpu_speed(CPUFREQ_HIGH, 0);
         return 0;
 }
 
@@ -473,8 +480,8 @@ static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
          * is that we force a switch to whatever it was, which is
          * probably high speed due to our suspend() routine
          */
-        do_set_cpu_speed(sleep_freq == low_freq ? PMAC_CPU_LOW_SPEED
-                         : PMAC_CPU_HIGH_SPEED, 0);
+        do_set_cpu_speed(sleep_freq == low_freq ?
+                         CPUFREQ_LOW : CPUFREQ_HIGH, 0);
 
         no_schedule = 0;
         return 0;
@@ -488,6 +495,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
         .suspend        = pmac_cpufreq_suspend,
         .resume         = pmac_cpufreq_resume,
         .flags          = CPUFREQ_PM_NO_WARN,
+        .attr           = pmac_cpu_freqs_attr,
         .name           = "powermac",
         .owner          = THIS_MODULE,
 };
diff --git a/arch/ppc/platforms/pq2ads.h b/arch/ppc/platforms/pq2ads.h
index cf5e5dd06d63..067d9a5aebc1 100644
--- a/arch/ppc/platforms/pq2ads.h
+++ b/arch/ppc/platforms/pq2ads.h
@@ -49,10 +49,10 @@
 /* PCI interrupt controller */
 #define PCI_INT_STAT_REG        0xF8200000
 #define PCI_INT_MASK_REG        0xF8200004
-#define PIRQA                   (NR_SIU_INTS + 0)
-#define PIRQB                   (NR_SIU_INTS + 1)
-#define PIRQC                   (NR_SIU_INTS + 2)
-#define PIRQD                   (NR_SIU_INTS + 3)
+#define PIRQA                   (NR_CPM_INTS + 0)
+#define PIRQB                   (NR_CPM_INTS + 1)
+#define PIRQC                   (NR_CPM_INTS + 2)
+#define PIRQD                   (NR_CPM_INTS + 3)
 
 /*
  * PCI memory map definitions for MPC8266ADS-PCI.
@@ -68,28 +68,23 @@
  *      0x00000000-0x1FFFFFFF   0x00000000-0x1FFFFFFF   MPC8266 local memory
  */
 
-/* window for a PCI master to access MPC8266 memory */
-#define PCI_SLV_MEM_LOCAL       0x00000000      /* Local base */
-#define PCI_SLV_MEM_BUS         0x00000000      /* PCI base */
+/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
+   Here we should redefine what is unique for this board */
+#define M82xx_PCI_SLAVE_MEM_LOCAL       0x00000000      /* Local base */
+#define M82xx_PCI_SLAVE_MEM_BUS         0x00000000      /* PCI base */
+#define M82xx_PCI_SLAVE_MEM_SIZE        0x10000000      /* 256 Mb */
 
-/* window for the processor to access PCI memory with prefetching */
-#define PCI_MSTR_MEM_LOCAL      0x80000000      /* Local base */
-#define PCI_MSTR_MEM_BUS        0x80000000      /* PCI base   */
-#define PCI_MSTR_MEM_SIZE       0x20000000      /* 512MB */
+#define M82xx_PCI_SLAVE_SEC_WND_SIZE    ~(0x40000000 - 1U)      /* 2 x 512Mb  */
+#define M82xx_PCI_SLAVE_SEC_WND_BASE    0x80000000              /* PCI Memory base */
 
-/* window for the processor to access PCI memory without prefetching */
-#define PCI_MSTR_MEMIO_LOCAL    0xA0000000      /* Local base */
-#define PCI_MSTR_MEMIO_BUS      0xA0000000      /* PCI base   */
-#define PCI_MSTR_MEMIO_SIZE     0x20000000      /* 512MB */
+#if defined(CONFIG_ADS8272)
+#define PCI_INT_TO_SIU  SIU_INT_IRQ2
+#elif defined(CONFIG_PQ2FADS)
+#define PCI_INT_TO_SIU  SIU_INT_IRQ6
+#else
+#warning PCI Bridge will be without interrupts support
+#endif
 
-/* window for the processor to access PCI I/O */
-#define PCI_MSTR_IO_LOCAL       0xF4000000      /* Local base */
-#define PCI_MSTR_IO_BUS         0x00000000      /* PCI base   */
-#define PCI_MSTR_IO_SIZE        0x04000000      /* 64MB */
-
-#define _IO_BASE                PCI_MSTR_IO_LOCAL
-#define _ISA_MEM_BASE           PCI_MSTR_MEMIO_LOCAL
-#define PCI_DRAM_OFFSET         PCI_SLV_MEM_BUS
 #endif /* CONFIG_PCI */
 
 #endif /* __MACH_ADS8260_DEFS */
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index dd418ea3426c..96acf85800d4 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -81,7 +81,7 @@ obj-$(CONFIG_SBC82xx)		+= todc_time.o
 obj-$(CONFIG_SPRUCE)            += cpc700_pic.o indirect_pci.o pci_auto.o \
                                    todc_time.o
 obj-$(CONFIG_8260)              += m8260_setup.o
-obj-$(CONFIG_PCI_8260)          += m8260_pci.o indirect_pci.o
+obj-$(CONFIG_PCI_8260)          += m82xx_pci.o indirect_pci.o pci_auto.o
 obj-$(CONFIG_8260_PCI9)         += m8260_pci_erratum9.o
 obj-$(CONFIG_CPM2)              += cpm2_common.o cpm2_pic.o
 ifeq ($(CONFIG_PPC_GEN550),y)
@@ -97,7 +97,7 @@ obj-$(CONFIG_MPC10X_OPENPIC)	+= open_pic.o
 obj-$(CONFIG_40x)               += dcr.o
 obj-$(CONFIG_BOOKE)             += dcr.o
 obj-$(CONFIG_85xx)              += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
-                                        ppc_sys.o mpc85xx_sys.o \
+                                        ppc_sys.o i8259.o mpc85xx_sys.o \
                                         mpc85xx_devices.o
 ifeq ($(CONFIG_85xx),y)
 obj-$(CONFIG_PCI)               += indirect_pci.o pci_auto.o
diff --git a/arch/ppc/syslib/m8260_pci.c b/arch/ppc/syslib/m8260_pci.c
deleted file mode 100644
index 057cc3f8ff37..000000000000
--- a/arch/ppc/syslib/m8260_pci.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004 Red Hat, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/immap_cpm2.h>
-#include <asm/mpc8260.h>
-
-#include "m8260_pci.h"
-
-
-/* PCI bus configuration registers.
- */
-
-static void __init m8260_setup_pci(struct pci_controller *hose)
-{
-        volatile cpm2_map_t *immap = cpm2_immr;
-        unsigned long pocmr;
-        u16 tempShort;
-
-#ifndef CONFIG_ATC      /* already done in U-Boot */
-        /* 
-         * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), 
-         * and local bus for PCI (SIUMCR [LBPC]).
-         */
-        immap->im_siu_conf.siu_82xx.sc_siumcr = 0x00640000;
-#endif
-
-        /* Make PCI lowest priority */
-        /* Each 4 bits is a device bus request  and the MS 4bits 
-           is highest priority */
-        /* Bus               4bit value 
-           ---               ----------
-           CPM high          0b0000
-           CPM middle        0b0001
-           CPM low           0b0010
-           PCI reguest       0b0011
-           Reserved          0b0100
-           Reserved          0b0101
-           Internal Core     0b0110
-           External Master 1 0b0111
-           External Master 2 0b1000
-           External Master 3 0b1001
-           The rest are reserved */
-        immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
-
-        /* Park bus on core while modifying PCI Bus accesses */
-        immap->im_siu_conf.siu_82xx.sc_ppc_acr = 0x6;
-
-        /* 
-         * Set up master window that allows the CPU to access PCI space. This 
-         * window is set up using the first SIU PCIBR registers.
-         */
-        immap->im_memctl.memc_pcimsk0 = MPC826x_PCI_MASK;
-        immap->im_memctl.memc_pcibr0 =  MPC826x_PCI_BASE | PCIBR_ENABLE;
-
-        /* Disable machine check on no response or target abort */
-        immap->im_pci.pci_emr = cpu_to_le32(0x1fe7);
-        /* Release PCI RST (by default the PCI RST signal is held low)  */
-        immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
-
-        /* give it some time */
-        mdelay(1);
-
-        /* 
-         * Set up master window that allows the CPU to access PCI Memory (prefetch) 
-         * space. This window is set up using the first set of Outbound ATU registers.
-         */
-        immap->im_pci.pci_potar0 = cpu_to_le32(MPC826x_PCI_LOWER_MEM >> 12);
-        immap->im_pci.pci_pobar0 = cpu_to_le32((MPC826x_PCI_LOWER_MEM - MPC826x_PCI_MEM_OFFSET) >> 12);
-        pocmr = ((MPC826x_PCI_UPPER_MEM - MPC826x_PCI_LOWER_MEM) >> 12) ^ 0xfffff;
-        immap->im_pci.pci_pocmr0 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PREFETCH_EN);
-
-        /* 
-         * Set up master window that allows the CPU to access PCI Memory (non-prefetch) 
-         * space. This window is set up using the second set of Outbound ATU registers.
-         */
-        immap->im_pci.pci_potar1 = cpu_to_le32(MPC826x_PCI_LOWER_MMIO >> 12);
-        immap->im_pci.pci_pobar1 = cpu_to_le32((MPC826x_PCI_LOWER_MMIO - MPC826x_PCI_MMIO_OFFSET) >> 12);
-        pocmr = ((MPC826x_PCI_UPPER_MMIO - MPC826x_PCI_LOWER_MMIO) >> 12) ^ 0xfffff;
-        immap->im_pci.pci_pocmr1 = cpu_to_le32(pocmr | POCMR_ENABLE);
-
-        /* 
-         * Set up master window that allows the CPU to access PCI IO space. This window
-         * is set up using the third set of Outbound ATU registers.
-         */
-        immap->im_pci.pci_potar2 = cpu_to_le32(MPC826x_PCI_IO_BASE >> 12);
-        immap->im_pci.pci_pobar2 = cpu_to_le32(MPC826x_PCI_LOWER_IO >> 12);
-        pocmr = ((MPC826x_PCI_UPPER_IO - MPC826x_PCI_LOWER_IO) >> 12) ^ 0xfffff;
-        immap->im_pci.pci_pocmr2 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PCI_IO);
-
-        /* 
-         * Set up slave window that allows PCI masters to access MPC826x local memory. 
-         * This window is set up using the first set of Inbound ATU registers
-         */
-
-        immap->im_pci.pci_pitar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_LOCAL >> 12);
-        immap->im_pci.pci_pibar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_BUS >> 12);
-        pocmr = ((MPC826x_PCI_SLAVE_MEM_SIZE-1) >> 12) ^ 0xfffff;
-        immap->im_pci.pci_picmr0 = cpu_to_le32(pocmr | PICMR_ENABLE | PICMR_PREFETCH_EN);
-
-        /* See above for description - puts PCI request as highest priority */
-        immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
-
-        /* Park the bus on the PCI */
-        immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
-
-        /* Host mode - specify the bridge as a host-PCI bridge */
-        early_write_config_word(hose, 0, 0, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_HOST);
-
-        /* Enable the host bridge to be a master on the PCI bus, and to act as a PCI memory target */
-        early_read_config_word(hose, 0, 0, PCI_COMMAND, &tempShort);
-        early_write_config_word(hose, 0, 0, PCI_COMMAND,
-                                tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-}
-
-void __init m8260_find_bridges(void)
-{
-        extern int pci_assign_all_busses;
-        struct pci_controller * hose;
-
-        pci_assign_all_busses = 1;
-
-        hose = pcibios_alloc_controller();
-
-        if (!hose)
-                return;
-
-        ppc_md.pci_swizzle = common_swizzle;
-
-        hose->first_busno = 0;
-        hose->bus_offset = 0;
-        hose->last_busno = 0xff;
-
-        setup_m8260_indirect_pci(hose, 
-                                 (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
-                                 (unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
-
-        m8260_setup_pci(hose);
-        hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET;
-
-        hose->io_base_virt = ioremap(MPC826x_PCI_IO_BASE,
-                                        MPC826x_PCI_IO_SIZE);
-        isa_io_base = (unsigned long) hose->io_base_virt;
- 
-        /* setup resources */
-        pci_init_resource(&hose->mem_resources[0],
-                          MPC826x_PCI_LOWER_MEM,
-                          MPC826x_PCI_UPPER_MEM,
-                          IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
-
-        pci_init_resource(&hose->mem_resources[1],
-                          MPC826x_PCI_LOWER_MMIO,
-                          MPC826x_PCI_UPPER_MMIO,
-                          IORESOURCE_MEM, "PCI memory");
-
-        pci_init_resource(&hose->io_resource,
-                          MPC826x_PCI_LOWER_IO,
-                          MPC826x_PCI_UPPER_IO,
-                          IORESOURCE_IO, "PCI I/O");
-}
diff --git a/arch/ppc/syslib/m8260_pci.h b/arch/ppc/syslib/m8260_pci.h
deleted file mode 100644
index d1352120acd7..000000000000
--- a/arch/ppc/syslib/m8260_pci.h
+++ /dev/null
@@ -1,76 +0,0 @@
-
-#ifndef _PPC_KERNEL_M8260_PCI_H
-#define _PPC_KERNEL_M8260_PCI_H
-
-#include <asm/m8260_pci.h>
-
-/*
- *   Local->PCI map (from CPU)                             controlled by
- *   MPC826x master window
- *
- *   0x80000000 - 0xBFFFFFFF    Total CPU2PCI space        PCIBR0
- *                       
- *   0x80000000 - 0x9FFFFFFF    PCI Mem with prefetch      (Outbound ATU #1)
- *   0xA0000000 - 0xAFFFFFFF    PCI Mem w/o  prefetch      (Outbound ATU #2)
- *   0xB0000000 - 0xB0FFFFFF    32-bit PCI IO              (Outbound ATU #3)
- *                      
- *   PCI->Local map (from PCI)
- *   MPC826x slave window                                  controlled by
- *
- *   0x00000000 - 0x07FFFFFF    MPC826x local memory       (Inbound ATU #1)
- */
-
-/* 
- * Slave window that allows PCI masters to access MPC826x local memory. 
- * This window is set up using the first set of Inbound ATU registers
- */
-
-#ifndef MPC826x_PCI_SLAVE_MEM_LOCAL
-#define MPC826x_PCI_SLAVE_MEM_LOCAL     (((struct bd_info *)__res)->bi_memstart)
-#define MPC826x_PCI_SLAVE_MEM_BUS       (((struct bd_info *)__res)->bi_memstart)
-#define MPC826x_PCI_SLAVE_MEM_SIZE      (((struct bd_info *)__res)->bi_memsize)
-#endif
-
-/* 
- * This is the window that allows the CPU to access PCI address space.
- * It will be setup with the SIU PCIBR0 register. All three PCI master
- * windows, which allow the CPU to access PCI prefetch, non prefetch,
- * and IO space (see below), must all fit within this window. 
- */
-#ifndef MPC826x_PCI_BASE
-#define MPC826x_PCI_BASE        0x80000000
-#define MPC826x_PCI_MASK        0xc0000000
-#endif
-
-#ifndef MPC826x_PCI_LOWER_MEM
-#define MPC826x_PCI_LOWER_MEM  0x80000000
-#define MPC826x_PCI_UPPER_MEM  0x9fffffff
-#define MPC826x_PCI_MEM_OFFSET 0x00000000
-#endif
-
-#ifndef MPC826x_PCI_LOWER_MMIO
-#define MPC826x_PCI_LOWER_MMIO  0xa0000000
-#define MPC826x_PCI_UPPER_MMIO  0xafffffff
-#define MPC826x_PCI_MMIO_OFFSET 0x00000000
-#endif
-
-#ifndef MPC826x_PCI_LOWER_IO
-#define MPC826x_PCI_LOWER_IO   0x00000000
-#define MPC826x_PCI_UPPER_IO   0x00ffffff
-#define MPC826x_PCI_IO_BASE    0xb0000000
-#define MPC826x_PCI_IO_SIZE    0x01000000
-#endif
-
-#ifndef _IO_BASE
-#define _IO_BASE isa_io_base
-#endif
-
-#ifdef CONFIG_8260_PCI9
-struct pci_controller;
-extern void setup_m8260_indirect_pci(struct pci_controller* hose,
-                                     u32 cfg_addr, u32 cfg_data);
-#else
-#define setup_m8260_indirect_pci setup_indirect_pci
-#endif
-
-#endif /* _PPC_KERNEL_M8260_PCI_H */
diff --git a/arch/ppc/syslib/m8260_pci_erratum9.c b/arch/ppc/syslib/m8260_pci_erratum9.c
index 9c0582d639e0..1dc7e4e1d491 100644
--- a/arch/ppc/syslib/m8260_pci_erratum9.c
+++ b/arch/ppc/syslib/m8260_pci_erratum9.c
@@ -31,7 +31,7 @@
 #include <asm/immap_cpm2.h>
 #include <asm/cpm2.h>
 
-#include "m8260_pci.h"
+#include "m82xx_pci.h"
 
 #ifdef CONFIG_8260_PCI9
 /*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */
@@ -248,11 +248,11 @@ EXPORT_SYMBOL(idma_pci9_read_le);
 
 static inline int is_pci_mem(unsigned long addr)
 {
-        if (addr >= MPC826x_PCI_LOWER_MMIO &&
-            addr <= MPC826x_PCI_UPPER_MMIO)
+        if (addr >= M82xx_PCI_LOWER_MMIO &&
+                addr <= M82xx_PCI_UPPER_MMIO)
                 return 1;
-        if (addr >= MPC826x_PCI_LOWER_MEM &&
-            addr <= MPC826x_PCI_UPPER_MEM)
+        if (addr >= M82xx_PCI_LOWER_MEM &&
+                addr <= M82xx_PCI_UPPER_MEM)
                 return 1;
         return 0;
 }
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 23ea3f694de2..fda75d79050c 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -34,7 +34,8 @@
 unsigned char __res[sizeof(bd_t)];
 
 extern void cpm2_reset(void);
-extern void m8260_find_bridges(void);
+extern void pq2_find_bridges(void);
+extern void pq2pci_init_irq(void);
 extern void idma_pci9_init(void);
 
 /* Place-holder for board-specific init */
@@ -56,7 +57,7 @@ m8260_setup_arch(void)
         idma_pci9_init();
 #endif
 #ifdef CONFIG_PCI_8260
-        m8260_find_bridges();
+        pq2_find_bridges();
 #endif
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
@@ -173,6 +174,12 @@ m8260_init_IRQ(void)
          * in case the boot rom changed something on us.
          */
         cpm2_immr->im_intctl.ic_siprr = 0x05309770;
+
+#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
+        /* Initialize stuff for the 82xx CPLD IC and install demux  */
+        pq2pci_init_irq();
+#endif
+
 }
 
 /*
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
new file mode 100644
index 000000000000..5e7a7edcea74
--- /dev/null
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -0,0 +1,383 @@
+/*
+ *
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004 Red Hat, Inc.
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+
+#include <asm/byteorder.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/immap_cpm2.h>
+#include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+
+#include "m82xx_pci.h"
+
+/*
+ * Interrupt routing
+ */
+
+static inline int
+pq2pci_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+        static char pci_irq_table[][4] =
+        /*
+         *      PCI IDSEL/INTPIN->INTLINE
+         *        A      B      C      D
+         */
+        {
+                { PIRQA, PIRQB, PIRQC, PIRQD }, /* IDSEL 22 - PCI slot 0 */
+                { PIRQD, PIRQA, PIRQB, PIRQC }, /* IDSEL 23 - PCI slot 1 */
+                { PIRQC, PIRQD, PIRQA, PIRQB }, /* IDSEL 24 - PCI slot 2 */
+        };
+
+        const long min_idsel = 22, max_idsel = 24, irqs_per_slot = 4;
+        return PCI_IRQ_TABLE_LOOKUP;
+}
+
+static void
+pq2pci_mask_irq(unsigned int irq)
+{
+        int bit = irq - NR_CPM_INTS;
+
+        *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
+        return;
+}
+
+static void
+pq2pci_unmask_irq(unsigned int irq)
+{
+        int bit = irq - NR_CPM_INTS;
+
+        *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
+        return;
+}
+
+static void
+pq2pci_mask_and_ack(unsigned int irq)
+{
+        int bit = irq - NR_CPM_INTS;
+
+        *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
+        return;
+}
+
+static void
+pq2pci_end_irq(unsigned int irq)
+{
+        int bit = irq - NR_CPM_INTS;
+
+        *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
+        return;
+}
+
+struct hw_interrupt_type pq2pci_ic = {
+        "PQ2 PCI",
+        NULL,
+        NULL,
+        pq2pci_unmask_irq,
+        pq2pci_mask_irq,
+        pq2pci_mask_and_ack,
+        pq2pci_end_irq,
+        0
+};
+
+static irqreturn_t
+pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs)
+{
+        unsigned long stat, mask, pend;
+        int bit;
+
+        for(;;) {
+                stat = *(volatile unsigned long *) PCI_INT_STAT_REG;
+                mask = *(volatile unsigned long *) PCI_INT_MASK_REG;
+                pend = stat & ~mask & 0xf0000000;
+                if (!pend)
+                        break;
+                for (bit = 0; pend != 0; ++bit, pend <<= 1) {
+                        if (pend & 0x80000000)
+                                __do_IRQ(NR_CPM_INTS + bit, regs);
+                }
+        }
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction pq2pci_irqaction = {
+        .handler = pq2pci_irq_demux,
+        .flags   = SA_INTERRUPT,
+        .mask    = CPU_MASK_NONE,
+        .name    = "PQ2 PCI cascade",
+};
+
+
+void
+pq2pci_init_irq(void)
+{
+        int irq;
+        volatile cpm2_map_t *immap = cpm2_immr;
+#if defined CONFIG_ADS8272
+        /* configure chip select for PCI interrupt controller */
+        immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801;
+        immap->im_memctl.memc_or3 = 0xffff8010;
+#elif defined CONFIG_PQ2FADS
+        immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801;
+        immap->im_memctl.memc_or8 = 0xffff8010;
+#endif
+        for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
+                irq_desc[irq].handler = &pq2pci_ic;
+
+        /* make PCI IRQ level sensitive */
+        immap->im_intctl.ic_siexr &=
+                ~(1 << (14 - (PCI_INT_TO_SIU - SIU_INT_IRQ1)));
+
+        /* mask all PCI interrupts */
+        *(volatile unsigned long *) PCI_INT_MASK_REG |= 0xfff00000;
+
+        /* install the demultiplexer for the PCI cascade interrupt */
+        setup_irq(PCI_INT_TO_SIU, &pq2pci_irqaction);
+        return;
+}
+
+static int
+pq2pci_exclude_device(u_char bus, u_char devfn)
+{
+        return PCIBIOS_SUCCESSFUL;
+}
+
+/* PCI bus configuration registers.
+ */
+static void
+pq2ads_setup_pci(struct pci_controller *hose)
+{
+        __u32 val;
+        volatile cpm2_map_t *immap = cpm2_immr;
+        bd_t* binfo = (bd_t*) __res;
+        u32 sccr = immap->im_clkrst.car_sccr;
+        uint pci_div,freq,time;
+                /* PCI int lowest prio */
+        /* Each 4 bits is a device bus request  and the MS 4bits
+         is highest priority */
+        /* Bus                4bit value
+           ---                ----------
+           CPM high             0b0000
+           CPM middle           0b0001
+           CPM low              0b0010
+           PCI reguest          0b0011
+           Reserved             0b0100
+           Reserved             0b0101
+           Internal Core        0b0110
+           External Master 1    0b0111
+           External Master 2    0b1000
+           External Master 3    0b1001
+           The rest are reserved
+         */
+        immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
+        /* park bus on core */
+        immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_CORE;
+        /*
+         * Set up master windows that allow the CPU to access PCI space. These
+         * windows are set up using the two SIU PCIBR registers.
+         */
+
+        immap->im_memctl.memc_pcimsk0 = M82xx_PCI_PRIM_WND_SIZE;
+        immap->im_memctl.memc_pcibr0  = M82xx_PCI_PRIM_WND_BASE | PCIBR_ENABLE;
+
+#ifdef M82xx_PCI_SEC_WND_SIZE
+        immap->im_memctl.memc_pcimsk1 = M82xx_PCI_SEC_WND_SIZE;
+        immap->im_memctl.memc_pcibr1  = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
+#endif
+
+#if defined CONFIG_ADS8272
+        immap->im_siu_conf.siu_82xx.sc_siumcr =
+                (immap->im_siu_conf.siu_82xx.sc_siumcr &
+                ~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE |
+                SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 |
+                SIUMCR_LBPC11 | SIUMCR_APPC11 |
+                SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) |
+                SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 |
+                SIUMCR_APPC10 | SIUMCR_CS10PC00 |
+                SIUMCR_BCTLC00 | SIUMCR_MMR11 ;
+
+#elif defined CONFIG_PQ2FADS
+        /*
+         * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
+         * and local bus for PCI (SIUMCR [LBPC]).
+         */
+        immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
+                                ~(SIUMCR_L2PC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) |
+                                SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10;
+#endif
+        /* Enable PCI  */
+        immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
+
+        pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
+                        ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
+        freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div));
+        time = (int)666666/freq;
+        /* due to PCI Local Bus spec, some devices needs to wait such a long
+        time after RST  deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */
+        printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq,
+        (time==1) ? "0.5 seconds":"1 second" );
+
+        {
+                int i;
+                for(i=0;i<(500*time);i++)
+                        udelay(1000);
+        }
+
+        /* setup ATU registers */
+        immap->im_pci.pci_pocmr0 = cpu_to_le32(POCMR_ENABLE | POCMR_PCI_IO |
+                                ((~(M82xx_PCI_IO_SIZE - 1U)) >> POTA_ADDR_SHIFT));
+        immap->im_pci.pci_potar0 = cpu_to_le32(M82xx_PCI_LOWER_IO >> POTA_ADDR_SHIFT);
+        immap->im_pci.pci_pobar0 = cpu_to_le32(M82xx_PCI_IO_BASE >> POTA_ADDR_SHIFT);
+
+        /* Set-up non-prefetchable window */
+        immap->im_pci.pci_pocmr1 = cpu_to_le32(POCMR_ENABLE | ((~(M82xx_PCI_MMIO_SIZE-1U)) >> POTA_ADDR_SHIFT));
+        immap->im_pci.pci_potar1 = cpu_to_le32(M82xx_PCI_LOWER_MMIO >> POTA_ADDR_SHIFT);
+        immap->im_pci.pci_pobar1 = cpu_to_le32((M82xx_PCI_LOWER_MMIO - M82xx_PCI_MMIO_OFFSET) >> POTA_ADDR_SHIFT);
+
+        /* Set-up prefetchable window */
+        immap->im_pci.pci_pocmr2 = cpu_to_le32(POCMR_ENABLE |POCMR_PREFETCH_EN |
+                (~(M82xx_PCI_MEM_SIZE-1U) >> POTA_ADDR_SHIFT));
+        immap->im_pci.pci_potar2 = cpu_to_le32(M82xx_PCI_LOWER_MEM >> POTA_ADDR_SHIFT);
+        immap->im_pci.pci_pobar2 = cpu_to_le32((M82xx_PCI_LOWER_MEM - M82xx_PCI_MEM_OFFSET) >> POTA_ADDR_SHIFT);
+
+        /* Inbound transactions from PCI memory space */
+        immap->im_pci.pci_picmr0 = cpu_to_le32(PICMR_ENABLE | PICMR_PREFETCH_EN |
+                                        ((~(M82xx_PCI_SLAVE_MEM_SIZE-1U)) >> PITA_ADDR_SHIFT));
+        immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS  >> PITA_ADDR_SHIFT);
+        immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
+
+#if defined CONFIG_ADS8272
+        /* PCI int highest prio */
+        immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745;
+#elif defined CONFIG_PQ2FADS
+        immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
+#endif
+        /* park bus on PCI */
+        immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
+
+        /* Enable bus mastering and inbound memory transactions */
+        early_read_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, &val);
+        val &= 0xffff0000;
+        val |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER;
+        early_write_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, val);
+
+}
+
+void __init pq2_find_bridges(void)
+{
+        extern int pci_assign_all_busses;
+        struct pci_controller * hose;
+        int host_bridge;
+
+        pci_assign_all_busses = 1;
+
+        hose = pcibios_alloc_controller();
+
+        if (!hose)
+                return;
+
+        ppc_md.pci_swizzle = common_swizzle;
+
+        hose->first_busno = 0;
+        hose->bus_offset = 0;
+        hose->last_busno = 0xff;
+
+#ifdef CONFIG_ADS8272
+        hose->set_cfg_type = 1;
+#endif
+
+        setup_m8260_indirect_pci(hose,
+                                 (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
+                                 (unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
+
+        /* Make sure it is a supported bridge */
+        early_read_config_dword(hose,
+                                0,
+                                PCI_DEVFN(0,0),
+                                PCI_VENDOR_ID,
+                                &host_bridge);
+        switch (host_bridge) {
+                case PCI_DEVICE_ID_MPC8265:
+                        break;
+                case PCI_DEVICE_ID_MPC8272:
+                        break;
+                default:
+                        printk("Attempting to use unrecognized host bridge ID"
+                                " 0x%08x.\n", host_bridge);
+                        break;
+        }
+
+        pq2ads_setup_pci(hose);
+
+        hose->io_space.start =  M82xx_PCI_LOWER_IO;
+        hose->io_space.end = M82xx_PCI_UPPER_IO;
+        hose->mem_space.start = M82xx_PCI_LOWER_MEM;
+        hose->mem_space.end = M82xx_PCI_UPPER_MMIO;
+        hose->pci_mem_offset = M82xx_PCI_MEM_OFFSET;
+
+        isa_io_base =
+        (unsigned long) ioremap(M82xx_PCI_IO_BASE,
+                                        M82xx_PCI_IO_SIZE);
+        hose->io_base_virt = (void *) isa_io_base;
+
+        /* setup resources */
+        pci_init_resource(&hose->mem_resources[0],
+                        M82xx_PCI_LOWER_MEM,
+                        M82xx_PCI_UPPER_MEM,
+                        IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
+
+        pci_init_resource(&hose->mem_resources[1],
+                        M82xx_PCI_LOWER_MMIO,
+                        M82xx_PCI_UPPER_MMIO,
+                        IORESOURCE_MEM, "PCI memory");
+
+        pci_init_resource(&hose->io_resource,
+                        M82xx_PCI_LOWER_IO,
+                        M82xx_PCI_UPPER_IO,
+                        IORESOURCE_IO | 1, "PCI I/O");
+
+        ppc_md.pci_exclude_device = pq2pci_exclude_device;
+        hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
+
+        ppc_md.pci_map_irq = pq2pci_map_irq;
+        ppc_md.pcibios_fixup = NULL;
+        ppc_md.pcibios_fixup_bus = NULL;
+
+}
diff --git a/arch/ppc/syslib/m82xx_pci.h b/arch/ppc/syslib/m82xx_pci.h
new file mode 100644
index 000000000000..924f73f8e595
--- /dev/null
+++ b/arch/ppc/syslib/m82xx_pci.h
@@ -0,0 +1,92 @@
+
+#ifndef _PPC_KERNEL_M82XX_PCI_H
+#define _PPC_KERNEL_M82XX_PCI_H
+
+#include <asm/m8260_pci.h>
+/*
+ *   Local->PCI map (from CPU)                             controlled by
+ *   MPC826x master window
+ *
+ *   0xF6000000 - 0xF7FFFFFF    IO space
+ *   0x80000000 - 0xBFFFFFFF    CPU2PCI memory space       PCIBR0
+ *
+ *   0x80000000 - 0x9FFFFFFF    PCI Mem with prefetch      (Outbound ATU #1)
+ *   0xA0000000 - 0xBFFFFFFF    PCI Mem w/o  prefetch      (Outbound ATU #2)
+ *   0xF6000000 - 0xF7FFFFFF    32-bit PCI IO              (Outbound ATU #3)
+ *
+ *   PCI->Local map (from PCI)
+ *   MPC826x slave window                                  controlled by
+ *
+ *   0x00000000 - 0x07FFFFFF    MPC826x local memory       (Inbound ATU #1)
+ */
+
+/*
+ * Slave window that allows PCI masters to access MPC826x local memory.
+ * This window is set up using the first set of Inbound ATU registers
+ */
+
+#ifndef M82xx_PCI_SLAVE_MEM_LOCAL
+#define M82xx_PCI_SLAVE_MEM_LOCAL       (((struct bd_info *)__res)->bi_memstart)
+#define M82xx_PCI_SLAVE_MEM_BUS         (((struct bd_info *)__res)->bi_memstart)
+#define M82xx_PCI_SLAVE_MEM_SIZE        (((struct bd_info *)__res)->bi_memsize)
+#endif
+
+/*
+ * This is the window that allows the CPU to access PCI address space.
+ * It will be setup with the SIU PCIBR0 register. All three PCI master
+ * windows, which allow the CPU to access PCI prefetch, non prefetch,
+ * and IO space (see below), must all fit within this window.
+ */
+
+#ifndef M82xx_PCI_LOWER_MEM
+#define M82xx_PCI_LOWER_MEM             0x80000000
+#define M82xx_PCI_UPPER_MEM             0x9fffffff
+#define M82xx_PCI_MEM_OFFSET            0x00000000
+#define M82xx_PCI_MEM_SIZE              0x20000000
+#endif
+
+#ifndef M82xx_PCI_LOWER_MMIO
+#define M82xx_PCI_LOWER_MMIO            0xa0000000
+#define M82xx_PCI_UPPER_MMIO            0xafffffff
+#define M82xx_PCI_MMIO_OFFSET           0x00000000
+#define M82xx_PCI_MMIO_SIZE             0x20000000
+#endif
+
+#ifndef M82xx_PCI_LOWER_IO
+#define M82xx_PCI_LOWER_IO              0x00000000
+#define M82xx_PCI_UPPER_IO              0x01ffffff
+#define M82xx_PCI_IO_BASE               0xf6000000
+#define M82xx_PCI_IO_SIZE               0x02000000
+#endif
+
+#ifndef M82xx_PCI_PRIM_WND_SIZE
+#define M82xx_PCI_PRIM_WND_SIZE         ~(M82xx_PCI_IO_SIZE - 1U)
+#define M82xx_PCI_PRIM_WND_BASE         (M82xx_PCI_IO_BASE)
+#endif
+
+#ifndef M82xx_PCI_SEC_WND_SIZE
+#define M82xx_PCI_SEC_WND_SIZE          ~(M82xx_PCI_MEM_SIZE + M82xx_PCI_MMIO_SIZE - 1U)
+#define M82xx_PCI_SEC_WND_BASE          (M82xx_PCI_LOWER_MEM)
+#endif
+
+#ifndef POTA_ADDR_SHIFT
+#define POTA_ADDR_SHIFT         12
+#endif
+
+#ifndef PITA_ADDR_SHIFT
+#define PITA_ADDR_SHIFT         12
+#endif
+
+#ifndef _IO_BASE
+#define _IO_BASE isa_io_base
+#endif
+
+#ifdef CONFIG_8260_PCI9
+struct pci_controller;
+extern void setup_m8260_indirect_pci(struct pci_controller* hose,
+                                        u32 cfg_addr, u32 cfg_data);
+#else
+#define setup_m8260_indirect_pci setup_indirect_pci
+#endif
+
+#endif /* _PPC_KERNEL_M8260_PCI_H */
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 9d4ed68b5804..000ba47c67cb 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -275,7 +275,7 @@ static void __init openpic_enable_sie(void)
 }
 #endif
 
-#if defined(CONFIG_EPIC_SERIAL_MODE) || defined(CONFIG_PM)
+#if defined(CONFIG_EPIC_SERIAL_MODE)
 static void openpic_reset(void)
 {
         openpic_setfield(&OpenPIC->Global.Global_Configuration0,
@@ -993,8 +993,6 @@ int openpic_resume(struct sys_device *sysdev)
                 return 0;
         }
 
-        openpic_reset();
-
         /* OpenPIC sometimes seem to need some time to be fully back up... */
         do {
                 openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index c28f9d679484..843cf8873e60 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -29,6 +29,7 @@
 #include <asm/mmu.h>
 #include <asm/ppc_sys.h>
 #include <asm/kgdb.h>
+#include <asm/delay.h>
 
 #include <syslib/ppc83xx_setup.h>
 
@@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
 void
 mpc83xx_restart(char *cmd)
 {
+        volatile unsigned char __iomem *reg;
+        unsigned char tmp;
+
+        reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
+
         local_irq_disable();
+
+        /*
+         * Unlock the BCSR bits so a PRST will update the contents.
+         * Otherwise the reset asserts but doesn't clear.
+         */
+        tmp = in_8(reg + BCSR_MISC_REG3_OFF);
+        tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
+        out_8(reg + BCSR_MISC_REG3_OFF, tmp);
+
+        /*
+         * Trigger a reset via a low->high transition of the
+         * PORESET bit.
+         */
+        tmp = in_8(reg + BCSR_MISC_REG2_OFF);
+        tmp &= ~BCSR_MISC_REG2_PORESET;
+        out_8(reg + BCSR_MISC_REG2_OFF, tmp);
+
+        udelay(1);
+
+        tmp |= BCSR_MISC_REG2_PORESET;
+        out_8(reg + BCSR_MISC_REG2_OFF, tmp);
+
         for(;;);
 }
 
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index 152c3ef1312a..f3277f469e78 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -132,6 +132,12 @@ mpc85xx_halt(void)
 }
 
 #ifdef CONFIG_PCI
+
+#if defined(CONFIG_MPC8555_CDS)
+extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
+extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
+#endif
+
 static void __init
 mpc85xx_setup_pci1(struct pci_controller *hose)
 {
@@ -302,8 +308,18 @@ mpc85xx_setup_hose(void)
 
         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 
+#if defined(CONFIG_MPC8555_CDS)
+        /* Pre pciauto_bus_scan VIA init */
+        mpc85xx_cds_enable_via(hose_a);
+#endif
+
         hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
 
+#if defined(CONFIG_MPC8555_CDS)
+        /* Post pciauto_bus_scan VIA fixup */
+        mpc85xx_cds_fixup_via(hose_a);
+#endif
+
 #ifdef CONFIG_85xx_PCI2
         hose_b = pcibios_alloc_controller();
 
diff --git a/arch/um/Kconfig.debug b/arch/um/Kconfig.debug
index b89989de364d..bd41e4286d0d 100644
--- a/arch/um/Kconfig.debug
+++ b/arch/um/Kconfig.debug
@@ -2,10 +2,6 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
-config FRAME_POINTER
-        bool
-        default y if DEBUG_INFO
-
 config PT_PROXY
         bool "Enable ptrace proxy"
         depends on XTERM_CHAN && DEBUG_INFO && MODE_TT
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index d43e9fab05a7..f9e22198e011 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -1,5 +1,10 @@
-/* Much of this ripped from hw_random.c */
-
+/* Copyright (C) 2005 Jeff Dike <jdike@addtoit.com> */
+/* Much of this ripped from drivers/char/hw_random.c, see there for other
+ * copyright.
+ *
+ * This software may be used and distributed according to the terms
+ * of the GNU General Public License, incorporated herein by reference.
+ */
 #include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/miscdevice.h>
@@ -12,8 +17,6 @@
  */
 #define RNG_VERSION "1.0.0"
 #define RNG_MODULE_NAME "random"
-#define RNG_DRIVER_NAME   RNG_MODULE_NAME " virtual driver " RNG_VERSION
-#define PFX RNG_MODULE_NAME ": "
 
 #define RNG_MISCDEV_MINOR               183 /* official */
 
@@ -98,7 +101,7 @@ static int __init rng_init (void)
 
         err = misc_register (&rng_miscdev);
         if (err) {
-                printk (KERN_ERR PFX "misc device register failed\n");
+                printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n");
                 goto err_out_cleanup_hw;
         }
 
@@ -120,3 +123,6 @@ static void __exit rng_cleanup (void)
 
 module_init (rng_init);
 module_exit (rng_cleanup);
+
+MODULE_DESCRIPTION("UML Host Random Number Generator (RNG) driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c
index a2bac429f3d4..b32a77010fbe 100644
--- a/arch/um/drivers/ssl.c
+++ b/arch/um/drivers/ssl.c
@@ -22,7 +22,6 @@
 #include "init.h"
 #include "irq_user.h"
 #include "mconsole_kern.h"
-#include "2_5compat.h"
 
 static int ssl_version = 1;
 
diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c
index 361d0be342b3..afbe1e71ed83 100644
--- a/arch/um/drivers/stdio_console.c
+++ b/arch/um/drivers/stdio_console.c
@@ -28,7 +28,6 @@
 #include "irq_user.h"
 #include "mconsole_kern.h"
 #include "init.h"
-#include "2_5compat.h"
 
 #define MAX_TTYS (16)
 
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 88f956c34fed..2a7f6892c55c 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -49,7 +49,6 @@
 #include "irq_user.h"
 #include "irq_kern.h"
 #include "ubd_user.h"
-#include "2_5compat.h"
 #include "os.h"
 #include "mem.h"
 #include "mem_kern.h"
@@ -440,9 +439,9 @@ static int udb_setup(char *str)
 __setup("udb", udb_setup);
 __uml_help(udb_setup,
 "udb\n"
-"    This option is here solely to catch ubd -> udb typos, which can be\n\n"
-"    to impossible to catch visually unless you specifically look for\n\n"
-"    them.  The only result of any option starting with 'udb' is an error\n\n"
+"    This option is here solely to catch ubd -> udb typos, which can be\n"
+"    to impossible to catch visually unless you specifically look for\n"
+"    them.  The only result of any option starting with 'udb' is an error\n"
 "    in the boot output.\n\n"
 );
 
diff --git a/arch/um/include/2_5compat.h b/arch/um/include/2_5compat.h
deleted file mode 100644
index abdb015a4d71..000000000000
--- a/arch/um/include/2_5compat.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* 
- * Copyright (C) 2001 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#ifndef __2_5_COMPAT_H__
-#define __2_5_COMPAT_H__
-
-#define INIT_HARDSECT(arr, maj, sizes)
-
-#define SET_PRI(task) do ; while(0)
-
-#endif
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/include/sysrq.h b/arch/um/include/sysrq.h
index 2ce9423460b3..c8d332b56b98 100644
--- a/arch/um/include/sysrq.h
+++ b/arch/um/include/sysrq.h
@@ -1,6 +1,7 @@
 #ifndef __UM_SYSRQ_H
 #define __UM_SYSRQ_H
 
-extern void show_trace(unsigned long *stack);
+struct task_struct;
+extern void show_trace(struct task_struct* task, unsigned long *stack);
 
 #endif
diff --git a/arch/um/kernel/exec_kern.c b/arch/um/kernel/exec_kern.c
index 49ddabe69be7..efd222ffe20e 100644
--- a/arch/um/kernel/exec_kern.c
+++ b/arch/um/kernel/exec_kern.c
@@ -16,7 +16,6 @@
 #include "kern.h"
 #include "irq_user.h"
 #include "tlb.h"
-#include "2_5compat.h"
 #include "os.h"
 #include "time_user.h"
 #include "choose-mode.h"
diff --git a/arch/um/kernel/initrd_kern.c b/arch/um/kernel/initrd_kern.c
deleted file mode 100644
index fc568af468b9..000000000000
--- a/arch/um/kernel/initrd_kern.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include "linux/init.h"
-#include "linux/bootmem.h"
-#include "linux/initrd.h"
-#include "asm/types.h"
-#include "user_util.h"
-#include "kern_util.h"
-#include "initrd.h"
-#include "init.h"
-#include "os.h"
-
-/* Changed by uml_initrd_setup, which is a setup */
-static char *initrd __initdata = NULL;
-
-static int __init read_initrd(void)
-{
-        void *area;
-        long long size;
-        int err;
-
-        if(initrd == NULL) return 0;
-        err = os_file_size(initrd, &size);
-        if(err) return 0;
-        area = alloc_bootmem(size);
-        if(area == NULL) return 0;
-        if(load_initrd(initrd, area, size) == -1) return 0;
-        initrd_start = (unsigned long) area;
-        initrd_end = initrd_start + size;
-        return 0;
-}
-
-__uml_postsetup(read_initrd);
-
-static int __init uml_initrd_setup(char *line, int *add)
-{
-        initrd = line;
-        return 0;
-}
-
-__uml_setup("initrd=", uml_initrd_setup, 
-"initrd=<initrd image>\n"
-"    This is used to boot UML from an initrd image.  The argument is the\n"
-"    name of the file containing the image.\n\n"
-);
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/kernel/initrd_user.c b/arch/um/kernel/initrd_user.c
deleted file mode 100644
index cb90681e151c..000000000000
--- a/arch/um/kernel/initrd_user.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <errno.h>
-
-#include "user_util.h"
-#include "kern_util.h"
-#include "user.h"
-#include "initrd.h"
-#include "os.h"
-
-int load_initrd(char *filename, void *buf, int size)
-{
-        int fd, n;
-
-        fd = os_open_file(filename, of_read(OPENFLAGS()), 0);
-        if(fd < 0){
-                printk("Opening '%s' failed - err = %d\n", filename, -fd);
-                return(-1);
-        }
-        n = os_read_file(fd, buf, size);
-        if(n != size){
-                printk("Read of %d bytes from '%s' failed, err = %d\n", size,
-                       filename, -n);
-                return(-1);
-        }
-
-        os_close_file(fd);
-        return(0);
-}
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/kernel/main.c b/arch/um/kernel/main.c
index a17c49703f9b..e42e6364ca13 100644
--- a/arch/um/kernel/main.c
+++ b/arch/um/kernel/main.c
@@ -71,7 +71,7 @@ static __init void do_uml_initcalls(void)
 
 static void last_ditch_exit(int sig)
 {
-        CHOOSE_MODE(kmalloc_ok = 0, (void) 0);
+        kmalloc_ok = 0;
         signal(SIGINT, SIG_DFL);
         signal(SIGTERM, SIG_DFL);
         signal(SIGHUP, SIG_DFL);
@@ -87,7 +87,7 @@ int main(int argc, char **argv, char **envp)
 {
         char **new_argv;
         sigset_t mask;
-        int ret, i;
+        int ret, i, err;
 
         /* Enable all signals except SIGIO - in some environments, we can
          * enter with some signals blocked
@@ -160,27 +160,29 @@ int main(int argc, char **argv, char **envp)
          */
         change_sig(SIGPROF, 0);
 
-        /* Reboot */
-        if(ret){
-                int err;
-
-                printf("\n");
+        /* This signal stuff used to be in the reboot case.  However,
+         * sometimes a SIGVTALRM can come in when we're halting (reproducably
+         * when writing out gcov information, presumably because that takes
+         * some time) and cause a segfault.
+         */
 
-                /* stop timers and set SIG*ALRM to be ignored */
-                disable_timer();
+        /* stop timers and set SIG*ALRM to be ignored */
+        disable_timer();
 
-                /* disable SIGIO for the fds and set SIGIO to be ignored */
-                err = deactivate_all_fds();
-                if(err)
-                        printf("deactivate_all_fds failed, errno = %d\n",
-                               -err);
+        /* disable SIGIO for the fds and set SIGIO to be ignored */
+        err = deactivate_all_fds();
+        if(err)
+                printf("deactivate_all_fds failed, errno = %d\n", -err);
 
-                /* Let any pending signals fire now.  This ensures
-                 * that they won't be delivered after the exec, when
-                 * they are definitely not expected.
-                 */
-                unblock_signals();
+        /* Let any pending signals fire now.  This ensures
+         * that they won't be delivered after the exec, when
+         * they are definitely not expected.
+         */
+        unblock_signals();
 
+        /* Reboot */
+        if(ret){
+                printf("\n");
                 execvp(new_argv[0], new_argv);
                 perror("Failed to exec kernel");
                 ret = 1;
diff --git a/arch/um/kernel/process_kern.c b/arch/um/kernel/process_kern.c
index c1adf7ba3fd1..804c6bbdf67c 100644
--- a/arch/um/kernel/process_kern.c
+++ b/arch/um/kernel/process_kern.c
@@ -43,7 +43,6 @@
 #include "tlb.h"
 #include "frame_kern.h"
 #include "sigcontext.h"
-#include "2_5compat.h"
 #include "os.h"
 #include "mode.h"
 #include "mode_kern.h"
@@ -55,18 +54,6 @@
  */
 struct cpu_task cpu_tasks[NR_CPUS] = { [0 ... NR_CPUS - 1] = { -1, NULL } };
 
-struct task_struct *get_task(int pid, int require)
-{
-        struct task_struct *ret;
-
-        read_lock(&tasklist_lock);
-        ret = find_task_by_pid(pid);
-        read_unlock(&tasklist_lock);
-
-        if(require && (ret == NULL)) panic("get_task couldn't find a task\n");
-        return(ret);
-}
-
 int external_pid(void *t)
 {
         struct task_struct *task = t ? t : current;
@@ -189,7 +176,6 @@ void default_idle(void)
 
         while(1){
                 /* endless idle loop with no priority at all */
-                SET_PRI(current);
 
                 /*
                  * although we are an idle CPU, we do not want to
@@ -212,11 +198,6 @@ int page_size(void)
         return(PAGE_SIZE);
 }
 
-unsigned long page_mask(void)
-{
-        return(PAGE_MASK);
-}
-
 void *um_virt_to_phys(struct task_struct *task, unsigned long addr, 
                       pte_t *pte_out)
 {
@@ -349,11 +330,6 @@ char *uml_strdup(char *string)
         return(new);
 }
 
-void *get_init_task(void)
-{
-        return(&init_thread_union.thread_info.task);
-}
-
 int copy_to_user_proc(void __user *to, void *from, int size)
 {
         return(copy_to_user(to, from, size));
@@ -480,15 +456,3 @@ unsigned long arch_align_stack(unsigned long sp)
         return sp & ~0xf;
 }
 #endif
-
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 2925e15324de..71af4d503899 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -322,11 +322,9 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
                                             UPT_SYSCALL_ARG2(regs),
                                             UPT_SYSCALL_ARG3(regs),
                                             UPT_SYSCALL_ARG4(regs));
-                else {
-                        int res = UPT_SYSCALL_RET(regs);
-                        audit_syscall_exit(current, AUDITSC_RESULT(res),
-                                           res);
-                }
+                else audit_syscall_exit(current,
+                                        AUDITSC_RESULT(UPT_SYSCALL_RET(regs)),
+                                        UPT_SYSCALL_RET(regs));
         }
 
         /* Fake a debug trap */
@@ -356,14 +354,3 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
                 current->exit_code = 0;
         }
 }
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/kernel/sysrq.c b/arch/um/kernel/sysrq.c
index e630438f9e73..f80850091e79 100644
--- a/arch/um/kernel/sysrq.c
+++ b/arch/um/kernel/sysrq.c
@@ -3,6 +3,7 @@
  * Licensed under the GPL
  */
 
+#include "linux/config.h"
 #include "linux/sched.h"
 #include "linux/kernel.h"
 #include "linux/module.h"
@@ -12,14 +13,14 @@
 #include "sysrq.h"
 #include "user_util.h"
 
-void show_trace(unsigned long * stack)
+/* Catch non-i386 SUBARCH's. */
+#if !defined(CONFIG_UML_X86) || defined(CONFIG_64BIT)
+void show_trace(struct task_struct *task, unsigned long * stack)
 {
-        /* XXX: Copy the CONFIG_FRAME_POINTER stack-walking backtrace from
-         * arch/i386/kernel/traps.c, and then move this to sys-i386/sysrq.c.*/
         unsigned long addr;
 
         if (!stack) {
-                stack = (unsigned long*) &stack;
+                stack = (unsigned long*) &stack;
                 WARN_ON(1);
         }
 
@@ -35,6 +36,7 @@ void show_trace(unsigned long * stack)
         }
         printk("\n");
 }
+#endif
 
 /*
  * stack dumps generator - this is used by arch-independent code.
@@ -44,7 +46,7 @@ void dump_stack(void)
 {
         unsigned long stack;
 
-        show_trace(&stack);
+        show_trace(current, &stack);
 }
 EXPORT_SYMBOL(dump_stack);
 
@@ -59,7 +61,11 @@ void show_stack(struct task_struct *task, unsigned long *esp)
         int i;
 
         if (esp == NULL) {
-                if (task != current) {
+                if (task != current && task != NULL) {
+                        /* XXX: Isn't this bogus? I.e. isn't this the
+                         * *userspace* stack of this task? If not so, use this
+                         * even when task == current (as in i386).
+                         */
                         esp = (unsigned long *) KSTK_ESP(task);
                         /* Which one? No actual difference - just coding style.*/
                         //esp = (unsigned long *) PT_REGS_IP(&task->thread.regs);
@@ -77,5 +83,6 @@ void show_stack(struct task_struct *task, unsigned long *esp)
                 printk("%08lx ", *stack++);
         }
 
-        show_trace(esp);
+        printk("Call Trace: \n");
+        show_trace(current, esp);
 }
diff --git a/arch/um/kernel/trap_kern.c b/arch/um/kernel/trap_kern.c
index 1de22d8a313a..c20aef120598 100644
--- a/arch/um/kernel/trap_kern.c
+++ b/arch/um/kernel/trap_kern.c
@@ -23,7 +23,6 @@
 #include "kern.h"
 #include "chan_kern.h"
 #include "mconsole_kern.h"
-#include "2_5compat.h"
 #include "mem.h"
 #include "mem_kern.h"
 
diff --git a/arch/um/kernel/tt/process_kern.c b/arch/um/kernel/tt/process_kern.c
index df810ca8fc12..776310fd5b8b 100644
--- a/arch/um/kernel/tt/process_kern.c
+++ b/arch/um/kernel/tt/process_kern.c
@@ -32,10 +32,6 @@ void *switch_to_tt(void *prev, void *next, void *last)
         unsigned long flags;
         int err, vtalrm, alrm, prof, cpu;
         char c;
-        /* jailing and SMP are incompatible, so this doesn't need to be 
-         * made per-cpu 
-         */
-        static int reading;
 
         from = prev;
         to = next;
@@ -59,13 +55,11 @@ void *switch_to_tt(void *prev, void *next, void *last)
         c = 0;
         set_current(to);
 
-        reading = 0;
         err = os_write_file(to->thread.mode.tt.switch_pipe[1], &c, sizeof(c));
         if(err != sizeof(c))
                 panic("write of switch_pipe failed, err = %d", -err);
 
-        reading = 1;
-        if(from->thread.mode.tt.switch_pipe[0] == -1)
+        if(from->thread.mode.tt.switch_pipe[0] == -1)
                 os_kill_process(os_getpid(), 0);
 
         err = os_read_file(from->thread.mode.tt.switch_pipe[0], &c, sizeof(c));
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 4d10ec372a67..418427107b29 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -111,12 +111,6 @@ struct seq_operations cpuinfo_op = {
         .show   = show_cpuinfo,
 };
 
-pte_t * __bad_pagetable(void)
-{
-        panic("Someone should implement __bad_pagetable");
-        return(NULL);
-}
-
 /* Set in linux_main */
 unsigned long host_task_size;
 unsigned long task_size;
diff --git a/arch/um/sys-i386/sysrq.c b/arch/um/sys-i386/sysrq.c
index 281fc7b8ca00..e3706d15c4f5 100644
--- a/arch/um/sys-i386/sysrq.c
+++ b/arch/um/sys-i386/sysrq.c
@@ -3,12 +3,15 @@
  * Licensed under the GPL
  */
 
+#include "linux/config.h"
 #include "linux/kernel.h"
 #include "linux/smp.h"
 #include "linux/sched.h"
+#include "linux/kallsyms.h"
 #include "asm/ptrace.h"
 #include "sysrq.h"
 
+/* This is declared by <linux/sched.h> */
 void show_regs(struct pt_regs *regs)
 {
         printk("\n");
@@ -31,5 +34,80 @@ void show_regs(struct pt_regs *regs)
                0xffff & PT_REGS_DS(regs), 
                0xffff & PT_REGS_ES(regs));
 
-        show_trace((unsigned long *) &regs);
+        show_trace(NULL, (unsigned long *) &regs);
 }
+
+/* Copied from i386. */
+static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
+{
+        return  p > (void *)tinfo &&
+                p < (void *)tinfo + THREAD_SIZE - 3;
+}
+
+/* Adapted from i386 (we also print the address we read from). */
+static inline unsigned long print_context_stack(struct thread_info *tinfo,
+                                unsigned long *stack, unsigned long ebp)
+{
+        unsigned long addr;
+
+#ifdef CONFIG_FRAME_POINTER
+        while (valid_stack_ptr(tinfo, (void *)ebp)) {
+                addr = *(unsigned long *)(ebp + 4);
+                printk("%08lx:  [<%08lx>]", ebp + 4, addr);
+                print_symbol(" %s", addr);
+                printk("\n");
+                ebp = *(unsigned long *)ebp;
+        }
+#else
+        while (valid_stack_ptr(tinfo, stack)) {
+                addr = *stack;
+                if (__kernel_text_address(addr)) {
+                        printk("%08lx:  [<%08lx>]", (unsigned long) stack, addr);
+                        print_symbol(" %s", addr);
+                        printk("\n");
+                }
+                stack++;
+        }
+#endif
+        return ebp;
+}
+
+void show_trace(struct task_struct* task, unsigned long * stack)
+{
+        unsigned long ebp;
+        struct thread_info *context;
+
+        /* Turn this into BUG_ON if possible. */
+        if (!stack) {
+                stack = (unsigned long*) &stack;
+                printk("show_trace: got NULL stack, implicit assumption task == current");
+                WARN_ON(1);
+        }
+
+        if (!task)
+                task = current;
+
+        if (task != current) {
+                //ebp = (unsigned long) KSTK_EBP(task);
+                /* Which one? No actual difference - just coding style.*/
+                ebp = (unsigned long) PT_REGS_EBP(&task->thread.regs);
+        } else {
+                asm ("movl %%ebp, %0" : "=r" (ebp) : );
+        }
+
+        context = (struct thread_info *)
+                ((unsigned long)stack & (~(THREAD_SIZE - 1)));
+        print_context_stack(context, stack, ebp);
+
+        /*while (((long) stack & (THREAD_SIZE-1)) != 0) {
+                addr = *stack;
+                if (__kernel_text_address(addr)) {
+                        printk("%08lx:  [<%08lx>]", (unsigned long) stack, addr);
+                        print_symbol(" %s", addr);
+                        printk("\n");
+                }
+                stack++;
+        }*/
+        printk("\n");
+}
+
diff --git a/arch/um/sys-ppc/sysrq.c b/arch/um/sys-ppc/sysrq.c
index 82d6e9335bb6..2f816f1a0ff4 100644
--- a/arch/um/sys-ppc/sysrq.c
+++ b/arch/um/sys-ppc/sysrq.c
@@ -27,17 +27,5 @@ void show_regs(struct pt_regs_subarch *regs)
                 0xffff & regs->xds, 0xffff & regs->xes);
 #endif
 
-        show_trace(&regs->gpr[1]);
+        show_trace(current, &regs->gpr[1]);
 }
-
-
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index d4a59657fb99..6f44f40204ed 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -133,23 +133,27 @@ static long arch_prctl_tt(int code, unsigned long addr)
 
 #ifdef CONFIG_MODE_SKAS
 
+/* XXX: Must also call arch_prctl in the host, beside saving the segment bases! */
 static long arch_prctl_skas(int code, unsigned long addr)
 {
         long ret = 0;
 
         switch(code){
-        case ARCH_SET_GS:
-                current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
-                break;
         case ARCH_SET_FS:
                 current->thread.regs.regs.skas.regs[FS_BASE / sizeof(unsigned long)] = addr;
                 break;
+        case ARCH_SET_GS:
+                current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
+                break;
         case ARCH_GET_FS:
-                ret = put_user(current->thread.regs.regs.skas.regs[GS / sizeof(unsigned long)], &addr);
+                ret = put_user(current->thread.regs.regs.skas.
+                                regs[FS_BASE / sizeof(unsigned long)],
+                                (unsigned long __user *)addr);
                 break;
         case ARCH_GET_GS:
-                ret = put_user(current->thread.regs.regs.skas.regs[FS / sizeof(unsigned \
-long)], &addr);
+                ret = put_user(current->thread.regs.regs.skas.
+                                regs[GS_BASE / sizeof(unsigned long)],
+                                (unsigned long __user *)addr);
                 break;
         default:
                 ret = -EINVAL;
diff --git a/arch/um/sys-x86_64/sysrq.c b/arch/um/sys-x86_64/sysrq.c
index ddf74691a610..d0a25af19a5b 100644
--- a/arch/um/sys-x86_64/sysrq.c
+++ b/arch/um/sys-x86_64/sysrq.c
@@ -36,14 +36,5 @@ void __show_regs(struct pt_regs * regs)
 void show_regs(struct pt_regs *regs)
 {
         __show_regs(regs);
-        show_trace((unsigned long *) &regs);
+        show_trace(current, (unsigned long *) &regs);
 }
-
-/* Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 82cb2a3f127a..0f430d9d3632 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -421,7 +421,7 @@ config PCI_DIRECT
 
 config PCI_MMCONFIG
         bool "Support mmconfig PCI config space access"
-        depends on PCI
+        depends on PCI && ACPI
         select ACPI_BOOT
 
 config UNORDERED_IO
diff --git a/arch/x86_64/kernel/signal.c b/arch/x86_64/kernel/signal.c
index 3fdcdba0fec5..429c0269dc4e 100644
--- a/arch/x86_64/kernel/signal.c
+++ b/arch/x86_64/kernel/signal.c
@@ -28,6 +28,7 @@
 #include <asm/uaccess.h>
 #include <asm/i387.h>
 #include <asm/proto.h>
+#include <asm/ia32_unistd.h>
 
 /* #define DEBUG_SIG 1 */
 
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 0400a52d5085..670fdb5142d1 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -40,13 +40,12 @@ config ACPI
           available at:
           <http://www.acpi.info>
 
+if ACPI
+
 config ACPI_BOOT
         bool
-        depends on ACPI || X86_HT
         default y
 
-if ACPI
-
 config ACPI_INTERPRETER
         bool
         depends on !IA64_SGI_SN
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index 12b0eea63407..8093f2e00321 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -391,7 +391,6 @@ acpi_pci_irq_enable (
         u8                      pin = 0;
         int                     edge_level = ACPI_LEVEL_SENSITIVE;
         int                     active_high_low = ACPI_ACTIVE_LOW;
-        extern int              via_interrupt_line_quirk;
         char                    *link = NULL;
 
         ACPI_FUNCTION_TRACE("acpi_pci_irq_enable");
@@ -444,9 +443,6 @@ acpi_pci_irq_enable (
                 }
         }
 
-        if (via_interrupt_line_quirk)
-                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq & 15);
-
         dev->irq = acpi_register_gsi(irq, edge_level, active_high_low);
 
         printk(KERN_INFO PREFIX "PCI Interrupt %s[%c] -> ",
diff --git a/drivers/cdrom/viocd.c b/drivers/cdrom/viocd.c
index fcca26c89bbc..38dd9ffbe8bc 100644
--- a/drivers/cdrom/viocd.c
+++ b/drivers/cdrom/viocd.c
@@ -488,6 +488,20 @@ static int viocd_packet(struct cdrom_device_info *cdi,
                                          & (CDC_DVD_RAM | CDC_RAM)) != 0;
                 }
                 break;
+        case GPCMD_GET_CONFIGURATION:
+                if (cgc->cmd[3] == CDF_RWRT) {
+                        struct rwrt_feature_desc *rfd = (struct rwrt_feature_desc *)(cgc->buffer + sizeof(struct feature_header));
+
+                        if ((buflen >=
+                             (sizeof(struct feature_header) + sizeof(*rfd))) &&
+                            (cdi->ops->capability & ~cdi->mask
+                             & (CDC_DVD_RAM | CDC_RAM))) {
+                                rfd->feature_code = cpu_to_be16(CDF_RWRT);
+                                rfd->curr = 1;
+                                ret = 0;
+                        }
+                }
+                break;
         default:
                 if (cgc->sense) {
                         /* indicate Unknown code */
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 4f7ce7056228..78e3e7b24d7d 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -1932,8 +1932,11 @@ static ide_startstop_t cdrom_do_block_pc(ide_drive_t *drive, struct request *rq)
 
                 /*
                  * check if dma is safe
+                 *
+                 * NOTE! The "len" and "addr" checks should possibly have
+                 * separate masks.
                  */
-                if ((rq->data_len & 3) || (addr & mask))
+                if ((rq->data_len & mask) || (addr & mask))
                         info->dma = 0;
         }
 
@@ -3255,16 +3258,12 @@ sector_t ide_cdrom_capacity (ide_drive_t *drive)
         return capacity * sectors_per_frame;
 }
 
-static
-int ide_cdrom_cleanup(ide_drive_t *drive)
+static int ide_cd_remove(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         struct cdrom_info *info = drive->driver_data;
 
-        if (ide_unregister_subdriver(drive)) {
-                printk(KERN_ERR "%s: %s: failed to ide_unregister_subdriver\n",
-                        __FUNCTION__, drive->name);
-                return 1;
-        }
+        ide_unregister_subdriver(drive, info->driver);
 
         del_gendisk(info->disk);
 
@@ -3297,7 +3296,7 @@ static void ide_cd_release(struct kref *kref)
         kfree(info);
 }
 
-static int ide_cdrom_attach (ide_drive_t *drive);
+static int ide_cd_probe(struct device *);
 
 #ifdef CONFIG_PROC_FS
 static int proc_idecd_read_capacity
@@ -3320,19 +3319,20 @@ static ide_proc_entry_t idecd_proc[] = {
 
 static ide_driver_t ide_cdrom_driver = {
         .owner                  = THIS_MODULE,
-        .name                   = "ide-cdrom",
+        .gen_driver = {
+                .name           = "ide-cdrom",
+                .bus            = &ide_bus_type,
+                .probe          = ide_cd_probe,
+                .remove         = ide_cd_remove,
+        },
         .version                = IDECD_VERSION,
         .media                  = ide_cdrom,
-        .busy                   = 0,
         .supports_dsc_overlap   = 1,
-        .cleanup                = ide_cdrom_cleanup,
         .do_request             = ide_do_rw_cdrom,
         .end_request            = ide_end_request,
         .error                  = __ide_error,
         .abort                  = __ide_abort,
         .proc                   = idecd_proc,
-        .attach                 = ide_cdrom_attach,
-        .drives                 = LIST_HEAD_INIT(ide_cdrom_driver.drives),
 };
 
 static int idecd_open(struct inode * inode, struct file * file)
@@ -3418,8 +3418,9 @@ static char *ignore = NULL;
 module_param(ignore, charp, 0400);
 MODULE_DESCRIPTION("ATAPI CD-ROM Driver");
 
-static int ide_cdrom_attach (ide_drive_t *drive)
+static int ide_cd_probe(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         struct cdrom_info *info;
         struct gendisk *g;
         struct request_sense sense;
@@ -3453,11 +3454,8 @@ static int ide_cdrom_attach (ide_drive_t *drive)
 
         ide_init_disk(g, drive);
 
-        if (ide_register_subdriver(drive, &ide_cdrom_driver)) {
-                printk(KERN_ERR "%s: Failed to register the driver with ide.c\n",
-                        drive->name);
-                goto out_put_disk;
-        }
+        ide_register_subdriver(drive, &ide_cdrom_driver);
+
         memset(info, 0, sizeof (struct cdrom_info));
 
         kref_init(&info->kref);
@@ -3470,7 +3468,6 @@ static int ide_cdrom_attach (ide_drive_t *drive)
 
         drive->driver_data = info;
 
-        DRIVER(drive)->busy++;
         g->minors = 1;
         snprintf(g->devfs_name, sizeof(g->devfs_name),
                         "%s/cd", drive->devfs_name);
@@ -3478,8 +3475,7 @@ static int ide_cdrom_attach (ide_drive_t *drive)
         g->flags = GENHD_FL_CD | GENHD_FL_REMOVABLE;
         if (ide_cdrom_setup(drive)) {
                 struct cdrom_device_info *devinfo = &info->devinfo;
-                DRIVER(drive)->busy--;
-                ide_unregister_subdriver(drive);
+                ide_unregister_subdriver(drive, &ide_cdrom_driver);
                 if (info->buffer != NULL)
                         kfree(info->buffer);
                 if (info->toc != NULL)
@@ -3492,7 +3488,6 @@ static int ide_cdrom_attach (ide_drive_t *drive)
                 drive->driver_data = NULL;
                 goto failed;
         }
-        DRIVER(drive)->busy--;
 
         cdrom_read_toc(drive, &sense);
         g->fops = &idecd_ops;
@@ -3500,23 +3495,20 @@ static int ide_cdrom_attach (ide_drive_t *drive)
         add_disk(g);
         return 0;
 
-out_put_disk:
-        put_disk(g);
 out_free_cd:
         kfree(info);
 failed:
-        return 1;
+        return -ENODEV;
 }
 
 static void __exit ide_cdrom_exit(void)
 {
-        ide_unregister_driver(&ide_cdrom_driver);
+        driver_unregister(&ide_cdrom_driver.gen_driver);
 }
  
 static int ide_cdrom_init(void)
 {
-        ide_register_driver(&ide_cdrom_driver);
-        return 0;
+        return driver_register(&ide_cdrom_driver.gen_driver);
 }
 
 module_init(ide_cdrom_init);
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
index 5d54f7756100..3302cd8eab4c 100644
--- a/drivers/ide/ide-disk.c
+++ b/drivers/ide/ide-disk.c
@@ -1024,14 +1024,16 @@ static void ide_cacheflush_p(ide_drive_t *drive)
                 printk(KERN_INFO "%s: wcache flush failed!\n", drive->name);
 }
 
-static int idedisk_cleanup (ide_drive_t *drive)
+static int ide_disk_remove(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         struct ide_disk_obj *idkp = drive->driver_data;
         struct gendisk *g = idkp->disk;
 
         ide_cacheflush_p(drive);
-        if (ide_unregister_subdriver(drive))
-                return 1;
+
+        ide_unregister_subdriver(drive, idkp->driver);
+
         del_gendisk(g);
 
         ide_disk_put(idkp);
@@ -1052,7 +1054,7 @@ static void ide_disk_release(struct kref *kref)
         kfree(idkp);
 }
 
-static int idedisk_attach(ide_drive_t *drive);
+static int ide_disk_probe(struct device *dev);
 
 static void ide_device_shutdown(struct device *dev)
 {
@@ -1082,27 +1084,23 @@ static void ide_device_shutdown(struct device *dev)
         dev->bus->suspend(dev, PMSG_SUSPEND);
 }
 
-/*
- *      IDE subdriver functions, registered with ide.c
- */
 static ide_driver_t idedisk_driver = {
         .owner                  = THIS_MODULE,
         .gen_driver = {
+                .name           = "ide-disk",
+                .bus            = &ide_bus_type,
+                .probe          = ide_disk_probe,
+                .remove         = ide_disk_remove,
                 .shutdown       = ide_device_shutdown,
         },
-        .name                   = "ide-disk",
         .version                = IDEDISK_VERSION,
         .media                  = ide_disk,
-        .busy                   = 0,
         .supports_dsc_overlap   = 0,
-        .cleanup                = idedisk_cleanup,
         .do_request             = ide_do_rw_disk,
         .end_request            = ide_end_request,
         .error                  = __ide_error,
         .abort                  = __ide_abort,
         .proc                   = idedisk_proc,
-        .attach                 = idedisk_attach,
-        .drives                 = LIST_HEAD_INIT(idedisk_driver.drives),
 };
 
 static int idedisk_open(struct inode *inode, struct file *filp)
@@ -1199,8 +1197,9 @@ static struct block_device_operations idedisk_ops = {
 
 MODULE_DESCRIPTION("ATA DISK Driver");
 
-static int idedisk_attach(ide_drive_t *drive)
+static int ide_disk_probe(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         struct ide_disk_obj *idkp;
         struct gendisk *g;
 
@@ -1222,10 +1221,7 @@ static int idedisk_attach(ide_drive_t *drive)
 
         ide_init_disk(g, drive);
 
-        if (ide_register_subdriver(drive, &idedisk_driver)) {
-                printk (KERN_ERR "ide-disk: %s: Failed to register the driver with ide.c\n", drive->name);
-                goto out_put_disk;
-        }
+        ide_register_subdriver(drive, &idedisk_driver);
 
         memset(idkp, 0, sizeof(*idkp));
 
@@ -1239,7 +1235,6 @@ static int idedisk_attach(ide_drive_t *drive)
 
         drive->driver_data = idkp;
 
-        DRIVER(drive)->busy++;
         idedisk_setup(drive);
         if ((!drive->head || drive->head > 16) && !drive->select.b.lba) {
                 printk(KERN_ERR "%s: INVALID GEOMETRY: %d PHYSICAL HEADS?\n",
@@ -1247,7 +1242,7 @@ static int idedisk_attach(ide_drive_t *drive)
                 drive->attach = 0;
         } else
                 drive->attach = 1;
-        DRIVER(drive)->busy--;
+
         g->minors = 1 << PARTN_BITS;
         strcpy(g->devfs_name, drive->devfs_name);
         g->driverfs_dev = &drive->gendev;
@@ -1257,22 +1252,20 @@ static int idedisk_attach(ide_drive_t *drive)
         add_disk(g);
         return 0;
 
-out_put_disk:
-        put_disk(g);
 out_free_idkp:
         kfree(idkp);
 failed:
-        return 1;
+        return -ENODEV;
 }
 
 static void __exit idedisk_exit (void)
 {
-        ide_unregister_driver(&idedisk_driver);
+        driver_unregister(&idedisk_driver.gen_driver);
 }
 
 static int idedisk_init (void)
 {
-        return ide_register_driver(&idedisk_driver);
+        return driver_register(&idedisk_driver.gen_driver);
 }
 
 module_init(idedisk_init);
diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c
index 36c0b74a4e45..c949e98df4b6 100644
--- a/drivers/ide/ide-floppy.c
+++ b/drivers/ide/ide-floppy.c
@@ -1865,13 +1865,13 @@ static void idefloppy_setup (ide_drive_t *drive, idefloppy_floppy_t *floppy)
         idefloppy_add_settings(drive);
 }
 
-static int idefloppy_cleanup (ide_drive_t *drive)
+static int ide_floppy_remove(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         idefloppy_floppy_t *floppy = drive->driver_data;
         struct gendisk *g = floppy->disk;
 
-        if (ide_unregister_subdriver(drive))
-                return 1;
+        ide_unregister_subdriver(drive, floppy->driver);
 
         del_gendisk(g);
 
@@ -1916,26 +1916,24 @@ static ide_proc_entry_t idefloppy_proc[] = {
 
 #endif  /* CONFIG_PROC_FS */
 
-static int idefloppy_attach(ide_drive_t *drive);
+static int ide_floppy_probe(struct device *);
 
-/*
- *      IDE subdriver functions, registered with ide.c
- */
 static ide_driver_t idefloppy_driver = {
         .owner                  = THIS_MODULE,
-        .name                   = "ide-floppy",
+        .gen_driver = {
+                .name           = "ide-floppy",
+                .bus            = &ide_bus_type,
+                .probe          = ide_floppy_probe,
+                .remove         = ide_floppy_remove,
+        },
         .version                = IDEFLOPPY_VERSION,
         .media                  = ide_floppy,
-        .busy                   = 0,
         .supports_dsc_overlap   = 0,
-        .cleanup                = idefloppy_cleanup,
         .do_request             = idefloppy_do_request,
         .end_request            = idefloppy_do_end_request,
         .error                  = __ide_error,
         .abort                  = __ide_abort,
         .proc                   = idefloppy_proc,
-        .attach                 = idefloppy_attach,
-        .drives                 = LIST_HEAD_INIT(idefloppy_driver.drives),
 };
 
 static int idefloppy_open(struct inode *inode, struct file *filp)
@@ -2122,8 +2120,9 @@ static struct block_device_operations idefloppy_ops = {
         .revalidate_disk= idefloppy_revalidate_disk
 };
 
-static int idefloppy_attach (ide_drive_t *drive)
+static int ide_floppy_probe(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         idefloppy_floppy_t *floppy;
         struct gendisk *g;
 
@@ -2152,10 +2151,7 @@ static int idefloppy_attach (ide_drive_t *drive)
 
         ide_init_disk(g, drive);
 
-        if (ide_register_subdriver(drive, &idefloppy_driver)) {
-                printk (KERN_ERR "ide-floppy: %s: Failed to register the driver with ide.c\n", drive->name);
-                goto out_put_disk;
-        }
+        ide_register_subdriver(drive, &idefloppy_driver);
 
         memset(floppy, 0, sizeof(*floppy));
 
@@ -2169,9 +2165,8 @@ static int idefloppy_attach (ide_drive_t *drive)
 
         drive->driver_data = floppy;
 
-        DRIVER(drive)->busy++;
         idefloppy_setup (drive, floppy);
-        DRIVER(drive)->busy--;
+
         g->minors = 1 << PARTN_BITS;
         g->driverfs_dev = &drive->gendev;
         strcpy(g->devfs_name, drive->devfs_name);
@@ -2181,19 +2176,17 @@ static int idefloppy_attach (ide_drive_t *drive)
         add_disk(g);
         return 0;
 
-out_put_disk:
-        put_disk(g);
 out_free_floppy:
         kfree(floppy);
 failed:
-        return 1;
+        return -ENODEV;
 }
 
 MODULE_DESCRIPTION("ATAPI FLOPPY Driver");
 
 static void __exit idefloppy_exit (void)
 {
-        ide_unregister_driver(&idefloppy_driver);
+        driver_unregister(&idefloppy_driver.gen_driver);
 }
 
 /*
@@ -2202,8 +2195,7 @@ static void __exit idefloppy_exit (void)
 static int idefloppy_init (void)
 {
         printk("ide-floppy driver " IDEFLOPPY_VERSION "\n");
-        ide_register_driver(&idefloppy_driver);
-        return 0;
+        return driver_register(&idefloppy_driver.gen_driver);
 }
 
 module_init(idefloppy_init);
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 554473a95cf7..5d876f53c697 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -47,6 +47,7 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/ide.h>
+#include <linux/devfs_fs_kernel.h>
 #include <linux/spinlock.h>
 #include <linux/kmod.h>
 #include <linux/pci.h>
@@ -696,13 +697,13 @@ static int wait_hwif_ready(ide_hwif_t *hwif)
         SELECT_DRIVE(&hwif->drives[0]);
         hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
         mdelay(2);
-        rc = ide_wait_not_busy(hwif, 10000);
+        rc = ide_wait_not_busy(hwif, 35000);
         if (rc)
                 return rc;
         SELECT_DRIVE(&hwif->drives[1]);
         hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
         mdelay(2);
-        rc = ide_wait_not_busy(hwif, 10000);
+        rc = ide_wait_not_busy(hwif, 35000);
 
         /* Exit function with master reselected (let's be sane) */
         SELECT_DRIVE(&hwif->drives[0]);
@@ -918,7 +919,7 @@ int probe_hwif_init_with_fixup(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif)
                            want them on default or a new "empty" class
                            for hotplug reprobing ? */
                         if (drive->present) {
-                                ata_attach(drive);
+                                device_register(&drive->gendev);
                         }
                 }
         }
@@ -1279,10 +1280,51 @@ void ide_init_disk(struct gendisk *disk, ide_drive_t *drive)
 
 EXPORT_SYMBOL_GPL(ide_init_disk);
 
+static void ide_remove_drive_from_hwgroup(ide_drive_t *drive)
+{
+        ide_hwgroup_t *hwgroup = drive->hwif->hwgroup;
+
+        if (drive == drive->next) {
+                /* special case: last drive from hwgroup. */
+                BUG_ON(hwgroup->drive != drive);
+                hwgroup->drive = NULL;
+        } else {
+                ide_drive_t *walk;
+
+                walk = hwgroup->drive;
+                while (walk->next != drive)
+                        walk = walk->next;
+                walk->next = drive->next;
+                if (hwgroup->drive == drive) {
+                        hwgroup->drive = drive->next;
+                        hwgroup->hwif = hwgroup->drive->hwif;
+                }
+        }
+        BUG_ON(hwgroup->drive == drive);
+}
+
 static void drive_release_dev (struct device *dev)
 {
         ide_drive_t *drive = container_of(dev, ide_drive_t, gendev);
 
+        spin_lock_irq(&ide_lock);
+        if (drive->devfs_name[0] != '\0') {
+                devfs_remove(drive->devfs_name);
+                drive->devfs_name[0] = '\0';
+        }
+        ide_remove_drive_from_hwgroup(drive);
+        if (drive->id != NULL) {
+                kfree(drive->id);
+                drive->id = NULL;
+        }
+        drive->present = 0;
+        /* Messed up locking ... */
+        spin_unlock_irq(&ide_lock);
+        blk_cleanup_queue(drive->queue);
+        spin_lock_irq(&ide_lock);
+        drive->queue = NULL;
+        spin_unlock_irq(&ide_lock);
+
         up(&drive->gendev_rel_sem);
 }
 
@@ -1306,7 +1348,6 @@ static void init_gendisk (ide_hwif_t *hwif)
                 drive->gendev.driver_data = drive;
                 drive->gendev.release = drive_release_dev;
                 if (drive->present) {
-                        device_register(&drive->gendev);
                         sprintf(drive->devfs_name, "ide/host%d/bus%d/target%d/lun%d",
                                 (hwif->channel && hwif->mate) ?
                                 hwif->mate->index : hwif->index,
@@ -1412,7 +1453,7 @@ int ideprobe_init (void)
                                 hwif->chipset = ide_generic;
                         for (unit = 0; unit < MAX_DRIVES; ++unit)
                                 if (hwif->drives[unit].present)
-                                        ata_attach(&hwif->drives[unit]);
+                                        device_register(&hwif->drives[unit].gendev);
                 }
         }
         return 0;
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c
index 4b1e43b4118b..4063d2c34e3d 100644
--- a/drivers/ide/ide-proc.c
+++ b/drivers/ide/ide-proc.c
@@ -307,17 +307,41 @@ static int proc_ide_read_driver
         (char *page, char **start, off_t off, int count, int *eof, void *data)
 {
         ide_drive_t     *drive = (ide_drive_t *) data;
-        ide_driver_t    *driver = drive->driver;
+        struct device   *dev = &drive->gendev;
+        ide_driver_t    *ide_drv;
         int             len;
 
-        if (driver) {
+        down_read(&dev->bus->subsys.rwsem);
+        if (dev->driver) {
+                ide_drv = container_of(dev->driver, ide_driver_t, gen_driver);
                 len = sprintf(page, "%s version %s\n",
-                                driver->name, driver->version);
+                                dev->driver->name, ide_drv->version);
         } else
                 len = sprintf(page, "ide-default version 0.9.newide\n");
+        up_read(&dev->bus->subsys.rwsem);
         PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
 }
 
+static int ide_replace_subdriver(ide_drive_t *drive, const char *driver)
+{
+        struct device *dev = &drive->gendev;
+        int ret = 1;
+
+        down_write(&dev->bus->subsys.rwsem);
+        device_release_driver(dev);
+        /* FIXME: device can still be in use by previous driver */
+        strlcpy(drive->driver_req, driver, sizeof(drive->driver_req));
+        device_attach(dev);
+        drive->driver_req[0] = 0;
+        if (dev->driver == NULL)
+                device_attach(dev);
+        if (dev->driver && !strcmp(dev->driver->name, driver))
+                ret = 0;
+        up_write(&dev->bus->subsys.rwsem);
+
+        return ret;
+}
+
 static int proc_ide_write_driver
         (struct file *file, const char __user *buffer, unsigned long count, void *data)
 {
@@ -488,16 +512,32 @@ void destroy_proc_ide_interface(ide_hwif_t *hwif)
         }
 }
 
-extern struct seq_operations ide_drivers_op;
+static int proc_print_driver(struct device_driver *drv, void *data)
+{
+        ide_driver_t *ide_drv = container_of(drv, ide_driver_t, gen_driver);
+        struct seq_file *s = data;
+
+        seq_printf(s, "%s version %s\n", drv->name, ide_drv->version);
+
+        return 0;
+}
+
+static int ide_drivers_show(struct seq_file *s, void *p)
+{
+        bus_for_each_drv(&ide_bus_type, NULL, s, proc_print_driver);
+        return 0;
+}
+
 static int ide_drivers_open(struct inode *inode, struct file *file)
 {
-        return seq_open(file, &ide_drivers_op);
+        return single_open(file, &ide_drivers_show, NULL);
 }
+
 static struct file_operations ide_drivers_operations = {
         .open           = ide_drivers_open,
         .read           = seq_read,
         .llseek         = seq_lseek,
-        .release        = seq_release,
+        .release        = single_release,
 };
 
 void proc_ide_create(void)
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c
index 482544854985..5a3dc46008e6 100644
--- a/drivers/ide/ide-tape.c
+++ b/drivers/ide/ide-tape.c
@@ -4681,21 +4681,12 @@ static void idetape_setup (ide_drive_t *drive, idetape_tape_t *tape, int minor)
         idetape_add_settings(drive);
 }
 
-static int idetape_cleanup (ide_drive_t *drive)
+static int ide_tape_remove(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         idetape_tape_t *tape = drive->driver_data;
-        unsigned long flags;
-
-        spin_lock_irqsave(&ide_lock, flags);
-        if (test_bit(IDETAPE_BUSY, &tape->flags) || drive->usage ||
-            tape->first_stage != NULL || tape->merge_stage_size) {
-                spin_unlock_irqrestore(&ide_lock, flags);
-                return 1;
-        }
 
-        spin_unlock_irqrestore(&ide_lock, flags);
-        DRIVER(drive)->busy = 0;
-        (void) ide_unregister_subdriver(drive);
+        ide_unregister_subdriver(drive, tape->driver);
 
         ide_unregister_region(tape->disk);
 
@@ -4710,6 +4701,8 @@ static void ide_tape_release(struct kref *kref)
         ide_drive_t *drive = tape->drive;
         struct gendisk *g = tape->disk;
 
+        BUG_ON(tape->first_stage != NULL || tape->merge_stage_size);
+
         drive->dsc_overlap = 0;
         drive->driver_data = NULL;
         devfs_remove("%s/mt", drive->devfs_name);
@@ -4747,26 +4740,24 @@ static ide_proc_entry_t idetape_proc[] = {
 
 #endif
 
-static int idetape_attach(ide_drive_t *drive);
+static int ide_tape_probe(struct device *);
 
-/*
- *      IDE subdriver functions, registered with ide.c
- */
 static ide_driver_t idetape_driver = {
         .owner                  = THIS_MODULE,
-        .name                   = "ide-tape",
+        .gen_driver = {
+                .name           = "ide-tape",
+                .bus            = &ide_bus_type,
+                .probe          = ide_tape_probe,
+                .remove         = ide_tape_remove,
+        },
         .version                = IDETAPE_VERSION,
         .media                  = ide_tape,
-        .busy                   = 1,
         .supports_dsc_overlap   = 1,
-        .cleanup                = idetape_cleanup,
         .do_request             = idetape_do_request,
         .end_request            = idetape_end_request,
         .error                  = __ide_error,
         .abort                  = __ide_abort,
         .proc                   = idetape_proc,
-        .attach                 = idetape_attach,
-        .drives                 = LIST_HEAD_INIT(idetape_driver.drives),
 };
 
 /*
@@ -4829,8 +4820,9 @@ static struct block_device_operations idetape_block_ops = {
         .ioctl          = idetape_ioctl,
 };
 
-static int idetape_attach (ide_drive_t *drive)
+static int ide_tape_probe(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         idetape_tape_t *tape;
         struct gendisk *g;
         int minor;
@@ -4865,10 +4857,7 @@ static int idetape_attach (ide_drive_t *drive)
 
         ide_init_disk(g, drive);
 
-        if (ide_register_subdriver(drive, &idetape_driver)) {
-                printk(KERN_ERR "ide-tape: %s: Failed to register the driver with ide.c\n", drive->name);
-                goto out_put_disk;
-        }
+        ide_register_subdriver(drive, &idetape_driver);
 
         memset(tape, 0, sizeof(*tape));
 
@@ -4902,12 +4891,11 @@ static int idetape_attach (ide_drive_t *drive)
         ide_register_region(g);
 
         return 0;
-out_put_disk:
-        put_disk(g);
+
 out_free_tape:
         kfree(tape);
 failed:
-        return 1;
+        return -ENODEV;
 }
 
 MODULE_DESCRIPTION("ATAPI Streaming TAPE Driver");
@@ -4915,7 +4903,7 @@ MODULE_LICENSE("GPL");
 
 static void __exit idetape_exit (void)
 {
-        ide_unregister_driver(&idetape_driver);
+        driver_unregister(&idetape_driver.gen_driver);
         unregister_chrdev(IDETAPE_MAJOR, "ht");
 }
 
@@ -4928,8 +4916,7 @@ static int idetape_init (void)
                 printk(KERN_ERR "ide-tape: Failed to register character device interface\n");
                 return -EBUSY;
         }
-        ide_register_driver(&idetape_driver);
-        return 0;
+        return driver_register(&idetape_driver.gen_driver);
 }
 
 module_init(idetape_init);
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index 973dec799b5c..dae1bd5b8c3e 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -196,8 +196,6 @@ ide_hwif_t ide_hwifs[MAX_HWIFS];	/* master data repository */
 
 EXPORT_SYMBOL(ide_hwifs);
 
-static struct list_head ide_drives = LIST_HEAD_INIT(ide_drives);
-
 /*
  * Do not even *think* about calling this!
  */
@@ -358,54 +356,6 @@ static int ide_system_bus_speed(void)
         return system_bus_speed;
 }
 
-/*
- *      drives_lock protects the list of drives, drivers_lock the
- *      list of drivers.  Currently nobody takes both at once.
- */
-
-static DEFINE_SPINLOCK(drives_lock);
-static DEFINE_SPINLOCK(drivers_lock);
-static LIST_HEAD(drivers);
-
-/* Iterator for the driver list. */
-
-static void *m_start(struct seq_file *m, loff_t *pos)
-{
-        struct list_head *p;
-        loff_t l = *pos;
-        spin_lock(&drivers_lock);
-        list_for_each(p, &drivers)
-                if (!l--)
-                        return list_entry(p, ide_driver_t, drivers);
-        return NULL;
-}
-
-static void *m_next(struct seq_file *m, void *v, loff_t *pos)
-{
-        struct list_head *p = ((ide_driver_t *)v)->drivers.next;
-        (*pos)++;
-        return p==&drivers ? NULL : list_entry(p, ide_driver_t, drivers);
-}
-
-static void m_stop(struct seq_file *m, void *v)
-{
-        spin_unlock(&drivers_lock);
-}
-
-static int show_driver(struct seq_file *m, void *v)
-{
-        ide_driver_t *driver = v;
-        seq_printf(m, "%s version %s\n", driver->name, driver->version);
-        return 0;
-}
-
-struct seq_operations ide_drivers_op = {
-        .start  = m_start,
-        .next   = m_next,
-        .stop   = m_stop,
-        .show   = show_driver
-};
-
 #ifdef CONFIG_PROC_FS
 struct proc_dir_entry *proc_ide_root;
 #endif
@@ -630,7 +580,7 @@ void ide_unregister(unsigned int index)
         ide_hwif_t *hwif, *g;
         static ide_hwif_t tmp_hwif; /* protected by ide_cfg_sem */
         ide_hwgroup_t *hwgroup;
-        int irq_count = 0, unit, i;
+        int irq_count = 0, unit;
 
         BUG_ON(index >= MAX_HWIFS);
 
@@ -643,23 +593,22 @@ void ide_unregister(unsigned int index)
                 goto abort;
         for (unit = 0; unit < MAX_DRIVES; ++unit) {
                 drive = &hwif->drives[unit];
-                if (!drive->present)
+                if (!drive->present) {
+                        if (drive->devfs_name[0] != '\0') {
+                                devfs_remove(drive->devfs_name);
+                                drive->devfs_name[0] = '\0';
+                        }
                         continue;
-                if (drive->usage || DRIVER(drive)->busy)
-                        goto abort;
-                drive->dead = 1;
+                }
+                spin_unlock_irq(&ide_lock);
+                device_unregister(&drive->gendev);
+                down(&drive->gendev_rel_sem);
+                spin_lock_irq(&ide_lock);
         }
         hwif->present = 0;
 
         spin_unlock_irq(&ide_lock);
 
-        for (unit = 0; unit < MAX_DRIVES; ++unit) {
-                drive = &hwif->drives[unit];
-                if (!drive->present)
-                        continue;
-                DRIVER(drive)->cleanup(drive);
-        }
-
         destroy_proc_ide_interface(hwif);
 
         hwgroup = hwif->hwgroup;
@@ -687,44 +636,6 @@ void ide_unregister(unsigned int index)
          * Remove us from the hwgroup, and free
          * the hwgroup if we were the only member
          */
-        for (i = 0; i < MAX_DRIVES; ++i) {
-                drive = &hwif->drives[i];
-                if (drive->devfs_name[0] != '\0') {
-                        devfs_remove(drive->devfs_name);
-                        drive->devfs_name[0] = '\0';
-                }
-                if (!drive->present)
-                        continue;
-                if (drive == drive->next) {
-                        /* special case: last drive from hwgroup. */
-                        BUG_ON(hwgroup->drive != drive);
-                        hwgroup->drive = NULL;
-                } else {
-                        ide_drive_t *walk;
-
-                        walk = hwgroup->drive;
-                        while (walk->next != drive)
-                                walk = walk->next;
-                        walk->next = drive->next;
-                        if (hwgroup->drive == drive) {
-                                hwgroup->drive = drive->next;
-                                hwgroup->hwif = HWIF(hwgroup->drive);
-                        }
-                }
-                BUG_ON(hwgroup->drive == drive);
-                if (drive->id != NULL) {
-                        kfree(drive->id);
-                        drive->id = NULL;
-                }
-                drive->present = 0;
-                /* Messed up locking ... */
-                spin_unlock_irq(&ide_lock);
-                blk_cleanup_queue(drive->queue);
-                device_unregister(&drive->gendev);
-                down(&drive->gendev_rel_sem);
-                spin_lock_irq(&ide_lock);
-                drive->queue = NULL;
-        }
         if (hwif->next == hwif) {
                 BUG_ON(hwgroup->hwif != hwif);
                 kfree(hwgroup);
@@ -1304,73 +1215,6 @@ int system_bus_clock (void)
 
 EXPORT_SYMBOL(system_bus_clock);
 
-/*
- *      Locking is badly broken here - since way back.  That sucker is
- * root-only, but that's not an excuse...  The real question is what
- * exclusion rules do we want here.
- */
-int ide_replace_subdriver (ide_drive_t *drive, const char *driver)
-{
-        if (!drive->present || drive->usage || drive->dead)
-                goto abort;
-        if (DRIVER(drive)->cleanup(drive))
-                goto abort;
-        strlcpy(drive->driver_req, driver, sizeof(drive->driver_req));
-        if (ata_attach(drive)) {
-                spin_lock(&drives_lock);
-                list_del_init(&drive->list);
-                spin_unlock(&drives_lock);
-                drive->driver_req[0] = 0;
-                ata_attach(drive);
-        } else {
-                drive->driver_req[0] = 0;
-        }
-        if (drive->driver && !strcmp(drive->driver->name, driver))
-                return 0;
-abort:
-        return 1;
-}
-
-/**
- *      ata_attach              -       attach an ATA/ATAPI device
- *      @drive: drive to attach
- *
- *      Takes a drive that is as yet not assigned to any midlayer IDE
- *      driver (or is assigned to the default driver) and figures out
- *      which driver would like to own it. If nobody claims the drive
- *      then it is automatically attached to the default driver used for
- *      unclaimed objects.
- *
- *      A return of zero indicates attachment to a driver, of one
- *      attachment to the default driver.
- *
- *      Takes drivers_lock.
- */
-
-int ata_attach(ide_drive_t *drive)
-{
-        struct list_head *p;
-        spin_lock(&drivers_lock);
-        list_for_each(p, &drivers) {
-                ide_driver_t *driver = list_entry(p, ide_driver_t, drivers);
-                if (!try_module_get(driver->owner))
-                        continue;
-                spin_unlock(&drivers_lock);
-                if (driver->attach(drive) == 0) {
-                        module_put(driver->owner);
-                        drive->gendev.driver = &driver->gen_driver;
-                        return 0;
-                }
-                spin_lock(&drivers_lock);
-                module_put(driver->owner);
-        }
-        drive->gendev.driver = NULL;
-        spin_unlock(&drivers_lock);
-        if (ide_register_subdriver(drive, NULL))
-                panic("ide: default attach failed");
-        return 1;
-}
-
 static int generic_ide_suspend(struct device *dev, pm_message_t state)
 {
         ide_drive_t *drive = dev->driver_data;
@@ -2013,27 +1857,11 @@ static void __init probe_for_hwifs (void)
 #endif
 }
 
-int ide_register_subdriver(ide_drive_t *drive, ide_driver_t *driver)
+void ide_register_subdriver(ide_drive_t *drive, ide_driver_t *driver)
 {
-        unsigned long flags;
-
-        spin_lock_irqsave(&ide_lock, flags);
-        if (!drive->present || drive->driver != NULL ||
-            drive->usage || drive->dead) {
-                spin_unlock_irqrestore(&ide_lock, flags);
-                return 1;
-        }
-        drive->driver = driver;
-        spin_unlock_irqrestore(&ide_lock, flags);
-        spin_lock(&drives_lock);
-        list_add_tail(&drive->list, driver ? &driver->drives : &ide_drives);
-        spin_unlock(&drives_lock);
-//      printk(KERN_INFO "%s: attached %s driver.\n", drive->name, driver->name);
 #ifdef CONFIG_PROC_FS
-        if (driver)
-                ide_add_proc_entries(drive->proc, driver->proc, drive);
+        ide_add_proc_entries(drive->proc, driver->proc, drive);
 #endif
-        return 0;
 }
 
 EXPORT_SYMBOL(ide_register_subdriver);
@@ -2041,136 +1869,51 @@ EXPORT_SYMBOL(ide_register_subdriver);
 /**
  *      ide_unregister_subdriver        -       disconnect drive from driver
  *      @drive: drive to unplug
+ *      @driver: driver
  *
  *      Disconnect a drive from the driver it was attached to and then
  *      clean up the various proc files and other objects attached to it.
  *
- *      Takes ide_setting_sem, ide_lock and drives_lock.
+ *      Takes ide_setting_sem and ide_lock.
  *      Caller must hold none of the locks.
- *
- *      No locking versus subdriver unload because we are moving to the
- *      default driver anyway. Wants double checking.
  */
 
-int ide_unregister_subdriver (ide_drive_t *drive)
+void ide_unregister_subdriver(ide_drive_t *drive, ide_driver_t *driver)
 {
         unsigned long flags;
         
         down(&ide_setting_sem);
         spin_lock_irqsave(&ide_lock, flags);
-        if (drive->usage || drive->driver == NULL || DRIVER(drive)->busy) {
-                spin_unlock_irqrestore(&ide_lock, flags);
-                up(&ide_setting_sem);
-                return 1;
-        }
 #ifdef CONFIG_PROC_FS
-        ide_remove_proc_entries(drive->proc, DRIVER(drive)->proc);
+        ide_remove_proc_entries(drive->proc, driver->proc);
 #endif
         auto_remove_settings(drive);
-        drive->driver = NULL;
         spin_unlock_irqrestore(&ide_lock, flags);
         up(&ide_setting_sem);
-        spin_lock(&drives_lock);
-        list_del_init(&drive->list);
-        spin_unlock(&drives_lock);
-        /* drive will be added to &ide_drives in ata_attach() */
-        return 0;
 }
 
 EXPORT_SYMBOL(ide_unregister_subdriver);
 
-static int ide_drive_remove(struct device * dev)
-{
-        ide_drive_t * drive = container_of(dev,ide_drive_t,gendev);
-        DRIVER(drive)->cleanup(drive);
-        return 0;
-}
-
-/**
- *      ide_register_driver     -       register IDE device driver
- *      @driver: the IDE device driver
- *
- *      Register a new device driver and then scan the devices
- *      on the IDE bus in case any should be attached to the
- *      driver we have just registered.  If so attach them.
- *
- *      Takes drivers_lock and drives_lock.
- */
-
-int ide_register_driver(ide_driver_t *driver)
-{
-        struct list_head list;
-        struct list_head *list_loop;
-        struct list_head *tmp_storage;
-
-        spin_lock(&drivers_lock);
-        list_add(&driver->drivers, &drivers);
-        spin_unlock(&drivers_lock);
-
-        INIT_LIST_HEAD(&list);
-        spin_lock(&drives_lock);
-        list_splice_init(&ide_drives, &list);
-        spin_unlock(&drives_lock);
-
-        list_for_each_safe(list_loop, tmp_storage, &list) {
-                ide_drive_t *drive = container_of(list_loop, ide_drive_t, list);
-                list_del_init(&drive->list);
-                if (drive->present)
-                        ata_attach(drive);
-        }
-        driver->gen_driver.name = (char *) driver->name;
-        driver->gen_driver.bus = &ide_bus_type;
-        driver->gen_driver.remove = ide_drive_remove;
-        return driver_register(&driver->gen_driver);
-}
-
-EXPORT_SYMBOL(ide_register_driver);
-
-/**
- *      ide_unregister_driver   -       unregister IDE device driver
- *      @driver: the IDE device driver
- *
- *      Called when a driver module is being unloaded. We reattach any
- *      devices to whatever driver claims them next (typically the default
- *      driver).
- *
- *      Takes drivers_lock and called functions will take ide_setting_sem.
- */
-
-void ide_unregister_driver(ide_driver_t *driver)
-{
-        ide_drive_t *drive;
-
-        spin_lock(&drivers_lock);
-        list_del(&driver->drivers);
-        spin_unlock(&drivers_lock);
-
-        driver_unregister(&driver->gen_driver);
-
-        while(!list_empty(&driver->drives)) {
-                drive = list_entry(driver->drives.next, ide_drive_t, list);
-                if (driver->cleanup(drive)) {
-                        printk(KERN_ERR "%s: cleanup_module() called while still busy\n", drive->name);
-                        BUG();
-                }
-                ata_attach(drive);
-        }
-}
-
-EXPORT_SYMBOL(ide_unregister_driver);
-
 /*
  * Probe module
  */
 
 EXPORT_SYMBOL(ide_lock);
 
+static int ide_bus_match(struct device *dev, struct device_driver *drv)
+{
+        return 1;
+}
+
 struct bus_type ide_bus_type = {
         .name           = "ide",
+        .match          = ide_bus_match,
         .suspend        = generic_ide_suspend,
         .resume         = generic_ide_resume,
 };
 
+EXPORT_SYMBOL_GPL(ide_bus_type);
+
 /*
  * This is gets invoked once during initialization, to set *everything* up
  */
diff --git a/drivers/input/gameport/Kconfig b/drivers/input/gameport/Kconfig
index 6282f460aba0..1d93f5092904 100644
--- a/drivers/input/gameport/Kconfig
+++ b/drivers/input/gameport/Kconfig
@@ -68,23 +68,3 @@ config GAMEPORT_CS461X
         depends on PCI
 
 endif
-
-# Yes, SOUND_GAMEPORT looks a bit odd. Yes, it ends up being turned on
-# in every .config. Please don't touch it. It is here to handle an
-# unusual dependency between GAMEPORT and sound drivers.
-#
-# Some sound drivers call gameport functions. If GAMEPORT is
-# not selected, empty stubs are provided for the functions and all is
-# well.
-# If GAMEPORT is built in, everything is fine.
-# If GAMEPORT is a module, however, it would need to be loaded for the
-# sound driver to be able to link properly. Therefore, the sound
-# driver must be a module as well in that case. Since there's no way
-# to express that directly in Kconfig, we use SOUND_GAMEPORT to
-# express it. SOUND_GAMEPORT boils down to "if GAMEPORT is 'm',
-# anything that depends on SOUND_GAMEPORT must be 'm' as well. if
-# GAMEPORT is 'y' or 'n', it can be anything".
-config SOUND_GAMEPORT
-        tristate
-        default m if GAMEPORT=m
-        default y
diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c
index 7d7527f8b02d..627d343dfba1 100644
--- a/drivers/input/joydev.c
+++ b/drivers/input/joydev.c
@@ -422,7 +422,7 @@ static struct input_handle *joydev_connect(struct input_handler *handler, struct
                         joydev->nkey++;
                 }
 
-        for (i = 0; i < BTN_JOYSTICK - BTN_MISC + 1; i++)
+        for (i = 0; i < BTN_JOYSTICK - BTN_MISC; i++)
                 if (test_bit(i + BTN_MISC, dev->keybit)) {
                         joydev->keymap[i] = joydev->nkey;
                         joydev->keypam[joydev->nkey] = i + BTN_MISC;
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index 79c332f16fc7..af0446c6de82 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -171,9 +171,9 @@ static struct {
         unsigned char set2;
 } atkbd_scroll_keys[] = {
         { ATKBD_SCR_1,     0xc5 },
-        { ATKBD_SCR_2,     0xa9 },
-        { ATKBD_SCR_4,     0xb6 },
-        { ATKBD_SCR_8,     0xa7 },
+        { ATKBD_SCR_2,     0x9d },
+        { ATKBD_SCR_4,     0xa4 },
+        { ATKBD_SCR_8,     0x9b },
         { ATKBD_SCR_CLICK, 0xe0 },
         { ATKBD_SCR_LEFT,  0xcb },
         { ATKBD_SCR_RIGHT, 0xd2 },
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index cd8509549eac..019034b21a0b 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -518,13 +518,16 @@ static int psmouse_probe(struct psmouse *psmouse)
 /*
  * First, we check if it's a mouse. It should send 0x00 or 0x03
  * in case of an IntelliMouse in 4-byte mode or 0x04 for IM Explorer.
+ * Sunrex K8561 IR Keyboard/Mouse reports 0xff on second and subsequent
+ * ID queries, probably due to a firmware bug.
  */
 
         param[0] = 0xa5;
         if (ps2_command(ps2dev, param, PSMOUSE_CMD_GETID))
                 return -1;
 
-        if (param[0] != 0x00 && param[0] != 0x03 && param[0] != 0x04)
+        if (param[0] != 0x00 && param[0] != 0x03 &&
+            param[0] != 0x04 && param[0] != 0xff)
                 return -1;
 
 /*
@@ -972,7 +975,7 @@ static int psmouse_set_maxproto(const char *val, struct kernel_param *kp)
                 return -EINVAL;
 
         if (!strncmp(val, "any", 3)) {
-                *((unsigned int *)kp->arg) = -1UL;
+                *((unsigned int *)kp->arg) = -1U;
                 return 0;
         }
 
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 69832f8fb720..36c721227b68 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -143,39 +143,6 @@ static int synaptics_identify(struct psmouse *psmouse)
         return -1;
 }
 
-static void print_ident(struct synaptics_data *priv)
-{
-        printk(KERN_INFO "Synaptics Touchpad, model: %ld\n", SYN_ID_MODEL(priv->identity));
-        printk(KERN_INFO " Firmware: %ld.%ld\n", SYN_ID_MAJOR(priv->identity),
-               SYN_ID_MINOR(priv->identity));
-        if (SYN_MODEL_ROT180(priv->model_id))
-                printk(KERN_INFO " 180 degree mounted touchpad\n");
-        if (SYN_MODEL_PORTRAIT(priv->model_id))
-                printk(KERN_INFO " portrait touchpad\n");
-        printk(KERN_INFO " Sensor: %ld\n", SYN_MODEL_SENSOR(priv->model_id));
-        if (SYN_MODEL_NEWABS(priv->model_id))
-                printk(KERN_INFO " new absolute packet format\n");
-        if (SYN_MODEL_PEN(priv->model_id))
-                printk(KERN_INFO " pen detection\n");
-
-        if (SYN_CAP_EXTENDED(priv->capabilities)) {
-                printk(KERN_INFO " Touchpad has extended capability bits\n");
-                if (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap))
-                        printk(KERN_INFO " -> %d multi-buttons, i.e. besides standard buttons\n",
-                               (int)(SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap)));
-                if (SYN_CAP_MIDDLE_BUTTON(priv->capabilities))
-                        printk(KERN_INFO " -> middle button\n");
-                if (SYN_CAP_FOUR_BUTTON(priv->capabilities))
-                        printk(KERN_INFO " -> four buttons\n");
-                if (SYN_CAP_MULTIFINGER(priv->capabilities))
-                        printk(KERN_INFO " -> multifinger detection\n");
-                if (SYN_CAP_PALMDETECT(priv->capabilities))
-                        printk(KERN_INFO " -> palm detection\n");
-                if (SYN_CAP_PASS_THROUGH(priv->capabilities))
-                        printk(KERN_INFO " -> pass-through port\n");
-        }
-}
-
 static int synaptics_query_hardware(struct psmouse *psmouse)
 {
         int retries = 0;
@@ -666,7 +633,11 @@ int synaptics_init(struct psmouse *psmouse)
 
         priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS;
 
-        print_ident(priv);
+        printk(KERN_INFO "Synaptics Touchpad, model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx\n",
+                SYN_ID_MODEL(priv->identity),
+                SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity),
+                priv->model_id, priv->capabilities, priv->ext_cap);
+
         set_input_params(&psmouse->dev, priv);
 
         psmouse->protocol_handler = synaptics_process_byte;
diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c
index 564974ce5793..96fb9870834a 100644
--- a/drivers/input/mousedev.c
+++ b/drivers/input/mousedev.c
@@ -101,6 +101,7 @@ struct mousedev_list {
         unsigned char ready, buffer, bufsiz;
         unsigned char imexseq, impsseq;
         enum mousedev_emul mode;
+        unsigned long last_buttons;
 };
 
 #define MOUSEDEV_SEQ_LEN        6
@@ -224,7 +225,7 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h
                 spin_lock_irqsave(&list->packet_lock, flags);
 
                 p = &list->packets[list->head];
-                if (list->ready && p->buttons != packet->buttons) {
+                if (list->ready && p->buttons != mousedev->packet.buttons) {
                         unsigned int new_head = (list->head + 1) % PACKET_QUEUE_LEN;
                         if (new_head != list->tail) {
                                 p = &list->packets[list->head = new_head];
@@ -249,10 +250,13 @@ static void mousedev_notify_readers(struct mousedev *mousedev, struct mousedev_h
                 p->dz += packet->dz;
                 p->buttons = mousedev->packet.buttons;
 
-                list->ready = 1;
+                if (p->dx || p->dy || p->dz || p->buttons != list->last_buttons)
+                        list->ready = 1;
 
                 spin_unlock_irqrestore(&list->packet_lock, flags);
-                kill_fasync(&list->fasync, SIGIO, POLL_IN);
+
+                if (list->ready)
+                        kill_fasync(&list->fasync, SIGIO, POLL_IN);
         }
 
         wake_up_interruptible(&mousedev->wait);
@@ -477,9 +481,10 @@ static void mousedev_packet(struct mousedev_list *list, signed char *ps2_data)
         }
 
         if (!p->dx && !p->dy && !p->dz) {
-                if (list->tail == list->head)
+                if (list->tail == list->head) {
                         list->ready = 0;
-                else
+                        list->last_buttons = p->buttons;
+                } else
                         list->tail = (list->tail + 1) % PACKET_QUEUE_LEN;
         }
 
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index f64867808fea..0487ecbb8a49 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -88,9 +88,11 @@ static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = {
 };
 
 /*
- * Some Fujitsu notebooks are ahving trouble with touhcpads if
+ * Some Fujitsu notebooks are having trouble with touchpads if
  * active multiplexing mode is activated. Luckily they don't have
  * external PS/2 ports so we can safely disable it.
+ * ... apparently some Toshibas don't like MUX mode either and
+ * die horrible death on reboot.
  */
 static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
         {
@@ -115,12 +117,26 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
                 },
         },
         {
+                .ident = "Fujitsu Lifebook S6230",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S6230"),
+                },
+        },
+        {
                 .ident = "Fujitsu T70H",
                 .matches = {
                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
                         DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"),
                 },
         },
+        {
+                .ident = "Toshiba P10",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P10"),
+                },
+        },
         { }
 };
 
@@ -215,11 +231,15 @@ static struct pnp_driver i8042_pnp_aux_driver = {
 
 static void i8042_pnp_exit(void)
 {
-        if (i8042_pnp_kbd_registered)
+        if (i8042_pnp_kbd_registered) {
+                i8042_pnp_kbd_registered = 0;
                 pnp_unregister_driver(&i8042_pnp_kbd_driver);
+        }
 
-        if (i8042_pnp_aux_registered)
+        if (i8042_pnp_aux_registered) {
+                i8042_pnp_aux_registered = 0;
                 pnp_unregister_driver(&i8042_pnp_aux_driver);
+        }
 }
 
 static int i8042_pnp_init(void)
@@ -227,7 +247,7 @@ static int i8042_pnp_init(void)
         int result_kbd, result_aux;
 
         if (i8042_nopnp) {
-                printk("i8042: PNP detection disabled\n");
+                printk(KERN_INFO "i8042: PNP detection disabled\n");
                 return 0;
         }
 
@@ -241,7 +261,7 @@ static int i8042_pnp_init(void)
 #if defined(__ia64__)
                 return -ENODEV;
 #else
-                printk(KERN_WARNING "PNP: No PS/2 controller found. Probing ports directly.\n");
+                printk(KERN_INFO "PNP: No PS/2 controller found. Probing ports directly.\n");
                 return 0;
 #endif
         }
@@ -265,7 +285,7 @@ static int i8042_pnp_init(void)
                 i8042_pnp_kbd_irq = i8042_kbd_irq;
         }
 
-        if (result_aux > 0 && !i8042_pnp_aux_irq) {
+        if (!i8042_pnp_aux_irq) {
                 printk(KERN_WARNING "PNP: PS/2 controller doesn't have AUX irq; using default %#x\n", i8042_aux_irq);
                 i8042_pnp_aux_irq = i8042_aux_irq;
         }
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index 8e63e464d361..5900de3c3f4f 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -698,6 +698,26 @@ static void i8042_timer_func(unsigned long data)
         i8042_interrupt(0, NULL, NULL);
 }
 
+static int i8042_ctl_test(void)
+{
+        unsigned char param;
+
+        if (!i8042_reset)
+                return 0;
+
+        if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
+                printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
+                return -1;
+        }
+
+        if (param != I8042_RET_CTL_TEST) {
+                printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
+                         param, I8042_RET_CTL_TEST);
+                return -1;
+        }
+
+        return 0;
+}
 
 /*
  * i8042_controller init initializes the i8042 controller, and,
@@ -719,21 +739,8 @@ static int i8042_controller_init(void)
                 return -1;
         }
 
-        if (i8042_reset) {
-
-                unsigned char param;
-
-                if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
-                        printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
-                        return -1;
-                }
-
-                if (param != I8042_RET_CTL_TEST) {
-                        printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
-                                 param, I8042_RET_CTL_TEST);
-                        return -1;
-                }
-        }
+        if (i8042_ctl_test())
+                return -1;
 
 /*
  * Save the CTR for restoral on unload / reboot.
@@ -802,15 +809,11 @@ static int i8042_controller_init(void)
  */
 static void i8042_controller_reset(void)
 {
-        unsigned char param;
-
 /*
  * Reset the controller if requested.
  */
 
-        if (i8042_reset)
-                if (i8042_command(&param, I8042_CMD_CTL_TEST))
-                        printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
+        i8042_ctl_test();
 
 /*
  * Disable MUX mode if present.
@@ -922,8 +925,11 @@ static int i8042_resume(struct device *dev, u32 level)
         if (level != RESUME_ENABLE)
                 return 0;
 
-        if (i8042_controller_init()) {
-                printk(KERN_ERR "i8042: resume failed\n");
+        if (i8042_ctl_test())
+                return -1;
+
+        if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
+                printk(KERN_ERR "i8042: Can't write CTR\n");
                 return -1;
         }
 
diff --git a/drivers/input/touchscreen/gunze.c b/drivers/input/touchscreen/gunze.c
index c9d0a153671c..53a27e43dd23 100644
--- a/drivers/input/touchscreen/gunze.c
+++ b/drivers/input/touchscreen/gunze.c
@@ -68,8 +68,7 @@ static void gunze_process_packet(struct gunze* gunze, struct pt_regs *regs)
 
         if (gunze->idx != GUNZE_MAX_LENGTH || gunze->data[5] != ',' ||
                 (gunze->data[0] != 'T' && gunze->data[0] != 'R')) {
-                gunze->data[10] = 0;
-                printk(KERN_WARNING "gunze.c: bad packet: >%s<\n", gunze->data);
+                printk(KERN_WARNING "gunze.c: bad packet: >%.*s<\n", GUNZE_MAX_LENGTH, gunze->data);
                 return;
         }
 
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index e654aa5eecd4..bb9f4044c74d 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -2421,7 +2421,7 @@ pmac_wakeup_devices(void)
 
         /* Re-enable local CPU interrupts */
         local_irq_enable();
-        mdelay(100);
+        mdelay(10);
         preempt_enable();
 
         /* Re-enable clock spreading on some machines */
@@ -2549,7 +2549,9 @@ powerbook_sleep_Core99(void)
                 return ret;
         }
 
-        printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
+        /* Stop environment and ADB interrupts */
+        pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
+        pmu_wait_complete(&req);
 
         /* Tell PMU what events will wake us up */
         pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
@@ -2611,8 +2613,6 @@ powerbook_sleep_Core99(void)
         pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
         pmu_wait_complete(&req);
 
-        printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
-
         pmac_wakeup_devices();
 
         return 0;
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c
index d047e349d706..1339912c308b 100644
--- a/drivers/media/dvb/bt8xx/dst.c
+++ b/drivers/media/dvb/bt8xx/dst.c
@@ -906,22 +906,12 @@ static int dst_tone_power_cmd(struct dst_state* state)
         if (state->dst_type == DST_TYPE_IS_TERR)
                 return 0;
 
-        if (state->voltage == SEC_VOLTAGE_OFF)
-                paket[4] = 0;
-        else
-                paket[4] = 1;
-
-        if (state->tone == SEC_TONE_ON)
-                paket[2] = 0x02;
-        else
-                paket[2] = 0;
-        if (state->minicmd == SEC_MINI_A)
-                paket[3] = 0x02;
-        else
-                paket[3] = 0;
-
+        paket[4] = state->tx_tuna[4];
+        paket[2] = state->tx_tuna[2];
+        paket[3] = state->tx_tuna[3];
         paket[7] = dst_check_sum (paket, 7);
         dst_command(state, paket, 8);
+
         return 0;
 }
 
@@ -980,7 +970,7 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage);
 
 static int dst_write_tuna(struct dvb_frontend* fe)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
         int retval;
         u8 reply;
 
@@ -1048,10 +1038,10 @@ static int dst_write_tuna(struct dvb_frontend* fe)
 
 static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
         u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
 
-        if (state->dst_type == DST_TYPE_IS_TERR)
+        if (state->dst_type != DST_TYPE_IS_SAT)
                 return 0;
 
         if (cmd->msg_len == 0 || cmd->msg_len > 4)
@@ -1064,39 +1054,32 @@ static int dst_set_diseqc(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd*
 
 static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
 {
-        u8 *val;
         int need_cmd;
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         state->voltage = voltage;
 
-        if (state->dst_type == DST_TYPE_IS_TERR)
+        if (state->dst_type != DST_TYPE_IS_SAT)
                 return 0;
 
         need_cmd = 0;
-        val = &state->tx_tuna[0];
-        val[8] &= ~0x40;
         switch (voltage) {
-        case SEC_VOLTAGE_13:
-                if ((state->diseq_flags & HAS_POWER) == 0)
-                        need_cmd = 1;
-                state->diseq_flags |= HAS_POWER;
-                break;
+                case SEC_VOLTAGE_13:
+                case SEC_VOLTAGE_18:
+                        if ((state->diseq_flags & HAS_POWER) == 0)
+                                need_cmd = 1;
+                        state->diseq_flags |= HAS_POWER;
+                        state->tx_tuna[4] = 0x01;
+                        break;
 
-        case SEC_VOLTAGE_18:
-                if ((state->diseq_flags & HAS_POWER) == 0)
+                case SEC_VOLTAGE_OFF:
                         need_cmd = 1;
-                state->diseq_flags |= HAS_POWER;
-                val[8] |= 0x40;
-                break;
-
-        case SEC_VOLTAGE_OFF:
-                need_cmd = 1;
-                state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
-                break;
+                        state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
+                        state->tx_tuna[4] = 0x00;
+                        break;
 
-        default:
-                return -EINVAL;
+                default:
+                        return -EINVAL;
         }
         if (need_cmd)
                 dst_tone_power_cmd(state);
@@ -1106,37 +1089,56 @@ static int dst_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
 
 static int dst_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
 {
-        u8 *val;
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         state->tone = tone;
 
-        if (state->dst_type == DST_TYPE_IS_TERR)
+        if (state->dst_type != DST_TYPE_IS_SAT)
                 return 0;
 
-        val = &state->tx_tuna[0];
+        switch (tone) {
+                case SEC_TONE_OFF:
+                        state->tx_tuna[2] = 0xff;
+                        break;
 
-        val[8] &= ~0x1;
+                case SEC_TONE_ON:
+                        state->tx_tuna[2] = 0x02;
+                        break;
 
-        switch (tone) {
-        case SEC_TONE_OFF:
-                break;
+                default:
+                        return -EINVAL;
+        }
+        dst_tone_power_cmd(state);
 
-        case SEC_TONE_ON:
-                val[8] |= 1;
-                break;
+        return 0;
+}
 
-        default:
-                return -EINVAL;
+static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
+{
+        struct dst_state *state = fe->demodulator_priv;
+
+        if (state->dst_type != DST_TYPE_IS_SAT)
+                return 0;
+
+        state->minicmd = minicmd;
+
+        switch (minicmd) {
+                case SEC_MINI_A:
+                        state->tx_tuna[3] = 0x02;
+                        break;
+                case SEC_MINI_B:
+                        state->tx_tuna[3] = 0xff;
+                        break;
         }
         dst_tone_power_cmd(state);
 
         return 0;
 }
 
+
 static int dst_init(struct dvb_frontend* fe)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
         static u8 ini_satci_tuna[] = { 9, 0, 3, 0xb6, 1, 0, 0x73, 0x21, 0, 0 };
         static u8 ini_satfta_tuna[] = { 0, 0, 3, 0xb6, 1, 0x55, 0xbd, 0x50, 0, 0 };
         static u8 ini_tvfta_tuna[] = { 0, 0, 3, 0xb6, 1, 7, 0x0, 0x0, 0, 0 };
@@ -1168,7 +1170,7 @@ static int dst_init(struct dvb_frontend* fe)
 
 static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         *status = 0;
         if (state->diseq_flags & HAS_LOCK) {
@@ -1182,7 +1184,7 @@ static int dst_read_status(struct dvb_frontend* fe, fe_status_t* status)
 
 static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         dst_get_signal(state);
         *strength = state->decode_strength;
@@ -1192,7 +1194,7 @@ static int dst_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 
 static int dst_read_snr(struct dvb_frontend* fe, u16* snr)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         dst_get_signal(state);
         *snr = state->decode_snr;
@@ -1202,7 +1204,7 @@ static int dst_read_snr(struct dvb_frontend* fe, u16* snr)
 
 static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         dst_set_freq(state, p->frequency);
         if (verbose > 4)
@@ -1228,7 +1230,7 @@ static int dst_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet
 
 static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
 
         p->frequency = state->decode_freq;
         p->inversion = state->inversion;
@@ -1248,7 +1250,7 @@ static int dst_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_paramet
 
 static void dst_release(struct dvb_frontend* fe)
 {
-        struct dst_state* state = (struct dst_state*) fe->demodulator_priv;
+        struct dst_state* state = fe->demodulator_priv;
         kfree(state);
 }
 
@@ -1346,7 +1348,7 @@ static struct dvb_frontend_ops dst_dvbs_ops = {
         .read_signal_strength = dst_read_signal_strength,
         .read_snr = dst_read_snr,
 
-        .diseqc_send_burst = dst_set_tone,
+        .diseqc_send_burst = dst_send_burst,
         .diseqc_send_master_cmd = dst_set_diseqc,
         .set_voltage = dst_set_voltage,
         .set_tone = dst_set_tone,
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 3a0a55b62aaf..f08e01b2fd19 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1555,6 +1555,7 @@ config SIS900
         tristate "SiS 900/7016 PCI Fast Ethernet Adapter support"
         depends on NET_PCI && PCI
         select CRC32
+        select MII
         ---help---
           This is a driver for the Fast Ethernet PCI network cards based on
           the SiS 900 and SiS 7016 chips. The SiS 900 core is also embedded in
@@ -2031,6 +2032,15 @@ config TIGON3
           To compile this driver as a module, choose M here: the module
           will be called tg3.  This is recommended.
 
+config BNX2
+        tristate "Broadcom NetXtremeII support"
+        depends on PCI
+        help
+          This driver supports Broadcom NetXtremeII gigabit Ethernet cards.
+
+          To compile this driver as a module, choose M here: the module
+          will be called bnx2.  This is recommended.
+
 config GIANFAR
         tristate "Gianfar Ethernet"
         depends on 85xx || 83xx
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e038d55e4f6f..30c7567001fe 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_NS83820) += ns83820.o
 obj-$(CONFIG_STNIC) += stnic.o 8390.o
 obj-$(CONFIG_FEALNX) += fealnx.o
 obj-$(CONFIG_TIGON3) += tg3.o
+obj-$(CONFIG_BNX2) += bnx2.o
 obj-$(CONFIG_TC35815) += tc35815.o
 obj-$(CONFIG_SK98LIN) += sk98lin/
 obj-$(CONFIG_SKFP) += skfp/
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
new file mode 100644
index 000000000000..8acc655ec1e8
--- /dev/null
+++ b/drivers/net/bnx2.c
@@ -0,0 +1,5530 @@
+/* bnx2.c: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation.
+ *
+ * Written by: Michael Chan  (mchan@broadcom.com)
+ */
+
+#include "bnx2.h"
+#include "bnx2_fw.h"
+
+#define DRV_MODULE_NAME         "bnx2"
+#define PFX DRV_MODULE_NAME     ": "
+#define DRV_MODULE_VERSION      "1.2.19"
+#define DRV_MODULE_RELDATE      "May 23, 2005"
+
+#define RUN_AT(x) (jiffies + (x))
+
+/* Time in jiffies before concluding the transmitter is hung. */
+#define TX_TIMEOUT  (5*HZ)
+
+static char version[] __devinitdata =
+        "Broadcom NetXtreme II Gigabit Ethernet Driver " DRV_MODULE_NAME " v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
+
+MODULE_AUTHOR("Michael Chan <mchan@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom NetXtreme II BCM5706 Driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_MODULE_VERSION);
+
+static int disable_msi = 0;
+
+module_param(disable_msi, int, 0);
+MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
+
+typedef enum {
+        BCM5706 = 0,
+        NC370T,
+        NC370I,
+        BCM5706S,
+        NC370F,
+} board_t;
+
+/* indexed by board_t, above */
+static struct {
+        char *name;
+} board_info[] __devinitdata = {
+        { "Broadcom NetXtreme II BCM5706 1000Base-T" },
+        { "HP NC370T Multifunction Gigabit Server Adapter" },
+        { "HP NC370i Multifunction Gigabit Server Adapter" },
+        { "Broadcom NetXtreme II BCM5706 1000Base-SX" },
+        { "HP NC370F Multifunction Gigabit Server Adapter" },
+        { 0 },
+        };
+
+static struct pci_device_id bnx2_pci_tbl[] = {
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
+          PCI_VENDOR_ID_HP, 0x3101, 0, 0, NC370T },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
+          PCI_VENDOR_ID_HP, 0x3106, 0, 0, NC370I },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
+          PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5706 },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706S,
+          PCI_VENDOR_ID_HP, 0x3102, 0, 0, NC370F },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706S,
+          PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5706S },
+        { 0, }
+};
+
+static struct flash_spec flash_table[] =
+{
+        /* Slow EEPROM */
+        {0x00000000, 0x40030380, 0x009f0081, 0xa184a053, 0xaf000400,
+         1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+         SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+         "EEPROM - slow"},
+        /* Fast EEPROM */
+        {0x02000000, 0x62008380, 0x009f0081, 0xa184a053, 0xaf000400,
+         1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+         SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+         "EEPROM - fast"},
+        /* ATMEL AT45DB011B (buffered flash) */
+        {0x02000003, 0x6e008173, 0x00570081, 0x68848353, 0xaf000400,
+         1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+         BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
+         "Buffered flash"},
+        /* Saifun SA25F005 (non-buffered flash) */
+        /* strap, cfg1, & write1 need updates */
+        {0x01000003, 0x5f008081, 0x00050081, 0x03840253, 0xaf020406,
+         0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+         SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
+         "Non-buffered flash (64kB)"},
+        /* Saifun SA25F010 (non-buffered flash) */
+        /* strap, cfg1, & write1 need updates */
+        {0x00000001, 0x47008081, 0x00050081, 0x03840253, 0xaf020406,
+         0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+         SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
+         "Non-buffered flash (128kB)"},
+        /* Saifun SA25F020 (non-buffered flash) */
+        /* strap, cfg1, & write1 need updates */
+        {0x00000003, 0x4f008081, 0x00050081, 0x03840253, 0xaf020406,
+         0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+         SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
+         "Non-buffered flash (256kB)"},
+};
+
+MODULE_DEVICE_TABLE(pci, bnx2_pci_tbl);
+
+static u32
+bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)
+{
+        REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
+        return (REG_RD(bp, BNX2_PCICFG_REG_WINDOW));
+}
+
+static void
+bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)
+{
+        REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
+        REG_WR(bp, BNX2_PCICFG_REG_WINDOW, val);
+}
+
+static void
+bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
+{
+        offset += cid_addr;
+        REG_WR(bp, BNX2_CTX_DATA_ADR, offset);
+        REG_WR(bp, BNX2_CTX_DATA, val);
+}
+
+static int
+bnx2_read_phy(struct bnx2 *bp, u32 reg, u32 *val)
+{
+        u32 val1;
+        int i, ret;
+
+        if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+                val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+                REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+                REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+                udelay(40);
+        }
+
+        val1 = (bp->phy_addr << 21) | (reg << 16) |
+                BNX2_EMAC_MDIO_COMM_COMMAND_READ | BNX2_EMAC_MDIO_COMM_DISEXT |
+                BNX2_EMAC_MDIO_COMM_START_BUSY;
+        REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
+
+        for (i = 0; i < 50; i++) {
+                udelay(10);
+
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+                if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
+                        udelay(5);
+
+                        val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+                        val1 &= BNX2_EMAC_MDIO_COMM_DATA;
+
+                        break;
+                }
+        }
+
+        if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY) {
+                *val = 0x0;
+                ret = -EBUSY;
+        }
+        else {
+                *val = val1;
+                ret = 0;
+        }
+
+        if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+                val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+                REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+                REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+                udelay(40);
+        }
+
+        return ret;
+}
+
+static int
+bnx2_write_phy(struct bnx2 *bp, u32 reg, u32 val)
+{
+        u32 val1;
+        int i, ret;
+
+        if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+                val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+                REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+                REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+                udelay(40);
+        }
+
+        val1 = (bp->phy_addr << 21) | (reg << 16) | val |
+                BNX2_EMAC_MDIO_COMM_COMMAND_WRITE |
+                BNX2_EMAC_MDIO_COMM_START_BUSY | BNX2_EMAC_MDIO_COMM_DISEXT;
+        REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
+    
+        for (i = 0; i < 50; i++) {
+                udelay(10);
+
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+                if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
+                        udelay(5);
+                        break;
+                }
+        }
+
+        if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)
+                ret = -EBUSY;
+        else
+                ret = 0;
+
+        if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+                val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+                val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+                REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+                REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+                udelay(40);
+        }
+
+        return ret;
+}
+
+static void
+bnx2_disable_int(struct bnx2 *bp)
+{
+        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+               BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+        REG_RD(bp, BNX2_PCICFG_INT_ACK_CMD);
+}
+
+static void
+bnx2_enable_int(struct bnx2 *bp)
+{
+        u32 val;
+
+        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+               BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | bp->last_status_idx);
+
+        val = REG_RD(bp, BNX2_HC_COMMAND);
+        REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW);
+}
+
+static void
+bnx2_disable_int_sync(struct bnx2 *bp)
+{
+        atomic_inc(&bp->intr_sem);
+        bnx2_disable_int(bp);
+        synchronize_irq(bp->pdev->irq);
+}
+
+static void
+bnx2_netif_stop(struct bnx2 *bp)
+{
+        bnx2_disable_int_sync(bp);
+        if (netif_running(bp->dev)) {
+                netif_poll_disable(bp->dev);
+                netif_tx_disable(bp->dev);
+                bp->dev->trans_start = jiffies; /* prevent tx timeout */
+        }
+}
+
+static void
+bnx2_netif_start(struct bnx2 *bp)
+{
+        if (atomic_dec_and_test(&bp->intr_sem)) {
+                if (netif_running(bp->dev)) {
+                        netif_wake_queue(bp->dev);
+                        netif_poll_enable(bp->dev);
+                        bnx2_enable_int(bp);
+                }
+        }
+}
+
+static void
+bnx2_free_mem(struct bnx2 *bp)
+{
+        if (bp->stats_blk) {
+                pci_free_consistent(bp->pdev, sizeof(struct statistics_block),
+                                    bp->stats_blk, bp->stats_blk_mapping);
+                bp->stats_blk = NULL;
+        }
+        if (bp->status_blk) {
+                pci_free_consistent(bp->pdev, sizeof(struct status_block),
+                                    bp->status_blk, bp->status_blk_mapping);
+                bp->status_blk = NULL;
+        }
+        if (bp->tx_desc_ring) {
+                pci_free_consistent(bp->pdev,
+                                    sizeof(struct tx_bd) * TX_DESC_CNT,
+                                    bp->tx_desc_ring, bp->tx_desc_mapping);
+                bp->tx_desc_ring = NULL;
+        }
+        if (bp->tx_buf_ring) {
+                kfree(bp->tx_buf_ring);
+                bp->tx_buf_ring = NULL;
+        }
+        if (bp->rx_desc_ring) {
+                pci_free_consistent(bp->pdev,
+                                    sizeof(struct rx_bd) * RX_DESC_CNT,
+                                    bp->rx_desc_ring, bp->rx_desc_mapping);
+                bp->rx_desc_ring = NULL;
+        }
+        if (bp->rx_buf_ring) {
+                kfree(bp->rx_buf_ring);
+                bp->rx_buf_ring = NULL;
+        }
+}
+
+static int
+bnx2_alloc_mem(struct bnx2 *bp)
+{
+        bp->tx_buf_ring = kmalloc(sizeof(struct sw_bd) * TX_DESC_CNT,
+                                     GFP_KERNEL);
+        if (bp->tx_buf_ring == NULL)
+                return -ENOMEM;
+
+        memset(bp->tx_buf_ring, 0, sizeof(struct sw_bd) * TX_DESC_CNT);
+        bp->tx_desc_ring = pci_alloc_consistent(bp->pdev,
+                                                sizeof(struct tx_bd) *
+                                                TX_DESC_CNT,
+                                                &bp->tx_desc_mapping);
+        if (bp->tx_desc_ring == NULL)
+                goto alloc_mem_err;
+
+        bp->rx_buf_ring = kmalloc(sizeof(struct sw_bd) * RX_DESC_CNT,
+                                     GFP_KERNEL);
+        if (bp->rx_buf_ring == NULL)
+                goto alloc_mem_err;
+
+        memset(bp->rx_buf_ring, 0, sizeof(struct sw_bd) * RX_DESC_CNT);
+        bp->rx_desc_ring = pci_alloc_consistent(bp->pdev,
+                                                sizeof(struct rx_bd) *
+                                                RX_DESC_CNT,
+                                                &bp->rx_desc_mapping);
+        if (bp->rx_desc_ring == NULL)
+                goto alloc_mem_err;
+
+        bp->status_blk = pci_alloc_consistent(bp->pdev,
+                                              sizeof(struct status_block),
+                                              &bp->status_blk_mapping);
+        if (bp->status_blk == NULL)
+                goto alloc_mem_err;
+
+        memset(bp->status_blk, 0, sizeof(struct status_block));
+
+        bp->stats_blk = pci_alloc_consistent(bp->pdev,
+                                             sizeof(struct statistics_block),
+                                             &bp->stats_blk_mapping);
+        if (bp->stats_blk == NULL)
+                goto alloc_mem_err;
+
+        memset(bp->stats_blk, 0, sizeof(struct statistics_block));
+
+        return 0;
+
+alloc_mem_err:
+        bnx2_free_mem(bp);
+        return -ENOMEM;
+}
+
+static void
+bnx2_report_link(struct bnx2 *bp)
+{
+        if (bp->link_up) {
+                netif_carrier_on(bp->dev);
+                printk(KERN_INFO PFX "%s NIC Link is Up, ", bp->dev->name);
+
+                printk("%d Mbps ", bp->line_speed);
+
+                if (bp->duplex == DUPLEX_FULL)
+                        printk("full duplex");
+                else
+                        printk("half duplex");
+
+                if (bp->flow_ctrl) {
+                        if (bp->flow_ctrl & FLOW_CTRL_RX) {
+                                printk(", receive ");
+                                if (bp->flow_ctrl & FLOW_CTRL_TX)
+                                        printk("& transmit ");
+                        }
+                        else {
+                                printk(", transmit ");
+                        }
+                        printk("flow control ON");
+                }
+                printk("\n");
+        }
+        else {
+                netif_carrier_off(bp->dev);
+                printk(KERN_ERR PFX "%s NIC Link is Down\n", bp->dev->name);
+        }
+}
+
+static void
+bnx2_resolve_flow_ctrl(struct bnx2 *bp)
+{
+        u32 local_adv, remote_adv;
+
+        bp->flow_ctrl = 0;
+        if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) != 
+                (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) {
+
+                if (bp->duplex == DUPLEX_FULL) {
+                        bp->flow_ctrl = bp->req_flow_ctrl;
+                }
+                return;
+        }
+
+        if (bp->duplex != DUPLEX_FULL) {
+                return;
+        }
+
+        bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+        bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                u32 new_local_adv = 0;
+                u32 new_remote_adv = 0;
+
+                if (local_adv & ADVERTISE_1000XPAUSE)
+                        new_local_adv |= ADVERTISE_PAUSE_CAP;
+                if (local_adv & ADVERTISE_1000XPSE_ASYM)
+                        new_local_adv |= ADVERTISE_PAUSE_ASYM;
+                if (remote_adv & ADVERTISE_1000XPAUSE)
+                        new_remote_adv |= ADVERTISE_PAUSE_CAP;
+                if (remote_adv & ADVERTISE_1000XPSE_ASYM)
+                        new_remote_adv |= ADVERTISE_PAUSE_ASYM;
+
+                local_adv = new_local_adv;
+                remote_adv = new_remote_adv;
+        }
+
+        /* See Table 28B-3 of 802.3ab-1999 spec. */
+        if (local_adv & ADVERTISE_PAUSE_CAP) {
+                if(local_adv & ADVERTISE_PAUSE_ASYM) {
+                        if (remote_adv & ADVERTISE_PAUSE_CAP) {
+                                bp->flow_ctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
+                        }
+                        else if (remote_adv & ADVERTISE_PAUSE_ASYM) {
+                                bp->flow_ctrl = FLOW_CTRL_RX;
+                        }
+                }
+                else {
+                        if (remote_adv & ADVERTISE_PAUSE_CAP) {
+                                bp->flow_ctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
+                        }
+                }
+        }
+        else if (local_adv & ADVERTISE_PAUSE_ASYM) {
+                if ((remote_adv & ADVERTISE_PAUSE_CAP) &&
+                        (remote_adv & ADVERTISE_PAUSE_ASYM)) {
+
+                        bp->flow_ctrl = FLOW_CTRL_TX;
+                }
+        }
+}
+
+static int
+bnx2_serdes_linkup(struct bnx2 *bp)
+{
+        u32 bmcr, local_adv, remote_adv, common;
+
+        bp->link_up = 1;
+        bp->line_speed = SPEED_1000;
+
+        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+        if (bmcr & BMCR_FULLDPLX) {
+                bp->duplex = DUPLEX_FULL;
+        }
+        else {
+                bp->duplex = DUPLEX_HALF;
+        }
+
+        if (!(bmcr & BMCR_ANENABLE)) {
+                return 0;
+        }
+
+        bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+        bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+        common = local_adv & remote_adv;
+        if (common & (ADVERTISE_1000XHALF | ADVERTISE_1000XFULL)) {
+
+                if (common & ADVERTISE_1000XFULL) {
+                        bp->duplex = DUPLEX_FULL;
+                }
+                else {
+                        bp->duplex = DUPLEX_HALF;
+                }
+        }
+
+        return 0;
+}
+
+static int
+bnx2_copper_linkup(struct bnx2 *bp)
+{
+        u32 bmcr;
+
+        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+        if (bmcr & BMCR_ANENABLE) {
+                u32 local_adv, remote_adv, common;
+
+                bnx2_read_phy(bp, MII_CTRL1000, &local_adv);
+                bnx2_read_phy(bp, MII_STAT1000, &remote_adv);
+
+                common = local_adv & (remote_adv >> 2);
+                if (common & ADVERTISE_1000FULL) {
+                        bp->line_speed = SPEED_1000;
+                        bp->duplex = DUPLEX_FULL;
+                }
+                else if (common & ADVERTISE_1000HALF) {
+                        bp->line_speed = SPEED_1000;
+                        bp->duplex = DUPLEX_HALF;
+                }
+                else {
+                        bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+                        bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+                        common = local_adv & remote_adv;
+                        if (common & ADVERTISE_100FULL) {
+                                bp->line_speed = SPEED_100;
+                                bp->duplex = DUPLEX_FULL;
+                        }
+                        else if (common & ADVERTISE_100HALF) {
+                                bp->line_speed = SPEED_100;
+                                bp->duplex = DUPLEX_HALF;
+                        }
+                        else if (common & ADVERTISE_10FULL) {
+                                bp->line_speed = SPEED_10;
+                                bp->duplex = DUPLEX_FULL;
+                        }
+                        else if (common & ADVERTISE_10HALF) {
+                                bp->line_speed = SPEED_10;
+                                bp->duplex = DUPLEX_HALF;
+                        }
+                        else {
+                                bp->line_speed = 0;
+                                bp->link_up = 0;
+                        }
+                }
+        }
+        else {
+                if (bmcr & BMCR_SPEED100) {
+                        bp->line_speed = SPEED_100;
+                }
+                else {
+                        bp->line_speed = SPEED_10;
+                }
+                if (bmcr & BMCR_FULLDPLX) {
+                        bp->duplex = DUPLEX_FULL;
+                }
+                else {
+                        bp->duplex = DUPLEX_HALF;
+                }
+        }
+
+        return 0;
+}
+
+static int
+bnx2_set_mac_link(struct bnx2 *bp)
+{
+        u32 val;
+
+        REG_WR(bp, BNX2_EMAC_TX_LENGTHS, 0x2620);
+        if (bp->link_up && (bp->line_speed == SPEED_1000) &&
+                (bp->duplex == DUPLEX_HALF)) {
+                REG_WR(bp, BNX2_EMAC_TX_LENGTHS, 0x26ff);
+        }
+
+        /* Configure the EMAC mode register. */
+        val = REG_RD(bp, BNX2_EMAC_MODE);
+
+        val &= ~(BNX2_EMAC_MODE_PORT | BNX2_EMAC_MODE_HALF_DUPLEX |
+                BNX2_EMAC_MODE_MAC_LOOP | BNX2_EMAC_MODE_FORCE_LINK);
+
+        if (bp->link_up) {
+                if (bp->line_speed != SPEED_1000)
+                        val |= BNX2_EMAC_MODE_PORT_MII;
+                else
+                        val |= BNX2_EMAC_MODE_PORT_GMII;
+        }
+        else {
+                val |= BNX2_EMAC_MODE_PORT_GMII;
+        }
+
+        /* Set the MAC to operate in the appropriate duplex mode. */
+        if (bp->duplex == DUPLEX_HALF)
+                val |= BNX2_EMAC_MODE_HALF_DUPLEX;
+        REG_WR(bp, BNX2_EMAC_MODE, val);
+
+        /* Enable/disable rx PAUSE. */
+        bp->rx_mode &= ~BNX2_EMAC_RX_MODE_FLOW_EN;
+
+        if (bp->flow_ctrl & FLOW_CTRL_RX)
+                bp->rx_mode |= BNX2_EMAC_RX_MODE_FLOW_EN;
+        REG_WR(bp, BNX2_EMAC_RX_MODE, bp->rx_mode);
+
+        /* Enable/disable tx PAUSE. */
+        val = REG_RD(bp, BNX2_EMAC_TX_MODE);
+        val &= ~BNX2_EMAC_TX_MODE_FLOW_EN;
+
+        if (bp->flow_ctrl & FLOW_CTRL_TX)
+                val |= BNX2_EMAC_TX_MODE_FLOW_EN;
+        REG_WR(bp, BNX2_EMAC_TX_MODE, val);
+
+        /* Acknowledge the interrupt. */
+        REG_WR(bp, BNX2_EMAC_STATUS, BNX2_EMAC_STATUS_LINK_CHANGE);
+
+        return 0;
+}
+
+static int
+bnx2_set_link(struct bnx2 *bp)
+{
+        u32 bmsr;
+        u8 link_up;
+
+        if (bp->loopback == MAC_LOOPBACK) {
+                bp->link_up = 1;
+                return 0;
+        }
+
+        link_up = bp->link_up;
+
+        bnx2_read_phy(bp, MII_BMSR, &bmsr);
+        bnx2_read_phy(bp, MII_BMSR, &bmsr);
+
+        if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+            (CHIP_NUM(bp) == CHIP_NUM_5706)) {
+                u32 val;
+
+                val = REG_RD(bp, BNX2_EMAC_STATUS);
+                if (val & BNX2_EMAC_STATUS_LINK)
+                        bmsr |= BMSR_LSTATUS;
+                else
+                        bmsr &= ~BMSR_LSTATUS;
+        }
+
+        if (bmsr & BMSR_LSTATUS) {
+                bp->link_up = 1;
+
+                if (bp->phy_flags & PHY_SERDES_FLAG) {
+                        bnx2_serdes_linkup(bp);
+                }
+                else {
+                        bnx2_copper_linkup(bp);
+                }
+                bnx2_resolve_flow_ctrl(bp);
+        }
+        else {
+                if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+                        (bp->autoneg & AUTONEG_SPEED)) {
+
+                        u32 bmcr;
+
+                        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+                        if (!(bmcr & BMCR_ANENABLE)) {
+                                bnx2_write_phy(bp, MII_BMCR, bmcr |
+                                        BMCR_ANENABLE);
+                        }
+                }
+                bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
+                bp->link_up = 0;
+        }
+
+        if (bp->link_up != link_up) {
+                bnx2_report_link(bp);
+        }
+
+        bnx2_set_mac_link(bp);
+
+        return 0;
+}
+
+static int
+bnx2_reset_phy(struct bnx2 *bp)
+{
+        int i;
+        u32 reg;
+
+        bnx2_write_phy(bp, MII_BMCR, BMCR_RESET);
+
+#define PHY_RESET_MAX_WAIT 100
+        for (i = 0; i < PHY_RESET_MAX_WAIT; i++) {
+                udelay(10);
+
+                bnx2_read_phy(bp, MII_BMCR, &reg);
+                if (!(reg & BMCR_RESET)) {
+                        udelay(20);
+                        break;
+                }
+        }
+        if (i == PHY_RESET_MAX_WAIT) {
+                return -EBUSY;
+        }
+        return 0;
+}
+
+static u32
+bnx2_phy_get_pause_adv(struct bnx2 *bp)
+{
+        u32 adv = 0;
+
+        if ((bp->req_flow_ctrl & (FLOW_CTRL_RX | FLOW_CTRL_TX)) ==
+                (FLOW_CTRL_RX | FLOW_CTRL_TX)) {
+
+                if (bp->phy_flags & PHY_SERDES_FLAG) {
+                        adv = ADVERTISE_1000XPAUSE;
+                }
+                else {
+                        adv = ADVERTISE_PAUSE_CAP;
+                }
+        }
+        else if (bp->req_flow_ctrl & FLOW_CTRL_TX) {
+                if (bp->phy_flags & PHY_SERDES_FLAG) {
+                        adv = ADVERTISE_1000XPSE_ASYM;
+                }
+                else {
+                        adv = ADVERTISE_PAUSE_ASYM;
+                }
+        }
+        else if (bp->req_flow_ctrl & FLOW_CTRL_RX) {
+                if (bp->phy_flags & PHY_SERDES_FLAG) {
+                        adv = ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM;
+                }
+                else {
+                        adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
+                }
+        }
+        return adv;
+}
+
+static int
+bnx2_setup_serdes_phy(struct bnx2 *bp)
+{
+        u32 adv, bmcr;
+        u32 new_adv = 0;
+
+        if (!(bp->autoneg & AUTONEG_SPEED)) {
+                u32 new_bmcr;
+
+                bnx2_read_phy(bp, MII_BMCR, &bmcr);
+                new_bmcr = bmcr & ~BMCR_ANENABLE;
+                new_bmcr |= BMCR_SPEED1000;
+                if (bp->req_duplex == DUPLEX_FULL) {
+                        new_bmcr |= BMCR_FULLDPLX;
+                }
+                else {
+                        new_bmcr &= ~BMCR_FULLDPLX;
+                }
+                if (new_bmcr != bmcr) {
+                        /* Force a link down visible on the other side */
+                        if (bp->link_up) {
+                                bnx2_read_phy(bp, MII_ADVERTISE, &adv);
+                                adv &= ~(ADVERTISE_1000XFULL |
+                                        ADVERTISE_1000XHALF);
+                                bnx2_write_phy(bp, MII_ADVERTISE, adv);
+                                bnx2_write_phy(bp, MII_BMCR, bmcr |
+                                        BMCR_ANRESTART | BMCR_ANENABLE);
+
+                                bp->link_up = 0;
+                                netif_carrier_off(bp->dev);
+                        }
+                        bnx2_write_phy(bp, MII_BMCR, new_bmcr);
+                }
+                return 0;
+        }
+
+        if (bp->advertising & ADVERTISED_1000baseT_Full)
+                new_adv |= ADVERTISE_1000XFULL;
+
+        new_adv |= bnx2_phy_get_pause_adv(bp);
+
+        bnx2_read_phy(bp, MII_ADVERTISE, &adv);
+        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+
+        bp->serdes_an_pending = 0;
+        if ((adv != new_adv) || ((bmcr & BMCR_ANENABLE) == 0)) {
+                /* Force a link down visible on the other side */
+                if (bp->link_up) {
+                        int i;
+
+                        bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
+                        for (i = 0; i < 110; i++) {
+                                udelay(100);
+                        }
+                }
+
+                bnx2_write_phy(bp, MII_ADVERTISE, new_adv);
+                bnx2_write_phy(bp, MII_BMCR, bmcr | BMCR_ANRESTART |
+                        BMCR_ANENABLE);
+                bp->serdes_an_pending = SERDES_AN_TIMEOUT / bp->timer_interval;
+        }
+
+        return 0;
+}
+
+#define ETHTOOL_ALL_FIBRE_SPEED                                         \
+        (ADVERTISED_1000baseT_Full)
+
+#define ETHTOOL_ALL_COPPER_SPEED                                        \
+        (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |            \
+        ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |           \
+        ADVERTISED_1000baseT_Full)
+
+#define PHY_ALL_10_100_SPEED (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+        ADVERTISE_100HALF | ADVERTISE_100FULL | ADVERTISE_CSMA)
+        
+#define PHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL)
+
+static int
+bnx2_setup_copper_phy(struct bnx2 *bp)
+{
+        u32 bmcr;
+        u32 new_bmcr;
+
+        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+
+        if (bp->autoneg & AUTONEG_SPEED) {
+                u32 adv_reg, adv1000_reg;
+                u32 new_adv_reg = 0;
+                u32 new_adv1000_reg = 0;
+
+                bnx2_read_phy(bp, MII_ADVERTISE, &adv_reg);
+                adv_reg &= (PHY_ALL_10_100_SPEED | ADVERTISE_PAUSE_CAP |
+                        ADVERTISE_PAUSE_ASYM);
+
+                bnx2_read_phy(bp, MII_CTRL1000, &adv1000_reg);
+                adv1000_reg &= PHY_ALL_1000_SPEED;
+
+                if (bp->advertising & ADVERTISED_10baseT_Half)
+                        new_adv_reg |= ADVERTISE_10HALF;
+                if (bp->advertising & ADVERTISED_10baseT_Full)
+                        new_adv_reg |= ADVERTISE_10FULL;
+                if (bp->advertising & ADVERTISED_100baseT_Half)
+                        new_adv_reg |= ADVERTISE_100HALF;
+                if (bp->advertising & ADVERTISED_100baseT_Full)
+                        new_adv_reg |= ADVERTISE_100FULL;
+                if (bp->advertising & ADVERTISED_1000baseT_Full)
+                        new_adv1000_reg |= ADVERTISE_1000FULL;
+                
+                new_adv_reg |= ADVERTISE_CSMA;
+
+                new_adv_reg |= bnx2_phy_get_pause_adv(bp);
+
+                if ((adv1000_reg != new_adv1000_reg) ||
+                        (adv_reg != new_adv_reg) ||
+                        ((bmcr & BMCR_ANENABLE) == 0)) {
+
+                        bnx2_write_phy(bp, MII_ADVERTISE, new_adv_reg);
+                        bnx2_write_phy(bp, MII_CTRL1000, new_adv1000_reg);
+                        bnx2_write_phy(bp, MII_BMCR, BMCR_ANRESTART |
+                                BMCR_ANENABLE);
+                }
+                else if (bp->link_up) {
+                        /* Flow ctrl may have changed from auto to forced */
+                        /* or vice-versa. */
+
+                        bnx2_resolve_flow_ctrl(bp);
+                        bnx2_set_mac_link(bp);
+                }
+                return 0;
+        }
+
+        new_bmcr = 0;
+        if (bp->req_line_speed == SPEED_100) {
+                new_bmcr |= BMCR_SPEED100;
+        }
+        if (bp->req_duplex == DUPLEX_FULL) {
+                new_bmcr |= BMCR_FULLDPLX;
+        }
+        if (new_bmcr != bmcr) {
+                u32 bmsr;
+                int i = 0;
+
+                bnx2_read_phy(bp, MII_BMSR, &bmsr);
+                bnx2_read_phy(bp, MII_BMSR, &bmsr);
+                
+                if (bmsr & BMSR_LSTATUS) {
+                        /* Force link down */
+                        bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
+                        do {
+                                udelay(100);
+                                bnx2_read_phy(bp, MII_BMSR, &bmsr);
+                                bnx2_read_phy(bp, MII_BMSR, &bmsr);
+                                i++;
+                        } while ((bmsr & BMSR_LSTATUS) && (i < 620));
+                }
+
+                bnx2_write_phy(bp, MII_BMCR, new_bmcr);
+
+                /* Normally, the new speed is setup after the link has
+                 * gone down and up again. In some cases, link will not go
+                 * down so we need to set up the new speed here.
+                 */
+                if (bmsr & BMSR_LSTATUS) {
+                        bp->line_speed = bp->req_line_speed;
+                        bp->duplex = bp->req_duplex;
+                        bnx2_resolve_flow_ctrl(bp);
+                        bnx2_set_mac_link(bp);
+                }
+        }
+        return 0;
+}
+
+static int
+bnx2_setup_phy(struct bnx2 *bp)
+{
+        if (bp->loopback == MAC_LOOPBACK)
+                return 0;
+
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                return (bnx2_setup_serdes_phy(bp));
+        }
+        else {
+                return (bnx2_setup_copper_phy(bp));
+        }
+}
+
+static int
+bnx2_init_serdes_phy(struct bnx2 *bp)
+{
+        bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
+
+        if (CHIP_NUM(bp) == CHIP_NUM_5706) {
+                REG_WR(bp, BNX2_MISC_UNUSED0, 0x300);
+        }
+
+        if (bp->dev->mtu > 1500) {
+                u32 val;
+
+                /* Set extended packet length bit */
+                bnx2_write_phy(bp, 0x18, 0x7);
+                bnx2_read_phy(bp, 0x18, &val);
+                bnx2_write_phy(bp, 0x18, (val & 0xfff8) | 0x4000);
+
+                bnx2_write_phy(bp, 0x1c, 0x6c00);
+                bnx2_read_phy(bp, 0x1c, &val);
+                bnx2_write_phy(bp, 0x1c, (val & 0x3ff) | 0xec02);
+        }
+        else {
+                u32 val;
+
+                bnx2_write_phy(bp, 0x18, 0x7);
+                bnx2_read_phy(bp, 0x18, &val);
+                bnx2_write_phy(bp, 0x18, val & ~0x4007);
+
+                bnx2_write_phy(bp, 0x1c, 0x6c00);
+                bnx2_read_phy(bp, 0x1c, &val);
+                bnx2_write_phy(bp, 0x1c, (val & 0x3fd) | 0xec00);
+        }
+
+        return 0;
+}
+
+static int
+bnx2_init_copper_phy(struct bnx2 *bp)
+{
+        bp->phy_flags |= PHY_CRC_FIX_FLAG;
+
+        if (bp->phy_flags & PHY_CRC_FIX_FLAG) {
+                bnx2_write_phy(bp, 0x18, 0x0c00);
+                bnx2_write_phy(bp, 0x17, 0x000a);
+                bnx2_write_phy(bp, 0x15, 0x310b);
+                bnx2_write_phy(bp, 0x17, 0x201f);
+                bnx2_write_phy(bp, 0x15, 0x9506);
+                bnx2_write_phy(bp, 0x17, 0x401f);
+                bnx2_write_phy(bp, 0x15, 0x14e2);
+                bnx2_write_phy(bp, 0x18, 0x0400);
+        }
+
+        if (bp->dev->mtu > 1500) {
+                u32 val;
+
+                /* Set extended packet length bit */
+                bnx2_write_phy(bp, 0x18, 0x7);
+                bnx2_read_phy(bp, 0x18, &val);
+                bnx2_write_phy(bp, 0x18, val | 0x4000);
+
+                bnx2_read_phy(bp, 0x10, &val);
+                bnx2_write_phy(bp, 0x10, val | 0x1);
+        }
+        else {
+                u32 val;
+
+                bnx2_write_phy(bp, 0x18, 0x7);
+                bnx2_read_phy(bp, 0x18, &val);
+                bnx2_write_phy(bp, 0x18, val & ~0x4007);
+
+                bnx2_read_phy(bp, 0x10, &val);
+                bnx2_write_phy(bp, 0x10, val & ~0x1);
+        }
+
+        return 0;
+}
+
+
+static int
+bnx2_init_phy(struct bnx2 *bp)
+{
+        u32 val;
+        int rc = 0;
+
+        bp->phy_flags &= ~PHY_INT_MODE_MASK_FLAG;
+        bp->phy_flags |= PHY_INT_MODE_LINK_READY_FLAG;
+
+        REG_WR(bp, BNX2_EMAC_ATTENTION_ENA, BNX2_EMAC_ATTENTION_ENA_LINK);
+
+        bnx2_reset_phy(bp);
+
+        bnx2_read_phy(bp, MII_PHYSID1, &val);
+        bp->phy_id = val << 16;
+        bnx2_read_phy(bp, MII_PHYSID2, &val);
+        bp->phy_id |= val & 0xffff;
+
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                rc = bnx2_init_serdes_phy(bp);
+        }
+        else {
+                rc = bnx2_init_copper_phy(bp);
+        }
+
+        bnx2_setup_phy(bp);
+
+        return rc;
+}
+
+static int
+bnx2_set_mac_loopback(struct bnx2 *bp)
+{
+        u32 mac_mode;
+
+        mac_mode = REG_RD(bp, BNX2_EMAC_MODE);
+        mac_mode &= ~BNX2_EMAC_MODE_PORT;
+        mac_mode |= BNX2_EMAC_MODE_MAC_LOOP | BNX2_EMAC_MODE_FORCE_LINK;
+        REG_WR(bp, BNX2_EMAC_MODE, mac_mode);
+        bp->link_up = 1;
+        return 0;
+}
+
+static int
+bnx2_fw_sync(struct bnx2 *bp, u32 msg_data)
+{
+        int i;
+        u32 val;
+
+        if (bp->fw_timed_out)
+                return -EBUSY;
+
+        bp->fw_wr_seq++;
+        msg_data |= bp->fw_wr_seq;
+
+        REG_WR_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_DRV_MB, msg_data);
+
+        /* wait for an acknowledgement. */
+        for (i = 0; i < (FW_ACK_TIME_OUT_MS * 1000)/5; i++) {
+                udelay(5);
+
+                val = REG_RD_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_FW_MB);
+
+                if ((val & BNX2_FW_MSG_ACK) == (msg_data & BNX2_DRV_MSG_SEQ))
+                        break;
+        }
+
+        /* If we timed out, inform the firmware that this is the case. */
+        if (((val & BNX2_FW_MSG_ACK) != (msg_data & BNX2_DRV_MSG_SEQ)) &&
+                ((msg_data & BNX2_DRV_MSG_DATA) != BNX2_DRV_MSG_DATA_WAIT0)) {
+
+                msg_data &= ~BNX2_DRV_MSG_CODE;
+                msg_data |= BNX2_DRV_MSG_CODE_FW_TIMEOUT;
+
+                REG_WR_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_DRV_MB, msg_data);
+
+                bp->fw_timed_out = 1;
+
+                return -EBUSY;
+        }
+
+        return 0;
+}
+
+static void
+bnx2_init_context(struct bnx2 *bp)
+{
+        u32 vcid;
+
+        vcid = 96;
+        while (vcid) {
+                u32 vcid_addr, pcid_addr, offset;
+
+                vcid--;
+
+                if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+                        u32 new_vcid;
+
+                        vcid_addr = GET_PCID_ADDR(vcid);
+                        if (vcid & 0x8) {
+                                new_vcid = 0x60 + (vcid & 0xf0) + (vcid & 0x7);
+                        }
+                        else {
+                                new_vcid = vcid;
+                        }
+                        pcid_addr = GET_PCID_ADDR(new_vcid);
+                }
+                else {
+                        vcid_addr = GET_CID_ADDR(vcid);
+                        pcid_addr = vcid_addr;
+                }
+
+                REG_WR(bp, BNX2_CTX_VIRT_ADDR, 0x00);
+                REG_WR(bp, BNX2_CTX_PAGE_TBL, pcid_addr);
+
+                /* Zero out the context. */
+                for (offset = 0; offset < PHY_CTX_SIZE; offset += 4) {
+                        CTX_WR(bp, 0x00, offset, 0);
+                }
+
+                REG_WR(bp, BNX2_CTX_VIRT_ADDR, vcid_addr);
+                REG_WR(bp, BNX2_CTX_PAGE_TBL, pcid_addr);
+        }
+}
+
+static int
+bnx2_alloc_bad_rbuf(struct bnx2 *bp)
+{
+        u16 *good_mbuf;
+        u32 good_mbuf_cnt;
+        u32 val;
+
+        good_mbuf = kmalloc(512 * sizeof(u16), GFP_KERNEL);
+        if (good_mbuf == NULL) {
+                printk(KERN_ERR PFX "Failed to allocate memory in "
+                                    "bnx2_alloc_bad_rbuf\n");
+                return -ENOMEM;
+        }
+
+        REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
+                BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE);
+
+        good_mbuf_cnt = 0;
+
+        /* Allocate a bunch of mbufs and save the good ones in an array. */
+        val = REG_RD_IND(bp, BNX2_RBUF_STATUS1);
+        while (val & BNX2_RBUF_STATUS1_FREE_COUNT) {
+                REG_WR_IND(bp, BNX2_RBUF_COMMAND, BNX2_RBUF_COMMAND_ALLOC_REQ);
+
+                val = REG_RD_IND(bp, BNX2_RBUF_FW_BUF_ALLOC);
+
+                val &= BNX2_RBUF_FW_BUF_ALLOC_VALUE;
+
+                /* The addresses with Bit 9 set are bad memory blocks. */
+                if (!(val & (1 << 9))) {
+                        good_mbuf[good_mbuf_cnt] = (u16) val;
+                        good_mbuf_cnt++;
+                }
+
+                val = REG_RD_IND(bp, BNX2_RBUF_STATUS1);
+        }
+
+        /* Free the good ones back to the mbuf pool thus discarding
+         * all the bad ones. */
+        while (good_mbuf_cnt) {
+                good_mbuf_cnt--;
+
+                val = good_mbuf[good_mbuf_cnt];
+                val = (val << 9) | val | 1;
+
+                REG_WR_IND(bp, BNX2_RBUF_FW_BUF_FREE, val);
+        }
+        kfree(good_mbuf);
+        return 0;
+}
+
+static void
+bnx2_set_mac_addr(struct bnx2 *bp) 
+{
+        u32 val;
+        u8 *mac_addr = bp->dev->dev_addr;
+
+        val = (mac_addr[0] << 8) | mac_addr[1];
+
+        REG_WR(bp, BNX2_EMAC_MAC_MATCH0, val);
+
+        val = (mac_addr[2] << 24) | (mac_addr[3] << 16) | 
+                (mac_addr[4] << 8) | mac_addr[5];
+
+        REG_WR(bp, BNX2_EMAC_MAC_MATCH1, val);
+}
+
+static inline int
+bnx2_alloc_rx_skb(struct bnx2 *bp, u16 index)
+{
+        struct sk_buff *skb;
+        struct sw_bd *rx_buf = &bp->rx_buf_ring[index];
+        dma_addr_t mapping;
+        struct rx_bd *rxbd = &bp->rx_desc_ring[index];
+        unsigned long align;
+
+        skb = dev_alloc_skb(bp->rx_buf_size);
+        if (skb == NULL) {
+                return -ENOMEM;
+        }
+
+        if (unlikely((align = (unsigned long) skb->data & 0x7))) {
+                skb_reserve(skb, 8 - align);
+        }
+
+        skb->dev = bp->dev;
+        mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_use_size,
+                PCI_DMA_FROMDEVICE);
+
+        rx_buf->skb = skb;
+        pci_unmap_addr_set(rx_buf, mapping, mapping);
+
+        rxbd->rx_bd_haddr_hi = (u64) mapping >> 32;
+        rxbd->rx_bd_haddr_lo = (u64) mapping & 0xffffffff;
+
+        bp->rx_prod_bseq += bp->rx_buf_use_size;
+
+        return 0;
+}
+
+static void
+bnx2_phy_int(struct bnx2 *bp)
+{
+        u32 new_link_state, old_link_state;
+
+        new_link_state = bp->status_blk->status_attn_bits &
+                STATUS_ATTN_BITS_LINK_STATE;
+        old_link_state = bp->status_blk->status_attn_bits_ack &
+                STATUS_ATTN_BITS_LINK_STATE;
+        if (new_link_state != old_link_state) {
+                if (new_link_state) {
+                        REG_WR(bp, BNX2_PCICFG_STATUS_BIT_SET_CMD,
+                                STATUS_ATTN_BITS_LINK_STATE);
+                }
+                else {
+                        REG_WR(bp, BNX2_PCICFG_STATUS_BIT_CLEAR_CMD,
+                                STATUS_ATTN_BITS_LINK_STATE);
+                }
+                bnx2_set_link(bp);
+        }
+}
+
+static void
+bnx2_tx_int(struct bnx2 *bp)
+{
+        u16 hw_cons, sw_cons, sw_ring_cons;
+        int tx_free_bd = 0;
+
+        hw_cons = bp->status_blk->status_tx_quick_consumer_index0;
+        if ((hw_cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT) {
+                hw_cons++;
+        }
+        sw_cons = bp->tx_cons;
+
+        while (sw_cons != hw_cons) {
+                struct sw_bd *tx_buf;
+                struct sk_buff *skb;
+                int i, last;
+
+                sw_ring_cons = TX_RING_IDX(sw_cons);
+
+                tx_buf = &bp->tx_buf_ring[sw_ring_cons];
+                skb = tx_buf->skb;
+#ifdef BCM_TSO 
+                /* partial BD completions possible with TSO packets */
+                if (skb_shinfo(skb)->tso_size) {
+                        u16 last_idx, last_ring_idx;
+
+                        last_idx = sw_cons +
+                                skb_shinfo(skb)->nr_frags + 1;
+                        last_ring_idx = sw_ring_cons +
+                                skb_shinfo(skb)->nr_frags + 1;
+                        if (unlikely(last_ring_idx >= MAX_TX_DESC_CNT)) {
+                                last_idx++;
+                        }
+                        if (((s16) ((s16) last_idx - (s16) hw_cons)) > 0) {
+                                break;
+                        }
+                }
+#endif
+                pci_unmap_single(bp->pdev, pci_unmap_addr(tx_buf, mapping),
+                        skb_headlen(skb), PCI_DMA_TODEVICE);
+
+                tx_buf->skb = NULL;
+                last = skb_shinfo(skb)->nr_frags;
+
+                for (i = 0; i < last; i++) {
+                        sw_cons = NEXT_TX_BD(sw_cons);
+
+                        pci_unmap_page(bp->pdev,
+                                pci_unmap_addr(
+                                        &bp->tx_buf_ring[TX_RING_IDX(sw_cons)],
+                                        mapping),
+                                skb_shinfo(skb)->frags[i].size,
+                                PCI_DMA_TODEVICE);
+                }
+
+                sw_cons = NEXT_TX_BD(sw_cons);
+
+                tx_free_bd += last + 1;
+
+                dev_kfree_skb_irq(skb);
+
+                hw_cons = bp->status_blk->status_tx_quick_consumer_index0;
+                if ((hw_cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT) {
+                        hw_cons++;
+                }
+        }
+
+        atomic_add(tx_free_bd, &bp->tx_avail_bd);
+
+        if (unlikely(netif_queue_stopped(bp->dev))) {
+                unsigned long flags;
+
+                spin_lock_irqsave(&bp->tx_lock, flags);
+                if ((netif_queue_stopped(bp->dev)) &&
+                        (atomic_read(&bp->tx_avail_bd) > MAX_SKB_FRAGS)) {
+
+                        netif_wake_queue(bp->dev);
+                }
+                spin_unlock_irqrestore(&bp->tx_lock, flags);
+        }
+
+        bp->tx_cons = sw_cons;
+
+}
+
+static inline void
+bnx2_reuse_rx_skb(struct bnx2 *bp, struct sk_buff *skb,
+        u16 cons, u16 prod)
+{
+        struct sw_bd *cons_rx_buf = &bp->rx_buf_ring[cons];
+        struct sw_bd *prod_rx_buf = &bp->rx_buf_ring[prod];
+        struct rx_bd *cons_bd = &bp->rx_desc_ring[cons];
+        struct rx_bd *prod_bd = &bp->rx_desc_ring[prod];
+
+        pci_dma_sync_single_for_device(bp->pdev,
+                pci_unmap_addr(cons_rx_buf, mapping),
+                bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
+
+        prod_rx_buf->skb = cons_rx_buf->skb;
+        pci_unmap_addr_set(prod_rx_buf, mapping,
+                        pci_unmap_addr(cons_rx_buf, mapping));
+
+        memcpy(prod_bd, cons_bd, 8);
+
+        bp->rx_prod_bseq += bp->rx_buf_use_size;
+
+}
+
+static int
+bnx2_rx_int(struct bnx2 *bp, int budget)
+{
+        u16 hw_cons, sw_cons, sw_ring_cons, sw_prod, sw_ring_prod;
+        struct l2_fhdr *rx_hdr;
+        int rx_pkt = 0;
+
+        hw_cons = bp->status_blk->status_rx_quick_consumer_index0;
+        if ((hw_cons & MAX_RX_DESC_CNT) == MAX_RX_DESC_CNT) {
+                hw_cons++;
+        }
+        sw_cons = bp->rx_cons;
+        sw_prod = bp->rx_prod;
+
+        /* Memory barrier necessary as speculative reads of the rx
+         * buffer can be ahead of the index in the status block
+         */
+        rmb();
+        while (sw_cons != hw_cons) {
+                unsigned int len;
+                u16 status;
+                struct sw_bd *rx_buf;
+                struct sk_buff *skb;
+
+                sw_ring_cons = RX_RING_IDX(sw_cons);
+                sw_ring_prod = RX_RING_IDX(sw_prod);
+
+                rx_buf = &bp->rx_buf_ring[sw_ring_cons];
+                skb = rx_buf->skb;
+                pci_dma_sync_single_for_cpu(bp->pdev,
+                        pci_unmap_addr(rx_buf, mapping),
+                        bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
+
+                rx_hdr = (struct l2_fhdr *) skb->data;
+                len = rx_hdr->l2_fhdr_pkt_len - 4;
+
+                if (rx_hdr->l2_fhdr_errors &
+                        (L2_FHDR_ERRORS_BAD_CRC |
+                        L2_FHDR_ERRORS_PHY_DECODE |
+                        L2_FHDR_ERRORS_ALIGNMENT |
+                        L2_FHDR_ERRORS_TOO_SHORT |
+                        L2_FHDR_ERRORS_GIANT_FRAME)) {
+
+                        goto reuse_rx;
+                }
+
+                /* Since we don't have a jumbo ring, copy small packets
+                 * if mtu > 1500
+                 */
+                if ((bp->dev->mtu > 1500) && (len <= RX_COPY_THRESH)) {
+                        struct sk_buff *new_skb;
+
+                        new_skb = dev_alloc_skb(len + 2);
+                        if (new_skb == NULL)
+                                goto reuse_rx;
+
+                        /* aligned copy */
+                        memcpy(new_skb->data,
+                                skb->data + bp->rx_offset - 2,
+                                len + 2);
+
+                        skb_reserve(new_skb, 2);
+                        skb_put(new_skb, len);
+                        new_skb->dev = bp->dev;
+
+                        bnx2_reuse_rx_skb(bp, skb,
+                                sw_ring_cons, sw_ring_prod);
+
+                        skb = new_skb;
+                }
+                else if (bnx2_alloc_rx_skb(bp, sw_ring_prod) == 0) {
+                        pci_unmap_single(bp->pdev,
+                                pci_unmap_addr(rx_buf, mapping),
+                                bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
+
+                        skb_reserve(skb, bp->rx_offset);
+                        skb_put(skb, len);
+                }
+                else {
+reuse_rx:
+                        bnx2_reuse_rx_skb(bp, skb,
+                                sw_ring_cons, sw_ring_prod);
+                        goto next_rx;
+                }
+
+                skb->protocol = eth_type_trans(skb, bp->dev);
+
+                if ((len > (bp->dev->mtu + ETH_HLEN)) &&
+                        (htons(skb->protocol) != 0x8100)) {
+
+                        dev_kfree_skb_irq(skb);
+                        goto next_rx;
+
+                }
+
+                status = rx_hdr->l2_fhdr_status;
+                skb->ip_summed = CHECKSUM_NONE;
+                if (bp->rx_csum &&
+                        (status & (L2_FHDR_STATUS_TCP_SEGMENT |
+                        L2_FHDR_STATUS_UDP_DATAGRAM))) {
+
+                        u16 cksum = rx_hdr->l2_fhdr_tcp_udp_xsum;
+
+                        if (cksum == 0xffff)
+                                skb->ip_summed = CHECKSUM_UNNECESSARY;
+                }
+
+#ifdef BCM_VLAN
+                if ((status & L2_FHDR_STATUS_L2_VLAN_TAG) && (bp->vlgrp != 0)) {
+                        vlan_hwaccel_receive_skb(skb, bp->vlgrp,
+                                rx_hdr->l2_fhdr_vlan_tag);
+                }
+                else
+#endif
+                        netif_receive_skb(skb);
+
+                bp->dev->last_rx = jiffies;
+                rx_pkt++;
+
+next_rx:
+                rx_buf->skb = NULL;
+
+                sw_cons = NEXT_RX_BD(sw_cons);
+                sw_prod = NEXT_RX_BD(sw_prod);
+
+                if ((rx_pkt == budget))
+                        break;
+        }
+        bp->rx_cons = sw_cons;
+        bp->rx_prod = sw_prod;
+
+        REG_WR16(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BDIDX, sw_prod);
+
+        REG_WR(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BSEQ, bp->rx_prod_bseq);
+
+        mmiowb();
+
+        return rx_pkt;
+
+}
+
+/* MSI ISR - The only difference between this and the INTx ISR
+ * is that the MSI interrupt is always serviced.
+ */
+static irqreturn_t
+bnx2_msi(int irq, void *dev_instance, struct pt_regs *regs)
+{
+        struct net_device *dev = dev_instance;
+        struct bnx2 *bp = dev->priv;
+
+        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+                BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM |
+                BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+
+        /* Return here if interrupt is disabled. */
+        if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
+                return IRQ_RETVAL(1);
+        }
+
+        if (netif_rx_schedule_prep(dev)) {
+                __netif_rx_schedule(dev);
+        }
+
+        return IRQ_RETVAL(1);
+}
+
+static irqreturn_t
+bnx2_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
+{
+        struct net_device *dev = dev_instance;
+        struct bnx2 *bp = dev->priv;
+
+        /* When using INTx, it is possible for the interrupt to arrive
+         * at the CPU before the status block posted prior to the
+         * interrupt. Reading a register will flush the status block.
+         * When using MSI, the MSI message will always complete after
+         * the status block write.
+         */
+        if ((bp->status_blk->status_idx == bp->last_status_idx) ||
+            (REG_RD(bp, BNX2_PCICFG_MISC_STATUS) &
+             BNX2_PCICFG_MISC_STATUS_INTA_VALUE))
+                return IRQ_RETVAL(0);
+
+        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+                BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM |
+                BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+
+        /* Return here if interrupt is shared and is disabled. */
+        if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
+                return IRQ_RETVAL(1);
+        }
+
+        if (netif_rx_schedule_prep(dev)) {
+                __netif_rx_schedule(dev);
+        }
+
+        return IRQ_RETVAL(1);
+}
+
+static int
+bnx2_poll(struct net_device *dev, int *budget)
+{
+        struct bnx2 *bp = dev->priv;
+        int rx_done = 1;
+
+        bp->last_status_idx = bp->status_blk->status_idx;
+
+        rmb();
+        if ((bp->status_blk->status_attn_bits &
+                STATUS_ATTN_BITS_LINK_STATE) !=
+                (bp->status_blk->status_attn_bits_ack &
+                STATUS_ATTN_BITS_LINK_STATE)) {
+
+                unsigned long flags;
+
+                spin_lock_irqsave(&bp->phy_lock, flags);
+                bnx2_phy_int(bp);
+                spin_unlock_irqrestore(&bp->phy_lock, flags);
+        }
+
+        if (bp->status_blk->status_tx_quick_consumer_index0 != bp->tx_cons) {
+                bnx2_tx_int(bp);
+        }
+
+        if (bp->status_blk->status_rx_quick_consumer_index0 != bp->rx_cons) {
+                int orig_budget = *budget;
+                int work_done;
+
+                if (orig_budget > dev->quota)
+                        orig_budget = dev->quota;
+                
+                work_done = bnx2_rx_int(bp, orig_budget);
+                *budget -= work_done;
+                dev->quota -= work_done;
+                
+                if (work_done >= orig_budget) {
+                        rx_done = 0;
+                }
+        }
+        
+        if (rx_done) {
+                netif_rx_complete(dev);
+                REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+                        BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
+                        bp->last_status_idx);
+                return 0;
+        }
+
+        return 1;
+}
+
+/* Called with rtnl_lock from vlan functions and also dev->xmit_lock
+ * from set_multicast.
+ */
+static void
+bnx2_set_rx_mode(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        u32 rx_mode, sort_mode;
+        int i;
+        unsigned long flags;
+
+        spin_lock_irqsave(&bp->phy_lock, flags);
+
+        rx_mode = bp->rx_mode & ~(BNX2_EMAC_RX_MODE_PROMISCUOUS |
+                                  BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG);
+        sort_mode = 1 | BNX2_RPM_SORT_USER0_BC_EN;
+#ifdef BCM_VLAN
+        if (!bp->vlgrp) {
+                rx_mode |= BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG;
+        }
+#else
+        rx_mode |= BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG;
+#endif
+        if (dev->flags & IFF_PROMISC) {
+                /* Promiscuous mode. */
+                rx_mode |= BNX2_EMAC_RX_MODE_PROMISCUOUS;
+                sort_mode |= BNX2_RPM_SORT_USER0_PROM_EN;
+        }
+        else if (dev->flags & IFF_ALLMULTI) {
+                for (i = 0; i < NUM_MC_HASH_REGISTERS; i++) {
+                        REG_WR(bp, BNX2_EMAC_MULTICAST_HASH0 + (i * 4),
+                               0xffffffff);
+                }
+                sort_mode |= BNX2_RPM_SORT_USER0_MC_EN;
+        }
+        else {
+                /* Accept one or more multicast(s). */
+                struct dev_mc_list *mclist;
+                u32 mc_filter[NUM_MC_HASH_REGISTERS];
+                u32 regidx;
+                u32 bit;
+                u32 crc;
+
+                memset(mc_filter, 0, 4 * NUM_MC_HASH_REGISTERS);
+
+                for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
+                     i++, mclist = mclist->next) {
+
+                        crc = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
+                        bit = crc & 0xff;
+                        regidx = (bit & 0xe0) >> 5;
+                        bit &= 0x1f;
+                        mc_filter[regidx] |= (1 << bit);
+                }
+
+                for (i = 0; i < NUM_MC_HASH_REGISTERS; i++) {
+                        REG_WR(bp, BNX2_EMAC_MULTICAST_HASH0 + (i * 4),
+                               mc_filter[i]);
+                }
+
+                sort_mode |= BNX2_RPM_SORT_USER0_MC_HSH_EN;
+        }
+
+        if (rx_mode != bp->rx_mode) {
+                bp->rx_mode = rx_mode;
+                REG_WR(bp, BNX2_EMAC_RX_MODE, rx_mode);
+        }
+
+        REG_WR(bp, BNX2_RPM_SORT_USER0, 0x0);
+        REG_WR(bp, BNX2_RPM_SORT_USER0, sort_mode);
+        REG_WR(bp, BNX2_RPM_SORT_USER0, sort_mode | BNX2_RPM_SORT_USER0_ENA);
+
+        spin_unlock_irqrestore(&bp->phy_lock, flags);
+}
+
+static void
+load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len,
+        u32 rv2p_proc)
+{
+        int i;
+        u32 val;
+
+
+        for (i = 0; i < rv2p_code_len; i += 8) {
+                REG_WR(bp, BNX2_RV2P_INSTR_HIGH, *rv2p_code);
+                rv2p_code++;
+                REG_WR(bp, BNX2_RV2P_INSTR_LOW, *rv2p_code);
+                rv2p_code++;
+
+                if (rv2p_proc == RV2P_PROC1) {
+                        val = (i / 8) | BNX2_RV2P_PROC1_ADDR_CMD_RDWR;
+                        REG_WR(bp, BNX2_RV2P_PROC1_ADDR_CMD, val);
+                }
+                else {
+                        val = (i / 8) | BNX2_RV2P_PROC2_ADDR_CMD_RDWR;
+                        REG_WR(bp, BNX2_RV2P_PROC2_ADDR_CMD, val);
+                }
+        }
+
+        /* Reset the processor, un-stall is done later. */
+        if (rv2p_proc == RV2P_PROC1) {
+                REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC1_RESET);
+        }
+        else {
+                REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC2_RESET);
+        }
+}
+
+static void
+load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
+{
+        u32 offset;
+        u32 val;
+
+        /* Halt the CPU. */
+        val = REG_RD_IND(bp, cpu_reg->mode);
+        val |= cpu_reg->mode_value_halt;
+        REG_WR_IND(bp, cpu_reg->mode, val);
+        REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
+
+        /* Load the Text area. */
+        offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
+        if (fw->text) {
+                int j;
+
+                for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
+                        REG_WR_IND(bp, offset, fw->text[j]);
+                }
+        }
+
+        /* Load the Data area. */
+        offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);
+        if (fw->data) {
+                int j;
+
+                for (j = 0; j < (fw->data_len / 4); j++, offset += 4) {
+                        REG_WR_IND(bp, offset, fw->data[j]);
+                }
+        }
+
+        /* Load the SBSS area. */
+        offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);
+        if (fw->sbss) {
+                int j;
+
+                for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) {
+                        REG_WR_IND(bp, offset, fw->sbss[j]);
+                }
+        }
+
+        /* Load the BSS area. */
+        offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);
+        if (fw->bss) {
+                int j;
+
+                for (j = 0; j < (fw->bss_len/4); j++, offset += 4) {
+                        REG_WR_IND(bp, offset, fw->bss[j]);
+                }
+        }
+
+        /* Load the Read-Only area. */
+        offset = cpu_reg->spad_base +
+                (fw->rodata_addr - cpu_reg->mips_view_base);
+        if (fw->rodata) {
+                int j;
+
+                for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4) {
+                        REG_WR_IND(bp, offset, fw->rodata[j]);
+                }
+        }
+
+        /* Clear the pre-fetch instruction. */
+        REG_WR_IND(bp, cpu_reg->inst, 0);
+        REG_WR_IND(bp, cpu_reg->pc, fw->start_addr);
+
+        /* Start the CPU. */
+        val = REG_RD_IND(bp, cpu_reg->mode);
+        val &= ~cpu_reg->mode_value_halt;
+        REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
+        REG_WR_IND(bp, cpu_reg->mode, val);
+}
+
+static void
+bnx2_init_cpus(struct bnx2 *bp)
+{
+        struct cpu_reg cpu_reg;
+        struct fw_info fw;
+
+        /* Initialize the RV2P processor. */
+        load_rv2p_fw(bp, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1), RV2P_PROC1);
+        load_rv2p_fw(bp, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2), RV2P_PROC2);
+
+        /* Initialize the RX Processor. */
+        cpu_reg.mode = BNX2_RXP_CPU_MODE;
+        cpu_reg.mode_value_halt = BNX2_RXP_CPU_MODE_SOFT_HALT;
+        cpu_reg.mode_value_sstep = BNX2_RXP_CPU_MODE_STEP_ENA;
+        cpu_reg.state = BNX2_RXP_CPU_STATE;
+        cpu_reg.state_value_clear = 0xffffff;
+        cpu_reg.gpr0 = BNX2_RXP_CPU_REG_FILE;
+        cpu_reg.evmask = BNX2_RXP_CPU_EVENT_MASK;
+        cpu_reg.pc = BNX2_RXP_CPU_PROGRAM_COUNTER;
+        cpu_reg.inst = BNX2_RXP_CPU_INSTRUCTION;
+        cpu_reg.bp = BNX2_RXP_CPU_HW_BREAKPOINT;
+        cpu_reg.spad_base = BNX2_RXP_SCRATCH;
+        cpu_reg.mips_view_base = 0x8000000;
+    
+        fw.ver_major = bnx2_RXP_b06FwReleaseMajor;
+        fw.ver_minor = bnx2_RXP_b06FwReleaseMinor;
+        fw.ver_fix = bnx2_RXP_b06FwReleaseFix;
+        fw.start_addr = bnx2_RXP_b06FwStartAddr;
+
+        fw.text_addr = bnx2_RXP_b06FwTextAddr;
+        fw.text_len = bnx2_RXP_b06FwTextLen;
+        fw.text_index = 0;
+        fw.text = bnx2_RXP_b06FwText;
+
+        fw.data_addr = bnx2_RXP_b06FwDataAddr;
+        fw.data_len = bnx2_RXP_b06FwDataLen;
+        fw.data_index = 0;
+        fw.data = bnx2_RXP_b06FwData;
+
+        fw.sbss_addr = bnx2_RXP_b06FwSbssAddr;
+        fw.sbss_len = bnx2_RXP_b06FwSbssLen;
+        fw.sbss_index = 0;
+        fw.sbss = bnx2_RXP_b06FwSbss;
+
+        fw.bss_addr = bnx2_RXP_b06FwBssAddr;
+        fw.bss_len = bnx2_RXP_b06FwBssLen;
+        fw.bss_index = 0;
+        fw.bss = bnx2_RXP_b06FwBss;
+
+        fw.rodata_addr = bnx2_RXP_b06FwRodataAddr;
+        fw.rodata_len = bnx2_RXP_b06FwRodataLen;
+        fw.rodata_index = 0;
+        fw.rodata = bnx2_RXP_b06FwRodata;
+
+        load_cpu_fw(bp, &cpu_reg, &fw);
+
+        /* Initialize the TX Processor. */
+        cpu_reg.mode = BNX2_TXP_CPU_MODE;
+        cpu_reg.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT;
+        cpu_reg.mode_value_sstep = BNX2_TXP_CPU_MODE_STEP_ENA;
+        cpu_reg.state = BNX2_TXP_CPU_STATE;
+        cpu_reg.state_value_clear = 0xffffff;
+        cpu_reg.gpr0 = BNX2_TXP_CPU_REG_FILE;
+        cpu_reg.evmask = BNX2_TXP_CPU_EVENT_MASK;
+        cpu_reg.pc = BNX2_TXP_CPU_PROGRAM_COUNTER;
+        cpu_reg.inst = BNX2_TXP_CPU_INSTRUCTION;
+        cpu_reg.bp = BNX2_TXP_CPU_HW_BREAKPOINT;
+        cpu_reg.spad_base = BNX2_TXP_SCRATCH;
+        cpu_reg.mips_view_base = 0x8000000;
+    
+        fw.ver_major = bnx2_TXP_b06FwReleaseMajor;
+        fw.ver_minor = bnx2_TXP_b06FwReleaseMinor;
+        fw.ver_fix = bnx2_TXP_b06FwReleaseFix;
+        fw.start_addr = bnx2_TXP_b06FwStartAddr;
+
+        fw.text_addr = bnx2_TXP_b06FwTextAddr;
+        fw.text_len = bnx2_TXP_b06FwTextLen;
+        fw.text_index = 0;
+        fw.text = bnx2_TXP_b06FwText;
+
+        fw.data_addr = bnx2_TXP_b06FwDataAddr;
+        fw.data_len = bnx2_TXP_b06FwDataLen;
+        fw.data_index = 0;
+        fw.data = bnx2_TXP_b06FwData;
+
+        fw.sbss_addr = bnx2_TXP_b06FwSbssAddr;
+        fw.sbss_len = bnx2_TXP_b06FwSbssLen;
+        fw.sbss_index = 0;
+        fw.sbss = bnx2_TXP_b06FwSbss;
+
+        fw.bss_addr = bnx2_TXP_b06FwBssAddr;
+        fw.bss_len = bnx2_TXP_b06FwBssLen;
+        fw.bss_index = 0;
+        fw.bss = bnx2_TXP_b06FwBss;
+
+        fw.rodata_addr = bnx2_TXP_b06FwRodataAddr;
+        fw.rodata_len = bnx2_TXP_b06FwRodataLen;
+        fw.rodata_index = 0;
+        fw.rodata = bnx2_TXP_b06FwRodata;
+
+        load_cpu_fw(bp, &cpu_reg, &fw);
+
+        /* Initialize the TX Patch-up Processor. */
+        cpu_reg.mode = BNX2_TPAT_CPU_MODE;
+        cpu_reg.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT;
+        cpu_reg.mode_value_sstep = BNX2_TPAT_CPU_MODE_STEP_ENA;
+        cpu_reg.state = BNX2_TPAT_CPU_STATE;
+        cpu_reg.state_value_clear = 0xffffff;
+        cpu_reg.gpr0 = BNX2_TPAT_CPU_REG_FILE;
+        cpu_reg.evmask = BNX2_TPAT_CPU_EVENT_MASK;
+        cpu_reg.pc = BNX2_TPAT_CPU_PROGRAM_COUNTER;
+        cpu_reg.inst = BNX2_TPAT_CPU_INSTRUCTION;
+        cpu_reg.bp = BNX2_TPAT_CPU_HW_BREAKPOINT;
+        cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
+        cpu_reg.mips_view_base = 0x8000000;
+    
+        fw.ver_major = bnx2_TPAT_b06FwReleaseMajor;
+        fw.ver_minor = bnx2_TPAT_b06FwReleaseMinor;
+        fw.ver_fix = bnx2_TPAT_b06FwReleaseFix;
+        fw.start_addr = bnx2_TPAT_b06FwStartAddr;
+
+        fw.text_addr = bnx2_TPAT_b06FwTextAddr;
+        fw.text_len = bnx2_TPAT_b06FwTextLen;
+        fw.text_index = 0;
+        fw.text = bnx2_TPAT_b06FwText;
+
+        fw.data_addr = bnx2_TPAT_b06FwDataAddr;
+        fw.data_len = bnx2_TPAT_b06FwDataLen;
+        fw.data_index = 0;
+        fw.data = bnx2_TPAT_b06FwData;
+
+        fw.sbss_addr = bnx2_TPAT_b06FwSbssAddr;
+        fw.sbss_len = bnx2_TPAT_b06FwSbssLen;
+        fw.sbss_index = 0;
+        fw.sbss = bnx2_TPAT_b06FwSbss;
+
+        fw.bss_addr = bnx2_TPAT_b06FwBssAddr;
+        fw.bss_len = bnx2_TPAT_b06FwBssLen;
+        fw.bss_index = 0;
+        fw.bss = bnx2_TPAT_b06FwBss;
+
+        fw.rodata_addr = bnx2_TPAT_b06FwRodataAddr;
+        fw.rodata_len = bnx2_TPAT_b06FwRodataLen;
+        fw.rodata_index = 0;
+        fw.rodata = bnx2_TPAT_b06FwRodata;
+
+        load_cpu_fw(bp, &cpu_reg, &fw);
+
+        /* Initialize the Completion Processor. */
+        cpu_reg.mode = BNX2_COM_CPU_MODE;
+        cpu_reg.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT;
+        cpu_reg.mode_value_sstep = BNX2_COM_CPU_MODE_STEP_ENA;
+        cpu_reg.state = BNX2_COM_CPU_STATE;
+        cpu_reg.state_value_clear = 0xffffff;
+        cpu_reg.gpr0 = BNX2_COM_CPU_REG_FILE;
+        cpu_reg.evmask = BNX2_COM_CPU_EVENT_MASK;
+        cpu_reg.pc = BNX2_COM_CPU_PROGRAM_COUNTER;
+        cpu_reg.inst = BNX2_COM_CPU_INSTRUCTION;
+        cpu_reg.bp = BNX2_COM_CPU_HW_BREAKPOINT;
+        cpu_reg.spad_base = BNX2_COM_SCRATCH;
+        cpu_reg.mips_view_base = 0x8000000;
+    
+        fw.ver_major = bnx2_COM_b06FwReleaseMajor;
+        fw.ver_minor = bnx2_COM_b06FwReleaseMinor;
+        fw.ver_fix = bnx2_COM_b06FwReleaseFix;
+        fw.start_addr = bnx2_COM_b06FwStartAddr;
+
+        fw.text_addr = bnx2_COM_b06FwTextAddr;
+        fw.text_len = bnx2_COM_b06FwTextLen;
+        fw.text_index = 0;
+        fw.text = bnx2_COM_b06FwText;
+
+        fw.data_addr = bnx2_COM_b06FwDataAddr;
+        fw.data_len = bnx2_COM_b06FwDataLen;
+        fw.data_index = 0;
+        fw.data = bnx2_COM_b06FwData;
+
+        fw.sbss_addr = bnx2_COM_b06FwSbssAddr;
+        fw.sbss_len = bnx2_COM_b06FwSbssLen;
+        fw.sbss_index = 0;
+        fw.sbss = bnx2_COM_b06FwSbss;
+
+        fw.bss_addr = bnx2_COM_b06FwBssAddr;
+        fw.bss_len = bnx2_COM_b06FwBssLen;
+        fw.bss_index = 0;
+        fw.bss = bnx2_COM_b06FwBss;
+
+        fw.rodata_addr = bnx2_COM_b06FwRodataAddr;
+        fw.rodata_len = bnx2_COM_b06FwRodataLen;
+        fw.rodata_index = 0;
+        fw.rodata = bnx2_COM_b06FwRodata;
+
+        load_cpu_fw(bp, &cpu_reg, &fw);
+
+}
+
+static int
+bnx2_set_power_state(struct bnx2 *bp, int state)
+{
+        u16 pmcsr;
+
+        pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
+
+        switch (state) {
+        case 0: {
+                u32 val;
+
+                pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
+                        (pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
+                        PCI_PM_CTRL_PME_STATUS);
+
+                if (pmcsr & PCI_PM_CTRL_STATE_MASK)
+                        /* delay required during transition out of D3hot */
+                        msleep(20);
+
+                val = REG_RD(bp, BNX2_EMAC_MODE);
+                val |= BNX2_EMAC_MODE_MPKT_RCVD | BNX2_EMAC_MODE_ACPI_RCVD;
+                val &= ~BNX2_EMAC_MODE_MPKT;
+                REG_WR(bp, BNX2_EMAC_MODE, val);
+
+                val = REG_RD(bp, BNX2_RPM_CONFIG);
+                val &= ~BNX2_RPM_CONFIG_ACPI_ENA;
+                REG_WR(bp, BNX2_RPM_CONFIG, val);
+                break;
+        }
+        case 3: {
+                int i;
+                u32 val, wol_msg;
+
+                if (bp->wol) {
+                        u32 advertising;
+                        u8 autoneg;
+
+                        autoneg = bp->autoneg;
+                        advertising = bp->advertising;
+
+                        bp->autoneg = AUTONEG_SPEED;
+                        bp->advertising = ADVERTISED_10baseT_Half |
+                                ADVERTISED_10baseT_Full |
+                                ADVERTISED_100baseT_Half |
+                                ADVERTISED_100baseT_Full |
+                                ADVERTISED_Autoneg;
+
+                        bnx2_setup_copper_phy(bp);
+
+                        bp->autoneg = autoneg;
+                        bp->advertising = advertising;
+
+                        bnx2_set_mac_addr(bp);
+
+                        val = REG_RD(bp, BNX2_EMAC_MODE);
+
+                        /* Enable port mode. */
+                        val &= ~BNX2_EMAC_MODE_PORT;
+                        val |= BNX2_EMAC_MODE_PORT_MII |
+                               BNX2_EMAC_MODE_MPKT_RCVD |
+                               BNX2_EMAC_MODE_ACPI_RCVD |
+                               BNX2_EMAC_MODE_FORCE_LINK |
+                               BNX2_EMAC_MODE_MPKT;
+
+                        REG_WR(bp, BNX2_EMAC_MODE, val);
+
+                        /* receive all multicast */
+                        for (i = 0; i < NUM_MC_HASH_REGISTERS; i++) {
+                                REG_WR(bp, BNX2_EMAC_MULTICAST_HASH0 + (i * 4),
+                                       0xffffffff);
+                        }
+                        REG_WR(bp, BNX2_EMAC_RX_MODE,
+                               BNX2_EMAC_RX_MODE_SORT_MODE);
+
+                        val = 1 | BNX2_RPM_SORT_USER0_BC_EN |
+                              BNX2_RPM_SORT_USER0_MC_EN;
+                        REG_WR(bp, BNX2_RPM_SORT_USER0, 0x0);
+                        REG_WR(bp, BNX2_RPM_SORT_USER0, val);
+                        REG_WR(bp, BNX2_RPM_SORT_USER0, val |
+                               BNX2_RPM_SORT_USER0_ENA);
+
+                        /* Need to enable EMAC and RPM for WOL. */
+                        REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
+                               BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE |
+                               BNX2_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE |
+                               BNX2_MISC_ENABLE_SET_BITS_EMAC_ENABLE);
+
+                        val = REG_RD(bp, BNX2_RPM_CONFIG);
+                        val &= ~BNX2_RPM_CONFIG_ACPI_ENA;
+                        REG_WR(bp, BNX2_RPM_CONFIG, val);
+
+                        wol_msg = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
+                }
+                else {
+                        wol_msg = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL;
+                }
+
+                bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg);
+
+                pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+                if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
+                    (CHIP_ID(bp) == CHIP_ID_5706_A1)) {
+
+                        if (bp->wol)
+                                pmcsr |= 3;
+                }
+                else {
+                        pmcsr |= 3;
+                }
+                if (bp->wol) {
+                        pmcsr |= PCI_PM_CTRL_PME_ENABLE;
+                }
+                pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
+                                      pmcsr);
+
+                /* No more memory access after this point until
+                 * device is brought back to D0.
+                 */
+                udelay(50);
+                break;
+        }
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+
+static int
+bnx2_acquire_nvram_lock(struct bnx2 *bp)
+{
+        u32 val;
+        int j;
+
+        /* Request access to the flash interface. */
+        REG_WR(bp, BNX2_NVM_SW_ARB, BNX2_NVM_SW_ARB_ARB_REQ_SET2);
+        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                val = REG_RD(bp, BNX2_NVM_SW_ARB);
+                if (val & BNX2_NVM_SW_ARB_ARB_ARB2)
+                        break;
+
+                udelay(5);
+        }
+
+        if (j >= NVRAM_TIMEOUT_COUNT)
+                return -EBUSY;
+
+        return 0;
+}
+
+static int
+bnx2_release_nvram_lock(struct bnx2 *bp)
+{
+        int j;
+        u32 val;
+
+        /* Relinquish nvram interface. */
+        REG_WR(bp, BNX2_NVM_SW_ARB, BNX2_NVM_SW_ARB_ARB_REQ_CLR2);
+
+        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                val = REG_RD(bp, BNX2_NVM_SW_ARB);
+                if (!(val & BNX2_NVM_SW_ARB_ARB_ARB2))
+                        break;
+
+                udelay(5);
+        }
+
+        if (j >= NVRAM_TIMEOUT_COUNT)
+                return -EBUSY;
+
+        return 0;
+}
+
+
+static int
+bnx2_enable_nvram_write(struct bnx2 *bp)
+{
+        u32 val;
+
+        val = REG_RD(bp, BNX2_MISC_CFG);
+        REG_WR(bp, BNX2_MISC_CFG, val | BNX2_MISC_CFG_NVM_WR_EN_PCI);
+
+        if (!bp->flash_info->buffered) {
+                int j;
+
+                REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE);
+                REG_WR(bp, BNX2_NVM_COMMAND,
+                       BNX2_NVM_COMMAND_WREN | BNX2_NVM_COMMAND_DOIT);
+
+                for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                        udelay(5);
+
+                        val = REG_RD(bp, BNX2_NVM_COMMAND);
+                        if (val & BNX2_NVM_COMMAND_DONE)
+                                break;
+                }
+
+                if (j >= NVRAM_TIMEOUT_COUNT)
+                        return -EBUSY;
+        }
+        return 0;
+}
+
+static void
+bnx2_disable_nvram_write(struct bnx2 *bp)
+{
+        u32 val;
+
+        val = REG_RD(bp, BNX2_MISC_CFG);
+        REG_WR(bp, BNX2_MISC_CFG, val & ~BNX2_MISC_CFG_NVM_WR_EN);
+}
+
+
+static void
+bnx2_enable_nvram_access(struct bnx2 *bp)
+{
+        u32 val;
+
+        val = REG_RD(bp, BNX2_NVM_ACCESS_ENABLE);
+        /* Enable both bits, even on read. */
+        REG_WR(bp, BNX2_NVM_ACCESS_ENABLE, 
+               val | BNX2_NVM_ACCESS_ENABLE_EN | BNX2_NVM_ACCESS_ENABLE_WR_EN);
+}
+
+static void
+bnx2_disable_nvram_access(struct bnx2 *bp)
+{
+        u32 val;
+
+        val = REG_RD(bp, BNX2_NVM_ACCESS_ENABLE);
+        /* Disable both bits, even after read. */
+        REG_WR(bp, BNX2_NVM_ACCESS_ENABLE, 
+                val & ~(BNX2_NVM_ACCESS_ENABLE_EN |
+                        BNX2_NVM_ACCESS_ENABLE_WR_EN));
+}
+
+static int
+bnx2_nvram_erase_page(struct bnx2 *bp, u32 offset)
+{
+        u32 cmd;
+        int j;
+
+        if (bp->flash_info->buffered)
+                /* Buffered flash, no erase needed */
+                return 0;
+
+        /* Build an erase command */
+        cmd = BNX2_NVM_COMMAND_ERASE | BNX2_NVM_COMMAND_WR |
+              BNX2_NVM_COMMAND_DOIT;
+
+        /* Need to clear DONE bit separately. */
+        REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE);
+
+        /* Address of the NVRAM to read from. */
+        REG_WR(bp, BNX2_NVM_ADDR, offset & BNX2_NVM_ADDR_NVM_ADDR_VALUE);
+
+        /* Issue an erase command. */
+        REG_WR(bp, BNX2_NVM_COMMAND, cmd);
+
+        /* Wait for completion. */
+        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                u32 val;
+
+                udelay(5);
+
+                val = REG_RD(bp, BNX2_NVM_COMMAND);
+                if (val & BNX2_NVM_COMMAND_DONE)
+                        break;
+        }
+
+        if (j >= NVRAM_TIMEOUT_COUNT)
+                return -EBUSY;
+
+        return 0;
+}
+
+static int
+bnx2_nvram_read_dword(struct bnx2 *bp, u32 offset, u8 *ret_val, u32 cmd_flags)
+{
+        u32 cmd;
+        int j;
+
+        /* Build the command word. */
+        cmd = BNX2_NVM_COMMAND_DOIT | cmd_flags;
+
+        /* Calculate an offset of a buffered flash. */
+        if (bp->flash_info->buffered) {
+                offset = ((offset / bp->flash_info->page_size) <<
+                           bp->flash_info->page_bits) +
+                          (offset % bp->flash_info->page_size);
+        }
+
+        /* Need to clear DONE bit separately. */
+        REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE);
+
+        /* Address of the NVRAM to read from. */
+        REG_WR(bp, BNX2_NVM_ADDR, offset & BNX2_NVM_ADDR_NVM_ADDR_VALUE);
+
+        /* Issue a read command. */
+        REG_WR(bp, BNX2_NVM_COMMAND, cmd);
+
+        /* Wait for completion. */
+        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                u32 val;
+
+                udelay(5);
+
+                val = REG_RD(bp, BNX2_NVM_COMMAND);
+                if (val & BNX2_NVM_COMMAND_DONE) {
+                        val = REG_RD(bp, BNX2_NVM_READ);
+
+                        val = be32_to_cpu(val);
+                        memcpy(ret_val, &val, 4);
+                        break;
+                }
+        }
+        if (j >= NVRAM_TIMEOUT_COUNT)
+                return -EBUSY;
+
+        return 0;
+}
+
+
+static int
+bnx2_nvram_write_dword(struct bnx2 *bp, u32 offset, u8 *val, u32 cmd_flags)
+{
+        u32 cmd, val32;
+        int j;
+
+        /* Build the command word. */
+        cmd = BNX2_NVM_COMMAND_DOIT | BNX2_NVM_COMMAND_WR | cmd_flags;
+
+        /* Calculate an offset of a buffered flash. */
+        if (bp->flash_info->buffered) {
+                offset = ((offset / bp->flash_info->page_size) <<
+                          bp->flash_info->page_bits) +
+                         (offset % bp->flash_info->page_size);
+        }
+
+        /* Need to clear DONE bit separately. */
+        REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE);
+
+        memcpy(&val32, val, 4);
+        val32 = cpu_to_be32(val32);
+
+        /* Write the data. */
+        REG_WR(bp, BNX2_NVM_WRITE, val32);
+
+        /* Address of the NVRAM to write to. */
+        REG_WR(bp, BNX2_NVM_ADDR, offset & BNX2_NVM_ADDR_NVM_ADDR_VALUE);
+
+        /* Issue the write command. */
+        REG_WR(bp, BNX2_NVM_COMMAND, cmd);
+
+        /* Wait for completion. */
+        for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+                udelay(5);
+
+                if (REG_RD(bp, BNX2_NVM_COMMAND) & BNX2_NVM_COMMAND_DONE)
+                        break;
+        }
+        if (j >= NVRAM_TIMEOUT_COUNT)
+                return -EBUSY;
+
+        return 0;
+}
+
+static int
+bnx2_init_nvram(struct bnx2 *bp)
+{
+        u32 val;
+        int j, entry_count, rc;
+        struct flash_spec *flash;
+
+        /* Determine the selected interface. */
+        val = REG_RD(bp, BNX2_NVM_CFG1);
+
+        entry_count = sizeof(flash_table) / sizeof(struct flash_spec);
+
+        rc = 0;
+        if (val & 0x40000000) {
+
+                /* Flash interface has been reconfigured */
+                for (j = 0, flash = &flash_table[0]; j < entry_count;
+                        j++, flash++) {
+
+                        if (val == flash->config1) {
+                                bp->flash_info = flash;
+                                break;
+                        }
+                }
+        }
+        else {
+                /* Not yet been reconfigured */
+
+                for (j = 0, flash = &flash_table[0]; j < entry_count;
+                        j++, flash++) {
+
+                        if ((val & FLASH_STRAP_MASK) == flash->strapping) {
+                                bp->flash_info = flash;
+
+                                /* Request access to the flash interface. */
+                                if ((rc = bnx2_acquire_nvram_lock(bp)) != 0)
+                                        return rc;
+
+                                /* Enable access to flash interface */
+                                bnx2_enable_nvram_access(bp);
+
+                                /* Reconfigure the flash interface */
+                                REG_WR(bp, BNX2_NVM_CFG1, flash->config1);
+                                REG_WR(bp, BNX2_NVM_CFG2, flash->config2);
+                                REG_WR(bp, BNX2_NVM_CFG3, flash->config3);
+                                REG_WR(bp, BNX2_NVM_WRITE1, flash->write1);
+
+                                /* Disable access to flash interface */
+                                bnx2_disable_nvram_access(bp);
+                                bnx2_release_nvram_lock(bp);
+
+                                break;
+                        }
+                }
+        } /* if (val & 0x40000000) */
+
+        if (j == entry_count) {
+                bp->flash_info = NULL;
+                printk(KERN_ALERT "Unknown flash/EEPROM type.\n");
+                rc = -ENODEV;
+        }
+
+        return rc;
+}
+
+static int
+bnx2_nvram_read(struct bnx2 *bp, u32 offset, u8 *ret_buf,
+                int buf_size)
+{
+        int rc = 0;
+        u32 cmd_flags, offset32, len32, extra;
+
+        if (buf_size == 0)
+                return 0;
+
+        /* Request access to the flash interface. */
+        if ((rc = bnx2_acquire_nvram_lock(bp)) != 0)
+                return rc;
+
+        /* Enable access to flash interface */
+        bnx2_enable_nvram_access(bp);
+
+        len32 = buf_size;
+        offset32 = offset;
+        extra = 0;
+
+        cmd_flags = 0;
+
+        if (offset32 & 3) {
+                u8 buf[4];
+                u32 pre_len;
+
+                offset32 &= ~3;
+                pre_len = 4 - (offset & 3);
+
+                if (pre_len >= len32) {
+                        pre_len = len32;
+                        cmd_flags = BNX2_NVM_COMMAND_FIRST |
+                                    BNX2_NVM_COMMAND_LAST;
+                }
+                else {
+                        cmd_flags = BNX2_NVM_COMMAND_FIRST;
+                }
+
+                rc = bnx2_nvram_read_dword(bp, offset32, buf, cmd_flags);
+
+                if (rc)
+                        return rc;
+
+                memcpy(ret_buf, buf + (offset & 3), pre_len);
+
+                offset32 += 4;
+                ret_buf += pre_len;
+                len32 -= pre_len;
+        }
+        if (len32 & 3) {
+                extra = 4 - (len32 & 3);
+                len32 = (len32 + 4) & ~3;
+        }
+
+        if (len32 == 4) {
+                u8 buf[4];
+
+                if (cmd_flags)
+                        cmd_flags = BNX2_NVM_COMMAND_LAST;
+                else
+                        cmd_flags = BNX2_NVM_COMMAND_FIRST |
+                                    BNX2_NVM_COMMAND_LAST;
+
+                rc = bnx2_nvram_read_dword(bp, offset32, buf, cmd_flags);
+
+                memcpy(ret_buf, buf, 4 - extra);
+        }
+        else if (len32 > 0) {
+                u8 buf[4];
+
+                /* Read the first word. */
+                if (cmd_flags)
+                        cmd_flags = 0;
+                else
+                        cmd_flags = BNX2_NVM_COMMAND_FIRST;
+
+                rc = bnx2_nvram_read_dword(bp, offset32, ret_buf, cmd_flags);
+
+                /* Advance to the next dword. */
+                offset32 += 4;
+                ret_buf += 4;
+                len32 -= 4;
+
+                while (len32 > 4 && rc == 0) {
+                        rc = bnx2_nvram_read_dword(bp, offset32, ret_buf, 0);
+
+                        /* Advance to the next dword. */
+                        offset32 += 4;
+                        ret_buf += 4;
+                        len32 -= 4;
+                }
+
+                if (rc)
+                        return rc;
+
+                cmd_flags = BNX2_NVM_COMMAND_LAST;
+                rc = bnx2_nvram_read_dword(bp, offset32, buf, cmd_flags);
+
+                memcpy(ret_buf, buf, 4 - extra);
+        }
+
+        /* Disable access to flash interface */
+        bnx2_disable_nvram_access(bp);
+
+        bnx2_release_nvram_lock(bp);
+
+        return rc;
+}
+
+static int
+bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf,
+                int buf_size)
+{
+        u32 written, offset32, len32;
+        u8 *buf, start[4], end[4];
+        int rc = 0;
+        int align_start, align_end;
+
+        buf = data_buf;
+        offset32 = offset;
+        len32 = buf_size;
+        align_start = align_end = 0;
+
+        if ((align_start = (offset32 & 3))) {
+                offset32 &= ~3;
+                len32 += align_start;
+                if ((rc = bnx2_nvram_read(bp, offset32, start, 4)))
+                        return rc;
+        }
+
+        if (len32 & 3) {
+                if ((len32 > 4) || !align_start) {
+                        align_end = 4 - (len32 & 3);
+                        len32 += align_end;
+                        if ((rc = bnx2_nvram_read(bp, offset32 + len32 - 4,
+                                end, 4))) {
+                                return rc;
+                        }
+                }
+        }
+
+        if (align_start || align_end) {
+                buf = kmalloc(len32, GFP_KERNEL);
+                if (buf == 0)
+                        return -ENOMEM;
+                if (align_start) {
+                        memcpy(buf, start, 4);
+                }
+                if (align_end) {
+                        memcpy(buf + len32 - 4, end, 4);
+                }
+                memcpy(buf + align_start, data_buf, buf_size);
+        }
+
+        written = 0;
+        while ((written < len32) && (rc == 0)) {
+                u32 page_start, page_end, data_start, data_end;
+                u32 addr, cmd_flags;
+                int i;
+                u8 flash_buffer[264];
+
+                /* Find the page_start addr */
+                page_start = offset32 + written;
+                page_start -= (page_start % bp->flash_info->page_size);
+                /* Find the page_end addr */
+                page_end = page_start + bp->flash_info->page_size;
+                /* Find the data_start addr */
+                data_start = (written == 0) ? offset32 : page_start;
+                /* Find the data_end addr */
+                data_end = (page_end > offset32 + len32) ? 
+                        (offset32 + len32) : page_end;
+
+                /* Request access to the flash interface. */
+                if ((rc = bnx2_acquire_nvram_lock(bp)) != 0)
+                        goto nvram_write_end;
+
+                /* Enable access to flash interface */
+                bnx2_enable_nvram_access(bp);
+
+                cmd_flags = BNX2_NVM_COMMAND_FIRST;
+                if (bp->flash_info->buffered == 0) {
+                        int j;
+
+                        /* Read the whole page into the buffer
+                         * (non-buffer flash only) */
+                        for (j = 0; j < bp->flash_info->page_size; j += 4) {
+                                if (j == (bp->flash_info->page_size - 4)) {
+                                        cmd_flags |= BNX2_NVM_COMMAND_LAST;
+                                }
+                                rc = bnx2_nvram_read_dword(bp,
+                                        page_start + j, 
+                                        &flash_buffer[j], 
+                                        cmd_flags);
+
+                                if (rc)
+                                        goto nvram_write_end;
+
+                                cmd_flags = 0;
+                        }
+                }
+
+                /* Enable writes to flash interface (unlock write-protect) */
+                if ((rc = bnx2_enable_nvram_write(bp)) != 0)
+                        goto nvram_write_end;
+
+                /* Erase the page */
+                if ((rc = bnx2_nvram_erase_page(bp, page_start)) != 0)
+                        goto nvram_write_end;
+
+                /* Re-enable the write again for the actual write */
+                bnx2_enable_nvram_write(bp);
+
+                /* Loop to write back the buffer data from page_start to
+                 * data_start */
+                i = 0;
+                if (bp->flash_info->buffered == 0) {
+                        for (addr = page_start; addr < data_start;
+                                addr += 4, i += 4) {
+                                
+                                rc = bnx2_nvram_write_dword(bp, addr,
+                                        &flash_buffer[i], cmd_flags);
+
+                                if (rc != 0)
+                                        goto nvram_write_end;
+
+                                cmd_flags = 0;
+                        }
+                }
+
+                /* Loop to write the new data from data_start to data_end */
+                for (addr = data_start; addr < data_end; addr += 4, i++) {
+                        if ((addr == page_end - 4) ||
+                                ((bp->flash_info->buffered) &&
+                                 (addr == data_end - 4))) {
+
+                                cmd_flags |= BNX2_NVM_COMMAND_LAST;
+                        }
+                        rc = bnx2_nvram_write_dword(bp, addr, buf,
+                                cmd_flags);
+
+                        if (rc != 0)
+                                goto nvram_write_end;
+
+                        cmd_flags = 0;
+                        buf += 4;
+                }
+
+                /* Loop to write back the buffer data from data_end
+                 * to page_end */
+                if (bp->flash_info->buffered == 0) {
+                        for (addr = data_end; addr < page_end;
+                                addr += 4, i += 4) {
+                        
+                                if (addr == page_end-4) {
+                                        cmd_flags = BNX2_NVM_COMMAND_LAST;
+                                }
+                                rc = bnx2_nvram_write_dword(bp, addr,
+                                        &flash_buffer[i], cmd_flags);
+
+                                if (rc != 0)
+                                        goto nvram_write_end;
+
+                                cmd_flags = 0;
+                        }
+                }
+
+                /* Disable writes to flash interface (lock write-protect) */
+                bnx2_disable_nvram_write(bp);
+
+                /* Disable access to flash interface */
+                bnx2_disable_nvram_access(bp);
+                bnx2_release_nvram_lock(bp);
+
+                /* Increment written */
+                written += data_end - data_start;
+        }
+
+nvram_write_end:
+        if (align_start || align_end)
+                kfree(buf);
+        return rc;
+}
+
+static int
+bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
+{
+        u32 val;
+        int i, rc = 0;
+
+        /* Wait for the current PCI transaction to complete before
+         * issuing a reset. */
+        REG_WR(bp, BNX2_MISC_ENABLE_CLR_BITS,
+               BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE |
+               BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE |
+               BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE |
+               BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE);
+        val = REG_RD(bp, BNX2_MISC_ENABLE_CLR_BITS);
+        udelay(5);
+
+        /* Deposit a driver reset signature so the firmware knows that
+         * this is a soft reset. */
+        REG_WR_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_DRV_RESET_SIGNATURE,
+                   BNX2_DRV_RESET_SIGNATURE_MAGIC);
+
+        bp->fw_timed_out = 0;
+
+        /* Wait for the firmware to tell us it is ok to issue a reset. */
+        bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT0 | reset_code);
+
+        /* Do a dummy read to force the chip to complete all current transaction
+         * before we issue a reset. */
+        val = REG_RD(bp, BNX2_MISC_ID);
+
+        val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+              BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+              BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
+
+        /* Chip reset. */
+        REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
+
+        if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
+            (CHIP_ID(bp) == CHIP_ID_5706_A1))
+                msleep(15);
+
+        /* Reset takes approximate 30 usec */
+        for (i = 0; i < 10; i++) {
+                val = REG_RD(bp, BNX2_PCICFG_MISC_CONFIG);
+                if ((val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+                            BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0) {
+                        break;
+                }
+                udelay(10);
+        }
+
+        if (val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+                   BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) {
+                printk(KERN_ERR PFX "Chip reset did not complete\n");
+                return -EBUSY;
+        }
+
+        /* Make sure byte swapping is properly configured. */
+        val = REG_RD(bp, BNX2_PCI_SWAP_DIAG0);
+        if (val != 0x01020304) {
+                printk(KERN_ERR PFX "Chip not in correct endian mode\n");
+                return -ENODEV;
+        }
+
+        bp->fw_timed_out = 0;
+
+        /* Wait for the firmware to finish its initialization. */
+        bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT1 | reset_code);
+
+        if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+                /* Adjust the voltage regular to two steps lower.  The default
+                 * of this register is 0x0000000e. */
+                REG_WR(bp, BNX2_MISC_VREG_CONTROL, 0x000000fa);
+
+                /* Remove bad rbuf memory from the free pool. */
+                rc = bnx2_alloc_bad_rbuf(bp);
+        }
+
+        return rc;
+}
+
+static int
+bnx2_init_chip(struct bnx2 *bp)
+{
+        u32 val;
+
+        /* Make sure the interrupt is not active. */
+        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+
+        val = BNX2_DMA_CONFIG_DATA_BYTE_SWAP |
+              BNX2_DMA_CONFIG_DATA_WORD_SWAP |
+#ifdef __BIG_ENDIAN
+              BNX2_DMA_CONFIG_CNTL_BYTE_SWAP | 
+#endif
+              BNX2_DMA_CONFIG_CNTL_WORD_SWAP | 
+              DMA_READ_CHANS << 12 |
+              DMA_WRITE_CHANS << 16;
+
+        val |= (0x2 << 20) | (1 << 11);
+
+        if ((bp->flags & PCIX_FLAG) && (bp->bus_speed_mhz = 133))
+                val |= (1 << 23);
+
+        if ((CHIP_NUM(bp) == CHIP_NUM_5706) &&
+            (CHIP_ID(bp) != CHIP_ID_5706_A0) && !(bp->flags & PCIX_FLAG))
+                val |= BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA;
+
+        REG_WR(bp, BNX2_DMA_CONFIG, val);
+
+        if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+                val = REG_RD(bp, BNX2_TDMA_CONFIG);
+                val |= BNX2_TDMA_CONFIG_ONE_DMA;
+                REG_WR(bp, BNX2_TDMA_CONFIG, val);
+        }
+
+        if (bp->flags & PCIX_FLAG) {
+                u16 val16;
+
+                pci_read_config_word(bp->pdev, bp->pcix_cap + PCI_X_CMD,
+                                     &val16);
+                pci_write_config_word(bp->pdev, bp->pcix_cap + PCI_X_CMD,
+                                      val16 & ~PCI_X_CMD_ERO);
+        }
+
+        REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
+               BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE |
+               BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE |
+               BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE);
+
+        /* Initialize context mapping and zero out the quick contexts.  The
+         * context block must have already been enabled. */
+        bnx2_init_context(bp);
+
+        bnx2_init_cpus(bp);
+        bnx2_init_nvram(bp);
+
+        bnx2_set_mac_addr(bp);
+
+        val = REG_RD(bp, BNX2_MQ_CONFIG);
+        val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
+        val |= BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;
+        REG_WR(bp, BNX2_MQ_CONFIG, val);
+
+        val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);
+        REG_WR(bp, BNX2_MQ_KNL_BYP_WIND_START, val);
+        REG_WR(bp, BNX2_MQ_KNL_WIND_END, val);
+
+        val = (BCM_PAGE_BITS - 8) << 24;
+        REG_WR(bp, BNX2_RV2P_CONFIG, val);
+
+        /* Configure page size. */
+        val = REG_RD(bp, BNX2_TBDR_CONFIG);
+        val &= ~BNX2_TBDR_CONFIG_PAGE_SIZE;
+        val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;
+        REG_WR(bp, BNX2_TBDR_CONFIG, val);
+
+        val = bp->mac_addr[0] +
+              (bp->mac_addr[1] << 8) +
+              (bp->mac_addr[2] << 16) +
+              bp->mac_addr[3] +
+              (bp->mac_addr[4] << 8) +
+              (bp->mac_addr[5] << 16);
+        REG_WR(bp, BNX2_EMAC_BACKOFF_SEED, val);
+
+        /* Program the MTU.  Also include 4 bytes for CRC32. */
+        val = bp->dev->mtu + ETH_HLEN + 4;
+        if (val > (MAX_ETHERNET_PACKET_SIZE + 4))
+                val |= BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA;
+        REG_WR(bp, BNX2_EMAC_RX_MTU_SIZE, val);
+
+        bp->last_status_idx = 0;
+        bp->rx_mode = BNX2_EMAC_RX_MODE_SORT_MODE;
+
+        /* Set up how to generate a link change interrupt. */
+        REG_WR(bp, BNX2_EMAC_ATTENTION_ENA, BNX2_EMAC_ATTENTION_ENA_LINK);
+
+        REG_WR(bp, BNX2_HC_STATUS_ADDR_L,
+               (u64) bp->status_blk_mapping & 0xffffffff);
+        REG_WR(bp, BNX2_HC_STATUS_ADDR_H, (u64) bp->status_blk_mapping >> 32);
+
+        REG_WR(bp, BNX2_HC_STATISTICS_ADDR_L,
+               (u64) bp->stats_blk_mapping & 0xffffffff);
+        REG_WR(bp, BNX2_HC_STATISTICS_ADDR_H,
+               (u64) bp->stats_blk_mapping >> 32);
+
+        REG_WR(bp, BNX2_HC_TX_QUICK_CONS_TRIP, 
+               (bp->tx_quick_cons_trip_int << 16) | bp->tx_quick_cons_trip);
+
+        REG_WR(bp, BNX2_HC_RX_QUICK_CONS_TRIP,
+               (bp->rx_quick_cons_trip_int << 16) | bp->rx_quick_cons_trip);
+
+        REG_WR(bp, BNX2_HC_COMP_PROD_TRIP,
+               (bp->comp_prod_trip_int << 16) | bp->comp_prod_trip);
+
+        REG_WR(bp, BNX2_HC_TX_TICKS, (bp->tx_ticks_int << 16) | bp->tx_ticks);
+
+        REG_WR(bp, BNX2_HC_RX_TICKS, (bp->rx_ticks_int << 16) | bp->rx_ticks);
+
+        REG_WR(bp, BNX2_HC_COM_TICKS,
+               (bp->com_ticks_int << 16) | bp->com_ticks);
+
+        REG_WR(bp, BNX2_HC_CMD_TICKS,
+               (bp->cmd_ticks_int << 16) | bp->cmd_ticks);
+
+        REG_WR(bp, BNX2_HC_STATS_TICKS, bp->stats_ticks & 0xffff00);
+        REG_WR(bp, BNX2_HC_STAT_COLLECT_TICKS, 0xbb8);  /* 3ms */
+
+        if (CHIP_ID(bp) == CHIP_ID_5706_A1)
+                REG_WR(bp, BNX2_HC_CONFIG, BNX2_HC_CONFIG_COLLECT_STATS);
+        else {
+                REG_WR(bp, BNX2_HC_CONFIG, BNX2_HC_CONFIG_RX_TMR_MODE |
+                       BNX2_HC_CONFIG_TX_TMR_MODE |
+                       BNX2_HC_CONFIG_COLLECT_STATS);
+        }
+
+        /* Clear internal stats counters. */
+        REG_WR(bp, BNX2_HC_COMMAND, BNX2_HC_COMMAND_CLR_STAT_NOW);
+
+        REG_WR(bp, BNX2_HC_ATTN_BITS_ENABLE, STATUS_ATTN_BITS_LINK_STATE);
+
+        /* Initialize the receive filter. */
+        bnx2_set_rx_mode(bp->dev);
+
+        bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET);
+
+        REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS, 0x5ffffff);
+        REG_RD(bp, BNX2_MISC_ENABLE_SET_BITS);
+
+        udelay(20);
+
+        return 0;
+}
+
+
+static void
+bnx2_init_tx_ring(struct bnx2 *bp)
+{
+        struct tx_bd *txbd;
+        u32 val;
+
+        txbd = &bp->tx_desc_ring[MAX_TX_DESC_CNT];
+                
+        txbd->tx_bd_haddr_hi = (u64) bp->tx_desc_mapping >> 32;
+        txbd->tx_bd_haddr_lo = (u64) bp->tx_desc_mapping & 0xffffffff;
+
+        bp->tx_prod = 0;
+        bp->tx_cons = 0;
+        bp->tx_prod_bseq = 0;
+        atomic_set(&bp->tx_avail_bd, bp->tx_ring_size);
+        
+        val = BNX2_L2CTX_TYPE_TYPE_L2;
+        val |= BNX2_L2CTX_TYPE_SIZE_L2;
+        CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TYPE, val);
+
+        val = BNX2_L2CTX_CMD_TYPE_TYPE_L2;
+        val |= 8 << 16;
+        CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_CMD_TYPE, val);
+
+        val = (u64) bp->tx_desc_mapping >> 32;
+        CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TBDR_BHADDR_HI, val);
+
+        val = (u64) bp->tx_desc_mapping & 0xffffffff;
+        CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TBDR_BHADDR_LO, val);
+}
+
+static void
+bnx2_init_rx_ring(struct bnx2 *bp)
+{
+        struct rx_bd *rxbd;
+        int i;
+        u16 prod, ring_prod; 
+        u32 val;
+
+        /* 8 for CRC and VLAN */
+        bp->rx_buf_use_size = bp->dev->mtu + ETH_HLEN + bp->rx_offset + 8;
+        /* 8 for alignment */
+        bp->rx_buf_size = bp->rx_buf_use_size + 8;
+
+        ring_prod = prod = bp->rx_prod = 0;
+        bp->rx_cons = 0;
+        bp->rx_prod_bseq = 0;
+                
+        rxbd = &bp->rx_desc_ring[0];
+        for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
+                rxbd->rx_bd_len = bp->rx_buf_use_size;
+                rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
+        }
+
+        rxbd->rx_bd_haddr_hi = (u64) bp->rx_desc_mapping >> 32;
+        rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping & 0xffffffff;
+
+        val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE;
+        val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2;
+        val |= 0x02 << 8;
+        CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_CTX_TYPE, val);
+
+        val = (u64) bp->rx_desc_mapping >> 32;
+        CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_HI, val);
+
+        val = (u64) bp->rx_desc_mapping & 0xffffffff;
+        CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val);
+
+        for ( ;ring_prod < bp->rx_ring_size; ) {
+                if (bnx2_alloc_rx_skb(bp, ring_prod) < 0) {
+                        break;
+                }
+                prod = NEXT_RX_BD(prod);
+                ring_prod = RX_RING_IDX(prod);
+        }
+        bp->rx_prod = prod;
+
+        REG_WR16(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BDIDX, prod);
+
+        REG_WR(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BSEQ, bp->rx_prod_bseq);
+}
+
+static void
+bnx2_free_tx_skbs(struct bnx2 *bp)
+{
+        int i;
+
+        if (bp->tx_buf_ring == NULL)
+                return;
+
+        for (i = 0; i < TX_DESC_CNT; ) {
+                struct sw_bd *tx_buf = &bp->tx_buf_ring[i];
+                struct sk_buff *skb = tx_buf->skb;
+                int j, last;
+
+                if (skb == NULL) {
+                        i++;
+                        continue;
+                }
+
+                pci_unmap_single(bp->pdev, pci_unmap_addr(tx_buf, mapping),
+                        skb_headlen(skb), PCI_DMA_TODEVICE);
+
+                tx_buf->skb = NULL;
+
+                last = skb_shinfo(skb)->nr_frags;
+                for (j = 0; j < last; j++) {
+                        tx_buf = &bp->tx_buf_ring[i + j + 1];
+                        pci_unmap_page(bp->pdev,
+                                pci_unmap_addr(tx_buf, mapping),
+                                skb_shinfo(skb)->frags[j].size,
+                                PCI_DMA_TODEVICE);
+                }
+                dev_kfree_skb_any(skb);
+                i += j + 1;
+        }
+
+}
+
+static void
+bnx2_free_rx_skbs(struct bnx2 *bp)
+{
+        int i;
+
+        if (bp->rx_buf_ring == NULL)
+                return;
+
+        for (i = 0; i < RX_DESC_CNT; i++) {
+                struct sw_bd *rx_buf = &bp->rx_buf_ring[i];
+                struct sk_buff *skb = rx_buf->skb;
+
+                if (skb == 0)
+                        continue;
+
+                pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping),
+                        bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
+
+                rx_buf->skb = NULL;
+
+                dev_kfree_skb_any(skb);
+        }
+}
+
+static void
+bnx2_free_skbs(struct bnx2 *bp)
+{
+        bnx2_free_tx_skbs(bp);
+        bnx2_free_rx_skbs(bp);
+}
+
+static int
+bnx2_reset_nic(struct bnx2 *bp, u32 reset_code)
+{
+        int rc;
+
+        rc = bnx2_reset_chip(bp, reset_code);
+        bnx2_free_skbs(bp);
+        if (rc)
+                return rc;
+
+        bnx2_init_chip(bp);
+        bnx2_init_tx_ring(bp);
+        bnx2_init_rx_ring(bp);
+        return 0;
+}
+
+static int
+bnx2_init_nic(struct bnx2 *bp)
+{
+        int rc;
+
+        if ((rc = bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET)) != 0)
+                return rc;
+
+        bnx2_init_phy(bp);
+        bnx2_set_link(bp);
+        return 0;
+}
+
+static int
+bnx2_test_registers(struct bnx2 *bp)
+{
+        int ret;
+        int i;
+        static struct {
+                u16   offset;
+                u16   flags;
+                u32   rw_mask;
+                u32   ro_mask;
+        } reg_tbl[] = {
+                { 0x006c, 0, 0x00000000, 0x0000003f },
+                { 0x0090, 0, 0xffffffff, 0x00000000 },
+                { 0x0094, 0, 0x00000000, 0x00000000 },
+
+                { 0x0404, 0, 0x00003f00, 0x00000000 },
+                { 0x0418, 0, 0x00000000, 0xffffffff },
+                { 0x041c, 0, 0x00000000, 0xffffffff },
+                { 0x0420, 0, 0x00000000, 0x80ffffff },
+                { 0x0424, 0, 0x00000000, 0x00000000 },
+                { 0x0428, 0, 0x00000000, 0x00000001 },
+                { 0x0450, 0, 0x00000000, 0x0000ffff },
+                { 0x0454, 0, 0x00000000, 0xffffffff },
+                { 0x0458, 0, 0x00000000, 0xffffffff },
+
+                { 0x0808, 0, 0x00000000, 0xffffffff },
+                { 0x0854, 0, 0x00000000, 0xffffffff },
+                { 0x0868, 0, 0x00000000, 0x77777777 },
+                { 0x086c, 0, 0x00000000, 0x77777777 },
+                { 0x0870, 0, 0x00000000, 0x77777777 },
+                { 0x0874, 0, 0x00000000, 0x77777777 },
+
+                { 0x0c00, 0, 0x00000000, 0x00000001 },
+                { 0x0c04, 0, 0x00000000, 0x03ff0001 },
+                { 0x0c08, 0, 0x0f0ff073, 0x00000000 },
+                { 0x0c0c, 0, 0x00ffffff, 0x00000000 },
+                { 0x0c30, 0, 0x00000000, 0xffffffff },
+                { 0x0c34, 0, 0x00000000, 0xffffffff },
+                { 0x0c38, 0, 0x00000000, 0xffffffff },
+                { 0x0c3c, 0, 0x00000000, 0xffffffff },
+                { 0x0c40, 0, 0x00000000, 0xffffffff },
+                { 0x0c44, 0, 0x00000000, 0xffffffff },
+                { 0x0c48, 0, 0x00000000, 0x0007ffff },
+                { 0x0c4c, 0, 0x00000000, 0xffffffff },
+                { 0x0c50, 0, 0x00000000, 0xffffffff },
+                { 0x0c54, 0, 0x00000000, 0xffffffff },
+                { 0x0c58, 0, 0x00000000, 0xffffffff },
+                { 0x0c5c, 0, 0x00000000, 0xffffffff },
+                { 0x0c60, 0, 0x00000000, 0xffffffff },
+                { 0x0c64, 0, 0x00000000, 0xffffffff },
+                { 0x0c68, 0, 0x00000000, 0xffffffff },
+                { 0x0c6c, 0, 0x00000000, 0xffffffff },
+                { 0x0c70, 0, 0x00000000, 0xffffffff },
+                { 0x0c74, 0, 0x00000000, 0xffffffff },
+                { 0x0c78, 0, 0x00000000, 0xffffffff },
+                { 0x0c7c, 0, 0x00000000, 0xffffffff },
+                { 0x0c80, 0, 0x00000000, 0xffffffff },
+                { 0x0c84, 0, 0x00000000, 0xffffffff },
+                { 0x0c88, 0, 0x00000000, 0xffffffff },
+                { 0x0c8c, 0, 0x00000000, 0xffffffff },
+                { 0x0c90, 0, 0x00000000, 0xffffffff },
+                { 0x0c94, 0, 0x00000000, 0xffffffff },
+                { 0x0c98, 0, 0x00000000, 0xffffffff },
+                { 0x0c9c, 0, 0x00000000, 0xffffffff },
+                { 0x0ca0, 0, 0x00000000, 0xffffffff },
+                { 0x0ca4, 0, 0x00000000, 0xffffffff },
+                { 0x0ca8, 0, 0x00000000, 0x0007ffff },
+                { 0x0cac, 0, 0x00000000, 0xffffffff },
+                { 0x0cb0, 0, 0x00000000, 0xffffffff },
+                { 0x0cb4, 0, 0x00000000, 0xffffffff },
+                { 0x0cb8, 0, 0x00000000, 0xffffffff },
+                { 0x0cbc, 0, 0x00000000, 0xffffffff },
+                { 0x0cc0, 0, 0x00000000, 0xffffffff },
+                { 0x0cc4, 0, 0x00000000, 0xffffffff },
+                { 0x0cc8, 0, 0x00000000, 0xffffffff },
+                { 0x0ccc, 0, 0x00000000, 0xffffffff },
+                { 0x0cd0, 0, 0x00000000, 0xffffffff },
+                { 0x0cd4, 0, 0x00000000, 0xffffffff },
+                { 0x0cd8, 0, 0x00000000, 0xffffffff },
+                { 0x0cdc, 0, 0x00000000, 0xffffffff },
+                { 0x0ce0, 0, 0x00000000, 0xffffffff },
+                { 0x0ce4, 0, 0x00000000, 0xffffffff },
+                { 0x0ce8, 0, 0x00000000, 0xffffffff },
+                { 0x0cec, 0, 0x00000000, 0xffffffff },
+                { 0x0cf0, 0, 0x00000000, 0xffffffff },
+                { 0x0cf4, 0, 0x00000000, 0xffffffff },
+                { 0x0cf8, 0, 0x00000000, 0xffffffff },
+                { 0x0cfc, 0, 0x00000000, 0xffffffff },
+                { 0x0d00, 0, 0x00000000, 0xffffffff },
+                { 0x0d04, 0, 0x00000000, 0xffffffff },
+
+                { 0x1000, 0, 0x00000000, 0x00000001 },
+                { 0x1004, 0, 0x00000000, 0x000f0001 },
+                { 0x1044, 0, 0x00000000, 0xffc003ff },
+                { 0x1080, 0, 0x00000000, 0x0001ffff },
+                { 0x1084, 0, 0x00000000, 0xffffffff },
+                { 0x1088, 0, 0x00000000, 0xffffffff },
+                { 0x108c, 0, 0x00000000, 0xffffffff },
+                { 0x1090, 0, 0x00000000, 0xffffffff },
+                { 0x1094, 0, 0x00000000, 0xffffffff },
+                { 0x1098, 0, 0x00000000, 0xffffffff },
+                { 0x109c, 0, 0x00000000, 0xffffffff },
+                { 0x10a0, 0, 0x00000000, 0xffffffff },
+
+                { 0x1408, 0, 0x01c00800, 0x00000000 },
+                { 0x149c, 0, 0x8000ffff, 0x00000000 },
+                { 0x14a8, 0, 0x00000000, 0x000001ff },
+                { 0x14ac, 0, 0x4fffffff, 0x10000000 },
+                { 0x14b0, 0, 0x00000002, 0x00000001 },
+                { 0x14b8, 0, 0x00000000, 0x00000000 },
+                { 0x14c0, 0, 0x00000000, 0x00000009 },
+                { 0x14c4, 0, 0x00003fff, 0x00000000 },
+                { 0x14cc, 0, 0x00000000, 0x00000001 },
+                { 0x14d0, 0, 0xffffffff, 0x00000000 },
+                { 0x1500, 0, 0x00000000, 0xffffffff },
+                { 0x1504, 0, 0x00000000, 0xffffffff },
+                { 0x1508, 0, 0x00000000, 0xffffffff },
+                { 0x150c, 0, 0x00000000, 0xffffffff },
+                { 0x1510, 0, 0x00000000, 0xffffffff },
+                { 0x1514, 0, 0x00000000, 0xffffffff },
+                { 0x1518, 0, 0x00000000, 0xffffffff },
+                { 0x151c, 0, 0x00000000, 0xffffffff },
+                { 0x1520, 0, 0x00000000, 0xffffffff },
+                { 0x1524, 0, 0x00000000, 0xffffffff },
+                { 0x1528, 0, 0x00000000, 0xffffffff },
+                { 0x152c, 0, 0x00000000, 0xffffffff },
+                { 0x1530, 0, 0x00000000, 0xffffffff },
+                { 0x1534, 0, 0x00000000, 0xffffffff },
+                { 0x1538, 0, 0x00000000, 0xffffffff },
+                { 0x153c, 0, 0x00000000, 0xffffffff },
+                { 0x1540, 0, 0x00000000, 0xffffffff },
+                { 0x1544, 0, 0x00000000, 0xffffffff },
+                { 0x1548, 0, 0x00000000, 0xffffffff },
+                { 0x154c, 0, 0x00000000, 0xffffffff },
+                { 0x1550, 0, 0x00000000, 0xffffffff },
+                { 0x1554, 0, 0x00000000, 0xffffffff },
+                { 0x1558, 0, 0x00000000, 0xffffffff },
+                { 0x1600, 0, 0x00000000, 0xffffffff },
+                { 0x1604, 0, 0x00000000, 0xffffffff },
+                { 0x1608, 0, 0x00000000, 0xffffffff },
+                { 0x160c, 0, 0x00000000, 0xffffffff },
+                { 0x1610, 0, 0x00000000, 0xffffffff },
+                { 0x1614, 0, 0x00000000, 0xffffffff },
+                { 0x1618, 0, 0x00000000, 0xffffffff },
+                { 0x161c, 0, 0x00000000, 0xffffffff },
+                { 0x1620, 0, 0x00000000, 0xffffffff },
+                { 0x1624, 0, 0x00000000, 0xffffffff },
+                { 0x1628, 0, 0x00000000, 0xffffffff },
+                { 0x162c, 0, 0x00000000, 0xffffffff },
+                { 0x1630, 0, 0x00000000, 0xffffffff },
+                { 0x1634, 0, 0x00000000, 0xffffffff },
+                { 0x1638, 0, 0x00000000, 0xffffffff },
+                { 0x163c, 0, 0x00000000, 0xffffffff },
+                { 0x1640, 0, 0x00000000, 0xffffffff },
+                { 0x1644, 0, 0x00000000, 0xffffffff },
+                { 0x1648, 0, 0x00000000, 0xffffffff },
+                { 0x164c, 0, 0x00000000, 0xffffffff },
+                { 0x1650, 0, 0x00000000, 0xffffffff },
+                { 0x1654, 0, 0x00000000, 0xffffffff },
+
+                { 0x1800, 0, 0x00000000, 0x00000001 },
+                { 0x1804, 0, 0x00000000, 0x00000003 },
+                { 0x1840, 0, 0x00000000, 0xffffffff },
+                { 0x1844, 0, 0x00000000, 0xffffffff },
+                { 0x1848, 0, 0x00000000, 0xffffffff },
+                { 0x184c, 0, 0x00000000, 0xffffffff },
+                { 0x1850, 0, 0x00000000, 0xffffffff },
+                { 0x1900, 0, 0x7ffbffff, 0x00000000 },
+                { 0x1904, 0, 0xffffffff, 0x00000000 },
+                { 0x190c, 0, 0xffffffff, 0x00000000 },
+                { 0x1914, 0, 0xffffffff, 0x00000000 },
+                { 0x191c, 0, 0xffffffff, 0x00000000 },
+                { 0x1924, 0, 0xffffffff, 0x00000000 },
+                { 0x192c, 0, 0xffffffff, 0x00000000 },
+                { 0x1934, 0, 0xffffffff, 0x00000000 },
+                { 0x193c, 0, 0xffffffff, 0x00000000 },
+                { 0x1944, 0, 0xffffffff, 0x00000000 },
+                { 0x194c, 0, 0xffffffff, 0x00000000 },
+                { 0x1954, 0, 0xffffffff, 0x00000000 },
+                { 0x195c, 0, 0xffffffff, 0x00000000 },
+                { 0x1964, 0, 0xffffffff, 0x00000000 },
+                { 0x196c, 0, 0xffffffff, 0x00000000 },
+                { 0x1974, 0, 0xffffffff, 0x00000000 },
+                { 0x197c, 0, 0xffffffff, 0x00000000 },
+                { 0x1980, 0, 0x0700ffff, 0x00000000 },
+
+                { 0x1c00, 0, 0x00000000, 0x00000001 },
+                { 0x1c04, 0, 0x00000000, 0x00000003 },
+                { 0x1c08, 0, 0x0000000f, 0x00000000 },
+                { 0x1c40, 0, 0x00000000, 0xffffffff },
+                { 0x1c44, 0, 0x00000000, 0xffffffff },
+                { 0x1c48, 0, 0x00000000, 0xffffffff },
+                { 0x1c4c, 0, 0x00000000, 0xffffffff },
+                { 0x1c50, 0, 0x00000000, 0xffffffff },
+                { 0x1d00, 0, 0x7ffbffff, 0x00000000 },
+                { 0x1d04, 0, 0xffffffff, 0x00000000 },
+                { 0x1d0c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d14, 0, 0xffffffff, 0x00000000 },
+                { 0x1d1c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d24, 0, 0xffffffff, 0x00000000 },
+                { 0x1d2c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d34, 0, 0xffffffff, 0x00000000 },
+                { 0x1d3c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d44, 0, 0xffffffff, 0x00000000 },
+                { 0x1d4c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d54, 0, 0xffffffff, 0x00000000 },
+                { 0x1d5c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d64, 0, 0xffffffff, 0x00000000 },
+                { 0x1d6c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d74, 0, 0xffffffff, 0x00000000 },
+                { 0x1d7c, 0, 0xffffffff, 0x00000000 },
+                { 0x1d80, 0, 0x0700ffff, 0x00000000 },
+
+                { 0x2004, 0, 0x00000000, 0x0337000f },
+                { 0x2008, 0, 0xffffffff, 0x00000000 },
+                { 0x200c, 0, 0xffffffff, 0x00000000 },
+                { 0x2010, 0, 0xffffffff, 0x00000000 },
+                { 0x2014, 0, 0x801fff80, 0x00000000 },
+                { 0x2018, 0, 0x000003ff, 0x00000000 },
+
+                { 0x2800, 0, 0x00000000, 0x00000001 },
+                { 0x2804, 0, 0x00000000, 0x00003f01 },
+                { 0x2808, 0, 0x0f3f3f03, 0x00000000 },
+                { 0x2810, 0, 0xffff0000, 0x00000000 },
+                { 0x2814, 0, 0xffff0000, 0x00000000 },
+                { 0x2818, 0, 0xffff0000, 0x00000000 },
+                { 0x281c, 0, 0xffff0000, 0x00000000 },
+                { 0x2834, 0, 0xffffffff, 0x00000000 },
+                { 0x2840, 0, 0x00000000, 0xffffffff },
+                { 0x2844, 0, 0x00000000, 0xffffffff },
+                { 0x2848, 0, 0xffffffff, 0x00000000 },
+                { 0x284c, 0, 0xf800f800, 0x07ff07ff },
+
+                { 0x2c00, 0, 0x00000000, 0x00000011 },
+                { 0x2c04, 0, 0x00000000, 0x00030007 },
+
+                { 0x3000, 0, 0x00000000, 0x00000001 },
+                { 0x3004, 0, 0x00000000, 0x007007ff },
+                { 0x3008, 0, 0x00000003, 0x00000000 },
+                { 0x300c, 0, 0xffffffff, 0x00000000 },
+                { 0x3010, 0, 0xffffffff, 0x00000000 },
+                { 0x3014, 0, 0xffffffff, 0x00000000 },
+                { 0x3034, 0, 0xffffffff, 0x00000000 },
+                { 0x3038, 0, 0xffffffff, 0x00000000 },
+                { 0x3050, 0, 0x00000001, 0x00000000 },
+
+                { 0x3c00, 0, 0x00000000, 0x00000001 },
+                { 0x3c04, 0, 0x00000000, 0x00070000 },
+                { 0x3c08, 0, 0x00007f71, 0x07f00000 },
+                { 0x3c0c, 0, 0x1f3ffffc, 0x00000000 },
+                { 0x3c10, 0, 0xffffffff, 0x00000000 },
+                { 0x3c14, 0, 0x00000000, 0xffffffff },
+                { 0x3c18, 0, 0x00000000, 0xffffffff },
+                { 0x3c1c, 0, 0xfffff000, 0x00000000 },
+                { 0x3c20, 0, 0xffffff00, 0x00000000 },
+                { 0x3c24, 0, 0xffffffff, 0x00000000 },
+                { 0x3c28, 0, 0xffffffff, 0x00000000 },
+                { 0x3c2c, 0, 0xffffffff, 0x00000000 },
+                { 0x3c30, 0, 0xffffffff, 0x00000000 },
+                { 0x3c34, 0, 0xffffffff, 0x00000000 },
+                { 0x3c38, 0, 0xffffffff, 0x00000000 },
+                { 0x3c3c, 0, 0xffffffff, 0x00000000 },
+                { 0x3c40, 0, 0xffffffff, 0x00000000 },
+                { 0x3c44, 0, 0xffffffff, 0x00000000 },
+                { 0x3c48, 0, 0xffffffff, 0x00000000 },
+                { 0x3c4c, 0, 0xffffffff, 0x00000000 },
+                { 0x3c50, 0, 0xffffffff, 0x00000000 },
+                { 0x3c54, 0, 0xffffffff, 0x00000000 },
+                { 0x3c58, 0, 0xffffffff, 0x00000000 },
+                { 0x3c5c, 0, 0xffffffff, 0x00000000 },
+                { 0x3c60, 0, 0xffffffff, 0x00000000 },
+                { 0x3c64, 0, 0xffffffff, 0x00000000 },
+                { 0x3c68, 0, 0xffffffff, 0x00000000 },
+                { 0x3c6c, 0, 0xffffffff, 0x00000000 },
+                { 0x3c70, 0, 0xffffffff, 0x00000000 },
+                { 0x3c74, 0, 0x0000003f, 0x00000000 },
+                { 0x3c78, 0, 0x00000000, 0x00000000 },
+                { 0x3c7c, 0, 0x00000000, 0x00000000 },
+                { 0x3c80, 0, 0x3fffffff, 0x00000000 },
+                { 0x3c84, 0, 0x0000003f, 0x00000000 },
+                { 0x3c88, 0, 0x00000000, 0xffffffff },
+                { 0x3c8c, 0, 0x00000000, 0xffffffff },
+
+                { 0x4000, 0, 0x00000000, 0x00000001 },
+                { 0x4004, 0, 0x00000000, 0x00030000 },
+                { 0x4008, 0, 0x00000ff0, 0x00000000 },
+                { 0x400c, 0, 0xffffffff, 0x00000000 },
+                { 0x4088, 0, 0x00000000, 0x00070303 },
+
+                { 0x4400, 0, 0x00000000, 0x00000001 },
+                { 0x4404, 0, 0x00000000, 0x00003f01 },
+                { 0x4408, 0, 0x7fff00ff, 0x00000000 },
+                { 0x440c, 0, 0xffffffff, 0x00000000 },
+                { 0x4410, 0, 0xffff,     0x0000 },
+                { 0x4414, 0, 0xffff,     0x0000 },
+                { 0x4418, 0, 0xffff,     0x0000 },
+                { 0x441c, 0, 0xffff,     0x0000 },
+                { 0x4428, 0, 0xffffffff, 0x00000000 },
+                { 0x442c, 0, 0xffffffff, 0x00000000 },
+                { 0x4430, 0, 0xffffffff, 0x00000000 },
+                { 0x4434, 0, 0xffffffff, 0x00000000 },
+                { 0x4438, 0, 0xffffffff, 0x00000000 },
+                { 0x443c, 0, 0xffffffff, 0x00000000 },
+                { 0x4440, 0, 0xffffffff, 0x00000000 },
+                { 0x4444, 0, 0xffffffff, 0x00000000 },
+
+                { 0x4c00, 0, 0x00000000, 0x00000001 },
+                { 0x4c04, 0, 0x00000000, 0x0000003f },
+                { 0x4c08, 0, 0xffffffff, 0x00000000 },
+                { 0x4c0c, 0, 0x0007fc00, 0x00000000 },
+                { 0x4c10, 0, 0x80003fe0, 0x00000000 },
+                { 0x4c14, 0, 0xffffffff, 0x00000000 },
+                { 0x4c44, 0, 0x00000000, 0x9fff9fff },
+                { 0x4c48, 0, 0x00000000, 0xb3009fff },
+                { 0x4c4c, 0, 0x00000000, 0x77f33b30 },
+                { 0x4c50, 0, 0x00000000, 0xffffffff },
+
+                { 0x5004, 0, 0x00000000, 0x0000007f },
+                { 0x5008, 0, 0x0f0007ff, 0x00000000 },
+                { 0x500c, 0, 0xf800f800, 0x07ff07ff },
+
+                { 0x5400, 0, 0x00000008, 0x00000001 },
+                { 0x5404, 0, 0x00000000, 0x0000003f },
+                { 0x5408, 0, 0x0000001f, 0x00000000 },
+                { 0x540c, 0, 0xffffffff, 0x00000000 },
+                { 0x5410, 0, 0xffffffff, 0x00000000 },
+                { 0x5414, 0, 0x0000ffff, 0x00000000 },
+                { 0x5418, 0, 0x0000ffff, 0x00000000 },
+                { 0x541c, 0, 0x0000ffff, 0x00000000 },
+                { 0x5420, 0, 0x0000ffff, 0x00000000 },
+                { 0x5428, 0, 0x000000ff, 0x00000000 },
+                { 0x542c, 0, 0xff00ffff, 0x00000000 },
+                { 0x5430, 0, 0x001fff80, 0x00000000 },
+                { 0x5438, 0, 0xffffffff, 0x00000000 },
+                { 0x543c, 0, 0xffffffff, 0x00000000 },
+                { 0x5440, 0, 0xf800f800, 0x07ff07ff },
+
+                { 0x5c00, 0, 0x00000000, 0x00000001 },
+                { 0x5c04, 0, 0x00000000, 0x0003000f },
+                { 0x5c08, 0, 0x00000003, 0x00000000 },
+                { 0x5c0c, 0, 0x0000fff8, 0x00000000 },
+                { 0x5c10, 0, 0x00000000, 0xffffffff },
+                { 0x5c80, 0, 0x00000000, 0x0f7113f1 },
+                { 0x5c84, 0, 0x00000000, 0x0000f333 },
+                { 0x5c88, 0, 0x00000000, 0x00077373 },
+                { 0x5c8c, 0, 0x00000000, 0x0007f737 },
+
+                { 0x6808, 0, 0x0000ff7f, 0x00000000 },
+                { 0x680c, 0, 0xffffffff, 0x00000000 },
+                { 0x6810, 0, 0xffffffff, 0x00000000 },
+                { 0x6814, 0, 0xffffffff, 0x00000000 },
+                { 0x6818, 0, 0xffffffff, 0x00000000 },
+                { 0x681c, 0, 0xffffffff, 0x00000000 },
+                { 0x6820, 0, 0x00ff00ff, 0x00000000 },
+                { 0x6824, 0, 0x00ff00ff, 0x00000000 },
+                { 0x6828, 0, 0x00ff00ff, 0x00000000 },
+                { 0x682c, 0, 0x03ff03ff, 0x00000000 },
+                { 0x6830, 0, 0x03ff03ff, 0x00000000 },
+                { 0x6834, 0, 0x03ff03ff, 0x00000000 },
+                { 0x6838, 0, 0x03ff03ff, 0x00000000 },
+                { 0x683c, 0, 0x0000ffff, 0x00000000 },
+                { 0x6840, 0, 0x00000ff0, 0x00000000 },
+                { 0x6844, 0, 0x00ffff00, 0x00000000 },
+                { 0x684c, 0, 0xffffffff, 0x00000000 },
+                { 0x6850, 0, 0x7f7f7f7f, 0x00000000 },
+                { 0x6854, 0, 0x7f7f7f7f, 0x00000000 },
+                { 0x6858, 0, 0x7f7f7f7f, 0x00000000 },
+                { 0x685c, 0, 0x7f7f7f7f, 0x00000000 },
+                { 0x6908, 0, 0x00000000, 0x0001ff0f },
+                { 0x690c, 0, 0x00000000, 0x0ffe00f0 },
+
+                { 0xffff, 0, 0x00000000, 0x00000000 },
+        };
+
+        ret = 0;
+        for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
+                u32 offset, rw_mask, ro_mask, save_val, val;
+
+                offset = (u32) reg_tbl[i].offset;
+                rw_mask = reg_tbl[i].rw_mask;
+                ro_mask = reg_tbl[i].ro_mask;
+
+                save_val = readl((u8 *) bp->regview + offset);
+
+                writel(0, (u8 *) bp->regview + offset);
+
+                val = readl((u8 *) bp->regview + offset);
+                if ((val & rw_mask) != 0) {
+                        goto reg_test_err;
+                }
+
+                if ((val & ro_mask) != (save_val & ro_mask)) {
+                        goto reg_test_err;
+                }
+
+                writel(0xffffffff, (u8 *) bp->regview + offset);
+
+                val = readl((u8 *) bp->regview + offset);
+                if ((val & rw_mask) != rw_mask) {
+                        goto reg_test_err;
+                }
+
+                if ((val & ro_mask) != (save_val & ro_mask)) {
+                        goto reg_test_err;
+                }
+
+                writel(save_val, (u8 *) bp->regview + offset);
+                continue;
+
+reg_test_err:
+                writel(save_val, (u8 *) bp->regview + offset);
+                ret = -ENODEV;
+                break;
+        }
+        return ret;
+}
+
+static int
+bnx2_do_mem_test(struct bnx2 *bp, u32 start, u32 size)
+{
+        static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0x55555555,
+                0xaaaaaaaa , 0xaa55aa55, 0x55aa55aa };
+        int i;
+
+        for (i = 0; i < sizeof(test_pattern) / 4; i++) {
+                u32 offset;
+
+                for (offset = 0; offset < size; offset += 4) {
+
+                        REG_WR_IND(bp, start + offset, test_pattern[i]);
+
+                        if (REG_RD_IND(bp, start + offset) !=
+                                test_pattern[i]) {
+                                return -ENODEV;
+                        }
+                }
+        }
+        return 0;
+}
+
+static int
+bnx2_test_memory(struct bnx2 *bp)
+{
+        int ret = 0;
+        int i;
+        static struct {
+                u32   offset;
+                u32   len;
+        } mem_tbl[] = {
+                { 0x60000,  0x4000 },
+                { 0xa0000,  0x4000 },
+                { 0xe0000,  0x4000 },
+                { 0x120000, 0x4000 },
+                { 0x1a0000, 0x4000 },
+                { 0x160000, 0x4000 },
+                { 0xffffffff, 0    },
+        };
+
+        for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
+                if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset,
+                        mem_tbl[i].len)) != 0) {
+                        return ret;
+                }
+        }
+        
+        return ret;
+}
+
+static int
+bnx2_test_loopback(struct bnx2 *bp)
+{
+        unsigned int pkt_size, num_pkts, i;
+        struct sk_buff *skb, *rx_skb;
+        unsigned char *packet;
+        u16 rx_start_idx, rx_idx, send_idx;
+        u32 send_bseq, val;
+        dma_addr_t map;
+        struct tx_bd *txbd;
+        struct sw_bd *rx_buf;
+        struct l2_fhdr *rx_hdr;
+        int ret = -ENODEV;
+
+        if (!netif_running(bp->dev))
+                return -ENODEV;
+
+        bp->loopback = MAC_LOOPBACK;
+        bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_DIAG);
+        bnx2_set_mac_loopback(bp);
+
+        pkt_size = 1514;
+        skb = dev_alloc_skb(pkt_size);
+        packet = skb_put(skb, pkt_size);
+        memcpy(packet, bp->mac_addr, 6);
+        memset(packet + 6, 0x0, 8);
+        for (i = 14; i < pkt_size; i++)
+                packet[i] = (unsigned char) (i & 0xff);
+
+        map = pci_map_single(bp->pdev, skb->data, pkt_size,
+                PCI_DMA_TODEVICE);
+
+        val = REG_RD(bp, BNX2_HC_COMMAND);
+        REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+        REG_RD(bp, BNX2_HC_COMMAND);
+
+        udelay(5);
+        rx_start_idx = bp->status_blk->status_rx_quick_consumer_index0;
+
+        send_idx = 0;
+        send_bseq = 0;
+        num_pkts = 0;
+
+        txbd = &bp->tx_desc_ring[send_idx];
+
+        txbd->tx_bd_haddr_hi = (u64) map >> 32;
+        txbd->tx_bd_haddr_lo = (u64) map & 0xffffffff;
+        txbd->tx_bd_mss_nbytes = pkt_size;
+        txbd->tx_bd_vlan_tag_flags = TX_BD_FLAGS_START | TX_BD_FLAGS_END;
+
+        num_pkts++;
+        send_idx = NEXT_TX_BD(send_idx);
+
+        send_bseq += pkt_size;
+
+        REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, send_idx);
+        REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, send_bseq);
+
+
+        udelay(100);
+
+        val = REG_RD(bp, BNX2_HC_COMMAND);
+        REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+        REG_RD(bp, BNX2_HC_COMMAND);
+
+        udelay(5);
+
+        pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE);
+        dev_kfree_skb_irq(skb);
+
+        if (bp->status_blk->status_tx_quick_consumer_index0 != send_idx) {
+                goto loopback_test_done;
+        }
+
+        rx_idx = bp->status_blk->status_rx_quick_consumer_index0;
+        if (rx_idx != rx_start_idx + num_pkts) {
+                goto loopback_test_done;
+        }
+
+        rx_buf = &bp->rx_buf_ring[rx_start_idx];
+        rx_skb = rx_buf->skb;
+
+        rx_hdr = (struct l2_fhdr *) rx_skb->data;
+        skb_reserve(rx_skb, bp->rx_offset);
+
+        pci_dma_sync_single_for_cpu(bp->pdev,
+                pci_unmap_addr(rx_buf, mapping),
+                bp->rx_buf_size, PCI_DMA_FROMDEVICE);
+
+        if (rx_hdr->l2_fhdr_errors &
+                (L2_FHDR_ERRORS_BAD_CRC |
+                L2_FHDR_ERRORS_PHY_DECODE |
+                L2_FHDR_ERRORS_ALIGNMENT |
+                L2_FHDR_ERRORS_TOO_SHORT |
+                L2_FHDR_ERRORS_GIANT_FRAME)) {
+
+                goto loopback_test_done;
+        }
+
+        if ((rx_hdr->l2_fhdr_pkt_len - 4) != pkt_size) {
+                goto loopback_test_done;
+        }
+
+        for (i = 14; i < pkt_size; i++) {
+                if (*(rx_skb->data + i) != (unsigned char) (i & 0xff)) {
+                        goto loopback_test_done;
+                }
+        }
+
+        ret = 0;
+
+loopback_test_done:
+        bp->loopback = 0;
+        return ret;
+}
+
+#define NVRAM_SIZE 0x200
+#define CRC32_RESIDUAL 0xdebb20e3
+
+static int
+bnx2_test_nvram(struct bnx2 *bp)
+{
+        u32 buf[NVRAM_SIZE / 4];
+        u8 *data = (u8 *) buf;
+        int rc = 0;
+        u32 magic, csum;
+
+        if ((rc = bnx2_nvram_read(bp, 0, data, 4)) != 0)
+                goto test_nvram_done;
+
+        magic = be32_to_cpu(buf[0]);
+        if (magic != 0x669955aa) {
+                rc = -ENODEV;
+                goto test_nvram_done;
+        }
+
+        if ((rc = bnx2_nvram_read(bp, 0x100, data, NVRAM_SIZE)) != 0)
+                goto test_nvram_done;
+
+        csum = ether_crc_le(0x100, data);
+        if (csum != CRC32_RESIDUAL) {
+                rc = -ENODEV;
+                goto test_nvram_done;
+        }
+
+        csum = ether_crc_le(0x100, data + 0x100);
+        if (csum != CRC32_RESIDUAL) {
+                rc = -ENODEV;
+        }
+
+test_nvram_done:
+        return rc;
+}
+
+static int
+bnx2_test_link(struct bnx2 *bp)
+{
+        u32 bmsr;
+
+        spin_lock_irq(&bp->phy_lock);
+        bnx2_read_phy(bp, MII_BMSR, &bmsr);
+        bnx2_read_phy(bp, MII_BMSR, &bmsr);
+        spin_unlock_irq(&bp->phy_lock);
+                
+        if (bmsr & BMSR_LSTATUS) {
+                return 0;
+        }
+        return -ENODEV;
+}
+
+static int
+bnx2_test_intr(struct bnx2 *bp)
+{
+        int i;
+        u32 val;
+        u16 status_idx;
+
+        if (!netif_running(bp->dev))
+                return -ENODEV;
+
+        status_idx = REG_RD(bp, BNX2_PCICFG_INT_ACK_CMD) & 0xffff;
+
+        /* This register is not touched during run-time. */
+        val = REG_RD(bp, BNX2_HC_COMMAND);
+        REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW);
+        REG_RD(bp, BNX2_HC_COMMAND);
+
+        for (i = 0; i < 10; i++) {
+                if ((REG_RD(bp, BNX2_PCICFG_INT_ACK_CMD) & 0xffff) !=
+                        status_idx) {
+
+                        break;
+                }
+
+                msleep_interruptible(10);
+        }
+        if (i < 10)
+                return 0;
+
+        return -ENODEV;
+}
+
+static void
+bnx2_timer(unsigned long data)
+{
+        struct bnx2 *bp = (struct bnx2 *) data;
+        u32 msg;
+
+        if (atomic_read(&bp->intr_sem) != 0)
+                goto bnx2_restart_timer;
+
+        msg = (u32) ++bp->fw_drv_pulse_wr_seq;
+        REG_WR_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_DRV_PULSE_MB, msg);
+
+        if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+            (CHIP_NUM(bp) == CHIP_NUM_5706)) {
+                unsigned long flags;
+
+                spin_lock_irqsave(&bp->phy_lock, flags);
+                if (bp->serdes_an_pending) {
+                        bp->serdes_an_pending--;
+                }
+                else if ((bp->link_up == 0) && (bp->autoneg & AUTONEG_SPEED)) {
+                        u32 bmcr;
+
+                        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+
+                        if (bmcr & BMCR_ANENABLE) {
+                                u32 phy1, phy2;
+
+                                bnx2_write_phy(bp, 0x1c, 0x7c00);
+                                bnx2_read_phy(bp, 0x1c, &phy1);
+
+                                bnx2_write_phy(bp, 0x17, 0x0f01);
+                                bnx2_read_phy(bp, 0x15, &phy2);
+                                bnx2_write_phy(bp, 0x17, 0x0f01);
+                                bnx2_read_phy(bp, 0x15, &phy2);
+
+                                if ((phy1 & 0x10) &&    /* SIGNAL DETECT */
+                                        !(phy2 & 0x20)) {       /* no CONFIG */
+
+                                        bmcr &= ~BMCR_ANENABLE;
+                                        bmcr |= BMCR_SPEED1000 |
+                                                BMCR_FULLDPLX;
+                                        bnx2_write_phy(bp, MII_BMCR, bmcr);
+                                        bp->phy_flags |=
+                                                PHY_PARALLEL_DETECT_FLAG;
+                                }
+                        }
+                }
+                else if ((bp->link_up) && (bp->autoneg & AUTONEG_SPEED) &&
+                        (bp->phy_flags & PHY_PARALLEL_DETECT_FLAG)) {
+                        u32 phy2;
+
+                        bnx2_write_phy(bp, 0x17, 0x0f01);
+                        bnx2_read_phy(bp, 0x15, &phy2);
+                        if (phy2 & 0x20) {
+                                u32 bmcr;
+
+                                bnx2_read_phy(bp, MII_BMCR, &bmcr);
+                                bmcr |= BMCR_ANENABLE;
+                                bnx2_write_phy(bp, MII_BMCR, bmcr);
+
+                                bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
+
+                        }
+                }
+
+                spin_unlock_irqrestore(&bp->phy_lock, flags);
+        }
+
+bnx2_restart_timer:
+        bp->timer.expires = RUN_AT(bp->timer_interval);
+
+        add_timer(&bp->timer);
+}
+
+/* Called with rtnl_lock */
+static int
+bnx2_open(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        int rc;
+
+        bnx2_set_power_state(bp, 0);
+        bnx2_disable_int(bp);
+
+        rc = bnx2_alloc_mem(bp);
+        if (rc)
+                return rc;
+
+        if ((CHIP_ID(bp) != CHIP_ID_5706_A0) &&
+                (CHIP_ID(bp) != CHIP_ID_5706_A1) &&
+                !disable_msi) {
+
+                if (pci_enable_msi(bp->pdev) == 0) {
+                        bp->flags |= USING_MSI_FLAG;
+                        rc = request_irq(bp->pdev->irq, bnx2_msi, 0, dev->name,
+                                        dev);
+                }
+                else {
+                        rc = request_irq(bp->pdev->irq, bnx2_interrupt,
+                                        SA_SHIRQ, dev->name, dev);
+                }
+        }
+        else {
+                rc = request_irq(bp->pdev->irq, bnx2_interrupt, SA_SHIRQ,
+                                dev->name, dev);
+        }
+        if (rc) {
+                bnx2_free_mem(bp);
+                return rc;
+        }
+
+        rc = bnx2_init_nic(bp);
+
+        if (rc) {
+                free_irq(bp->pdev->irq, dev);
+                if (bp->flags & USING_MSI_FLAG) {
+                        pci_disable_msi(bp->pdev);
+                        bp->flags &= ~USING_MSI_FLAG;
+                }
+                bnx2_free_skbs(bp);
+                bnx2_free_mem(bp);
+                return rc;
+        }
+        
+        init_timer(&bp->timer);
+
+        bp->timer.expires = RUN_AT(bp->timer_interval);
+        bp->timer.data = (unsigned long) bp;
+        bp->timer.function = bnx2_timer;
+        add_timer(&bp->timer);
+
+        atomic_set(&bp->intr_sem, 0);
+
+        bnx2_enable_int(bp);
+
+        if (bp->flags & USING_MSI_FLAG) {
+                /* Test MSI to make sure it is working
+                 * If MSI test fails, go back to INTx mode
+                 */
+                if (bnx2_test_intr(bp) != 0) {
+                        printk(KERN_WARNING PFX "%s: No interrupt was generated"
+                               " using MSI, switching to INTx mode. Please"
+                               " report this failure to the PCI maintainer"
+                               " and include system chipset information.\n",
+                               bp->dev->name);
+
+                        bnx2_disable_int(bp);
+                        free_irq(bp->pdev->irq, dev);
+                        pci_disable_msi(bp->pdev);
+                        bp->flags &= ~USING_MSI_FLAG;
+
+                        rc = bnx2_init_nic(bp);
+
+                        if (!rc) {
+                                rc = request_irq(bp->pdev->irq, bnx2_interrupt,
+                                        SA_SHIRQ, dev->name, dev);
+                        }
+                        if (rc) {
+                                bnx2_free_skbs(bp);
+                                bnx2_free_mem(bp);
+                                del_timer_sync(&bp->timer);
+                                return rc;
+                        }
+                        bnx2_enable_int(bp);
+                }
+        }
+        if (bp->flags & USING_MSI_FLAG) {
+                printk(KERN_INFO PFX "%s: using MSI\n", dev->name);
+        }
+
+        netif_start_queue(dev);
+
+        return 0;
+}
+
+static void
+bnx2_reset_task(void *data)
+{
+        struct bnx2 *bp = data;
+
+        bnx2_netif_stop(bp);
+
+        bnx2_init_nic(bp);
+
+        atomic_set(&bp->intr_sem, 1);
+        bnx2_netif_start(bp);
+}
+
+static void
+bnx2_tx_timeout(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+
+        /* This allows the netif to be shutdown gracefully before resetting */
+        schedule_work(&bp->reset_task);
+}
+
+#ifdef BCM_VLAN
+/* Called with rtnl_lock */
+static void
+bnx2_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp)
+{
+        struct bnx2 *bp = dev->priv;
+
+        bnx2_netif_stop(bp);
+
+        bp->vlgrp = vlgrp;
+        bnx2_set_rx_mode(dev);
+
+        bnx2_netif_start(bp);
+}
+
+/* Called with rtnl_lock */
+static void
+bnx2_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid)
+{
+        struct bnx2 *bp = dev->priv;
+
+        bnx2_netif_stop(bp);
+
+        if (bp->vlgrp)
+                bp->vlgrp->vlan_devices[vid] = NULL;
+        bnx2_set_rx_mode(dev);
+
+        bnx2_netif_start(bp);
+}
+#endif
+
+/* Called with dev->xmit_lock.
+ * hard_start_xmit is pseudo-lockless - a lock is only required when
+ * the tx queue is full. This way, we get the benefit of lockless
+ * operations most of the time without the complexities to handle
+ * netif_stop_queue/wake_queue race conditions.
+ */
+static int
+bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        dma_addr_t mapping;
+        struct tx_bd *txbd;
+        struct sw_bd *tx_buf;
+        u32 len, vlan_tag_flags, last_frag, mss;
+        u16 prod, ring_prod;
+        int i;
+
+        if (unlikely(atomic_read(&bp->tx_avail_bd) <
+                (skb_shinfo(skb)->nr_frags + 1))) {
+
+                netif_stop_queue(dev);
+                printk(KERN_ERR PFX "%s: BUG! Tx ring full when queue awake!\n",
+                        dev->name);
+
+                return NETDEV_TX_BUSY;
+        }
+        len = skb_headlen(skb);
+        prod = bp->tx_prod;
+        ring_prod = TX_RING_IDX(prod);
+
+        vlan_tag_flags = 0;
+        if (skb->ip_summed == CHECKSUM_HW) {
+                vlan_tag_flags |= TX_BD_FLAGS_TCP_UDP_CKSUM;
+        }
+
+        if (bp->vlgrp != 0 && vlan_tx_tag_present(skb)) {
+                vlan_tag_flags |=
+                        (TX_BD_FLAGS_VLAN_TAG | (vlan_tx_tag_get(skb) << 16));
+        }
+#ifdef BCM_TSO 
+        if ((mss = skb_shinfo(skb)->tso_size) &&
+                (skb->len > (bp->dev->mtu + ETH_HLEN))) {
+                u32 tcp_opt_len, ip_tcp_len;
+
+                if (skb_header_cloned(skb) &&
+                    pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
+                        dev_kfree_skb(skb);
+                        return NETDEV_TX_OK;
+                }
+
+                tcp_opt_len = ((skb->h.th->doff - 5) * 4);
+                vlan_tag_flags |= TX_BD_FLAGS_SW_LSO;
+
+                tcp_opt_len = 0;
+                if (skb->h.th->doff > 5) {
+                        tcp_opt_len = (skb->h.th->doff - 5) << 2;
+                }
+                ip_tcp_len = (skb->nh.iph->ihl << 2) + sizeof(struct tcphdr);
+
+                skb->nh.iph->check = 0;
+                skb->nh.iph->tot_len = ntohs(mss + ip_tcp_len + tcp_opt_len);
+                skb->h.th->check =
+                        ~csum_tcpudp_magic(skb->nh.iph->saddr,
+                                            skb->nh.iph->daddr,
+                                            0, IPPROTO_TCP, 0);
+
+                if (tcp_opt_len || (skb->nh.iph->ihl > 5)) {
+                        vlan_tag_flags |= ((skb->nh.iph->ihl - 5) +
+                                (tcp_opt_len >> 2)) << 8;
+                }
+        }
+        else
+#endif
+        {
+                mss = 0;
+        }
+
+        mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE);
+        
+        tx_buf = &bp->tx_buf_ring[ring_prod];
+        tx_buf->skb = skb;
+        pci_unmap_addr_set(tx_buf, mapping, mapping);
+
+        txbd = &bp->tx_desc_ring[ring_prod];
+
+        txbd->tx_bd_haddr_hi = (u64) mapping >> 32;
+        txbd->tx_bd_haddr_lo = (u64) mapping & 0xffffffff;
+        txbd->tx_bd_mss_nbytes = len | (mss << 16);
+        txbd->tx_bd_vlan_tag_flags = vlan_tag_flags | TX_BD_FLAGS_START;
+
+        last_frag = skb_shinfo(skb)->nr_frags;
+
+        for (i = 0; i < last_frag; i++) {
+                skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+
+                prod = NEXT_TX_BD(prod);
+                ring_prod = TX_RING_IDX(prod);
+                txbd = &bp->tx_desc_ring[ring_prod];
+
+                len = frag->size;
+                mapping = pci_map_page(bp->pdev, frag->page, frag->page_offset,
+                        len, PCI_DMA_TODEVICE);
+                pci_unmap_addr_set(&bp->tx_buf_ring[ring_prod],
+                                mapping, mapping);
+
+                txbd->tx_bd_haddr_hi = (u64) mapping >> 32;
+                txbd->tx_bd_haddr_lo = (u64) mapping & 0xffffffff;
+                txbd->tx_bd_mss_nbytes = len | (mss << 16);
+                txbd->tx_bd_vlan_tag_flags = vlan_tag_flags;
+
+        }
+        txbd->tx_bd_vlan_tag_flags |= TX_BD_FLAGS_END;
+
+        prod = NEXT_TX_BD(prod);
+        bp->tx_prod_bseq += skb->len;
+
+        atomic_sub(last_frag + 1, &bp->tx_avail_bd);
+
+        REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, prod);
+        REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
+
+        mmiowb();
+
+        bp->tx_prod = prod;
+        dev->trans_start = jiffies;
+
+        if (unlikely(atomic_read(&bp->tx_avail_bd) <= MAX_SKB_FRAGS)) {
+                unsigned long flags;
+
+                spin_lock_irqsave(&bp->tx_lock, flags);
+                if (atomic_read(&bp->tx_avail_bd) <= MAX_SKB_FRAGS) {
+                        netif_stop_queue(dev);
+
+                        if (atomic_read(&bp->tx_avail_bd) > MAX_SKB_FRAGS)
+                                netif_wake_queue(dev);
+                }
+                spin_unlock_irqrestore(&bp->tx_lock, flags);
+        }
+
+        return NETDEV_TX_OK;
+}
+
+/* Called with rtnl_lock */
+static int
+bnx2_close(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        u32 reset_code;
+
+        flush_scheduled_work();
+        bnx2_netif_stop(bp);
+        del_timer_sync(&bp->timer);
+        if (bp->wol)
+                reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
+        else
+                reset_code = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL;
+        bnx2_reset_chip(bp, reset_code);
+        free_irq(bp->pdev->irq, dev);
+        if (bp->flags & USING_MSI_FLAG) {
+                pci_disable_msi(bp->pdev);
+                bp->flags &= ~USING_MSI_FLAG;
+        }
+        bnx2_free_skbs(bp);
+        bnx2_free_mem(bp);
+        bp->link_up = 0;
+        netif_carrier_off(bp->dev);
+        bnx2_set_power_state(bp, 3);
+        return 0;
+}
+
+#define GET_NET_STATS64(ctr)                                    \
+        (unsigned long) ((unsigned long) (ctr##_hi) << 32) +    \
+        (unsigned long) (ctr##_lo)
+
+#define GET_NET_STATS32(ctr)            \
+        (ctr##_lo)
+
+#if (BITS_PER_LONG == 64)
+#define GET_NET_STATS   GET_NET_STATS64
+#else
+#define GET_NET_STATS   GET_NET_STATS32
+#endif
+
+static struct net_device_stats *
+bnx2_get_stats(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        struct statistics_block *stats_blk = bp->stats_blk;
+        struct net_device_stats *net_stats = &bp->net_stats;
+
+        if (bp->stats_blk == NULL) {
+                return net_stats;
+        }
+        net_stats->rx_packets =
+                GET_NET_STATS(stats_blk->stat_IfHCInUcastPkts) +
+                GET_NET_STATS(stats_blk->stat_IfHCInMulticastPkts) +
+                GET_NET_STATS(stats_blk->stat_IfHCInBroadcastPkts);
+
+        net_stats->tx_packets =
+                GET_NET_STATS(stats_blk->stat_IfHCOutUcastPkts) +
+                GET_NET_STATS(stats_blk->stat_IfHCOutMulticastPkts) +
+                GET_NET_STATS(stats_blk->stat_IfHCOutBroadcastPkts);
+
+        net_stats->rx_bytes =
+                GET_NET_STATS(stats_blk->stat_IfHCInOctets);
+
+        net_stats->tx_bytes =
+                GET_NET_STATS(stats_blk->stat_IfHCOutOctets);
+
+        net_stats->multicast = 
+                GET_NET_STATS(stats_blk->stat_IfHCOutMulticastPkts);
+
+        net_stats->collisions = 
+                (unsigned long) stats_blk->stat_EtherStatsCollisions;
+
+        net_stats->rx_length_errors = 
+                (unsigned long) (stats_blk->stat_EtherStatsUndersizePkts +
+                stats_blk->stat_EtherStatsOverrsizePkts);
+
+        net_stats->rx_over_errors = 
+                (unsigned long) stats_blk->stat_IfInMBUFDiscards;
+
+        net_stats->rx_frame_errors = 
+                (unsigned long) stats_blk->stat_Dot3StatsAlignmentErrors;
+
+        net_stats->rx_crc_errors = 
+                (unsigned long) stats_blk->stat_Dot3StatsFCSErrors;
+
+        net_stats->rx_errors = net_stats->rx_length_errors +
+                net_stats->rx_over_errors + net_stats->rx_frame_errors +
+                net_stats->rx_crc_errors;
+
+        net_stats->tx_aborted_errors =
+                (unsigned long) (stats_blk->stat_Dot3StatsExcessiveCollisions +
+                stats_blk->stat_Dot3StatsLateCollisions);
+
+        if (CHIP_NUM(bp) == CHIP_NUM_5706)
+                net_stats->tx_carrier_errors = 0;
+        else {
+                net_stats->tx_carrier_errors =
+                        (unsigned long)
+                        stats_blk->stat_Dot3StatsCarrierSenseErrors;
+        }
+
+        net_stats->tx_errors =
+                (unsigned long) 
+                stats_blk->stat_emac_tx_stat_dot3statsinternalmactransmiterrors
+                +
+                net_stats->tx_aborted_errors +
+                net_stats->tx_carrier_errors;
+
+        return net_stats;
+}
+
+/* All ethtool functions called with rtnl_lock */
+
+static int
+bnx2_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+        struct bnx2 *bp = dev->priv;
+
+        cmd->supported = SUPPORTED_Autoneg;
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                cmd->supported |= SUPPORTED_1000baseT_Full |
+                        SUPPORTED_FIBRE;
+
+                cmd->port = PORT_FIBRE;
+        }
+        else {
+                cmd->supported |= SUPPORTED_10baseT_Half |
+                        SUPPORTED_10baseT_Full |
+                        SUPPORTED_100baseT_Half |
+                        SUPPORTED_100baseT_Full |
+                        SUPPORTED_1000baseT_Full |
+                        SUPPORTED_TP;
+
+                cmd->port = PORT_TP;
+        }
+
+        cmd->advertising = bp->advertising;
+
+        if (bp->autoneg & AUTONEG_SPEED) {
+                cmd->autoneg = AUTONEG_ENABLE;
+        }
+        else {
+                cmd->autoneg = AUTONEG_DISABLE;
+        }
+
+        if (netif_carrier_ok(dev)) {
+                cmd->speed = bp->line_speed;
+                cmd->duplex = bp->duplex;
+        }
+        else {
+                cmd->speed = -1;
+                cmd->duplex = -1;
+        }
+
+        cmd->transceiver = XCVR_INTERNAL;
+        cmd->phy_address = bp->phy_addr;
+
+        return 0;
+}
+  
+static int
+bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+        struct bnx2 *bp = dev->priv;
+        u8 autoneg = bp->autoneg;
+        u8 req_duplex = bp->req_duplex;
+        u16 req_line_speed = bp->req_line_speed;
+        u32 advertising = bp->advertising;
+
+        if (cmd->autoneg == AUTONEG_ENABLE) {
+                autoneg |= AUTONEG_SPEED;
+
+                cmd->advertising &= ETHTOOL_ALL_COPPER_SPEED; 
+
+                /* allow advertising 1 speed */
+                if ((cmd->advertising == ADVERTISED_10baseT_Half) ||
+                        (cmd->advertising == ADVERTISED_10baseT_Full) ||
+                        (cmd->advertising == ADVERTISED_100baseT_Half) ||
+                        (cmd->advertising == ADVERTISED_100baseT_Full)) {
+
+                        if (bp->phy_flags & PHY_SERDES_FLAG)
+                                return -EINVAL;
+
+                        advertising = cmd->advertising;
+
+                }
+                else if (cmd->advertising == ADVERTISED_1000baseT_Full) {
+                        advertising = cmd->advertising;
+                }
+                else if (cmd->advertising == ADVERTISED_1000baseT_Half) {
+                        return -EINVAL;
+                }
+                else {
+                        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                                advertising = ETHTOOL_ALL_FIBRE_SPEED;
+                        }
+                        else {
+                                advertising = ETHTOOL_ALL_COPPER_SPEED;
+                        }
+                }
+                advertising |= ADVERTISED_Autoneg;
+        }
+        else {
+                if (bp->phy_flags & PHY_SERDES_FLAG) {
+                        if ((cmd->speed != SPEED_1000) ||
+                                (cmd->duplex != DUPLEX_FULL)) {
+                                return -EINVAL;
+                        }
+                }
+                else if (cmd->speed == SPEED_1000) {
+                        return -EINVAL;
+                }
+                autoneg &= ~AUTONEG_SPEED;
+                req_line_speed = cmd->speed;
+                req_duplex = cmd->duplex;
+                advertising = 0;
+        }
+
+        bp->autoneg = autoneg;
+        bp->advertising = advertising;
+        bp->req_line_speed = req_line_speed;
+        bp->req_duplex = req_duplex;
+
+        spin_lock_irq(&bp->phy_lock);
+
+        bnx2_setup_phy(bp);
+
+        spin_unlock_irq(&bp->phy_lock);
+
+        return 0;
+}
+
+static void
+bnx2_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
+{
+        struct bnx2 *bp = dev->priv;
+
+        strcpy(info->driver, DRV_MODULE_NAME);
+        strcpy(info->version, DRV_MODULE_VERSION);
+        strcpy(info->bus_info, pci_name(bp->pdev));
+        info->fw_version[0] = ((bp->fw_ver & 0xff000000) >> 24) + '0';
+        info->fw_version[2] = ((bp->fw_ver & 0xff0000) >> 16) + '0';
+        info->fw_version[4] = ((bp->fw_ver & 0xff00) >> 8) + '0';
+        info->fw_version[6] = (bp->fw_ver & 0xff) + '0';
+        info->fw_version[1] = info->fw_version[3] = info->fw_version[5] = '.';
+        info->fw_version[7] = 0;
+}
+
+static void
+bnx2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+        struct bnx2 *bp = dev->priv;
+
+        if (bp->flags & NO_WOL_FLAG) {
+                wol->supported = 0;
+                wol->wolopts = 0;
+        }
+        else {
+                wol->supported = WAKE_MAGIC;
+                if (bp->wol)
+                        wol->wolopts = WAKE_MAGIC;
+                else
+                        wol->wolopts = 0;
+        }
+        memset(&wol->sopass, 0, sizeof(wol->sopass));
+}
+
+static int
+bnx2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+        struct bnx2 *bp = dev->priv;
+
+        if (wol->wolopts & ~WAKE_MAGIC)
+                return -EINVAL;
+
+        if (wol->wolopts & WAKE_MAGIC) {
+                if (bp->flags & NO_WOL_FLAG)
+                        return -EINVAL;
+
+                bp->wol = 1;
+        }
+        else {
+                bp->wol = 0;
+        }
+        return 0;
+}
+
+static int
+bnx2_nway_reset(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+        u32 bmcr;
+
+        if (!(bp->autoneg & AUTONEG_SPEED)) {
+                return -EINVAL;
+        }
+
+        spin_lock_irq(&bp->phy_lock);
+
+        /* Force a link down visible on the other side */
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
+                spin_unlock_irq(&bp->phy_lock);
+
+                msleep(20);
+
+                spin_lock_irq(&bp->phy_lock);
+                if (CHIP_NUM(bp) == CHIP_NUM_5706) {
+                        bp->serdes_an_pending = SERDES_AN_TIMEOUT /
+                                bp->timer_interval;
+                }
+        }
+
+        bnx2_read_phy(bp, MII_BMCR, &bmcr);
+        bmcr &= ~BMCR_LOOPBACK;
+        bnx2_write_phy(bp, MII_BMCR, bmcr | BMCR_ANRESTART | BMCR_ANENABLE);
+
+        spin_unlock_irq(&bp->phy_lock);
+
+        return 0;
+}
+
+static int
+bnx2_get_eeprom_len(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+
+        if (bp->flash_info == 0)
+                return 0;
+
+        return (int) bp->flash_info->total_size;
+}
+
+static int
+bnx2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
+                u8 *eebuf)
+{
+        struct bnx2 *bp = dev->priv;
+        int rc;
+
+        if (eeprom->offset > bp->flash_info->total_size)
+                return -EINVAL;
+
+        if ((eeprom->offset + eeprom->len) > bp->flash_info->total_size)
+                eeprom->len = bp->flash_info->total_size - eeprom->offset;
+
+        rc = bnx2_nvram_read(bp, eeprom->offset, eebuf, eeprom->len);
+
+        return rc;
+}
+
+static int
+bnx2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
+                u8 *eebuf)
+{
+        struct bnx2 *bp = dev->priv;
+        int rc;
+
+        if (eeprom->offset > bp->flash_info->total_size)
+                return -EINVAL;
+
+        if ((eeprom->offset + eeprom->len) > bp->flash_info->total_size)
+                eeprom->len = bp->flash_info->total_size - eeprom->offset;
+
+        rc = bnx2_nvram_write(bp, eeprom->offset, eebuf, eeprom->len);
+
+        return rc;
+}
+
+static int
+bnx2_get_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
+{
+        struct bnx2 *bp = dev->priv;
+
+        memset(coal, 0, sizeof(struct ethtool_coalesce));
+
+        coal->rx_coalesce_usecs = bp->rx_ticks;
+        coal->rx_max_coalesced_frames = bp->rx_quick_cons_trip;
+        coal->rx_coalesce_usecs_irq = bp->rx_ticks_int;
+        coal->rx_max_coalesced_frames_irq = bp->rx_quick_cons_trip_int;
+
+        coal->tx_coalesce_usecs = bp->tx_ticks;
+        coal->tx_max_coalesced_frames = bp->tx_quick_cons_trip;
+        coal->tx_coalesce_usecs_irq = bp->tx_ticks_int;
+        coal->tx_max_coalesced_frames_irq = bp->tx_quick_cons_trip_int;
+
+        coal->stats_block_coalesce_usecs = bp->stats_ticks;
+
+        return 0;
+}
+
+static int
+bnx2_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
+{
+        struct bnx2 *bp = dev->priv;
+
+        bp->rx_ticks = (u16) coal->rx_coalesce_usecs;
+        if (bp->rx_ticks > 0x3ff) bp->rx_ticks = 0x3ff;
+
+        bp->rx_quick_cons_trip = (u16) coal->rx_max_coalesced_frames; 
+        if (bp->rx_quick_cons_trip > 0xff) bp->rx_quick_cons_trip = 0xff;
+
+        bp->rx_ticks_int = (u16) coal->rx_coalesce_usecs_irq;
+        if (bp->rx_ticks_int > 0x3ff) bp->rx_ticks_int = 0x3ff;
+
+        bp->rx_quick_cons_trip_int = (u16) coal->rx_max_coalesced_frames_irq;
+        if (bp->rx_quick_cons_trip_int > 0xff)
+                bp->rx_quick_cons_trip_int = 0xff;
+
+        bp->tx_ticks = (u16) coal->tx_coalesce_usecs;
+        if (bp->tx_ticks > 0x3ff) bp->tx_ticks = 0x3ff;
+
+        bp->tx_quick_cons_trip = (u16) coal->tx_max_coalesced_frames;
+        if (bp->tx_quick_cons_trip > 0xff) bp->tx_quick_cons_trip = 0xff;
+
+        bp->tx_ticks_int = (u16) coal->tx_coalesce_usecs_irq;
+        if (bp->tx_ticks_int > 0x3ff) bp->tx_ticks_int = 0x3ff;
+
+        bp->tx_quick_cons_trip_int = (u16) coal->tx_max_coalesced_frames_irq;
+        if (bp->tx_quick_cons_trip_int > 0xff) bp->tx_quick_cons_trip_int =
+                0xff;
+
+        bp->stats_ticks = coal->stats_block_coalesce_usecs;
+        if (bp->stats_ticks > 0xffff00) bp->stats_ticks = 0xffff00;
+        bp->stats_ticks &= 0xffff00;
+
+        if (netif_running(bp->dev)) {
+                bnx2_netif_stop(bp);
+                bnx2_init_nic(bp);
+                bnx2_netif_start(bp);
+        }
+
+        return 0;
+}
+
+static void
+bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
+{
+        struct bnx2 *bp = dev->priv;
+
+        ering->rx_max_pending = MAX_RX_DESC_CNT;
+        ering->rx_mini_max_pending = 0;
+        ering->rx_jumbo_max_pending = 0;
+
+        ering->rx_pending = bp->rx_ring_size;
+        ering->rx_mini_pending = 0;
+        ering->rx_jumbo_pending = 0;
+
+        ering->tx_max_pending = MAX_TX_DESC_CNT;
+        ering->tx_pending = bp->tx_ring_size;
+}
+
+static int
+bnx2_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
+{
+        struct bnx2 *bp = dev->priv;
+
+        if ((ering->rx_pending > MAX_RX_DESC_CNT) ||
+                (ering->tx_pending > MAX_TX_DESC_CNT) ||
+                (ering->tx_pending <= MAX_SKB_FRAGS)) {
+
+                return -EINVAL;
+        }
+        bp->rx_ring_size = ering->rx_pending;
+        bp->tx_ring_size = ering->tx_pending;
+
+        if (netif_running(bp->dev)) {
+                bnx2_netif_stop(bp);
+                bnx2_init_nic(bp);
+                bnx2_netif_start(bp);
+        }
+
+        return 0;
+}
+
+static void
+bnx2_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause)
+{
+        struct bnx2 *bp = dev->priv;
+
+        epause->autoneg = ((bp->autoneg & AUTONEG_FLOW_CTRL) != 0);
+        epause->rx_pause = ((bp->flow_ctrl & FLOW_CTRL_RX) != 0);
+        epause->tx_pause = ((bp->flow_ctrl & FLOW_CTRL_TX) != 0);
+}
+
+static int
+bnx2_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause)
+{
+        struct bnx2 *bp = dev->priv;
+
+        bp->req_flow_ctrl = 0;
+        if (epause->rx_pause)
+                bp->req_flow_ctrl |= FLOW_CTRL_RX;
+        if (epause->tx_pause)
+                bp->req_flow_ctrl |= FLOW_CTRL_TX;
+
+        if (epause->autoneg) {
+                bp->autoneg |= AUTONEG_FLOW_CTRL;
+        }
+        else {
+                bp->autoneg &= ~AUTONEG_FLOW_CTRL;
+        }
+
+        spin_lock_irq(&bp->phy_lock);
+
+        bnx2_setup_phy(bp);
+
+        spin_unlock_irq(&bp->phy_lock);
+
+        return 0;
+}
+
+static u32
+bnx2_get_rx_csum(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+
+        return bp->rx_csum;
+}
+
+static int
+bnx2_set_rx_csum(struct net_device *dev, u32 data)
+{
+        struct bnx2 *bp = dev->priv;
+
+        bp->rx_csum = data;
+        return 0;
+}
+
+#define BNX2_NUM_STATS 45
+
+struct {
+        char string[ETH_GSTRING_LEN];
+} bnx2_stats_str_arr[BNX2_NUM_STATS] = {
+        { "rx_bytes" },
+        { "rx_error_bytes" },
+        { "tx_bytes" },
+        { "tx_error_bytes" },
+        { "rx_ucast_packets" },
+        { "rx_mcast_packets" },
+        { "rx_bcast_packets" },
+        { "tx_ucast_packets" },
+        { "tx_mcast_packets" },
+        { "tx_bcast_packets" },
+        { "tx_mac_errors" },
+        { "tx_carrier_errors" },
+        { "rx_crc_errors" },
+        { "rx_align_errors" },
+        { "tx_single_collisions" },
+        { "tx_multi_collisions" },
+        { "tx_deferred" },
+        { "tx_excess_collisions" },
+        { "tx_late_collisions" },
+        { "tx_total_collisions" },
+        { "rx_fragments" },
+        { "rx_jabbers" },
+        { "rx_undersize_packets" },
+        { "rx_oversize_packets" },
+        { "rx_64_byte_packets" },
+        { "rx_65_to_127_byte_packets" },
+        { "rx_128_to_255_byte_packets" },
+        { "rx_256_to_511_byte_packets" },
+        { "rx_512_to_1023_byte_packets" },
+        { "rx_1024_to_1522_byte_packets" },
+        { "rx_1523_to_9022_byte_packets" },
+        { "tx_64_byte_packets" },
+        { "tx_65_to_127_byte_packets" },
+        { "tx_128_to_255_byte_packets" },
+        { "tx_256_to_511_byte_packets" },
+        { "tx_512_to_1023_byte_packets" },
+        { "tx_1024_to_1522_byte_packets" },
+        { "tx_1523_to_9022_byte_packets" },
+        { "rx_xon_frames" },
+        { "rx_xoff_frames" },
+        { "tx_xon_frames" },
+        { "tx_xoff_frames" },
+        { "rx_mac_ctrl_frames" },
+        { "rx_filtered_packets" },
+        { "rx_discards" },
+};
+
+#define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4)
+
+unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = {
+    STATS_OFFSET32(stat_IfHCInOctets_hi),
+    STATS_OFFSET32(stat_IfHCInBadOctets_hi),
+    STATS_OFFSET32(stat_IfHCOutOctets_hi),
+    STATS_OFFSET32(stat_IfHCOutBadOctets_hi),
+    STATS_OFFSET32(stat_IfHCInUcastPkts_hi),
+    STATS_OFFSET32(stat_IfHCInMulticastPkts_hi),
+    STATS_OFFSET32(stat_IfHCInBroadcastPkts_hi),
+    STATS_OFFSET32(stat_IfHCOutUcastPkts_hi),
+    STATS_OFFSET32(stat_IfHCOutMulticastPkts_hi),
+    STATS_OFFSET32(stat_IfHCOutBroadcastPkts_hi),
+    STATS_OFFSET32(stat_emac_tx_stat_dot3statsinternalmactransmiterrors),
+    STATS_OFFSET32(stat_Dot3StatsCarrierSenseErrors),                 
+    STATS_OFFSET32(stat_Dot3StatsFCSErrors),                          
+    STATS_OFFSET32(stat_Dot3StatsAlignmentErrors),                    
+    STATS_OFFSET32(stat_Dot3StatsSingleCollisionFrames),              
+    STATS_OFFSET32(stat_Dot3StatsMultipleCollisionFrames),            
+    STATS_OFFSET32(stat_Dot3StatsDeferredTransmissions),              
+    STATS_OFFSET32(stat_Dot3StatsExcessiveCollisions),                
+    STATS_OFFSET32(stat_Dot3StatsLateCollisions),                     
+    STATS_OFFSET32(stat_EtherStatsCollisions),                        
+    STATS_OFFSET32(stat_EtherStatsFragments),                         
+    STATS_OFFSET32(stat_EtherStatsJabbers),                           
+    STATS_OFFSET32(stat_EtherStatsUndersizePkts),                     
+    STATS_OFFSET32(stat_EtherStatsOverrsizePkts),                     
+    STATS_OFFSET32(stat_EtherStatsPktsRx64Octets),                    
+    STATS_OFFSET32(stat_EtherStatsPktsRx65Octetsto127Octets),         
+    STATS_OFFSET32(stat_EtherStatsPktsRx128Octetsto255Octets),        
+    STATS_OFFSET32(stat_EtherStatsPktsRx256Octetsto511Octets),        
+    STATS_OFFSET32(stat_EtherStatsPktsRx512Octetsto1023Octets),       
+    STATS_OFFSET32(stat_EtherStatsPktsRx1024Octetsto1522Octets),      
+    STATS_OFFSET32(stat_EtherStatsPktsRx1523Octetsto9022Octets),      
+    STATS_OFFSET32(stat_EtherStatsPktsTx64Octets),                    
+    STATS_OFFSET32(stat_EtherStatsPktsTx65Octetsto127Octets),         
+    STATS_OFFSET32(stat_EtherStatsPktsTx128Octetsto255Octets),        
+    STATS_OFFSET32(stat_EtherStatsPktsTx256Octetsto511Octets),        
+    STATS_OFFSET32(stat_EtherStatsPktsTx512Octetsto1023Octets),       
+    STATS_OFFSET32(stat_EtherStatsPktsTx1024Octetsto1522Octets),      
+    STATS_OFFSET32(stat_EtherStatsPktsTx1523Octetsto9022Octets),      
+    STATS_OFFSET32(stat_XonPauseFramesReceived),                      
+    STATS_OFFSET32(stat_XoffPauseFramesReceived),                     
+    STATS_OFFSET32(stat_OutXonSent),                                  
+    STATS_OFFSET32(stat_OutXoffSent),                                 
+    STATS_OFFSET32(stat_MacControlFramesReceived),                    
+    STATS_OFFSET32(stat_IfInFramesL2FilterDiscards),                  
+    STATS_OFFSET32(stat_IfInMBUFDiscards),                            
+};
+
+/* stat_IfHCInBadOctets and stat_Dot3StatsCarrierSenseErrors are
+ * skipped because of errata.
+ */               
+u8 bnx2_5706_stats_len_arr[BNX2_NUM_STATS] = {
+        8,0,8,8,8,8,8,8,8,8,
+        4,0,4,4,4,4,4,4,4,4,
+        4,4,4,4,4,4,4,4,4,4,
+        4,4,4,4,4,4,4,4,4,4,
+        4,4,4,4,4,
+};
+
+#define BNX2_NUM_TESTS 6
+
+struct {
+        char string[ETH_GSTRING_LEN];
+} bnx2_tests_str_arr[BNX2_NUM_TESTS] = {
+        { "register_test (offline)" },
+        { "memory_test (offline)" },
+        { "loopback_test (offline)" },
+        { "nvram_test (online)" },
+        { "interrupt_test (online)" },
+        { "link_test (online)" },
+};
+
+static int
+bnx2_self_test_count(struct net_device *dev)
+{
+        return BNX2_NUM_TESTS;
+}
+
+static void
+bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
+{
+        struct bnx2 *bp = dev->priv;
+
+        memset(buf, 0, sizeof(u64) * BNX2_NUM_TESTS);
+        if (etest->flags & ETH_TEST_FL_OFFLINE) {
+                bnx2_netif_stop(bp);
+                bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_DIAG);
+                bnx2_free_skbs(bp);
+
+                if (bnx2_test_registers(bp) != 0) {
+                        buf[0] = 1;
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                }
+                if (bnx2_test_memory(bp) != 0) {
+                        buf[1] = 1;
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                }
+                if (bnx2_test_loopback(bp) != 0) {
+                        buf[2] = 1;
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                }
+
+                if (!netif_running(bp->dev)) {
+                        bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
+                }
+                else {
+                        bnx2_init_nic(bp);
+                        bnx2_netif_start(bp);
+                }
+
+                /* wait for link up */
+                msleep_interruptible(3000);
+                if ((!bp->link_up) && !(bp->phy_flags & PHY_SERDES_FLAG))
+                        msleep_interruptible(4000);
+        }
+
+        if (bnx2_test_nvram(bp) != 0) {
+                buf[3] = 1;
+                etest->flags |= ETH_TEST_FL_FAILED;
+        }
+        if (bnx2_test_intr(bp) != 0) {
+                buf[4] = 1;
+                etest->flags |= ETH_TEST_FL_FAILED;
+        }
+
+        if (bnx2_test_link(bp) != 0) {
+                buf[5] = 1;
+                etest->flags |= ETH_TEST_FL_FAILED;
+
+        }
+}
+
+static void
+bnx2_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
+{
+        switch (stringset) {
+        case ETH_SS_STATS:
+                memcpy(buf, bnx2_stats_str_arr,
+                        sizeof(bnx2_stats_str_arr));
+                break;
+        case ETH_SS_TEST:
+                memcpy(buf, bnx2_tests_str_arr,
+                        sizeof(bnx2_tests_str_arr));
+                break;
+        }
+}
+
+static int
+bnx2_get_stats_count(struct net_device *dev)
+{
+        return BNX2_NUM_STATS;
+}
+
+static void
+bnx2_get_ethtool_stats(struct net_device *dev,
+                struct ethtool_stats *stats, u64 *buf)
+{
+        struct bnx2 *bp = dev->priv;
+        int i;
+        u32 *hw_stats = (u32 *) bp->stats_blk;
+        u8 *stats_len_arr = 0;
+
+        if (hw_stats == NULL) {
+                memset(buf, 0, sizeof(u64) * BNX2_NUM_STATS);
+                return;
+        }
+
+        if (CHIP_NUM(bp) == CHIP_NUM_5706)
+                stats_len_arr = bnx2_5706_stats_len_arr;
+
+        for (i = 0; i < BNX2_NUM_STATS; i++) {
+                if (stats_len_arr[i] == 0) {
+                        /* skip this counter */
+                        buf[i] = 0;
+                        continue;
+                }
+                if (stats_len_arr[i] == 4) {
+                        /* 4-byte counter */
+                        buf[i] = (u64)
+                                *(hw_stats + bnx2_stats_offset_arr[i]);
+                        continue;
+                }
+                /* 8-byte counter */
+                buf[i] = (((u64) *(hw_stats +
+                                        bnx2_stats_offset_arr[i])) << 32) +
+                                *(hw_stats + bnx2_stats_offset_arr[i] + 1);
+        }
+}
+
+static int
+bnx2_phys_id(struct net_device *dev, u32 data)
+{
+        struct bnx2 *bp = dev->priv;
+        int i;
+        u32 save;
+
+        if (data == 0)
+                data = 2;
+
+        save = REG_RD(bp, BNX2_MISC_CFG);
+        REG_WR(bp, BNX2_MISC_CFG, BNX2_MISC_CFG_LEDMODE_MAC);
+
+        for (i = 0; i < (data * 2); i++) {
+                if ((i % 2) == 0) {
+                        REG_WR(bp, BNX2_EMAC_LED, BNX2_EMAC_LED_OVERRIDE);
+                }
+                else {
+                        REG_WR(bp, BNX2_EMAC_LED, BNX2_EMAC_LED_OVERRIDE |
+                                BNX2_EMAC_LED_1000MB_OVERRIDE |
+                                BNX2_EMAC_LED_100MB_OVERRIDE |
+                                BNX2_EMAC_LED_10MB_OVERRIDE |
+                                BNX2_EMAC_LED_TRAFFIC_OVERRIDE |
+                                BNX2_EMAC_LED_TRAFFIC);
+                }
+                msleep_interruptible(500);
+                if (signal_pending(current))
+                        break;
+        }
+        REG_WR(bp, BNX2_EMAC_LED, 0);
+        REG_WR(bp, BNX2_MISC_CFG, save);
+        return 0;
+}
+
+static struct ethtool_ops bnx2_ethtool_ops = {
+        .get_settings           = bnx2_get_settings,
+        .set_settings           = bnx2_set_settings,
+        .get_drvinfo            = bnx2_get_drvinfo,
+        .get_wol                = bnx2_get_wol,
+        .set_wol                = bnx2_set_wol,
+        .nway_reset             = bnx2_nway_reset,
+        .get_link               = ethtool_op_get_link,
+        .get_eeprom_len         = bnx2_get_eeprom_len,
+        .get_eeprom             = bnx2_get_eeprom,
+        .set_eeprom             = bnx2_set_eeprom,
+        .get_coalesce           = bnx2_get_coalesce,
+        .set_coalesce           = bnx2_set_coalesce,
+        .get_ringparam          = bnx2_get_ringparam,
+        .set_ringparam          = bnx2_set_ringparam,
+        .get_pauseparam         = bnx2_get_pauseparam,
+        .set_pauseparam         = bnx2_set_pauseparam,
+        .get_rx_csum            = bnx2_get_rx_csum,
+        .set_rx_csum            = bnx2_set_rx_csum,
+        .get_tx_csum            = ethtool_op_get_tx_csum,
+        .set_tx_csum            = ethtool_op_set_tx_csum,
+        .get_sg                 = ethtool_op_get_sg,
+        .set_sg                 = ethtool_op_set_sg,
+#ifdef BCM_TSO
+        .get_tso                = ethtool_op_get_tso,
+        .set_tso                = ethtool_op_set_tso,
+#endif
+        .self_test_count        = bnx2_self_test_count,
+        .self_test              = bnx2_self_test,
+        .get_strings            = bnx2_get_strings,
+        .phys_id                = bnx2_phys_id,
+        .get_stats_count        = bnx2_get_stats_count,
+        .get_ethtool_stats      = bnx2_get_ethtool_stats,
+};
+
+/* Called with rtnl_lock */
+static int
+bnx2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+{
+        struct mii_ioctl_data *data = (struct mii_ioctl_data *)&ifr->ifr_data;
+        struct bnx2 *bp = dev->priv;
+        int err;
+
+        switch(cmd) {
+        case SIOCGMIIPHY:
+                data->phy_id = bp->phy_addr;
+
+                /* fallthru */
+        case SIOCGMIIREG: {
+                u32 mii_regval;
+
+                spin_lock_irq(&bp->phy_lock);
+                err = bnx2_read_phy(bp, data->reg_num & 0x1f, &mii_regval);
+                spin_unlock_irq(&bp->phy_lock);
+
+                data->val_out = mii_regval;
+
+                return err;
+        }
+
+        case SIOCSMIIREG:
+                if (!capable(CAP_NET_ADMIN))
+                        return -EPERM;
+
+                spin_lock_irq(&bp->phy_lock);
+                err = bnx2_write_phy(bp, data->reg_num & 0x1f, data->val_in);
+                spin_unlock_irq(&bp->phy_lock);
+
+                return err;
+
+        default:
+                /* do nothing */
+                break;
+        }
+        return -EOPNOTSUPP;
+}
+
+/* Called with rtnl_lock */
+static int
+bnx2_change_mac_addr(struct net_device *dev, void *p)
+{
+        struct sockaddr *addr = p;
+        struct bnx2 *bp = dev->priv;
+
+        memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+        if (netif_running(dev))
+                bnx2_set_mac_addr(bp);
+
+        return 0;
+}
+
+/* Called with rtnl_lock */
+static int
+bnx2_change_mtu(struct net_device *dev, int new_mtu)
+{
+        struct bnx2 *bp = dev->priv;
+
+        if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
+                ((new_mtu + ETH_HLEN) < MIN_ETHERNET_PACKET_SIZE))
+                return -EINVAL;
+
+        dev->mtu = new_mtu;
+        if (netif_running(dev)) {
+                bnx2_netif_stop(bp);
+
+                bnx2_init_nic(bp);
+
+                bnx2_netif_start(bp);
+        }
+        return 0;
+}
+
+#if defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER)
+static void
+poll_bnx2(struct net_device *dev)
+{
+        struct bnx2 *bp = dev->priv;
+
+        disable_irq(bp->pdev->irq);
+        bnx2_interrupt(bp->pdev->irq, dev, NULL);
+        enable_irq(bp->pdev->irq);
+}
+#endif
+
+static int __devinit
+bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
+{
+        struct bnx2 *bp;
+        unsigned long mem_len;
+        int rc;
+        u32 reg;
+
+        SET_MODULE_OWNER(dev);
+        SET_NETDEV_DEV(dev, &pdev->dev);
+        bp = dev->priv;
+
+        bp->flags = 0;
+        bp->phy_flags = 0;
+
+        /* enable device (incl. PCI PM wakeup), and bus-mastering */
+        rc = pci_enable_device(pdev);
+        if (rc) {
+                printk(KERN_ERR PFX "Cannot enable PCI device, aborting.");
+                goto err_out;
+        }
+
+        if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
+                printk(KERN_ERR PFX "Cannot find PCI device base address, "
+                       "aborting.\n");
+                rc = -ENODEV;
+                goto err_out_disable;
+        }
+
+        rc = pci_request_regions(pdev, DRV_MODULE_NAME);
+        if (rc) {
+                printk(KERN_ERR PFX "Cannot obtain PCI resources, aborting.\n");
+                goto err_out_disable;
+        }
+
+        pci_set_master(pdev);
+
+        bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
+        if (bp->pm_cap == 0) {
+                printk(KERN_ERR PFX "Cannot find power management capability, "
+                               "aborting.\n");
+                rc = -EIO;
+                goto err_out_release;
+        }
+
+        bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
+        if (bp->pcix_cap == 0) {
+                printk(KERN_ERR PFX "Cannot find PCIX capability, aborting.\n");
+                rc = -EIO;
+                goto err_out_release;
+        }
+
+        if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0) {
+                bp->flags |= USING_DAC_FLAG;
+                if (pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK) != 0) {
+                        printk(KERN_ERR PFX "pci_set_consistent_dma_mask "
+                               "failed, aborting.\n");
+                        rc = -EIO;
+                        goto err_out_release;
+                }
+        }
+        else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) {
+                printk(KERN_ERR PFX "System does not support DMA, aborting.\n");
+                rc = -EIO;
+                goto err_out_release;
+        }
+
+        bp->dev = dev;
+        bp->pdev = pdev;
+
+        spin_lock_init(&bp->phy_lock);
+        spin_lock_init(&bp->tx_lock);
+        INIT_WORK(&bp->reset_task, bnx2_reset_task, bp);
+
+        dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0);
+        mem_len = MB_GET_CID_ADDR(17);
+        dev->mem_end = dev->mem_start + mem_len;
+        dev->irq = pdev->irq;
+
+        bp->regview = ioremap_nocache(dev->base_addr, mem_len);
+
+        if (!bp->regview) {
+                printk(KERN_ERR PFX "Cannot map register space, aborting.\n");
+                rc = -ENOMEM;
+                goto err_out_release;
+        }
+
+        /* Configure byte swap and enable write to the reg_window registers.
+         * Rely on CPU to do target byte swapping on big endian systems
+         * The chip's target access swapping will not swap all accesses
+         */
+        pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG,
+                               BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+                               BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP);
+
+        bnx2_set_power_state(bp, 0);
+
+        bp->chip_id = REG_RD(bp, BNX2_MISC_ID);
+
+        bp->phy_addr = 1;
+
+        /* Get bus information. */
+        reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS);
+        if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
+                u32 clkreg;
+
+                bp->flags |= PCIX_FLAG;
+
+                clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
+                
+                clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
+                switch (clkreg) {
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
+                        bp->bus_speed_mhz = 133;
+                        break;
+
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
+                        bp->bus_speed_mhz = 100;
+                        break;
+
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
+                        bp->bus_speed_mhz = 66;
+                        break;
+
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
+                        bp->bus_speed_mhz = 50;
+                        break;
+
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
+                case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
+                        bp->bus_speed_mhz = 33;
+                        break;
+                }
+        }
+        else {
+                if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
+                        bp->bus_speed_mhz = 66;
+                else
+                        bp->bus_speed_mhz = 33;
+        }
+
+        if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
+                bp->flags |= PCI_32BIT_FLAG;
+
+        /* 5706A0 may falsely detect SERR and PERR. */
+        if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+                reg = REG_RD(bp, PCI_COMMAND);
+                reg &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
+                REG_WR(bp, PCI_COMMAND, reg);
+        }
+        else if ((CHIP_ID(bp) == CHIP_ID_5706_A1) &&
+                !(bp->flags & PCIX_FLAG)) {
+
+                printk(KERN_ERR PFX "5706 A1 can only be used in a PCIX bus, "
+                       "aborting.\n");
+                goto err_out_unmap;
+        }
+
+        bnx2_init_nvram(bp);
+
+        /* Get the permanent MAC address.  First we need to make sure the
+         * firmware is actually running.
+         */
+        reg = REG_RD_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_DEV_INFO_SIGNATURE);
+
+        if ((reg & BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK) !=
+            BNX2_DEV_INFO_SIGNATURE_MAGIC) {
+                printk(KERN_ERR PFX "Firmware not running, aborting.\n");
+                rc = -ENODEV;
+                goto err_out_unmap;
+        }
+
+        bp->fw_ver = REG_RD_IND(bp, HOST_VIEW_SHMEM_BASE +
+                                BNX2_DEV_INFO_BC_REV);
+
+        reg = REG_RD_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_PORT_HW_CFG_MAC_UPPER);
+        bp->mac_addr[0] = (u8) (reg >> 8);
+        bp->mac_addr[1] = (u8) reg;
+
+        reg = REG_RD_IND(bp, HOST_VIEW_SHMEM_BASE + BNX2_PORT_HW_CFG_MAC_LOWER);
+        bp->mac_addr[2] = (u8) (reg >> 24);
+        bp->mac_addr[3] = (u8) (reg >> 16);
+        bp->mac_addr[4] = (u8) (reg >> 8);
+        bp->mac_addr[5] = (u8) reg;
+
+        bp->tx_ring_size = MAX_TX_DESC_CNT;
+        bp->rx_ring_size = 100;
+
+        bp->rx_csum = 1;
+
+        bp->rx_offset = sizeof(struct l2_fhdr) + 2;
+
+        bp->tx_quick_cons_trip_int = 20;
+        bp->tx_quick_cons_trip = 20;
+        bp->tx_ticks_int = 80;
+        bp->tx_ticks = 80;
+                
+        bp->rx_quick_cons_trip_int = 6;
+        bp->rx_quick_cons_trip = 6;
+        bp->rx_ticks_int = 18;
+        bp->rx_ticks = 18;
+
+        bp->stats_ticks = 1000000 & 0xffff00;
+
+        bp->timer_interval =  HZ;
+
+        /* Disable WOL support if we are running on a SERDES chip. */
+        if (CHIP_BOND_ID(bp) & CHIP_BOND_ID_SERDES_BIT) {
+                bp->phy_flags |= PHY_SERDES_FLAG;
+                bp->flags |= NO_WOL_FLAG;
+        }
+
+        if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+                bp->tx_quick_cons_trip_int =
+                        bp->tx_quick_cons_trip;
+                bp->tx_ticks_int = bp->tx_ticks;
+                bp->rx_quick_cons_trip_int =
+                        bp->rx_quick_cons_trip;
+                bp->rx_ticks_int = bp->rx_ticks;
+                bp->comp_prod_trip_int = bp->comp_prod_trip;
+                bp->com_ticks_int = bp->com_ticks;
+                bp->cmd_ticks_int = bp->cmd_ticks;
+        }
+
+        bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;
+        bp->req_line_speed = 0;
+        if (bp->phy_flags & PHY_SERDES_FLAG) {
+                bp->advertising = ETHTOOL_ALL_FIBRE_SPEED | ADVERTISED_Autoneg;
+        }
+        else {
+                bp->advertising = ETHTOOL_ALL_COPPER_SPEED | ADVERTISED_Autoneg;
+        }
+
+        bp->req_flow_ctrl = FLOW_CTRL_RX | FLOW_CTRL_TX;
+
+        return 0;
+
+err_out_unmap:
+        if (bp->regview) {
+                iounmap(bp->regview);
+        }
+
+err_out_release:
+        pci_release_regions(pdev);
+
+err_out_disable:
+        pci_disable_device(pdev);
+        pci_set_drvdata(pdev, NULL);
+
+err_out:
+        return rc;
+}
+
+static int __devinit
+bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+        static int version_printed = 0;
+        struct net_device *dev = NULL;
+        struct bnx2 *bp;
+        int rc, i;
+
+        if (version_printed++ == 0)
+                printk(KERN_INFO "%s", version);
+
+        /* dev zeroed in init_etherdev */
+        dev = alloc_etherdev(sizeof(*bp));
+
+        if (!dev)
+                return -ENOMEM;
+
+        rc = bnx2_init_board(pdev, dev);
+        if (rc < 0) {
+                free_netdev(dev);
+                return rc;
+        }
+
+        dev->open = bnx2_open;
+        dev->hard_start_xmit = bnx2_start_xmit;
+        dev->stop = bnx2_close;
+        dev->get_stats = bnx2_get_stats;
+        dev->set_multicast_list = bnx2_set_rx_mode;
+        dev->do_ioctl = bnx2_ioctl;
+        dev->set_mac_address = bnx2_change_mac_addr;
+        dev->change_mtu = bnx2_change_mtu;
+        dev->tx_timeout = bnx2_tx_timeout;
+        dev->watchdog_timeo = TX_TIMEOUT;
+#ifdef BCM_VLAN
+        dev->vlan_rx_register = bnx2_vlan_rx_register;
+        dev->vlan_rx_kill_vid = bnx2_vlan_rx_kill_vid;
+#endif
+        dev->poll = bnx2_poll;
+        dev->ethtool_ops = &bnx2_ethtool_ops;
+        dev->weight = 64;
+
+        bp = dev->priv;
+
+#if defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER)
+        dev->poll_controller = poll_bnx2;
+#endif
+
+        if ((rc = register_netdev(dev))) {
+                printk(KERN_ERR PFX "Cannot register net device\n");
+                if (bp->regview)
+                        iounmap(bp->regview);
+                pci_release_regions(pdev);
+                pci_disable_device(pdev);
+                pci_set_drvdata(pdev, NULL);
+                free_netdev(dev);
+                return rc;
+        }
+
+        pci_set_drvdata(pdev, dev);
+
+        memcpy(dev->dev_addr, bp->mac_addr, 6);
+        bp->name = board_info[ent->driver_data].name,
+        printk(KERN_INFO "%s: %s (%c%d) PCI%s %s %dMHz found at mem %lx, "
+                "IRQ %d, ",
+                dev->name,
+                bp->name,
+                ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
+                ((CHIP_ID(bp) & 0x0ff0) >> 4),
+                ((bp->flags & PCIX_FLAG) ? "-X" : ""),
+                ((bp->flags & PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
+                bp->bus_speed_mhz,
+                dev->base_addr,
+                bp->pdev->irq);
+
+        printk("node addr ");
+        for (i = 0; i < 6; i++)
+                printk("%2.2x", dev->dev_addr[i]);
+        printk("\n");
+
+        dev->features |= NETIF_F_SG;
+        if (bp->flags & USING_DAC_FLAG)
+                dev->features |= NETIF_F_HIGHDMA;
+        dev->features |= NETIF_F_IP_CSUM;
+#ifdef BCM_VLAN
+        dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
+#endif
+#ifdef BCM_TSO
+        dev->features |= NETIF_F_TSO;
+#endif
+
+        netif_carrier_off(bp->dev);
+
+        return 0;
+}
+
+static void __devexit
+bnx2_remove_one(struct pci_dev *pdev)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct bnx2 *bp = dev->priv;
+
+        unregister_netdev(dev);
+
+        if (bp->regview)
+                iounmap(bp->regview);
+
+        free_netdev(dev);
+        pci_release_regions(pdev);
+        pci_disable_device(pdev);
+        pci_set_drvdata(pdev, NULL);
+}
+
+static int
+bnx2_suspend(struct pci_dev *pdev, u32 state)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct bnx2 *bp = dev->priv;
+        u32 reset_code;
+
+        if (!netif_running(dev))
+                return 0;
+
+        bnx2_netif_stop(bp);
+        netif_device_detach(dev);
+        del_timer_sync(&bp->timer);
+        if (bp->wol)
+                reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
+        else
+                reset_code = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL;
+        bnx2_reset_chip(bp, reset_code);
+        bnx2_free_skbs(bp);
+        bnx2_set_power_state(bp, state);
+        return 0;
+}
+
+static int
+bnx2_resume(struct pci_dev *pdev)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct bnx2 *bp = dev->priv;
+
+        if (!netif_running(dev))
+                return 0;
+
+        bnx2_set_power_state(bp, 0);
+        netif_device_attach(dev);
+        bnx2_init_nic(bp);
+        bnx2_netif_start(bp);
+        return 0;
+}
+
+static struct pci_driver bnx2_pci_driver = {
+        name:           DRV_MODULE_NAME,
+        id_table:       bnx2_pci_tbl,
+        probe:          bnx2_init_one,
+        remove:         __devexit_p(bnx2_remove_one),
+        suspend:        bnx2_suspend,
+        resume:         bnx2_resume,
+};
+
+static int __init bnx2_init(void)
+{
+        return pci_module_init(&bnx2_pci_driver);
+}
+
+static void __exit bnx2_cleanup(void)
+{
+        pci_unregister_driver(&bnx2_pci_driver);
+}
+
+module_init(bnx2_init);
+module_exit(bnx2_cleanup);
+
+
+
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
new file mode 100644
index 000000000000..8214a2853d0d
--- /dev/null
+++ b/drivers/net/bnx2.h
@@ -0,0 +1,4352 @@
+/* bnx2.h: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation.
+ *
+ * Written by: Michael Chan  (mchan@broadcom.com)
+ */
+
+
+#ifndef BNX2_H
+#define BNX2_H
+
+#include <linux/config.h>
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/dma-mapping.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <linux/delay.h>
+#include <asm/byteorder.h>
+#include <linux/time.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#ifdef NETIF_F_HW_VLAN_TX
+#include <linux/if_vlan.h>
+#define BCM_VLAN 1
+#endif
+#ifdef NETIF_F_TSO
+#include <net/ip.h>
+#include <net/tcp.h>
+#include <net/checksum.h>
+#define BCM_TSO 1
+#endif
+#include <linux/workqueue.h>
+#include <linux/crc32.h>
+
+/* Hardware data structures and register definitions automatically
+ * generated from RTL code. Do not modify.
+ */
+
+/*
+ *  tx_bd definition
+ */
+struct tx_bd {
+        u32 tx_bd_haddr_hi;
+        u32 tx_bd_haddr_lo;                                   
+        u32 tx_bd_mss_nbytes;                                     
+        u32 tx_bd_vlan_tag_flags;                                      
+                #define TX_BD_FLAGS_CONN_FAULT          (1<<0)
+                #define TX_BD_FLAGS_TCP_UDP_CKSUM       (1<<1)
+                #define TX_BD_FLAGS_IP_CKSUM            (1<<2)
+                #define TX_BD_FLAGS_VLAN_TAG            (1<<3)
+                #define TX_BD_FLAGS_COAL_NOW            (1<<4)
+                #define TX_BD_FLAGS_DONT_GEN_CRC        (1<<5)
+                #define TX_BD_FLAGS_END                 (1<<6)
+                #define TX_BD_FLAGS_START               (1<<7)
+                #define TX_BD_FLAGS_SW_OPTION_WORD      (0x1f<<8)
+                #define TX_BD_FLAGS_SW_FLAGS            (1<<13)
+                #define TX_BD_FLAGS_SW_SNAP             (1<<14)
+                #define TX_BD_FLAGS_SW_LSO              (1<<15)
+
+};
+
+
+/*
+ *  rx_bd definition
+ */
+struct rx_bd {
+        u32 rx_bd_haddr_hi;
+        u32 rx_bd_haddr_lo;
+        u32 rx_bd_len;
+        u32 rx_bd_flags;
+                #define RX_BD_FLAGS_NOPUSH              (1<<0)
+                #define RX_BD_FLAGS_DUMMY               (1<<1)
+                #define RX_BD_FLAGS_END                 (1<<2)
+                #define RX_BD_FLAGS_START               (1<<3)
+
+};
+
+
+/*
+ *  status_block definition
+ */
+struct status_block {
+        u32 status_attn_bits;
+                #define STATUS_ATTN_BITS_LINK_STATE             (1L<<0)
+                #define STATUS_ATTN_BITS_TX_SCHEDULER_ABORT     (1L<<1)
+                #define STATUS_ATTN_BITS_TX_BD_READ_ABORT       (1L<<2)
+                #define STATUS_ATTN_BITS_TX_BD_CACHE_ABORT      (1L<<3)
+                #define STATUS_ATTN_BITS_TX_PROCESSOR_ABORT     (1L<<4)
+                #define STATUS_ATTN_BITS_TX_DMA_ABORT           (1L<<5)
+                #define STATUS_ATTN_BITS_TX_PATCHUP_ABORT       (1L<<6)
+                #define STATUS_ATTN_BITS_TX_ASSEMBLER_ABORT     (1L<<7)
+                #define STATUS_ATTN_BITS_RX_PARSER_MAC_ABORT    (1L<<8)
+                #define STATUS_ATTN_BITS_RX_PARSER_CATCHUP_ABORT        (1L<<9)
+                #define STATUS_ATTN_BITS_RX_MBUF_ABORT          (1L<<10)
+                #define STATUS_ATTN_BITS_RX_LOOKUP_ABORT        (1L<<11)
+                #define STATUS_ATTN_BITS_RX_PROCESSOR_ABORT     (1L<<12)
+                #define STATUS_ATTN_BITS_RX_V2P_ABORT           (1L<<13)
+                #define STATUS_ATTN_BITS_RX_BD_CACHE_ABORT      (1L<<14)
+                #define STATUS_ATTN_BITS_RX_DMA_ABORT           (1L<<15)
+                #define STATUS_ATTN_BITS_COMPLETION_ABORT       (1L<<16)
+                #define STATUS_ATTN_BITS_HOST_COALESCE_ABORT    (1L<<17)
+                #define STATUS_ATTN_BITS_MAILBOX_QUEUE_ABORT    (1L<<18)
+                #define STATUS_ATTN_BITS_CONTEXT_ABORT          (1L<<19)
+                #define STATUS_ATTN_BITS_CMD_SCHEDULER_ABORT    (1L<<20)
+                #define STATUS_ATTN_BITS_CMD_PROCESSOR_ABORT    (1L<<21)
+                #define STATUS_ATTN_BITS_MGMT_PROCESSOR_ABORT   (1L<<22)
+                #define STATUS_ATTN_BITS_MAC_ABORT              (1L<<23)
+                #define STATUS_ATTN_BITS_TIMER_ABORT            (1L<<24)
+                #define STATUS_ATTN_BITS_DMAE_ABORT             (1L<<25)
+                #define STATUS_ATTN_BITS_FLSH_ABORT             (1L<<26)
+                #define STATUS_ATTN_BITS_GRC_ABORT              (1L<<27)
+                #define STATUS_ATTN_BITS_PARITY_ERROR           (1L<<31)
+
+        u32 status_attn_bits_ack;
+#if defined(__BIG_ENDIAN)
+        u16 status_tx_quick_consumer_index0;
+        u16 status_tx_quick_consumer_index1;
+        u16 status_tx_quick_consumer_index2;
+        u16 status_tx_quick_consumer_index3;
+        u16 status_rx_quick_consumer_index0;
+        u16 status_rx_quick_consumer_index1;
+        u16 status_rx_quick_consumer_index2;
+        u16 status_rx_quick_consumer_index3;
+        u16 status_rx_quick_consumer_index4;
+        u16 status_rx_quick_consumer_index5;
+        u16 status_rx_quick_consumer_index6;
+        u16 status_rx_quick_consumer_index7;
+        u16 status_rx_quick_consumer_index8;
+        u16 status_rx_quick_consumer_index9;
+        u16 status_rx_quick_consumer_index10;
+        u16 status_rx_quick_consumer_index11;
+        u16 status_rx_quick_consumer_index12;
+        u16 status_rx_quick_consumer_index13;
+        u16 status_rx_quick_consumer_index14;
+        u16 status_rx_quick_consumer_index15;
+        u16 status_completion_producer_index;
+        u16 status_cmd_consumer_index;
+        u16 status_idx;
+        u16 status_unused;
+#elif defined(__LITTLE_ENDIAN)
+        u16 status_tx_quick_consumer_index1;
+        u16 status_tx_quick_consumer_index0;
+        u16 status_tx_quick_consumer_index3;
+        u16 status_tx_quick_consumer_index2;
+        u16 status_rx_quick_consumer_index1;
+        u16 status_rx_quick_consumer_index0;
+        u16 status_rx_quick_consumer_index3;
+        u16 status_rx_quick_consumer_index2;
+        u16 status_rx_quick_consumer_index5;
+        u16 status_rx_quick_consumer_index4;
+        u16 status_rx_quick_consumer_index7;
+        u16 status_rx_quick_consumer_index6;
+        u16 status_rx_quick_consumer_index9;
+        u16 status_rx_quick_consumer_index8;
+        u16 status_rx_quick_consumer_index11;
+        u16 status_rx_quick_consumer_index10;
+        u16 status_rx_quick_consumer_index13;
+        u16 status_rx_quick_consumer_index12;
+        u16 status_rx_quick_consumer_index15;
+        u16 status_rx_quick_consumer_index14;
+        u16 status_cmd_consumer_index;
+        u16 status_completion_producer_index;
+        u16 status_unused;
+        u16 status_idx;
+#endif
+};
+
+
+/*
+ *  statistics_block definition
+ */
+struct statistics_block {
+        u32 stat_IfHCInOctets_hi;
+        u32 stat_IfHCInOctets_lo;
+        u32 stat_IfHCInBadOctets_hi;
+        u32 stat_IfHCInBadOctets_lo;
+        u32 stat_IfHCOutOctets_hi;
+        u32 stat_IfHCOutOctets_lo;
+        u32 stat_IfHCOutBadOctets_hi;
+        u32 stat_IfHCOutBadOctets_lo;
+        u32 stat_IfHCInUcastPkts_hi;
+        u32 stat_IfHCInUcastPkts_lo;
+        u32 stat_IfHCInMulticastPkts_hi;
+        u32 stat_IfHCInMulticastPkts_lo;
+        u32 stat_IfHCInBroadcastPkts_hi;
+        u32 stat_IfHCInBroadcastPkts_lo;
+        u32 stat_IfHCOutUcastPkts_hi;
+        u32 stat_IfHCOutUcastPkts_lo;
+        u32 stat_IfHCOutMulticastPkts_hi;
+        u32 stat_IfHCOutMulticastPkts_lo;
+        u32 stat_IfHCOutBroadcastPkts_hi;
+        u32 stat_IfHCOutBroadcastPkts_lo;
+        u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
+        u32 stat_Dot3StatsCarrierSenseErrors;
+        u32 stat_Dot3StatsFCSErrors;
+        u32 stat_Dot3StatsAlignmentErrors;
+        u32 stat_Dot3StatsSingleCollisionFrames;
+        u32 stat_Dot3StatsMultipleCollisionFrames;
+        u32 stat_Dot3StatsDeferredTransmissions;
+        u32 stat_Dot3StatsExcessiveCollisions;
+        u32 stat_Dot3StatsLateCollisions;
+        u32 stat_EtherStatsCollisions;
+        u32 stat_EtherStatsFragments;
+        u32 stat_EtherStatsJabbers;
+        u32 stat_EtherStatsUndersizePkts;
+        u32 stat_EtherStatsOverrsizePkts;
+        u32 stat_EtherStatsPktsRx64Octets;
+        u32 stat_EtherStatsPktsRx65Octetsto127Octets;
+        u32 stat_EtherStatsPktsRx128Octetsto255Octets;
+        u32 stat_EtherStatsPktsRx256Octetsto511Octets;
+        u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
+        u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
+        u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
+        u32 stat_EtherStatsPktsTx64Octets;
+        u32 stat_EtherStatsPktsTx65Octetsto127Octets;
+        u32 stat_EtherStatsPktsTx128Octetsto255Octets;
+        u32 stat_EtherStatsPktsTx256Octetsto511Octets;
+        u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
+        u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
+        u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
+        u32 stat_XonPauseFramesReceived;
+        u32 stat_XoffPauseFramesReceived;
+        u32 stat_OutXonSent;
+        u32 stat_OutXoffSent;
+        u32 stat_FlowControlDone;
+        u32 stat_MacControlFramesReceived;
+        u32 stat_XoffStateEntered;
+        u32 stat_IfInFramesL2FilterDiscards;
+        u32 stat_IfInRuleCheckerDiscards;
+        u32 stat_IfInFTQDiscards;
+        u32 stat_IfInMBUFDiscards;
+        u32 stat_IfInRuleCheckerP4Hit;
+        u32 stat_CatchupInRuleCheckerDiscards;
+        u32 stat_CatchupInFTQDiscards;
+        u32 stat_CatchupInMBUFDiscards;
+        u32 stat_CatchupInRuleCheckerP4Hit;
+        u32 stat_GenStat00;
+        u32 stat_GenStat01;
+        u32 stat_GenStat02;
+        u32 stat_GenStat03;
+        u32 stat_GenStat04;
+        u32 stat_GenStat05;
+        u32 stat_GenStat06;
+        u32 stat_GenStat07;
+        u32 stat_GenStat08;
+        u32 stat_GenStat09;
+        u32 stat_GenStat10;
+        u32 stat_GenStat11;
+        u32 stat_GenStat12;
+        u32 stat_GenStat13;
+        u32 stat_GenStat14;
+        u32 stat_GenStat15;
+};
+
+
+/*
+ *  l2_fhdr definition
+ */
+struct l2_fhdr {
+#if defined(__BIG_ENDIAN)
+        u16 l2_fhdr_errors;
+        u16 l2_fhdr_status;
+#elif defined(__LITTLE_ENDIAN)
+        u16 l2_fhdr_status;
+        u16 l2_fhdr_errors;
+#endif
+                #define L2_FHDR_ERRORS_BAD_CRC          (1<<1)
+                #define L2_FHDR_ERRORS_PHY_DECODE       (1<<2)
+                #define L2_FHDR_ERRORS_ALIGNMENT        (1<<3)
+                #define L2_FHDR_ERRORS_TOO_SHORT        (1<<4)
+                #define L2_FHDR_ERRORS_GIANT_FRAME      (1<<5)
+
+                #define L2_FHDR_STATUS_RULE_CLASS       (0x7<<0)
+                #define L2_FHDR_STATUS_RULE_P2          (1<<3)
+                #define L2_FHDR_STATUS_RULE_P3          (1<<4)
+                #define L2_FHDR_STATUS_RULE_P4          (1<<5)
+                #define L2_FHDR_STATUS_L2_VLAN_TAG      (1<<6)
+                #define L2_FHDR_STATUS_L2_LLC_SNAP      (1<<7)
+                #define L2_FHDR_STATUS_RSS_HASH         (1<<8)
+                #define L2_FHDR_STATUS_IP_DATAGRAM      (1<<13)
+                #define L2_FHDR_STATUS_TCP_SEGMENT      (1<<14)
+                #define L2_FHDR_STATUS_UDP_DATAGRAM     (1<<15)
+
+        u32 l2_fhdr_hash;
+#if defined(__BIG_ENDIAN)
+        u16 l2_fhdr_pkt_len;
+        u16 l2_fhdr_vlan_tag;
+        u16 l2_fhdr_ip_xsum;
+        u16 l2_fhdr_tcp_udp_xsum;
+#elif defined(__LITTLE_ENDIAN)
+        u16 l2_fhdr_vlan_tag;
+        u16 l2_fhdr_pkt_len;
+        u16 l2_fhdr_tcp_udp_xsum;
+        u16 l2_fhdr_ip_xsum;
+#endif
+};
+
+
+/*
+ *  l2_context definition
+ */
+#define BNX2_L2CTX_TYPE                                 0x00000000
+#define BNX2_L2CTX_TYPE_SIZE_L2                          ((0xc0/0x20)<<16)
+#define BNX2_L2CTX_TYPE_TYPE                             (0xf<<28)
+#define BNX2_L2CTX_TYPE_TYPE_EMPTY                       (0<<28)
+#define BNX2_L2CTX_TYPE_TYPE_L2                          (1<<28)
+
+#define BNX2_L2CTX_TX_HOST_BIDX                         0x00000088
+#define BNX2_L2CTX_EST_NBD                              0x00000088
+#define BNX2_L2CTX_CMD_TYPE                             0x00000088
+#define BNX2_L2CTX_CMD_TYPE_TYPE                         (0xf<<24)
+#define BNX2_L2CTX_CMD_TYPE_TYPE_L2                      (0<<24)
+#define BNX2_L2CTX_CMD_TYPE_TYPE_TCP                     (1<<24)
+
+#define BNX2_L2CTX_TX_HOST_BSEQ                         0x00000090
+#define BNX2_L2CTX_TSCH_BSEQ                            0x00000094
+#define BNX2_L2CTX_TBDR_BSEQ                            0x00000098
+#define BNX2_L2CTX_TBDR_BOFF                            0x0000009c
+#define BNX2_L2CTX_TBDR_BIDX                            0x0000009c
+#define BNX2_L2CTX_TBDR_BHADDR_HI                       0x000000a0
+#define BNX2_L2CTX_TBDR_BHADDR_LO                       0x000000a4
+#define BNX2_L2CTX_TXP_BOFF                             0x000000a8
+#define BNX2_L2CTX_TXP_BIDX                             0x000000a8
+#define BNX2_L2CTX_TXP_BSEQ                             0x000000ac
+
+
+/*
+ *  l2_bd_chain_context definition
+ */
+#define BNX2_L2CTX_BD_PRE_READ                          0x00000000
+#define BNX2_L2CTX_CTX_SIZE                             0x00000000
+#define BNX2_L2CTX_CTX_TYPE                             0x00000000
+#define BNX2_L2CTX_CTX_TYPE_SIZE_L2                      ((0x20/20)<<16)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE              (0xf<<28)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED    (0<<28)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE        (1<<28)
+
+#define BNX2_L2CTX_HOST_BDIDX                           0x00000004
+#define BNX2_L2CTX_HOST_BSEQ                            0x00000008
+#define BNX2_L2CTX_NX_BSEQ                              0x0000000c
+#define BNX2_L2CTX_NX_BDHADDR_HI                        0x00000010
+#define BNX2_L2CTX_NX_BDHADDR_LO                        0x00000014
+#define BNX2_L2CTX_NX_BDIDX                             0x00000018
+
+
+/*
+ *  pci_config_l definition
+ *  offset: 0000
+ */
+#define BNX2_PCICFG_MISC_CONFIG                         0x00000068
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP         (1L<<2)
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP      (1L<<3)
+#define BNX2_PCICFG_MISC_CONFIG_CLOCK_CTL_ENA            (1L<<5)
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_GRC_WORD_SWAP     (1L<<6)
+#define BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA           (1L<<7)
+#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ             (1L<<8)
+#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY             (1L<<9)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_METAL_REV           (0xffL<<16)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_BASE_REV            (0xfL<<24)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_ID                  (0xfL<<28)
+
+#define BNX2_PCICFG_MISC_STATUS                         0x0000006c
+#define BNX2_PCICFG_MISC_STATUS_INTA_VALUE               (1L<<0)
+#define BNX2_PCICFG_MISC_STATUS_32BIT_DET                (1L<<1)
+#define BNX2_PCICFG_MISC_STATUS_M66EN                    (1L<<2)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_DET                 (1L<<3)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED               (0x3L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_66            (0L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_100           (1L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_133           (2L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_PCI_MODE      (3L<<4)
+
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS              0x00000070
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET       (0xfL<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ         (0L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ         (1L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ         (2L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ         (3L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ         (4L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ         (5L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ         (6L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ        (7L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW   (0xfL<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE      (1L<<6)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT  (1L<<7)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC      (0x7L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF        (0L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12   (1L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6    (2L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62   (4L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PLAY_DEAD     (1L<<11)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED    (0xfL<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100        (0L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80         (1L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50         (2L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40         (4L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25         (8L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP     (1L<<16)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_PLL_STOP  (1L<<17)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_18   (1L<<18)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_USE_SPD_DET   (1L<<19)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED      (0xfffL<<20)
+
+#define BNX2_PCICFG_REG_WINDOW_ADDRESS                  0x00000078
+#define BNX2_PCICFG_REG_WINDOW                          0x00000080
+#define BNX2_PCICFG_INT_ACK_CMD                         0x00000084
+#define BNX2_PCICFG_INT_ACK_CMD_INDEX                    (0xffffL<<0)
+#define BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID              (1L<<16)
+#define BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM         (1L<<17)
+#define BNX2_PCICFG_INT_ACK_CMD_MASK_INT                 (1L<<18)
+
+#define BNX2_PCICFG_STATUS_BIT_SET_CMD                  0x00000088
+#define BNX2_PCICFG_STATUS_BIT_CLEAR_CMD                0x0000008c
+#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR                  0x00000090
+#define BNX2_PCICFG_MAILBOX_QUEUE_DATA                  0x00000094
+
+
+/*
+ *  pci_reg definition
+ *  offset: 0x400
+ */
+#define BNX2_PCI_GRC_WINDOW_ADDR                        0x00000400
+#define BNX2_PCI_GRC_WINDOW_ADDR_PCI_GRC_WINDOW_ADDR_VALUE       (0x3ffffL<<8)
+
+#define BNX2_PCI_CONFIG_1                               0x00000404
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY                  (0x7L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_OFF              (0L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_16               (1L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_32               (2L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_64               (3L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_128              (4L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_256              (5L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_512              (6L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_1024             (7L<<8)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY                 (0x7L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_OFF             (0L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_16              (1L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_32              (2L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_64              (3L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_128             (4L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_256             (5L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_512             (6L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_1024            (7L<<11)
+
+#define BNX2_PCI_CONFIG_2                               0x00000408
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE                      (0xfL<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_DISABLED             (0L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64K                  (1L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128K                 (2L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256K                 (3L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512K                 (4L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1M                   (5L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_2M                   (6L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_4M                   (7L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_8M                   (8L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_16M                  (9L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_32M                  (10L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64M                  (11L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128M                 (12L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256M                 (13L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512M                 (14L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1G                   (15L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_64ENA                     (1L<<4)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_RETRY                  (1L<<5)
+#define BNX2_PCI_CONFIG_2_CFG_CYCLE_RETRY                (1L<<6)
+#define BNX2_PCI_CONFIG_2_FIRST_CFG_DONE                 (1L<<7)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE                   (0xffL<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED          (0L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1K                (1L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2K                (2L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4K                (3L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8K                (4L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16K               (5L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_32K               (6L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_64K               (7L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_128K              (8L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_256K              (9L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_512K              (10L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1M                (11L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2M                (12L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4M                (13L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8M                (14L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16M               (15L<<8)
+#define BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMIT                (0x1fL<<16)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT                 (0x3L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_512             (0L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_1K              (1L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_2K              (2L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_4K              (3L<<21)
+#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_MSTR              (1L<<23)
+#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_TGT               (1L<<24)
+#define BNX2_PCI_CONFIG_2_KEEP_REQ_ASSERT                (1L<<25)
+
+#define BNX2_PCI_CONFIG_3                               0x0000040c
+#define BNX2_PCI_CONFIG_3_STICKY_BYTE                    (0xffL<<0)
+#define BNX2_PCI_CONFIG_3_FORCE_PME                      (1L<<24)
+#define BNX2_PCI_CONFIG_3_PME_STATUS                     (1L<<25)
+#define BNX2_PCI_CONFIG_3_PME_ENABLE                     (1L<<26)
+#define BNX2_PCI_CONFIG_3_PM_STATE                       (0x3L<<27)
+#define BNX2_PCI_CONFIG_3_VAUX_PRESET                    (1L<<30)
+#define BNX2_PCI_CONFIG_3_PCI_POWER                      (1L<<31)
+
+#define BNX2_PCI_PM_DATA_A                              0x00000410
+#define BNX2_PCI_PM_DATA_A_PM_DATA_0_PRG                 (0xffL<<0)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_1_PRG                 (0xffL<<8)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_2_PRG                 (0xffL<<16)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_3_PRG                 (0xffL<<24)
+
+#define BNX2_PCI_PM_DATA_B                              0x00000414
+#define BNX2_PCI_PM_DATA_B_PM_DATA_4_PRG                 (0xffL<<0)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_5_PRG                 (0xffL<<8)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_6_PRG                 (0xffL<<16)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_7_PRG                 (0xffL<<24)
+
+#define BNX2_PCI_SWAP_DIAG0                             0x00000418
+#define BNX2_PCI_SWAP_DIAG1                             0x0000041c
+#define BNX2_PCI_EXP_ROM_ADDR                           0x00000420
+#define BNX2_PCI_EXP_ROM_ADDR_ADDRESS                    (0x3fffffL<<2)
+#define BNX2_PCI_EXP_ROM_ADDR_REQ                        (1L<<31)
+
+#define BNX2_PCI_EXP_ROM_DATA                           0x00000424
+#define BNX2_PCI_VPD_INTF                               0x00000428
+#define BNX2_PCI_VPD_INTF_INTF_REQ                       (1L<<0)
+
+#define BNX2_PCI_VPD_ADDR_FLAG                          0x0000042c
+#define BNX2_PCI_VPD_ADDR_FLAG_ADDRESS                   (0x1fff<<2)
+#define BNX2_PCI_VPD_ADDR_FLAG_WR                        (1<<15)
+
+#define BNX2_PCI_VPD_DATA                               0x00000430
+#define BNX2_PCI_ID_VAL1                                0x00000434
+#define BNX2_PCI_ID_VAL1_DEVICE_ID                       (0xffffL<<0)
+#define BNX2_PCI_ID_VAL1_VENDOR_ID                       (0xffffL<<16)
+
+#define BNX2_PCI_ID_VAL2                                0x00000438
+#define BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDOR_ID             (0xffffL<<0)
+#define BNX2_PCI_ID_VAL2_SUBSYSTEM_ID                    (0xffffL<<16)
+
+#define BNX2_PCI_ID_VAL3                                0x0000043c
+#define BNX2_PCI_ID_VAL3_CLASS_CODE                      (0xffffffL<<0)
+#define BNX2_PCI_ID_VAL3_REVISION_ID                     (0xffL<<24)
+
+#define BNX2_PCI_ID_VAL4                                0x00000440
+#define BNX2_PCI_ID_VAL4_CAP_ENA                         (0xfL<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_0                       (0L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_1                       (1L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_2                       (2L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_3                       (3L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_4                       (4L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_5                       (5L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_6                       (6L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_7                       (7L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_8                       (8L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_9                       (9L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_10                      (10L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_11                      (11L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_12                      (12L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_13                      (13L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_14                      (14L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_15                      (15L<<0)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG                    (0x3L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0                  (0L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1                  (1L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2                  (2L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3                  (3L<<6)
+#define BNX2_PCI_ID_VAL4_MSI_LIMIT                       (0x7L<<9)
+#define BNX2_PCI_ID_VAL4_MSI_ADVERTIZE                   (0x7L<<12)
+#define BNX2_PCI_ID_VAL4_MSI_ENABLE                      (1L<<15)
+#define BNX2_PCI_ID_VAL4_MAX_64_ADVERTIZE                (1L<<16)
+#define BNX2_PCI_ID_VAL4_MAX_133_ADVERTIZE               (1L<<17)
+#define BNX2_PCI_ID_VAL4_MAX_MEM_READ_SIZE               (0x3L<<21)
+#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE                  (0x7L<<23)
+#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE             (0x7L<<26)
+
+#define BNX2_PCI_ID_VAL5                                0x00000444
+#define BNX2_PCI_ID_VAL5_D1_SUPPORT                      (1L<<0)
+#define BNX2_PCI_ID_VAL5_D2_SUPPORT                      (1L<<1)
+#define BNX2_PCI_ID_VAL5_PME_IN_D0                       (1L<<2)
+#define BNX2_PCI_ID_VAL5_PME_IN_D1                       (1L<<3)
+#define BNX2_PCI_ID_VAL5_PME_IN_D2                       (1L<<4)
+#define BNX2_PCI_ID_VAL5_PME_IN_D3_HOT                   (1L<<5)
+
+#define BNX2_PCI_PCIX_EXTENDED_STATUS                   0x00000448
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_NO_SNOOP           (1L<<8)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_LONG_BURST         (1L<<9)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_CLASS       (0xfL<<16)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_IDX         (0xffL<<24)
+
+#define BNX2_PCI_ID_VAL6                                0x0000044c
+#define BNX2_PCI_ID_VAL6_MAX_LAT                         (0xffL<<0)
+#define BNX2_PCI_ID_VAL6_MIN_GNT                         (0xffL<<8)
+#define BNX2_PCI_ID_VAL6_BIST                            (0xffL<<16)
+
+#define BNX2_PCI_MSI_DATA                               0x00000450
+#define BNX2_PCI_MSI_DATA_PCI_MSI_DATA                   (0xffffL<<0)
+
+#define BNX2_PCI_MSI_ADDR_H                             0x00000454
+#define BNX2_PCI_MSI_ADDR_L                             0x00000458
+
+
+/*
+ *  misc_reg definition
+ *  offset: 0x800
+ */
+#define BNX2_MISC_COMMAND                               0x00000800
+#define BNX2_MISC_COMMAND_ENABLE_ALL                     (1L<<0)
+#define BNX2_MISC_COMMAND_DISABLE_ALL                    (1L<<1)
+#define BNX2_MISC_COMMAND_CORE_RESET                     (1L<<4)
+#define BNX2_MISC_COMMAND_HARD_RESET                     (1L<<5)
+#define BNX2_MISC_COMMAND_PAR_ERROR                      (1L<<8)
+#define BNX2_MISC_COMMAND_PAR_ERR_RAM                    (0x7fL<<16)
+
+#define BNX2_MISC_CFG                                   0x00000804
+#define BNX2_MISC_CFG_PCI_GRC_TMOUT                      (1L<<0)
+#define BNX2_MISC_CFG_NVM_WR_EN                          (0x3L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_PROTECT                  (0L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_PCI                      (1L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW                    (2L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW2                   (3L<<1)
+#define BNX2_MISC_CFG_BIST_EN                            (1L<<3)
+#define BNX2_MISC_CFG_CK25_OUT_ALT_SRC                   (1L<<4)
+#define BNX2_MISC_CFG_BYPASS_BSCAN                       (1L<<5)
+#define BNX2_MISC_CFG_BYPASS_EJTAG                       (1L<<6)
+#define BNX2_MISC_CFG_CLK_CTL_OVERRIDE                   (1L<<7)
+#define BNX2_MISC_CFG_LEDMODE                            (0x3L<<8)
+#define BNX2_MISC_CFG_LEDMODE_MAC                        (0L<<8)
+#define BNX2_MISC_CFG_LEDMODE_GPHY1                      (1L<<8)
+#define BNX2_MISC_CFG_LEDMODE_GPHY2                      (2L<<8)
+
+#define BNX2_MISC_ID                                    0x00000808
+#define BNX2_MISC_ID_BOND_ID                             (0xfL<<0)
+#define BNX2_MISC_ID_CHIP_METAL                          (0xffL<<4)
+#define BNX2_MISC_ID_CHIP_REV                            (0xfL<<12)
+#define BNX2_MISC_ID_CHIP_NUM                            (0xffffL<<16)
+
+#define BNX2_MISC_ENABLE_STATUS_BITS                    0x0000080c
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_SCHEDULER_ENABLE         (1L<<0)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_READ_ENABLE   (1L<<1)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_CACHE_ENABLE  (1L<<2)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PROCESSOR_ENABLE         (1L<<3)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_DMA_ENABLE       (1L<<4)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PATCHUP_ENABLE   (1L<<5)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PAYLOAD_Q_ENABLE         (1L<<6)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_HEADER_Q_ENABLE  (1L<<7)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_ASSEMBLER_ENABLE         (1L<<8)
+#define BNX2_MISC_ENABLE_STATUS_BITS_EMAC_ENABLE         (1L<<9)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_MAC_ENABLE        (1L<<10)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_CATCHUP_ENABLE    (1L<<11)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_MBUF_ENABLE      (1L<<12)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_LOOKUP_ENABLE    (1L<<13)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PROCESSOR_ENABLE         (1L<<14)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE       (1L<<15)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_BD_CACHE_ENABLE  (1L<<16)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_DMA_ENABLE       (1L<<17)
+#define BNX2_MISC_ENABLE_STATUS_BITS_COMPLETION_ENABLE   (1L<<18)
+#define BNX2_MISC_ENABLE_STATUS_BITS_HOST_COALESCE_ENABLE        (1L<<19)
+#define BNX2_MISC_ENABLE_STATUS_BITS_MAILBOX_QUEUE_ENABLE        (1L<<20)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE      (1L<<21)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_SCHEDULER_ENABLE        (1L<<22)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_PROCESSOR_ENABLE        (1L<<23)
+#define BNX2_MISC_ENABLE_STATUS_BITS_MGMT_PROCESSOR_ENABLE       (1L<<24)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TIMER_ENABLE        (1L<<25)
+#define BNX2_MISC_ENABLE_STATUS_BITS_DMA_ENGINE_ENABLE   (1L<<26)
+#define BNX2_MISC_ENABLE_STATUS_BITS_UMP_ENABLE          (1L<<27)
+
+#define BNX2_MISC_ENABLE_SET_BITS                       0x00000810
+#define BNX2_MISC_ENABLE_SET_BITS_TX_SCHEDULER_ENABLE    (1L<<0)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_READ_ENABLE      (1L<<1)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_CACHE_ENABLE     (1L<<2)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PROCESSOR_ENABLE    (1L<<3)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_DMA_ENABLE          (1L<<4)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PATCHUP_ENABLE      (1L<<5)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PAYLOAD_Q_ENABLE    (1L<<6)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE     (1L<<7)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_ASSEMBLER_ENABLE    (1L<<8)
+#define BNX2_MISC_ENABLE_SET_BITS_EMAC_ENABLE            (1L<<9)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_CATCHUP_ENABLE       (1L<<11)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE         (1L<<12)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_LOOKUP_ENABLE       (1L<<13)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PROCESSOR_ENABLE    (1L<<14)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_V2P_ENABLE          (1L<<15)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_BD_CACHE_ENABLE     (1L<<16)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_DMA_ENABLE          (1L<<17)
+#define BNX2_MISC_ENABLE_SET_BITS_COMPLETION_ENABLE      (1L<<18)
+#define BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE   (1L<<19)
+#define BNX2_MISC_ENABLE_SET_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
+#define BNX2_MISC_ENABLE_SET_BITS_CONTEXT_ENABLE         (1L<<21)
+#define BNX2_MISC_ENABLE_SET_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
+#define BNX2_MISC_ENABLE_SET_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
+#define BNX2_MISC_ENABLE_SET_BITS_MGMT_PROCESSOR_ENABLE  (1L<<24)
+#define BNX2_MISC_ENABLE_SET_BITS_TIMER_ENABLE           (1L<<25)
+#define BNX2_MISC_ENABLE_SET_BITS_DMA_ENGINE_ENABLE      (1L<<26)
+#define BNX2_MISC_ENABLE_SET_BITS_UMP_ENABLE             (1L<<27)
+
+#define BNX2_MISC_ENABLE_CLR_BITS                       0x00000814
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_SCHEDULER_ENABLE    (1L<<0)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_READ_ENABLE      (1L<<1)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_CACHE_ENABLE     (1L<<2)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PROCESSOR_ENABLE    (1L<<3)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE          (1L<<4)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PATCHUP_ENABLE      (1L<<5)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PAYLOAD_Q_ENABLE    (1L<<6)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_HEADER_Q_ENABLE     (1L<<7)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_ASSEMBLER_ENABLE    (1L<<8)
+#define BNX2_MISC_ENABLE_CLR_BITS_EMAC_ENABLE            (1L<<9)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_MAC_ENABLE   (1L<<10)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_CATCHUP_ENABLE       (1L<<11)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_MBUF_ENABLE         (1L<<12)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_LOOKUP_ENABLE       (1L<<13)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PROCESSOR_ENABLE    (1L<<14)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_V2P_ENABLE          (1L<<15)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_BD_CACHE_ENABLE     (1L<<16)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE          (1L<<17)
+#define BNX2_MISC_ENABLE_CLR_BITS_COMPLETION_ENABLE      (1L<<18)
+#define BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE   (1L<<19)
+#define BNX2_MISC_ENABLE_CLR_BITS_MAILBOX_QUEUE_ENABLE   (1L<<20)
+#define BNX2_MISC_ENABLE_CLR_BITS_CONTEXT_ENABLE         (1L<<21)
+#define BNX2_MISC_ENABLE_CLR_BITS_CMD_SCHEDULER_ENABLE   (1L<<22)
+#define BNX2_MISC_ENABLE_CLR_BITS_CMD_PROCESSOR_ENABLE   (1L<<23)
+#define BNX2_MISC_ENABLE_CLR_BITS_MGMT_PROCESSOR_ENABLE  (1L<<24)
+#define BNX2_MISC_ENABLE_CLR_BITS_TIMER_ENABLE           (1L<<25)
+#define BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE      (1L<<26)
+#define BNX2_MISC_ENABLE_CLR_BITS_UMP_ENABLE             (1L<<27)
+
+#define BNX2_MISC_CLOCK_CONTROL_BITS                    0x00000818
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET     (0xfL<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ       (0L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ       (1L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ       (2L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ       (3L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ       (4L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ       (5L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ       (6L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ      (7L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW         (0xfL<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE    (1L<<6)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT        (1L<<7)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC    (0x7L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF      (0L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12         (1L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6  (2L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62         (4L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PLAY_DEAD           (1L<<11)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED  (0xfL<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100      (0L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80       (1L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50       (2L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40       (4L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25       (8L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP   (1L<<16)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_PLL_STOP        (1L<<17)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_18         (1L<<18)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_USE_SPD_DET         (1L<<19)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED            (0xfffL<<20)
+
+#define BNX2_MISC_GPIO                                  0x0000081c
+#define BNX2_MISC_GPIO_VALUE                             (0xffL<<0)
+#define BNX2_MISC_GPIO_SET                               (0xffL<<8)
+#define BNX2_MISC_GPIO_CLR                               (0xffL<<16)
+#define BNX2_MISC_GPIO_FLOAT                             (0xffL<<24)
+
+#define BNX2_MISC_GPIO_INT                              0x00000820
+#define BNX2_MISC_GPIO_INT_INT_STATE                     (0xfL<<0)
+#define BNX2_MISC_GPIO_INT_OLD_VALUE                     (0xfL<<8)
+#define BNX2_MISC_GPIO_INT_OLD_SET                       (0xfL<<16)
+#define BNX2_MISC_GPIO_INT_OLD_CLR                       (0xfL<<24)
+
+#define BNX2_MISC_CONFIG_LFSR                           0x00000824
+#define BNX2_MISC_CONFIG_LFSR_DIV                        (0xffffL<<0)
+
+#define BNX2_MISC_LFSR_MASK_BITS                        0x00000828
+#define BNX2_MISC_LFSR_MASK_BITS_TX_SCHEDULER_ENABLE     (1L<<0)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_READ_ENABLE       (1L<<1)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_CACHE_ENABLE      (1L<<2)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PROCESSOR_ENABLE     (1L<<3)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_DMA_ENABLE           (1L<<4)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PATCHUP_ENABLE       (1L<<5)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PAYLOAD_Q_ENABLE     (1L<<6)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_HEADER_Q_ENABLE      (1L<<7)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_ASSEMBLER_ENABLE     (1L<<8)
+#define BNX2_MISC_LFSR_MASK_BITS_EMAC_ENABLE             (1L<<9)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_MAC_ENABLE    (1L<<10)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_CATCHUP_ENABLE        (1L<<11)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_MBUF_ENABLE          (1L<<12)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_LOOKUP_ENABLE        (1L<<13)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PROCESSOR_ENABLE     (1L<<14)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_V2P_ENABLE           (1L<<15)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_BD_CACHE_ENABLE      (1L<<16)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_DMA_ENABLE           (1L<<17)
+#define BNX2_MISC_LFSR_MASK_BITS_COMPLETION_ENABLE       (1L<<18)
+#define BNX2_MISC_LFSR_MASK_BITS_HOST_COALESCE_ENABLE    (1L<<19)
+#define BNX2_MISC_LFSR_MASK_BITS_MAILBOX_QUEUE_ENABLE    (1L<<20)
+#define BNX2_MISC_LFSR_MASK_BITS_CONTEXT_ENABLE          (1L<<21)
+#define BNX2_MISC_LFSR_MASK_BITS_CMD_SCHEDULER_ENABLE    (1L<<22)
+#define BNX2_MISC_LFSR_MASK_BITS_CMD_PROCESSOR_ENABLE    (1L<<23)
+#define BNX2_MISC_LFSR_MASK_BITS_MGMT_PROCESSOR_ENABLE   (1L<<24)
+#define BNX2_MISC_LFSR_MASK_BITS_TIMER_ENABLE            (1L<<25)
+#define BNX2_MISC_LFSR_MASK_BITS_DMA_ENGINE_ENABLE       (1L<<26)
+#define BNX2_MISC_LFSR_MASK_BITS_UMP_ENABLE              (1L<<27)
+
+#define BNX2_MISC_ARB_REQ0                              0x0000082c
+#define BNX2_MISC_ARB_REQ1                              0x00000830
+#define BNX2_MISC_ARB_REQ2                              0x00000834
+#define BNX2_MISC_ARB_REQ3                              0x00000838
+#define BNX2_MISC_ARB_REQ4                              0x0000083c
+#define BNX2_MISC_ARB_FREE0                             0x00000840
+#define BNX2_MISC_ARB_FREE1                             0x00000844
+#define BNX2_MISC_ARB_FREE2                             0x00000848
+#define BNX2_MISC_ARB_FREE3                             0x0000084c
+#define BNX2_MISC_ARB_FREE4                             0x00000850
+#define BNX2_MISC_ARB_REQ_STATUS0                       0x00000854
+#define BNX2_MISC_ARB_REQ_STATUS1                       0x00000858
+#define BNX2_MISC_ARB_REQ_STATUS2                       0x0000085c
+#define BNX2_MISC_ARB_REQ_STATUS3                       0x00000860
+#define BNX2_MISC_ARB_REQ_STATUS4                       0x00000864
+#define BNX2_MISC_ARB_GNT0                              0x00000868
+#define BNX2_MISC_ARB_GNT0_0                             (0x7L<<0)
+#define BNX2_MISC_ARB_GNT0_1                             (0x7L<<4)
+#define BNX2_MISC_ARB_GNT0_2                             (0x7L<<8)
+#define BNX2_MISC_ARB_GNT0_3                             (0x7L<<12)
+#define BNX2_MISC_ARB_GNT0_4                             (0x7L<<16)
+#define BNX2_MISC_ARB_GNT0_5                             (0x7L<<20)
+#define BNX2_MISC_ARB_GNT0_6                             (0x7L<<24)
+#define BNX2_MISC_ARB_GNT0_7                             (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT1                              0x0000086c
+#define BNX2_MISC_ARB_GNT1_8                             (0x7L<<0)
+#define BNX2_MISC_ARB_GNT1_9                             (0x7L<<4)
+#define BNX2_MISC_ARB_GNT1_10                            (0x7L<<8)
+#define BNX2_MISC_ARB_GNT1_11                            (0x7L<<12)
+#define BNX2_MISC_ARB_GNT1_12                            (0x7L<<16)
+#define BNX2_MISC_ARB_GNT1_13                            (0x7L<<20)
+#define BNX2_MISC_ARB_GNT1_14                            (0x7L<<24)
+#define BNX2_MISC_ARB_GNT1_15                            (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT2                              0x00000870
+#define BNX2_MISC_ARB_GNT2_16                            (0x7L<<0)
+#define BNX2_MISC_ARB_GNT2_17                            (0x7L<<4)
+#define BNX2_MISC_ARB_GNT2_18                            (0x7L<<8)
+#define BNX2_MISC_ARB_GNT2_19                            (0x7L<<12)
+#define BNX2_MISC_ARB_GNT2_20                            (0x7L<<16)
+#define BNX2_MISC_ARB_GNT2_21                            (0x7L<<20)
+#define BNX2_MISC_ARB_GNT2_22                            (0x7L<<24)
+#define BNX2_MISC_ARB_GNT2_23                            (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT3                              0x00000874
+#define BNX2_MISC_ARB_GNT3_24                            (0x7L<<0)
+#define BNX2_MISC_ARB_GNT3_25                            (0x7L<<4)
+#define BNX2_MISC_ARB_GNT3_26                            (0x7L<<8)
+#define BNX2_MISC_ARB_GNT3_27                            (0x7L<<12)
+#define BNX2_MISC_ARB_GNT3_28                            (0x7L<<16)
+#define BNX2_MISC_ARB_GNT3_29                            (0x7L<<20)
+#define BNX2_MISC_ARB_GNT3_30                            (0x7L<<24)
+#define BNX2_MISC_ARB_GNT3_31                            (0x7L<<28)
+
+#define BNX2_MISC_PRBS_CONTROL                          0x00000878
+#define BNX2_MISC_PRBS_CONTROL_EN                        (1L<<0)
+#define BNX2_MISC_PRBS_CONTROL_RSTB                      (1L<<1)
+#define BNX2_MISC_PRBS_CONTROL_INV                       (1L<<2)
+#define BNX2_MISC_PRBS_CONTROL_ERR_CLR                   (1L<<3)
+#define BNX2_MISC_PRBS_CONTROL_ORDER                     (0x3L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_7TH                 (0L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_15TH                (1L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_23RD                (2L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_31ST                (3L<<4)
+
+#define BNX2_MISC_PRBS_STATUS                           0x0000087c
+#define BNX2_MISC_PRBS_STATUS_LOCK                       (1L<<0)
+#define BNX2_MISC_PRBS_STATUS_STKY                       (1L<<1)
+#define BNX2_MISC_PRBS_STATUS_ERRORS                     (0x3fffL<<2)
+#define BNX2_MISC_PRBS_STATUS_STATE                      (0xfL<<16)
+
+#define BNX2_MISC_SM_ASF_CONTROL                        0x00000880
+#define BNX2_MISC_SM_ASF_CONTROL_ASF_RST                 (1L<<0)
+#define BNX2_MISC_SM_ASF_CONTROL_TSC_EN                  (1L<<1)
+#define BNX2_MISC_SM_ASF_CONTROL_WG_TO                   (1L<<2)
+#define BNX2_MISC_SM_ASF_CONTROL_HB_TO                   (1L<<3)
+#define BNX2_MISC_SM_ASF_CONTROL_PA_TO                   (1L<<4)
+#define BNX2_MISC_SM_ASF_CONTROL_PL_TO                   (1L<<5)
+#define BNX2_MISC_SM_ASF_CONTROL_RT_TO                   (1L<<6)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EVENT               (1L<<7)
+#define BNX2_MISC_SM_ASF_CONTROL_RES                     (0xfL<<8)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EN                  (1L<<12)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_BB_EN               (1L<<13)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_NO_ADDR_FILT        (1L<<14)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_AUTOREAD            (1L<<15)
+#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR1           (0x3fL<<16)
+#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR2           (0x3fL<<24)
+#define BNX2_MISC_SM_ASF_CONTROL_EN_NIC_SMB_ADDR_0       (1L<<30)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EARLY_ATTN          (1L<<31)
+
+#define BNX2_MISC_SMB_IN                                0x00000884
+#define BNX2_MISC_SMB_IN_DAT_IN                          (0xffL<<0)
+#define BNX2_MISC_SMB_IN_RDY                             (1L<<8)
+#define BNX2_MISC_SMB_IN_DONE                            (1L<<9)
+#define BNX2_MISC_SMB_IN_FIRSTBYTE                       (1L<<10)
+#define BNX2_MISC_SMB_IN_STATUS                          (0x7L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_OK                       (0x0L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_PEC                      (0x1L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_OFLOW                    (0x2L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_STOP                     (0x3L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_TIMEOUT                  (0x4L<<11)
+
+#define BNX2_MISC_SMB_OUT                               0x00000888
+#define BNX2_MISC_SMB_OUT_DAT_OUT                        (0xffL<<0)
+#define BNX2_MISC_SMB_OUT_RDY                            (1L<<8)
+#define BNX2_MISC_SMB_OUT_START                          (1L<<9)
+#define BNX2_MISC_SMB_OUT_LAST                           (1L<<10)
+#define BNX2_MISC_SMB_OUT_ACC_TYPE                       (1L<<11)
+#define BNX2_MISC_SMB_OUT_ENB_PEC                        (1L<<12)
+#define BNX2_MISC_SMB_OUT_GET_RX_LEN                     (1L<<13)
+#define BNX2_MISC_SMB_OUT_SMB_READ_LEN                   (0x3fL<<14)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS                 (0xfL<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_OK              (0L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_NACK      (1L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_NACK        (9L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_UFLOW           (2L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_STOP            (3L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_TIMEOUT         (4L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_LOST      (5L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_LOST        (0xdL<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_BADACK          (0x6L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEMODE              (1L<<24)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EN                 (1L<<25)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IN                 (1L<<26)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EN                 (1L<<27)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IN                 (1L<<28)
+
+#define BNX2_MISC_SMB_WATCHDOG                          0x0000088c
+#define BNX2_MISC_SMB_WATCHDOG_WATCHDOG                  (0xffffL<<0)
+
+#define BNX2_MISC_SMB_HEARTBEAT                         0x00000890
+#define BNX2_MISC_SMB_HEARTBEAT_HEARTBEAT                (0xffffL<<0)
+
+#define BNX2_MISC_SMB_POLL_ASF                          0x00000894
+#define BNX2_MISC_SMB_POLL_ASF_POLL_ASF                  (0xffffL<<0)
+
+#define BNX2_MISC_SMB_POLL_LEGACY                       0x00000898
+#define BNX2_MISC_SMB_POLL_LEGACY_POLL_LEGACY            (0xffffL<<0)
+
+#define BNX2_MISC_SMB_RETRAN                            0x0000089c
+#define BNX2_MISC_SMB_RETRAN_RETRAN                      (0xffL<<0)
+
+#define BNX2_MISC_SMB_TIMESTAMP                         0x000008a0
+#define BNX2_MISC_SMB_TIMESTAMP_TIMESTAMP                (0xffffffffL<<0)
+
+#define BNX2_MISC_PERR_ENA0                             0x000008a4
+#define BNX2_MISC_PERR_ENA0_COM_MISC_CTXC                (1L<<0)
+#define BNX2_MISC_PERR_ENA0_COM_MISC_REGF                (1L<<1)
+#define BNX2_MISC_PERR_ENA0_COM_MISC_SCPAD               (1L<<2)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_CTXC                 (1L<<3)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_REGF                 (1L<<4)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_SCPAD                (1L<<5)
+#define BNX2_MISC_PERR_ENA0_CS_MISC_TMEM                 (1L<<6)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM0               (1L<<7)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM1               (1L<<8)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM2               (1L<<9)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM3               (1L<<10)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM4               (1L<<11)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM5               (1L<<12)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_PGTBL               (1L<<13)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR0                (1L<<14)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR1                (1L<<15)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR2                (1L<<16)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR3                (1L<<17)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR4                (1L<<18)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW0                (1L<<19)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW1                (1L<<20)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW2                (1L<<21)
+#define BNX2_MISC_PERR_ENA0_HC_MISC_DMA                  (1L<<22)
+#define BNX2_MISC_PERR_ENA0_MCP_MISC_REGF                (1L<<23)
+#define BNX2_MISC_PERR_ENA0_MCP_MISC_SCPAD               (1L<<24)
+#define BNX2_MISC_PERR_ENA0_MQ_MISC_CTX                  (1L<<25)
+#define BNX2_MISC_PERR_ENA0_RBDC_MISC                    (1L<<26)
+#define BNX2_MISC_PERR_ENA0_RBUF_MISC_MB                 (1L<<27)
+#define BNX2_MISC_PERR_ENA0_RBUF_MISC_PTR                (1L<<28)
+#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPC                 (1L<<29)
+#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPM                 (1L<<30)
+#define BNX2_MISC_PERR_ENA0_RV2P_MISC_CB0REGS            (1L<<31)
+
+#define BNX2_MISC_PERR_ENA1                             0x000008a8
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_CB1REGS            (1L<<0)
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P1IRAM             (1L<<1)
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P2IRAM             (1L<<2)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_CTXC                (1L<<3)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_REGF                (1L<<4)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_SCPAD               (1L<<5)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_RBUFC               (1L<<6)
+#define BNX2_MISC_PERR_ENA1_TBDC_MISC                    (1L<<7)
+#define BNX2_MISC_PERR_ENA1_TDMA_MISC                    (1L<<8)
+#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB0               (1L<<9)
+#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB1               (1L<<10)
+#define BNX2_MISC_PERR_ENA1_TPAT_MISC_REGF               (1L<<11)
+#define BNX2_MISC_PERR_ENA1_TPAT_MISC_SCPAD              (1L<<12)
+#define BNX2_MISC_PERR_ENA1_TPBUF_MISC_MB                (1L<<13)
+#define BNX2_MISC_PERR_ENA1_TSCH_MISC_LR                 (1L<<14)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_CTXC                (1L<<15)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_REGF                (1L<<16)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_SCPAD               (1L<<17)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIORX               (1L<<18)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIOTX               (1L<<19)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_RX                  (1L<<20)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_TX                  (1L<<21)
+#define BNX2_MISC_PERR_ENA1_RDMAQ_MISC                   (1L<<22)
+#define BNX2_MISC_PERR_ENA1_CSQ_MISC                     (1L<<23)
+#define BNX2_MISC_PERR_ENA1_CPQ_MISC                     (1L<<24)
+#define BNX2_MISC_PERR_ENA1_MCPQ_MISC                    (1L<<25)
+#define BNX2_MISC_PERR_ENA1_RV2PMQ_MISC                  (1L<<26)
+#define BNX2_MISC_PERR_ENA1_RV2PPQ_MISC                  (1L<<27)
+#define BNX2_MISC_PERR_ENA1_RV2PTQ_MISC                  (1L<<28)
+#define BNX2_MISC_PERR_ENA1_RXPQ_MISC                    (1L<<29)
+#define BNX2_MISC_PERR_ENA1_RXPCQ_MISC                   (1L<<30)
+#define BNX2_MISC_PERR_ENA1_RLUPQ_MISC                   (1L<<31)
+
+#define BNX2_MISC_PERR_ENA2                             0x000008ac
+#define BNX2_MISC_PERR_ENA2_COMQ_MISC                    (1L<<0)
+#define BNX2_MISC_PERR_ENA2_COMXQ_MISC                   (1L<<1)
+#define BNX2_MISC_PERR_ENA2_COMTQ_MISC                   (1L<<2)
+#define BNX2_MISC_PERR_ENA2_TSCHQ_MISC                   (1L<<3)
+#define BNX2_MISC_PERR_ENA2_TBDRQ_MISC                   (1L<<4)
+#define BNX2_MISC_PERR_ENA2_TXPQ_MISC                    (1L<<5)
+#define BNX2_MISC_PERR_ENA2_TDMAQ_MISC                   (1L<<6)
+#define BNX2_MISC_PERR_ENA2_TPATQ_MISC                   (1L<<7)
+#define BNX2_MISC_PERR_ENA2_TASQ_MISC                    (1L<<8)
+
+#define BNX2_MISC_DEBUG_VECTOR_SEL                      0x000008b0
+#define BNX2_MISC_DEBUG_VECTOR_SEL_0                     (0xfffL<<0)
+#define BNX2_MISC_DEBUG_VECTOR_SEL_1                     (0xfffL<<12)
+
+#define BNX2_MISC_VREG_CONTROL                          0x000008b4
+#define BNX2_MISC_VREG_CONTROL_1_2                       (0xfL<<0)
+#define BNX2_MISC_VREG_CONTROL_2_5                       (0xfL<<4)
+
+#define BNX2_MISC_FINAL_CLK_CTL_VAL                     0x000008b8
+#define BNX2_MISC_FINAL_CLK_CTL_VAL_MISC_FINAL_CLK_CTL_VAL       (0x3ffffffL<<6)
+
+#define BNX2_MISC_UNUSED0                               0x000008bc
+
+
+/*
+ *  nvm_reg definition
+ *  offset: 0x6400
+ */
+#define BNX2_NVM_COMMAND                                0x00006400
+#define BNX2_NVM_COMMAND_RST                             (1L<<0)
+#define BNX2_NVM_COMMAND_DONE                            (1L<<3)
+#define BNX2_NVM_COMMAND_DOIT                            (1L<<4)
+#define BNX2_NVM_COMMAND_WR                              (1L<<5)
+#define BNX2_NVM_COMMAND_ERASE                           (1L<<6)
+#define BNX2_NVM_COMMAND_FIRST                           (1L<<7)
+#define BNX2_NVM_COMMAND_LAST                            (1L<<8)
+#define BNX2_NVM_COMMAND_WREN                            (1L<<16)
+#define BNX2_NVM_COMMAND_WRDI                            (1L<<17)
+#define BNX2_NVM_COMMAND_EWSR                            (1L<<18)
+#define BNX2_NVM_COMMAND_WRSR                            (1L<<19)
+
+#define BNX2_NVM_STATUS                                 0x00006404
+#define BNX2_NVM_STATUS_PI_FSM_STATE                     (0xfL<<0)
+#define BNX2_NVM_STATUS_EE_FSM_STATE                     (0xfL<<4)
+#define BNX2_NVM_STATUS_EQ_FSM_STATE                     (0xfL<<8)
+
+#define BNX2_NVM_WRITE                                  0x00006408
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE                   (0xffffffffL<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG          (0L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EECLK             (1L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EEDATA            (2L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK              (4L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B              (8L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO                (16L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI                (32L<<0)
+
+#define BNX2_NVM_ADDR                                   0x0000640c
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE                     (0xffffffL<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG            (0L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EECLK               (1L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEDATA              (2L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK                (4L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B                (8L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO                  (16L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI                  (32L<<0)
+
+#define BNX2_NVM_READ                                   0x00006410
+#define BNX2_NVM_READ_NVM_READ_VALUE                     (0xffffffffL<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_BIT_BANG            (0L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_EECLK               (1L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_EEDATA              (2L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK                (4L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B                (8L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SO                  (16L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SI                  (32L<<0)
+
+#define BNX2_NVM_CFG1                                   0x00006414
+#define BNX2_NVM_CFG1_FLASH_MODE                         (1L<<0)
+#define BNX2_NVM_CFG1_BUFFER_MODE                        (1L<<1)
+#define BNX2_NVM_CFG1_PASS_MODE                          (1L<<2)
+#define BNX2_NVM_CFG1_BITBANG_MODE                       (1L<<3)
+#define BNX2_NVM_CFG1_STATUS_BIT                         (0x7L<<4)
+#define BNX2_NVM_CFG1_STATUS_BIT_FLASH_RDY               (0L<<4)
+#define BNX2_NVM_CFG1_STATUS_BIT_BUFFER_RDY              (7L<<4)
+#define BNX2_NVM_CFG1_SPI_CLK_DIV                        (0xfL<<7)
+#define BNX2_NVM_CFG1_SEE_CLK_DIV                        (0x7ffL<<11)
+#define BNX2_NVM_CFG1_PROTECT_MODE                       (1L<<24)
+#define BNX2_NVM_CFG1_FLASH_SIZE                         (1L<<25)
+#define BNX2_NVM_CFG1_COMPAT_BYPASSS                     (1L<<31)
+
+#define BNX2_NVM_CFG2                                   0x00006418
+#define BNX2_NVM_CFG2_ERASE_CMD                          (0xffL<<0)
+#define BNX2_NVM_CFG2_DUMMY                              (0xffL<<8)
+#define BNX2_NVM_CFG2_STATUS_CMD                         (0xffL<<16)
+
+#define BNX2_NVM_CFG3                                   0x0000641c
+#define BNX2_NVM_CFG3_BUFFER_RD_CMD                      (0xffL<<0)
+#define BNX2_NVM_CFG3_WRITE_CMD                          (0xffL<<8)
+#define BNX2_NVM_CFG3_BUFFER_WRITE_CMD                   (0xffL<<16)
+#define BNX2_NVM_CFG3_READ_CMD                           (0xffL<<24)
+
+#define BNX2_NVM_SW_ARB                                 0x00006420
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET0                     (1L<<0)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET1                     (1L<<1)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET2                     (1L<<2)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET3                     (1L<<3)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR0                     (1L<<4)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR1                     (1L<<5)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR2                     (1L<<6)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR3                     (1L<<7)
+#define BNX2_NVM_SW_ARB_ARB_ARB0                         (1L<<8)
+#define BNX2_NVM_SW_ARB_ARB_ARB1                         (1L<<9)
+#define BNX2_NVM_SW_ARB_ARB_ARB2                         (1L<<10)
+#define BNX2_NVM_SW_ARB_ARB_ARB3                         (1L<<11)
+#define BNX2_NVM_SW_ARB_REQ0                             (1L<<12)
+#define BNX2_NVM_SW_ARB_REQ1                             (1L<<13)
+#define BNX2_NVM_SW_ARB_REQ2                             (1L<<14)
+#define BNX2_NVM_SW_ARB_REQ3                             (1L<<15)
+
+#define BNX2_NVM_ACCESS_ENABLE                          0x00006424
+#define BNX2_NVM_ACCESS_ENABLE_EN                        (1L<<0)
+#define BNX2_NVM_ACCESS_ENABLE_WR_EN                     (1L<<1)
+
+#define BNX2_NVM_WRITE1                                 0x00006428
+#define BNX2_NVM_WRITE1_WREN_CMD                         (0xffL<<0)
+#define BNX2_NVM_WRITE1_WRDI_CMD                         (0xffL<<8)
+#define BNX2_NVM_WRITE1_SR_DATA                          (0xffL<<16)
+
+
+
+/*
+ *  dma_reg definition
+ *  offset: 0xc00
+ */
+#define BNX2_DMA_COMMAND                                0x00000c00
+#define BNX2_DMA_COMMAND_ENABLE                          (1L<<0)
+
+#define BNX2_DMA_STATUS                                 0x00000c04
+#define BNX2_DMA_STATUS_PAR_ERROR_STATE                  (1L<<0)
+#define BNX2_DMA_STATUS_READ_TRANSFERS_STAT              (1L<<16)
+#define BNX2_DMA_STATUS_READ_DELAY_PCI_CLKS_STAT         (1L<<17)
+#define BNX2_DMA_STATUS_BIG_READ_TRANSFERS_STAT          (1L<<18)
+#define BNX2_DMA_STATUS_BIG_READ_DELAY_PCI_CLKS_STAT     (1L<<19)
+#define BNX2_DMA_STATUS_BIG_READ_RETRY_AFTER_DATA_STAT   (1L<<20)
+#define BNX2_DMA_STATUS_WRITE_TRANSFERS_STAT             (1L<<21)
+#define BNX2_DMA_STATUS_WRITE_DELAY_PCI_CLKS_STAT        (1L<<22)
+#define BNX2_DMA_STATUS_BIG_WRITE_TRANSFERS_STAT         (1L<<23)
+#define BNX2_DMA_STATUS_BIG_WRITE_DELAY_PCI_CLKS_STAT    (1L<<24)
+#define BNX2_DMA_STATUS_BIG_WRITE_RETRY_AFTER_DATA_STAT  (1L<<25)
+
+#define BNX2_DMA_CONFIG                                 0x00000c08
+#define BNX2_DMA_CONFIG_DATA_BYTE_SWAP                   (1L<<0)
+#define BNX2_DMA_CONFIG_DATA_WORD_SWAP                   (1L<<1)
+#define BNX2_DMA_CONFIG_CNTL_BYTE_SWAP                   (1L<<4)
+#define BNX2_DMA_CONFIG_CNTL_WORD_SWAP                   (1L<<5)
+#define BNX2_DMA_CONFIG_ONE_DMA                          (1L<<6)
+#define BNX2_DMA_CONFIG_CNTL_TWO_DMA                     (1L<<7)
+#define BNX2_DMA_CONFIG_CNTL_FPGA_MODE                   (1L<<8)
+#define BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA               (1L<<10)
+#define BNX2_DMA_CONFIG_CNTL_PCI_COMP_DLY                (1L<<11)
+#define BNX2_DMA_CONFIG_NO_RCHANS_IN_USE                 (0xfL<<12)
+#define BNX2_DMA_CONFIG_NO_WCHANS_IN_USE                 (0xfL<<16)
+#define BNX2_DMA_CONFIG_PCI_CLK_CMP_BITS                 (0x7L<<20)
+#define BNX2_DMA_CONFIG_PCI_FAST_CLK_CMP                 (1L<<23)
+#define BNX2_DMA_CONFIG_BIG_SIZE                         (0xfL<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_NONE                    (0x0L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_64                      (0x1L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_128                     (0x2L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_256                     (0x4L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_512                     (0x8L<<24)
+
+#define BNX2_DMA_BLACKOUT                               0x00000c0c
+#define BNX2_DMA_BLACKOUT_RD_RETRY_BLACKOUT              (0xffL<<0)
+#define BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BLACKOUT          (0xffL<<8)
+#define BNX2_DMA_BLACKOUT_WR_RETRY_BLACKOUT              (0xffL<<16)
+
+#define BNX2_DMA_RCHAN_STAT                             0x00000c30
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_0                  (0x7L<<0)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_0                    (1L<<3)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_1                  (0x7L<<4)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_1                    (1L<<7)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_2                  (0x7L<<8)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_2                    (1L<<11)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_3                  (0x7L<<12)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_3                    (1L<<15)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_4                  (0x7L<<16)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_4                    (1L<<19)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_5                  (0x7L<<20)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_5                    (1L<<23)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_6                  (0x7L<<24)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_6                    (1L<<27)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_7                  (0x7L<<28)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_7                    (1L<<31)
+
+#define BNX2_DMA_WCHAN_STAT                             0x00000c34
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_0                  (0x7L<<0)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_0                    (1L<<3)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_1                  (0x7L<<4)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_1                    (1L<<7)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_2                  (0x7L<<8)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_2                    (1L<<11)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_3                  (0x7L<<12)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_3                    (1L<<15)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_4                  (0x7L<<16)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_4                    (1L<<19)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_5                  (0x7L<<20)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_5                    (1L<<23)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_6                  (0x7L<<24)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_6                    (1L<<27)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_7                  (0x7L<<28)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_7                    (1L<<31)
+
+#define BNX2_DMA_RCHAN_ASSIGNMENT                       0x00000c38
+#define BNX2_DMA_RCHAN_ASSIGNMENT_0                      (0xfL<<0)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_1                      (0xfL<<4)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_2                      (0xfL<<8)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_3                      (0xfL<<12)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_4                      (0xfL<<16)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_5                      (0xfL<<20)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_6                      (0xfL<<24)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_7                      (0xfL<<28)
+
+#define BNX2_DMA_WCHAN_ASSIGNMENT                       0x00000c3c
+#define BNX2_DMA_WCHAN_ASSIGNMENT_0                      (0xfL<<0)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_1                      (0xfL<<4)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_2                      (0xfL<<8)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_3                      (0xfL<<12)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_4                      (0xfL<<16)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_5                      (0xfL<<20)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_6                      (0xfL<<24)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_7                      (0xfL<<28)
+
+#define BNX2_DMA_RCHAN_STAT_00                          0x00000c40
+#define BNX2_DMA_RCHAN_STAT_00_RCHAN_STA_HOST_ADDR_LOW   (0xffffffffL<<0)
+
+#define BNX2_DMA_RCHAN_STAT_01                          0x00000c44
+#define BNX2_DMA_RCHAN_STAT_01_RCHAN_STA_HOST_ADDR_HIGH  (0xffffffffL<<0)
+
+#define BNX2_DMA_RCHAN_STAT_02                          0x00000c48
+#define BNX2_DMA_RCHAN_STAT_02_LENGTH                    (0xffffL<<0)
+#define BNX2_DMA_RCHAN_STAT_02_WORD_SWAP                 (1L<<16)
+#define BNX2_DMA_RCHAN_STAT_02_BYTE_SWAP                 (1L<<17)
+#define BNX2_DMA_RCHAN_STAT_02_PRIORITY_LVL              (1L<<18)
+
+#define BNX2_DMA_RCHAN_STAT_10                          0x00000c4c
+#define BNX2_DMA_RCHAN_STAT_11                          0x00000c50
+#define BNX2_DMA_RCHAN_STAT_12                          0x00000c54
+#define BNX2_DMA_RCHAN_STAT_20                          0x00000c58
+#define BNX2_DMA_RCHAN_STAT_21                          0x00000c5c
+#define BNX2_DMA_RCHAN_STAT_22                          0x00000c60
+#define BNX2_DMA_RCHAN_STAT_30                          0x00000c64
+#define BNX2_DMA_RCHAN_STAT_31                          0x00000c68
+#define BNX2_DMA_RCHAN_STAT_32                          0x00000c6c
+#define BNX2_DMA_RCHAN_STAT_40                          0x00000c70
+#define BNX2_DMA_RCHAN_STAT_41                          0x00000c74
+#define BNX2_DMA_RCHAN_STAT_42                          0x00000c78
+#define BNX2_DMA_RCHAN_STAT_50                          0x00000c7c
+#define BNX2_DMA_RCHAN_STAT_51                          0x00000c80
+#define BNX2_DMA_RCHAN_STAT_52                          0x00000c84
+#define BNX2_DMA_RCHAN_STAT_60                          0x00000c88
+#define BNX2_DMA_RCHAN_STAT_61                          0x00000c8c
+#define BNX2_DMA_RCHAN_STAT_62                          0x00000c90
+#define BNX2_DMA_RCHAN_STAT_70                          0x00000c94
+#define BNX2_DMA_RCHAN_STAT_71                          0x00000c98
+#define BNX2_DMA_RCHAN_STAT_72                          0x00000c9c
+#define BNX2_DMA_WCHAN_STAT_00                          0x00000ca0
+#define BNX2_DMA_WCHAN_STAT_00_WCHAN_STA_HOST_ADDR_LOW   (0xffffffffL<<0)
+
+#define BNX2_DMA_WCHAN_STAT_01                          0x00000ca4
+#define BNX2_DMA_WCHAN_STAT_01_WCHAN_STA_HOST_ADDR_HIGH  (0xffffffffL<<0)
+
+#define BNX2_DMA_WCHAN_STAT_02                          0x00000ca8
+#define BNX2_DMA_WCHAN_STAT_02_LENGTH                    (0xffffL<<0)
+#define BNX2_DMA_WCHAN_STAT_02_WORD_SWAP                 (1L<<16)
+#define BNX2_DMA_WCHAN_STAT_02_BYTE_SWAP                 (1L<<17)
+#define BNX2_DMA_WCHAN_STAT_02_PRIORITY_LVL              (1L<<18)
+
+#define BNX2_DMA_WCHAN_STAT_10                          0x00000cac
+#define BNX2_DMA_WCHAN_STAT_11                          0x00000cb0
+#define BNX2_DMA_WCHAN_STAT_12                          0x00000cb4
+#define BNX2_DMA_WCHAN_STAT_20                          0x00000cb8
+#define BNX2_DMA_WCHAN_STAT_21                          0x00000cbc
+#define BNX2_DMA_WCHAN_STAT_22                          0x00000cc0
+#define BNX2_DMA_WCHAN_STAT_30                          0x00000cc4
+#define BNX2_DMA_WCHAN_STAT_31                          0x00000cc8
+#define BNX2_DMA_WCHAN_STAT_32                          0x00000ccc
+#define BNX2_DMA_WCHAN_STAT_40                          0x00000cd0
+#define BNX2_DMA_WCHAN_STAT_41                          0x00000cd4
+#define BNX2_DMA_WCHAN_STAT_42                          0x00000cd8
+#define BNX2_DMA_WCHAN_STAT_50                          0x00000cdc
+#define BNX2_DMA_WCHAN_STAT_51                          0x00000ce0
+#define BNX2_DMA_WCHAN_STAT_52                          0x00000ce4
+#define BNX2_DMA_WCHAN_STAT_60                          0x00000ce8
+#define BNX2_DMA_WCHAN_STAT_61                          0x00000cec
+#define BNX2_DMA_WCHAN_STAT_62                          0x00000cf0
+#define BNX2_DMA_WCHAN_STAT_70                          0x00000cf4
+#define BNX2_DMA_WCHAN_STAT_71                          0x00000cf8
+#define BNX2_DMA_WCHAN_STAT_72                          0x00000cfc
+#define BNX2_DMA_ARB_STAT_00                            0x00000d00
+#define BNX2_DMA_ARB_STAT_00_MASTER                      (0xffffL<<0)
+#define BNX2_DMA_ARB_STAT_00_MASTER_ENC                  (0xffL<<16)
+#define BNX2_DMA_ARB_STAT_00_CUR_BINMSTR                 (0xffL<<24)
+
+#define BNX2_DMA_ARB_STAT_01                            0x00000d04
+#define BNX2_DMA_ARB_STAT_01_LPR_RPTR                    (0xfL<<0)
+#define BNX2_DMA_ARB_STAT_01_LPR_WPTR                    (0xfL<<4)
+#define BNX2_DMA_ARB_STAT_01_LPB_RPTR                    (0xfL<<8)
+#define BNX2_DMA_ARB_STAT_01_LPB_WPTR                    (0xfL<<12)
+#define BNX2_DMA_ARB_STAT_01_HPR_RPTR                    (0xfL<<16)
+#define BNX2_DMA_ARB_STAT_01_HPR_WPTR                    (0xfL<<20)
+#define BNX2_DMA_ARB_STAT_01_HPB_RPTR                    (0xfL<<24)
+#define BNX2_DMA_ARB_STAT_01_HPB_WPTR                    (0xfL<<28)
+
+#define BNX2_DMA_FUSE_CTRL0_CMD                         0x00000f00
+#define BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DONE               (1L<<0)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DONE               (1L<<1)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT                    (1L<<2)
+#define BNX2_DMA_FUSE_CTRL0_CMD_LOAD                     (1L<<3)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SEL                      (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL0_DATA                        0x00000f04
+#define BNX2_DMA_FUSE_CTRL1_CMD                         0x00000f08
+#define BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DONE               (1L<<0)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DONE               (1L<<1)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT                    (1L<<2)
+#define BNX2_DMA_FUSE_CTRL1_CMD_LOAD                     (1L<<3)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SEL                      (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL1_DATA                        0x00000f0c
+#define BNX2_DMA_FUSE_CTRL2_CMD                         0x00000f10
+#define BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DONE               (1L<<0)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DONE               (1L<<1)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT                    (1L<<2)
+#define BNX2_DMA_FUSE_CTRL2_CMD_LOAD                     (1L<<3)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SEL                      (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL2_DATA                        0x00000f14
+
+
+/*
+ *  context_reg definition
+ *  offset: 0x1000
+ */
+#define BNX2_CTX_COMMAND                                0x00001000
+#define BNX2_CTX_COMMAND_ENABLED                         (1L<<0)
+
+#define BNX2_CTX_STATUS                                 0x00001004
+#define BNX2_CTX_STATUS_LOCK_WAIT                        (1L<<0)
+#define BNX2_CTX_STATUS_READ_STAT                        (1L<<16)
+#define BNX2_CTX_STATUS_WRITE_STAT                       (1L<<17)
+#define BNX2_CTX_STATUS_ACC_STALL_STAT                   (1L<<18)
+#define BNX2_CTX_STATUS_LOCK_STALL_STAT                  (1L<<19)
+
+#define BNX2_CTX_VIRT_ADDR                              0x00001008
+#define BNX2_CTX_VIRT_ADDR_VIRT_ADDR                     (0x7fffL<<6)
+
+#define BNX2_CTX_PAGE_TBL                               0x0000100c
+#define BNX2_CTX_PAGE_TBL_PAGE_TBL                       (0x3fffL<<6)
+
+#define BNX2_CTX_DATA_ADR                               0x00001010
+#define BNX2_CTX_DATA_ADR_DATA_ADR                       (0x7ffffL<<2)
+
+#define BNX2_CTX_DATA                                   0x00001014
+#define BNX2_CTX_LOCK                                   0x00001018
+#define BNX2_CTX_LOCK_TYPE                               (0x7L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOID                (0x0L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COMPLETE            (0x7L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PROTOCOL            (0x1L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX                  (0x2L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIMER               (0x4L<<0)
+#define BNX2_CTX_LOCK_CID_VALUE                          (0x3fffL<<7)
+#define BNX2_CTX_LOCK_GRANTED                            (1L<<26)
+#define BNX2_CTX_LOCK_MODE                               (0x7L<<27)
+#define BNX2_CTX_LOCK_MODE_UNLOCK                        (0x0L<<27)
+#define BNX2_CTX_LOCK_MODE_IMMEDIATE                     (0x1L<<27)
+#define BNX2_CTX_LOCK_MODE_SURE                          (0x2L<<27)
+#define BNX2_CTX_LOCK_STATUS                             (1L<<30)
+#define BNX2_CTX_LOCK_REQ                                (1L<<31)
+
+#define BNX2_CTX_ACCESS_STATUS                          0x00001040
+#define BNX2_CTX_ACCESS_STATUS_MASTERENCODED             (0xfL<<0)
+#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYSM            (0x3L<<10)
+#define BNX2_CTX_ACCESS_STATUS_PAGETABLEINITSM           (0x3L<<12)
+#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYINITSM        (0x3L<<14)
+#define BNX2_CTX_ACCESS_STATUS_QUALIFIED_REQUEST         (0x7ffL<<17)
+
+#define BNX2_CTX_DBG_LOCK_STATUS                        0x00001044
+#define BNX2_CTX_DBG_LOCK_STATUS_SM                      (0x3ffL<<0)
+#define BNX2_CTX_DBG_LOCK_STATUS_MATCH                   (0x3ffL<<22)
+
+#define BNX2_CTX_CHNL_LOCK_STATUS_0                     0x00001080
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_CID                  (0x3fffL<<0)
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE                 (0x3L<<14)
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE                 (1L<<16)
+
+#define BNX2_CTX_CHNL_LOCK_STATUS_1                     0x00001084
+#define BNX2_CTX_CHNL_LOCK_STATUS_2                     0x00001088
+#define BNX2_CTX_CHNL_LOCK_STATUS_3                     0x0000108c
+#define BNX2_CTX_CHNL_LOCK_STATUS_4                     0x00001090
+#define BNX2_CTX_CHNL_LOCK_STATUS_5                     0x00001094
+#define BNX2_CTX_CHNL_LOCK_STATUS_6                     0x00001098
+#define BNX2_CTX_CHNL_LOCK_STATUS_7                     0x0000109c
+#define BNX2_CTX_CHNL_LOCK_STATUS_8                     0x000010a0
+
+
+/*
+ *  emac_reg definition
+ *  offset: 0x1400
+ */
+#define BNX2_EMAC_MODE                                  0x00001400
+#define BNX2_EMAC_MODE_RESET                             (1L<<0)
+#define BNX2_EMAC_MODE_HALF_DUPLEX                       (1L<<1)
+#define BNX2_EMAC_MODE_PORT                              (0x3L<<2)
+#define BNX2_EMAC_MODE_PORT_NONE                         (0L<<2)
+#define BNX2_EMAC_MODE_PORT_MII                          (1L<<2)
+#define BNX2_EMAC_MODE_PORT_GMII                         (2L<<2)
+#define BNX2_EMAC_MODE_PORT_UNDEF                        (3L<<2)
+#define BNX2_EMAC_MODE_MAC_LOOP                          (1L<<4)
+#define BNX2_EMAC_MODE_TAGGED_MAC_CTL                    (1L<<7)
+#define BNX2_EMAC_MODE_TX_BURST                          (1L<<8)
+#define BNX2_EMAC_MODE_MAX_DEFER_DROP_ENA                (1L<<9)
+#define BNX2_EMAC_MODE_EXT_LINK_POL                      (1L<<10)
+#define BNX2_EMAC_MODE_FORCE_LINK                        (1L<<11)
+#define BNX2_EMAC_MODE_MPKT                              (1L<<18)
+#define BNX2_EMAC_MODE_MPKT_RCVD                         (1L<<19)
+#define BNX2_EMAC_MODE_ACPI_RCVD                         (1L<<20)
+
+#define BNX2_EMAC_STATUS                                0x00001404
+#define BNX2_EMAC_STATUS_LINK                            (1L<<11)
+#define BNX2_EMAC_STATUS_LINK_CHANGE                     (1L<<12)
+#define BNX2_EMAC_STATUS_MI_COMPLETE                     (1L<<22)
+#define BNX2_EMAC_STATUS_MI_INT                          (1L<<23)
+#define BNX2_EMAC_STATUS_AP_ERROR                        (1L<<24)
+#define BNX2_EMAC_STATUS_PARITY_ERROR_STATE              (1L<<31)
+
+#define BNX2_EMAC_ATTENTION_ENA                         0x00001408
+#define BNX2_EMAC_ATTENTION_ENA_LINK                     (1L<<11)
+#define BNX2_EMAC_ATTENTION_ENA_MI_COMPLETE              (1L<<22)
+#define BNX2_EMAC_ATTENTION_ENA_MI_INT                   (1L<<23)
+#define BNX2_EMAC_ATTENTION_ENA_AP_ERROR                 (1L<<24)
+
+#define BNX2_EMAC_LED                                   0x0000140c
+#define BNX2_EMAC_LED_OVERRIDE                           (1L<<0)
+#define BNX2_EMAC_LED_1000MB_OVERRIDE                    (1L<<1)
+#define BNX2_EMAC_LED_100MB_OVERRIDE                     (1L<<2)
+#define BNX2_EMAC_LED_10MB_OVERRIDE                      (1L<<3)
+#define BNX2_EMAC_LED_TRAFFIC_OVERRIDE                   (1L<<4)
+#define BNX2_EMAC_LED_BLNK_TRAFFIC                       (1L<<5)
+#define BNX2_EMAC_LED_TRAFFIC                            (1L<<6)
+#define BNX2_EMAC_LED_1000MB                             (1L<<7)
+#define BNX2_EMAC_LED_100MB                              (1L<<8)
+#define BNX2_EMAC_LED_10MB                               (1L<<9)
+#define BNX2_EMAC_LED_TRAFFIC_STAT                       (1L<<10)
+#define BNX2_EMAC_LED_BLNK_RATE                          (0xfffL<<19)
+#define BNX2_EMAC_LED_BLNK_RATE_ENA                      (1L<<31)
+
+#define BNX2_EMAC_MAC_MATCH0                            0x00001410
+#define BNX2_EMAC_MAC_MATCH1                            0x00001414
+#define BNX2_EMAC_MAC_MATCH2                            0x00001418
+#define BNX2_EMAC_MAC_MATCH3                            0x0000141c
+#define BNX2_EMAC_MAC_MATCH4                            0x00001420
+#define BNX2_EMAC_MAC_MATCH5                            0x00001424
+#define BNX2_EMAC_MAC_MATCH6                            0x00001428
+#define BNX2_EMAC_MAC_MATCH7                            0x0000142c
+#define BNX2_EMAC_MAC_MATCH8                            0x00001430
+#define BNX2_EMAC_MAC_MATCH9                            0x00001434
+#define BNX2_EMAC_MAC_MATCH10                           0x00001438
+#define BNX2_EMAC_MAC_MATCH11                           0x0000143c
+#define BNX2_EMAC_MAC_MATCH12                           0x00001440
+#define BNX2_EMAC_MAC_MATCH13                           0x00001444
+#define BNX2_EMAC_MAC_MATCH14                           0x00001448
+#define BNX2_EMAC_MAC_MATCH15                           0x0000144c
+#define BNX2_EMAC_MAC_MATCH16                           0x00001450
+#define BNX2_EMAC_MAC_MATCH17                           0x00001454
+#define BNX2_EMAC_MAC_MATCH18                           0x00001458
+#define BNX2_EMAC_MAC_MATCH19                           0x0000145c
+#define BNX2_EMAC_MAC_MATCH20                           0x00001460
+#define BNX2_EMAC_MAC_MATCH21                           0x00001464
+#define BNX2_EMAC_MAC_MATCH22                           0x00001468
+#define BNX2_EMAC_MAC_MATCH23                           0x0000146c
+#define BNX2_EMAC_MAC_MATCH24                           0x00001470
+#define BNX2_EMAC_MAC_MATCH25                           0x00001474
+#define BNX2_EMAC_MAC_MATCH26                           0x00001478
+#define BNX2_EMAC_MAC_MATCH27                           0x0000147c
+#define BNX2_EMAC_MAC_MATCH28                           0x00001480
+#define BNX2_EMAC_MAC_MATCH29                           0x00001484
+#define BNX2_EMAC_MAC_MATCH30                           0x00001488
+#define BNX2_EMAC_MAC_MATCH31                           0x0000148c
+#define BNX2_EMAC_BACKOFF_SEED                          0x00001498
+#define BNX2_EMAC_BACKOFF_SEED_EMAC_BACKOFF_SEED         (0x3ffL<<0)
+
+#define BNX2_EMAC_RX_MTU_SIZE                           0x0000149c
+#define BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE                   (0xffffL<<0)
+#define BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA                  (1L<<31)
+
+#define BNX2_EMAC_SERDES_CNTL                           0x000014a4
+#define BNX2_EMAC_SERDES_CNTL_RXR                        (0x7L<<0)
+#define BNX2_EMAC_SERDES_CNTL_RXG                        (0x3L<<3)
+#define BNX2_EMAC_SERDES_CNTL_RXCKSEL                    (1L<<6)
+#define BNX2_EMAC_SERDES_CNTL_TXBIAS                     (0x7L<<7)
+#define BNX2_EMAC_SERDES_CNTL_BGMAX                      (1L<<10)
+#define BNX2_EMAC_SERDES_CNTL_BGMIN                      (1L<<11)
+#define BNX2_EMAC_SERDES_CNTL_TXMODE                     (1L<<12)
+#define BNX2_EMAC_SERDES_CNTL_TXEDGE                     (1L<<13)
+#define BNX2_EMAC_SERDES_CNTL_SERDES_MODE                (1L<<14)
+#define BNX2_EMAC_SERDES_CNTL_PLLTEST                    (1L<<15)
+#define BNX2_EMAC_SERDES_CNTL_CDET_EN                    (1L<<16)
+#define BNX2_EMAC_SERDES_CNTL_TBI_LBK                    (1L<<17)
+#define BNX2_EMAC_SERDES_CNTL_REMOTE_LBK                 (1L<<18)
+#define BNX2_EMAC_SERDES_CNTL_REV_PHASE                  (1L<<19)
+#define BNX2_EMAC_SERDES_CNTL_REGCTL12                   (0x3L<<20)
+#define BNX2_EMAC_SERDES_CNTL_REGCTL25                   (0x3L<<22)
+
+#define BNX2_EMAC_SERDES_STATUS                         0x000014a8
+#define BNX2_EMAC_SERDES_STATUS_RX_STAT                  (0xffL<<0)
+#define BNX2_EMAC_SERDES_STATUS_COMMA_DET                (1L<<8)
+
+#define BNX2_EMAC_MDIO_COMM                             0x000014ac
+#define BNX2_EMAC_MDIO_COMM_DATA                         (0xffffL<<0)
+#define BNX2_EMAC_MDIO_COMM_REG_ADDR                     (0x1fL<<16)
+#define BNX2_EMAC_MDIO_COMM_PHY_ADDR                     (0x1fL<<21)
+#define BNX2_EMAC_MDIO_COMM_COMMAND                      (0x3L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_0          (0L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE                (1L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_READ                 (2L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_3          (3L<<26)
+#define BNX2_EMAC_MDIO_COMM_FAIL                         (1L<<28)
+#define BNX2_EMAC_MDIO_COMM_START_BUSY                   (1L<<29)
+#define BNX2_EMAC_MDIO_COMM_DISEXT                       (1L<<30)
+
+#define BNX2_EMAC_MDIO_STATUS                           0x000014b0
+#define BNX2_EMAC_MDIO_STATUS_LINK                       (1L<<0)
+#define BNX2_EMAC_MDIO_STATUS_10MB                       (1L<<1)
+
+#define BNX2_EMAC_MDIO_MODE                             0x000014b4
+#define BNX2_EMAC_MDIO_MODE_SHORT_PREAMBLE               (1L<<1)
+#define BNX2_EMAC_MDIO_MODE_AUTO_POLL                    (1L<<4)
+#define BNX2_EMAC_MDIO_MODE_BIT_BANG                     (1L<<8)
+#define BNX2_EMAC_MDIO_MODE_MDIO                         (1L<<9)
+#define BNX2_EMAC_MDIO_MODE_MDIO_OE                      (1L<<10)
+#define BNX2_EMAC_MDIO_MODE_MDC                          (1L<<11)
+#define BNX2_EMAC_MDIO_MODE_MDINT                        (1L<<12)
+#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT                    (0x1fL<<16)
+
+#define BNX2_EMAC_MDIO_AUTO_STATUS                      0x000014b8
+#define BNX2_EMAC_MDIO_AUTO_STATUS_AUTO_ERR              (1L<<0)
+
+#define BNX2_EMAC_TX_MODE                               0x000014bc
+#define BNX2_EMAC_TX_MODE_RESET                          (1L<<0)
+#define BNX2_EMAC_TX_MODE_EXT_PAUSE_EN                   (1L<<3)
+#define BNX2_EMAC_TX_MODE_FLOW_EN                        (1L<<4)
+#define BNX2_EMAC_TX_MODE_BIG_BACKOFF                    (1L<<5)
+#define BNX2_EMAC_TX_MODE_LONG_PAUSE                     (1L<<6)
+#define BNX2_EMAC_TX_MODE_LINK_AWARE                     (1L<<7)
+
+#define BNX2_EMAC_TX_STATUS                             0x000014c0
+#define BNX2_EMAC_TX_STATUS_XOFFED                       (1L<<0)
+#define BNX2_EMAC_TX_STATUS_XOFF_SENT                    (1L<<1)
+#define BNX2_EMAC_TX_STATUS_XON_SENT                     (1L<<2)
+#define BNX2_EMAC_TX_STATUS_LINK_UP                      (1L<<3)
+#define BNX2_EMAC_TX_STATUS_UNDERRUN                     (1L<<4)
+
+#define BNX2_EMAC_TX_LENGTHS                            0x000014c4
+#define BNX2_EMAC_TX_LENGTHS_SLOT                        (0xffL<<0)
+#define BNX2_EMAC_TX_LENGTHS_IPG                         (0xfL<<8)
+#define BNX2_EMAC_TX_LENGTHS_IPG_CRS                     (0x3L<<12)
+
+#define BNX2_EMAC_RX_MODE                               0x000014c8
+#define BNX2_EMAC_RX_MODE_RESET                          (1L<<0)
+#define BNX2_EMAC_RX_MODE_FLOW_EN                        (1L<<2)
+#define BNX2_EMAC_RX_MODE_KEEP_MAC_CONTROL               (1L<<3)
+#define BNX2_EMAC_RX_MODE_KEEP_PAUSE                     (1L<<4)
+#define BNX2_EMAC_RX_MODE_ACCEPT_OVERSIZE                (1L<<5)
+#define BNX2_EMAC_RX_MODE_ACCEPT_RUNTS                   (1L<<6)
+#define BNX2_EMAC_RX_MODE_LLC_CHK                        (1L<<7)
+#define BNX2_EMAC_RX_MODE_PROMISCUOUS                    (1L<<8)
+#define BNX2_EMAC_RX_MODE_NO_CRC_CHK                     (1L<<9)
+#define BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG                  (1L<<10)
+#define BNX2_EMAC_RX_MODE_FILT_BROADCAST                 (1L<<11)
+#define BNX2_EMAC_RX_MODE_SORT_MODE                      (1L<<12)
+
+#define BNX2_EMAC_RX_STATUS                             0x000014cc
+#define BNX2_EMAC_RX_STATUS_FFED                         (1L<<0)
+#define BNX2_EMAC_RX_STATUS_FF_RECEIVED                  (1L<<1)
+#define BNX2_EMAC_RX_STATUS_N_RECEIVED                   (1L<<2)
+
+#define BNX2_EMAC_MULTICAST_HASH0                       0x000014d0
+#define BNX2_EMAC_MULTICAST_HASH1                       0x000014d4
+#define BNX2_EMAC_MULTICAST_HASH2                       0x000014d8
+#define BNX2_EMAC_MULTICAST_HASH3                       0x000014dc
+#define BNX2_EMAC_MULTICAST_HASH4                       0x000014e0
+#define BNX2_EMAC_MULTICAST_HASH5                       0x000014e4
+#define BNX2_EMAC_MULTICAST_HASH6                       0x000014e8
+#define BNX2_EMAC_MULTICAST_HASH7                       0x000014ec
+#define BNX2_EMAC_RX_STAT_IFHCINOCTETS                  0x00001500
+#define BNX2_EMAC_RX_STAT_IFHCINBADOCTETS               0x00001504
+#define BNX2_EMAC_RX_STAT_ETHERSTATSFRAGMENTS           0x00001508
+#define BNX2_EMAC_RX_STAT_IFHCINUCASTPKTS               0x0000150c
+#define BNX2_EMAC_RX_STAT_IFHCINMULTICASTPKTS           0x00001510
+#define BNX2_EMAC_RX_STAT_IFHCINBROADCASTPKTS           0x00001514
+#define BNX2_EMAC_RX_STAT_DOT3STATSFCSERRORS            0x00001518
+#define BNX2_EMAC_RX_STAT_DOT3STATSALIGNMENTERRORS      0x0000151c
+#define BNX2_EMAC_RX_STAT_DOT3STATSCARRIERSENSEERRORS   0x00001520
+#define BNX2_EMAC_RX_STAT_XONPAUSEFRAMESRECEIVED        0x00001524
+#define BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMESRECEIVED       0x00001528
+#define BNX2_EMAC_RX_STAT_MACCONTROLFRAMESRECEIVED      0x0000152c
+#define BNX2_EMAC_RX_STAT_XOFFSTATEENTERED              0x00001530
+#define BNX2_EMAC_RX_STAT_DOT3STATSFRAMESTOOLONG        0x00001534
+#define BNX2_EMAC_RX_STAT_ETHERSTATSJABBERS             0x00001538
+#define BNX2_EMAC_RX_STAT_ETHERSTATSUNDERSIZEPKTS       0x0000153c
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS64OCTETS        0x00001540
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS     0x00001544
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS    0x00001548
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS    0x0000154c
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001550
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS  0x00001554
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS  0x00001558
+#define BNX2_EMAC_RXMAC_DEBUG0                          0x0000155c
+#define BNX2_EMAC_RXMAC_DEBUG1                          0x00001560
+#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NE_BYTE_COUNT      (1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OUT_RANGE          (1L<<1)
+#define BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC                   (1L<<2)
+#define BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR                  (1L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERROR               (1L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG1_LAST_DATA                 (1L<<5)
+#define BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE_START            (1L<<6)
+#define BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUNT                (0xffffL<<7)
+#define BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIME                 (0xffL<<23)
+
+#define BNX2_EMAC_RXMAC_DEBUG2                          0x00001564
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE                  (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_IDLE             (0x0L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SFD              (0x1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DATA             (0x2L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SKEEP            (0x3L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_EXT              (0x4L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DROP             (0x5L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SDROP            (0x6L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_FC               (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE                 (0xfL<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_IDLE            (0x0L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA0           (0x1L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA1           (0x2L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA2           (0x3L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA3           (0x4L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_ABORT           (0x5L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_WAIT            (0x6L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_STATUS          (0x7L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_LAST            (0x8L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN                   (0xffL<<7)
+#define BNX2_EMAC_RXMAC_DEBUG2_FALSEC                    (1L<<15)
+#define BNX2_EMAC_RXMAC_DEBUG2_TAGGED                    (1L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE               (1L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_IDLE          (0L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_PAUSED        (1L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTER                (0xfL<<19)
+#define BNX2_EMAC_RXMAC_DEBUG2_QUANTA                    (0x1fL<<23)
+
+#define BNX2_EMAC_RXMAC_DEBUG3                          0x00001568
+#define BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTR                 (0xffffL<<0)
+#define BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSE_CTR             (0xffffL<<16)
+
+#define BNX2_EMAC_RXMAC_DEBUG4                          0x0000156c
+#define BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIELD                (0xffffL<<0)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE                (0x3fL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_IDLE           (0x0L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC2          (0x1L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC3          (0x2L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UNI            (0x3L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC2          (0x7L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC3          (0x5L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA1           (0x6L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA2           (0x7L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA3           (0x8L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC2            (0x9L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC3            (0xaL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT1         (0xeL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT2         (0xfL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MCHECK         (0x10L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC             (0x11L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC2            (0x12L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC3            (0x13L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA1           (0x14L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA2           (0x15L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA3           (0x16L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BTYPE          (0x17L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC             (0x18L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PTYPE          (0x19L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_CMD            (0x1aL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MAC            (0x1bL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_LATCH          (0x1cL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XOFF           (0x1dL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XON            (0x1eL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PAUSED         (0x1fL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_NPAUSED        (0x20L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TTYPE          (0x21L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TVAL           (0x22L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA1           (0x23L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA2           (0x24L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA3           (0x25L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTYPE          (0x26L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTTYPE         (0x27L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTVAL          (0x28L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MTYPE          (0x29L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_DROP           (0x2aL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT                  (1L<<22)
+#define BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILLED               (1L<<23)
+#define BNX2_EMAC_RXMAC_DEBUG4_FALSE_CARRIER             (1L<<24)
+#define BNX2_EMAC_RXMAC_DEBUG4_LAST_DATA                 (1L<<25)
+#define BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUND                 (1L<<26)
+#define BNX2_EMAC_RXMAC_DEBUG4_ADVANCE                   (1L<<27)
+#define BNX2_EMAC_RXMAC_DEBUG4_START                     (1L<<28)
+
+#define BNX2_EMAC_RXMAC_DEBUG5                          0x00001570
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM                  (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE             (0L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_EOF         (1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_STAT        (2L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4FCRC     (3L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4RDE      (4L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4ALL      (5L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_1WD_WAIT_STAT    (6L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1                (0x7L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_VDW            (0x0L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_STAT           (0x1L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_AEOF           (0x2L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_NEOF           (0x3L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SOF            (0x4L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SAEOF          (0x6L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SNEOF          (0x7L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_EOF_DETECTED              (1L<<7)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF0                (0x7L<<8)
+#define BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_FIFO_FULL         (1L<<11)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCODE                (1L<<12)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATA                 (1L<<13)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_STAT                 (1L<<14)
+#define BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT                  (1L<<15)
+#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_CCODE             (0x3L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ACCEPT            (1L<<19)
+#define BNX2_EMAC_RXMAC_DEBUG5_FMLEN                     (0xfffL<<20)
+
+#define BNX2_EMAC_RX_STAT_AC0                           0x00001580
+#define BNX2_EMAC_RX_STAT_AC1                           0x00001584
+#define BNX2_EMAC_RX_STAT_AC2                           0x00001588
+#define BNX2_EMAC_RX_STAT_AC3                           0x0000158c
+#define BNX2_EMAC_RX_STAT_AC4                           0x00001590
+#define BNX2_EMAC_RX_STAT_AC5                           0x00001594
+#define BNX2_EMAC_RX_STAT_AC6                           0x00001598
+#define BNX2_EMAC_RX_STAT_AC7                           0x0000159c
+#define BNX2_EMAC_RX_STAT_AC8                           0x000015a0
+#define BNX2_EMAC_RX_STAT_AC9                           0x000015a4
+#define BNX2_EMAC_RX_STAT_AC10                          0x000015a8
+#define BNX2_EMAC_RX_STAT_AC11                          0x000015ac
+#define BNX2_EMAC_RX_STAT_AC12                          0x000015b0
+#define BNX2_EMAC_RX_STAT_AC13                          0x000015b4
+#define BNX2_EMAC_RX_STAT_AC14                          0x000015b8
+#define BNX2_EMAC_RX_STAT_AC15                          0x000015bc
+#define BNX2_EMAC_RX_STAT_AC16                          0x000015c0
+#define BNX2_EMAC_RX_STAT_AC17                          0x000015c4
+#define BNX2_EMAC_RX_STAT_AC18                          0x000015c8
+#define BNX2_EMAC_RX_STAT_AC19                          0x000015cc
+#define BNX2_EMAC_RX_STAT_AC20                          0x000015d0
+#define BNX2_EMAC_RX_STAT_AC21                          0x000015d4
+#define BNX2_EMAC_RX_STAT_AC22                          0x000015d8
+#define BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNVEC              0x000015dc
+#define BNX2_EMAC_TX_STAT_IFHCOUTOCTETS                 0x00001600
+#define BNX2_EMAC_TX_STAT_IFHCOUTBADOCTETS              0x00001604
+#define BNX2_EMAC_TX_STAT_ETHERSTATSCOLLISIONS          0x00001608
+#define BNX2_EMAC_TX_STAT_OUTXONSENT                    0x0000160c
+#define BNX2_EMAC_TX_STAT_OUTXOFFSENT                   0x00001610
+#define BNX2_EMAC_TX_STAT_FLOWCONTROLDONE               0x00001614
+#define BNX2_EMAC_TX_STAT_DOT3STATSSINGLECOLLISIONFRAMES        0x00001618
+#define BNX2_EMAC_TX_STAT_DOT3STATSMULTIPLECOLLISIONFRAMES      0x0000161c
+#define BNX2_EMAC_TX_STAT_DOT3STATSDEFERREDTRANSMISSIONS        0x00001620
+#define BNX2_EMAC_TX_STAT_DOT3STATSEXCESSIVECOLLISIONS  0x00001624
+#define BNX2_EMAC_TX_STAT_DOT3STATSLATECOLLISIONS       0x00001628
+#define BNX2_EMAC_TX_STAT_IFHCOUTUCASTPKTS              0x0000162c
+#define BNX2_EMAC_TX_STAT_IFHCOUTMULTICASTPKTS          0x00001630
+#define BNX2_EMAC_TX_STAT_IFHCOUTBROADCASTPKTS          0x00001634
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS64OCTETS        0x00001638
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS     0x0000163c
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS    0x00001640
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS    0x00001644
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS   0x00001648
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS  0x0000164c
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS  0x00001650
+#define BNX2_EMAC_TX_STAT_DOT3STATSINTERNALMACTRANSMITERRORS    0x00001654
+#define BNX2_EMAC_TXMAC_DEBUG0                          0x00001658
+#define BNX2_EMAC_TXMAC_DEBUG1                          0x0000165c
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE                 (0xfL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE            (0x0L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_START0          (0x1L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA0           (0x4L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA1           (0x5L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA2           (0x6L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA3           (0x7L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT0           (0x8L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT1           (0x9L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABLE                (1L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC                   (1L<<5)
+#define BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTER                (0xfL<<6)
+#define BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUSE                (1L<<10)
+#define BNX2_EMAC_TXMAC_DEBUG1_LATE_COLLISION            (1L<<11)
+#define BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFER                 (1L<<12)
+#define BNX2_EMAC_TXMAC_DEBUG1_DEFERRED                  (1L<<13)
+#define BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE                  (1L<<14)
+#define BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME                  (0xfL<<15)
+#define BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIME                 (0xffL<<19)
+
+#define BNX2_EMAC_TXMAC_DEBUG2                          0x00001660
+#define BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF                  (0x3ffL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUNT                (0xffffL<<10)
+#define BNX2_EMAC_TXMAC_DEBUG2_COL_COUNT                 (0x1fL<<26)
+#define BNX2_EMAC_TXMAC_DEBUG2_COL_BIT                   (1L<<31)
+
+#define BNX2_EMAC_TXMAC_DEBUG3                          0x00001664
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE                  (0xfL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_IDLE             (0x0L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE1             (0x1L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE2             (0x2L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SFD              (0x3L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_DATA             (0x4L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC1             (0x5L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC2             (0x6L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EXT              (0x7L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATB            (0x8L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATG            (0x9L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_JAM              (0xaL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EJAM             (0xbL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BJAM             (0xcL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SWAIT            (0xdL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BACKOFF          (0xeL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE                (0x7L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_IDLE           (0x0L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_WAIT           (0x1L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_UNI            (0x2L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_MC             (0x3L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC2            (0x4L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC3            (0x5L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC             (0x6L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE                  (1L<<7)
+#define BNX2_EMAC_TXMAC_DEBUG3_XOFF                      (1L<<8)
+#define BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTER                (0xfL<<9)
+#define BNX2_EMAC_TXMAC_DEBUG3_QUANTA_COUNTER            (0x1fL<<13)
+
+#define BNX2_EMAC_TXMAC_DEBUG4                          0x00001668
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COUNTER             (0xffffL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE               (0xfL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_IDLE          (0x0L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA1          (0x2L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA2          (0x3L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA3          (0x6L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC1          (0x7L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC2          (0x5L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC3          (0x4L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TYPE          (0xcL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CMD           (0xeL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TIME          (0xaL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC1          (0x8L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC2          (0x9L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_WAIT          (0xdL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_STATS0_VALID              (1L<<20)
+#define BNX2_EMAC_TXMAC_DEBUG4_APPEND_CRC                (1L<<21)
+#define BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILLED               (1L<<22)
+#define BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFER                 (1L<<23)
+#define BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTEND               (1L<<24)
+#define BNX2_EMAC_TXMAC_DEBUG4_SEND_PADDING              (1L<<25)
+#define BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC                   (1L<<26)
+#define BNX2_EMAC_TXMAC_DEBUG4_COLLIDING                 (1L<<27)
+#define BNX2_EMAC_TXMAC_DEBUG4_COL_IN                    (1L<<28)
+#define BNX2_EMAC_TXMAC_DEBUG4_BURSTING                  (1L<<29)
+#define BNX2_EMAC_TXMAC_DEBUG4_ADVANCE                   (1L<<30)
+#define BNX2_EMAC_TXMAC_DEBUG4_GO                        (1L<<31)
+
+#define BNX2_EMAC_TX_STAT_AC0                           0x00001680
+#define BNX2_EMAC_TX_STAT_AC1                           0x00001684
+#define BNX2_EMAC_TX_STAT_AC2                           0x00001688
+#define BNX2_EMAC_TX_STAT_AC3                           0x0000168c
+#define BNX2_EMAC_TX_STAT_AC4                           0x00001690
+#define BNX2_EMAC_TX_STAT_AC5                           0x00001694
+#define BNX2_EMAC_TX_STAT_AC6                           0x00001698
+#define BNX2_EMAC_TX_STAT_AC7                           0x0000169c
+#define BNX2_EMAC_TX_STAT_AC8                           0x000016a0
+#define BNX2_EMAC_TX_STAT_AC9                           0x000016a4
+#define BNX2_EMAC_TX_STAT_AC10                          0x000016a8
+#define BNX2_EMAC_TX_STAT_AC11                          0x000016ac
+#define BNX2_EMAC_TX_STAT_AC12                          0x000016b0
+#define BNX2_EMAC_TX_STAT_AC13                          0x000016b4
+#define BNX2_EMAC_TX_STAT_AC14                          0x000016b8
+#define BNX2_EMAC_TX_STAT_AC15                          0x000016bc
+#define BNX2_EMAC_TX_STAT_AC16                          0x000016c0
+#define BNX2_EMAC_TX_STAT_AC17                          0x000016c4
+#define BNX2_EMAC_TX_STAT_AC18                          0x000016c8
+#define BNX2_EMAC_TX_STAT_AC19                          0x000016cc
+#define BNX2_EMAC_TX_STAT_AC20                          0x000016d0
+#define BNX2_EMAC_TX_STAT_AC21                          0x000016d4
+#define BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNVEC              0x000016d8
+
+
+/*
+ *  rpm_reg definition
+ *  offset: 0x1800
+ */
+#define BNX2_RPM_COMMAND                                0x00001800
+#define BNX2_RPM_COMMAND_ENABLED                         (1L<<0)
+#define BNX2_RPM_COMMAND_OVERRUN_ABORT                   (1L<<4)
+
+#define BNX2_RPM_STATUS                                 0x00001804
+#define BNX2_RPM_STATUS_MBUF_WAIT                        (1L<<0)
+#define BNX2_RPM_STATUS_FREE_WAIT                        (1L<<1)
+
+#define BNX2_RPM_CONFIG                                 0x00001808
+#define BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUM                 (1L<<0)
+#define BNX2_RPM_CONFIG_ACPI_ENA                         (1L<<1)
+#define BNX2_RPM_CONFIG_ACPI_KEEP                        (1L<<2)
+#define BNX2_RPM_CONFIG_MP_KEEP                          (1L<<3)
+#define BNX2_RPM_CONFIG_SORT_VECT_VAL                    (0xfL<<4)
+#define BNX2_RPM_CONFIG_IGNORE_VLAN                      (1L<<31)
+
+#define BNX2_RPM_VLAN_MATCH0                            0x00001810
+#define BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MTCH0_VALUE        (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH1                            0x00001814
+#define BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MTCH1_VALUE        (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH2                            0x00001818
+#define BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MTCH2_VALUE        (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH3                            0x0000181c
+#define BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MTCH3_VALUE        (0xfffL<<0)
+
+#define BNX2_RPM_SORT_USER0                             0x00001820
+#define BNX2_RPM_SORT_USER0_PM_EN                        (0xffffL<<0)
+#define BNX2_RPM_SORT_USER0_BC_EN                        (1L<<16)
+#define BNX2_RPM_SORT_USER0_MC_EN                        (1L<<17)
+#define BNX2_RPM_SORT_USER0_MC_HSH_EN                    (1L<<18)
+#define BNX2_RPM_SORT_USER0_PROM_EN                      (1L<<19)
+#define BNX2_RPM_SORT_USER0_VLAN_EN                      (0xfL<<20)
+#define BNX2_RPM_SORT_USER0_PROM_VLAN                    (1L<<24)
+#define BNX2_RPM_SORT_USER0_ENA                          (1L<<31)
+
+#define BNX2_RPM_SORT_USER1                             0x00001824
+#define BNX2_RPM_SORT_USER1_PM_EN                        (0xffffL<<0)
+#define BNX2_RPM_SORT_USER1_BC_EN                        (1L<<16)
+#define BNX2_RPM_SORT_USER1_MC_EN                        (1L<<17)
+#define BNX2_RPM_SORT_USER1_MC_HSH_EN                    (1L<<18)
+#define BNX2_RPM_SORT_USER1_PROM_EN                      (1L<<19)
+#define BNX2_RPM_SORT_USER1_VLAN_EN                      (0xfL<<20)
+#define BNX2_RPM_SORT_USER1_PROM_VLAN                    (1L<<24)
+#define BNX2_RPM_SORT_USER1_ENA                          (1L<<31)
+
+#define BNX2_RPM_SORT_USER2                             0x00001828
+#define BNX2_RPM_SORT_USER2_PM_EN                        (0xffffL<<0)
+#define BNX2_RPM_SORT_USER2_BC_EN                        (1L<<16)
+#define BNX2_RPM_SORT_USER2_MC_EN                        (1L<<17)
+#define BNX2_RPM_SORT_USER2_MC_HSH_EN                    (1L<<18)
+#define BNX2_RPM_SORT_USER2_PROM_EN                      (1L<<19)
+#define BNX2_RPM_SORT_USER2_VLAN_EN                      (0xfL<<20)
+#define BNX2_RPM_SORT_USER2_PROM_VLAN                    (1L<<24)
+#define BNX2_RPM_SORT_USER2_ENA                          (1L<<31)
+
+#define BNX2_RPM_SORT_USER3                             0x0000182c
+#define BNX2_RPM_SORT_USER3_PM_EN                        (0xffffL<<0)
+#define BNX2_RPM_SORT_USER3_BC_EN                        (1L<<16)
+#define BNX2_RPM_SORT_USER3_MC_EN                        (1L<<17)
+#define BNX2_RPM_SORT_USER3_MC_HSH_EN                    (1L<<18)
+#define BNX2_RPM_SORT_USER3_PROM_EN                      (1L<<19)
+#define BNX2_RPM_SORT_USER3_VLAN_EN                      (0xfL<<20)
+#define BNX2_RPM_SORT_USER3_PROM_VLAN                    (1L<<24)
+#define BNX2_RPM_SORT_USER3_ENA                          (1L<<31)
+
+#define BNX2_RPM_STAT_L2_FILTER_DISCARDS                0x00001840
+#define BNX2_RPM_STAT_RULE_CHECKER_DISCARDS             0x00001844
+#define BNX2_RPM_STAT_IFINFTQDISCARDS                   0x00001848
+#define BNX2_RPM_STAT_IFINMBUFDISCARD                   0x0000184c
+#define BNX2_RPM_STAT_RULE_CHECKER_P4_HIT               0x00001850
+#define BNX2_RPM_STAT_AC0                               0x00001880
+#define BNX2_RPM_STAT_AC1                               0x00001884
+#define BNX2_RPM_STAT_AC2                               0x00001888
+#define BNX2_RPM_STAT_AC3                               0x0000188c
+#define BNX2_RPM_STAT_AC4                               0x00001890
+#define BNX2_RPM_RC_CNTL_0                              0x00001900
+#define BNX2_RPM_RC_CNTL_0_OFFSET                        (0xffL<<0)
+#define BNX2_RPM_RC_CNTL_0_CLASS                         (0x7L<<8)
+#define BNX2_RPM_RC_CNTL_0_PRIORITY                      (1L<<11)
+#define BNX2_RPM_RC_CNTL_0_P4                            (1L<<12)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE                      (0x7L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_START                (0L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP                   (1L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP                  (2L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP                  (3L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATA                 (4L<<13)
+#define BNX2_RPM_RC_CNTL_0_COMP                          (0x3L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_EQUAL                    (0L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_NEQUAL                   (1L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_GREATER                  (2L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_LESS                     (3L<<16)
+#define BNX2_RPM_RC_CNTL_0_SBIT                          (1L<<19)
+#define BNX2_RPM_RC_CNTL_0_CMDSEL                        (0xfL<<20)
+#define BNX2_RPM_RC_CNTL_0_MAP                           (1L<<24)
+#define BNX2_RPM_RC_CNTL_0_DISCARD                       (1L<<25)
+#define BNX2_RPM_RC_CNTL_0_MASK                          (1L<<26)
+#define BNX2_RPM_RC_CNTL_0_P1                            (1L<<27)
+#define BNX2_RPM_RC_CNTL_0_P2                            (1L<<28)
+#define BNX2_RPM_RC_CNTL_0_P3                            (1L<<29)
+#define BNX2_RPM_RC_CNTL_0_NBIT                          (1L<<30)
+
+#define BNX2_RPM_RC_VALUE_MASK_0                        0x00001904
+#define BNX2_RPM_RC_VALUE_MASK_0_VALUE                   (0xffffL<<0)
+#define BNX2_RPM_RC_VALUE_MASK_0_MASK                    (0xffffL<<16)
+
+#define BNX2_RPM_RC_CNTL_1                              0x00001908
+#define BNX2_RPM_RC_CNTL_1_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_1_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_1                        0x0000190c
+#define BNX2_RPM_RC_CNTL_2                              0x00001910
+#define BNX2_RPM_RC_CNTL_2_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_2_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_2                        0x00001914
+#define BNX2_RPM_RC_CNTL_3                              0x00001918
+#define BNX2_RPM_RC_CNTL_3_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_3_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_3                        0x0000191c
+#define BNX2_RPM_RC_CNTL_4                              0x00001920
+#define BNX2_RPM_RC_CNTL_4_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_4_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_4                        0x00001924
+#define BNX2_RPM_RC_CNTL_5                              0x00001928
+#define BNX2_RPM_RC_CNTL_5_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_5_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_5                        0x0000192c
+#define BNX2_RPM_RC_CNTL_6                              0x00001930
+#define BNX2_RPM_RC_CNTL_6_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_6_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_6                        0x00001934
+#define BNX2_RPM_RC_CNTL_7                              0x00001938
+#define BNX2_RPM_RC_CNTL_7_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_7_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_7                        0x0000193c
+#define BNX2_RPM_RC_CNTL_8                              0x00001940
+#define BNX2_RPM_RC_CNTL_8_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_8_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_8                        0x00001944
+#define BNX2_RPM_RC_CNTL_9                              0x00001948
+#define BNX2_RPM_RC_CNTL_9_A                             (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_9_B                             (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_9                        0x0000194c
+#define BNX2_RPM_RC_CNTL_10                             0x00001950
+#define BNX2_RPM_RC_CNTL_10_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_10_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_10                       0x00001954
+#define BNX2_RPM_RC_CNTL_11                             0x00001958
+#define BNX2_RPM_RC_CNTL_11_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_11_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_11                       0x0000195c
+#define BNX2_RPM_RC_CNTL_12                             0x00001960
+#define BNX2_RPM_RC_CNTL_12_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_12_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_12                       0x00001964
+#define BNX2_RPM_RC_CNTL_13                             0x00001968
+#define BNX2_RPM_RC_CNTL_13_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_13_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_13                       0x0000196c
+#define BNX2_RPM_RC_CNTL_14                             0x00001970
+#define BNX2_RPM_RC_CNTL_14_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_14_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_14                       0x00001974
+#define BNX2_RPM_RC_CNTL_15                             0x00001978
+#define BNX2_RPM_RC_CNTL_15_A                            (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_15_B                            (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_15                       0x0000197c
+#define BNX2_RPM_RC_CONFIG                              0x00001980
+#define BNX2_RPM_RC_CONFIG_RULE_ENABLE                   (0xffffL<<0)
+#define BNX2_RPM_RC_CONFIG_DEF_CLASS                     (0x7L<<24)
+
+#define BNX2_RPM_DEBUG0                                 0x00001984
+#define BNX2_RPM_DEBUG0_FM_BCNT                          (0xffffL<<0)
+#define BNX2_RPM_DEBUG0_T_DATA_OFST_VLD                  (1L<<16)
+#define BNX2_RPM_DEBUG0_T_UDP_OFST_VLD                   (1L<<17)
+#define BNX2_RPM_DEBUG0_T_TCP_OFST_VLD                   (1L<<18)
+#define BNX2_RPM_DEBUG0_T_IP_OFST_VLD                    (1L<<19)
+#define BNX2_RPM_DEBUG0_IP_MORE_FRGMT                    (1L<<20)
+#define BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP_HDR              (1L<<21)
+#define BNX2_RPM_DEBUG0_LLC_SNAP                         (1L<<22)
+#define BNX2_RPM_DEBUG0_FM_STARTED                       (1L<<23)
+#define BNX2_RPM_DEBUG0_DONE                             (1L<<24)
+#define BNX2_RPM_DEBUG0_WAIT_4_DONE                      (1L<<25)
+#define BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM                  (1L<<26)
+#define BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CKSUM              (1L<<27)
+#define BNX2_RPM_DEBUG0_IGNORE_VLAN                      (1L<<28)
+#define BNX2_RPM_DEBUG0_RP_ENA_ACTIVE                    (1L<<31)
+
+#define BNX2_RPM_DEBUG1                                 0x00001988
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST                       (0xffffL<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE                  (0L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_ALL          (1L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IPLLC        (2L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_IP           (4L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IP           (8L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_START              (16L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP                    (32L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP                   (64L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP                   (128L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_AH                    (256L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP                   (512L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_PAYLOAD           (1024L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA                  (2048L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRY             (0x2000L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRYOUT          (0x4000L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCH_RESULT          (0x8000L<<0)
+#define BNX2_RPM_DEBUG1_HDR_BCNT                         (0x7ffL<<16)
+#define BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D                  (1L<<28)
+#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D2                  (1L<<29)
+#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D1                  (1L<<30)
+#define BNX2_RPM_DEBUG1_EOF_0XTRA_WD                     (1L<<31)
+
+#define BNX2_RPM_DEBUG2                                 0x0000198c
+#define BNX2_RPM_DEBUG2_CMD_HIT_VEC                      (0xffffL<<0)
+#define BNX2_RPM_DEBUG2_IP_BCNT                          (0xffL<<16)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M4                      (1L<<24)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M3                      (1L<<25)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M2                      (1L<<26)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M1                      (1L<<27)
+#define BNX2_RPM_DEBUG2_IPIPE_EMPTY                      (1L<<28)
+#define BNX2_RPM_DEBUG2_FM_DISCARD                       (1L<<29)
+#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D2               (1L<<30)
+#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D1               (1L<<31)
+
+#define BNX2_RPM_DEBUG3                                 0x00001990
+#define BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR                   (0x1ffL<<0)
+#define BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REQ_INT             (1L<<9)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAST_INT             (1L<<10)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ_INT              (1L<<11)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_FREE_REQ                (1L<<12)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_REQ               (1L<<13)
+#define BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVAIL               (1L<<14)
+#define BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DROP                (1L<<15)
+#define BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY_CT               (0xfL<<16)
+#define BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALMFULL             (1L<<21)
+#define BNX2_RPM_DEBUG3_DROP_NXT_VLD                     (1L<<22)
+#define BNX2_RPM_DEBUG3_DROP_NXT                         (1L<<23)
+#define BNX2_RPM_DEBUG3_FTQ_FSM                          (0x3L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_IDLE                     (0x0L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACK                 (0x1L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FREE                (0x2L<<24)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM                      (0x3L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_SOF             (0x0L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_GET_MBUF             (0x1L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA_DATA             (0x2L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DATA            (0x3L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_EOF             (0x4L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_MF_ACK          (0x5L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DROP_NXT_VLD    (0x6L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DONE                 (0x7L<<26)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM                       (1L<<29)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE                  (0L<<29)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT_ACK              (1L<<29)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM                      (1L<<30)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_MBUF              (0x0L<<30)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE_MBUF             (0x1L<<30)
+#define BNX2_RPM_DEBUG3_CCODE_EOF_ERROR                  (1L<<31)
+
+#define BNX2_RPM_DEBUG4                                 0x00001994
+#define BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTER                (0x1ffffffL<<0)
+#define BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE                  (0x7L<<25)
+#define BNX2_RPM_DEBUG4_MBWRITE_FSM                      (0x7L<<28)
+#define BNX2_RPM_DEBUG4_DFIFO_EMPTY                      (1L<<31)
+
+#define BNX2_RPM_DEBUG5                                 0x00001998
+#define BNX2_RPM_DEBUG5_RDROP_WPTR                       (0x1fL<<0)
+#define BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR                  (0x1fL<<5)
+#define BNX2_RPM_DEBUG5_RDROP_MC_RPTR                    (0x1fL<<10)
+#define BNX2_RPM_DEBUG5_RDROP_RC_RPTR                    (0x1fL<<15)
+#define BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTY                 (1L<<20)
+#define BNX2_RPM_DEBUG5_RDROP_MC_EMPTY                   (1L<<21)
+#define BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_AT_RDROP_MC_RPTR  (1L<<22)
+#define BNX2_RPM_DEBUG5_HOLDREG_WOL_DROP_INT             (1L<<23)
+#define BNX2_RPM_DEBUG5_HOLDREG_DISCARD                  (1L<<24)
+#define BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOTAVAIL            (1L<<25)
+#define BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTY                 (1L<<26)
+#define BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTY                 (1L<<27)
+#define BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTY                 (1L<<28)
+#define BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMPTY               (1L<<29)
+#define BNX2_RPM_DEBUG5_HOLDREG_FULL_T                   (1L<<30)
+#define BNX2_RPM_DEBUG5_HOLDREG_RD                       (1L<<31)
+
+#define BNX2_RPM_DEBUG6                                 0x0000199c
+#define BNX2_RPM_DEBUG6_ACPI_VEC                         (0xffffL<<0)
+#define BNX2_RPM_DEBUG6_VEC                              (0xffffL<<16)
+
+#define BNX2_RPM_DEBUG7                                 0x000019a0
+#define BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CRC                (0xffffffffL<<0)
+
+#define BNX2_RPM_DEBUG8                                 0x000019a4
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM                      (0xfL<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLE                 (0L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W1_ADDR          (1L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W2_ADDR          (2L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W3_ADDR          (3L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_WAIT_THBUF       (4L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_DATA              (5L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ADDR              (6L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ADDR              (7L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ADDR              (8L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ADDR              (9L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIT_THBUF           (10L<<0)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_W0                    (1L<<4)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_W3_DATA               (1L<<5)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_WAIT              (1L<<6)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W3                (1L<<7)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W2                (1L<<8)
+#define BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBYTES             (1L<<9)
+#define BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBYTES             (1L<<10)
+#define BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLDBYTES            (1L<<11)
+#define BNX2_RPM_DEBUG8_EOF_DET                          (1L<<12)
+#define BNX2_RPM_DEBUG8_SOF_DET                          (1L<<13)
+#define BNX2_RPM_DEBUG8_WAIT_4_SOF                       (1L<<14)
+#define BNX2_RPM_DEBUG8_ALL_DONE                         (1L<<15)
+#define BNX2_RPM_DEBUG8_THBUF_ADDR                       (0x7fL<<16)
+#define BNX2_RPM_DEBUG8_BYTE_CTR                         (0xffL<<24)
+
+#define BNX2_RPM_DEBUG9                                 0x000019a8
+#define BNX2_RPM_DEBUG9_OUTFIFO_COUNT                    (0x7L<<0)
+#define BNX2_RPM_DEBUG9_RDE_ACPI_RDY                     (1L<<3)
+#define BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT                  (0x7L<<4)
+#define BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN_OCCURRED         (1L<<28)
+#define BNX2_RPM_DEBUG9_INFIFO_OVERRUN_OCCURRED          (1L<<29)
+#define BNX2_RPM_DEBUG9_ACPI_MATCH_INT                   (1L<<30)
+#define BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN                  (1L<<31)
+
+#define BNX2_RPM_ACPI_DBG_BUF_W00                       0x000019c0
+#define BNX2_RPM_ACPI_DBG_BUF_W01                       0x000019c4
+#define BNX2_RPM_ACPI_DBG_BUF_W02                       0x000019c8
+#define BNX2_RPM_ACPI_DBG_BUF_W03                       0x000019cc
+#define BNX2_RPM_ACPI_DBG_BUF_W10                       0x000019d0
+#define BNX2_RPM_ACPI_DBG_BUF_W11                       0x000019d4
+#define BNX2_RPM_ACPI_DBG_BUF_W12                       0x000019d8
+#define BNX2_RPM_ACPI_DBG_BUF_W13                       0x000019dc
+#define BNX2_RPM_ACPI_DBG_BUF_W20                       0x000019e0
+#define BNX2_RPM_ACPI_DBG_BUF_W21                       0x000019e4
+#define BNX2_RPM_ACPI_DBG_BUF_W22                       0x000019e8
+#define BNX2_RPM_ACPI_DBG_BUF_W23                       0x000019ec
+#define BNX2_RPM_ACPI_DBG_BUF_W30                       0x000019f0
+#define BNX2_RPM_ACPI_DBG_BUF_W31                       0x000019f4
+#define BNX2_RPM_ACPI_DBG_BUF_W32                       0x000019f8
+#define BNX2_RPM_ACPI_DBG_BUF_W33                       0x000019fc
+
+
+/*
+ *  rbuf_reg definition
+ *  offset: 0x200000
+ */
+#define BNX2_RBUF_COMMAND                               0x00200000
+#define BNX2_RBUF_COMMAND_ENABLED                        (1L<<0)
+#define BNX2_RBUF_COMMAND_FREE_INIT                      (1L<<1)
+#define BNX2_RBUF_COMMAND_RAM_INIT                       (1L<<2)
+#define BNX2_RBUF_COMMAND_OVER_FREE                      (1L<<4)
+#define BNX2_RBUF_COMMAND_ALLOC_REQ                      (1L<<5)
+
+#define BNX2_RBUF_STATUS1                               0x00200004
+#define BNX2_RBUF_STATUS1_FREE_COUNT                     (0x3ffL<<0)
+
+#define BNX2_RBUF_STATUS2                               0x00200008
+#define BNX2_RBUF_STATUS2_FREE_TAIL                      (0x3ffL<<0)
+#define BNX2_RBUF_STATUS2_FREE_HEAD                      (0x3ffL<<16)
+
+#define BNX2_RBUF_CONFIG                                0x0020000c
+#define BNX2_RBUF_CONFIG_XOFF_TRIP                       (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG_XON_TRIP                        (0x3ffL<<16)
+
+#define BNX2_RBUF_FW_BUF_ALLOC                          0x00200010
+#define BNX2_RBUF_FW_BUF_ALLOC_VALUE                     (0x1ffL<<7)
+
+#define BNX2_RBUF_FW_BUF_FREE                           0x00200014
+#define BNX2_RBUF_FW_BUF_FREE_COUNT                      (0x7fL<<0)
+#define BNX2_RBUF_FW_BUF_FREE_TAIL                       (0x1ffL<<7)
+#define BNX2_RBUF_FW_BUF_FREE_HEAD                       (0x1ffL<<16)
+
+#define BNX2_RBUF_FW_BUF_SEL                            0x00200018
+#define BNX2_RBUF_FW_BUF_SEL_COUNT                       (0x7fL<<0)
+#define BNX2_RBUF_FW_BUF_SEL_TAIL                        (0x1ffL<<7)
+#define BNX2_RBUF_FW_BUF_SEL_HEAD                        (0x1ffL<<16)
+
+#define BNX2_RBUF_CONFIG2                               0x0020001c
+#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP                  (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP                  (0x3ffL<<16)
+
+#define BNX2_RBUF_CONFIG3                               0x00200020
+#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP                   (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP                   (0x3ffL<<16)
+
+#define BNX2_RBUF_PKT_DATA                              0x00208000
+#define BNX2_RBUF_CLIST_DATA                            0x00210000
+#define BNX2_RBUF_BUF_DATA                              0x00220000
+
+
+/*
+ *  rv2p_reg definition
+ *  offset: 0x2800
+ */
+#define BNX2_RV2P_COMMAND                               0x00002800
+#define BNX2_RV2P_COMMAND_ENABLED                        (1L<<0)
+#define BNX2_RV2P_COMMAND_PROC1_INTRPT                   (1L<<1)
+#define BNX2_RV2P_COMMAND_PROC2_INTRPT                   (1L<<2)
+#define BNX2_RV2P_COMMAND_ABORT0                         (1L<<4)
+#define BNX2_RV2P_COMMAND_ABORT1                         (1L<<5)
+#define BNX2_RV2P_COMMAND_ABORT2                         (1L<<6)
+#define BNX2_RV2P_COMMAND_ABORT3                         (1L<<7)
+#define BNX2_RV2P_COMMAND_ABORT4                         (1L<<8)
+#define BNX2_RV2P_COMMAND_ABORT5                         (1L<<9)
+#define BNX2_RV2P_COMMAND_PROC1_RESET                    (1L<<16)
+#define BNX2_RV2P_COMMAND_PROC2_RESET                    (1L<<17)
+#define BNX2_RV2P_COMMAND_CTXIF_RESET                    (1L<<18)
+
+#define BNX2_RV2P_STATUS                                0x00002804
+#define BNX2_RV2P_STATUS_ALWAYS_0                        (1L<<0)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT0_CNT              (1L<<8)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT1_CNT              (1L<<9)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT2_CNT              (1L<<10)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT3_CNT              (1L<<11)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT4_CNT              (1L<<12)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT5_CNT              (1L<<13)
+
+#define BNX2_RV2P_CONFIG                                0x00002808
+#define BNX2_RV2P_CONFIG_STALL_PROC1                     (1L<<0)
+#define BNX2_RV2P_CONFIG_STALL_PROC2                     (1L<<1)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT0           (1L<<8)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT1           (1L<<9)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT2           (1L<<10)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT3           (1L<<11)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT4           (1L<<12)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT5           (1L<<13)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT0           (1L<<16)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT1           (1L<<17)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT2           (1L<<18)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT3           (1L<<19)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT4           (1L<<20)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT5           (1L<<21)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE                       (0xfL<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_256                   (0L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_512                   (1L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_1K                    (2L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_2K                    (3L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_4K                    (4L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_8K                    (5L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_16K                   (6L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_32K                   (7L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_64K                   (8L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_128K                  (9L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_256K                  (10L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_512K                  (11L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_1M                    (12L<<24)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_0                        0x00002810
+#define BNX2_RV2P_GEN_BFR_ADDR_0_VALUE                   (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_1                        0x00002814
+#define BNX2_RV2P_GEN_BFR_ADDR_1_VALUE                   (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_2                        0x00002818
+#define BNX2_RV2P_GEN_BFR_ADDR_2_VALUE                   (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_3                        0x0000281c
+#define BNX2_RV2P_GEN_BFR_ADDR_3_VALUE                   (0xffffL<<16)
+
+#define BNX2_RV2P_INSTR_HIGH                            0x00002830
+#define BNX2_RV2P_INSTR_HIGH_HIGH                        (0x1fL<<0)
+
+#define BNX2_RV2P_INSTR_LOW                             0x00002834
+#define BNX2_RV2P_PROC1_ADDR_CMD                        0x00002838
+#define BNX2_RV2P_PROC1_ADDR_CMD_ADD                     (0x3ffL<<0)
+#define BNX2_RV2P_PROC1_ADDR_CMD_RDWR                    (1L<<31)
+
+#define BNX2_RV2P_PROC2_ADDR_CMD                        0x0000283c
+#define BNX2_RV2P_PROC2_ADDR_CMD_ADD                     (0x3ffL<<0)
+#define BNX2_RV2P_PROC2_ADDR_CMD_RDWR                    (1L<<31)
+
+#define BNX2_RV2P_PROC1_GRC_DEBUG                       0x00002840
+#define BNX2_RV2P_PROC2_GRC_DEBUG                       0x00002844
+#define BNX2_RV2P_GRC_PROC_DEBUG                        0x00002848
+#define BNX2_RV2P_DEBUG_VECT_PEEK                       0x0000284c
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_VALUE                (0x7ffL<<0)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEK_EN              (1L<<11)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL                  (0xfL<<12)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_VALUE                (0x7ffL<<16)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEK_EN              (1L<<27)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL                  (0xfL<<28)
+
+#define BNX2_RV2P_PFTQ_DATA                             0x00002b40
+#define BNX2_RV2P_PFTQ_CMD                              0x00002b78
+#define BNX2_RV2P_PFTQ_CMD_OFFSET                        (0x3ffL<<0)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP                        (1L<<10)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP_0                      (0L<<10)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP_1                      (1L<<10)
+#define BNX2_RV2P_PFTQ_CMD_SFT_RESET                     (1L<<25)
+#define BNX2_RV2P_PFTQ_CMD_RD_DATA                       (1L<<26)
+#define BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN                  (1L<<27)
+#define BNX2_RV2P_PFTQ_CMD_ADD_DATA                      (1L<<28)
+#define BNX2_RV2P_PFTQ_CMD_INTERVENE_CLR                 (1L<<29)
+#define BNX2_RV2P_PFTQ_CMD_POP                           (1L<<30)
+#define BNX2_RV2P_PFTQ_CMD_BUSY                          (1L<<31)
+
+#define BNX2_RV2P_PFTQ_CTL                              0x00002b7c
+#define BNX2_RV2P_PFTQ_CTL_INTERVENE                     (1L<<0)
+#define BNX2_RV2P_PFTQ_CTL_OVERFLOW                      (1L<<1)
+#define BNX2_RV2P_PFTQ_CTL_FORCE_INTERVENE               (1L<<2)
+#define BNX2_RV2P_PFTQ_CTL_MAX_DEPTH                     (0x3ffL<<12)
+#define BNX2_RV2P_PFTQ_CTL_CUR_DEPTH                     (0x3ffL<<22)
+
+#define BNX2_RV2P_TFTQ_DATA                             0x00002b80
+#define BNX2_RV2P_TFTQ_CMD                              0x00002bb8
+#define BNX2_RV2P_TFTQ_CMD_OFFSET                        (0x3ffL<<0)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP                        (1L<<10)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP_0                      (0L<<10)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP_1                      (1L<<10)
+#define BNX2_RV2P_TFTQ_CMD_SFT_RESET                     (1L<<25)
+#define BNX2_RV2P_TFTQ_CMD_RD_DATA                       (1L<<26)
+#define BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN                  (1L<<27)
+#define BNX2_RV2P_TFTQ_CMD_ADD_DATA                      (1L<<28)
+#define BNX2_RV2P_TFTQ_CMD_INTERVENE_CLR                 (1L<<29)
+#define BNX2_RV2P_TFTQ_CMD_POP                           (1L<<30)
+#define BNX2_RV2P_TFTQ_CMD_BUSY                          (1L<<31)
+
+#define BNX2_RV2P_TFTQ_CTL                              0x00002bbc
+#define BNX2_RV2P_TFTQ_CTL_INTERVENE                     (1L<<0)
+#define BNX2_RV2P_TFTQ_CTL_OVERFLOW                      (1L<<1)
+#define BNX2_RV2P_TFTQ_CTL_FORCE_INTERVENE               (1L<<2)
+#define BNX2_RV2P_TFTQ_CTL_MAX_DEPTH                     (0x3ffL<<12)
+#define BNX2_RV2P_TFTQ_CTL_CUR_DEPTH                     (0x3ffL<<22)
+
+#define BNX2_RV2P_MFTQ_DATA                             0x00002bc0
+#define BNX2_RV2P_MFTQ_CMD                              0x00002bf8
+#define BNX2_RV2P_MFTQ_CMD_OFFSET                        (0x3ffL<<0)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP                        (1L<<10)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP_0                      (0L<<10)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP_1                      (1L<<10)
+#define BNX2_RV2P_MFTQ_CMD_SFT_RESET                     (1L<<25)
+#define BNX2_RV2P_MFTQ_CMD_RD_DATA                       (1L<<26)
+#define BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN                  (1L<<27)
+#define BNX2_RV2P_MFTQ_CMD_ADD_DATA                      (1L<<28)
+#define BNX2_RV2P_MFTQ_CMD_INTERVENE_CLR                 (1L<<29)
+#define BNX2_RV2P_MFTQ_CMD_POP                           (1L<<30)
+#define BNX2_RV2P_MFTQ_CMD_BUSY                          (1L<<31)
+
+#define BNX2_RV2P_MFTQ_CTL                              0x00002bfc
+#define BNX2_RV2P_MFTQ_CTL_INTERVENE                     (1L<<0)
+#define BNX2_RV2P_MFTQ_CTL_OVERFLOW                      (1L<<1)
+#define BNX2_RV2P_MFTQ_CTL_FORCE_INTERVENE               (1L<<2)
+#define BNX2_RV2P_MFTQ_CTL_MAX_DEPTH                     (0x3ffL<<12)
+#define BNX2_RV2P_MFTQ_CTL_CUR_DEPTH                     (0x3ffL<<22)
+
+
+
+/*
+ *  mq_reg definition
+ *  offset: 0x3c00
+ */
+#define BNX2_MQ_COMMAND                                 0x00003c00
+#define BNX2_MQ_COMMAND_ENABLED                          (1L<<0)
+#define BNX2_MQ_COMMAND_OVERFLOW                         (1L<<4)
+#define BNX2_MQ_COMMAND_WR_ERROR                         (1L<<5)
+#define BNX2_MQ_COMMAND_RD_ERROR                         (1L<<6)
+
+#define BNX2_MQ_STATUS                                  0x00003c04
+#define BNX2_MQ_STATUS_CTX_ACCESS_STAT                   (1L<<16)
+#define BNX2_MQ_STATUS_CTX_ACCESS64_STAT                 (1L<<17)
+#define BNX2_MQ_STATUS_PCI_STALL_STAT                    (1L<<18)
+
+#define BNX2_MQ_CONFIG                                  0x00003c08
+#define BNX2_MQ_CONFIG_TX_HIGH_PRI                       (1L<<0)
+#define BNX2_MQ_CONFIG_HALT_DIS                          (1L<<1)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE                  (0x7L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256              (0L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_512              (1L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_1K               (2L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_2K               (3L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_4K               (4L<<4)
+#define BNX2_MQ_CONFIG_MAX_DEPTH                         (0x7fL<<8)
+#define BNX2_MQ_CONFIG_CUR_DEPTH                         (0x7fL<<20)
+
+#define BNX2_MQ_ENQUEUE1                                0x00003c0c
+#define BNX2_MQ_ENQUEUE1_OFFSET                          (0x3fL<<2)
+#define BNX2_MQ_ENQUEUE1_CID                             (0x3fffL<<8)
+#define BNX2_MQ_ENQUEUE1_BYTE_MASK                       (0xfL<<24)
+#define BNX2_MQ_ENQUEUE1_KNL_MODE                        (1L<<28)
+
+#define BNX2_MQ_ENQUEUE2                                0x00003c10
+#define BNX2_MQ_BAD_WR_ADDR                             0x00003c14
+#define BNX2_MQ_BAD_RD_ADDR                             0x00003c18
+#define BNX2_MQ_KNL_BYP_WIND_START                      0x00003c1c
+#define BNX2_MQ_KNL_BYP_WIND_START_VALUE                 (0xfffffL<<12)
+
+#define BNX2_MQ_KNL_WIND_END                            0x00003c20
+#define BNX2_MQ_KNL_WIND_END_VALUE                       (0xffffffL<<8)
+
+#define BNX2_MQ_KNL_WRITE_MASK1                         0x00003c24
+#define BNX2_MQ_KNL_TX_MASK1                            0x00003c28
+#define BNX2_MQ_KNL_CMD_MASK1                           0x00003c2c
+#define BNX2_MQ_KNL_COND_ENQUEUE_MASK1                  0x00003c30
+#define BNX2_MQ_KNL_RX_V2P_MASK1                        0x00003c34
+#define BNX2_MQ_KNL_WRITE_MASK2                         0x00003c38
+#define BNX2_MQ_KNL_TX_MASK2                            0x00003c3c
+#define BNX2_MQ_KNL_CMD_MASK2                           0x00003c40
+#define BNX2_MQ_KNL_COND_ENQUEUE_MASK2                  0x00003c44
+#define BNX2_MQ_KNL_RX_V2P_MASK2                        0x00003c48
+#define BNX2_MQ_KNL_BYP_WRITE_MASK1                     0x00003c4c
+#define BNX2_MQ_KNL_BYP_TX_MASK1                        0x00003c50
+#define BNX2_MQ_KNL_BYP_CMD_MASK1                       0x00003c54
+#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK1              0x00003c58
+#define BNX2_MQ_KNL_BYP_RX_V2P_MASK1                    0x00003c5c
+#define BNX2_MQ_KNL_BYP_WRITE_MASK2                     0x00003c60
+#define BNX2_MQ_KNL_BYP_TX_MASK2                        0x00003c64
+#define BNX2_MQ_KNL_BYP_CMD_MASK2                       0x00003c68
+#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK2              0x00003c6c
+#define BNX2_MQ_KNL_BYP_RX_V2P_MASK2                    0x00003c70
+#define BNX2_MQ_MEM_WR_ADDR                             0x00003c74
+#define BNX2_MQ_MEM_WR_ADDR_VALUE                        (0x3fL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA0                            0x00003c78
+#define BNX2_MQ_MEM_WR_DATA0_VALUE                       (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA1                            0x00003c7c
+#define BNX2_MQ_MEM_WR_DATA1_VALUE                       (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA2                            0x00003c80
+#define BNX2_MQ_MEM_WR_DATA2_VALUE                       (0x3fffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_ADDR                             0x00003c84
+#define BNX2_MQ_MEM_RD_ADDR_VALUE                        (0x3fL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA0                            0x00003c88
+#define BNX2_MQ_MEM_RD_DATA0_VALUE                       (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA1                            0x00003c8c
+#define BNX2_MQ_MEM_RD_DATA1_VALUE                       (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA2                            0x00003c90
+#define BNX2_MQ_MEM_RD_DATA2_VALUE                       (0x3fffffffL<<0)
+
+
+
+/*
+ *  tbdr_reg definition
+ *  offset: 0x5000
+ */
+#define BNX2_TBDR_COMMAND                               0x00005000
+#define BNX2_TBDR_COMMAND_ENABLE                         (1L<<0)
+#define BNX2_TBDR_COMMAND_SOFT_RST                       (1L<<1)
+#define BNX2_TBDR_COMMAND_MSTR_ABORT                     (1L<<4)
+
+#define BNX2_TBDR_STATUS                                0x00005004
+#define BNX2_TBDR_STATUS_DMA_WAIT                        (1L<<0)
+#define BNX2_TBDR_STATUS_FTQ_WAIT                        (1L<<1)
+#define BNX2_TBDR_STATUS_FIFO_OVERFLOW                   (1L<<2)
+#define BNX2_TBDR_STATUS_FIFO_UNDERFLOW                  (1L<<3)
+#define BNX2_TBDR_STATUS_SEARCHMISS_ERROR                (1L<<4)
+#define BNX2_TBDR_STATUS_FTQ_ENTRY_CNT                   (1L<<5)
+#define BNX2_TBDR_STATUS_BURST_CNT                       (1L<<6)
+
+#define BNX2_TBDR_CONFIG                                0x00005008
+#define BNX2_TBDR_CONFIG_MAX_BDS                         (0xffL<<0)
+#define BNX2_TBDR_CONFIG_SWAP_MODE                       (1L<<8)
+#define BNX2_TBDR_CONFIG_PRIORITY                        (1L<<9)
+#define BNX2_TBDR_CONFIG_CACHE_NEXT_PAGE_PTRS            (1L<<10)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE                       (0xfL<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_256                   (0L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_512                   (1L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_1K                    (2L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_2K                    (3L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_4K                    (4L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_8K                    (5L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_16K                   (6L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_32K                   (7L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_64K                   (8L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_128K                  (9L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_256K                  (10L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_512K                  (11L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_1M                    (12L<<24)
+
+#define BNX2_TBDR_DEBUG_VECT_PEEK                       0x0000500c
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_VALUE                (0x7ffL<<0)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEK_EN              (1L<<11)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL                  (0xfL<<12)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_VALUE                (0x7ffL<<16)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEK_EN              (1L<<27)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL                  (0xfL<<28)
+
+#define BNX2_TBDR_FTQ_DATA                              0x000053c0
+#define BNX2_TBDR_FTQ_CMD                               0x000053f8
+#define BNX2_TBDR_FTQ_CMD_OFFSET                         (0x3ffL<<0)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP                         (1L<<10)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP_0                       (0L<<10)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP_1                       (1L<<10)
+#define BNX2_TBDR_FTQ_CMD_SFT_RESET                      (1L<<25)
+#define BNX2_TBDR_FTQ_CMD_RD_DATA                        (1L<<26)
+#define BNX2_TBDR_FTQ_CMD_ADD_INTERVEN                   (1L<<27)
+#define BNX2_TBDR_FTQ_CMD_ADD_DATA                       (1L<<28)
+#define BNX2_TBDR_FTQ_CMD_INTERVENE_CLR                  (1L<<29)
+#define BNX2_TBDR_FTQ_CMD_POP                            (1L<<30)
+#define BNX2_TBDR_FTQ_CMD_BUSY                           (1L<<31)
+
+#define BNX2_TBDR_FTQ_CTL                               0x000053fc
+#define BNX2_TBDR_FTQ_CTL_INTERVENE                      (1L<<0)
+#define BNX2_TBDR_FTQ_CTL_OVERFLOW                       (1L<<1)
+#define BNX2_TBDR_FTQ_CTL_FORCE_INTERVENE                (1L<<2)
+#define BNX2_TBDR_FTQ_CTL_MAX_DEPTH                      (0x3ffL<<12)
+#define BNX2_TBDR_FTQ_CTL_CUR_DEPTH                      (0x3ffL<<22)
+
+
+
+/*
+ *  tdma_reg definition
+ *  offset: 0x5c00
+ */
+#define BNX2_TDMA_COMMAND                               0x00005c00
+#define BNX2_TDMA_COMMAND_ENABLED                        (1L<<0)
+#define BNX2_TDMA_COMMAND_MASTER_ABORT                   (1L<<4)
+#define BNX2_TDMA_COMMAND_BAD_L2_LENGTH_ABORT            (1L<<7)
+
+#define BNX2_TDMA_STATUS                                0x00005c04
+#define BNX2_TDMA_STATUS_DMA_WAIT                        (1L<<0)
+#define BNX2_TDMA_STATUS_PAYLOAD_WAIT                    (1L<<1)
+#define BNX2_TDMA_STATUS_PATCH_FTQ_WAIT                  (1L<<2)
+#define BNX2_TDMA_STATUS_LOCK_WAIT                       (1L<<3)
+#define BNX2_TDMA_STATUS_FTQ_ENTRY_CNT                   (1L<<16)
+#define BNX2_TDMA_STATUS_BURST_CNT                       (1L<<17)
+
+#define BNX2_TDMA_CONFIG                                0x00005c08
+#define BNX2_TDMA_CONFIG_ONE_DMA                         (1L<<0)
+#define BNX2_TDMA_CONFIG_ONE_RECORD                      (1L<<1)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ                        (0xfL<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_64                     (0L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_128                    (0x4L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_256                    (0x6L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_512                    (0x8L<<4)
+#define BNX2_TDMA_CONFIG_LINE_SZ                         (0xfL<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_64                      (0L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_128                     (4L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_256                     (6L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_512                     (8L<<8)
+#define BNX2_TDMA_CONFIG_ALIGN_ENA                       (1L<<15)
+#define BNX2_TDMA_CONFIG_CHK_L2_BD                       (1L<<16)
+#define BNX2_TDMA_CONFIG_FIFO_CMP                        (0xfL<<20)
+
+#define BNX2_TDMA_PAYLOAD_PROD                          0x00005c0c
+#define BNX2_TDMA_PAYLOAD_PROD_VALUE                     (0x1fffL<<3)
+
+#define BNX2_TDMA_DBG_WATCHDOG                          0x00005c10
+#define BNX2_TDMA_DBG_TRIGGER                           0x00005c14
+#define BNX2_TDMA_DMAD_FSM                              0x00005c80
+#define BNX2_TDMA_DMAD_FSM_BD_INVLD                      (1L<<0)
+#define BNX2_TDMA_DMAD_FSM_PUSH                          (0xfL<<4)
+#define BNX2_TDMA_DMAD_FSM_ARB_TBDC                      (0x3L<<8)
+#define BNX2_TDMA_DMAD_FSM_ARB_CTX                       (1L<<12)
+#define BNX2_TDMA_DMAD_FSM_DR_INTF                       (1L<<16)
+#define BNX2_TDMA_DMAD_FSM_DMAD                          (0x7L<<20)
+#define BNX2_TDMA_DMAD_FSM_BD                            (0xfL<<24)
+
+#define BNX2_TDMA_DMAD_STATUS                           0x00005c84
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_PUSH_ENTRY           (0x3L<<0)
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_DMAD_ENTRY           (0x3L<<4)
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ENTRY             (0x3L<<8)
+#define BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM                  (0xfL<<12)
+
+#define BNX2_TDMA_DR_INTF_FSM                           0x00005c88
+#define BNX2_TDMA_DR_INTF_FSM_L2_COMP                    (0x3L<<0)
+#define BNX2_TDMA_DR_INTF_FSM_TPATQ                      (0x7L<<4)
+#define BNX2_TDMA_DR_INTF_FSM_TPBUF                      (0x3L<<8)
+#define BNX2_TDMA_DR_INTF_FSM_DR_BUF                     (0x7L<<12)
+#define BNX2_TDMA_DR_INTF_FSM_DMAD                       (0x7L<<16)
+
+#define BNX2_TDMA_DR_INTF_STATUS                        0x00005c8c
+#define BNX2_TDMA_DR_INTF_STATUS_HOLE_PHASE              (0x7L<<0)
+#define BNX2_TDMA_DR_INTF_STATUS_DATA_AVAIL              (0x3L<<4)
+#define BNX2_TDMA_DR_INTF_STATUS_SHIFT_ADDR              (0x7L<<8)
+#define BNX2_TDMA_DR_INTF_STATUS_NXT_PNTR                (0xfL<<12)
+#define BNX2_TDMA_DR_INTF_STATUS_BYTE_COUNT              (0x7L<<16)
+
+#define BNX2_TDMA_FTQ_DATA                              0x00005fc0
+#define BNX2_TDMA_FTQ_CMD                               0x00005ff8
+#define BNX2_TDMA_FTQ_CMD_OFFSET                         (0x3ffL<<0)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP                         (1L<<10)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP_0                       (0L<<10)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP_1                       (1L<<10)
+#define BNX2_TDMA_FTQ_CMD_SFT_RESET                      (1L<<25)
+#define BNX2_TDMA_FTQ_CMD_RD_DATA                        (1L<<26)
+#define BNX2_TDMA_FTQ_CMD_ADD_INTERVEN                   (1L<<27)
+#define BNX2_TDMA_FTQ_CMD_ADD_DATA                       (1L<<28)
+#define BNX2_TDMA_FTQ_CMD_INTERVENE_CLR                  (1L<<29)
+#define BNX2_TDMA_FTQ_CMD_POP                            (1L<<30)
+#define BNX2_TDMA_FTQ_CMD_BUSY                           (1L<<31)
+
+#define BNX2_TDMA_FTQ_CTL                               0x00005ffc
+#define BNX2_TDMA_FTQ_CTL_INTERVENE                      (1L<<0)
+#define BNX2_TDMA_FTQ_CTL_OVERFLOW                       (1L<<1)
+#define BNX2_TDMA_FTQ_CTL_FORCE_INTERVENE                (1L<<2)
+#define BNX2_TDMA_FTQ_CTL_MAX_DEPTH                      (0x3ffL<<12)
+#define BNX2_TDMA_FTQ_CTL_CUR_DEPTH                      (0x3ffL<<22)
+
+
+
+/*
+ *  hc_reg definition
+ *  offset: 0x6800
+ */
+#define BNX2_HC_COMMAND                                 0x00006800
+#define BNX2_HC_COMMAND_ENABLE                           (1L<<0)
+#define BNX2_HC_COMMAND_SKIP_ABORT                       (1L<<4)
+#define BNX2_HC_COMMAND_COAL_NOW                         (1L<<16)
+#define BNX2_HC_COMMAND_COAL_NOW_WO_INT                  (1L<<17)
+#define BNX2_HC_COMMAND_STATS_NOW                        (1L<<18)
+#define BNX2_HC_COMMAND_FORCE_INT                        (0x3L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_NULL                   (0L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_HIGH                   (1L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_LOW                    (2L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_FREE                   (3L<<19)
+#define BNX2_HC_COMMAND_CLR_STAT_NOW                     (1L<<21)
+
+#define BNX2_HC_STATUS                                  0x00006804
+#define BNX2_HC_STATUS_MASTER_ABORT                      (1L<<0)
+#define BNX2_HC_STATUS_PARITY_ERROR_STATE                (1L<<1)
+#define BNX2_HC_STATUS_PCI_CLK_CNT_STAT                  (1L<<16)
+#define BNX2_HC_STATUS_CORE_CLK_CNT_STAT                 (1L<<17)
+#define BNX2_HC_STATUS_NUM_STATUS_BLOCKS_STAT            (1L<<18)
+#define BNX2_HC_STATUS_NUM_INT_GEN_STAT                  (1L<<19)
+#define BNX2_HC_STATUS_NUM_INT_MBOX_WR_STAT              (1L<<20)
+#define BNX2_HC_STATUS_CORE_CLKS_TO_HW_INTACK_STAT       (1L<<23)
+#define BNX2_HC_STATUS_CORE_CLKS_TO_SW_INTACK_STAT       (1L<<24)
+#define BNX2_HC_STATUS_CORE_CLKS_DURING_SW_INTACK_STAT   (1L<<25)
+
+#define BNX2_HC_CONFIG                                  0x00006808
+#define BNX2_HC_CONFIG_COLLECT_STATS                     (1L<<0)
+#define BNX2_HC_CONFIG_RX_TMR_MODE                       (1L<<1)
+#define BNX2_HC_CONFIG_TX_TMR_MODE                       (1L<<2)
+#define BNX2_HC_CONFIG_COM_TMR_MODE                      (1L<<3)
+#define BNX2_HC_CONFIG_CMD_TMR_MODE                      (1L<<4)
+#define BNX2_HC_CONFIG_STATISTIC_PRIORITY                (1L<<5)
+#define BNX2_HC_CONFIG_STATUS_PRIORITY                   (1L<<6)
+#define BNX2_HC_CONFIG_STAT_MEM_ADDR                     (0xffL<<8)
+
+#define BNX2_HC_ATTN_BITS_ENABLE                        0x0000680c
+#define BNX2_HC_STATUS_ADDR_L                           0x00006810
+#define BNX2_HC_STATUS_ADDR_H                           0x00006814
+#define BNX2_HC_STATISTICS_ADDR_L                       0x00006818
+#define BNX2_HC_STATISTICS_ADDR_H                       0x0000681c
+#define BNX2_HC_TX_QUICK_CONS_TRIP                      0x00006820
+#define BNX2_HC_TX_QUICK_CONS_TRIP_VALUE                 (0xffL<<0)
+#define BNX2_HC_TX_QUICK_CONS_TRIP_INT                   (0xffL<<16)
+
+#define BNX2_HC_COMP_PROD_TRIP                          0x00006824
+#define BNX2_HC_COMP_PROD_TRIP_VALUE                     (0xffL<<0)
+#define BNX2_HC_COMP_PROD_TRIP_INT                       (0xffL<<16)
+
+#define BNX2_HC_RX_QUICK_CONS_TRIP                      0x00006828
+#define BNX2_HC_RX_QUICK_CONS_TRIP_VALUE                 (0xffL<<0)
+#define BNX2_HC_RX_QUICK_CONS_TRIP_INT                   (0xffL<<16)
+
+#define BNX2_HC_RX_TICKS                                0x0000682c
+#define BNX2_HC_RX_TICKS_VALUE                           (0x3ffL<<0)
+#define BNX2_HC_RX_TICKS_INT                             (0x3ffL<<16)
+
+#define BNX2_HC_TX_TICKS                                0x00006830
+#define BNX2_HC_TX_TICKS_VALUE                           (0x3ffL<<0)
+#define BNX2_HC_TX_TICKS_INT                             (0x3ffL<<16)
+
+#define BNX2_HC_COM_TICKS                               0x00006834
+#define BNX2_HC_COM_TICKS_VALUE                          (0x3ffL<<0)
+#define BNX2_HC_COM_TICKS_INT                            (0x3ffL<<16)
+
+#define BNX2_HC_CMD_TICKS                               0x00006838
+#define BNX2_HC_CMD_TICKS_VALUE                          (0x3ffL<<0)
+#define BNX2_HC_CMD_TICKS_INT                            (0x3ffL<<16)
+
+#define BNX2_HC_PERIODIC_TICKS                          0x0000683c
+#define BNX2_HC_PERIODIC_TICKS_HC_PERIODIC_TICKS         (0xffffL<<0)
+
+#define BNX2_HC_STAT_COLLECT_TICKS                      0x00006840
+#define BNX2_HC_STAT_COLLECT_TICKS_HC_STAT_COLL_TICKS    (0xffL<<4)
+
+#define BNX2_HC_STATS_TICKS                             0x00006844
+#define BNX2_HC_STATS_TICKS_HC_STAT_TICKS                (0xffffL<<8)
+
+#define BNX2_HC_STAT_MEM_DATA                           0x0000684c
+#define BNX2_HC_STAT_GEN_SEL_0                          0x00006850
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0                 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT0       (0L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT1       (1L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT2       (2L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT3       (3L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT4       (4L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT5       (5L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT6       (6L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT7       (7L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT8       (8L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT9       (9L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT10      (10L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT11      (11L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT0       (12L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT1       (13L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT2       (14L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT3       (15L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT4       (16L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT5       (17L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT6       (18L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT7       (19L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT0       (20L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT1       (21L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT2       (22L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT3       (23L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT4       (24L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT5       (25L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT6       (26L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT7       (27L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT8       (28L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT9       (29L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT10      (30L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT11      (31L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT0      (32L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT1      (33L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT2      (34L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT3      (35L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT0        (36L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT1        (37L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT2        (38L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT3        (39L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT4        (40L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT5        (41L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT6        (42L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT7        (43L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT0       (44L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT1       (45L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT2       (46L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT3       (47L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT4       (48L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT5       (49L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT6       (50L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT7       (51L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_PCI_CLK_CNT     (52L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CORE_CLK_CNT    (53L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS    (54L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN  (55L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR      (56L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK       (59L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK       (60L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK   (61L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_CMD_CNT    (62L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_SLOT_CNT   (63L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_CMD_CNT    (64L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_SLOT_CNT   (65L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT         (66L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT  (67L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT         (68L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT        (69L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT        (70L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT        (71L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT         (72L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT         (73L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT         (74L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT  (75L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT         (76L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT         (77L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT  (78L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT   (79L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT   (80L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT         (81L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT         (82L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT  (83L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT  (84L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_TRANSFERS_CNT         (85L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_DELAY_PCI_CLKS_CNT    (86L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_TRANSFERS_CNT     (87L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_DELAY_PCI_CLKS_CNT        (88L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_RETRY_AFTER_DATA_CNT      (89L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_TRANSFERS_CNT        (90L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_DELAY_PCI_CLKS_CNT   (91L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_TRANSFERS_CNT    (92L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_DELAY_PCI_CLKS_CNT       (93L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_RETRY_AFTER_DATA_CNT     (94L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_WR_CNT64    (95L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_RD_CNT64    (96L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_ACC_STALL_CLKS      (97L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_LOCK_STALL_CLKS     (98L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS_STAT     (99L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS64_STAT   (100L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_PCI_STALL_STAT      (101L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_FTQ_ENTRY_CNT      (102L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_BURST_CNT  (103L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_FTQ_ENTRY_CNT      (104L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_BURST_CNT  (105L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_FTQ_ENTRY_CNT      (106L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_BURST_CNT  (107L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUP_MATCH_CNT  (108L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_POLL_PASS_CNT       (109L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR1_CNT    (110L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR2_CNT    (111L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR3_CNT    (112L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR4_CNT    (113L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR5_CNT    (114L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT0      (115L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT1      (116L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT2      (117L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT3      (118L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT4      (119L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT5      (120L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC1_MISS         (121L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC2_MISS         (122L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_BURST_CNT  (127L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1                 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2                 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3                 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_1                          0x00006854
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4                 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5                 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6                 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7                 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_2                          0x00006858
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8                 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9                 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10                (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11                (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_3                          0x0000685c
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12                (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13                (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14                (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15                (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_STAT0                          0x00006888
+#define BNX2_HC_STAT_GEN_STAT1                          0x0000688c
+#define BNX2_HC_STAT_GEN_STAT2                          0x00006890
+#define BNX2_HC_STAT_GEN_STAT3                          0x00006894
+#define BNX2_HC_STAT_GEN_STAT4                          0x00006898
+#define BNX2_HC_STAT_GEN_STAT5                          0x0000689c
+#define BNX2_HC_STAT_GEN_STAT6                          0x000068a0
+#define BNX2_HC_STAT_GEN_STAT7                          0x000068a4
+#define BNX2_HC_STAT_GEN_STAT8                          0x000068a8
+#define BNX2_HC_STAT_GEN_STAT9                          0x000068ac
+#define BNX2_HC_STAT_GEN_STAT10                         0x000068b0
+#define BNX2_HC_STAT_GEN_STAT11                         0x000068b4
+#define BNX2_HC_STAT_GEN_STAT12                         0x000068b8
+#define BNX2_HC_STAT_GEN_STAT13                         0x000068bc
+#define BNX2_HC_STAT_GEN_STAT14                         0x000068c0
+#define BNX2_HC_STAT_GEN_STAT15                         0x000068c4
+#define BNX2_HC_STAT_GEN_STAT_AC0                       0x000068c8
+#define BNX2_HC_STAT_GEN_STAT_AC1                       0x000068cc
+#define BNX2_HC_STAT_GEN_STAT_AC2                       0x000068d0
+#define BNX2_HC_STAT_GEN_STAT_AC3                       0x000068d4
+#define BNX2_HC_STAT_GEN_STAT_AC4                       0x000068d8
+#define BNX2_HC_STAT_GEN_STAT_AC5                       0x000068dc
+#define BNX2_HC_STAT_GEN_STAT_AC6                       0x000068e0
+#define BNX2_HC_STAT_GEN_STAT_AC7                       0x000068e4
+#define BNX2_HC_STAT_GEN_STAT_AC8                       0x000068e8
+#define BNX2_HC_STAT_GEN_STAT_AC9                       0x000068ec
+#define BNX2_HC_STAT_GEN_STAT_AC10                      0x000068f0
+#define BNX2_HC_STAT_GEN_STAT_AC11                      0x000068f4
+#define BNX2_HC_STAT_GEN_STAT_AC12                      0x000068f8
+#define BNX2_HC_STAT_GEN_STAT_AC13                      0x000068fc
+#define BNX2_HC_STAT_GEN_STAT_AC14                      0x00006900
+#define BNX2_HC_STAT_GEN_STAT_AC15                      0x00006904
+#define BNX2_HC_VIS                                     0x00006908
+#define BNX2_HC_VIS_STAT_BUILD_STATE                     (0xfL<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_IDLE                (0L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_START               (1L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_REQUEST             (2L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE64            (3L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE32            (4L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE_DONE         (5L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_DMA                 (6L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_CONTROL         (7L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_LOW             (8L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_HIGH            (9L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_DATA            (10L<<0)
+#define BNX2_HC_VIS_DMA_STAT_STATE                       (0xfL<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_IDLE                  (0L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_PARAM          (1L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_DMA            (2L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP            (3L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_COMP                  (4L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_PARAM       (5L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_DMA         (6L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_1          (7L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_2          (8L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WAIT                  (9L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_ABORT                 (15L<<8)
+#define BNX2_HC_VIS_DMA_MSI_STATE                        (0x7L<<12)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE               (0x3L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_IDLE          (0L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_COUNT         (1L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_START         (2L<<15)
+
+#define BNX2_HC_VIS_1                                   0x0000690c
+#define BNX2_HC_VIS_1_HW_INTACK_STATE                    (1L<<4)
+#define BNX2_HC_VIS_1_HW_INTACK_STATE_IDLE               (0L<<4)
+#define BNX2_HC_VIS_1_HW_INTACK_STATE_COUNT              (1L<<4)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE                    (1L<<5)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE_IDLE               (0L<<5)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE_COUNT              (1L<<5)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE             (1L<<6)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_IDLE        (0L<<6)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_COUNT       (1L<<6)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE                (1L<<7)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_IDLE           (0L<<7)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_COUNT          (1L<<7)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE                   (0xfL<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_IDLE              (0L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_DMA               (1L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_UPDATE            (2L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ASSIGN            (3L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_WAIT              (4L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_UPDATE        (5L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_ASSIGN        (6L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_WAIT          (7L<<17)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE                   (0x3L<<21)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_NORMAL            (0L<<21)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_CLEAR             (1L<<21)
+#define BNX2_HC_VIS_1_INT_GEN_STATE                      (1L<<23)
+#define BNX2_HC_VIS_1_INT_GEN_STATE_DLE                  (0L<<23)
+#define BNX2_HC_VIS_1_INT_GEN_STATE_NTERRUPT             (1L<<23)
+#define BNX2_HC_VIS_1_STAT_CHAN_ID                       (0x7L<<24)
+#define BNX2_HC_VIS_1_INT_B                              (1L<<27)
+
+#define BNX2_HC_DEBUG_VECT_PEEK                         0x00006910
+#define BNX2_HC_DEBUG_VECT_PEEK_1_VALUE                  (0x7ffL<<0)
+#define BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_EN                (1L<<11)
+#define BNX2_HC_DEBUG_VECT_PEEK_1_SEL                    (0xfL<<12)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_VALUE                  (0x7ffL<<16)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_EN                (1L<<27)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_SEL                    (0xfL<<28)
+
+
+
+/*
+ *  txp_reg definition
+ *  offset: 0x40000
+ */
+#define BNX2_TXP_CPU_MODE                               0x00045000
+#define BNX2_TXP_CPU_MODE_LOCAL_RST                      (1L<<0)
+#define BNX2_TXP_CPU_MODE_STEP_ENA                       (1L<<1)
+#define BNX2_TXP_CPU_MODE_PAGE_0_DATA_ENA                (1L<<2)
+#define BNX2_TXP_CPU_MODE_PAGE_0_INST_ENA                (1L<<3)
+#define BNX2_TXP_CPU_MODE_MSG_BIT1                       (1L<<6)
+#define BNX2_TXP_CPU_MODE_INTERRUPT_ENA                  (1L<<7)
+#define BNX2_TXP_CPU_MODE_SOFT_HALT                      (1L<<10)
+#define BNX2_TXP_CPU_MODE_BAD_DATA_HALT_ENA              (1L<<11)
+#define BNX2_TXP_CPU_MODE_BAD_INST_HALT_ENA              (1L<<12)
+#define BNX2_TXP_CPU_MODE_FIO_ABORT_HALT_ENA             (1L<<13)
+#define BNX2_TXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA        (1L<<15)
+
+#define BNX2_TXP_CPU_STATE                              0x00045004
+#define BNX2_TXP_CPU_STATE_BREAKPOINT                    (1L<<0)
+#define BNX2_TXP_CPU_STATE_BAD_INST_HALTED               (1L<<2)
+#define BNX2_TXP_CPU_STATE_PAGE_0_DATA_HALTED            (1L<<3)
+#define BNX2_TXP_CPU_STATE_PAGE_0_INST_HALTED            (1L<<4)
+#define BNX2_TXP_CPU_STATE_BAD_DATA_ADDR_HALTED          (1L<<5)
+#define BNX2_TXP_CPU_STATE_BAD_pc_HALTED                 (1L<<6)
+#define BNX2_TXP_CPU_STATE_ALIGN_HALTED                  (1L<<7)
+#define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED              (1L<<8)
+#define BNX2_TXP_CPU_STATE_SOFT_HALTED                   (1L<<10)
+#define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW                (1L<<11)
+#define BNX2_TXP_CPU_STATE_INTERRRUPT                    (1L<<12)
+#define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL             (1L<<14)
+#define BNX2_TXP_CPU_STATE_INST_FETCH_STALL              (1L<<15)
+#define BNX2_TXP_CPU_STATE_BLOCKED_READ                  (1L<<31)
+
+#define BNX2_TXP_CPU_EVENT_MASK                         0x00045008
+#define BNX2_TXP_CPU_EVENT_MASK_BREAKPOINT_MASK          (1L<<0)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK     (1L<<2)
+#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK  (1L<<3)
+#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK  (1L<<4)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK        (1L<<5)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK       (1L<<6)
+#define BNX2_TXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK        (1L<<7)
+#define BNX2_TXP_CPU_EVENT_MASK_FIO_ABORT_MASK           (1L<<8)
+#define BNX2_TXP_CPU_EVENT_MASK_SOFT_HALTED_MASK         (1L<<10)
+#define BNX2_TXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK      (1L<<11)
+#define BNX2_TXP_CPU_EVENT_MASK_INTERRUPT_MASK           (1L<<12)
+
+#define BNX2_TXP_CPU_PROGRAM_COUNTER                    0x0004501c
+#define BNX2_TXP_CPU_INSTRUCTION                        0x00045020
+#define BNX2_TXP_CPU_DATA_ACCESS                        0x00045024
+#define BNX2_TXP_CPU_INTERRUPT_ENABLE                   0x00045028
+#define BNX2_TXP_CPU_INTERRUPT_VECTOR                   0x0004502c
+#define BNX2_TXP_CPU_INTERRUPT_SAVED_PC                 0x00045030
+#define BNX2_TXP_CPU_HW_BREAKPOINT                      0x00045034
+#define BNX2_TXP_CPU_HW_BREAKPOINT_DISABLE               (1L<<0)
+#define BNX2_TXP_CPU_HW_BREAKPOINT_ADDRESS               (0x3fffffffL<<2)
+
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK                    0x00045038
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_VALUE             (0x7ffL<<0)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN           (1L<<11)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_SEL               (0xfL<<12)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_VALUE             (0x7ffL<<16)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN           (1L<<27)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_SEL               (0xfL<<28)
+
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR                   0x00045048
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE               (1L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP          (0L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH        (1L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBA                (0x3fffffffL<<2)
+
+#define BNX2_TXP_CPU_REG_FILE                           0x00045200
+#define BNX2_TXP_FTQ_DATA                               0x000453c0
+#define BNX2_TXP_FTQ_CMD                                0x000453f8
+#define BNX2_TXP_FTQ_CMD_OFFSET                          (0x3ffL<<0)
+#define BNX2_TXP_FTQ_CMD_WR_TOP                          (1L<<10)
+#define BNX2_TXP_FTQ_CMD_WR_TOP_0                        (0L<<10)
+#define BNX2_TXP_FTQ_CMD_WR_TOP_1                        (1L<<10)
+#define BNX2_TXP_FTQ_CMD_SFT_RESET                       (1L<<25)
+#define BNX2_TXP_FTQ_CMD_RD_DATA                         (1L<<26)
+#define BNX2_TXP_FTQ_CMD_ADD_INTERVEN                    (1L<<27)
+#define BNX2_TXP_FTQ_CMD_ADD_DATA                        (1L<<28)
+#define BNX2_TXP_FTQ_CMD_INTERVENE_CLR                   (1L<<29)
+#define BNX2_TXP_FTQ_CMD_POP                             (1L<<30)
+#define BNX2_TXP_FTQ_CMD_BUSY                            (1L<<31)
+
+#define BNX2_TXP_FTQ_CTL                                0x000453fc
+#define BNX2_TXP_FTQ_CTL_INTERVENE                       (1L<<0)
+#define BNX2_TXP_FTQ_CTL_OVERFLOW                        (1L<<1)
+#define BNX2_TXP_FTQ_CTL_FORCE_INTERVENE                 (1L<<2)
+#define BNX2_TXP_FTQ_CTL_MAX_DEPTH                       (0x3ffL<<12)
+#define BNX2_TXP_FTQ_CTL_CUR_DEPTH                       (0x3ffL<<22)
+
+#define BNX2_TXP_SCRATCH                                0x00060000
+
+
+/*
+ *  tpat_reg definition
+ *  offset: 0x80000
+ */
+#define BNX2_TPAT_CPU_MODE                              0x00085000
+#define BNX2_TPAT_CPU_MODE_LOCAL_RST                     (1L<<0)
+#define BNX2_TPAT_CPU_MODE_STEP_ENA                      (1L<<1)
+#define BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ENA               (1L<<2)
+#define BNX2_TPAT_CPU_MODE_PAGE_0_INST_ENA               (1L<<3)
+#define BNX2_TPAT_CPU_MODE_MSG_BIT1                      (1L<<6)
+#define BNX2_TPAT_CPU_MODE_INTERRUPT_ENA                 (1L<<7)
+#define BNX2_TPAT_CPU_MODE_SOFT_HALT                     (1L<<10)
+#define BNX2_TPAT_CPU_MODE_BAD_DATA_HALT_ENA             (1L<<11)
+#define BNX2_TPAT_CPU_MODE_BAD_INST_HALT_ENA             (1L<<12)
+#define BNX2_TPAT_CPU_MODE_FIO_ABORT_HALT_ENA            (1L<<13)
+#define BNX2_TPAT_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA       (1L<<15)
+
+#define BNX2_TPAT_CPU_STATE                             0x00085004
+#define BNX2_TPAT_CPU_STATE_BREAKPOINT                   (1L<<0)
+#define BNX2_TPAT_CPU_STATE_BAD_INST_HALTED              (1L<<2)
+#define BNX2_TPAT_CPU_STATE_PAGE_0_DATA_HALTED           (1L<<3)
+#define BNX2_TPAT_CPU_STATE_PAGE_0_INST_HALTED           (1L<<4)
+#define BNX2_TPAT_CPU_STATE_BAD_DATA_ADDR_HALTED         (1L<<5)
+#define BNX2_TPAT_CPU_STATE_BAD_pc_HALTED                (1L<<6)
+#define BNX2_TPAT_CPU_STATE_ALIGN_HALTED                 (1L<<7)
+#define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED             (1L<<8)
+#define BNX2_TPAT_CPU_STATE_SOFT_HALTED                  (1L<<10)
+#define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW               (1L<<11)
+#define BNX2_TPAT_CPU_STATE_INTERRRUPT                   (1L<<12)
+#define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL            (1L<<14)
+#define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL             (1L<<15)
+#define BNX2_TPAT_CPU_STATE_BLOCKED_READ                 (1L<<31)
+
+#define BNX2_TPAT_CPU_EVENT_MASK                        0x00085008
+#define BNX2_TPAT_CPU_EVENT_MASK_BREAKPOINT_MASK         (1L<<0)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_INST_HALTED_MASK    (1L<<2)
+#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK         (1L<<3)
+#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK         (1L<<4)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK       (1L<<5)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_PC_HALTED_MASK      (1L<<6)
+#define BNX2_TPAT_CPU_EVENT_MASK_ALIGN_HALTED_MASK       (1L<<7)
+#define BNX2_TPAT_CPU_EVENT_MASK_FIO_ABORT_MASK          (1L<<8)
+#define BNX2_TPAT_CPU_EVENT_MASK_SOFT_HALTED_MASK        (1L<<10)
+#define BNX2_TPAT_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK     (1L<<11)
+#define BNX2_TPAT_CPU_EVENT_MASK_INTERRUPT_MASK          (1L<<12)
+
+#define BNX2_TPAT_CPU_PROGRAM_COUNTER                   0x0008501c
+#define BNX2_TPAT_CPU_INSTRUCTION                       0x00085020
+#define BNX2_TPAT_CPU_DATA_ACCESS                       0x00085024
+#define BNX2_TPAT_CPU_INTERRUPT_ENABLE                  0x00085028
+#define BNX2_TPAT_CPU_INTERRUPT_VECTOR                  0x0008502c
+#define BNX2_TPAT_CPU_INTERRUPT_SAVED_PC                0x00085030
+#define BNX2_TPAT_CPU_HW_BREAKPOINT                     0x00085034
+#define BNX2_TPAT_CPU_HW_BREAKPOINT_DISABLE              (1L<<0)
+#define BNX2_TPAT_CPU_HW_BREAKPOINT_ADDRESS              (0x3fffffffL<<2)
+
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK                   0x00085038
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_VALUE            (0x7ffL<<0)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_PEEK_EN          (1L<<11)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_SEL              (0xfL<<12)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_VALUE            (0x7ffL<<16)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_PEEK_EN          (1L<<27)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_SEL              (0xfL<<28)
+
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR                  0x00085048
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE              (1L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_JUMP         (0L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH       (1L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_LBA               (0x3fffffffL<<2)
+
+#define BNX2_TPAT_CPU_REG_FILE                          0x00085200
+#define BNX2_TPAT_FTQ_DATA                              0x000853c0
+#define BNX2_TPAT_FTQ_CMD                               0x000853f8
+#define BNX2_TPAT_FTQ_CMD_OFFSET                         (0x3ffL<<0)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP                         (1L<<10)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP_0                       (0L<<10)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP_1                       (1L<<10)
+#define BNX2_TPAT_FTQ_CMD_SFT_RESET                      (1L<<25)
+#define BNX2_TPAT_FTQ_CMD_RD_DATA                        (1L<<26)
+#define BNX2_TPAT_FTQ_CMD_ADD_INTERVEN                   (1L<<27)
+#define BNX2_TPAT_FTQ_CMD_ADD_DATA                       (1L<<28)
+#define BNX2_TPAT_FTQ_CMD_INTERVENE_CLR                  (1L<<29)
+#define BNX2_TPAT_FTQ_CMD_POP                            (1L<<30)
+#define BNX2_TPAT_FTQ_CMD_BUSY                           (1L<<31)
+
+#define BNX2_TPAT_FTQ_CTL                               0x000853fc
+#define BNX2_TPAT_FTQ_CTL_INTERVENE                      (1L<<0)
+#define BNX2_TPAT_FTQ_CTL_OVERFLOW                       (1L<<1)
+#define BNX2_TPAT_FTQ_CTL_FORCE_INTERVENE                (1L<<2)
+#define BNX2_TPAT_FTQ_CTL_MAX_DEPTH                      (0x3ffL<<12)
+#define BNX2_TPAT_FTQ_CTL_CUR_DEPTH                      (0x3ffL<<22)
+
+#define BNX2_TPAT_SCRATCH                               0x000a0000
+
+
+/*
+ *  rxp_reg definition
+ *  offset: 0xc0000
+ */
+#define BNX2_RXP_CPU_MODE                               0x000c5000
+#define BNX2_RXP_CPU_MODE_LOCAL_RST                      (1L<<0)
+#define BNX2_RXP_CPU_MODE_STEP_ENA                       (1L<<1)
+#define BNX2_RXP_CPU_MODE_PAGE_0_DATA_ENA                (1L<<2)
+#define BNX2_RXP_CPU_MODE_PAGE_0_INST_ENA                (1L<<3)
+#define BNX2_RXP_CPU_MODE_MSG_BIT1                       (1L<<6)
+#define BNX2_RXP_CPU_MODE_INTERRUPT_ENA                  (1L<<7)
+#define BNX2_RXP_CPU_MODE_SOFT_HALT                      (1L<<10)
+#define BNX2_RXP_CPU_MODE_BAD_DATA_HALT_ENA              (1L<<11)
+#define BNX2_RXP_CPU_MODE_BAD_INST_HALT_ENA              (1L<<12)
+#define BNX2_RXP_CPU_MODE_FIO_ABORT_HALT_ENA             (1L<<13)
+#define BNX2_RXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA        (1L<<15)
+
+#define BNX2_RXP_CPU_STATE                              0x000c5004
+#define BNX2_RXP_CPU_STATE_BREAKPOINT                    (1L<<0)
+#define BNX2_RXP_CPU_STATE_BAD_INST_HALTED               (1L<<2)
+#define BNX2_RXP_CPU_STATE_PAGE_0_DATA_HALTED            (1L<<3)
+#define BNX2_RXP_CPU_STATE_PAGE_0_INST_HALTED            (1L<<4)
+#define BNX2_RXP_CPU_STATE_BAD_DATA_ADDR_HALTED          (1L<<5)
+#define BNX2_RXP_CPU_STATE_BAD_pc_HALTED                 (1L<<6)
+#define BNX2_RXP_CPU_STATE_ALIGN_HALTED                  (1L<<7)
+#define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED              (1L<<8)
+#define BNX2_RXP_CPU_STATE_SOFT_HALTED                   (1L<<10)
+#define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW                (1L<<11)
+#define BNX2_RXP_CPU_STATE_INTERRRUPT                    (1L<<12)
+#define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL             (1L<<14)
+#define BNX2_RXP_CPU_STATE_INST_FETCH_STALL              (1L<<15)
+#define BNX2_RXP_CPU_STATE_BLOCKED_READ                  (1L<<31)
+
+#define BNX2_RXP_CPU_EVENT_MASK                         0x000c5008
+#define BNX2_RXP_CPU_EVENT_MASK_BREAKPOINT_MASK          (1L<<0)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK     (1L<<2)
+#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK  (1L<<3)
+#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK  (1L<<4)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK        (1L<<5)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK       (1L<<6)
+#define BNX2_RXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK        (1L<<7)
+#define BNX2_RXP_CPU_EVENT_MASK_FIO_ABORT_MASK           (1L<<8)
+#define BNX2_RXP_CPU_EVENT_MASK_SOFT_HALTED_MASK         (1L<<10)
+#define BNX2_RXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK      (1L<<11)
+#define BNX2_RXP_CPU_EVENT_MASK_INTERRUPT_MASK           (1L<<12)
+
+#define BNX2_RXP_CPU_PROGRAM_COUNTER                    0x000c501c
+#define BNX2_RXP_CPU_INSTRUCTION                        0x000c5020
+#define BNX2_RXP_CPU_DATA_ACCESS                        0x000c5024
+#define BNX2_RXP_CPU_INTERRUPT_ENABLE                   0x000c5028
+#define BNX2_RXP_CPU_INTERRUPT_VECTOR                   0x000c502c
+#define BNX2_RXP_CPU_INTERRUPT_SAVED_PC                 0x000c5030
+#define BNX2_RXP_CPU_HW_BREAKPOINT                      0x000c5034
+#define BNX2_RXP_CPU_HW_BREAKPOINT_DISABLE               (1L<<0)
+#define BNX2_RXP_CPU_HW_BREAKPOINT_ADDRESS               (0x3fffffffL<<2)
+
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK                    0x000c5038
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_VALUE             (0x7ffL<<0)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN           (1L<<11)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_SEL               (0xfL<<12)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_VALUE             (0x7ffL<<16)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN           (1L<<27)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_SEL               (0xfL<<28)
+
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR                   0x000c5048
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE               (1L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP          (0L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH        (1L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBA                (0x3fffffffL<<2)
+
+#define BNX2_RXP_CPU_REG_FILE                           0x000c5200
+#define BNX2_RXP_CFTQ_DATA                              0x000c5380
+#define BNX2_RXP_CFTQ_CMD                               0x000c53b8
+#define BNX2_RXP_CFTQ_CMD_OFFSET                         (0x3ffL<<0)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP                         (1L<<10)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP_0                       (0L<<10)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP_1                       (1L<<10)
+#define BNX2_RXP_CFTQ_CMD_SFT_RESET                      (1L<<25)
+#define BNX2_RXP_CFTQ_CMD_RD_DATA                        (1L<<26)
+#define BNX2_RXP_CFTQ_CMD_ADD_INTERVEN                   (1L<<27)
+#define BNX2_RXP_CFTQ_CMD_ADD_DATA                       (1L<<28)
+#define BNX2_RXP_CFTQ_CMD_INTERVENE_CLR                  (1L<<29)
+#define BNX2_RXP_CFTQ_CMD_POP                            (1L<<30)
+#define BNX2_RXP_CFTQ_CMD_BUSY                           (1L<<31)
+
+#define BNX2_RXP_CFTQ_CTL                               0x000c53bc
+#define BNX2_RXP_CFTQ_CTL_INTERVENE                      (1L<<0)
+#define BNX2_RXP_CFTQ_CTL_OVERFLOW                       (1L<<1)
+#define BNX2_RXP_CFTQ_CTL_FORCE_INTERVENE                (1L<<2)
+#define BNX2_RXP_CFTQ_CTL_MAX_DEPTH                      (0x3ffL<<12)
+#define BNX2_RXP_CFTQ_CTL_CUR_DEPTH                      (0x3ffL<<22)
+
+#define BNX2_RXP_FTQ_DATA                               0x000c53c0
+#define BNX2_RXP_FTQ_CMD                                0x000c53f8
+#define BNX2_RXP_FTQ_CMD_OFFSET                          (0x3ffL<<0)
+#define BNX2_RXP_FTQ_CMD_WR_TOP                          (1L<<10)
+#define BNX2_RXP_FTQ_CMD_WR_TOP_0                        (0L<<10)
+#define BNX2_RXP_FTQ_CMD_WR_TOP_1                        (1L<<10)
+#define BNX2_RXP_FTQ_CMD_SFT_RESET                       (1L<<25)
+#define BNX2_RXP_FTQ_CMD_RD_DATA                         (1L<<26)
+#define BNX2_RXP_FTQ_CMD_ADD_INTERVEN                    (1L<<27)
+#define BNX2_RXP_FTQ_CMD_ADD_DATA                        (1L<<28)
+#define BNX2_RXP_FTQ_CMD_INTERVENE_CLR                   (1L<<29)
+#define BNX2_RXP_FTQ_CMD_POP                             (1L<<30)
+#define BNX2_RXP_FTQ_CMD_BUSY                            (1L<<31)
+
+#define BNX2_RXP_FTQ_CTL                                0x000c53fc
+#define BNX2_RXP_FTQ_CTL_INTERVENE                       (1L<<0)
+#define BNX2_RXP_FTQ_CTL_OVERFLOW                        (1L<<1)
+#define BNX2_RXP_FTQ_CTL_FORCE_INTERVENE                 (1L<<2)
+#define BNX2_RXP_FTQ_CTL_MAX_DEPTH                       (0x3ffL<<12)
+#define BNX2_RXP_FTQ_CTL_CUR_DEPTH                       (0x3ffL<<22)
+
+#define BNX2_RXP_SCRATCH                                0x000e0000
+
+
+/*
+ *  com_reg definition
+ *  offset: 0x100000
+ */
+#define BNX2_COM_CPU_MODE                               0x00105000
+#define BNX2_COM_CPU_MODE_LOCAL_RST                      (1L<<0)
+#define BNX2_COM_CPU_MODE_STEP_ENA                       (1L<<1)
+#define BNX2_COM_CPU_MODE_PAGE_0_DATA_ENA                (1L<<2)
+#define BNX2_COM_CPU_MODE_PAGE_0_INST_ENA                (1L<<3)
+#define BNX2_COM_CPU_MODE_MSG_BIT1                       (1L<<6)
+#define BNX2_COM_CPU_MODE_INTERRUPT_ENA                  (1L<<7)
+#define BNX2_COM_CPU_MODE_SOFT_HALT                      (1L<<10)
+#define BNX2_COM_CPU_MODE_BAD_DATA_HALT_ENA              (1L<<11)
+#define BNX2_COM_CPU_MODE_BAD_INST_HALT_ENA              (1L<<12)
+#define BNX2_COM_CPU_MODE_FIO_ABORT_HALT_ENA             (1L<<13)
+#define BNX2_COM_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA        (1L<<15)
+
+#define BNX2_COM_CPU_STATE                              0x00105004
+#define BNX2_COM_CPU_STATE_BREAKPOINT                    (1L<<0)
+#define BNX2_COM_CPU_STATE_BAD_INST_HALTED               (1L<<2)
+#define BNX2_COM_CPU_STATE_PAGE_0_DATA_HALTED            (1L<<3)
+#define BNX2_COM_CPU_STATE_PAGE_0_INST_HALTED            (1L<<4)
+#define BNX2_COM_CPU_STATE_BAD_DATA_ADDR_HALTED          (1L<<5)
+#define BNX2_COM_CPU_STATE_BAD_pc_HALTED                 (1L<<6)
+#define BNX2_COM_CPU_STATE_ALIGN_HALTED                  (1L<<7)
+#define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED              (1L<<8)
+#define BNX2_COM_CPU_STATE_SOFT_HALTED                   (1L<<10)
+#define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW                (1L<<11)
+#define BNX2_COM_CPU_STATE_INTERRRUPT                    (1L<<12)
+#define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL             (1L<<14)
+#define BNX2_COM_CPU_STATE_INST_FETCH_STALL              (1L<<15)
+#define BNX2_COM_CPU_STATE_BLOCKED_READ                  (1L<<31)
+
+#define BNX2_COM_CPU_EVENT_MASK                         0x00105008
+#define BNX2_COM_CPU_EVENT_MASK_BREAKPOINT_MASK          (1L<<0)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_INST_HALTED_MASK     (1L<<2)
+#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK  (1L<<3)
+#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK  (1L<<4)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK        (1L<<5)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_PC_HALTED_MASK       (1L<<6)
+#define BNX2_COM_CPU_EVENT_MASK_ALIGN_HALTED_MASK        (1L<<7)
+#define BNX2_COM_CPU_EVENT_MASK_FIO_ABORT_MASK           (1L<<8)
+#define BNX2_COM_CPU_EVENT_MASK_SOFT_HALTED_MASK         (1L<<10)
+#define BNX2_COM_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK      (1L<<11)
+#define BNX2_COM_CPU_EVENT_MASK_INTERRUPT_MASK           (1L<<12)
+
+#define BNX2_COM_CPU_PROGRAM_COUNTER                    0x0010501c
+#define BNX2_COM_CPU_INSTRUCTION                        0x00105020
+#define BNX2_COM_CPU_DATA_ACCESS                        0x00105024
+#define BNX2_COM_CPU_INTERRUPT_ENABLE                   0x00105028
+#define BNX2_COM_CPU_INTERRUPT_VECTOR                   0x0010502c
+#define BNX2_COM_CPU_INTERRUPT_SAVED_PC                 0x00105030
+#define BNX2_COM_CPU_HW_BREAKPOINT                      0x00105034
+#define BNX2_COM_CPU_HW_BREAKPOINT_DISABLE               (1L<<0)
+#define BNX2_COM_CPU_HW_BREAKPOINT_ADDRESS               (0x3fffffffL<<2)
+
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK                    0x00105038
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_VALUE             (0x7ffL<<0)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_PEEK_EN           (1L<<11)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_SEL               (0xfL<<12)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_VALUE             (0x7ffL<<16)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_PEEK_EN           (1L<<27)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_SEL               (0xfL<<28)
+
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR                   0x00105048
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE               (1L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_JUMP          (0L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH        (1L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_LBA                (0x3fffffffL<<2)
+
+#define BNX2_COM_CPU_REG_FILE                           0x00105200
+#define BNX2_COM_COMXQ_FTQ_DATA                         0x00105340
+#define BNX2_COM_COMXQ_FTQ_CMD                          0x00105378
+#define BNX2_COM_COMXQ_FTQ_CMD_OFFSET                    (0x3ffL<<0)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP                    (1L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0                  (0L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1                  (1L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_SFT_RESET                 (1L<<25)
+#define BNX2_COM_COMXQ_FTQ_CMD_RD_DATA                   (1L<<26)
+#define BNX2_COM_COMXQ_FTQ_CMD_ADD_INTERVEN              (1L<<27)
+#define BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA                  (1L<<28)
+#define BNX2_COM_COMXQ_FTQ_CMD_INTERVENE_CLR             (1L<<29)
+#define BNX2_COM_COMXQ_FTQ_CMD_POP                       (1L<<30)
+#define BNX2_COM_COMXQ_FTQ_CMD_BUSY                      (1L<<31)
+
+#define BNX2_COM_COMXQ_FTQ_CTL                          0x0010537c
+#define BNX2_COM_COMXQ_FTQ_CTL_INTERVENE                 (1L<<0)
+#define BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW                  (1L<<1)
+#define BNX2_COM_COMXQ_FTQ_CTL_FORCE_INTERVENE           (1L<<2)
+#define BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTH                 (0x3ffL<<12)
+#define BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTH                 (0x3ffL<<22)
+
+#define BNX2_COM_COMTQ_FTQ_DATA                         0x00105380
+#define BNX2_COM_COMTQ_FTQ_CMD                          0x001053b8
+#define BNX2_COM_COMTQ_FTQ_CMD_OFFSET                    (0x3ffL<<0)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP                    (1L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0                  (0L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1                  (1L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_SFT_RESET                 (1L<<25)
+#define BNX2_COM_COMTQ_FTQ_CMD_RD_DATA                   (1L<<26)
+#define BNX2_COM_COMTQ_FTQ_CMD_ADD_INTERVEN              (1L<<27)
+#define BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA                  (1L<<28)
+#define BNX2_COM_COMTQ_FTQ_CMD_INTERVENE_CLR             (1L<<29)
+#define BNX2_COM_COMTQ_FTQ_CMD_POP                       (1L<<30)
+#define BNX2_COM_COMTQ_FTQ_CMD_BUSY                      (1L<<31)
+
+#define BNX2_COM_COMTQ_FTQ_CTL                          0x001053bc
+#define BNX2_COM_COMTQ_FTQ_CTL_INTERVENE                 (1L<<0)
+#define BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW                  (1L<<1)
+#define BNX2_COM_COMTQ_FTQ_CTL_FORCE_INTERVENE           (1L<<2)
+#define BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTH                 (0x3ffL<<12)
+#define BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTH                 (0x3ffL<<22)
+
+#define BNX2_COM_COMQ_FTQ_DATA                          0x001053c0
+#define BNX2_COM_COMQ_FTQ_CMD                           0x001053f8
+#define BNX2_COM_COMQ_FTQ_CMD_OFFSET                     (0x3ffL<<0)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP                     (1L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0                   (0L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1                   (1L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_SFT_RESET                  (1L<<25)
+#define BNX2_COM_COMQ_FTQ_CMD_RD_DATA                    (1L<<26)
+#define BNX2_COM_COMQ_FTQ_CMD_ADD_INTERVEN               (1L<<27)
+#define BNX2_COM_COMQ_FTQ_CMD_ADD_DATA                   (1L<<28)
+#define BNX2_COM_COMQ_FTQ_CMD_INTERVENE_CLR              (1L<<29)
+#define BNX2_COM_COMQ_FTQ_CMD_POP                        (1L<<30)
+#define BNX2_COM_COMQ_FTQ_CMD_BUSY                       (1L<<31)
+
+#define BNX2_COM_COMQ_FTQ_CTL                           0x001053fc
+#define BNX2_COM_COMQ_FTQ_CTL_INTERVENE                  (1L<<0)
+#define BNX2_COM_COMQ_FTQ_CTL_OVERFLOW                   (1L<<1)
+#define BNX2_COM_COMQ_FTQ_CTL_FORCE_INTERVENE            (1L<<2)
+#define BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH                  (0x3ffL<<12)
+#define BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH                  (0x3ffL<<22)
+
+#define BNX2_COM_SCRATCH                                0x00120000
+
+
+/*
+ *  cp_reg definition
+ *  offset: 0x180000
+ */
+#define BNX2_CP_CPU_MODE                                0x00185000
+#define BNX2_CP_CPU_MODE_LOCAL_RST                       (1L<<0)
+#define BNX2_CP_CPU_MODE_STEP_ENA                        (1L<<1)
+#define BNX2_CP_CPU_MODE_PAGE_0_DATA_ENA                 (1L<<2)
+#define BNX2_CP_CPU_MODE_PAGE_0_INST_ENA                 (1L<<3)
+#define BNX2_CP_CPU_MODE_MSG_BIT1                        (1L<<6)
+#define BNX2_CP_CPU_MODE_INTERRUPT_ENA                   (1L<<7)
+#define BNX2_CP_CPU_MODE_SOFT_HALT                       (1L<<10)
+#define BNX2_CP_CPU_MODE_BAD_DATA_HALT_ENA               (1L<<11)
+#define BNX2_CP_CPU_MODE_BAD_INST_HALT_ENA               (1L<<12)
+#define BNX2_CP_CPU_MODE_FIO_ABORT_HALT_ENA              (1L<<13)
+#define BNX2_CP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA         (1L<<15)
+
+#define BNX2_CP_CPU_STATE                               0x00185004
+#define BNX2_CP_CPU_STATE_BREAKPOINT                     (1L<<0)
+#define BNX2_CP_CPU_STATE_BAD_INST_HALTED                (1L<<2)
+#define BNX2_CP_CPU_STATE_PAGE_0_DATA_HALTED             (1L<<3)
+#define BNX2_CP_CPU_STATE_PAGE_0_INST_HALTED             (1L<<4)
+#define BNX2_CP_CPU_STATE_BAD_DATA_ADDR_HALTED           (1L<<5)
+#define BNX2_CP_CPU_STATE_BAD_pc_HALTED                  (1L<<6)
+#define BNX2_CP_CPU_STATE_ALIGN_HALTED                   (1L<<7)
+#define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED               (1L<<8)
+#define BNX2_CP_CPU_STATE_SOFT_HALTED                    (1L<<10)
+#define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW                 (1L<<11)
+#define BNX2_CP_CPU_STATE_INTERRRUPT                     (1L<<12)
+#define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL              (1L<<14)
+#define BNX2_CP_CPU_STATE_INST_FETCH_STALL               (1L<<15)
+#define BNX2_CP_CPU_STATE_BLOCKED_READ                   (1L<<31)
+
+#define BNX2_CP_CPU_EVENT_MASK                          0x00185008
+#define BNX2_CP_CPU_EVENT_MASK_BREAKPOINT_MASK           (1L<<0)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK      (1L<<2)
+#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK   (1L<<3)
+#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK   (1L<<4)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK         (1L<<5)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK        (1L<<6)
+#define BNX2_CP_CPU_EVENT_MASK_ALIGN_HALTED_MASK         (1L<<7)
+#define BNX2_CP_CPU_EVENT_MASK_FIO_ABORT_MASK            (1L<<8)
+#define BNX2_CP_CPU_EVENT_MASK_SOFT_HALTED_MASK          (1L<<10)
+#define BNX2_CP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK       (1L<<11)
+#define BNX2_CP_CPU_EVENT_MASK_INTERRUPT_MASK            (1L<<12)
+
+#define BNX2_CP_CPU_PROGRAM_COUNTER                     0x0018501c
+#define BNX2_CP_CPU_INSTRUCTION                         0x00185020
+#define BNX2_CP_CPU_DATA_ACCESS                         0x00185024
+#define BNX2_CP_CPU_INTERRUPT_ENABLE                    0x00185028
+#define BNX2_CP_CPU_INTERRUPT_VECTOR                    0x0018502c
+#define BNX2_CP_CPU_INTERRUPT_SAVED_PC                  0x00185030
+#define BNX2_CP_CPU_HW_BREAKPOINT                       0x00185034
+#define BNX2_CP_CPU_HW_BREAKPOINT_DISABLE                (1L<<0)
+#define BNX2_CP_CPU_HW_BREAKPOINT_ADDRESS                (0x3fffffffL<<2)
+
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK                     0x00185038
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VALUE              (0x7ffL<<0)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN            (1L<<11)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SEL                (0xfL<<12)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VALUE              (0x7ffL<<16)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN            (1L<<27)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SEL                (0xfL<<28)
+
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR                    0x00185048
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE                (1L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP           (0L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH         (1L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_LBA                 (0x3fffffffL<<2)
+
+#define BNX2_CP_CPU_REG_FILE                            0x00185200
+#define BNX2_CP_CPQ_FTQ_DATA                            0x001853c0
+#define BNX2_CP_CPQ_FTQ_CMD                             0x001853f8
+#define BNX2_CP_CPQ_FTQ_CMD_OFFSET                       (0x3ffL<<0)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP                       (1L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0                     (0L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1                     (1L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_SFT_RESET                    (1L<<25)
+#define BNX2_CP_CPQ_FTQ_CMD_RD_DATA                      (1L<<26)
+#define BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEN                 (1L<<27)
+#define BNX2_CP_CPQ_FTQ_CMD_ADD_DATA                     (1L<<28)
+#define BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CLR                (1L<<29)
+#define BNX2_CP_CPQ_FTQ_CMD_POP                          (1L<<30)
+#define BNX2_CP_CPQ_FTQ_CMD_BUSY                         (1L<<31)
+
+#define BNX2_CP_CPQ_FTQ_CTL                             0x001853fc
+#define BNX2_CP_CPQ_FTQ_CTL_INTERVENE                    (1L<<0)
+#define BNX2_CP_CPQ_FTQ_CTL_OVERFLOW                     (1L<<1)
+#define BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERVENE              (1L<<2)
+#define BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH                    (0x3ffL<<12)
+#define BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH                    (0x3ffL<<22)
+
+#define BNX2_CP_SCRATCH                                 0x001a0000
+
+
+/*
+ *  mcp_reg definition
+ *  offset: 0x140000
+ */
+#define BNX2_MCP_CPU_MODE                               0x00145000
+#define BNX2_MCP_CPU_MODE_LOCAL_RST                      (1L<<0)
+#define BNX2_MCP_CPU_MODE_STEP_ENA                       (1L<<1)
+#define BNX2_MCP_CPU_MODE_PAGE_0_DATA_ENA                (1L<<2)
+#define BNX2_MCP_CPU_MODE_PAGE_0_INST_ENA                (1L<<3)
+#define BNX2_MCP_CPU_MODE_MSG_BIT1                       (1L<<6)
+#define BNX2_MCP_CPU_MODE_INTERRUPT_ENA                  (1L<<7)
+#define BNX2_MCP_CPU_MODE_SOFT_HALT                      (1L<<10)
+#define BNX2_MCP_CPU_MODE_BAD_DATA_HALT_ENA              (1L<<11)
+#define BNX2_MCP_CPU_MODE_BAD_INST_HALT_ENA              (1L<<12)
+#define BNX2_MCP_CPU_MODE_FIO_ABORT_HALT_ENA             (1L<<13)
+#define BNX2_MCP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA        (1L<<15)
+
+#define BNX2_MCP_CPU_STATE                              0x00145004
+#define BNX2_MCP_CPU_STATE_BREAKPOINT                    (1L<<0)
+#define BNX2_MCP_CPU_STATE_BAD_INST_HALTED               (1L<<2)
+#define BNX2_MCP_CPU_STATE_PAGE_0_DATA_HALTED            (1L<<3)
+#define BNX2_MCP_CPU_STATE_PAGE_0_INST_HALTED            (1L<<4)
+#define BNX2_MCP_CPU_STATE_BAD_DATA_ADDR_HALTED          (1L<<5)
+#define BNX2_MCP_CPU_STATE_BAD_pc_HALTED                 (1L<<6)
+#define BNX2_MCP_CPU_STATE_ALIGN_HALTED                  (1L<<7)
+#define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED              (1L<<8)
+#define BNX2_MCP_CPU_STATE_SOFT_HALTED                   (1L<<10)
+#define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW                (1L<<11)
+#define BNX2_MCP_CPU_STATE_INTERRRUPT                    (1L<<12)
+#define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL             (1L<<14)
+#define BNX2_MCP_CPU_STATE_INST_FETCH_STALL              (1L<<15)
+#define BNX2_MCP_CPU_STATE_BLOCKED_READ                  (1L<<31)
+
+#define BNX2_MCP_CPU_EVENT_MASK                         0x00145008
+#define BNX2_MCP_CPU_EVENT_MASK_BREAKPOINT_MASK          (1L<<0)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK     (1L<<2)
+#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK  (1L<<3)
+#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK  (1L<<4)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK        (1L<<5)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK       (1L<<6)
+#define BNX2_MCP_CPU_EVENT_MASK_ALIGN_HALTED_MASK        (1L<<7)
+#define BNX2_MCP_CPU_EVENT_MASK_FIO_ABORT_MASK           (1L<<8)
+#define BNX2_MCP_CPU_EVENT_MASK_SOFT_HALTED_MASK         (1L<<10)
+#define BNX2_MCP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK      (1L<<11)
+#define BNX2_MCP_CPU_EVENT_MASK_INTERRUPT_MASK           (1L<<12)
+
+#define BNX2_MCP_CPU_PROGRAM_COUNTER                    0x0014501c
+#define BNX2_MCP_CPU_INSTRUCTION                        0x00145020
+#define BNX2_MCP_CPU_DATA_ACCESS                        0x00145024
+#define BNX2_MCP_CPU_INTERRUPT_ENABLE                   0x00145028
+#define BNX2_MCP_CPU_INTERRUPT_VECTOR                   0x0014502c
+#define BNX2_MCP_CPU_INTERRUPT_SAVED_PC                 0x00145030
+#define BNX2_MCP_CPU_HW_BREAKPOINT                      0x00145034
+#define BNX2_MCP_CPU_HW_BREAKPOINT_DISABLE               (1L<<0)
+#define BNX2_MCP_CPU_HW_BREAKPOINT_ADDRESS               (0x3fffffffL<<2)
+
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK                    0x00145038
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_VALUE             (0x7ffL<<0)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN           (1L<<11)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_SEL               (0xfL<<12)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_VALUE             (0x7ffL<<16)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN           (1L<<27)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_SEL               (0xfL<<28)
+
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR                   0x00145048
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE               (1L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP          (0L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH        (1L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBA                (0x3fffffffL<<2)
+
+#define BNX2_MCP_CPU_REG_FILE                           0x00145200
+#define BNX2_MCP_MCPQ_FTQ_DATA                          0x001453c0
+#define BNX2_MCP_MCPQ_FTQ_CMD                           0x001453f8
+#define BNX2_MCP_MCPQ_FTQ_CMD_OFFSET                     (0x3ffL<<0)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP                     (1L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0                   (0L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1                   (1L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET                  (1L<<25)
+#define BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA                    (1L<<26)
+#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERVEN               (1L<<27)
+#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA                   (1L<<28)
+#define BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE_CLR              (1L<<29)
+#define BNX2_MCP_MCPQ_FTQ_CMD_POP                        (1L<<30)
+#define BNX2_MCP_MCPQ_FTQ_CMD_BUSY                       (1L<<31)
+
+#define BNX2_MCP_MCPQ_FTQ_CTL                           0x001453fc
+#define BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE                  (1L<<0)
+#define BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW                   (1L<<1)
+#define BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTERVENE            (1L<<2)
+#define BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH                  (0x3ffL<<12)
+#define BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH                  (0x3ffL<<22)
+
+#define BNX2_MCP_ROM                                    0x00150000
+#define BNX2_MCP_SCRATCH                                0x00160000
+
+
+#define NUM_MC_HASH_REGISTERS   8
+
+
+/* PHY_ID1: bits 31-16; PHY_ID2: bits 15-0.  */
+#define PHY_BCM5706_PHY_ID                          0x00206160
+
+#define PHY_ID(id)                                  ((id) & 0xfffffff0)
+#define PHY_REV_ID(id)                              ((id) & 0xf)
+
+#define MIN_ETHERNET_PACKET_SIZE        60
+#define MAX_ETHERNET_PACKET_SIZE        1514
+#define MAX_ETHERNET_JUMBO_PACKET_SIZE  9014
+
+#define RX_COPY_THRESH                  92
+
+#define DMA_READ_CHANS  5
+#define DMA_WRITE_CHANS 3
+
+#define BCM_PAGE_BITS   12
+#define BCM_PAGE_SIZE   (1 << BCM_PAGE_BITS)
+
+#define TX_DESC_CNT  (BCM_PAGE_SIZE / sizeof(struct tx_bd))
+#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1)
+
+#define RX_DESC_CNT  (BCM_PAGE_SIZE / sizeof(struct rx_bd))
+#define MAX_RX_DESC_CNT (RX_DESC_CNT - 1)
+
+#define NEXT_TX_BD(x) (((x) & (MAX_TX_DESC_CNT - 1)) ==                 \
+                (MAX_TX_DESC_CNT - 1)) ?                                \
+        (x) + 2 : (x) + 1
+
+#define TX_RING_IDX(x) ((x) & MAX_TX_DESC_CNT)
+
+#define NEXT_RX_BD(x) (((x) & (MAX_RX_DESC_CNT - 1)) ==                 \
+                (MAX_RX_DESC_CNT - 1)) ?                                \
+        (x) + 2 : (x) + 1
+
+#define RX_RING_IDX(x) ((x) & MAX_RX_DESC_CNT)
+
+
+/* Context size. */
+#define CTX_SHIFT                   7
+#define CTX_SIZE                    (1 << CTX_SHIFT)
+#define CTX_MASK                    (CTX_SIZE - 1)
+#define GET_CID_ADDR(_cid)          ((_cid) << CTX_SHIFT)
+#define GET_CID(_cid_addr)          ((_cid_addr) >> CTX_SHIFT)
+
+#define PHY_CTX_SHIFT               6
+#define PHY_CTX_SIZE                (1 << PHY_CTX_SHIFT)
+#define PHY_CTX_MASK                (PHY_CTX_SIZE - 1)
+#define GET_PCID_ADDR(_pcid)        ((_pcid) << PHY_CTX_SHIFT)
+#define GET_PCID(_pcid_addr)        ((_pcid_addr) >> PHY_CTX_SHIFT)
+
+#define MB_KERNEL_CTX_SHIFT         8
+#define MB_KERNEL_CTX_SIZE          (1 << MB_KERNEL_CTX_SHIFT)
+#define MB_KERNEL_CTX_MASK          (MB_KERNEL_CTX_SIZE - 1)
+#define MB_GET_CID_ADDR(_cid)       (0x10000 + ((_cid) << MB_KERNEL_CTX_SHIFT))
+
+#define MAX_CID_CNT                 0x4000
+#define MAX_CID_ADDR                (GET_CID_ADDR(MAX_CID_CNT))
+#define INVALID_CID_ADDR            0xffffffff
+
+#define TX_CID          16
+#define RX_CID          0
+
+#define MB_TX_CID_ADDR  MB_GET_CID_ADDR(TX_CID)
+#define MB_RX_CID_ADDR  MB_GET_CID_ADDR(RX_CID)
+
+struct sw_bd {
+        struct sk_buff          *skb;
+        DECLARE_PCI_UNMAP_ADDR(mapping)
+};
+
+/* Buffered flash (Atmel: AT45DB011B) specific information */
+#define SEEPROM_PAGE_BITS                       2
+#define SEEPROM_PHY_PAGE_SIZE                   (1 << SEEPROM_PAGE_BITS)
+#define SEEPROM_BYTE_ADDR_MASK                  (SEEPROM_PHY_PAGE_SIZE-1)
+#define SEEPROM_PAGE_SIZE                       4
+#define SEEPROM_TOTAL_SIZE                      65536
+
+#define BUFFERED_FLASH_PAGE_BITS                9
+#define BUFFERED_FLASH_PHY_PAGE_SIZE            (1 << BUFFERED_FLASH_PAGE_BITS)
+#define BUFFERED_FLASH_BYTE_ADDR_MASK           (BUFFERED_FLASH_PHY_PAGE_SIZE-1)
+#define BUFFERED_FLASH_PAGE_SIZE                264
+#define BUFFERED_FLASH_TOTAL_SIZE               131072
+
+#define SAIFUN_FLASH_PAGE_BITS                  8
+#define SAIFUN_FLASH_PHY_PAGE_SIZE              (1 << SAIFUN_FLASH_PAGE_BITS)
+#define SAIFUN_FLASH_BYTE_ADDR_MASK             (SAIFUN_FLASH_PHY_PAGE_SIZE-1)
+#define SAIFUN_FLASH_PAGE_SIZE                  256
+#define SAIFUN_FLASH_BASE_TOTAL_SIZE            65536
+
+#define NVRAM_TIMEOUT_COUNT                     30000
+
+
+#define FLASH_STRAP_MASK                        (BNX2_NVM_CFG1_FLASH_MODE   | \
+                                                 BNX2_NVM_CFG1_BUFFER_MODE  | \
+                                                 BNX2_NVM_CFG1_PROTECT_MODE | \
+                                                 BNX2_NVM_CFG1_FLASH_SIZE)
+
+struct flash_spec {
+        u32 strapping;
+        u32 config1;
+        u32 config2;
+        u32 config3;
+        u32 write1;
+        u32 buffered;
+        u32 page_bits;
+        u32 page_size;
+        u32 addr_mask;
+        u32 total_size;
+        u8  *name;
+};
+
+struct bnx2 {
+        /* Fields used in the tx and intr/napi performance paths are grouped */
+        /* together in the beginning of the structure. */
+        void __iomem            *regview;
+
+        struct net_device       *dev;
+        struct pci_dev          *pdev;
+
+        atomic_t                intr_sem;
+
+        struct status_block     *status_blk;
+        u32                     last_status_idx;
+
+        atomic_t                tx_avail_bd;
+        struct tx_bd            *tx_desc_ring;
+        struct sw_bd            *tx_buf_ring;
+        u32                     tx_prod_bseq;
+        u16                     tx_prod;
+        u16                     tx_cons;
+
+#ifdef BCM_VLAN 
+        struct                  vlan_group *vlgrp;
+#endif
+
+        u32                     rx_offset;
+        u32                     rx_buf_use_size;        /* useable size */
+        u32                     rx_buf_size;            /* with alignment */
+        struct rx_bd            *rx_desc_ring;
+        struct sw_bd            *rx_buf_ring;
+        u32                     rx_prod_bseq;
+        u16                     rx_prod;
+        u16                     rx_cons;
+
+        u32                     rx_csum;
+
+        /* Only used to synchronize netif_stop_queue/wake_queue when tx */
+        /* ring is full */
+        spinlock_t              tx_lock;
+
+        /* End of fileds used in the performance code paths. */
+
+        char                    *name;
+
+        int                     timer_interval;
+        struct                  timer_list timer;
+        struct work_struct      reset_task;
+
+        /* Used to synchronize phy accesses. */
+        spinlock_t              phy_lock;
+
+        u32                     flags;
+#define PCIX_FLAG                       1
+#define PCI_32BIT_FLAG                  2
+#define ONE_TDMA_FLAG                   4       /* no longer used */
+#define NO_WOL_FLAG                     8
+#define USING_DAC_FLAG                  0x10
+#define USING_MSI_FLAG                  0x20
+
+        u32                     phy_flags;
+#define PHY_SERDES_FLAG                 1
+#define PHY_CRC_FIX_FLAG                2
+#define PHY_PARALLEL_DETECT_FLAG        4
+#define PHY_INT_MODE_MASK_FLAG          0x300
+#define PHY_INT_MODE_AUTO_POLLING_FLAG  0x100
+#define PHY_INT_MODE_LINK_READY_FLAG    0x200
+
+        u32                     chip_id;
+        /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
+#define CHIP_NUM(bp)                    (((bp)->chip_id) & 0xffff0000)
+#define CHIP_NUM_5706                   0x57060000
+
+#define CHIP_REV(bp)                    (((bp)->chip_id) & 0x0000f000)
+#define CHIP_REV_Ax                     0x00000000
+#define CHIP_REV_Bx                     0x00001000
+#define CHIP_REV_Cx                     0x00002000
+    
+#define CHIP_METAL(bp)                  (((bp)->chip_id) & 0x00000ff0)
+#define CHIP_BONDING(bp)                (((bp)->chip_id) & 0x0000000f)
+
+#define CHIP_ID(bp)                     (((bp)->chip_id) & 0xfffffff0)
+#define CHIP_ID_5706_A0                 0x57060000
+#define CHIP_ID_5706_A1                 0x57060010
+
+#define CHIP_BOND_ID(bp)                (((bp)->chip_id) & 0xf)
+
+/* A serdes chip will have the first bit of the bond id set. */
+#define CHIP_BOND_ID_SERDES_BIT         0x01
+
+        u32                     phy_addr;
+        u32                     phy_id;
+        
+        u16                     bus_speed_mhz;
+        u8                      wol;
+
+        u8                      fw_timed_out;
+
+        u16                     fw_wr_seq;
+        u16                     fw_drv_pulse_wr_seq;
+
+        int                     tx_ring_size;
+        dma_addr_t              tx_desc_mapping;
+
+
+        int                     rx_ring_size;
+        dma_addr_t              rx_desc_mapping;
+
+        u16                     tx_quick_cons_trip;
+        u16                     tx_quick_cons_trip_int;
+        u16                     rx_quick_cons_trip;
+        u16                     rx_quick_cons_trip_int;
+        u16                     comp_prod_trip;
+        u16                     comp_prod_trip_int;
+        u16                     tx_ticks;
+        u16                     tx_ticks_int;
+        u16                     com_ticks;
+        u16                     com_ticks_int;
+        u16                     cmd_ticks;
+        u16                     cmd_ticks_int;
+        u16                     rx_ticks;
+        u16                     rx_ticks_int;
+
+        u32                     stats_ticks;
+
+        dma_addr_t              status_blk_mapping;
+
+        struct statistics_block *stats_blk;
+        dma_addr_t              stats_blk_mapping;
+
+        u32                     rx_mode;
+
+        u16                     req_line_speed;
+        u8                      req_duplex;
+
+        u8                      link_up;
+
+        u16                     line_speed;
+        u8                      duplex;
+        u8                      flow_ctrl;      /* actual flow ctrl settings */
+                                                /* may be different from     */
+                                                /* req_flow_ctrl if autoneg  */
+#define FLOW_CTRL_TX            1
+#define FLOW_CTRL_RX            2
+
+        u32                     advertising;
+
+        u8                      req_flow_ctrl;  /* flow ctrl advertisement */ 
+                                                /* settings or forced      */
+                                                /* settings                */
+        u8                      autoneg;
+#define AUTONEG_SPEED           1
+#define AUTONEG_FLOW_CTRL       2
+
+        u8                      loopback;
+#define MAC_LOOPBACK            1
+#define PHY_LOOPBACK            2
+
+        u8                      serdes_an_pending;
+#define SERDES_AN_TIMEOUT       (2 * HZ)
+
+        u8                      mac_addr[8];
+
+        u32                     fw_ver;
+
+        int                     pm_cap;
+        int                     pcix_cap;
+
+        struct net_device_stats net_stats;
+
+        struct flash_spec       *flash_info;
+};
+
+static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);
+static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val);
+
+#define REG_RD(bp, offset)                                      \
+        readl(bp->regview + offset)
+
+#define REG_WR(bp, offset, val)                                 \
+        writel(val, bp->regview + offset)
+
+#define REG_WR16(bp, offset, val)                               \
+        writew(val, bp->regview + offset)
+
+#define REG_RD_IND(bp, offset)                                  \
+        bnx2_reg_rd_ind(bp, offset)
+
+#define REG_WR_IND(bp, offset, val)                             \
+        bnx2_reg_wr_ind(bp, offset, val)
+
+/* Indirect context access.  Unlike the MBQ_WR, these macros will not
+ * trigger a chip event. */
+static void bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val);
+
+#define CTX_WR(bp, cid_addr, offset, val)                       \
+        bnx2_ctx_wr(bp, cid_addr, offset, val)
+
+struct cpu_reg {
+        u32 mode;
+        u32 mode_value_halt;
+        u32 mode_value_sstep;
+
+        u32 state;
+        u32 state_value_clear;
+
+        u32 gpr0;
+        u32 evmask;
+        u32 pc;
+        u32 inst;
+        u32 bp;
+
+        u32 spad_base;
+
+        u32 mips_view_base;
+};
+
+struct fw_info {
+        u32 ver_major;
+        u32 ver_minor;
+        u32 ver_fix;
+
+        u32 start_addr;
+
+        /* Text section. */
+        u32 text_addr;
+        u32 text_len;
+        u32 text_index;
+        u32 *text;
+
+        /* Data section. */
+        u32 data_addr;
+        u32 data_len;
+        u32 data_index;
+        u32 *data;
+
+        /* SBSS section. */
+        u32 sbss_addr;
+        u32 sbss_len;
+        u32 sbss_index;
+        u32 *sbss;
+
+        /* BSS section. */
+        u32 bss_addr;
+        u32 bss_len;
+        u32 bss_index;
+        u32 *bss;
+
+        /* Read-only section. */
+        u32 rodata_addr;
+        u32 rodata_len;
+        u32 rodata_index;
+        u32 *rodata;
+};
+
+#define RV2P_PROC1                              0
+#define RV2P_PROC2                              1
+
+
+/* This value (in milliseconds) determines the frequency of the driver
+ * issuing the PULSE message code.  The firmware monitors this periodic
+ * pulse to determine when to switch to an OS-absent mode. */
+#define DRV_PULSE_PERIOD_MS                 250
+
+/* This value (in milliseconds) determines how long the driver should
+ * wait for an acknowledgement from the firmware before timing out.  Once
+ * the firmware has timed out, the driver will assume there is no firmware
+ * running and there won't be any firmware-driver synchronization during a
+ * driver reset. */
+#define FW_ACK_TIME_OUT_MS                  50
+
+
+#define BNX2_DRV_RESET_SIGNATURE                0x00000000
+#define BNX2_DRV_RESET_SIGNATURE_MAGIC           0x4841564b /* HAVK */
+//#define DRV_RESET_SIGNATURE_MAGIC              0x47495352 /* RSIG */
+
+#define BNX2_DRV_MB                             0x00000004
+#define BNX2_DRV_MSG_CODE                        0xff000000
+#define BNX2_DRV_MSG_CODE_RESET                  0x01000000
+#define BNX2_DRV_MSG_CODE_UNLOAD                 0x02000000
+#define BNX2_DRV_MSG_CODE_SHUTDOWN               0x03000000
+#define BNX2_DRV_MSG_CODE_SUSPEND_WOL            0x04000000
+#define BNX2_DRV_MSG_CODE_FW_TIMEOUT             0x05000000
+#define BNX2_DRV_MSG_CODE_PULSE                  0x06000000
+#define BNX2_DRV_MSG_CODE_DIAG                   0x07000000
+#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL         0x09000000
+
+#define BNX2_DRV_MSG_DATA                        0x00ff0000
+#define BNX2_DRV_MSG_DATA_WAIT0                  0x00010000
+#define BNX2_DRV_MSG_DATA_WAIT1                  0x00020000
+#define BNX2_DRV_MSG_DATA_WAIT2                  0x00030000
+#define BNX2_DRV_MSG_DATA_WAIT3                  0x00040000
+        
+#define BNX2_DRV_MSG_SEQ                         0x0000ffff
+
+#define BNX2_FW_MB                              0x00000008
+#define BNX2_FW_MSG_ACK                          0x0000ffff
+#define BNX2_FW_MSG_STATUS_MASK                  0x00ff0000
+#define BNX2_FW_MSG_STATUS_OK                    0x00000000
+#define BNX2_FW_MSG_STATUS_FAILURE               0x00ff0000
+
+#define BNX2_LINK_STATUS                        0x0000000c
+
+#define BNX2_DRV_PULSE_MB                       0x00000010
+#define BNX2_DRV_PULSE_SEQ_MASK                  0x0000ffff
+
+/* Indicate to the firmware not to go into the
+ * OS absent when it is not getting driver pulse.
+ * This is used for debugging. */
+#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE        0x00010000
+
+#define BNX2_DEV_INFO_SIGNATURE                 0x00000020
+#define BNX2_DEV_INFO_SIGNATURE_MAGIC            0x44564900
+#define BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK       0xffffff00
+#define BNX2_DEV_INFO_FEATURE_CFG_VALID          0x01
+#define BNX2_DEV_INFO_SECONDARY_PORT             0x80
+#define BNX2_DEV_INFO_DRV_ALWAYS_ALIVE           0x40
+
+#define BNX2_SHARED_HW_CFG_PART_NUM             0x00000024
+
+#define BNX2_SHARED_HW_CFG_POWER_DISSIPATED     0x00000034
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D3_MASK   0xff000000
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D2_MASK   0xff0000
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D1_MASK   0xff00
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D0_MASK   0xff
+
+#define BNX2_SHARED_HW_CFG POWER_CONSUMED       0x00000038
+#define BNX2_SHARED_HW_CFG_CONFIG               0x0000003c
+#define BNX2_SHARED_HW_CFG_DESIGN_NIC            0
+#define BNX2_SHARED_HW_CFG_DESIGN_LOM            0x1
+#define BNX2_SHARED_HW_CFG_PHY_COPPER            0
+#define BNX2_SHARED_HW_CFG_PHY_FIBER             0x2
+#define BNX2_SHARED_HW_CFG_LED_MODE_SHIFT_BITS   8
+#define BNX2_SHARED_HW_CFG_LED_MODE_MASK         0x300
+#define BNX2_SHARED_HW_CFG_LED_MODE_MAC          0
+#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1        0x100
+#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2        0x200
+
+#define BNX2_DEV_INFO_BC_REV                    0x0000004c
+
+#define BNX2_PORT_HW_CFG_MAC_UPPER              0x00000050
+#define BNX2_PORT_HW_CFG_UPPERMAC_MASK           0xffff
+
+#define BNX2_PORT_HW_CFG_MAC_LOWER              0x00000054
+#define BNX2_PORT_HW_CFG_CONFIG                 0x00000058
+
+#define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER        0x00000068
+#define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER        0x0000006c
+#define BNX2_PORT_HW_CFG_IMD_MAC_B_UPPER        0x00000070
+#define BNX2_PORT_HW_CFG_IMD_MAC_B_LOWER        0x00000074
+#define BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER        0x00000078
+#define BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER        0x0000007c
+
+#define BNX2_DEV_INFO_PER_PORT_HW_CONFIG2       0x000000b4
+
+#define BNX2_DEV_INFO_FORMAT_REV                0x000000c4
+#define BNX2_DEV_INFO_FORMAT_REV_MASK            0xff000000
+#define BNX2_DEV_INFO_FORMAT_REV_ID              ('A' << 24)
+
+#define BNX2_SHARED_FEATURE                     0x000000c8
+#define BNX2_SHARED_FEATURE_MASK                 0xffffffff
+
+#define BNX2_PORT_FEATURE                       0x000000d8
+#define BNX2_PORT2_FEATURE                      0x00000014c
+#define BNX2_PORT_FEATURE_WOL_ENABLED            0x01000000
+#define BNX2_PORT_FEATURE_MBA_ENABLED            0x02000000
+#define BNX2_PORT_FEATURE_ASF_ENABLED            0x04000000
+#define BNX2_PORT_FEATURE_IMD_ENABLED            0x08000000
+#define BNX2_PORT_FEATURE_BAR1_SIZE_MASK         0xf
+#define BNX2_PORT_FEATURE_BAR1_SIZE_DISABLED     0x0
+#define BNX2_PORT_FEATURE_BAR1_SIZE_64K          0x1
+#define BNX2_PORT_FEATURE_BAR1_SIZE_128K         0x2
+#define BNX2_PORT_FEATURE_BAR1_SIZE_256K         0x3
+#define BNX2_PORT_FEATURE_BAR1_SIZE_512K         0x4
+#define BNX2_PORT_FEATURE_BAR1_SIZE_1M           0x5
+#define BNX2_PORT_FEATURE_BAR1_SIZE_2M           0x6
+#define BNX2_PORT_FEATURE_BAR1_SIZE_4M           0x7
+#define BNX2_PORT_FEATURE_BAR1_SIZE_8M           0x8
+#define BNX2_PORT_FEATURE_BAR1_SIZE_16M          0x9
+#define BNX2_PORT_FEATURE_BAR1_SIZE_32M          0xa
+#define BNX2_PORT_FEATURE_BAR1_SIZE_64M          0xb
+#define BNX2_PORT_FEATURE_BAR1_SIZE_128M         0xc
+#define BNX2_PORT_FEATURE_BAR1_SIZE_256M         0xd
+#define BNX2_PORT_FEATURE_BAR1_SIZE_512M         0xe
+#define BNX2_PORT_FEATURE_BAR1_SIZE_1G           0xf
+
+#define BNX2_PORT_FEATURE_WOL                   0xdc
+#define BNX2_PORT2_FEATURE_WOL                  0x150
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_SHIFT_BITS         4
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MASK       0x30
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_DISABLE    0
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC      0x10
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_ACPI       0x20
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC_AND_ACPI     0x30
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_MASK    0xf
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_AUTONEG         0
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10HALF  1
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10FULL  2
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100HALF 3
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100FULL 4
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000HALF        5
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000FULL        6
+#define BNX2_PORT_FEATURE_WOL_AUTONEG_ADVERTISE_1000     0x40
+#define BNX2_PORT_FEATURE_WOL_RESERVED_PAUSE_CAP 0x400
+#define BNX2_PORT_FEATURE_WOL_RESERVED_ASYM_PAUSE_CAP    0x800
+
+#define BNX2_PORT_FEATURE_MBA                   0xe0
+#define BNX2_PORT2_FEATURE_MBA                  0x154
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_SHIFT_BITS         0
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK       0x3
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE        0
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_RPL        1
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_BOOTP      2
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_SHIFT_BITS      2
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_MASK    0x3c
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_AUTONEG         0
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10HALF  0x4
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10FULL  0x8
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100HALF         0xc
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100FULL         0x10
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000HALF        0x14
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000FULL        0x18
+#define BNX2_PORT_FEATURE_MBA_SETUP_PROMPT_ENABLE        0x40
+#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_S      0
+#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_B      0x80
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_SHIFT_BITS    8
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_MASK  0xff00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_DISABLED      0
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1K    0x100
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2K    0x200
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4K    0x300
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8K    0x400
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16K   0x500
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_32K   0x600
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_64K   0x700
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_128K  0x800
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_256K  0x900
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_512K  0xa00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1M    0xb00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2M    0xc00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4M    0xd00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8M    0xe00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16M   0xf00
+#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_SHIFT_BITS     16
+#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_MASK   0xf0000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_SHIFT_BITS  20
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_MASK        0x300000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_AUTO        0
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_BBS         0x100000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT18H      0x200000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT19H      0x300000
+
+#define BNX2_PORT_FEATURE_IMD                   0xe4
+#define BNX2_PORT2_FEATURE_IMD                  0x158
+#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_DEFAULT      0
+#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_ENABLE       1
+
+#define BNX2_PORT_FEATURE_VLAN                  0xe8
+#define BNX2_PORT2_FEATURE_VLAN                 0x15c
+#define BNX2_PORT_FEATURE_MBA_VLAN_TAG_MASK      0xffff
+#define BNX2_PORT_FEATURE_MBA_VLAN_ENABLE        0x10000
+
+#define BNX2_BC_STATE_RESET_TYPE                0x000001c0
+#define BNX2_BC_STATE_RESET_TYPE_SIG             0x00005254
+#define BNX2_BC_STATE_RESET_TYPE_SIG_MASK        0x0000ffff
+#define BNX2_BC_STATE_RESET_TYPE_NONE    (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                          0x00010000)
+#define BNX2_BC_STATE_RESET_TYPE_PCI     (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                          0x00020000)
+#define BNX2_BC_STATE_RESET_TYPE_VAUX    (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                          0x00030000)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_MASK        DRV_MSG_CODE         
+#define BNX2_BC_STATE_RESET_TYPE_DRV_RESET (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                            DRV_MSG_CODE_RESET)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_UNLOAD (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                             DRV_MSG_CODE_UNLOAD)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_SHUTDOWN (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                               DRV_MSG_CODE_SHUTDOWN)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_WOL (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                          DRV_MSG_CODE_WOL)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_DIAG (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                           DRV_MSG_CODE_DIAG)
+#define BNX2_BC_STATE_RESET_TYPE_VALUE(msg) (BNX2_BC_STATE_RESET_TYPE_SIG | \
+                                             (msg))
+
+#define BNX2_BC_STATE                           0x000001c4
+#define BNX2_BC_STATE_ERR_MASK                   0x0000ff00
+#define BNX2_BC_STATE_SIGN                       0x42530000
+#define BNX2_BC_STATE_SIGN_MASK                  0xffff0000
+#define BNX2_BC_STATE_BC1_START                  (BNX2_BC_STATE_SIGN | 0x1)
+#define BNX2_BC_STATE_GET_NVM_CFG1               (BNX2_BC_STATE_SIGN | 0x2)
+#define BNX2_BC_STATE_PROG_BAR                   (BNX2_BC_STATE_SIGN | 0x3)
+#define BNX2_BC_STATE_INIT_VID                   (BNX2_BC_STATE_SIGN | 0x4)
+#define BNX2_BC_STATE_GET_NVM_CFG2               (BNX2_BC_STATE_SIGN | 0x5)
+#define BNX2_BC_STATE_APPLY_WKARND               (BNX2_BC_STATE_SIGN | 0x6)
+#define BNX2_BC_STATE_LOAD_BC2                   (BNX2_BC_STATE_SIGN | 0x7)
+#define BNX2_BC_STATE_GOING_BC2                  (BNX2_BC_STATE_SIGN | 0x8)
+#define BNX2_BC_STATE_GOING_DIAG                 (BNX2_BC_STATE_SIGN | 0x9)
+#define BNX2_BC_STATE_RT_FINAL_INIT              (BNX2_BC_STATE_SIGN | 0x81)
+#define BNX2_BC_STATE_RT_WKARND                  (BNX2_BC_STATE_SIGN | 0x82)
+#define BNX2_BC_STATE_RT_DRV_PULSE               (BNX2_BC_STATE_SIGN | 0x83)
+#define BNX2_BC_STATE_RT_FIOEVTS                 (BNX2_BC_STATE_SIGN | 0x84)
+#define BNX2_BC_STATE_RT_DRV_CMD                 (BNX2_BC_STATE_SIGN | 0x85)
+#define BNX2_BC_STATE_RT_LOW_POWER               (BNX2_BC_STATE_SIGN | 0x86)
+#define BNX2_BC_STATE_RT_SET_WOL                 (BNX2_BC_STATE_SIGN | 0x87)
+#define BNX2_BC_STATE_RT_OTHER_FW                (BNX2_BC_STATE_SIGN | 0x88)
+#define BNX2_BC_STATE_RT_GOING_D3                (BNX2_BC_STATE_SIGN | 0x89)
+#define BNX2_BC_STATE_ERR_BAD_VERSION            (BNX2_BC_STATE_SIGN | 0x0100)
+#define BNX2_BC_STATE_ERR_BAD_BC2_CRC            (BNX2_BC_STATE_SIGN | 0x0200)
+#define BNX2_BC_STATE_ERR_BC1_LOOP               (BNX2_BC_STATE_SIGN | 0x0300)
+#define BNX2_BC_STATE_ERR_UNKNOWN_CMD            (BNX2_BC_STATE_SIGN | 0x0400)
+#define BNX2_BC_STATE_ERR_DRV_DEAD               (BNX2_BC_STATE_SIGN | 0x0500)
+#define BNX2_BC_STATE_ERR_NO_RXP                 (BNX2_BC_STATE_SIGN | 0x0600)
+#define BNX2_BC_STATE_ERR_TOO_MANY_RBUF          (BNX2_BC_STATE_SIGN | 0x0700)
+        
+#define BNX2_BC_STATE_DEBUG_CMD                 0x1dc
+#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE       0x42440000
+#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE_MASK  0xffff0000
+#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK   0xffff
+#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_INFINITE   0xffff
+
+#define HOST_VIEW_SHMEM_BASE                    0x167c00
+
+#endif
diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h
new file mode 100644
index 000000000000..35f3a2ae5ef1
--- /dev/null
+++ b/drivers/net/bnx2_fw.h
@@ -0,0 +1,2468 @@
+/* bnx2_fw.h: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, except as noted below.
+ *
+ * This file contains firmware data derived from proprietary unpublished
+ * source code, Copyright (c) 2004, 2005 Broadcom Corporation.
+ *
+ * Permission is hereby granted for the distribution of this firmware data
+ * in hexadecimal or equivalent format, provided this copyright notice is
+ * accompanying it.
+ */
+
+
+static int bnx2_COM_b06FwReleaseMajor = 0x0;
+static int bnx2_COM_b06FwReleaseMinor = 0x0;
+static int bnx2_COM_b06FwReleaseFix = 0x0;
+static u32 bnx2_COM_b06FwStartAddr = 0x080004a0;
+static u32 bnx2_COM_b06FwTextAddr = 0x08000000;
+static int bnx2_COM_b06FwTextLen = 0x4594;
+static u32 bnx2_COM_b06FwDataAddr = 0x080045e0;
+static int bnx2_COM_b06FwDataLen = 0x0;
+static u32 bnx2_COM_b06FwRodataAddr = 0x08004598;
+static int bnx2_COM_b06FwRodataLen = 0x18;
+static u32 bnx2_COM_b06FwBssAddr = 0x08004600;
+static int bnx2_COM_b06FwBssLen = 0x88;
+static u32 bnx2_COM_b06FwSbssAddr = 0x080045e0;
+static int bnx2_COM_b06FwSbssLen = 0x1c;
+static u32 bnx2_COM_b06FwText[(0x4594/4) + 1] = {
+        0x0a000128, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x302e362e,
+        0x39000000, 0x00060902, 0x00000000, 0x00000003, 0x00000014, 0x00000032,
+        0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000010, 0x000003e8, 0x0000ea60, 0x00000001, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000002, 0x00000020, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x10000003, 0x00000000, 0x0000000d,
+        0x0000000d, 0x3c020800, 0x244245e0, 0x3c030800, 0x24634688, 0xac400000,
+        0x0043202b, 0x1480fffd, 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021,
+        0x3c100800, 0x261004a0, 0x3c1c0800, 0x279c45e0, 0x0e0001f2, 0x00000000,
+        0x0000000d, 0x27bdffe8, 0x3c1a8000, 0x3c020008, 0x0342d825, 0x3c036010,
+        0xafbf0010, 0x8c655000, 0x3c020800, 0x24470ac8, 0x3c040800, 0x24864600,
+        0x2402ff7f, 0x00a22824, 0x34a5380c, 0xac655000, 0x00002821, 0x24020037,
+        0x24030c80, 0xaf420008, 0xaf430024, 0xacc70000, 0x24a50001, 0x2ca20016,
+        0x1440fffc, 0x24c60004, 0x24844600, 0x3c020800, 0x24420ad4, 0x3c030800,
+        0x246309d4, 0xac820004, 0x3c020800, 0x24420618, 0x3c050800, 0x24a50ca0,
+        0xac82000c, 0x3c020800, 0x24423100, 0xac830008, 0x3c030800, 0x246325c8,
+        0xac820014, 0x3c020800, 0x24422b0c, 0xac830018, 0xac83001c, 0x3c030800,
+        0x24630adc, 0xac820024, 0x3c020800, 0x24423040, 0xac83002c, 0x3c030800,
+        0x24633060, 0xac820030, 0x3c020800, 0x24422f6c, 0xac830034, 0x3c030800,
+        0x24632c60, 0xac82003c, 0x3c020800, 0x24420b6c, 0xac850010, 0xac850020,
+        0xac830040, 0x0e000bd6, 0xac820050, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+        0x27bdffe0, 0xafb00010, 0x27500100, 0xafbf0018, 0xafb10014, 0x9203000b,
+        0x24020003, 0x1462005b, 0x96110008, 0x32220001, 0x10400009, 0x27430080,
+        0x8e020000, 0x96040014, 0x000211c2, 0x00021040, 0x00621821, 0xa4640000,
+        0x0a0001cb, 0x3c020800, 0x3c020800, 0x8c430020, 0x1060002a, 0x3c030800,
+        0x0e001006, 0x00000000, 0x97420108, 0x8f850018, 0x9743010c, 0x3042003e,
+        0x00021400, 0x00621825, 0xaca30000, 0x8f840018, 0x8f420100, 0xac820004,
+        0x97430116, 0x9742010e, 0x8f840018, 0x00031c00, 0x00431025, 0xac820008,
+        0x97430110, 0x97440112, 0x8f850018, 0x00031c00, 0x00832025, 0xaca4000c,
+        0x97420114, 0x8f840018, 0x3042ffff, 0xac820010, 0x8f830018, 0xac600014,
+        0x8f820018, 0x3c030800, 0xac400018, 0x9462466e, 0x8f840018, 0x3c032000,
+        0x00431025, 0xac82001c, 0x0e001044, 0x24040001, 0x3c030800, 0x8c620040,
+        0x24420001, 0xac620040, 0x3c020800, 0x8c430044, 0x32240004, 0x24630001,
+        0x10800017, 0xac430044, 0x8f4202b8, 0x04430007, 0x8e020020, 0x3c040800,
+        0x8c830060, 0x24020001, 0x24630001, 0x0a0001ed, 0xac830060, 0x3c060800,
+        0x8cc4005c, 0xaf420280, 0x96030016, 0x00001021, 0xa7430284, 0x8e050004,
+        0x24840001, 0x3c031000, 0xaf450288, 0xaf4302b8, 0x0a0001ed, 0xacc4005c,
+        0x32220002, 0x0a0001ed, 0x0002102b, 0x3c026000, 0xac400808, 0x0000000d,
+        0x00001021, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+        0x27bdffc8, 0xafbf0034, 0xafbe0030, 0xafb7002c, 0xafb60028, 0xafb50024,
+        0xafb40020, 0xafb3001c, 0xafb20018, 0xafb10014, 0x0e00013f, 0xafb00010,
+        0x24110020, 0x24150030, 0x2794000c, 0x27930008, 0x3c124000, 0x3c1e0800,
+        0x3c170800, 0x3c160800, 0x8f820004, 0x3c040800, 0x8c830020, 0x10430004,
+        0x00000000, 0xaf830004, 0x0e00110b, 0x00000000, 0x8f500000, 0x32020007,
+        0x1040fff5, 0x32020001, 0x1040002b, 0x32020002, 0x8f420100, 0xaf420020,
+        0x8f430104, 0xaf4300a8, 0x9342010b, 0x93630000, 0x306300ff, 0x10710005,
+        0x304400ff, 0x10750006, 0x2c820016, 0x0a000227, 0x00000000, 0xaf940000,
+        0x0a000228, 0x2c820016, 0xaf930000, 0x0a000228, 0x00000000, 0xaf800000,
+        0x14400005, 0x00041880, 0x0e0002b2, 0x00000000, 0x0a000234, 0x00000000,
+        0x3c020800, 0x24424600, 0x00621821, 0x8c620000, 0x0040f809, 0x00000000,
+        0x10400005, 0x8fc20034, 0x8f420104, 0x3c016020, 0xac220014, 0x8fc20034,
+        0xaf520138, 0x24420001, 0xafc20034, 0x32020002, 0x10400019, 0x32020004,
+        0x8f420140, 0xaf420020, 0x93630000, 0x306300ff, 0x10710005, 0x00000000,
+        0x10750006, 0x00000000, 0x0a000250, 0x00000000, 0xaf940000, 0x0a000251,
+        0x00000000, 0xaf930000, 0x0a000251, 0x00000000, 0xaf800000, 0x0e0008b9,
+        0x00000000, 0x8ee20038, 0xaf520178, 0x24420001, 0xaee20038, 0x32020004,
+        0x1040ffad, 0x00000000, 0x8f420180, 0xaf420020, 0x93630000, 0x306300ff,
+        0x10710005, 0x00000000, 0x10750006, 0x00000000, 0x0a00026a, 0x00000000,
+        0xaf940000, 0x0a00026b, 0x00000000, 0xaf930000, 0x0a00026b, 0x00000000,
+        0xaf800000, 0x93620000, 0x14510004, 0x8ec2003c, 0x0e000835, 0x00000000,
+        0x8ec2003c, 0xaf5201b8, 0x24420001, 0x0a000206, 0xaec2003c, 0x27bdffe8,
+        0xafbf0010, 0x97420108, 0x24033000, 0x30447000, 0x10830012, 0x28823001,
+        0x10400007, 0x24024000, 0x1080000b, 0x24022000, 0x1082001a, 0x24020001,
+        0x0a000299, 0x00000000, 0x1082000c, 0x24025000, 0x1082000e, 0x00000000,
+        0x0a000299, 0x00000000, 0x0000000d, 0x0a00029b, 0x00001021, 0x0e000300,
+        0x00000000, 0x0a00029b, 0x00001021, 0x0e00048f, 0x00000000, 0x0a00029b,
+        0x00001021, 0x0e000fdf, 0x00000000, 0x0a00029b, 0x00001021, 0x0000000d,
+        0x00001021, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x93620000, 0x24030020,
+        0x304400ff, 0x10830005, 0x24020030, 0x10820007, 0x00000000, 0x0a0002af,
+        0x00000000, 0x2782000c, 0xaf820000, 0x03e00008, 0x00000000, 0x27820008,
+        0xaf820000, 0x03e00008, 0x00000000, 0xaf800000, 0x03e00008, 0x00000000,
+        0x0000000d, 0x03e00008, 0x00001021, 0x03e00008, 0x00001021, 0x27440100,
+        0x94830008, 0x30620004, 0x10400017, 0x30620002, 0x8f4202b8, 0x04430007,
+        0x8c820020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001, 0x03e00008,
+        0xac830060, 0xaf420280, 0x94830016, 0x3c060800, 0xa7430284, 0x8c850004,
+        0x8cc4005c, 0x00001021, 0x3c031000, 0x24840001, 0xaf450288, 0xaf4302b8,
+        0x03e00008, 0xacc4005c, 0x14400003, 0x3c040800, 0x03e00008, 0x00001021,
+        0x8c830084, 0x24020001, 0x24630001, 0x03e00008, 0xac830084, 0x27450100,
+        0x3c040800, 0x8c820088, 0x94a3000c, 0x24420001, 0x007a1821, 0xac820088,
+        0x8ca40018, 0x90664000, 0xaf440038, 0x8ca2001c, 0x2403fff8, 0x00063600,
+        0x00431024, 0x34420004, 0x3c030005, 0xaf42003c, 0xaf430030, 0x00000000,
+        0x00000000, 0x00000000, 0xaf460404, 0x00000000, 0x00000000, 0x00000000,
+        0x3c020006, 0x34420001, 0xaf420030, 0x00000000, 0x00000000, 0x00000000,
+        0x8f420000, 0x30420010, 0x1040fffd, 0x00001021, 0x03e00008, 0x00000000,
+        0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x1060001e,
+        0xafbf0014, 0x0e001006, 0x00000000, 0x8f830018, 0x8e020018, 0xac620000,
+        0x8f840018, 0x9602000c, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018,
+        0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f840018,
+        0x3c026000, 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x9464466e,
+        0x8f850018, 0x00021400, 0x00441025, 0x24040001, 0x0e001044, 0xaca2001c,
+        0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffc8, 0xafb3001c,
+        0x00009821, 0xafb7002c, 0x0000b821, 0xafbe0030, 0x0000f021, 0xafb50024,
+        0x27550100, 0xafbf0034, 0xafb60028, 0xafb40020, 0xafb20018, 0xafb10014,
+        0xafb00010, 0x96a20008, 0x8f540100, 0x8eb20018, 0x30420001, 0x10400037,
+        0x02a0b021, 0x8f630054, 0x2642ffff, 0x00431023, 0x18400006, 0x00000000,
+        0x0000000d, 0x00000000, 0x24000128, 0x0a000372, 0x00002021, 0x8f62004c,
+        0x02421023, 0x18400028, 0x00002021, 0x93650120, 0x93640121, 0x3c030800,
+        0x8c62008c, 0x308400ff, 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b,
+        0xac62008c, 0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122,
+        0x30420001, 0x00021023, 0x30420005, 0x0a000372, 0x34440004, 0x27660100,
+        0x00041080, 0x00c21021, 0x8c430000, 0x02431823, 0x04600004, 0x24820001,
+        0x30440007, 0x1485fff9, 0x00041080, 0x10870007, 0x3c030800, 0xa3640121,
+        0x8c620094, 0x24040005, 0x24420001, 0x0a000372, 0xac620094, 0x24040004,
+        0x00809821, 0x9362003f, 0x304400ff, 0x38830016, 0x2c630001, 0x38820010,
+        0x2c420001, 0x00621825, 0x1460000c, 0x24020001, 0x38830008, 0x2c630001,
+        0x38820014, 0x2c420001, 0x00621825, 0x14600005, 0x24020001, 0x24020012,
+        0x14820002, 0x00001021, 0x24020001, 0x50400007, 0x8eb10020, 0x8ea20020,
+        0x8f630040, 0x00408821, 0x00431023, 0x5c400001, 0x8f710040, 0x9343010b,
+        0x24020004, 0x54620005, 0x36730080, 0x96a20008, 0x36730002, 0x24170001,
+        0x305e0020, 0x2402fffb, 0x02628024, 0x1200002a, 0x3c030800, 0x8c620030,
+        0x02021024, 0x10400026, 0x3c020800, 0x8c430020, 0x10600024, 0x32620004,
+        0x0e001006, 0x00000000, 0x8f830018, 0x8f420100, 0xac620000, 0x8f840018,
+        0x02201821, 0x32620002, 0xac900004, 0x8f840018, 0x50400001, 0x8ec30014,
+        0xac830008, 0x8f830018, 0x8ec20020, 0xac62000c, 0x8f840018, 0x8f620040,
+        0xac820010, 0x8f830018, 0x8ec20018, 0xac620014, 0x8f840018, 0x3c026000,
+        0x8c434448, 0x3c020800, 0xac830018, 0x9443466e, 0x8f840018, 0x3c024010,
+        0x00621825, 0xac83001c, 0x0e001044, 0x24040001, 0x32620004, 0x10400076,
+        0x00003821, 0x3c029000, 0x34420001, 0x3c038000, 0x02821025, 0xa360007c,
+        0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023,
+        0x30420080, 0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c, 0x9764003c,
+        0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, 0x54400006, 0x3c023fff,
+        0x93620023, 0x3042007f, 0xa3620023, 0xaf720064, 0x3c023fff, 0x0a0003f1,
+        0x3442ffff, 0x8f62005c, 0x02421023, 0x04400011, 0x00000000, 0x8f65005c,
+        0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf720064, 0x00a32823,
+        0x00852821, 0x0045102b, 0x10400004, 0x02451021, 0x3c053fff, 0x34a5ffff,
+        0x02451021, 0xaf62005c, 0x24070001, 0xaf72004c, 0x8f620054, 0x16420005,
+        0x00000000, 0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a,
+        0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800,
+        0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021,
+        0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074,
+        0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x3c028000, 0x34420001,
+        0x02821025, 0xa3600081, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004,
+        0x00000000, 0x0e000f2a, 0x00000000, 0x00403821, 0x10e00017, 0x3c029000,
+        0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x3c028000, 0x9363007d, 0x34420001, 0x3c048000, 0x02821025,
+        0xa363007d, 0xaf420020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002,
+        0x3c031000, 0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x8ea30014, 0x8f620040,
+        0x14430003, 0x00431023, 0x0a000443, 0x00001021, 0x28420001, 0x10400034,
+        0x00000000, 0x8f620040, 0xaf630040, 0x9362003e, 0x30420001, 0x1440000b,
+        0x3c029000, 0x93620022, 0x24420001, 0xa3620022, 0x93630022, 0x3c020800,
+        0x8c440098, 0x0064182b, 0x1460001e, 0x3c020800, 0x3c029000, 0x34420001,
+        0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+        0x00000000, 0x3c038000, 0x9362007d, 0x34630001, 0x3c048000, 0x02831825,
+        0x34420001, 0xa362007d, 0xaf430020, 0x8f4201f8, 0x00441024, 0x1440fffd,
+        0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4, 0x24020001, 0xaf4301f8,
+        0xa7620012, 0x0a000476, 0xa3600022, 0x9743007a, 0x9444002a, 0x00641821,
+        0x3063fffe, 0xa7630012, 0x0e000b68, 0x00000000, 0x12e00003, 0x00000000,
+        0x0e000f27, 0x00000000, 0x53c00004, 0x96a20008, 0x0e000c10, 0x00000000,
+        0x96a20008, 0x8fbf0034, 0x8fbe0030, 0x8fb7002c, 0x8fb60028, 0x8fb50024,
+        0x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x00021042,
+        0x30420001, 0x03e00008, 0x27bd0038, 0x27bdffe8, 0xafbf0010, 0x97420108,
+        0x2403000b, 0x304400ff, 0x1083004e, 0x2882000c, 0x10400011, 0x24020006,
+        0x1082003e, 0x28820007, 0x10400007, 0x28820008, 0x1080002b, 0x24020001,
+        0x1082002e, 0x3c026000, 0x0a000504, 0x00000000, 0x14400061, 0x2882000a,
+        0x1440002b, 0x00000000, 0x0a0004ec, 0x00000000, 0x2402001c, 0x1082004e,
+        0x2882001d, 0x1040000e, 0x24020019, 0x10820041, 0x2882001a, 0x10400005,
+        0x2402000e, 0x10820036, 0x00000000, 0x0a000504, 0x00000000, 0x2402001b,
+        0x1082003c, 0x00000000, 0x0a000504, 0x00000000, 0x240200c1, 0x10820040,
+        0x288200c2, 0x10400005, 0x24020080, 0x1082001f, 0x00000000, 0x0a000504,
+        0x00000000, 0x240200c2, 0x1082003b, 0x00000000, 0x0a000504, 0x00000000,
+        0x3c026000, 0x0e000c7d, 0xac400808, 0x0a000506, 0x8fbf0010, 0x8c444448,
+        0x3c030800, 0xac640064, 0x0e000c7d, 0x00000000, 0x3c026000, 0x8c444448,
+        0x3c030800, 0x0a000505, 0xac640068, 0x8f440100, 0x0e000508, 0x00000000,
+        0x3c026000, 0x8c444448, 0x3c030800, 0x0a000505, 0xac64006c, 0x0e000cab,
+        0x00000000, 0x0a000506, 0x8fbf0010, 0x8f440100, 0x0e000cd5, 0x00000000,
+        0x0a000506, 0x8fbf0010, 0x0e000d1c, 0x00000000, 0x0a000506, 0x8fbf0010,
+        0x0000000d, 0x0a000506, 0x8fbf0010, 0x0e0005d7, 0x00000000, 0x0a000506,
+        0x8fbf0010, 0x8f440100, 0x0e000d7e, 0x00000000, 0x0a000506, 0x8fbf0010,
+        0x0e000e95, 0x00000000, 0x0a000506, 0x8fbf0010, 0x0e000626, 0x00000000,
+        0x0a000506, 0x8fbf0010, 0x0e000b68, 0x00000000, 0x0a000506, 0x8fbf0010,
+        0x0000000d, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0x3c029000,
+        0x34420001, 0xafb00010, 0x00808021, 0x02021025, 0x3c038000, 0xafbf0014,
+        0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005,
+        0x34420001, 0xa3620005, 0x8f63004c, 0x8f620054, 0x10620019, 0x3c028000,
+        0x9762006a, 0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081,
+        0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001,
+        0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021,
+        0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x3c028000,
+        0x34420001, 0x02021025, 0x0e000c7d, 0xaf420020, 0x3c029000, 0x34420001,
+        0x3c038000, 0x02021025, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+        0x3c028000, 0x9363007d, 0x34420001, 0x3c048000, 0x02021025, 0xa363007d,
+        0xaf420020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x8fbf0014, 0xaf5001c0,
+        0x8fb00010, 0x24020002, 0x3c031000, 0xa34201c4, 0xaf4301f8, 0x03e00008,
+        0x27bd0018, 0x27bdffd8, 0xafbf0020, 0xafb3001c, 0xafb20018, 0xafb10014,
+        0xafb00010, 0x93630005, 0x00809021, 0x24020030, 0x30630030, 0x14620072,
+        0x00a09821, 0x3c020800, 0x8c430020, 0x1060006c, 0x00000000, 0x0e001006,
+        0x00000000, 0x8f820018, 0xac520000, 0x9363003e, 0x9362003f, 0x8f840018,
+        0x00031a00, 0x00431025, 0xac820004, 0x93630081, 0x93620082, 0x8f850018,
+        0x00031e00, 0x00021400, 0x00621825, 0xaca30008, 0x8f840018, 0x8f620040,
+        0xac82000c, 0x8f830018, 0x8f620048, 0xac620010, 0x8f840018, 0x8f62004c,
+        0x3c110800, 0xac820014, 0x8f830018, 0x8f620050, 0x26304660, 0x00002021,
+        0xac620018, 0x9602000e, 0x8f850018, 0x3c03c00b, 0x00431025, 0x0e001044,
+        0xaca2001c, 0x8f830018, 0x8f620054, 0xac620000, 0x8f840018, 0x8f620058,
+        0xac820004, 0x8f830018, 0x8f62005c, 0xac620008, 0x8f840018, 0x8f620060,
+        0xac82000c, 0x8f850018, 0x8f620064, 0xaca20010, 0x97630068, 0x9762006a,
+        0x8f840018, 0x00031c00, 0x00431025, 0xac820014, 0x8f830018, 0x00002021,
+        0xac600018, 0x9602000e, 0x8f850018, 0x3c03c00c, 0x00431025, 0x0e001044,
+        0xaca2001c, 0x8f840018, 0x8f630018, 0xac830000, 0x936200c4, 0x30420002,
+        0x10400006, 0x00000000, 0x976200c8, 0x8f830018, 0x3042ffff, 0x0a0005b5,
+        0xac620004, 0x8f820018, 0xac400004, 0x8f830018, 0x8f62006c, 0xac620008,
+        0x8f840018, 0x8f6200dc, 0xac82000c, 0x8f830018, 0xac600010, 0x93620005,
+        0x8f830018, 0x00021600, 0x00531025, 0xac620014, 0x8f850018, 0x3c026000,
+        0x8c434448, 0x24040001, 0x26224660, 0xaca30018, 0x9443000e, 0x8f850018,
+        0x3c02400d, 0x00621825, 0x0e001044, 0xaca3001c, 0x0e000d48, 0x02402021,
+        0x8fbf0020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008,
+        0x27bd0028, 0x27bdffe0, 0xafb00010, 0x27500100, 0xafbf0018, 0xafb10014,
+        0x9603000c, 0x240200c1, 0x5462001d, 0x8e040000, 0x3c029000, 0x8f440100,
+        0x34420001, 0x3c038000, 0x00821025, 0xaf420020, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x00000000, 0x3c038000, 0x9362007d, 0x34630001, 0x3c058000,
+        0x00831825, 0x34420004, 0xa362007d, 0xaf430020, 0x8f4201f8, 0x00451024,
+        0x1440fffd, 0x24020002, 0x3c031000, 0xaf4401c0, 0xa34201c4, 0xaf4301f8,
+        0x0a000622, 0x8fbf0018, 0x8f65004c, 0x24060001, 0x0e000db5, 0x2407049f,
+        0x3c020800, 0x8c430020, 0x9611000c, 0x1060001d, 0x8e100000, 0x0e001006,
+        0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x00111400, 0xac820004,
+        0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+        0x8f840018, 0x240204a2, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448,
+        0x24040001, 0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018, 0x3c024019,
+        0x00621825, 0x0e001044, 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010,
+        0x03e00008, 0x27bd0020, 0x27bdffb0, 0xafb1002c, 0x27510100, 0xafbf004c,
+        0xafbe0048, 0xafb70044, 0xafb60040, 0xafb5003c, 0xafb40038, 0xafb30034,
+        0xafb20030, 0xafb00028, 0x8e350000, 0x9634000c, 0x3c026000, 0x8c434448,
+        0x0000f021, 0xaf630170, 0x8f620040, 0x8e230014, 0x0000b821, 0x00431023,
+        0x044001ec, 0x0000b021, 0x32820010, 0x1040002e, 0x3c026000, 0x9363003f,
+        0x9222000e, 0x10430006, 0x2402000c, 0x9223000f, 0x10620003, 0x24020014,
+        0x14620025, 0x3c026000, 0x32820004, 0x10400007, 0x241e0001, 0x8f620050,
+        0x24420001, 0xaf620050, 0x8f630054, 0x24630001, 0xaf630054, 0x32830102,
+        0x24020002, 0x5462000d, 0x9222000f, 0x8f620040, 0x24420001, 0xaf620040,
+        0x8f630048, 0x8f620040, 0x24630001, 0x54620005, 0x9222000f, 0x8f620048,
+        0x24420001, 0xaf620048, 0x9222000f, 0xa362003f, 0x9223000f, 0x24020012,
+        0x14620007, 0x3c026000, 0x3c030800, 0x8c620074, 0x24420001, 0x0e000f6e,
+        0xac620074, 0x3c026000, 0x8c434448, 0x32820040, 0xaf630174, 0x32830020,
+        0xafa30010, 0x32830080, 0xafa30014, 0x32830001, 0xafa3001c, 0x32830008,
+        0xafa30020, 0x32830100, 0x104000bb, 0xafa30018, 0x8e260010, 0x8f630054,
+        0x24c2ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, 0x00000000,
+        0x24000128, 0x0a0006b2, 0x00009021, 0x8f62004c, 0x00c21023, 0x18400028,
+        0x00009021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, 0x308400ff,
+        0x24420001, 0x30a500ff, 0x00804021, 0x1485000b, 0xac62008c, 0x3c040800,
+        0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, 0x00021023,
+        0x30420005, 0x0a0006b2, 0x34520004, 0x27670100, 0x00041080, 0x00e21021,
+        0x8c430000, 0x00c31823, 0x04600004, 0x24820001, 0x30440007, 0x1485fff9,
+        0x00041080, 0x10880007, 0x3c030800, 0xa3640121, 0x8c620094, 0x24120005,
+        0x24420001, 0x0a0006b2, 0xac620094, 0x24120004, 0x32420001, 0x10400020,
+        0x3c020800, 0x8c430020, 0x8e300000, 0x1060001c, 0x8e330010, 0x0e001006,
+        0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, 0xac820004,
+        0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+        0x8f820018, 0xac530014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+        0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018, 0x3c024010, 0x00621825,
+        0x0e001044, 0xaca3001c, 0x32420004, 0x10400060, 0x00003821, 0x3c029000,
+        0x8e260010, 0x34420001, 0x3c038000, 0x02a21025, 0xa360007c, 0xaf420020,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023, 0x30420080,
+        0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c, 0x9764003c, 0x8f620064,
+        0x00a32823, 0x00852821, 0x00a2102b, 0x54400006, 0x3c023fff, 0x93620023,
+        0x3042007f, 0xa3620023, 0xaf660064, 0x3c023fff, 0x0a000702, 0x3442ffff,
+        0x8f62005c, 0x00c21023, 0x04400011, 0x00000000, 0x8f65005c, 0x8f630064,
+        0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf660064, 0x00a32823, 0x00852821,
+        0x0045102b, 0x10400004, 0x00c51021, 0x3c053fff, 0x34a5ffff, 0x00c51021,
+        0xaf62005c, 0x24070001, 0xaf66004c, 0x8f620054, 0x14c20005, 0x00000000,
+        0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a, 0x00022880,
+        0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c,
+        0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800,
+        0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe,
+        0x00832824, 0x00a21021, 0xaf62000c, 0x3c028000, 0x34420001, 0x02a21025,
+        0xa3600081, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620005, 0x00e0b021,
+        0x0e000f2a, 0x00000000, 0x00403821, 0x00e0b021, 0x8fa20010, 0x10400008,
+        0x00000000, 0x8e220018, 0xaf620018, 0x8e23001c, 0xaf63001c, 0x8e220020,
+        0x24160001, 0xaf620058, 0x13c00036, 0x32820004, 0x10400035, 0x8fa30014,
+        0x93620023, 0x30420040, 0x10400031, 0x3c020800, 0x8c430020, 0x1060001c,
+        0x8e300000, 0x0e001006, 0x00000000, 0x8f820018, 0xac500000, 0x8f830018,
+        0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, 0x8f820018,
+        0xac400010, 0x8f830018, 0x24020587, 0xac620014, 0x8f850018, 0x3c026000,
+        0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018,
+        0x3c024019, 0x00621825, 0x0e001044, 0xaca3001c, 0x3c029000, 0x34420001,
+        0x02a21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+        0x24020001, 0xaf62000c, 0x93630023, 0x3c028000, 0x34420001, 0x02a21025,
+        0x306300bf, 0xa3630023, 0xaf420020, 0x8fa30014, 0x10600012, 0x8fa3001c,
+        0x9362007c, 0x24420001, 0xa362007c, 0x9363007e, 0x9362007a, 0x1462000b,
+        0x8fa3001c, 0x9362007c, 0x3c030800, 0x8c640024, 0x0044102b, 0x14400005,
+        0x8fa3001c, 0x0e000f2a, 0x00000000, 0x02c2b025, 0x8fa3001c, 0x3062ffff,
+        0x10400003, 0x32820200, 0x0a000793, 0x24170004, 0x10400003, 0x00000000,
+        0x24170040, 0x24160001, 0x13c0005d, 0x32820002, 0x1040005c, 0x8fa20020,
+        0x9222000a, 0x30420020, 0x10400033, 0x3c100800, 0x93620023, 0x30420040,
+        0x1040002f, 0x8e020020, 0x1040001e, 0x3c029000, 0x0e001006, 0x00000000,
+        0x8f820018, 0xac550000, 0x8f840018, 0x3c02008d, 0xac820004, 0x8f830018,
+        0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f840018,
+        0x240205bf, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+        0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018, 0x3c024019, 0x00621825,
+        0x0e001044, 0xaca3001c, 0x3c029000, 0x34420001, 0x02a21025, 0xaf420020,
+        0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93630023,
+        0x3c028000, 0x34420001, 0x02a21025, 0x306300bf, 0xa3630023, 0xaf420020,
+        0x8e020020, 0x10400023, 0x8fa20020, 0x0e001006, 0x00000000, 0x8f840018,
+        0x8e230000, 0xac830000, 0x9222000a, 0x8f830018, 0x00021600, 0xac620004,
+        0x8f840018, 0x8f620040, 0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c,
+        0x9362003f, 0x8f840018, 0x304200ff, 0xac820010, 0x8f830018, 0x3c026000,
+        0xac600014, 0x8f850018, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+        0x9443466e, 0x8f850018, 0x3c02401a, 0x00621825, 0x0e001044, 0xaca3001c,
+        0x8fa20020, 0x1040000e, 0x8fa20018, 0x9222000a, 0xa3620082, 0x56e00005,
+        0x36f70008, 0x8fa30018, 0x10600004, 0x00000000, 0x36f70008, 0x0a000801,
+        0x24160001, 0x0e000de1, 0x02a02021, 0x8fa20018, 0x10400003, 0x00000000,
+        0x36f70010, 0x24160001, 0x12c00019, 0x3c029000, 0x34420001, 0x02a21025,
+        0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+        0x3c038000, 0x9362007d, 0x34630001, 0x3c048000, 0x02a31825, 0x02e21025,
+        0xa362007d, 0xaf430020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002,
+        0x3c031000, 0xaf5501c0, 0xa34201c4, 0xaf4301f8, 0x9363003f, 0x24020012,
+        0x14620004, 0x3c026000, 0x0e000f6e, 0x00000000, 0x3c026000, 0x8c434448,
+        0xaf630178, 0x8fbf004c, 0x8fbe0048, 0x8fb70044, 0x8fb60040, 0x8fb5003c,
+        0x8fb40038, 0x8fb30034, 0x8fb20030, 0x8fb1002c, 0x8fb00028, 0x03e00008,
+        0x27bd0050, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f500180, 0x97420184,
+        0x30420200, 0x14400015, 0x00000000, 0x8f430188, 0x3c02ff00, 0x00621824,
+        0x3c020200, 0x10620031, 0x0043102b, 0x14400007, 0x3c020300, 0x1060000b,
+        0x3c020100, 0x1062000d, 0x00000000, 0x0a0008b4, 0x00000000, 0x10620027,
+        0x3c020400, 0x1062003e, 0x02002021, 0x0a0008b4, 0x00000000, 0x0e000e1e,
+        0x02002021, 0x0a0008b6, 0x8fbf0014, 0x93620005, 0x30420020, 0x1440005e,
+        0x8fbf0014, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000,
+        0x34630001, 0x02031825, 0x34420020, 0xa3620005, 0xaf430020, 0x93620005,
+        0x30420020, 0x14400003, 0x02002021, 0x0000000d, 0x02002021, 0x0e000553,
+        0x24055854, 0x0a0008b6, 0x8fbf0014, 0x93620005, 0x30420001, 0x1040003f,
+        0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020,
+        0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c048000, 0x3c030800,
+        0x304200fe, 0xa3620005, 0x8c620020, 0x34840001, 0x02042025, 0xaf440020,
+        0x1040002d, 0x8fbf0014, 0x0a000894, 0x00000000, 0x00002821, 0x00003021,
+        0x0e000f78, 0x240706a4, 0x3c020800, 0x8c430020, 0x10600023, 0x8fbf0014,
+        0x0e001006, 0x00000000, 0x8f820018, 0xac500000, 0x93630082, 0x9362003f,
+        0x8f840018, 0x00031a00, 0x00431025, 0xac820004, 0x8f830018, 0xac600008,
+        0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014,
+        0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+        0x9443466e, 0x8f850018, 0x3c02400a, 0x00621825, 0x0e001044, 0xaca3001c,
+        0x0a0008b6, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010, 0x03e00008,
+        0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x93420148, 0x2444ffff, 0x2c830005,
+        0x10600047, 0x3c020800, 0x24424598, 0x00041880, 0x00621821, 0x8c640000,
+        0x00800008, 0x00000000, 0x8f430144, 0x8f62000c, 0x14620006, 0x24020001,
+        0xaf62000c, 0x0e000909, 0x00000000, 0x0a000907, 0x8fbf0010, 0x8f62000c,
+        0x0a000900, 0x00000000, 0x97630010, 0x8f420144, 0x14430006, 0x24020001,
+        0xa7620010, 0x0e000eeb, 0x00000000, 0x0a000907, 0x8fbf0010, 0x97620010,
+        0x0a000900, 0x00000000, 0x97630012, 0x8f420144, 0x14430006, 0x24020001,
+        0xa7620012, 0x0e000f06, 0x00000000, 0x0a000907, 0x8fbf0010, 0x97620012,
+        0x0a000900, 0x00000000, 0x97630014, 0x8f420144, 0x14430006, 0x24020001,
+        0xa7620014, 0x0e000f21, 0x00000000, 0x0a000907, 0x8fbf0010, 0x97620014,
+        0x0a000900, 0x00000000, 0x97630016, 0x8f420144, 0x14430006, 0x24020001,
+        0xa7620016, 0x0e000f24, 0x00000000, 0x0a000907, 0x8fbf0010, 0x97620016,
+        0x14400006, 0x8fbf0010, 0x3c030800, 0x8c620070, 0x24420001, 0xac620070,
+        0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x93620081,
+        0x3c030800, 0x8c640048, 0x0044102b, 0x14400028, 0x3c029000, 0x8f460140,
+        0x34420001, 0x3c038000, 0x00c21025, 0xaf420020, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x3c048000, 0x34840001, 0x3c059000, 0x34a50001, 0x3c078000,
+        0x24020012, 0x24030080, 0x00c42025, 0x00c52825, 0xa362003f, 0xa3630082,
+        0xaf440020, 0xaf450020, 0x8f420020, 0x00471024, 0x1440fffd, 0x3c038000,
+        0x9362007d, 0x34630001, 0x3c048000, 0x00c31825, 0x34420020, 0xa362007d,
+        0xaf430020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002, 0x3c031000,
+        0x0a00096d, 0xaf4601c0, 0x93620081, 0x24420001, 0x0e000f2a, 0xa3620081,
+        0x9763006a, 0x00032880, 0x14a00002, 0x00403821, 0x24050001, 0x97630068,
+        0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b,
+        0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001,
+        0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c,
+        0x10e0001a, 0x3c029000, 0x8f440140, 0x34420001, 0x3c038000, 0x00821025,
+        0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000,
+        0x9362007d, 0x34630001, 0x3c058000, 0x00831825, 0x34420004, 0xa362007d,
+        0xaf430020, 0x8f4201f8, 0x00451024, 0x1440fffd, 0x24020002, 0x3c031000,
+        0xaf4401c0, 0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+        0x27bdffd8, 0xafb3001c, 0x27530100, 0xafbf0024, 0xafb40020, 0xafb20018,
+        0xafb10014, 0xafb00010, 0x96620008, 0x3c140800, 0x8f520100, 0x30420001,
+        0x104000cf, 0x00000000, 0x8e700018, 0x8f630054, 0x2602ffff, 0x00431023,
+        0x18400006, 0x00000000, 0x0000000d, 0x00000000, 0x24000128, 0x0a0009b6,
+        0x00008821, 0x8f62004c, 0x02021023, 0x18400028, 0x00008821, 0x93650120,
+        0x93640121, 0x3c030800, 0x8c62008c, 0x308400ff, 0x24420001, 0x30a500ff,
+        0x00803821, 0x1485000b, 0xac62008c, 0x3c040800, 0x8c830090, 0x24630001,
+        0xac830090, 0x93620122, 0x30420001, 0x00021023, 0x30420005, 0x0a0009b6,
+        0x34510004, 0x27660100, 0x00041080, 0x00c21021, 0x8c430000, 0x02031823,
+        0x04600004, 0x24820001, 0x30440007, 0x1485fff9, 0x00041080, 0x10870007,
+        0x3c030800, 0xa3640121, 0x8c620094, 0x24110005, 0x24420001, 0x0a0009b6,
+        0xac620094, 0x24110004, 0x32220001, 0x1040001e, 0x8e820020, 0x1040001d,
+        0x32220004, 0x0e001006, 0x00000000, 0x8f820018, 0xac520000, 0x8f840018,
+        0x24020001, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+        0x8f830018, 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000,
+        0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018,
+        0x3c024010, 0x00621825, 0x0e001044, 0xaca3001c, 0x32220004, 0x10400076,
+        0x00003821, 0x3c029000, 0x34420001, 0x3c038000, 0x02421025, 0xa360007c,
+        0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023,
+        0x30420080, 0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c, 0x9764003c,
+        0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, 0x54400006, 0x3c023fff,
+        0x93620023, 0x3042007f, 0xa3620023, 0xaf700064, 0x3c023fff, 0x0a000a03,
+        0x3442ffff, 0x8f62005c, 0x02021023, 0x04400011, 0x00000000, 0x8f65005c,
+        0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf700064, 0x00a32823,
+        0x00852821, 0x0045102b, 0x10400004, 0x02051021, 0x3c053fff, 0x34a5ffff,
+        0x02051021, 0xaf62005c, 0x24070001, 0xaf70004c, 0x8f620054, 0x16020005,
+        0x00000000, 0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a,
+        0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800,
+        0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021,
+        0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074,
+        0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x3c028000, 0x34420001,
+        0x02421025, 0xa3600081, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004,
+        0x00000000, 0x0e000f2a, 0x00000000, 0x00403821, 0x10e00017, 0x3c029000,
+        0x34420001, 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x3c028000, 0x9363007d, 0x34420001, 0x3c048000, 0x02421025,
+        0xa363007d, 0xaf420020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002,
+        0x3c031000, 0xaf5201c0, 0xa34201c4, 0xaf4301f8, 0x9342010b, 0x8e830020,
+        0x27500100, 0x38420006, 0x10600029, 0x2c510001, 0x0e001006, 0x00000000,
+        0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, 0x96020008, 0xac820004,
+        0x8f830018, 0x8e020014, 0xac620008, 0x8f850018, 0x3c026000, 0x8c434448,
+        0xaca3000c, 0x8f840018, 0x96020012, 0xac820010, 0x8f850018, 0x8e030020,
+        0xaca30014, 0x9602000c, 0x9603000e, 0x8f840018, 0x00021400, 0x00431025,
+        0xac820018, 0x12200005, 0x3c020800, 0x9443466e, 0x8f840018, 0x0a000a78,
+        0x3c024013, 0x9443466e, 0x8f840018, 0x3c024014, 0x00621825, 0xac83001c,
+        0x0e001044, 0x24040001, 0x8e630014, 0x8f620040, 0x14430003, 0x00431023,
+        0x0a000a83, 0x00001021, 0x28420001, 0x10400034, 0x00000000, 0x8f620040,
+        0xaf630040, 0x9362003e, 0x30420001, 0x1440000b, 0x3c029000, 0x93620022,
+        0x24420001, 0xa3620022, 0x93630022, 0x3c020800, 0x8c440098, 0x0064182b,
+        0x1460001e, 0x3c020800, 0x3c029000, 0x34420001, 0x02421025, 0xaf420020,
+        0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000,
+        0x9362007d, 0x34630001, 0x3c048000, 0x02431825, 0x34420001, 0xa362007d,
+        0xaf430020, 0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002, 0x3c031000,
+        0xaf5201c0, 0xa34201c4, 0x24020001, 0xaf4301f8, 0xa7620012, 0x0a000ab6,
+        0xa3600022, 0x9743007a, 0x9444002a, 0x00641821, 0x3063fffe, 0xa7630012,
+        0x0e000b68, 0x00000000, 0x97420108, 0x8fbf0024, 0x8fb40020, 0x8fb3001c,
+        0x8fb20018, 0x8fb10014, 0x8fb00010, 0x00021042, 0x30420001, 0x03e00008,
+        0x27bd0028, 0x27bdffe0, 0xafb20018, 0x3c120800, 0x8e420020, 0xafb00010,
+        0x27500100, 0xafbf001c, 0x10400046, 0xafb10014, 0x0e001006, 0x00000000,
+        0x8f840018, 0x8e020000, 0xac820000, 0x936300b1, 0x936200c5, 0x8f850018,
+        0x00031e00, 0x00021400, 0x34420100, 0x00621825, 0xaca30004, 0x8f840018,
+        0x8e02001c, 0xac820008, 0x8f830018, 0x8f620048, 0xac62000c, 0x8f840018,
+        0x96020012, 0xac820010, 0x8f830018, 0x8f620040, 0x24040001, 0xac620014,
+        0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800, 0x24514660, 0xaca30018,
+        0x9623000e, 0x8f850018, 0x3c024016, 0x00621825, 0x0e001044, 0xaca3001c,
+        0x96030008, 0x30630010, 0x1060001c, 0x8e420020, 0x1040001a, 0x8e100000,
+        0x0e001006, 0x00000000, 0x8f820018, 0xac500000, 0x8f830018, 0xac600004,
+        0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+        0x8f830018, 0xac600014, 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001,
+        0xaca30018, 0x9622000e, 0x8f850018, 0x3c034015, 0x00431025, 0x0e001044,
+        0xaca2001c, 0x00001021, 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010,
+        0x03e00008, 0x27bd0020, 0x27bdffe0, 0xafb20018, 0x3c120800, 0x8e420020,
+        0xafb00010, 0x27500100, 0xafbf001c, 0x10400041, 0xafb10014, 0x0e001006,
+        0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, 0x24020100,
+        0xac820004, 0x8f830018, 0x8e02001c, 0xac620008, 0x8f840018, 0x8e020018,
+        0xac82000c, 0x8f830018, 0x96020012, 0xac620010, 0x8f840018, 0x96020008,
+        0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+        0x24514660, 0xaca30018, 0x9623000e, 0x8f850018, 0x3c024017, 0x00621825,
+        0x0e001044, 0xaca3001c, 0x96030008, 0x30630010, 0x1060001c, 0x8e420020,
+        0x1040001a, 0x8e100000, 0x0e001006, 0x00000000, 0x8f820018, 0xac500000,
+        0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c,
+        0x8f820018, 0xac400010, 0x8f830018, 0xac600014, 0x8f850018, 0x3c036000,
+        0x8c634448, 0x24040001, 0xaca30018, 0x9622000e, 0x8f850018, 0x3c034015,
+        0x00431025, 0x0e001044, 0xaca2001c, 0x00001021, 0x8fbf001c, 0x8fb20018,
+        0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010,
+        0x936200c4, 0x30420002, 0x10400019, 0x00000000, 0x936200c5, 0x936300b1,
+        0x00431023, 0x304400ff, 0x30830080, 0x10600004, 0x00000000, 0x0000000d,
+        0x00000000, 0x24000a6a, 0x93620004, 0x00441023, 0x304400ff, 0x30830080,
+        0x10600004, 0x2482ffff, 0x8f650024, 0x0a000b82, 0x00000000, 0x00022b00,
+        0x8f620024, 0x0045102b, 0x10400002, 0x00000000, 0x8f650024, 0x8f620048,
+        0x8f630040, 0x00431823, 0x0065202b, 0x10800004, 0x00000000, 0x8f620040,
+        0x00451021, 0xaf620048, 0x9762003c, 0x0062102b, 0x10400041, 0x8fbf0010,
+        0x10a0003f, 0x3c029000, 0x34420001, 0x3c040800, 0x8c830080, 0x8f450100,
+        0x3c068000, 0x24630001, 0x00a21025, 0xac830080, 0xaf420020, 0x8f420020,
+        0x00461024, 0x1440fffd, 0x3c038000, 0x9362007d, 0x34630001, 0x3c048000,
+        0x00a31825, 0x34420004, 0xa362007d, 0xaf430020, 0x8f4201f8, 0x00441024,
+        0x1440fffd, 0x24020002, 0x3c030800, 0xaf4501c0, 0xa34201c4, 0x8c640020,
+        0x3c021000, 0xaf4201f8, 0x1080001f, 0x8fbf0010, 0x0e001006, 0x00000000,
+        0x8f830018, 0x8f420100, 0xac620000, 0x8f840018, 0x8f620040, 0xac820004,
+        0x8f850018, 0x8f620048, 0xaca20008, 0x8f830018, 0xac60000c, 0x8f820018,
+        0xac400010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, 0x8c434448,
+        0x3c020800, 0xac830018, 0x9443466e, 0x8f840018, 0x3c0240c2, 0x00621825,
+        0xac83001c, 0x0e001044, 0x24040001, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+        0x3c020800, 0x24423958, 0xaf82000c, 0x03e00008, 0x00000000, 0x27bdffe8,
+        0xafb00010, 0x27500100, 0xafbf0014, 0x8e02001c, 0x14400003, 0x3c020800,
+        0x0000000d, 0x3c020800, 0x8c430020, 0x10600026, 0x00001021, 0x0e001006,
+        0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018, 0x8e02001c,
+        0xac820004, 0x8f830018, 0xac600008, 0x8f840018, 0x8e020018, 0xac82000c,
+        0x8f850018, 0x96020012, 0xaca20010, 0x8f830018, 0x3c106000, 0xac600014,
+        0x8f840018, 0x8e024448, 0x3c030800, 0xac820018, 0x9462466e, 0x8f840018,
+        0x3c034012, 0x00431025, 0xac82001c, 0x0e001044, 0x24040001, 0x8e036800,
+        0x00001021, 0x3c040001, 0x00641825, 0xae036800, 0x0a000c0d, 0x8fbf0014,
+        0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x97430078,
+        0x9444002e, 0x00001021, 0x00641821, 0x3063fffe, 0x03e00008, 0xa7630010,
+        0x27450100, 0x8f640048, 0x8ca30018, 0x00641023, 0x18400021, 0x00000000,
+        0xaf630048, 0x8f620040, 0x9763003c, 0x00821023, 0x0043102a, 0x1040001a,
+        0x3c029000, 0x8ca40000, 0x34420001, 0x3c038000, 0x00821025, 0xaf420020,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x9362007d,
+        0x34630001, 0x3c058000, 0x00831825, 0x34420004, 0xa362007d, 0xaf430020,
+        0x8f4201f8, 0x00451024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4401c0,
+        0xa34201c4, 0xaf4301f8, 0x03e00008, 0x00001021, 0x8f420100, 0x34420001,
+        0xaf4200a4, 0x03e00008, 0x00001021, 0x27bdffe0, 0xafbf0018, 0xafb10014,
+        0xafb00010, 0x9362007e, 0x30d000ff, 0x16020029, 0x00808821, 0x93620080,
+        0x16020026, 0x00000000, 0x9362007f, 0x16020023, 0x00000000, 0x9362007a,
+        0x16020004, 0x00000000, 0x0000000d, 0x00000000, 0x24000771, 0x0e000f49,
+        0x00000000, 0x3c039000, 0x34630001, 0x3c048000, 0x02231825, 0xa370007a,
+        0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x3c028000, 0x9363007d,
+        0x34420001, 0x3c048000, 0x02221025, 0xa363007d, 0xaf420020, 0x8f4201f8,
+        0x00441024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5101c0, 0xa34201c4,
+        0xaf4301f8, 0x0a000c79, 0x8fbf0018, 0x0000000d, 0x00000000, 0x24000781,
+        0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c020800,
+        0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x10600024, 0xafbf0014,
+        0x0e001006, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+        0x8e020004, 0xac820004, 0x8f830018, 0x8e020018, 0xac620008, 0x8f840018,
+        0x8e03001c, 0xac83000c, 0x9602000c, 0x9203000a, 0x8f840018, 0x00021400,
+        0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+        0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x9464466e, 0x8f850018,
+        0x00021400, 0x00441025, 0x24040001, 0x0e001044, 0xaca2001c, 0x8fbf0014,
+        0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8,
+        0xafb00010, 0x27500100, 0x10600020, 0xafbf0014, 0x0e001006, 0x00000000,
+        0x8f820018, 0xac400000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008,
+        0x8f830018, 0xac60000c, 0x9602000c, 0x9603000e, 0x8f840018, 0x00021400,
+        0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+        0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x9464466e, 0x8f850018,
+        0x00021400, 0x00441025, 0x24040001, 0x0e001044, 0xaca2001c, 0x8fbf0014,
+        0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010, 0x27500100,
+        0xafbf0014, 0x9602000c, 0x10400024, 0x00802821, 0x3c020800, 0x8c430020,
+        0x1060003a, 0x8fbf0014, 0x0e001006, 0x00000000, 0x8f840018, 0x8e030000,
+        0xac830000, 0x9602000c, 0x8f840018, 0x00021400, 0xac820004, 0x8f830018,
+        0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+        0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+        0xaca30018, 0x9443466e, 0x8f850018, 0x3c02400b, 0x00621825, 0x0e001044,
+        0xaca3001c, 0x0a000d19, 0x8fbf0014, 0x93620005, 0x30420010, 0x14400015,
+        0x3c029000, 0x34420001, 0x00a21025, 0xaf420020, 0x3c038000, 0x8f420020,
+        0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x93620005, 0x34630001,
+        0x00a02021, 0x00a31825, 0x24055852, 0x34420010, 0xa3620005, 0x0e000553,
+        0xaf430020, 0x0a000d19, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010,
+        0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010,
+        0x27500100, 0x10600022, 0xafbf0014, 0x0e001006, 0x00000000, 0x8f840018,
+        0x8e020004, 0xac820000, 0x9603000c, 0x9762002c, 0x8f840018, 0x00031c00,
+        0x00431025, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+        0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000,
+        0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018,
+        0x3c02400e, 0x00621825, 0x0e001044, 0xaca3001c, 0x0e000d48, 0x8e040000,
+        0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c038000, 0x8f420278,
+        0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf440240, 0xa3420244,
+        0x03e00008, 0xaf430278, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014,
+        0x00808821, 0xafb20018, 0x00c09021, 0xafb00010, 0x30b0ffff, 0x1060001c,
+        0xafbf001c, 0x0e001006, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018,
+        0x00101400, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+        0x8f830018, 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000,
+        0x8c434448, 0x3c020800, 0xac830018, 0x9443466e, 0x8f840018, 0x3c024019,
+        0x00621825, 0xac83001c, 0x0e001044, 0x24040001, 0x8fbf001c, 0x8fb20018,
+        0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x27450100,
+        0xafbf0010, 0x94a3000c, 0x240200c1, 0x14620029, 0x00803021, 0x3c029000,
+        0x34420001, 0x00c21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x3c028000, 0x34420001, 0x3c049000, 0x34840001, 0x3c058000,
+        0x24030012, 0x00c21025, 0x00c42025, 0xa363003f, 0xaf420020, 0xaf440020,
+        0x8f420020, 0x00451024, 0x1440fffd, 0x3c038000, 0x9362007d, 0x34630001,
+        0x3c048000, 0x00c31825, 0x34420020, 0xa362007d, 0xaf430020, 0x8f4201f8,
+        0x00441024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4601c0, 0xa34201c4,
+        0xaf4301f8, 0x0a000db3, 0x8fbf0010, 0x00c02021, 0x94a5000c, 0x24060001,
+        0x0e000f78, 0x240706d8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800,
+        0x8c430020, 0x27bdffe0, 0xafb00010, 0x00808021, 0xafb20018, 0x00a09021,
+        0xafb10014, 0x30d100ff, 0x1060001c, 0xafbf001c, 0x0e001006, 0x00000000,
+        0x8f820018, 0xac500000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018,
+        0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+        0xac520014, 0x8f840018, 0x3c026000, 0x8c434448, 0x3c020800, 0xac830018,
+        0x9443466e, 0x8f840018, 0x3c024010, 0x00621825, 0xac83001c, 0x0e001044,
+        0x02202021, 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008,
+        0x27bd0020, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x93620005, 0x30420001,
+        0x10400033, 0x00808021, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020,
+        0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005,
+        0x3c048000, 0x3c030800, 0x304200fe, 0xa3620005, 0x8c620020, 0x34840001,
+        0x02042025, 0xaf440020, 0x10400020, 0x8fbf0014, 0x0e001006, 0x00000000,
+        0x8f820018, 0xac500000, 0x93630082, 0x9362003f, 0x8f840018, 0x00031a00,
+        0x00431025, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+        0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000,
+        0x8c434448, 0x3c020800, 0xac830018, 0x9443466e, 0x8f840018, 0x3c02400a,
+        0x00621825, 0xac83001c, 0x0e001044, 0x24040001, 0x8fbf0014, 0x8fb00010,
+        0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x8f420188, 0x00803021,
+        0x9364003f, 0x24030012, 0x00021402, 0x1483001c, 0x304500ff, 0x3c029000,
+        0x34420001, 0x3c038000, 0x00c21025, 0xa3650080, 0xa365007a, 0xaf420020,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x3c028000, 0x9363007d, 0x34420001,
+        0x3c048000, 0x00c21025, 0xa363007d, 0xaf420020, 0x8f4201f8, 0x00441024,
+        0x1440fffd, 0x24020002, 0x3c031000, 0xaf4601c0, 0xa34201c4, 0xaf4301f8,
+        0x0a000e54, 0x8fbf0010, 0x9362007e, 0x1445000e, 0x00000000, 0x93620080,
+        0x1045000b, 0x00000000, 0xa3650080, 0x8f820000, 0x93660080, 0x8f440180,
+        0x8f65004c, 0x8c430000, 0x0060f809, 0x00000000, 0x0a000e54, 0x8fbf0010,
+        0xa3650080, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020,
+        0x27bdffe0, 0xafb10014, 0x00808821, 0xafb20018, 0x00a09021, 0xafb00010,
+        0x30d000ff, 0x1060002f, 0xafbf001c, 0x0e001006, 0x00000000, 0x8f820018,
+        0xac510000, 0x8f830018, 0xac700004, 0x8f820018, 0xac520008, 0x8f830018,
+        0xac60000c, 0x8f820018, 0xac400010, 0x9763006a, 0x00032880, 0x50a00001,
+        0x24050001, 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821,
+        0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050,
+        0x00c4182b, 0x54600001, 0x00c02021, 0x8f830018, 0x2402fffe, 0x00822824,
+        0x3c026000, 0xac650014, 0x8f840018, 0x8c434448, 0x3c020800, 0xac830018,
+        0x9443466e, 0x8f840018, 0x3c024011, 0x00621825, 0xac83001c, 0x0e001044,
+        0x24040001, 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008,
+        0x27bd0020, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f440100, 0x27500100,
+        0x8f650050, 0x0e000c45, 0x9206001b, 0x3c020800, 0x8c430020, 0x1060001d,
+        0x8e100018, 0x0e001006, 0x00000000, 0x8f840018, 0x8f420100, 0xac820000,
+        0x8f830018, 0xac700004, 0x8f840018, 0x8f620050, 0xac820008, 0x8f830018,
+        0xac60000c, 0x8f820018, 0xac400010, 0x8f830018, 0x3c026000, 0xac600014,
+        0x8f850018, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x9443466e,
+        0x8f850018, 0x3c02401c, 0x00621825, 0x0e001044, 0xaca3001c, 0x8fbf0014,
+        0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c029000, 0x8f460140, 0x34420001,
+        0x3c038000, 0x00c21025, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+        0x3c048000, 0x34840001, 0x3c059000, 0x34a50001, 0x3c078000, 0x24020012,
+        0x24030080, 0x00c42025, 0x00c52825, 0xa362003f, 0xa3630082, 0xaf440020,
+        0xaf450020, 0x8f420020, 0x00471024, 0x1440fffd, 0x3c038000, 0x9362007d,
+        0x34630001, 0x3c048000, 0x00c31825, 0x34420020, 0xa362007d, 0xaf430020,
+        0x8f4201f8, 0x00441024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4601c0,
+        0xa34201c4, 0x03e00008, 0xaf4301f8, 0x8f430238, 0x3c020800, 0x04610013,
+        0x8c44009c, 0x2406fffe, 0x3c050800, 0x3c038000, 0x2484ffff, 0x14800009,
+        0x00000000, 0x97420078, 0x8ca3007c, 0x24420001, 0x00461024, 0x24630001,
+        0xa7620010, 0x03e00008, 0xaca3007c, 0x8f420238, 0x00431024, 0x1440fff3,
+        0x2484ffff, 0x8f420140, 0x3c031000, 0xaf420200, 0x03e00008, 0xaf430238,
+        0x3c029000, 0x8f440140, 0x34420001, 0x3c038000, 0x00821025, 0xaf420020,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x9362007d,
+        0x34630001, 0x3c058000, 0x00831825, 0x34420001, 0xa362007d, 0xaf430020,
+        0x8f4201f8, 0x00451024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4401c0,
+        0xa34201c4, 0x03e00008, 0xaf4301f8, 0x0000000d, 0x03e00008, 0x00000000,
+        0x0000000d, 0x03e00008, 0x00000000, 0x24020001, 0x03e00008, 0xa7620010,
+        0x9362003f, 0x304400ff, 0x3883000e, 0x2c630001, 0x38820010, 0x2c420001,
+        0x00621825, 0x14600003, 0x24020012, 0x14820003, 0x00000000, 0x03e00008,
+        0x00001021, 0x9363007e, 0x9362007a, 0x14620006, 0x00000000, 0x9363007e,
+        0x24020001, 0x24630001, 0x03e00008, 0xa363007e, 0x9363007e, 0x93620080,
+        0x14620004, 0x24020001, 0xa362000b, 0x03e00008, 0x24020001, 0x03e00008,
+        0x00001021, 0x9362000b, 0x10400021, 0x00001021, 0xa360000b, 0x9362003f,
+        0x304400ff, 0x3883000e, 0x2c630001, 0x38820010, 0x2c420001, 0x00621825,
+        0x14600015, 0x00001821, 0x24020012, 0x10820012, 0x00000000, 0x9363007e,
+        0x9362007a, 0x14620007, 0x00000000, 0x9362007e, 0x24030001, 0x24420001,
+        0xa362007e, 0x03e00008, 0x00601021, 0x9363007e, 0x93620080, 0x14620004,
+        0x00001821, 0x24020001, 0xa362000b, 0x24030001, 0x03e00008, 0x00601021,
+        0x03e00008, 0x00000000, 0x24040001, 0xaf64000c, 0x8f6300dc, 0x8f6200cc,
+        0x50620001, 0xa7640010, 0xa7640012, 0xa7640014, 0x03e00008, 0xa7640016,
+        0x27bdffd8, 0xafb00010, 0x00808021, 0xafb3001c, 0x00c09821, 0xafbf0020,
+        0xafb20018, 0xafb10014, 0x93620023, 0x00e09021, 0x30420040, 0x10400020,
+        0x30b1ffff, 0x3c020800, 0x8c430020, 0x1060001c, 0x00000000, 0x0e001006,
+        0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x3c02008d, 0xac820004,
+        0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+        0x8f820018, 0xac520014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+        0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018, 0x3c024019, 0x00621825,
+        0x0e001044, 0xaca3001c, 0x93620023, 0x30420020, 0x14400003, 0x3c020800,
+        0x52600020, 0x3c029000, 0x8c430020, 0x1060001d, 0x3c029000, 0x0e001006,
+        0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x00111400, 0xac820004,
+        0x8f830018, 0xac720008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+        0x8f820018, 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+        0x3c020800, 0xaca30018, 0x9443466e, 0x8f850018, 0x3c02401b, 0x00621825,
+        0x0e001044, 0xaca3001c, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020,
+        0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93630023,
+        0x3c028000, 0x34420001, 0x02021025, 0x8fbf0020, 0x8fb3001c, 0x8fb20018,
+        0x8fb10014, 0x8fb00010, 0x3063009f, 0xa3630023, 0xaf420020, 0x03e00008,
+        0x27bd0028, 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100,
+        0x1060001d, 0xafbf0014, 0x0e001006, 0x00000000, 0x8f830018, 0x8e020004,
+        0xac620000, 0x8f840018, 0x8e020018, 0xac820004, 0x8f850018, 0x8e020000,
+        0xaca20008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, 0x8f830018,
+        0xac600014, 0x8f820018, 0xac400018, 0x96030008, 0x3c020800, 0x9444466e,
+        0x8f850018, 0x00031c00, 0x00641825, 0x24040001, 0x0e001044, 0xaca3001c,
+        0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c060800, 0x24c54660,
+        0x3c02000a, 0x03421821, 0x94640006, 0x94a2000a, 0x00441023, 0x00021400,
+        0x00021c03, 0x04610006, 0xa4a40006, 0x0000000d, 0x00000000, 0x2400005a,
+        0x0a00101b, 0x24020001, 0x8f820014, 0x0062102b, 0x14400002, 0x00001021,
+        0x24020001, 0x304200ff, 0x1040001c, 0x274a0400, 0x3c07000a, 0x3c020800,
+        0x24454660, 0x94a9000a, 0x8f880014, 0x03471021, 0x94430006, 0x00402021,
+        0xa4a30006, 0x94820006, 0xa4a20006, 0x01221023, 0x00021400, 0x00021403,
+        0x04410006, 0x0048102b, 0x0000000d, 0x00000000, 0x2400005a, 0x0a001036,
+        0x24020001, 0x14400002, 0x00001021, 0x24020001, 0x304200ff, 0x1440ffec,
+        0x03471021, 0x24c44660, 0x8c820010, 0xaf420038, 0x8c830014, 0x3c020005,
+        0xaf43003c, 0xaf420030, 0xaf800010, 0xaf8a0018, 0x03e00008, 0x00000000,
+        0x27bdffe0, 0x8f820010, 0x8f850018, 0x3c070800, 0x24e84660, 0xafbf001c,
+        0xafb20018, 0xafb10014, 0xafb00010, 0x9503000a, 0x8d060014, 0x00009021,
+        0x309000ff, 0x00e08821, 0x24420001, 0x24a50020, 0x24630001, 0xaf820010,
+        0xaf850018, 0xa503000a, 0x24c30020, 0x3c028000, 0x04c10007, 0xad030014,
+        0x00621024, 0x14400005, 0x26224660, 0x8d020010, 0x24420001, 0xad020010,
+        0x26224660, 0x9444000a, 0x94450018, 0x0010102b, 0x00a41826, 0x2c630001,
+        0x00621825, 0x1060001c, 0x3c030006, 0x8f820010, 0x24120001, 0x00021140,
+        0x00431025, 0xaf420030, 0x00000000, 0x00000000, 0x00000000, 0x27450400,
+        0x8f420000, 0x30420010, 0x1040fffd, 0x26224660, 0x9444000a, 0x94430018,
+        0xaf800010, 0xaf850018, 0x14830012, 0x26274660, 0x0e0010d2, 0x00000000,
+        0x1600000e, 0x26274660, 0x0e001006, 0x00000000, 0x0a00108f, 0x26274660,
+        0x00041c00, 0x00031c03, 0x00051400, 0x00021403, 0x00621823, 0x18600002,
+        0x3c026000, 0xac400808, 0x26274660, 0x94e2000e, 0x94e3000c, 0x24420001,
+        0xa4e2000e, 0x3042ffff, 0x50430001, 0xa4e0000e, 0x12000005, 0x3c02000a,
+        0x94e2000a, 0xa74200a2, 0x0a0010cc, 0x02401021, 0x03421821, 0x94640006,
+        0x94e2000a, 0x00441023, 0x00021400, 0x00021c03, 0x04610006, 0xa4e40006,
+        0x0000000d, 0x00000000, 0x2400005a, 0x0a0010ae, 0x24020001, 0x8f820014,
+        0x0062102b, 0x14400002, 0x00001021, 0x24020001, 0x304200ff, 0x1040001b,
+        0x3c020800, 0x3c06000a, 0x24454660, 0x94a8000a, 0x8f870014, 0x03461021,
+        0x94430006, 0x00402021, 0xa4a30006, 0x94820006, 0xa4a20006, 0x01021023,
+        0x00021400, 0x00021403, 0x04410006, 0x0047102b, 0x0000000d, 0x00000000,
+        0x2400005a, 0x0a0010c8, 0x24020001, 0x14400002, 0x00001021, 0x24020001,
+        0x304200ff, 0x1440ffec, 0x03461021, 0x02401021, 0x8fbf001c, 0x8fb20018,
+        0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c020800, 0x24454660,
+        0x94a3001a, 0x8ca40024, 0x00403021, 0x000318c0, 0x00832021, 0xaf44003c,
+        0x8ca20020, 0xaf420038, 0x3c020050, 0x34420008, 0xaf420030, 0x00000000,
+        0x00000000, 0x00000000, 0x8f420000, 0x30420020, 0x1040fffd, 0x00000000,
+        0x8f430400, 0x24c64660, 0xacc30010, 0x8f420404, 0x3c030020, 0xacc20014,
+        0xaf430030, 0x94c40018, 0x94c3001c, 0x94c2001a, 0x94c5001e, 0x00832021,
+        0x24420001, 0xa4c2001a, 0x3042ffff, 0x14450002, 0xa4c40018, 0xa4c0001a,
+        0x03e00008, 0x00000000, 0x8f820010, 0x3c030006, 0x00021140, 0x00431025,
+        0xaf420030, 0x00000000, 0x00000000, 0x00000000, 0x27430400, 0x8f420000,
+        0x30420010, 0x1040fffd, 0x00000000, 0xaf800010, 0xaf830018, 0x03e00008,
+        0x00000000, 0x27bdffe8, 0xafb00010, 0x3c100800, 0x26104660, 0x3c05000a,
+        0x02002021, 0x03452821, 0xafbf0014, 0x0e001128, 0x2406000a, 0x96020002,
+        0x9603001e, 0x3042000f, 0x24420003, 0x00431804, 0x24027fff, 0x0043102b,
+        0xaf830014, 0x10400004, 0x00000000, 0x0000000d, 0x00000000, 0x24000043,
+        0x0e0010d2, 0x00000000, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018,
+        0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000,
+        0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a001137, 0x00a01021,
+        0xac860000, 0x24840004, 0x00a01021, 0x1440fffc, 0x24a5ffff, 0x03e00008,
+        0x00000000, 0x3c036000, 0x8c642b7c, 0x3c036010, 0x8c6553fc, 0x00041582,
+        0x00042302, 0x308403ff, 0x00052d82, 0x00441026, 0x0002102b, 0x0005282b,
+        0x00451025, 0x1440000d, 0x3c020050, 0x34420004, 0xaf400038, 0xaf40003c,
+        0xaf420030, 0x00000000, 0x00000000, 0x8f420000, 0x30420020, 0x1040fffd,
+        0x3c020020, 0xaf420030, 0x0000000d, 0x03e00008, 0x00000000, 0x3c020050,
+        0x34420004, 0xaf440038, 0xaf45003c, 0xaf420030, 0x00000000, 0x00000000,
+        0x8f420000, 0x30420020, 0x1040fffd, 0x3c020020, 0xaf420030, 0x03e00008,
+        0x00000000, 0x00000000 };
+
+static u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_COM_b06FwRodata[(0x18/4) + 1] = {
+        0x08002318, 0x08002348, 0x08002378, 0x080023a8, 0x080023d8, 0x00000000,
+        0x00000000 };
+
+static u32 bnx2_COM_b06FwBss[(0x88/4) + 1] = { 0x00000000 };
+static u32 bnx2_COM_b06FwSbss[(0x1c/4) + 1] = { 0x00000000 };
+
+static int bnx2_RXP_b06FwReleaseMajor = 0x0;
+static int bnx2_RXP_b06FwReleaseMinor = 0x0;
+static int bnx2_RXP_b06FwReleaseFix = 0x0;
+static u32 bnx2_RXP_b06FwStartAddr = 0x08000060;
+static u32 bnx2_RXP_b06FwTextAddr = 0x08000000;
+static int bnx2_RXP_b06FwTextLen = 0x20b8;
+static u32 bnx2_RXP_b06FwDataAddr = 0x080020e0;
+static int bnx2_RXP_b06FwDataLen = 0x0;
+static u32 bnx2_RXP_b06FwRodataAddr = 0x00000000;
+static int bnx2_RXP_b06FwRodataLen = 0x0;
+static u32 bnx2_RXP_b06FwBssAddr = 0x08002100;
+static int bnx2_RXP_b06FwBssLen = 0x239c;
+static u32 bnx2_RXP_b06FwSbssAddr = 0x080020e0;
+static int bnx2_RXP_b06FwSbssLen = 0x14;
+
+static u32 bnx2_RXP_b06FwText[(0x20b8/4) + 1] = {
+        0x0a000018, 0x00000000, 0x00000000, 0x0000000d, 0x72787020, 0x302e362e,
+        0x39000000, 0x00060903, 0x00000000, 0x0000000d, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800,
+        0x244220e0, 0x3c030800, 0x2463449c, 0xac400000, 0x0043202b, 0x1480fffd,
+        0x24420004, 0x3c1d0800, 0x37bd3ffc, 0x03a0f021, 0x3c100800, 0x26100060,
+        0x3c1c0800, 0x279c20e0, 0x0e000329, 0x00000000, 0x0000000d, 0x8f870008,
+        0x2ce20080, 0x10400018, 0x3c030800, 0x24633490, 0x8f460100, 0x00072140,
+        0x00831021, 0xac460000, 0x8f450104, 0x00641021, 0xac450004, 0x8f460108,
+        0xac460008, 0x8f45010c, 0xac45000c, 0x8f460114, 0xac460010, 0x8f450118,
+        0xac450014, 0x8f460124, 0xac460018, 0x8f450128, 0x00641821, 0x24e20001,
+        0xaf820008, 0xac65001c, 0x03e00008, 0x00000000, 0x00804021, 0x8f830000,
+        0x24070001, 0x3c020001, 0x00621024, 0x10400037, 0x00603021, 0x9742010e,
+        0x3c038000, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+        0xa342018b, 0x8f840004, 0x24020080, 0x24030002, 0xaf420180, 0xa743018c,
+        0x10800005, 0xa745018e, 0x9743011c, 0x9742011e, 0x0a000069, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x24020003, 0x30838000, 0x1060000d, 0xa7420188, 0x93420116, 0x304200fc,
+        0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600005, 0x00000000,
+        0x3c02ffff, 0x34427fff, 0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c,
+        0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+        0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00001021, 0x30c21000,
+        0x1040000f, 0x00000000, 0x9742010c, 0x3042fc00, 0x5440000b, 0x24070005,
+        0x3c021000, 0x00c21024, 0x10400007, 0x3c030dff, 0x3463ffff, 0x3c020e00,
+        0x00c21024, 0x0062182b, 0x54600001, 0x24070005, 0x8f82000c, 0x30434000,
+        0x10600016, 0x00404821, 0x3c020f00, 0x00c21024, 0x14400012, 0x00000000,
+        0x93420116, 0x34424000, 0x03421821, 0x94650002, 0x2ca21389, 0x1040000b,
+        0x3c020800, 0x24422100, 0x00051942, 0x00031880, 0x00621821, 0x30a5001f,
+        0x8c640000, 0x24020001, 0x00a21004, 0x00822024, 0x01044025, 0x11000037,
+        0x3c021000, 0x9742010e, 0x34e60002, 0x3c038000, 0x24420004, 0x3045ffff,
+        0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x8f840004,
+        0x24020180, 0x24030002, 0xaf420180, 0xa743018c, 0x10800005, 0xa745018e,
+        0x9743011c, 0x9742011e, 0x0a0000cd, 0x00021400, 0x9743011e, 0x9742011c,
+        0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c, 0x30828000, 0x1040000c,
+        0xa7460188, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000,
+        0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00821024, 0xaf82000c,
+        0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff,
+        0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x03e00008,
+        0x00001021, 0x00c21024, 0x104000ba, 0x3c020800, 0x8c430030, 0x1060003e,
+        0x31224000, 0x1040003c, 0x3c030f00, 0x00c31824, 0x3c020100, 0x0043102b,
+        0x14400038, 0x3c030800, 0x9742010e, 0x34e60002, 0x3c038000, 0x24420004,
+        0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b,
+        0x8f840004, 0x24020080, 0x24030002, 0xaf420180, 0xa743018c, 0x10800005,
+        0xa745018e, 0x9743011c, 0x9742011e, 0x0a000110, 0x00021400, 0x9743011e,
+        0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c, 0x30828000,
+        0x1040000c, 0xa7460188, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+        0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00821024,
+        0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+        0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+        0x03e00008, 0x00001021, 0x3c030800, 0x8c620024, 0x30420008, 0x1040003d,
+        0x34e80002, 0x3c020f00, 0x00c21024, 0x5440003a, 0x3107ffff, 0x9742010c,
+        0x30420200, 0x50400036, 0x3107ffff, 0x9742010e, 0x30e6fffb, 0x3c038000,
+        0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+        0xa342018b, 0x8f840004, 0x24020180, 0x24030002, 0xaf420180, 0xa743018c,
+        0x10800005, 0xa745018e, 0x9743011c, 0x9742011e, 0x0a000153, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x30828000, 0x1040000c, 0xa7460188, 0x93420116, 0x304200fc, 0x005a1021,
+        0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+        0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff,
+        0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+        0xaf4201b8, 0x3107ffff, 0x8f820000, 0x3c068000, 0x9743010e, 0x00021442,
+        0x30440780, 0x24630004, 0x3065ffff, 0x8f4201b8, 0x00461024, 0x1440fffd,
+        0x24020003, 0xa342018b, 0x8f830004, 0x24020002, 0xaf440180, 0xa742018c,
+        0x10600005, 0xa745018e, 0x9743011c, 0x9742011e, 0x0a000189, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x30828000, 0x1040000c, 0xa7470188, 0x93420116, 0x304200fc, 0x005a1021,
+        0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+        0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff,
+        0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+        0xaf4201b8, 0x03e00008, 0x00001021, 0x8f424000, 0x30420100, 0x104000ef,
+        0x3c020800, 0x8c440024, 0x24030001, 0x14830036, 0x00404021, 0x9742010e,
+        0x34e50002, 0x3c038000, 0x24420004, 0x3044ffff, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x24020003, 0xa342018b, 0x8f830004, 0x24020002, 0xaf400180,
+        0xa742018c, 0x10600005, 0xa744018e, 0x9743011c, 0x9742011e, 0x0a0001c6,
+        0x00021400, 0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8,
+        0x8f84000c, 0x30828000, 0x1040000c, 0xa7450188, 0x93420116, 0x304200fc,
+        0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff,
+        0x34427fff, 0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104,
+        0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac,
+        0x3c021000, 0xaf4201b8, 0x03e00008, 0x00001021, 0x30820001, 0x10400035,
+        0x30e90004, 0x9742010e, 0x30e6fffb, 0x3c038000, 0x24420004, 0x3044ffff,
+        0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x8f830004,
+        0x24020002, 0xaf400180, 0xa742018c, 0x10600005, 0xa744018e, 0x9743011c,
+        0x9742011e, 0x0a0001fe, 0x00021400, 0x9743011e, 0x9742011c, 0x00021400,
+        0x00621825, 0xaf4301a8, 0x8f84000c, 0x30828000, 0x1040000c, 0xa7470188,
+        0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff,
+        0x14600004, 0x3c02ffff, 0x34427fff, 0x00821024, 0xaf82000c, 0x9782000e,
+        0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825,
+        0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x30c7ffff, 0x8d020024,
+        0x30420004, 0x10400037, 0x8d020024, 0x9742010e, 0x30e6fffb, 0x3c038000,
+        0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+        0xa342018b, 0x8f840004, 0x24020100, 0x24030002, 0xaf420180, 0xa743018c,
+        0x10800005, 0xa745018e, 0x9743011c, 0x9742011e, 0x0a000237, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x30828000, 0x1040000c, 0xa7470188, 0x93420116, 0x304200fc, 0x005a1021,
+        0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+        0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff,
+        0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+        0xaf4201b8, 0x30c7ffff, 0x8d020024, 0x30420008, 0x10400034, 0x00000000,
+        0x9742010e, 0x3c038000, 0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x24020003, 0xa342018b, 0x8f840004, 0x24020180, 0x24030002,
+        0xaf420180, 0xa743018c, 0x10800005, 0xa745018e, 0x9743011c, 0x9742011e,
+        0x0a00026f, 0x00021400, 0x9743011e, 0x9742011c, 0x00021400, 0x00621825,
+        0xaf4301a8, 0x8f84000c, 0x30828000, 0x1040000c, 0xa7470188, 0x93420116,
+        0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004,
+        0x3c02ffff, 0x34427fff, 0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c,
+        0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+        0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x15200046, 0x00001021, 0x3c038000,
+        0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0x24032000, 0xa342018b,
+        0xa7430188, 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00001021, 0x3c030800,
+        0x8c620024, 0x30420001, 0x10400035, 0x00001021, 0x9742010e, 0x34e50002,
+        0x3c038000, 0x24420004, 0x3044ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+        0x24020003, 0xa342018b, 0x8f830004, 0x24020002, 0xaf400180, 0xa742018c,
+        0x10600005, 0xa744018e, 0x9743011c, 0x9742011e, 0x0a0002b5, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x30828000, 0x1040000c, 0xa7450188, 0x93420116, 0x304200fc, 0x005a1021,
+        0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+        0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff,
+        0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+        0xaf4201b8, 0x00001021, 0x03e00008, 0x00000000, 0x27bdffe0, 0xafbf0018,
+        0xafb10014, 0xafb00010, 0x8f420140, 0xaf420020, 0x8f430148, 0x3c027000,
+        0x00621824, 0x3c024000, 0x1062000c, 0x0043102b, 0x14400006, 0x3c025000,
+        0x3c023000, 0x1062000b, 0x3c024000, 0x0a00031f, 0x00000000, 0x10620034,
+        0x3c024000, 0x0a00031f, 0x00000000, 0x0e00067c, 0x00000000, 0x0a00031f,
+        0x3c024000, 0x8f420148, 0x24030002, 0x3044ffff, 0x00021402, 0x305000ff,
+        0x1203000c, 0x27510180, 0x2a020003, 0x10400005, 0x24020003, 0x0600001d,
+        0x36053000, 0x0a00030a, 0x3c038000, 0x12020007, 0x00000000, 0x0a000317,
+        0x00000000, 0x0e000423, 0x00000000, 0x0a000308, 0x00402021, 0x0e000435,
+        0x00000000, 0x00402021, 0x36053000, 0x3c038000, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x24020002, 0xa6250008, 0xa222000b, 0xa6240010, 0x8f420144,
+        0x3c031000, 0xae220024, 0xaf4301b8, 0x0a00031f, 0x3c024000, 0x0000000d,
+        0x00000000, 0x240001c3, 0x0a00031f, 0x3c024000, 0x0e0007f7, 0x00000000,
+        0x3c024000, 0xaf420178, 0x00000000, 0x8fbf0018, 0x8fb10014, 0x8fb00010,
+        0x03e00008, 0x27bd0020, 0x24020800, 0x03e00008, 0xaf4201b8, 0x27bdffe8,
+        0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, 0x2403ff7f,
+        0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000, 0x3c040008,
+        0xaf430008, 0x8e020808, 0x3c030800, 0xac600020, 0x3042fff0, 0x2c420001,
+        0xaf820004, 0x0e000819, 0x0344d825, 0x0e000781, 0x00000000, 0x3c020400,
+        0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c, 0x8e021980,
+        0x34420200, 0xae021980, 0x8f500000, 0x32020003, 0x1040fffd, 0x32020001,
+        0x10400004, 0x32020002, 0x0e0003bd, 0x00000000, 0x32020002, 0x1040fff6,
+        0x00000000, 0x0e0002d4, 0x00000000, 0x0a00034a, 0x00000000, 0x27bdffe8,
+        0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, 0x2403ff7f,
+        0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000, 0x3c040008,
+        0xaf430008, 0x8e020808, 0x3c030800, 0xac600020, 0x3042fff0, 0x2c420001,
+        0xaf820004, 0x0e000819, 0x0344d825, 0x0e000781, 0x00000000, 0x3c020400,
+        0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c, 0x8e021980,
+        0x8fbf0014, 0x34420200, 0xae021980, 0x8fb00010, 0x03e00008, 0x27bd0018,
+        0x30a5ffff, 0x30c6ffff, 0x30e7ffff, 0x3c038000, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x24020003, 0xa342018b, 0x8f830004, 0xaf440180, 0xa745018c,
+        0x10600005, 0xa746018e, 0x9743011c, 0x9742011e, 0x0a000393, 0x00021400,
+        0x9743011e, 0x9742011c, 0x00021400, 0x00621825, 0xaf4301a8, 0x8f84000c,
+        0x30828000, 0x1040000c, 0xa7470188, 0x93420116, 0x304200fc, 0x005a1021,
+        0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+        0x00821024, 0xaf82000c, 0x9782000e, 0x9743010c, 0x8f440104, 0x3042bfff,
+        0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+        0xaf4201b8, 0x03e00008, 0x00000000, 0x3c038000, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x24020002, 0x24032000, 0xa342018b, 0xa7430188, 0x3c021000,
+        0xaf4201b8, 0x03e00008, 0x00000000, 0x27bdffe8, 0xafbf0010, 0x8f460128,
+        0xaf460020, 0x8f420104, 0x8f450100, 0x24030800, 0x3c040010, 0xaf820000,
+        0x00441024, 0xaf85000c, 0xaf4301b8, 0x14400005, 0x3c02001f, 0x3c030800,
+        0x8c620020, 0x0a0003d5, 0x00002021, 0x3442ff00, 0x14c20009, 0x2402bfff,
+        0x3c030800, 0x8c620020, 0x24040001, 0x24420001, 0x0e00004c, 0xac620020,
+        0x0a0003e4, 0x00000000, 0x00a21024, 0x14400006, 0x00000000, 0xaf400048,
+        0x0e000448, 0xaf400040, 0x0a0003e4, 0x00000000, 0x0e000783, 0x00000000,
+        0x10400005, 0x3c024000, 0x8f430124, 0x3c026020, 0xac430014, 0x3c024000,
+        0xaf420138, 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe0,
+        0xafbf0018, 0xafb10014, 0xafb00010, 0x8f420148, 0x24030002, 0x3044ffff,
+        0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003, 0x10400005,
+        0x24020003, 0x0600001d, 0x36053000, 0x0a00040e, 0x3c038000, 0x12020007,
+        0x00000000, 0x0a00041b, 0x00000000, 0x0e000423, 0x00000000, 0x0a00040c,
+        0x00402021, 0x0e000435, 0x00000000, 0x00402021, 0x36053000, 0x3c038000,
+        0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008, 0xa222000b,
+        0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8, 0x0a00041f,
+        0x8fbf0018, 0x0000000d, 0x00000000, 0x240001c3, 0x8fbf0018, 0x8fb10014,
+        0x8fb00010, 0x03e00008, 0x27bd0020, 0x3084ffff, 0x2c821389, 0x1040000d,
+        0x00001021, 0x3c030800, 0x24632100, 0x00042942, 0x00052880, 0x00a32821,
+        0x3086001f, 0x8ca40000, 0x24030001, 0x00c31804, 0x00832025, 0x03e00008,
+        0xaca40000, 0x03e00008, 0x24020091, 0x3084ffff, 0x2c821389, 0x1040000e,
+        0x00001021, 0x3c030800, 0x24632100, 0x00042942, 0x00052880, 0x00a32821,
+        0x3086001f, 0x24030001, 0x8ca40000, 0x00c31804, 0x00031827, 0x00832024,
+        0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x27bdffb0, 0x3c026000,
+        0xafbf0048, 0x8c434448, 0xaf630140, 0x93620005, 0x30420001, 0x14400005,
+        0x00000000, 0x0e0007ed, 0x00000000, 0x0a00067a, 0x8fbf0048, 0x93420116,
+        0x93430112, 0x8f430104, 0x3c040020, 0x34424000, 0x00641824, 0x1060000d,
+        0x03426021, 0x8f430128, 0x27420180, 0xac430000, 0x8f650040, 0x24040008,
+        0x240340c1, 0xa4430008, 0x24030002, 0xa043000b, 0x3c031000, 0x0a000563,
+        0xa044000a, 0x8f420104, 0x3c030040, 0x00431024, 0x10400007, 0x00000000,
+        0x8f430128, 0x27420180, 0xac430000, 0x8f650040, 0x0a00055c, 0x24040010,
+        0xaf400048, 0xaf400054, 0xaf400040, 0x8f630048, 0x8f620040, 0x00624823,
+        0x05210004, 0x00000000, 0x0000000d, 0x00000000, 0x24000132, 0x9742011a,
+        0x3046ffff, 0x10c00004, 0x8d880004, 0x01061021, 0x0a000487, 0x2445ffff,
+        0x01002821, 0x918a000d, 0xa7a00020, 0xafa00028, 0x9364003f, 0x3c026000,
+        0x8c434448, 0x308700ff, 0x31420004, 0x10400033, 0xaf630144, 0x24090012,
+        0x14e90006, 0x3c040800, 0x8c830028, 0x24020001, 0x24630001, 0x0a00054e,
+        0xac830028, 0x8f620044, 0x15020012, 0x97a20020, 0x27a60010, 0x27450180,
+        0x3442001a, 0xa7a20020, 0x8f630040, 0x3c048000, 0x24020020, 0xa3a70022,
+        0xa3a90023, 0xa3a2001a, 0xafa30028, 0x8f4201b8, 0x00441024, 0x1440fffd,
+        0x00000000, 0x0a000533, 0x00000000, 0x8f620044, 0x01021023, 0x0440009e,
+        0x24020001, 0x8f620048, 0x01021023, 0x0441009a, 0x24020001, 0x97a20020,
+        0x27a60010, 0x34420001, 0xa7a20020, 0x8f630040, 0x27450180, 0x3c048000,
+        0xafa30028, 0x8f4201b8, 0x00441024, 0x1440fffd, 0x00000000, 0x0a000533,
+        0x00000000, 0x3c026000, 0x8c424448, 0xaf620148, 0x8f630040, 0x00685823,
+        0x19600013, 0x00cb102a, 0x54400007, 0x314a00fe, 0x5566000c, 0x010b4021,
+        0x31420001, 0x54400009, 0x010b4021, 0x314a00fe, 0x24020001, 0xa7a20020,
+        0x8f630040, 0x00c05821, 0x00003021, 0x0a0004dd, 0xafa30028, 0x00cb1023,
+        0x0a0004dd, 0x3046ffff, 0x00005821, 0x8f620048, 0x2442ffff, 0x00a21823,
+        0x18600019, 0x0066102a, 0x14400013, 0x24020001, 0xa7a20020, 0x8f630040,
+        0xafa30028, 0x8f620040, 0x55020005, 0x27a60010, 0x55200003, 0x27a60010,
+        0x0a0004f6, 0x00c01821, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x00000000, 0x0a000533, 0x00000000, 0x8f650048, 0x00c31023,
+        0x3046ffff, 0x314a00f6, 0x3c046000, 0x8c824448, 0x31430002, 0x1060001e,
+        0xaf62014c, 0x8f620044, 0x1502000e, 0x97a20020, 0x27a60010, 0x34420200,
+        0xa7a20020, 0x8f630040, 0x27450180, 0x3c048000, 0xafa30028, 0x8f4201b8,
+        0x00441024, 0x1440fffd, 0x00000000, 0x0a000533, 0x00000000, 0x27a60010,
+        0x34420001, 0xa7a20020, 0x8f630040, 0x27450180, 0x3c048000, 0xafa30028,
+        0x8f4201b8, 0x00441024, 0x1440fffd, 0x00000000, 0x0a000533, 0x00000000,
+        0x3c026000, 0x8c424448, 0x31430010, 0xaf620150, 0x54600003, 0x8d890008,
+        0x0a00054e, 0x24020001, 0x8f630054, 0x2522ffff, 0x00431023, 0x1840002a,
+        0x24020001, 0x27a60010, 0xa7a20020, 0x8f630040, 0x27450180, 0x3c048000,
+        0xafa30028, 0x8f4201b8, 0x00441024, 0x1440fffd, 0x00000000, 0x8f420128,
+        0xaca20000, 0x8cc30018, 0x240240c1, 0xa4a20008, 0xaca30018, 0x90c4000a,
+        0x24020002, 0xa0a2000b, 0xa0a4000a, 0x94c20010, 0xa4a20010, 0x90c30012,
+        0xa0a30012, 0x90c20013, 0xa0a20013, 0x8cc30014, 0xaca30014, 0x8cc20024,
+        0xaca20024, 0x8cc30028, 0xaca30028, 0x8cc4002c, 0x24020001, 0x3c031000,
+        0xaca4002c, 0xaf4301b8, 0xaf400044, 0xaf400050, 0x0a00067a, 0x8fbf0048,
+        0x3c026000, 0x8c424448, 0x31430020, 0x10600019, 0xaf620154, 0x8f430128,
+        0x27420180, 0xac430000, 0x8f650040, 0x24040004, 0x240340c1, 0xa4430008,
+        0x24030002, 0xa044000a, 0x24040008, 0xa043000b, 0x3c031000, 0xa4440010,
+        0xa0400012, 0xa0400013, 0xac400014, 0xac400024, 0xac400028, 0xac40002c,
+        0xac450018, 0x0e0007ed, 0xaf4301b8, 0x0a00067a, 0x8fbf0048, 0x8f430104,
+        0x8c824448, 0x38e3000a, 0x2c630001, 0xaf620158, 0x38e2000c, 0x2c420001,
+        0x00621825, 0x14600003, 0x2402000e, 0x14e2002a, 0x00000000, 0x50c00008,
+        0x9584000e, 0x10c00004, 0xa7a60040, 0x01061021, 0x0a000583, 0x2445ffff,
+        0x01002821, 0x9584000e, 0x93630035, 0x8f62004c, 0x00642004, 0x00892021,
+        0x00821023, 0x1840001f, 0x3c026000, 0x8f620018, 0x01021023, 0x1c40000f,
+        0x97a20020, 0x8f620018, 0x15020018, 0x3c026000, 0x8f62001c, 0x01221023,
+        0x1c400008, 0x97a20020, 0x8f62001c, 0x15220011, 0x3c026000, 0x8f620058,
+        0x00821023, 0x1840000c, 0x97a20020, 0xafa50028, 0xafa80034, 0xafa90038,
+        0xafa4003c, 0x34420020, 0x0a0005a8, 0xa7a20020, 0x8f680040, 0x00003021,
+        0x8f640058, 0x01002821, 0x3c026000, 0x8c434448, 0xaf63015c, 0x8f62004c,
+        0x01221023, 0x18400009, 0x00000000, 0x8f620054, 0x01221023, 0x1c400005,
+        0x97a20020, 0xafa50028, 0xafa90024, 0x0a0005c3, 0x34420040, 0x9742011a,
+        0x1440000c, 0x24020014, 0x8f620058, 0x14820009, 0x24020014, 0x8f63004c,
+        0x8f620054, 0x10620004, 0x97a20020, 0xafa50028, 0x34420080, 0xa7a20020,
+        0x24020014, 0x10e2000a, 0x28e20015, 0x10400005, 0x2402000c, 0x10e20006,
+        0x3c026000, 0x0a000600, 0x00000000, 0x24020016, 0x14e20031, 0x3c026000,
+        0x8f620054, 0x24420001, 0x1522002d, 0x3c026000, 0x24020014, 0x10e2001e,
+        0x28e20015, 0x10400005, 0x2402000c, 0x10e20008, 0x3c026000, 0x0a000600,
+        0x00000000, 0x24020016, 0x10e2000c, 0x97a20020, 0x0a000600, 0x3c026000,
+        0x97a30020, 0x2402000e, 0xafa50028, 0xa3a70022, 0xa3a20023, 0xafa90024,
+        0x34630054, 0x0a0005ff, 0xa7a30020, 0x24030010, 0x24040002, 0xafa50028,
+        0xa3a70022, 0xa3a30023, 0xa3a4001a, 0xafa90024, 0x0a0005fe, 0x3442005d,
+        0x97a20020, 0x24030012, 0x24040002, 0xafa50028, 0xa3a70022, 0xa3a30023,
+        0xa3a4001a, 0xafa90024, 0x3042fffe, 0x3442005c, 0xa7a20020, 0x3c026000,
+        0x8c434448, 0x31420001, 0xaf630160, 0x1040002c, 0x2402000c, 0x10e20014,
+        0x28e2000d, 0x10400005, 0x2402000a, 0x10e20008, 0x97a20020, 0x0a000631,
+        0x3c026000, 0x2402000e, 0x10e20018, 0x3c026000, 0x0a000631, 0x00000000,
+        0x24030008, 0x24040002, 0xafa50028, 0xa3a70022, 0xa3a30023, 0xa3a4001a,
+        0x0a00062f, 0x34420013, 0x97a30020, 0x30620004, 0x1440000b, 0x97a20020,
+        0x3462001b, 0xa7a20020, 0x24020016, 0x24030002, 0xafa50028, 0xa3a70022,
+        0xa3a20023, 0x0a000630, 0xa3a3001a, 0x97a20020, 0x24030010, 0x24040002,
+        0xafa50028, 0xa3a70022, 0xa3a30023, 0xa3a4001a, 0x3442001b, 0xa7a20020,
+        0x3c026000, 0x8c434448, 0x31420009, 0x0002102b, 0x00021023, 0x30420007,
+        0x34440003, 0xaf630164, 0x10c00016, 0x24030800, 0x8f820010, 0x27450180,
+        0x24420001, 0xaf820010, 0x24020004, 0xaf4301b8, 0xa4a40008, 0xa0a2000b,
+        0x93440120, 0x3c031000, 0xa4a6000e, 0xaca90024, 0xaca80028, 0x008b2021,
+        0xa4a4000c, 0xaf4301b8, 0x97a20020, 0x00003021, 0x3042ffbf, 0x0a000650,
+        0xa7a20020, 0x24060001, 0x3c026000, 0x8c434448, 0xaf630168, 0x97a20020,
+        0x10400020, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+        0x00000000, 0x8f420128, 0xaca20000, 0x8fa30028, 0x240240c1, 0xa4a20008,
+        0xaca30018, 0x93a4001a, 0x24020002, 0xa0a2000b, 0xa0a4000a, 0x97a20020,
+        0xa4a20010, 0x93a30022, 0xa0a30012, 0x93a20023, 0xa0a20013, 0x8fa30024,
+        0xaca30014, 0x8fa20034, 0xaca20024, 0x8fa30038, 0xaca30028, 0x8fa2003c,
+        0x3c031000, 0xaca2002c, 0xaf4301b8, 0x3c026000, 0x8c434448, 0x00c01021,
+        0xaf63016c, 0x8fbf0048, 0x03e00008, 0x27bd0050, 0x8f460140, 0x8f470148,
+        0x3c028000, 0x00e24024, 0x00072c02, 0x30a300ff, 0x2402000b, 0x1062008f,
+        0x27440180, 0x2862000c, 0x10400011, 0x24020006, 0x1062005a, 0x28620007,
+        0x10400007, 0x24020008, 0x10600024, 0x24020001, 0x10620037, 0x00000000,
+        0x0a00077e, 0x00000000, 0x106200a9, 0x24020009, 0x106200bb, 0x00071c02,
+        0x0a00077e, 0x00000000, 0x2402001b, 0x106200c7, 0x2862001c, 0x10400007,
+        0x2402000e, 0x106200b1, 0x24020019, 0x106200c2, 0x00071c02, 0x0a00077e,
+        0x00000000, 0x24020080, 0x10620060, 0x28620081, 0x10400005, 0x2402001c,
+        0x10620094, 0x00071c02, 0x0a00077e, 0x00000000, 0x240200c2, 0x106200c5,
+        0x00a01821, 0x0a00077e, 0x00000000, 0x00a01821, 0x3c058000, 0x8f4201b8,
+        0x00451024, 0x1440fffd, 0x24020001, 0xa4830008, 0x24030002, 0xac860000,
+        0xac800004, 0xa082000a, 0xa083000b, 0xa4870010, 0x8f430144, 0x3c021000,
+        0xac800028, 0xac830024, 0x3c036000, 0xaf4201b8, 0x03e00008, 0xac600808,
+        0x11000009, 0x00a01821, 0x3c020800, 0x24030002, 0xa0434490, 0x24424490,
+        0xac460008, 0x8f430144, 0x03e00008, 0xac430004, 0x3c058000, 0x8f4201b8,
+        0x00451024, 0x1440fffd, 0x24020002, 0xac800000, 0xac860004, 0xa4830008,
+        0xa082000a, 0xa082000b, 0xa4870010, 0xac800024, 0x8f420144, 0x3c031000,
+        0xac820028, 0x3c026000, 0xaf4301b8, 0x03e00008, 0xac400808, 0x00a01821,
+        0x3c080800, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x00000000,
+        0xac860000, 0x91024490, 0x00002821, 0x10400002, 0x25064490, 0x8cc50008,
+        0xac850004, 0xa4830008, 0x91034490, 0x24020002, 0xa082000b, 0xa4870010,
+        0x34630001, 0xa083000a, 0x8f420144, 0xac820024, 0x91034490, 0x10600002,
+        0x00001021, 0x8cc20004, 0xac820028, 0x3c021000, 0xaf4201b8, 0x3c026000,
+        0xa1004490, 0x03e00008, 0xac400808, 0x00a01821, 0x3c058000, 0x8f4201b8,
+        0x00451024, 0x1440fffd, 0x24020002, 0xa082000b, 0xa4830008, 0xa4870010,
+        0x8f420144, 0x3c031000, 0xa4820012, 0x03e00008, 0xaf4301b8, 0x30e2ffff,
+        0x14400028, 0x00071c02, 0x93620005, 0x30420004, 0x14400020, 0x3c029000,
+        0x34420001, 0x00c21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+        0x1440fffd, 0x00000000, 0x93620005, 0x3c038000, 0x34630001, 0x00c31825,
+        0x34420004, 0xa3620005, 0xaf430020, 0x93620005, 0x30420004, 0x14400003,
+        0x3c038000, 0x0000000d, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+        0x24020005, 0x3c031000, 0xac860000, 0xa082000b, 0xaf4301b8, 0x0a00073d,
+        0x00071c02, 0x0000000d, 0x03e00008, 0x00000000, 0x00071c02, 0x3c058000,
+        0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001, 0xa4830008, 0x24030002,
+        0xac860000, 0xac800004, 0xa082000a, 0xa083000b, 0xa4870010, 0x8f430144,
+        0x3c021000, 0xac800028, 0xac830024, 0x03e00008, 0xaf4201b8, 0x00071c02,
+        0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, 0xac800000,
+        0xac860004, 0xa4830008, 0xa082000a, 0xa082000b, 0xa4870010, 0xac800024,
+        0x8f420144, 0x3c031000, 0xac820028, 0x03e00008, 0xaf4301b8, 0x00071c02,
+        0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001, 0xa4830008,
+        0x24030002, 0xa082000a, 0x3c021000, 0xac860000, 0xac800004, 0xa083000b,
+        0xa4870010, 0xac800024, 0xac800028, 0x03e00008, 0xaf4201b8, 0x3c058000,
+        0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, 0xac860000, 0xac800004,
+        0xa4830008, 0xa080000a, 0x0a000748, 0xa082000b, 0x0000000d, 0x03e00008,
+        0x00000000, 0x03e00008, 0x00000000, 0x8f420100, 0x3042003e, 0x14400011,
+        0x24020001, 0xaf400048, 0x8f420100, 0x304207c0, 0x10400005, 0x00000000,
+        0xaf40004c, 0xaf400050, 0x03e00008, 0x24020001, 0xaf400054, 0xaf400040,
+        0x8f420100, 0x30423800, 0x54400001, 0xaf400044, 0x24020001, 0x03e00008,
+        0x00000000, 0x3c029000, 0x34420001, 0x00822025, 0xaf440020, 0x3c038000,
+        0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x03e00008, 0x00000000,
+        0x3c028000, 0x34420001, 0x00822025, 0x03e00008, 0xaf440020, 0x8f430128,
+        0x27420180, 0xac430000, 0x8f650040, 0x240340c1, 0xa4430008, 0x24030002,
+        0xa044000a, 0x24040008, 0xa043000b, 0x3c031000, 0xa4440010, 0xa0400012,
+        0xa0400013, 0xac400014, 0xac400024, 0xac400028, 0xac40002c, 0xac450018,
+        0x03e00008, 0xaf4301b8, 0x24020001, 0xacc40000, 0x03e00008, 0xa4e50000,
+        0x03e00008, 0x24020001, 0x24020001, 0xaf400044, 0x03e00008, 0xaf400050,
+        0x00803021, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+        0x00000000, 0x8f420128, 0xaca20000, 0x8cc30018, 0x240240c1, 0xa4a20008,
+        0xaca30018, 0x90c4000a, 0x24020002, 0xa0a2000b, 0xa0a4000a, 0x94c20010,
+        0xa4a20010, 0x90c30012, 0xa0a30012, 0x90c20013, 0xa0a20013, 0x8cc30014,
+        0xaca30014, 0x8cc20024, 0xaca20024, 0x8cc30028, 0xaca30028, 0x8cc2002c,
+        0x3c031000, 0xaca2002c, 0x24020001, 0xaf4301b8, 0xaf400044, 0x03e00008,
+        0xaf400050, 0x27bdffe8, 0xafbf0010, 0x0e000326, 0x00000000, 0x00002021,
+        0x0e00004c, 0xaf400180, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x8f460148,
+        0x27450180, 0x3c038000, 0x00061402, 0x304700ff, 0x8f4201b8, 0x00431024,
+        0x1440fffd, 0x00000000, 0x8f440140, 0x00061202, 0x304200ff, 0x00061c02,
+        0xaca20004, 0x24020002, 0xa4a30008, 0x30c300ff, 0xa0a2000b, 0xaca30024,
+        0x10e0000a, 0xaca40000, 0x28e20004, 0x14400005, 0x24020001, 0x24020005,
+        0x54e20005, 0xa0a0000a, 0x24020001, 0x0a000816, 0xa0a2000a, 0xa0a0000a,
+        0x3c021000, 0x03e00008, 0xaf4201b8, 0x03e00008, 0x00001021, 0x10c00007,
+        0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000, 0x14c0fffb,
+        0x24840004, 0x03e00008, 0x00000000, 0x0a00082a, 0x00a01021, 0xac860000,
+        0x24840004, 0x00a01021, 0x1440fffc, 0x24a5ffff, 0x03e00008, 0x00000000,
+        0x00000000 }; 
+
+static u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_RXP_b06FwRodata[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_RXP_b06FwBss[(0x239c/4) + 1] = { 0x00000000 };
+static u32 bnx2_RXP_b06FwSbss[(0x14/4) + 1] = { 0x00000000 };
+
+static u32 bnx2_rv2p_proc1[] = {
+        0x00000008, 0xac000001, 0x0000000c, 0x2f800001, 0x00000010, 0x213f0004,
+        0x00000010, 0x20bf002c, 0x00000010, 0x203f0143, 0x00000018, 0x8000fffd,
+        0x00000010, 0xb1b8b017, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000,
+        0x00000000, 0x2c380000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+        0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x00000008, 0x02000002,
+        0x00000010, 0x91de0000, 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08,
+        0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000008, 0x2d800150,
+        0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000010, 0x2c620002,
+        0x00000018, 0x80000012, 0x0000000b, 0x2fdf0002, 0x0000000c, 0x1f800002,
+        0x00000000, 0x2c070000, 0x00000018, 0x8000ffe6, 0x00000008, 0x02000002,
+        0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08, 0x00000008, 0x2c8000b0,
+        0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+        0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000018, 0x80000004,
+        0x0000000c, 0x1f800002, 0x00000000, 0x00000000, 0x00000018, 0x8000ffd9,
+        0x0000000c, 0x29800002, 0x0000000c, 0x1f800002, 0x00000000, 0x2adf0000,
+        0x00000008, 0x2a000005, 0x00000018, 0x8000ffd4, 0x00000008, 0x02240030,
+        0x00000018, 0x00040000, 0x00000018, 0x80000015, 0x00000018, 0x80000017,
+        0x00000018, 0x8000001b, 0x00000018, 0x8000004c, 0x00000018, 0x8000008c,
+        0x00000018, 0x8000000f, 0x00000018, 0x8000000e, 0x00000018, 0x8000000d,
+        0x00000018, 0x8000000c, 0x00000018, 0x800000c2, 0x00000018, 0x8000000a,
+        0x00000018, 0x80000009, 0x00000018, 0x80000008, 0x00000018, 0x800000fd,
+        0x00000018, 0x80000006, 0x00000018, 0x80000005, 0x00000018, 0x800000ff,
+        0x00000018, 0x80000104, 0x00000018, 0x80000002, 0x00000018, 0x80000098,
+        0x00000018, 0x80000000, 0x0000000c, 0x1f800001, 0x00000000, 0x00000000,
+        0x00000018, 0x8000ffba, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001,
+        0x0000000c, 0x1f800001, 0x00000008, 0x2a000002, 0x00000018, 0x8000ffb5,
+        0x00000010, 0xb1a0b012, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000,
+        0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000010, 0x91d40000,
+        0x00000008, 0x2d80011c, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+        0x0000000f, 0x47600008, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000,
+        0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+        0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000018, 0x80000013,
+        0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002, 0x00000008, 0x2c800000,
+        0x00000008, 0x2d000000, 0x00000010, 0x91d40000, 0x00000008, 0x2d80011c,
+        0x0000000f, 0x060e0001, 0x00000010, 0x001f0000, 0x00000000, 0x0f580000,
+        0x00000010, 0x91de0000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+        0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000000, 0x02620000,
+        0x0000000b, 0x2fdf0002, 0x00000000, 0x309a0000, 0x00000000, 0x31040000,
+        0x00000000, 0x0c961800, 0x00000009, 0x0c99ffff, 0x00000004, 0xcc993400,
+        0x00000010, 0xb1963202, 0x00000008, 0x0f800000, 0x0000000c, 0x29800001,
+        0x00000010, 0x00220002, 0x0000000c, 0x29520001, 0x0000000c, 0x29520000,
+        0x00000008, 0x22000001, 0x0000000c, 0x1f800001, 0x00000000, 0x2adf0000,
+        0x00000008, 0x2a000003, 0x00000018, 0x8000ff83, 0x00000010, 0xb1a0b01d,
+        0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0,
+        0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150,
+        0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000,
+        0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000000, 0x00000000,
+        0x00000010, 0x91de0000, 0x0000000f, 0x47600008, 0x00000000, 0x060e0000,
+        0x00000010, 0x001f0000, 0x00000000, 0x0f580000, 0x00000010, 0x91de0000,
+        0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, 0x00000000, 0x0b670000,
+        0x00000000, 0x0d620000, 0x00000000, 0x0ce71800, 0x00000009, 0x0c99ffff,
+        0x00000004, 0xcc993400, 0x00000010, 0xb1963220, 0x00000008, 0x0f800000,
+        0x00000018, 0x8000001e, 0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002,
+        0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000,
+        0x00000008, 0x2d80012c, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000,
+        0x00000000, 0x0f580000, 0x00000010, 0x91de0000, 0x00000000, 0x0a640000,
+        0x00000000, 0x0ae50000, 0x00000000, 0x0b670000, 0x00000000, 0x0d620000,
+        0x00000000, 0x02630000, 0x0000000f, 0x47620010, 0x00000000, 0x0ce71800,
+        0x0000000b, 0x2fdf0002, 0x00000000, 0x311a0000, 0x00000000, 0x31840000,
+        0x0000000b, 0xc20000ff, 0x00000002, 0x42040000, 0x00000001, 0x31620800,
+        0x0000000f, 0x020e0010, 0x00000002, 0x31620800, 0x00000009, 0x0c99ffff,
+        0x00000004, 0xcc993400, 0x00000010, 0xb1963202, 0x00000008, 0x0f800000,
+        0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x0000000c, 0x61420006,
+        0x00000008, 0x22000008, 0x00000000, 0x2adf0000, 0x00000008, 0x2a000004,
+        0x00000018, 0x8000ff42, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+        0x00000010, 0x91a0b008, 0x00000010, 0x91d40000, 0x0000000c, 0x31620018,
+        0x00000008, 0x2d800001, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+        0x00000008, 0xac000001, 0x00000018, 0x8000000e, 0x00000000, 0x0380b000,
+        0x0000000b, 0x2fdf0002, 0x00000000, 0x2c004000, 0x00000010, 0x91d40000,
+        0x00000008, 0x2d800101, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+        0x0000000c, 0x31620018, 0x00000008, 0x2d800001, 0x00000000, 0x00000000,
+        0x00000010, 0x91de0000, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c000e00,
+        0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000008, 0x2a000007,
+        0x00000018, 0x8000ff27, 0x00000010, 0xb1a0b016, 0x0000000b, 0x2fdf0002,
+        0x00000000, 0x03d80000, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0,
+        0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150,
+        0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000,
+        0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000008, 0x07000001,
+        0x00000010, 0xb5de1c00, 0x00000010, 0x2c620002, 0x00000018, 0x8000000a,
+        0x0000000b, 0x2fdf0002, 0x00000000, 0x2c070000, 0x0000000c, 0x1f800001,
+        0x00000010, 0x91de0000, 0x00000018, 0x8000ff11, 0x00000008, 0x2c8000b0,
+        0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+        0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000010, 0x91de0000,
+        0x00000000, 0x2adf0000, 0x00000008, 0x2a00000a, 0x00000018, 0x8000ff07,
+        0x00000000, 0x82265600, 0x0000000f, 0x47220008, 0x00000009, 0x070e000f,
+        0x00000008, 0x070e0008, 0x00000008, 0x02800001, 0x00000007, 0x02851c00,
+        0x00000008, 0x82850001, 0x00000000, 0x02840a00, 0x00000007, 0x42851c00,
+        0x00000003, 0xc3aa5200, 0x00000000, 0x03b10e00, 0x00000010, 0x001f0000,
+        0x0000000f, 0x0f280007, 0x00000007, 0x4b071c00, 0x00000000, 0x00000000,
+        0x0000000f, 0x0a960003, 0x00000000, 0x0a955c00, 0x00000000, 0x4a005a00,
+        0x00000000, 0x0c960a00, 0x00000009, 0x0c99ffff, 0x00000008, 0x0d00ffff,
+        0x00000010, 0xb1963202, 0x00000008, 0x0f800005, 0x00000010, 0x00220020,
+        0x00000000, 0x02a70000, 0x00000010, 0xb1850002, 0x00000008, 0x82850200,
+        0x00000000, 0x02000000, 0x00000000, 0x03a60000, 0x00000018, 0x8000004e,
+        0x00000000, 0x072b0000, 0x00000001, 0x878c1c00, 0x00000000, 0x870e1e00,
+        0x00000000, 0x860c1e00, 0x00000000, 0x03061e00, 0x00000010, 0xb18e0003,
+        0x00000018, 0x80000047, 0x00000018, 0x8000fffa, 0x00000010, 0x918c0003,
+        0x00000010, 0xb1870002, 0x00000018, 0x80000043, 0x00000010, 0x91d40000,
+        0x0000000c, 0x29800001, 0x00000000, 0x2a860000, 0x00000000, 0x230c0000,
+        0x00000000, 0x2b070000, 0x00000010, 0xb187000e, 0x00000008, 0x2a000008,
+        0x00000018, 0x8000003b, 0x00000010, 0x91d40000, 0x00000000, 0x28d18c00,
+        0x00000000, 0x2a860000, 0x00000000, 0x230c0000, 0x00000000, 0x2b070000,
+        0x00000018, 0x8000fff8, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001,
+        0x00000000, 0x2aab0000, 0x00000000, 0xa3265600, 0x00000000, 0x2b000000,
+        0x0000000c, 0x1f800001, 0x00000008, 0x2a000008, 0x00000018, 0x8000fec8,
+        0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+        0x00000008, 0x2a000009, 0x00000018, 0x8000fec3, 0x00000010, 0x91d40000,
+        0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000000, 0x29420000,
+        0x00000008, 0x2a000002, 0x00000018, 0x8000febd, 0x00000018, 0x8000febc,
+        0x00000010, 0xb1bcb016, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000,
+        0x00000000, 0x2c3c0000, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+        0x00000010, 0x91d40000, 0x00000008, 0x2d800150, 0x00000000, 0x00000000,
+        0x00000010, 0x205f0000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+        0x00000008, 0x2d800108, 0x00000008, 0x07000001, 0x00000010, 0xb5de1c00,
+        0x00000010, 0x2c620002, 0x00000018, 0x8000000a, 0x0000000b, 0x2fdf0002,
+        0x00000000, 0x2c070000, 0x0000000c, 0x1f800000, 0x00000010, 0x91de0000,
+        0x00000018, 0x8000fea6, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+        0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x0000000c, 0x29800000,
+        0x0000000c, 0x1f800000, 0x00000010, 0x91de0000, 0x00000000, 0x2adf0000,
+        0x00000008, 0x2a000006, 0x00000018, 0x8000fe9c, 0x00000008, 0x03050004,
+        0x00000006, 0x83040c00, 0x00000008, 0x02850200, 0x00000000, 0x86050c00,
+        0x00000001, 0x860c0e00, 0x00000008, 0x02040004, 0x00000000, 0x02041800,
+        0x00000000, 0x83871800, 0x00000018, 0x00020000 };
+
+static u32 bnx2_rv2p_proc2[] = {
+        0x00000000, 0x2a000000, 0x00000010, 0xb1d40000, 0x00000008, 0x02540003,
+        0x00000018, 0x00040000, 0x00000018, 0x8000000a, 0x00000018, 0x8000000a,
+        0x00000018, 0x8000000e, 0x00000018, 0x80000056, 0x00000018, 0x800001b9,
+        0x00000018, 0x800001e1, 0x00000018, 0x8000019b, 0x00000018, 0x800001f9,
+        0x00000018, 0x8000019f, 0x00000018, 0x800001a6, 0x00000018, 0x80000000,
+        0x0000000c, 0x29800001, 0x00000000, 0x2a000000, 0x0000000c, 0x29800000,
+        0x00000010, 0x20530000, 0x00000018, 0x8000ffee, 0x0000000c, 0x29800001,
+        0x00000010, 0x91de0000, 0x00000010, 0x001f0000, 0x00000000, 0x2f80aa00,
+        0x00000000, 0x2a000000, 0x00000000, 0x0d610000, 0x00000000, 0x03620000,
+        0x00000000, 0x2c400000, 0x00000000, 0x02638c00, 0x00000000, 0x26460000,
+        0x00000010, 0x00420002, 0x00000008, 0x02040012, 0x00000010, 0xb9060836,
+        0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+        0x00000000, 0x0b660000, 0x00000000, 0x0c000000, 0x00000000, 0x0b800000,
+        0x00000010, 0x00420009, 0x00000008, 0x0cc60012, 0x00000008, 0x0f800003,
+        0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000008, 0x27110012,
+        0x00000000, 0x66900000, 0x00000008, 0xa31b0012, 0x00000018, 0x80000008,
+        0x00000000, 0x0cc60000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000,
+        0x00000010, 0x009f0000, 0x00000000, 0x27110000, 0x00000000, 0x66900000,
+        0x00000000, 0x231b0000, 0x00000010, 0xb197320e, 0x00000000, 0x25960000,
+        0x00000000, 0x021b0000, 0x00000010, 0x001f0000, 0x00000008, 0x0f800003,
+        0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000000, 0x22c50800,
+        0x00000010, 0x009f0000, 0x00000000, 0x27002200, 0x00000000, 0x26802000,
+        0x00000000, 0x231b0000, 0x0000000c, 0x69520001, 0x00000018, 0x8000fff3,
+        0x00000010, 0x01130002, 0x00000010, 0xb1980003, 0x00000010, 0x001f0000,
+        0x00000008, 0x0f800004, 0x00000008, 0x22000003, 0x00000008, 0x2c80000c,
+        0x00000008, 0x2d00000c, 0x00000010, 0x009f0000, 0x00000000, 0x25960000,
+        0x0000000c, 0x29800000, 0x00000000, 0x32140000, 0x00000000, 0x32950000,
+        0x00000000, 0x33160000, 0x00000000, 0x31e32e00, 0x00000008, 0x2d800010,
+        0x00000010, 0x20530000, 0x00000018, 0x8000ffac, 0x00000000, 0x23000000,
+        0x00000000, 0x25e60000, 0x00000008, 0x2200000b, 0x0000000c, 0x69520000,
+        0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000018, 0x8000ffa5,
+        0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000,
+        0x00000010, 0x001f0000, 0x00000000, 0x02700000, 0x00000000, 0x0d620000,
+        0x00000000, 0xbb630800, 0x00000000, 0x2a000000, 0x00000009, 0x076000ff,
+        0x0000000f, 0x2c0e0007, 0x00000008, 0x2c800000, 0x00000008, 0x2d000064,
+        0x00000008, 0x2d80011c, 0x00000009, 0x06420002, 0x0000000c, 0x61420001,
+        0x00000000, 0x0f400000, 0x00000000, 0x02d08c00, 0x00000000, 0x23000000,
+        0x00000004, 0x826da000, 0x00000000, 0x8304a000, 0x00000000, 0x22c50c00,
+        0x00000000, 0x03760000, 0x00000004, 0x83860a00, 0x00000000, 0x83870c00,
+        0x00000010, 0x91de0000, 0x00000000, 0x037c0000, 0x00000000, 0x837b0c00,
+        0x00000001, 0x83060e00, 0x00000000, 0x83870c00, 0x00000000, 0x82850e00,
+        0x00000010, 0xb1860016, 0x0000000f, 0x47610018, 0x00000000, 0x068e0000,
+        0x0000000f, 0x47670010, 0x0000000f, 0x47e20010, 0x00000000, 0x870e1e00,
+        0x00000010, 0xb70e1a10, 0x00000010, 0x0ce7000e, 0x00000008, 0x22000009,
+        0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400,
+        0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004,
+        0x00000018, 0x8000023f, 0x00000000, 0x37ed0000, 0x0000000c, 0x73e7001a,
+        0x00000010, 0x20530000, 0x00000008, 0x22000008, 0x0000000c, 0x61420004,
+        0x00000000, 0x02f60000, 0x00000004, 0x82840a00, 0x00000010, 0xb1840a2b,
+        0x00000010, 0x2d67000a, 0x00000010, 0xb96d0804, 0x00000004, 0xb6ed0a00,
+        0x00000000, 0x37ed0000, 0x00000018, 0x80000029, 0x0000000c, 0x61420000,
+        0x00000000, 0x37040000, 0x00000000, 0x37850000, 0x0000000c, 0x33e7001a,
+        0x00000018, 0x80000024, 0x00000010, 0xb96d0809, 0x00000004, 0xb6ed0a00,
+        0x00000000, 0x036d0000, 0x00000004, 0xb76e0c00, 0x00000010, 0x91ee0c1f,
+        0x0000000c, 0x73e7001a, 0x00000004, 0xb6ef0c00, 0x00000000, 0x37ed0000,
+        0x00000018, 0x8000001b, 0x0000000c, 0x61420000, 0x00000010, 0xb7ee0a05,
+        0x00000010, 0xb96f0815, 0x00000003, 0xb76e0800, 0x00000004, 0xb7ef0a00,
+        0x00000018, 0x80000015, 0x00000010, 0x0ce7000c, 0x00000008, 0x22000009,
+        0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400,
+        0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004,
+        0x00000018, 0x80000215, 0x00000010, 0x20530000, 0x00000008, 0x22000008,
+        0x0000000c, 0x61420004, 0x00000000, 0x37040000, 0x00000000, 0x37850000,
+        0x00000000, 0x036d0000, 0x00000003, 0xb8f10c00, 0x00000018, 0x80000004,
+        0x00000000, 0x02840000, 0x00000002, 0x21421800, 0x0000000c, 0x61420000,
+        0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff,
+        0x00000000, 0x23000000, 0x00000010, 0xb1840a3d, 0x00000010, 0x01420002,
+        0x00000004, 0xb8f10a00, 0x00000003, 0x83760a00, 0x00000010, 0xb8040c39,
+        0x00000010, 0xb7e6080a, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+        0x00000009, 0x0c68ffff, 0x00000009, 0x0b67ffff, 0x00000000, 0x0be60000,
+        0x00000000, 0x0c840000, 0x00000010, 0xb197320c, 0x00000008, 0x0f800002,
+        0x00000018, 0x8000000a, 0x00000000, 0x0a6a0000, 0x00000000, 0x0aeb0000,
+        0x00000000, 0x0c000000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0be90000,
+        0x00000000, 0x0c840000, 0x00000010, 0xb1973203, 0x00000008, 0x0f800002,
+        0x00000018, 0x80000001, 0x00000010, 0x001f0000, 0x00000000, 0x0c860000,
+        0x00000000, 0x06980000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000,
+        0x00000010, 0x009f0000, 0x00000010, 0xb1973210, 0x00000000, 0x231b0000,
+        0x00000000, 0x02043600, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+        0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000,
+        0x0000000c, 0x29000000, 0x00000018, 0x800001de, 0x00000000, 0x06980000,
+        0x00000010, 0x20530000, 0x00000000, 0x22c58c00, 0x00000010, 0x001f0000,
+        0x00000008, 0x0f800003, 0x00000018, 0x8000fff0, 0x00000000, 0x02043600,
+        0x00000000, 0x231b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+        0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000,
+        0x0000000c, 0x29000000, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+        0x00000000, 0x32140000, 0x00000000, 0x32950000, 0x00000005, 0x73e72c00,
+        0x00000005, 0x74683000, 0x00000000, 0x33170000, 0x00000018, 0x80000138,
+        0x00000010, 0x91c60004, 0x00000008, 0x07000004, 0x00000010, 0xb1c41c02,
+        0x00000010, 0x91840a04, 0x00000018, 0x800001c3, 0x00000010, 0x20530000,
+        0x00000000, 0x22c58c00, 0x00000010, 0xb1840a8e, 0x0000000c, 0x21420006,
+        0x00000010, 0x0ce7001a, 0x0000000f, 0x43680010, 0x00000000, 0x03f30c00,
+        0x00000010, 0x91870850, 0x0000000f, 0x46ec0010, 0x00000010, 0xb68d0c4e,
+        0x00000000, 0x838d0c00, 0x00000000, 0xa3050800, 0x00000001, 0xa3460e00,
+        0x00000000, 0x02048c00, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+        0x00000010, 0x001f0000, 0x00000008, 0x22000008, 0x00000003, 0x8384a000,
+        0x0000000f, 0x65870010, 0x00000009, 0x2607ffff, 0x00000000, 0x27750c00,
+        0x00000000, 0x66f40000, 0x0000000c, 0x29000000, 0x00000018, 0x800001aa,
+        0x00000000, 0x03068c00, 0x00000003, 0xf4680c00, 0x00000010, 0x20530000,
+        0x00000000, 0x22c58c00, 0x00000018, 0x8000ffe5, 0x00000000, 0x39760000,
+        0x00000000, 0x39840000, 0x0000000c, 0x33e70019, 0x00000010, 0x001f0000,
+        0x00000000, 0x031e0000, 0x00000000, 0x0760fe00, 0x0000000f, 0x0f0e0007,
+        0x00000000, 0x83850800, 0x00000000, 0x0a7d0000, 0x00000000, 0x0afe0000,
+        0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000, 0x00000000, 0x0c000000,
+        0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+        0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+        0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+        0x00000002, 0x33e70e00, 0x00000000, 0x28f30000, 0x00000010, 0x009f0000,
+        0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+        0x00000008, 0x22000006, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000,
+        0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+        0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000,
+        0x0000000c, 0x29000000, 0x00000018, 0x8000017e, 0x00000003, 0xf4683600,
+        0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+        0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004,
+        0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+        0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+        0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+        0x00000000, 0x22c53600, 0x00000018, 0x8000ffac, 0x00000010, 0x001f0000,
+        0x00000000, 0x031e0000, 0x00000000, 0x83850800, 0x00000009, 0x076000ff,
+        0x0000000f, 0x0f0e0007, 0x00000000, 0x0c000000, 0x00000000, 0x0a7d0000,
+        0x00000000, 0x0afe0000, 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000,
+        0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+        0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+        0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+        0x00000002, 0x33e70e00, 0x00000000, 0x39840000, 0x00000003, 0xb9720800,
+        0x00000000, 0x28f30000, 0x0000000f, 0x65680010, 0x00000010, 0x009f0000,
+        0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+        0x00000008, 0x22000007, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000,
+        0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+        0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000,
+        0x0000000c, 0x29000000, 0x00000018, 0x80000145, 0x00000003, 0xf4683600,
+        0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+        0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004,
+        0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+        0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+        0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+        0x00000000, 0x22c53600, 0x00000018, 0x8000ff73, 0x00000010, 0x0ce70005,
+        0x00000008, 0x2c80000c, 0x00000008, 0x2d000070, 0x00000008, 0x2d800010,
+        0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000018, 0x8000011d,
+        0x00000000, 0x2c1e0000, 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010,
+        0x00000008, 0x2d800048, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+        0x00000018, 0x8000fe5d, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+        0x00000010, 0x001f0000, 0x00000000, 0x0f008000, 0x00000008, 0x0f800007,
+        0x00000018, 0x80000006, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+        0x00000010, 0x001f0000, 0x0000000f, 0x0f470007, 0x00000008, 0x0f800008,
+        0x00000018, 0x80000119, 0x00000010, 0x20530000, 0x00000018, 0x8000fe4f,
+        0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000,
+        0x00000000, 0x2a000000, 0x00000009, 0x0261ffff, 0x0000000d, 0x70e10001,
+        0x00000018, 0x80000101, 0x00000000, 0x2c400000, 0x00000008, 0x2c8000c4,
+        0x00000008, 0x2d00001c, 0x00000008, 0x2d800001, 0x00000005, 0x70e10800,
+        0x00000010, 0x91de0000, 0x00000018, 0x8000fe41, 0x0000000c, 0x29800001,
+        0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000,
+        0x00000000, 0x02700000, 0x00000000, 0x0d620000, 0x00000000, 0xbb630800,
+        0x00000000, 0x2a000000, 0x00000000, 0x0f400000, 0x00000000, 0x2c400000,
+        0x0000000c, 0x73e7001b, 0x00000010, 0x0ce7000e, 0x00000000, 0x286d0000,
+        0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff, 0x00000018, 0x80000069,
+        0x00000008, 0x02000004, 0x00000010, 0x91c40803, 0x00000018, 0x800000f6,
+        0x00000010, 0x20530000, 0x00000018, 0x800000e5, 0x00000008, 0x2c8000b8,
+        0x00000008, 0x2d000010, 0x00000008, 0x2d800048, 0x00000018, 0x80000005,
+        0x00000008, 0x2c8000c4, 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001,
+        0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800048,
+        0x00000008, 0x2d000068, 0x00000008, 0x2d800104, 0x00000000, 0x00000000,
+        0x00000010, 0x91de0000, 0x00000000, 0x27f60000, 0x00000010, 0xb87a9e04,
+        0x00000008, 0x2200000d, 0x00000018, 0x800000e2, 0x00000010, 0x20530000,
+        0x00000018, 0x8000fe18, 0x0000000c, 0x29800001, 0x00000010, 0x91de0000,
+        0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, 0x00000000, 0x02700000,
+        0x00000000, 0x0d620000, 0x00000000, 0xbb630800, 0x00000000, 0x2a000000,
+        0x00000010, 0x0e670011, 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010,
+        0x00000009, 0x266dffff, 0x00000004, 0xb8f1a000, 0x00000000, 0x0f400000,
+        0x0000000c, 0x73e7001c, 0x00000018, 0x80000040, 0x00000008, 0x02000004,
+        0x00000010, 0x91c40802, 0x00000018, 0x800000cd, 0x00000000, 0x2c1e0000,
+        0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010, 0x00000008, 0x2d800048,
+        0x00000010, 0x20530000, 0x00000010, 0x91de0000, 0x00000018, 0x8000fdfe,
+        0x0000000c, 0x29800001, 0x00000000, 0x03550000, 0x00000000, 0x06460000,
+        0x00000000, 0x03d60000, 0x00000000, 0x2a000000, 0x0000000f, 0x0f480007,
+        0x00000010, 0xb18c0027, 0x0000000f, 0x47420008, 0x00000009, 0x070e000f,
+        0x00000008, 0x070e0008, 0x00000010, 0x001f0000, 0x00000008, 0x09000001,
+        0x00000007, 0x09121c00, 0x00000003, 0xcbca9200, 0x00000000, 0x0b97a200,
+        0x00000007, 0x4b171c00, 0x0000000f, 0x0a960003, 0x00000000, 0x0a959c00,
+        0x00000000, 0x4a009a00, 0x00000008, 0x82120001, 0x00000001, 0x0c170800,
+        0x00000000, 0x02180000, 0x00000000, 0x0c971800, 0x00000008, 0x0d00ffff,
+        0x00000008, 0x0f800006, 0x0000000c, 0x29000000, 0x00000008, 0x22000001,
+        0x00000000, 0x22c50c00, 0x00000010, 0x009f0000, 0x00000010, 0xb197320b,
+        0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+        0x00000018, 0x800000a4, 0x00000000, 0x02180000, 0x00000010, 0x20530000,
+        0x00000000, 0x22c53600, 0x00000010, 0x001f0000, 0x00000008, 0x0f800006,
+        0x00000018, 0x8000fff5, 0x00000010, 0x91870002, 0x00000008, 0x2200000a,
+        0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+        0x00000018, 0x80000098, 0x00000008, 0x0200000a, 0x00000010, 0x91c40804,
+        0x00000010, 0x02c20003, 0x00000010, 0x001f0000, 0x00000008, 0x0f800008,
+        0x00000010, 0x20530000, 0x00000018, 0x8000fdc9, 0x00000000, 0x06820000,
+        0x00000010, 0x001f0000, 0x00000010, 0x0ce70028, 0x00000000, 0x03720000,
+        0x00000000, 0xa8760c00, 0x00000000, 0x0cf60000, 0x00000010, 0xb8723224,
+        0x00000000, 0x03440000, 0x00000008, 0x22000010, 0x00000000, 0x03ca0000,
+        0x0000000f, 0x65680010, 0x00000000, 0x0bcf0000, 0x00000000, 0x27f20000,
+        0x00000010, 0xb7ef3203, 0x0000000c, 0x21420004, 0x0000000c, 0x73e70019,
+        0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x8000007e,
+        0x00000004, 0xb9723200, 0x00000010, 0x20530000, 0x00000000, 0x22060000,
+        0x0000000c, 0x61420004, 0x00000000, 0x25070000, 0x00000000, 0x27970000,
+        0x00000000, 0x290e0000, 0x00000010, 0x0ce70010, 0x00000010, 0xb873320f,
+        0x0000000f, 0x436c0010, 0x00000000, 0x03f30c00, 0x00000000, 0x03f30000,
+        0x00000000, 0x83990e00, 0x00000001, 0x83860e00, 0x00000000, 0x83060e00,
+        0x00000003, 0xf66c0c00, 0x00000000, 0x39f30e00, 0x00000000, 0x3af50e00,
+        0x00000000, 0x7a740000, 0x0000000f, 0x43680010, 0x00000001, 0x83860e00,
+        0x00000000, 0x83060e00, 0x00000003, 0xf4680c00, 0x00000000, 0x286d0000,
+        0x00000000, 0x03690000, 0x00000010, 0xb1f60c54, 0x00000000, 0x0a6a0000,
+        0x00000000, 0x0aeb0000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0c000000,
+        0x00000000, 0x0be90000, 0x00000003, 0x8cf6a000, 0x0000000c, 0x09800002,
+        0x00000010, 0x009f0000, 0x00000010, 0xb8173209, 0x00000000, 0x35140000,
+        0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34970000,
+        0x00000004, 0xb8f12e00, 0x00000010, 0x001f0000, 0x00000008, 0x0f800004,
+        0x00000018, 0x8000fff7, 0x00000000, 0x03e90000, 0x00000010, 0xb8f6a01a,
+        0x00000010, 0x20130019, 0x00000010, 0xb1f10e18, 0x00000000, 0x83973200,
+        0x00000000, 0x38700e00, 0x00000000, 0xbb760e00, 0x00000000, 0x37d00000,
+        0x0000000c, 0x73e7001a, 0x00000003, 0xb8f1a000, 0x00000000, 0x32140000,
+        0x00000000, 0x32950000, 0x00000005, 0x73e72c00, 0x00000000, 0x33190000,
+        0x00000005, 0x74680000, 0x00000010, 0x0ce7000d, 0x00000008, 0x22000009,
+        0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x0000000c, 0x73e70019,
+        0x0000000f, 0x65680010, 0x0000000c, 0x21420004, 0x00000018, 0x8000003c,
+        0x00000010, 0x20530000, 0x0000000c, 0x61420004, 0x00000000, 0x290e0000,
+        0x00000018, 0x80000002, 0x00000010, 0x91973206, 0x00000000, 0x35140000,
+        0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34990000,
+        0x00000004, 0xb8f13200, 0x00000000, 0x83690c00, 0x00000010, 0xb1860013,
+        0x00000000, 0x28e90000, 0x00000008, 0x22000004, 0x00000000, 0x23ec0000,
+        0x00000000, 0x03690000, 0x00000010, 0xb8660c07, 0x00000009, 0x036cffff,
+        0x00000000, 0x326a0000, 0x00000000, 0x32eb0000, 0x00000005, 0x73e70c00,
+        0x00000000, 0x33690000, 0x00000005, 0x74680000, 0x0000000c, 0x73e7001c,
+        0x00000000, 0x03690000, 0x00000010, 0xb1f60c12, 0x00000010, 0xb1d00c11,
+        0x0000000c, 0x21420005, 0x0000000c, 0x33e7001c, 0x00000018, 0x8000000e,
+        0x00000010, 0x2e67000d, 0x00000000, 0x03690000, 0x00000010, 0xb1f60c0b,
+        0x00000010, 0xb1d00c0a, 0x00000000, 0x03440000, 0x00000008, 0x2200000c,
+        0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x80000015,
+        0x0000000c, 0x33e7001c, 0x00000010, 0x20530000, 0x00000000, 0x22060000,
+        0x00000000, 0x290e0000, 0x00000018, 0x000d0000, 0x00000000, 0x06820000,
+        0x00000010, 0x2de7000d, 0x00000010, 0x0ce7000c, 0x00000000, 0x27f20000,
+        0x00000010, 0xb96d9e0a, 0x00000000, 0xa86d9e00, 0x00000009, 0x0361ffff,
+        0x00000010, 0xb7500c07, 0x00000008, 0x2200000f, 0x0000000f, 0x65680010,
+        0x00000000, 0x29000000, 0x00000018, 0x80000004, 0x0000000c, 0x33e7001b,
+        0x00000010, 0x20530000, 0x00000018, 0x000d0000, 0x00000000, 0x2b820000,
+        0x00000010, 0x20d2002f, 0x00000010, 0x0052002e, 0x00000009, 0x054e0007,
+        0x00000010, 0xb18a002c, 0x00000000, 0x050a8c00, 0x00000008, 0x850a0008,
+        0x00000010, 0x918a0029, 0x00000003, 0xc5008800, 0x00000008, 0xa3460001,
+        0x00000010, 0xb1c60007, 0x00000008, 0x22000001, 0x0000000c, 0x29800000,
+        0x00000010, 0x20530000, 0x00000000, 0x274e8c00, 0x00000000, 0x66cd0000,
+        0x00000000, 0x22c58c00, 0x00000008, 0x22000014, 0x00000003, 0x22c58e00,
+        0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00,
+        0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000,
+        0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x0000000c, 0x69520000,
+        0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000003, 0x22c58e00,
+        0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00,
+        0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000,
+        0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x00000000, 0xa2c58c00,
+        0x00000000, 0xa74e8c00, 0x00000000, 0xe6cd0000, 0x0000000f, 0x620a0010,
+        0x00000008, 0x23460001, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+        0x0000000c, 0x29520000, 0x00000018, 0x80000002, 0x0000000c, 0x29800000,
+        0x00000018, 0x00570000 };
+
+static int bnx2_TPAT_b06FwReleaseMajor = 0x0;
+static int bnx2_TPAT_b06FwReleaseMinor = 0x0;
+static int bnx2_TPAT_b06FwReleaseFix = 0x0;
+static u32 bnx2_TPAT_b06FwStartAddr = 0x08000858;
+static u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
+static int bnx2_TPAT_b06FwTextLen = 0x1314;
+static u32 bnx2_TPAT_b06FwDataAddr = 0x08001b40;
+static int bnx2_TPAT_b06FwDataLen = 0x0;
+static u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
+static int bnx2_TPAT_b06FwRodataLen = 0x0;
+static u32 bnx2_TPAT_b06FwBssAddr = 0x08001b90;
+static int bnx2_TPAT_b06FwBssLen = 0x80;
+static u32 bnx2_TPAT_b06FwSbssAddr = 0x08001b40;
+static int bnx2_TPAT_b06FwSbssLen = 0x48;
+
+static u32 bnx2_TPAT_b06FwText[(0x1314/4) + 1] = {
+        0x0a000216, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20302e36,
+        0x2e390000, 0x00060901, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000003,
+        0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, 0x24421b40, 0x3c030800,
+        0x24631c10, 0xac400000, 0x0043202b, 0x1480fffd, 0x24420004, 0x3c1d0800,
+        0x37bd3ffc, 0x03a0f021, 0x3c100800, 0x26100858, 0x3c1c0800, 0x279c1b40,
+        0x0e00051f, 0x00000000, 0x0000000d, 0x8f820024, 0x27bdffe8, 0xafbf0014,
+        0x10400004, 0xafb00010, 0x0000000d, 0x00000000, 0x2400015f, 0x8f82001c,
+        0x8c450008, 0x24030800, 0xaf430178, 0x97430104, 0x3c020008, 0xaf420140,
+        0x8f820034, 0x30420001, 0x10400006, 0x3070ffff, 0x24020002, 0x2603fffe,
+        0xa7420146, 0x0a000246, 0xa7430148, 0xa7400146, 0x8f850034, 0x30a20020,
+        0x0002102b, 0x00021023, 0x30460009, 0x30a30c00, 0x24020400, 0x14620002,
+        0x34c40001, 0x34c40005, 0xa744014a, 0x3c020800, 0x8c440820, 0x3c030048,
+        0x24020002, 0x00832025, 0x30a30006, 0x1062000d, 0x2c620003, 0x50400005,
+        0x24020004, 0x10600012, 0x3c020001, 0x0a000271, 0x00000000, 0x10620007,
+        0x24020006, 0x1462000f, 0x3c020111, 0x0a000269, 0x00821025, 0x0a000268,
+        0x3c020101, 0x3c020011, 0x00821025, 0x24030001, 0xaf421000, 0xaf830030,
+        0x0a000271, 0x00000000, 0x00821025, 0xaf421000, 0xaf800030, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x8f830030, 0x1060003f, 0x3c048000,
+        0x8f421000, 0x00441024, 0x1040fffd, 0x00000000, 0x10600039, 0x00000000,
+        0x8f421000, 0x3c030020, 0x00431024, 0x10400034, 0x00000000, 0x97421014,
+        0x14400031, 0x00000000, 0x97421008, 0x8f84001c, 0x24420006, 0x00024082,
+        0x00081880, 0x00643821, 0x8ce50000, 0x30430003, 0x30420001, 0x10400004,
+        0x00000000, 0x0000000d, 0x0a0002b0, 0x00081080, 0x5460000f, 0x30a5ffff,
+        0x3c06ffff, 0x00a62824, 0x0005182b, 0x00a61026, 0x0002102b, 0x00621824,
+        0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x240001fc, 0x8ce20000,
+        0x0a0002af, 0x00462825, 0x0005182b, 0x38a2ffff, 0x0002102b, 0x00621824,
+        0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x24000206, 0x8ce20000,
+        0x3445ffff, 0x00081080, 0x00441021, 0x3c030800, 0xac450000, 0x8c620840,
+        0x24420001, 0xac620840, 0x8f820008, 0x10400003, 0x00000000, 0x0e000660,
+        0x00000000, 0x8f840028, 0x02002821, 0x24820008, 0x30421fff, 0x24434000,
+        0x0343d821, 0x30a30007, 0xaf840018, 0xaf820028, 0xaf420084, 0x10600002,
+        0x24a20007, 0x3045fff8, 0x8f820044, 0x8f840004, 0x00451821, 0xaf82002c,
+        0x0064102b, 0xaf830044, 0x14400002, 0x00641023, 0xaf820044, 0x8f840044,
+        0x34028000, 0x8fbf0014, 0x8fb00010, 0x00821021, 0x03421821, 0x3c021000,
+        0xaf83001c, 0xaf440080, 0xaf420178, 0x03e00008, 0x27bd0018, 0x8f820024,
+        0x27bdffe8, 0xafbf0014, 0x10400004, 0xafb00010, 0x0000000d, 0x00000000,
+        0x24000249, 0x8f85001c, 0x24020001, 0xaf820024, 0x8ca70008, 0xa3800023,
+        0x8f620004, 0x3c100800, 0x26041b90, 0x00021402, 0xa3820010, 0x304600ff,
+        0x24c60005, 0x0e00064a, 0x00063082, 0x8f640004, 0x8f430108, 0x3c021000,
+        0x00621824, 0xa7840020, 0x10600008, 0x00000000, 0x97420104, 0x93830023,
+        0x2442ffec, 0x34630002, 0xa3830023, 0x0a000304, 0x3045ffff, 0x97420104,
+        0x2442fff0, 0x3045ffff, 0x8f620004, 0x3042ffff, 0x2c420013, 0x14400004,
+        0x00000000, 0x93820023, 0x34420001, 0xa3820023, 0x93830023, 0x24020001,
+        0x10620009, 0x28620002, 0x14400014, 0x24020002, 0x10620012, 0x24020003,
+        0x1062000a, 0x00000000, 0x0a000325, 0x00000000, 0x8f82001c, 0x8c43000c,
+        0x3c04ffff, 0x00641824, 0x00651825, 0x0a000325, 0xac43000c, 0x8f82001c,
+        0x8c430010, 0x3c04ffff, 0x00641824, 0x00651825, 0xac430010, 0x8f620004,
+        0x3042ffff, 0x24420002, 0x00021083, 0xa3820038, 0x304500ff, 0x8f82001c,
+        0x3c04ffff, 0x00052880, 0x00a22821, 0x8ca70000, 0x97820020, 0x97430104,
+        0x00e42024, 0x24420002, 0x00621823, 0x00833825, 0xaca70000, 0x93840038,
+        0x26061b90, 0x00041080, 0x00461021, 0x90430000, 0x3063000f, 0x00832021,
+        0xa3840022, 0x308200ff, 0x3c04fff6, 0x24420003, 0x00021080, 0x00461021,
+        0x8c450000, 0x93830022, 0x8f82001c, 0x3484ffff, 0x00a43824, 0x00031880,
+        0x00621821, 0xaf850000, 0xac67000c, 0x93820022, 0x93830022, 0x8f84001c,
+        0x24420003, 0x00021080, 0x00461021, 0x24630004, 0x00031880, 0xac470000,
+        0x93820022, 0x00661821, 0x94670002, 0x00021080, 0x00441021, 0xac670000,
+        0x24030010, 0xac470010, 0xa7430140, 0x24030002, 0xa7400142, 0xa7400144,
+        0xa7430146, 0x97420104, 0x8f840034, 0x24030001, 0x2442fffe, 0x30840006,
+        0xa7420148, 0x24020002, 0xa743014a, 0x1082000d, 0x2c820003, 0x10400005,
+        0x24020004, 0x10800011, 0x3c020009, 0x0a000383, 0x00000000, 0x10820007,
+        0x24020006, 0x1482000d, 0x3c020119, 0x0a00037d, 0x24030001, 0x0a00037c,
+        0x3c020109, 0x3c020019, 0x24030001, 0xaf421000, 0xaf830030, 0x0a000383,
+        0x00000000, 0xaf421000, 0xaf800030, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x93820010, 0x24030008, 0x8f840030, 0x24420002, 0x30420007,
+        0x00621823, 0x30630007, 0xaf83000c, 0x10800005, 0x3c038000, 0x8f421000,
+        0x00431024, 0x1040fffd, 0x00000000, 0x8f820028, 0xaf820018, 0x24420010,
+        0x30421fff, 0xaf820028, 0xaf420084, 0x97430104, 0x24424000, 0x0342d821,
+        0x3063ffff, 0x30620007, 0x10400002, 0x24620007, 0x3043fff8, 0x8f820044,
+        0x8f840004, 0x00431821, 0xaf82002c, 0x0064102b, 0xaf830044, 0x14400002,
+        0x00641023, 0xaf820044, 0x8f840044, 0x34028000, 0x8fbf0014, 0x8fb00010,
+        0x00821021, 0x03421821, 0x3c021000, 0xaf83001c, 0xaf440080, 0xaf420178,
+        0x03e00008, 0x27bd0018, 0x8f820024, 0x27bdffe8, 0xafbf0014, 0x14400004,
+        0xafb00010, 0x0000000d, 0x00000000, 0x240002db, 0x8f620004, 0x04410009,
+        0x3c050800, 0x93820022, 0x8f830000, 0x24a41b90, 0xaf800024, 0x24420003,
+        0x00021080, 0x00441021, 0xac430000, 0x93820038, 0x24a51b90, 0x93860010,
+        0x3c040001, 0x27700008, 0x24420001, 0x00021080, 0x00451021, 0x8c430000,
+        0x24c60005, 0x00063082, 0x00641821, 0x02002021, 0x0e00064a, 0xac430000,
+        0x93840022, 0x3c057fff, 0x8f620004, 0x00042080, 0x00902021, 0x8c830004,
+        0x34a5ffff, 0x00451024, 0x00621821, 0xac830004, 0x93850038, 0x3c07ffff,
+        0x93840010, 0x00052880, 0x00b02821, 0x8ca30000, 0x97420104, 0x97860020,
+        0x00671824, 0x00441021, 0x00461023, 0x3042ffff, 0x00621825, 0xaca30000,
+        0x93830023, 0x24020001, 0x10620009, 0x28620002, 0x1440001a, 0x24020002,
+        0x10620018, 0x24020003, 0x1062000d, 0x00000000, 0x0a000411, 0x00000000,
+        0x93820010, 0x97430104, 0x8e04000c, 0x00621821, 0x2463fff2, 0x3063ffff,
+        0x00872024, 0x00832025, 0x0a000411, 0xae04000c, 0x93820010, 0x97430104,
+        0x8e040010, 0x00621821, 0x2463ffee, 0x3063ffff, 0x00872024, 0x00832025,
+        0xae040010, 0x9783000e, 0x8f840034, 0x2402000a, 0xa7420140, 0xa7430142,
+        0x93820010, 0xa7420144, 0xa7400146, 0x97430104, 0x30840006, 0x24020001,
+        0xa7430148, 0xa742014a, 0x24020002, 0x1082000d, 0x2c820003, 0x10400005,
+        0x24020004, 0x10800011, 0x3c020041, 0x0a000437, 0x00000000, 0x10820007,
+        0x24020006, 0x1482000d, 0x3c020151, 0x0a000431, 0x24030001, 0x0a000430,
+        0x3c020141, 0x3c020051, 0x24030001, 0xaf421000, 0xaf830030, 0x0a000437,
+        0x00000000, 0xaf421000, 0xaf800030, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x8f820030, 0x93840010, 0x8f850028, 0x10400005, 0x3c038000,
+        0x8f421000, 0x00431024, 0x1040fffd, 0x00000000, 0x2483000a, 0x30620007,
+        0x10400002, 0x24620007, 0x304303f8, 0x00a31021, 0x30421fff, 0xaf850018,
+        0xaf820028, 0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff,
+        0x30620007, 0x10400002, 0x24620007, 0x3043fff8, 0x8f820044, 0x8f840004,
+        0x00431821, 0xaf82002c, 0x0064102b, 0xaf830044, 0x14400002, 0x00641023,
+        0xaf820044, 0x8f840044, 0x34028000, 0x8fbf0014, 0x8fb00010, 0x00821021,
+        0x03421821, 0x3c021000, 0xaf83001c, 0xaf440080, 0xaf420178, 0x03e00008,
+        0x27bd0018, 0x3c026000, 0x8c444448, 0x3c030800, 0xac64082c, 0x8f620000,
+        0x97430104, 0x3c048000, 0x3046ffff, 0x3067ffff, 0x8f420178, 0x00441024,
+        0x1440fffd, 0x2402000a, 0x30c30007, 0xa7420140, 0x24020008, 0x00431023,
+        0x30420007, 0x24c3fffe, 0xa7420142, 0xa7430144, 0xa7400146, 0xa7470148,
+        0x8f420108, 0x3c036000, 0x8f850034, 0x30420020, 0x0002102b, 0x00021023,
+        0x30420009, 0x34420001, 0xa742014a, 0x8c644448, 0x3c020800, 0x30a50006,
+        0xac440830, 0x24020002, 0x10a2000d, 0x2ca20003, 0x10400005, 0x24020004,
+        0x10a00011, 0x3c020041, 0x0a0004a8, 0x00000000, 0x10a20007, 0x24020006,
+        0x14a2000d, 0x3c020151, 0x0a0004a2, 0x24030001, 0x0a0004a1, 0x3c020141,
+        0x3c020051, 0x24030001, 0xaf421000, 0xaf830030, 0x0a0004a8, 0x00000000,
+        0xaf421000, 0xaf800030, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x8f820030, 0x24c30008, 0x10400006, 0x30e6ffff, 0x3c048000, 0x8f421000,
+        0x00441024, 0x1040fffd, 0x00000000, 0x3c026000, 0x8c444448, 0x3065ffff,
+        0x3c020800, 0x30a30007, 0x10600003, 0xac440834, 0x24a20007, 0x3045fff8,
+        0x8f840028, 0x00851021, 0x30421fff, 0x24434000, 0x0343d821, 0x30c30007,
+        0xaf840018, 0xaf820028, 0xaf420084, 0x10600002, 0x24c20007, 0x3046fff8,
+        0x8f820044, 0x8f840004, 0x00461821, 0xaf82002c, 0x0064102b, 0xaf830044,
+        0x14400002, 0x00641023, 0xaf820044, 0x8f840044, 0x34028000, 0x3c030800,
+        0x8c650844, 0x00821021, 0x03421821, 0xaf83001c, 0xaf440080, 0x10a00006,
+        0x2402000e, 0x93830043, 0x14620004, 0x3c021000, 0x2402043f, 0xa7420148,
+        0x3c021000, 0x3c036000, 0xaf420178, 0x8c644448, 0x3c020800, 0x03e00008,
+        0xac440838, 0x8f820034, 0x30424000, 0x10400005, 0x24020800, 0x0000000d,
+        0x00000000, 0x24000405, 0x24020800, 0xaf420178, 0x97440104, 0x3c030008,
+        0xaf430140, 0x8f820034, 0x30420001, 0x10400006, 0x3085ffff, 0x24020002,
+        0x24a3fffe, 0xa7420146, 0x0a0004ff, 0xa7430148, 0xa7400146, 0x8f840028,
+        0x2402000d, 0xa742014a, 0x24830008, 0x30631fff, 0x24624000, 0x0342d821,
+        0x30a20007, 0xaf840018, 0xaf830028, 0xaf430084, 0x10400002, 0x24a20007,
+        0x3045fff8, 0x8f820044, 0x8f840004, 0x00451821, 0xaf82002c, 0x0064102b,
+        0xaf830044, 0x14400002, 0x00641023, 0xaf820044, 0x8f840044, 0x34028000,
+        0x00821021, 0x03421821, 0x3c021000, 0xaf83001c, 0xaf440080, 0x03e00008,
+        0xaf420178, 0x27bdffe8, 0x3c046008, 0xafbf0014, 0xafb00010, 0x8c825000,
+        0x3c1a8000, 0x2403ff7f, 0x375b4000, 0x00431024, 0x3442380c, 0xac825000,
+        0x8f430008, 0x3c100800, 0x37428000, 0x34630001, 0xaf430008, 0xaf82001c,
+        0x3c02601c, 0xaf800028, 0xaf400080, 0xaf400084, 0x8c450008, 0x3c036000,
+        0x8c620808, 0x3c040800, 0x3c030080, 0xac830820, 0x3042fff0, 0x38420010,
+        0x2c420001, 0xaf850004, 0xaf820008, 0x0e00062f, 0x00000000, 0x8f420000,
+        0x30420001, 0x1040fffb, 0x00000000, 0x8f440108, 0x30822000, 0xaf840034,
+        0x10400004, 0x8e02083c, 0x24420001, 0x0a00059d, 0xae02083c, 0x30820200,
+        0x10400027, 0x00000000, 0x97420104, 0x1040001c, 0x30824000, 0x14400005,
+        0x00000000, 0x0e00022d, 0x00000000, 0x0a000592, 0x00000000, 0x8f620008,
+        0x8f630000, 0x24020030, 0x00031e02, 0x306300f0, 0x10620007, 0x28620031,
+        0x14400031, 0x24020040, 0x10620007, 0x00000000, 0x0a000592, 0x00000000,
+        0x0e0002dd, 0x00000000, 0x0a000592, 0x00000000, 0x0e0003b8, 0x00000000,
+        0x0a000592, 0x00000000, 0x30820040, 0x1440002d, 0x00000000, 0x0000000d,
+        0x00000000, 0x240004a6, 0x0a00059d, 0x00000000, 0x8f430100, 0x24020d00,
+        0x1462000f, 0x30820006, 0x97420104, 0x10400005, 0x30820040, 0x0e0004e9,
+        0x00000000, 0x0a000592, 0x00000000, 0x1440001b, 0x00000000, 0x0000000d,
+        0x00000000, 0x240004b8, 0x0a00059d, 0x00000000, 0x1040000e, 0x30821000,
+        0x10400005, 0x00000000, 0x0e00065d, 0x00000000, 0x0a000592, 0x00000000,
+        0x0e00046b, 0x00000000, 0x8f820040, 0x24420001, 0xaf820040, 0x0a00059d,
+        0x00000000, 0x30820040, 0x14400004, 0x00000000, 0x0000000d, 0x00000000,
+        0x240004cf, 0x8f420138, 0x3c034000, 0x00431025, 0xaf420138, 0x0a00053f,
+        0x00000000, 0x3c046008, 0x8c835000, 0x3c1a8000, 0x2402ff7f, 0x375b4000,
+        0x00621824, 0x3463380c, 0xac835000, 0x8f420008, 0x3c056000, 0x3c03601c,
+        0x34420001, 0xaf420008, 0x37428000, 0xaf800028, 0xaf82001c, 0xaf400080,
+        0xaf400084, 0x8c660008, 0x8ca20808, 0x3c040800, 0x3c030080, 0xac830820,
+        0x3042fff0, 0x38420010, 0x2c420001, 0xaf860004, 0xaf820008, 0x03e00008,
+        0x00000000, 0x3084ffff, 0x30820007, 0x10400002, 0x24820007, 0x3044fff8,
+        0x8f820028, 0x00441821, 0x30631fff, 0x24644000, 0x0344d821, 0xaf820018,
+        0xaf830028, 0x03e00008, 0xaf430084, 0x3084ffff, 0x30820007, 0x10400002,
+        0x24820007, 0x3044fff8, 0x8f820044, 0x8f830004, 0x00442021, 0xaf82002c,
+        0x0083102b, 0xaf840044, 0x14400002, 0x00831023, 0xaf820044, 0x8f820044,
+        0x34038000, 0x00431821, 0x03432021, 0xaf84001c, 0x03e00008, 0xaf420080,
+        0x8f830034, 0x24020002, 0x30630006, 0x1062000d, 0x2c620003, 0x50400005,
+        0x24020004, 0x10600012, 0x3c020001, 0x0a000601, 0x00000000, 0x10620007,
+        0x24020006, 0x1462000f, 0x3c020111, 0x0a0005f9, 0x00821025, 0x0a0005f8,
+        0x3c020101, 0x3c020011, 0x00821025, 0x24030001, 0xaf421000, 0xaf830030,
+        0x0a000601, 0x00000000, 0x00821025, 0xaf421000, 0xaf800030, 0x00000000,
+        0x00000000, 0x00000000, 0x03e00008, 0x00000000, 0x8f820030, 0x10400005,
+        0x3c038000, 0x8f421000, 0x00431024, 0x1040fffd, 0x00000000, 0x03e00008,
+        0x00000000, 0x8f820034, 0x27bdffe8, 0x30424000, 0x14400005, 0xafbf0010,
+        0x0e00022d, 0x00000000, 0x0a00062d, 0x8fbf0010, 0x8f620008, 0x8f630000,
+        0x24020030, 0x00031e02, 0x306300f0, 0x10620008, 0x28620031, 0x1440000d,
+        0x8fbf0010, 0x24020040, 0x10620007, 0x00000000, 0x0a00062d, 0x00000000,
+        0x0e0002dd, 0x00000000, 0x0a00062d, 0x8fbf0010, 0x0e0003b8, 0x00000000,
+        0x8fbf0010, 0x03e00008, 0x27bd0018, 0x8f84003c, 0x1080000f, 0x3c026000,
+        0x8c430c3c, 0x30630fff, 0xaf830014, 0x14600011, 0x3082000f, 0x10400005,
+        0x308200f0, 0x10400003, 0x30820f00, 0x14400006, 0x00000000, 0x0000000d,
+        0x00000000, 0x2400050e, 0x03e00008, 0x00000000, 0x0000000d, 0x00000000,
+        0x24000513, 0x03e00008, 0x00000000, 0xaf83003c, 0x03e00008, 0x00000000,
+        0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000,
+        0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a000659, 0x00a01021,
+        0xac860000, 0x24840004, 0x00a01021, 0x1440fffc, 0x24a5ffff, 0x03e00008,
+        0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x3c040800, 0x8c82084c,
+        0x54400007, 0xac80084c, 0x8f820034, 0x24030400, 0x30420c00, 0x1443005b,
+        0x00000000, 0xac80084c, 0x0000000d, 0x00000000, 0x2400003c, 0x3c026000,
+        0x8c444448, 0x3c030800, 0xac640850, 0x24000043, 0x97420104, 0x3045ffff,
+        0x000530c2, 0x24a2007f, 0x000239c2, 0x2400004e, 0x3c046020, 0x24030020,
+        0xac830000, 0x8c820000, 0x30420020, 0x10400005, 0x3c036020, 0x8c620000,
+        0x30420020, 0x1440fffd, 0x00000000, 0x3c026020, 0x8c430010, 0x24040001,
+        0x0087102b, 0x30ea007f, 0x24abfffe, 0x10400010, 0x00034240, 0x3c056020,
+        0x24090020, 0xaca90000, 0x8ca20000, 0x30420020, 0x10400006, 0x24840001,
+        0x3c036020, 0x8c620000, 0x30420020, 0x1440fffd, 0x00000000, 0x0087102b,
+        0x1440fff4, 0x00000000, 0x8f85001c, 0x3c026020, 0x8c430010, 0x3c046020,
+        0x34848000, 0x006a1825, 0x01034025, 0x2400006b, 0x10c0000b, 0x00000000,
+        0x8ca30000, 0x24a50004, 0x8ca20000, 0x24a50004, 0x24c6ffff, 0xac820000,
+        0x24840004, 0xac830000, 0x14c0fff7, 0x24840004, 0x24000077, 0x3c020007,
+        0x34427700, 0x3c036000, 0xac6223c8, 0xac6b23cc, 0xac6823e4, 0x24000086,
+        0x3c046000, 0x3c038000, 0x8c8223f8, 0x00431024, 0x1440fffd, 0x3c021000,
+        0x3c056000, 0x24030019, 0xaca223f8, 0xa743014a, 0x8ca44448, 0x3c020800,
+        0xac440854, 0x03e00008, 0x00000000, 0x00000000 };
+
+static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_TPAT_b06FwBss[(0x80/4) + 1] = { 0x00000000 };
+static u32 bnx2_TPAT_b06FwSbss[(0x48/4) + 1] = { 0x00000000 };
+
+static int bnx2_TXP_b06FwReleaseMajor = 0x0;
+static int bnx2_TXP_b06FwReleaseMinor = 0x0;
+static int bnx2_TXP_b06FwReleaseFix = 0x0;
+static u32 bnx2_TXP_b06FwStartAddr = 0x08002090;
+static u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
+static int bnx2_TXP_b06FwTextLen = 0x3ffc;
+static u32 bnx2_TXP_b06FwDataAddr = 0x08004020;
+static int bnx2_TXP_b06FwDataLen = 0x0;
+static u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
+static int bnx2_TXP_b06FwRodataLen = 0x0;
+static u32 bnx2_TXP_b06FwBssAddr = 0x08004060;
+static int bnx2_TXP_b06FwBssLen = 0x194;
+static u32 bnx2_TXP_b06FwSbssAddr = 0x08004020;
+static int bnx2_TXP_b06FwSbssLen = 0x34;
+static u32 bnx2_TXP_b06FwText[(0x3ffc/4) + 1] = {
+        0x0a000824, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x302e362e,
+        0x39000000, 0x00060900, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x00000000, 0x10000003, 0x00000000, 0x0000000d,
+        0x0000000d, 0x3c020800, 0x24424020, 0x3c030800, 0x246341f4, 0xac400000,
+        0x0043202b, 0x1480fffd, 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021,
+        0x3c100800, 0x26102090, 0x3c1c0800, 0x279c4020, 0x0e000a0e, 0x00000000,
+        0x0000000d, 0x8f840014, 0x27bdffe8, 0xafb00010, 0x8f460104, 0x8f830008,
+        0x8c8500ac, 0xaf430080, 0x948200a8, 0xa7420e10, 0x948300aa, 0xa7430e12,
+        0x8c8200ac, 0xaf420e18, 0x97430e10, 0xa7430e14, 0x97420e12, 0xa7420e16,
+        0x8f430e18, 0x00005021, 0x00c53023, 0x10c001a3, 0xaf430e1c, 0x240f0800,
+        0x3c0e1000, 0x2419fff8, 0x24100010, 0x3c188100, 0x93620008, 0x10400009,
+        0x00000000, 0x97620010, 0x00c2102b, 0x14400005, 0x00000000, 0x97620010,
+        0x3042ffff, 0x0a000862, 0xaf420e00, 0xaf460e00, 0x8f420000, 0x30420008,
+        0x1040fffd, 0x00000000, 0x97420e08, 0x8f450e04, 0x3044ffff, 0x30820001,
+        0x14400005, 0x00000000, 0x14a00005, 0x3083a040, 0x0a0009e6, 0x00000000,
+        0x0000000d, 0x3083a040, 0x24020040, 0x14620049, 0x3082a000, 0x8f87000c,
+        0x30880036, 0x30890008, 0xaf4f0178, 0x00e01821, 0x9742008a, 0x00431023,
+        0x2442ffff, 0x30421fff, 0x2c420008, 0x1440fffa, 0x00000000, 0x8f830018,
+        0x00a05021, 0x00c53023, 0x24e24000, 0x03422821, 0x306b00ff, 0x24630001,
+        0xaf830018, 0x93840012, 0x000b1400, 0x3c030100, 0x00431025, 0xaca20000,
+        0x8f820018, 0x30840007, 0x00042240, 0x34870001, 0x00e83825, 0x1120000f,
+        0xaca20004, 0x97430e0a, 0x8f84000c, 0x00ee3825, 0x2402000e, 0x00781825,
+        0xaf430160, 0x25430006, 0x24840008, 0x30841fff, 0xa742015a, 0xa7430158,
+        0xaf84000c, 0x0a0008a9, 0x00000000, 0x8f83000c, 0x25420002, 0xa7420158,
+        0x24630008, 0x30631fff, 0xaf83000c, 0x54c0000c, 0x8f420e14, 0x97420e10,
+        0x97430e12, 0x8f840014, 0x00021400, 0x00621825, 0xac8300a8, 0x8f850014,
+        0x8f420e18, 0x34e70040, 0xaca200ac, 0x8f420e14, 0x8f430e1c, 0xaf420144,
+        0xaf430148, 0xa34b0152, 0xaf470154, 0x0a0009f1, 0xaf4e0178, 0x10400128,
+        0x00000000, 0x97620010, 0x00a2102b, 0x10400003, 0x30820040, 0x10400122,
+        0x00000000, 0xafa60008, 0xa7840010, 0xaf850004, 0x93620008, 0x1440005e,
+        0x27ac0008, 0xaf60000c, 0x97820010, 0x30424000, 0x10400002, 0x2403000e,
+        0x24030016, 0xa363000a, 0x24034007, 0xaf630014, 0x93820012, 0x8f630014,
+        0x30420007, 0x00021240, 0x00621825, 0xaf630014, 0x97820010, 0x8f630014,
+        0x30420010, 0x00621825, 0xaf630014, 0x97820010, 0x30420008, 0x5040000e,
+        0x00002821, 0x8f620014, 0x004e1025, 0xaf620014, 0x97430e0a, 0x2402000e,
+        0x00781825, 0xaf630004, 0xa3620002, 0x9363000a, 0x3405fffc, 0x24630004,
+        0x0a0008f2, 0xa363000a, 0xaf600004, 0xa3600002, 0x97820010, 0x9363000a,
+        0x30421f00, 0x00021182, 0x24420028, 0x00621821, 0xa3630009, 0x97420e0c,
+        0xa7620010, 0x93630009, 0x24020008, 0x24630002, 0x30630007, 0x00431023,
+        0x30420007, 0xa362000b, 0x93640009, 0x97620010, 0x8f890004, 0x97830010,
+        0x00441021, 0x00a21021, 0x30630040, 0x10600006, 0x3045ffff, 0x15250005,
+        0x0125102b, 0x3c068000, 0x0a000925, 0x00005821, 0x0125102b, 0x144000c8,
+        0x00005021, 0x97420e14, 0xa7420e10, 0x97430e16, 0xa7430e12, 0x8f420e1c,
+        0xaf420e18, 0xaf450e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000,
+        0x97420e08, 0x00a04821, 0xa7820010, 0x8f430e04, 0x00003021, 0x240b0001,
+        0xaf830004, 0x97620010, 0x0a000936, 0x304dffff, 0x8f890004, 0x97820010,
+        0x30420040, 0x10400004, 0x01206821, 0x3c068000, 0x0a000936, 0x00005821,
+        0x97630010, 0x8f820004, 0x144300a7, 0x00005021, 0x00003021, 0x240b0001,
+        0x8d820000, 0x00491023, 0x1440000d, 0xad820000, 0x8f620014, 0x34420040,
+        0xaf620014, 0x97430e10, 0x97420e12, 0x8f840014, 0x00031c00, 0x00431025,
+        0xac8200a8, 0x8f830014, 0x8f420e18, 0xac6200ac, 0x93620008, 0x1440003f,
+        0x00000000, 0x25260002, 0x8f84000c, 0x9743008a, 0x3063ffff, 0xafa30000,
+        0x8fa20000, 0x00441023, 0x2442ffff, 0x30421fff, 0x2c420010, 0x1440fff7,
+        0x00000000, 0x8f82000c, 0x8f830018, 0x00021082, 0x00021080, 0x24424000,
+        0x03422821, 0x00605021, 0x24630001, 0x314200ff, 0x00021400, 0xaf830018,
+        0x3c033200, 0x00431025, 0xaca20000, 0x93630009, 0x9362000a, 0x00031c00,
+        0x00431025, 0xaca20004, 0x8f830018, 0xaca30008, 0x97820010, 0x30420008,
+        0x10400002, 0x00c04021, 0x25280006, 0x97430e14, 0x93640002, 0x8f450e1c,
+        0x8f660004, 0x8f670014, 0xaf4f0178, 0x3063ffff, 0xa7430144, 0x97420e16,
+        0xa7420146, 0xaf450148, 0xa34a0152, 0x8f82000c, 0x308400ff, 0xa744015a,
+        0xaf460160, 0xa7480158, 0xaf470154, 0xaf4e0178, 0x00501021, 0x30421fff,
+        0xaf82000c, 0x0a0009c5, 0x8d820000, 0x93620009, 0x9363000b, 0x8f85000c,
+        0x2463000a, 0x00435021, 0x25440007, 0x00992024, 0x9743008a, 0x3063ffff,
+        0xafa30000, 0x8fa20000, 0x00451023, 0x2442ffff, 0x30421fff, 0x0044102b,
+        0x1440fff7, 0x00000000, 0x8f82000c, 0x8f840018, 0x00021082, 0x00021080,
+        0x24424000, 0x03422821, 0x00804021, 0x24840001, 0xaf840018, 0x93630009,
+        0x310200ff, 0x00022400, 0x3c024100, 0x24630002, 0x00621825, 0x00832025,
+        0xaca40000, 0x8f62000c, 0x00461025, 0xaca20004, 0x97430e14, 0x93640002,
+        0x8f450e1c, 0x8f660004, 0x8f670014, 0xaf4f0178, 0x3063ffff, 0xa7430144,
+        0x97420e16, 0x308400ff, 0xa7420146, 0xaf450148, 0xa3480152, 0x8f83000c,
+        0x25420007, 0x00591024, 0xa744015a, 0xaf460160, 0xa7490158, 0xaf470154,
+        0xaf4e0178, 0x00621821, 0x30631fff, 0xaf83000c, 0x8d820000, 0x14400005,
+        0x00000000, 0x8f620014, 0x2403ffbf, 0x00431024, 0xaf620014, 0x8f62000c,
+        0x004d1021, 0xaf62000c, 0x93630008, 0x14600008, 0x00000000, 0x11600006,
+        0x00000000, 0x8f630014, 0x3c02efff, 0x3442fffe, 0x00621824, 0xaf630014,
+        0xa36b0008, 0x01205021, 0x15400016, 0x8fa60008, 0x97420e14, 0x97430e16,
+        0x8f850014, 0x00021400, 0x00621825, 0xaca300a8, 0x8f840014, 0x8f420e1c,
+        0x0a0009f3, 0xac8200ac, 0x97420e14, 0x97430e16, 0x8f840014, 0x00021400,
+        0x00621825, 0xac8300a8, 0x8f850014, 0x8f420e1c, 0x00005021, 0x0a0009f3,
+        0xaca200ac, 0x14c0fe64, 0x00000000, 0x55400018, 0x8fb00010, 0x3c038000,
+        0x8f420178, 0x00431024, 0x1440fffd, 0x00000000, 0x97430e14, 0x8f440e1c,
+        0x24020800, 0xaf420178, 0x3063ffff, 0xa7430144, 0x97420e16, 0x3c031000,
+        0xa7420146, 0x24020240, 0xaf440148, 0xa3400152, 0xa740015a, 0xaf400160,
+        0xa7400158, 0xaf420154, 0xaf430178, 0x8fb00010, 0x03e00008, 0x27bd0018,
+        0x27bdffd8, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, 0x3c020008, 0x03421821,
+        0xafbf0020, 0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, 0xaf830014,
+        0xaf440e00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+        0x3c0200ff, 0x3442fffd, 0x3c046004, 0xaf420e00, 0x8c835000, 0x24130d00,
+        0x3c120800, 0x3c114000, 0x2402ff7f, 0x00621824, 0x3463380c, 0x24020009,
+        0xac835000, 0xaf420008, 0xaf800018, 0xaf80000c, 0x0e000fa1, 0x00000000,
+        0x0e000a96, 0x00000000, 0x3c020800, 0x24504080, 0x8f420000, 0x30420001,
+        0x1040fffd, 0x00000000, 0x8f440100, 0xaf840008, 0xaf440020, 0x93430108,
+        0xa3830012, 0x93820012, 0x30420001, 0x10400008, 0x00000000, 0x93820012,
+        0x30420006, 0x00021100, 0x0e00083b, 0x0050d821, 0x0a000a52, 0x00000000,
+        0x14930005, 0x00000000, 0x0e00083b, 0x265b4100, 0x0a000a52, 0x00000000,
+        0x0e000ba3, 0x00000000, 0xaf510138, 0x0a000a36, 0x00000000, 0x27bdfff8,
+        0x3084ffff, 0x24820007, 0x3044fff8, 0x8f85000c, 0x9743008a, 0x3063ffff,
+        0xafa30000, 0x8fa20000, 0x00451023, 0x2442ffff, 0x30421fff, 0x0044102b,
+        0x1440fff7, 0x00000000, 0x8f82000c, 0x00021082, 0x00021080, 0x24424000,
+        0x03421021, 0x03e00008, 0x27bd0008, 0x3084ffff, 0x8f82000c, 0x24840007,
+        0x3084fff8, 0x00441021, 0x30421fff, 0xaf82000c, 0x03e00008, 0x00000000,
+        0x27bdffe8, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, 0x3c020008, 0x03421821,
+        0xafbf0010, 0xaf830014, 0xaf440e00, 0x00000000, 0x00000000, 0x00000000,
+        0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd, 0x3c046004, 0xaf420e00,
+        0x8c825000, 0x2403ff7f, 0x00431024, 0x3442380c, 0x24030009, 0xac825000,
+        0xaf430008, 0xaf800018, 0xaf80000c, 0x0e000fa1, 0x00000000, 0x0e000a96,
+        0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0x3c02000a,
+        0x03421821, 0x3c040800, 0x24844120, 0x24050018, 0xafbf0010, 0xaf830024,
+        0x0e000fad, 0x00003021, 0x3c050800, 0x3c020800, 0x24423d60, 0xaca24180,
+        0x24a54180, 0x3c020800, 0x24423e18, 0x3c030800, 0x24633e2c, 0x3c040800,
+        0xaca20004, 0x3c020800, 0x24423d68, 0xaca30008, 0xac824190, 0x24844190,
+        0x3c020800, 0x24423da4, 0x3c070800, 0x24e73de4, 0x3c060800, 0x24c63e40,
+        0x3c050800, 0x24a52b28, 0x3c030800, 0xac820004, 0x3c020800, 0x24423e48,
+        0xac870008, 0xac86000c, 0xac850010, 0xac6241b0, 0x246341b0, 0x8fbf0010,
+        0x3c020800, 0x24423e60, 0xac620004, 0xac670008, 0xac66000c, 0xac650010,
+        0x03e00008, 0x27bd0018, 0x27bdffc8, 0x3c020800, 0x24424120, 0xafbf0030,
+        0xafb3002c, 0xafb20028, 0xafb10024, 0xafb00020, 0x90470021, 0x8c510008,
+        0x8c45001c, 0x8f900020, 0x3c060800, 0x3c038000, 0x8f420178, 0x00431024,
+        0x1440fffd, 0x8cc2414c, 0x24c3414c, 0x2473ffd4, 0xaf420144, 0x8e620030,
+        0x30b22000, 0xaf420148, 0x3c021000, 0xaf50014c, 0xa3470152, 0xa7510158,
+        0xaf450154, 0xaf420178, 0x12400004, 0x3c030800, 0x8c620030, 0x24420001,
+        0xac620030, 0x93420109, 0x9344010a, 0x00111c00, 0xafa30018, 0x00071a00,
+        0xafa50014, 0x8cc5414c, 0x00021600, 0x00042400, 0x00441025, 0x00431025,
+        0xafa20010, 0x8f440100, 0x8e660030, 0x0e000fe1, 0x02003821, 0x1640000e,
+        0x8fbf0030, 0x8f820000, 0x8e630030, 0x8c44017c, 0x02031823, 0x00711823,
+        0x00641823, 0x2c630002, 0x14600006, 0x8fb3002c, 0x0000000d, 0x00000000,
+        0x240000ca, 0x8fbf0030, 0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020,
+        0x03e00008, 0x27bd0038, 0x974309da, 0x00804021, 0xad030000, 0x8f4209dc,
+        0xad020004, 0x8f4309e0, 0xad030008, 0x934409d9, 0x24020001, 0x30840003,
+        0x1082001f, 0x30a900ff, 0x28820002, 0x10400005, 0x24020002, 0x10800009,
+        0x3c0a0800, 0x0a000b64, 0x93420934, 0x1082000b, 0x24020003, 0x10820026,
+        0x3c0a0800, 0x0a000b64, 0x93420934, 0x974209e4, 0x00021400, 0x34420800,
+        0xad02000c, 0x0a000b63, 0x25080010, 0x974209e4, 0x00021400, 0x34428100,
+        0xad02000c, 0x974309e8, 0x3c0a0800, 0x00031c00, 0x34630800, 0xad030010,
+        0x0a000b63, 0x25080014, 0x974409e4, 0x3c050800, 0x24a24120, 0x94430018,
+        0x94460010, 0x9447000c, 0x00a05021, 0x24020800, 0xad000010, 0xad020014,
+        0x00042400, 0x00661821, 0x00671823, 0x2463fff2, 0x00832025, 0xad04000c,
+        0x0a000b63, 0x25080018, 0x974209e4, 0x3c050800, 0x00021400, 0x34428100,
+        0xad02000c, 0x974409e8, 0x24a24120, 0x94430018, 0x94460010, 0x9447000c,
+        0x00a05021, 0x24020800, 0xad000014, 0xad020018, 0x00042400, 0x00661821,
+        0x00671823, 0x2463ffee, 0x00832025, 0xad040010, 0x2508001c, 0x93420934,
+        0x93450921, 0x3c074000, 0x25444120, 0x94830014, 0x94860010, 0x00021082,
+        0x00021600, 0x00052c00, 0x00a72825, 0x00451025, 0x00661821, 0x00431025,
+        0xad020000, 0x97830028, 0x974209ea, 0x00621821, 0x00031c00, 0xad030004,
+        0x97820028, 0x24420001, 0x30427fff, 0xa7820028, 0x93430920, 0x3c020006,
+        0x00031e00, 0x00621825, 0xad030008, 0x8f42092c, 0xad02000c, 0x8f430930,
+        0xad030010, 0x8f440938, 0x25080014, 0xad040000, 0x8f820020, 0x11200004,
+        0xad020004, 0x8f420940, 0x0a000b8d, 0x2442ffff, 0x8f420940, 0xad020008,
+        0x8f440948, 0x8f420940, 0x93430936, 0x00822823, 0x00652806, 0x3402ffff,
+        0x0045102b, 0x54400001, 0x3405ffff, 0x93420937, 0x25444120, 0x90830020,
+        0xad000010, 0x00021700, 0x34630010, 0x00031c00, 0x00431025, 0x00451025,
+        0xad02000c, 0x03e00008, 0x25020014, 0x27bdffb0, 0x3c020008, 0x03421821,
+        0xafbf004c, 0xafbe0048, 0xafb70044, 0xafb60040, 0xafb5003c, 0xafb40038,
+        0xafb30034, 0xafb20030, 0xafb1002c, 0xafb00028, 0xaf830000, 0x24020040,
+        0xaf420814, 0xaf400810, 0x8f420944, 0x8f430950, 0x8f440954, 0x8f45095c,
+        0xaf820030, 0xaf830020, 0xaf84001c, 0xaf85002c, 0x93430900, 0x24020020,
+        0x10620005, 0x24020030, 0x10620022, 0x3c030800, 0x0a000bf1, 0x8c62002c,
+        0x24020088, 0xaf420818, 0x3c020800, 0x24424180, 0xafa20020, 0x93430109,
+        0x3c020800, 0x10600009, 0x24574190, 0x3c026000, 0x24030100, 0xac43081c,
+        0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x2400031d, 0x9342010a,
+        0x30420080, 0x1440001c, 0x00000000, 0x3c026000, 0x24030100, 0xac43081c,
+        0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x24000324, 0x0a000bf4,
+        0x00000000, 0x93430109, 0x3063007f, 0x00031140, 0x000318c0, 0x00431021,
+        0x24430088, 0xaf430818, 0x0000000d, 0x3c020800, 0x244241d0, 0x3c030800,
+        0x247741e0, 0x0a000bf4, 0xafa20020, 0x24420001, 0x0a000f4c, 0xac62002c,
+        0x8f840000, 0x8f850020, 0x24020800, 0xaf420178, 0x8f4209a4, 0x8c83017c,
+        0x00a21023, 0x00431023, 0x2c420002, 0x14400004, 0x00000000, 0x0000000d,
+        0x00000000, 0x24000349, 0x8f420104, 0x8f430988, 0x00431023, 0x58400005,
+        0x8f4209a0, 0x0000000d, 0x00000000, 0x2400034d, 0x8f4209a0, 0x3c100800,
+        0xae02414c, 0x8f4309a4, 0x2604414c, 0x2491ffd4, 0xae230030, 0x8f420104,
+        0xae250024, 0x00431023, 0xac82ffd4, 0x8fa30020, 0x8c620000, 0x0040f809,
+        0x0200b021, 0x00409021, 0x32440010, 0x32420002, 0x10400007, 0xafa40024,
+        0x8e22001c, 0x32500040, 0x2403ffbf, 0x00431024, 0x0a000f13, 0xae22001c,
+        0x32420020, 0x10400002, 0x3c020800, 0x245741b0, 0x32420001, 0x14400007,
+        0x00000000, 0x8f820008, 0xaf420080, 0x8ec3414c, 0xaf430e10, 0x8e220030,
+        0xaf420e18, 0x9343010b, 0x93420905, 0x30420008, 0x1040003c, 0x307400ff,
+        0x8f820000, 0x8c430074, 0x0460000a, 0x00000000, 0x3c026000, 0x24030100,
+        0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x24000384,
+        0x8f820000, 0x9044007b, 0x9343010a, 0x14830027, 0x32500040, 0x24072000,
+        0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec2414c,
+        0x26c4414c, 0x2484ffd4, 0xaf420144, 0x8c820030, 0x3c030100, 0xaf420148,
+        0x24020047, 0xaf43014c, 0x00001821, 0xa3420152, 0x3c021000, 0xa7430158,
+        0xaf470154, 0xaf420178, 0x8ec5414c, 0x8d230030, 0x8c860030, 0x24630001,
+        0xad230030, 0x93420109, 0x9343010a, 0xafa70014, 0xafa00018, 0x00021600,
+        0x00031c00, 0x00431025, 0x34424700, 0xafa20010, 0x8f440100, 0x0e000fe1,
+        0x3c070100, 0x3c030800, 0x24624120, 0x0a000d01, 0x8c43001c, 0x32820002,
+        0x10400047, 0x3c039000, 0x34630001, 0x8f820008, 0x32500040, 0x3c048000,
+        0x00431025, 0xaf420020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000,
+        0x8f830000, 0x90620005, 0x3c058000, 0x34420008, 0xa0620005, 0x8f860000,
+        0x34a50001, 0x8f840008, 0x8cc20074, 0x3c038000, 0x00852025, 0x00431025,
+        0xacc20074, 0xaf440020, 0x90c3007b, 0x9342010a, 0x14620028, 0x3c040800,
+        0x24072000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd,
+        0x8ec2414c, 0x26c4414c, 0x2484ffd4, 0xaf420144, 0x8c820030, 0x3c030100,
+        0xaf420148, 0x24020046, 0xaf43014c, 0x00001821, 0xa3420152, 0x3c021000,
+        0xa7430158, 0xaf470154, 0xaf420178, 0x8ec5414c, 0x8d230030, 0x8c860030,
+        0x24630001, 0xad230030, 0x93420109, 0x9343010a, 0xafa70014, 0xafa00018,
+        0x00021600, 0x00031c00, 0x00431025, 0x34424600, 0xafa20010, 0x8f440100,
+        0x0e000fe1, 0x3c070100, 0x3c040800, 0x24824120, 0x0a000d01, 0x8c43001c,
+        0x93420108, 0x30420010, 0x50400050, 0x9343093f, 0x8f860000, 0x90c3007f,
+        0x90c2007e, 0x90c40080, 0x306800ff, 0x00021600, 0x00081c00, 0x00431025,
+        0x00042200, 0x90c3007a, 0x90c5000a, 0x00441025, 0x11050028, 0x00623825,
+        0xa0c8000a, 0x24086000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024,
+        0x1440fffd, 0x8ec2414c, 0x26c4414c, 0x2484ffd4, 0xaf420144, 0x8c820030,
+        0x00001821, 0xaf420148, 0x24020052, 0xaf47014c, 0xa3420152, 0x3c021000,
+        0xa7430158, 0xaf480154, 0xaf420178, 0x8ec5414c, 0x8d230030, 0x8c860030,
+        0x24630001, 0xad230030, 0x93420109, 0x9343010a, 0xafa80014, 0xafa00018,
+        0x00021600, 0x00031c00, 0x00431025, 0x34425200, 0xafa20010, 0x0e000fe1,
+        0x8f440100, 0x0a000cfb, 0x00000000, 0x3c026000, 0x24030100, 0xac43081c,
+        0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x240003cd, 0x16800009,
+        0x3c040800, 0x3c030800, 0x24624120, 0x8c43001c, 0x32500040, 0x2404ffbf,
+        0x00641824, 0x0a000f13, 0xac43001c, 0x8c824120, 0x10400005, 0x3c030800,
+        0x8c620034, 0xac804120, 0x24420001, 0xac620034, 0x9343093f, 0x24020012,
+        0x1462000f, 0x329e0038, 0x17c0000c, 0x3c030800, 0x8f830000, 0x8c62004c,
+        0xac62005c, 0x3c020800, 0x24444120, 0x8c82001c, 0x32500040, 0x2403ffbf,
+        0x00431024, 0x0a000f13, 0xac82001c, 0xac604120, 0x97420908, 0x000211c0,
+        0xaf420024, 0x97420908, 0x3c030080, 0x34630003, 0x000211c0, 0xaf42080c,
+        0xaf43081c, 0x974209ec, 0x8f4309a4, 0xa7820028, 0x3c020800, 0x24444120,
+        0xac830028, 0x93420937, 0x93430934, 0x00021080, 0x00621821, 0xa4830014,
+        0x934209d8, 0x00621821, 0xa4830016, 0x934209d8, 0x93430934, 0x00809821,
+        0x00431021, 0x24420010, 0xa4820012, 0x0000a821, 0x24020006, 0x13c00003,
+        0xae62001c, 0x0a000d82, 0x24120008, 0x8f420958, 0x8f830020, 0x8f84002c,
+        0x00431023, 0x00832023, 0x04800003, 0xae620004, 0x04410003, 0x0082102b,
+        0x0a000d4e, 0xae600004, 0x54400001, 0xae640004, 0x8ee20000, 0x0040f809,
+        0x00000000, 0x00409021, 0x32420001, 0x5440001e, 0x8ee20004, 0x8e630008,
+        0x1060002b, 0x3c02c000, 0x00621025, 0xaf420e00, 0x8f420000, 0x30420008,
+        0x1040fffd, 0x00000000, 0x97420e08, 0xa7820010, 0x8f430e04, 0x8e620008,
+        0xaf830004, 0x8f840004, 0x0044102b, 0x1040000b, 0x24150001, 0x24020100,
+        0x3c016000, 0xac22081c, 0x3c020001, 0x3c016000, 0xac22081c, 0x0000000d,
+        0x00000000, 0x24000449, 0x24150001, 0x8ee20004, 0x0040f809, 0x00000000,
+        0x02429025, 0x32420002, 0x5040001d, 0x8f470940, 0x12a00006, 0x8ec2414c,
+        0x8f830000, 0xac6200a8, 0x8f840000, 0x8e620030, 0xac8200ac, 0x32420004,
+        0x50400013, 0x8f470940, 0x3c020800, 0x3283007d, 0x106000fe, 0x245741b0,
+        0x32820001, 0x50400006, 0x36520002, 0x8f830030, 0x8f420940, 0x106200f7,
+        0x00000000, 0x36520002, 0x24020008, 0xa660000c, 0xa662000e, 0xae600008,
+        0xa2600020, 0x8f470940, 0x3c030800, 0x24684120, 0x8d020028, 0x8d050008,
+        0x9504000c, 0x9506000a, 0x95030022, 0x00451021, 0x00862021, 0x00641821,
+        0xaf870030, 0xad020028, 0x32820030, 0x10400006, 0xa5030010, 0x91020020,
+        0x32910040, 0x34420004, 0x0a000dd4, 0xa1020020, 0x93420923, 0x30420040,
+        0x10400029, 0x32910040, 0x8f830000, 0x8f840020, 0x8c620084, 0x00441023,
+        0x0442000a, 0x3c039000, 0x95020010, 0x8c630084, 0x00821021, 0x00621823,
+        0x1c600004, 0x3c039000, 0x91020020, 0x34420001, 0xa1020020, 0x34630001,
+        0x8f820008, 0x32910040, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020,
+        0x00441024, 0x1440fffd, 0x00000000, 0x8f840000, 0x9083003f, 0x2402000a,
+        0x10620005, 0x2402000c, 0x9083003f, 0x24020008, 0x14620002, 0x24020014,
+        0xa082003f, 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020,
+        0x3c040800, 0x24904120, 0x9602000c, 0x96030016, 0x9604000e, 0x00431021,
+        0x00442021, 0x24840002, 0x3084ffff, 0x0e000a55, 0xa6020018, 0x8f850018,
+        0x00a01821, 0xa2030021, 0x8ee60008, 0x00402021, 0x24a50001, 0xaf850018,
+        0x00c0f809, 0x00000000, 0x00402021, 0x0e000b12, 0x02202821, 0x8ee3000c,
+        0x0060f809, 0x00402021, 0x96040018, 0x9602000e, 0x00822021, 0x24840002,
+        0x0e000a6b, 0x3084ffff, 0x3c030800, 0x8c624120, 0x8e030008, 0x3c040800,
+        0x00431023, 0x14400012, 0xac824120, 0x54600006, 0x8e02001c, 0x3243004a,
+        0x24020002, 0x14620005, 0x00000000, 0x8e02001c, 0x34420040, 0x0a000e0b,
+        0xae02001c, 0x52a00006, 0x36520002, 0x8e02002c, 0xaf420e10, 0x8e030030,
+        0xaf430e18, 0x36520002, 0x52a00008, 0x96670010, 0x8f830000, 0x8f420e10,
+        0xac6200a8, 0x8f840000, 0x8f420e18, 0xac8200ac, 0x96670010, 0x92680020,
+        0x24020040, 0xaf420814, 0x8f830020, 0x8f82001c, 0x00671821, 0x00621023,
+        0xaf830020, 0x58400005, 0x8f42095c, 0x8f820000, 0xaf83001c, 0xac430054,
+        0x8f42095c, 0x31030008, 0xaf82002c, 0x1060001a, 0x00000000, 0x8f840000,
+        0x90820120, 0x90830121, 0x304600ff, 0x00c31823, 0x30630007, 0x24020007,
+        0x1062000e, 0x00000000, 0x90820122, 0x304200fe, 0xa0820122, 0x8f850000,
+        0x00061880, 0x8f840020, 0x24a20100, 0x00431021, 0x24c30001, 0x30630007,
+        0xac440000, 0x0a000e40, 0xa0a30120, 0x90820122, 0x34420001, 0xa0820122,
+        0x14e00003, 0x31020001, 0x10400031, 0x32510002, 0x8f820000, 0x8c43000c,
+        0x30630001, 0x1060002c, 0x32510002, 0x3c029000, 0x8f830008, 0x34420001,
+        0x3c048000, 0x00621825, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd,
+        0x00000000, 0x8f870000, 0x8ce2000c, 0x30420001, 0x10400018, 0x00000000,
+        0x94e2006a, 0x00022880, 0x50a00001, 0x24050001, 0x94e30068, 0x90e40081,
+        0x3c020800, 0x8c460024, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001,
+        0x00a03021, 0x3c020800, 0x8c440028, 0x00c4182b, 0x54600001, 0x00c02021,
+        0x8f430074, 0x2402fffe, 0x00822824, 0x00a31821, 0xace3000c, 0x8f830008,
+        0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x8f830020, 0x3c020800,
+        0x24504120, 0xae030024, 0x8ee20010, 0x0040f809, 0x00000000, 0x12a00005,
+        0x00000000, 0x8f420e10, 0xae02002c, 0x8f430e18, 0xae030030, 0x1220feba,
+        0x0000a821, 0x8f870024, 0x97860028, 0x8f830000, 0x8f820030, 0x8f840020,
+        0x8f85001c, 0x32500040, 0xa4e6002c, 0xac620044, 0x32420008, 0xac640050,
+        0xac650054, 0x1040007a, 0x32820020, 0x10400027, 0x32910010, 0x24072000,
+        0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec2414c,
+        0x26c4414c, 0x2484ffd4, 0xaf420144, 0x8c820030, 0x3c030400, 0xaf420148,
+        0x24020041, 0xaf43014c, 0x00001821, 0xa3420152, 0x3c021000, 0xa7430158,
+        0xaf470154, 0xaf420178, 0x8ec5414c, 0x8d230030, 0x8c860030, 0x24630001,
+        0xad230030, 0x93420109, 0x9343010a, 0xafa70014, 0xafa00018, 0x00021600,
+        0x00031c00, 0x00431025, 0x34424100, 0xafa20010, 0x8f440100, 0x0e000fe1,
+        0x3c070400, 0x12200028, 0x24072000, 0x3c090800, 0x3c038000, 0x8f420178,
+        0x00431024, 0x1440fffd, 0x8ec2414c, 0x26c4414c, 0x2484ffd4, 0xaf420144,
+        0x8c820030, 0x3c030300, 0xaf420148, 0x2402004e, 0xaf43014c, 0x00001821,
+        0xa3420152, 0x3c021000, 0xa7430158, 0xaf470154, 0xaf420178, 0x8ec5414c,
+        0x8d230030, 0x8c860030, 0x24630001, 0xad230030, 0x93420109, 0x9343010a,
+        0xafa70014, 0xafa00018, 0x00021600, 0x00031c00, 0x00431025, 0x34424e00,
+        0xafa20010, 0x8f440100, 0x0e000fe1, 0x3c070300, 0x0a000f0b, 0x8fa30024,
+        0x32820008, 0x10400026, 0x3c090800, 0x24072000, 0x3c038000, 0x8f420178,
+        0x00431024, 0x1440fffd, 0x8ec2414c, 0x26c4414c, 0x2484ffd4, 0xaf420144,
+        0x8c820030, 0x3c030200, 0xaf420148, 0x2402004b, 0xaf43014c, 0x00001821,
+        0xa3420152, 0x3c021000, 0xa7430158, 0xaf470154, 0xaf420178, 0x8ec5414c,
+        0x8d230030, 0x8c860030, 0x24630001, 0xad230030, 0x93420109, 0x9343010a,
+        0xafa70014, 0xafa00018, 0x00021600, 0x00031c00, 0x00431025, 0x34424b00,
+        0xafa20010, 0x8f440100, 0x0e000fe1, 0x3c070200, 0x8fa30024, 0x14600004,
+        0x8fa40020, 0x32420010, 0x10400004, 0x00000000, 0x8c820004, 0x0040f809,
+        0x00000000, 0x12000006, 0x8fa30020, 0x8c620008, 0x0040f809, 0x00000000,
+        0x0a000f4d, 0x8fbf004c, 0x3c030800, 0x8c62413c, 0x30420040, 0x1440002f,
+        0x8fbf004c, 0x24040040, 0x8f910020, 0x3c038000, 0x8f420178, 0x00431024,
+        0x1440fffd, 0x8ec2414c, 0x26d0414c, 0x2610ffd4, 0xaf420144, 0x8e020030,
+        0x00001821, 0xaf420148, 0x24020049, 0xaf51014c, 0xa3420152, 0x3c021000,
+        0xa7430158, 0xaf440154, 0xaf420178, 0x8ec5414c, 0x8e060030, 0x93420109,
+        0x9343010a, 0xafa40014, 0xafa00018, 0x00021600, 0x00031c00, 0x00431025,
+        0x34424900, 0xafa20010, 0x8f440100, 0x0e000fe1, 0x02203821, 0x8f830000,
+        0x8e020030, 0x8c64017c, 0x02221023, 0x00441023, 0x2c420002, 0x14400005,
+        0x8fbf004c, 0x0000000d, 0x00000000, 0x240000ca, 0x8fbf004c, 0x8fbe0048,
+        0x8fb70044, 0x8fb60040, 0x8fb5003c, 0x8fb40038, 0x8fb30034, 0x8fb20030,
+        0x8fb1002c, 0x8fb00028, 0x03e00008, 0x27bd0050, 0x03e00008, 0x00001021,
+        0x3c030800, 0x24654120, 0x8ca40004, 0x8c634120, 0x0064102b, 0x54400001,
+        0x00602021, 0x9743093c, 0x0083102b, 0x54400001, 0x00801821, 0x00001021,
+        0xaca30008, 0x03e00008, 0xa4a00022, 0x8f850004, 0x97840010, 0x3c030800,
+        0x24634120, 0x24020008, 0xa462000e, 0x8f820004, 0xa460000c, 0x000420c2,
+        0x30840008, 0x2c420001, 0x00021023, 0x30420006, 0xac650008, 0x03e00008,
+        0xa0640020, 0x3c020800, 0x24424120, 0x90450021, 0x94430018, 0x3c021100,
+        0xac800004, 0x00052c00, 0x24630002, 0x00621825, 0x00a32825, 0x24820008,
+        0x03e00008, 0xac850000, 0x0000000d, 0x00000000, 0x2400016f, 0x03e00008,
+        0x00000000, 0x0000000d, 0x00000000, 0x2400017b, 0x03e00008, 0x00000000,
+        0x03e00008, 0x00000000, 0x3c020800, 0x24424120, 0xac400008, 0xa4400022,
+        0x03e00008, 0x24020001, 0x3c020800, 0x24424120, 0x24030008, 0xac400008,
+        0xa440000c, 0xa443000e, 0xa0400020, 0x03e00008, 0x24020004, 0x03e00008,
+        0x00001021, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004,
+        0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a000fb2,
+        0x00a01021, 0xac860000, 0x24840004, 0x00a01021, 0x1440fffc, 0x24a5ffff,
+        0x03e00008, 0x00000000, 0x3c0a0800, 0x8d490068, 0x3c050800, 0x24a51090,
+        0x00093140, 0x00c51021, 0xac440000, 0x8f440e04, 0x00a61021, 0xac440004,
+        0x97430e08, 0x97420e0c, 0x00a62021, 0x00031c00, 0x00431025, 0xac820008,
+        0x8f430e10, 0x00801021, 0xac43000c, 0x8f440e14, 0xac440010, 0x8f430e18,
+        0x3c0800ff, 0xac430014, 0x8f470e1c, 0x3508ffff, 0x25290001, 0xac470018,
+        0x3c070800, 0x8ce3006c, 0x9344010a, 0x3c026000, 0x24630001, 0xace3006c,
+        0x8c434448, 0x3129007f, 0x00a62821, 0xad490068, 0x00042600, 0x00681824,
+        0x00832025, 0x03e00008, 0xaca4001c, 0x8fac0010, 0x8fad0014, 0x8fae0018,
+        0x3c0b0800, 0x8d6a0060, 0x3c080800, 0x25080078, 0x000a4940, 0x01281021,
+        0x01091821, 0xac440000, 0x00601021, 0xac650004, 0xac460008, 0xac67000c,
+        0xac4c0010, 0xac6d0014, 0x3c036000, 0xac4e0018, 0x8c654448, 0x3c040800,
+        0x8c820064, 0x254a0001, 0x314a007f, 0x01094021, 0xad6a0060, 0x24420001,
+        0xac820064, 0x03e00008, 0xad05001c, 0x00000000 };
+
+static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x00000000 };
+static u32 bnx2_TXP_b06FwBss[(0x194/4) + 1] = { 0x00000000 };
+static u32 bnx2_TXP_b06FwSbss[(0x34/4) + 1] = { 0x00000000 };
+
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 770e28f98fd5..269a5e407349 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -3037,7 +3037,7 @@ static void bond_activebackup_arp_mon(struct net_device *bond_dev)
                         bond_set_slave_inactive_flags(bond->current_arp_slave);
 
                         /* search for next candidate */
-                        bond_for_each_slave_from(bond, slave, i, bond->current_arp_slave) {
+                        bond_for_each_slave_from(bond, slave, i, bond->current_arp_slave->next) {
                                 if (IS_UP(slave->dev)) {
                                         slave->link = BOND_LINK_BACK;
                                         bond_set_slave_active_flags(slave);
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index cda48c5d72a9..4ebcd052e150 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -81,6 +81,7 @@
  *                         cause DMA to kfree'd memory.
  *      0.31: 14 Nov 2004: ethtool support for getting/setting link
  *                         capabilities.
+ *      0.32: 16 Apr 2005: RX_ERROR4 handling added.
  *
  * Known bugs:
  * We suspect that on some hardware no TX done interrupts are generated.
@@ -92,7 +93,7 @@
  * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
  * superfluous timer interrupts from the nic.
  */
-#define FORCEDETH_VERSION               "0.31"
+#define FORCEDETH_VERSION               "0.32"
 #define DRV_NAME                        "forcedeth"
 
 #include <linux/module.h>
@@ -109,6 +110,7 @@
 #include <linux/mii.h>
 #include <linux/random.h>
 #include <linux/init.h>
+#include <linux/if_vlan.h>
 
 #include <asm/irq.h>
 #include <asm/io.h>
@@ -1013,6 +1015,59 @@ static void nv_tx_timeout(struct net_device *dev)
         spin_unlock_irq(&np->lock);
 }
 
+/*
+ * Called when the nic notices a mismatch between the actual data len on the
+ * wire and the len indicated in the 802 header
+ */
+static int nv_getlen(struct net_device *dev, void *packet, int datalen)
+{
+        int hdrlen;     /* length of the 802 header */
+        int protolen;   /* length as stored in the proto field */
+
+        /* 1) calculate len according to header */
+        if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == __constant_htons(ETH_P_8021Q)) {
+                protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
+                hdrlen = VLAN_HLEN;
+        } else {
+                protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
+                hdrlen = ETH_HLEN;
+        }
+        dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
+                                dev->name, datalen, protolen, hdrlen);
+        if (protolen > ETH_DATA_LEN)
+                return datalen; /* Value in proto field not a len, no checks possible */
+
+        protolen += hdrlen;
+        /* consistency checks: */
+        if (datalen > ETH_ZLEN) {
+                if (datalen >= protolen) {
+                        /* more data on wire than in 802 header, trim of
+                         * additional data.
+                         */
+                        dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
+                                        dev->name, protolen);
+                        return protolen;
+                } else {
+                        /* less data on wire than mentioned in header.
+                         * Discard the packet.
+                         */
+                        dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
+                                        dev->name);
+                        return -1;
+                }
+        } else {
+                /* short packet. Accept only if 802 values are also short */
+                if (protolen > ETH_ZLEN) {
+                        dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
+                                        dev->name);
+                        return -1;
+                }
+                dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
+                                dev->name, datalen);
+                return datalen;
+        }
+}
+
 static void nv_rx_process(struct net_device *dev)
 {
         struct fe_priv *np = get_nvpriv(dev);
@@ -1064,7 +1119,7 @@ static void nv_rx_process(struct net_device *dev)
                                 np->stats.rx_errors++;
                                 goto next_pkt;
                         }
-                        if (Flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4)) {
+                        if (Flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3)) {
                                 np->stats.rx_errors++;
                                 goto next_pkt;
                         }
@@ -1078,22 +1133,24 @@ static void nv_rx_process(struct net_device *dev)
                                 np->stats.rx_errors++;
                                 goto next_pkt;
                         }
-                        if (Flags & NV_RX_ERROR) {
-                                /* framing errors are soft errors, the rest is fatal. */
-                                if (Flags & NV_RX_FRAMINGERR) {
-                                        if (Flags & NV_RX_SUBSTRACT1) {
-                                                len--;
-                                        }
-                                } else {
+                        if (Flags & NV_RX_ERROR4) {
+                                len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
+                                if (len < 0) {
                                         np->stats.rx_errors++;
                                         goto next_pkt;
                                 }
                         }
+                        /* framing errors are soft errors. */
+                        if (Flags & NV_RX_FRAMINGERR) {
+                                if (Flags & NV_RX_SUBSTRACT1) {
+                                        len--;
+                                }
+                        }
                 } else {
                         if (!(Flags & NV_RX2_DESCRIPTORVALID))
                                 goto next_pkt;
 
-                        if (Flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4)) {
+                        if (Flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3)) {
                                 np->stats.rx_errors++;
                                 goto next_pkt;
                         }
@@ -1107,17 +1164,19 @@ static void nv_rx_process(struct net_device *dev)
                                 np->stats.rx_errors++;
                                 goto next_pkt;
                         }
-                        if (Flags & NV_RX2_ERROR) {
-                                /* framing errors are soft errors, the rest is fatal. */
-                                if (Flags & NV_RX2_FRAMINGERR) {
-                                        if (Flags & NV_RX2_SUBSTRACT1) {
-                                                len--;
-                                        }
-                                } else {
+                        if (Flags & NV_RX2_ERROR4) {
+                                len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
+                                if (len < 0) {
                                         np->stats.rx_errors++;
                                         goto next_pkt;
                                 }
                         }
+                        /* framing errors are soft errors */
+                        if (Flags & NV_RX2_FRAMINGERR) {
+                                if (Flags & NV_RX2_SUBSTRACT1) {
+                                        len--;
+                                }
+                        }
                         Flags &= NV_RX2_CHECKSUMMASK;
                         if (Flags == NV_RX2_CHECKSUMOK1 ||
                                         Flags == NV_RX2_CHECKSUMOK2 ||
@@ -1480,6 +1539,13 @@ static void nv_do_nic_poll(unsigned long data)
         enable_irq(dev->irq);
 }
 
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nv_poll_controller(struct net_device *dev)
+{
+        nv_do_nic_poll((unsigned long) dev);
+}
+#endif
+
 static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
 {
         struct fe_priv *np = get_nvpriv(dev);
@@ -1962,6 +2028,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         dev->get_stats = nv_get_stats;
         dev->change_mtu = nv_change_mtu;
         dev->set_multicast_list = nv_set_multicast;
+#ifdef CONFIG_NET_POLL_CONTROLLER
+        dev->poll_controller = nv_poll_controller;
+#endif
         SET_ETHTOOL_OPS(dev, &ops);
         dev->tx_timeout = nv_tx_timeout;
         dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c
index 855f8b2cf13b..13ed8dc1e91d 100644
--- a/drivers/net/iseries_veth.c
+++ b/drivers/net/iseries_veth.c
@@ -924,7 +924,7 @@ static int veth_transmit_to_one(struct sk_buff *skb, HvLpIndex rlp,
 
         spin_lock_irqsave(&cnx->lock, flags);
 
-        if (! cnx->state & VETH_STATE_READY)
+        if (! (cnx->state & VETH_STATE_READY))
                 goto drop;
 
         if ((skb->len - 14) > VETH_MAX_MTU)
@@ -1023,6 +1023,8 @@ static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
         lpmask = veth_transmit_to_many(skb, lpmask, dev);
 
+        dev->trans_start = jiffies;
+
         if (! lpmask) {
                 dev_kfree_skb(skb);
         } else {
@@ -1262,13 +1264,18 @@ static void veth_receive(struct veth_lpar_connection *cnx,
 
                 vlan = skb->data[9];
                 dev = veth_dev[vlan];
-                if (! dev)
-                        /* Some earlier versions of the driver sent
-                           broadcasts down all connections, even to
-                           lpars that weren't on the relevant vlan.
-                           So ignore packets belonging to a vlan we're
-                           not on. */
+                if (! dev) {
+                        /*
+                         * Some earlier versions of the driver sent
+                         * broadcasts down all connections, even to lpars
+                         * that weren't on the relevant vlan. So ignore
+                         * packets belonging to a vlan we're not on.
+                         * We can also be here if we receive packets while
+                         * the driver is going down, because then dev is NULL.
+                         */
+                        dev_kfree_skb_irq(skb);
                         continue;
+                }
 
                 port = (struct veth_port *)dev->priv;
                 dest = *((u64 *) skb->data) & 0xFFFFFFFFFFFF0000;
@@ -1381,18 +1388,25 @@ void __exit veth_module_cleanup(void)
 {
         int i;
 
-        vio_unregister_driver(&veth_driver);
+        /* Stop the queues first to stop any new packets being sent. */
+        for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++)
+                if (veth_dev[i])
+                        netif_stop_queue(veth_dev[i]);
 
+        /* Stop the connections before we unregister the driver. This
+         * ensures there's no skbs lying around holding the device open. */
         for (i = 0; i < HVMAXARCHITECTEDLPS; ++i)
                 veth_stop_connection(i);
 
         HvLpEvent_unregisterHandler(HvLpEvent_Type_VirtualLan);
 
         /* Hypervisor callbacks may have scheduled more work while we
-         * were destroying connections. Now that we've disconnected from
+         * were stoping connections. Now that we've disconnected from
          * the hypervisor make sure everything's finished. */
         flush_scheduled_work();
 
+        vio_unregister_driver(&veth_driver);
+
         for (i = 0; i < HVMAXARCHITECTEDLPS; ++i)
                 veth_destroy_connection(i);
 
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 223bdadd4c0d..babb59e146ea 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -2433,9 +2433,9 @@ static void __set_rx_mode(struct net_device *dev)
                 rx_mode = RxFilterEnable | AcceptBroadcast
                         | AcceptMulticast | AcceptMyPhys;
                 for (i = 0; i < 64; i += 2) {
-                        writew(HASH_TABLE + i, ioaddr + RxFilterAddr);
-                        writew((mc_filter[i+1]<<8) + mc_filter[i],
-                                ioaddr + RxFilterData);
+                        writel(HASH_TABLE + i, ioaddr + RxFilterAddr);
+                        writel((mc_filter[i + 1] << 8) + mc_filter[i],
+                               ioaddr + RxFilterData);
                 }
         }
         writel(rx_mode, ioaddr + RxFilterAddr);
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c
index 2fcc181a8624..c336b46bd332 100644
--- a/drivers/net/ns83820.c
+++ b/drivers/net/ns83820.c
@@ -1,4 +1,4 @@
-#define _VERSION "0.20"
+#define VERSION "0.22"
 /* ns83820.c by Benjamin LaHaise with contributions.
  *
  * Questions/comments/discussion to linux-ns83820@kvack.org.
@@ -63,9 +63,11 @@
  *                           -  fix missed txok introduced during performance
  *                              tuning
  *                      0.20 -  fix stupid RFEN thinko.  i am such a smurf.
- *
  *      20040828        0.21 -  add hardware vlan accleration
  *                              by Neil Horman <nhorman@redhat.com>
+ *      20050406        0.22 -  improved DAC ifdefs from Andi Kleen     
+ *                           -  removal of dead code from Adrian Bunk
+ *                           -  fix half duplex collision behaviour
  * Driver Overview
  * ===============
  *
@@ -129,18 +131,6 @@ static int lnksts = 0;		/* CFG_LNKSTS bit polarity */
 #undef Dprintk
 #define Dprintk                 dprintk
 
-#if defined(CONFIG_HIGHMEM64G) || defined(__ia64__)
-#define USE_64BIT_ADDR  "+"
-#endif
-
-#if defined(USE_64BIT_ADDR)
-#define VERSION _VERSION USE_64BIT_ADDR
-#define TRY_DAC 1
-#else
-#define VERSION _VERSION
-#define TRY_DAC 0
-#endif
-
 /* tunables */
 #define RX_BUF_SIZE     1500    /* 8192 */
 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
@@ -386,22 +376,16 @@ static int lnksts = 0;		/* CFG_LNKSTS bit polarity */
 #define LINK_DOWN               0x02
 #define LINK_UP                 0x04
 
-#ifdef USE_64BIT_ADDR
-#define HW_ADDR_LEN     8
+#define HW_ADDR_LEN     sizeof(dma_addr_t) 
 #define desc_addr_set(desc, addr)                               \
         do {                                                    \
-                u64 __addr = (addr);                            \
-                (desc)[0] = cpu_to_le32(__addr);                \
-                (desc)[1] = cpu_to_le32(__addr >> 32);          \
+                ((desc)[0] = cpu_to_le32(addr));                \
+                if (HW_ADDR_LEN == 8)                           \
+                        (desc)[1] = cpu_to_le32(((u64)addr) >> 32);     \
         } while(0)
 #define desc_addr_get(desc)                                     \
-                (((u64)le32_to_cpu((desc)[1]) << 32)            \
-                     | le32_to_cpu((desc)[0]))
-#else
-#define HW_ADDR_LEN     4
-#define desc_addr_set(desc, addr)       ((desc)[0] = cpu_to_le32(addr))
-#define desc_addr_get(desc)             (le32_to_cpu((desc)[0]))
-#endif
+        (le32_to_cpu((desc)[0]) | \
+        (HW_ADDR_LEN == 8 ? ((dma_addr_t)le32_to_cpu((desc)[1]))<<32 : 0))
 
 #define DESC_LINK               0
 #define DESC_BUFPTR             (DESC_LINK + HW_ADDR_LEN/4)
@@ -727,11 +711,23 @@ static void fastcall phy_intr(struct net_device *ndev)
                 speed = ((cfg / CFG_SPDSTS0) & 3);
                 fullduplex = (cfg & CFG_DUPSTS);
 
-                if (fullduplex)
+                if (fullduplex) {
                         new_cfg |= CFG_SB;
+                        writel(readl(dev->base + TXCFG)
+                                        | TXCFG_CSI | TXCFG_HBI,
+                               dev->base + TXCFG);
+                        writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
+                               dev->base + RXCFG);
+                } else {
+                        writel(readl(dev->base + TXCFG)
+                                        & ~(TXCFG_CSI | TXCFG_HBI),
+                               dev->base + TXCFG);
+                        writel(readl(dev->base + RXCFG) & ~(RXCFG_RX_FD),
+                               dev->base + RXCFG);
+                }
 
                 if ((cfg & CFG_LNKSTS) &&
-                    ((new_cfg ^ dev->CFG_cache) & CFG_MODE_1000)) {
+                    ((new_cfg ^ dev->CFG_cache) != 0)) {
                         writel(new_cfg, dev->base + CFG);
                         dev->CFG_cache = new_cfg;
                 }
@@ -1189,7 +1185,6 @@ again:
 
         for (;;) {
                 volatile u32 *desc = dev->tx_descs + (free_idx * DESC_SIZE);
-                u32 residue = 0;
 
                 dprintk("frag[%3u]: %4u @ 0x%08Lx\n", free_idx, len,
                         (unsigned long long)buf);
@@ -1199,17 +1194,11 @@ again:
                 desc_addr_set(desc + DESC_BUFPTR, buf);
                 desc[DESC_EXTSTS] = cpu_to_le32(extsts);
 
-                cmdsts = ((nr_frags|residue) ? CMDSTS_MORE : do_intr ? CMDSTS_INTR : 0);
+                cmdsts = ((nr_frags) ? CMDSTS_MORE : do_intr ? CMDSTS_INTR : 0);
                 cmdsts |= (desc == first_desc) ? 0 : CMDSTS_OWN;
                 cmdsts |= len;
                 desc[DESC_CMDSTS] = cpu_to_le32(cmdsts);
 
-                if (residue) {
-                        buf += len;
-                        len = residue;
-                        continue;
-                }
-
                 if (!nr_frags)
                         break;
 
@@ -1841,7 +1830,8 @@ static int __devinit ns83820_init_one(struct pci_dev *pci_dev, const struct pci_
         int using_dac = 0;
 
         /* See if we can set the dma mask early on; failure is fatal. */
-        if (TRY_DAC && !pci_set_dma_mask(pci_dev, 0xffffffffffffffffULL)) {
+        if (sizeof(dma_addr_t) == 8 && 
+                !pci_set_dma_mask(pci_dev, 0xffffffffffffffffULL)) {
                 using_dac = 1;
         } else if (!pci_set_dma_mask(pci_dev, 0xffffffff)) {
                 using_dac = 0;
@@ -1972,9 +1962,8 @@ static int __devinit ns83820_init_one(struct pci_dev *pci_dev, const struct pci_
         /* When compiled with 64 bit addressing, we must always enable
          * the 64 bit descriptor format.
          */
-#ifdef USE_64BIT_ADDR
-        dev->CFG_cache |= CFG_M64ADDR;
-#endif
+        if (sizeof(dma_addr_t) == 8) 
+                dev->CFG_cache |= CFG_M64ADDR;
         if (using_dac)
                 dev->CFG_cache |= CFG_T64ADDR;
 
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c
index 3e9d9aab0588..3107aed0fb51 100644
--- a/drivers/net/sis900.c
+++ b/drivers/net/sis900.c
@@ -162,6 +162,7 @@ struct sis900_private {
         struct mii_phy * mii;
         struct mii_phy * first_mii; /* record the first mii structure */
         unsigned int cur_phy;
+        struct mii_if_info mii_info;
 
         struct timer_list timer; /* Link status detection timer. */
         u8 autong_complete; /* 1: auto-negotiate complete  */
@@ -203,7 +204,7 @@ static int sis900_open(struct net_device *net_dev);
 static int sis900_mii_probe (struct net_device * net_dev);
 static void sis900_init_rxfilter (struct net_device * net_dev);
 static u16 read_eeprom(long ioaddr, int location);
-static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
+static int mdio_read(struct net_device *net_dev, int phy_id, int location);
 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
 static void sis900_timer(unsigned long data);
 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
@@ -478,7 +479,13 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
                 sis_priv->msg_enable = sis900_debug;
         else
                 sis_priv->msg_enable = SIS900_DEF_MSG;
-                
+
+        sis_priv->mii_info.dev = net_dev;
+        sis_priv->mii_info.mdio_read = mdio_read;
+        sis_priv->mii_info.mdio_write = mdio_write;
+        sis_priv->mii_info.phy_id_mask = 0x1f;
+        sis_priv->mii_info.reg_num_mask = 0x1f;
+
         /* Get Mac address according to the chip revision */
         pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
         if(netif_msg_probe(sis_priv))
@@ -725,6 +732,8 @@ static u16 sis900_default_phy(struct net_device * net_dev)
                        pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
         }
         
+        sis_priv->mii_info.phy_id = sis_priv->cur_phy;
+
         status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
         status &= (~MII_CNTL_ISOLATE);
 
@@ -852,7 +861,7 @@ static void mdio_reset(long mdio_addr)
  *      Please see SiS7014 or ICS spec
  */
 
-static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
+static int mdio_read(struct net_device *net_dev, int phy_id, int location)
 {
         long mdio_addr = net_dev->base_addr + mear;
         int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
@@ -1966,10 +1975,47 @@ static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
         sis_priv->msg_enable = value;
 }
 
+static u32 sis900_get_link(struct net_device *net_dev)
+{
+        struct sis900_private *sis_priv = net_dev->priv;
+        return mii_link_ok(&sis_priv->mii_info);
+}
+
+static int sis900_get_settings(struct net_device *net_dev,
+                                struct ethtool_cmd *cmd)
+{
+        struct sis900_private *sis_priv = net_dev->priv;
+        spin_lock_irq(&sis_priv->lock);
+        mii_ethtool_gset(&sis_priv->mii_info, cmd);
+        spin_unlock_irq(&sis_priv->lock);
+        return 0;
+}
+
+static int sis900_set_settings(struct net_device *net_dev,
+                                struct ethtool_cmd *cmd)
+{
+        struct sis900_private *sis_priv = net_dev->priv;
+        int rt;
+        spin_lock_irq(&sis_priv->lock);
+        rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
+        spin_unlock_irq(&sis_priv->lock);
+        return rt;
+}
+
+static int sis900_nway_reset(struct net_device *net_dev)
+{
+        struct sis900_private *sis_priv = net_dev->priv;
+        return mii_nway_restart(&sis_priv->mii_info);
+}
+
 static struct ethtool_ops sis900_ethtool_ops = {
         .get_drvinfo    = sis900_get_drvinfo,
         .get_msglevel   = sis900_get_msglevel,
         .set_msglevel   = sis900_set_msglevel,
+        .get_link       = sis900_get_link,
+        .get_settings   = sis900_get_settings,
+        .set_settings   = sis900_set_settings,
+        .nway_reset     = sis900_nway_reset,
 };
 
 /**
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index f10dd74988c4..fc9b5cd957aa 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -133,6 +133,8 @@
 /* number of ETHTOOL_GSTATS u64's */
 #define TG3_NUM_STATS           (sizeof(struct tg3_ethtool_stats)/sizeof(u64))
 
+#define TG3_NUM_TEST            6
+
 static char version[] __devinitdata =
         DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
 
@@ -316,6 +318,17 @@ static struct {
         { "nic_tx_threshold_hit" }
 };
 
+static struct {
+        const char string[ETH_GSTRING_LEN];
+} ethtool_test_keys[TG3_NUM_TEST] = {
+        { "nvram test     (online) " },
+        { "link test      (online) " },
+        { "register test  (offline)" },
+        { "memory test    (offline)" },
+        { "loopback test  (offline)" },
+        { "interrupt test (offline)" },
+};
+
 static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val)
 {
         if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) {
@@ -3070,7 +3083,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id,
 }
 
 static int tg3_init_hw(struct tg3 *);
-static int tg3_halt(struct tg3 *, int);
+static int tg3_halt(struct tg3 *, int, int);
 
 #ifdef CONFIG_NET_POLL_CONTROLLER
 static void tg3_poll_controller(struct net_device *dev)
@@ -3094,7 +3107,7 @@ static void tg3_reset_task(void *_data)
         restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER;
         tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER;
 
-        tg3_halt(tp, 0);
+        tg3_halt(tp, RESET_KIND_SHUTDOWN, 0);
         tg3_init_hw(tp);
 
         tg3_netif_start(tp);
@@ -3440,7 +3453,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
         spin_lock_irq(&tp->lock);
         spin_lock(&tp->tx_lock);
 
-        tg3_halt(tp, 1);
+        tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
 
         tg3_set_mtu(dev, tp, new_mtu);
 
@@ -4131,19 +4144,19 @@ static void tg3_stop_fw(struct tg3 *tp)
 }
 
 /* tp->lock is held. */
-static int tg3_halt(struct tg3 *tp, int silent)
+static int tg3_halt(struct tg3 *tp, int kind, int silent)
 {
         int err;
 
         tg3_stop_fw(tp);
 
-        tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN);
+        tg3_write_sig_pre_reset(tp, kind);
 
         tg3_abort_hw(tp, silent);
         err = tg3_chip_reset(tp);
 
-        tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN);
-        tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
+        tg3_write_sig_legacy(tp, kind);
+        tg3_write_sig_post_reset(tp, kind);
 
         if (err)
                 return err;
@@ -4357,7 +4370,12 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_b
          */
         tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
 
+        /* It is possible that bootcode is still loading at this point.
+         * Get the nvram lock first before halting the cpu.
+         */
+        tg3_nvram_lock(tp);
         err = tg3_halt_cpu(tp, cpu_base);
+        tg3_nvram_unlock(tp);
         if (err)
                 goto out;
 
@@ -5881,6 +5899,9 @@ static int tg3_test_interrupt(struct tg3 *tp)
         int err, i;
         u32 int_mbox = 0;
 
+        if (!netif_running(dev))
+                return -ENODEV;
+
         tg3_disable_ints(tp);
 
         free_irq(tp->pdev->irq, dev);
@@ -5984,7 +6005,7 @@ static int tg3_test_msi(struct tg3 *tp)
         spin_lock_irq(&tp->lock);
         spin_lock(&tp->tx_lock);
 
-        tg3_halt(tp, 1);
+        tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
         err = tg3_init_hw(tp);
 
         spin_unlock(&tp->tx_lock);
@@ -6060,7 +6081,7 @@ static int tg3_open(struct net_device *dev)
 
         err = tg3_init_hw(tp);
         if (err) {
-                tg3_halt(tp, 1);
+                tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
                 tg3_free_rings(tp);
         } else {
                 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
@@ -6104,7 +6125,7 @@ static int tg3_open(struct net_device *dev)
                                 pci_disable_msi(tp->pdev);
                                 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
                         }
-                        tg3_halt(tp, 1);
+                        tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
                         tg3_free_rings(tp);
                         tg3_free_consistent(tp);
 
@@ -6377,7 +6398,7 @@ static int tg3_close(struct net_device *dev)
 
         tg3_disable_ints(tp);
 
-        tg3_halt(tp, 1);
+        tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
         tg3_free_rings(tp);
         tp->tg3_flags &=
                 ~(TG3_FLAG_INIT_COMPLETE |
@@ -7097,7 +7118,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
         tp->tx_pending = ering->tx_pending;
 
         if (netif_running(dev)) {
-                tg3_halt(tp, 1);
+                tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
                 tg3_init_hw(tp);
                 tg3_netif_start(tp);
         }
@@ -7140,7 +7161,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
                 tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE;
 
         if (netif_running(dev)) {
-                tg3_halt(tp, 1);
+                tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
                 tg3_init_hw(tp);
                 tg3_netif_start(tp);
         }
@@ -7199,12 +7220,20 @@ static int tg3_get_stats_count (struct net_device *dev)
         return TG3_NUM_STATS;
 }
 
+static int tg3_get_test_count (struct net_device *dev)
+{
+        return TG3_NUM_TEST;
+}
+
 static void tg3_get_strings (struct net_device *dev, u32 stringset, u8 *buf)
 {
         switch (stringset) {
         case ETH_SS_STATS:
                 memcpy(buf, &ethtool_stats_keys, sizeof(ethtool_stats_keys));
                 break;
+        case ETH_SS_TEST:
+                memcpy(buf, &ethtool_test_keys, sizeof(ethtool_test_keys));
+                break;
         default:
                 WARN_ON(1);     /* we need a WARN() */
                 break;
@@ -7218,6 +7247,516 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
         memcpy(tmp_stats, tg3_get_estats(tp), sizeof(tp->estats));
 }
 
+#define NVRAM_TEST_SIZE 0x100
+
+static int tg3_test_nvram(struct tg3 *tp)
+{
+        u32 *buf, csum;
+        int i, j, err = 0;
+
+        buf = kmalloc(NVRAM_TEST_SIZE, GFP_KERNEL);
+        if (buf == NULL)
+                return -ENOMEM;
+
+        for (i = 0, j = 0; i < NVRAM_TEST_SIZE; i += 4, j++) {
+                u32 val;
+
+                if ((err = tg3_nvram_read(tp, i, &val)) != 0)
+                        break;
+                buf[j] = cpu_to_le32(val);
+        }
+        if (i < NVRAM_TEST_SIZE)
+                goto out;
+
+        err = -EIO;
+        if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC)
+                goto out;
+
+        /* Bootstrap checksum at offset 0x10 */
+        csum = calc_crc((unsigned char *) buf, 0x10);
+        if(csum != cpu_to_le32(buf[0x10/4]))
+                goto out;
+
+        /* Manufacturing block starts at offset 0x74, checksum at 0xfc */
+        csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88);
+        if (csum != cpu_to_le32(buf[0xfc/4]))
+                 goto out;
+
+        err = 0;
+
+out:
+        kfree(buf);
+        return err;
+}
+
+#define TG3_SERDES_TIMEOUT_SEC  2
+#define TG3_COPPER_TIMEOUT_SEC  6
+
+static int tg3_test_link(struct tg3 *tp)
+{
+        int i, max;
+
+        if (!netif_running(tp->dev))
+                return -ENODEV;
+
+        if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
+                max = TG3_SERDES_TIMEOUT_SEC;
+        else
+                max = TG3_COPPER_TIMEOUT_SEC;
+
+        for (i = 0; i < max; i++) {
+                if (netif_carrier_ok(tp->dev))
+                        return 0;
+
+                if (msleep_interruptible(1000))
+                        break;
+        }
+
+        return -EIO;
+}
+
+/* Only test the commonly used registers */
+static int tg3_test_registers(struct tg3 *tp)
+{
+        int i, is_5705;
+        u32 offset, read_mask, write_mask, val, save_val, read_val;
+        static struct {
+                u16 offset;
+                u16 flags;
+#define TG3_FL_5705     0x1
+#define TG3_FL_NOT_5705 0x2
+#define TG3_FL_NOT_5788 0x4
+                u32 read_mask;
+                u32 write_mask;
+        } reg_tbl[] = {
+                /* MAC Control Registers */
+                { MAC_MODE, TG3_FL_NOT_5705,
+                        0x00000000, 0x00ef6f8c },
+                { MAC_MODE, TG3_FL_5705,
+                        0x00000000, 0x01ef6b8c },
+                { MAC_STATUS, TG3_FL_NOT_5705,
+                        0x03800107, 0x00000000 },
+                { MAC_STATUS, TG3_FL_5705,
+                        0x03800100, 0x00000000 },
+                { MAC_ADDR_0_HIGH, 0x0000,
+                        0x00000000, 0x0000ffff },
+                { MAC_ADDR_0_LOW, 0x0000,
+                        0x00000000, 0xffffffff },
+                { MAC_RX_MTU_SIZE, 0x0000,
+                        0x00000000, 0x0000ffff },
+                { MAC_TX_MODE, 0x0000,
+                        0x00000000, 0x00000070 },
+                { MAC_TX_LENGTHS, 0x0000,
+                        0x00000000, 0x00003fff },
+                { MAC_RX_MODE, TG3_FL_NOT_5705,
+                        0x00000000, 0x000007fc },
+                { MAC_RX_MODE, TG3_FL_5705,
+                        0x00000000, 0x000007dc },
+                { MAC_HASH_REG_0, 0x0000,
+                        0x00000000, 0xffffffff },
+                { MAC_HASH_REG_1, 0x0000,
+                        0x00000000, 0xffffffff },
+                { MAC_HASH_REG_2, 0x0000,
+                        0x00000000, 0xffffffff },
+                { MAC_HASH_REG_3, 0x0000,
+                        0x00000000, 0xffffffff },
+
+                /* Receive Data and Receive BD Initiator Control Registers. */
+                { RCVDBDI_JUMBO_BD+0, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { RCVDBDI_JUMBO_BD+4, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { RCVDBDI_JUMBO_BD+8, TG3_FL_NOT_5705,
+                        0x00000000, 0x00000003 },
+                { RCVDBDI_JUMBO_BD+0xc, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { RCVDBDI_STD_BD+0, 0x0000,
+                        0x00000000, 0xffffffff },
+                { RCVDBDI_STD_BD+4, 0x0000,
+                        0x00000000, 0xffffffff },
+                { RCVDBDI_STD_BD+8, 0x0000,
+                        0x00000000, 0xffff0002 },
+                { RCVDBDI_STD_BD+0xc, 0x0000,
+                        0x00000000, 0xffffffff },
+        
+                /* Receive BD Initiator Control Registers. */
+                { RCVBDI_STD_THRESH, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { RCVBDI_STD_THRESH, TG3_FL_5705,
+                        0x00000000, 0x000003ff },
+                { RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+        
+                /* Host Coalescing Control Registers. */
+                { HOSTCC_MODE, TG3_FL_NOT_5705,
+                        0x00000000, 0x00000004 },
+                { HOSTCC_MODE, TG3_FL_5705,
+                        0x00000000, 0x000000f6 },
+                { HOSTCC_RXCOL_TICKS, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_RXCOL_TICKS, TG3_FL_5705,
+                        0x00000000, 0x000003ff },
+                { HOSTCC_TXCOL_TICKS, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_TXCOL_TICKS, TG3_FL_5705,
+                        0x00000000, 0x000003ff },
+                { HOSTCC_RXMAX_FRAMES, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_RXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788,
+                        0x00000000, 0x000000ff },
+                { HOSTCC_TXMAX_FRAMES, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_TXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788,
+                        0x00000000, 0x000000ff },
+                { HOSTCC_RXCOAL_TICK_INT, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_TXCOAL_TICK_INT, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788,
+                        0x00000000, 0x000000ff },
+                { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788,
+                        0x00000000, 0x000000ff },
+                { HOSTCC_STAT_COAL_TICKS, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_STATS_BLK_HOST_ADDR, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_STATS_BLK_HOST_ADDR+4, TG3_FL_NOT_5705,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_STATUS_BLK_HOST_ADDR, 0x0000,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_STATUS_BLK_HOST_ADDR+4, 0x0000,
+                        0x00000000, 0xffffffff },
+                { HOSTCC_STATS_BLK_NIC_ADDR, 0x0000,
+                        0xffffffff, 0x00000000 },
+                { HOSTCC_STATUS_BLK_NIC_ADDR, 0x0000,
+                        0xffffffff, 0x00000000 },
+
+                /* Buffer Manager Control Registers. */
+                { BUFMGR_MB_POOL_ADDR, 0x0000,
+                        0x00000000, 0x007fff80 },
+                { BUFMGR_MB_POOL_SIZE, 0x0000,
+                        0x00000000, 0x007fffff },
+                { BUFMGR_MB_RDMA_LOW_WATER, 0x0000,
+                        0x00000000, 0x0000003f },
+                { BUFMGR_MB_MACRX_LOW_WATER, 0x0000,
+                        0x00000000, 0x000001ff },
+                { BUFMGR_MB_HIGH_WATER, 0x0000,
+                        0x00000000, 0x000001ff },
+                { BUFMGR_DMA_DESC_POOL_ADDR, TG3_FL_NOT_5705,
+                        0xffffffff, 0x00000000 },
+                { BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705,
+                        0xffffffff, 0x00000000 },
+        
+                /* Mailbox Registers */
+                { GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000,
+                        0x00000000, 0x000001ff },
+                { GRCMBOX_RCVJUMBO_PROD_IDX+4, TG3_FL_NOT_5705,
+                        0x00000000, 0x000001ff },
+                { GRCMBOX_RCVRET_CON_IDX_0+4, 0x0000,
+                        0x00000000, 0x000007ff },
+                { GRCMBOX_SNDHOST_PROD_IDX_0+4, 0x0000,
+                        0x00000000, 0x000001ff },
+
+                { 0xffff, 0x0000, 0x00000000, 0x00000000 },
+        };
+
+        if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
+                is_5705 = 1;
+        else
+                is_5705 = 0;
+
+        for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
+                if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705))
+                        continue;
+
+                if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705))
+                        continue;
+
+                if ((tp->tg3_flags2 & TG3_FLG2_IS_5788) &&
+                    (reg_tbl[i].flags & TG3_FL_NOT_5788))
+                        continue;
+
+                offset = (u32) reg_tbl[i].offset;
+                read_mask = reg_tbl[i].read_mask;
+                write_mask = reg_tbl[i].write_mask;
+
+                /* Save the original register content */
+                save_val = tr32(offset);
+
+                /* Determine the read-only value. */
+                read_val = save_val & read_mask;
+
+                /* Write zero to the register, then make sure the read-only bits
+                 * are not changed and the read/write bits are all zeros.
+                 */
+                tw32(offset, 0);
+
+                val = tr32(offset);
+
+                /* Test the read-only and read/write bits. */
+                if (((val & read_mask) != read_val) || (val & write_mask))
+                        goto out;
+
+                /* Write ones to all the bits defined by RdMask and WrMask, then
+                 * make sure the read-only bits are not changed and the
+                 * read/write bits are all ones.
+                 */
+                tw32(offset, read_mask | write_mask);
+
+                val = tr32(offset);
+
+                /* Test the read-only bits. */
+                if ((val & read_mask) != read_val)
+                        goto out;
+
+                /* Test the read/write bits. */
+                if ((val & write_mask) != write_mask)
+                        goto out;
+
+                tw32(offset, save_val);
+        }
+
+        return 0;
+
+out:
+        printk(KERN_ERR PFX "Register test failed at offset %x\n", offset);
+        tw32(offset, save_val);
+        return -EIO;
+}
+
+static int tg3_do_mem_test(struct tg3 *tp, u32 offset, u32 len)
+{
+        static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a };
+        int i;
+        u32 j;
+
+        for (i = 0; i < sizeof(test_pattern)/sizeof(u32); i++) {
+                for (j = 0; j < len; j += 4) {
+                        u32 val;
+
+                        tg3_write_mem(tp, offset + j, test_pattern[i]);
+                        tg3_read_mem(tp, offset + j, &val);
+                        if (val != test_pattern[i])
+                                return -EIO;
+                }
+        }
+        return 0;
+}
+
+static int tg3_test_memory(struct tg3 *tp)
+{
+        static struct mem_entry {
+                u32 offset;
+                u32 len;
+        } mem_tbl_570x[] = {
+                { 0x00000000, 0x01000},
+                { 0x00002000, 0x1c000},
+                { 0xffffffff, 0x00000}
+        }, mem_tbl_5705[] = {
+                { 0x00000100, 0x0000c},
+                { 0x00000200, 0x00008},
+                { 0x00000b50, 0x00400},
+                { 0x00004000, 0x00800},
+                { 0x00006000, 0x01000},
+                { 0x00008000, 0x02000},
+                { 0x00010000, 0x0e000},
+                { 0xffffffff, 0x00000}
+        };
+        struct mem_entry *mem_tbl;
+        int err = 0;
+        int i;
+
+        if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
+                mem_tbl = mem_tbl_5705;
+        else
+                mem_tbl = mem_tbl_570x;
+
+        for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
+                if ((err = tg3_do_mem_test(tp, mem_tbl[i].offset,
+                    mem_tbl[i].len)) != 0)
+                        break;
+        }
+        
+        return err;
+}
+
+static int tg3_test_loopback(struct tg3 *tp)
+{
+        u32 mac_mode, send_idx, rx_start_idx, rx_idx, tx_idx, opaque_key;
+        u32 desc_idx;
+        struct sk_buff *skb, *rx_skb;
+        u8 *tx_data;
+        dma_addr_t map;
+        int num_pkts, tx_len, rx_len, i, err;
+        struct tg3_rx_buffer_desc *desc;
+
+        if (!netif_running(tp->dev))
+                return -ENODEV;
+
+        err = -EIO;
+
+        tg3_abort_hw(tp, 1);
+
+        /* Clearing this flag to keep interrupts disabled */
+        tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
+        tg3_reset_hw(tp);
+
+        mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
+                   MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY |
+                   MAC_MODE_PORT_MODE_GMII;
+        tw32(MAC_MODE, mac_mode);
+
+        tx_len = 1514;
+        skb = dev_alloc_skb(tx_len);
+        tx_data = skb_put(skb, tx_len);
+        memcpy(tx_data, tp->dev->dev_addr, 6);
+        memset(tx_data + 6, 0x0, 8);
+
+        tw32(MAC_RX_MTU_SIZE, tx_len + 4);
+
+        for (i = 14; i < tx_len; i++)
+                tx_data[i] = (u8) (i & 0xff);
+
+        map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE);
+
+        tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
+             HOSTCC_MODE_NOW);
+
+        udelay(10);
+
+        rx_start_idx = tp->hw_status->idx[0].rx_producer;
+
+        send_idx = 0;
+        num_pkts = 0;
+
+        tg3_set_txd(tp, send_idx, map, tx_len, 0, 1);
+
+        send_idx++;
+        num_pkts++;
+
+        tw32_tx_mbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW, send_idx);
+        tr32(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW);
+
+        udelay(10);
+
+        for (i = 0; i < 10; i++) {
+                tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
+                       HOSTCC_MODE_NOW);
+
+                udelay(10);
+
+                tx_idx = tp->hw_status->idx[0].tx_consumer;
+                rx_idx = tp->hw_status->idx[0].rx_producer;
+                if ((tx_idx == send_idx) &&
+                    (rx_idx == (rx_start_idx + num_pkts)))
+                        break;
+        }
+
+        pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE);
+        dev_kfree_skb(skb);
+
+        if (tx_idx != send_idx)
+                goto out;
+
+        if (rx_idx != rx_start_idx + num_pkts)
+                goto out;
+
+        desc = &tp->rx_rcb[rx_start_idx];
+        desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
+        opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
+        if (opaque_key != RXD_OPAQUE_RING_STD)
+                goto out;
+
+        if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
+            (desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII))
+                goto out;
+
+        rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4;
+        if (rx_len != tx_len)
+                goto out;
+
+        rx_skb = tp->rx_std_buffers[desc_idx].skb;
+
+        map = pci_unmap_addr(&tp->rx_std_buffers[desc_idx], mapping);
+        pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len, PCI_DMA_FROMDEVICE);
+
+        for (i = 14; i < tx_len; i++) {
+                if (*(rx_skb->data + i) != (u8) (i & 0xff))
+                        goto out;
+        }
+        err = 0;
+        
+        /* tg3_free_rings will unmap and free the rx_skb */
+out:
+        return err;
+}
+
+static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
+                          u64 *data)
+{
+        struct tg3 *tp = netdev_priv(dev);
+
+        memset(data, 0, sizeof(u64) * TG3_NUM_TEST);
+
+        if (tg3_test_nvram(tp) != 0) {
+                etest->flags |= ETH_TEST_FL_FAILED;
+                data[0] = 1;
+        }
+        if (tg3_test_link(tp) != 0) {
+                etest->flags |= ETH_TEST_FL_FAILED;
+                data[1] = 1;
+        }
+        if (etest->flags & ETH_TEST_FL_OFFLINE) {
+                if (netif_running(dev))
+                        tg3_netif_stop(tp);
+
+                spin_lock_irq(&tp->lock);
+                spin_lock(&tp->tx_lock);
+
+                tg3_halt(tp, RESET_KIND_SUSPEND, 1);
+                tg3_nvram_lock(tp);
+                tg3_halt_cpu(tp, RX_CPU_BASE);
+                if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
+                        tg3_halt_cpu(tp, TX_CPU_BASE);
+                tg3_nvram_unlock(tp);
+
+                if (tg3_test_registers(tp) != 0) {
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                        data[2] = 1;
+                }
+                if (tg3_test_memory(tp) != 0) {
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                        data[3] = 1;
+                }
+                if (tg3_test_loopback(tp) != 0) {
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                        data[4] = 1;
+                }
+
+                spin_unlock(&tp->tx_lock);
+                spin_unlock_irq(&tp->lock);
+                if (tg3_test_interrupt(tp) != 0) {
+                        etest->flags |= ETH_TEST_FL_FAILED;
+                        data[5] = 1;
+                }
+                spin_lock_irq(&tp->lock);
+                spin_lock(&tp->tx_lock);
+
+                tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
+                if (netif_running(dev)) {
+                        tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
+                        tg3_init_hw(tp);
+                        tg3_netif_start(tp);
+                }
+                spin_unlock(&tp->tx_lock);
+                spin_unlock_irq(&tp->lock);
+        }
+}
+
 static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
         struct mii_ioctl_data *data = if_mii(ifr);
@@ -7331,6 +7870,8 @@ static struct ethtool_ops tg3_ethtool_ops = {
         .get_tso                = ethtool_op_get_tso,
         .set_tso                = tg3_set_tso,
 #endif
+        .self_test_count        = tg3_get_test_count,
+        .self_test              = tg3_self_test,
         .get_strings            = tg3_get_strings,
         .get_stats_count        = tg3_get_stats_count,
         .get_ethtool_stats      = tg3_get_ethtool_stats,
@@ -9478,7 +10019,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
             (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
                 pci_save_state(tp->pdev);
                 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
-                tg3_halt(tp, 1);
+                tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
         }
 
         err = tg3_test_dma(tp);
@@ -9605,7 +10146,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
 
         spin_lock_irq(&tp->lock);
         spin_lock(&tp->tx_lock);
-        tg3_halt(tp, 1);
+        tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
         spin_unlock(&tp->tx_lock);
         spin_unlock_irq(&tp->lock);
 
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c
index a7ffa64502dd..9680a308c62b 100644
--- a/drivers/net/tlan.c
+++ b/drivers/net/tlan.c
@@ -193,6 +193,12 @@ static  int aui[MAX_TLAN_BOARDS];
 static  int duplex[MAX_TLAN_BOARDS];
 static  int speed[MAX_TLAN_BOARDS];
 static  int boards_found;
+module_param_array(aui, int, NULL, 0);
+module_param_array(duplex, int, NULL, 0);
+module_param_array(speed, int, NULL, 0);
+MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
+MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
+MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
 
 MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
 MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
@@ -204,8 +210,13 @@ MODULE_LICENSE("GPL");
 
 /* Turn on debugging. See Documentation/networking/tlan.txt for details */
 static  int             debug;
+module_param(debug, int, 0);
+MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
 
 static  int             bbuf;
+module_param(bbuf, int, 0);
+MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
+
 static  u8              *TLanPadBuffer;
 static  dma_addr_t      TLanPadBufferDMA;
 static  char            TLanSignature[] = "TLAN";
@@ -2381,6 +2392,7 @@ TLan_FinishReset( struct net_device *dev )
                 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
                 return;
         }
+        TLan_SetMulticastList(dev);
 
 } /* TLan_FinishReset */
 
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index 463c789cdc77..fb10a2db63ad 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -754,7 +754,7 @@ typedef struct {
   u8 zero;
   u8 ssidLen;
   u8 ssid[32];
-  u16 rssi;
+  u16 dBm;
 #define CAP_ESS (1<<0)
 #define CAP_IBSS (1<<1)
 #define CAP_PRIVACY (1<<4)
@@ -1125,6 +1125,9 @@ static int micsetup(struct airo_info *ai);
 static int encapsulate(struct airo_info *ai, etherHead *pPacket, MICBuffer *buffer, int len);
 static int decapsulate(struct airo_info *ai, MICBuffer *mic, etherHead *pPacket, u16 payLen);
 
+static u8 airo_rssi_to_dbm (tdsRssiEntry *rssi_rid, u8 rssi);
+static u8 airo_dbm_to_pct (tdsRssiEntry *rssi_rid, u8 dbm);
+
 #include <linux/crypto.h>
 #endif
 
@@ -1713,6 +1716,7 @@ static int readBSSListRid(struct airo_info *ai, int first,
         list->fh.dwell = le16_to_cpu(list->fh.dwell);
         list->dsChannel = le16_to_cpu(list->dsChannel);
         list->atimWindow = le16_to_cpu(list->atimWindow);
+        list->dBm = le16_to_cpu(list->dBm);
         return rc;
 }
 
@@ -3245,7 +3249,10 @@ badrx:
                                         wstats.level = 0x100 - apriv->rssi[hdr.rssi[1]].rssidBm;
                                 else
                                         wstats.level = (hdr.rssi[1] + 321) / 2;
-                                wstats.updated = 3;     
+                                wstats.noise = apriv->wstats.qual.noise;
+                                wstats.updated = IW_QUAL_LEVEL_UPDATED
+                                        | IW_QUAL_QUAL_UPDATED
+                                        | IW_QUAL_NOISE_UPDATED;
                                 /* Update spy records */
                                 wireless_spy_update(dev, sa, &wstats);
                         }
@@ -3588,7 +3595,10 @@ void mpi_receive_802_11 (struct airo_info *ai)
                         wstats.level = 0x100 - ai->rssi[hdr.rssi[1]].rssidBm;
                 else
                         wstats.level = (hdr.rssi[1] + 321) / 2;
-                wstats.updated = 3;
+                wstats.noise = ai->wstats.qual.noise;
+                wstats.updated = IW_QUAL_QUAL_UPDATED
+                        | IW_QUAL_LEVEL_UPDATED
+                        | IW_QUAL_NOISE_UPDATED;
                 /* Update spy records */
                 wireless_spy_update(ai->dev, sa, &wstats);
         }
@@ -3679,7 +3689,7 @@ static u16 setup_card(struct airo_info *ai, u8 *mac, int lock)
                 status = PC4500_readrid(ai,RID_RSSI,&rssi_rid,sizeof(rssi_rid),lock);
                 if ( status == SUCCESS ) {
                         if (ai->rssi || (ai->rssi = kmalloc(512, GFP_KERNEL)) != NULL)
-                                memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512);
+                                memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512); /* Skip RID length member */
                 }
                 else {
                         if (ai->rssi) {
@@ -5348,7 +5358,7 @@ static int proc_BSSList_open( struct inode *inode, struct file *file ) {
                                 (int)BSSList_rid.bssid[5],
                                 (int)BSSList_rid.ssidLen,
                                 BSSList_rid.ssid,
-                                (int)BSSList_rid.rssi);
+                                (int)BSSList_rid.dBm);
                 ptr += sprintf(ptr, " channel = %d %s %s %s %s\n",
                                 (int)BSSList_rid.dsChannel,
                                 BSSList_rid.cap & CAP_ESS ? "ESS" : "",
@@ -5593,6 +5603,29 @@ static void __exit airo_cleanup_module( void )
  * would not work at all... - Jean II
  */
 
+static u8 airo_rssi_to_dbm (tdsRssiEntry *rssi_rid, u8 rssi)
+{
+        if( !rssi_rid )
+                return 0;
+
+        return (0x100 - rssi_rid[rssi].rssidBm);
+}
+
+static u8 airo_dbm_to_pct (tdsRssiEntry *rssi_rid, u8 dbm)
+{
+        int i;
+
+        if( !rssi_rid )
+                return 0;
+
+        for( i = 0; i < 256; i++ )
+                if (rssi_rid[i].rssidBm == dbm)
+                        return rssi_rid[i].rssipct;
+
+        return 0;
+}
+
+
 static int airo_get_quality (StatusRid *status_rid, CapabilityRid *cap_rid)
 {
         int quality = 0;
@@ -6443,11 +6476,29 @@ static int airo_get_range(struct net_device *dev,
         }
         range->num_frequency = k;
 
+        range->sensitivity = 65535;
+
         /* Hum... Should put the right values there */
-        range->max_qual.qual = airo_get_max_quality(&cap_rid);
-        range->max_qual.level = 0x100 - 120;    /* -120 dBm */
+        if (local->rssi)
+                range->max_qual.qual = 100;     /* % */
+        else
+                range->max_qual.qual = airo_get_max_quality(&cap_rid);
+        range->max_qual.level = 0;      /* 0 means we use dBm  */
         range->max_qual.noise = 0;
-        range->sensitivity = 65535;
+        range->max_qual.updated = 0;
+
+        /* Experimental measurements - boundary 11/5.5 Mb/s */
+        /* Note : with or without the (local->rssi), results
+         * are somewhat different. - Jean II */
+        if (local->rssi) {
+                range->avg_qual.qual = 50;      /* % */
+                range->avg_qual.level = 186;    /* -70 dBm */
+        } else {
+                range->avg_qual.qual = airo_get_avg_quality(&cap_rid);
+                range->avg_qual.level = 176;    /* -80 dBm */
+        }
+        range->avg_qual.noise = 0;
+        range->avg_qual.updated = 0;
 
         for(i = 0 ; i < 8 ; i++) {
                 range->bitrate[i] = cap_rid.supportedRates[i] * 500000;
@@ -6508,15 +6559,6 @@ static int airo_get_range(struct net_device *dev,
         range->max_retry = 65535;
         range->min_r_time = 1024;
         range->max_r_time = 65535 * 1024;
-        /* Experimental measurements - boundary 11/5.5 Mb/s */
-        /* Note : with or without the (local->rssi), results
-         * are somewhat different. - Jean II */
-        range->avg_qual.qual = airo_get_avg_quality(&cap_rid);
-        if (local->rssi)
-                range->avg_qual.level = 186;    /* -70 dBm */
-        else
-                range->avg_qual.level = 176;    /* -80 dBm */
-        range->avg_qual.noise = 0;
 
         /* Event capability (kernel + driver) */
         range->event_capa[0] = (IW_EVENT_CAPA_K_0 |
@@ -6676,12 +6718,18 @@ static int airo_get_aplist(struct net_device *dev,
                 loseSync = 0;
                 memcpy(address[i].sa_data, BSSList.bssid, ETH_ALEN);
                 address[i].sa_family = ARPHRD_ETHER;
-                if (local->rssi)
-                        qual[i].level = 0x100 - local->rssi[BSSList.rssi].rssidBm;
-                else
-                        qual[i].level = (BSSList.rssi + 321) / 2;
-                qual[i].qual = qual[i].noise = 0;
-                qual[i].updated = 2;
+                if (local->rssi) {
+                        qual[i].level = 0x100 - BSSList.dBm;
+                        qual[i].qual = airo_dbm_to_pct( local->rssi, BSSList.dBm );
+                        qual[i].updated = IW_QUAL_QUAL_UPDATED;
+                } else {
+                        qual[i].level = (BSSList.dBm + 321) / 2;
+                        qual[i].qual = 0;
+                        qual[i].updated = IW_QUAL_QUAL_INVALID;
+                }
+                qual[i].noise = local->wstats.qual.noise;
+                qual[i].updated = IW_QUAL_LEVEL_UPDATED
+                                | IW_QUAL_NOISE_UPDATED;
                 if (BSSList.index == 0xffff)
                         break;
         }
@@ -6760,7 +6808,7 @@ static int airo_set_scan(struct net_device *dev,
 static inline char *airo_translate_scan(struct net_device *dev,
                                         char *current_ev,
                                         char *end_buf,
-                                        BSSListRid *list)
+                                        BSSListRid *bss)
 {
         struct airo_info *ai = dev->priv;
         struct iw_event         iwe;            /* Temporary buffer */
@@ -6771,22 +6819,22 @@ static inline char *airo_translate_scan(struct net_device *dev,
         /* First entry *MUST* be the AP MAC address */
         iwe.cmd = SIOCGIWAP;
         iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
-        memcpy(iwe.u.ap_addr.sa_data, list->bssid, ETH_ALEN);
+        memcpy(iwe.u.ap_addr.sa_data, bss->bssid, ETH_ALEN);
         current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_ADDR_LEN);
 
         /* Other entries will be displayed in the order we give them */
 
         /* Add the ESSID */
-        iwe.u.data.length = list->ssidLen;
+        iwe.u.data.length = bss->ssidLen;
         if(iwe.u.data.length > 32)
                 iwe.u.data.length = 32;
         iwe.cmd = SIOCGIWESSID;
         iwe.u.data.flags = 1;
-        current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, list->ssid);
+        current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, bss->ssid);
 
         /* Add mode */
         iwe.cmd = SIOCGIWMODE;
-        capabilities = le16_to_cpu(list->cap);
+        capabilities = le16_to_cpu(bss->cap);
         if(capabilities & (CAP_ESS | CAP_IBSS)) {
                 if(capabilities & CAP_ESS)
                         iwe.u.mode = IW_MODE_MASTER;
@@ -6797,19 +6845,25 @@ static inline char *airo_translate_scan(struct net_device *dev,
 
         /* Add frequency */
         iwe.cmd = SIOCGIWFREQ;
-        iwe.u.freq.m = le16_to_cpu(list->dsChannel);
+        iwe.u.freq.m = le16_to_cpu(bss->dsChannel);
         iwe.u.freq.m = frequency_list[iwe.u.freq.m] * 100000;
         iwe.u.freq.e = 1;
         current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_FREQ_LEN);
 
         /* Add quality statistics */
         iwe.cmd = IWEVQUAL;
-        if (ai->rssi)
-                iwe.u.qual.level = 0x100 - ai->rssi[list->rssi].rssidBm;
-        else
-                iwe.u.qual.level = (list->rssi + 321) / 2;
-        iwe.u.qual.noise = 0;
-        iwe.u.qual.qual = 0;
+        if (ai->rssi) {
+                iwe.u.qual.level = 0x100 - bss->dBm;
+                iwe.u.qual.qual = airo_dbm_to_pct( ai->rssi, bss->dBm );
+                iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED;
+        } else {
+                iwe.u.qual.level = (bss->dBm + 321) / 2;
+                iwe.u.qual.qual = 0;
+                iwe.u.qual.updated = IW_QUAL_QUAL_INVALID;
+        }
+        iwe.u.qual.noise = ai->wstats.qual.noise;
+        iwe.u.qual.updated = IW_QUAL_LEVEL_UPDATED
+                        | IW_QUAL_NOISE_UPDATED;
         current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_QUAL_LEN);
 
         /* Add encryption capability */
@@ -6819,7 +6873,7 @@ static inline char *airo_translate_scan(struct net_device *dev,
         else
                 iwe.u.data.flags = IW_ENCODE_DISABLED;
         iwe.u.data.length = 0;
-        current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, list->ssid);
+        current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, bss->ssid);
 
         /* Rate : stuffing multiple values in a single event require a bit
          * more of magic - Jean II */
@@ -6831,10 +6885,10 @@ static inline char *airo_translate_scan(struct net_device *dev,
         /* Max 8 values */
         for(i = 0 ; i < 8 ; i++) {
                 /* NULL terminated */
-                if(list->rates[i] == 0)
+                if(bss->rates[i] == 0)
                         break;
                 /* Bit rate given in 500 kb/s units (+ 0x80) */
-                iwe.u.bitrate.value = ((list->rates[i] & 0x7f) * 500000);
+                iwe.u.bitrate.value = ((bss->rates[i] & 0x7f) * 500000);
                 /* Add new value to event */
                 current_val = iwe_stream_add_value(current_ev, current_val, end_buf, &iwe, IW_EV_PARAM_LEN);
         }
@@ -7153,18 +7207,22 @@ static void airo_read_wireless_stats(struct airo_info *local)
         /* The status */
         local->wstats.status = status_rid.mode;
 
-        /* Signal quality and co. But where is the noise level ??? */
-        local->wstats.qual.qual = airo_get_quality(&status_rid, &cap_rid);
-        if (local->rssi)
-                local->wstats.qual.level = 0x100 - local->rssi[status_rid.sigQuality].rssidBm;
-        else
+        /* Signal quality and co */
+        if (local->rssi) {
+                local->wstats.qual.level = airo_rssi_to_dbm( local->rssi, status_rid.sigQuality );
+                /* normalizedSignalStrength appears to be a percentage */
+                local->wstats.qual.qual = status_rid.normalizedSignalStrength;
+        } else {
                 local->wstats.qual.level = (status_rid.normalizedSignalStrength + 321) / 2;
+                local->wstats.qual.qual = airo_get_quality(&status_rid, &cap_rid);
+        }
+        local->wstats.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED;
         if (status_rid.len >= 124) {
-                local->wstats.qual.noise = 256 - status_rid.noisedBm;
-                local->wstats.qual.updated = 7;
+                local->wstats.qual.noise = 0x100 - status_rid.noisedBm;
+                local->wstats.qual.updated |= IW_QUAL_NOISE_UPDATED;
         } else {
                 local->wstats.qual.noise = 0;
-                local->wstats.qual.updated = 3;
+                local->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
         }
 
         /* Packets discarded in the wireless adapter due to wireless
diff --git a/drivers/net/wireless/atmel_cs.c b/drivers/net/wireless/atmel_cs.c
index a91b507e0a7a..a4ed28d9c783 100644
--- a/drivers/net/wireless/atmel_cs.c
+++ b/drivers/net/wireless/atmel_cs.c
@@ -321,6 +321,7 @@ static struct {
         { 0x01bf, 0x3302, NULL, ATMEL_FW_TYPE_502E, "Belkin F5D6020-V2" }, 
         { 0, 0, "BT/Voyager 1020 Laptop Adapter", ATMEL_FW_TYPE_502, "BT Voyager 1020" },
         { 0, 0, "IEEE 802.11b/Wireless LAN PC Card", ATMEL_FW_TYPE_502, "Siemens Gigaset PC Card II" },
+        { 0, 0, "IEEE 802.11b/Wireless LAN Card S", ATMEL_FW_TYPE_504_2958, "Siemens Gigaset PC Card II" },
         { 0, 0, "CNet/CNWLC 11Mbps Wireless PC Card V-5", ATMEL_FW_TYPE_502E, "CNet CNWLC-811ARL" },
         { 0, 0, "Wireless/PC_CARD", ATMEL_FW_TYPE_502D, "Planet WL-3552" },
         { 0, 0, "OEM/11Mbps Wireless LAN PC Card V-3", ATMEL_FW_TYPE_502, "OEM 11Mbps WLAN PCMCIA Card" },
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 026aa04669a2..637e9493034b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -18,6 +18,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/acpi.h>
 #include "pci.h"
 
 /* Deal with broken BIOS'es that neglect to enable passive release,
@@ -467,9 +468,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC,
  * non-x86 architectures (yes Via exists on PPC among other places),
  * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get
  * interrupts delivered properly.
- *
- * TODO: When we have device-specific interrupt routers,
- * quirk_via_irqpic will go away from quirks.
  */
 
 /*
@@ -494,6 +492,29 @@ static void __devinit quirk_via_acpi(struct pci_dev *d)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA,     PCI_DEVICE_ID_VIA_82C586_3,     quirk_via_acpi );
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA,     PCI_DEVICE_ID_VIA_82C686_4,     quirk_via_acpi );
 
+static void quirk_via_irqpic(struct pci_dev *dev)
+{
+        u8 irq, new_irq;
+
+#ifdef CONFIG_X86_IO_APIC
+        if (nr_ioapics && !skip_ioapic_setup)
+                return;
+#endif
+#ifdef CONFIG_ACPI
+        if (acpi_irq_model != ACPI_IRQ_MODEL_PIC)
+                return;
+#endif
+        new_irq = dev->irq & 0xf;
+        pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
+        if (new_irq != irq) {
+                printk(KERN_INFO "PCI: Via PIC IRQ fixup for %s, from %d to %d\n",
+                        pci_name(dev), irq, new_irq);
+                udelay(15);     /* unknown if delay really needed */
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq);
+        }
+}
+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irqpic);
+
 /*
  * PIIX3 USB: We have to disable USB interrupts that are
  * hardwired to PIRQD# and may be shared with an
@@ -683,19 +704,6 @@ static void __init quirk_disable_pxb(struct pci_dev *pdev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_82454NX,    quirk_disable_pxb );
 
-/*
- *      VIA northbridges care about PCI_INTERRUPT_LINE
- */
-int via_interrupt_line_quirk;
-
-static void __devinit quirk_via_bridge(struct pci_dev *pdev)
-{
-        if(pdev->devfn == 0) {
-                printk(KERN_INFO "PCI: Via IRQ fixup\n");
-                via_interrupt_line_quirk = 1;
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA,     PCI_ANY_ID,                     quirk_via_bridge );
 
 /*
  *      Serverworks CSB5 IDE does not fully support native mode
diff --git a/drivers/s390/net/Makefile b/drivers/s390/net/Makefile
index 7cabb80a2e41..90d4d0ef3dd4 100644
--- a/drivers/s390/net/Makefile
+++ b/drivers/s390/net/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_NETIUCV) += netiucv.o fsm.o
 obj-$(CONFIG_SMSGIUCV) += smsgiucv.o
 obj-$(CONFIG_CTC) += ctc.o fsm.o cu3088.o
 obj-$(CONFIG_LCS) += lcs.o cu3088.o
-qeth-y := qeth_main.o qeth_mpc.o qeth_sys.o qeth_eddp.o qeth_tso.o
+obj-$(CONFIG_CLAW) += claw.o cu3088.o
+qeth-y := qeth_main.o qeth_mpc.o qeth_sys.o qeth_eddp.o 
 qeth-$(CONFIG_PROC_FS) += qeth_proc.o
 obj-$(CONFIG_QETH) += qeth.o
diff --git a/drivers/s390/net/ctcdbug.h b/drivers/s390/net/ctcdbug.h
index ef8883951720..7fe2ebd1792d 100644
--- a/drivers/s390/net/ctcdbug.h
+++ b/drivers/s390/net/ctcdbug.h
@@ -1,6 +1,6 @@
 /*
  *
- * linux/drivers/s390/net/ctcdbug.h ($Revision: 1.4 $)
+ * linux/drivers/s390/net/ctcdbug.h ($Revision: 1.5 $)
  *
  * CTC / ESCON network driver - s390 dbf exploit.
  *
@@ -9,7 +9,7 @@
  *    Author(s): Original Code written by
  *                        Peter Tiedemann (ptiedem@de.ibm.com)
  *
- *    $Revision: 1.4 $   $Date: 2004/10/15 09:26:58 $
+ *    $Revision: 1.5 $   $Date: 2005/02/27 19:46:44 $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -25,9 +25,11 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-
+#ifndef _CTCDBUG_H_
+#define _CTCDBUG_H_
 
 #include <asm/debug.h>
+#include "ctcmain.h"
 /**
  * Debug Facility stuff
  */
@@ -41,7 +43,7 @@
 #define CTC_DBF_DATA_LEN 128
 #define CTC_DBF_DATA_INDEX 3
 #define CTC_DBF_DATA_NR_AREAS 1
-#define CTC_DBF_DATA_LEVEL 2
+#define CTC_DBF_DATA_LEVEL 3
 
 #define CTC_DBF_TRACE_NAME "ctc_trace"
 #define CTC_DBF_TRACE_LEN 16
@@ -121,3 +123,5 @@ hex_dump(unsigned char *buf, size_t len)
         printk("\n");
 }
 
+
+#endif
diff --git a/drivers/s390/net/ctcmain.c b/drivers/s390/net/ctcmain.c
index 7266bf5ea659..ff3e95e07e89 100644
--- a/drivers/s390/net/ctcmain.c
+++ b/drivers/s390/net/ctcmain.c
@@ -1,5 +1,5 @@
 /*
- * $Id: ctcmain.c,v 1.72 2005/03/17 10:51:52 ptiedem Exp $
+ * $Id: ctcmain.c,v 1.74 2005/03/24 09:04:17 mschwide Exp $
  *
  * CTC / ESCON network driver
  *
@@ -37,12 +37,11 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
- * RELEASE-TAG: CTC/ESCON network driver $Revision: 1.72 $
+ * RELEASE-TAG: CTC/ESCON network driver $Revision: 1.74 $
  *
  */
 
 #undef DEBUG
-
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -74,288 +73,13 @@
 #include "ctctty.h"
 #include "fsm.h"
 #include "cu3088.h"
+
 #include "ctcdbug.h"
+#include "ctcmain.h"
 
 MODULE_AUTHOR("(C) 2000 IBM Corp. by Fritz Elfert (felfert@millenux.com)");
 MODULE_DESCRIPTION("Linux for S/390 CTC/Escon Driver");
 MODULE_LICENSE("GPL");
-
-/**
- * CCW commands, used in this driver.
- */
-#define CCW_CMD_WRITE           0x01
-#define CCW_CMD_READ            0x02
-#define CCW_CMD_SET_EXTENDED    0xc3
-#define CCW_CMD_PREPARE         0xe3
-
-#define CTC_PROTO_S390          0
-#define CTC_PROTO_LINUX         1
-#define CTC_PROTO_LINUX_TTY     2
-#define CTC_PROTO_OS390         3
-#define CTC_PROTO_MAX           3
-
-#define CTC_BUFSIZE_LIMIT       65535
-#define CTC_BUFSIZE_DEFAULT     32768
-
-#define CTC_TIMEOUT_5SEC        5000
-
-#define CTC_INITIAL_BLOCKLEN    2
-
-#define READ                    0
-#define WRITE                   1
-
-#define CTC_ID_SIZE             BUS_ID_SIZE+3
-
-
-struct ctc_profile {
-        unsigned long maxmulti;
-        unsigned long maxcqueue;
-        unsigned long doios_single;
-        unsigned long doios_multi;
-        unsigned long txlen;
-        unsigned long tx_time;
-        struct timespec send_stamp;
-};
-
-/**
- * Definition of one channel
- */
-struct channel {
-
-        /**
-         * Pointer to next channel in list.
-         */
-        struct channel *next;
-        char id[CTC_ID_SIZE];
-        struct ccw_device *cdev;
-
-        /**
-         * Type of this channel.
-         * CTC/A or Escon for valid channels.
-         */
-        enum channel_types type;
-
-        /**
-         * Misc. flags. See CHANNEL_FLAGS_... below
-         */
-        __u32 flags;
-
-        /**
-         * The protocol of this channel
-         */
-        __u16 protocol;
-
-        /**
-         * I/O and irq related stuff
-         */
-        struct ccw1 *ccw;
-        struct irb *irb;
-
-        /**
-         * RX/TX buffer size
-         */
-        int max_bufsize;
-
-        /**
-         * Transmit/Receive buffer.
-         */
-        struct sk_buff *trans_skb;
-
-        /**
-         * Universal I/O queue.
-         */
-        struct sk_buff_head io_queue;
-
-        /**
-         * TX queue for collecting skb's during busy.
-         */
-        struct sk_buff_head collect_queue;
-
-        /**
-         * Amount of data in collect_queue.
-         */
-        int collect_len;
-
-        /**
-         * spinlock for collect_queue and collect_len
-         */
-        spinlock_t collect_lock;
-
-        /**
-         * Timer for detecting unresposive
-         * I/O operations.
-         */
-        fsm_timer timer;
-
-        /**
-         * Retry counter for misc. operations.
-         */
-        int retry;
-
-        /**
-         * The finite state machine of this channel
-         */
-        fsm_instance *fsm;
-
-        /**
-         * The corresponding net_device this channel
-         * belongs to.
-         */
-        struct net_device *netdev;
-
-        struct ctc_profile prof;
-
-        unsigned char *trans_skb_data;
-
-        __u16 logflags;
-};
-
-#define CHANNEL_FLAGS_READ            0
-#define CHANNEL_FLAGS_WRITE           1
-#define CHANNEL_FLAGS_INUSE           2
-#define CHANNEL_FLAGS_BUFSIZE_CHANGED 4
-#define CHANNEL_FLAGS_FAILED          8
-#define CHANNEL_FLAGS_WAITIRQ        16
-#define CHANNEL_FLAGS_RWMASK 1
-#define CHANNEL_DIRECTION(f) (f & CHANNEL_FLAGS_RWMASK)
-
-#define LOG_FLAG_ILLEGALPKT  1
-#define LOG_FLAG_ILLEGALSIZE 2
-#define LOG_FLAG_OVERRUN     4
-#define LOG_FLAG_NOMEM       8
-
-#define CTC_LOGLEVEL_INFO     1
-#define CTC_LOGLEVEL_NOTICE   2
-#define CTC_LOGLEVEL_WARN     4
-#define CTC_LOGLEVEL_EMERG    8
-#define CTC_LOGLEVEL_ERR     16
-#define CTC_LOGLEVEL_DEBUG   32
-#define CTC_LOGLEVEL_CRIT    64
-
-#define CTC_LOGLEVEL_DEFAULT \
-(CTC_LOGLEVEL_INFO | CTC_LOGLEVEL_NOTICE | CTC_LOGLEVEL_WARN | CTC_LOGLEVEL_CRIT)
-
-#define CTC_LOGLEVEL_MAX     ((CTC_LOGLEVEL_CRIT<<1)-1)
-
-static int loglevel = CTC_LOGLEVEL_DEFAULT;
-
-#define ctc_pr_debug(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_DEBUG) printk(KERN_DEBUG fmt,##arg); } while (0)
-
-#define ctc_pr_info(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_INFO) printk(KERN_INFO fmt,##arg); } while (0)
-
-#define ctc_pr_notice(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_NOTICE) printk(KERN_NOTICE fmt,##arg); } while (0)
-
-#define ctc_pr_warn(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_WARN) printk(KERN_WARNING fmt,##arg); } while (0)
-
-#define ctc_pr_emerg(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_EMERG) printk(KERN_EMERG fmt,##arg); } while (0)
-
-#define ctc_pr_err(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_ERR) printk(KERN_ERR fmt,##arg); } while (0)
-
-#define ctc_pr_crit(fmt, arg...) \
-do { if (loglevel & CTC_LOGLEVEL_CRIT) printk(KERN_CRIT fmt,##arg); } while (0)
-
-/**
- * Linked list of all detected channels.
- */
-static struct channel *channels = NULL;
-
-struct ctc_priv {
-        struct net_device_stats stats;
-        unsigned long tbusy;
-        /**
-         * The finite state machine of this interface.
-         */
-        fsm_instance *fsm;
-        /**
-         * The protocol of this device
-         */
-        __u16 protocol;
-        /**
-         * Timer for restarting after I/O Errors
-         */
-        fsm_timer               restart_timer;
-
-        int buffer_size;
-
-        struct channel *channel[2];
-};
-
-/**
- * Definition of our link level header.
- */
-struct ll_header {
-        __u16 length;
-        __u16 type;
-        __u16 unused;
-};
-#define LL_HEADER_LENGTH (sizeof(struct ll_header))
-
-/**
- * Compatibility macros for busy handling
- * of network devices.
- */
-static __inline__ void
-ctc_clear_busy(struct net_device * dev)
-{
-        clear_bit(0, &(((struct ctc_priv *) dev->priv)->tbusy));
-        if (((struct ctc_priv *)dev->priv)->protocol != CTC_PROTO_LINUX_TTY)
-                netif_wake_queue(dev);
-}
-
-static __inline__ int
-ctc_test_and_set_busy(struct net_device * dev)
-{
-        if (((struct ctc_priv *)dev->priv)->protocol != CTC_PROTO_LINUX_TTY)
-                netif_stop_queue(dev);
-        return test_and_set_bit(0, &((struct ctc_priv *) dev->priv)->tbusy);
-}
-
-/**
- * Print Banner.
- */
-static void
-print_banner(void)
-{
-        static int printed = 0;
-        char vbuf[] = "$Revision: 1.72 $";
-        char *version = vbuf;
-
-        if (printed)
-                return;
-        if ((version = strchr(version, ':'))) {
-                char *p = strchr(version + 1, '$');
-                if (p)
-                        *p = '\0';
-        } else
-                version = " ??? ";
-        printk(KERN_INFO "CTC driver Version%s"
-#ifdef DEBUG
-                    " (DEBUG-VERSION, " __DATE__ __TIME__ ")"
-#endif
-                    " initialized\n", version);
-        printed = 1;
-}
-
-/**
- * Return type of a detected device.
- */
-static enum channel_types
-get_channel_type(struct ccw_device_id *id)
-{
-        enum channel_types type = (enum channel_types) id->driver_info;
-
-        if (type == channel_type_ficon)
-                type = channel_type_escon;
-
-        return type;
-}
-
 /**
  * States of the interface statemachine.
  */
@@ -371,7 +95,7 @@ enum dev_states {
         /**
          * MUST be always the last element!!
          */
-        NR_DEV_STATES
+        CTC_NR_DEV_STATES
 };
 
 static const char *dev_state_names[] = {
@@ -399,7 +123,7 @@ enum dev_events {
         /**
          * MUST be always the last element!!
          */
-        NR_DEV_EVENTS
+        CTC_NR_DEV_EVENTS
 };
 
 static const char *dev_event_names[] = {
@@ -476,40 +200,6 @@ enum ch_events {
         NR_CH_EVENTS,
 };
 
-static const char *ch_event_names[] = {
-        "ccw_device success",
-        "ccw_device busy",
-        "ccw_device enodev",
-        "ccw_device ioerr",
-        "ccw_device unknown",
-
-        "Status ATTN & BUSY",
-        "Status ATTN",
-        "Status BUSY",
-
-        "Unit check remote reset",
-        "Unit check remote system reset",
-        "Unit check TX timeout",
-        "Unit check TX parity",
-        "Unit check Hardware failure",
-        "Unit check RX parity",
-        "Unit check ZERO",
-        "Unit check Unknown",
-
-        "SubChannel check Unknown",
-
-        "Machine check failure",
-        "Machine check operational",
-
-        "IRQ normal",
-        "IRQ final",
-
-        "Timer",
-
-        "Start",
-        "Stop",
-};
-
 /**
  * States of the channel statemachine.
  */
@@ -545,6 +235,87 @@ enum ch_states {
         NR_CH_STATES,
 };
 
+static int loglevel = CTC_LOGLEVEL_DEFAULT;
+
+/**
+ * Linked list of all detected channels.
+ */
+static struct channel *channels = NULL;
+
+/**
+ * Print Banner.
+ */
+static void
+print_banner(void)
+{
+        static int printed = 0;
+        char vbuf[] = "$Revision: 1.74 $";
+        char *version = vbuf;
+
+        if (printed)
+                return;
+        if ((version = strchr(version, ':'))) {
+                char *p = strchr(version + 1, '$');
+                if (p)
+                        *p = '\0';
+        } else
+                version = " ??? ";
+        printk(KERN_INFO "CTC driver Version%s"
+#ifdef DEBUG
+                    " (DEBUG-VERSION, " __DATE__ __TIME__ ")"
+#endif
+                    " initialized\n", version);
+        printed = 1;
+}
+
+/**
+ * Return type of a detected device.
+ */
+static enum channel_types
+get_channel_type(struct ccw_device_id *id)
+{
+        enum channel_types type = (enum channel_types) id->driver_info;
+
+        if (type == channel_type_ficon)
+                type = channel_type_escon;
+
+        return type;
+}
+
+static const char *ch_event_names[] = {
+        "ccw_device success",
+        "ccw_device busy",
+        "ccw_device enodev",
+        "ccw_device ioerr",
+        "ccw_device unknown",
+
+        "Status ATTN & BUSY",
+        "Status ATTN",
+        "Status BUSY",
+
+        "Unit check remote reset",
+        "Unit check remote system reset",
+        "Unit check TX timeout",
+        "Unit check TX parity",
+        "Unit check Hardware failure",
+        "Unit check RX parity",
+        "Unit check ZERO",
+        "Unit check Unknown",
+
+        "SubChannel check Unknown",
+
+        "Machine check failure",
+        "Machine check operational",
+
+        "IRQ normal",
+        "IRQ final",
+
+        "Timer",
+
+        "Start",
+        "Stop",
+};
+
 static const char *ch_state_names[] = {
         "Idle",
         "Stopped",
@@ -1934,7 +1705,6 @@ add_channel(struct ccw_device *cdev, enum channel_types type)
         ch->cdev = cdev;
         snprintf(ch->id, CTC_ID_SIZE, "ch-%s", cdev->dev.bus_id);
         ch->type = type;
-        loglevel = CTC_LOGLEVEL_DEFAULT;
         ch->fsm = init_fsm(ch->id, ch_state_names,
                            ch_event_names, NR_CH_STATES, NR_CH_EVENTS,
                            ch_fsm, CH_FSM_LEN, GFP_KERNEL);
@@ -2697,6 +2467,7 @@ ctc_stats(struct net_device * dev)
 /*
  * sysfs attributes
  */
+
 static ssize_t
 buffer_show(struct device *dev, char *buf)
 {
@@ -2715,57 +2486,61 @@ buffer_write(struct device *dev, const char *buf, size_t count)
         struct ctc_priv *priv;
         struct net_device *ndev;
         int bs1;
+        char buffer[16];
 
         DBF_TEXT(trace, 3, __FUNCTION__);
+        DBF_TEXT(trace, 3, buf);
         priv = dev->driver_data;
-        if (!priv)
+        if (!priv) {
+                DBF_TEXT(trace, 3, "bfnopriv");
                 return -ENODEV;
+        }
+
+        sscanf(buf, "%u", &bs1);
+        if (bs1 > CTC_BUFSIZE_LIMIT)
+                goto einval;
+        if (bs1 < (576 + LL_HEADER_LENGTH + 2))
+                goto einval;
+        priv->buffer_size = bs1;        // just to overwrite the default
+
         ndev = priv->channel[READ]->netdev;
-        if (!ndev)
+        if (!ndev) {
+                DBF_TEXT(trace, 3, "bfnondev");
                 return -ENODEV;
-        sscanf(buf, "%u", &bs1);
+        }
 
-        if (bs1 > CTC_BUFSIZE_LIMIT)
-                return -EINVAL;
         if ((ndev->flags & IFF_RUNNING) &&
             (bs1 < (ndev->mtu + LL_HEADER_LENGTH + 2)))
-                return -EINVAL;
-        if (bs1 < (576 + LL_HEADER_LENGTH + 2))
-                return -EINVAL;
+                goto einval;
 
-        priv->buffer_size = bs1;
-        priv->channel[READ]->max_bufsize =
-            priv->channel[WRITE]->max_bufsize = bs1;
+        priv->channel[READ]->max_bufsize = bs1;
+        priv->channel[WRITE]->max_bufsize = bs1;
         if (!(ndev->flags & IFF_RUNNING))
                 ndev->mtu = bs1 - LL_HEADER_LENGTH - 2;
         priv->channel[READ]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED;
         priv->channel[WRITE]->flags |= CHANNEL_FLAGS_BUFSIZE_CHANGED;
 
+        sprintf(buffer, "%d",priv->buffer_size);
+        DBF_TEXT(trace, 3, buffer);
         return count;
 
+einval:
+        DBF_TEXT(trace, 3, "buff_err");
+        return -EINVAL;
 }
 
 static ssize_t
 loglevel_show(struct device *dev, char *buf)
 {
-        struct ctc_priv *priv;
-
-        priv = dev->driver_data;
-        if (!priv)
-                return -ENODEV;
         return sprintf(buf, "%d\n", loglevel);
 }
 
 static ssize_t
 loglevel_write(struct device *dev, const char *buf, size_t count)
 {
-        struct ctc_priv *priv;
         int ll1;
 
         DBF_TEXT(trace, 5, __FUNCTION__);
-        priv = dev->driver_data;
-        if (!priv)
-                return -ENODEV;
         sscanf(buf, "%i", &ll1);
 
         if ((ll1 > CTC_LOGLEVEL_MAX) || (ll1 < 0))
@@ -2835,27 +2610,6 @@ stats_write(struct device *dev, const char *buf, size_t count)
         return count;
 }
 
-static DEVICE_ATTR(buffer, 0644, buffer_show, buffer_write);
-static DEVICE_ATTR(loglevel, 0644, loglevel_show, loglevel_write);
-static DEVICE_ATTR(stats, 0644, stats_show, stats_write);
-
-static int
-ctc_add_attributes(struct device *dev)
-{
-//      device_create_file(dev, &dev_attr_buffer);
-        device_create_file(dev, &dev_attr_loglevel);
-        device_create_file(dev, &dev_attr_stats);
-        return 0;
-}
-
-static void
-ctc_remove_attributes(struct device *dev)
-{
-        device_remove_file(dev, &dev_attr_stats);
-        device_remove_file(dev, &dev_attr_loglevel);
-//      device_remove_file(dev, &dev_attr_buffer);
-}
-
 
 static void
 ctc_netdev_unregister(struct net_device * dev)
@@ -2899,52 +2653,6 @@ ctc_free_netdevice(struct net_device * dev, int free_dev)
 #endif
 }
 
-/**
- * Initialize everything of the net device except the name and the
- * channel structs.
- */
-static struct net_device *
-ctc_init_netdevice(struct net_device * dev, int alloc_device, 
-                   struct ctc_priv *privptr)
-{
-        if (!privptr)
-                return NULL;
-
-        DBF_TEXT(setup, 3, __FUNCTION__);
-        if (alloc_device) {
-                dev = kmalloc(sizeof (struct net_device), GFP_KERNEL);
-                if (!dev)
-                        return NULL;
-                memset(dev, 0, sizeof (struct net_device));
-        }
-
-        dev->priv = privptr;
-        privptr->fsm = init_fsm("ctcdev", dev_state_names,
-                                dev_event_names, NR_DEV_STATES, NR_DEV_EVENTS,
-                                dev_fsm, DEV_FSM_LEN, GFP_KERNEL);
-        if (privptr->fsm == NULL) {
-                if (alloc_device)
-                        kfree(dev);
-                return NULL;
-        }
-        fsm_newstate(privptr->fsm, DEV_STATE_STOPPED);
-        fsm_settimer(privptr->fsm, &privptr->restart_timer);
-        if (dev->mtu == 0)
-                dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2;
-        dev->hard_start_xmit = ctc_tx;
-        dev->open = ctc_open;
-        dev->stop = ctc_close;
-        dev->get_stats = ctc_stats;
-        dev->change_mtu = ctc_change_mtu;
-        dev->hard_header_len = LL_HEADER_LENGTH + 2;
-        dev->addr_len = 0;
-        dev->type = ARPHRD_SLIP;
-        dev->tx_queue_len = 100;
-        dev->flags = IFF_POINTOPOINT | IFF_NOARP;
-        SET_MODULE_OWNER(dev);
-        return dev;
-}
-
 static ssize_t
 ctc_proto_show(struct device *dev, char *buf)
 {
@@ -2977,7 +2685,6 @@ ctc_proto_store(struct device *dev, const char *buf, size_t count)
         return count;
 }
 
-static DEVICE_ATTR(protocol, 0644, ctc_proto_show, ctc_proto_store);
 
 static ssize_t
 ctc_type_show(struct device *dev, char *buf)
@@ -2991,8 +2698,13 @@ ctc_type_show(struct device *dev, char *buf)
         return sprintf(buf, "%s\n", cu3088_type[cgdev->cdev[0]->id.driver_info]);
 }
 
+static DEVICE_ATTR(buffer, 0644, buffer_show, buffer_write);
+static DEVICE_ATTR(protocol, 0644, ctc_proto_show, ctc_proto_store);
 static DEVICE_ATTR(type, 0444, ctc_type_show, NULL);
 
+static DEVICE_ATTR(loglevel, 0644, loglevel_show, loglevel_write);
+static DEVICE_ATTR(stats, 0644, stats_show, stats_write);
+
 static struct attribute *ctc_attr[] = {
         &dev_attr_protocol.attr,
         &dev_attr_type.attr,
@@ -3005,6 +2717,21 @@ static struct attribute_group ctc_attr_group = {
 };
 
 static int
+ctc_add_attributes(struct device *dev)
+{
+        device_create_file(dev, &dev_attr_loglevel);
+        device_create_file(dev, &dev_attr_stats);
+        return 0;
+}
+
+static void
+ctc_remove_attributes(struct device *dev)
+{
+        device_remove_file(dev, &dev_attr_stats);
+        device_remove_file(dev, &dev_attr_loglevel);
+}
+
+static int
 ctc_add_files(struct device *dev)
 {
         pr_debug("%s() called\n", __FUNCTION__);
@@ -3028,15 +2755,15 @@ ctc_remove_files(struct device *dev)
  *
  * @returns 0 on success, !0 on failure.
  */
-
 static int
 ctc_probe_device(struct ccwgroup_device *cgdev)
 {
         struct ctc_priv *priv;
         int rc;
+        char buffer[16];
 
         pr_debug("%s() called\n", __FUNCTION__);
-        DBF_TEXT(trace, 3, __FUNCTION__);
+        DBF_TEXT(setup, 3, __FUNCTION__);
 
         if (!get_device(&cgdev->dev))
                 return -ENODEV;
@@ -3060,10 +2787,70 @@ ctc_probe_device(struct ccwgroup_device *cgdev)
         cgdev->cdev[1]->handler = ctc_irq_handler;
         cgdev->dev.driver_data = priv;
 
+        sprintf(buffer, "%p", priv);
+        DBF_TEXT(data, 3, buffer);
+
+        sprintf(buffer, "%u", (unsigned int)sizeof(struct ctc_priv));
+        DBF_TEXT(data, 3, buffer);
+
+        sprintf(buffer, "%p", &channels);
+        DBF_TEXT(data, 3, buffer);
+
+        sprintf(buffer, "%u", (unsigned int)sizeof(struct channel));
+        DBF_TEXT(data, 3, buffer);
+
         return 0;
 }
 
 /**
+ * Initialize everything of the net device except the name and the
+ * channel structs.
+ */
+static struct net_device *
+ctc_init_netdevice(struct net_device * dev, int alloc_device,
+                   struct ctc_priv *privptr)
+{
+        if (!privptr)
+                return NULL;
+
+        DBF_TEXT(setup, 3, __FUNCTION__);
+
+        if (alloc_device) {
+                dev = kmalloc(sizeof (struct net_device), GFP_KERNEL);
+                if (!dev)
+                        return NULL;
+                memset(dev, 0, sizeof (struct net_device));
+        }
+
+        dev->priv = privptr;
+        privptr->fsm = init_fsm("ctcdev", dev_state_names,
+                                dev_event_names, CTC_NR_DEV_STATES, CTC_NR_DEV_EVENTS,
+                                dev_fsm, DEV_FSM_LEN, GFP_KERNEL);
+        if (privptr->fsm == NULL) {
+                if (alloc_device)
+                        kfree(dev);
+                return NULL;
+        }
+        fsm_newstate(privptr->fsm, DEV_STATE_STOPPED);
+        fsm_settimer(privptr->fsm, &privptr->restart_timer);
+        if (dev->mtu == 0)
+                dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2;
+        dev->hard_start_xmit = ctc_tx;
+        dev->open = ctc_open;
+        dev->stop = ctc_close;
+        dev->get_stats = ctc_stats;
+        dev->change_mtu = ctc_change_mtu;
+        dev->hard_header_len = LL_HEADER_LENGTH + 2;
+        dev->addr_len = 0;
+        dev->type = ARPHRD_SLIP;
+        dev->tx_queue_len = 100;
+        dev->flags = IFF_POINTOPOINT | IFF_NOARP;
+        SET_MODULE_OWNER(dev);
+        return dev;
+}
+
+
+/**
  *
  * Setup an interface.
  *
@@ -3081,6 +2868,7 @@ ctc_new_device(struct ccwgroup_device *cgdev)
         struct ctc_priv *privptr;
         struct net_device *dev;
         int ret;
+        char buffer[16];
 
         pr_debug("%s() called\n", __FUNCTION__);
         DBF_TEXT(setup, 3, __FUNCTION__);
@@ -3089,6 +2877,9 @@ ctc_new_device(struct ccwgroup_device *cgdev)
         if (!privptr)
                 return -ENODEV;
 
+        sprintf(buffer, "%d", privptr->buffer_size);
+        DBF_TEXT(setup, 3, buffer);
+
         type = get_channel_type(&cgdev->cdev[0]->id);
         
         snprintf(read_id, CTC_ID_SIZE, "ch-%s", cgdev->cdev[0]->dev.bus_id);
@@ -3177,9 +2968,10 @@ ctc_shutdown_device(struct ccwgroup_device *cgdev)
         struct ctc_priv *priv;
         struct net_device *ndev;
                 
-        DBF_TEXT(trace, 3, __FUNCTION__);
+        DBF_TEXT(setup, 3, __FUNCTION__);
         pr_debug("%s() called\n", __FUNCTION__);
 
+
         priv = cgdev->dev.driver_data;
         ndev = NULL;
         if (!priv)
@@ -3215,7 +3007,6 @@ ctc_shutdown_device(struct ccwgroup_device *cgdev)
                 channel_remove(priv->channel[READ]);
         if (priv->channel[WRITE])
                 channel_remove(priv->channel[WRITE]);
-        
         priv->channel[READ] = priv->channel[WRITE] = NULL;
 
         return 0;
@@ -3228,7 +3019,7 @@ ctc_remove_device(struct ccwgroup_device *cgdev)
         struct ctc_priv *priv;
 
         pr_debug("%s() called\n", __FUNCTION__);
-        DBF_TEXT(trace, 3, __FUNCTION__);
+        DBF_TEXT(setup, 3, __FUNCTION__);
 
         priv = cgdev->dev.driver_data;
         if (!priv)
@@ -3265,6 +3056,7 @@ static struct ccwgroup_driver ctc_group_driver = {
 static void __exit
 ctc_exit(void)
 {
+        DBF_TEXT(setup, 3, __FUNCTION__);
         unregister_cu3088_discipline(&ctc_group_driver);
         ctc_tty_cleanup();
         ctc_unregister_dbf_views();
@@ -3282,6 +3074,10 @@ ctc_init(void)
 {
         int ret = 0;
 
+        loglevel = CTC_LOGLEVEL_DEFAULT;
+
+        DBF_TEXT(setup, 3, __FUNCTION__);
+
         print_banner();
 
         ret = ctc_register_dbf_views();
diff --git a/drivers/s390/net/ctcmain.h b/drivers/s390/net/ctcmain.h
new file mode 100644
index 000000000000..ba3605f16335
--- /dev/null
+++ b/drivers/s390/net/ctcmain.h
@@ -0,0 +1,276 @@
+/*
+ * $Id: ctcmain.h,v 1.4 2005/03/24 09:04:17 mschwide Exp $
+ *
+ * CTC / ESCON network driver
+ *
+ * Copyright (C) 2001 IBM Deutschland Entwicklung GmbH, IBM Corporation
+ * Author(s): Fritz Elfert (elfert@de.ibm.com, felfert@millenux.com)
+              Peter Tiedemann (ptiedem@de.ibm.com)
+ *
+ *
+ * Documentation used:
+ *  - Principles of Operation (IBM doc#: SA22-7201-06)
+ *  - Common IO/-Device Commands and Self Description (IBM doc#: SA22-7204-02)
+ *  - Common IO/-Device Commands and Self Description (IBM doc#: SN22-5535)
+ *  - ESCON Channel-to-Channel Adapter (IBM doc#: SA22-7203-00)
+ *  - ESCON I/O Interface (IBM doc#: SA22-7202-029
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * RELEASE-TAG: CTC/ESCON network driver $Revision: 1.4 $
+ *
+ */
+
+#ifndef _CTCMAIN_H_
+#define _CTCMAIN_H_
+
+#include <asm/ccwdev.h>
+#include <asm/ccwgroup.h>
+
+#include "ctctty.h"
+#include "fsm.h"
+#include "cu3088.h"
+
+
+/**
+ * CCW commands, used in this driver.
+ */
+#define CCW_CMD_WRITE           0x01
+#define CCW_CMD_READ            0x02
+#define CCW_CMD_SET_EXTENDED    0xc3
+#define CCW_CMD_PREPARE         0xe3
+
+#define CTC_PROTO_S390          0
+#define CTC_PROTO_LINUX         1
+#define CTC_PROTO_LINUX_TTY     2
+#define CTC_PROTO_OS390         3
+#define CTC_PROTO_MAX           3
+
+#define CTC_BUFSIZE_LIMIT       65535
+#define CTC_BUFSIZE_DEFAULT     32768
+
+#define CTC_TIMEOUT_5SEC        5000
+
+#define CTC_INITIAL_BLOCKLEN    2
+
+#define READ                    0
+#define WRITE                   1
+
+#define CTC_ID_SIZE             BUS_ID_SIZE+3
+
+
+struct ctc_profile {
+        unsigned long maxmulti;
+        unsigned long maxcqueue;
+        unsigned long doios_single;
+        unsigned long doios_multi;
+        unsigned long txlen;
+        unsigned long tx_time;
+        struct timespec send_stamp;
+};
+
+/**
+ * Definition of one channel
+ */
+struct channel {
+
+        /**
+         * Pointer to next channel in list.
+         */
+        struct channel *next;
+        char id[CTC_ID_SIZE];
+        struct ccw_device *cdev;
+
+        /**
+         * Type of this channel.
+         * CTC/A or Escon for valid channels.
+         */
+        enum channel_types type;
+
+        /**
+         * Misc. flags. See CHANNEL_FLAGS_... below
+         */
+        __u32 flags;
+
+        /**
+         * The protocol of this channel
+         */
+        __u16 protocol;
+
+        /**
+         * I/O and irq related stuff
+         */
+        struct ccw1 *ccw;
+        struct irb *irb;
+
+        /**
+         * RX/TX buffer size
+         */
+        int max_bufsize;
+
+        /**
+         * Transmit/Receive buffer.
+         */
+        struct sk_buff *trans_skb;
+
+        /**
+         * Universal I/O queue.
+         */
+        struct sk_buff_head io_queue;
+
+        /**
+         * TX queue for collecting skb's during busy.
+         */
+        struct sk_buff_head collect_queue;
+
+        /**
+         * Amount of data in collect_queue.
+         */
+        int collect_len;
+
+        /**
+         * spinlock for collect_queue and collect_len
+         */
+        spinlock_t collect_lock;
+
+        /**
+         * Timer for detecting unresposive
+         * I/O operations.
+         */
+        fsm_timer timer;
+
+        /**
+         * Retry counter for misc. operations.
+         */
+        int retry;
+
+        /**
+         * The finite state machine of this channel
+         */
+        fsm_instance *fsm;
+
+        /**
+         * The corresponding net_device this channel
+         * belongs to.
+         */
+        struct net_device *netdev;
+
+        struct ctc_profile prof;
+
+        unsigned char *trans_skb_data;
+
+        __u16 logflags;
+};
+
+#define CHANNEL_FLAGS_READ            0
+#define CHANNEL_FLAGS_WRITE           1
+#define CHANNEL_FLAGS_INUSE           2
+#define CHANNEL_FLAGS_BUFSIZE_CHANGED 4
+#define CHANNEL_FLAGS_FAILED          8
+#define CHANNEL_FLAGS_WAITIRQ        16
+#define CHANNEL_FLAGS_RWMASK 1
+#define CHANNEL_DIRECTION(f) (f & CHANNEL_FLAGS_RWMASK)
+
+#define LOG_FLAG_ILLEGALPKT  1
+#define LOG_FLAG_ILLEGALSIZE 2
+#define LOG_FLAG_OVERRUN     4
+#define LOG_FLAG_NOMEM       8
+
+#define CTC_LOGLEVEL_INFO     1
+#define CTC_LOGLEVEL_NOTICE   2
+#define CTC_LOGLEVEL_WARN     4
+#define CTC_LOGLEVEL_EMERG    8
+#define CTC_LOGLEVEL_ERR     16
+#define CTC_LOGLEVEL_DEBUG   32
+#define CTC_LOGLEVEL_CRIT    64
+
+#define CTC_LOGLEVEL_DEFAULT \
+(CTC_LOGLEVEL_INFO | CTC_LOGLEVEL_NOTICE | CTC_LOGLEVEL_WARN | CTC_LOGLEVEL_CRIT)
+
+#define CTC_LOGLEVEL_MAX     ((CTC_LOGLEVEL_CRIT<<1)-1)
+
+#define ctc_pr_debug(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_DEBUG) printk(KERN_DEBUG fmt,##arg); } while (0)
+
+#define ctc_pr_info(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_INFO) printk(KERN_INFO fmt,##arg); } while (0)
+
+#define ctc_pr_notice(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_NOTICE) printk(KERN_NOTICE fmt,##arg); } while (0)
+
+#define ctc_pr_warn(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_WARN) printk(KERN_WARNING fmt,##arg); } while (0)
+
+#define ctc_pr_emerg(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_EMERG) printk(KERN_EMERG fmt,##arg); } while (0)
+
+#define ctc_pr_err(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_ERR) printk(KERN_ERR fmt,##arg); } while (0)
+
+#define ctc_pr_crit(fmt, arg...) \
+do { if (loglevel & CTC_LOGLEVEL_CRIT) printk(KERN_CRIT fmt,##arg); } while (0)
+
+struct ctc_priv {
+        struct net_device_stats stats;
+        unsigned long tbusy;
+        /**
+         * The finite state machine of this interface.
+         */
+        fsm_instance *fsm;
+        /**
+         * The protocol of this device
+         */
+        __u16 protocol;
+        /**
+         * Timer for restarting after I/O Errors
+         */
+        fsm_timer               restart_timer;
+
+        int buffer_size;
+
+        struct channel *channel[2];
+};
+
+/**
+ * Definition of our link level header.
+ */
+struct ll_header {
+        __u16 length;
+        __u16 type;
+        __u16 unused;
+};
+#define LL_HEADER_LENGTH (sizeof(struct ll_header))
+
+/**
+ * Compatibility macros for busy handling
+ * of network devices.
+ */
+static __inline__ void
+ctc_clear_busy(struct net_device * dev)
+{
+        clear_bit(0, &(((struct ctc_priv *) dev->priv)->tbusy));
+        if (((struct ctc_priv *)dev->priv)->protocol != CTC_PROTO_LINUX_TTY)
+                netif_wake_queue(dev);
+}
+
+static __inline__ int
+ctc_test_and_set_busy(struct net_device * dev)
+{
+        if (((struct ctc_priv *)dev->priv)->protocol != CTC_PROTO_LINUX_TTY)
+                netif_stop_queue(dev);
+        return test_and_set_bit(0, &((struct ctc_priv *) dev->priv)->tbusy);
+}
+
+#endif
diff --git a/drivers/s390/net/ctctty.c b/drivers/s390/net/ctctty.c
index 9257d60c7833..3080393e823d 100644
--- a/drivers/s390/net/ctctty.c
+++ b/drivers/s390/net/ctctty.c
@@ -1,5 +1,5 @@
 /*
- * $Id: ctctty.c,v 1.26 2004/08/04 11:06:55 mschwide Exp $
+ * $Id: ctctty.c,v 1.29 2005/04/05 08:50:44 mschwide Exp $
  *
  * CTC / ESCON network driver, tty interface.
  *
@@ -1056,8 +1056,7 @@ ctc_tty_close(struct tty_struct *tty, struct file *filp)
         info->tty = 0;
         tty->closing = 0;
         if (info->blocked_open) {
-                set_current_state(TASK_INTERRUPTIBLE);
-                schedule_timeout(HZ/2);
+                msleep_interruptible(500);
                 wake_up_interruptible(&info->open_wait);
         }
         info->flags &= ~(CTC_ASYNC_NORMAL_ACTIVE | CTC_ASYNC_CLOSING);
diff --git a/drivers/s390/net/cu3088.c b/drivers/s390/net/cu3088.c
index 1b0a9f16024c..0075894c71db 100644
--- a/drivers/s390/net/cu3088.c
+++ b/drivers/s390/net/cu3088.c
@@ -1,5 +1,5 @@
 /*
- * $Id: cu3088.c,v 1.34 2004/06/15 13:16:27 pavlic Exp $
+ * $Id: cu3088.c,v 1.35 2005/03/30 19:28:52 richtera Exp $
  *
  * CTC / LCS ccw_device driver
  *
@@ -39,6 +39,7 @@ const char *cu3088_type[] = {
         "FICON channel",
         "P390 LCS card",
         "OSA LCS card",
+        "CLAW channel device",
         "unknown channel type",
         "unsupported channel type",
 };
@@ -51,6 +52,7 @@ static struct ccw_device_id cu3088_ids[] = {
         { CCW_DEVICE(0x3088, 0x1e), .driver_info = channel_type_ficon },
         { CCW_DEVICE(0x3088, 0x01), .driver_info = channel_type_p390 },
         { CCW_DEVICE(0x3088, 0x60), .driver_info = channel_type_osa2 },
+        { CCW_DEVICE(0x3088, 0x61), .driver_info = channel_type_claw },
         { /* end of list */ }
 };
 
diff --git a/drivers/s390/net/cu3088.h b/drivers/s390/net/cu3088.h
index 0ec49a8b3adc..1753661f702a 100644
--- a/drivers/s390/net/cu3088.h
+++ b/drivers/s390/net/cu3088.h
@@ -23,6 +23,9 @@ enum channel_types {
         /* Device is a OSA2 card */
         channel_type_osa2,
 
+        /* Device is a CLAW channel device */
+        channel_type_claw,
+
         /* Device is a channel, but we don't know
          * anything about it */
         channel_type_unknown,
diff --git a/drivers/s390/net/iucv.c b/drivers/s390/net/iucv.c
index 1ac6563ee3e0..e08e74e16124 100644
--- a/drivers/s390/net/iucv.c
+++ b/drivers/s390/net/iucv.c
@@ -1,5 +1,5 @@
 /* 
- * $Id: iucv.c,v 1.43 2005/02/09 14:47:43 braunu Exp $
+ * $Id: iucv.c,v 1.45 2005/04/26 22:59:06 braunu Exp $
  *
  * IUCV network driver
  *
@@ -29,7 +29,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
- * RELEASE-TAG: IUCV lowlevel driver $Revision: 1.43 $
+ * RELEASE-TAG: IUCV lowlevel driver $Revision: 1.45 $
  *
  */
 
@@ -355,7 +355,7 @@ do { \
 static void
 iucv_banner(void)
 {
-        char vbuf[] = "$Revision: 1.43 $";
+        char vbuf[] = "$Revision: 1.45 $";
         char *version = vbuf;
 
         if ((version = strchr(version, ':'))) {
@@ -2553,12 +2553,12 @@ EXPORT_SYMBOL (iucv_resume);
 #endif
 EXPORT_SYMBOL (iucv_reply_prmmsg);
 EXPORT_SYMBOL (iucv_send);
-#if 0
 EXPORT_SYMBOL (iucv_send2way);
 EXPORT_SYMBOL (iucv_send2way_array);
-EXPORT_SYMBOL (iucv_send_array);
 EXPORT_SYMBOL (iucv_send2way_prmmsg);
 EXPORT_SYMBOL (iucv_send2way_prmmsg_array);
+#if 0
+EXPORT_SYMBOL (iucv_send_array);
 EXPORT_SYMBOL (iucv_send_prmmsg);
 EXPORT_SYMBOL (iucv_setmask);
 #endif
diff --git a/drivers/s390/net/lcs.c b/drivers/s390/net/lcs.c
index 0f76e945b984..cccfed248e70 100644
--- a/drivers/s390/net/lcs.c
+++ b/drivers/s390/net/lcs.c
@@ -11,7 +11,7 @@
  *                        Frank Pavlic (pavlic@de.ibm.com) and
  *                        Martin Schwidefsky <schwidefsky@de.ibm.com>
  *
- *    $Revision: 1.96 $  $Date: 2004/11/11 13:42:33 $
+ *    $Revision: 1.98 $  $Date: 2005/04/18 13:41:29 $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -59,7 +59,7 @@
 /**
  * initialization string for output
  */
-#define VERSION_LCS_C  "$Revision: 1.96 $"
+#define VERSION_LCS_C  "$Revision: 1.98 $"
 
 static char version[] __initdata = "LCS driver ("VERSION_LCS_C "/" VERSION_LCS_H ")";
 static char debug_buffer[255];
@@ -1098,14 +1098,6 @@ lcs_check_multicast_support(struct lcs_card *card)
                 PRINT_ERR("Query IPAssist failed. Assuming unsupported!\n");
                 return -EOPNOTSUPP;
         }
-        /* Print out supported assists: IPv6 */
-        PRINT_INFO("LCS device %s %s IPv6 support\n", card->dev->name,
-                   (card->ip_assists_supported & LCS_IPASS_IPV6_SUPPORT) ?
-                   "with" : "without");
-        /* Print out supported assist: Multicast */
-        PRINT_INFO("LCS device %s %s Multicast support\n", card->dev->name,
-                   (card->ip_assists_supported & LCS_IPASS_MULTICAST_SUPPORT) ?
-                   "with" : "without");
         if (card->ip_assists_supported & LCS_IPASS_MULTICAST_SUPPORT)
                 return 0;
         return -EOPNOTSUPP;
@@ -1160,7 +1152,7 @@ list_modified:
                 }
         }
         /* re-insert all entries from the failed_list into ipm_list */
-        list_for_each_entry(ipm, &failed_list, list) {
+        list_for_each_entry_safe(ipm, tmp, &failed_list, list) {
                 list_del_init(&ipm->list);
                 list_add_tail(&ipm->list, &card->ipm_list);
         }
@@ -2198,30 +2190,39 @@ lcs_new_device(struct ccwgroup_device *ccwgdev)
         if (!dev)
                 goto out;
         card->dev = dev;
-netdev_out:
         card->dev->priv = card;
         card->dev->open = lcs_open_device;
         card->dev->stop = lcs_stop_device;
         card->dev->hard_start_xmit = lcs_start_xmit;
         card->dev->get_stats = lcs_getstats;
         SET_MODULE_OWNER(dev);
-        if (lcs_register_netdev(ccwgdev) != 0)
-                goto out;
         memcpy(card->dev->dev_addr, card->mac, LCS_MAC_LENGTH);
 #ifdef CONFIG_IP_MULTICAST
         if (!lcs_check_multicast_support(card))
                 card->dev->set_multicast_list = lcs_set_multicast_list;
 #endif
-        netif_stop_queue(card->dev);
+netdev_out:
         lcs_set_allowed_threads(card,0xffffffff);
         if (recover_state == DEV_STATE_RECOVER) {
                 lcs_set_multicast_list(card->dev);
                 card->dev->flags |= IFF_UP;
                 netif_wake_queue(card->dev);
                 card->state = DEV_STATE_UP;
-        } else
+        } else {
                 lcs_stopcard(card);
+        }
 
+        if (lcs_register_netdev(ccwgdev) != 0)
+                goto out;
+
+        /* Print out supported assists: IPv6 */
+        PRINT_INFO("LCS device %s %s IPv6 support\n", card->dev->name,
+                   (card->ip_assists_supported & LCS_IPASS_IPV6_SUPPORT) ?
+                   "with" : "without");
+        /* Print out supported assist: Multicast */
+        PRINT_INFO("LCS device %s %s Multicast support\n", card->dev->name,
+                   (card->ip_assists_supported & LCS_IPASS_MULTICAST_SUPPORT) ?
+                   "with" : "without");
         return 0;
 out:
 
diff --git a/drivers/s390/net/qeth.h b/drivers/s390/net/qeth.h
index a341041a6cf7..a755b57db46b 100644
--- a/drivers/s390/net/qeth.h
+++ b/drivers/s390/net/qeth.h
@@ -24,7 +24,7 @@
 
 #include "qeth_mpc.h"
 
-#define VERSION_QETH_H          "$Revision: 1.135 $"
+#define VERSION_QETH_H          "$Revision: 1.139 $"
 
 #ifdef CONFIG_QETH_IPV6
 #define QETH_VERSION_IPV6       ":IPv6"
@@ -288,7 +288,8 @@ qeth_is_ipa_enabled(struct qeth_ipa_info *ipa, enum qeth_ipa_funcs func)
 #define QETH_TX_TIMEOUT         100 * HZ
 #define QETH_HEADER_SIZE        32
 #define MAX_PORTNO              15
-#define QETH_FAKE_LL_LEN        ETH_HLEN
+#define QETH_FAKE_LL_LEN_ETH    ETH_HLEN
+#define QETH_FAKE_LL_LEN_TR     (sizeof(struct trh_hdr)-TR_MAXRIFLEN+sizeof(struct trllc))
 #define QETH_FAKE_LL_V6_ADDR_POS 24
 
 /*IPv6 address autoconfiguration stuff*/
@@ -369,6 +370,25 @@ struct qeth_hdr {
         } hdr;
 } __attribute__ ((packed));
 
+/*TCP Segmentation Offload header*/
+struct qeth_hdr_ext_tso {
+        __u16 hdr_tot_len;
+        __u8  imb_hdr_no;
+        __u8  reserved;
+        __u8  hdr_type;
+        __u8  hdr_version;
+        __u16 hdr_len;
+        __u32 payload_len;
+        __u16 mss;
+        __u16 dg_hdr_len;
+        __u8  padding[16];
+} __attribute__ ((packed));
+
+struct qeth_hdr_tso {
+        struct qeth_hdr hdr;    /*hdr->hdr.l3.xxx*/
+        struct qeth_hdr_ext_tso ext;
+} __attribute__ ((packed));
+
 
 /* flags for qeth_hdr.flags */
 #define QETH_HDR_PASSTHRU 0x10
@@ -866,6 +886,7 @@ qeth_push_skb(struct qeth_card *card, struct sk_buff **skb, int size)
         return hdr;
 }
 
+
 inline static int
 qeth_get_hlen(__u8 link_type)
 {
@@ -873,19 +894,19 @@ qeth_get_hlen(__u8 link_type)
         switch (link_type) {
         case QETH_LINK_TYPE_HSTR:
         case QETH_LINK_TYPE_LANE_TR:
-                return sizeof(struct qeth_hdr) + TR_HLEN;
+                return sizeof(struct qeth_hdr_tso) + TR_HLEN;
         default:
 #ifdef CONFIG_QETH_VLAN
-                return sizeof(struct qeth_hdr) + VLAN_ETH_HLEN;
+                return sizeof(struct qeth_hdr_tso) + VLAN_ETH_HLEN;
 #else
-                return sizeof(struct qeth_hdr) + ETH_HLEN;
+                return sizeof(struct qeth_hdr_tso) + ETH_HLEN;
 #endif
         }
 #else  /* CONFIG_QETH_IPV6 */
 #ifdef CONFIG_QETH_VLAN
-        return sizeof(struct qeth_hdr) + VLAN_HLEN;
+        return sizeof(struct qeth_hdr_tso) + VLAN_HLEN;
 #else
-        return sizeof(struct qeth_hdr);
+        return sizeof(struct qeth_hdr_tso);
 #endif
 #endif /* CONFIG_QETH_IPV6 */
 }
diff --git a/drivers/s390/net/qeth_eddp.c b/drivers/s390/net/qeth_eddp.c
index 7ee1c06ed68a..f94f1f25eec6 100644
--- a/drivers/s390/net/qeth_eddp.c
+++ b/drivers/s390/net/qeth_eddp.c
@@ -1,6 +1,6 @@
 /*
  *
- * linux/drivers/s390/net/qeth_eddp.c ($Revision: 1.11 $)
+ * linux/drivers/s390/net/qeth_eddp.c ($Revision: 1.13 $)
  *
  * Enhanced Device Driver Packing (EDDP) support for the qeth driver.
  *
@@ -8,7 +8,7 @@
  *
  *    Author(s): Thomas Spatzier <tspat@de.ibm.com>
  *
- *    $Revision: 1.11 $  $Date: 2005/03/24 09:04:18 $
+ *    $Revision: 1.13 $  $Date: 2005/05/04 20:19:18 $
  *
  */
 #include <linux/config.h>
@@ -85,7 +85,7 @@ void
 qeth_eddp_buf_release_contexts(struct qeth_qdio_out_buffer *buf)
 {
         struct qeth_eddp_context_reference *ref;
-
+        
         QETH_DBF_TEXT(trace, 6, "eddprctx");
         while (!list_empty(&buf->ctx_list)){
                 ref = list_entry(buf->ctx_list.next,
@@ -139,7 +139,7 @@ qeth_eddp_fill_buffer(struct qeth_qdio_out_q *queue,
                                            "buffer!\n");
                                 goto out;
                         }
-                }
+                }               
                 /* check if the whole next skb fits into current buffer */
                 if ((QETH_MAX_BUFFER_ELEMENTS(queue->card) -
                                         buf->next_element_to_fill)
@@ -152,7 +152,7 @@ qeth_eddp_fill_buffer(struct qeth_qdio_out_q *queue,
                          * and increment ctx's refcnt */
                         must_refcnt = 1;
                         continue;
-                }
+                }       
                 if (must_refcnt){
                         must_refcnt = 0;
                         if (qeth_eddp_buf_ref_context(buf, ctx)){
@@ -202,40 +202,29 @@ out:
         return flush_cnt;
 }
 
-static inline int
-qeth_get_skb_data_len(struct sk_buff *skb)
-{
-        int len = skb->len;
-        int i;
-
-        for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i)
-                len -= skb_shinfo(skb)->frags[i].size;
-        return len;
-}
-
 static inline void
 qeth_eddp_create_segment_hdrs(struct qeth_eddp_context *ctx,
-                              struct qeth_eddp_data *eddp)
+                              struct qeth_eddp_data *eddp, int data_len)
 {
         u8 *page;
         int page_remainder;
         int page_offset;
-        int hdr_len;
+        int pkt_len;
         struct qeth_eddp_element *element;
 
         QETH_DBF_TEXT(trace, 5, "eddpcrsh");
         page = ctx->pages[ctx->offset >> PAGE_SHIFT];
         page_offset = ctx->offset % PAGE_SIZE;
         element = &ctx->elements[ctx->num_elements];
-        hdr_len = eddp->nhl + eddp->thl;
+        pkt_len = eddp->nhl + eddp->thl + data_len;
         /* FIXME: layer2 and VLAN !!! */
         if (eddp->qh.hdr.l2.id == QETH_HEADER_TYPE_LAYER2)
-                hdr_len += ETH_HLEN;
+                pkt_len += ETH_HLEN;
         if (eddp->mac.h_proto == __constant_htons(ETH_P_8021Q))
-                hdr_len += VLAN_HLEN;
-        /* does complete header fit in current page ? */
+                pkt_len += VLAN_HLEN;
+        /* does complete packet fit in current page ? */
         page_remainder = PAGE_SIZE - page_offset;
-        if (page_remainder < (sizeof(struct qeth_hdr) + hdr_len)){
+        if (page_remainder < (sizeof(struct qeth_hdr) + pkt_len)){
                 /* no -> go to start of next page */
                 ctx->offset += page_remainder;
                 page = ctx->pages[ctx->offset >> PAGE_SHIFT];
@@ -281,7 +270,7 @@ qeth_eddp_copy_data_tcp(char *dst, struct qeth_eddp_data *eddp, int len,
         int left_in_frag;
         int copy_len;
         u8 *src;
-
+        
         QETH_DBF_TEXT(trace, 5, "eddpcdtc");
         if (skb_shinfo(eddp->skb)->nr_frags == 0) {
                 memcpy(dst, eddp->skb->data + eddp->skb_offset, len);
@@ -292,7 +281,7 @@ qeth_eddp_copy_data_tcp(char *dst, struct qeth_eddp_data *eddp, int len,
                 while (len > 0) {
                         if (eddp->frag < 0) {
                                 /* we're in skb->data */
-                                left_in_frag = qeth_get_skb_data_len(eddp->skb)
+                                left_in_frag = (eddp->skb->len - eddp->skb->data_len)
                                                 - eddp->skb_offset;
                                 src = eddp->skb->data + eddp->skb_offset;
                         } else {
@@ -424,7 +413,7 @@ __qeth_eddp_fill_context_tcp(struct qeth_eddp_context *ctx,
         struct tcphdr *tcph;
         int data_len;
         u32 hcsum;
-
+        
         QETH_DBF_TEXT(trace, 5, "eddpftcp");
         eddp->skb_offset = sizeof(struct qeth_hdr) + eddp->nhl + eddp->thl;
         tcph = eddp->skb->h.th;
@@ -464,7 +453,7 @@ __qeth_eddp_fill_context_tcp(struct qeth_eddp_context *ctx,
                 else
                         hcsum = qeth_eddp_check_tcp6_hdr(eddp, data_len);
                 /* fill the next segment into the context */
-                qeth_eddp_create_segment_hdrs(ctx, eddp);
+                qeth_eddp_create_segment_hdrs(ctx, eddp, data_len);
                 qeth_eddp_create_segment_data_tcp(ctx, eddp, data_len, hcsum);
                 if (eddp->skb_offset >= eddp->skb->len)
                         break;
@@ -474,13 +463,13 @@ __qeth_eddp_fill_context_tcp(struct qeth_eddp_context *ctx,
                 eddp->th.tcp.h.seq += data_len;
         }
 }
-
+                           
 static inline int
 qeth_eddp_fill_context_tcp(struct qeth_eddp_context *ctx,
                            struct sk_buff *skb, struct qeth_hdr *qhdr)
 {
         struct qeth_eddp_data *eddp = NULL;
-
+        
         QETH_DBF_TEXT(trace, 5, "eddpficx");
         /* create our segmentation headers and copy original headers */
         if (skb->protocol == ETH_P_IP)
@@ -520,7 +509,7 @@ qeth_eddp_calc_num_pages(struct qeth_eddp_context *ctx, struct sk_buff *skb,
                          int hdr_len)
 {
         int skbs_per_page;
-
+        
         QETH_DBF_TEXT(trace, 5, "eddpcanp");
         /* can we put multiple skbs in one page? */
         skbs_per_page = PAGE_SIZE / (skb_shinfo(skb)->tso_size + hdr_len);
@@ -600,7 +589,7 @@ qeth_eddp_create_context_tcp(struct qeth_card *card, struct sk_buff *skb,
                              struct qeth_hdr *qhdr)
 {
         struct qeth_eddp_context *ctx = NULL;
-
+        
         QETH_DBF_TEXT(trace, 5, "creddpct");
         if (skb->protocol == ETH_P_IP)
                 ctx = qeth_eddp_create_context_generic(card, skb,
diff --git a/drivers/s390/net/qeth_main.c b/drivers/s390/net/qeth_main.c
index 607b92542df6..208127a5033a 100644
--- a/drivers/s390/net/qeth_main.c
+++ b/drivers/s390/net/qeth_main.c
@@ -1,6 +1,6 @@
 /*
  *
- * linux/drivers/s390/net/qeth_main.c ($Revision: 1.206 $)
+ * linux/drivers/s390/net/qeth_main.c ($Revision: 1.214 $)
  *
  * Linux on zSeries OSA Express and HiperSockets support
  *
@@ -12,7 +12,7 @@
  *                        Frank Pavlic (pavlic@de.ibm.com) and
  *                        Thomas Spatzier <tspat@de.ibm.com>
  *
- *    $Revision: 1.206 $         $Date: 2005/03/24 09:04:18 $
+ *    $Revision: 1.214 $         $Date: 2005/05/04 20:19:18 $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -80,7 +80,7 @@ qeth_eyecatcher(void)
 #include "qeth_eddp.h"
 #include "qeth_tso.h"
 
-#define VERSION_QETH_C "$Revision: 1.206 $"
+#define VERSION_QETH_C "$Revision: 1.214 $"
 static const char *version = "qeth S/390 OSA-Express driver";
 
 /**
@@ -158,6 +158,9 @@ qeth_irq_tasklet(unsigned long);
 static int
 qeth_set_online(struct ccwgroup_device *);
 
+static int
+__qeth_set_online(struct ccwgroup_device *gdev, int recovery_mode);
+
 static struct qeth_ipaddr *
 qeth_get_addr_buffer(enum qeth_prot_versions);
 
@@ -510,10 +513,10 @@ qeth_irq_tasklet(unsigned long data)
         wake_up(&card->wait_q);
 }
 
-static int qeth_stop_card(struct qeth_card *);
+static int qeth_stop_card(struct qeth_card *, int);
 
 static int
-qeth_set_offline(struct ccwgroup_device *cgdev)
+__qeth_set_offline(struct ccwgroup_device *cgdev, int recovery_mode)
 {
         struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
         int rc = 0;
@@ -523,7 +526,7 @@ qeth_set_offline(struct ccwgroup_device *cgdev)
         QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
 
         recover_flag = card->state;
-        if (qeth_stop_card(card) == -ERESTARTSYS){
+        if (qeth_stop_card(card, recovery_mode) == -ERESTARTSYS){
                 PRINT_WARN("Stopping card %s interrupted by user!\n",
                            CARD_BUS_ID(card));
                 return -ERESTARTSYS;
@@ -540,6 +543,12 @@ qeth_set_offline(struct ccwgroup_device *cgdev)
 }
 
 static int
+qeth_set_offline(struct ccwgroup_device *cgdev)
+{
+        return  __qeth_set_offline(cgdev, 0);
+}
+
+static int
 qeth_wait_for_threads(struct qeth_card *card, unsigned long threads);
 
 
@@ -953,8 +962,8 @@ qeth_recover(void *ptr)
         PRINT_WARN("Recovery of device %s started ...\n",
                    CARD_BUS_ID(card));
         card->use_hard_stop = 1;
-        qeth_set_offline(card->gdev);
-        rc = qeth_set_online(card->gdev);
+        __qeth_set_offline(card->gdev,1);
+        rc = __qeth_set_online(card->gdev,1);
         if (!rc)
                 PRINT_INFO("Device %s successfully recovered!\n",
                            CARD_BUS_ID(card));
@@ -2152,9 +2161,15 @@ qeth_get_next_skb(struct qeth_card *card, struct qdio_buffer *buffer,
         if (!skb_len)
                 return NULL;
         if (card->options.fake_ll){
-                if (!(skb = qeth_get_skb(skb_len + QETH_FAKE_LL_LEN)))
-                        goto no_mem;
-                skb_pull(skb, QETH_FAKE_LL_LEN);
+                if(card->dev->type == ARPHRD_IEEE802_TR){
+                        if (!(skb = qeth_get_skb(skb_len+QETH_FAKE_LL_LEN_TR)))
+                                goto no_mem;
+                        skb_reserve(skb,QETH_FAKE_LL_LEN_TR);
+                } else {
+                        if (!(skb = qeth_get_skb(skb_len+QETH_FAKE_LL_LEN_ETH)))
+                                goto no_mem;
+                        skb_reserve(skb,QETH_FAKE_LL_LEN_ETH);
+                }
         } else if (!(skb = qeth_get_skb(skb_len)))
                 goto no_mem;
         data_ptr = element->addr + offset;
@@ -2229,14 +2244,68 @@ qeth_type_trans(struct sk_buff *skb, struct net_device *dev)
 }
 
 static inline void
-qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
+qeth_rebuild_skb_fake_ll_tr(struct qeth_card *card, struct sk_buff *skb,
+                         struct qeth_hdr *hdr)
+{
+        struct trh_hdr *fake_hdr;
+        struct trllc *fake_llc;
+        struct iphdr *ip_hdr;
+
+        QETH_DBF_TEXT(trace,5,"skbfktr");
+        skb->mac.raw = skb->data - QETH_FAKE_LL_LEN_TR;
+        /* this is a fake ethernet header */
+        fake_hdr = (struct trh_hdr *) skb->mac.raw;
+
+        /* the destination MAC address */
+        switch (skb->pkt_type){
+        case PACKET_MULTICAST:
+                switch (skb->protocol){
+#ifdef CONFIG_QETH_IPV6
+                case __constant_htons(ETH_P_IPV6):
+                        ndisc_mc_map((struct in6_addr *)
+                                     skb->data + QETH_FAKE_LL_V6_ADDR_POS,
+                                     fake_hdr->daddr, card->dev, 0);
+                        break;
+#endif /* CONFIG_QETH_IPV6 */
+                case __constant_htons(ETH_P_IP):
+                        ip_hdr = (struct iphdr *)skb->data;
+                        ip_tr_mc_map(ip_hdr->daddr, fake_hdr->daddr);
+                        break;
+                default:
+                        memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
+                }
+                break;
+        case PACKET_BROADCAST:
+                memset(fake_hdr->daddr, 0xff, TR_ALEN);
+                break;
+        default:
+                memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
+        }
+        /* the source MAC address */
+        if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
+                memcpy(fake_hdr->saddr, &hdr->hdr.l3.dest_addr[2], TR_ALEN);
+        else
+                memset(fake_hdr->saddr, 0, TR_ALEN);
+        fake_hdr->rcf=0;
+        fake_llc = (struct trllc*)&(fake_hdr->rcf);
+        fake_llc->dsap = EXTENDED_SAP;
+        fake_llc->ssap = EXTENDED_SAP;
+        fake_llc->llc  = UI_CMD;
+        fake_llc->protid[0] = 0;
+        fake_llc->protid[1] = 0;
+        fake_llc->protid[2] = 0;
+        fake_llc->ethertype = ETH_P_IP;
+}
+
+static inline void
+qeth_rebuild_skb_fake_ll_eth(struct qeth_card *card, struct sk_buff *skb,
                          struct qeth_hdr *hdr)
 {
         struct ethhdr *fake_hdr;
         struct iphdr *ip_hdr;
 
-        QETH_DBF_TEXT(trace,5,"skbfake");
-        skb->mac.raw = skb->data - QETH_FAKE_LL_LEN;
+        QETH_DBF_TEXT(trace,5,"skbfketh");
+        skb->mac.raw = skb->data - QETH_FAKE_LL_LEN_ETH;
         /* this is a fake ethernet header */
         fake_hdr = (struct ethhdr *) skb->mac.raw;
 
@@ -2253,10 +2322,7 @@ qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
 #endif /* CONFIG_QETH_IPV6 */
                 case __constant_htons(ETH_P_IP):
                         ip_hdr = (struct iphdr *)skb->data;
-                        if (card->dev->type == ARPHRD_IEEE802_TR)
-                                ip_tr_mc_map(ip_hdr->daddr, fake_hdr->h_dest);
-                        else
-                                ip_eth_mc_map(ip_hdr->daddr, fake_hdr->h_dest);
+                        ip_eth_mc_map(ip_hdr->daddr, fake_hdr->h_dest);
                         break;
                 default:
                         memcpy(fake_hdr->h_dest, card->dev->dev_addr, ETH_ALEN);
@@ -2278,6 +2344,16 @@ qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
 }
 
 static inline void
+qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
+                        struct qeth_hdr *hdr)
+{
+        if (card->dev->type == ARPHRD_IEEE802_TR)
+                qeth_rebuild_skb_fake_ll_tr(card, skb, hdr);
+        else
+                qeth_rebuild_skb_fake_ll_eth(card, skb, hdr);
+}
+
+static inline void
 qeth_rebuild_skb_vlan(struct qeth_card *card, struct sk_buff *skb,
                       struct qeth_hdr *hdr)
 {
@@ -3440,16 +3516,25 @@ qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
                      unsigned short type, void *daddr, void *saddr,
                      unsigned len)
 {
-        struct ethhdr *hdr;
+        if(dev->type == ARPHRD_IEEE802_TR){
+                struct trh_hdr *hdr;
+                hdr = (struct trh_hdr *)skb_push(skb, QETH_FAKE_LL_LEN_TR);
+                memcpy(hdr->saddr, dev->dev_addr, TR_ALEN);
+                memcpy(hdr->daddr, "FAKELL", TR_ALEN);
+                return QETH_FAKE_LL_LEN_TR;
+
+        } else {
+                struct ethhdr *hdr;
+                hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN_ETH);
+                memcpy(hdr->h_source, dev->dev_addr, ETH_ALEN);
+                memcpy(hdr->h_dest, "FAKELL", ETH_ALEN);
+                if (type != ETH_P_802_3)
+                        hdr->h_proto = htons(type);
+                else
+                        hdr->h_proto = htons(len);
+                return QETH_FAKE_LL_LEN_ETH;
 
-        hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN);
-        memcpy(hdr->h_source, dev->dev_addr, ETH_ALEN);
-        memcpy(hdr->h_dest, "FAKELL", ETH_ALEN);
-        if (type != ETH_P_802_3)
-                hdr->h_proto = htons(type);
-        else
-                hdr->h_proto = htons(len);
-        return QETH_FAKE_LL_LEN;
+        }
 }
 
 static inline int
@@ -3710,16 +3795,12 @@ static inline int
 qeth_prepare_skb(struct qeth_card *card, struct sk_buff **skb,
                  struct qeth_hdr **hdr, int ipv)
 {
-        int rc = 0;
 #ifdef CONFIG_QETH_VLAN
         u16 *tag;
 #endif
 
         QETH_DBF_TEXT(trace, 6, "prepskb");
 
-        rc = qeth_realloc_headroom(card, skb, sizeof(struct qeth_hdr));
-        if (rc)
-                return rc;
 #ifdef CONFIG_QETH_VLAN
         if (card->vlangrp && vlan_tx_tag_present(*skb) &&
             ((ipv == 6) || card->options.layer2) ) {
@@ -3882,9 +3963,15 @@ qeth_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
                         memcpy(hdr->hdr.l3.dest_addr, &skb->nh.ipv6h->daddr, 16);
                 }
         } else { /* passthrough */
-                if (!memcmp(skb->data + sizeof(struct qeth_hdr),
+                if((skb->dev->type == ARPHRD_IEEE802_TR) &&
+                    !memcmp(skb->data + sizeof(struct qeth_hdr) + 
+                    sizeof(__u16), skb->dev->broadcast, 6)) {
+                        hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
+                                                QETH_HDR_PASSTHRU;
+                } else if (!memcmp(skb->data + sizeof(struct qeth_hdr),
                             skb->dev->broadcast, 6)) {   /* broadcast? */
-                        hdr->hdr.l3.flags = QETH_CAST_BROADCAST | QETH_HDR_PASSTHRU;
+                        hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
+                                                QETH_HDR_PASSTHRU;
                 } else {
                         hdr->hdr.l3.flags = (cast_type == RTN_MULTICAST) ?
                                 QETH_CAST_MULTICAST | QETH_HDR_PASSTHRU :
@@ -3894,67 +3981,29 @@ qeth_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
 }
 
 static inline void
-__qeth_fill_buffer_frag(struct sk_buff *skb, struct qdio_buffer *buffer,
-                        int *next_element_to_fill)
-{
-        int length = skb->len;
-        struct skb_frag_struct *frag;
-        int fragno;
-        unsigned long addr;
-        int element;
-        int first_lap = 1;
-
-        fragno = skb_shinfo(skb)->nr_frags; /* start with last frag */
-        element = *next_element_to_fill + fragno;
-        while (length > 0) {
-                if (fragno > 0) {
-                        frag = &skb_shinfo(skb)->frags[fragno - 1];
-                        addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
-                                frag->page_offset;
-                        buffer->element[element].addr = (char *)addr;
-                        buffer->element[element].length = frag->size;
-                        length -= frag->size;
-                        if (first_lap)
-                                buffer->element[element].flags =
-                                    SBAL_FLAGS_LAST_FRAG;
-                        else
-                                buffer->element[element].flags =
-                                    SBAL_FLAGS_MIDDLE_FRAG;
-                } else {
-                        buffer->element[element].addr = skb->data;
-                        buffer->element[element].length = length;
-                        length = 0;
-                        buffer->element[element].flags =
-                                SBAL_FLAGS_FIRST_FRAG;
-                }
-                element--;
-                fragno--;
-                first_lap = 0;
-        }
-        *next_element_to_fill += skb_shinfo(skb)->nr_frags + 1;
-}
-
-static inline void
 __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
-                   int *next_element_to_fill)
+                   int is_tso, int *next_element_to_fill)
 {
         int length = skb->len;
         int length_here;
         int element;
         char *data;
-        int first_lap = 1;
+        int first_lap ;
 
         element = *next_element_to_fill;
         data = skb->data;
+        first_lap = (is_tso == 0 ? 1 : 0);
+
         while (length > 0) {
                 /* length_here is the remaining amount of data in this page */
                 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
                 if (length < length_here)
                         length_here = length;
+
                 buffer->element[element].addr = data;
                 buffer->element[element].length = length_here;
                 length -= length_here;
-                if (!length){
+                if (!length) {
                         if (first_lap)
                                 buffer->element[element].flags = 0;
                         else
@@ -3981,17 +4030,35 @@ qeth_fill_buffer(struct qeth_qdio_out_q *queue,
                  struct sk_buff *skb)
 {
         struct qdio_buffer *buffer;
-        int flush_cnt = 0;
+        struct qeth_hdr_tso *hdr;
+        int flush_cnt = 0, hdr_len, large_send = 0;
 
         QETH_DBF_TEXT(trace, 6, "qdfillbf");
+
         buffer = buf->buffer;
         atomic_inc(&skb->users);
         skb_queue_tail(&buf->skb_list, skb);
+
+        hdr  = (struct qeth_hdr_tso *) skb->data;
+        /*check first on TSO ....*/
+        if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
+                int element = buf->next_element_to_fill;
+
+                hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
+                /*fill first buffer entry only with header information */
+                buffer->element[element].addr = skb->data;
+                buffer->element[element].length = hdr_len;
+                buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
+                buf->next_element_to_fill++;
+                skb->data += hdr_len;
+                skb->len  -= hdr_len;
+                large_send = 1;
+        }
         if (skb_shinfo(skb)->nr_frags == 0)
-                __qeth_fill_buffer(skb, buffer,
+                __qeth_fill_buffer(skb, buffer, large_send,
                                    (int *)&buf->next_element_to_fill);
         else
-                __qeth_fill_buffer_frag(skb, buffer,
+                __qeth_fill_buffer_frag(skb, buffer, large_send,
                                         (int *)&buf->next_element_to_fill);
 
         if (!queue->do_pack) {
@@ -4184,6 +4251,25 @@ out:
 }
 
 static inline int
+qeth_get_elements_no(struct qeth_card *card, void *hdr, struct sk_buff *skb)
+{
+        int elements_needed = 0;
+
+        if (skb_shinfo(skb)->nr_frags > 0) {
+                elements_needed = (skb_shinfo(skb)->nr_frags + 1);
+        }
+        if (elements_needed == 0 )
+                elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
+                                        + skb->len) >> PAGE_SHIFT);
+        if (elements_needed > QETH_MAX_BUFFER_ELEMENTS(card)){
+                PRINT_ERR("qeth_do_send_packet: invalid size of "
+                          "IP packet. Discarded.");
+                return 0;
+        }
+        return elements_needed;
+}
+
+static inline int
 qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
 {
         int ipv = 0;
@@ -4205,7 +4291,11 @@ qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
                                 dev_kfree_skb_irq(skb);
                                 return 0;
                         }
-                        skb_pull(skb, QETH_FAKE_LL_LEN);
+                        if(card->dev->type == ARPHRD_IEEE802_TR){
+                                skb_pull(skb, QETH_FAKE_LL_LEN_TR);
+                        } else {
+                                skb_pull(skb, QETH_FAKE_LL_LEN_ETH);
+                        }
                 }
         }
         cast_type = qeth_get_cast_type(card, skb);
@@ -4221,19 +4311,25 @@ qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
         if (skb_shinfo(skb)->tso_size)
                 large_send = card->options.large_send;
 
-        if ((rc = qeth_prepare_skb(card, &skb, &hdr, ipv))){
-                QETH_DBF_TEXT_(trace, 4, "pskbe%d", rc);
-                return rc;
-        }
         /*are we able to do TSO ? If so ,prepare and send it from here */
         if ((large_send == QETH_LARGE_SEND_TSO) &&
             (cast_type == RTN_UNSPEC)) {
-                rc = qeth_tso_send_packet(card, skb, queue,
-                                          ipv, cast_type);
-                goto do_statistics;
+                rc = qeth_tso_prepare_packet(card, skb, ipv, cast_type);
+                if (rc) {
+                        card->stats.tx_dropped++;
+                        card->stats.tx_errors++;
+                        dev_kfree_skb_any(skb);
+                        return NETDEV_TX_OK;
+                } 
+                elements_needed++;
+        } else {
+                if ((rc = qeth_prepare_skb(card, &skb, &hdr, ipv))) {
+                        QETH_DBF_TEXT_(trace, 4, "pskbe%d", rc);
+                        return rc;
+                }
+                qeth_fill_header(card, hdr, skb, ipv, cast_type);
         }
 
-        qeth_fill_header(card, hdr, skb, ipv, cast_type);
         if (large_send == QETH_LARGE_SEND_EDDP) {
                 ctx = qeth_eddp_create_context(card, skb, hdr);
                 if (ctx == NULL) {
@@ -4241,7 +4337,7 @@ qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
                         return -EINVAL;
                 }
         } else {
-                elements_needed = qeth_get_elements_no(card,(void*) hdr, skb);
+                elements_needed += qeth_get_elements_no(card,(void*) hdr, skb);
                 if (!elements_needed)
                         return -EINVAL;
         }
@@ -4252,12 +4348,12 @@ qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
         else
                 rc = qeth_do_send_packet_fast(card, queue, skb, hdr,
                                               elements_needed, ctx);
-do_statistics:
         if (!rc){
                 card->stats.tx_packets++;
                 card->stats.tx_bytes += skb->len;
 #ifdef CONFIG_QETH_PERF_STATS
-                if (skb_shinfo(skb)->tso_size) {
+                if (skb_shinfo(skb)->tso_size &&
+                   !(large_send == QETH_LARGE_SEND_NO)) {
                         card->perf_stats.large_send_bytes += skb->len;
                         card->perf_stats.large_send_cnt++;
                 }
@@ -7154,7 +7250,7 @@ qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
 }
 
 static int
-qeth_stop_card(struct qeth_card *card)
+qeth_stop_card(struct qeth_card *card, int recovery_mode)
 {
         int rc = 0;
 
@@ -7167,9 +7263,13 @@ qeth_stop_card(struct qeth_card *card)
         if (card->read.state == CH_STATE_UP &&
             card->write.state == CH_STATE_UP &&
             (card->state == CARD_STATE_UP)) {
-                rtnl_lock();
-                dev_close(card->dev);
-                rtnl_unlock();
+                if(recovery_mode) {
+                        qeth_stop(card->dev);
+                } else {
+                        rtnl_lock();
+                        dev_close(card->dev);
+                        rtnl_unlock();
+                }
                 if (!card->use_hard_stop) {
                         __u8 *mac = &card->dev->dev_addr[0];
                         rc = qeth_layer2_send_delmac(card, mac);
@@ -7341,13 +7441,17 @@ qeth_register_netdev(struct qeth_card *card)
 }
 
 static void
-qeth_start_again(struct qeth_card *card)
+qeth_start_again(struct qeth_card *card, int recovery_mode)
 {
         QETH_DBF_TEXT(setup ,2, "startag");
 
-        rtnl_lock();
-        dev_open(card->dev);
-        rtnl_unlock();
+        if(recovery_mode) {
+                qeth_open(card->dev);
+        } else {
+                rtnl_lock();
+                dev_open(card->dev);
+                rtnl_unlock();
+        }
         /* this also sets saved unicast addresses */
         qeth_set_multicast_list(card->dev);
 }
@@ -7404,7 +7508,7 @@ static void qeth_make_parameters_consistent(struct qeth_card *card)
 
 
 static int
-qeth_set_online(struct ccwgroup_device *gdev)
+__qeth_set_online(struct ccwgroup_device *gdev, int recovery_mode)
 {
         struct qeth_card *card = gdev->dev.driver_data;
         int rc = 0;
@@ -7464,12 +7568,12 @@ qeth_set_online(struct ccwgroup_device *gdev)
  * we can also use this state for recovery purposes*/
         qeth_set_allowed_threads(card, 0xffffffff, 0);
         if (recover_flag == CARD_STATE_RECOVER)
-                qeth_start_again(card);
+                qeth_start_again(card, recovery_mode);
         qeth_notify_processes();
         return 0;
 out_remove:
         card->use_hard_stop = 1;
-        qeth_stop_card(card);
+        qeth_stop_card(card, 0);
         ccw_device_set_offline(CARD_DDEV(card));
         ccw_device_set_offline(CARD_WDEV(card));
         ccw_device_set_offline(CARD_RDEV(card));
@@ -7480,6 +7584,12 @@ out_remove:
         return -ENODEV;
 }
 
+static int
+qeth_set_online(struct ccwgroup_device *gdev)
+{
+        return __qeth_set_online(gdev, 0);
+}
+
 static struct ccw_device_id qeth_ids[] = {
         {CCW_DEVICE(0x1731, 0x01), driver_info:QETH_CARD_TYPE_OSAE},
         {CCW_DEVICE(0x1731, 0x05), driver_info:QETH_CARD_TYPE_IQD},
diff --git a/drivers/s390/net/qeth_tso.c b/drivers/s390/net/qeth_tso.c
deleted file mode 100644
index c91976274e7b..000000000000
--- a/drivers/s390/net/qeth_tso.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/*
- * linux/drivers/s390/net/qeth_tso.c ($Revision: 1.6 $)
- *
- * Header file for qeth TCP Segmentation Offload support.
- *
- * Copyright 2004 IBM Corporation
- *
- *    Author(s): Frank Pavlic <pavlic@de.ibm.com>
- *
- *    $Revision: 1.6 $   $Date: 2005/03/24 09:04:18 $
- *
- */
-
-#include <linux/skbuff.h>
-#include <linux/tcp.h>
-#include <linux/ip.h>
-#include <linux/ipv6.h>
-#include <net/ip6_checksum.h>
-#include "qeth.h"
-#include "qeth_mpc.h"
-#include "qeth_tso.h"
-
-/**
- * skb already partially prepared
- * classic qdio header in skb->data
- * */
-static inline struct qeth_hdr_tso *
-qeth_tso_prepare_skb(struct qeth_card *card, struct sk_buff **skb)
-{
-        int rc = 0;
-
-        QETH_DBF_TEXT(trace, 5, "tsoprsk");
-        rc = qeth_realloc_headroom(card, skb,sizeof(struct qeth_hdr_ext_tso));
-        if (rc)
-                return NULL;
-
-        return qeth_push_skb(card, skb, sizeof(struct qeth_hdr_ext_tso));
-}
-
-/**
- * fill header for a TSO packet
- */
-static inline void
-qeth_tso_fill_header(struct qeth_card *card, struct sk_buff *skb)
-{
-        struct qeth_hdr_tso *hdr;
-        struct tcphdr *tcph;
-        struct iphdr *iph;
-
-        QETH_DBF_TEXT(trace, 5, "tsofhdr");
-
-        hdr  = (struct qeth_hdr_tso *) skb->data;
-        iph  = skb->nh.iph;
-        tcph = skb->h.th;
-        /*fix header to TSO values ...*/
-        hdr->hdr.hdr.l3.id = QETH_HEADER_TYPE_TSO;
-        /*set values which are fix for the first approach ...*/
-        hdr->ext.hdr_tot_len = (__u16) sizeof(struct qeth_hdr_ext_tso);
-        hdr->ext.imb_hdr_no  = 1;
-        hdr->ext.hdr_type    = 1;
-        hdr->ext.hdr_version = 1;
-        hdr->ext.hdr_len     = 28;
-        /*insert non-fix values */
-        hdr->ext.mss = skb_shinfo(skb)->tso_size;
-        hdr->ext.dg_hdr_len = (__u16)(iph->ihl*4 + tcph->doff*4);
-        hdr->ext.payload_len = (__u16)(skb->len - hdr->ext.dg_hdr_len -
-                                       sizeof(struct qeth_hdr_tso));
-}
-
-/**
- * change some header values as requested by hardware
- */
-static inline void
-qeth_tso_set_tcpip_header(struct qeth_card *card, struct sk_buff *skb)
-{
-        struct iphdr *iph;
-        struct ipv6hdr *ip6h;
-        struct tcphdr *tcph;
-
-        iph  = skb->nh.iph;
-        ip6h = skb->nh.ipv6h;
-        tcph = skb->h.th;
-
-        tcph->check = 0;
-        if (skb->protocol == ETH_P_IPV6) {
-                ip6h->payload_len = 0;
-                tcph->check = ~csum_ipv6_magic(&ip6h->saddr, &ip6h->daddr,
-                                               0, IPPROTO_TCP, 0);
-                return;
-        }
-        /*OSA want us to set these values ...*/
-        tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
-                                         0, IPPROTO_TCP, 0);
-        iph->tot_len = 0;
-        iph->check = 0;
-}
-
-static inline struct qeth_hdr_tso *
-qeth_tso_prepare_packet(struct qeth_card *card, struct sk_buff *skb,
-                        int ipv, int cast_type)
-{
-        struct qeth_hdr_tso *hdr;
-        int rc = 0;
-
-        QETH_DBF_TEXT(trace, 5, "tsoprep");
-
-        /*get headroom for tso qdio header */
-        hdr = (struct qeth_hdr_tso *) qeth_tso_prepare_skb(card, &skb);
-        if (hdr == NULL) {
-                QETH_DBF_TEXT_(trace, 4, "2err%d", rc);
-                return NULL;
-        }
-        memset(hdr, 0, sizeof(struct qeth_hdr_tso));
-        /*fill first 32 bytes of  qdio header as used
-         *FIXME: TSO has two struct members
-         * with different names but same size
-         * */
-        qeth_fill_header(card, &hdr->hdr, skb, ipv, cast_type);
-        qeth_tso_fill_header(card, skb);
-        qeth_tso_set_tcpip_header(card, skb);
-        return hdr;
-}
-
-static inline int
-qeth_tso_get_queue_buffer(struct qeth_qdio_out_q *queue)
-{
-        struct qeth_qdio_out_buffer *buffer;
-        int flush_cnt = 0;
-
-        QETH_DBF_TEXT(trace, 5, "tsobuf");
-
-        /* force to non-packing*/
-        if (queue->do_pack)
-                queue->do_pack = 0;
-        buffer = &queue->bufs[queue->next_buf_to_fill];
-        /* get a new buffer if current is already in use*/
-        if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
-            (buffer->next_element_to_fill > 0)) {
-                atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
-                queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
-                                          QDIO_MAX_BUFFERS_PER_Q;
-                flush_cnt++;
-        }
-        return flush_cnt;
-}
-
-static inline void
-__qeth_tso_fill_buffer_frag(struct qeth_qdio_out_buffer *buf,
-                          struct sk_buff *skb)
-{
-        struct skb_frag_struct *frag;
-        struct qdio_buffer *buffer;
-        int fragno, cnt, element;
-        unsigned long addr;
-
-        QETH_DBF_TEXT(trace, 6, "tsfilfrg");
-
-        /*initialize variables ...*/
-        fragno = skb_shinfo(skb)->nr_frags;
-        buffer = buf->buffer;
-        element = buf->next_element_to_fill;
-        /*fill buffer elements .....*/
-        for (cnt = 0; cnt < fragno; cnt++) {
-                frag = &skb_shinfo(skb)->frags[cnt];
-                addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
-                        frag->page_offset;
-                buffer->element[element].addr = (char *)addr;
-                buffer->element[element].length = frag->size;
-                if (cnt < (fragno - 1))
-                        buffer->element[element].flags =
-                                SBAL_FLAGS_MIDDLE_FRAG;
-                else
-                        buffer->element[element].flags =
-                                SBAL_FLAGS_LAST_FRAG;
-                element++;
-        }
-        buf->next_element_to_fill = element;
-}
-
-static inline int
-qeth_tso_fill_buffer(struct qeth_qdio_out_buffer *buf,
-                     struct sk_buff *skb)
-{
-        int length, length_here, element;
-        int hdr_len;
-        struct qdio_buffer *buffer;
-        struct qeth_hdr_tso *hdr;
-        char *data;
-
-        QETH_DBF_TEXT(trace, 3, "tsfilbuf");
-
-        /*increment user count and queue skb ...*/
-        atomic_inc(&skb->users);
-        skb_queue_tail(&buf->skb_list, skb);
-
-        /*initialize all variables...*/
-        buffer = buf->buffer;
-        hdr = (struct qeth_hdr_tso *)skb->data;
-        hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
-        data = skb->data + hdr_len;
-        length = skb->len - hdr_len;
-        element = buf->next_element_to_fill;
-        /*fill first buffer entry only with header information */
-        buffer->element[element].addr = skb->data;
-        buffer->element[element].length = hdr_len;
-        buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
-        buf->next_element_to_fill++;
-
-        if (skb_shinfo(skb)->nr_frags > 0) {
-                 __qeth_tso_fill_buffer_frag(buf, skb);
-                 goto out;
-        }
-
-       /*start filling buffer entries ...*/
-        element++;
-        while (length > 0) {
-                /* length_here is the remaining amount of data in this page */
-                length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
-                if (length < length_here)
-                        length_here = length;
-                buffer->element[element].addr = data;
-                buffer->element[element].length = length_here;
-                length -= length_here;
-                if (!length)
-                        buffer->element[element].flags =
-                                SBAL_FLAGS_LAST_FRAG;
-                 else
-                         buffer->element[element].flags =
-                                 SBAL_FLAGS_MIDDLE_FRAG;
-                data += length_here;
-                element++;
-        }
-        /*set the buffer to primed  ...*/
-        buf->next_element_to_fill = element;
-out:
-        atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
-        return 1;
-}
-
-int
-qeth_tso_send_packet(struct qeth_card *card, struct sk_buff *skb,
-                     struct qeth_qdio_out_q *queue, int ipv, int cast_type)
-{
-        int flush_cnt = 0;
-        struct qeth_hdr_tso *hdr;
-        struct qeth_qdio_out_buffer *buffer;
-        int start_index;
-
-        QETH_DBF_TEXT(trace, 3, "tsosend");
-
-        if (!(hdr = qeth_tso_prepare_packet(card, skb, ipv, cast_type)))
-                return -ENOMEM;
-        /*check if skb fits in one SBAL ...*/
-        if (!(qeth_get_elements_no(card, (void*)hdr, skb)))
-                return -EINVAL;
-        /*lock queue, force switching to non-packing and send it ...*/
-        while (atomic_compare_and_swap(QETH_OUT_Q_UNLOCKED,
-                                       QETH_OUT_Q_LOCKED,
-                                       &queue->state));
-        start_index = queue->next_buf_to_fill;
-        buffer = &queue->bufs[queue->next_buf_to_fill];
-        /*check if card is too busy ...*/
-        if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY){
-                card->stats.tx_dropped++;
-                goto out;
-        }
-        /*let's force to non-packing and get a new SBAL*/
-        flush_cnt += qeth_tso_get_queue_buffer(queue);
-        buffer = &queue->bufs[queue->next_buf_to_fill];
-        if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
-                card->stats.tx_dropped++;
-                goto out;
-        }
-        flush_cnt += qeth_tso_fill_buffer(buffer, skb);
-        queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
-                                   QDIO_MAX_BUFFERS_PER_Q;
-out:
-        atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
-        if (flush_cnt)
-                qeth_flush_buffers(queue, 0, start_index, flush_cnt);
-        /*do some statistics */
-        card->stats.tx_packets++;
-        card->stats.tx_bytes += skb->len;
-        return 0;
-}
diff --git a/drivers/s390/net/qeth_tso.h b/drivers/s390/net/qeth_tso.h
index 83504dee3f57..ad33e6f466f1 100644
--- a/drivers/s390/net/qeth_tso.h
+++ b/drivers/s390/net/qeth_tso.h
@@ -1,5 +1,5 @@
 /*
- * linux/drivers/s390/net/qeth_tso.h ($Revision: 1.4 $)
+ * linux/drivers/s390/net/qeth_tso.h ($Revision: 1.7 $)
  *
  * Header file for qeth TCP Segmentation Offload support.
  *
@@ -7,52 +7,148 @@
  *
  *    Author(s): Frank Pavlic <pavlic@de.ibm.com>
  *
- *    $Revision: 1.4 $   $Date: 2005/03/24 09:04:18 $
+ *    $Revision: 1.7 $   $Date: 2005/05/04 20:19:18 $
  *
  */
 #ifndef __QETH_TSO_H__
 #define __QETH_TSO_H__
 
+#include <linux/skbuff.h>
+#include <linux/tcp.h>
+#include <linux/ip.h>
+#include <linux/ipv6.h>
+#include <net/ip6_checksum.h>
+#include "qeth.h"
+#include "qeth_mpc.h"
 
-extern int
-qeth_tso_send_packet(struct qeth_card *, struct sk_buff *,
-                     struct qeth_qdio_out_q *, int , int);
 
-struct qeth_hdr_ext_tso {
-        __u16 hdr_tot_len;
-        __u8  imb_hdr_no;
-        __u8  reserved;
-        __u8  hdr_type;
-        __u8  hdr_version;
-        __u16 hdr_len;
-        __u32 payload_len;
-        __u16 mss;
-        __u16 dg_hdr_len;
-        __u8  padding[16];
-} __attribute__ ((packed));
+static inline struct qeth_hdr_tso *
+qeth_tso_prepare_skb(struct qeth_card *card, struct sk_buff **skb)
+{
+        QETH_DBF_TEXT(trace, 5, "tsoprsk");
+        return qeth_push_skb(card, skb, sizeof(struct qeth_hdr_tso));
+}
+
+/**
+ * fill header for a TSO packet
+ */
+static inline void
+qeth_tso_fill_header(struct qeth_card *card, struct sk_buff *skb)
+{
+        struct qeth_hdr_tso *hdr;
+        struct tcphdr *tcph;
+        struct iphdr *iph;
+
+        QETH_DBF_TEXT(trace, 5, "tsofhdr");
+
+        hdr  = (struct qeth_hdr_tso *) skb->data;
+        iph  = skb->nh.iph;
+        tcph = skb->h.th;
+        /*fix header to TSO values ...*/
+        hdr->hdr.hdr.l3.id = QETH_HEADER_TYPE_TSO;
+        /*set values which are fix for the first approach ...*/
+        hdr->ext.hdr_tot_len = (__u16) sizeof(struct qeth_hdr_ext_tso);
+        hdr->ext.imb_hdr_no  = 1;
+        hdr->ext.hdr_type    = 1;
+        hdr->ext.hdr_version = 1;
+        hdr->ext.hdr_len     = 28;
+        /*insert non-fix values */
+        hdr->ext.mss = skb_shinfo(skb)->tso_size;
+        hdr->ext.dg_hdr_len = (__u16)(iph->ihl*4 + tcph->doff*4);
+        hdr->ext.payload_len = (__u16)(skb->len - hdr->ext.dg_hdr_len -
+                                       sizeof(struct qeth_hdr_tso));
+}
+
+/**
+ * change some header values as requested by hardware
+ */
+static inline void
+qeth_tso_set_tcpip_header(struct qeth_card *card, struct sk_buff *skb)
+{
+        struct iphdr *iph;
+        struct ipv6hdr *ip6h;
+        struct tcphdr *tcph;
 
-struct qeth_hdr_tso {
-        struct qeth_hdr hdr;    /*hdr->hdr.l3.xxx*/
-        struct qeth_hdr_ext_tso ext;
-} __attribute__ ((packed));
+        iph  = skb->nh.iph;
+        ip6h = skb->nh.ipv6h;
+        tcph = skb->h.th;
 
-/*some helper functions*/
+        tcph->check = 0;
+        if (skb->protocol == ETH_P_IPV6) {
+                ip6h->payload_len = 0;
+                tcph->check = ~csum_ipv6_magic(&ip6h->saddr, &ip6h->daddr,
+                                               0, IPPROTO_TCP, 0);
+                return;
+        }
+        /*OSA want us to set these values ...*/
+        tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
+                                         0, IPPROTO_TCP, 0);
+        iph->tot_len = 0;
+        iph->check = 0;
+}
 
 static inline int
-qeth_get_elements_no(struct qeth_card *card, void *hdr, struct sk_buff *skb)
+qeth_tso_prepare_packet(struct qeth_card *card, struct sk_buff *skb,
+                        int ipv, int cast_type)
+{
+        struct qeth_hdr_tso *hdr;
+
+        QETH_DBF_TEXT(trace, 5, "tsoprep");
+
+        hdr = (struct qeth_hdr_tso *) qeth_tso_prepare_skb(card, &skb);
+        if (hdr == NULL) {
+                QETH_DBF_TEXT(trace, 4, "tsoperr");
+                return -ENOMEM;
+        }
+        memset(hdr, 0, sizeof(struct qeth_hdr_tso));
+        /*fill first 32 bytes of  qdio header as used
+         *FIXME: TSO has two struct members
+         * with different names but same size
+         * */
+        qeth_fill_header(card, &hdr->hdr, skb, ipv, cast_type);
+        qeth_tso_fill_header(card, skb);
+        qeth_tso_set_tcpip_header(card, skb);
+        return 0;
+}
+
+static inline void
+__qeth_fill_buffer_frag(struct sk_buff *skb, struct qdio_buffer *buffer,
+                        int is_tso, int *next_element_to_fill)
 {
-        int elements_needed = 0;
-
-        if (skb_shinfo(skb)->nr_frags > 0)
-                elements_needed = (skb_shinfo(skb)->nr_frags + 1);
-        if (elements_needed == 0 )
-                elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
-                                        + skb->len) >> PAGE_SHIFT);
-        if (elements_needed > QETH_MAX_BUFFER_ELEMENTS(card)){
-                PRINT_ERR("qeth_do_send_packet: invalid size of "
-                          "IP packet. Discarded.");
-                return 0;
+        struct skb_frag_struct *frag;
+        int fragno;
+        unsigned long addr;
+        int element, cnt, dlen;
+        
+        fragno = skb_shinfo(skb)->nr_frags;
+        element = *next_element_to_fill;
+        dlen = 0;
+        
+        if (is_tso)
+                buffer->element[element].flags =
+                        SBAL_FLAGS_MIDDLE_FRAG;
+        else
+                buffer->element[element].flags =
+                        SBAL_FLAGS_FIRST_FRAG;
+        if ( (dlen = (skb->len - skb->data_len)) ) {
+                buffer->element[element].addr = skb->data;
+                buffer->element[element].length = dlen;
+                element++;
+        }
+        for (cnt = 0; cnt < fragno; cnt++) {
+                frag = &skb_shinfo(skb)->frags[cnt];
+                addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
+                        frag->page_offset;
+                buffer->element[element].addr = (char *)addr;
+                buffer->element[element].length = frag->size;
+                if (cnt < (fragno - 1))
+                        buffer->element[element].flags =
+                                SBAL_FLAGS_MIDDLE_FRAG;
+                else
+                        buffer->element[element].flags =
+                                SBAL_FLAGS_LAST_FRAG;
+                element++;
         }
-        return elements_needed;
+        *next_element_to_fill = element;
 }
 #endif /* __QETH_TSO_H__ */
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 5e2a1e8b9039..ee53b227c01e 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -32,6 +32,7 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
+#include <linux/dma-mapping.h>
 #include "scsi.h"
 #include <scsi/scsi_host.h>
 #include <linux/libata.h>
@@ -291,6 +292,8 @@ static void ahci_host_stop(struct ata_host_set *host_set)
 {
         struct ahci_host_priv *hpriv = host_set->private_data;
         kfree(hpriv);
+
+        ata_host_stop(host_set);
 }
 
 static int ahci_port_start(struct ata_port *ap)
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c
index 550c9921691a..7c02b7dc7098 100644
--- a/drivers/scsi/aic7xxx/aic79xx_osm.c
+++ b/drivers/scsi/aic7xxx/aic79xx_osm.c
@@ -2488,7 +2488,7 @@ ahd_linux_dv_thread(void *data)
         sprintf(current->comm, "ahd_dv_%d", ahd->unit);
 #else
         daemonize("ahd_dv_%d", ahd->unit);
-        current->flags |= PF_FREEZE;
+        current->flags |= PF_NOFREEZE;
 #endif
         unlock_kernel();
 
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
index 3867f91ef8c7..54c52349adc5 100644
--- a/drivers/scsi/ata_piix.c
+++ b/drivers/scsi/ata_piix.c
@@ -153,6 +153,7 @@ static struct ata_port_operations piix_pata_ops = {
 
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_operations piix_sata_ops = {
@@ -180,6 +181,7 @@ static struct ata_port_operations piix_sata_ops = {
 
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info piix_port_info[] = {
diff --git a/drivers/scsi/ide-scsi.c b/drivers/scsi/ide-scsi.c
index 2e2486b035dd..83f062ed9082 100644
--- a/drivers/scsi/ide-scsi.c
+++ b/drivers/scsi/ide-scsi.c
@@ -179,8 +179,18 @@ static void idescsi_input_buffers (ide_drive_t *drive, idescsi_pc_t *pc, unsigne
                         return;
                 }
                 count = min(pc->sg->length - pc->b_count, bcount);
-                buf = page_address(pc->sg->page) + pc->sg->offset;
-                drive->hwif->atapi_input_bytes(drive, buf + pc->b_count, count);
+                if (PageHighMem(pc->sg->page)) {
+                        unsigned long flags;
+
+                        local_irq_save(flags);
+                        buf = kmap_atomic(pc->sg->page, KM_IRQ0) + pc->sg->offset;
+                        drive->hwif->atapi_input_bytes(drive, buf + pc->b_count, count);
+                        kunmap_atomic(buf - pc->sg->offset, KM_IRQ0);
+                        local_irq_restore(flags);
+                } else {
+                        buf = page_address(pc->sg->page) + pc->sg->offset;
+                        drive->hwif->atapi_input_bytes(drive, buf + pc->b_count, count);
+                }
                 bcount -= count; pc->b_count += count;
                 if (pc->b_count == pc->sg->length) {
                         pc->sg++;
@@ -201,8 +211,18 @@ static void idescsi_output_buffers (ide_drive_t *drive, idescsi_pc_t *pc, unsign
                         return;
                 }
                 count = min(pc->sg->length - pc->b_count, bcount);
-                buf = page_address(pc->sg->page) + pc->sg->offset;
-                drive->hwif->atapi_output_bytes(drive, buf + pc->b_count, count);
+                if (PageHighMem(pc->sg->page)) {
+                        unsigned long flags;
+
+                        local_irq_save(flags);
+                        buf = kmap_atomic(pc->sg->page, KM_IRQ0) + pc->sg->offset;
+                        drive->hwif->atapi_output_bytes(drive, buf + pc->b_count, count);
+                        kunmap_atomic(buf - pc->sg->offset, KM_IRQ0);
+                        local_irq_restore(flags);
+                } else {
+                        buf = page_address(pc->sg->page) + pc->sg->offset;
+                        drive->hwif->atapi_output_bytes(drive, buf + pc->b_count, count);
+                }
                 bcount -= count; pc->b_count += count;
                 if (pc->b_count == pc->sg->length) {
                         pc->sg++;
@@ -713,7 +733,6 @@ static void idescsi_add_settings(ide_drive_t *drive)
  */
 static void idescsi_setup (ide_drive_t *drive, idescsi_scsi_t *scsi)
 {
-        DRIVER(drive)->busy++;
         if (drive->id && (drive->id->config & 0x0060) == 0x20)
                 set_bit (IDESCSI_DRQ_INTERRUPT, &scsi->flags);
         set_bit(IDESCSI_TRANSFORM, &scsi->transform);
@@ -722,17 +741,16 @@ static void idescsi_setup (ide_drive_t *drive, idescsi_scsi_t *scsi)
         set_bit(IDESCSI_LOG_CMD, &scsi->log);
 #endif /* IDESCSI_DEBUG_LOG */
         idescsi_add_settings(drive);
-        DRIVER(drive)->busy--;
 }
 
-static int idescsi_cleanup (ide_drive_t *drive)
+static int ide_scsi_remove(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         struct Scsi_Host *scsihost = drive->driver_data;
         struct ide_scsi_obj *scsi = scsihost_to_idescsi(scsihost);
         struct gendisk *g = scsi->disk;
 
-        if (ide_unregister_subdriver(drive))
-                return 1;
+        ide_unregister_subdriver(drive, scsi->driver);
 
         ide_unregister_region(g);
 
@@ -746,7 +764,7 @@ static int idescsi_cleanup (ide_drive_t *drive)
         return 0;
 }
 
-static int idescsi_attach(ide_drive_t *drive);
+static int ide_scsi_probe(struct device *);
 
 #ifdef CONFIG_PROC_FS
 static ide_proc_entry_t idescsi_proc[] = {
@@ -757,24 +775,22 @@ static ide_proc_entry_t idescsi_proc[] = {
 # define idescsi_proc   NULL
 #endif
 
-/*
- *      IDE subdriver functions, registered with ide.c
- */
 static ide_driver_t idescsi_driver = {
         .owner                  = THIS_MODULE,
-        .name                   = "ide-scsi",
+        .gen_driver = {
+                .name           = "ide-scsi",
+                .bus            = &ide_bus_type,
+                .probe          = ide_scsi_probe,
+                .remove         = ide_scsi_remove,
+        },
         .version                = IDESCSI_VERSION,
         .media                  = ide_scsi,
-        .busy                   = 0,
         .supports_dsc_overlap   = 0,
         .proc                   = idescsi_proc,
-        .attach                 = idescsi_attach,
-        .cleanup                = idescsi_cleanup,
         .do_request             = idescsi_do_request,
         .end_request            = idescsi_end_request,
         .error                  = idescsi_atapi_error,
         .abort                  = idescsi_atapi_abort,
-        .drives                 = LIST_HEAD_INIT(idescsi_driver.drives),
 };
 
 static int idescsi_ide_open(struct inode *inode, struct file *filp)
@@ -821,8 +837,6 @@ static struct block_device_operations idescsi_ops = {
         .ioctl          = idescsi_ide_ioctl,
 };
 
-static int idescsi_attach(ide_drive_t *drive);
-
 static int idescsi_slave_configure(struct scsi_device * sdp)
 {
         /* Configure detected device */
@@ -1095,8 +1109,9 @@ static struct scsi_host_template idescsi_template = {
         .proc_name              = "ide-scsi",
 };
 
-static int idescsi_attach(ide_drive_t *drive)
+static int ide_scsi_probe(struct device *dev)
 {
+        ide_drive_t *drive = to_ide_device(dev);
         idescsi_scsi_t *idescsi;
         struct Scsi_Host *host;
         struct gendisk *g;
@@ -1112,7 +1127,7 @@ static int idescsi_attach(ide_drive_t *drive)
             !drive->present ||
             drive->media == ide_disk ||
             !(host = scsi_host_alloc(&idescsi_template,sizeof(idescsi_scsi_t))))
-                return 1;
+                return -ENODEV;
 
         g = alloc_disk(1 << PARTN_BITS);
         if (!g)
@@ -1138,20 +1153,19 @@ static int idescsi_attach(ide_drive_t *drive)
         idescsi->host = host;
         idescsi->disk = g;
         g->private_data = &idescsi->driver;
-        err = ide_register_subdriver(drive, &idescsi_driver);
+        ide_register_subdriver(drive, &idescsi_driver);
+        err = 0;
+        idescsi_setup(drive, idescsi);
+        g->fops = &idescsi_ops;
+        ide_register_region(g);
+        err = scsi_add_host(host, &drive->gendev);
         if (!err) {
-                idescsi_setup (drive, idescsi);
-                g->fops = &idescsi_ops;
-                ide_register_region(g);
-                err = scsi_add_host(host, &drive->gendev);
-                if (!err) {
-                        scsi_scan_host(host);
-                        return 0;
-                }
-                /* fall through on error */
-                ide_unregister_region(g);
-                ide_unregister_subdriver(drive);
+                scsi_scan_host(host);
+                return 0;
         }
+        /* fall through on error */
+        ide_unregister_region(g);
+        ide_unregister_subdriver(drive, &idescsi_driver);
 
         put_disk(g);
 out_host_put:
@@ -1161,12 +1175,12 @@ out_host_put:
 
 static int __init init_idescsi_module(void)
 {
-        return ide_register_driver(&idescsi_driver);
+        return driver_register(&idescsi_driver.gen_driver);
 }
 
 static void __exit exit_idescsi_module(void)
 {
-        ide_unregister_driver(&idescsi_driver);
+        driver_unregister(&idescsi_driver.gen_driver);
 }
 
 module_init(init_idescsi_module);
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index ee9b96da841e..30a88f0e7bd6 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -2071,7 +2071,7 @@ void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
         sg = qc->sg;
         sg->page = virt_to_page(buf);
         sg->offset = (unsigned long) buf & ~PAGE_MASK;
-        sg_dma_len(sg) = buflen;
+        sg->length = buflen;
 }
 
 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
@@ -2101,11 +2101,12 @@ static int ata_sg_setup_one(struct ata_queued_cmd *qc)
         dma_addr_t dma_address;
 
         dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
-                                     sg_dma_len(sg), dir);
+                                     sg->length, dir);
         if (dma_mapping_error(dma_address))
                 return -1;
 
         sg_dma_address(sg) = dma_address;
+        sg_dma_len(sg) = sg->length;
 
         DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
                 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
@@ -2310,7 +2311,7 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
         qc->cursect++;
         qc->cursg_ofs++;
 
-        if ((qc->cursg_ofs * ATA_SECT_SIZE) == sg_dma_len(&sg[qc->cursg])) {
+        if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
                 qc->cursg++;
                 qc->cursg_ofs = 0;
         }
@@ -2347,7 +2348,7 @@ next_page:
         page = nth_page(page, (offset >> PAGE_SHIFT));
         offset %= PAGE_SIZE;
 
-        count = min(sg_dma_len(sg) - qc->cursg_ofs, bytes);
+        count = min(sg->length - qc->cursg_ofs, bytes);
 
         /* don't cross page boundaries */
         count = min(count, (unsigned int)PAGE_SIZE - offset);
@@ -2358,7 +2359,7 @@ next_page:
         qc->curbytes += count;
         qc->cursg_ofs += count;
 
-        if (qc->cursg_ofs == sg_dma_len(sg)) {
+        if (qc->cursg_ofs == sg->length) {
                 qc->cursg++;
                 qc->cursg_ofs = 0;
         }
@@ -2371,7 +2372,7 @@ next_page:
         kunmap(page);
 
         if (bytes) {
-                if (qc->cursg_ofs < sg_dma_len(sg))
+                if (qc->cursg_ofs < sg->length)
                         goto next_page;
                 goto next_sg;
         }
@@ -3321,6 +3322,13 @@ void ata_port_stop (struct ata_port *ap)
         dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
 }
 
+void ata_host_stop (struct ata_host_set *host_set)
+{
+        if (host_set->mmio_base)
+                iounmap(host_set->mmio_base);
+}
+
+
 /**
  *      ata_host_remove - Unregister SCSI host structure with upper layers
  *      @ap: Port to unregister
@@ -3877,10 +3885,6 @@ void ata_pci_remove_one (struct pci_dev *pdev)
         }
 
         free_irq(host_set->irq, host_set);
-        if (host_set->ops->host_stop)
-                host_set->ops->host_stop(host_set);
-        if (host_set->mmio_base)
-                iounmap(host_set->mmio_base);
 
         for (i = 0; i < host_set->n_ports; i++) {
                 ap = host_set->ports[i];
@@ -3899,6 +3903,9 @@ void ata_pci_remove_one (struct pci_dev *pdev)
                 scsi_host_put(ap->host);
         }
 
+        if (host_set->ops->host_stop)
+                host_set->ops->host_stop(host_set);
+
         kfree(host_set);
 
         pci_release_regions(pdev);
@@ -3996,6 +4003,7 @@ EXPORT_SYMBOL_GPL(ata_chk_err);
 EXPORT_SYMBOL_GPL(ata_exec_command);
 EXPORT_SYMBOL_GPL(ata_port_start);
 EXPORT_SYMBOL_GPL(ata_port_stop);
+EXPORT_SYMBOL_GPL(ata_host_stop);
 EXPORT_SYMBOL_GPL(ata_interrupt);
 EXPORT_SYMBOL_GPL(ata_qc_prep);
 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
index 6518226b8f87..d90430bbb0de 100644
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -26,7 +26,7 @@
 #define __LIBATA_H__
 
 #define DRV_NAME        "libata"
-#define DRV_VERSION     "1.10"  /* must be exactly four chars */
+#define DRV_VERSION     "1.11"  /* must be exactly four chars */
 
 struct ata_scsi_args {
         u16                     *id;
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c
index 69009f853a49..b0403ccd8a25 100644
--- a/drivers/scsi/sata_nv.c
+++ b/drivers/scsi/sata_nv.c
@@ -329,6 +329,8 @@ static void nv_host_stop (struct ata_host_set *host_set)
                 host->host_desc->disable_hotplug(host_set);
 
         kfree(host);
+
+        ata_host_stop(host_set);
 }
 
 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c
index c4e9e0298122..b18c90582e67 100644
--- a/drivers/scsi/sata_promise.c
+++ b/drivers/scsi/sata_promise.c
@@ -122,6 +122,7 @@ static struct ata_port_operations pdc_ata_ops = {
         .scr_write              = pdc_sata_scr_write,
         .port_start             = pdc_port_start,
         .port_stop              = pdc_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info pdc_port_info[] = {
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
index dfd362104717..1383e8a28d72 100644
--- a/drivers/scsi/sata_qstor.c
+++ b/drivers/scsi/sata_qstor.c
@@ -536,6 +536,8 @@ static void qs_host_stop(struct ata_host_set *host_set)
 
         writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */
         writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
+
+        ata_host_stop(host_set);
 }
 
 static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index 2b2ff48be396..238580d244e6 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -161,6 +161,7 @@ static struct ata_port_operations sil_ops = {
         .scr_write              = sil_scr_write,
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info sil_port_info[] = {
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c
index 5105ddd08447..e418b89c6b9d 100644
--- a/drivers/scsi/sata_sis.c
+++ b/drivers/scsi/sata_sis.c
@@ -114,6 +114,7 @@ static struct ata_port_operations sis_ops = {
         .scr_write              = sis_scr_write,
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info sis_port_info = {
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
index 05075bd3a893..edef1fa969fc 100644
--- a/drivers/scsi/sata_svw.c
+++ b/drivers/scsi/sata_svw.c
@@ -313,6 +313,7 @@ static struct ata_port_operations k2_sata_ops = {
         .scr_write              = k2_sata_scr_write,
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c
index 70118650c461..140cea05de3f 100644
--- a/drivers/scsi/sata_sx4.c
+++ b/drivers/scsi/sata_sx4.c
@@ -245,6 +245,8 @@ static void pdc20621_host_stop(struct ata_host_set *host_set)
 
         iounmap(dimm_mmio);
         kfree(hpriv);
+
+        ata_host_stop(host_set);
 }
 
 static int pdc_port_start(struct ata_port *ap)
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c
index 0bff4f475f26..a71fb54eebd3 100644
--- a/drivers/scsi/sata_uli.c
+++ b/drivers/scsi/sata_uli.c
@@ -113,6 +113,7 @@ static struct ata_port_operations uli_ops = {
 
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info uli_port_info = {
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
index 3a7830667277..f43183c19a12 100644
--- a/drivers/scsi/sata_via.c
+++ b/drivers/scsi/sata_via.c
@@ -134,6 +134,7 @@ static struct ata_port_operations svia_sata_ops = {
 
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static struct ata_port_info svia_port_info = {
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index 2c28f0ad73c2..c5e09dc6f3de 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -21,6 +21,7 @@
 #include <linux/blkdev.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
 #include "scsi.h"
 #include <scsi/scsi_host.h>
 #include <linux/libata.h>
@@ -230,6 +231,7 @@ static struct ata_port_operations vsc_sata_ops = {
         .scr_write              = vsc_sata_scr_write,
         .port_start             = ata_port_start,
         .port_stop              = ata_port_stop,
+        .host_stop              = ata_host_stop,
 };
 
 static void __devinit vsc_sata_setup_port(struct ata_ioports *port, unsigned long base)
diff --git a/drivers/usb/media/pwc/Makefile b/drivers/usb/media/pwc/Makefile
index e0b41ed4407f..2d93a775011a 100644
--- a/drivers/usb/media/pwc/Makefile
+++ b/drivers/usb/media/pwc/Makefile
@@ -1,6 +1,6 @@
 ifneq ($(KERNELRELEASE),)
 
-pwc-objs        := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-dec1.o pwc-dec23.o pwc-kiara.o pwc-timon.o
+pwc-objs        := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o pwc-timon.o pwc-kiara.o
 
 obj-$(CONFIG_USB_PWC) += pwc.o
 
diff --git a/drivers/usb/media/pwc/pwc-ctrl.c b/drivers/usb/media/pwc/pwc-ctrl.c
index 42ec468d52d6..53099190952c 100644
--- a/drivers/usb/media/pwc/pwc-ctrl.c
+++ b/drivers/usb/media/pwc/pwc-ctrl.c
@@ -48,8 +48,6 @@
 #include "pwc-uncompress.h"
 #include "pwc-kiara.h"
 #include "pwc-timon.h"
-#include "pwc-dec1.h"
-#include "pwc-dec23.h"
 
 /* Request types: video */
 #define SET_LUM_CTL                     0x01
@@ -246,7 +244,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra
            switch(pdev->type) {
              case 645:
              case 646:
-               pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data);
+/*             pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
                break;
 
              case 675:
@@ -256,7 +254,7 @@ static inline int set_video_mode_Nala(struct pwc_device *pdev, int size, int fra
              case 730:
              case 740:
              case 750:
-               pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
+/*             pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
                break;
            }
         }
@@ -318,8 +316,8 @@ static inline int set_video_mode_Timon(struct pwc_device *pdev, int size, int fr
         if (ret < 0)
                 return ret;
 
-        if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
-           pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
+/*      if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
+           pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
 
         pdev->cmd_len = 13;
         memcpy(pdev->cmd_buf, buf, 13);
@@ -397,8 +395,8 @@ static inline int set_video_mode_Kiara(struct pwc_device *pdev, int size, int fr
         if (ret < 0)
                 return ret;
 
-        if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
-          pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data);
+/*      if (pChoose->bandlength > 0 && pdev->vpalette != VIDEO_PALETTE_RAW)
+          pwc_dec23_init(pdev->type, pdev->release, buf, pdev->decompress_data); */
 
         pdev->cmd_len = 12;
         memcpy(pdev->cmd_buf, buf, 12);
diff --git a/drivers/usb/media/pwc/pwc-dec1.c b/drivers/usb/media/pwc/pwc-dec1.c
deleted file mode 100644
index 57d03d9178f6..000000000000
--- a/drivers/usb/media/pwc/pwc-dec1.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/* Linux driver for Philips webcam
-   Decompression for chipset version 1
-   (C) 2004      Luc Saillard (luc@saillard.org)
-
-   NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
-   driver and thus may have bugs that are not present in the original version.
-   Please send bug reports and support requests to <luc@saillard.org>.
-   The decompression routines have been implemented by reverse-engineering the
-   Nemosoft binary pwcx module. Caveat emptor.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-
-
-#include "pwc-dec1.h"
-
-
-void pwc_dec1_init(int type, int release, void *buffer, void *table)
-{
-
-}
-
-void pwc_dec1_exit(void)
-{
-
-
-
-}
-
diff --git a/drivers/usb/media/pwc/pwc-dec1.h b/drivers/usb/media/pwc/pwc-dec1.h
deleted file mode 100644
index a7ffd9c45a2c..000000000000
--- a/drivers/usb/media/pwc/pwc-dec1.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Linux driver for Philips webcam
-   (C) 2004      Luc Saillard (luc@saillard.org)
-
-   NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
-   driver and thus may have bugs that are not present in the original version.
-   Please send bug reports and support requests to <luc@saillard.org>.
-   The decompression routines have been implemented by reverse-engineering the
-   Nemosoft binary pwcx module. Caveat emptor.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-
-
-#ifndef PWC_DEC1_H
-#define PWC_DEC1_H
-
-void pwc_dec1_init(int type, int release, void *buffer, void *private_data);
-void pwc_dec1_exit(void);
-
-#endif
-
-
-
diff --git a/drivers/usb/media/pwc/pwc-dec23.c b/drivers/usb/media/pwc/pwc-dec23.c
deleted file mode 100644
index 98fa3f7a9eff..000000000000
--- a/drivers/usb/media/pwc/pwc-dec23.c
+++ /dev/null
@@ -1,623 +0,0 @@
-/* Linux driver for Philips webcam
-   Decompression for chipset version 2 et 3
-   (C) 2004      Luc Saillard (luc@saillard.org)
-
-   NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
-   driver and thus may have bugs that are not present in the original version.
-   Please send bug reports and support requests to <luc@saillard.org>.
-   The decompression routines have been implemented by reverse-engineering the
-   Nemosoft binary pwcx module. Caveat emptor.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#include "pwc-timon.h"
-#include "pwc-kiara.h"
-#include "pwc-dec23.h"
-#include "pwc-ioctl.h"
-
-#include <linux/string.h>
-
-/****
- *
- *
- *
- */
-
-
-static void fill_table_a000(unsigned int *p)
-{
-  static unsigned int initial_values[12] = {
-     0xFFAD9B00, 0xFFDDEE00, 0x00221200, 0x00526500,
-     0xFFC21E00, 0x003DE200, 0xFF924B80, 0xFFD2A300,
-     0x002D5D00, 0x006DB480, 0xFFED3E00, 0x0012C200
-  };
-  static unsigned int values_derivated[12] = {
-     0x0000A4CA, 0x00004424, 0xFFFFBBDC, 0xFFFF5B36,
-     0x00007BC4, 0xFFFF843C, 0x0000DB69, 0x00005ABA,
-     0xFFFFA546, 0xFFFF2497, 0x00002584, 0xFFFFDA7C
-  };
-  unsigned int temp_values[12];
-  int i,j;
-
-  memcpy(temp_values,initial_values,sizeof(initial_values));
-  for (i=0;i<256;i++)
-   {
-     for (j=0;j<12;j++)
-      {
-        *p++ = temp_values[j];
-        temp_values[j] += values_derivated[j];
-      }
-   }
-}
-
-static void fill_table_d000(unsigned char *p)
-{
-  int bit,byte;
-
-  for (bit=0; bit<8; bit++)
-   {
-     unsigned char bitpower = 1<<bit;
-     unsigned char mask = bitpower-1;
-     for (byte=0; byte<256; byte++)
-      {
-        if (byte & bitpower)
-          *p++ = -(byte & mask);
-        else
-          *p++ = (byte & mask);
-      }
-   }
-}
-
-/*
- *
- * Kiara: 0 <= ver <= 7
- * Timon: 0 <= ver <= 15
- *
- */
-static void fill_table_color(unsigned int version, const unsigned int *romtable, 
-    unsigned char *p0004, 
-    unsigned char *p8004)
-{
-  const unsigned int *table;
-  unsigned char *p0, *p8;
-  int i,j,k;
-  int dl,bit,pw;
-
-  romtable += version*256;
-
-  for (i=0; i<2; i++)
-   {
-     table = romtable + i*128;
-
-     for (dl=0; dl<16; dl++)
-      {
-        p0 = p0004 + (i<<14) + (dl<<10);
-        p8 = p8004 + (i<<12) + (dl<<8);
-
-        for (j=0; j<8; j++ , table++, p0+=128)
-         {
-           for (k=0; k<16; k++)
-            {
-              if (k==0)
-                bit=1;
-              else if (k>=1 && k<3)
-                bit=(table[0]>>15)&7;
-              else if (k>=3 && k<6)
-                bit=(table[0]>>12)&7;
-              else if (k>=6 && k<10)
-                bit=(table[0]>>9)&7;
-              else if (k>=10 && k<13)
-                bit=(table[0]>>6)&7;
-              else if (k>=13 && k<15)
-                bit=(table[0]>>3)&7;
-              else
-                bit=(table[0])&7;
-              if (k == 0)
-                *(unsigned char *)p8++ = 8;
-              else
-                *(unsigned char *)p8++ = j - bit;
-              *(unsigned char *)p8++ = bit;
-
-              pw = 1<<bit;
-              p0[k+0x00] = (1*pw)  + 0x80;
-              p0[k+0x10] = (2*pw)  + 0x80;
-              p0[k+0x20] = (3*pw)  + 0x80;
-              p0[k+0x30] = (4*pw)  + 0x80;
-              p0[k+0x40] = (-pw)   + 0x80;
-              p0[k+0x50] = (2*-pw) + 0x80;
-              p0[k+0x60] = (3*-pw) + 0x80;
-              p0[k+0x70] = (4*-pw) + 0x80;
-            } /* end of for (k=0; k<16; k++, p8++) */
-         } /* end of for (j=0; j<8; j++ , table++) */
-      } /* end of for (dl=0; dl<16; dl++) */
-   } /* end of for (i=0; i<2; i++) */
-}
-
-/*
- * precision = (pdev->xx + pdev->yy)
- *
- */
-static void fill_table_dc00_d800(unsigned int precision, unsigned int *pdc00, unsigned int *pd800)
-{
-  int i;
-  unsigned int offset1, offset2;
- 
-  for(i=0,offset1=0x4000, offset2=0; i<256 ; i++,offset1+=0x7BC4, offset2+=0x7BC4)
-   {
-     unsigned int msb = offset1 >> 15;
-
-     if ( msb > 255)
-      {
-        if (msb)
-          msb=0;
-        else
-          msb=255;
-      }
-
-     *pdc00++ = msb << precision;
-     *pd800++ = offset2;
-   }
-
-}
-
-/*
- * struct {
- *   unsigned char op;      // operation to execute
- *   unsigned char bits;    // bits use to perform operation
- *   unsigned char offset1; // offset to add to access in the table_0004 % 16
- *   unsigned char offset2; // offset to add to access in the table_0004
- * }
- *
- */
-static unsigned int table_ops[] = {
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x30,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x10,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x01,0x70,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x20, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x00, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x10, 0x00,0x06,0x02,0x50,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x01,0x60, 0x01,0x00,0x00,0x00,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x00, 0x00,0x04,0x01,0x50, 0x00,0x05,0x02,0x40,
-0x02,0x00,0x00,0x00, 0x00,0x03,0x01,0x40, 0x00,0x05,0x03,0x40, 0x01,0x00,0x00,0x00
-};
-
-/*
- * TODO: multiply by 4 all values
- *
- */
-static unsigned int MulIdx[256] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3,
- 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
- 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4,
- 6, 7, 8, 9, 7,10,11, 8, 8,11,10, 7, 9, 8, 7, 6,
- 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4, 4, 5, 5, 4,
- 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3, 0, 2,
- 0, 3, 3, 0, 1, 2, 2, 1, 2, 1, 1, 2, 3, 0, 0, 3,
- 0, 1, 2, 3, 3, 2, 1, 0, 3, 2, 1, 0, 0, 1, 2, 3,
- 1, 1, 1, 1, 3, 3, 3, 3, 0, 0, 0, 0, 2, 2, 2, 2,
- 7,10,11, 8, 9, 8, 7, 6, 6, 7, 8, 9, 8,11,10, 7,
- 4, 5, 5, 4, 5, 4, 4, 5, 5, 4, 4, 5, 4, 5, 5, 4,
- 7, 9, 6, 8,10, 8, 7,11,11, 7, 8,10, 8, 6, 9, 7,
- 1, 3, 0, 2, 2, 0, 3, 1, 2, 0, 3, 1, 1, 3, 0, 2,
- 1, 2, 2, 1, 3, 0, 0, 3, 0, 3, 3, 0, 2, 1, 1, 2,
-10, 8, 7,11, 8, 6, 9, 7, 7, 9, 6, 8,11, 7, 8,10
-};
-
-
-
-void pwc_dec23_init(int type, int release, unsigned char *mode, void *data)
-{
-  int flags;
-  struct pwc_dec23_private *pdev = data;
-  release = release;
-
-  switch (type)
-   {
-    case 720:
-    case 730:
-    case 740:
-    case 750:
-      flags = mode[2]&0x18;     /* our: flags = 8, mode[2]==e8 */
-      if (flags==8)
-        pdev->zz = 7;
-      else if (flags==0x10)
-        pdev->zz = 8;
-      else
-        pdev->zz = 6;
-      flags = mode[2]>>5;       /* our: 7 */
-
-      fill_table_color(flags, (unsigned int *)KiaraRomTable, pdev->table_0004, pdev->table_8004);
-      break;
-
-
-    case 675:
-    case 680:
-    case 690:
-      flags = mode[2]&6;
-      if (flags==2)
-        pdev->zz = 7;
-      else if (flags==4)
-        pdev->zz = 8;
-      else
-        pdev->zz = 6;
-      flags = mode[2]>>3;
-
-      fill_table_color(flags, (unsigned int *)TimonRomTable, pdev->table_0004, pdev->table_8004);
-      break;
-
-    default:
-      /* Not supported */
-      return;
-   }
-
-  /* * * * ** */
-  pdev->xx = 8 - pdev->zz;
-  pdev->yy = 15 - pdev->xx;
-  pdev->zzmask = 0xFF>>pdev->xx;
-  //pdev->zzmask = (1U<<pdev->zz)-1;
-
-
-  fill_table_dc00_d800(pdev->xx + pdev->yy, pdev->table_dc00, pdev->table_d800);
-  fill_table_a000(pdev->table_a004);
-  fill_table_d000(pdev->table_d004);
-}
-
-
-/*
- * To manage the stream, we keep in a 32 bits variables,
- * the next bits in the stream. fill_reservoir() add to
- * the reservoir at least wanted nbits.
- *
- *
- */
-#define fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted) do { \
-   while (nbits_in_reservoir<nbits_wanted) \
-    { \
-      reservoir |= (*(stream)++) << nbits_in_reservoir; \
-      nbits_in_reservoir+=8; \
-    } \
-}  while(0);
-
-#define get_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted,result) do { \
-   fill_nbits(reservoir,nbits_in_reservoir,stream,nbits_wanted); \
-   result = (reservoir) & ((1U<<nbits_wanted)-1); \
-   reservoir >>= nbits_wanted; \
-   nbits_in_reservoir -= nbits_wanted; \
-}  while(0);
-
-
-
-static void DecompressBand23(const struct pwc_dec23_private *pdev,
-                             const unsigned char *rawyuv,
-                             unsigned char *planar_y,
-                             unsigned char *planar_u,
-                             unsigned char *planar_v,
-                             unsigned int image_x,              /* aka number of pixels wanted ??? */
-                             unsigned int pixels_per_line,      /* aka number of pixels per line */
-                             int flags)
-{
-
-
-  unsigned int reservoir, nbits_in_reservoir;
-  int first_4_bits;
-  unsigned int bytes_per_channel;
-  int line_size;        /* size of the line (4Y+U+V) */
-  int passes;
-  const unsigned char *ptable0004, *ptable8004;
-
-  int even_line;
-  unsigned int temp_colors[16];
-  int nblocks;
-
-  const unsigned char *stream;
-  unsigned char *dest_y, *dest_u=NULL, *dest_v=NULL;
-  unsigned int offset_to_plane_u, offset_to_plane_v;
-
-  int i;
-
-
-  reservoir = 0;
-  nbits_in_reservoir = 0;
-  stream = rawyuv+1;    /* The first byte of the stream is skipped */
-  even_line = 1;
-
-  get_nbits(reservoir,nbits_in_reservoir,stream,4,first_4_bits);
-
-  line_size = pixels_per_line*3;
-
-  for (passes=0;passes<2;passes++)
-   {
-     if (passes==0)
-      {
-        bytes_per_channel = pixels_per_line;
-        dest_y = planar_y;
-        nblocks = image_x/4;
-      }
-     else
-      {
-        /* Format planar: All Y, then all U, then all V */
-        bytes_per_channel = pixels_per_line/2;
-        dest_u = planar_u;
-        dest_v = planar_v;
-        dest_y = dest_u;
-        nblocks = image_x/8;
-      }
-
-     offset_to_plane_u = bytes_per_channel*2;
-     offset_to_plane_v = bytes_per_channel*3;
-     /*
-     printf("bytes_per_channel = %d\n",bytes_per_channel);
-     printf("offset_to_plane_u = %d\n",offset_to_plane_u);
-     printf("offset_to_plane_v = %d\n",offset_to_plane_v);
-     */
-
-     while (nblocks-->0)
-      {
-        unsigned int gray_index;
-
-        fill_nbits(reservoir,nbits_in_reservoir,stream,16);
-        gray_index = reservoir & pdev->zzmask;
-        reservoir >>= pdev->zz;
-        nbits_in_reservoir -= pdev->zz;
-
-        fill_nbits(reservoir,nbits_in_reservoir,stream,2);
-
-        if ( (reservoir & 3) == 0)
-         {
-           reservoir>>=2;
-           nbits_in_reservoir-=2;
-           for (i=0;i<16;i++)
-             temp_colors[i] = pdev->table_dc00[gray_index];
-
-         }
-        else
-         {
-           unsigned int channel_v, offset1;
-
-           /* swap bit 0 and 2 of offset_OR */
-           channel_v = ((reservoir & 1) << 2) | (reservoir & 2) | ((reservoir & 4)>>2);
-           reservoir>>=3;
-           nbits_in_reservoir-=3;
-
-           for (i=0;i<16;i++)
-             temp_colors[i] = pdev->table_d800[gray_index];
-
-           ptable0004 = pdev->table_0004 + (passes*16384) + (first_4_bits*1024) + (channel_v*128);
-           ptable8004 = pdev->table_8004 + (passes*4096)  + (first_4_bits*256)  + (channel_v*32);
-
-           offset1 = 0;
-           while(1) 
-            {
-              unsigned int index_in_table_ops, op, rows=0;
-              fill_nbits(reservoir,nbits_in_reservoir,stream,16);
-
-              /* mode is 0,1 or 2 */
-              index_in_table_ops = (reservoir&0x3F);
-              op = table_ops[ index_in_table_ops*4 ];
-              if (op == 2)
-               {
-                 reservoir >>= 2;
-                 nbits_in_reservoir -= 2;
-                 break; /* exit the while(1) */
-               }
-              if (op == 0)
-               {
-                 unsigned int shift;
-
-                 offset1 = (offset1 + table_ops[index_in_table_ops*4+2]) & 0x0F;
-                 shift = table_ops[ index_in_table_ops*4+1 ];
-                 reservoir >>= shift;
-                 nbits_in_reservoir -= shift;
-                 rows = ptable0004[ offset1 + table_ops[index_in_table_ops*4+3] ];
-               }
-              if (op == 1)
-               {
-                  /* 10bits [ xxxx xxxx yyyy 000 ]
-                   * yyy => offset in the table8004
-                   * xxx => offset in the tabled004
-                   */
-                 unsigned int mask, shift;
-                 unsigned int col1, row1, total_bits;
-
-                 offset1 = (offset1 + ((reservoir>>3)&0x0F)+1) & 0x0F;
-
-                 col1 = (reservoir>>7) & 0xFF;
-                 row1 = ptable8004 [ offset1*2 ];
-
-                 /* Bit mask table */
-                 mask = pdev->table_d004[ (row1<<8) + col1 ];
-                 shift = ptable8004 [ offset1*2 + 1];
-                 rows = ((mask << shift) + 0x80) & 0xFF;
-
-                 total_bits = row1 + 8;
-                 reservoir >>= total_bits;
-                 nbits_in_reservoir -= total_bits;
-               }
-               {
-                 const unsigned int *table_a004 = pdev->table_a004 + rows*12;
-                 unsigned int *poffset = MulIdx + offset1*16;   /* 64/4 (int) */
-                 for (i=0;i<16;i++)
-                  {
-                    temp_colors[i] += table_a004[ *poffset ];
-                    poffset++;
-                  }
-               }
-           }
-         }
-#define USE_SIGNED_INT_FOR_COLOR
-#ifdef USE_SIGNED_INT_FOR_COLOR
-#  define CLAMP(x) ((x)>255?255:((x)<0?0:x))
-#else
-#  define CLAMP(x) ((x)>255?255:x)
-#endif
-
-        if (passes == 0)
-         {
-#ifdef USE_SIGNED_INT_FOR_COLOR
-           const int *c = temp_colors;
-#else
-           const unsigned int *c = temp_colors;
-#endif
-           unsigned char *d;
-
-           d = dest_y;
-           for (i=0;i<4;i++,c++)
-             *d++ = CLAMP((*c) >> pdev->yy);
-
-           d = dest_y + bytes_per_channel;
-           for (i=0;i<4;i++,c++)
-             *d++ = CLAMP((*c) >> pdev->yy);
-
-           d = dest_y + offset_to_plane_u;
-           for (i=0;i<4;i++,c++)
-             *d++ = CLAMP((*c) >> pdev->yy);
-
-           d = dest_y + offset_to_plane_v;
-           for (i=0;i<4;i++,c++)
-             *d++ = CLAMP((*c) >> pdev->yy);
-
-           dest_y += 4;
-         }
-        else if (passes == 1)
-         {
-#ifdef USE_SIGNED_INT_FOR_COLOR
-           int *c1 = temp_colors;
-           int *c2 = temp_colors+4;
-#else
-           unsigned int *c1 = temp_colors;
-           unsigned int *c2 = temp_colors+4;
-#endif
-           unsigned char *d;
-
-           d = dest_y;
-           for (i=0;i<4;i++,c1++,c2++)
-            {
-              *d++ = CLAMP((*c1) >> pdev->yy);
-              *d++ = CLAMP((*c2) >> pdev->yy);
-            }
-           c1 = temp_colors+12;
-           //c2 = temp_colors+8;
-           d = dest_y + bytes_per_channel;
-           for (i=0;i<4;i++,c1++,c2++)
-            {
-              *d++ = CLAMP((*c1) >> pdev->yy);
-              *d++ = CLAMP((*c2) >> pdev->yy);
-            }
-
-           if (even_line)       /* Each line, swap u/v */
-            {
-              even_line=0;
-              dest_y = dest_v;
-              dest_u += 8;
-            }
-           else
-            {
-              even_line=1;
-              dest_y = dest_u;
-              dest_v += 8;
-            }
-         }
-
-      } /* end of while (nblocks-->0) */
-
-   } /* end of for (passes=0;passes<2;passes++) */
-
-}
-
-
-/**
- *
- * image: size of the image wanted
- * view : size of the image returned by the camera
- * offset: (x,y) to displayer image in the view
- *
- * src: raw data
- * dst: image output
- * flags: PWCX_FLAG_PLANAR
- * pdev: private buffer
- * bandlength:
- *
- */
-void pwc_dec23_decompress(const struct pwc_coord *image,
-                            const struct pwc_coord *view,
-                            const struct pwc_coord *offset,
-                            const void *src,
-                            void *dst,
-                            int flags,
-                            const void *data,
-                            int bandlength)
-{
-  const struct pwc_dec23_private *pdev = data;
-  unsigned char *pout, *pout_planar_y=NULL, *pout_planar_u=NULL, *pout_planar_v=NULL;
-  int i,n,stride,pixel_size;
-
-
-  if (flags & PWCX_FLAG_BAYER)
-   {
-     pout = dst + (view->x * offset->y) + offset->x;
-     pixel_size = view->x * 4;
-   }
-  else
-   {
-     n = view->x * view->y;
-
-     /* offset in Y plane */
-     stride = view->x * offset->y;
-     pout_planar_y = dst + stride + offset->x;
-
-     /* offsets in U/V planes */
-     stride = (view->x * offset->y)/4 + offset->x/2;
-     pout_planar_u = dst + n +     + stride;
-     pout_planar_v = dst + n + n/4 + stride;
-
-     pixel_size = view->x * 4;
-   }
-
-
-  for (i=0;i<image->y;i+=4)
-   {
-     if (flags & PWCX_FLAG_BAYER)
-      {
-        //TODO:
-        //DecompressBandBayer(pdev,src,pout,image.x,view->x,flags);
-        src += bandlength;
-        pout += pixel_size;
-      }
-     else
-      {
-        DecompressBand23(pdev,src,pout_planar_y,pout_planar_u,pout_planar_v,image->x,view->x,flags);
-        src += bandlength;
-        pout_planar_y += pixel_size;
-        pout_planar_u += view->x;
-        pout_planar_v += view->x;
-      }
-   }
-}
-
-void pwc_dec23_exit(void)
-{
-  /* Do nothing */
-
-}
-
diff --git a/drivers/usb/media/pwc/pwc-dec23.h b/drivers/usb/media/pwc/pwc-dec23.h
deleted file mode 100644
index 5b2aacdefa6c..000000000000
--- a/drivers/usb/media/pwc/pwc-dec23.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/* Linux driver for Philips webcam
-   (C) 2004      Luc Saillard (luc@saillard.org)
-
-   NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx
-   driver and thus may have bugs that are not present in the original version.
-   Please send bug reports and support requests to <luc@saillard.org>.
-   The decompression routines have been implemented by reverse-engineering the
-   Nemosoft binary pwcx module. Caveat emptor.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#ifndef PWC_DEC23_H
-#define PWC_DEC23_H
-
-struct pwc_dec23_private
-{
-  unsigned char xx,yy,zz,zzmask;
-
-  unsigned char table_0004[2*0x4000];
-  unsigned char table_8004[2*0x1000];
-  unsigned int  table_a004[256*12];
-
-  unsigned char table_d004[8*256];
-  unsigned int  table_d800[256];
-  unsigned int  table_dc00[256];
-};
-
-
-void pwc_dec23_init(int type, int release, unsigned char *buffer, void *private_data);
-void pwc_dec23_exit(void);
-void pwc_dec23_decompress(const struct pwc_coord *image,
-                            const struct pwc_coord *view,
-                            const struct pwc_coord *offset,
-                            const void *src,
-                            void *dst,
-                            int flags,
-                            const void *data,
-                            int bandlength);
-
-
-
-#endif
-
-
-
diff --git a/drivers/usb/media/pwc/pwc-if.c b/drivers/usb/media/pwc/pwc-if.c
index cca47f480a8b..5429ff3b9753 100644
--- a/drivers/usb/media/pwc/pwc-if.c
+++ b/drivers/usb/media/pwc/pwc-if.c
@@ -68,8 +68,6 @@
 #include "pwc-ioctl.h"
 #include "pwc-kiara.h"
 #include "pwc-timon.h"
-#include "pwc-dec23.h"
-#include "pwc-dec1.h"
 #include "pwc-uncompress.h"
 
 /* Function prototypes and driver templates */
@@ -322,6 +320,7 @@ static int pwc_allocate_buffers(struct pwc_device *pdev)
           case 730:
           case 740:
           case 750:
+#if 0     
             Trace(TRACE_MEMORY,"private_data(%zu)\n",sizeof(struct pwc_dec23_private));
             kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL);       /* Timon & Kiara */
             break;
@@ -330,6 +329,8 @@ static int pwc_allocate_buffers(struct pwc_device *pdev)
             /* TODO & FIXME */
             kbuf = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL);
             break;
+#endif   
+        ;
          }
         if (kbuf == NULL) {
            Err("Failed to allocate decompress table.\n");
@@ -1131,11 +1132,11 @@ static int pwc_video_close(struct inode *inode, struct file *file)
           case 730:
           case 740:
           case 750:
-            pwc_dec23_exit();   /* Timon & Kiara */
+/*          pwc_dec23_exit();   *//* Timon & Kiara */
             break;
           case 645:
           case 646:
-            pwc_dec1_exit();
+/*          pwc_dec1_exit(); */
             break;
          }
 
diff --git a/drivers/usb/media/pwc/pwc-kiara.c b/drivers/usb/media/pwc/pwc-kiara.c
index 5485800efd83..c498c68bace1 100644
--- a/drivers/usb/media/pwc/pwc-kiara.c
+++ b/drivers/usb/media/pwc/pwc-kiara.c
@@ -316,576 +316,3 @@ const struct Kiara_table_entry Kiara_table[PSZ_MAX][6][4] =
    },
 };
 
-
-/*
- * Rom table for kiara chips
- *
- * 32 roms tables (one for each resolution ?)
- *  2 tables per roms (one for each passes) (Y, and U&V)
- * 128 bytes per passes
- */
-
-const unsigned int KiaraRomTable [8][2][16][8] =  
-{
- { /* version 0 */
-  { /* version 0, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000001,0x00000001},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x0000124a,0x00009252,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00009252,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009292,0x00009292,0x00009493,0x000124db},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x0000a493,0x000124db,0x000124db,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x000124db,0x000126dc,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 0, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000001,0x00000009,
-    0x00000009,0x00000009,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00001252},
-   {0x00000000,0x00000000,0x00000049,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009252,0x00009292,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009292,0x00009292,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00009292,
-    0x00009492,0x00009493,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009252,0x00009493,
-    0x000126dc,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x000136e4,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 1 */
-  { /* version 1, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000001},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009252,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00009252,
-    0x00009492,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 1, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000009,
-    0x00000049,0x00000009,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000000},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000049,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009252,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009292,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009292,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009292,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x0000924a,0x0000924a,
-    0x00009492,0x00009493,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 2 */
-  { /* version 2, passes 0 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009493,0x00009493,0x0000a49b},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000124db,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x000126dc,0x0001b724,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 2, passes 1 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x0000a49b,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00009252,0x0000a49b,
-    0x0001249b,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 3 */
-  { /* version 3, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000136e4,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 3, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 4 */
-  { /* version 4, passes 0 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00009252,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009252,0x00009493,
-    0x000124db,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009252,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 4, passes 1 */
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000049,0x00000049,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00000249,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009252,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009252,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009493,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 5 */
-  { /* version 5, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 5, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009252,0x00009252,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000126dc,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 6 */
-  { /* version 6, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x00012492,0x000126db,
-    0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 6, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009252,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009292,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 7 */
-  { /* version 7, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x0000a49b,
-    0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b725,0x000124db},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000136e4,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x00012492,0x000136db,
-    0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 7, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x00009492,0x00009292,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000136db,
-    0x0001b724,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000136db,
-    0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00009292,0x000136db,
-    0x0001b724,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x0001c924,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- }
-};
-
diff --git a/drivers/usb/media/pwc/pwc-timon.c b/drivers/usb/media/pwc/pwc-timon.c
index f950a4e5ed96..dee967173d6c 100644
--- a/drivers/usb/media/pwc/pwc-timon.c
+++ b/drivers/usb/media/pwc/pwc-timon.c
@@ -314,1133 +314,3 @@ const struct Timon_table_entry Timon_table[PSZ_MAX][6][4] =
    },
 };
 
-/*
- * 16 versions:
- *   2 tables  (one for Y, and one for U&V)
- *   16 levels of details per tables
- *   8 blocs
- */
-
-const unsigned int TimonRomTable [16][2][16][8] =  
-{
- { /* version 0 */
-  { /* version 0, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000001},
-   {0x00000000,0x00000000,0x00000001,0x00000001,
-    0x00000001,0x00000001,0x00000001,0x00000001},
-   {0x00000000,0x00000000,0x00000001,0x00000001,
-    0x00000001,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000001,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000009,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x00000249,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x0000124a,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 0, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000001,0x00000001,
-    0x00000001,0x00000001,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000009,0x00000001,
-    0x00000001,0x00000009,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000009,
-    0x00000009,0x00000049,0x00000001,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000009,
-    0x00000009,0x00000049,0x00000001,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000249,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 1 */
-  { /* version 1, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000001},
-   {0x00000000,0x00000000,0x00000001,0x00000001,
-    0x00000001,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000009,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00001252},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 1, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000001,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000009,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000001,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000049,0x00000249,0x00000009,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000249,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00000049,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009252,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 2 */
-  { /* version 2, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000001},
-   {0x00000000,0x00000000,0x00000009,0x00000009,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009252,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00009252,
-    0x00009492,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 2, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000009,
-    0x00000049,0x00000009,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000000},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000049,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x0000024a,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009252,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009292,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009292,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009292,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x0000924a,0x0000924a,
-    0x00009492,0x00009493,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 3 */
-  { /* version 3, passes 0 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000001},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000049,0x00000249,
-    0x00000249,0x00000249,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009292,0x00009292,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009292,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00009252,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009292,0x0000a49b,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x0000a49b,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x0001b725,0x000136e4},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 3, passes 1 */
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000},
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000001,0x00000000},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x00000049,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00000001},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009252,0x00009292,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009252,0x00009292,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009493,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009493,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009493,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009292,
-    0x0000a493,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 4 */
-  { /* version 4, passes 0 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00009252,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009493,0x00009493,0x0000a49b},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000124db,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x000126dc,0x0001b724,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 4, passes 1 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x0000a49b,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00009252,0x0000a49b,
-    0x0001249b,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 5 */
-  { /* version 5, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x0000124a,0x00001252,0x00009292},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x0000124a,0x00009292,0x00009292,0x00009493},
-   {0x00000000,0x00000000,0x00000249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x000124db,0x000124db,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000126dc,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 5, passes 1 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x00009493,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x000124db,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009493,0x000124db,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x000124db,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x000126dc,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 6 */
-  { /* version 6, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x0000124a,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000136e4,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x000136e4,0x0001b925,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 6, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x0000a49b,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 7 */
-  { /* version 7, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x0000a49b,0x000124db,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0001249b,0x000126dc,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000126dc,0x0001b724,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001c96e,0x0002496e},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x0001b925,0x0001c96e,0x0002496e},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x0002496d,0x00025bb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 7, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000136e4,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x000136e4,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00012492,0x000126db,
-    0x0001b724,0x0001b925,0x0001b725,0x000136e4},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 8 */
-  { /* version 8, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009292,0x00009493,0x0000a49b,0x000124db},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x000124db,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000136e4},
-   {0x00000000,0x00000000,0x00001249,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000136e4,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b725,0x0001b925},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001c92d},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000126dc,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x00024b76,0x00024b77},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x0001b925,0x00024b76,0x00025bbf},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x000136e4,0x0001c92d,0x00024b76,0x00025bbf},
-   {0x00000000,0x00000000,0x00012492,0x000136db,
-    0x0001b724,0x00024b6d,0x0002ddb6,0x0002efff},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 8, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000126dc,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000136e4,0x0001b724,0x0001b725,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x0001b925,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x0001b925,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x0002496d,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 9 */
-  { /* version 9, passes 0 */
-   {0x00000000,0x00000000,0x00000049,0x00000049,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000249,0x00000249,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x0000124a,0x00009252,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009252,0x00009493,
-    0x000124db,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009252,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 9, passes 1 */
-   {0x00000000,0x00000000,0x00000249,0x00000049,
-    0x00000009,0x00000009,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000049,0x00000049,0x00000009,0x00000009},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00000249,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009252,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009252,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009493,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009252,0x000124db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 10 */
-  { /* version 10, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00000249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x00009493,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x000124db,0x000124db,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0001249b,0x000126dc,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000126dc,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009252,0x0000a49b,
-    0x000124db,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000126dc,0x0001b925,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x000136e4,0x0002496d,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 10, passes 1 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000049,0x00000049,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00000249,0x00000049,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x00009252,0x0000024a,0x00000049},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009493,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009252,
-    0x00009492,0x00009493,0x00001252,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009493,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x00009492,0x00009493,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009493,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009252,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 11 */
-  { /* version 11, passes 0 */
-   {0x00000000,0x00000000,0x00000249,0x00000249,
-    0x00000249,0x00000249,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009492,0x0000a49b,0x0000a49b,0x00009292},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x000136e4},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001c96e,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 11, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00000249,
-    0x00000249,0x00000249,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009252,0x00009252,0x0000024a,0x0000024a},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x0000a49b,0x00009292,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000126dc,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 12 */
-  { /* version 12, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x0000a493,0x0000a49b,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001b92d,0x0001b724},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001b925,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x00012492,0x000126db,
-    0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 12, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x00001249,0x00009292,
-    0x00009492,0x00009252,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009292,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000124db,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000126dc,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x000136e4,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00009492,0x000126db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 13 */
-  { /* version 13, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x00009252,0x00009292,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x0000a49b,
-    0x0001249b,0x000126dc,0x000126dc,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x000136e4,0x0001b725,0x000124db},
-   {0x00000000,0x00000000,0x00009292,0x0000a49b,
-    0x000136e4,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000136e4,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001c96e,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x000136e4,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x00012492,0x000136db,
-    0x00024924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 13, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x00009492,0x00009292,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x0000a49b,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000124db,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000136db,
-    0x0001b724,0x000124db,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000136db,
-    0x0001b724,0x000126dc,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00009292,0x000136db,
-    0x0001b724,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000126dc,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x0001c924,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 14 */
-  { /* version 14, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x0000924a,
-    0x00009292,0x00009493,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00001249,0x0000a49b,
-    0x0000a493,0x000124db,0x000126dc,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x0000a49b},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x000136e4,0x0001b725,0x000124db},
-   {0x00000000,0x00000000,0x00009292,0x000124db,
-    0x000126dc,0x0001b724,0x0001b92d,0x000126dc},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001c92d,0x0001c96e,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0001b925},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x0001c92d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b924,0x0002496d,0x00024b76,0x00024b77},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x00024924,0x0002db6d,0x00036db6,0x0002efff},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 14, passes 1 */
-   {0x00000000,0x00000000,0x00001249,0x00001249,
-    0x0000124a,0x0000124a,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x00009493,
-    0x0000a493,0x00009292,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x0000a49b,0x00001252,0x00001252},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000136e4,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000136e4,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x000136e4,0x00009493,0x00009292},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000136e4,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000136e4,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000136e4,0x0000a49b,0x00009493},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001b724,0x000136e4,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000124db,0x0000a49b},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b724,0x000136e4,0x000126dc,0x000124db},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x0001c924,0x0001b724,0x000136e4,0x000126dc},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- },
- { /* version 15 */
-  { /* version 15, passes 0 */
-   {0x00000000,0x00000000,0x00001249,0x00009493,
-    0x0000a493,0x0000a49b,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0001249b,0x000126dc,0x000136e4,0x000124db},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x000126dc,0x0001b724,0x0001b725,0x000126dc},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x0001b724,0x0001b92d,0x000126dc},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x000136e4,0x0001b925,0x0001c96e,0x000136e4},
-   {0x00000000,0x00000000,0x00009492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000124db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b724},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b724,0x0001c92d,0x0001c96e,0x0001b925},
-   {0x00000000,0x00000000,0x0000a492,0x000126db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b924,0x0001c92d,0x00024b76,0x0001c92d},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001b924,0x0002496d,0x00024b76,0x0002496e},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0002496d,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x00024b6d,0x00025bb6,0x00024b77},
-   {0x00000000,0x00000000,0x00012492,0x000136db,
-    0x0001c924,0x00024b6d,0x0002ddb6,0x00025bbf},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x00024924,0x0002db6d,0x00036db6,0x0002efff},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  },
-  { /* version 15, passes 1 */
-   {0x00000000,0x00000000,0x0000924a,0x0000924a,
-    0x00009292,0x00009292,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x0000a49b,
-    0x0000a493,0x000124db,0x00009292,0x00009292},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000124db,0x0001b724,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000126dc,0x0001b724,0x00009493,0x00009493},
-   {0x00000000,0x00000000,0x0000924a,0x000124db,
-    0x000136e4,0x0001b724,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00009292,0x000136db,
-    0x0001b724,0x0001b724,0x0000a49b,0x0000a49b},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001c924,0x0001b724,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x00009492,0x000136db,
-    0x0001c924,0x0001b724,0x000124db,0x000124db},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b724,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b925,0x000126dc,0x000126dc},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b925,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b925,0x000136e4,0x000136e4},
-   {0x00000000,0x00000000,0x0000a492,0x000136db,
-    0x0001c924,0x0001b925,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x00012492,0x000136db,
-    0x0001c924,0x0001b925,0x0001b725,0x0001b724},
-   {0x00000000,0x00000000,0x00012492,0x0001b6db,
-    0x00024924,0x0002496d,0x0001b92d,0x0001b925},
-   {0x00000000,0x00000000,0x00000000,0x00000000,
-    0x00000000,0x00000000,0x00000000,0x00000000}
-  }
- }
-};
diff --git a/drivers/usb/media/pwc/pwc-uncompress.c b/drivers/usb/media/pwc/pwc-uncompress.c
index c062e43b3ac5..bc3b1635eab0 100644
--- a/drivers/usb/media/pwc/pwc-uncompress.c
+++ b/drivers/usb/media/pwc/pwc-uncompress.c
@@ -29,8 +29,6 @@
 
 #include "pwc.h"
 #include "pwc-uncompress.h"
-#include "pwc-dec1.h"
-#include "pwc-dec23.h"
 
 int pwc_decompress(struct pwc_device *pdev)
 {
@@ -122,6 +120,7 @@ int pwc_decompress(struct pwc_device *pdev)
 
                 switch (pdev->type)
                  {
+#if 0            
                   case 675:
                   case 680:
                   case 690:
@@ -137,6 +136,7 @@ int pwc_decompress(struct pwc_device *pdev)
                   case 645:
                   case 646:
                     /* TODO & FIXME */
+#endif              
                     return -ENXIO; /* No such device or address: missing decompressor */
                     break;
                  }
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c
index 549e22939260..25f9a9a65c24 100644
--- a/drivers/video/intelfb/intelfbdrv.c
+++ b/drivers/video/intelfb/intelfbdrv.c
@@ -228,17 +228,17 @@ MODULE_DESCRIPTION(
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_DEVICE_TABLE(pci, intelfb_pci_table);
 
-static int accel        __initdata = 1;
-static int vram         __initdata = 4;
-static int hwcursor     __initdata = 1;
-static int mtrr         __initdata = 1;
-static int fixed        __initdata = 0;
-static int noinit       __initdata = 0;
-static int noregister   __initdata = 0;
-static int probeonly    __initdata = 0;
-static int idonly       __initdata = 0;
-static int bailearly    __initdata = 0;
-static char *mode       __initdata = NULL;
+static int accel        = 1;
+static int vram         = 4;
+static int hwcursor     = 1;
+static int mtrr         = 1;
+static int fixed        = 0;
+static int noinit       = 0;
+static int noregister   = 0;
+static int probeonly    = 0;
+static int idonly       = 0;
+static int bailearly    = 0;
+static char *mode       = NULL;
 
 module_param(accel, bool, S_IRUGO);
 MODULE_PARM_DESC(accel, "Enable console acceleration");
diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c
index 14a0d339d036..4bf43ea87c46 100644
--- a/fs/hostfs/hostfs_kern.c
+++ b/fs/hostfs/hostfs_kern.c
@@ -23,7 +23,6 @@
 #include "kern_util.h"
 #include "kern.h"
 #include "user_util.h"
-#include "2_5compat.h"
 #include "init.h"
 
 struct hostfs_inode_info {
diff --git a/fs/xfs/linux-2.6/xfs_aops.c b/fs/xfs/linux-2.6/xfs_aops.c
index 9278e9aba9ba..93ce257cd149 100644
--- a/fs/xfs/linux-2.6/xfs_aops.c
+++ b/fs/xfs/linux-2.6/xfs_aops.c
@@ -886,7 +886,6 @@ xfs_page_state_convert(
                 SetPageUptodate(page);
 
         if (startio) {
-                WARN_ON(page_dirty);
                 xfs_submit_page(page, wbc, bh_arr, cnt, 0, !page_dirty);
         }
 
diff --git a/fs/xfs/linux-2.6/xfs_file.c b/fs/xfs/linux-2.6/xfs_file.c
index d0d412afd261..24fa3b101b93 100644
--- a/fs/xfs/linux-2.6/xfs_file.c
+++ b/fs/xfs/linux-2.6/xfs_file.c
@@ -565,7 +565,7 @@ struct file_operations linvfs_file_operations = {
         .sendfile       = linvfs_sendfile,
         .unlocked_ioctl = linvfs_ioctl,
 #ifdef CONFIG_COMPAT
-        .compat_ioctl   = xfs_compat_ioctl,
+        .compat_ioctl   = linvfs_compat_ioctl,
 #endif
         .mmap           = linvfs_file_mmap,
         .open           = linvfs_open,
@@ -587,7 +587,7 @@ struct file_operations linvfs_invis_file_operations = {
         .sendfile       = linvfs_sendfile,
         .unlocked_ioctl = linvfs_ioctl_invis,
 #ifdef CONFIG_COMPAT
-        .compat_ioctl   = xfs_compat_invis_ioctl,
+        .compat_ioctl   = linvfs_compat_invis_ioctl,
 #endif
         .mmap           = linvfs_file_mmap,
         .open           = linvfs_open,
@@ -600,6 +600,9 @@ struct file_operations linvfs_dir_operations = {
         .read           = generic_read_dir,
         .readdir        = linvfs_readdir,
         .unlocked_ioctl = linvfs_ioctl,
+#ifdef CONFIG_COMPAT
+        .compat_ioctl   = linvfs_compat_ioctl,
+#endif
         .fsync          = linvfs_fsync,
 };
 
diff --git a/fs/xfs/linux-2.6/xfs_ioctl32.c b/fs/xfs/linux-2.6/xfs_ioctl32.c
index 7a12c83184f5..0f8f1384eb36 100644
--- a/fs/xfs/linux-2.6/xfs_ioctl32.c
+++ b/fs/xfs/linux-2.6/xfs_ioctl32.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2004-2005 Silicon Graphics, Inc.  All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -58,8 +58,9 @@ typedef struct xfs_fsop_bulkreq32 {
         __s32           ocount;         /* output count pointer         */
 } xfs_fsop_bulkreq32_t;
 
-static unsigned long
-xfs_ioctl32_bulkstat(unsigned long arg)
+STATIC unsigned long
+xfs_ioctl32_bulkstat(
+        unsigned long           arg)
 {
         xfs_fsop_bulkreq32_t    __user *p32 = (void __user *)arg;
         xfs_fsop_bulkreq_t      __user *p = compat_alloc_user_space(sizeof(*p));
@@ -78,11 +79,11 @@ xfs_ioctl32_bulkstat(unsigned long arg)
 }
 #endif
 
-static long
-__xfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
+STATIC long
+__linvfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
 {
         int             error;
-        struct inode *inode = f->f_dentry->d_inode;
+        struct          inode *inode = f->f_dentry->d_inode;
         vnode_t         *vp = LINVFS_GET_VP(inode);
 
         switch (cmd) {
@@ -152,12 +153,20 @@ __xfs_compat_ioctl(int mode, struct file *f, unsigned cmd, unsigned long arg)
         return error;
 }
 
-long xfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
+long
+linvfs_compat_ioctl(
+        struct file             *f,
+        unsigned                cmd,
+        unsigned long           arg)
 {
-        return __xfs_compat_ioctl(0, f, cmd, arg);
+        return __linvfs_compat_ioctl(0, f, cmd, arg);
 }
 
-long xfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg)
+long
+linvfs_compat_invis_ioctl(
+        struct file             *f,
+        unsigned                cmd,
+        unsigned long           arg)
 {
-        return __xfs_compat_ioctl(IO_INVIS, f, cmd, arg);
+        return __linvfs_compat_ioctl(IO_INVIS, f, cmd, arg);
 }
diff --git a/fs/xfs/linux-2.6/xfs_ioctl32.h b/fs/xfs/linux-2.6/xfs_ioctl32.h
index 779f69a48116..c874793a1dc9 100644
--- a/fs/xfs/linux-2.6/xfs_ioctl32.h
+++ b/fs/xfs/linux-2.6/xfs_ioctl32.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2004-2005 Silicon Graphics, Inc.  All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -30,5 +30,5 @@
  * http://oss.sgi.com/projects/GenInfo/SGIGPLNoticeExplan/
  */
 
-long xfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
-long xfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg);
+long linvfs_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
+long linvfs_compat_invis_ioctl(struct file *f, unsigned cmd, unsigned long arg);
diff --git a/fs/xfs/linux-2.6/xfs_super.c b/fs/xfs/linux-2.6/xfs_super.c
index 53dc658cafa6..455e2b2fb964 100644
--- a/fs/xfs/linux-2.6/xfs_super.c
+++ b/fs/xfs/linux-2.6/xfs_super.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2004 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2000-2005 Silicon Graphics, Inc.  All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -66,7 +66,6 @@
 #include "xfs_buf_item.h"
 #include "xfs_utils.h"
 #include "xfs_version.h"
-#include "xfs_ioctl32.h"
 
 #include <linux/namei.h>
 #include <linux/init.h>
diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c
index 991f8a61f7c4..469e1a7939d4 100644
--- a/fs/xfs/xfs_iomap.c
+++ b/fs/xfs/xfs_iomap.c
@@ -278,7 +278,9 @@ phase2:
         switch (flags & (BMAPI_WRITE|BMAPI_ALLOCATE|BMAPI_UNWRITTEN)) {
         case BMAPI_WRITE:
                 /* If we found an extent, return it */
-                if (nimaps && (imap.br_startblock != HOLESTARTBLOCK)) {
+                if (nimaps &&
+                    (imap.br_startblock != HOLESTARTBLOCK) && 
+                    (imap.br_startblock != DELAYSTARTBLOCK)) {
                         xfs_iomap_map_trace(XFS_IOMAP_WRITE_MAP, io,
                                         offset, count, iomapp, &imap, flags);
                         break;
diff --git a/include/asm-i386/linkage.h b/include/asm-i386/linkage.h
index af3d8571c5c7..f4a6ebac0247 100644
--- a/include/asm-i386/linkage.h
+++ b/include/asm-i386/linkage.h
@@ -5,9 +5,7 @@
 #define FASTCALL(x)     x __attribute__((regparm(3)))
 #define fastcall        __attribute__((regparm(3)))
 
-#ifdef CONFIG_REGPARM
-# define prevent_tail_call(ret) __asm__ ("" : "=r" (ret) : "0" (ret))
-#endif
+#define prevent_tail_call(ret) __asm__ ("" : "=r" (ret) : "0" (ret))
 
 #ifdef CONFIG_X86_ALIGNMENT_16
 #define __ALIGN .align 16,0x90
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 42fd1068cf2a..c5883dbed63f 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1039,6 +1039,52 @@ typedef struct im_idma {
 #define CMXSCR_TS4CS_CLK7  0x00000006   /* SCC4 Tx Clock Source is CLK7 */
 #define CMXSCR_TS4CS_CLK8  0x00000007   /* SCC4 Tx Clock Source is CLK8 */
 
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration Register                            4-31
+ */
+#define SIUMCR_BBD      0x80000000      /* Bus Busy Disable             */
+#define SIUMCR_ESE      0x40000000      /* External Snoop Enable        */
+#define SIUMCR_PBSE     0x20000000      /* Parity Byte Select Enable    */
+#define SIUMCR_CDIS     0x10000000      /* Core Disable                 */
+#define SIUMCR_DPPC00   0x00000000      /* Data Parity Pins Configuration*/
+#define SIUMCR_DPPC01   0x04000000      /* - " -                        */
+#define SIUMCR_DPPC10   0x08000000      /* - " -                        */
+#define SIUMCR_DPPC11   0x0c000000      /* - " -                        */
+#define SIUMCR_L2CPC00  0x00000000      /* L2 Cache Pins Configuration  */
+#define SIUMCR_L2CPC01  0x01000000      /* - " -                        */
+#define SIUMCR_L2CPC10  0x02000000      /* - " -                        */
+#define SIUMCR_L2CPC11  0x03000000      /* - " -                        */
+#define SIUMCR_LBPC00   0x00000000      /* Local Bus Pins Configuration */
+#define SIUMCR_LBPC01   0x00400000      /* - " -                        */
+#define SIUMCR_LBPC10   0x00800000      /* - " -                        */
+#define SIUMCR_LBPC11   0x00c00000      /* - " -                        */
+#define SIUMCR_APPC00   0x00000000      /* Address Parity Pins Configuration*/
+#define SIUMCR_APPC01   0x00100000      /* - " -                        */
+#define SIUMCR_APPC10   0x00200000      /* - " -                        */
+#define SIUMCR_APPC11   0x00300000      /* - " -                        */
+#define SIUMCR_CS10PC00 0x00000000      /* CS10 Pin Configuration       */
+#define SIUMCR_CS10PC01 0x00040000      /* - " -                        */
+#define SIUMCR_CS10PC10 0x00080000      /* - " -                        */
+#define SIUMCR_CS10PC11 0x000c0000      /* - " -                        */
+#define SIUMCR_BCTLC00  0x00000000      /* Buffer Control Configuration */
+#define SIUMCR_BCTLC01  0x00010000      /* - " -                        */
+#define SIUMCR_BCTLC10  0x00020000      /* - " -                        */
+#define SIUMCR_BCTLC11  0x00030000      /* - " -                        */
+#define SIUMCR_MMR00    0x00000000      /* Mask Masters Requests        */
+#define SIUMCR_MMR01    0x00004000      /* - " -                        */
+#define SIUMCR_MMR10    0x00008000      /* - " -                        */
+#define SIUMCR_MMR11    0x0000c000      /* - " -                        */
+#define SIUMCR_LPBSE    0x00002000      /* LocalBus Parity Byte Select Enable*/
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock Control Register                                  9-8
+*/
+#define SCCR_PCI_MODE   0x00000100      /* PCI Mode     */
+#define SCCR_PCI_MODCK  0x00000080      /* Value of PCI_MODCK pin       */
+#define SCCR_PCIDF_MSK  0x00000078      /* PCI division factor  */
+#define SCCR_PCIDF_SHIFT 3
+
+
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */
 
diff --git a/include/asm-ppc/m8260_pci.h b/include/asm-ppc/m8260_pci.h
index 163a6b91d5b2..bf9e05dd54b5 100644
--- a/include/asm-ppc/m8260_pci.h
+++ b/include/asm-ppc/m8260_pci.h
@@ -19,6 +19,7 @@
  * Define the vendor/device ID for the MPC8265.
  */
 #define PCI_DEVICE_ID_MPC8265   ((0x18C0 << 16) | PCI_VENDOR_ID_MOTOROLA)
+#define PCI_DEVICE_ID_MPC8272   ((0x18C1 << 16) | PCI_VENDOR_ID_MOTOROLA)
 
 #define M8265_PCIBR0    0x101ac
 #define M8265_PCIBR1    0x101b0
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index d820894e5991..89eb8a2ac693 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -41,7 +41,7 @@
 #endif
 
 #ifdef CONFIG_PCI_8260
-#include <syslib/m8260_pci.h>
+#include <syslib/m82xx_pci.h>
 #endif
 
 /* Make sure the memory translation stuff is there if PCI not used.
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index d82f883d8e6d..4bbbd9f3c37e 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -27,7 +27,7 @@ struct thread_info {
 
 #endif
 
-#define PREEMPT_ACTIVE          0x4000000
+#define PREEMPT_ACTIVE          0x10000000
 
 /*
  * macros/functions for gaining access to the thread information structure
diff --git a/include/asm-sh64/thread_info.h b/include/asm-sh64/thread_info.h
index e65f394da472..8a32d6bd0b79 100644
--- a/include/asm-sh64/thread_info.h
+++ b/include/asm-sh64/thread_info.h
@@ -73,7 +73,7 @@ static inline struct thread_info *current_thread_info(void)
 
 #define THREAD_SIZE  8192
 
-#define PREEMPT_ACTIVE          0x4000000
+#define PREEMPT_ACTIVE          0x10000000
 
 /* thread information flags */
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
index 504ea8e486b0..5afee8a8cdf3 100644
--- a/include/asm-um/page.h
+++ b/include/asm-um/page.h
@@ -98,7 +98,13 @@ extern unsigned long uml_physmem;
 
 extern unsigned long to_phys(void *virt);
 extern void *to_virt(unsigned long phys);
-#define __pa(virt) to_phys((void *) virt)
+
+/* Cast to unsigned long before casting to void * to avoid a warning from
+ * mmap_kmem about cutting a long long down to a void *.  Not sure that
+ * casting is the right thing, but 32-bit UML can't have 64-bit virtual
+ * addresses
+ */
+#define __pa(virt) to_phys((void *) (unsigned long) virt)
 #define __va(phys) to_virt((unsigned long) phys)
 
 #define page_to_pfn(page) ((page) - mem_map)
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
index 510e513c7f88..a88040920311 100644
--- a/include/asm-um/pgtable.h
+++ b/include/asm-um/pgtable.h
@@ -114,17 +114,9 @@ extern unsigned long end_iomem;
 extern unsigned long pg0[1024];
 
 /*
- * BAD_PAGETABLE is used when we need a bogus page-table, while
- * BAD_PAGE is used for a bogus page.
- *
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
  */
-extern pte_t __bad_page(void);
-extern pte_t * __bad_pagetable(void);
-
-#define BAD_PAGETABLE __bad_pagetable()
-#define BAD_PAGE __bad_page()
 
 #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
 
diff --git a/include/asm-um/thread_info.h b/include/asm-um/thread_info.h
index a10ea155907e..1feaaf148ef1 100644
--- a/include/asm-um/thread_info.h
+++ b/include/asm-um/thread_info.h
@@ -41,18 +41,17 @@ struct thread_info {
 #define init_thread_info        (init_thread_union.thread_info)
 #define init_stack              (init_thread_union.stack)
 
+#define THREAD_SIZE ((1 << CONFIG_KERNEL_STACK_ORDER) * PAGE_SIZE)
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {
         struct thread_info *ti;
-        unsigned long mask = PAGE_SIZE *
-                (1 << CONFIG_KERNEL_STACK_ORDER) - 1;
-        ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
+        unsigned long mask = THREAD_SIZE - 1;
+        ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
         return ti;
 }
 
 /* thread information allocation */
-#define THREAD_SIZE ((1 << CONFIG_KERNEL_STACK_ORDER) * PAGE_SIZE)
 #define alloc_thread_info(tsk) \
         ((struct thread_info *) kmalloc(THREAD_SIZE, GFP_KERNEL))
 #define free_thread_info(ti) kfree(ti)
@@ -62,7 +61,7 @@ static inline struct thread_info *current_thread_info(void)
 
 #endif
 
-#define PREEMPT_ACTIVE          0x4000000
+#define PREEMPT_ACTIVE          0x10000000
 
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
 #define TIF_SIGPENDING          1       /* signal pending */
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index aefe6d051ace..d5a55bdb9c3c 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -25,6 +25,8 @@
 #ifndef _LINUX_ACPI_H
 #define _LINUX_ACPI_H
 
+#ifdef  CONFIG_ACPI
+
 #ifndef _LINUX
 #define _LINUX
 #endif
@@ -533,4 +535,5 @@ static inline int acpi_get_pxm(acpi_handle handle)
 
 extern int pnpacpi_disabled;
 
-#endif /*_LINUX_ACPI_H*/
+#endif  /* CONFIG_ACPI */
+#endif  /*_LINUX_ACPI_H*/
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index 220748b7abea..a1478258d002 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -56,18 +56,32 @@ static inline int is_zero_ether_addr(const u8 *addr)
 }
 
 /**
+ * is_multicast_ether_addr - Determine if the given Ethernet address is a
+ * multicast address.
+ *
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Return true if the address is a multicast address.
+ */
+static inline int is_multicast_ether_addr(const u8 *addr)
+{
+        return addr[0] & 0x01;
+}
+
+/**
  * is_valid_ether_addr - Determine if the given Ethernet address is valid
  * @addr: Pointer to a six-byte array containing the Ethernet address
  *
  * Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is not
- * a multicast address, and is not FF:FF:FF:FF:FF:FF.  The multicast
- * and FF:FF:... tests are combined into the single test "!(addr[0]&1)".
+ * a multicast address, and is not FF:FF:FF:FF:FF:FF.
  *
  * Return true if the address is valid.
  */
 static inline int is_valid_ether_addr(const u8 *addr)
 {
-        return !(addr[0]&1) && !is_zero_ether_addr(addr);
+        /* FF:FF:FF:FF:FF:FF is a multicast address so we don't need to
+         * explicitly check for it here. */
+        return !is_multicast_ether_addr(addr) && !is_zero_ether_addr(addr);
 }
 
 /**
@@ -83,6 +97,6 @@ static inline void random_ether_addr(u8 *addr)
         addr [0] &= 0xfe;       /* clear multicast bit */
         addr [0] |= 0x02;       /* set local assignment bit (IEEE802) */
 }
-#endif
+#endif  /* __KERNEL__ */
 
 #endif  /* _LINUX_ETHERDEVICE_H */
diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h
index c85b210490ea..a0ab26aab450 100644
--- a/include/linux/ethtool.h
+++ b/include/linux/ethtool.h
@@ -256,6 +256,7 @@ struct net_device;
 u32 ethtool_op_get_link(struct net_device *dev);
 u32 ethtool_op_get_tx_csum(struct net_device *dev);
 int ethtool_op_set_tx_csum(struct net_device *dev, u32 data);
+int ethtool_op_set_tx_hw_csum(struct net_device *dev, u32 data);
 u32 ethtool_op_get_sg(struct net_device *dev);
 int ethtool_op_set_sg(struct net_device *dev, u32 data);
 u32 ethtool_op_get_tso(struct net_device *dev);
diff --git a/include/linux/gameport.h b/include/linux/gameport.h
index b1272f822cfa..cd623eccdbea 100644
--- a/include/linux/gameport.h
+++ b/include/linux/gameport.h
@@ -67,6 +67,8 @@ int gameport_open(struct gameport *gameport, struct gameport_driver *drv, int mo
 void gameport_close(struct gameport *gameport);
 void gameport_rescan(struct gameport *gameport);
 
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+
 void __gameport_register_port(struct gameport *gameport, struct module *owner);
 static inline void gameport_register_port(struct gameport *gameport)
 {
@@ -75,6 +77,29 @@ static inline void gameport_register_port(struct gameport *gameport)
 
 void gameport_unregister_port(struct gameport *gameport);
 
+void gameport_set_phys(struct gameport *gameport, const char *fmt, ...)
+        __attribute__ ((format (printf, 2, 3)));
+
+#else
+
+static inline void gameport_register_port(struct gameport *gameport)
+{
+        return;
+}
+
+static inline void gameport_unregister_port(struct gameport *gameport)
+{
+        return;
+}
+
+static inline void gameport_set_phys(struct gameport *gameport,
+                                     const char *fmt, ...)
+{
+        return;
+}
+
+#endif
+
 static inline struct gameport *gameport_allocate_port(void)
 {
         struct gameport *gameport = kcalloc(1, sizeof(struct gameport), GFP_KERNEL);
@@ -92,9 +117,6 @@ static inline void gameport_set_name(struct gameport *gameport, const char *name
         strlcpy(gameport->name, name, sizeof(gameport->name));
 }
 
-void gameport_set_phys(struct gameport *gameport, const char *fmt, ...)
-        __attribute__ ((format (printf, 2, 3)));
-
 /*
  * Use the following fucntions to manipulate gameport's per-port
  * driver-specific data.
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index ebc712e91066..8336dba18971 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -43,13 +43,17 @@
 #define __IRQ_MASK(x)   ((1UL << (x))-1)
 
 #define PREEMPT_MASK    (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
-#define HARDIRQ_MASK    (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
 #define SOFTIRQ_MASK    (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
+#define HARDIRQ_MASK    (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
 
 #define PREEMPT_OFFSET  (1UL << PREEMPT_SHIFT)
 #define SOFTIRQ_OFFSET  (1UL << SOFTIRQ_SHIFT)
 #define HARDIRQ_OFFSET  (1UL << HARDIRQ_SHIFT)
 
+#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
+#error PREEMPT_ACTIVE is too low!
+#endif
+
 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
 #define irq_count()     (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 9cfc0999becb..336d6e509f59 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -664,7 +664,6 @@ typedef struct ide_drive_s {
 
         struct request          *rq;    /* current request */
         struct ide_drive_s      *next;  /* circular list of hwgroup drives */
-        struct ide_driver_s     *driver;/* (ide_driver_t *) */
         void            *driver_data;   /* extra driver data */
         struct hd_driveid       *id;    /* drive model identification info */
         struct proc_dir_entry *proc;    /* /proc/ide/ directory entry */
@@ -758,6 +757,8 @@ typedef struct ide_drive_s {
         struct semaphore gendev_rel_sem;        /* to deal with device release() */
 } ide_drive_t;
 
+#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
+
 #define IDE_CHIPSET_PCI_MASK    \
     ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
 #define IDE_CHIPSET_IS_PCI(c)   ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
@@ -1086,28 +1087,20 @@ enum {
  */
 typedef struct ide_driver_s {
         struct module                   *owner;
-        const char                      *name;
         const char                      *version;
         u8                              media;
-        unsigned busy                   : 1;
         unsigned supports_dsc_overlap   : 1;
-        int             (*cleanup)(ide_drive_t *);
         ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
         int             (*end_request)(ide_drive_t *, int, int);
         ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
         ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
         int             (*ioctl)(ide_drive_t *, struct inode *, struct file *, unsigned int, unsigned long);
         ide_proc_entry_t        *proc;
-        int             (*attach)(ide_drive_t *);
         void            (*ata_prebuilder)(ide_drive_t *);
         void            (*atapi_prebuilder)(ide_drive_t *);
         struct device_driver    gen_driver;
-        struct list_head drives;
-        struct list_head drivers;
 } ide_driver_t;
 
-#define DRIVER(drive)           ((drive)->driver)
-
 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
 
 /*
@@ -1328,8 +1321,6 @@ extern void ide_init_subdrivers(void);
 
 void ide_init_disk(struct gendisk *, ide_drive_t *);
 
-extern int ata_attach(ide_drive_t *);
-
 extern int ideprobe_init(void);
 
 extern void ide_scan_pcibus(int scan_direction) __init;
@@ -1342,11 +1333,8 @@ extern void default_hwif_iops(ide_hwif_t *);
 extern void default_hwif_mmiops(ide_hwif_t *);
 extern void default_hwif_transport(ide_hwif_t *);
 
-int ide_register_driver(ide_driver_t *driver);
-void ide_unregister_driver(ide_driver_t *driver);
-int ide_register_subdriver(ide_drive_t *, ide_driver_t *);
-int ide_unregister_subdriver (ide_drive_t *drive);
-int ide_replace_subdriver(ide_drive_t *drive, const char *driver);
+void ide_register_subdriver(ide_drive_t *, ide_driver_t *);
+void ide_unregister_subdriver(ide_drive_t *, ide_driver_t *);
 
 #define ON_BOARD                1
 #define NEVER_BOARD             0
diff --git a/include/linux/if_tr.h b/include/linux/if_tr.h
index a2b01e1e72f2..6688b414c529 100644
--- a/include/linux/if_tr.h
+++ b/include/linux/if_tr.h
@@ -36,8 +36,8 @@ struct trh_hdr {
         __u8  fc;                       /* frame control field */
         __u8  daddr[TR_ALEN];           /* destination address */
         __u8  saddr[TR_ALEN];           /* source address */
-        __u16 rcf;                      /* route control field */
-        __u16 rseg[8];                  /* routing registers */
+        __be16 rcf;                     /* route control field */
+        __be16 rseg[8];                 /* routing registers */
 };
 
 #ifdef __KERNEL__
@@ -55,7 +55,7 @@ struct trllc {
         __u8  ssap;                     /* source SAP */
         __u8  llc;                      /* LLC control field */
         __u8  protid[3];                /* protocol id */
-        __u16 ethertype;                /* ether type field */
+        __be16 ethertype;               /* ether type field */
 };
 
 /* Token-Ring statistics collection data. */
diff --git a/include/linux/inetdevice.h b/include/linux/inetdevice.h
index 6fafb27877a7..7e1e15f934f3 100644
--- a/include/linux/inetdevice.h
+++ b/include/linux/inetdevice.h
@@ -29,6 +29,7 @@ struct ipv4_devconf
         int     no_xfrm;
         int     no_policy;
         int     force_igmp_version;
+        int     promote_secondaries;
         void    *sysctl;
 };
 
@@ -71,6 +72,7 @@ struct in_device
 #define IN_DEV_SEC_REDIRECTS(in_dev)    (ipv4_devconf.secure_redirects || (in_dev)->cnf.secure_redirects)
 #define IN_DEV_IDTAG(in_dev)            ((in_dev)->cnf.tag)
 #define IN_DEV_MEDIUM_ID(in_dev)        ((in_dev)->cnf.medium_id)
+#define IN_DEV_PROMOTE_SECONDARIES(in_dev)      (ipv4_devconf.promote_secondaries || (in_dev)->cnf.promote_secondaries)
 
 #define IN_DEV_RX_REDIRECTS(in_dev) \
         ((IN_DEV_FORWARD(in_dev) && \
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 1f7e2039a04e..e74f301e9bae 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -410,6 +410,7 @@ extern u8 ata_chk_err(struct ata_port *ap);
 extern void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf);
 extern int ata_port_start (struct ata_port *ap);
 extern void ata_port_stop (struct ata_port *ap);
+extern void ata_host_stop (struct ata_host_set *host_set);
 extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
 extern void ata_qc_prep(struct ata_queued_cmd *qc);
 extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
diff --git a/include/linux/mii.h b/include/linux/mii.h
index 20971fe78a8d..374b615ea9ea 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -65,9 +65,13 @@
 #define ADVERTISE_SLCT          0x001f  /* Selector bits               */
 #define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
 #define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
+#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
 #define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
+#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
 #define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
+#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
 #define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
+#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
 #define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
 #define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
 #define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
@@ -84,9 +88,13 @@
 /* Link partner ability register. */
 #define LPA_SLCT                0x001f  /* Same as advertise selector  */
 #define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
+#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
 #define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
+#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
 #define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
+#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
 #define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
+#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
 #define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
 #define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
 #define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index b25bd02720d3..470af8c1a4a0 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -401,7 +401,7 @@ struct net_device
         } reg_state;
 
         /* Net device features */
-        int                     features;
+        unsigned long           features;
 #define NETIF_F_SG              1       /* Scatter/gather IO. */
 #define NETIF_F_IP_CSUM         2       /* Can checksum only TCP/UDP over IPv4. */
 #define NETIF_F_NO_CSUM         4       /* Does not require checksum. F.e. loopack. */
@@ -913,6 +913,7 @@ extern void		dev_mc_discard(struct net_device *dev);
 extern void             dev_set_promiscuity(struct net_device *dev, int inc);
 extern void             dev_set_allmulti(struct net_device *dev, int inc);
 extern void             netdev_state_change(struct net_device *dev);
+extern void             netdev_features_change(struct net_device *dev);
 /* Load a device via the kmod */
 extern void             dev_load(const char *name);
 extern void             dev_mcast_init(void);
diff --git a/include/linux/notifier.h b/include/linux/notifier.h
index 9303a003e9ab..5937dd6053c3 100644
--- a/include/linux/notifier.h
+++ b/include/linux/notifier.h
@@ -56,6 +56,7 @@ extern int notifier_call_chain(struct notifier_block **n, unsigned long val, voi
 #define NETDEV_CHANGEADDR       0x0008
 #define NETDEV_GOING_DOWN       0x0009
 #define NETDEV_CHANGENAME       0x000A
+#define NETDEV_FEAT_CHANGE      0x000B
 
 #define SYS_DOWN        0x0001  /* Notify of system down */
 #define SYS_RESTART     SYS_DOWN
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 7b9720e35361..7ccbc2e4272c 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2071,6 +2071,7 @@
 #define PCI_DEVICE_ID_TIGON3_5703       0x1647
 #define PCI_DEVICE_ID_TIGON3_5704       0x1648
 #define PCI_DEVICE_ID_TIGON3_5704S_2    0x1649
+#define PCI_DEVICE_ID_NX2_5706          0x164a
 #define PCI_DEVICE_ID_TIGON3_5702FE     0x164d
 #define PCI_DEVICE_ID_TIGON3_5705       0x1653
 #define PCI_DEVICE_ID_TIGON3_5705_2     0x1654
@@ -2090,6 +2091,7 @@
 #define PCI_DEVICE_ID_TIGON3_5702X      0x16a6
 #define PCI_DEVICE_ID_TIGON3_5703X      0x16a7
 #define PCI_DEVICE_ID_TIGON3_5704S      0x16a8
+#define PCI_DEVICE_ID_NX2_5706S         0x16aa
 #define PCI_DEVICE_ID_TIGON3_5702A3     0x16c6
 #define PCI_DEVICE_ID_TIGON3_5703A3     0x16c7
 #define PCI_DEVICE_ID_TIGON3_5781       0x16dd
diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h
index 73d84c071cb1..1d9da36eb9db 100644
--- a/include/linux/pkt_sched.h
+++ b/include/linux/pkt_sched.h
@@ -427,6 +427,7 @@ enum
         TCA_NETEM_UNSPEC,
         TCA_NETEM_CORR,
         TCA_NETEM_DELAY_DIST,
+        TCA_NETEM_REORDER,
         __TCA_NETEM_MAX,
 };
 
@@ -437,7 +438,7 @@ struct tc_netem_qopt
         __u32   latency;        /* added delay (us) */
         __u32   limit;          /* fifo limit (packets) */
         __u32   loss;           /* random packet loss (0=none ~0=100%) */
-        __u32   gap;            /* re-ordering gap (0 for delay all) */
+        __u32   gap;            /* re-ordering gap (0 for none) */
         __u32   duplicate;      /* random packet dup  (0=none ~0=100%) */
         __u32   jitter;         /* random jitter in latency (us) */
 };
@@ -449,6 +450,12 @@ struct tc_netem_corr
         __u32   dup_corr;       /* duplicate correlation  */
 };
 
+struct tc_netem_reorder
+{
+        __u32   probability;
+        __u32   correlation;
+};
+
 #define NETEM_DIST_SCALE        8192
 
 #endif
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index 772998147e3e..23032d9d6071 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -399,6 +399,7 @@ enum
         NET_IPV4_CONF_FORCE_IGMP_VERSION=17,
         NET_IPV4_CONF_ARP_ANNOUNCE=18,
         NET_IPV4_CONF_ARP_IGNORE=19,
+        NET_IPV4_CONF_PROMOTE_SECONDARIES=20,
         __NET_IPV4_CONF_MAX
 };
 
diff --git a/include/net/route.h b/include/net/route.h
index efe92b239ef1..d34ca8fc6756 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -181,9 +181,6 @@ static inline int ip_route_newports(struct rtable **rp, u16 sport, u16 dport,
                 memcpy(&fl, &(*rp)->fl, sizeof(fl));
                 fl.fl_ip_sport = sport;
                 fl.fl_ip_dport = dport;
-#if defined(CONFIG_IP_ROUTE_MULTIPATH_CACHED)
-                fl.flags |= FLOWI_FLAG_MULTIPATHOLDROUTE;
-#endif
                 ip_rt_put(*rp);
                 *rp = NULL;
                 return ip_route_output_flow(rp, &fl, sk, 0);
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index e142a256d5dc..d675836ba6c3 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -515,6 +515,8 @@ struct xfrm_dst
         struct dst_entry *route;
         u32 route_mtu_cached;
         u32 child_mtu_cached;
+        u32 route_cookie;
+        u32 path_cookie;
 };
 
 static inline void xfrm_dst_destroy(struct xfrm_dst *xdst)
diff --git a/init/Kconfig b/init/Kconfig
index d920baed109a..a7660ccc693f 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -442,7 +442,7 @@ config OBSOLETE_MODPARM
 
 config MODVERSIONS
         bool "Module versioning support (EXPERIMENTAL)"
-        depends on MODULES && EXPERIMENTAL && !UML
+        depends on MODULES && EXPERIMENTAL
         help
           Usually, you have to use modules compiled with your kernel.
           Saying Y here makes it sometimes possible to use modules
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 961d74044deb..00e8f2575512 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -166,9 +166,8 @@ static struct super_block *cpuset_sb = NULL;
  * The hooks from fork and exit, cpuset_fork() and cpuset_exit(), don't
  * (usually) grab cpuset_sem.  These are the two most performance
  * critical pieces of code here.  The exception occurs on exit(),
- * if the last task using a cpuset exits, and the cpuset was marked
- * notify_on_release.  In that case, the cpuset_sem is taken, the
- * path to the released cpuset calculated, and a usermode call made
+ * when a task in a notify_on_release cpuset exits.  Then cpuset_sem
+ * is taken, and if the cpuset count is zero, a usermode call made
  * to /sbin/cpuset_release_agent with the name of the cpuset (path
  * relative to the root of cpuset file system) as the argument.
  *
@@ -1404,6 +1403,18 @@ void cpuset_fork(struct task_struct *tsk)
  *
  * Description: Detach cpuset from @tsk and release it.
  *
+ * Note that cpusets marked notify_on_release force every task
+ * in them to take the global cpuset_sem semaphore when exiting.
+ * This could impact scaling on very large systems.  Be reluctant
+ * to use notify_on_release cpusets where very high task exit
+ * scaling is required on large systems.
+ *
+ * Don't even think about derefencing 'cs' after the cpuset use
+ * count goes to zero, except inside a critical section guarded
+ * by the cpuset_sem semaphore.  If you don't hold cpuset_sem,
+ * then a zero cpuset use count is a license to any other task to
+ * nuke the cpuset immediately.
+ *
  **/
 
 void cpuset_exit(struct task_struct *tsk)
@@ -1415,10 +1426,13 @@ void cpuset_exit(struct task_struct *tsk)
         tsk->cpuset = NULL;
         task_unlock(tsk);
 
-        if (atomic_dec_and_test(&cs->count)) {
+        if (notify_on_release(cs)) {
                 down(&cpuset_sem);
-                check_for_release(cs);
+                if (atomic_dec_and_test(&cs->count))
+                        check_for_release(cs);
                 up(&cpuset_sem);
+        } else {
+                atomic_dec(&cs->count);
         }
 }
 
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 06b5a6323998..436c7d93c00a 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -119,8 +119,6 @@ fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs)
                  */
                 desc->handler->ack(irq);
                 action_ret = handle_IRQ_event(irq, regs, desc->action);
-                if (!noirqdebug)
-                        note_interrupt(irq, desc, action_ret);
                 desc->handler->end(irq);
                 return 1;
         }
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index ac23847ce0e3..0c421295e613 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -151,7 +151,8 @@ config DEBUG_FS
 
 config FRAME_POINTER
         bool "Compile the kernel with frame pointers"
-        depends on DEBUG_KERNEL && ((X86 && !X86_64) || CRIS || M68K || M68KNOMMU || FRV)
+        depends on DEBUG_KERNEL && ((X86 && !X86_64) || CRIS || M68K || M68KNOMMU || FRV || UML)
+        default y if DEBUG_INFO && UML
         help
           If you say Y here the resulting kernel image will be slightly larger
           and slower, but it will give very useful debugging information.
diff --git a/net/802/tr.c b/net/802/tr.c
index 85293ccf7efc..a755e880f4ba 100644
--- a/net/802/tr.c
+++ b/net/802/tr.c
@@ -47,12 +47,12 @@ static void rif_check_expire(unsigned long dummy);
  *      Each RIF entry we learn is kept this way
  */
  
-struct rif_cache_s {    
+struct rif_cache {
         unsigned char addr[TR_ALEN];
         int iface;
-        __u16 rcf;
-        __u16 rseg[8];
-        struct rif_cache_s *next;
+        __be16 rcf;
+        __be16 rseg[8];
+        struct rif_cache *next;
         unsigned long last_used;
         unsigned char local_ring;
 };
@@ -64,7 +64,7 @@ struct rif_cache_s {
  *      up a lot.
  */
  
-static struct rif_cache_s *rif_table[RIF_TABLE_SIZE];
+static struct rif_cache *rif_table[RIF_TABLE_SIZE];
 
 static DEFINE_SPINLOCK(rif_lock);
 
@@ -249,7 +249,7 @@ void tr_source_route(struct sk_buff *skb,struct trh_hdr *trh,struct net_device *
 {
         int slack;
         unsigned int hash;
-        struct rif_cache_s *entry;
+        struct rif_cache *entry;
         unsigned char *olddata;
         static const unsigned char mcast_func_addr[] 
                 = {0xC0,0x00,0x00,0x04,0x00,0x00};
@@ -337,7 +337,7 @@ printk("source routing for %02X:%02X:%02X:%02X:%02X:%02X\n",trh->daddr[0],
 static void tr_add_rif_info(struct trh_hdr *trh, struct net_device *dev)
 {
         unsigned int hash, rii_p = 0;
-        struct rif_cache_s *entry;
+        struct rif_cache *entry;
 
 
         spin_lock_bh(&rif_lock);
@@ -373,7 +373,7 @@ printk("adding rif_entry: addr:%02X:%02X:%02X:%02X:%02X:%02X rcf:%04X\n",
                  *      FIXME: We ought to keep some kind of cache size
                  *      limiting and adjust the timers to suit.
                  */
-                entry=kmalloc(sizeof(struct rif_cache_s),GFP_ATOMIC);
+                entry=kmalloc(sizeof(struct rif_cache),GFP_ATOMIC);
 
                 if(!entry) 
                 {
@@ -435,7 +435,7 @@ static void rif_check_expire(unsigned long dummy)
         spin_lock_bh(&rif_lock);
         
         for(i =0; i < RIF_TABLE_SIZE; i++) {
-                struct rif_cache_s *entry, **pentry;
+                struct rif_cache *entry, **pentry;
                 
                 pentry = rif_table+i;
                 while((entry=*pentry) != NULL) {
@@ -467,10 +467,10 @@ static void rif_check_expire(unsigned long dummy)
  
 #ifdef CONFIG_PROC_FS
 
-static struct rif_cache_s *rif_get_idx(loff_t pos)
+static struct rif_cache *rif_get_idx(loff_t pos)
 {
         int i;
-        struct rif_cache_s *entry;
+        struct rif_cache *entry;
         loff_t off = 0;
 
         for(i = 0; i < RIF_TABLE_SIZE; i++) 
@@ -493,7 +493,7 @@ static void *rif_seq_start(struct seq_file *seq, loff_t *pos)
 static void *rif_seq_next(struct seq_file *seq, void *v, loff_t *pos)
 {
         int i;
-        struct rif_cache_s *ent = v;
+        struct rif_cache *ent = v;
 
         ++*pos;
 
@@ -522,7 +522,7 @@ static void rif_seq_stop(struct seq_file *seq, void *v)
 static int rif_seq_show(struct seq_file *seq, void *v)
 {
         int j, rcf_len, segment, brdgnmb;
-        struct rif_cache_s *entry = v;
+        struct rif_cache *entry = v;
 
         if (v == SEQ_START_TOKEN)
                 seq_puts(seq,
diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c
index d9b72fde433c..f564ee99782d 100644
--- a/net/bridge/br_device.c
+++ b/net/bridge/br_device.c
@@ -21,10 +21,7 @@
 
 static struct net_device_stats *br_dev_get_stats(struct net_device *dev)
 {
-        struct net_bridge *br;
-
-        br = dev->priv;
-
+        struct net_bridge *br = netdev_priv(dev);
         return &br->statistics;
 }
 
@@ -54,9 +51,11 @@ int br_dev_xmit(struct sk_buff *skb, struct net_device *dev)
 
 static int br_dev_open(struct net_device *dev)
 {
-        netif_start_queue(dev);
+        struct net_bridge *br = netdev_priv(dev);
 
-        br_stp_enable_bridge(dev->priv);
+        br_features_recompute(br);
+        netif_start_queue(dev);
+        br_stp_enable_bridge(br);
 
         return 0;
 }
@@ -67,7 +66,7 @@ static void br_dev_set_multicast_list(struct net_device *dev)
 
 static int br_dev_stop(struct net_device *dev)
 {
-        br_stp_disable_bridge(dev->priv);
+        br_stp_disable_bridge(netdev_priv(dev));
 
         netif_stop_queue(dev);
 
@@ -76,7 +75,7 @@ static int br_dev_stop(struct net_device *dev)
 
 static int br_change_mtu(struct net_device *dev, int new_mtu)
 {
-        if ((new_mtu < 68) || new_mtu > br_min_mtu(dev->priv))
+        if (new_mtu < 68 || new_mtu > br_min_mtu(netdev_priv(dev)))
                 return -EINVAL;
 
         dev->mtu = new_mtu;
diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c
index 69872bf3b87e..91bb895375f4 100644
--- a/net/bridge/br_if.c
+++ b/net/bridge/br_if.c
@@ -314,6 +314,28 @@ int br_min_mtu(const struct net_bridge *br)
         return mtu;
 }
 
+/*
+ * Recomputes features using slave's features
+ */
+void br_features_recompute(struct net_bridge *br)
+{
+        struct net_bridge_port *p;
+        unsigned long features, checksum;
+
+        features = NETIF_F_SG | NETIF_F_FRAGLIST 
+                | NETIF_F_HIGHDMA | NETIF_F_TSO;
+        checksum = NETIF_F_IP_CSUM;     /* least commmon subset */
+
+        list_for_each_entry(p, &br->port_list, list) {
+                if (!(p->dev->features 
+                      & (NETIF_F_IP_CSUM|NETIF_F_NO_CSUM|NETIF_F_HW_CSUM)))
+                        checksum = 0;
+                features &= p->dev->features;
+        }
+
+        br->dev->features = features | checksum | NETIF_F_LLTX;
+}
+
 /* called with RTNL */
 int br_add_if(struct net_bridge *br, struct net_device *dev)
 {
@@ -368,6 +390,7 @@ int br_del_if(struct net_bridge *br, struct net_device *dev)
 
         spin_lock_bh(&br->lock);
         br_stp_recalculate_bridge_id(br);
+        br_features_recompute(br);
         spin_unlock_bh(&br->lock);
 
         return 0;
diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c
index 2b1cce46cab4..8f5f2e730992 100644
--- a/net/bridge/br_input.c
+++ b/net/bridge/br_input.c
@@ -26,7 +26,7 @@ static int br_pass_frame_up_finish(struct sk_buff *skb)
 #ifdef CONFIG_NETFILTER_DEBUG
         skb->nf_debug = 0;
 #endif
-        netif_rx(skb);
+        netif_receive_skb(skb);
 
         return 0;
 }
@@ -54,6 +54,9 @@ int br_handle_frame_finish(struct sk_buff *skb)
         struct net_bridge_fdb_entry *dst;
         int passedup = 0;
 
+        /* insert into forwarding database after filtering to avoid spoofing */
+        br_fdb_update(p->br, p, eth_hdr(skb)->h_source);
+
         if (br->dev->flags & IFF_PROMISC) {
                 struct sk_buff *skb2;
 
@@ -108,8 +111,7 @@ int br_handle_frame(struct net_bridge_port *p, struct sk_buff **pskb)
         if (!is_valid_ether_addr(eth_hdr(skb)->h_source))
                 goto err;
 
-        if (p->state == BR_STATE_LEARNING ||
-            p->state == BR_STATE_FORWARDING)
+        if (p->state == BR_STATE_LEARNING)
                 br_fdb_update(p->br, p, eth_hdr(skb)->h_source);
 
         if (p->br->stp_enabled &&
diff --git a/net/bridge/br_notify.c b/net/bridge/br_notify.c
index f8fb49e34764..917311c6828b 100644
--- a/net/bridge/br_notify.c
+++ b/net/bridge/br_notify.c
@@ -65,6 +65,15 @@ static int br_device_event(struct notifier_block *unused, unsigned long event, v
                 }
                 break;
 
+        case NETDEV_FEAT_CHANGE:
+                if (br->dev->flags & IFF_UP) 
+                        br_features_recompute(br);
+
+                /* could do recursive feature change notification
+                 * but who would care?? 
+                 */
+                break;
+
         case NETDEV_DOWN:
                 if (br->dev->flags & IFF_UP)
                         br_stp_disable_port(p);
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h
index 54d63f1372a0..bdf95a74d8cd 100644
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -174,6 +174,7 @@ extern int br_add_if(struct net_bridge *br,
 extern int br_del_if(struct net_bridge *br,
               struct net_device *dev);
 extern int br_min_mtu(const struct net_bridge *br);
+extern void br_features_recompute(struct net_bridge *br);
 
 /* br_input.c */
 extern int br_handle_frame_finish(struct sk_buff *skb);
diff --git a/net/bridge/br_stp_bpdu.c b/net/bridge/br_stp_bpdu.c
index b91a875aca01..d071f1c9ad0b 100644
--- a/net/bridge/br_stp_bpdu.c
+++ b/net/bridge/br_stp_bpdu.c
@@ -140,6 +140,9 @@ int br_stp_handle_bpdu(struct sk_buff *skb)
         struct net_bridge *br = p->br;
         unsigned char *buf;
 
+        /* insert into forwarding database after filtering to avoid spoofing */
+        br_fdb_update(p->br, p, eth_hdr(skb)->h_source);
+
         /* need at least the 802 and STP headers */
         if (!pskb_may_pull(skb, sizeof(header)+1) ||
             memcmp(skb->data, header, sizeof(header)))
diff --git a/net/core/dev.c b/net/core/dev.c
index d4d9e2680adb..f15a3ffff635 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -761,6 +761,18 @@ int dev_change_name(struct net_device *dev, char *newname)
 }
 
 /**
+ *      netdev_features_change - device changes fatures
+ *      @dev: device to cause notification
+ *
+ *      Called to indicate a device has changed features.
+ */
+void netdev_features_change(struct net_device *dev)
+{
+        notifier_call_chain(&netdev_chain, NETDEV_FEAT_CHANGE, dev);
+}
+EXPORT_SYMBOL(netdev_features_change);
+
+/**
  *      netdev_state_change - device changes state
  *      @dev: device to cause notification
  *
diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index f05fde97c43d..8ec484894d68 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -29,7 +29,7 @@ u32 ethtool_op_get_link(struct net_device *dev)
 
 u32 ethtool_op_get_tx_csum(struct net_device *dev)
 {
-        return (dev->features & NETIF_F_IP_CSUM) != 0;
+        return (dev->features & (NETIF_F_IP_CSUM | NETIF_F_HW_CSUM)) != 0;
 }
 
 int ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
@@ -42,6 +42,15 @@ int ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
         return 0;
 }
 
+int ethtool_op_set_tx_hw_csum(struct net_device *dev, u32 data)
+{
+        if (data)
+                dev->features |= NETIF_F_HW_CSUM;
+        else
+                dev->features &= ~NETIF_F_HW_CSUM;
+
+        return 0;
+}
 u32 ethtool_op_get_sg(struct net_device *dev)
 {
         return (dev->features & NETIF_F_SG) != 0;
@@ -682,6 +691,7 @@ int dev_ethtool(struct ifreq *ifr)
         void __user *useraddr = ifr->ifr_data;
         u32 ethcmd;
         int rc;
+        unsigned long old_features;
 
         /*
          * XXX: This can be pushed down into the ethtool_* handlers that
@@ -703,6 +713,8 @@ int dev_ethtool(struct ifreq *ifr)
                 if ((rc = dev->ethtool_ops->begin(dev)) < 0)
                         return rc;
 
+        old_features = dev->features;
+
         switch (ethcmd) {
         case ETHTOOL_GSET:
                 rc = ethtool_get_settings(dev, useraddr);
@@ -712,7 +724,6 @@ int dev_ethtool(struct ifreq *ifr)
                 break;
         case ETHTOOL_GDRVINFO:
                 rc = ethtool_get_drvinfo(dev, useraddr);
-
                 break;
         case ETHTOOL_GREGS:
                 rc = ethtool_get_regs(dev, useraddr);
@@ -801,6 +812,10 @@ int dev_ethtool(struct ifreq *ifr)
         
         if(dev->ethtool_ops->complete)
                 dev->ethtool_ops->complete(dev);
+
+        if (old_features != dev->features)
+                netdev_features_change(dev);
+
         return rc;
 
  ioctl:
@@ -817,3 +832,4 @@ EXPORT_SYMBOL(ethtool_op_get_tx_csum);
 EXPORT_SYMBOL(ethtool_op_set_sg);
 EXPORT_SYMBOL(ethtool_op_set_tso);
 EXPORT_SYMBOL(ethtool_op_set_tx_csum);
+EXPORT_SYMBOL(ethtool_op_set_tx_hw_csum);
diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c
index 060f703659e8..910eb4c05a47 100644
--- a/net/core/net-sysfs.c
+++ b/net/core/net-sysfs.c
@@ -21,6 +21,7 @@
 #define to_net_dev(class) container_of(class, struct net_device, class_dev)
 
 static const char fmt_hex[] = "%#x\n";
+static const char fmt_long_hex[] = "%#lx\n";
 static const char fmt_dec[] = "%d\n";
 static const char fmt_ulong[] = "%lu\n";
 
@@ -91,7 +92,7 @@ static CLASS_DEVICE_ATTR(field, S_IRUGO, show_##field, NULL)		\
 NETDEVICE_ATTR(addr_len, fmt_dec);
 NETDEVICE_ATTR(iflink, fmt_dec);
 NETDEVICE_ATTR(ifindex, fmt_dec);
-NETDEVICE_ATTR(features, fmt_hex);
+NETDEVICE_ATTR(features, fmt_long_hex);
 NETDEVICE_ATTR(type, fmt_dec);
 
 /* use same locking rules as GIFHWADDR ioctl's */
diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c
index 3cc96730c4ed..478a30179a52 100644
--- a/net/ipv4/devinet.c
+++ b/net/ipv4/devinet.c
@@ -233,11 +233,14 @@ int inet_addr_onlink(struct in_device *in_dev, u32 a, u32 b)
 static void inet_del_ifa(struct in_device *in_dev, struct in_ifaddr **ifap,
                          int destroy)
 {
+        struct in_ifaddr *promote = NULL;
         struct in_ifaddr *ifa1 = *ifap;
 
         ASSERT_RTNL();
 
-        /* 1. Deleting primary ifaddr forces deletion all secondaries */
+        /* 1. Deleting primary ifaddr forces deletion all secondaries 
+         * unless alias promotion is set
+         **/
 
         if (!(ifa1->ifa_flags & IFA_F_SECONDARY)) {
                 struct in_ifaddr *ifa;
@@ -251,11 +254,16 @@ static void inet_del_ifa(struct in_device *in_dev, struct in_ifaddr **ifap,
                                 continue;
                         }
 
-                        *ifap1 = ifa->ifa_next;
+                        if (!IN_DEV_PROMOTE_SECONDARIES(in_dev)) {
+                                *ifap1 = ifa->ifa_next;
 
-                        rtmsg_ifa(RTM_DELADDR, ifa);
-                        notifier_call_chain(&inetaddr_chain, NETDEV_DOWN, ifa);
-                        inet_free_ifa(ifa);
+                                rtmsg_ifa(RTM_DELADDR, ifa);
+                                notifier_call_chain(&inetaddr_chain, NETDEV_DOWN, ifa);
+                                inet_free_ifa(ifa);
+                        } else {
+                                promote = ifa;
+                                break;
+                        }
                 }
         }
 
@@ -281,6 +289,13 @@ static void inet_del_ifa(struct in_device *in_dev, struct in_ifaddr **ifap,
                 if (!in_dev->ifa_list)
                         inetdev_destroy(in_dev);
         }
+
+        if (promote && IN_DEV_PROMOTE_SECONDARIES(in_dev)) {
+                /* not sure if we should send a delete notify first? */
+                promote->ifa_flags &= ~IFA_F_SECONDARY;
+                rtmsg_ifa(RTM_NEWADDR, promote);
+                notifier_call_chain(&inetaddr_chain, NETDEV_UP, promote);
+        }
 }
 
 static int inet_insert_ifa(struct in_ifaddr *ifa)
@@ -1384,6 +1399,15 @@ static struct devinet_sysctl_table {
                         .proc_handler   = &ipv4_doint_and_flush,
                         .strategy       = &ipv4_doint_and_flush_strategy,
                 },
+                {
+                        .ctl_name       = NET_IPV4_CONF_PROMOTE_SECONDARIES,
+                        .procname       = "promote_secondaries",
+                        .data           = &ipv4_devconf.promote_secondaries,
+                        .maxlen         = sizeof(int),
+                        .mode           = 0644,
+                        .proc_handler   = &ipv4_doint_and_flush,
+                        .strategy       = &ipv4_doint_and_flush_strategy,
+                },
         },
         .devinet_dev = {
                 {
diff --git a/net/ipv4/multipath_drr.c b/net/ipv4/multipath_drr.c
index 9349686131fc..cf2e6bcf7973 100644
--- a/net/ipv4/multipath_drr.c
+++ b/net/ipv4/multipath_drr.c
@@ -57,7 +57,6 @@ struct multipath_device {
 
 static struct multipath_device state[MULTIPATH_MAX_DEVICECANDIDATES];
 static DEFINE_SPINLOCK(state_lock);
-static struct rtable *last_selection = NULL;
 
 static int inline __multipath_findslot(void)
 {
@@ -111,11 +110,6 @@ struct notifier_block drr_dev_notifier = {
         .notifier_call  = drr_dev_event,
 };
 
-static void drr_remove(struct rtable *rt)
-{
-        if (last_selection == rt)
-                last_selection = NULL;
-}
 
 static void drr_safe_inc(atomic_t *usecount)
 {
@@ -144,14 +138,6 @@ static void drr_select_route(const struct flowi *flp,
         int devidx = -1;
         int cur_min_devidx = -1;
 
-        /* if necessary and possible utilize the old alternative */
-        if ((flp->flags & FLOWI_FLAG_MULTIPATHOLDROUTE) != 0 &&
-            last_selection != NULL) {
-                result = last_selection;
-                *rp = result;
-                return;
-        }
-
         /* 1. make sure all alt. nexthops have the same GC related data */
         /* 2. determine the new candidate to be returned */
         result = NULL;
@@ -229,12 +215,10 @@ static void drr_select_route(const struct flowi *flp,
         }
 
         *rp = result;
-        last_selection = result;
 }
 
 static struct ip_mp_alg_ops drr_ops = {
         .mp_alg_select_route    =       drr_select_route,
-        .mp_alg_remove          =       drr_remove,
 };
 
 static int __init drr_init(void)
@@ -244,7 +228,7 @@ static int __init drr_init(void)
         if (err)
                 return err;
 
-        err = multipath_alg_register(&drr_ops, IP_MP_ALG_RR);
+        err = multipath_alg_register(&drr_ops, IP_MP_ALG_DRR);
         if (err)
                 goto fail;
 
diff --git a/net/ipv4/multipath_rr.c b/net/ipv4/multipath_rr.c
index 554a82568160..061b6b253982 100644
--- a/net/ipv4/multipath_rr.c
+++ b/net/ipv4/multipath_rr.c
@@ -47,29 +47,12 @@
 #include <net/checksum.h>
 #include <net/ip_mp_alg.h>
 
-#define MULTIPATH_MAX_CANDIDATES 40
-
-static struct rtable* last_used = NULL;
-
-static void rr_remove(struct rtable *rt)
-{
-        if (last_used == rt)
-                last_used = NULL;
-}
-
 static void rr_select_route(const struct flowi *flp,
                             struct rtable *first, struct rtable **rp)
 {
         struct rtable *nh, *result, *min_use_cand = NULL;
         int min_use = -1;
 
-        /* if necessary and possible utilize the old alternative */
-        if ((flp->flags & FLOWI_FLAG_MULTIPATHOLDROUTE) != 0 &&
-            last_used != NULL) {
-                result = last_used;
-                goto out;
-        }
-
         /* 1. make sure all alt. nexthops have the same GC related data
          * 2. determine the new candidate to be returned
          */
@@ -90,15 +73,12 @@ static void rr_select_route(const struct flowi *flp,
         if (!result)
                 result = first;
 
-out:
-        last_used = result;
         result->u.dst.__use++;
         *rp = result;
 }
 
 static struct ip_mp_alg_ops rr_ops = {
         .mp_alg_select_route    =       rr_select_route,
-        .mp_alg_remove          =       rr_remove,
 };
 
 static int __init rr_init(void)
diff --git a/net/ipv6/ip6_flowlabel.c b/net/ipv6/ip6_flowlabel.c
index a93f6dc51979..0e5f7499debb 100644
--- a/net/ipv6/ip6_flowlabel.c
+++ b/net/ipv6/ip6_flowlabel.c
@@ -535,10 +535,12 @@ release:
                 if (err)
                         goto done;
 
-                /* Do not check for fault */
-                if (!freq.flr_label)
-                        copy_to_user(&((struct in6_flowlabel_req __user *) optval)->flr_label,
-                                     &fl->label, sizeof(fl->label));
+                if (!freq.flr_label) {
+                        if (copy_to_user(&((struct in6_flowlabel_req __user *) optval)->flr_label,
+                                         &fl->label, sizeof(fl->label))) {
+                                /* Intentionally ignore fault. */
+                        }
+                }
 
                 sfl1->fl = fl;
                 sfl1->next = np->ipv6_fl_list;
diff --git a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c
index 4429b1a1fe5f..cf1d91e74c82 100644
--- a/net/ipv6/xfrm6_policy.c
+++ b/net/ipv6/xfrm6_policy.c
@@ -113,6 +113,8 @@ __xfrm6_bundle_create(struct xfrm_policy *policy, struct xfrm_state **xfrm, int
 
                 xdst = (struct xfrm_dst *)dst1;
                 xdst->route = &rt->u.dst;
+                if (rt->rt6i_node)
+                        xdst->route_cookie = rt->rt6i_node->fn_sernum;
 
                 dst1->next = dst_prev;
                 dst_prev = dst1;
@@ -137,6 +139,8 @@ __xfrm6_bundle_create(struct xfrm_policy *policy, struct xfrm_state **xfrm, int
 
         dst_prev->child = &rt->u.dst;
         dst->path = &rt->u.dst;
+        if (rt->rt6i_node)
+                ((struct xfrm_dst *)dst)->path_cookie = rt->rt6i_node->fn_sernum;
 
         *dst_p = dst;
         dst = dst_prev;
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c
index e0c9fbe73b15..bb9bf8d5003c 100644
--- a/net/sched/sch_netem.c
+++ b/net/sched/sch_netem.c
@@ -53,7 +53,6 @@
 
 struct netem_sched_data {
         struct Qdisc    *qdisc;
-        struct sk_buff_head delayed;
         struct timer_list timer;
 
         u32 latency;
@@ -63,11 +62,12 @@ struct netem_sched_data {
         u32 gap;
         u32 jitter;
         u32 duplicate;
+        u32 reorder;
 
         struct crndstate {
                 unsigned long last;
                 unsigned long rho;
-        } delay_cor, loss_cor, dup_cor;
+        } delay_cor, loss_cor, dup_cor, reorder_cor;
 
         struct disttable {
                 u32  size;
@@ -137,122 +137,68 @@ static long tabledist(unsigned long mu, long sigma,
         return  x / NETEM_DIST_SCALE + (sigma / NETEM_DIST_SCALE) * t + mu;
 }
 
-/* Put skb in the private delayed queue. */
-static int netem_delay(struct Qdisc *sch, struct sk_buff *skb)
-{
-        struct netem_sched_data *q = qdisc_priv(sch);
-        psched_tdiff_t td;
-        psched_time_t now;
-        
-        PSCHED_GET_TIME(now);
-        td = tabledist(q->latency, q->jitter, &q->delay_cor, q->delay_dist);
-        
-        /* Always queue at tail to keep packets in order */
-        if (likely(q->delayed.qlen < q->limit)) {
-                struct netem_skb_cb *cb = (struct netem_skb_cb *)skb->cb;
-        
-                PSCHED_TADD2(now, td, cb->time_to_send);
-
-                pr_debug("netem_delay: skb=%p now=%llu tosend=%llu\n", skb, 
-                         now, cb->time_to_send);
-        
-                __skb_queue_tail(&q->delayed, skb);
-                return NET_XMIT_SUCCESS;
-        }
-
-        pr_debug("netem_delay: queue over limit %d\n", q->limit);
-        sch->qstats.overlimits++;
-        kfree_skb(skb);
-        return NET_XMIT_DROP;
-}
-
 /*
- *  Move a packet that is ready to send from the delay holding
- *  list to the underlying qdisc.
+ * Insert one skb into qdisc.
+ * Note: parent depends on return value to account for queue length.
+ *      NET_XMIT_DROP: queue length didn't change.
+ *      NET_XMIT_SUCCESS: one skb was queued.
  */
-static int netem_run(struct Qdisc *sch)
-{
-        struct netem_sched_data *q = qdisc_priv(sch);
-        struct sk_buff *skb;
-        psched_time_t now;
-
-        PSCHED_GET_TIME(now);
-
-        skb = skb_peek(&q->delayed);
-        if (skb) {
-                const struct netem_skb_cb *cb
-                        = (const struct netem_skb_cb *)skb->cb;
-                long delay 
-                        = PSCHED_US2JIFFIE(PSCHED_TDIFF(cb->time_to_send, now));
-                pr_debug("netem_run: skb=%p delay=%ld\n", skb, delay);
-
-                /* if more time remaining? */
-                if (delay > 0) {
-                        mod_timer(&q->timer, jiffies + delay);
-                        return 1;
-                }
-
-                __skb_unlink(skb, &q->delayed);
-                
-                if (q->qdisc->enqueue(skb, q->qdisc)) {
-                        sch->q.qlen--;
-                        sch->qstats.drops++;
-                } 
-        }
-
-        return 0;
-}
-
 static int netem_enqueue(struct sk_buff *skb, struct Qdisc *sch)
 {
         struct netem_sched_data *q = qdisc_priv(sch);
+        struct netem_skb_cb *cb = (struct netem_skb_cb *)skb->cb;
+        struct sk_buff *skb2;
         int ret;
+        int count = 1;
 
         pr_debug("netem_enqueue skb=%p\n", skb);
 
+        /* Random duplication */
+        if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor))
+                ++count;
+
         /* Random packet drop 0 => none, ~0 => all */
-        if (q->loss && q->loss >= get_crandom(&q->loss_cor)) {
-                pr_debug("netem_enqueue: random loss\n");
+        if (q->loss && q->loss >= get_crandom(&q->loss_cor))
+                --count;
+
+        if (count == 0) {
                 sch->qstats.drops++;
                 kfree_skb(skb);
-                return 0;       /* lie about loss so TCP doesn't know */
+                return NET_XMIT_DROP;
         }
 
-        /* Random duplication */
-        if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor)) {
-                struct sk_buff *skb2;
-
-                skb2 = skb_clone(skb, GFP_ATOMIC);
-                if (skb2 && netem_delay(sch, skb2) == NET_XMIT_SUCCESS) {
-                        struct Qdisc *qp;
-
-                        /* Since one packet can generate two packets in the
-                         * queue, the parent's qlen accounting gets confused,
-                         * so fix it.
-                         */
-                        qp = qdisc_lookup(sch->dev, TC_H_MAJ(sch->parent));
-                        if (qp)
-                                qp->q.qlen++;
-
-                        sch->q.qlen++;
-                        sch->bstats.bytes += skb2->len;
-                        sch->bstats.packets++;
-                } else
-                        sch->qstats.drops++;
+        /*
+         * If we need to duplicate packet, then re-insert at top of the
+         * qdisc tree, since parent queuer expects that only one
+         * skb will be queued.
+         */
+        if (count > 1 && (skb2 = skb_clone(skb, GFP_ATOMIC)) != NULL) {
+                struct Qdisc *rootq = sch->dev->qdisc;
+                u32 dupsave = q->duplicate; /* prevent duplicating a dup... */
+                q->duplicate = 0;
+
+                rootq->enqueue(skb2, rootq);
+                q->duplicate = dupsave;
         }
 
-        /* If doing simple delay then gap == 0 so all packets
-         * go into the delayed holding queue
-         * otherwise if doing out of order only "1 out of gap"
-         * packets will be delayed.
-         */
-        if (q->counter < q->gap) {
+        if (q->gap == 0                 /* not doing reordering */
+            || q->counter < q->gap      /* inside last reordering gap */
+            || q->reorder < get_crandom(&q->reorder_cor)) {
+                psched_time_t now;
+                PSCHED_GET_TIME(now);
+                PSCHED_TADD2(now, tabledist(q->latency, q->jitter, 
+                                            &q->delay_cor, q->delay_dist),
+                             cb->time_to_send);
                 ++q->counter;
                 ret = q->qdisc->enqueue(skb, q->qdisc);
         } else {
+                /* 
+                 * Do re-ordering by putting one out of N packets at the front
+                 * of the queue.
+                 */
+                PSCHED_GET_TIME(cb->time_to_send);
                 q->counter = 0;
-                ret = netem_delay(sch, skb);
-                netem_run(sch);
+                ret = q->qdisc->ops->requeue(skb, q->qdisc);
         }
 
         if (likely(ret == NET_XMIT_SUCCESS)) {
@@ -296,22 +242,33 @@ static struct sk_buff *netem_dequeue(struct Qdisc *sch)
 {
         struct netem_sched_data *q = qdisc_priv(sch);
         struct sk_buff *skb;
-        int pending;
-
-        pending = netem_run(sch);
 
         skb = q->qdisc->dequeue(q->qdisc);
         if (skb) {
-                pr_debug("netem_dequeue: return skb=%p\n", skb);
-                sch->q.qlen--;
-                sch->flags &= ~TCQ_F_THROTTLED;
-        }
-        else if (pending) {
-                pr_debug("netem_dequeue: throttling\n");
+                const struct netem_skb_cb *cb
+                        = (const struct netem_skb_cb *)skb->cb;
+                psched_time_t now;
+                long delay;
+
+                /* if more time remaining? */
+                PSCHED_GET_TIME(now);
+                delay = PSCHED_US2JIFFIE(PSCHED_TDIFF(cb->time_to_send, now));
+                pr_debug("netem_run: skb=%p delay=%ld\n", skb, delay);
+                if (delay <= 0) {
+                        pr_debug("netem_dequeue: return skb=%p\n", skb);
+                        sch->q.qlen--;
+                        sch->flags &= ~TCQ_F_THROTTLED;
+                        return skb;
+                }
+
+                mod_timer(&q->timer, jiffies + delay);
                 sch->flags |= TCQ_F_THROTTLED;
-        } 
 
-        return skb;
+                if (q->qdisc->ops->requeue(skb, q->qdisc) != 0)
+                        sch->qstats.drops++;
+        }
+
+        return NULL;
 }
 
 static void netem_watchdog(unsigned long arg)
@@ -328,8 +285,6 @@ static void netem_reset(struct Qdisc *sch)
         struct netem_sched_data *q = qdisc_priv(sch);
 
         qdisc_reset(q->qdisc);
-        skb_queue_purge(&q->delayed);
-
         sch->q.qlen = 0;
         sch->flags &= ~TCQ_F_THROTTLED;
         del_timer_sync(&q->timer);
@@ -397,6 +352,19 @@ static int get_correlation(struct Qdisc *sch, const struct rtattr *attr)
         return 0;
 }
 
+static int get_reorder(struct Qdisc *sch, const struct rtattr *attr)
+{
+        struct netem_sched_data *q = qdisc_priv(sch);
+        const struct tc_netem_reorder *r = RTA_DATA(attr);
+
+        if (RTA_PAYLOAD(attr) != sizeof(*r))
+                return -EINVAL;
+
+        q->reorder = r->probability;
+        init_crandom(&q->reorder_cor, r->correlation);
+        return 0;
+}
+
 static int netem_change(struct Qdisc *sch, struct rtattr *opt)
 {
         struct netem_sched_data *q = qdisc_priv(sch);
@@ -417,9 +385,15 @@ static int netem_change(struct Qdisc *sch, struct rtattr *opt)
         q->jitter = qopt->jitter;
         q->limit = qopt->limit;
         q->gap = qopt->gap;
+        q->counter = 0;
         q->loss = qopt->loss;
         q->duplicate = qopt->duplicate;
 
+        /* for compatiablity with earlier versions.
+         * if gap is set, need to assume 100% probablity
+         */
+        q->reorder = ~0;
+
         /* Handle nested options after initial queue options.
          * Should have put all options in nested format but too late now.
          */ 
@@ -441,6 +415,11 @@ static int netem_change(struct Qdisc *sch, struct rtattr *opt)
                         if (ret)
                                 return ret;
                 }
+                if (tb[TCA_NETEM_REORDER-1]) {
+                        ret = get_reorder(sch, tb[TCA_NETEM_REORDER-1]);
+                        if (ret)
+                                return ret;
+                }
         }
 
 
@@ -455,11 +434,9 @@ static int netem_init(struct Qdisc *sch, struct rtattr *opt)
         if (!opt)
                 return -EINVAL;
 
-        skb_queue_head_init(&q->delayed);
         init_timer(&q->timer);
         q->timer.function = netem_watchdog;
         q->timer.data = (unsigned long) sch;
-        q->counter = 0;
 
         q->qdisc = qdisc_create_dflt(sch->dev, &pfifo_qdisc_ops);
         if (!q->qdisc) {
@@ -491,6 +468,7 @@ static int netem_dump(struct Qdisc *sch, struct sk_buff *skb)
         struct rtattr *rta = (struct rtattr *) b;
         struct tc_netem_qopt qopt;
         struct tc_netem_corr cor;
+        struct tc_netem_reorder reorder;
 
         qopt.latency = q->latency;
         qopt.jitter = q->jitter;
@@ -504,6 +482,11 @@ static int netem_dump(struct Qdisc *sch, struct sk_buff *skb)
         cor.loss_corr = q->loss_cor.rho;
         cor.dup_corr = q->dup_cor.rho;
         RTA_PUT(skb, TCA_NETEM_CORR, sizeof(cor), &cor);
+
+        reorder.probability = q->reorder;
+        reorder.correlation = q->reorder_cor.rho;
+        RTA_PUT(skb, TCA_NETEM_REORDER, sizeof(reorder), &reorder);
+
         rta->rta_len = skb->tail - b;
 
         return skb->len;
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 55ed979db144..d07f5ce31824 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -1136,7 +1136,7 @@ int xfrm_bundle_ok(struct xfrm_dst *first, struct flowi *fl, int family)
         struct xfrm_dst *last;
         u32 mtu;
 
-        if (!dst_check(dst->path, 0) ||
+        if (!dst_check(dst->path, ((struct xfrm_dst *)dst)->path_cookie) ||
             (dst->dev && !netif_running(dst->dev)))
                 return 0;
 
@@ -1156,7 +1156,7 @@ int xfrm_bundle_ok(struct xfrm_dst *first, struct flowi *fl, int family)
                         xdst->child_mtu_cached = mtu;
                 }
 
-                if (!dst_check(xdst->route, 0))
+                if (!dst_check(xdst->route, xdst->route_cookie))
                         return 0;
                 mtu = dst_mtu(xdst->route);
                 if (xdst->route_mtu_cached != mtu) {
diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
index a9602f89d6b1..e537bd66a707 100644
--- a/sound/oss/Kconfig
+++ b/sound/oss/Kconfig
@@ -112,7 +112,7 @@ config SOUND_BCM_CS4297A
 
 config SOUND_ES1370
         tristate "Ensoniq AudioPCI (ES1370)"
-        depends on SOUND_PRIME!=n && SOUND && PCI && SOUND_GAMEPORT
+        depends on SOUND_PRIME!=n && SOUND && PCI
         help
           Say Y or M if you have a PCI sound card utilizing the Ensoniq
           ES1370 chipset, such as Ensoniq's AudioPCI (non-97). To find
@@ -125,7 +125,7 @@ config SOUND_ES1370
 
 config SOUND_ES1371
         tristate "Creative Ensoniq AudioPCI 97 (ES1371)"
-        depends on SOUND_PRIME!=n && SOUND && PCI && SOUND_GAMEPORT
+        depends on SOUND_PRIME!=n && SOUND && PCI
         help
           Say Y or M if you have a PCI sound card utilizing the Ensoniq
           ES1371 chipset, such as Ensoniq's AudioPCI97. To find out if
@@ -138,7 +138,7 @@ config SOUND_ES1371
 
 config SOUND_ESSSOLO1
         tristate "ESS Technology Solo1" 
-        depends on SOUND_PRIME!=n && SOUND && SOUND_GAMEPORT && PCI
+        depends on SOUND_PRIME!=n && SOUND && PCI
         help
           Say Y or M if you have a PCI sound card utilizing the ESS Technology
           Solo1 chip. To find out if your sound card uses a
@@ -179,7 +179,7 @@ config SOUND_HARMONY
 
 config SOUND_SONICVIBES
         tristate "S3 SonicVibes"
-        depends on SOUND_PRIME!=n && SOUND && SOUND_GAMEPORT
+        depends on SOUND_PRIME!=n && SOUND
         help
           Say Y or M if you have a PCI sound card utilizing the S3
           SonicVibes chipset. To find out if your sound card uses a
@@ -226,7 +226,7 @@ config SOUND_AU1550_AC97
 
 config SOUND_TRIDENT
         tristate "Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core"
-        depends on SOUND_PRIME!=n && SOUND && SOUND_GAMEPORT
+        depends on SOUND_PRIME!=n && SOUND
         ---help---
           Say Y or M if you have a PCI sound card utilizing the Trident
           4DWave-DX/NX chipset or your mother board chipset has SiS 7018
@@ -739,7 +739,7 @@ config SOUND_NM256
 
 config SOUND_MAD16
         tristate "OPTi MAD16 and/or Mozart based cards"
-        depends on SOUND_OSS && SOUND_GAMEPORT
+        depends on SOUND_OSS
         ---help---
           Answer Y if your card has a Mozart (OAK OTI-601) or MAD16 (OPTi
           82C928 or 82C929 or 82C931) audio interface chip. These chips are
diff --git a/sound/ppc/pmac.c b/sound/ppc/pmac.c
index 32d94754acf8..080ef3928465 100644
--- a/sound/ppc/pmac.c
+++ b/sound/ppc/pmac.c
@@ -876,7 +876,7 @@ static void __init detect_byte_swap(pmac_t *chip)
  */
 static int __init snd_pmac_detect(pmac_t *chip)
 {
-        struct device_node *sound;
+        struct device_node *sound = NULL;
         unsigned int *prop, l;
         struct macio_chip* macio;
 
@@ -906,20 +906,22 @@ static int __init snd_pmac_detect(pmac_t *chip)
                 chip->is_pbook_G3 = 1;
         chip->node = find_devices("awacs");
         if (chip->node)
-                return 0; /* ok */
+                sound = chip->node;
 
         /*
          * powermac G3 models have a node called "davbus"
          * with a child called "sound".
          */
-        chip->node = find_devices("davbus");
+        if (!chip->node)
+                chip->node = find_devices("davbus");
         /*
          * if we didn't find a davbus device, try 'i2s-a' since
          * this seems to be what iBooks have
          */
         if (! chip->node) {
                 chip->node = find_devices("i2s-a");
-                if (chip->node && chip->node->parent && chip->node->parent->parent) {
+                if (chip->node && chip->node->parent &&
+                    chip->node->parent->parent) {
                         if (device_is_compatible(chip->node->parent->parent,
                                                  "K2-Keylargo"))
                                 chip->is_k2 = 1;
@@ -928,9 +930,11 @@ static int __init snd_pmac_detect(pmac_t *chip)
         if (! chip->node)
                 return -ENODEV;
 
-        sound = find_devices("sound");
-        while (sound && sound->parent != chip->node)
-                sound = sound->next;
+        if (!sound) {
+                sound = find_devices("sound");
+                while (sound && sound->parent != chip->node)
+                        sound = sound->next;
+        }
         if (! sound)
                 return -ENODEV;
         prop = (unsigned int *) get_property(sound, "sub-frame", NULL);
@@ -1019,7 +1023,8 @@ static int __init snd_pmac_detect(pmac_t *chip)
                 }
         }
         if (chip->pdev == NULL)
-                printk(KERN_WARNING "snd-powermac: can't locate macio PCI device !\n");
+                printk(KERN_WARNING "snd-powermac: can't locate macio PCI"
+                       " device !\n");
 
         detect_byte_swap(chip);
 
@@ -1027,7 +1032,8 @@ static int __init snd_pmac_detect(pmac_t *chip)
            are available */
         prop = (unsigned int *) get_property(sound, "sample-rates", &l);
         if (! prop)
-                prop = (unsigned int *) get_property(sound, "output-frame-rates", &l);
+                prop = (unsigned int *) get_property(sound,
+                                                     "output-frame-rates", &l);
         if (prop) {
                 int i;
                 chip->freqs_ok = 0;
@@ -1054,7 +1060,8 @@ static int __init snd_pmac_detect(pmac_t *chip)
 /*
  * exported - boolean info callbacks for ease of programming
  */
-int snd_pmac_boolean_stereo_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+int snd_pmac_boolean_stereo_info(snd_kcontrol_t *kcontrol,
+                                 snd_ctl_elem_info_t *uinfo)
 {
         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
         uinfo->count = 2;
@@ -1063,7 +1070,8 @@ int snd_pmac_boolean_stereo_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *
         return 0;
 }
 
-int snd_pmac_boolean_mono_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+int snd_pmac_boolean_mono_info(snd_kcontrol_t *kcontrol,
+                               snd_ctl_elem_info_t *uinfo)
 {
         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
         uinfo->count = 1;