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authorMichael Buesch <mb@bu3sch.de>2008-04-05 09:02:09 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-04-08 16:44:43 -0400
commitc97a4ccc1fad35d3d183900af29c171b6d56b7f9 (patch)
tree92689f21bed8d747e91c7ef79f43399f34e767ac
parent84363e6e07f17f8cc580065260907ee3f0520485 (diff)
b43: Fix beacon BH update
This fixes beacon updating in the bottomhalf. In case the device is busy, we will defer to later in the IRQ handler. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/b43/b43.h1
-rw-r--r--drivers/net/wireless/b43/main.c95
2 files changed, 54 insertions, 42 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index bf6b276d47e2..4ba4a73673bc 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -411,7 +411,6 @@ enum {
411 411
412#define B43_IRQ_ALL 0xFFFFFFFF 412#define B43_IRQ_ALL 0xFFFFFFFF
413#define B43_IRQ_MASKTEMPLATE (B43_IRQ_MAC_SUSPENDED | \ 413#define B43_IRQ_MASKTEMPLATE (B43_IRQ_MAC_SUSPENDED | \
414 B43_IRQ_BEACON | \
415 B43_IRQ_TBTT_INDI | \ 414 B43_IRQ_TBTT_INDI | \
416 B43_IRQ_ATIM_END | \ 415 B43_IRQ_ATIM_END | \
417 B43_IRQ_PMQ | \ 416 B43_IRQ_PMQ | \
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index c98337b2d687..ec28a6ef42be 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1448,6 +1448,53 @@ static void b43_write_probe_resp_template(struct b43_wldev *dev,
1448 kfree(probe_resp_data); 1448 kfree(probe_resp_data);
1449} 1449}
1450 1450
1451static void handle_irq_beacon(struct b43_wldev *dev)
1452{
1453 struct b43_wl *wl = dev->wl;
1454 u32 cmd, beacon0_valid, beacon1_valid;
1455
1456 if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
1457 return;
1458
1459 /* This is the bottom half of the asynchronous beacon update. */
1460
1461 /* Ignore interrupt in the future. */
1462 dev->irq_savedstate &= ~B43_IRQ_BEACON;
1463
1464 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1465 beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
1466 beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
1467
1468 /* Schedule interrupt manually, if busy. */
1469 if (beacon0_valid && beacon1_valid) {
1470 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
1471 dev->irq_savedstate |= B43_IRQ_BEACON;
1472 return;
1473 }
1474
1475 if (!beacon0_valid) {
1476 if (!wl->beacon0_uploaded) {
1477 b43_write_beacon_template(dev, 0x68, 0x18,
1478 B43_CCK_RATE_1MB);
1479 b43_write_probe_resp_template(dev, 0x268, 0x4A,
1480 &__b43_ratetable[3]);
1481 wl->beacon0_uploaded = 1;
1482 }
1483 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1484 cmd |= B43_MACCMD_BEACON0_VALID;
1485 b43_write32(dev, B43_MMIO_MACCMD, cmd);
1486 } else if (!beacon1_valid) {
1487 if (!wl->beacon1_uploaded) {
1488 b43_write_beacon_template(dev, 0x468, 0x1A,
1489 B43_CCK_RATE_1MB);
1490 wl->beacon1_uploaded = 1;
1491 }
1492 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1493 cmd |= B43_MACCMD_BEACON1_VALID;
1494 b43_write32(dev, B43_MMIO_MACCMD, cmd);
1495 }
1496}
1497
1451static void b43_beacon_update_trigger_work(struct work_struct *work) 1498static void b43_beacon_update_trigger_work(struct work_struct *work)
1452{ 1499{
1453 struct b43_wl *wl = container_of(work, struct b43_wl, 1500 struct b43_wl *wl = container_of(work, struct b43_wl,
@@ -1457,13 +1504,14 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
1457 mutex_lock(&wl->mutex); 1504 mutex_lock(&wl->mutex);
1458 dev = wl->current_dev; 1505 dev = wl->current_dev;
1459 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { 1506 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
1460 /* Force the microcode to trigger the
1461 * beacon update bottom-half IRQ. */
1462 spin_lock_irq(&wl->irq_lock); 1507 spin_lock_irq(&wl->irq_lock);
1463 b43_write32(dev, B43_MMIO_MACCMD, 1508 /* update beacon right away or defer to irq */
1464 b43_read32(dev, B43_MMIO_MACCMD) 1509 dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
1465 | B43_MACCMD_BEACON0_VALID 1510 handle_irq_beacon(dev);
1466 | B43_MACCMD_BEACON1_VALID); 1511 /* The handler might have updated the IRQ mask. */
1512 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
1513 dev->irq_savedstate);
1514 mmiowb();
1467 spin_unlock_irq(&wl->irq_lock); 1515 spin_unlock_irq(&wl->irq_lock);
1468 } 1516 }
1469 mutex_unlock(&wl->mutex); 1517 mutex_unlock(&wl->mutex);
@@ -1520,41 +1568,6 @@ static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
1520 b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int); 1568 b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1521} 1569}
1522 1570
1523static void handle_irq_beacon(struct b43_wldev *dev)
1524{
1525 struct b43_wl *wl = dev->wl;
1526 u32 cmd, beacon0_valid, beacon1_valid;
1527
1528 if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
1529 return;
1530
1531 /* This is the bottom half of the asynchronous beacon update. */
1532
1533 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1534 beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
1535 beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
1536 cmd &= ~(B43_MACCMD_BEACON0_VALID | B43_MACCMD_BEACON1_VALID);
1537
1538 if (!beacon0_valid) {
1539 if (!wl->beacon0_uploaded) {
1540 b43_write_beacon_template(dev, 0x68, 0x18,
1541 B43_CCK_RATE_1MB);
1542 b43_write_probe_resp_template(dev, 0x268, 0x4A,
1543 &__b43_ratetable[3]);
1544 wl->beacon0_uploaded = 1;
1545 }
1546 cmd |= B43_MACCMD_BEACON0_VALID;
1547 } else if (!beacon1_valid) {
1548 if (!wl->beacon1_uploaded) {
1549 b43_write_beacon_template(dev, 0x468, 0x1A,
1550 B43_CCK_RATE_1MB);
1551 wl->beacon1_uploaded = 1;
1552 }
1553 cmd |= B43_MACCMD_BEACON1_VALID;
1554 }
1555 b43_write32(dev, B43_MMIO_MACCMD, cmd);
1556}
1557
1558static void handle_irq_ucode_debug(struct b43_wldev *dev) 1571static void handle_irq_ucode_debug(struct b43_wldev *dev)
1559{ 1572{
1560 //TODO 1573 //TODO