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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2008-04-03 16:13:17 -0400
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-04-07 13:19:13 -0400
commitc6952483b070ec8a4f2450d1116be908fe59edcc (patch)
tree8a1dc8c79c449120b5272288ef7dfdb1a583a4eb
parent5ab5a4dd5444db0715b5748bab916725138d3a32 (diff)
[SCSI] qla2xxx: Simplify interrupt handler locking.
There's no need to use the heavier (albiet safer) *_irq[save|restore]() locking primitives within the driver's interrupt handlers, interrupts are guaranteed to be non-reentrant. Use lightweight spin_lock() and spin_unlock() primitives while acquiring the hardware_lock. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
-rw-r--r--drivers/scsi/qla2xxx/qla_isr.c31
1 files changed, 12 insertions, 19 deletions
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 370fba59dfd2..4e9f41034466 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -33,7 +33,6 @@ qla2100_intr_handler(int irq, void *dev_id)
33 scsi_qla_host_t *ha; 33 scsi_qla_host_t *ha;
34 struct device_reg_2xxx __iomem *reg; 34 struct device_reg_2xxx __iomem *reg;
35 int status; 35 int status;
36 unsigned long flags;
37 unsigned long iter; 36 unsigned long iter;
38 uint16_t hccr; 37 uint16_t hccr;
39 uint16_t mb[4]; 38 uint16_t mb[4];
@@ -48,7 +47,7 @@ qla2100_intr_handler(int irq, void *dev_id)
48 reg = &ha->iobase->isp; 47 reg = &ha->iobase->isp;
49 status = 0; 48 status = 0;
50 49
51 spin_lock_irqsave(&ha->hardware_lock, flags); 50 spin_lock(&ha->hardware_lock);
52 for (iter = 50; iter--; ) { 51 for (iter = 50; iter--; ) {
53 hccr = RD_REG_WORD(&reg->hccr); 52 hccr = RD_REG_WORD(&reg->hccr);
54 if (hccr & HCCR_RISC_PAUSE) { 53 if (hccr & HCCR_RISC_PAUSE) {
@@ -99,7 +98,7 @@ qla2100_intr_handler(int irq, void *dev_id)
99 RD_REG_WORD(&reg->hccr); 98 RD_REG_WORD(&reg->hccr);
100 } 99 }
101 } 100 }
102 spin_unlock_irqrestore(&ha->hardware_lock, flags); 101 spin_unlock(&ha->hardware_lock);
103 102
104 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 103 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
105 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { 104 (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
@@ -125,7 +124,6 @@ qla2300_intr_handler(int irq, void *dev_id)
125 scsi_qla_host_t *ha; 124 scsi_qla_host_t *ha;
126 struct device_reg_2xxx __iomem *reg; 125 struct device_reg_2xxx __iomem *reg;
127 int status; 126 int status;
128 unsigned long flags;
129 unsigned long iter; 127 unsigned long iter;
130 uint32_t stat; 128 uint32_t stat;
131 uint16_t hccr; 129 uint16_t hccr;
@@ -141,7 +139,7 @@ qla2300_intr_handler(int irq, void *dev_id)
141 reg = &ha->iobase->isp; 139 reg = &ha->iobase->isp;
142 status = 0; 140 status = 0;
143 141
144 spin_lock_irqsave(&ha->hardware_lock, flags); 142 spin_lock(&ha->hardware_lock);
145 for (iter = 50; iter--; ) { 143 for (iter = 50; iter--; ) {
146 stat = RD_REG_DWORD(&reg->u.isp2300.host_status); 144 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
147 if (stat & HSR_RISC_PAUSED) { 145 if (stat & HSR_RISC_PAUSED) {
@@ -211,7 +209,7 @@ qla2300_intr_handler(int irq, void *dev_id)
211 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT); 209 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
212 RD_REG_WORD_RELAXED(&reg->hccr); 210 RD_REG_WORD_RELAXED(&reg->hccr);
213 } 211 }
214 spin_unlock_irqrestore(&ha->hardware_lock, flags); 212 spin_unlock(&ha->hardware_lock);
215 213
216 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 214 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
217 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { 215 (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
@@ -1533,7 +1531,6 @@ qla24xx_intr_handler(int irq, void *dev_id)
1533 scsi_qla_host_t *ha; 1531 scsi_qla_host_t *ha;
1534 struct device_reg_24xx __iomem *reg; 1532 struct device_reg_24xx __iomem *reg;
1535 int status; 1533 int status;
1536 unsigned long flags;
1537 unsigned long iter; 1534 unsigned long iter;
1538 uint32_t stat; 1535 uint32_t stat;
1539 uint32_t hccr; 1536 uint32_t hccr;
@@ -1549,7 +1546,7 @@ qla24xx_intr_handler(int irq, void *dev_id)
1549 reg = &ha->iobase->isp24; 1546 reg = &ha->iobase->isp24;
1550 status = 0; 1547 status = 0;
1551 1548
1552 spin_lock_irqsave(&ha->hardware_lock, flags); 1549 spin_lock(&ha->hardware_lock);
1553 for (iter = 50; iter--; ) { 1550 for (iter = 50; iter--; ) {
1554 stat = RD_REG_DWORD(&reg->host_status); 1551 stat = RD_REG_DWORD(&reg->host_status);
1555 if (stat & HSRX_RISC_PAUSED) { 1552 if (stat & HSRX_RISC_PAUSED) {
@@ -1597,7 +1594,7 @@ qla24xx_intr_handler(int irq, void *dev_id)
1597 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1594 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1598 RD_REG_DWORD_RELAXED(&reg->hccr); 1595 RD_REG_DWORD_RELAXED(&reg->hccr);
1599 } 1596 }
1600 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1597 spin_unlock(&ha->hardware_lock);
1601 1598
1602 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 1599 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
1603 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { 1600 (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
@@ -1656,18 +1653,16 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
1656{ 1653{
1657 scsi_qla_host_t *ha; 1654 scsi_qla_host_t *ha;
1658 struct device_reg_24xx __iomem *reg; 1655 struct device_reg_24xx __iomem *reg;
1659 unsigned long flags;
1660 1656
1661 ha = dev_id; 1657 ha = dev_id;
1662 reg = &ha->iobase->isp24; 1658 reg = &ha->iobase->isp24;
1663 1659
1664 spin_lock_irqsave(&ha->hardware_lock, flags); 1660 spin_lock(&ha->hardware_lock);
1665 1661
1666 qla24xx_process_response_queue(ha); 1662 qla24xx_process_response_queue(ha);
1667
1668 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1663 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1669 1664
1670 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1665 spin_unlock(&ha->hardware_lock);
1671 1666
1672 return IRQ_HANDLED; 1667 return IRQ_HANDLED;
1673} 1668}
@@ -1678,7 +1673,6 @@ qla24xx_msix_default(int irq, void *dev_id)
1678 scsi_qla_host_t *ha; 1673 scsi_qla_host_t *ha;
1679 struct device_reg_24xx __iomem *reg; 1674 struct device_reg_24xx __iomem *reg;
1680 int status; 1675 int status;
1681 unsigned long flags;
1682 uint32_t stat; 1676 uint32_t stat;
1683 uint32_t hccr; 1677 uint32_t hccr;
1684 uint16_t mb[4]; 1678 uint16_t mb[4];
@@ -1687,7 +1681,7 @@ qla24xx_msix_default(int irq, void *dev_id)
1687 reg = &ha->iobase->isp24; 1681 reg = &ha->iobase->isp24;
1688 status = 0; 1682 status = 0;
1689 1683
1690 spin_lock_irqsave(&ha->hardware_lock, flags); 1684 spin_lock(&ha->hardware_lock);
1691 do { 1685 do {
1692 stat = RD_REG_DWORD(&reg->host_status); 1686 stat = RD_REG_DWORD(&reg->host_status);
1693 if (stat & HSRX_RISC_PAUSED) { 1687 if (stat & HSRX_RISC_PAUSED) {
@@ -1734,7 +1728,7 @@ qla24xx_msix_default(int irq, void *dev_id)
1734 } 1728 }
1735 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1729 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1736 } while (0); 1730 } while (0);
1737 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1731 spin_unlock(&ha->hardware_lock);
1738 1732
1739 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 1733 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
1740 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { 1734 (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
@@ -1821,7 +1815,6 @@ qla2x00_request_irqs(scsi_qla_host_t *ha)
1821{ 1815{
1822 int ret; 1816 int ret;
1823 device_reg_t __iomem *reg = ha->iobase; 1817 device_reg_t __iomem *reg = ha->iobase;
1824 unsigned long flags;
1825 1818
1826 /* If possible, enable MSI-X. */ 1819 /* If possible, enable MSI-X. */
1827 if (!IS_QLA2432(ha) && !IS_QLA2532(ha)) 1820 if (!IS_QLA2432(ha) && !IS_QLA2532(ha))
@@ -1882,7 +1875,7 @@ skip_msi:
1882clear_risc_ints: 1875clear_risc_ints:
1883 1876
1884 ha->isp_ops->disable_intrs(ha); 1877 ha->isp_ops->disable_intrs(ha);
1885 spin_lock_irqsave(&ha->hardware_lock, flags); 1878 spin_lock_irq(&ha->hardware_lock);
1886 if (IS_FWI2_CAPABLE(ha)) { 1879 if (IS_FWI2_CAPABLE(ha)) {
1887 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT); 1880 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT);
1888 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT); 1881 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT);
@@ -1891,7 +1884,7 @@ clear_risc_ints:
1891 WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT); 1884 WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT);
1892 WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT); 1885 WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT);
1893 } 1886 }
1894 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1887 spin_unlock_irq(&ha->hardware_lock);
1895 ha->isp_ops->enable_intrs(ha); 1888 ha->isp_ops->enable_intrs(ha);
1896 1889
1897fail: 1890fail: