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authorHideo Saito <saito@densan.co.jp>2008-02-14 00:45:08 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-02-14 00:45:08 -0500
commita602cc05f8fc849023e72e2857bd842f0104f648 (patch)
tree347a49a0339b867c73e9d2c6b8644966841e7c6d
parent123100cf4fff3e8ffa375df2c74c7f2cb29ab17a (diff)
sh: Fix multiple UTLB hit on UP SH-4.
This acts as a reversion of 1c6b2ca5e0939bf8b5d1a11f1646f25189ecd447 in the case of UP SH-4, where we still have the risk of a multiple hit between the slow and fast paths. As seen on SH7780. Signed-off-by: Hideo Saito <saito@densan.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/mm/fault_32.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 4ef0a1f1a9ab..d1fa27594c6e 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -299,6 +299,14 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
299 entry = pte_mkdirty(entry); 299 entry = pte_mkdirty(entry);
300 entry = pte_mkyoung(entry); 300 entry = pte_mkyoung(entry);
301 301
302#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP)
303 /*
304 * ITLB is not affected by "ldtlb" instruction.
305 * So, we need to flush the entry by ourselves.
306 */
307 local_flush_tlb_one(get_asid(), address & PAGE_MASK);
308#endif
309
302 set_pte(pte, entry); 310 set_pte(pte, entry);
303 update_mmu_cache(NULL, address, entry); 311 update_mmu_cache(NULL, address, entry);
304 312