[ARM] pxafb: add flag to specify output format on LDD pins when base is RGBT16

Another fix of inconsistent shift of the LCD_BIAS_ACTIVE_* and
LCD_PCLK_EDGE_* is also included.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2 files changed, 8 insertions, 4 deletions

diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 65447549616f..8e591118371e 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -28,6 +28,7 @@
  * bits 10-17 : for AC Bias Pin Frequency
  * bit     18 : for output enable polarity
  * bit     19 : for pixel clock edge
+ * bit     20 : for output pixel format when base is RGBT16
  */
 #define LCD_CONN_TYPE(_x)       ((_x) & 0x0f)
 #define LCD_CONN_WIDTH(_x)      (((_x) >> 4) & 0x1f)
@@ -53,10 +54,11 @@
 #define LCD_SMART_PANEL_18BPP   ((18 << 4) | LCD_TYPE_SMART_PANEL)
 
 #define LCD_AC_BIAS_FREQ(x)     (((x) & 0xff) << 10)
-#define LCD_BIAS_ACTIVE_HIGH    (0 << 17)
-#define LCD_BIAS_ACTIVE_LOW     (1 << 17)
-#define LCD_PCLK_EDGE_RISE      (0 << 18)
-#define LCD_PCLK_EDGE_FALL      (1 << 18)
+#define LCD_BIAS_ACTIVE_HIGH    (0 << 18)
+#define LCD_BIAS_ACTIVE_LOW     (1 << 18)
+#define LCD_PCLK_EDGE_RISE      (0 << 19)
+#define LCD_PCLK_EDGE_FALL      (1 << 19)
+#define LCD_ALTERNATE_MAPPING   (1 << 20)
 
 /*
  * This structure describes the machine which we are running on.
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index bef35afa258d..fa108dad09bf 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1402,6 +1402,8 @@ static void pxafb_decode_mach_info(struct pxafb_info *fbi,
         if (lcd_conn == LCD_MONO_STN_8BPP)
                 fbi->lccr0 |= LCCR0_DPD;
 
+        fbi->lccr0 |= (lcd_conn & LCD_ALTERNATE_MAPPING) ? LCCR0_LDDALT : 0;
+
         fbi->lccr3 = LCCR3_Acb((inf->lcd_conn >> 10) & 0xff);
         fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
         fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL)  ? LCCR3_PCP : 0;