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authorNicolas Pitre <nico@cam.org>2006-05-05 17:32:24 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-05-05 17:32:24 -0400
commit99532559dc7a8e686b2cef14c780a7ad5dbd4a31 (patch)
tree3dff94d714f3e32739cd898b7eebf7910e1ef227
parentb7d7ef87e15dea105be59ec8f14e2f92182dd421 (diff)
[ARM] 3500/1: fix PXA27x DMA allocation priority
Patch from Nicolas Pitre Intel PXA27x developers manual section 5.4.1.1 lists a priority distribution for the DMA channels differently than what the code currently assumes. This patch fixes that. Noticed by Simon Vogl <vogl@soft.uni-linz.ac.at> Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-pxa/dma.c17
-rw-r--r--include/asm-arm/arch-pxa/dma.h26
2 files changed, 19 insertions, 24 deletions
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index 458112b21e25..7d8c85486c66 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -45,23 +45,16 @@ int pxa_request_dma (char *name, pxa_dma_prio prio,
45 45
46 local_irq_save(flags); 46 local_irq_save(flags);
47 47
48 /* try grabbing a DMA channel with the requested priority */ 48 do {
49 for (i = prio; i < prio + PXA_DMA_NBCH(prio); i++) { 49 /* try grabbing a DMA channel with the requested priority */
50 if (!dma_channels[i].name) { 50 pxa_for_each_dma_prio (i, prio) {
51 found = 1;
52 break;
53 }
54 }
55
56 if (!found) {
57 /* requested prio group is full, try hier priorities */
58 for (i = prio-1; i >= 0; i--) {
59 if (!dma_channels[i].name) { 51 if (!dma_channels[i].name) {
60 found = 1; 52 found = 1;
61 break; 53 break;
62 } 54 }
63 } 55 }
64 } 56 /* if requested prio group is full, try a hier priority */
57 } while (!found && prio--);
65 58
66 if (found) { 59 if (found) {
67 DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; 60 DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h
index 3e88a2a02a0f..a008150abc59 100644
--- a/include/asm-arm/arch-pxa/dma.h
+++ b/include/asm-arm/arch-pxa/dma.h
@@ -24,27 +24,29 @@ typedef struct pxa_dma_desc {
24 volatile u32 dcmd; /* DCMD value for the current transfer */ 24 volatile u32 dcmd; /* DCMD value for the current transfer */
25} pxa_dma_desc; 25} pxa_dma_desc;
26 26
27typedef enum {
28 DMA_PRIO_HIGH = 0,
29 DMA_PRIO_MEDIUM = 1,
30 DMA_PRIO_LOW = 2
31} pxa_dma_prio;
32
27#if defined(CONFIG_PXA27x) 33#if defined(CONFIG_PXA27x)
28 34
29#define PXA_DMA_CHANNELS 32 35#define PXA_DMA_CHANNELS 32
30#define PXA_DMA_NBCH(prio) ((prio == DMA_PRIO_LOW) ? 16 : 8)
31 36
32typedef enum { 37#define pxa_for_each_dma_prio(ch, prio) \
33 DMA_PRIO_HIGH = 0, 38for ( \
34 DMA_PRIO_MEDIUM = 8, 39 ch = prio * 4; \
35 DMA_PRIO_LOW = 16 40 ch != (4 << prio) + 16; \
36} pxa_dma_prio; 41 ch = (ch + 1 == (4 << prio)) ? (prio * 4 + 16) : (ch + 1) \
42)
37 43
38#elif defined(CONFIG_PXA25x) 44#elif defined(CONFIG_PXA25x)
39 45
40#define PXA_DMA_CHANNELS 16 46#define PXA_DMA_CHANNELS 16
41#define PXA_DMA_NBCH(prio) ((prio == DMA_PRIO_LOW) ? 8 : 4)
42 47
43typedef enum { 48#define pxa_for_each_dma_prio(ch, prio) \
44 DMA_PRIO_HIGH = 0, 49 for (ch = prio * 4; ch != (4 << prio); ch++)
45 DMA_PRIO_MEDIUM = 4,
46 DMA_PRIO_LOW = 8
47} pxa_dma_prio;
48 50
49#endif 51#endif
50 52