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authorAl Viro <viro@ftp.linux.org.uk>2007-02-09 11:38:15 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-09 12:14:06 -0500
commit9340b0d356ee52783121af398fa6a332e19e37e2 (patch)
tree9f6f06adbd7e583fa50723703797dd1cd15fe4f8
parentccbebdaccf53ef21663d3bde0ab7b3806d0aeb94 (diff)
[PATCH] arch/powerpc trivial annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/powerpc/platforms/cell/iommu.c5
-rw-r--r--arch/powerpc/platforms/chrp/setup.c4
-rw-r--r--arch/powerpc/xmon/spu-dis.c2
3 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index b43466ba8096..67d617b60a23 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -149,7 +149,8 @@ static int cbe_nr_iommus;
149static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, 149static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte,
150 long n_ptes) 150 long n_ptes)
151{ 151{
152 unsigned long *reg, val; 152 unsigned long __iomem *reg;
153 unsigned long val;
153 long n; 154 long n;
154 155
155 reg = iommu->xlate_regs + IOC_IOPT_CacheInvd; 156 reg = iommu->xlate_regs + IOC_IOPT_CacheInvd;
@@ -592,7 +593,7 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
592 /* Init base fields */ 593 /* Init base fields */
593 i = cbe_nr_iommus++; 594 i = cbe_nr_iommus++;
594 iommu = &iommus[i]; 595 iommu = &iommus[i];
595 iommu->stab = 0; 596 iommu->stab = NULL;
596 iommu->nid = nid; 597 iommu->nid = nid;
597 snprintf(iommu->name, sizeof(iommu->name), "iommu%d", i); 598 snprintf(iommu->name, sizeof(iommu->name), "iommu%d", i);
598 INIT_LIST_HEAD(&iommu->windows); 599 INIT_LIST_HEAD(&iommu->windows);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index e1f51d455984..117c9a0055bd 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -75,7 +75,7 @@ extern irqreturn_t xmon_irq(int, void *);
75extern unsigned long loops_per_jiffy; 75extern unsigned long loops_per_jiffy;
76 76
77/* To be replaced by RTAS when available */ 77/* To be replaced by RTAS when available */
78static unsigned int *briq_SPOR; 78static unsigned int __iomem *briq_SPOR;
79 79
80#ifdef CONFIG_SMP 80#ifdef CONFIG_SMP
81extern struct smp_ops_t chrp_smp_ops; 81extern struct smp_ops_t chrp_smp_ops;
@@ -267,7 +267,7 @@ void __init chrp_setup_arch(void)
267 } else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) { 267 } else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) {
268 _chrp_type = _CHRP_briq; 268 _chrp_type = _CHRP_briq;
269 /* Map the SPOR register on briq and change the restart hook */ 269 /* Map the SPOR register on briq and change the restart hook */
270 briq_SPOR = (unsigned int *)ioremap(0xff0000e8, 4); 270 briq_SPOR = ioremap(0xff0000e8, 4);
271 ppc_md.restart = briq_restart; 271 ppc_md.restart = briq_restart;
272 } else { 272 } else {
273 /* Let's assume it is an IBM chrp if all else fails */ 273 /* Let's assume it is an IBM chrp if all else fails */
diff --git a/arch/powerpc/xmon/spu-dis.c b/arch/powerpc/xmon/spu-dis.c
index ee929c641bf3..e5f89837c82e 100644
--- a/arch/powerpc/xmon/spu-dis.c
+++ b/arch/powerpc/xmon/spu-dis.c
@@ -85,7 +85,7 @@ get_index_for_opcode (unsigned int insn)
85 if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0) 85 if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0)
86 return index; 86 return index;
87 87
88 return 0; 88 return NULL;
89} 89}
90 90
91/* Print a Spu instruction. */ 91/* Print a Spu instruction. */