[ARM] 3404/1: lpd7a40x: AMBA CLCD support

Patch from Marc Singer

Board support and LCD panel configurations to integrate lh7a40x's with
the amba clcd driver.

Signed-off-by: Marc Singer <elf@buici.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2 files changed, 304 insertions, 0 deletions

diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c
new file mode 100644
index 000000000000..93751fee793d
--- /dev/null
+++ b/arch/arm/mach-lh7a40x/clcd.c
@@ -0,0 +1,241 @@
+/*
+ *  arch/arm/mach-lh7a40x/clcd.c
+ *
+ *  Copyright (C) 2004 Marc Singer
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  version 2 as published by the Free Software Foundation.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+
+//#include <linux/module.h>
+//#include <linux/time.h>
+//#include <asm/hardware.h>
+
+//#include <asm/mach/time.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <asm/system.h>
+#include <asm/hardware.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+
+#define HRTFTC_HRSETUP          __REG(HRTFTC_PHYS + 0x00)
+#define HRTFTC_HRCON            __REG(HRTFTC_PHYS + 0x04)
+#define HRTFTC_HRTIMING1        __REG(HRTFTC_PHYS + 0x08)
+#define HRTFTC_HRTIMING2        __REG(HRTFTC_PHYS + 0x0c)
+
+#define ALI_SETUP               __REG(ALI_PHYS + 0x00)
+#define ALI_CONTROL             __REG(ALI_PHYS + 0x04)
+#define ALI_TIMING1             __REG(ALI_PHYS + 0x08)
+#define ALI_TIMING2             __REG(ALI_PHYS + 0x0c)
+
+#include "lcd-panel.h"
+
+static void lh7a40x_clcd_disable (struct clcd_fb *fb)
+{
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_CONTROL &= ~(1<<1);        /* Disable LCD Vee */
+#endif
+
+#if defined (CONFIG_MACH_LPD7A404)
+        GPIO_PCD  &= ~(1<<3);           /* Disable LCD Vee */
+#endif
+
+#if defined (CONFIG_ARCH_LH7A400)
+        HRTFTC_HRSETUP &= ~(1<<13);     /* Disable HRTFT controller */
+#endif
+
+#if defined (CONFIG_ARCH_LH7A404)
+        ALI_SETUP &= ~(1<<13);          /* Disable ALI */
+#endif
+}
+
+static void lh7a40x_clcd_enable (struct clcd_fb *fb)
+{
+        struct clcd_panel_extra* extra
+                = (struct clcd_panel_extra*) fb->board_data;
+
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_CONTROL |= (1<<1);         /* Enable LCD Vee */
+#endif
+
+#if defined (CONFIG_MACH_LPD7A404)
+        GPIO_PCDD &= ~(1<<3);           /* Enable LCD Vee */
+        GPIO_PCD  |=  (1<<3);
+#endif
+
+#if defined (CONFIG_ARCH_LH7A400)
+
+        if (extra) {
+                HRTFTC_HRSETUP
+                        = (1 << 13)
+                        | ((fb->fb.var.xres - 1) << 4)
+                        | 0xc
+                        | (extra->hrmode ? 1 : 0);
+                HRTFTC_HRCON
+                        = ((extra->clsen ? 1 : 0) << 1)
+                        | ((extra->spsen ? 1 : 0) << 0);
+                HRTFTC_HRTIMING1
+                        = (extra->pcdel << 8)
+                        | (extra->revdel << 4)
+                        | (extra->lpdel << 0);
+                HRTFTC_HRTIMING2
+                        = (extra->spldel << 9)
+                        | (extra->pc2del << 0);
+        }
+        else
+                HRTFTC_HRSETUP
+                        = (1 << 13)
+                        | 0xc;
+#endif
+
+#if defined (CONFIG_ARCH_LH7A404)
+
+        if (extra) {
+                ALI_SETUP
+                        = (1 << 13)
+                        | ((fb->fb.var.xres - 1) << 4)
+                        | 0xc
+                        | (extra->hrmode ? 1 : 0);
+                ALI_CONTROL
+                        = ((extra->clsen ? 1 : 0) << 1)
+                        | ((extra->spsen ? 1 : 0) << 0);
+                ALI_TIMING1
+                        = (extra->pcdel << 8)
+                        | (extra->revdel << 4)
+                        | (extra->lpdel << 0);
+                ALI_TIMING2
+                        = (extra->spldel << 9)
+                        | (extra->pc2del << 0);
+        }
+        else
+                ALI_SETUP
+                        = (1 << 13)
+                        | 0xc;
+#endif
+
+}
+
+#define FRAMESIZE(s) (((s) + PAGE_SIZE - 1)&PAGE_MASK)
+
+static int lh7a40x_clcd_setup (struct clcd_fb *fb)
+{
+        dma_addr_t dma;
+        u32 len = FRAMESIZE (lcd_panel.mode.xres*lcd_panel.mode.yres
+                             *(lcd_panel.bpp/8));
+
+        fb->panel = &lcd_panel;
+
+                /* Enforce the sync polarity defaults */
+        if (!(fb->panel->tim2 & TIM2_IHS))
+                fb->fb.var.sync |= FB_SYNC_HOR_HIGH_ACT;
+        if (!(fb->panel->tim2 & TIM2_IVS))
+                fb->fb.var.sync |= FB_SYNC_VERT_HIGH_ACT;
+
+#if defined (HAS_LCD_PANEL_EXTRA)
+        fb->board_data = &lcd_panel_extra;
+#endif
+
+        fb->fb.screen_base
+                = dma_alloc_writecombine (&fb->dev->dev, len,
+                                          &dma, GFP_KERNEL);
+        printk ("CLCD: LCD setup fb virt 0x%p phys 0x%p l %x io 0x%p \n",
+                fb->fb.screen_base, (void*) dma, len,
+                (void*) io_p2v (CLCDC_PHYS));
+        printk ("CLCD: pixclock %d\n", lcd_panel.mode.pixclock);
+
+        if (!fb->fb.screen_base) {
+                printk(KERN_ERR "CLCD: unable to map framebuffer\n");
+                return -ENOMEM;
+        }
+
+#if defined (USE_RGB555)
+        fb->fb.var.green.length = 5; /* Panel uses RGB 5:5:5 */
+#endif
+
+        fb->fb.fix.smem_start = dma;
+        fb->fb.fix.smem_len = len;
+
+                /* Drive PE4 high to prevent CPLD crash */
+        GPIO_PEDD |= (1<<4);
+        GPIO_PED  |= (1<<4);
+
+        GPIO_PINMUX |= (1<<1) | (1<<0); /* LCDVD[15:4] */
+
+//      fb->fb.fbops->fb_check_var (&fb->fb.var, &fb->fb);
+//      fb->fb.fbops->fb_set_par (&fb->fb);
+
+        return 0;
+}
+
+static int lh7a40x_clcd_mmap (struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+        return dma_mmap_writecombine(&fb->dev->dev, vma,
+                                     fb->fb.screen_base,
+                                     fb->fb.fix.smem_start,
+                                     fb->fb.fix.smem_len);
+}
+
+static void lh7a40x_clcd_remove (struct clcd_fb *fb)
+{
+        dma_free_writecombine (&fb->dev->dev, fb->fb.fix.smem_len,
+                               fb->fb.screen_base, fb->fb.fix.smem_start);
+}
+
+static struct clcd_board clcd_platform_data = {
+        .name           = "lh7a40x FB",
+        .check          = clcdfb_check,
+        .decode         = clcdfb_decode,
+        .enable         = lh7a40x_clcd_enable,
+        .setup          = lh7a40x_clcd_setup,
+        .mmap           = lh7a40x_clcd_mmap,
+        .remove         = lh7a40x_clcd_remove,
+        .disable        = lh7a40x_clcd_disable,
+};
+
+#define IRQ_CLCDC (IRQ_LCDINTR)
+
+#define AMBA_DEVICE(name,busid,base,plat,pid)                   \
+static struct amba_device name##_device = {                     \
+        .dev = {                                                \
+                .coherent_dma_mask = ~0,                        \
+                .bus_id = busid,                                \
+                .platform_data = plat,                          \
+                },                                              \
+        .res = {                                                \
+                .start  = base##_PHYS,                          \
+                .end    = (base##_PHYS) + (4*1024) - 1,         \
+                .flags  = IORESOURCE_MEM,                       \
+                },                                              \
+        .dma_mask       = ~0,                                   \
+        .irq            = { IRQ_##base, },                      \
+        /* .dma         = base##_DMA,*/                         \
+        .periphid = pid,                                        \
+}
+
+AMBA_DEVICE(clcd,  "cldc-lh7a40x",  CLCDC,     &clcd_platform_data, 0x41110);
+
+static struct amba_device *amba_devs[] __initdata = {
+        &clcd_device,
+};
+
+void __init lh7a40x_clcd_init (void)
+{
+        int i;
+        int result;
+        printk ("CLCD: registering amba devices\n");
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                result = amba_device_register(d, &iomem_resource);
+                printk ("  %d -> %d\n", i ,result);
+        }
+}
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 4587087d777a..a3024eb28dc5 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -167,6 +167,69 @@ config FB_ARMCLCD
           here and read <file:Documentation/modules.txt>.  The module
           will be called amba-clcd.
 
+choice
+
+        depends on FB_ARMCLCD && (ARCH_LH7A40X || ARCH_LH7952X)
+        prompt "LCD Panel"
+        default FB_ARMCLCD_SHARP_LQ035Q7DB02
+
+config FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT
+        bool "LogicPD LCD 3.5\" QVGA w/HRTFT IC"
+        help
+          This is an implementation of the Sharp LQ035Q7DB02, a 3.5"
+          color QVGA, HRTFT panel.  The LogicPD device includes an
+          an integrated HRTFT controller IC.
+          The native resolution is 240x320.
+
+config FB_ARMCLCD_SHARP_LQ057Q3DC02
+        bool "LogicPD LCD 5.7\" QVGA"
+        help
+          This is an implementation of the Sharp LQ057Q3DC02, a 5.7"
+          color QVGA, TFT panel.  The LogicPD device includes an
+          The native resolution is 320x240.
+
+config FB_ARMCLCD_SHARP_LQ64D343
+        bool "LogicPD LCD 6.4\" VGA"
+        help
+          This is an implementation of the Sharp LQ64D343, a 6.4"
+          color VGA, TFT panel.  The LogicPD device includes an
+          The native resolution is 640x480.
+
+config FB_ARMCLCD_SHARP_LQ10D368
+        bool "LogicPD LCD 10.4\" VGA"
+        help
+          This is an implementation of the Sharp LQ10D368, a 10.4"
+          color VGA, TFT panel.  The LogicPD device includes an
+          The native resolution is 640x480.
+
+
+config FB_ARMCLCD_SHARP_LQ121S1DG41
+        bool "LogicPD LCD 12.1\" SVGA"
+        help
+          This is an implementation of the Sharp LQ121S1DG41, a 12.1"
+          color SVGA, TFT panel.  The LogicPD device includes an
+          The native resolution is 800x600.
+
+          This panel requires a clock rate may be an integer fraction
+          of the base LCDCLK frequency.  The driver will select the
+          highest frequency available that is lower than the maximum
+          allowed.  The panel may flicker if the clock rate is
+          slower than the recommended minimum.
+
+config FB_ARMCLCD_AUO_A070VW01_WIDE
+        bool "AU Optronics A070VW01 LCD 7.0\" WIDE"
+        help
+          This is an implementation of the AU Optronics, a 7.0"
+          WIDE Color.  The native resolution is 234x480.
+
+config FB_ARMCLCD_HITACHI
+        bool "Hitachi Wide Screen 800x480"
+        help
+          This is an implementation of the Hitachi 800x480.
+
+endchoice
+
+
 config FB_ACORN
         bool "Acorn VIDC support"
         depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500)