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authorTodd Poynor <tpoynor@com.rmk.(none)>2005-06-03 15:52:27 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-03 15:52:27 -0400
commit8775420d2fbcfff866995471ea5f6130d14d121c (patch)
treebef5911e6c02b5780a8d81e8db656177ff9b8c4a
parent718a30a5cf0a9142f716a49853bd4b4a25a8da1b (diff)
[PATCH] ARM: 2691/1: PXA27x sleep fixes take 2
Patch from Todd Poynor PXA27x sleep fixes: * set additional sleep/wakeup registers for Mainstone boards. * move CKEN=0 to pxa25x-specific code; that value is harmful on pxa27x. * save/restore additional registers, including some found necessary for C5 processors and/or newer blob versions. * enable future support of additional sleep modes for PXA27x (eg, standby, deep sleep). * split off cpu-specific sleep processing between pxa27x and pxa25x into separate files (partly in preparation for additional sleep modes). Includes fixes from David Burrage. Signed-off-by: Todd Poynor Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-pxa/mainstone.c9
-rw-r--r--arch/arm/mach-pxa/pm.c32
-rw-r--r--arch/arm/mach-pxa/pxa25x.c29
-rw-r--r--arch/arm/mach-pxa/pxa27x.c32
4 files changed, 88 insertions, 14 deletions
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 3f952237ae3d..6823ae28ae6a 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -304,6 +304,15 @@ static void __init mainstone_map_io(void)
304 PWER = 0xC0000002; 304 PWER = 0xC0000002;
305 PRER = 0x00000002; 305 PRER = 0x00000002;
306 PFER = 0x00000002; 306 PFER = 0x00000002;
307 /* for use I SRAM as framebuffer. */
308 PSLR |= 0xF04;
309 PCFR = 0x66;
310 /* For Keypad wakeup. */
311 KPC &=~KPC_ASACT;
312 KPC |=KPC_AS;
313 PKWR = 0x000FD000;
314 /* Need read PKWR back after set it. */
315 PKWR;
307} 316}
308 317
309MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 318MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 82a4bf34c251..9799fe80df23 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -29,9 +29,6 @@
29 */ 29 */
30#undef DEBUG 30#undef DEBUG
31 31
32extern void pxa_cpu_suspend(void);
33extern void pxa_cpu_resume(void);
34
35#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 32#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
36#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 33#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
37 34
@@ -63,6 +60,12 @@ enum { SLEEP_SAVE_START = 0,
63 SLEEP_SAVE_ICMR, 60 SLEEP_SAVE_ICMR,
64 SLEEP_SAVE_CKEN, 61 SLEEP_SAVE_CKEN,
65 62
63#ifdef CONFIG_PXA27x
64 SLEEP_SAVE_MDREFR,
65 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
66 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
67#endif
68
66 SLEEP_SAVE_CKSUM, 69 SLEEP_SAVE_CKSUM,
67 70
68 SLEEP_SAVE_SIZE 71 SLEEP_SAVE_SIZE
@@ -75,9 +78,7 @@ static int pxa_pm_enter(suspend_state_t state)
75 unsigned long checksum = 0; 78 unsigned long checksum = 0;
76 struct timespec delta, rtc; 79 struct timespec delta, rtc;
77 int i; 80 int i;
78 81 extern void pxa_cpu_pm_enter(suspend_state_t state);
79 if (state != PM_SUSPEND_MEM)
80 return -EINVAL;
81 82
82#ifdef CONFIG_IWMMXT 83#ifdef CONFIG_IWMMXT
83 /* force any iWMMXt context to ram **/ 84 /* force any iWMMXt context to ram **/
@@ -100,16 +101,17 @@ static int pxa_pm_enter(suspend_state_t state)
100 SAVE(GAFR2_L); SAVE(GAFR2_U); 101 SAVE(GAFR2_L); SAVE(GAFR2_U);
101 102
102#ifdef CONFIG_PXA27x 103#ifdef CONFIG_PXA27x
104 SAVE(MDREFR);
103 SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3); 105 SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
104 SAVE(GAFR3_L); SAVE(GAFR3_U); 106 SAVE(GAFR3_L); SAVE(GAFR3_U);
107 SAVE(PWER); SAVE(PCFR); SAVE(PRER);
108 SAVE(PFER); SAVE(PKWR);
105#endif 109#endif
106 110
107 SAVE(ICMR); 111 SAVE(ICMR);
108 ICMR = 0; 112 ICMR = 0;
109 113
110 SAVE(CKEN); 114 SAVE(CKEN);
111 CKEN = 0;
112
113 SAVE(PSTR); 115 SAVE(PSTR);
114 116
115 /* Note: wake up source are set up in each machine specific files */ 117 /* Note: wake up source are set up in each machine specific files */
@@ -123,16 +125,13 @@ static int pxa_pm_enter(suspend_state_t state)
123 /* Clear sleep reset status */ 125 /* Clear sleep reset status */
124 RCSR = RCSR_SMR; 126 RCSR = RCSR_SMR;
125 127
126 /* set resume return address */
127 PSPR = virt_to_phys(pxa_cpu_resume);
128
129 /* before sleeping, calculate and save a checksum */ 128 /* before sleeping, calculate and save a checksum */
130 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++) 129 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
131 checksum += sleep_save[i]; 130 checksum += sleep_save[i];
132 sleep_save[SLEEP_SAVE_CKSUM] = checksum; 131 sleep_save[SLEEP_SAVE_CKSUM] = checksum;
133 132
134 /* *** go zzz *** */ 133 /* *** go zzz *** */
135 pxa_cpu_suspend(); 134 pxa_cpu_pm_enter(state);
136 135
137 /* after sleeping, validate the checksum */ 136 /* after sleeping, validate the checksum */
138 checksum = 0; 137 checksum = 0;
@@ -145,7 +144,7 @@ static int pxa_pm_enter(suspend_state_t state)
145 LUB_HEXLED = 0xbadbadc5; 144 LUB_HEXLED = 0xbadbadc5;
146#endif 145#endif
147 while (1) 146 while (1)
148 pxa_cpu_suspend(); 147 pxa_cpu_pm_enter(state);
149 } 148 }
150 149
151 /* ensure not to come back here if it wasn't intended */ 150 /* ensure not to come back here if it wasn't intended */
@@ -162,8 +161,11 @@ static int pxa_pm_enter(suspend_state_t state)
162 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); 161 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
163 162
164#ifdef CONFIG_PXA27x 163#ifdef CONFIG_PXA27x
164 RESTORE(MDREFR);
165 RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3); 165 RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3);
166 RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); 166 RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
167 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
168 RESTORE(PFER); RESTORE(PKWR);
167#endif 169#endif
168 170
169 PSSR = PSSR_RDH | PSSR_PH; 171 PSSR = PSSR_RDH | PSSR_PH;
@@ -197,7 +199,9 @@ unsigned long sleep_phys_sp(void *sp)
197 */ 199 */
198static int pxa_pm_prepare(suspend_state_t state) 200static int pxa_pm_prepare(suspend_state_t state)
199{ 201{
200 return 0; 202 extern int pxa_cpu_pm_prepare(suspend_state_t state);
203
204 return pxa_cpu_pm_prepare(state);
201} 205}
202 206
203/* 207/*
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index e887b7175ef3..b6d945a6e774 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -102,3 +102,32 @@ unsigned int get_lcdclk_frequency_10khz(void)
102} 102}
103 103
104EXPORT_SYMBOL(get_lcdclk_frequency_10khz); 104EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
105
106
107int pxa_cpu_pm_prepare(suspend_state_t state)
108{
109 switch (state) {
110 case PM_SUSPEND_MEM:
111 break;
112 default:
113 return -EINVAL;
114 }
115
116 return 0;
117}
118
119void pxa_cpu_pm_enter(suspend_state_t state)
120{
121 extern void pxa_cpu_suspend(unsigned int);
122 extern void pxa_cpu_resume(void);
123
124 CKEN = 0;
125
126 switch (state) {
127 case PM_SUSPEND_MEM:
128 /* set resume return address */
129 PSPR = virt_to_phys(pxa_cpu_resume);
130 pxa_cpu_suspend(3);
131 break;
132 }
133}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7e863afefb53..aa3c3b2ab75e 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -120,6 +120,38 @@ EXPORT_SYMBOL(get_clk_frequency_khz);
120EXPORT_SYMBOL(get_memclk_frequency_10khz); 120EXPORT_SYMBOL(get_memclk_frequency_10khz);
121EXPORT_SYMBOL(get_lcdclk_frequency_10khz); 121EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
122 122
123int pxa_cpu_pm_prepare(suspend_state_t state)
124{
125 switch (state) {
126 case PM_SUSPEND_MEM:
127 return 0;
128 default:
129 return -EINVAL;
130 }
131}
132
133void pxa_cpu_pm_enter(suspend_state_t state)
134{
135 extern void pxa_cpu_standby(void);
136 extern void pxa_cpu_suspend(unsigned int);
137 extern void pxa_cpu_resume(void);
138
139 CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
140
141 /* ensure voltage-change sequencer not initiated, which hangs */
142 PCFR &= ~PCFR_FVC;
143
144 /* Clear edge-detect status register. */
145 PEDR = 0xDF12FE1B;
146
147 switch (state) {
148 case PM_SUSPEND_MEM:
149 /* set resume return address */
150 PSPR = virt_to_phys(pxa_cpu_resume);
151 pxa_cpu_suspend(3);
152 break;
153 }
154}
123 155
124/* 156/*
125 * device registration specific to PXA27x. 157 * device registration specific to PXA27x.