diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-06-25 07:01:48 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-06-25 07:01:48 -0400 |
commit | 801194e3bcf7cde163b23c6279c559e69cb4ca57 (patch) | |
tree | 194576773e93d8491df7c341e284986c3338e2d7 | |
parent | 405040a78b33e39edf4180fc993b9608f07d3c41 (diff) |
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ
DEFAULT_FIQ was entirely unused. MODE_* are just redefinitions
of *_MODE. Use *_MODE instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/kernel/head-nommu.S | 2 | ||||
-rw-r--r-- | arch/arm/kernel/head.S | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/sleep.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/sleep.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/sleep.S | 2 | ||||
-rw-r--r-- | arch/arm/nwfpe/entry26.S | 2 | ||||
-rw-r--r-- | include/asm-arm/assembler.h | 7 |
7 files changed, 7 insertions, 14 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index adf62e5eaad7..2af7e44218af 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S | |||
@@ -39,7 +39,7 @@ | |||
39 | __INIT | 39 | __INIT |
40 | .type stext, %function | 40 | .type stext, %function |
41 | ENTRY(stext) | 41 | ENTRY(stext) |
42 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode | 42 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode |
43 | @ and irqs disabled | 43 | @ and irqs disabled |
44 | mrc p15, 0, r9, c0, c0 @ get processor id | 44 | mrc p15, 0, r9, c0, c0 @ get processor id |
45 | bl __lookup_processor_type @ r5=procinfo r9=cpuid | 45 | bl __lookup_processor_type @ r5=procinfo r9=cpuid |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 04f7344e356a..330b9476c398 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -71,7 +71,7 @@ | |||
71 | __INIT | 71 | __INIT |
72 | .type stext, %function | 72 | .type stext, %function |
73 | ENTRY(stext) | 73 | ENTRY(stext) |
74 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode | 74 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode |
75 | @ and irqs disabled | 75 | @ and irqs disabled |
76 | mrc p15, 0, r9, c0, c0 @ get processor id | 76 | mrc p15, 0, r9, c0, c0 @ get processor id |
77 | bl __lookup_processor_type @ r5=procinfo r9=cpuid | 77 | bl __lookup_processor_type @ r5=procinfo r9=cpuid |
@@ -104,7 +104,7 @@ ENTRY(secondary_startup) | |||
104 | * the processor type - there is no need to check the machine type | 104 | * the processor type - there is no need to check the machine type |
105 | * as it has already been validated by the primary processor. | 105 | * as it has already been validated by the primary processor. |
106 | */ | 106 | */ |
107 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC | 107 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE |
108 | mrc p15, 0, r9, c0, c0 @ get processor id | 108 | mrc p15, 0, r9, c0, c0 @ get processor id |
109 | bl __lookup_processor_type | 109 | bl __lookup_processor_type |
110 | movs r10, r5 @ invalid processor? | 110 | movs r10, r5 @ invalid processor? |
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index c9862688ff3d..0650bed3b96e 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -189,7 +189,7 @@ ENTRY(pxa_cpu_suspend) | |||
189 | .data | 189 | .data |
190 | .align 5 | 190 | .align 5 |
191 | ENTRY(pxa_cpu_resume) | 191 | ENTRY(pxa_cpu_resume) |
192 | mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC @ set SVC, irqs off | 192 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off |
193 | msr cpsr_c, r0 | 193 | msr cpsr_c, r0 |
194 | 194 | ||
195 | ldr r0, sleep_save_sp @ stack phys addr | 195 | ldr r0, sleep_save_sp @ stack phys addr |
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index 5f6761ed96b2..dc27167f4d59 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S | |||
@@ -128,7 +128,7 @@ s3c2410_sleep_save_phys: | |||
128 | */ | 128 | */ |
129 | 129 | ||
130 | ENTRY(s3c2410_cpu_resume) | 130 | ENTRY(s3c2410_cpu_resume) |
131 | mov r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC | 131 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
132 | msr cpsr_c, r0 | 132 | msr cpsr_c, r0 |
133 | 133 | ||
134 | @@ load UART to allow us to print the two characters for | 134 | @@ load UART to allow us to print the two characters for |
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 2fa1e289d177..5a84062f92af 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S | |||
@@ -177,7 +177,7 @@ sa1110_sdram_controller_fix: | |||
177 | .data | 177 | .data |
178 | .align 5 | 178 | .align 5 |
179 | ENTRY(sa1100_cpu_resume) | 179 | ENTRY(sa1100_cpu_resume) |
180 | mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC | 180 | mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE |
181 | msr cpsr_c, r0 @ set SVC, irqs off | 181 | msr cpsr_c, r0 @ set SVC, irqs off |
182 | 182 | ||
183 | ldr r0, sleep_save_sp @ stack phys addr | 183 | ldr r0, sleep_save_sp @ stack phys addr |
diff --git a/arch/arm/nwfpe/entry26.S b/arch/arm/nwfpe/entry26.S index 51940a96d6a6..3e6fb5d21d64 100644 --- a/arch/arm/nwfpe/entry26.S +++ b/arch/arm/nwfpe/entry26.S | |||
@@ -26,7 +26,7 @@ | |||
26 | It is called from the kernel with code similar to this: | 26 | It is called from the kernel with code similar to this: |
27 | 27 | ||
28 | mov fp, #0 | 28 | mov fp, #0 |
29 | teqp pc, #PSR_I_BIT | MODE_SVC | 29 | teqp pc, #PSR_I_BIT | SVC_MODE |
30 | ldr r4, .LC2 | 30 | ldr r4, .LC2 |
31 | ldr pc, [r4] @ Call FP module USR entry point | 31 | ldr pc, [r4] @ Call FP module USR entry point |
32 | 32 | ||
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index b97cb3e1ba72..fce832820825 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h | |||
@@ -55,13 +55,6 @@ | |||
55 | #define PLD(code...) | 55 | #define PLD(code...) |
56 | #endif | 56 | #endif |
57 | 57 | ||
58 | #define MODE_USR USR_MODE | ||
59 | #define MODE_FIQ FIQ_MODE | ||
60 | #define MODE_IRQ IRQ_MODE | ||
61 | #define MODE_SVC SVC_MODE | ||
62 | |||
63 | #define DEFAULT_FIQ MODE_FIQ | ||
64 | |||
65 | /* | 58 | /* |
66 | * Enable and disable interrupts | 59 | * Enable and disable interrupts |
67 | */ | 60 | */ |