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authorRoy Zang <tie-fei.zang@freescale.com>2007-06-01 04:05:38 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-07-10 00:24:50 -0400
commit749e80810d26c8d522b089718f22bb92d7834a37 (patch)
tree16f5b572fc96e7a3f951b56144b3de7cddc5f042
parent80a7cc6cf1126bc09beee3dded2820bfa18ce347 (diff)
[POWERPC] Remove redundant pci_read_irq_line() function for 85xx platform
Remove redundant pci_read_irq_line() function for 85xx CDS board. This function has been realized in common ppc pci code. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c76
1 files changed, 34 insertions, 42 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 2a80c1d0afbc..50c8d6458362 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -69,52 +69,44 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
69 return PCIBIOS_SUCCESSFUL; 69 return PCIBIOS_SUCCESSFUL;
70} 70}
71 71
72static void __init mpc85xx_cds_pcibios_fixup(void) 72static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev)
73{ 73{
74 struct pci_dev *dev; 74 u_char c;
75 u_char c; 75 if (dev->vendor == PCI_VENDOR_ID_VIA) {
76 76 switch (dev->device) {
77 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, 77 case PCI_DEVICE_ID_VIA_82C586_1:
78 PCI_DEVICE_ID_VIA_82C586_1, NULL))) { 78 /*
79 * U-Boot does not set the enable bits
80 * for the IDE device. Force them on here.
81 */
82 pci_read_config_byte(dev, 0x40, &c);
83 c |= 0x03; /* IDE: Chip Enable Bits */
84 pci_write_config_byte(dev, 0x40, c);
85
86 /*
87 * Since only primary interface works, force the
88 * IDE function to standard primary IDE interrupt
89 * w/ 8259 offset
90 */
91 dev->irq = 14;
92 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
93 break;
79 /* 94 /*
80 * U-Boot does not set the enable bits 95 * Force legacy USB interrupt routing
81 * for the IDE device. Force them on here.
82 */ 96 */
83 pci_read_config_byte(dev, 0x40, &c); 97 case PCI_DEVICE_ID_VIA_82C586_2:
84 c |= 0x03; /* IDE: Chip Enable Bits */ 98 /* There are two USB controllers.
85 pci_write_config_byte(dev, 0x40, c); 99 * Identify them by functon number
86
87 /*
88 * Since only primary interface works, force the
89 * IDE function to standard primary IDE interrupt
90 * w/ 8259 offset
91 */ 100 */
92 dev->irq = 14; 101 if (PCI_FUNC(dev->devfn))
93 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); 102 dev->irq = 11;
94 pci_dev_put(dev); 103 else
95 } 104 dev->irq = 10;
96 105 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
97 /* 106 default:
98 * Force legacy USB interrupt routing 107 break;
99 */ 108 }
100 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
101 PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
102 dev->irq = 10;
103 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
104 pci_dev_put(dev);
105 }
106
107 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
108 PCI_DEVICE_ID_VIA_82C586_2, dev))) {
109 dev->irq = 11;
110 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
111 pci_dev_put(dev);
112 } 109 }
113
114 /* Now map all the PCI irqs */
115 dev = NULL;
116 for_each_pci_dev(dev)
117 pci_read_irq_line(dev);
118} 110}
119 111
120#ifdef CONFIG_PPC_I8259 112#ifdef CONFIG_PPC_I8259
@@ -229,7 +221,7 @@ static void __init mpc85xx_cds_setup_arch(void)
229 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) 221 for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
230 mpc85xx_add_bridge(np); 222 mpc85xx_add_bridge(np);
231 223
232 ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup; 224 ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
233 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 225 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
234#endif 226#endif
235} 227}