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authorJeremy Fitzhardinge <jeremy@goop.org>2008-01-30 07:30:55 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:30:55 -0500
commit5548fecdff5617ba3a2f09f0e585e1ac6e1bd25c (patch)
tree9761144d3140a554c062a289a40c1e0a5e206ef8
parent1c54d77078056cde0f195b1a982cb681850efc08 (diff)
x86: clean up bitops-related warnings
Add casts to appropriate places to silence spurious bitops warnings. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/kernel/setup_64.c31
-rw-r--r--arch/x86/kernel/smpboot_64.c4
-rw-r--r--arch/x86/mm/numa_64.c2
-rw-r--r--include/asm-x86/cpufeature.h2
-rw-r--r--include/asm-x86/numa_64.h2
-rw-r--r--include/linux/thread_info.h10
6 files changed, 26 insertions, 25 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 84f66b7b4d2e..63dd39b843b5 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -661,19 +661,19 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
661 661
662 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; 662 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
663 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */ 663 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
664 clear_bit(0*32+31, &c->x86_capability); 664 clear_bit(0*32+31, (unsigned long *)&c->x86_capability);
665 665
666 /* On C+ stepping K8 rep microcode works well for copy/memset */ 666 /* On C+ stepping K8 rep microcode works well for copy/memset */
667 level = cpuid_eax(1); 667 level = cpuid_eax(1);
668 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || 668 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
669 level >= 0x0f58)) 669 level >= 0x0f58))
670 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); 670 set_bit(X86_FEATURE_REP_GOOD, (unsigned long *)&c->x86_capability);
671 if (c->x86 == 0x10 || c->x86 == 0x11) 671 if (c->x86 == 0x10 || c->x86 == 0x11)
672 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); 672 set_bit(X86_FEATURE_REP_GOOD, (unsigned long *)&c->x86_capability);
673 673
674 /* Enable workaround for FXSAVE leak */ 674 /* Enable workaround for FXSAVE leak */
675 if (c->x86 >= 6) 675 if (c->x86 >= 6)
676 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability); 676 set_bit(X86_FEATURE_FXSAVE_LEAK, (unsigned long *)&c->x86_capability);
677 677
678 level = get_model_name(c); 678 level = get_model_name(c);
679 if (!level) { 679 if (!level) {
@@ -689,7 +689,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
689 689
690 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */ 690 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
691 if (c->x86_power & (1<<8)) 691 if (c->x86_power & (1<<8))
692 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); 692 set_bit(X86_FEATURE_CONSTANT_TSC, (unsigned long *)&c->x86_capability);
693 693
694 /* Multi core CPU? */ 694 /* Multi core CPU? */
695 if (c->extended_cpuid_level >= 0x80000008) 695 if (c->extended_cpuid_level >= 0x80000008)
@@ -702,14 +702,14 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
702 num_cache_leaves = 3; 702 num_cache_leaves = 3;
703 703
704 if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11) 704 if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
705 set_bit(X86_FEATURE_K8, &c->x86_capability); 705 set_bit(X86_FEATURE_K8, (unsigned long *)&c->x86_capability);
706 706
707 /* RDTSC can be speculated around */ 707 /* RDTSC can be speculated around */
708 clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); 708 clear_bit(X86_FEATURE_SYNC_RDTSC, (unsigned long *)&c->x86_capability);
709 709
710 /* Family 10 doesn't support C states in MWAIT so don't use it */ 710 /* Family 10 doesn't support C states in MWAIT so don't use it */
711 if (c->x86 == 0x10 && !force_mwait) 711 if (c->x86 == 0x10 && !force_mwait)
712 clear_bit(X86_FEATURE_MWAIT, &c->x86_capability); 712 clear_bit(X86_FEATURE_MWAIT, (unsigned long *)&c->x86_capability);
713 713
714 if (amd_apic_timer_broken()) 714 if (amd_apic_timer_broken())
715 disable_apic_timer = 1; 715 disable_apic_timer = 1;
@@ -811,16 +811,17 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
811 unsigned eax = cpuid_eax(10); 811 unsigned eax = cpuid_eax(10);
812 /* Check for version and the number of counters */ 812 /* Check for version and the number of counters */
813 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) 813 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
814 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability); 814 set_bit(X86_FEATURE_ARCH_PERFMON,
815 (unsigned long *)&c->x86_capability);
815 } 816 }
816 817
817 if (cpu_has_ds) { 818 if (cpu_has_ds) {
818 unsigned int l1, l2; 819 unsigned int l1, l2;
819 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); 820 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
820 if (!(l1 & (1<<11))) 821 if (!(l1 & (1<<11)))
821 set_bit(X86_FEATURE_BTS, c->x86_capability); 822 set_bit(X86_FEATURE_BTS, (unsigned long *)c->x86_capability);
822 if (!(l1 & (1<<12))) 823 if (!(l1 & (1<<12)))
823 set_bit(X86_FEATURE_PEBS, c->x86_capability); 824 set_bit(X86_FEATURE_PEBS, (unsigned long *)c->x86_capability);
824 } 825 }
825 826
826 n = c->extended_cpuid_level; 827 n = c->extended_cpuid_level;
@@ -839,13 +840,13 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
839 c->x86_cache_alignment = c->x86_clflush_size * 2; 840 c->x86_cache_alignment = c->x86_clflush_size * 2;
840 if ((c->x86 == 0xf && c->x86_model >= 0x03) || 841 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
841 (c->x86 == 0x6 && c->x86_model >= 0x0e)) 842 (c->x86 == 0x6 && c->x86_model >= 0x0e))
842 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); 843 set_bit(X86_FEATURE_CONSTANT_TSC, (unsigned long *)&c->x86_capability);
843 if (c->x86 == 6) 844 if (c->x86 == 6)
844 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); 845 set_bit(X86_FEATURE_REP_GOOD, (unsigned long *)&c->x86_capability);
845 if (c->x86 == 15) 846 if (c->x86 == 15)
846 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); 847 set_bit(X86_FEATURE_SYNC_RDTSC, (unsigned long *)&c->x86_capability);
847 else 848 else
848 clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); 849 clear_bit(X86_FEATURE_SYNC_RDTSC, (unsigned long *)&c->x86_capability);
849 c->x86_max_cores = intel_num_cpu_cores(c); 850 c->x86_max_cores = intel_num_cpu_cores(c);
850 851
851 srat_detect_node(); 852 srat_detect_node();
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 8ac8eb620428..ac1089f2b917 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -691,7 +691,7 @@ do_rest:
691 } 691 }
692 if (boot_error) { 692 if (boot_error) {
693 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */ 693 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
694 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */ 694 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
695 clear_node_cpumask(cpu); /* was set by numa_add_cpu */ 695 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
696 cpu_clear(cpu, cpu_present_map); 696 cpu_clear(cpu, cpu_present_map);
697 cpu_clear(cpu, cpu_possible_map); 697 cpu_clear(cpu, cpu_possible_map);
@@ -1036,7 +1036,7 @@ void remove_cpu_from_maps(void)
1036 1036
1037 cpu_clear(cpu, cpu_callout_map); 1037 cpu_clear(cpu, cpu_callout_map);
1038 cpu_clear(cpu, cpu_callin_map); 1038 cpu_clear(cpu, cpu_callin_map);
1039 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */ 1039 clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
1040 clear_node_cpumask(cpu); 1040 clear_node_cpumask(cpu);
1041} 1041}
1042 1042
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 46b4b5e1a02a..848231481619 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -547,7 +547,7 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
547 547
548__cpuinit void numa_add_cpu(int cpu) 548__cpuinit void numa_add_cpu(int cpu)
549{ 549{
550 set_bit(cpu, &node_to_cpumask_map[cpu_to_node(cpu)]); 550 set_bit(cpu, (unsigned long *)&node_to_cpumask_map[cpu_to_node(cpu)]);
551} 551}
552 552
553void __cpuinit numa_set_node(int cpu, int node) 553void __cpuinit numa_set_node(int cpu, int node)
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index acbf6681740d..761922972f6f 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -124,7 +124,7 @@
124 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \ 124 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \
125 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \ 125 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \
126 ? 1 : \ 126 ? 1 : \
127 test_bit(bit, (c)->x86_capability)) 127 test_bit(bit, (unsigned long *)(c)->x86_capability))
128#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) 128#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
129 129
130#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) 130#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
diff --git a/include/asm-x86/numa_64.h b/include/asm-x86/numa_64.h
index c3c20db1fba3..4449889bb0c0 100644
--- a/include/asm-x86/numa_64.h
+++ b/include/asm-x86/numa_64.h
@@ -32,7 +32,7 @@ extern void __init init_cpu_to_node(void);
32 32
33static inline void clear_node_cpumask(int cpu) 33static inline void clear_node_cpumask(int cpu)
34{ 34{
35 clear_bit(cpu, &node_to_cpumask_map[cpu_to_node(cpu)]); 35 clear_bit(cpu, (unsigned long *)&node_to_cpumask_map[cpu_to_node(cpu)]);
36} 36}
37 37
38#else 38#else
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index 9c4ad755d7e5..dfbdfb9836f4 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -42,27 +42,27 @@ extern long do_no_restart_syscall(struct restart_block *parm);
42 42
43static inline void set_ti_thread_flag(struct thread_info *ti, int flag) 43static inline void set_ti_thread_flag(struct thread_info *ti, int flag)
44{ 44{
45 set_bit(flag,&ti->flags); 45 set_bit(flag, (unsigned long *)&ti->flags);
46} 46}
47 47
48static inline void clear_ti_thread_flag(struct thread_info *ti, int flag) 48static inline void clear_ti_thread_flag(struct thread_info *ti, int flag)
49{ 49{
50 clear_bit(flag,&ti->flags); 50 clear_bit(flag, (unsigned long *)&ti->flags);
51} 51}
52 52
53static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag) 53static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag)
54{ 54{
55 return test_and_set_bit(flag,&ti->flags); 55 return test_and_set_bit(flag, (unsigned long *)&ti->flags);
56} 56}
57 57
58static inline int test_and_clear_ti_thread_flag(struct thread_info *ti, int flag) 58static inline int test_and_clear_ti_thread_flag(struct thread_info *ti, int flag)
59{ 59{
60 return test_and_clear_bit(flag,&ti->flags); 60 return test_and_clear_bit(flag, (unsigned long *)&ti->flags);
61} 61}
62 62
63static inline int test_ti_thread_flag(struct thread_info *ti, int flag) 63static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
64{ 64{
65 return test_bit(flag,&ti->flags); 65 return test_bit(flag, (unsigned long *)&ti->flags);
66} 66}
67 67
68#define set_thread_flag(flag) \ 68#define set_thread_flag(flag) \