diff options
author | Robert Richter <robert.richter@amd.com> | 2008-07-22 15:09:04 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-07-26 05:48:11 -0400 |
commit | 543a157bbdfae8eb997506031c3b2d4d17957098 (patch) | |
tree | 81b101321497df2dc0b1f32536ede78cb935b1e6 | |
parent | 87f0baccc2e4f194c931186d3c8499314494a484 (diff) |
x86/oprofile: op_model_athlon.c: fix counter reset when reenabling IBS OP
Signed-off-by: Robert Richter <robert.richter@amd.com>
Cc: oprofile-list <oprofile-list@lists.sourceforge.net>
Cc: Barry Kasindorf <barry.kasindorf@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r-- | arch/x86/oprofile/op_model_athlon.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/oprofile/op_model_athlon.c b/arch/x86/oprofile/op_model_athlon.c index a3a2058c372c..9c8c8c583132 100644 --- a/arch/x86/oprofile/op_model_athlon.c +++ b/arch/x86/oprofile/op_model_athlon.c | |||
@@ -251,6 +251,7 @@ op_amd_handle_ibs(struct pt_regs * const regs, | |||
251 | (unsigned int *)&ibs_op, | 251 | (unsigned int *)&ibs_op, |
252 | IBS_OP_BEGIN); | 252 | IBS_OP_BEGIN); |
253 | rdmsr(MSR_AMD64_IBSOPCTL, low, high); | 253 | rdmsr(MSR_AMD64_IBSOPCTL, low, high); |
254 | high = 0; | ||
254 | low &= ~IBS_OP_LOW_VALID_BIT; | 255 | low &= ~IBS_OP_LOW_VALID_BIT; |
255 | low |= IBS_OP_LOW_ENABLE; | 256 | low |= IBS_OP_LOW_ENABLE; |
256 | wrmsr(MSR_AMD64_IBSOPCTL, low, high); | 257 | wrmsr(MSR_AMD64_IBSOPCTL, low, high); |