diff options
author | David C Somayajulu <david.somayajulu@qlogic.com> | 2007-05-23 21:03:20 -0400 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-05-26 12:47:44 -0400 |
commit | 401425b1ea005b39dcc544bffea833f338ba84f6 (patch) | |
tree | 221b23812979f8bd83f893181d35824935bba3ee | |
parent | e08c182cba87180d7c1e7530dd690a5f6894c412 (diff) |
[SCSI] qla4xxx: ql4_isr.c support for new mbx cmds
Add support to log all AENs and service mbx cmd completions for QLA4032
Signed-off-by: David Somayajulu <david.somayajulu@qlogic.com>
Signed-off-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_isr.c | 53 |
1 files changed, 35 insertions, 18 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c index 35b9e36a0e8d..946e22b1e4b8 100644 --- a/drivers/scsi/qla4xxx/ql4_isr.c +++ b/drivers/scsi/qla4xxx/ql4_isr.c | |||
@@ -6,6 +6,9 @@ | |||
6 | */ | 6 | */ |
7 | 7 | ||
8 | #include "ql4_def.h" | 8 | #include "ql4_def.h" |
9 | #include "ql4_glbl.h" | ||
10 | #include "ql4_dbg.h" | ||
11 | #include "ql4_inline.h" | ||
9 | 12 | ||
10 | /** | 13 | /** |
11 | * qla2x00_process_completed_request() - Process a Fast Post response. | 14 | * qla2x00_process_completed_request() - Process a Fast Post response. |
@@ -417,6 +420,7 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
417 | uint32_t mbox_status) | 420 | uint32_t mbox_status) |
418 | { | 421 | { |
419 | int i; | 422 | int i; |
423 | uint32_t mbox_stat2, mbox_stat3; | ||
420 | 424 | ||
421 | if ((mbox_status == MBOX_STS_BUSY) || | 425 | if ((mbox_status == MBOX_STS_BUSY) || |
422 | (mbox_status == MBOX_STS_INTERMEDIATE_COMPLETION) || | 426 | (mbox_status == MBOX_STS_INTERMEDIATE_COMPLETION) || |
@@ -437,6 +441,12 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
437 | } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) { | 441 | } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) { |
438 | /* Immediately process the AENs that don't require much work. | 442 | /* Immediately process the AENs that don't require much work. |
439 | * Only queue the database_changed AENs */ | 443 | * Only queue the database_changed AENs */ |
444 | if (ha->aen_log.count < MAX_AEN_ENTRIES) { | ||
445 | for (i = 0; i < MBOX_AEN_REG_COUNT; i++) | ||
446 | ha->aen_log.entry[ha->aen_log.count].mbox_sts[i] = | ||
447 | readl(&ha->reg->mailbox[i]); | ||
448 | ha->aen_log.count++; | ||
449 | } | ||
440 | switch (mbox_status) { | 450 | switch (mbox_status) { |
441 | case MBOX_ASTS_SYSTEM_ERROR: | 451 | case MBOX_ASTS_SYSTEM_ERROR: |
442 | /* Log Mailbox registers */ | 452 | /* Log Mailbox registers */ |
@@ -493,6 +503,16 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
493 | mbox_status)); | 503 | mbox_status)); |
494 | break; | 504 | break; |
495 | 505 | ||
506 | case MBOX_ASTS_IP_ADDR_STATE_CHANGED: | ||
507 | mbox_stat2 = readl(&ha->reg->mailbox[2]); | ||
508 | mbox_stat3 = readl(&ha->reg->mailbox[3]); | ||
509 | |||
510 | if ((mbox_stat3 == 5) && (mbox_stat2 == 3)) | ||
511 | set_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags); | ||
512 | else if ((mbox_stat3 == 2) && (mbox_stat2 == 5)) | ||
513 | set_bit(DPC_RESET_HA, &ha->dpc_flags); | ||
514 | break; | ||
515 | |||
496 | case MBOX_ASTS_MAC_ADDRESS_CHANGED: | 516 | case MBOX_ASTS_MAC_ADDRESS_CHANGED: |
497 | case MBOX_ASTS_DNS: | 517 | case MBOX_ASTS_DNS: |
498 | /* No action */ | 518 | /* No action */ |
@@ -518,11 +538,6 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
518 | /* Queue AEN information and process it in the DPC | 538 | /* Queue AEN information and process it in the DPC |
519 | * routine */ | 539 | * routine */ |
520 | if (ha->aen_q_count > 0) { | 540 | if (ha->aen_q_count > 0) { |
521 | /* advance pointer */ | ||
522 | if (ha->aen_in == (MAX_AEN_ENTRIES - 1)) | ||
523 | ha->aen_in = 0; | ||
524 | else | ||
525 | ha->aen_in++; | ||
526 | 541 | ||
527 | /* decrement available counter */ | 542 | /* decrement available counter */ |
528 | ha->aen_q_count--; | 543 | ha->aen_q_count--; |
@@ -542,6 +557,10 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, | |||
542 | ha->aen_q[ha->aen_in].mbox_sts[2], | 557 | ha->aen_q[ha->aen_in].mbox_sts[2], |
543 | ha->aen_q[ha->aen_in].mbox_sts[3], | 558 | ha->aen_q[ha->aen_in].mbox_sts[3], |
544 | ha->aen_q[ha->aen_in]. mbox_sts[4])); | 559 | ha->aen_q[ha->aen_in]. mbox_sts[4])); |
560 | /* advance pointer */ | ||
561 | ha->aen_in++; | ||
562 | if (ha->aen_in == MAX_AEN_ENTRIES) | ||
563 | ha->aen_in = 0; | ||
545 | 564 | ||
546 | /* The DPC routine will process the aen */ | 565 | /* The DPC routine will process the aen */ |
547 | set_bit(DPC_AEN, &ha->dpc_flags); | 566 | set_bit(DPC_AEN, &ha->dpc_flags); |
@@ -724,25 +743,24 @@ void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen) | |||
724 | 743 | ||
725 | spin_lock_irqsave(&ha->hardware_lock, flags); | 744 | spin_lock_irqsave(&ha->hardware_lock, flags); |
726 | while (ha->aen_out != ha->aen_in) { | 745 | while (ha->aen_out != ha->aen_in) { |
727 | /* Advance pointers for next entry */ | ||
728 | if (ha->aen_out == (MAX_AEN_ENTRIES - 1)) | ||
729 | ha->aen_out = 0; | ||
730 | else | ||
731 | ha->aen_out++; | ||
732 | |||
733 | ha->aen_q_count++; | ||
734 | aen = &ha->aen_q[ha->aen_out]; | 746 | aen = &ha->aen_q[ha->aen_out]; |
735 | |||
736 | /* copy aen information to local structure */ | 747 | /* copy aen information to local structure */ |
737 | for (i = 0; i < MBOX_AEN_REG_COUNT; i++) | 748 | for (i = 0; i < MBOX_AEN_REG_COUNT; i++) |
738 | mbox_sts[i] = aen->mbox_sts[i]; | 749 | mbox_sts[i] = aen->mbox_sts[i]; |
739 | 750 | ||
751 | ha->aen_q_count++; | ||
752 | ha->aen_out++; | ||
753 | |||
754 | if (ha->aen_out == MAX_AEN_ENTRIES) | ||
755 | ha->aen_out = 0; | ||
756 | |||
740 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 757 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
741 | 758 | ||
742 | DEBUG(printk("scsi%ld: AEN[%d] %04x, index [%d] state=%04x " | 759 | DEBUG2(printk("qla4xxx(%ld): AEN[%d]=0x%08x, mbx1=0x%08x mbx2=0x%08x" |
743 | "mod=%x conerr=%08x \n", ha->host_no, ha->aen_out, | 760 | " mbx3=0x%08x mbx4=0x%08x\n", ha->host_no, |
744 | mbox_sts[0], mbox_sts[2], mbox_sts[3], | 761 | (ha->aen_out ? (ha->aen_out-1): (MAX_AEN_ENTRIES-1)), |
745 | mbox_sts[1], mbox_sts[4])); | 762 | mbox_sts[0], mbox_sts[1], mbox_sts[2], |
763 | mbox_sts[3], mbox_sts[4])); | ||
746 | 764 | ||
747 | switch (mbox_sts[0]) { | 765 | switch (mbox_sts[0]) { |
748 | case MBOX_ASTS_DATABASE_CHANGED: | 766 | case MBOX_ASTS_DATABASE_CHANGED: |
@@ -792,6 +810,5 @@ void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen) | |||
792 | spin_lock_irqsave(&ha->hardware_lock, flags); | 810 | spin_lock_irqsave(&ha->hardware_lock, flags); |
793 | } | 811 | } |
794 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 812 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
795 | |||
796 | } | 813 | } |
797 | 814 | ||