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authorMike Frysinger <vapier.adi@gmail.com>2008-10-28 04:22:41 -0400
committerBryan Wu <cooloney@kernel.org>2008-10-28 04:22:41 -0400
commit3529e0414b600faa1b6d822569b3343131235813 (patch)
tree9bed201d1b4f5f338cbe5bacf5a8287463720d74
parent6a87d29bc684d845fe8338a8ce279f743d343250 (diff)
Blackfin arch: update anomaly lists to match latest sheets
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h7
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/anomaly.h14
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h2
6 files changed, 20 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index 62373e61c585..8d09e6d5c9cd 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -28,7 +28,7 @@
28/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ 28/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
29#define ANOMALY_05000074 (1) 29#define ANOMALY_05000074 (1)
30/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ 30/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
31#define ANOMALY_05000119 (1) 31#define ANOMALY_05000119 (1) /* note: brokenness is noted in documentation, not anomaly sheet */
32/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ 32/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
33#define ANOMALY_05000122 (1) 33#define ANOMALY_05000122 (1)
34/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ 34/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
@@ -37,8 +37,6 @@
37#define ANOMALY_05000265 (1) 37#define ANOMALY_05000265 (1)
38/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ 38/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
39#define ANOMALY_05000310 (1) 39#define ANOMALY_05000310 (1)
40/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
41#define ANOMALY_05000312 (ANOMALY_BF527)
42/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ 40/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
43#define ANOMALY_05000313 (__SILICON_REVISION__ < 2) 41#define ANOMALY_05000313 (__SILICON_REVISION__ < 2)
44/* Incorrect Access of OTP_STATUS During otp_write() Function */ 42/* Incorrect Access of OTP_STATUS During otp_write() Function */
@@ -153,6 +151,8 @@
153#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1) 151#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
154/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */ 152/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
155#define ANOMALY_05000432 (ANOMALY_BF526) 153#define ANOMALY_05000432 (ANOMALY_BF526)
154/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
155#define ANOMALY_05000443 (1)
156 156
157/* Anomalies that don't exist on this proc */ 157/* Anomalies that don't exist on this proc */
158#define ANOMALY_05000125 (0) 158#define ANOMALY_05000125 (0)
@@ -168,6 +168,7 @@
168#define ANOMALY_05000285 (0) 168#define ANOMALY_05000285 (0)
169#define ANOMALY_05000307 (0) 169#define ANOMALY_05000307 (0)
170#define ANOMALY_05000311 (0) 170#define ANOMALY_05000311 (0)
171#define ANOMALY_05000312 (0)
171#define ANOMALY_05000323 (0) 172#define ANOMALY_05000323 (0)
172#define ANOMALY_05000363 (0) 173#define ANOMALY_05000363 (0)
173 174
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index f544fc56959a..e34bc72aa96f 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -194,6 +194,8 @@
194#define ANOMALY_05000403 (1) 194#define ANOMALY_05000403 (1)
195/* Speculative Fetches Can Cause Undesired External FIFO Operations */ 195/* Speculative Fetches Can Cause Undesired External FIFO Operations */
196#define ANOMALY_05000416 (1) 196#define ANOMALY_05000416 (1)
197/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
198#define ANOMALY_05000443 (1)
197 199
198/* These anomalies have been "phased" out of analog.com anomaly sheets and are 200/* These anomalies have been "phased" out of analog.com anomaly sheets and are
199 * here to show running on older silicon just isn't feasible. 201 * here to show running on older silicon just isn't feasible.
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index c68992494f9e..c6c18f8644c7 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -148,6 +148,8 @@
148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5) 148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ 149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
150#define ANOMALY_05000403 (1) 150#define ANOMALY_05000403 (1)
151/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
152#define ANOMALY_05000443 (1)
151 153
152/* Anomalies that don't exist on this proc */ 154/* Anomalies that don't exist on this proc */
153#define ANOMALY_05000125 (0) 155#define ANOMALY_05000125 (0)
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index 4df618ce2a6d..80b3bd98e309 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -15,7 +15,7 @@
15#define _MACH_ANOMALY_H_ 15#define _MACH_ANOMALY_H_
16 16
17#if __SILICON_REVISION__ < 4 17#if __SILICON_REVISION__ < 4
18# error will not work on BF538 silicon version 0.0, 0.1, 0.2 or 0.3 18# error will not work on BF538 silicon version 0.0, 0.1, 0.2, or 0.3
19#endif 19#endif
20 20
21/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ 21/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
@@ -106,16 +106,18 @@
106#define ANOMALY_05000403 (1) 106#define ANOMALY_05000403 (1)
107/* Speculative Fetches Can Cause Undesired External FIFO Operations */ 107/* Speculative Fetches Can Cause Undesired External FIFO Operations */
108#define ANOMALY_05000416 (1) 108#define ANOMALY_05000416 (1)
109/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
110#define ANOMALY_05000443 (1)
109 111
110/* Anomalies that don't exist on this proc */ 112/* Anomalies that don't exist on this proc */
111#define ANOMALY_05000230 (0)
112#define ANOMALY_05000353 (1)
113#define ANOMALY_05000386 (1)
114#define ANOMALY_05000198 (0)
115#define ANOMALY_05000158 (0) 113#define ANOMALY_05000158 (0)
114#define ANOMALY_05000198 (0)
115#define ANOMALY_05000230 (0)
116#define ANOMALY_05000263 (0)
116#define ANOMALY_05000311 (0) 117#define ANOMALY_05000311 (0)
117#define ANOMALY_05000323 (0) 118#define ANOMALY_05000323 (0)
118#define ANOMALY_05000263 (0) 119#define ANOMALY_05000353 (1)
119#define ANOMALY_05000363 (0) 120#define ANOMALY_05000363 (0)
121#define ANOMALY_05000386 (1)
120 122
121#endif 123#endif
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 816b09278f62..98f973299b87 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -157,6 +157,8 @@
157#define ANOMALY_05000429 (__SILICON_REVISION__ < 2) 157#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
158/* Software System Reset Corrupts PLL_LOCKCNT Register */ 158/* Software System Reset Corrupts PLL_LOCKCNT Register */
159#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) 159#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
160/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
161#define ANOMALY_05000443 (1)
160 162
161/* Anomalies that don't exist on this proc */ 163/* Anomalies that don't exist on this proc */
162#define ANOMALY_05000125 (0) 164#define ANOMALY_05000125 (0)
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 22990df04ae1..a1ff7c40238f 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -264,6 +264,8 @@
264#define ANOMALY_05000371 (1) 264#define ANOMALY_05000371 (1)
265/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ 265/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
266#define ANOMALY_05000403 (1) 266#define ANOMALY_05000403 (1)
267/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
268#define ANOMALY_05000443 (1)
267 269
268/* Anomalies that don't exist on this proc */ 270/* Anomalies that don't exist on this proc */
269#define ANOMALY_05000158 (0) 271#define ANOMALY_05000158 (0)