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authorKristian Høgsberg <krh@bitplanet.net>2009-02-13 20:56:51 -0500
committerDave Airlie <airlied@redhat.com>2009-02-19 21:21:13 -0500
commita29f5ca3d691995266a4b1df313e32ff0509a03c (patch)
tree700e904cb0787c06bf998f42a195e6bf7613cd73
parentf3cade5c037054ce5f57651fe0b64eaa9781c753 (diff)
drm: Collapse identical i8xx_clock() and i9xx_clock().
They used to be different. Now they're identical. Signed-off-by: Kristian Høgsberg <krh@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c33
1 files changed, 6 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4f54ac55f326..8b2038706268 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -189,19 +189,7 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
189 return limit; 189 return limit;
190} 190}
191 191
192/** Derive the pixel clock for the given refclk and divisors for 8xx chips. */ 192static void intel_clock(int refclk, intel_clock_t *clock)
193
194static void i8xx_clock(int refclk, intel_clock_t *clock)
195{
196 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
197 clock->p = clock->p1 * clock->p2;
198 clock->vco = refclk * clock->m / (clock->n + 2);
199 clock->dot = clock->vco / clock->p;
200}
201
202/** Derive the pixel clock for the given refclk and divisors for 9xx chips. */
203
204static void i9xx_clock(int refclk, intel_clock_t *clock)
205{ 193{
206 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); 194 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
207 clock->p = clock->p1 * clock->p2; 195 clock->p = clock->p1 * clock->p2;
@@ -209,15 +197,6 @@ static void i9xx_clock(int refclk, intel_clock_t *clock)
209 clock->dot = clock->vco / clock->p; 197 clock->dot = clock->vco / clock->p;
210} 198}
211 199
212static void intel_clock(struct drm_device *dev, int refclk,
213 intel_clock_t *clock)
214{
215 if (IS_I9XX(dev))
216 i9xx_clock (refclk, clock);
217 else
218 i8xx_clock (refclk, clock);
219}
220
221/** 200/**
222 * Returns whether any output on the specified pipe is of the specified type 201 * Returns whether any output on the specified pipe is of the specified type
223 */ 202 */
@@ -318,7 +297,7 @@ static bool intel_find_best_PLL(struct drm_crtc *crtc, int target,
318 clock.p1 <= limit->p1.max; clock.p1++) { 297 clock.p1 <= limit->p1.max; clock.p1++) {
319 int this_err; 298 int this_err;
320 299
321 intel_clock(dev, refclk, &clock); 300 intel_clock(refclk, &clock);
322 301
323 if (!intel_PLL_is_valid(crtc, &clock)) 302 if (!intel_PLL_is_valid(crtc, &clock))
324 continue; 303 continue;
@@ -1313,7 +1292,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1313 } 1292 }
1314 1293
1315 /* XXX: Handle the 100Mhz refclk */ 1294 /* XXX: Handle the 100Mhz refclk */
1316 i9xx_clock(96000, &clock); 1295 intel_clock(96000, &clock);
1317 } else { 1296 } else {
1318 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN); 1297 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN);
1319 1298
@@ -1325,9 +1304,9 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1325 if ((dpll & PLL_REF_INPUT_MASK) == 1304 if ((dpll & PLL_REF_INPUT_MASK) ==
1326 PLLB_REF_INPUT_SPREADSPECTRUMIN) { 1305 PLLB_REF_INPUT_SPREADSPECTRUMIN) {
1327 /* XXX: might not be 66MHz */ 1306 /* XXX: might not be 66MHz */
1328 i8xx_clock(66000, &clock); 1307 intel_clock(66000, &clock);
1329 } else 1308 } else
1330 i8xx_clock(48000, &clock); 1309 intel_clock(48000, &clock);
1331 } else { 1310 } else {
1332 if (dpll & PLL_P1_DIVIDE_BY_TWO) 1311 if (dpll & PLL_P1_DIVIDE_BY_TWO)
1333 clock.p1 = 2; 1312 clock.p1 = 2;
@@ -1340,7 +1319,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
1340 else 1319 else
1341 clock.p2 = 2; 1320 clock.p2 = 2;
1342 1321
1343 i8xx_clock(48000, &clock); 1322 intel_clock(48000, &clock);
1344 } 1323 }
1345 } 1324 }
1346 1325