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authorUlrich Kunitz <kune@deine-taler.de>2007-08-05 20:23:54 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:50:30 -0400
commitffe143741f9e0fc3731fe6fe977a2273da4837bd (patch)
treebf10366cbeeef7ebf370c7e81ba4535d61c6a46e
parent5dcddfae63bd26da0f11a8e40f0ae555b5ac624e (diff)
[PATCH] zd1211rw: removed noisy debug messages
While developing the driver we added a lot of debug messages for setting hardware registers. These messages make the reading of the log files difficult and are of no use anymore. This patch removes those messages in zd_chip.c. Signed-off-by: Ulrich Kunitz <kune@deine-taler.de> Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index c39f1984b84d..7e3c0625129b 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -500,8 +500,6 @@ int zd_chip_lock_phy_regs(struct zd_chip *chip)
500 return r; 500 return r;
501 } 501 }
502 502
503 dev_dbg_f(zd_chip_dev(chip),
504 "CR_REG1: 0x%02x -> 0x%02x\n", tmp, tmp & ~UNLOCK_PHY_REGS);
505 tmp &= ~UNLOCK_PHY_REGS; 503 tmp &= ~UNLOCK_PHY_REGS;
506 504
507 r = zd_iowrite32_locked(chip, tmp, CR_REG1); 505 r = zd_iowrite32_locked(chip, tmp, CR_REG1);
@@ -523,8 +521,6 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip)
523 return r; 521 return r;
524 } 522 }
525 523
526 dev_dbg_f(zd_chip_dev(chip),
527 "CR_REG1: 0x%02x -> 0x%02x\n", tmp, tmp | UNLOCK_PHY_REGS);
528 tmp |= UNLOCK_PHY_REGS; 524 tmp |= UNLOCK_PHY_REGS;
529 525
530 r = zd_iowrite32_locked(chip, tmp, CR_REG1); 526 r = zd_iowrite32_locked(chip, tmp, CR_REG1);
@@ -841,8 +837,6 @@ static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
841 s->atim_wnd_period = values[0]; 837 s->atim_wnd_period = values[0];
842 s->pre_tbtt = values[1]; 838 s->pre_tbtt = values[1];
843 s->beacon_interval = values[2]; 839 s->beacon_interval = values[2];
844 dev_dbg_f(zd_chip_dev(chip), "aw %u pt %u bi %u\n",
845 s->atim_wnd_period, s->pre_tbtt, s->beacon_interval);
846 return 0; 840 return 0;
847} 841}
848 842
@@ -864,9 +858,6 @@ static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
864 reqs[2].addr = CR_BCN_INTERVAL; 858 reqs[2].addr = CR_BCN_INTERVAL;
865 reqs[2].value = s->beacon_interval; 859 reqs[2].value = s->beacon_interval;
866 860
867 dev_dbg_f(zd_chip_dev(chip),
868 "aw %u pt %u bi %u\n", s->atim_wnd_period, s->pre_tbtt,
869 s->beacon_interval);
870 return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); 861 return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs));
871} 862}
872 863
@@ -1160,16 +1151,12 @@ out:
1160static int update_pwr_int(struct zd_chip *chip, u8 channel) 1151static int update_pwr_int(struct zd_chip *chip, u8 channel)
1161{ 1152{
1162 u8 value = chip->pwr_int_values[channel - 1]; 1153 u8 value = chip->pwr_int_values[channel - 1];
1163 dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_int %#04x\n",
1164 channel, value);
1165 return zd_iowrite16_locked(chip, value, CR31); 1154 return zd_iowrite16_locked(chip, value, CR31);
1166} 1155}
1167 1156
1168static int update_pwr_cal(struct zd_chip *chip, u8 channel) 1157static int update_pwr_cal(struct zd_chip *chip, u8 channel)
1169{ 1158{
1170 u8 value = chip->pwr_cal_values[channel-1]; 1159 u8 value = chip->pwr_cal_values[channel-1];
1171 dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_cal %#04x\n",
1172 channel, value);
1173 return zd_iowrite16_locked(chip, value, CR68); 1160 return zd_iowrite16_locked(chip, value, CR68);
1174} 1161}
1175 1162
@@ -1184,9 +1171,6 @@ static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
1184 ioreqs[2].addr = CR65; 1171 ioreqs[2].addr = CR65;
1185 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1]; 1172 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1];
1186 1173
1187 dev_dbg_f(zd_chip_dev(chip),
1188 "channel %d ofdm_cal 36M %#04x 48M %#04x 54M %#04x\n",
1189 channel, ioreqs[0].value, ioreqs[1].value, ioreqs[2].value);
1190 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1174 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
1191} 1175}
1192 1176
@@ -1638,7 +1622,5 @@ int zd_chip_set_multicast_hash(struct zd_chip *chip,
1638 { CR_GROUP_HASH_P2, hash->high }, 1622 { CR_GROUP_HASH_P2, hash->high },
1639 }; 1623 };
1640 1624
1641 dev_dbg_f(zd_chip_dev(chip), "hash l 0x%08x h 0x%08x\n",
1642 ioreqs[0].value, ioreqs[1].value);
1643 return zd_iowrite32a(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1625 return zd_iowrite32a(chip, ioreqs, ARRAY_SIZE(ioreqs));
1644} 1626}