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authorDavid Woodhouse <dwmw2@org.rmk.(none)>2005-05-21 10:52:23 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-05-21 10:52:23 -0400
commit857dde2e79082d2954ede7f10783addaae956777 (patch)
tree5a7ba015eb22985d69e03e315b249c4c89750ee2
parent9636273dae265b9354b861b373cd43cd76a6d0fe (diff)
When we detect that a 16550 was in fact part of a NatSemi SuperIO chip
with high-speed mode enabled, we switch it to high-speed mode so that baud_base becomes 921600. However, we also need to multiply the baud divisor by 8 at the same time, in case it's already in use as a console. Signed-off-by: David Woodhouse Acked-by: Tom Rini Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--drivers/serial/8250.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 3bbf0cc6e53f..30e8beb71430 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -682,8 +682,6 @@ static void autoconfig_16550a(struct uart_8250_port *up)
682 * from EXCR1. Switch back to bank 0, change it in MCR. Then 682 * from EXCR1. Switch back to bank 0, change it in MCR. Then
683 * switch back to bank 2, read it from EXCR1 again and check 683 * switch back to bank 2, read it from EXCR1 again and check
684 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 684 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
685 * On PowerPC we don't want to change baud_base, as we have
686 * a number of different divisors. -- Tom Rini
687 */ 685 */
688 serial_outp(up, UART_LCR, 0); 686 serial_outp(up, UART_LCR, 0);
689 status1 = serial_in(up, UART_MCR); 687 status1 = serial_in(up, UART_MCR);
@@ -699,16 +697,25 @@ static void autoconfig_16550a(struct uart_8250_port *up)
699 serial_outp(up, UART_MCR, status1); 697 serial_outp(up, UART_MCR, status1);
700 698
701 if ((status2 ^ status1) & UART_MCR_LOOP) { 699 if ((status2 ^ status1) & UART_MCR_LOOP) {
702#ifndef CONFIG_PPC 700 unsigned short quot;
701
703 serial_outp(up, UART_LCR, 0xE0); 702 serial_outp(up, UART_LCR, 0xE0);
703
704 quot = serial_inp(up, UART_DLM) << 8;
705 quot += serial_inp(up, UART_DLL);
706 quot <<= 3;
707
704 status1 = serial_in(up, 0x04); /* EXCR1 */ 708 status1 = serial_in(up, 0x04); /* EXCR1 */
705 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 709 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
706 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 710 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
707 serial_outp(up, 0x04, status1); 711 serial_outp(up, 0x04, status1);
712
713 serial_outp(up, UART_DLL, quot & 0xff);
714 serial_outp(up, UART_DLM, quot >> 8);
715
708 serial_outp(up, UART_LCR, 0); 716 serial_outp(up, UART_LCR, 0);
709 up->port.uartclk = 921600*16;
710#endif
711 717
718 up->port.uartclk = 921600*16;
712 up->port.type = PORT_NS16550A; 719 up->port.type = PORT_NS16550A;
713 up->capabilities |= UART_NATSEMI; 720 up->capabilities |= UART_NATSEMI;
714 return; 721 return;