diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 18:50:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 18:50:23 -0400 |
commit | 6a84258e5f5bb8b9bd72e06a5837fa6fdacaf5c5 (patch) | |
tree | 3c4911a489c85e908b0ef3ed83d78264788f858c | |
parent | efefc6eb38d43b8e5daef482f575d767b002004e (diff) | |
parent | f3e6f164c2389853432454c89b316a8ab7485e2f (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (37 commits)
PCI: merge almost all of pci_32.h and pci_64.h together
PCI: X86: Introduce and enable PCI domain support
PCI: Add 'nodomains' boot option, and pci_domains_supported global
PCI: modify PCI bridge control ISA flag for clarity
PCI: use _CRS for PCI resource allocation
PCI: avoid P2P prefetch window for expansion ROMs
PCI: skip ISA ioresource alignment on some systems
PCI: remove transparent bridge sizing
pci: write file size to inode on proc bus file write
pci: use size stored in proc_dir_entry for proc bus files
pci: implement "pci=noaer"
PCI: fix IDE legacy mode resources
MSI: Use correct data offset for 32-bit MSI in read_msi_msg()
PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code
PCI: i386: Compaq EVO N800c needs PCI bus renumbering
PCI: Remove no longer correct documentation regarding MSI vector assignment
PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read
...
38 files changed, 654 insertions, 544 deletions
diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt index cc7a8c39fb6f..b939ebb62871 100644 --- a/Documentation/DMA-API.txt +++ b/Documentation/DMA-API.txt | |||
@@ -68,6 +68,9 @@ size and dma_handle must all be the same as those passed into the | |||
68 | consistent allocate. cpu_addr must be the virtual address returned by | 68 | consistent allocate. cpu_addr must be the virtual address returned by |
69 | the consistent allocate. | 69 | the consistent allocate. |
70 | 70 | ||
71 | Note that unlike their sibling allocation calls, these routines | ||
72 | may only be called with IRQs enabled. | ||
73 | |||
71 | 74 | ||
72 | Part Ib - Using small dma-coherent buffers | 75 | Part Ib - Using small dma-coherent buffers |
73 | ------------------------------------------ | 76 | ------------------------------------------ |
diff --git a/Documentation/MSI-HOWTO.txt b/Documentation/MSI-HOWTO.txt index 0d8240774fca..a51f693c1541 100644 --- a/Documentation/MSI-HOWTO.txt +++ b/Documentation/MSI-HOWTO.txt | |||
@@ -241,68 +241,7 @@ address space of the MSI-X table/MSI-X PBA. Otherwise, the PCI subsystem | |||
241 | will fail enabling MSI-X on its hardware device when it calls the function | 241 | will fail enabling MSI-X on its hardware device when it calls the function |
242 | pci_enable_msix(). | 242 | pci_enable_msix(). |
243 | 243 | ||
244 | 5.3.2 Handling MSI-X allocation | 244 | 5.3.2 API pci_enable_msix |
245 | |||
246 | Determining the number of MSI-X vectors allocated to a function is | ||
247 | dependent on the number of MSI capable devices and MSI-X capable | ||
248 | devices populated in the system. The policy of allocating MSI-X | ||
249 | vectors to a function is defined as the following: | ||
250 | |||
251 | #of MSI-X vectors allocated to a function = (x - y)/z where | ||
252 | |||
253 | x = The number of available PCI vector resources by the time | ||
254 | the device driver calls pci_enable_msix(). The PCI vector | ||
255 | resources is the sum of the number of unassigned vectors | ||
256 | (new) and the number of released vectors when any MSI/MSI-X | ||
257 | device driver switches its hardware device back to a legacy | ||
258 | mode or is hot-removed. The number of unassigned vectors | ||
259 | may exclude some vectors reserved, as defined in parameter | ||
260 | NR_HP_RESERVED_VECTORS, for the case where the system is | ||
261 | capable of supporting hot-add/hot-remove operations. Users | ||
262 | may change the value defined in NR_HR_RESERVED_VECTORS to | ||
263 | meet their specific needs. | ||
264 | |||
265 | y = The number of MSI capable devices populated in the system. | ||
266 | This policy ensures that each MSI capable device has its | ||
267 | vector reserved to avoid the case where some MSI-X capable | ||
268 | drivers may attempt to claim all available vector resources. | ||
269 | |||
270 | z = The number of MSI-X capable devices populated in the system. | ||
271 | This policy ensures that maximum (x - y) is distributed | ||
272 | evenly among MSI-X capable devices. | ||
273 | |||
274 | Note that the PCI subsystem scans y and z during a bus enumeration. | ||
275 | When the PCI subsystem completes configuring MSI/MSI-X capability | ||
276 | structure of a device as requested by its device driver, y/z is | ||
277 | decremented accordingly. | ||
278 | |||
279 | 5.3.3 Handling MSI-X shortages | ||
280 | |||
281 | For the case where fewer MSI-X vectors are allocated to a function | ||
282 | than requested, the function pci_enable_msix() will return the | ||
283 | maximum number of MSI-X vectors available to the caller. A device | ||
284 | driver may re-send its request with fewer or equal vectors indicated | ||
285 | in the return. For example, if a device driver requests 5 vectors, but | ||
286 | the number of available vectors is 3 vectors, a value of 3 will be | ||
287 | returned as a result of pci_enable_msix() call. A function could be | ||
288 | designed for its driver to use only 3 MSI-X table entries as | ||
289 | different combinations as ABC--, A-B-C, A--CB, etc. Note that this | ||
290 | patch does not support multiple entries with the same vector. Such | ||
291 | attempt by a device driver to use 5 MSI-X table entries with 3 vectors | ||
292 | as ABBCC, AABCC, BCCBA, etc will result as a failure by the function | ||
293 | pci_enable_msix(). Below are the reasons why supporting multiple | ||
294 | entries with the same vector is an undesirable solution. | ||
295 | |||
296 | - The PCI subsystem cannot determine the entry that | ||
297 | generated the message to mask/unmask MSI while handling | ||
298 | software driver ISR. Attempting to walk through all MSI-X | ||
299 | table entries (2048 max) to mask/unmask any match vector | ||
300 | is an undesirable solution. | ||
301 | |||
302 | - Walking through all MSI-X table entries (2048 max) to handle | ||
303 | SMP affinity of any match vector is an undesirable solution. | ||
304 | |||
305 | 5.3.4 API pci_enable_msix | ||
306 | 245 | ||
307 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) | 246 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) |
308 | 247 | ||
@@ -339,7 +278,7 @@ a failure. This failure may be a result of duplicate entries | |||
339 | specified in second argument, or a result of no available vector, | 278 | specified in second argument, or a result of no available vector, |
340 | or a result of failing to initialize MSI-X table entries. | 279 | or a result of failing to initialize MSI-X table entries. |
341 | 280 | ||
342 | 5.3.5 API pci_disable_msix | 281 | 5.3.3 API pci_disable_msix |
343 | 282 | ||
344 | void pci_disable_msix(struct pci_dev *dev) | 283 | void pci_disable_msix(struct pci_dev *dev) |
345 | 284 | ||
@@ -349,7 +288,7 @@ always call free_irq() on all MSI-X vectors it has done request_irq() | |||
349 | on before calling this API. Failure to do so results in a BUG_ON() and | 288 | on before calling this API. Failure to do so results in a BUG_ON() and |
350 | a device will be left with MSI-X enabled and leaks its vectors. | 289 | a device will be left with MSI-X enabled and leaks its vectors. |
351 | 290 | ||
352 | 5.3.6 MSI-X mode vs. legacy mode diagram | 291 | 5.3.4 MSI-X mode vs. legacy mode diagram |
353 | 292 | ||
354 | The below diagram shows the events which switch the interrupt | 293 | The below diagram shows the events which switch the interrupt |
355 | mode on the MSI-X capable device function between MSI-X mode and | 294 | mode on the MSI-X capable device function between MSI-X mode and |
@@ -407,7 +346,7 @@ between MSI mod MSI-X mode during a run-time. | |||
407 | MSI/MSI-X support requires support from both system hardware and | 346 | MSI/MSI-X support requires support from both system hardware and |
408 | individual hardware device functions. | 347 | individual hardware device functions. |
409 | 348 | ||
410 | 5.5.1 System hardware support | 349 | 5.5.1 Required x86 hardware support |
411 | 350 | ||
412 | Since the target of MSI address is the local APIC CPU, enabling | 351 | Since the target of MSI address is the local APIC CPU, enabling |
413 | MSI/MSI-X support in the Linux kernel is dependent on whether existing | 352 | MSI/MSI-X support in the Linux kernel is dependent on whether existing |
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 912c57c2334e..9cbc82e37ed0 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt | |||
@@ -68,6 +68,7 @@ parameter is applicable: | |||
68 | PARIDE The ParIDE (parallel port IDE) subsystem is enabled. | 68 | PARIDE The ParIDE (parallel port IDE) subsystem is enabled. |
69 | PARISC The PA-RISC architecture is enabled. | 69 | PARISC The PA-RISC architecture is enabled. |
70 | PCI PCI bus support is enabled. | 70 | PCI PCI bus support is enabled. |
71 | PCIE PCI Express support is enabled. | ||
71 | PCMCIA The PCMCIA subsystem is enabled. | 72 | PCMCIA The PCMCIA subsystem is enabled. |
72 | PNP Plug & Play support is enabled. | 73 | PNP Plug & Play support is enabled. |
73 | PPC PowerPC architecture is enabled. | 74 | PPC PowerPC architecture is enabled. |
@@ -1277,6 +1278,11 @@ and is between 256 and 4096 characters. It is defined in the file | |||
1277 | Mechanism 1. | 1278 | Mechanism 1. |
1278 | conf2 [X86-32] Force use of PCI Configuration | 1279 | conf2 [X86-32] Force use of PCI Configuration |
1279 | Mechanism 2. | 1280 | Mechanism 2. |
1281 | noaer [PCIE] If the PCIEAER kernel config parameter is | ||
1282 | enabled, this kernel boot option can be used to | ||
1283 | disable the use of PCIE advanced error reporting. | ||
1284 | nodomains [PCI] Disable support for multiple PCI | ||
1285 | root domains (aka PCI segments, in ACPI-speak). | ||
1280 | nommconf [X86-32,X86_64] Disable use of MMCONFIG for PCI | 1286 | nommconf [X86-32,X86_64] Disable use of MMCONFIG for PCI |
1281 | Configuration | 1287 | Configuration |
1282 | nomsi [MSI] If the PCI_MSI kernel config parameter is | 1288 | nomsi [MSI] If the PCI_MSI kernel config parameter is |
@@ -1321,6 +1327,8 @@ and is between 256 and 4096 characters. It is defined in the file | |||
1321 | IRQ routing is enabled. | 1327 | IRQ routing is enabled. |
1322 | noacpi [X86-32] Do not use ACPI for IRQ routing | 1328 | noacpi [X86-32] Do not use ACPI for IRQ routing |
1323 | or for PCI scanning. | 1329 | or for PCI scanning. |
1330 | use_crs [X86-32] Use _CRS for PCI resource | ||
1331 | allocation. | ||
1324 | routeirq Do IRQ routing for all PCI devices. | 1332 | routeirq Do IRQ routing for all PCI devices. |
1325 | This is normally done in pci_enable_device(), | 1333 | This is normally done in pci_enable_device(), |
1326 | so this option is a temporary workaround | 1334 | so this option is a temporary workaround |
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index 6bbbc2755e44..f1486f8a3e6d 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig | |||
@@ -1137,6 +1137,11 @@ config PCI_MMCONFIG | |||
1137 | depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY) | 1137 | depends on PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY) |
1138 | default y | 1138 | default y |
1139 | 1139 | ||
1140 | config PCI_DOMAINS | ||
1141 | bool | ||
1142 | depends on PCI | ||
1143 | default y | ||
1144 | |||
1140 | source "drivers/pci/pcie/Kconfig" | 1145 | source "drivers/pci/pcie/Kconfig" |
1141 | 1146 | ||
1142 | source "drivers/pci/Kconfig" | 1147 | source "drivers/pci/Kconfig" |
diff --git a/arch/x86/kernel/pci-dma_32.c b/arch/x86/kernel/pci-dma_32.c index 048f09b62553..0aae2f3847a5 100644 --- a/arch/x86/kernel/pci-dma_32.c +++ b/arch/x86/kernel/pci-dma_32.c | |||
@@ -63,7 +63,8 @@ void dma_free_coherent(struct device *dev, size_t size, | |||
63 | { | 63 | { |
64 | struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; | 64 | struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; |
65 | int order = get_order(size); | 65 | int order = get_order(size); |
66 | 66 | ||
67 | WARN_ON(irqs_disabled()); /* for portability */ | ||
67 | if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { | 68 | if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { |
68 | int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; | 69 | int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; |
69 | 70 | ||
diff --git a/arch/x86/kernel/pci-dma_64.c b/arch/x86/kernel/pci-dma_64.c index 29711445c818..9576a2eb375e 100644 --- a/arch/x86/kernel/pci-dma_64.c +++ b/arch/x86/kernel/pci-dma_64.c | |||
@@ -167,6 +167,7 @@ EXPORT_SYMBOL(dma_alloc_coherent); | |||
167 | void dma_free_coherent(struct device *dev, size_t size, | 167 | void dma_free_coherent(struct device *dev, size_t size, |
168 | void *vaddr, dma_addr_t bus) | 168 | void *vaddr, dma_addr_t bus) |
169 | { | 169 | { |
170 | WARN_ON(irqs_disabled()); /* for portability */ | ||
170 | if (dma_ops->unmap_single) | 171 | if (dma_ops->unmap_single) |
171 | dma_ops->unmap_single(dev, bus, size, 0); | 172 | dma_ops->unmap_single(dev, bus, size, 0); |
172 | free_pages((unsigned long)vaddr, get_order(size)); | 173 | free_pages((unsigned long)vaddr, get_order(size)); |
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c index 03e1cce58f49..139eb03490f5 100644 --- a/arch/x86/kernel/reboot_fixups_32.c +++ b/arch/x86/kernel/reboot_fixups_32.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <asm/delay.h> | 12 | #include <asm/delay.h> |
13 | #include <linux/pci.h> | 13 | #include <linux/pci.h> |
14 | #include <linux/interrupt.h> | ||
14 | #include <asm/reboot_fixups.h> | 15 | #include <asm/reboot_fixups.h> |
15 | #include <asm/msr.h> | 16 | #include <asm/msr.h> |
16 | 17 | ||
@@ -56,6 +57,11 @@ void mach_reboot_fixups(void) | |||
56 | struct pci_dev *dev; | 57 | struct pci_dev *dev; |
57 | int i; | 58 | int i; |
58 | 59 | ||
60 | /* we can be called from sysrq-B code. In such a case it is | ||
61 | * prohibited to dig PCI */ | ||
62 | if (in_interrupt()) | ||
63 | return; | ||
64 | |||
59 | for (i=0; i < ARRAY_SIZE(fixups_table); i++) { | 65 | for (i=0; i < ARRAY_SIZE(fixups_table); i++) { |
60 | cur = &(fixups_table[i]); | 66 | cur = &(fixups_table[i]); |
61 | dev = pci_get_device(cur->vendor, cur->device, NULL); | 67 | dev = pci_get_device(cur->vendor, cur->device, NULL); |
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index bc8a44bddaa7..27a391da9a98 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c | |||
@@ -2,15 +2,199 @@ | |||
2 | #include <linux/acpi.h> | 2 | #include <linux/acpi.h> |
3 | #include <linux/init.h> | 3 | #include <linux/init.h> |
4 | #include <linux/irq.h> | 4 | #include <linux/irq.h> |
5 | #include <linux/dmi.h> | ||
5 | #include <asm/numa.h> | 6 | #include <asm/numa.h> |
6 | #include "pci.h" | 7 | #include "pci.h" |
7 | 8 | ||
9 | static int __devinit can_skip_ioresource_align(struct dmi_system_id *d) | ||
10 | { | ||
11 | pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; | ||
12 | printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident); | ||
13 | return 0; | ||
14 | } | ||
15 | |||
16 | static struct dmi_system_id acpi_pciprobe_dmi_table[] = { | ||
17 | /* | ||
18 | * Systems where PCI IO resource ISA alignment can be skipped | ||
19 | * when the ISA enable bit in the bridge control is not set | ||
20 | */ | ||
21 | { | ||
22 | .callback = can_skip_ioresource_align, | ||
23 | .ident = "IBM System x3800", | ||
24 | .matches = { | ||
25 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | ||
26 | DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), | ||
27 | }, | ||
28 | }, | ||
29 | { | ||
30 | .callback = can_skip_ioresource_align, | ||
31 | .ident = "IBM System x3850", | ||
32 | .matches = { | ||
33 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | ||
34 | DMI_MATCH(DMI_PRODUCT_NAME, "x3850"), | ||
35 | }, | ||
36 | }, | ||
37 | { | ||
38 | .callback = can_skip_ioresource_align, | ||
39 | .ident = "IBM System x3950", | ||
40 | .matches = { | ||
41 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | ||
42 | DMI_MATCH(DMI_PRODUCT_NAME, "x3950"), | ||
43 | }, | ||
44 | }, | ||
45 | {} | ||
46 | }; | ||
47 | |||
48 | struct pci_root_info { | ||
49 | char *name; | ||
50 | unsigned int res_num; | ||
51 | struct resource *res; | ||
52 | struct pci_bus *bus; | ||
53 | int busnum; | ||
54 | }; | ||
55 | |||
56 | static acpi_status | ||
57 | resource_to_addr(struct acpi_resource *resource, | ||
58 | struct acpi_resource_address64 *addr) | ||
59 | { | ||
60 | acpi_status status; | ||
61 | |||
62 | status = acpi_resource_to_address64(resource, addr); | ||
63 | if (ACPI_SUCCESS(status) && | ||
64 | (addr->resource_type == ACPI_MEMORY_RANGE || | ||
65 | addr->resource_type == ACPI_IO_RANGE) && | ||
66 | addr->address_length > 0 && | ||
67 | addr->producer_consumer == ACPI_PRODUCER) { | ||
68 | return AE_OK; | ||
69 | } | ||
70 | return AE_ERROR; | ||
71 | } | ||
72 | |||
73 | static acpi_status | ||
74 | count_resource(struct acpi_resource *acpi_res, void *data) | ||
75 | { | ||
76 | struct pci_root_info *info = data; | ||
77 | struct acpi_resource_address64 addr; | ||
78 | acpi_status status; | ||
79 | |||
80 | status = resource_to_addr(acpi_res, &addr); | ||
81 | if (ACPI_SUCCESS(status)) | ||
82 | info->res_num++; | ||
83 | return AE_OK; | ||
84 | } | ||
85 | |||
86 | static acpi_status | ||
87 | setup_resource(struct acpi_resource *acpi_res, void *data) | ||
88 | { | ||
89 | struct pci_root_info *info = data; | ||
90 | struct resource *res; | ||
91 | struct acpi_resource_address64 addr; | ||
92 | acpi_status status; | ||
93 | unsigned long flags; | ||
94 | struct resource *root; | ||
95 | |||
96 | status = resource_to_addr(acpi_res, &addr); | ||
97 | if (!ACPI_SUCCESS(status)) | ||
98 | return AE_OK; | ||
99 | |||
100 | if (addr.resource_type == ACPI_MEMORY_RANGE) { | ||
101 | root = &iomem_resource; | ||
102 | flags = IORESOURCE_MEM; | ||
103 | if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY) | ||
104 | flags |= IORESOURCE_PREFETCH; | ||
105 | } else if (addr.resource_type == ACPI_IO_RANGE) { | ||
106 | root = &ioport_resource; | ||
107 | flags = IORESOURCE_IO; | ||
108 | } else | ||
109 | return AE_OK; | ||
110 | |||
111 | res = &info->res[info->res_num]; | ||
112 | res->name = info->name; | ||
113 | res->flags = flags; | ||
114 | res->start = addr.minimum + addr.translation_offset; | ||
115 | res->end = res->start + addr.address_length - 1; | ||
116 | res->child = NULL; | ||
117 | |||
118 | if (insert_resource(root, res)) { | ||
119 | printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " | ||
120 | "from %s for %s\n", (unsigned long) res->start, | ||
121 | (unsigned long) res->end, root->name, info->name); | ||
122 | } else { | ||
123 | info->bus->resource[info->res_num] = res; | ||
124 | info->res_num++; | ||
125 | } | ||
126 | return AE_OK; | ||
127 | } | ||
128 | |||
129 | static void | ||
130 | adjust_transparent_bridge_resources(struct pci_bus *bus) | ||
131 | { | ||
132 | struct pci_dev *dev; | ||
133 | |||
134 | list_for_each_entry(dev, &bus->devices, bus_list) { | ||
135 | int i; | ||
136 | u16 class = dev->class >> 8; | ||
137 | |||
138 | if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) { | ||
139 | for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++) | ||
140 | dev->subordinate->resource[i] = | ||
141 | dev->bus->resource[i - 3]; | ||
142 | } | ||
143 | } | ||
144 | } | ||
145 | |||
146 | static void | ||
147 | get_current_resources(struct acpi_device *device, int busnum, | ||
148 | struct pci_bus *bus) | ||
149 | { | ||
150 | struct pci_root_info info; | ||
151 | size_t size; | ||
152 | |||
153 | info.bus = bus; | ||
154 | info.res_num = 0; | ||
155 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, | ||
156 | &info); | ||
157 | if (!info.res_num) | ||
158 | return; | ||
159 | |||
160 | size = sizeof(*info.res) * info.res_num; | ||
161 | info.res = kmalloc(size, GFP_KERNEL); | ||
162 | if (!info.res) | ||
163 | goto res_alloc_fail; | ||
164 | |||
165 | info.name = kmalloc(12, GFP_KERNEL); | ||
166 | if (!info.name) | ||
167 | goto name_alloc_fail; | ||
168 | sprintf(info.name, "PCI Bus #%02x", busnum); | ||
169 | |||
170 | info.res_num = 0; | ||
171 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, | ||
172 | &info); | ||
173 | if (info.res_num) | ||
174 | adjust_transparent_bridge_resources(bus); | ||
175 | |||
176 | return; | ||
177 | |||
178 | name_alloc_fail: | ||
179 | kfree(info.res); | ||
180 | res_alloc_fail: | ||
181 | return; | ||
182 | } | ||
183 | |||
8 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) | 184 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) |
9 | { | 185 | { |
10 | struct pci_bus *bus; | 186 | struct pci_bus *bus; |
11 | struct pci_sysdata *sd; | 187 | struct pci_sysdata *sd; |
12 | int pxm; | 188 | int pxm; |
13 | 189 | ||
190 | dmi_check_system(acpi_pciprobe_dmi_table); | ||
191 | |||
192 | if (domain && !pci_domains_supported) { | ||
193 | printk(KERN_WARNING "PCI: Multiple domains not supported " | ||
194 | "(dom %d, bus %d)\n", domain, busnum); | ||
195 | return NULL; | ||
196 | } | ||
197 | |||
14 | /* Allocate per-root-bus (not per bus) arch-specific data. | 198 | /* Allocate per-root-bus (not per bus) arch-specific data. |
15 | * TODO: leak; this memory is never freed. | 199 | * TODO: leak; this memory is never freed. |
16 | * It's arguable whether it's worth the trouble to care. | 200 | * It's arguable whether it's worth the trouble to care. |
@@ -21,12 +205,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do | |||
21 | return NULL; | 205 | return NULL; |
22 | } | 206 | } |
23 | 207 | ||
24 | if (domain != 0) { | 208 | sd->domain = domain; |
25 | printk(KERN_WARNING "PCI: Multiple domains not supported\n"); | ||
26 | kfree(sd); | ||
27 | return NULL; | ||
28 | } | ||
29 | |||
30 | sd->node = -1; | 209 | sd->node = -1; |
31 | 210 | ||
32 | pxm = acpi_get_pxm(device->handle); | 211 | pxm = acpi_get_pxm(device->handle); |
@@ -47,6 +226,9 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do | |||
47 | } | 226 | } |
48 | } | 227 | } |
49 | #endif | 228 | #endif |
229 | |||
230 | if (bus && (pci_probe & PCI_USE__CRS)) | ||
231 | get_current_resources(device, busnum, bus); | ||
50 | 232 | ||
51 | return bus; | 233 | return bus; |
52 | } | 234 | } |
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 07d5223442bf..2d71bbc411d2 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c | |||
@@ -29,12 +29,14 @@ struct pci_raw_ops *raw_pci_ops; | |||
29 | 29 | ||
30 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) | 30 | static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) |
31 | { | 31 | { |
32 | return raw_pci_ops->read(0, bus->number, devfn, where, size, value); | 32 | return raw_pci_ops->read(pci_domain_nr(bus), bus->number, |
33 | devfn, where, size, value); | ||
33 | } | 34 | } |
34 | 35 | ||
35 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) | 36 | static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) |
36 | { | 37 | { |
37 | return raw_pci_ops->write(0, bus->number, devfn, where, size, value); | 38 | return raw_pci_ops->write(pci_domain_nr(bus), bus->number, |
39 | devfn, where, size, value); | ||
38 | } | 40 | } |
39 | 41 | ||
40 | struct pci_ops pci_root_ops = { | 42 | struct pci_ops pci_root_ops = { |
@@ -287,6 +289,16 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = { | |||
287 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), | 289 | DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), |
288 | }, | 290 | }, |
289 | }, | 291 | }, |
292 | #ifdef __i386__ | ||
293 | { | ||
294 | .callback = assign_all_busses, | ||
295 | .ident = "Compaq EVO N800c", | ||
296 | .matches = { | ||
297 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | ||
298 | DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), | ||
299 | }, | ||
300 | }, | ||
301 | #endif | ||
290 | {} | 302 | {} |
291 | }; | 303 | }; |
292 | 304 | ||
@@ -426,6 +438,9 @@ char * __devinit pcibios_setup(char *str) | |||
426 | } else if (!strcmp(str, "assign-busses")) { | 438 | } else if (!strcmp(str, "assign-busses")) { |
427 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; | 439 | pci_probe |= PCI_ASSIGN_ALL_BUSSES; |
428 | return NULL; | 440 | return NULL; |
441 | } else if (!strcmp(str, "use_crs")) { | ||
442 | pci_probe |= PCI_USE__CRS; | ||
443 | return NULL; | ||
429 | } else if (!strcmp(str, "routeirq")) { | 444 | } else if (!strcmp(str, "routeirq")) { |
430 | pci_routeirq = 1; | 445 | pci_routeirq = 1; |
431 | return NULL; | 446 | return NULL; |
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index c82cbf4c7226..6cff66dd0c91 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c | |||
@@ -353,6 +353,53 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev) | |||
353 | } | 353 | } |
354 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); | 354 | DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); |
355 | 355 | ||
356 | |||
357 | static struct dmi_system_id __devinitdata msi_k8t_dmi_table[] = { | ||
358 | { | ||
359 | .ident = "MSI-K8T-Neo2Fir", | ||
360 | .matches = { | ||
361 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), | ||
362 | DMI_MATCH(DMI_PRODUCT_NAME, "MS-6702E"), | ||
363 | }, | ||
364 | }, | ||
365 | {} | ||
366 | }; | ||
367 | |||
368 | /* | ||
369 | * The AMD-Athlon64 board MSI "K8T Neo2-FIR" disables the onboard sound | ||
370 | * card if a PCI-soundcard is added. | ||
371 | * | ||
372 | * The BIOS only gives options "DISABLED" and "AUTO". This code sets | ||
373 | * the corresponding register-value to enable the soundcard. | ||
374 | * | ||
375 | * The soundcard is only enabled, if the mainborad is identified | ||
376 | * via DMI-tables and the soundcard is detected to be off. | ||
377 | */ | ||
378 | static void __devinit pci_fixup_msi_k8t_onboard_sound(struct pci_dev *dev) | ||
379 | { | ||
380 | unsigned char val; | ||
381 | if (!dmi_check_system(msi_k8t_dmi_table)) | ||
382 | return; /* only applies to MSI K8T Neo2-FIR */ | ||
383 | |||
384 | pci_read_config_byte(dev, 0x50, &val); | ||
385 | if (val & 0x40) { | ||
386 | pci_write_config_byte(dev, 0x50, val & (~0x40)); | ||
387 | |||
388 | /* verify the change for status output */ | ||
389 | pci_read_config_byte(dev, 0x50, &val); | ||
390 | if (val & 0x40) | ||
391 | printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, " | ||
392 | "can't enable onboard soundcard!\n"); | ||
393 | else | ||
394 | printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, " | ||
395 | "enabled onboard soundcard.\n"); | ||
396 | } | ||
397 | } | ||
398 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, | ||
399 | pci_fixup_msi_k8t_onboard_sound); | ||
400 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, | ||
401 | pci_fixup_msi_k8t_onboard_sound); | ||
402 | |||
356 | /* | 403 | /* |
357 | * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. | 404 | * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A. |
358 | * | 405 | * |
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index bcd2f94b732c..42ba0e2da1a0 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c | |||
@@ -33,6 +33,15 @@ | |||
33 | 33 | ||
34 | #include "pci.h" | 34 | #include "pci.h" |
35 | 35 | ||
36 | static int | ||
37 | skip_isa_ioresource_align(struct pci_dev *dev) { | ||
38 | |||
39 | if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) && | ||
40 | !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA)) | ||
41 | return 1; | ||
42 | return 0; | ||
43 | } | ||
44 | |||
36 | /* | 45 | /* |
37 | * We need to avoid collisions with `mirrored' VGA ports | 46 | * We need to avoid collisions with `mirrored' VGA ports |
38 | * and other strange ISA hardware, so we always want the | 47 | * and other strange ISA hardware, so we always want the |
@@ -50,9 +59,13 @@ void | |||
50 | pcibios_align_resource(void *data, struct resource *res, | 59 | pcibios_align_resource(void *data, struct resource *res, |
51 | resource_size_t size, resource_size_t align) | 60 | resource_size_t size, resource_size_t align) |
52 | { | 61 | { |
62 | struct pci_dev *dev = data; | ||
63 | |||
53 | if (res->flags & IORESOURCE_IO) { | 64 | if (res->flags & IORESOURCE_IO) { |
54 | resource_size_t start = res->start; | 65 | resource_size_t start = res->start; |
55 | 66 | ||
67 | if (skip_isa_ioresource_align(dev)) | ||
68 | return; | ||
56 | if (start & 0x300) { | 69 | if (start & 0x300) { |
57 | start = (start + 0x3ff) & ~0x3ff; | 70 | start = (start + 0x3ff) & ~0x3ff; |
58 | res->start = start; | 71 | res->start = start; |
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index d98c6b096f8e..c52150fdf82b 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c | |||
@@ -492,6 +492,26 @@ static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq | |||
492 | return 1; | 492 | return 1; |
493 | } | 493 | } |
494 | 494 | ||
495 | /* | ||
496 | * PicoPower PT86C523 | ||
497 | */ | ||
498 | static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq) | ||
499 | { | ||
500 | outb(0x10 + ((pirq - 1) >> 1), 0x24); | ||
501 | return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf); | ||
502 | } | ||
503 | |||
504 | static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq, | ||
505 | int irq) | ||
506 | { | ||
507 | unsigned int x; | ||
508 | outb(0x10 + ((pirq - 1) >> 1), 0x24); | ||
509 | x = inb(0x26); | ||
510 | x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq)); | ||
511 | outb(x, 0x26); | ||
512 | return 1; | ||
513 | } | ||
514 | |||
495 | #ifdef CONFIG_PCI_BIOS | 515 | #ifdef CONFIG_PCI_BIOS |
496 | 516 | ||
497 | static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) | 517 | static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) |
@@ -721,6 +741,24 @@ static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, | |||
721 | return 1; | 741 | return 1; |
722 | } | 742 | } |
723 | 743 | ||
744 | static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) | ||
745 | { | ||
746 | switch (device) { | ||
747 | case PCI_DEVICE_ID_PICOPOWER_PT86C523: | ||
748 | r->name = "PicoPower PT86C523"; | ||
749 | r->get = pirq_pico_get; | ||
750 | r->set = pirq_pico_set; | ||
751 | return 1; | ||
752 | |||
753 | case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP: | ||
754 | r->name = "PicoPower PT86C523 rev. BB+"; | ||
755 | r->get = pirq_pico_get; | ||
756 | r->set = pirq_pico_set; | ||
757 | return 1; | ||
758 | } | ||
759 | return 0; | ||
760 | } | ||
761 | |||
724 | static __initdata struct irq_router_handler pirq_routers[] = { | 762 | static __initdata struct irq_router_handler pirq_routers[] = { |
725 | { PCI_VENDOR_ID_INTEL, intel_router_probe }, | 763 | { PCI_VENDOR_ID_INTEL, intel_router_probe }, |
726 | { PCI_VENDOR_ID_AL, ali_router_probe }, | 764 | { PCI_VENDOR_ID_AL, ali_router_probe }, |
@@ -732,6 +770,7 @@ static __initdata struct irq_router_handler pirq_routers[] = { | |||
732 | { PCI_VENDOR_ID_VLSI, vlsi_router_probe }, | 770 | { PCI_VENDOR_ID_VLSI, vlsi_router_probe }, |
733 | { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe }, | 771 | { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe }, |
734 | { PCI_VENDOR_ID_AMD, amd_router_probe }, | 772 | { PCI_VENDOR_ID_AMD, amd_router_probe }, |
773 | { PCI_VENDOR_ID_PICOPOWER, pico_router_probe }, | ||
735 | /* Someone with docs needs to add the ATI Radeon IGP */ | 774 | /* Someone with docs needs to add the ATI Radeon IGP */ |
736 | { 0, NULL } | 775 | { 0, NULL } |
737 | }; | 776 | }; |
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h index 8c66f275756f..ac56d3916c50 100644 --- a/arch/x86/pci/pci.h +++ b/arch/x86/pci/pci.h | |||
@@ -26,6 +26,8 @@ | |||
26 | #define PCI_ASSIGN_ROMS 0x1000 | 26 | #define PCI_ASSIGN_ROMS 0x1000 |
27 | #define PCI_BIOS_IRQ_SCAN 0x2000 | 27 | #define PCI_BIOS_IRQ_SCAN 0x2000 |
28 | #define PCI_ASSIGN_ALL_BUSSES 0x4000 | 28 | #define PCI_ASSIGN_ALL_BUSSES 0x4000 |
29 | #define PCI_CAN_SKIP_ISA_ALIGN 0x8000 | ||
30 | #define PCI_USE__CRS 0x10000 | ||
29 | 31 | ||
30 | extern unsigned int pci_probe; | 32 | extern unsigned int pci_probe; |
31 | extern unsigned long pirq_table_addr; | 33 | extern unsigned long pirq_table_addr; |
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig index eb80f5aca54e..cf013cb85ea4 100644 --- a/arch/x86_64/Kconfig +++ b/arch/x86_64/Kconfig | |||
@@ -738,6 +738,11 @@ config PCI_MMCONFIG | |||
738 | bool "Support mmconfig PCI config space access" | 738 | bool "Support mmconfig PCI config space access" |
739 | depends on PCI && ACPI | 739 | depends on PCI && ACPI |
740 | 740 | ||
741 | config PCI_DOMAINS | ||
742 | bool | ||
743 | depends on PCI | ||
744 | default y | ||
745 | |||
741 | source "drivers/pci/pcie/Kconfig" | 746 | source "drivers/pci/pcie/Kconfig" |
742 | 747 | ||
743 | source "drivers/pci/Kconfig" | 748 | source "drivers/pci/Kconfig" |
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 2305cc450a45..a96b739b2d35 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c | |||
@@ -549,7 +549,7 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) | |||
549 | * slot. */ | 549 | * slot. */ |
550 | bus->number = tbus; | 550 | bus->number = tbus; |
551 | pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), | 551 | pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), |
552 | PCI_REVISION_ID, &work); | 552 | PCI_CLASS_REVISION, &work); |
553 | 553 | ||
554 | if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { | 554 | if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { |
555 | pci_bus_read_config_dword(bus, | 555 | pci_bus_read_config_dword(bus, |
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c index 37d72f123a80..3ef0a4875a62 100644 --- a/drivers/pci/hotplug/cpqphp_ctrl.c +++ b/drivers/pci/hotplug/cpqphp_ctrl.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <linux/smp_lock.h> | 37 | #include <linux/smp_lock.h> |
38 | #include <linux/pci.h> | 38 | #include <linux/pci.h> |
39 | #include <linux/pci_hotplug.h> | 39 | #include <linux/pci_hotplug.h> |
40 | #include <linux/kthread.h> | ||
40 | #include "cpqphp.h" | 41 | #include "cpqphp.h" |
41 | 42 | ||
42 | static u32 configure_new_device(struct controller* ctrl, struct pci_func *func, | 43 | static u32 configure_new_device(struct controller* ctrl, struct pci_func *func, |
@@ -45,34 +46,20 @@ static int configure_new_function(struct controller* ctrl, struct pci_func *func | |||
45 | u8 behind_bridge, struct resource_lists *resources); | 46 | u8 behind_bridge, struct resource_lists *resources); |
46 | static void interrupt_event_handler(struct controller *ctrl); | 47 | static void interrupt_event_handler(struct controller *ctrl); |
47 | 48 | ||
48 | static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ | ||
49 | static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */ | ||
50 | static int event_finished; | ||
51 | static unsigned long pushbutton_pending; /* = 0 */ | ||
52 | 49 | ||
53 | /* things needed for the long_delay function */ | 50 | static struct task_struct *cpqhp_event_thread; |
54 | static struct semaphore delay_sem; | 51 | static unsigned long pushbutton_pending; /* = 0 */ |
55 | static wait_queue_head_t delay_wait; | ||
56 | 52 | ||
57 | /* delay is in jiffies to wait for */ | 53 | /* delay is in jiffies to wait for */ |
58 | static void long_delay(int delay) | 54 | static void long_delay(int delay) |
59 | { | 55 | { |
60 | DECLARE_WAITQUEUE(wait, current); | 56 | /* |
61 | 57 | * XXX(hch): if someone is bored please convert all callers | |
62 | /* only allow 1 customer into the delay queue at once | 58 | * to call msleep_interruptible directly. They really want |
63 | * yes this makes some people wait even longer, but who really cares? | 59 | * to specify timeouts in natural units and spend a lot of |
64 | * this is for _huge_ delays to make the hardware happy as the | 60 | * effort converting them to jiffies.. |
65 | * signals bounce around | ||
66 | */ | 61 | */ |
67 | down (&delay_sem); | ||
68 | |||
69 | init_waitqueue_head(&delay_wait); | ||
70 | |||
71 | add_wait_queue(&delay_wait, &wait); | ||
72 | msleep_interruptible(jiffies_to_msecs(delay)); | 62 | msleep_interruptible(jiffies_to_msecs(delay)); |
73 | remove_wait_queue(&delay_wait, &wait); | ||
74 | |||
75 | up(&delay_sem); | ||
76 | } | 63 | } |
77 | 64 | ||
78 | 65 | ||
@@ -955,8 +942,8 @@ irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data) | |||
955 | } | 942 | } |
956 | 943 | ||
957 | if (schedule_flag) { | 944 | if (schedule_flag) { |
958 | up(&event_semaphore); | 945 | wake_up_process(cpqhp_event_thread); |
959 | dbg("Signal event_semaphore\n"); | 946 | dbg("Waking even thread"); |
960 | } | 947 | } |
961 | return IRQ_HANDLED; | 948 | return IRQ_HANDLED; |
962 | } | 949 | } |
@@ -973,16 +960,13 @@ struct pci_func *cpqhp_slot_create(u8 busnumber) | |||
973 | struct pci_func *new_slot; | 960 | struct pci_func *new_slot; |
974 | struct pci_func *next; | 961 | struct pci_func *next; |
975 | 962 | ||
976 | new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL); | 963 | new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL); |
977 | |||
978 | if (new_slot == NULL) { | 964 | if (new_slot == NULL) { |
979 | /* I'm not dead yet! | 965 | /* I'm not dead yet! |
980 | * You will be. */ | 966 | * You will be. */ |
981 | return new_slot; | 967 | return new_slot; |
982 | } | 968 | } |
983 | 969 | ||
984 | memset(new_slot, 0, sizeof(struct pci_func)); | ||
985 | |||
986 | new_slot->next = NULL; | 970 | new_slot->next = NULL; |
987 | new_slot->configured = 1; | 971 | new_slot->configured = 1; |
988 | 972 | ||
@@ -1738,7 +1722,7 @@ static u32 remove_board(struct pci_func * func, u32 replace_flag, struct control | |||
1738 | static void pushbutton_helper_thread(unsigned long data) | 1722 | static void pushbutton_helper_thread(unsigned long data) |
1739 | { | 1723 | { |
1740 | pushbutton_pending = data; | 1724 | pushbutton_pending = data; |
1741 | up(&event_semaphore); | 1725 | wake_up_process(cpqhp_event_thread); |
1742 | } | 1726 | } |
1743 | 1727 | ||
1744 | 1728 | ||
@@ -1747,13 +1731,13 @@ static int event_thread(void* data) | |||
1747 | { | 1731 | { |
1748 | struct controller *ctrl; | 1732 | struct controller *ctrl; |
1749 | 1733 | ||
1750 | daemonize("phpd_event"); | ||
1751 | |||
1752 | while (1) { | 1734 | while (1) { |
1753 | dbg("!!!!event_thread sleeping\n"); | 1735 | dbg("!!!!event_thread sleeping\n"); |
1754 | down_interruptible (&event_semaphore); | 1736 | set_current_state(TASK_INTERRUPTIBLE); |
1755 | dbg("event_thread woken finished = %d\n", event_finished); | 1737 | schedule(); |
1756 | if (event_finished) break; | 1738 | |
1739 | if (kthread_should_stop()) | ||
1740 | break; | ||
1757 | /* Do stuff here */ | 1741 | /* Do stuff here */ |
1758 | if (pushbutton_pending) | 1742 | if (pushbutton_pending) |
1759 | cpqhp_pushbutton_thread(pushbutton_pending); | 1743 | cpqhp_pushbutton_thread(pushbutton_pending); |
@@ -1762,38 +1746,24 @@ static int event_thread(void* data) | |||
1762 | interrupt_event_handler(ctrl); | 1746 | interrupt_event_handler(ctrl); |
1763 | } | 1747 | } |
1764 | dbg("event_thread signals exit\n"); | 1748 | dbg("event_thread signals exit\n"); |
1765 | up(&event_exit); | ||
1766 | return 0; | 1749 | return 0; |
1767 | } | 1750 | } |
1768 | 1751 | ||
1769 | |||
1770 | int cpqhp_event_start_thread(void) | 1752 | int cpqhp_event_start_thread(void) |
1771 | { | 1753 | { |
1772 | int pid; | 1754 | cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event"); |
1773 | 1755 | if (IS_ERR(cpqhp_event_thread)) { | |
1774 | /* initialize our semaphores */ | ||
1775 | init_MUTEX(&delay_sem); | ||
1776 | init_MUTEX_LOCKED(&event_semaphore); | ||
1777 | init_MUTEX_LOCKED(&event_exit); | ||
1778 | event_finished=0; | ||
1779 | |||
1780 | pid = kernel_thread(event_thread, NULL, 0); | ||
1781 | if (pid < 0) { | ||
1782 | err ("Can't start up our event thread\n"); | 1756 | err ("Can't start up our event thread\n"); |
1783 | return -1; | 1757 | return PTR_ERR(cpqhp_event_thread); |
1784 | } | 1758 | } |
1785 | dbg("Our event thread pid = %d\n", pid); | 1759 | |
1786 | return 0; | 1760 | return 0; |
1787 | } | 1761 | } |
1788 | 1762 | ||
1789 | 1763 | ||
1790 | void cpqhp_event_stop_thread(void) | 1764 | void cpqhp_event_stop_thread(void) |
1791 | { | 1765 | { |
1792 | event_finished = 1; | 1766 | kthread_stop(cpqhp_event_thread); |
1793 | dbg("event_thread finish command given\n"); | ||
1794 | up(&event_semaphore); | ||
1795 | dbg("wait for event_thread to exit\n"); | ||
1796 | down(&event_exit); | ||
1797 | } | 1767 | } |
1798 | 1768 | ||
1799 | 1769 | ||
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c index d06ccb69e411..c31e7bf34502 100644 --- a/drivers/pci/hotplug/ibmphp_hpc.c +++ b/drivers/pci/hotplug/ibmphp_hpc.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | #include <linux/mutex.h> | 36 | #include <linux/mutex.h> |
37 | #include <linux/sched.h> | 37 | #include <linux/sched.h> |
38 | 38 | #include <linux/kthread.h> | |
39 | #include "ibmphp.h" | 39 | #include "ibmphp.h" |
40 | 40 | ||
41 | static int to_debug = 0; | 41 | static int to_debug = 0; |
@@ -101,12 +101,11 @@ static int to_debug = 0; | |||
101 | //---------------------------------------------------------------------------- | 101 | //---------------------------------------------------------------------------- |
102 | // global variables | 102 | // global variables |
103 | //---------------------------------------------------------------------------- | 103 | //---------------------------------------------------------------------------- |
104 | static int ibmphp_shutdown; | ||
105 | static int tid_poll; | ||
106 | static struct mutex sem_hpcaccess; // lock access to HPC | 104 | static struct mutex sem_hpcaccess; // lock access to HPC |
107 | static struct semaphore semOperations; // lock all operations and | 105 | static struct semaphore semOperations; // lock all operations and |
108 | // access to data structures | 106 | // access to data structures |
109 | static struct semaphore sem_exit; // make sure polling thread goes away | 107 | static struct semaphore sem_exit; // make sure polling thread goes away |
108 | static struct task_struct *ibmphp_poll_thread; | ||
110 | //---------------------------------------------------------------------------- | 109 | //---------------------------------------------------------------------------- |
111 | // local function prototypes | 110 | // local function prototypes |
112 | //---------------------------------------------------------------------------- | 111 | //---------------------------------------------------------------------------- |
@@ -116,10 +115,9 @@ static u8 hpc_writecmdtoindex (u8, u8); | |||
116 | static u8 hpc_readcmdtoindex (u8, u8); | 115 | static u8 hpc_readcmdtoindex (u8, u8); |
117 | static void get_hpc_access (void); | 116 | static void get_hpc_access (void); |
118 | static void free_hpc_access (void); | 117 | static void free_hpc_access (void); |
119 | static void poll_hpc (void); | 118 | static int poll_hpc(void *data); |
120 | static int process_changeinstatus (struct slot *, struct slot *); | 119 | static int process_changeinstatus (struct slot *, struct slot *); |
121 | static int process_changeinlatch (u8, u8, struct controller *); | 120 | static int process_changeinlatch (u8, u8, struct controller *); |
122 | static int hpc_poll_thread (void *); | ||
123 | static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); | 121 | static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); |
124 | //---------------------------------------------------------------------------- | 122 | //---------------------------------------------------------------------------- |
125 | 123 | ||
@@ -137,8 +135,6 @@ void __init ibmphp_hpc_initvars (void) | |||
137 | init_MUTEX (&semOperations); | 135 | init_MUTEX (&semOperations); |
138 | init_MUTEX_LOCKED (&sem_exit); | 136 | init_MUTEX_LOCKED (&sem_exit); |
139 | to_debug = 0; | 137 | to_debug = 0; |
140 | ibmphp_shutdown = 0; | ||
141 | tid_poll = 0; | ||
142 | 138 | ||
143 | debug ("%s - Exit\n", __FUNCTION__); | 139 | debug ("%s - Exit\n", __FUNCTION__); |
144 | } | 140 | } |
@@ -819,7 +815,7 @@ void ibmphp_unlock_operations (void) | |||
819 | #define POLL_LATCH_REGISTER 0 | 815 | #define POLL_LATCH_REGISTER 0 |
820 | #define POLL_SLOTS 1 | 816 | #define POLL_SLOTS 1 |
821 | #define POLL_SLEEP 2 | 817 | #define POLL_SLEEP 2 |
822 | static void poll_hpc (void) | 818 | static int poll_hpc(void *data) |
823 | { | 819 | { |
824 | struct slot myslot; | 820 | struct slot myslot; |
825 | struct slot *pslot = NULL; | 821 | struct slot *pslot = NULL; |
@@ -833,10 +829,7 @@ static void poll_hpc (void) | |||
833 | 829 | ||
834 | debug ("%s - Entry\n", __FUNCTION__); | 830 | debug ("%s - Entry\n", __FUNCTION__); |
835 | 831 | ||
836 | while (!ibmphp_shutdown) { | 832 | while (!kthread_should_stop()) { |
837 | if (ibmphp_shutdown) | ||
838 | break; | ||
839 | |||
840 | /* try to get the lock to do some kind of hardware access */ | 833 | /* try to get the lock to do some kind of hardware access */ |
841 | down (&semOperations); | 834 | down (&semOperations); |
842 | 835 | ||
@@ -896,7 +889,7 @@ static void poll_hpc (void) | |||
896 | up (&semOperations); | 889 | up (&semOperations); |
897 | msleep(POLL_INTERVAL_SEC * 1000); | 890 | msleep(POLL_INTERVAL_SEC * 1000); |
898 | 891 | ||
899 | if (ibmphp_shutdown) | 892 | if (kthread_should_stop()) |
900 | break; | 893 | break; |
901 | 894 | ||
902 | down (&semOperations); | 895 | down (&semOperations); |
@@ -915,6 +908,7 @@ static void poll_hpc (void) | |||
915 | } | 908 | } |
916 | up (&sem_exit); | 909 | up (&sem_exit); |
917 | debug ("%s - Exit\n", __FUNCTION__); | 910 | debug ("%s - Exit\n", __FUNCTION__); |
911 | return 0; | ||
918 | } | 912 | } |
919 | 913 | ||
920 | 914 | ||
@@ -1050,47 +1044,20 @@ static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl) | |||
1050 | } | 1044 | } |
1051 | 1045 | ||
1052 | /*---------------------------------------------------------------------- | 1046 | /*---------------------------------------------------------------------- |
1053 | * Name: hpc_poll_thread | ||
1054 | * | ||
1055 | * Action: polling | ||
1056 | * | ||
1057 | * Return 0 | ||
1058 | * Value: | ||
1059 | *---------------------------------------------------------------------*/ | ||
1060 | static int hpc_poll_thread (void *data) | ||
1061 | { | ||
1062 | debug ("%s - Entry\n", __FUNCTION__); | ||
1063 | |||
1064 | daemonize("hpc_poll"); | ||
1065 | allow_signal(SIGKILL); | ||
1066 | |||
1067 | poll_hpc (); | ||
1068 | |||
1069 | tid_poll = 0; | ||
1070 | debug ("%s - Exit\n", __FUNCTION__); | ||
1071 | return 0; | ||
1072 | } | ||
1073 | |||
1074 | |||
1075 | /*---------------------------------------------------------------------- | ||
1076 | * Name: ibmphp_hpc_start_poll_thread | 1047 | * Name: ibmphp_hpc_start_poll_thread |
1077 | * | 1048 | * |
1078 | * Action: start polling thread | 1049 | * Action: start polling thread |
1079 | *---------------------------------------------------------------------*/ | 1050 | *---------------------------------------------------------------------*/ |
1080 | int __init ibmphp_hpc_start_poll_thread (void) | 1051 | int __init ibmphp_hpc_start_poll_thread (void) |
1081 | { | 1052 | { |
1082 | int rc = 0; | ||
1083 | |||
1084 | debug ("%s - Entry\n", __FUNCTION__); | 1053 | debug ("%s - Entry\n", __FUNCTION__); |
1085 | 1054 | ||
1086 | tid_poll = kernel_thread (hpc_poll_thread, NULL, 0); | 1055 | ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll"); |
1087 | if (tid_poll < 0) { | 1056 | if (IS_ERR(ibmphp_poll_thread)) { |
1088 | err ("%s - Error, thread not started\n", __FUNCTION__); | 1057 | err ("%s - Error, thread not started\n", __FUNCTION__); |
1089 | rc = -1; | 1058 | return PTR_ERR(ibmphp_poll_thread); |
1090 | } | 1059 | } |
1091 | 1060 | return 0; | |
1092 | debug ("%s - Exit tid_poll[%d] rc[%d]\n", __FUNCTION__, tid_poll, rc); | ||
1093 | return rc; | ||
1094 | } | 1061 | } |
1095 | 1062 | ||
1096 | /*---------------------------------------------------------------------- | 1063 | /*---------------------------------------------------------------------- |
@@ -1102,7 +1069,7 @@ void __exit ibmphp_hpc_stop_poll_thread (void) | |||
1102 | { | 1069 | { |
1103 | debug ("%s - Entry\n", __FUNCTION__); | 1070 | debug ("%s - Entry\n", __FUNCTION__); |
1104 | 1071 | ||
1105 | ibmphp_shutdown = 1; | 1072 | kthread_stop(ibmphp_poll_thread); |
1106 | debug ("before locking operations \n"); | 1073 | debug ("before locking operations \n"); |
1107 | ibmphp_lock_operations (); | 1074 | ibmphp_lock_operations (); |
1108 | debug ("after locking operations \n"); | 1075 | debug ("after locking operations \n"); |
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index e5d3f0b4f45a..6462ac3b405f 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c | |||
@@ -304,8 +304,8 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status) | |||
304 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 304 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
305 | 305 | ||
306 | hotplug_slot->info->attention_status = status; | 306 | hotplug_slot->info->attention_status = status; |
307 | 307 | ||
308 | if (ATTN_LED(slot->ctrl->ctrlcap)) | 308 | if (ATTN_LED(slot->ctrl->ctrlcap)) |
309 | slot->hpc_ops->set_attention_status(slot, status); | 309 | slot->hpc_ops->set_attention_status(slot, status); |
310 | 310 | ||
311 | return 0; | 311 | return 0; |
@@ -405,7 +405,7 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe | |||
405 | int retval; | 405 | int retval; |
406 | 406 | ||
407 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 407 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
408 | 408 | ||
409 | retval = slot->hpc_ops->get_max_bus_speed(slot, value); | 409 | retval = slot->hpc_ops->get_max_bus_speed(slot, value); |
410 | if (retval < 0) | 410 | if (retval < 0) |
411 | *value = PCI_SPEED_UNKNOWN; | 411 | *value = PCI_SPEED_UNKNOWN; |
@@ -419,7 +419,7 @@ static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe | |||
419 | int retval; | 419 | int retval; |
420 | 420 | ||
421 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 421 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
422 | 422 | ||
423 | retval = slot->hpc_ops->get_cur_bus_speed(slot, value); | 423 | retval = slot->hpc_ops->get_cur_bus_speed(slot, value); |
424 | if (retval < 0) | 424 | if (retval < 0) |
425 | *value = PCI_SPEED_UNKNOWN; | 425 | *value = PCI_SPEED_UNKNOWN; |
@@ -434,7 +434,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_ | |||
434 | struct slot *t_slot; | 434 | struct slot *t_slot; |
435 | u8 value; | 435 | u8 value; |
436 | struct pci_dev *pdev; | 436 | struct pci_dev *pdev; |
437 | 437 | ||
438 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | 438 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
439 | if (!ctrl) { | 439 | if (!ctrl) { |
440 | err("%s : out of memory\n", __FUNCTION__); | 440 | err("%s : out of memory\n", __FUNCTION__); |
@@ -502,23 +502,23 @@ static void pciehp_remove (struct pcie_device *dev) | |||
502 | #ifdef CONFIG_PM | 502 | #ifdef CONFIG_PM |
503 | static int pciehp_suspend (struct pcie_device *dev, pm_message_t state) | 503 | static int pciehp_suspend (struct pcie_device *dev, pm_message_t state) |
504 | { | 504 | { |
505 | printk("%s ENTRY\n", __FUNCTION__); | 505 | printk("%s ENTRY\n", __FUNCTION__); |
506 | return 0; | 506 | return 0; |
507 | } | 507 | } |
508 | 508 | ||
509 | static int pciehp_resume (struct pcie_device *dev) | 509 | static int pciehp_resume (struct pcie_device *dev) |
510 | { | 510 | { |
511 | printk("%s ENTRY\n", __FUNCTION__); | 511 | printk("%s ENTRY\n", __FUNCTION__); |
512 | return 0; | 512 | return 0; |
513 | } | 513 | } |
514 | #endif | 514 | #endif |
515 | 515 | ||
516 | static struct pcie_port_service_id port_pci_ids[] = { { | 516 | static struct pcie_port_service_id port_pci_ids[] = { { |
517 | .vendor = PCI_ANY_ID, | 517 | .vendor = PCI_ANY_ID, |
518 | .device = PCI_ANY_ID, | 518 | .device = PCI_ANY_ID, |
519 | .port_type = PCIE_ANY_PORT, | 519 | .port_type = PCIE_ANY_PORT, |
520 | .service_type = PCIE_PORT_SERVICE_HP, | 520 | .service_type = PCIE_PORT_SERVICE_HP, |
521 | .driver_data = 0, | 521 | .driver_data = 0, |
522 | }, { /* end: all zeroes */ } | 522 | }, { /* end: all zeroes */ } |
523 | }; | 523 | }; |
524 | static const char device_name[] = "hpdriver"; | 524 | static const char device_name[] = "hpdriver"; |
@@ -540,10 +540,6 @@ static int __init pcied_init(void) | |||
540 | { | 540 | { |
541 | int retval = 0; | 541 | int retval = 0; |
542 | 542 | ||
543 | #ifdef CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE | ||
544 | pciehp_poll_mode = 1; | ||
545 | #endif | ||
546 | |||
547 | retval = pcie_port_service_register(&hpdriver_portdrv); | 543 | retval = pcie_port_service_register(&hpdriver_portdrv); |
548 | dbg("pcie_port_service_register = %d\n", retval); | 544 | dbg("pcie_port_service_register = %d\n", retval); |
549 | info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); | 545 | info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); |
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 98e541ffef3d..c8cb49c5a752 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c | |||
@@ -173,7 +173,7 @@ u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl) | |||
173 | return 1; | 173 | return 1; |
174 | } | 174 | } |
175 | 175 | ||
176 | /* The following routines constitute the bulk of the | 176 | /* The following routines constitute the bulk of the |
177 | hotplug controller logic | 177 | hotplug controller logic |
178 | */ | 178 | */ |
179 | 179 | ||
@@ -181,7 +181,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) | |||
181 | { | 181 | { |
182 | /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ | 182 | /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ |
183 | if (POWER_CTRL(ctrl->ctrlcap)) { | 183 | if (POWER_CTRL(ctrl->ctrlcap)) { |
184 | if (pslot->hpc_ops->power_off_slot(pslot)) { | 184 | if (pslot->hpc_ops->power_off_slot(pslot)) { |
185 | err("%s: Issue of Slot Power Off command failed\n", | 185 | err("%s: Issue of Slot Power Off command failed\n", |
186 | __FUNCTION__); | 186 | __FUNCTION__); |
187 | return; | 187 | return; |
@@ -189,7 +189,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) | |||
189 | } | 189 | } |
190 | 190 | ||
191 | if (PWR_LED(ctrl->ctrlcap)) | 191 | if (PWR_LED(ctrl->ctrlcap)) |
192 | pslot->hpc_ops->green_led_off(pslot); | 192 | pslot->hpc_ops->green_led_off(pslot); |
193 | 193 | ||
194 | if (ATTN_LED(ctrl->ctrlcap)) { | 194 | if (ATTN_LED(ctrl->ctrlcap)) { |
195 | if (pslot->hpc_ops->set_attention_status(pslot, 1)) { | 195 | if (pslot->hpc_ops->set_attention_status(pslot, 1)) { |
@@ -231,7 +231,7 @@ static int board_added(struct slot *p_slot) | |||
231 | if (retval) | 231 | if (retval) |
232 | return retval; | 232 | return retval; |
233 | } | 233 | } |
234 | 234 | ||
235 | if (PWR_LED(ctrl->ctrlcap)) | 235 | if (PWR_LED(ctrl->ctrlcap)) |
236 | p_slot->hpc_ops->green_led_blink(p_slot); | 236 | p_slot->hpc_ops->green_led_blink(p_slot); |
237 | 237 | ||
@@ -548,7 +548,7 @@ int pciehp_enable_slot(struct slot *p_slot) | |||
548 | mutex_unlock(&p_slot->ctrl->crit_sect); | 548 | mutex_unlock(&p_slot->ctrl->crit_sect); |
549 | return -ENODEV; | 549 | return -ENODEV; |
550 | } | 550 | } |
551 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { | 551 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { |
552 | rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); | 552 | rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); |
553 | if (rc || getstatus) { | 553 | if (rc || getstatus) { |
554 | info("%s: latch open on slot(%s)\n", __FUNCTION__, | 554 | info("%s: latch open on slot(%s)\n", __FUNCTION__, |
@@ -557,8 +557,8 @@ int pciehp_enable_slot(struct slot *p_slot) | |||
557 | return -ENODEV; | 557 | return -ENODEV; |
558 | } | 558 | } |
559 | } | 559 | } |
560 | 560 | ||
561 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { | 561 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { |
562 | rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); | 562 | rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); |
563 | if (rc || getstatus) { | 563 | if (rc || getstatus) { |
564 | info("%s: already enabled on slot(%s)\n", __FUNCTION__, | 564 | info("%s: already enabled on slot(%s)\n", __FUNCTION__, |
@@ -593,7 +593,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
593 | /* Check to see if (latch closed, card present, power on) */ | 593 | /* Check to see if (latch closed, card present, power on) */ |
594 | mutex_lock(&p_slot->ctrl->crit_sect); | 594 | mutex_lock(&p_slot->ctrl->crit_sect); |
595 | 595 | ||
596 | if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { | 596 | if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { |
597 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); | 597 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); |
598 | if (ret || !getstatus) { | 598 | if (ret || !getstatus) { |
599 | info("%s: no adapter on slot(%s)\n", __FUNCTION__, | 599 | info("%s: no adapter on slot(%s)\n", __FUNCTION__, |
@@ -603,7 +603,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
603 | } | 603 | } |
604 | } | 604 | } |
605 | 605 | ||
606 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { | 606 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { |
607 | ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); | 607 | ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); |
608 | if (ret || getstatus) { | 608 | if (ret || getstatus) { |
609 | info("%s: latch open on slot(%s)\n", __FUNCTION__, | 609 | info("%s: latch open on slot(%s)\n", __FUNCTION__, |
@@ -613,7 +613,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
613 | } | 613 | } |
614 | } | 614 | } |
615 | 615 | ||
616 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { | 616 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { |
617 | ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); | 617 | ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); |
618 | if (ret || !getstatus) { | 618 | if (ret || !getstatus) { |
619 | info("%s: already disabled slot(%s)\n", __FUNCTION__, | 619 | info("%s: already disabled slot(%s)\n", __FUNCTION__, |
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 016eea94a8a5..06d025b8b13f 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -39,37 +39,6 @@ | |||
39 | 39 | ||
40 | #include "../pci.h" | 40 | #include "../pci.h" |
41 | #include "pciehp.h" | 41 | #include "pciehp.h" |
42 | #ifdef DEBUG | ||
43 | #define DBG_K_TRACE_ENTRY ((unsigned int)0x00000001) /* On function entry */ | ||
44 | #define DBG_K_TRACE_EXIT ((unsigned int)0x00000002) /* On function exit */ | ||
45 | #define DBG_K_INFO ((unsigned int)0x00000004) /* Info messages */ | ||
46 | #define DBG_K_ERROR ((unsigned int)0x00000008) /* Error messages */ | ||
47 | #define DBG_K_TRACE (DBG_K_TRACE_ENTRY|DBG_K_TRACE_EXIT) | ||
48 | #define DBG_K_STANDARD (DBG_K_INFO|DBG_K_ERROR|DBG_K_TRACE) | ||
49 | /* Redefine this flagword to set debug level */ | ||
50 | #define DEBUG_LEVEL DBG_K_STANDARD | ||
51 | |||
52 | #define DEFINE_DBG_BUFFER char __dbg_str_buf[256]; | ||
53 | |||
54 | #define DBG_PRINT( dbg_flags, args... ) \ | ||
55 | do { \ | ||
56 | if ( DEBUG_LEVEL & ( dbg_flags ) ) \ | ||
57 | { \ | ||
58 | int len; \ | ||
59 | len = sprintf( __dbg_str_buf, "%s:%d: %s: ", \ | ||
60 | __FILE__, __LINE__, __FUNCTION__ ); \ | ||
61 | sprintf( __dbg_str_buf + len, args ); \ | ||
62 | printk( KERN_NOTICE "%s\n", __dbg_str_buf ); \ | ||
63 | } \ | ||
64 | } while (0) | ||
65 | |||
66 | #define DBG_ENTER_ROUTINE DBG_PRINT (DBG_K_TRACE_ENTRY, "%s", "[Entry]"); | ||
67 | #define DBG_LEAVE_ROUTINE DBG_PRINT (DBG_K_TRACE_EXIT, "%s", "[Exit]"); | ||
68 | #else | ||
69 | #define DEFINE_DBG_BUFFER | ||
70 | #define DBG_ENTER_ROUTINE | ||
71 | #define DBG_LEAVE_ROUTINE | ||
72 | #endif /* DEBUG */ | ||
73 | 42 | ||
74 | static atomic_t pciehp_num_controllers = ATOMIC_INIT(0); | 43 | static atomic_t pciehp_num_controllers = ATOMIC_INIT(0); |
75 | 44 | ||
@@ -160,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) | |||
160 | /* Link Width Encoding */ | 129 | /* Link Width Encoding */ |
161 | #define LNK_X1 0x01 | 130 | #define LNK_X1 0x01 |
162 | #define LNK_X2 0x02 | 131 | #define LNK_X2 0x02 |
163 | #define LNK_X4 0x04 | 132 | #define LNK_X4 0x04 |
164 | #define LNK_X8 0x08 | 133 | #define LNK_X8 0x08 |
165 | #define LNK_X12 0x0C | 134 | #define LNK_X12 0x0C |
166 | #define LNK_X16 0x10 | 135 | #define LNK_X16 0x10 |
167 | #define LNK_X32 0x20 | 136 | #define LNK_X32 0x20 |
168 | 137 | ||
169 | /*Field definitions of Link Status Register */ | 138 | /*Field definitions of Link Status Register */ |
@@ -221,8 +190,6 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) | |||
221 | #define EMI_STATE 0x0080 | 190 | #define EMI_STATE 0x0080 |
222 | #define EMI_STATUS_BIT 7 | 191 | #define EMI_STATUS_BIT 7 |
223 | 192 | ||
224 | DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ | ||
225 | |||
226 | static irqreturn_t pcie_isr(int irq, void *dev_id); | 193 | static irqreturn_t pcie_isr(int irq, void *dev_id); |
227 | static void start_int_poll_timer(struct controller *ctrl, int sec); | 194 | static void start_int_poll_timer(struct controller *ctrl, int sec); |
228 | 195 | ||
@@ -231,14 +198,12 @@ static void int_poll_timeout(unsigned long data) | |||
231 | { | 198 | { |
232 | struct controller *ctrl = (struct controller *)data; | 199 | struct controller *ctrl = (struct controller *)data; |
233 | 200 | ||
234 | DBG_ENTER_ROUTINE | ||
235 | |||
236 | /* Poll for interrupt events. regs == NULL => polling */ | 201 | /* Poll for interrupt events. regs == NULL => polling */ |
237 | pcie_isr(0, ctrl); | 202 | pcie_isr(0, ctrl); |
238 | 203 | ||
239 | init_timer(&ctrl->poll_timer); | 204 | init_timer(&ctrl->poll_timer); |
240 | if (!pciehp_poll_time) | 205 | if (!pciehp_poll_time) |
241 | pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/ | 206 | pciehp_poll_time = 2; /* default polling interval is 2 sec */ |
242 | 207 | ||
243 | start_int_poll_timer(ctrl, pciehp_poll_time); | 208 | start_int_poll_timer(ctrl, pciehp_poll_time); |
244 | } | 209 | } |
@@ -289,8 +254,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
289 | u16 slot_ctrl; | 254 | u16 slot_ctrl; |
290 | unsigned long flags; | 255 | unsigned long flags; |
291 | 256 | ||
292 | DBG_ENTER_ROUTINE | ||
293 | |||
294 | mutex_lock(&ctrl->ctrl_lock); | 257 | mutex_lock(&ctrl->ctrl_lock); |
295 | 258 | ||
296 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 259 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
@@ -299,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
299 | goto out; | 262 | goto out; |
300 | } | 263 | } |
301 | 264 | ||
302 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { | 265 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { |
303 | /* After 1 sec and CMD_COMPLETED still not set, just | 266 | /* After 1 sec and CMD_COMPLETED still not set, just |
304 | proceed forward to issue the next command according | 267 | proceed forward to issue the next command according |
305 | to spec. Just print out the error message */ | 268 | to spec. Just print out the error message */ |
@@ -332,7 +295,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
332 | retval = pcie_wait_cmd(ctrl); | 295 | retval = pcie_wait_cmd(ctrl); |
333 | out: | 296 | out: |
334 | mutex_unlock(&ctrl->ctrl_lock); | 297 | mutex_unlock(&ctrl->ctrl_lock); |
335 | DBG_LEAVE_ROUTINE | ||
336 | return retval; | 298 | return retval; |
337 | } | 299 | } |
338 | 300 | ||
@@ -341,8 +303,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) | |||
341 | u16 lnk_status; | 303 | u16 lnk_status; |
342 | int retval = 0; | 304 | int retval = 0; |
343 | 305 | ||
344 | DBG_ENTER_ROUTINE | ||
345 | |||
346 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 306 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
347 | if (retval) { | 307 | if (retval) { |
348 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 308 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
@@ -350,26 +310,22 @@ static int hpc_check_lnk_status(struct controller *ctrl) | |||
350 | } | 310 | } |
351 | 311 | ||
352 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); | 312 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); |
353 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || | 313 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || |
354 | !(lnk_status & NEG_LINK_WD)) { | 314 | !(lnk_status & NEG_LINK_WD)) { |
355 | err("%s : Link Training Error occurs \n", __FUNCTION__); | 315 | err("%s : Link Training Error occurs \n", __FUNCTION__); |
356 | retval = -1; | 316 | retval = -1; |
357 | return retval; | 317 | return retval; |
358 | } | 318 | } |
359 | 319 | ||
360 | DBG_LEAVE_ROUTINE | ||
361 | return retval; | 320 | return retval; |
362 | } | 321 | } |
363 | 322 | ||
364 | |||
365 | static int hpc_get_attention_status(struct slot *slot, u8 *status) | 323 | static int hpc_get_attention_status(struct slot *slot, u8 *status) |
366 | { | 324 | { |
367 | struct controller *ctrl = slot->ctrl; | 325 | struct controller *ctrl = slot->ctrl; |
368 | u16 slot_ctrl; | 326 | u16 slot_ctrl; |
369 | u8 atten_led_state; | 327 | u8 atten_led_state; |
370 | int retval = 0; | 328 | int retval = 0; |
371 | |||
372 | DBG_ENTER_ROUTINE | ||
373 | 329 | ||
374 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); | 330 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); |
375 | if (retval) { | 331 | if (retval) { |
@@ -400,7 +356,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) | |||
400 | break; | 356 | break; |
401 | } | 357 | } |
402 | 358 | ||
403 | DBG_LEAVE_ROUTINE | ||
404 | return 0; | 359 | return 0; |
405 | } | 360 | } |
406 | 361 | ||
@@ -410,8 +365,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) | |||
410 | u16 slot_ctrl; | 365 | u16 slot_ctrl; |
411 | u8 pwr_state; | 366 | u8 pwr_state; |
412 | int retval = 0; | 367 | int retval = 0; |
413 | |||
414 | DBG_ENTER_ROUTINE | ||
415 | 368 | ||
416 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); | 369 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); |
417 | if (retval) { | 370 | if (retval) { |
@@ -428,35 +381,30 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) | |||
428 | *status = 1; | 381 | *status = 1; |
429 | break; | 382 | break; |
430 | case 1: | 383 | case 1: |
431 | *status = 0; | 384 | *status = 0; |
432 | break; | 385 | break; |
433 | default: | 386 | default: |
434 | *status = 0xFF; | 387 | *status = 0xFF; |
435 | break; | 388 | break; |
436 | } | 389 | } |
437 | 390 | ||
438 | DBG_LEAVE_ROUTINE | ||
439 | return retval; | 391 | return retval; |
440 | } | 392 | } |
441 | 393 | ||
442 | |||
443 | static int hpc_get_latch_status(struct slot *slot, u8 *status) | 394 | static int hpc_get_latch_status(struct slot *slot, u8 *status) |
444 | { | 395 | { |
445 | struct controller *ctrl = slot->ctrl; | 396 | struct controller *ctrl = slot->ctrl; |
446 | u16 slot_status; | 397 | u16 slot_status; |
447 | int retval = 0; | 398 | int retval = 0; |
448 | 399 | ||
449 | DBG_ENTER_ROUTINE | ||
450 | |||
451 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 400 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
452 | if (retval) { | 401 | if (retval) { |
453 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 402 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
454 | return retval; | 403 | return retval; |
455 | } | 404 | } |
456 | 405 | ||
457 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; | 406 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; |
458 | 407 | ||
459 | DBG_LEAVE_ROUTINE | ||
460 | return 0; | 408 | return 0; |
461 | } | 409 | } |
462 | 410 | ||
@@ -467,8 +415,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
467 | u8 card_state; | 415 | u8 card_state; |
468 | int retval = 0; | 416 | int retval = 0; |
469 | 417 | ||
470 | DBG_ENTER_ROUTINE | ||
471 | |||
472 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 418 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
473 | if (retval) { | 419 | if (retval) { |
474 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 420 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
@@ -477,7 +423,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
477 | card_state = (u8)((slot_status & PRSN_STATE) >> 6); | 423 | card_state = (u8)((slot_status & PRSN_STATE) >> 6); |
478 | *status = (card_state == 1) ? 1 : 0; | 424 | *status = (card_state == 1) ? 1 : 0; |
479 | 425 | ||
480 | DBG_LEAVE_ROUTINE | ||
481 | return 0; | 426 | return 0; |
482 | } | 427 | } |
483 | 428 | ||
@@ -488,16 +433,13 @@ static int hpc_query_power_fault(struct slot *slot) | |||
488 | u8 pwr_fault; | 433 | u8 pwr_fault; |
489 | int retval = 0; | 434 | int retval = 0; |
490 | 435 | ||
491 | DBG_ENTER_ROUTINE | ||
492 | |||
493 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 436 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
494 | if (retval) { | 437 | if (retval) { |
495 | err("%s: Cannot check for power fault\n", __FUNCTION__); | 438 | err("%s: Cannot check for power fault\n", __FUNCTION__); |
496 | return retval; | 439 | return retval; |
497 | } | 440 | } |
498 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); | 441 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); |
499 | 442 | ||
500 | DBG_LEAVE_ROUTINE | ||
501 | return pwr_fault; | 443 | return pwr_fault; |
502 | } | 444 | } |
503 | 445 | ||
@@ -507,8 +449,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) | |||
507 | u16 slot_status; | 449 | u16 slot_status; |
508 | int retval = 0; | 450 | int retval = 0; |
509 | 451 | ||
510 | DBG_ENTER_ROUTINE | ||
511 | |||
512 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 452 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
513 | if (retval) { | 453 | if (retval) { |
514 | err("%s : Cannot check EMI status\n", __FUNCTION__); | 454 | err("%s : Cannot check EMI status\n", __FUNCTION__); |
@@ -516,7 +456,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) | |||
516 | } | 456 | } |
517 | *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT; | 457 | *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT; |
518 | 458 | ||
519 | DBG_LEAVE_ROUTINE | ||
520 | return retval; | 459 | return retval; |
521 | } | 460 | } |
522 | 461 | ||
@@ -526,8 +465,6 @@ static int hpc_toggle_emi(struct slot *slot) | |||
526 | u16 cmd_mask; | 465 | u16 cmd_mask; |
527 | int rc; | 466 | int rc; |
528 | 467 | ||
529 | DBG_ENTER_ROUTINE | ||
530 | |||
531 | slot_cmd = EMI_CTRL; | 468 | slot_cmd = EMI_CTRL; |
532 | cmd_mask = EMI_CTRL; | 469 | cmd_mask = EMI_CTRL; |
533 | if (!pciehp_poll_mode) { | 470 | if (!pciehp_poll_mode) { |
@@ -537,7 +474,7 @@ static int hpc_toggle_emi(struct slot *slot) | |||
537 | 474 | ||
538 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); | 475 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); |
539 | slot->last_emi_toggle = get_seconds(); | 476 | slot->last_emi_toggle = get_seconds(); |
540 | DBG_LEAVE_ROUTINE | 477 | |
541 | return rc; | 478 | return rc; |
542 | } | 479 | } |
543 | 480 | ||
@@ -548,8 +485,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
548 | u16 cmd_mask; | 485 | u16 cmd_mask; |
549 | int rc; | 486 | int rc; |
550 | 487 | ||
551 | DBG_ENTER_ROUTINE | ||
552 | |||
553 | cmd_mask = ATTN_LED_CTRL; | 488 | cmd_mask = ATTN_LED_CTRL; |
554 | switch (value) { | 489 | switch (value) { |
555 | case 0 : /* turn off */ | 490 | case 0 : /* turn off */ |
@@ -572,19 +507,15 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
572 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); | 507 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); |
573 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 508 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
574 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 509 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
575 | 510 | ||
576 | DBG_LEAVE_ROUTINE | ||
577 | return rc; | 511 | return rc; |
578 | } | 512 | } |
579 | 513 | ||
580 | |||
581 | static void hpc_set_green_led_on(struct slot *slot) | 514 | static void hpc_set_green_led_on(struct slot *slot) |
582 | { | 515 | { |
583 | struct controller *ctrl = slot->ctrl; | 516 | struct controller *ctrl = slot->ctrl; |
584 | u16 slot_cmd; | 517 | u16 slot_cmd; |
585 | u16 cmd_mask; | 518 | u16 cmd_mask; |
586 | |||
587 | DBG_ENTER_ROUTINE | ||
588 | 519 | ||
589 | slot_cmd = 0x0100; | 520 | slot_cmd = 0x0100; |
590 | cmd_mask = PWR_LED_CTRL; | 521 | cmd_mask = PWR_LED_CTRL; |
@@ -597,8 +528,6 @@ static void hpc_set_green_led_on(struct slot *slot) | |||
597 | 528 | ||
598 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 529 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
599 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 530 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
600 | DBG_LEAVE_ROUTINE | ||
601 | return; | ||
602 | } | 531 | } |
603 | 532 | ||
604 | static void hpc_set_green_led_off(struct slot *slot) | 533 | static void hpc_set_green_led_off(struct slot *slot) |
@@ -607,8 +536,6 @@ static void hpc_set_green_led_off(struct slot *slot) | |||
607 | u16 slot_cmd; | 536 | u16 slot_cmd; |
608 | u16 cmd_mask; | 537 | u16 cmd_mask; |
609 | 538 | ||
610 | DBG_ENTER_ROUTINE | ||
611 | |||
612 | slot_cmd = 0x0300; | 539 | slot_cmd = 0x0300; |
613 | cmd_mask = PWR_LED_CTRL; | 540 | cmd_mask = PWR_LED_CTRL; |
614 | if (!pciehp_poll_mode) { | 541 | if (!pciehp_poll_mode) { |
@@ -619,9 +546,6 @@ static void hpc_set_green_led_off(struct slot *slot) | |||
619 | pcie_write_cmd(slot, slot_cmd, cmd_mask); | 546 | pcie_write_cmd(slot, slot_cmd, cmd_mask); |
620 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 547 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
621 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 548 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
622 | |||
623 | DBG_LEAVE_ROUTINE | ||
624 | return; | ||
625 | } | 549 | } |
626 | 550 | ||
627 | static void hpc_set_green_led_blink(struct slot *slot) | 551 | static void hpc_set_green_led_blink(struct slot *slot) |
@@ -629,8 +553,6 @@ static void hpc_set_green_led_blink(struct slot *slot) | |||
629 | struct controller *ctrl = slot->ctrl; | 553 | struct controller *ctrl = slot->ctrl; |
630 | u16 slot_cmd; | 554 | u16 slot_cmd; |
631 | u16 cmd_mask; | 555 | u16 cmd_mask; |
632 | |||
633 | DBG_ENTER_ROUTINE | ||
634 | 556 | ||
635 | slot_cmd = 0x0200; | 557 | slot_cmd = 0x0200; |
636 | cmd_mask = PWR_LED_CTRL; | 558 | cmd_mask = PWR_LED_CTRL; |
@@ -643,14 +565,10 @@ static void hpc_set_green_led_blink(struct slot *slot) | |||
643 | 565 | ||
644 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 566 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
645 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 567 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
646 | DBG_LEAVE_ROUTINE | ||
647 | return; | ||
648 | } | 568 | } |
649 | 569 | ||
650 | static void hpc_release_ctlr(struct controller *ctrl) | 570 | static void hpc_release_ctlr(struct controller *ctrl) |
651 | { | 571 | { |
652 | DBG_ENTER_ROUTINE | ||
653 | |||
654 | if (pciehp_poll_mode) | 572 | if (pciehp_poll_mode) |
655 | del_timer(&ctrl->poll_timer); | 573 | del_timer(&ctrl->poll_timer); |
656 | else | 574 | else |
@@ -662,8 +580,6 @@ static void hpc_release_ctlr(struct controller *ctrl) | |||
662 | */ | 580 | */ |
663 | if (atomic_dec_and_test(&pciehp_num_controllers)) | 581 | if (atomic_dec_and_test(&pciehp_num_controllers)) |
664 | destroy_workqueue(pciehp_wq); | 582 | destroy_workqueue(pciehp_wq); |
665 | |||
666 | DBG_LEAVE_ROUTINE | ||
667 | } | 583 | } |
668 | 584 | ||
669 | static int hpc_power_on_slot(struct slot * slot) | 585 | static int hpc_power_on_slot(struct slot * slot) |
@@ -674,8 +590,6 @@ static int hpc_power_on_slot(struct slot * slot) | |||
674 | u16 slot_status; | 590 | u16 slot_status; |
675 | int retval = 0; | 591 | int retval = 0; |
676 | 592 | ||
677 | DBG_ENTER_ROUTINE | ||
678 | |||
679 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); | 593 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); |
680 | 594 | ||
681 | /* Clear sticky power-fault bit from previous power failures */ | 595 | /* Clear sticky power-fault bit from previous power failures */ |
@@ -719,8 +633,6 @@ static int hpc_power_on_slot(struct slot * slot) | |||
719 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 633 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
720 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 634 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
721 | 635 | ||
722 | DBG_LEAVE_ROUTINE | ||
723 | |||
724 | return retval; | 636 | return retval; |
725 | } | 637 | } |
726 | 638 | ||
@@ -731,8 +643,6 @@ static int hpc_power_off_slot(struct slot * slot) | |||
731 | u16 cmd_mask; | 643 | u16 cmd_mask; |
732 | int retval = 0; | 644 | int retval = 0; |
733 | 645 | ||
734 | DBG_ENTER_ROUTINE | ||
735 | |||
736 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); | 646 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); |
737 | 647 | ||
738 | slot_cmd = POWER_OFF; | 648 | slot_cmd = POWER_OFF; |
@@ -764,8 +674,6 @@ static int hpc_power_off_slot(struct slot * slot) | |||
764 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 674 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
765 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 675 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
766 | 676 | ||
767 | DBG_LEAVE_ROUTINE | ||
768 | |||
769 | return retval; | 677 | return retval; |
770 | } | 678 | } |
771 | 679 | ||
@@ -784,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
784 | return IRQ_NONE; | 692 | return IRQ_NONE; |
785 | } | 693 | } |
786 | 694 | ||
787 | intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED | | 695 | intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | |
788 | PRSN_DETECT_CHANGED | CMD_COMPLETED ); | 696 | MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED); |
789 | 697 | ||
790 | intr_loc = slot_status & intr_detect; | 698 | intr_loc = slot_status & intr_detect; |
791 | 699 | ||
@@ -807,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
807 | 715 | ||
808 | dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n", | 716 | dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n", |
809 | __FUNCTION__, temp_word); | 717 | __FUNCTION__, temp_word); |
810 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; | 718 | temp_word = (temp_word & ~HP_INTR_ENABLE & |
719 | ~CMD_CMPL_INTR_ENABLE) | 0x00; | ||
811 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 720 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
812 | if (rc) { | 721 | if (rc) { |
813 | err("%s: Cannot write to SLOTCTRL register\n", | 722 | err("%s: Cannot write to SLOTCTRL register\n", |
@@ -825,7 +734,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
825 | } | 734 | } |
826 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", | 735 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", |
827 | __FUNCTION__, slot_status); | 736 | __FUNCTION__, slot_status); |
828 | 737 | ||
829 | /* Clear command complete interrupt caused by this write */ | 738 | /* Clear command complete interrupt caused by this write */ |
830 | temp_word = 0x1f; | 739 | temp_word = 0x1f; |
831 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 740 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
@@ -835,10 +744,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
835 | return IRQ_NONE; | 744 | return IRQ_NONE; |
836 | } | 745 | } |
837 | } | 746 | } |
838 | 747 | ||
839 | if (intr_loc & CMD_COMPLETED) { | 748 | if (intr_loc & CMD_COMPLETED) { |
840 | /* | 749 | /* |
841 | * Command Complete Interrupt Pending | 750 | * Command Complete Interrupt Pending |
842 | */ | 751 | */ |
843 | ctrl->cmd_busy = 0; | 752 | ctrl->cmd_busy = 0; |
844 | wake_up_interruptible(&ctrl->queue); | 753 | wake_up_interruptible(&ctrl->queue); |
@@ -892,7 +801,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
892 | __FUNCTION__); | 801 | __FUNCTION__); |
893 | return IRQ_NONE; | 802 | return IRQ_NONE; |
894 | } | 803 | } |
895 | 804 | ||
896 | /* Clear command complete interrupt caused by this write */ | 805 | /* Clear command complete interrupt caused by this write */ |
897 | temp_word = 0x1F; | 806 | temp_word = 0x1F; |
898 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 807 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
@@ -904,19 +813,17 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
904 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", | 813 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", |
905 | __FUNCTION__, temp_word); | 814 | __FUNCTION__, temp_word); |
906 | } | 815 | } |
907 | 816 | ||
908 | return IRQ_HANDLED; | 817 | return IRQ_HANDLED; |
909 | } | 818 | } |
910 | 819 | ||
911 | static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | 820 | static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value) |
912 | { | 821 | { |
913 | struct controller *ctrl = slot->ctrl; | 822 | struct controller *ctrl = slot->ctrl; |
914 | enum pcie_link_speed lnk_speed; | 823 | enum pcie_link_speed lnk_speed; |
915 | u32 lnk_cap; | 824 | u32 lnk_cap; |
916 | int retval = 0; | 825 | int retval = 0; |
917 | 826 | ||
918 | DBG_ENTER_ROUTINE | ||
919 | |||
920 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); | 827 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); |
921 | if (retval) { | 828 | if (retval) { |
922 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); | 829 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); |
@@ -934,19 +841,18 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | |||
934 | 841 | ||
935 | *value = lnk_speed; | 842 | *value = lnk_speed; |
936 | dbg("Max link speed = %d\n", lnk_speed); | 843 | dbg("Max link speed = %d\n", lnk_speed); |
937 | DBG_LEAVE_ROUTINE | 844 | |
938 | return retval; | 845 | return retval; |
939 | } | 846 | } |
940 | 847 | ||
941 | static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value) | 848 | static int hpc_get_max_lnk_width(struct slot *slot, |
849 | enum pcie_link_width *value) | ||
942 | { | 850 | { |
943 | struct controller *ctrl = slot->ctrl; | 851 | struct controller *ctrl = slot->ctrl; |
944 | enum pcie_link_width lnk_wdth; | 852 | enum pcie_link_width lnk_wdth; |
945 | u32 lnk_cap; | 853 | u32 lnk_cap; |
946 | int retval = 0; | 854 | int retval = 0; |
947 | 855 | ||
948 | DBG_ENTER_ROUTINE | ||
949 | |||
950 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); | 856 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); |
951 | if (retval) { | 857 | if (retval) { |
952 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); | 858 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); |
@@ -985,19 +891,17 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value | |||
985 | 891 | ||
986 | *value = lnk_wdth; | 892 | *value = lnk_wdth; |
987 | dbg("Max link width = %d\n", lnk_wdth); | 893 | dbg("Max link width = %d\n", lnk_wdth); |
988 | DBG_LEAVE_ROUTINE | 894 | |
989 | return retval; | 895 | return retval; |
990 | } | 896 | } |
991 | 897 | ||
992 | static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | 898 | static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value) |
993 | { | 899 | { |
994 | struct controller *ctrl = slot->ctrl; | 900 | struct controller *ctrl = slot->ctrl; |
995 | enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; | 901 | enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; |
996 | int retval = 0; | 902 | int retval = 0; |
997 | u16 lnk_status; | 903 | u16 lnk_status; |
998 | 904 | ||
999 | DBG_ENTER_ROUTINE | ||
1000 | |||
1001 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 905 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
1002 | if (retval) { | 906 | if (retval) { |
1003 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 907 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
@@ -1015,25 +919,24 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | |||
1015 | 919 | ||
1016 | *value = lnk_speed; | 920 | *value = lnk_speed; |
1017 | dbg("Current link speed = %d\n", lnk_speed); | 921 | dbg("Current link speed = %d\n", lnk_speed); |
1018 | DBG_LEAVE_ROUTINE | 922 | |
1019 | return retval; | 923 | return retval; |
1020 | } | 924 | } |
1021 | 925 | ||
1022 | static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value) | 926 | static int hpc_get_cur_lnk_width(struct slot *slot, |
927 | enum pcie_link_width *value) | ||
1023 | { | 928 | { |
1024 | struct controller *ctrl = slot->ctrl; | 929 | struct controller *ctrl = slot->ctrl; |
1025 | enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; | 930 | enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; |
1026 | int retval = 0; | 931 | int retval = 0; |
1027 | u16 lnk_status; | 932 | u16 lnk_status; |
1028 | 933 | ||
1029 | DBG_ENTER_ROUTINE | ||
1030 | |||
1031 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 934 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
1032 | if (retval) { | 935 | if (retval) { |
1033 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 936 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
1034 | return retval; | 937 | return retval; |
1035 | } | 938 | } |
1036 | 939 | ||
1037 | switch ((lnk_status & 0x03F0) >> 4){ | 940 | switch ((lnk_status & 0x03F0) >> 4){ |
1038 | case 0: | 941 | case 0: |
1039 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; | 942 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; |
@@ -1066,7 +969,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value | |||
1066 | 969 | ||
1067 | *value = lnk_wdth; | 970 | *value = lnk_wdth; |
1068 | dbg("Current link width = %d\n", lnk_wdth); | 971 | dbg("Current link width = %d\n", lnk_wdth); |
1069 | DBG_LEAVE_ROUTINE | 972 | |
1070 | return retval; | 973 | return retval; |
1071 | } | 974 | } |
1072 | 975 | ||
@@ -1085,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = { | |||
1085 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, | 988 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, |
1086 | .get_max_lnk_width = hpc_get_max_lnk_width, | 989 | .get_max_lnk_width = hpc_get_max_lnk_width, |
1087 | .get_cur_lnk_width = hpc_get_cur_lnk_width, | 990 | .get_cur_lnk_width = hpc_get_cur_lnk_width, |
1088 | 991 | ||
1089 | .query_power_fault = hpc_query_power_fault, | 992 | .query_power_fault = hpc_query_power_fault, |
1090 | .green_led_on = hpc_set_green_led_on, | 993 | .green_led_on = hpc_set_green_led_on, |
1091 | .green_led_off = hpc_set_green_led_off, | 994 | .green_led_off = hpc_set_green_led_off, |
1092 | .green_led_blink = hpc_set_green_led_blink, | 995 | .green_led_blink = hpc_set_green_led_blink, |
1093 | 996 | ||
1094 | .release_ctlr = hpc_release_ctlr, | 997 | .release_ctlr = hpc_release_ctlr, |
1095 | .check_lnk_status = hpc_check_lnk_status, | 998 | .check_lnk_status = hpc_check_lnk_status, |
1096 | }; | 999 | }; |
@@ -1138,6 +1041,7 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) | |||
1138 | dbg("Trying to get hotplug control for %s \n", | 1041 | dbg("Trying to get hotplug control for %s \n", |
1139 | (char *)string.pointer); | 1042 | (char *)string.pointer); |
1140 | status = pci_osc_control_set(handle, | 1043 | status = pci_osc_control_set(handle, |
1044 | OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL | | ||
1141 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL); | 1045 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL); |
1142 | if (status == AE_NOT_FOUND) | 1046 | if (status == AE_NOT_FOUND) |
1143 | status = acpi_run_oshp(handle); | 1047 | status = acpi_run_oshp(handle); |
@@ -1163,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) | |||
1163 | } | 1067 | } |
1164 | #endif | 1068 | #endif |
1165 | 1069 | ||
1166 | |||
1167 | |||
1168 | int pcie_init(struct controller * ctrl, struct pcie_device *dev) | 1070 | int pcie_init(struct controller * ctrl, struct pcie_device *dev) |
1169 | { | 1071 | { |
1170 | int rc; | 1072 | int rc; |
@@ -1176,8 +1078,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1176 | u16 slot_status, slot_ctrl; | 1078 | u16 slot_status, slot_ctrl; |
1177 | struct pci_dev *pdev; | 1079 | struct pci_dev *pdev; |
1178 | 1080 | ||
1179 | DBG_ENTER_ROUTINE | ||
1180 | |||
1181 | pdev = dev->port; | 1081 | pdev = dev->port; |
1182 | ctrl->pci_dev = pdev; /* save pci_dev in context */ | 1082 | ctrl->pci_dev = pdev; /* save pci_dev in context */ |
1183 | 1083 | ||
@@ -1201,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1201 | dbg("%s: CAPREG offset %x cap_reg %x\n", | 1101 | dbg("%s: CAPREG offset %x cap_reg %x\n", |
1202 | __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg); | 1102 | __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg); |
1203 | 1103 | ||
1204 | if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040) | 1104 | if (((cap_reg & SLOT_IMPL) == 0) || |
1105 | (((cap_reg & DEV_PORT_TYPE) != 0x0040) | ||
1205 | && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) { | 1106 | && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) { |
1206 | dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__); | 1107 | dbg("%s : This is not a root port or the port is not " |
1108 | "connected to a slot\n", __FUNCTION__); | ||
1207 | goto abort_free_ctlr; | 1109 | goto abort_free_ctlr; |
1208 | } | 1110 | } |
1209 | 1111 | ||
@@ -1236,14 +1138,15 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1236 | dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n", | 1138 | dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n", |
1237 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl); | 1139 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl); |
1238 | 1140 | ||
1239 | for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) | 1141 | for (rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) |
1240 | if (pci_resource_len(pdev, rc) > 0) | 1142 | if (pci_resource_len(pdev, rc) > 0) |
1241 | dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc, | 1143 | dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc, |
1242 | (unsigned long long)pci_resource_start(pdev, rc), | 1144 | (unsigned long long)pci_resource_start(pdev, rc), |
1243 | (unsigned long long)pci_resource_len(pdev, rc)); | 1145 | (unsigned long long)pci_resource_len(pdev, rc)); |
1244 | 1146 | ||
1245 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, | 1147 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", |
1246 | pdev->subsystem_vendor, pdev->subsystem_device); | 1148 | pdev->vendor, pdev->device, |
1149 | pdev->subsystem_vendor, pdev->subsystem_device); | ||
1247 | 1150 | ||
1248 | mutex_init(&ctrl->crit_sect); | 1151 | mutex_init(&ctrl->crit_sect); |
1249 | mutex_init(&ctrl->ctrl_lock); | 1152 | mutex_init(&ctrl->ctrl_lock); |
@@ -1267,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1267 | 1170 | ||
1268 | dbg("%s: SLOTCTRL %x value read %x\n", | 1171 | dbg("%s: SLOTCTRL %x value read %x\n", |
1269 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word); | 1172 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word); |
1270 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; | 1173 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | |
1174 | 0x00; | ||
1271 | 1175 | ||
1272 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 1176 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
1273 | if (rc) { | 1177 | if (rc) { |
@@ -1330,14 +1234,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1330 | 1234 | ||
1331 | if (ATTN_BUTTN(slot_cap)) | 1235 | if (ATTN_BUTTN(slot_cap)) |
1332 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; | 1236 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; |
1333 | 1237 | ||
1334 | if (POWER_CTRL(slot_cap)) | 1238 | if (POWER_CTRL(slot_cap)) |
1335 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; | 1239 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; |
1336 | 1240 | ||
1337 | if (MRL_SENS(slot_cap)) | 1241 | if (MRL_SENS(slot_cap)) |
1338 | intr_enable = intr_enable | MRL_DETECT_ENABLE; | 1242 | intr_enable = intr_enable | MRL_DETECT_ENABLE; |
1339 | 1243 | ||
1340 | temp_word = (temp_word & ~intr_enable) | intr_enable; | 1244 | temp_word = (temp_word & ~intr_enable) | intr_enable; |
1341 | 1245 | ||
1342 | if (pciehp_poll_mode) { | 1246 | if (pciehp_poll_mode) { |
1343 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; | 1247 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; |
@@ -1345,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1345 | temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; | 1249 | temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; |
1346 | } | 1250 | } |
1347 | 1251 | ||
1348 | /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ | 1252 | /* |
1253 | * Unmask Hot-plug Interrupt Enable for the interrupt | ||
1254 | * notification mechanism case. | ||
1255 | */ | ||
1349 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 1256 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
1350 | if (rc) { | 1257 | if (rc) { |
1351 | err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); | 1258 | err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); |
@@ -1356,14 +1263,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1356 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 1263 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
1357 | goto abort_disable_intr; | 1264 | goto abort_disable_intr; |
1358 | } | 1265 | } |
1359 | 1266 | ||
1360 | temp_word = 0x1F; /* Clear all events */ | 1267 | temp_word = 0x1F; /* Clear all events */ |
1361 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 1268 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
1362 | if (rc) { | 1269 | if (rc) { |
1363 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); | 1270 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); |
1364 | goto abort_disable_intr; | 1271 | goto abort_disable_intr; |
1365 | } | 1272 | } |
1366 | 1273 | ||
1367 | if (pciehp_force) { | 1274 | if (pciehp_force) { |
1368 | dbg("Bypassing BIOS check for pciehp use on %s\n", | 1275 | dbg("Bypassing BIOS check for pciehp use on %s\n", |
1369 | pci_name(ctrl->pci_dev)); | 1276 | pci_name(ctrl->pci_dev)); |
@@ -1375,10 +1282,9 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1375 | 1282 | ||
1376 | ctrl->hpc_ops = &pciehp_hpc_ops; | 1283 | ctrl->hpc_ops = &pciehp_hpc_ops; |
1377 | 1284 | ||
1378 | DBG_LEAVE_ROUTINE | ||
1379 | return 0; | 1285 | return 0; |
1380 | 1286 | ||
1381 | /* We end up here for the many possible ways to fail this API. */ | 1287 | /* We end up here for the many possible ways to fail this API. */ |
1382 | abort_disable_intr: | 1288 | abort_disable_intr: |
1383 | rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); | 1289 | rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); |
1384 | if (!rc) { | 1290 | if (!rc) { |
@@ -1395,6 +1301,5 @@ abort_free_irq: | |||
1395 | free_irq(ctrl->pci_dev->irq, ctrl); | 1301 | free_irq(ctrl->pci_dev->irq, ctrl); |
1396 | 1302 | ||
1397 | abort_free_ctlr: | 1303 | abort_free_ctlr: |
1398 | DBG_LEAVE_ROUTINE | ||
1399 | return -1; | 1304 | return -1; |
1400 | } | 1305 | } |
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c index 854aaea09e4d..c424aded13fb 100644 --- a/drivers/pci/hotplug/pciehp_pci.c +++ b/drivers/pci/hotplug/pciehp_pci.c | |||
@@ -243,9 +243,10 @@ int pciehp_configure_device(struct slot *p_slot) | |||
243 | 243 | ||
244 | int pciehp_unconfigure_device(struct slot *p_slot) | 244 | int pciehp_unconfigure_device(struct slot *p_slot) |
245 | { | 245 | { |
246 | int rc = 0; | 246 | int ret, rc = 0; |
247 | int j; | 247 | int j; |
248 | u8 bctl = 0; | 248 | u8 bctl = 0; |
249 | u8 presence = 0; | ||
249 | struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; | 250 | struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; |
250 | 251 | ||
251 | dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, | 252 | dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, |
@@ -263,23 +264,28 @@ int pciehp_unconfigure_device(struct slot *p_slot) | |||
263 | continue; | 264 | continue; |
264 | } | 265 | } |
265 | if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { | 266 | if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { |
266 | pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl); | 267 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, |
267 | if (bctl & PCI_BRIDGE_CTL_VGA) { | 268 | &presence); |
268 | err("Cannot remove display device %s\n", | 269 | if (!ret && presence) { |
270 | pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, | ||
271 | &bctl); | ||
272 | if (bctl & PCI_BRIDGE_CTL_VGA) { | ||
273 | err("Cannot remove display device %s\n", | ||
269 | pci_name(temp)); | 274 | pci_name(temp)); |
270 | pci_dev_put(temp); | 275 | pci_dev_put(temp); |
271 | continue; | 276 | continue; |
277 | } | ||
272 | } | 278 | } |
273 | } | 279 | } |
274 | pci_remove_bus_device(temp); | 280 | pci_remove_bus_device(temp); |
275 | pci_dev_put(temp); | 281 | pci_dev_put(temp); |
276 | } | 282 | } |
277 | /* | 283 | /* |
278 | * Some PCI Express root ports require fixup after hot-plug operation. | 284 | * Some PCI Express root ports require fixup after hot-plug operation. |
279 | */ | 285 | */ |
280 | if (pcie_mch_quirk) | 286 | if (pcie_mch_quirk) |
281 | pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev); | 287 | pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev); |
282 | 288 | ||
283 | return rc; | 289 | return rc; |
284 | } | 290 | } |
285 | 291 | ||
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index be1df85e5e2d..87e01615053d 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -132,7 +132,7 @@ void read_msi_msg(unsigned int irq, struct msi_msg *msg) | |||
132 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); | 132 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); |
133 | } else { | 133 | } else { |
134 | msg->address_hi = 0; | 134 | msg->address_hi = 0; |
135 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); | 135 | pci_read_config_word(dev, msi_data_reg(pos, 0), &data); |
136 | } | 136 | } |
137 | msg->data = data; | 137 | msg->data = data; |
138 | break; | 138 | break; |
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index f61be3abfdca..6e2760b6c20a 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c | |||
@@ -54,7 +54,6 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count) | |||
54 | if (!dynid) | 54 | if (!dynid) |
55 | return -ENOMEM; | 55 | return -ENOMEM; |
56 | 56 | ||
57 | INIT_LIST_HEAD(&dynid->node); | ||
58 | dynid->id.vendor = vendor; | 57 | dynid->id.vendor = vendor; |
59 | dynid->id.device = device; | 58 | dynid->id.device = device; |
60 | dynid->id.subvendor = subvendor; | 59 | dynid->id.subvendor = subvendor; |
@@ -65,7 +64,7 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count) | |||
65 | driver_data : 0UL; | 64 | driver_data : 0UL; |
66 | 65 | ||
67 | spin_lock(&pdrv->dynids.lock); | 66 | spin_lock(&pdrv->dynids.lock); |
68 | list_add_tail(&pdrv->dynids.list, &dynid->node); | 67 | list_add_tail(&dynid->node, &pdrv->dynids.list); |
69 | spin_unlock(&pdrv->dynids.lock); | 68 | spin_unlock(&pdrv->dynids.lock); |
70 | 69 | ||
71 | if (get_driver(&pdrv->driver)) { | 70 | if (get_driver(&pdrv->driver)) { |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 37c00f6fd801..728b3c863d87 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -17,11 +17,16 @@ | |||
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
19 | #include <linux/string.h> | 19 | #include <linux/string.h> |
20 | #include <linux/log2.h> | ||
20 | #include <asm/dma.h> /* isa_dma_bridge_buggy */ | 21 | #include <asm/dma.h> /* isa_dma_bridge_buggy */ |
21 | #include "pci.h" | 22 | #include "pci.h" |
22 | 23 | ||
23 | unsigned int pci_pm_d3_delay = 10; | 24 | unsigned int pci_pm_d3_delay = 10; |
24 | 25 | ||
26 | #ifdef CONFIG_PCI_DOMAINS | ||
27 | int pci_domains_supported = 1; | ||
28 | #endif | ||
29 | |||
25 | #define DEFAULT_CARDBUS_IO_SIZE (256) | 30 | #define DEFAULT_CARDBUS_IO_SIZE (256) |
26 | #define DEFAULT_CARDBUS_MEM_SIZE (64*1024*1024) | 31 | #define DEFAULT_CARDBUS_MEM_SIZE (64*1024*1024) |
27 | /* pci=cbmemsize=nnM,cbiosize=nn can override this */ | 32 | /* pci=cbmemsize=nnM,cbiosize=nn can override this */ |
@@ -1454,7 +1459,7 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) | |||
1454 | int cap, err = -EINVAL; | 1459 | int cap, err = -EINVAL; |
1455 | u32 stat, cmd, v, o; | 1460 | u32 stat, cmd, v, o; |
1456 | 1461 | ||
1457 | if (mmrbc < 512 || mmrbc > 4096 || (mmrbc & (mmrbc-1))) | 1462 | if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc)) |
1458 | goto out; | 1463 | goto out; |
1459 | 1464 | ||
1460 | v = ffs(mmrbc) - 10; | 1465 | v = ffs(mmrbc) - 10; |
@@ -1526,7 +1531,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq) | |||
1526 | int cap, err = -EINVAL; | 1531 | int cap, err = -EINVAL; |
1527 | u16 ctl, v; | 1532 | u16 ctl, v; |
1528 | 1533 | ||
1529 | if (rq < 128 || rq > 4096 || (rq & (rq-1))) | 1534 | if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) |
1530 | goto out; | 1535 | goto out; |
1531 | 1536 | ||
1532 | v = (ffs(rq) - 8) << 12; | 1537 | v = (ffs(rq) - 8) << 12; |
@@ -1566,6 +1571,13 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) | |||
1566 | return bars; | 1571 | return bars; |
1567 | } | 1572 | } |
1568 | 1573 | ||
1574 | static void __devinit pci_no_domains(void) | ||
1575 | { | ||
1576 | #ifdef CONFIG_PCI_DOMAINS | ||
1577 | pci_domains_supported = 0; | ||
1578 | #endif | ||
1579 | } | ||
1580 | |||
1569 | static int __devinit pci_init(void) | 1581 | static int __devinit pci_init(void) |
1570 | { | 1582 | { |
1571 | struct pci_dev *dev = NULL; | 1583 | struct pci_dev *dev = NULL; |
@@ -1585,6 +1597,10 @@ static int __devinit pci_setup(char *str) | |||
1585 | if (*str && (str = pcibios_setup(str)) && *str) { | 1597 | if (*str && (str = pcibios_setup(str)) && *str) { |
1586 | if (!strcmp(str, "nomsi")) { | 1598 | if (!strcmp(str, "nomsi")) { |
1587 | pci_no_msi(); | 1599 | pci_no_msi(); |
1600 | } else if (!strcmp(str, "noaer")) { | ||
1601 | pci_no_aer(); | ||
1602 | } else if (!strcmp(str, "nodomains")) { | ||
1603 | pci_no_domains(); | ||
1588 | } else if (!strncmp(str, "cbiosize=", 9)) { | 1604 | } else if (!strncmp(str, "cbiosize=", 9)) { |
1589 | pci_cardbus_io_size = memparse(str + 9, &str); | 1605 | pci_cardbus_io_size = memparse(str + 9, &str); |
1590 | } else if (!strncmp(str, "cbmemsize=", 10)) { | 1606 | } else if (!strncmp(str, "cbmemsize=", 10)) { |
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index b3a7d5b0f936..6fda33de84e8 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
@@ -51,6 +51,12 @@ void pci_restore_msi_state(struct pci_dev *dev); | |||
51 | static inline void pci_restore_msi_state(struct pci_dev *dev) {} | 51 | static inline void pci_restore_msi_state(struct pci_dev *dev) {} |
52 | #endif | 52 | #endif |
53 | 53 | ||
54 | #ifdef CONFIG_PCIEAER | ||
55 | void pci_no_aer(void); | ||
56 | #else | ||
57 | static inline void pci_no_aer(void) { } | ||
58 | #endif | ||
59 | |||
54 | static inline int pci_no_d1d2(struct pci_dev *dev) | 60 | static inline int pci_no_d1d2(struct pci_dev *dev) |
55 | { | 61 | { |
56 | unsigned int parent_dstates = 0; | 62 | unsigned int parent_dstates = 0; |
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig index 0ad92a8ad8b1..287a9311716c 100644 --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig | |||
@@ -25,13 +25,4 @@ config HOTPLUG_PCI_PCIE | |||
25 | 25 | ||
26 | When in doubt, say N. | 26 | When in doubt, say N. |
27 | 27 | ||
28 | config HOTPLUG_PCI_PCIE_POLL_EVENT_MODE | ||
29 | bool "Use polling mechanism for hot-plug events (for testing purpose)" | ||
30 | depends on HOTPLUG_PCI_PCIE | ||
31 | help | ||
32 | Say Y here if you want to use the polling mechanism for hot-plug | ||
33 | events for early platform testing. | ||
34 | |||
35 | When in doubt, say N. | ||
36 | |||
37 | source "drivers/pci/pcie/aer/Kconfig" | 28 | source "drivers/pci/pcie/aer/Kconfig" |
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index ad90a01b0dfc..7a62f7dd9009 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c | |||
@@ -81,6 +81,13 @@ static struct pcie_port_service_driver aerdriver = { | |||
81 | .reset_link = aer_root_reset, | 81 | .reset_link = aer_root_reset, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | static int pcie_aer_disable; | ||
85 | |||
86 | void pci_no_aer(void) | ||
87 | { | ||
88 | pcie_aer_disable = 1; /* has priority over 'forceload' */ | ||
89 | } | ||
90 | |||
84 | /** | 91 | /** |
85 | * aer_irq - Root Port's ISR | 92 | * aer_irq - Root Port's ISR |
86 | * @irq: IRQ assigned to Root Port | 93 | * @irq: IRQ assigned to Root Port |
@@ -327,6 +334,8 @@ static void aer_error_resume(struct pci_dev *dev) | |||
327 | **/ | 334 | **/ |
328 | static int __init aer_service_init(void) | 335 | static int __init aer_service_init(void) |
329 | { | 336 | { |
337 | if (pcie_aer_disable) | ||
338 | return -ENXIO; | ||
330 | return pcie_port_service_register(&aerdriver); | 339 | return pcie_port_service_register(&aerdriver); |
331 | } | 340 | } |
332 | 341 | ||
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 171ca712e523..5db6b6690b59 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
@@ -276,8 +276,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) | |||
276 | sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK); | 276 | sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK); |
277 | if (sz) { | 277 | if (sz) { |
278 | res->flags = (l & IORESOURCE_ROM_ENABLE) | | 278 | res->flags = (l & IORESOURCE_ROM_ENABLE) | |
279 | IORESOURCE_MEM | IORESOURCE_PREFETCH | | 279 | IORESOURCE_MEM | IORESOURCE_READONLY; |
280 | IORESOURCE_READONLY | IORESOURCE_CACHEABLE; | ||
281 | res->start = l & PCI_ROM_ADDRESS_MASK; | 280 | res->start = l & PCI_ROM_ADDRESS_MASK; |
282 | res->end = res->start + (unsigned long) sz; | 281 | res->end = res->start + (unsigned long) sz; |
283 | } | 282 | } |
@@ -597,7 +596,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass | |||
597 | pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); | 596 | pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses); |
598 | 597 | ||
599 | if (!is_cardbus) { | 598 | if (!is_cardbus) { |
600 | child->bridge_ctl = bctl | PCI_BRIDGE_CTL_NO_ISA; | 599 | child->bridge_ctl = bctl; |
601 | /* | 600 | /* |
602 | * Adjust subordinate busnr in parent buses. | 601 | * Adjust subordinate busnr in parent buses. |
603 | * We do this before scanning for children because | 602 | * We do this before scanning for children because |
@@ -744,22 +743,46 @@ static int pci_setup_device(struct pci_dev * dev) | |||
744 | */ | 743 | */ |
745 | if (class == PCI_CLASS_STORAGE_IDE) { | 744 | if (class == PCI_CLASS_STORAGE_IDE) { |
746 | u8 progif; | 745 | u8 progif; |
746 | struct pci_bus_region region; | ||
747 | |||
747 | pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); | 748 | pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); |
748 | if ((progif & 1) == 0) { | 749 | if ((progif & 1) == 0) { |
749 | dev->resource[0].start = 0x1F0; | 750 | struct resource resource = { |
750 | dev->resource[0].end = 0x1F7; | 751 | .start = 0x1F0, |
751 | dev->resource[0].flags = LEGACY_IO_RESOURCE; | 752 | .end = 0x1F7, |
752 | dev->resource[1].start = 0x3F6; | 753 | .flags = LEGACY_IO_RESOURCE, |
753 | dev->resource[1].end = 0x3F6; | 754 | }; |
754 | dev->resource[1].flags = LEGACY_IO_RESOURCE; | 755 | |
756 | pcibios_resource_to_bus(dev, ®ion, &resource); | ||
757 | dev->resource[0].start = region.start; | ||
758 | dev->resource[0].end = region.end; | ||
759 | dev->resource[0].flags = resource.flags; | ||
760 | resource.start = 0x3F6; | ||
761 | resource.end = 0x3F6; | ||
762 | resource.flags = LEGACY_IO_RESOURCE; | ||
763 | pcibios_resource_to_bus(dev, ®ion, &resource); | ||
764 | dev->resource[1].start = region.start; | ||
765 | dev->resource[1].end = region.end; | ||
766 | dev->resource[1].flags = resource.flags; | ||
755 | } | 767 | } |
756 | if ((progif & 4) == 0) { | 768 | if ((progif & 4) == 0) { |
757 | dev->resource[2].start = 0x170; | 769 | struct resource resource = { |
758 | dev->resource[2].end = 0x177; | 770 | .start = 0x170, |
759 | dev->resource[2].flags = LEGACY_IO_RESOURCE; | 771 | .end = 0x177, |
760 | dev->resource[3].start = 0x376; | 772 | .flags = LEGACY_IO_RESOURCE, |
761 | dev->resource[3].end = 0x376; | 773 | }; |
762 | dev->resource[3].flags = LEGACY_IO_RESOURCE; | 774 | |
775 | pcibios_resource_to_bus(dev, ®ion, &resource); | ||
776 | dev->resource[2].start = region.start; | ||
777 | dev->resource[2].end = region.end; | ||
778 | dev->resource[2].flags = resource.flags; | ||
779 | resource.start = 0x376; | ||
780 | resource.end = 0x376; | ||
781 | resource.flags = LEGACY_IO_RESOURCE; | ||
782 | pcibios_resource_to_bus(dev, ®ion, &resource); | ||
783 | dev->resource[3].start = region.start; | ||
784 | dev->resource[3].end = region.end; | ||
785 | dev->resource[3].flags = resource.flags; | ||
763 | } | 786 | } |
764 | } | 787 | } |
765 | break; | 788 | break; |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 90adc62d07ff..716439e25dd2 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -60,7 +60,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
60 | */ | 60 | */ |
61 | 61 | ||
62 | if (capable(CAP_SYS_ADMIN)) | 62 | if (capable(CAP_SYS_ADMIN)) |
63 | size = dev->cfg_size; | 63 | size = dp->size; |
64 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) | 64 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
65 | size = 128; | 65 | size = 128; |
66 | else | 66 | else |
@@ -129,11 +129,11 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
129 | static ssize_t | 129 | static ssize_t |
130 | proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) | 130 | proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) |
131 | { | 131 | { |
132 | const struct inode *ino = file->f_path.dentry->d_inode; | 132 | struct inode *ino = file->f_path.dentry->d_inode; |
133 | const struct proc_dir_entry *dp = PDE(ino); | 133 | const struct proc_dir_entry *dp = PDE(ino); |
134 | struct pci_dev *dev = dp->data; | 134 | struct pci_dev *dev = dp->data; |
135 | int pos = *ppos; | 135 | int pos = *ppos; |
136 | int size = dev->cfg_size; | 136 | int size = dp->size; |
137 | int cnt; | 137 | int cnt; |
138 | 138 | ||
139 | if (pos >= size) | 139 | if (pos >= size) |
@@ -193,6 +193,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
193 | } | 193 | } |
194 | 194 | ||
195 | *ppos = pos; | 195 | *ppos = pos; |
196 | i_size_write(ino, dp->size); | ||
196 | return nbytes; | 197 | return nbytes; |
197 | } | 198 | } |
198 | 199 | ||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 50f2dd9e1bb2..59d4da2734c1 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -472,11 +472,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, quirk_ | |||
472 | */ | 472 | */ |
473 | static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev) | 473 | static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev) |
474 | { | 474 | { |
475 | u8 rev; | ||
476 | u32 region; | 475 | u32 region; |
477 | 476 | ||
478 | pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev); | 477 | if (dev->revision & 0x10) { |
479 | if (rev & 0x10) { | ||
480 | pci_read_config_dword(dev, 0x48, ®ion); | 478 | pci_read_config_dword(dev, 0x48, ®ion); |
481 | region &= PCI_BASE_ADDRESS_IO_MASK; | 479 | region &= PCI_BASE_ADDRESS_IO_MASK; |
482 | quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI"); | 480 | quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI"); |
@@ -629,12 +627,9 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk | |||
629 | */ | 627 | */ |
630 | static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) | 628 | static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev) |
631 | { | 629 | { |
632 | unsigned char revid; | 630 | if (dev->subordinate && dev->revision <= 0x12) { |
633 | |||
634 | pci_read_config_byte(dev, PCI_REVISION_ID, &revid); | ||
635 | if (dev->subordinate && revid <= 0x12) { | ||
636 | printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X " | 631 | printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X " |
637 | "MMRBC\n", revid); | 632 | "MMRBC\n", dev->revision); |
638 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; | 633 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; |
639 | } | 634 | } |
640 | } | 635 | } |
@@ -930,38 +925,6 @@ static void __init quirk_eisa_bridge(struct pci_dev *dev) | |||
930 | } | 925 | } |
931 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge ); | 926 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge ); |
932 | 927 | ||
933 | /* | ||
934 | * On the MSI-K8T-Neo2Fir Board, the internal Soundcard is disabled | ||
935 | * when a PCI-Soundcard is added. The BIOS only gives Options | ||
936 | * "Disabled" and "AUTO". This Quirk Sets the corresponding | ||
937 | * Register-Value to enable the Soundcard. | ||
938 | * | ||
939 | * FIXME: Presently this quirk will run on anything that has an 8237 | ||
940 | * which isn't correct, we need to check DMI tables or something in | ||
941 | * order to make sure it only runs on the MSI-K8T-Neo2Fir. Because it | ||
942 | * runs everywhere at present we suppress the printk output in most | ||
943 | * irrelevant cases. | ||
944 | */ | ||
945 | static void k8t_sound_hostbridge(struct pci_dev *dev) | ||
946 | { | ||
947 | unsigned char val; | ||
948 | |||
949 | pci_read_config_byte(dev, 0x50, &val); | ||
950 | if (val == 0xc8) { | ||
951 | /* Assume it's probably a MSI-K8T-Neo2Fir */ | ||
952 | printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, attempting to turn soundcard ON\n"); | ||
953 | pci_write_config_byte(dev, 0x50, val & (~0x40)); | ||
954 | |||
955 | /* Verify the Change for Status output */ | ||
956 | pci_read_config_byte(dev, 0x50, &val); | ||
957 | if (val & 0x40) | ||
958 | printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard still off\n"); | ||
959 | else | ||
960 | printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard on\n"); | ||
961 | } | ||
962 | } | ||
963 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge); | ||
964 | DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge); | ||
965 | 928 | ||
966 | /* | 929 | /* |
967 | * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge | 930 | * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge |
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 5e5191ec8de6..401e03c920bd 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c | |||
@@ -472,7 +472,12 @@ void pci_bus_size_bridges(struct pci_bus *bus) | |||
472 | break; | 472 | break; |
473 | 473 | ||
474 | case PCI_CLASS_BRIDGE_PCI: | 474 | case PCI_CLASS_BRIDGE_PCI: |
475 | /* don't size subtractive decoding (transparent) | ||
476 | * PCI-to-PCI bridges */ | ||
477 | if (bus->self->transparent) | ||
478 | break; | ||
475 | pci_bridge_check_ranges(bus); | 479 | pci_bridge_check_ranges(bus); |
480 | /* fall through */ | ||
476 | default: | 481 | default: |
477 | pbus_size_io(bus); | 482 | pbus_size_io(bus); |
478 | /* If the bridge supports prefetchable range, size it | 483 | /* If the bridge supports prefetchable range, size it |
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h index a8cac8c2cde7..e88361966347 100644 --- a/include/asm-x86/pci.h +++ b/include/asm-x86/pci.h | |||
@@ -1,5 +1,95 @@ | |||
1 | #ifndef __x86_PCI_H | ||
2 | #define __x86_PCI_H | ||
3 | |||
4 | #include <linux/mm.h> /* for struct page */ | ||
5 | #include <linux/types.h> | ||
6 | #include <linux/slab.h> | ||
7 | #include <linux/string.h> | ||
8 | #include <asm/scatterlist.h> | ||
9 | #include <asm/io.h> | ||
10 | |||
11 | |||
12 | #ifdef __KERNEL__ | ||
13 | |||
14 | struct pci_sysdata { | ||
15 | int domain; /* PCI domain */ | ||
16 | int node; /* NUMA node */ | ||
17 | #ifdef CONFIG_X86_64 | ||
18 | void* iommu; /* IOMMU private data */ | ||
19 | #endif | ||
20 | }; | ||
21 | |||
22 | /* scan a bus after allocating a pci_sysdata for it */ | ||
23 | extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); | ||
24 | |||
25 | static inline int pci_domain_nr(struct pci_bus *bus) | ||
26 | { | ||
27 | struct pci_sysdata *sd = bus->sysdata; | ||
28 | return sd->domain; | ||
29 | } | ||
30 | |||
31 | static inline int pci_proc_domain(struct pci_bus *bus) | ||
32 | { | ||
33 | return pci_domain_nr(bus); | ||
34 | } | ||
35 | |||
36 | |||
37 | /* Can be used to override the logic in pci_scan_bus for skipping | ||
38 | already-configured bus numbers - to be used for buggy BIOSes | ||
39 | or architectures with incomplete PCI setup by the loader */ | ||
40 | |||
41 | #ifdef CONFIG_PCI | ||
42 | extern unsigned int pcibios_assign_all_busses(void); | ||
43 | #else | ||
44 | #define pcibios_assign_all_busses() 0 | ||
45 | #endif | ||
46 | #define pcibios_scan_all_fns(a, b) 0 | ||
47 | |||
48 | extern unsigned long pci_mem_start; | ||
49 | #define PCIBIOS_MIN_IO 0x1000 | ||
50 | #define PCIBIOS_MIN_MEM (pci_mem_start) | ||
51 | |||
52 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | ||
53 | |||
54 | void pcibios_config_init(void); | ||
55 | struct pci_bus * pcibios_scan_root(int bus); | ||
56 | |||
57 | void pcibios_set_master(struct pci_dev *dev); | ||
58 | void pcibios_penalize_isa_irq(int irq, int active); | ||
59 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | ||
60 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | ||
61 | |||
62 | |||
63 | #define HAVE_PCI_MMAP | ||
64 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | ||
65 | enum pci_mmap_state mmap_state, int write_combine); | ||
66 | |||
67 | |||
68 | #ifdef CONFIG_PCI | ||
69 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
70 | enum pci_dma_burst_strategy *strat, | ||
71 | unsigned long *strategy_parameter) | ||
72 | { | ||
73 | *strat = PCI_DMA_BURST_INFINITY; | ||
74 | *strategy_parameter = ~0UL; | ||
75 | } | ||
76 | #endif | ||
77 | |||
78 | |||
79 | #endif /* __KERNEL__ */ | ||
80 | |||
1 | #ifdef CONFIG_X86_32 | 81 | #ifdef CONFIG_X86_32 |
2 | # include "pci_32.h" | 82 | # include "pci_32.h" |
3 | #else | 83 | #else |
4 | # include "pci_64.h" | 84 | # include "pci_64.h" |
5 | #endif | 85 | #endif |
86 | |||
87 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | ||
88 | #include <asm-generic/pci-dma-compat.h> | ||
89 | |||
90 | /* generic pci stuff */ | ||
91 | #include <asm-generic/pci.h> | ||
92 | |||
93 | |||
94 | |||
95 | #endif | ||
diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h index 4fcacc711385..8c4c3a0368e2 100644 --- a/include/asm-x86/pci_32.h +++ b/include/asm-x86/pci_32.h | |||
@@ -4,50 +4,11 @@ | |||
4 | 4 | ||
5 | #ifdef __KERNEL__ | 5 | #ifdef __KERNEL__ |
6 | 6 | ||
7 | struct pci_sysdata { | ||
8 | int node; /* NUMA node */ | ||
9 | }; | ||
10 | |||
11 | /* scan a bus after allocating a pci_sysdata for it */ | ||
12 | extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); | ||
13 | |||
14 | #include <linux/mm.h> /* for struct page */ | ||
15 | |||
16 | /* Can be used to override the logic in pci_scan_bus for skipping | ||
17 | already-configured bus numbers - to be used for buggy BIOSes | ||
18 | or architectures with incomplete PCI setup by the loader */ | ||
19 | |||
20 | #ifdef CONFIG_PCI | ||
21 | extern unsigned int pcibios_assign_all_busses(void); | ||
22 | #else | ||
23 | #define pcibios_assign_all_busses() 0 | ||
24 | #endif | ||
25 | #define pcibios_scan_all_fns(a, b) 0 | ||
26 | |||
27 | extern unsigned long pci_mem_start; | ||
28 | #define PCIBIOS_MIN_IO 0x1000 | ||
29 | #define PCIBIOS_MIN_MEM (pci_mem_start) | ||
30 | |||
31 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | ||
32 | |||
33 | void pcibios_config_init(void); | ||
34 | struct pci_bus * pcibios_scan_root(int bus); | ||
35 | |||
36 | void pcibios_set_master(struct pci_dev *dev); | ||
37 | void pcibios_penalize_isa_irq(int irq, int active); | ||
38 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | ||
39 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | ||
40 | 7 | ||
41 | /* Dynamic DMA mapping stuff. | 8 | /* Dynamic DMA mapping stuff. |
42 | * i386 has everything mapped statically. | 9 | * i386 has everything mapped statically. |
43 | */ | 10 | */ |
44 | 11 | ||
45 | #include <linux/types.h> | ||
46 | #include <linux/slab.h> | ||
47 | #include <asm/scatterlist.h> | ||
48 | #include <linux/string.h> | ||
49 | #include <asm/io.h> | ||
50 | |||
51 | struct pci_dev; | 12 | struct pci_dev; |
52 | 13 | ||
53 | /* The PCI address space does equal the physical memory | 14 | /* The PCI address space does equal the physical memory |
@@ -64,27 +25,8 @@ struct pci_dev; | |||
64 | #define pci_unmap_len(PTR, LEN_NAME) (0) | 25 | #define pci_unmap_len(PTR, LEN_NAME) (0) |
65 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | 26 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
66 | 27 | ||
67 | #define HAVE_PCI_MMAP | ||
68 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | ||
69 | enum pci_mmap_state mmap_state, int write_combine); | ||
70 | |||
71 | |||
72 | #ifdef CONFIG_PCI | ||
73 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
74 | enum pci_dma_burst_strategy *strat, | ||
75 | unsigned long *strategy_parameter) | ||
76 | { | ||
77 | *strat = PCI_DMA_BURST_INFINITY; | ||
78 | *strategy_parameter = ~0UL; | ||
79 | } | ||
80 | #endif | ||
81 | 28 | ||
82 | #endif /* __KERNEL__ */ | 29 | #endif /* __KERNEL__ */ |
83 | 30 | ||
84 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | ||
85 | #include <asm-generic/pci-dma-compat.h> | ||
86 | |||
87 | /* generic pci stuff */ | ||
88 | #include <asm-generic/pci.h> | ||
89 | 31 | ||
90 | #endif /* __i386_PCI_H */ | 32 | #endif /* __i386_PCI_H */ |
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h index 5da8cb0c0599..9baa46d9f594 100644 --- a/include/asm-x86/pci_64.h +++ b/include/asm-x86/pci_64.h | |||
@@ -1,16 +1,9 @@ | |||
1 | #ifndef __x8664_PCI_H | 1 | #ifndef __x8664_PCI_H |
2 | #define __x8664_PCI_H | 2 | #define __x8664_PCI_H |
3 | 3 | ||
4 | #include <asm/io.h> | ||
5 | 4 | ||
6 | #ifdef __KERNEL__ | 5 | #ifdef __KERNEL__ |
7 | 6 | ||
8 | struct pci_sysdata { | ||
9 | int node; /* NUMA node */ | ||
10 | void* iommu; /* IOMMU private data */ | ||
11 | }; | ||
12 | |||
13 | extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); | ||
14 | 7 | ||
15 | #ifdef CONFIG_CALGARY_IOMMU | 8 | #ifdef CONFIG_CALGARY_IOMMU |
16 | static inline void* pci_iommu(struct pci_bus *bus) | 9 | static inline void* pci_iommu(struct pci_bus *bus) |
@@ -26,40 +19,11 @@ static inline void set_pci_iommu(struct pci_bus *bus, void *val) | |||
26 | } | 19 | } |
27 | #endif /* CONFIG_CALGARY_IOMMU */ | 20 | #endif /* CONFIG_CALGARY_IOMMU */ |
28 | 21 | ||
29 | #include <linux/mm.h> /* for struct page */ | ||
30 | |||
31 | /* Can be used to override the logic in pci_scan_bus for skipping | ||
32 | already-configured bus numbers - to be used for buggy BIOSes | ||
33 | or architectures with incomplete PCI setup by the loader */ | ||
34 | |||
35 | #ifdef CONFIG_PCI | ||
36 | extern unsigned int pcibios_assign_all_busses(void); | ||
37 | #else | ||
38 | #define pcibios_assign_all_busses() 0 | ||
39 | #endif | ||
40 | #define pcibios_scan_all_fns(a, b) 0 | ||
41 | |||
42 | extern unsigned long pci_mem_start; | ||
43 | #define PCIBIOS_MIN_IO 0x1000 | ||
44 | #define PCIBIOS_MIN_MEM (pci_mem_start) | ||
45 | |||
46 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | ||
47 | 22 | ||
48 | void pcibios_config_init(void); | ||
49 | struct pci_bus * pcibios_scan_root(int bus); | ||
50 | extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); | 23 | extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); |
51 | extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); | 24 | extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); |
52 | 25 | ||
53 | void pcibios_set_master(struct pci_dev *dev); | ||
54 | void pcibios_penalize_isa_irq(int irq, int active); | ||
55 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | ||
56 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | ||
57 | 26 | ||
58 | #include <linux/types.h> | ||
59 | #include <linux/slab.h> | ||
60 | #include <asm/scatterlist.h> | ||
61 | #include <linux/string.h> | ||
62 | #include <asm/page.h> | ||
63 | 27 | ||
64 | extern void pci_iommu_alloc(void); | 28 | extern void pci_iommu_alloc(void); |
65 | extern int iommu_setup(char *opt); | 29 | extern int iommu_setup(char *opt); |
@@ -100,27 +64,7 @@ extern int iommu_setup(char *opt); | |||
100 | 64 | ||
101 | #endif | 65 | #endif |
102 | 66 | ||
103 | #include <asm-generic/pci-dma-compat.h> | ||
104 | |||
105 | #ifdef CONFIG_PCI | ||
106 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
107 | enum pci_dma_burst_strategy *strat, | ||
108 | unsigned long *strategy_parameter) | ||
109 | { | ||
110 | *strat = PCI_DMA_BURST_INFINITY; | ||
111 | *strategy_parameter = ~0UL; | ||
112 | } | ||
113 | #endif | ||
114 | |||
115 | #define HAVE_PCI_MMAP | ||
116 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | ||
117 | enum pci_mmap_state mmap_state, int write_combine); | ||
118 | |||
119 | #endif /* __KERNEL__ */ | 67 | #endif /* __KERNEL__ */ |
120 | 68 | ||
121 | /* generic pci stuff */ | ||
122 | #ifdef CONFIG_PCI | ||
123 | #include <asm-generic/pci.h> | ||
124 | #endif | ||
125 | 69 | ||
126 | #endif /* __x8664_PCI_H */ | 70 | #endif /* __x8664_PCI_H */ |
diff --git a/include/linux/pci.h b/include/linux/pci.h index 038a0dc7273a..768b93359f90 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h | |||
@@ -685,13 +685,16 @@ extern void pci_unblock_user_cfg_access(struct pci_dev *dev); | |||
685 | * a PCI domain is defined to be a set of PCI busses which share | 685 | * a PCI domain is defined to be a set of PCI busses which share |
686 | * configuration space. | 686 | * configuration space. |
687 | */ | 687 | */ |
688 | #ifndef CONFIG_PCI_DOMAINS | 688 | #ifdef CONFIG_PCI_DOMAINS |
689 | extern int pci_domains_supported; | ||
690 | #else | ||
691 | enum { pci_domains_supported = 0 }; | ||
689 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } | 692 | static inline int pci_domain_nr(struct pci_bus *bus) { return 0; } |
690 | static inline int pci_proc_domain(struct pci_bus *bus) | 693 | static inline int pci_proc_domain(struct pci_bus *bus) |
691 | { | 694 | { |
692 | return 0; | 695 | return 0; |
693 | } | 696 | } |
694 | #endif | 697 | #endif /* CONFIG_PCI_DOMAINS */ |
695 | 698 | ||
696 | #else /* CONFIG_PCI is not enabled */ | 699 | #else /* CONFIG_PCI is not enabled */ |
697 | 700 | ||
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 584741bb73b3..87439ad94685 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -829,6 +829,9 @@ | |||
829 | #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a | 829 | #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a |
830 | #define PCI_DEVICE_ID_UMC_UM8886A 0x886a | 830 | #define PCI_DEVICE_ID_UMC_UM8886A 0x886a |
831 | 831 | ||
832 | #define PCI_VENDOR_ID_PICOPOWER 0x1066 | ||
833 | #define PCI_DEVICE_ID_PICOPOWER_PT86C523 0x0002 | ||
834 | #define PCI_DEVICE_ID_PICOPOWER_PT86C523BBP 0x8002 | ||
832 | 835 | ||
833 | #define PCI_VENDOR_ID_MYLEX 0x1069 | 836 | #define PCI_VENDOR_ID_MYLEX 0x1069 |
834 | #define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 | 837 | #define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 |
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 423d592c55d5..c1914a8b94a9 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h | |||
@@ -147,7 +147,7 @@ | |||
147 | #define PCI_BRIDGE_CONTROL 0x3e | 147 | #define PCI_BRIDGE_CONTROL 0x3e |
148 | #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ | 148 | #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ |
149 | #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ | 149 | #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ |
150 | #define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ | 150 | #define PCI_BRIDGE_CTL_ISA 0x04 /* Enable ISA mode */ |
151 | #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ | 151 | #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ |
152 | #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ | 152 | #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ |
153 | #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ | 153 | #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ |
@@ -202,8 +202,12 @@ | |||
202 | #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ | 202 | #define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ |
203 | #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ | 203 | #define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ |
204 | #define PCI_CAP_ID_HT 0x08 /* HyperTransport */ | 204 | #define PCI_CAP_ID_HT 0x08 /* HyperTransport */ |
205 | #define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */ | 205 | #define PCI_CAP_ID_VNDR 0x09 /* Vendor specific */ |
206 | #define PCI_CAP_ID_DBG 0x0A /* Debug port */ | ||
207 | #define PCI_CAP_ID_CCRC 0x0B /* CompactPCI Central Resource Control */ | ||
206 | #define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ | 208 | #define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ |
209 | #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ | ||
210 | #define PCI_CAP_ID_AGP3 0x0E /* AGP Target PCI-PCI bridge */ | ||
207 | #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ | 211 | #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ |
208 | #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ | 212 | #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ |
209 | #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ | 213 | #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ |
diff --git a/lib/swiotlb.c b/lib/swiotlb.c index a7381d55663a..30c1400e749e 100644 --- a/lib/swiotlb.c +++ b/lib/swiotlb.c | |||
@@ -497,6 +497,7 @@ void | |||
497 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | 497 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, |
498 | dma_addr_t dma_handle) | 498 | dma_addr_t dma_handle) |
499 | { | 499 | { |
500 | WARN_ON(irqs_disabled()); | ||
500 | if (!(vaddr >= (void *)io_tlb_start | 501 | if (!(vaddr >= (void *)io_tlb_start |
501 | && vaddr < (void *)io_tlb_end)) | 502 | && vaddr < (void *)io_tlb_end)) |
502 | free_pages((unsigned long) vaddr, get_order(size)); | 503 | free_pages((unsigned long) vaddr, get_order(size)); |