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authorHans Verkuil <hverkuil@xs4all.nl>2008-12-19 05:18:38 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2008-12-30 06:39:25 -0500
commit77587c5627aab50636ea0f93c28d2013cd0b7004 (patch)
tree948f73d3d392041cc2c97e5d82ffe1dcde8665cd
parent49dd1315fae94ef6161f72c7be961560d3309f17 (diff)
V4L/DVB (9940): bt832: remove this driver
The bt832 i2c driver was never used or even compiled and is no longer maintained. It is now removed completely. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat
-rw-r--r--drivers/media/video/bt8xx/bt832.c274
-rw-r--r--drivers/media/video/bt8xx/bt832.h305
-rw-r--r--drivers/media/video/bt8xx/bttv-cards.c12
-rw-r--r--include/media/i2c-addr.h2
4 files changed, 0 insertions, 593 deletions
diff --git a/drivers/media/video/bt8xx/bt832.c b/drivers/media/video/bt8xx/bt832.c
deleted file mode 100644
index 216fc9680e80..000000000000
--- a/drivers/media/video/bt8xx/bt832.c
+++ /dev/null
@@ -1,274 +0,0 @@
1/* Driver for Bt832 CMOS Camera Video Processor
2 i2c-addresses: 0x88 or 0x8a
3
4 The BT832 interfaces to a Quartzsight Digital Camera (352x288, 25 or 30 fps)
5 via a 9 pin connector ( 4-wire SDATA, 2-wire i2c, SCLK, VCC, GND).
6 It outputs an 8-bit 4:2:2 YUV or YCrCb video signal which can be directly
7 connected to bt848/bt878 GPIO pins on this purpose.
8 (see: VLSI Vision Ltd. www.vvl.co.uk for camera datasheets)
9
10 Supported Cards:
11 - Pixelview Rev.4E: 0x8a
12 GPIO 0x400000 toggles Bt832 RESET, and the chip changes to i2c 0x88 !
13
14 (c) Gunther Mayer, 2002
15
16 STATUS:
17 - detect chip and hexdump
18 - reset chip and leave low power mode
19 - detect camera present
20
21 TODO:
22 - make it work (find correct setup for Bt832 and Bt878)
23*/
24
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/i2c.h>
28#include <linux/types.h>
29#include <linux/videodev.h>
30#include <linux/init.h>
31#include <linux/errno.h>
32#include <linux/slab.h>
33#include <media/v4l2-common.h>
34
35#include "bttv.h"
36#include "bt832.h"
37
38MODULE_LICENSE("GPL");
39
40/* Addresses to scan */
41static unsigned short normal_i2c[] = { I2C_ADDR_BT832_ALT1>>1, I2C_ADDR_BT832_ALT2>>1,
42 I2C_CLIENT_END };
43I2C_CLIENT_INSMOD;
44
45int debug; /* debug output */
46module_param(debug, int, 0644);
47
48/* ---------------------------------------------------------------------- */
49
50static int bt832_detach(struct i2c_client *client);
51
52
53static struct i2c_driver driver;
54static struct i2c_client client_template;
55
56struct bt832 {
57 struct i2c_client client;
58};
59
60int bt832_hexdump(struct i2c_client *i2c_client_s, unsigned char *buf)
61{
62 int i,rc;
63 buf[0]=0x80; // start at register 0 with auto-increment
64 if (1 != (rc = i2c_master_send(i2c_client_s,buf,1)))
65 v4l_err(i2c_client_s,"i2c i/o error: rc == %d (should be 1)\n",rc);
66
67 for(i=0;i<65;i++)
68 buf[i]=0;
69 if (65 != (rc=i2c_master_recv(i2c_client_s,buf,65)))
70 v4l_err(i2c_client_s,"i2c i/o error: rc == %d (should be 65)\n",rc);
71
72 // Note: On READ the first byte is the current index
73 // (e.g. 0x80, what we just wrote)
74
75 if(debug>1) {
76 int i;
77 v4l_dbg(2, debug,i2c_client_s,"hexdump:");
78 for(i=1;i<65;i++) {
79 if(i!=1) {
80 if(((i-1)%8)==0) printk(" ");
81 if(((i-1)%16)==0) {
82 printk("\n");
83 v4l_dbg(2, debug,i2c_client_s,"hexdump:");
84 }
85 }
86 printk(" %02x",buf[i]);
87 }
88 printk("\n");
89 }
90 return 0;
91}
92
93// Return: 1 (is a bt832), 0 (No bt832 here)
94int bt832_init(struct i2c_client *i2c_client_s)
95{
96 unsigned char *buf;
97 int rc;
98
99 buf=kmalloc(65,GFP_KERNEL);
100 if (!buf) {
101 v4l_err(&t->client,
102 "Unable to allocate memory. Detaching.\n");
103 return 0;
104 }
105 bt832_hexdump(i2c_client_s,buf);
106
107 if(buf[0x40] != 0x31) {
108 v4l_err(i2c_client_s,"This i2c chip is no bt832 (id=%02x). Detaching.\n",buf[0x40]);
109 kfree(buf);
110 return 0;
111 }
112
113 v4l_err(i2c_client_s,"Write 0 tp VPSTATUS\n");
114 buf[0]=BT832_VP_STATUS; // Reg.52
115 buf[1]= 0x00;
116 if (2 != (rc = i2c_master_send(i2c_client_s,buf,2)))
117 v4l_err(i2c_client_s,"i2c i/o error VPS: rc == %d (should be 2)\n",rc);
118
119 bt832_hexdump(i2c_client_s,buf);
120
121
122 // Leave low power mode:
123 v4l_err(i2c_client_s,"leave low power mode.\n");
124 buf[0]=BT832_CAM_SETUP0; //0x39 57
125 buf[1]=0x08;
126 if (2 != (rc = i2c_master_send(i2c_client_s,buf,2)))
127 v4l_err(i2c_client_s,"i2c i/o error LLPM: rc == %d (should be 2)\n",rc);
128
129 bt832_hexdump(i2c_client_s,buf);
130
131 v4l_info(i2c_client_s,"Write 0 tp VPSTATUS\n");
132 buf[0]=BT832_VP_STATUS; // Reg.52
133 buf[1]= 0x00;
134 if (2 != (rc = i2c_master_send(i2c_client_s,buf,2)))
135 v4l_err(i2c_client_s,"i2c i/o error VPS: rc == %d (should be 2)\n",rc);
136
137 bt832_hexdump(i2c_client_s,buf);
138
139
140 // Enable Output
141 v4l_info(i2c_client_s,"Enable Output\n");
142 buf[0]=BT832_VP_CONTROL1; // Reg.40
143 buf[1]= 0x27 & (~0x01); // Default | !skip
144 if (2 != (rc = i2c_master_send(i2c_client_s,buf,2)))
145 v4l_err(i2c_client_s,"i2c i/o error EO: rc == %d (should be 2)\n",rc);
146
147 bt832_hexdump(i2c_client_s,buf);
148
149
150 // for testing (even works when no camera attached)
151 v4l_info(i2c_client_s,"*** Generate NTSC M Bars *****\n");
152 buf[0]=BT832_VP_TESTCONTROL0; // Reg. 42
153 buf[1]=3; // Generate NTSC System M bars, Generate Frame timing internally
154 if (2 != (rc = i2c_master_send(i2c_client_s,buf,2)))
155 v4l_info(i2c_client_s,"i2c i/o error MBAR: rc == %d (should be 2)\n",rc);
156
157 v4l_info(i2c_client_s,"Camera Present: %s\n",
158 (buf[1+BT832_CAM_STATUS] & BT832_56_CAMERA_PRESENT) ? "yes":"no");
159
160 bt832_hexdump(i2c_client_s,buf);
161 kfree(buf);
162 return 1;
163}
164
165
166
167static int bt832_attach(struct i2c_adapter *adap, int addr, int kind)
168{
169 struct bt832 *t;
170
171 client_template.adapter = adap;
172 client_template.addr = addr;
173
174 if (NULL == (t = kzalloc(sizeof(*t), GFP_KERNEL)))
175 return -ENOMEM;
176 t->client = client_template;
177 i2c_set_clientdata(&t->client, t);
178 i2c_attach_client(&t->client);
179
180 v4l_info(&t->client,"chip found @ 0x%x\n", addr<<1);
181
182 if(! bt832_init(&t->client)) {
183 bt832_detach(&t->client);
184 return -1;
185 }
186
187 return 0;
188}
189
190static int bt832_probe(struct i2c_adapter *adap)
191{
192 if (adap->class & I2C_CLASS_TV_ANALOG)
193 return i2c_probe(adap, &addr_data, bt832_attach);
194 return 0;
195}
196
197static int bt832_detach(struct i2c_client *client)
198{
199 struct bt832 *t = i2c_get_clientdata(client);
200
201 v4l_info(&t->client,"dettach\n");
202 i2c_detach_client(client);
203 kfree(t);
204 return 0;
205}
206
207static int
208bt832_command(struct i2c_client *client, unsigned int cmd, void *arg)
209{
210 struct bt832 *t = i2c_get_clientdata(client);
211
212 if (debug>1)
213 v4l_i2c_print_ioctl(&t->client,cmd);
214
215 switch (cmd) {
216 case BT832_HEXDUMP: {
217 unsigned char *buf;
218 buf = kmalloc(65, GFP_KERNEL);
219 if (!buf) {
220 v4l_err(&t->client,
221 "Unable to allocate memory\n");
222 break;
223 }
224 bt832_hexdump(&t->client,buf);
225 kfree(buf);
226 }
227 break;
228 case BT832_REATTACH:
229 v4l_info(&t->client,"re-attach\n");
230 i2c_del_driver(&driver);
231 i2c_add_driver(&driver);
232 break;
233 }
234 return 0;
235}
236
237/* ----------------------------------------------------------------------- */
238
239static struct i2c_driver driver = {
240 .driver = {
241 .name = "bt832",
242 },
243 .id = 0, /* FIXME */
244 .attach_adapter = bt832_probe,
245 .detach_client = bt832_detach,
246 .command = bt832_command,
247};
248static struct i2c_client client_template =
249{
250 .name = "bt832",
251 .driver = &driver,
252};
253
254
255static int __init bt832_init_module(void)
256{
257 return i2c_add_driver(&driver);
258}
259
260static void __exit bt832_cleanup_module(void)
261{
262 i2c_del_driver(&driver);
263}
264
265module_init(bt832_init_module);
266module_exit(bt832_cleanup_module);
267
268/*
269 * Overrides for Emacs so that we follow Linus's tabbing style.
270 * ---------------------------------------------------------------------------
271 * Local variables:
272 * c-basic-offset: 8
273 * End:
274 */
diff --git a/drivers/media/video/bt8xx/bt832.h b/drivers/media/video/bt8xx/bt832.h
deleted file mode 100644
index 1ce8fa71f7db..000000000000
--- a/drivers/media/video/bt8xx/bt832.h
+++ /dev/null
@@ -1,305 +0,0 @@
1/* Bt832 CMOS Camera Video Processor (VP)
2
3 The Bt832 CMOS Camera Video Processor chip connects a Quartsight CMOS
4 color digital camera directly to video capture devices via an 8-bit,
5 4:2:2 YUV or YCrCb video interface.
6
7 i2c addresses: 0x88 or 0x8a
8 */
9
10/* The 64 registers: */
11
12// Input Processor
13#define BT832_OFFSET 0
14#define BT832_RCOMP 1
15#define BT832_G1COMP 2
16#define BT832_G2COMP 3
17#define BT832_BCOMP 4
18// Exposures:
19#define BT832_FINEH 5
20#define BT832_FINEL 6
21#define BT832_COARSEH 7
22#define BT832_COARSEL 8
23#define BT832_CAMGAIN 9
24// Main Processor:
25#define BT832_M00 10
26#define BT832_M01 11
27#define BT832_M02 12
28#define BT832_M10 13
29#define BT832_M11 14
30#define BT832_M12 15
31#define BT832_M20 16
32#define BT832_M21 17
33#define BT832_M22 18
34#define BT832_APCOR 19
35#define BT832_GAMCOR 20
36// Level Accumulator Inputs
37#define BT832_VPCONTROL2 21
38#define BT832_ZONECODE0 22
39#define BT832_ZONECODE1 23
40#define BT832_ZONECODE2 24
41#define BT832_ZONECODE3 25
42// Level Accumulator Outputs:
43#define BT832_RACC 26
44#define BT832_GACC 27
45#define BT832_BACC 28
46#define BT832_BLACKACC 29
47#define BT832_EXP_AGC 30
48#define BT832_LACC0 31
49#define BT832_LACC1 32
50#define BT832_LACC2 33
51#define BT832_LACC3 34
52#define BT832_LACC4 35
53#define BT832_LACC5 36
54#define BT832_LACC6 37
55#define BT832_LACC7 38
56// System:
57#define BT832_VP_CONTROL0 39
58#define BT832_VP_CONTROL1 40
59#define BT832_THRESH 41
60#define BT832_VP_TESTCONTROL0 42
61#define BT832_VP_DMCODE 43
62#define BT832_ACB_CONFIG 44
63#define BT832_ACB_GNBASE 45
64#define BT832_ACB_MU 46
65#define BT832_CAM_TEST0 47
66#define BT832_AEC_CONFIG 48
67#define BT832_AEC_TL 49
68#define BT832_AEC_TC 50
69#define BT832_AEC_TH 51
70// Status:
71#define BT832_VP_STATUS 52
72#define BT832_VP_LINECOUNT 53
73#define BT832_CAM_DEVICEL 54 // e.g. 0x19
74#define BT832_CAM_DEVICEH 55 // e.g. 0x40 == 0x194 Mask0, 0x194 = 404 decimal (VVL-404 camera)
75#define BT832_CAM_STATUS 56
76 #define BT832_56_CAMERA_PRESENT 0x20
77//Camera Setups:
78#define BT832_CAM_SETUP0 57
79#define BT832_CAM_SETUP1 58
80#define BT832_CAM_SETUP2 59
81#define BT832_CAM_SETUP3 60
82// System:
83#define BT832_DEFCOR 61
84#define BT832_VP_TESTCONTROL1 62
85#define BT832_DEVICE_ID 63
86# define BT832_DEVICE_ID__31 0x31 // Bt832 has ID 0x31
87
88/* STMicroelectronivcs VV5404 camera module
89 i2c: 0x20: sensor address
90 i2c: 0xa0: eeprom for ccd defect map
91 */
92#define VV5404_device_h 0x00 // 0x19
93#define VV5404_device_l 0x01 // 0x40
94#define VV5404_status0 0x02
95#define VV5404_linecountc 0x03 // current line counter
96#define VV5404_linecountl 0x04
97#define VV5404_setup0 0x10
98#define VV5404_setup1 0x11
99#define VV5404_setup2 0x12
100#define VV5404_setup4 0x14
101#define VV5404_setup5 0x15
102#define VV5404_fine_h 0x20 // fine exposure
103#define VV5404_fine_l 0x21
104#define VV5404_coarse_h 0x22 //coarse exposure
105#define VV5404_coarse_l 0x23
106#define VV5404_gain 0x24 // ADC pre-amp gain setting
107#define VV5404_clk_div 0x25
108#define VV5404_cr 0x76 // control register
109#define VV5404_as0 0x77 // ADC setup register
110
111
112// IOCTL
113#define BT832_HEXDUMP _IOR('b',1,int)
114#define BT832_REATTACH _IOR('b',2,int)
115
116/* from BT8x8VXD/capdrv/dialogs.cpp */
117
118/*
119typedef enum { SVI, Logitech, Rockwell } CAMERA;
120
121static COMBOBOX_ENTRY gwCameraOptions[] =
122{
123 { SVI, "Silicon Vision 512N" },
124 { Logitech, "Logitech VideoMan 1.3" },
125 { Rockwell, "Rockwell QuartzSight PCI 1.0" }
126};
127
128// SRAM table values
129//===========================================================================
130typedef enum { TGB_NTSC624, TGB_NTSC780, TGB_NTSC858, TGB_NTSC392 } TimeGenByte;
131
132BYTE SRAMTable[][ 60 ] =
133{
134 // TGB_NTSC624
135 {
136 0x33, // size of table = 51
137 0x0E, 0xC0, 0x00, 0x00, 0x90, 0x02, 0x03, 0x10, 0x03, 0x06,
138 0x10, 0x04, 0x12, 0x12, 0x05, 0x02, 0x13, 0x04, 0x19, 0x00,
139 0x04, 0x39, 0x00, 0x06, 0x59, 0x08, 0x03, 0x85, 0x08, 0x07,
140 0x03, 0x50, 0x00, 0x91, 0x40, 0x00, 0x11, 0x01, 0x01, 0x4D,
141 0x0D, 0x02, 0x03, 0x11, 0x01, 0x05, 0x37, 0x00, 0x37, 0x21, 0x00
142 },
143 // TGB_NTSC780
144 {
145 0x33, // size of table = 51
146 0x0e, 0xc0, 0x00, 0x00, 0x90, 0xe2, 0x03, 0x10, 0x03, 0x06,
147 0x10, 0x34, 0x12, 0x12, 0x65, 0x02, 0x13, 0x24, 0x19, 0x00,
148 0x24, 0x39, 0x00, 0x96, 0x59, 0x08, 0x93, 0x85, 0x08, 0x97,
149 0x03, 0x50, 0x50, 0xaf, 0x40, 0x30, 0x5f, 0x01, 0xf1, 0x7f,
150 0x0d, 0xf2, 0x03, 0x11, 0xf1, 0x05, 0x37, 0x30, 0x85, 0x21, 0x50
151 },
152 // TGB_NTSC858
153 {
154 0x33, // size of table = 51
155 0x0c, 0xc0, 0x00, 0x00, 0x90, 0xc2, 0x03, 0x10, 0x03, 0x06,
156 0x10, 0x34, 0x12, 0x12, 0x65, 0x02, 0x13, 0x24, 0x19, 0x00,
157 0x24, 0x39, 0x00, 0x96, 0x59, 0x08, 0x93, 0x83, 0x08, 0x97,
158 0x03, 0x50, 0x30, 0xc0, 0x40, 0x30, 0x86, 0x01, 0x01, 0xa6,
159 0x0d, 0x62, 0x03, 0x11, 0x61, 0x05, 0x37, 0x30, 0xac, 0x21, 0x50
160 },
161 // TGB_NTSC392
162 // This table has been modified to be used for Fusion Rev D
163 {
164 0x2A, // size of table = 42
165 0x06, 0x08, 0x04, 0x0a, 0xc0, 0x00, 0x18, 0x08, 0x03, 0x24,
166 0x08, 0x07, 0x02, 0x90, 0x02, 0x08, 0x10, 0x04, 0x0c, 0x10,
167 0x05, 0x2c, 0x11, 0x04, 0x55, 0x48, 0x00, 0x05, 0x50, 0x00,
168 0xbf, 0x0c, 0x02, 0x2f, 0x3d, 0x00, 0x2f, 0x3f, 0x00, 0xc3,
169 0x20, 0x00
170 }
171};
172
173//===========================================================================
174// This is the structure of the camera specifications
175//===========================================================================
176typedef struct tag_cameraSpec
177{
178 SignalFormat signal; // which digital signal format the camera has
179 VideoFormat vidFormat; // video standard
180 SyncVideoRef syncRef; // which sync video reference is used
181 State syncOutput; // enable sync output for sync video input?
182 DecInputClk iClk; // which input clock is used
183 TimeGenByte tgb; // which timing generator byte does the camera use
184 int HReset; // select 64, 48, 32, or 16 CLKx1 for HReset
185 PLLFreq pllFreq; // what synthesized frequency to set PLL to
186 VSIZEPARMS vSize; // video size the camera produces
187 int lineCount; // expected total number of half-line per frame - 1
188 BOOL interlace; // interlace signal?
189} CameraSpec;
190
191//===========================================================================
192// <UPDATE REQUIRED>
193// Camera specifications database. Update this table whenever camera spec
194// has been changed or added/deleted supported camera models
195//===========================================================================
196static CameraSpec dbCameraSpec[ N_CAMERAOPTIONS ] =
197{ // Silicon Vision 512N
198 { Signal_CCIR656, VFormat_NTSC, VRef_alignedCb, Off, DecClk_GPCLK, TGB_NTSC624, 64, KHz19636,
199 // Clkx1_HACTIVE, Clkx1_HDELAY, VActive, VDelay, linesPerField; lineCount, Interlace
200 { 512, 0x64, 480, 0x13, 240 }, 0, TRUE
201 },
202 // Logitech VideoMan 1.3
203 { Signal_CCIR656, VFormat_NTSC, VRef_alignedCb, Off, DecClk_GPCLK, TGB_NTSC780, 64, KHz24545,
204 // Clkx1_HACTIVE, Clkx1_HDELAY, VActive, VDelay, linesPerField; lineCount, Interlace
205 { 640, 0x80, 480, 0x1A, 240 }, 0, TRUE
206 },
207 // Rockwell QuartzSight
208 // Note: Fusion Rev D (rev ID 0x02) and later supports 16 pixels for HReset which is preferable.
209 // Use 32 for earlier version of hardware. Clkx1_HDELAY also changed from 0x27 to 0x20.
210 { Signal_CCIR656, VFormat_NTSC, VRef_alignedCb, Off, DecClk_GPCLK, TGB_NTSC392, 16, KHz28636,
211 // Clkx1_HACTIVE, Clkx1_HDELAY, VActive, VDelay, linesPerField; lineCount, Interlace
212 { 352, 0x20, 576, 0x08, 288 }, 607, FALSE
213 }
214};
215*/
216
217/*
218The corresponding APIs required to be invoked are:
219SetConnector( ConCamera, TRUE/FALSE );
220SetSignalFormat( spec.signal );
221SetVideoFormat( spec.vidFormat );
222SetSyncVideoRef( spec.syncRef );
223SetEnableSyncOutput( spec.syncOutput );
224SetTimGenByte( SRAMTable[ spec.tgb ], SRAMTableSize[ spec.tgb ] );
225SetHReset( spec.HReset );
226SetPLL( spec.pllFreq );
227SetDecInputClock( spec.iClk );
228SetVideoInfo( spec.vSize );
229SetTotalLineCount( spec.lineCount );
230SetInterlaceMode( spec.interlace );
231*/
232
233/* from web:
234 Video Sampling
235Digital video is a sampled form of analog video. The most common sampling schemes in use today are:
236 Pixel Clock Horiz Horiz Vert
237 Rate Total Active
238NTSC square pixel 12.27 MHz 780 640 525
239NTSC CCIR-601 13.5 MHz 858 720 525
240NTSC 4FSc 14.32 MHz 910 768 525
241PAL square pixel 14.75 MHz 944 768 625
242PAL CCIR-601 13.5 MHz 864 720 625
243PAL 4FSc 17.72 MHz 1135 948 625
244
245For the CCIR-601 standards, the sampling is based on a static orthogonal sampling grid. The luminance component (Y) is sampled at 13.5 MHz, while the two color difference signals, Cr and Cb are sampled at half that, or 6.75 MHz. The Cr and Cb samples are colocated with alternate Y samples, and they are taken at the same position on each line, such that one sample is coincident with the 50% point of the falling edge of analog sync. The samples are coded to either 8 or 10 bits per component.
246*/
247
248/* from DScaler:*/
249/*
250//===========================================================================
251// CCIR656 Digital Input Support: The tables were taken from DScaler proyect
252//
253// 13 Dec 2000 - Michael Eskin, Conexant Systems - Initial version
254//
255
256//===========================================================================
257// Timing generator SRAM table values for CCIR601 720x480 NTSC
258//===========================================================================
259// For NTSC CCIR656
260BYTE BtCard::SRAMTable_NTSC[] =
261{
262 // SRAM Timing Table for NTSC
263 0x0c, 0xc0, 0x00,
264 0x00, 0x90, 0xc2,
265 0x03, 0x10, 0x03,
266 0x06, 0x10, 0x34,
267 0x12, 0x12, 0x65,
268 0x02, 0x13, 0x24,
269 0x19, 0x00, 0x24,
270 0x39, 0x00, 0x96,
271 0x59, 0x08, 0x93,
272 0x83, 0x08, 0x97,
273 0x03, 0x50, 0x30,
274 0xc0, 0x40, 0x30,
275 0x86, 0x01, 0x01,
276 0xa6, 0x0d, 0x62,
277 0x03, 0x11, 0x61,
278 0x05, 0x37, 0x30,
279 0xac, 0x21, 0x50
280};
281
282//===========================================================================
283// Timing generator SRAM table values for CCIR601 720x576 NTSC
284//===========================================================================
285// For PAL CCIR656
286BYTE BtCard::SRAMTable_PAL[] =
287{
288 // SRAM Timing Table for PAL
289 0x36, 0x11, 0x01,
290 0x00, 0x90, 0x02,
291 0x05, 0x10, 0x04,
292 0x16, 0x14, 0x05,
293 0x11, 0x00, 0x04,
294 0x12, 0xc0, 0x00,
295 0x31, 0x00, 0x06,
296 0x51, 0x08, 0x03,
297 0x89, 0x08, 0x07,
298 0xc0, 0x44, 0x00,
299 0x81, 0x01, 0x01,
300 0xa9, 0x0d, 0x02,
301 0x02, 0x50, 0x03,
302 0x37, 0x3d, 0x00,
303 0xaf, 0x21, 0x00,
304};
305*/
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index 8629b77666f6..d24dcc025e37 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -44,7 +44,6 @@
44 44
45/* fwd decl */ 45/* fwd decl */
46static void boot_msp34xx(struct bttv *btv, int pin); 46static void boot_msp34xx(struct bttv *btv, int pin);
47static void boot_bt832(struct bttv *btv);
48static void hauppauge_eeprom(struct bttv *btv); 47static void hauppauge_eeprom(struct bttv *btv);
49static void avermedia_eeprom(struct bttv *btv); 48static void avermedia_eeprom(struct bttv *btv);
50static void osprey_eeprom(struct bttv *btv, const u8 ee[256]); 49static void osprey_eeprom(struct bttv *btv, const u8 ee[256]);
@@ -3721,13 +3720,6 @@ void __devinit bttv_init_card2(struct bttv *btv)
3721 if (bttv_tvcards[btv->c.type].audio_mode_gpio) 3720 if (bttv_tvcards[btv->c.type].audio_mode_gpio)
3722 btv->audio_mode_gpio=bttv_tvcards[btv->c.type].audio_mode_gpio; 3721 btv->audio_mode_gpio=bttv_tvcards[btv->c.type].audio_mode_gpio;
3723 3722
3724 if (bttv_tvcards[btv->c.type].digital_mode == DIGITAL_MODE_CAMERA) {
3725 /* detect Bt832 chip for quartzsight digital camera */
3726 if ((bttv_I2CRead(btv, I2C_ADDR_BT832_ALT1, "Bt832") >=0) ||
3727 (bttv_I2CRead(btv, I2C_ADDR_BT832_ALT2, "Bt832") >=0))
3728 boot_bt832(btv);
3729 }
3730
3731 if (!autoload) 3723 if (!autoload)
3732 return; 3724 return;
3733 3725
@@ -4123,10 +4115,6 @@ static void __devinit boot_msp34xx(struct bttv *btv, int pin)
4123 "init [%d]\n", btv->c.nr, pin); 4115 "init [%d]\n", btv->c.nr, pin);
4124} 4116}
4125 4117
4126static void __devinit boot_bt832(struct bttv *btv)
4127{
4128}
4129
4130/* ----------------------------------------------------------------------- */ 4118/* ----------------------------------------------------------------------- */
4131/* Imagenation L-Model PXC200 Framegrabber */ 4119/* Imagenation L-Model PXC200 Framegrabber */
4132/* This is basically the same procedure as 4120/* This is basically the same procedure as
diff --git a/include/media/i2c-addr.h b/include/media/i2c-addr.h
index e7ff44a35ca0..5d0f56054d26 100644
--- a/include/media/i2c-addr.h
+++ b/include/media/i2c-addr.h
@@ -12,8 +12,6 @@
12/* bttv address list */ 12/* bttv address list */
13#define I2C_ADDR_TSA5522 0xc2 13#define I2C_ADDR_TSA5522 0xc2
14#define I2C_ADDR_TDA7432 0x8a 14#define I2C_ADDR_TDA7432 0x8a
15#define I2C_ADDR_BT832_ALT1 0x88
16#define I2C_ADDR_BT832_ALT2 0x8a // alternate setting
17#define I2C_ADDR_TDA8425 0x82 15#define I2C_ADDR_TDA8425 0x82
18#define I2C_ADDR_TDA9840 0x84 16#define I2C_ADDR_TDA9840 0x84
19#define I2C_ADDR_TDA9850 0xb6 /* also used by 9855,9873 */ 17#define I2C_ADDR_TDA9850 0xb6 /* also used by 9855,9873 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 06:21:49 -0500