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authorDmitry Baryshkov <dbaryshkov@gmail.com>2008-07-26 23:23:31 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-27 04:46:18 -0400
commit6cab48602996cdbcb277375a8107d53e21e8c9b9 (patch)
tree5a1c8aaf3eed2d5a53170ab69daa94088947d43d
parentd9ecdb282c91952796b7542c4f57fd6de6948d7b (diff)
[ARM] 5179/1: Replace obsolete IRQT_* and __IRQT_* values with IRQ_TYPE_*
IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1]. Remove them completely. Sed script for the reference: s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_PROBE/IRQ_TYPE_PROBE/g s/IRQT_NOEDGE/IRQ_TYPE_NONE/g Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat
-rw-r--r--Documentation/arm/Interrupts10
-rw-r--r--arch/arm/common/locomo.c10
-rw-r--r--arch/arm/common/sa1111.c14
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c6
-rw-r--r--arch/arm/mach-at91/irq.c8
-rw-r--r--arch/arm/mach-ep93xx/core.c14
-rw-r--r--arch/arm/mach-imx/irq.c12
-rw-r--r--arch/arm/mach-ixp2000/core.c8
-rw-r--r--arch/arm/mach-ixp23xx/core.c10
-rw-r--r--arch/arm/mach-ixp23xx/roadrunner.c4
-rw-r--r--arch/arm/mach-ixp4xx/avila-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/common.c10
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-pci.c12
-rw-r--r--arch/arm/mach-ixp4xx/fsg-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-pci.c10
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-pci.c4
-rw-r--r--arch/arm/mach-ks8695/irq.c10
-rw-r--r--arch/arm/mach-netx/generic.c8
-rw-r--r--arch/arm/mach-omap1/board-osk.c6
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c4
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c8
-rw-r--r--arch/arm/mach-omap1/fpga.c2
-rw-r--r--arch/arm/mach-omap2/board-apollon.c6
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c4
-rw-r--r--arch/arm/mach-orion5x/irq.c12
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c4
-rw-r--r--arch/arm/mach-pnx4008/irq.c10
-rw-r--r--arch/arm/mach-pxa/cm-x270-pci.c2
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c8
-rw-r--r--arch/arm/mach-pxa/trizeps4.c2
-rw-r--r--arch/arm/mach-sa1100/cerf.c2
-rw-r--r--arch/arm/mach-sa1100/h3600.c2
-rw-r--r--arch/arm/mach-sa1100/irq.c8
-rw-r--r--arch/arm/mach-sa1100/neponset.c2
-rw-r--r--arch/arm/mach-sa1100/pleb.c2
-rw-r--r--arch/arm/plat-mxc/gpio.c10
-rw-r--r--arch/arm/plat-omap/gpio.c28
-rw-r--r--arch/arm/plat-s3c24xx/irq.c12
-rw-r--r--drivers/ata/pata_ixp4xx_cf.c2
-rw-r--r--drivers/input/touchscreen/corgi_ts.c8
-rw-r--r--drivers/input/touchscreen/mainstone-wm97xx.c2
-rw-r--r--drivers/mfd/asic3.c14
-rw-r--r--drivers/mfd/tc6393xb.c2
-rw-r--r--drivers/pcmcia/soc_common.c12
-rw-r--r--drivers/video/am200epd.c2
-rw-r--r--drivers/video/omap/sossi.c2
-rw-r--r--include/asm-arm/arch-pnx4008/irqs.h48
-rw-r--r--include/asm-arm/arch-pxa/idp.h10
-rw-r--r--include/asm-arm/arch-pxa/pcm990_baseboard.h14
-rw-r--r--include/asm-arm/arch-sa1100/ide.h2
-rw-r--r--include/asm-arm/irq.h17
61 files changed, 227 insertions, 250 deletions
diff --git a/Documentation/arm/Interrupts b/Documentation/arm/Interrupts
index 0d3dbf1099bc..c202ed35d7d6 100644
--- a/Documentation/arm/Interrupts
+++ b/Documentation/arm/Interrupts
@@ -138,14 +138,8 @@ So, what's changed?
138 138
139 Set active the IRQ edge(s)/level. This replaces the 139 Set active the IRQ edge(s)/level. This replaces the
140 SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge() 140 SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
141 function. Type should be one of the following: 141 function. Type should be one of IRQ_TYPE_xxx defined in
142 142 <linux/irq.h>
143 #define IRQT_NOEDGE (0)
144 #define IRQT_RISING (__IRQT_RISEDGE)
145 #define IRQT_FALLING (__IRQT_FALEDGE)
146 #define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
147 #define IRQT_LOW (__IRQT_LOWLVL)
148 #define IRQT_HIGH (__IRQT_HIGHLVL)
149 143
1503. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type. 1443. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.
151 145
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index c3c3a3339049..85579654d3b7 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -331,17 +331,17 @@ static int locomo_gpio_type(unsigned int irq, unsigned int type)
331 331
332 mask = 1 << (irq - LOCOMO_IRQ_GPIO_START); 332 mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
333 333
334 if (type == IRQT_PROBE) { 334 if (type == IRQ_TYPE_PROBE) {
335 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) 335 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
336 return 0; 336 return 0;
337 type = __IRQT_RISEDGE | __IRQT_FALEDGE; 337 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
338 } 338 }
339 339
340 if (type & __IRQT_RISEDGE) 340 if (type & IRQ_TYPE_EDGE_RISING)
341 GPIO_IRQ_rising_edge |= mask; 341 GPIO_IRQ_rising_edge |= mask;
342 else 342 else
343 GPIO_IRQ_rising_edge &= ~mask; 343 GPIO_IRQ_rising_edge &= ~mask;
344 if (type & __IRQT_FALEDGE) 344 if (type & IRQ_TYPE_EDGE_FALLING)
345 GPIO_IRQ_falling_edge |= mask; 345 GPIO_IRQ_falling_edge |= mask;
346 else 346 else
347 GPIO_IRQ_falling_edge &= ~mask; 347 GPIO_IRQ_falling_edge &= ~mask;
@@ -473,7 +473,7 @@ static void locomo_setup_irq(struct locomo *lchip)
473 /* 473 /*
474 * Install handler for IRQ_LOCOMO_HW. 474 * Install handler for IRQ_LOCOMO_HW.
475 */ 475 */
476 set_irq_type(lchip->irq, IRQT_FALLING); 476 set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
477 set_irq_chip_data(lchip->irq, irqbase); 477 set_irq_chip_data(lchip->irq, irqbase);
478 set_irq_chained_handler(lchip->irq, locomo_handler); 478 set_irq_chained_handler(lchip->irq, locomo_handler);
479 479
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 0a8e1ff2af8a..f6d3fdda7067 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -241,14 +241,14 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
241 void __iomem *mapbase = get_irq_chip_data(irq); 241 void __iomem *mapbase = get_irq_chip_data(irq);
242 unsigned long ip0; 242 unsigned long ip0;
243 243
244 if (flags == IRQT_PROBE) 244 if (flags == IRQ_TYPE_PROBE)
245 return 0; 245 return 0;
246 246
247 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) 247 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
248 return -EINVAL; 248 return -EINVAL;
249 249
250 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 250 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
251 if (flags & __IRQT_RISEDGE) 251 if (flags & IRQ_TYPE_EDGE_RISING)
252 ip0 &= ~mask; 252 ip0 &= ~mask;
253 else 253 else
254 ip0 |= mask; 254 ip0 |= mask;
@@ -338,14 +338,14 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
338 void __iomem *mapbase = get_irq_chip_data(irq); 338 void __iomem *mapbase = get_irq_chip_data(irq);
339 unsigned long ip1; 339 unsigned long ip1;
340 340
341 if (flags == IRQT_PROBE) 341 if (flags == IRQ_TYPE_PROBE)
342 return 0; 342 return 0;
343 343
344 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) 344 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
345 return -EINVAL; 345 return -EINVAL;
346 346
347 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 347 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
348 if (flags & __IRQT_RISEDGE) 348 if (flags & IRQ_TYPE_EDGE_RISING)
349 ip1 &= ~mask; 349 ip1 &= ~mask;
350 else 350 else
351 ip1 |= mask; 351 ip1 |= mask;
@@ -427,7 +427,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
427 /* 427 /*
428 * Register SA1111 interrupt 428 * Register SA1111 interrupt
429 */ 429 */
430 set_irq_type(sachip->irq, IRQT_RISING); 430 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
431 set_irq_data(sachip->irq, irqbase); 431 set_irq_data(sachip->irq, irqbase);
432 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 432 set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
433} 433}
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 8a2a958639db..b4b67eb1cbcb 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -330,10 +330,10 @@ static void __init cap9adk_board_init(void)
330 /* Serial */ 330 /* Serial */
331 at91_add_device_serial(); 331 at91_add_device_serial();
332 /* USB Host */ 332 /* USB Host */
333 set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH); 333 set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
334 at91_add_device_usbh(&cap9adk_usbh_data); 334 at91_add_device_usbh(&cap9adk_usbh_data);
335 /* USB HS */ 335 /* USB HS */
336 set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH); 336 set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
337 at91_add_device_usba(&cap9adk_usba_udc_data); 337 at91_add_device_usba(&cap9adk_usba_udc_data);
338 /* SPI */ 338 /* SPI */
339 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); 339 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -350,7 +350,7 @@ static void __init cap9adk_board_init(void)
350 /* I2C */ 350 /* I2C */
351 at91_add_device_i2c(NULL, 0); 351 at91_add_device_i2c(NULL, 0);
352 /* LCD Controller */ 352 /* LCD Controller */
353 set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH); 353 set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
354 at91_add_device_lcdc(&cap9adk_lcdc_data); 354 at91_add_device_lcdc(&cap9adk_lcdc_data);
355 /* AC97 */ 355 /* AC97 */
356 at91_add_device_ac97(&cap9adk_ac97_data); 356 at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 78a5cdb746dc..ca87587b2b4b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -56,19 +56,19 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
56 unsigned int smr, srctype; 56 unsigned int smr, srctype;
57 57
58 switch (type) { 58 switch (type) {
59 case IRQT_HIGH: 59 case IRQ_TYPE_LEVEL_HIGH:
60 srctype = AT91_AIC_SRCTYPE_HIGH; 60 srctype = AT91_AIC_SRCTYPE_HIGH;
61 break; 61 break;
62 case IRQT_RISING: 62 case IRQ_TYPE_EDGE_RISING:
63 srctype = AT91_AIC_SRCTYPE_RISING; 63 srctype = AT91_AIC_SRCTYPE_RISING;
64 break; 64 break;
65 case IRQT_LOW: 65 case IRQ_TYPE_LEVEL_LOW:
66 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ 66 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
67 srctype = AT91_AIC_SRCTYPE_LOW; 67 srctype = AT91_AIC_SRCTYPE_LOW;
68 else 68 else
69 return -EINVAL; 69 return -EINVAL;
70 break; 70 break;
71 case IRQT_FALLING: 71 case IRQ_TYPE_EDGE_FALLING:
72 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ 72 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
73 srctype = AT91_AIC_SRCTYPE_FALLING; 73 srctype = AT91_AIC_SRCTYPE_FALLING;
74 else 74 else
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 1d7bca6aa441..5fed57608507 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -226,7 +226,7 @@ static void ep93xx_gpio_irq_ack(unsigned int irq)
226 int port = line >> 3; 226 int port = line >> 3;
227 int port_mask = 1 << (line & 7); 227 int port_mask = 1 << (line & 7);
228 228
229 if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { 229 if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
230 gpio_int_type2[port] ^= port_mask; /* switch edge direction */ 230 gpio_int_type2[port] ^= port_mask; /* switch edge direction */
231 ep93xx_gpio_update_int_params(port); 231 ep93xx_gpio_update_int_params(port);
232 } 232 }
@@ -240,7 +240,7 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
240 int port = line >> 3; 240 int port = line >> 3;
241 int port_mask = 1 << (line & 7); 241 int port_mask = 1 << (line & 7);
242 242
243 if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) 243 if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
244 gpio_int_type2[port] ^= port_mask; /* switch edge direction */ 244 gpio_int_type2[port] ^= port_mask; /* switch edge direction */
245 245
246 gpio_int_unmasked[port] &= ~port_mask; 246 gpio_int_unmasked[port] &= ~port_mask;
@@ -283,27 +283,27 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
283 gpio_direction_input(gpio); 283 gpio_direction_input(gpio);
284 284
285 switch (type) { 285 switch (type) {
286 case IRQT_RISING: 286 case IRQ_TYPE_EDGE_RISING:
287 gpio_int_type1[port] |= port_mask; 287 gpio_int_type1[port] |= port_mask;
288 gpio_int_type2[port] |= port_mask; 288 gpio_int_type2[port] |= port_mask;
289 desc->handle_irq = handle_edge_irq; 289 desc->handle_irq = handle_edge_irq;
290 break; 290 break;
291 case IRQT_FALLING: 291 case IRQ_TYPE_EDGE_FALLING:
292 gpio_int_type1[port] |= port_mask; 292 gpio_int_type1[port] |= port_mask;
293 gpio_int_type2[port] &= ~port_mask; 293 gpio_int_type2[port] &= ~port_mask;
294 desc->handle_irq = handle_edge_irq; 294 desc->handle_irq = handle_edge_irq;
295 break; 295 break;
296 case IRQT_HIGH: 296 case IRQ_TYPE_LEVEL_HIGH:
297 gpio_int_type1[port] &= ~port_mask; 297 gpio_int_type1[port] &= ~port_mask;
298 gpio_int_type2[port] |= port_mask; 298 gpio_int_type2[port] |= port_mask;
299 desc->handle_irq = handle_level_irq; 299 desc->handle_irq = handle_level_irq;
300 break; 300 break;
301 case IRQT_LOW: 301 case IRQ_TYPE_LEVEL_LOW:
302 gpio_int_type1[port] &= ~port_mask; 302 gpio_int_type1[port] &= ~port_mask;
303 gpio_int_type2[port] &= ~port_mask; 303 gpio_int_type2[port] &= ~port_mask;
304 desc->handle_irq = handle_level_irq; 304 desc->handle_irq = handle_level_irq;
305 break; 305 break;
306 case IRQT_BOTHEDGE: 306 case IRQ_TYPE_EDGE_BOTH:
307 gpio_int_type1[port] |= port_mask; 307 gpio_int_type1[port] |= port_mask;
308 /* set initial polarity based on current input level */ 308 /* set initial polarity based on current input level */
309 if (gpio_get_value(gpio)) 309 if (gpio_get_value(gpio))
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index e6695c4e623b..e1b1f028b930 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -111,7 +111,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
111 reg = irq >> 5; 111 reg = irq >> 5;
112 bit = 1 << (irq % 32); 112 bit = 1 << (irq % 32);
113 113
114 if (type == IRQT_PROBE) { 114 if (type == IRQ_TYPE_PROBE) {
115 /* Don't mess with enabled GPIOs using preconfigured edges or 115 /* Don't mess with enabled GPIOs using preconfigured edges or
116 GPIOs set to alternate function during probe */ 116 GPIOs set to alternate function during probe */
117 /* TODO: support probe */ 117 /* TODO: support probe */
@@ -120,7 +120,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
120// return 0; 120// return 0;
121// if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) 121// if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
122// return 0; 122// return 0;
123// type = __IRQT_RISEDGE | __IRQT_FALEDGE; 123// type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
124 } 124 }
125 125
126 GIUS(reg) |= bit; 126 GIUS(reg) |= bit;
@@ -128,19 +128,19 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
128 128
129 DEBUG_IRQ("setting type of irq %d to ", _irq); 129 DEBUG_IRQ("setting type of irq %d to ", _irq);
130 130
131 if (type & __IRQT_RISEDGE) { 131 if (type & IRQ_TYPE_EDGE_RISING) {
132 DEBUG_IRQ("rising edges\n"); 132 DEBUG_IRQ("rising edges\n");
133 irq_type = 0x0; 133 irq_type = 0x0;
134 } 134 }
135 if (type & __IRQT_FALEDGE) { 135 if (type & IRQ_TYPE_EDGE_FALLING) {
136 DEBUG_IRQ("falling edges\n"); 136 DEBUG_IRQ("falling edges\n");
137 irq_type = 0x1; 137 irq_type = 0x1;
138 } 138 }
139 if (type & __IRQT_LOWLVL) { 139 if (type & IRQ_TYPE_LEVEL_LOW) {
140 DEBUG_IRQ("low level\n"); 140 DEBUG_IRQ("low level\n");
141 irq_type = 0x3; 141 irq_type = 0x3;
142 } 142 }
143 if (type & __IRQT_HIGHLVL) { 143 if (type & IRQ_TYPE_LEVEL_HIGH) {
144 DEBUG_IRQ("high level\n"); 144 DEBUG_IRQ("high level\n");
145 irq_type = 0x2; 145 irq_type = 0x2;
146 } 146 }
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 81cdc8267206..daf28074134b 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -329,19 +329,19 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
329 /* 329 /*
330 * Then, set the proper trigger type. 330 * Then, set the proper trigger type.
331 */ 331 */
332 if (type & IRQT_FALLING) 332 if (type & IRQ_TYPE_EDGE_FALLING)
333 GPIO_IRQ_falling_edge |= 1 << line; 333 GPIO_IRQ_falling_edge |= 1 << line;
334 else 334 else
335 GPIO_IRQ_falling_edge &= ~(1 << line); 335 GPIO_IRQ_falling_edge &= ~(1 << line);
336 if (type & IRQT_RISING) 336 if (type & IRQ_TYPE_EDGE_RISING)
337 GPIO_IRQ_rising_edge |= 1 << line; 337 GPIO_IRQ_rising_edge |= 1 << line;
338 else 338 else
339 GPIO_IRQ_rising_edge &= ~(1 << line); 339 GPIO_IRQ_rising_edge &= ~(1 << line);
340 if (type & IRQT_LOW) 340 if (type & IRQ_TYPE_LEVEL_LOW)
341 GPIO_IRQ_level_low |= 1 << line; 341 GPIO_IRQ_level_low |= 1 << line;
342 else 342 else
343 GPIO_IRQ_level_low &= ~(1 << line); 343 GPIO_IRQ_level_low &= ~(1 << line);
344 if (type & IRQT_HIGH) 344 if (type & IRQ_TYPE_LEVEL_HIGH)
345 GPIO_IRQ_level_high |= 1 << line; 345 GPIO_IRQ_level_high |= 1 << line;
346 else 346 else
347 GPIO_IRQ_level_high &= ~(1 << line); 347 GPIO_IRQ_level_high &= ~(1 << line);
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 5fea5a132939..df16a4eac490 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -126,23 +126,23 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
126 return -EINVAL; 126 return -EINVAL;
127 127
128 switch (type) { 128 switch (type) {
129 case IRQT_BOTHEDGE: 129 case IRQ_TYPE_EDGE_BOTH:
130 int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL; 130 int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;
131 irq_type = IXP23XX_IRQ_EDGE; 131 irq_type = IXP23XX_IRQ_EDGE;
132 break; 132 break;
133 case IRQT_RISING: 133 case IRQ_TYPE_EDGE_RISING:
134 int_style = IXP23XX_GPIO_STYLE_RISING_EDGE; 134 int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;
135 irq_type = IXP23XX_IRQ_EDGE; 135 irq_type = IXP23XX_IRQ_EDGE;
136 break; 136 break;
137 case IRQT_FALLING: 137 case IRQ_TYPE_EDGE_FALLING:
138 int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE; 138 int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;
139 irq_type = IXP23XX_IRQ_EDGE; 139 irq_type = IXP23XX_IRQ_EDGE;
140 break; 140 break;
141 case IRQT_HIGH: 141 case IRQ_TYPE_LEVEL_HIGH:
142 int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH; 142 int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;
143 irq_type = IXP23XX_IRQ_LEVEL; 143 irq_type = IXP23XX_IRQ_LEVEL;
144 break; 144 break;
145 case IRQT_LOW: 145 case IRQ_TYPE_LEVEL_LOW:
146 int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW; 146 int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW;
147 irq_type = IXP23XX_IRQ_LEVEL; 147 irq_type = IXP23XX_IRQ_LEVEL;
148 break; 148 break;
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index f0f70ba1e46d..896ff9f840d9 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
110 110
111static void __init roadrunner_pci_preinit(void) 111static void __init roadrunner_pci_preinit(void)
112{ 112{
113 set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQT_LOW); 113 set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
114 set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQT_LOW); 114 set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
115 115
116 ixp23xx_pci_preinit(); 116 ixp23xx_pci_preinit();
117} 117}
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 3f867691d9f2..c6e044befccb 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -30,10 +30,10 @@
30 30
31void __init avila_pci_preinit(void) 31void __init avila_pci_preinit(void)
32{ 32{
33 set_irq_type(IRQ_AVILA_PCI_INTA, IRQT_LOW); 33 set_irq_type(IRQ_AVILA_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
34 set_irq_type(IRQ_AVILA_PCI_INTB, IRQT_LOW); 34 set_irq_type(IRQ_AVILA_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
35 set_irq_type(IRQ_AVILA_PCI_INTC, IRQT_LOW); 35 set_irq_type(IRQ_AVILA_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
36 set_irq_type(IRQ_AVILA_PCI_INTD, IRQT_LOW); 36 set_irq_type(IRQ_AVILA_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
37 37
38 ixp4xx_pci_preinit(); 38 ixp4xx_pci_preinit();
39} 39}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 3781b3db9f49..3947c506b4f3 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -142,23 +142,23 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
142 return -EINVAL; 142 return -EINVAL;
143 143
144 switch (type){ 144 switch (type){
145 case IRQT_BOTHEDGE: 145 case IRQ_TYPE_EDGE_BOTH:
146 int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL; 146 int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
147 irq_type = IXP4XX_IRQ_EDGE; 147 irq_type = IXP4XX_IRQ_EDGE;
148 break; 148 break;
149 case IRQT_RISING: 149 case IRQ_TYPE_EDGE_RISING:
150 int_style = IXP4XX_GPIO_STYLE_RISING_EDGE; 150 int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
151 irq_type = IXP4XX_IRQ_EDGE; 151 irq_type = IXP4XX_IRQ_EDGE;
152 break; 152 break;
153 case IRQT_FALLING: 153 case IRQ_TYPE_EDGE_FALLING:
154 int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE; 154 int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
155 irq_type = IXP4XX_IRQ_EDGE; 155 irq_type = IXP4XX_IRQ_EDGE;
156 break; 156 break;
157 case IRQT_HIGH: 157 case IRQ_TYPE_LEVEL_HIGH:
158 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH; 158 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
159 irq_type = IXP4XX_IRQ_LEVEL; 159 irq_type = IXP4XX_IRQ_LEVEL;
160 break; 160 break;
161 case IRQT_LOW: 161 case IRQ_TYPE_LEVEL_LOW:
162 int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW; 162 int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
163 irq_type = IXP4XX_IRQ_LEVEL; 163 irq_type = IXP4XX_IRQ_LEVEL;
164 break; 164 break;
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index ad2e5b97966e..be4f4a208b90 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -27,8 +27,8 @@
27 27
28void __init coyote_pci_preinit(void) 28void __init coyote_pci_preinit(void)
29{ 29{
30 set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW); 30 set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQ_TYPE_LEVEL_LOW);
31 set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW); 31 set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQ_TYPE_LEVEL_LOW);
32 32
33 ixp4xx_pci_preinit(); 33 ixp4xx_pci_preinit();
34} 34}
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index 9db7e1f42011..926d15f885fb 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -25,12 +25,12 @@
25 25
26void __init dsmg600_pci_preinit(void) 26void __init dsmg600_pci_preinit(void)
27{ 27{
28 set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW); 28 set_irq_type(IRQ_DSMG600_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW); 29 set_irq_type(IRQ_DSMG600_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
30 set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW); 30 set_irq_type(IRQ_DSMG600_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
31 set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW); 31 set_irq_type(IRQ_DSMG600_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
32 set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW); 32 set_irq_type(IRQ_DSMG600_PCI_INTE, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW); 33 set_irq_type(IRQ_DSMG600_PCI_INTF, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index f19f3f6feda1..ca12a9ca0830 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -25,9 +25,9 @@
25 25
26void __init fsg_pci_preinit(void) 26void __init fsg_pci_preinit(void)
27{ 27{
28 set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW); 28 set_irq_type(IRQ_FSG_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW); 29 set_irq_type(IRQ_FSG_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
30 set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW); 30 set_irq_type(IRQ_FSG_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
31 31
32 ixp4xx_pci_preinit(); 32 ixp4xx_pci_preinit();
33} 33}
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 6abf568322d3..afd1dc14e597 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -29,8 +29,8 @@
29 29
30void __init gateway7001_pci_preinit(void) 30void __init gateway7001_pci_preinit(void)
31{ 31{
32 set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW); 32 set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW); 33 set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index 49dec7868807..20960704183b 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -41,10 +41,10 @@
41 */ 41 */
42void __init gtwx5715_pci_preinit(void) 42void __init gtwx5715_pci_preinit(void)
43{ 43{
44 set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW); 44 set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQ_TYPE_LEVEL_LOW);
45 set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW); 45 set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQ_TYPE_LEVEL_LOW);
46 set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW); 46 set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQ_TYPE_LEVEL_LOW);
47 set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW); 47 set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQ_TYPE_LEVEL_LOW);
48 48
49 ixp4xx_pci_preinit(); 49 ixp4xx_pci_preinit();
50} 50}
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 408796004812..7d9bb4d23104 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -27,10 +27,10 @@
27 27
28void __init ixdp425_pci_preinit(void) 28void __init ixdp425_pci_preinit(void)
29{ 29{
30 set_irq_type(IRQ_IXDP425_PCI_INTA, IRQT_LOW); 30 set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
31 set_irq_type(IRQ_IXDP425_PCI_INTB, IRQT_LOW); 31 set_irq_type(IRQ_IXDP425_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
32 set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW); 32 set_irq_type(IRQ_IXDP425_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW); 33 set_irq_type(IRQ_IXDP425_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index d1e75b7dc3b1..37d9f2e8f602 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -25,8 +25,8 @@
25 25
26void __init ixdpg425_pci_preinit(void) 26void __init ixdpg425_pci_preinit(void)
27{ 27{
28 set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); 28 set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); 29 set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
30 30
31 ixp4xx_pci_preinit(); 31 ixp4xx_pci_preinit();
32} 32}
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index b8ebaf4a9c8e..1088426fdcee 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -24,11 +24,11 @@
24 24
25void __init nas100d_pci_preinit(void) 25void __init nas100d_pci_preinit(void)
26{ 26{
27 set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW); 27 set_irq_type(IRQ_NAS100D_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
28 set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW); 28 set_irq_type(IRQ_NAS100D_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW); 29 set_irq_type(IRQ_NAS100D_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
30 set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW); 30 set_irq_type(IRQ_NAS100D_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
31 set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW); 31 set_irq_type(IRQ_NAS100D_PCI_INTE, IRQ_TYPE_LEVEL_LOW);
32 32
33 ixp4xx_pci_preinit(); 33 ixp4xx_pci_preinit();
34} 34}
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 04661fef97f5..4429b8448b61 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -24,9 +24,9 @@
24 24
25void __init nslu2_pci_preinit(void) 25void __init nslu2_pci_preinit(void)
26{ 26{
27 set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW); 27 set_irq_type(IRQ_NSLU2_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
28 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW); 28 set_irq_type(IRQ_NSLU2_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
29 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW); 29 set_irq_type(IRQ_NSLU2_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
30 30
31 ixp4xx_pci_preinit(); 31 ixp4xx_pci_preinit();
32} 32}
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index 6588f2c758e2..0f00feab67f8 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -29,8 +29,8 @@
29 29
30void __init wg302v2_pci_preinit(void) 30void __init wg302v2_pci_preinit(void)
31{ 31{
32 set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW); 32 set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
33 set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW); 33 set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
34 34
35 ixp4xx_pci_preinit(); 35 ixp4xx_pci_preinit();
36} 36}
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index 4c3ab43e1046..0b06941a1eed 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -72,21 +72,21 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
72 ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); 72 ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
73 73
74 switch (type) { 74 switch (type) {
75 case IRQT_HIGH: 75 case IRQ_TYPE_LEVEL_HIGH:
76 mode = IOPC_TM_HIGH; 76 mode = IOPC_TM_HIGH;
77 level_triggered = 1; 77 level_triggered = 1;
78 break; 78 break;
79 case IRQT_LOW: 79 case IRQ_TYPE_LEVEL_LOW:
80 mode = IOPC_TM_LOW; 80 mode = IOPC_TM_LOW;
81 level_triggered = 1; 81 level_triggered = 1;
82 break; 82 break;
83 case IRQT_RISING: 83 case IRQ_TYPE_EDGE_RISING:
84 mode = IOPC_TM_RISING; 84 mode = IOPC_TM_RISING;
85 break; 85 break;
86 case IRQT_FALLING: 86 case IRQ_TYPE_EDGE_FALLING:
87 mode = IOPC_TM_FALLING; 87 mode = IOPC_TM_FALLING;
88 break; 88 break;
89 case IRQT_BOTHEDGE: 89 case IRQ_TYPE_EDGE_BOTH:
90 mode = IOPC_TM_EDGE; 90 mode = IOPC_TM_EDGE;
91 break; 91 break;
92 default: 92 default:
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index fd7537f7d11e..99d4fb19a08a 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -99,19 +99,19 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type)
99 99
100 irq = _irq - NETX_IRQ_HIF_CHAINED(0); 100 irq = _irq - NETX_IRQ_HIF_CHAINED(0);
101 101
102 if (type & __IRQT_RISEDGE) { 102 if (type & IRQ_TYPE_EDGE_RISING) {
103 DEBUG_IRQ("rising edges\n"); 103 DEBUG_IRQ("rising edges\n");
104 val |= (1 << 26) << irq; 104 val |= (1 << 26) << irq;
105 } 105 }
106 if (type & __IRQT_FALEDGE) { 106 if (type & IRQ_TYPE_EDGE_FALLING) {
107 DEBUG_IRQ("falling edges\n"); 107 DEBUG_IRQ("falling edges\n");
108 val &= ~((1 << 26) << irq); 108 val &= ~((1 << 26) << irq);
109 } 109 }
110 if (type & __IRQT_LOWLVL) { 110 if (type & IRQ_TYPE_LEVEL_LOW) {
111 DEBUG_IRQ("low level\n"); 111 DEBUG_IRQ("low level\n");
112 val &= ~((1 << 26) << irq); 112 val &= ~((1 << 26) << irq);
113 } 113 }
114 if (type & __IRQT_HIGHLVL) { 114 if (type & IRQ_TYPE_LEVEL_HIGH) {
115 DEBUG_IRQ("high level\n"); 115 DEBUG_IRQ("high level\n");
116 val |= (1 << 26) << irq; 116 val |= (1 << 26) << irq;
117 } 117 }
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 845c66371ca3..41f94f6fc15c 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -288,7 +288,7 @@ static void __init osk_init_cf(void)
288 return; 288 return;
289 } 289 }
290 /* the CF I/O IRQ is really active-low */ 290 /* the CF I/O IRQ is really active-low */
291 set_irq_type(OMAP_GPIO_IRQ(62), IRQT_FALLING); 291 set_irq_type(OMAP_GPIO_IRQ(62), IRQ_TYPE_EDGE_FALLING);
292} 292}
293 293
294static void __init osk_init_irq(void) 294static void __init osk_init_irq(void)
@@ -483,7 +483,7 @@ static void __init osk_mistral_init(void)
483 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ 483 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
484 gpio_request(4, "ts_int"); 484 gpio_request(4, "ts_int");
485 gpio_direction_input(4); 485 gpio_direction_input(4);
486 set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING); 486 set_irq_type(OMAP_GPIO_IRQ(4), IRQ_TYPE_EDGE_FALLING);
487 487
488 spi_register_board_info(mistral_boardinfo, 488 spi_register_board_info(mistral_boardinfo,
489 ARRAY_SIZE(mistral_boardinfo)); 489 ARRAY_SIZE(mistral_boardinfo));
@@ -494,7 +494,7 @@ static void __init osk_mistral_init(void)
494 int ret = 0; 494 int ret = 0;
495 495
496 gpio_direction_input(OMAP_MPUIO(2)); 496 gpio_direction_input(OMAP_MPUIO(2));
497 set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQT_RISING); 497 set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQ_TYPE_EDGE_RISING);
498#ifdef CONFIG_PM 498#ifdef CONFIG_PM
499 /* share the IRQ in case someone wants to use the 499 /* share the IRQ in case someone wants to use the
500 * button for more than wakeup from system sleep. 500 * button for more than wakeup from system sleep.
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e020c2774606..34389b63b0ec 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -298,11 +298,11 @@ palmz71_powercable(int irq, void *dev_id)
298 if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) { 298 if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) {
299 printk(KERN_INFO "PM: Power cable connected\n"); 299 printk(KERN_INFO "PM: Power cable connected\n");
300 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 300 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
301 IRQT_FALLING); 301 IRQ_TYPE_EDGE_FALLING);
302 } else { 302 } else {
303 printk(KERN_INFO "PM: Power cable disconnected\n"); 303 printk(KERN_INFO "PM: Power cable disconnected\n");
304 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 304 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
305 IRQT_RISING); 305 IRQ_TYPE_EDGE_RISING);
306 } 306 }
307 return IRQ_HANDLED; 307 return IRQ_HANDLED;
308} 308}
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 5c00b3f39cdd..8948d45a2769 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -186,10 +186,10 @@ static void __init voiceblue_init(void)
186 omap_request_gpio(13); 186 omap_request_gpio(13);
187 omap_request_gpio(14); 187 omap_request_gpio(14);
188 omap_request_gpio(15); 188 omap_request_gpio(15);
189 set_irq_type(OMAP_GPIO_IRQ(12), IRQT_RISING); 189 set_irq_type(OMAP_GPIO_IRQ(12), IRQ_TYPE_EDGE_RISING);
190 set_irq_type(OMAP_GPIO_IRQ(13), IRQT_RISING); 190 set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
191 set_irq_type(OMAP_GPIO_IRQ(14), IRQT_RISING); 191 set_irq_type(OMAP_GPIO_IRQ(14), IRQ_TYPE_EDGE_RISING);
192 set_irq_type(OMAP_GPIO_IRQ(15), IRQT_RISING); 192 set_irq_type(OMAP_GPIO_IRQ(15), IRQ_TYPE_EDGE_RISING);
193 193
194 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); 194 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
195 omap_board_config = voiceblue_config; 195 omap_board_config = voiceblue_config;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 0cf62ef5ecb7..d963125ed755 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -181,7 +181,7 @@ void omap1510_fpga_init_irq(void)
181 */ 181 */
182 omap_request_gpio(13); 182 omap_request_gpio(13);
183 omap_set_gpio_direction(13, 1); 183 omap_set_gpio_direction(13, 1);
184 set_irq_type(OMAP_GPIO_IRQ(13), IRQT_RISING); 184 set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
185 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); 185 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
186} 186}
187 187
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 620fa0f120ee..870b34972d3b 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -337,17 +337,17 @@ static void __init apollon_sw_init(void)
337 omap_request_gpio(SW_DOWN_GPIO58); 337 omap_request_gpio(SW_DOWN_GPIO58);
338 omap_set_gpio_direction(SW_DOWN_GPIO58, 1); 338 omap_set_gpio_direction(SW_DOWN_GPIO58, 1);
339 339
340 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING); 340 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
341 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, 341 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
342 IRQF_SHARED, "enter sw", 342 IRQF_SHARED, "enter sw",
343 &apollon_sw_interrupt)) 343 &apollon_sw_interrupt))
344 return; 344 return;
345 set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING); 345 set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING);
346 if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt, 346 if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
347 IRQF_SHARED, "up sw", 347 IRQF_SHARED, "up sw",
348 &apollon_sw_interrupt)) 348 &apollon_sw_interrupt))
349 return; 349 return;
350 set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING); 350 set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING);
351 if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt, 351 if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
352 IRQF_SHARED, "down sw", 352 IRQF_SHARED, "down sw",
353 &apollon_sw_interrupt)) 353 &apollon_sw_interrupt))
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 88405e74e5e3..40a0bee4fbb3 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN; 213 pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
214 if (gpio_request(pin, "PCI Int1") == 0) { 214 if (gpio_request(pin, "PCI Int1") == 0) {
215 if (gpio_direction_input(pin) == 0) { 215 if (gpio_direction_input(pin) == 0) {
216 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 216 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
217 } else { 217 } else {
218 printk(KERN_ERR "db88f5281_pci_preinit faield to " 218 printk(KERN_ERR "db88f5281_pci_preinit faield to "
219 "set_irq_type pin %d\n", pin); 219 "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; 226 pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
227 if (gpio_request(pin, "PCI Int2") == 0) { 227 if (gpio_request(pin, "PCI Int2") == 0) {
228 if (gpio_direction_input(pin) == 0) { 228 if (gpio_direction_input(pin) == 0) {
229 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 229 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
230 } else { 230 } else {
231 printk(KERN_ERR "db88f5281_pci_preinit faield " 231 printk(KERN_ERR "db88f5281_pci_preinit faield "
232 "to set_irq_type pin %d\n", pin); 232 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index e2a0084ab4a3..9ae3f6dc7839 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -91,27 +91,27 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type)
91 desc = irq_desc + irq; 91 desc = irq_desc + irq;
92 92
93 switch (type) { 93 switch (type) {
94 case IRQT_HIGH: 94 case IRQ_TYPE_LEVEL_HIGH:
95 desc->handle_irq = handle_level_irq; 95 desc->handle_irq = handle_level_irq;
96 desc->status |= IRQ_LEVEL; 96 desc->status |= IRQ_LEVEL;
97 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 97 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
98 break; 98 break;
99 case IRQT_LOW: 99 case IRQ_TYPE_LEVEL_LOW:
100 desc->handle_irq = handle_level_irq; 100 desc->handle_irq = handle_level_irq;
101 desc->status |= IRQ_LEVEL; 101 desc->status |= IRQ_LEVEL;
102 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 102 orion5x_setbits(GPIO_IN_POL, (1 << pin));
103 break; 103 break;
104 case IRQT_RISING: 104 case IRQ_TYPE_EDGE_RISING:
105 desc->handle_irq = handle_edge_irq; 105 desc->handle_irq = handle_edge_irq;
106 desc->status &= ~IRQ_LEVEL; 106 desc->status &= ~IRQ_LEVEL;
107 orion5x_clrbits(GPIO_IN_POL, (1 << pin)); 107 orion5x_clrbits(GPIO_IN_POL, (1 << pin));
108 break; 108 break;
109 case IRQT_FALLING: 109 case IRQ_TYPE_EDGE_FALLING:
110 desc->handle_irq = handle_edge_irq; 110 desc->handle_irq = handle_edge_irq;
111 desc->status &= ~IRQ_LEVEL; 111 desc->status &= ~IRQ_LEVEL;
112 orion5x_setbits(GPIO_IN_POL, (1 << pin)); 112 orion5x_setbits(GPIO_IN_POL, (1 << pin));
113 break; 113 break;
114 case IRQT_BOTHEDGE: 114 case IRQ_TYPE_EDGE_BOTH:
115 desc->handle_irq = handle_edge_irq; 115 desc->handle_irq = handle_edge_irq;
116 desc->status &= ~IRQ_LEVEL; 116 desc->status &= ~IRQ_LEVEL;
117 /* 117 /*
@@ -156,7 +156,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
156 if (cause & (1 << pin)) { 156 if (cause & (1 << pin)) {
157 irq = gpio_to_irq(pin); 157 irq = gpio_to_irq(pin);
158 desc = irq_desc + irq; 158 desc = irq_desc + irq;
159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { 159 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
160 /* Swap polarity (race with GPIO line) */ 160 /* Swap polarity (race with GPIO line) */
161 u32 polarity = readl(GPIO_IN_POL); 161 u32 polarity = readl(GPIO_IN_POL);
162 polarity ^= 1 << pin; 162 polarity ^= 1 << pin;
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 10ae62864269..2a46d27209c1 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
149 if (gpio_request(pin, "PCI IntA") == 0) { 149 if (gpio_request(pin, "PCI IntA") == 0) {
150 if (gpio_direction_input(pin) == 0) { 150 if (gpio_direction_input(pin) == 0) {
151 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 151 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
152 } else { 152 } else {
153 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 153 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
154 "set_irq_type pin %d\n", pin); 154 "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
162 if (gpio_request(pin, "PCI IntB") == 0) { 162 if (gpio_request(pin, "PCI IntB") == 0) {
163 if (gpio_direction_input(pin) == 0) { 163 if (gpio_direction_input(pin) == 0) {
164 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 164 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
165 } else { 165 } else {
166 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 166 printk(KERN_ERR "rd88f5182_pci_preinit faield to "
167 "set_irq_type pin %d\n", pin); 167 "set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index a9cef9703d5b..f270ada2def9 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; 117 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
118 if (gpio_request(pin, "PCI Int1") == 0) { 118 if (gpio_request(pin, "PCI Int1") == 0) {
119 if (gpio_direction_input(pin) == 0) { 119 if (gpio_direction_input(pin) == 0) {
120 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 120 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
121 } else { 121 } else {
122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to " 122 printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
123 "set_irq_type pin %d\n", pin); 123 "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; 131 pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
132 if (gpio_request(pin, "PCI Int2") == 0) { 132 if (gpio_request(pin, "PCI Int2") == 0) {
133 if (gpio_direction_input(pin) == 0) { 133 if (gpio_direction_input(pin) == 0) {
134 set_irq_type(gpio_to_irq(pin), IRQT_LOW); 134 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
135 } else { 135 } else {
136 printk(KERN_ERR "qnap_ts209_pci_preinit failed " 136 printk(KERN_ERR "qnap_ts209_pci_preinit failed "
137 "to set_irq_type pin %d\n", pin); 137 "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 968d0b027597..5ed67e1947a8 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -56,28 +56,28 @@ static void pnx4008_mask_ack_irq(unsigned int irq)
56static int pnx4008_set_irq_type(unsigned int irq, unsigned int type) 56static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
57{ 57{
58 switch (type) { 58 switch (type) {
59 case IRQT_RISING: 59 case IRQ_TYPE_EDGE_RISING:
60 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 60 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */
61 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */ 61 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */
62 set_irq_handler(irq, handle_edge_irq); 62 set_irq_handler(irq, handle_edge_irq);
63 break; 63 break;
64 case IRQT_FALLING: 64 case IRQ_TYPE_EDGE_FALLING:
65 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 65 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */
66 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */ 66 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */
67 set_irq_handler(irq, handle_edge_irq); 67 set_irq_handler(irq, handle_edge_irq);
68 break; 68 break;
69 case IRQT_LOW: 69 case IRQ_TYPE_LEVEL_LOW:
70 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ 70 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */
71 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */ 71 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */
72 set_irq_handler(irq, handle_level_irq); 72 set_irq_handler(irq, handle_level_irq);
73 break; 73 break;
74 case IRQT_HIGH: 74 case IRQ_TYPE_LEVEL_HIGH:
75 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ 75 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */
76 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /* high level */ 76 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /* high level */
77 set_irq_handler(irq, handle_level_irq); 77 set_irq_handler(irq, handle_level_irq);
78 break; 78 break;
79 79
80 /* IRQT_BOTHEDGE is not supported */ 80 /* IRQ_TYPE_EDGE_BOTH is not supported */
81 default: 81 default:
82 printk(KERN_ERR "PNX4008 IRQ: Unsupported irq type %d\n", type); 82 printk(KERN_ERR "PNX4008 IRQ: Unsupported irq type %d\n", type);
83 return -1; 83 return -1;
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x270-pci.c
index bcf0cde6ccc9..31f5bd411ced 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.c
+++ b/arch/arm/mach-pxa/cm-x270-pci.c
@@ -71,7 +71,7 @@ void __cmx270_pci_init_irq(int irq_gpio)
71 71
72 cmx270_it8152_irq_gpio = irq_gpio; 72 cmx270_it8152_irq_gpio = irq_gpio;
73 73
74 set_irq_type(gpio_to_irq(irq_gpio), IRQT_RISING); 74 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
75 75
76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux); 76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
77} 77}
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index cc1c4fa06145..8d1ab54e7b20 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -113,7 +113,7 @@ static void __init lpd270_init_irq(void)
113 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 113 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
114 } 114 }
115 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 115 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
116 set_irq_type(IRQ_GPIO(0), IRQT_FALLING); 116 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
117} 117}
118 118
119 119
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index ac26423cd20c..af7375bb46a4 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -152,7 +152,7 @@ static void __init lubbock_init_irq(void)
152 } 152 }
153 153
154 set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 154 set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
155 set_irq_type(IRQ_GPIO(0), IRQT_FALLING); 155 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
156} 156}
157 157
158#ifdef CONFIG_PM 158#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 851ec2d9b699..c8e38b5ff1c4 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -191,7 +191,7 @@ static void __init mainstone_init_irq(void)
191 MST_INTSETCLR = 0; 191 MST_INTSETCLR = 0;
192 192
193 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 193 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
194 set_irq_type(IRQ_GPIO(0), IRQT_FALLING); 194 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
195} 195}
196 196
197#ifdef CONFIG_PM 197#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 34cd585075b0..23e9b9283301 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -146,18 +146,18 @@ void sharpsl_pm_pxa_init(void)
146 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) { 146 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) {
147 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 147 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
148 } 148 }
149 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE); 149 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQ_TYPE_EDGE_BOTH);
150 150
151 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) { 151 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) {
152 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 152 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
153 } 153 }
154 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING); 154 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQ_TYPE_EDGE_FALLING);
155 155
156 if (sharpsl_pm.machinfo->gpio_fatal) { 156 if (sharpsl_pm.machinfo->gpio_fatal) {
157 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) { 157 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) {
158 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 158 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
159 } 159 }
160 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING); 160 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQ_TYPE_EDGE_FALLING);
161 } 161 }
162 162
163 if (sharpsl_pm.machinfo->batfull_irq) 163 if (sharpsl_pm.machinfo->batfull_irq)
@@ -166,7 +166,7 @@ void sharpsl_pm_pxa_init(void)
166 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) { 166 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) {
167 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 167 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
168 } 168 }
169 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING); 169 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQ_TYPE_EDGE_RISING);
170 } 170 }
171} 171}
172 172
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index dee7bf36f013..12811b7aea07 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -122,7 +122,7 @@ static struct resource dm9000_resources[] = {
122 [2] = { 122 [2] = {
123 .start = TRIZEPS4_ETH_IRQ, 123 .start = TRIZEPS4_ETH_IRQ,
124 .end = TRIZEPS4_ETH_IRQ, 124 .end = TRIZEPS4_ETH_IRQ,
125 .flags = (IORESOURCE_IRQ | IRQT_RISING), 125 .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING),
126 }, 126 },
127}; 127};
128 128
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 31afe50d7cd5..56d3ee01baae 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -96,7 +96,7 @@ static struct resource cerf_flash_resource = {
96static void __init cerf_init_irq(void) 96static void __init cerf_init_irq(void)
97{ 97{
98 sa1100_init_irq(); 98 sa1100_init_irq();
99 set_irq_type(CERF_ETH_IRQ, IRQT_RISING); 99 set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
100} 100}
101 101
102static struct map_desc cerf_io_desc[] __initdata = { 102static struct map_desc cerf_io_desc[] __initdata = {
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 8473c37b77d6..b34ff42bbd75 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -834,7 +834,7 @@ static void __init h3800_init_irq(void)
834 set_irq_chip(irq, &h3800_gpio_irqchip); 834 set_irq_chip(irq, &h3800_gpio_irqchip);
835 } 835 }
836#endif 836#endif
837 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING); 837 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQ_TYPE_EDGE_RISING);
838 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux); 838 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux);
839} 839}
840 840
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index fa0403af7eec..c5e438b12ec7 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -46,17 +46,17 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
46 else 46 else
47 mask = GPIO11_27_MASK(irq); 47 mask = GPIO11_27_MASK(irq);
48 48
49 if (type == IRQT_PROBE) { 49 if (type == IRQ_TYPE_PROBE) {
50 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) 50 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
51 return 0; 51 return 0;
52 type = __IRQT_RISEDGE | __IRQT_FALEDGE; 52 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
53 } 53 }
54 54
55 if (type & __IRQT_RISEDGE) { 55 if (type & IRQ_TYPE_EDGE_RISING) {
56 GPIO_IRQ_rising_edge |= mask; 56 GPIO_IRQ_rising_edge |= mask;
57 } else 57 } else
58 GPIO_IRQ_rising_edge &= ~mask; 58 GPIO_IRQ_rising_edge &= ~mask;
59 if (type & __IRQT_FALEDGE) { 59 if (type & IRQ_TYPE_EDGE_FALLING) {
60 GPIO_IRQ_falling_edge |= mask; 60 GPIO_IRQ_falling_edge |= mask;
61 } else 61 } else
62 GPIO_IRQ_falling_edge &= ~mask; 62 GPIO_IRQ_falling_edge &= ~mask;
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 9f1ed1509301..967a48454f6b 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -151,7 +151,7 @@ static int __devinit neponset_probe(struct platform_device *dev)
151 /* 151 /*
152 * Install handler for GPIO25. 152 * Install handler for GPIO25.
153 */ 153 */
154 set_irq_type(IRQ_GPIO25, IRQT_RISING); 154 set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
155 set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler); 155 set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler);
156 156
157 /* 157 /*
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index c7bf7e0038f0..69a71f11625e 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -143,7 +143,7 @@ static void __init pleb_map_io(void)
143 143
144 GPDR &= ~GPIO_ETH0_IRQ; 144 GPDR &= ~GPIO_ETH0_IRQ;
145 145
146 set_irq_type(GPIO_ETH0_IRQ, IRQT_FALLING); 146 set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
147} 147}
148 148
149MACHINE_START(PLEB, "PLEB") 149MACHINE_START(PLEB, "PLEB")
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 4a7736717d86..318b268f938e 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -73,19 +73,19 @@ static int gpio_set_irq_type(u32 irq, u32 type)
73 void __iomem *reg = port->base; 73 void __iomem *reg = port->base;
74 74
75 switch (type) { 75 switch (type) {
76 case IRQT_RISING: 76 case IRQ_TYPE_EDGE_RISING:
77 edge = GPIO_INT_RISE_EDGE; 77 edge = GPIO_INT_RISE_EDGE;
78 break; 78 break;
79 case IRQT_FALLING: 79 case IRQ_TYPE_EDGE_FALLING:
80 edge = GPIO_INT_FALL_EDGE; 80 edge = GPIO_INT_FALL_EDGE;
81 break; 81 break;
82 case IRQT_LOW: 82 case IRQ_TYPE_LEVEL_LOW:
83 edge = GPIO_INT_LOW_LEV; 83 edge = GPIO_INT_LOW_LEV;
84 break; 84 break;
85 case IRQT_HIGH: 85 case IRQ_TYPE_LEVEL_HIGH:
86 edge = GPIO_INT_HIGH_LEV; 86 edge = GPIO_INT_HIGH_LEV;
87 break; 87 break;
88 default: /* this includes IRQT_BOTHEDGE */ 88 default: /* this includes IRQ_TYPE_EDGE_BOTH */
89 return -EINVAL; 89 return -EINVAL;
90 } 90 }
91 91
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d8e9c2c3f0f6..63e094342ef6 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -517,13 +517,13 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
517 u32 gpio_bit = 1 << gpio; 517 u32 gpio_bit = 1 << gpio;
518 518
519 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, 519 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
520 trigger & __IRQT_LOWLVL); 520 trigger & IRQ_TYPE_LEVEL_LOW);
521 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit, 521 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
522 trigger & __IRQT_HIGHLVL); 522 trigger & IRQ_TYPE_LEVEL_HIGH);
523 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit, 523 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
524 trigger & __IRQT_RISEDGE); 524 trigger & IRQ_TYPE_EDGE_RISING);
525 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, 525 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
526 trigger & __IRQT_FALEDGE); 526 trigger & IRQ_TYPE_EDGE_FALLING);
527 527
528 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { 528 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
529 if (trigger != 0) 529 if (trigger != 0)
@@ -555,9 +555,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
555 case METHOD_MPUIO: 555 case METHOD_MPUIO:
556 reg += OMAP_MPUIO_GPIO_INT_EDGE; 556 reg += OMAP_MPUIO_GPIO_INT_EDGE;
557 l = __raw_readl(reg); 557 l = __raw_readl(reg);
558 if (trigger & __IRQT_RISEDGE) 558 if (trigger & IRQ_TYPE_EDGE_RISING)
559 l |= 1 << gpio; 559 l |= 1 << gpio;
560 else if (trigger & __IRQT_FALEDGE) 560 else if (trigger & IRQ_TYPE_EDGE_FALLING)
561 l &= ~(1 << gpio); 561 l &= ~(1 << gpio);
562 else 562 else
563 goto bad; 563 goto bad;
@@ -567,9 +567,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
567 case METHOD_GPIO_1510: 567 case METHOD_GPIO_1510:
568 reg += OMAP1510_GPIO_INT_CONTROL; 568 reg += OMAP1510_GPIO_INT_CONTROL;
569 l = __raw_readl(reg); 569 l = __raw_readl(reg);
570 if (trigger & __IRQT_RISEDGE) 570 if (trigger & IRQ_TYPE_EDGE_RISING)
571 l |= 1 << gpio; 571 l |= 1 << gpio;
572 else if (trigger & __IRQT_FALEDGE) 572 else if (trigger & IRQ_TYPE_EDGE_FALLING)
573 l &= ~(1 << gpio); 573 l &= ~(1 << gpio);
574 else 574 else
575 goto bad; 575 goto bad;
@@ -584,9 +584,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
584 gpio &= 0x07; 584 gpio &= 0x07;
585 l = __raw_readl(reg); 585 l = __raw_readl(reg);
586 l &= ~(3 << (gpio << 1)); 586 l &= ~(3 << (gpio << 1));
587 if (trigger & __IRQT_RISEDGE) 587 if (trigger & IRQ_TYPE_EDGE_RISING)
588 l |= 2 << (gpio << 1); 588 l |= 2 << (gpio << 1);
589 if (trigger & __IRQT_FALEDGE) 589 if (trigger & IRQ_TYPE_EDGE_FALLING)
590 l |= 1 << (gpio << 1); 590 l |= 1 << (gpio << 1);
591 if (trigger) 591 if (trigger)
592 /* Enable wake-up during idle for dynamic tick */ 592 /* Enable wake-up during idle for dynamic tick */
@@ -599,9 +599,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
599 case METHOD_GPIO_730: 599 case METHOD_GPIO_730:
600 reg += OMAP730_GPIO_INT_CONTROL; 600 reg += OMAP730_GPIO_INT_CONTROL;
601 l = __raw_readl(reg); 601 l = __raw_readl(reg);
602 if (trigger & __IRQT_RISEDGE) 602 if (trigger & IRQ_TYPE_EDGE_RISING)
603 l |= 1 << gpio; 603 l |= 1 << gpio;
604 else if (trigger & __IRQT_FALEDGE) 604 else if (trigger & IRQ_TYPE_EDGE_FALLING)
605 l &= ~(1 << gpio); 605 l &= ~(1 << gpio);
606 else 606 else
607 goto bad; 607 goto bad;
@@ -887,7 +887,7 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
887 _set_gpio_direction(bank, get_gpio_index(gpio), 1); 887 _set_gpio_direction(bank, get_gpio_index(gpio), 1);
888 _set_gpio_irqenable(bank, gpio, 0); 888 _set_gpio_irqenable(bank, gpio, 0);
889 _clear_gpio_irqstatus(bank, gpio); 889 _clear_gpio_irqstatus(bank, gpio);
890 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE); 890 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
891} 891}
892 892
893/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ 893/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -924,7 +924,7 @@ int omap_request_gpio(int gpio)
924 /* Set trigger to none. You need to enable the desired trigger with 924 /* Set trigger to none. You need to enable the desired trigger with
925 * request_irq() or set_irq_type(). 925 * request_irq() or set_irq_type().
926 */ 926 */
927 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE); 927 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
928 928
929#ifdef CONFIG_ARCH_OMAP15XX 929#ifdef CONFIG_ARCH_OMAP15XX
930 if (bank->method == METHOD_GPIO_1510) { 930 if (bank->method == METHOD_GPIO_1510) {
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index ae2c5d7efc9d..001436c04b13 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -292,27 +292,27 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
292 /* Set the external interrupt to pointed trigger type */ 292 /* Set the external interrupt to pointed trigger type */
293 switch (type) 293 switch (type)
294 { 294 {
295 case IRQT_NOEDGE: 295 case IRQ_TYPE_NONE:
296 printk(KERN_WARNING "No edge setting!\n"); 296 printk(KERN_WARNING "No edge setting!\n");
297 break; 297 break;
298 298
299 case IRQT_RISING: 299 case IRQ_TYPE_EDGE_RISING:
300 newvalue = S3C2410_EXTINT_RISEEDGE; 300 newvalue = S3C2410_EXTINT_RISEEDGE;
301 break; 301 break;
302 302
303 case IRQT_FALLING: 303 case IRQ_TYPE_EDGE_FALLING:
304 newvalue = S3C2410_EXTINT_FALLEDGE; 304 newvalue = S3C2410_EXTINT_FALLEDGE;
305 break; 305 break;
306 306
307 case IRQT_BOTHEDGE: 307 case IRQ_TYPE_EDGE_BOTH:
308 newvalue = S3C2410_EXTINT_BOTHEDGE; 308 newvalue = S3C2410_EXTINT_BOTHEDGE;
309 break; 309 break;
310 310
311 case IRQT_LOW: 311 case IRQ_TYPE_LEVEL_LOW:
312 newvalue = S3C2410_EXTINT_LOWLEV; 312 newvalue = S3C2410_EXTINT_LOWLEV;
313 break; 313 break;
314 314
315 case IRQT_HIGH: 315 case IRQ_TYPE_LEVEL_HIGH:
316 newvalue = S3C2410_EXTINT_HILEV; 316 newvalue = S3C2410_EXTINT_HILEV;
317 break; 317 break;
318 318
diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c
index de8d186f5abf..2014253f6c88 100644
--- a/drivers/ata/pata_ixp4xx_cf.c
+++ b/drivers/ata/pata_ixp4xx_cf.c
@@ -169,7 +169,7 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
169 169
170 irq = platform_get_irq(pdev, 0); 170 irq = platform_get_irq(pdev, 0);
171 if (irq) 171 if (irq)
172 set_irq_type(irq, IRQT_RISING); 172 set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
173 173
174 /* Setup expansion bus chip selects */ 174 /* Setup expansion bus chip selects */
175 *data->cs0_cfg = data->cs0_bits; 175 *data->cs0_cfg = data->cs0_bits;
diff --git a/drivers/input/touchscreen/corgi_ts.c b/drivers/input/touchscreen/corgi_ts.c
index 4e9d8eece2e0..d0e13fc4a88c 100644
--- a/drivers/input/touchscreen/corgi_ts.c
+++ b/drivers/input/touchscreen/corgi_ts.c
@@ -195,7 +195,7 @@ static void ts_interrupt_main(struct corgi_ts *corgi_ts, int isTimer)
195{ 195{
196 if ((GPLR(IRQ_TO_GPIO(corgi_ts->irq_gpio)) & GPIO_bit(IRQ_TO_GPIO(corgi_ts->irq_gpio))) == 0) { 196 if ((GPLR(IRQ_TO_GPIO(corgi_ts->irq_gpio)) & GPIO_bit(IRQ_TO_GPIO(corgi_ts->irq_gpio))) == 0) {
197 /* Disable Interrupt */ 197 /* Disable Interrupt */
198 set_irq_type(corgi_ts->irq_gpio, IRQT_NOEDGE); 198 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_NONE);
199 if (read_xydata(corgi_ts)) { 199 if (read_xydata(corgi_ts)) {
200 corgi_ts->pendown = 1; 200 corgi_ts->pendown = 1;
201 new_data(corgi_ts); 201 new_data(corgi_ts);
@@ -214,7 +214,7 @@ static void ts_interrupt_main(struct corgi_ts *corgi_ts, int isTimer)
214 } 214 }
215 215
216 /* Enable Falling Edge */ 216 /* Enable Falling Edge */
217 set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING); 217 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
218 corgi_ts->pendown = 0; 218 corgi_ts->pendown = 0;
219 } 219 }
220} 220}
@@ -258,7 +258,7 @@ static int corgits_resume(struct platform_device *dev)
258 258
259 corgi_ssp_ads7846_putget((4u << ADSCTRL_ADR_SH) | ADSCTRL_STS); 259 corgi_ssp_ads7846_putget((4u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
260 /* Enable Falling Edge */ 260 /* Enable Falling Edge */
261 set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING); 261 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
262 corgi_ts->power_mode = PWR_MODE_ACTIVE; 262 corgi_ts->power_mode = PWR_MODE_ACTIVE;
263 263
264 return 0; 264 return 0;
@@ -333,7 +333,7 @@ static int __init corgits_probe(struct platform_device *pdev)
333 corgi_ts->power_mode = PWR_MODE_ACTIVE; 333 corgi_ts->power_mode = PWR_MODE_ACTIVE;
334 334
335 /* Enable Falling Edge */ 335 /* Enable Falling Edge */
336 set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING); 336 set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
337 337
338 return 0; 338 return 0;
339 339
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c
index a79f029b91c0..590a1379aa32 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -198,7 +198,7 @@ static int wm97xx_acc_startup(struct wm97xx *wm)
198 switch (wm->id) { 198 switch (wm->id) {
199 case WM9705_ID2: 199 case WM9705_ID2:
200 wm->pen_irq = IRQ_GPIO(4); 200 wm->pen_irq = IRQ_GPIO(4);
201 set_irq_type(IRQ_GPIO(4), IRQT_BOTHEDGE); 201 set_irq_type(IRQ_GPIO(4), IRQ_TYPE_EDGE_BOTH);
202 break; 202 break;
203 case WM9712_ID2: 203 case WM9712_ID2:
204 case WM9713_ID2: 204 case WM9713_ID2:
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index eabf0bfccab4..c6408a62d95e 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -256,28 +256,28 @@ static int asic3_gpio_irq_type(unsigned int irq, unsigned int type)
256 bank + ASIC3_GPIO_TRIGGER_TYPE); 256 bank + ASIC3_GPIO_TRIGGER_TYPE);
257 asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit; 257 asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit;
258 258
259 if (type == IRQT_RISING) { 259 if (type == IRQ_TYPE_EDGE_RISING) {
260 trigger |= bit; 260 trigger |= bit;
261 edge |= bit; 261 edge |= bit;
262 } else if (type == IRQT_FALLING) { 262 } else if (type == IRQ_TYPE_EDGE_FALLING) {
263 trigger |= bit; 263 trigger |= bit;
264 edge &= ~bit; 264 edge &= ~bit;
265 } else if (type == IRQT_BOTHEDGE) { 265 } else if (type == IRQ_TYPE_EDGE_BOTH) {
266 trigger |= bit; 266 trigger |= bit;
267 if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base)) 267 if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base))
268 edge &= ~bit; 268 edge &= ~bit;
269 else 269 else
270 edge |= bit; 270 edge |= bit;
271 asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit; 271 asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit;
272 } else if (type == IRQT_LOW) { 272 } else if (type == IRQ_TYPE_LEVEL_LOW) {
273 trigger &= ~bit; 273 trigger &= ~bit;
274 level &= ~bit; 274 level &= ~bit;
275 } else if (type == IRQT_HIGH) { 275 } else if (type == IRQ_TYPE_LEVEL_HIGH) {
276 trigger &= ~bit; 276 trigger &= ~bit;
277 level |= bit; 277 level |= bit;
278 } else { 278 } else {
279 /* 279 /*
280 * if type == IRQT_NOEDGE, we should mask interrupts, but 280 * if type == IRQ_TYPE_NONE, we should mask interrupts, but
281 * be careful to not unmask them if mask was also called. 281 * be careful to not unmask them if mask was also called.
282 * Probably need internal state for mask. 282 * Probably need internal state for mask.
283 */ 283 */
@@ -343,7 +343,7 @@ static int __init asic3_irq_probe(struct platform_device *pdev)
343 ASIC3_INTMASK_GINTMASK); 343 ASIC3_INTMASK_GINTMASK);
344 344
345 set_irq_chained_handler(asic->irq_nr, asic3_irq_demux); 345 set_irq_chained_handler(asic->irq_nr, asic3_irq_demux);
346 set_irq_type(asic->irq_nr, IRQT_RISING); 346 set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING);
347 set_irq_data(asic->irq_nr, asic); 347 set_irq_data(asic->irq_nr, asic);
348 348
349 return 0; 349 return 0;
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index 2d87501b6fd4..94e55e8e7ce6 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -324,7 +324,7 @@ static void tc6393xb_attach_irq(struct platform_device *dev)
324 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 324 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
325 } 325 }
326 326
327 set_irq_type(tc6393xb->irq, IRQT_FALLING); 327 set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
328 set_irq_data(tc6393xb->irq, tc6393xb); 328 set_irq_data(tc6393xb->irq, tc6393xb);
329 set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq); 329 set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq);
330} 330}
diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c
index 420a77540f41..8c21446996f2 100644
--- a/drivers/pcmcia/soc_common.c
+++ b/drivers/pcmcia/soc_common.c
@@ -149,10 +149,10 @@ soc_common_pcmcia_config_skt(struct soc_pcmcia_socket *skt, socket_state_t *stat
149 */ 149 */
150 if (skt->irq_state != 1 && state->io_irq) { 150 if (skt->irq_state != 1 && state->io_irq) {
151 skt->irq_state = 1; 151 skt->irq_state = 1;
152 set_irq_type(skt->irq, IRQT_FALLING); 152 set_irq_type(skt->irq, IRQ_TYPE_EDGE_FALLING);
153 } else if (skt->irq_state == 1 && state->io_irq == 0) { 153 } else if (skt->irq_state == 1 && state->io_irq == 0) {
154 skt->irq_state = 0; 154 skt->irq_state = 0;
155 set_irq_type(skt->irq, IRQT_NOEDGE); 155 set_irq_type(skt->irq, IRQ_TYPE_NONE);
156 } 156 }
157 157
158 skt->cs_state = *state; 158 skt->cs_state = *state;
@@ -527,7 +527,7 @@ int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt,
527 IRQF_DISABLED, irqs[i].str, skt); 527 IRQF_DISABLED, irqs[i].str, skt);
528 if (res) 528 if (res)
529 break; 529 break;
530 set_irq_type(irqs[i].irq, IRQT_NOEDGE); 530 set_irq_type(irqs[i].irq, IRQ_TYPE_NONE);
531 } 531 }
532 532
533 if (res) { 533 if (res) {
@@ -560,7 +560,7 @@ void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt,
560 560
561 for (i = 0; i < nr; i++) 561 for (i = 0; i < nr; i++)
562 if (irqs[i].sock == skt->nr) 562 if (irqs[i].sock == skt->nr)
563 set_irq_type(irqs[i].irq, IRQT_NOEDGE); 563 set_irq_type(irqs[i].irq, IRQ_TYPE_NONE);
564} 564}
565EXPORT_SYMBOL(soc_pcmcia_disable_irqs); 565EXPORT_SYMBOL(soc_pcmcia_disable_irqs);
566 566
@@ -571,8 +571,8 @@ void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt,
571 571
572 for (i = 0; i < nr; i++) 572 for (i = 0; i < nr; i++)
573 if (irqs[i].sock == skt->nr) { 573 if (irqs[i].sock == skt->nr) {
574 set_irq_type(irqs[i].irq, IRQT_RISING); 574 set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING);
575 set_irq_type(irqs[i].irq, IRQT_BOTHEDGE); 575 set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH);
576 } 576 }
577} 577}
578EXPORT_SYMBOL(soc_pcmcia_enable_irqs); 578EXPORT_SYMBOL(soc_pcmcia_enable_irqs);
diff --git a/drivers/video/am200epd.c b/drivers/video/am200epd.c
index 51e26c1f5e8b..32dd85126931 100644
--- a/drivers/video/am200epd.c
+++ b/drivers/video/am200epd.c
@@ -221,7 +221,7 @@ static int am200_setup_irq(struct fb_info *info)
221 return retval; 221 return retval;
222 } 222 }
223 223
224 return set_irq_type(IRQ_GPIO(RDY_GPIO_PIN), IRQT_FALLING); 224 return set_irq_type(IRQ_GPIO(RDY_GPIO_PIN), IRQ_TYPE_EDGE_FALLING);
225} 225}
226 226
227static void am200_set_rst(struct metronomefb_par *par, int state) 227static void am200_set_rst(struct metronomefb_par *par, int state)
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index 81dbcf53cf0e..fafd0f26b90f 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -646,7 +646,7 @@ static int sossi_init(struct omapfb_device *fbdev)
646 sossi_write_reg(SOSSI_INIT1_REG, l); 646 sossi_write_reg(SOSSI_INIT1_REG, l);
647 647
648 if ((r = request_irq(INT_1610_SoSSI_MATCH, sossi_match_irq, 648 if ((r = request_irq(INT_1610_SoSSI_MATCH, sossi_match_irq,
649 IRQT_FALLING, 649 IRQ_TYPE_EDGE_FALLING,
650 "sossi_match", sossi.fbdev->dev)) < 0) { 650 "sossi_match", sossi.fbdev->dev)) < 0) {
651 dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n"); 651 dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n");
652 goto err; 652 goto err;
diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h
index 13ec7ed0f501..a25d18f2d87a 100644
--- a/include/asm-arm/arch-pnx4008/irqs.h
+++ b/include/asm-arm/arch-pnx4008/irqs.h
@@ -135,30 +135,30 @@
135 135
136#define PNX4008_IRQ_TYPES \ 136#define PNX4008_IRQ_TYPES \
137{ /*IRQ #'s: */ \ 137{ /*IRQ #'s: */ \
138IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \ 138IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \
139IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \ 139IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \
140IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \ 140IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \
141IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \ 141IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \
142IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \ 142IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \
143IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \ 143IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \
144IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \ 144IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \
145IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \ 145IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \
146IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \ 146IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \
147IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \ 147IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \
148IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \ 148IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \
149IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \ 149IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \
150IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \ 150IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \
151IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \ 151IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \
152IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \ 152IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \
153IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \ 153IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \
154IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \ 154IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \
155IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \ 155IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \
156IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \ 156IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \
157IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \ 157IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \
158IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \ 158IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \
159IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \ 159IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \
160IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \ 160IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \
161IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \ 161IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \
162} 162}
163 163
164/* Start Enable Pin Interrupts - table 58 page 66 */ 164/* Start Enable Pin Interrupts - table 58 page 66 */
diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h
index b6952534a4e1..21aa8ac35c1c 100644
--- a/include/asm-arm/arch-pxa/idp.h
+++ b/include/asm-arm/arch-pxa/idp.h
@@ -138,18 +138,18 @@
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 138#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
139#define IDE_IRQ IRQ_GPIO(21) 139#define IDE_IRQ IRQ_GPIO(21)
140 140
141#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING 141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 142
143#define ETHERNET_IRQ IRQ_GPIO(4) 143#define ETHERNET_IRQ IRQ_GPIO(4)
144#define ETHERNET_IRQ_EDGE IRQT_RISING 144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 145
146#define IDE_IRQ_EDGE IRQT_RISING 146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 147
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE 149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 150
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE 152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 153
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 154#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 155#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h
index b699d0d7bdb2..2e2013179063 100644
--- a/include/asm-arm/arch-pxa/pcm990_baseboard.h
+++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h
@@ -29,14 +29,14 @@
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ 42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
@@ -133,7 +133,7 @@
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQT_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
139#define PCM990_IDE_PLD_SIZE (1*1024*1024) 139#define PCM990_IDE_PLD_SIZE (1*1024*1024)
@@ -189,11 +189,11 @@
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQT_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQT_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
199#define PCM990_CF_PLD_BASE 0xef000000 199#define PCM990_CF_PLD_BASE 0xef000000
@@ -259,14 +259,14 @@
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQT_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
272 * USB phyCore 272 * USB phyCore
diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h
index b14cbda01dc3..193f6c15f4dd 100644
--- a/include/asm-arm/arch-sa1100/ide.h
+++ b/include/asm-arm/arch-sa1100/ide.h
@@ -61,7 +61,7 @@ ide_init_default_hwifs(void)
61 61
62 /* Enable GPIO as interrupt line */ 62 /* Enable GPIO as interrupt line */
63 GPDR &= ~LART_GPIO_IDE; 63 GPDR &= ~LART_GPIO_IDE;
64 set_irq_type(LART_IRQ_IDE, IRQT_RISING); 64 set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
65 65
66 /* set PCMCIA interface timing */ 66 /* set PCMCIA interface timing */
67 MECR = 0x00060006; 67 MECR = 0x00060006;
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 1b882a255e35..9cb01907e43b 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -19,23 +19,6 @@
19#define NO_IRQ ((unsigned int)(-1)) 19#define NO_IRQ ((unsigned int)(-1))
20#endif 20#endif
21 21
22
23/*
24 * Migration helpers
25 */
26#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING
27#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING
28#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW
29#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH
30
31#define IRQT_NOEDGE (0)
32#define IRQT_RISING (__IRQT_RISEDGE)
33#define IRQT_FALLING (__IRQT_FALEDGE)
34#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
35#define IRQT_LOW (__IRQT_LOWLVL)
36#define IRQT_HIGH (__IRQT_HIGHLVL)
37#define IRQT_PROBE IRQ_TYPE_PROBE
38
39#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
40struct irqaction; 23struct irqaction;
41extern void migrate_irqs(void); 24extern void migrate_irqs(void);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-07 15:56:41 -0500