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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2006-05-03 10:34:17 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-19 17:13:23 -0400
commitd49f2c49c39bbd0cb2069fe11c1630c709061037 (patch)
tree5fcf4ccaef04d1e3fe28bcbeecf1d58908108419
parente7138723692e43b7d43578746ad21bf194847527 (diff)
[PATCH] shpchp: Mask Global SERR and Intr at controller release time
Global SERR and Interrupt should be masked at shpchp driver unload time. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/pci/hotplug/shpchp_hpc.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index e2a8671545f2..8b63f772a6f2 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -798,7 +798,7 @@ static void hpc_release_ctlr(struct controller *ctrl)
798 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle; 798 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
799 struct php_ctlr_state_s *p, *p_prev; 799 struct php_ctlr_state_s *p, *p_prev;
800 int i; 800 int i;
801 u32 slot_reg; 801 u32 slot_reg, serr_int;
802 802
803 DBG_ENTER_ROUTINE 803 DBG_ENTER_ROUTINE
804 804
@@ -822,6 +822,15 @@ static void hpc_release_ctlr(struct controller *ctrl)
822 822
823 cleanup_slots(ctrl); 823 cleanup_slots(ctrl);
824 824
825 /*
826 * Mask SERR and System Interrut generation
827 */
828 serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
829 serr_int |= (GLOBAL_INTR_MASK | GLOBAL_SERR_MASK |
830 COMMAND_INTR_MASK | ARBITER_SERR_MASK);
831 serr_int &= ~SERR_INTR_RSVDZ_MASK;
832 shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
833
825 if (shpchp_poll_mode) { 834 if (shpchp_poll_mode) {
826 del_timer(&php_ctlr->int_poll_timer); 835 del_timer(&php_ctlr->int_poll_timer);
827 } else { 836 } else {