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authorGreg Ungerer <gerg@uclinux.org>2011-03-05 09:20:01 -0500
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 07:01:54 -0400
commita0ba4332a2cb110d6ef7695e64887396ab7d09d6 (patch)
tree5ee42d93979133ee6ba186c267d0e1dce53a8b62
parent9a6b0c73afa702eee1803e664eae1b951faf895c (diff)
m68knommu: remove use of MBAR value for ColdFire 528x peripheral addressing
The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68k/include/asm/m528xsim.h12
-rw-r--r--arch/m68knommu/platform/528x/config.c14
2 files changed, 16 insertions, 10 deletions
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 014098a7de89..d7c92419f2b5 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -49,9 +49,15 @@
49/* 49/*
50 * UART module. 50 * UART module.
51 */ 51 */
52#define MCFUART_BASE1 0x200 /* Base address of UART1 */ 52#define MCFUART_BASE1 (MCF_IPSBAR + 0x00000200)
53#define MCFUART_BASE2 0x240 /* Base address of UART2 */ 53#define MCFUART_BASE2 (MCF_IPSBAR + 0x00000240)
54#define MCFUART_BASE3 0x280 /* Base address of UART3 */ 54#define MCFUART_BASE3 (MCF_IPSBAR + 0x00000280)
55
56/*
57 * FEC ethernet module.
58 */
59#define MCFFEC_BASE (MCF_IPSBAR + 0x00001000)
60#define MCFFEC_SIZE 0x800
55 61
56/* 62/*
57 * GPIO registers 63 * GPIO registers
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index 76b743343bfa..ac39fc661219 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -29,15 +29,15 @@
29 29
30static struct mcf_platform_uart m528x_uart_platform[] = { 30static struct mcf_platform_uart m528x_uart_platform[] = {
31 { 31 {
32 .mapbase = MCF_MBAR + MCFUART_BASE1, 32 .mapbase = MCFUART_BASE1,
33 .irq = MCFINT_VECBASE + MCFINT_UART0, 33 .irq = MCFINT_VECBASE + MCFINT_UART0,
34 }, 34 },
35 { 35 {
36 .mapbase = MCF_MBAR + MCFUART_BASE2, 36 .mapbase = MCFUART_BASE2,
37 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1, 37 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
38 }, 38 },
39 { 39 {
40 .mapbase = MCF_MBAR + MCFUART_BASE3, 40 .mapbase = MCFUART_BASE3,
41 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2, 41 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
42 }, 42 },
43 { }, 43 { },
@@ -51,8 +51,8 @@ static struct platform_device m528x_uart = {
51 51
52static struct resource m528x_fec_resources[] = { 52static struct resource m528x_fec_resources[] = {
53 { 53 {
54 .start = MCF_MBAR + 0x1000, 54 .start = MCFFEC_BASE,
55 .end = MCF_MBAR + 0x1000 + 0x7ff, 55 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
56 .flags = IORESOURCE_MEM, 56 .flags = IORESOURCE_MEM,
57 }, 57 },
58 { 58 {
@@ -227,9 +227,9 @@ static void __init m528x_uart_init_line(int line, int irq)
227 227
228 /* make sure PUAPAR is set for UART0 and UART1 */ 228 /* make sure PUAPAR is set for UART0 and UART1 */
229 if (line < 2) { 229 if (line < 2) {
230 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR); 230 port = readb(MCF5282_GPIO_PUAPAR);
231 port |= (0x03 << (line * 2)); 231 port |= (0x03 << (line * 2));
232 writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR); 232 writeb(port, MCF5282_GPIO_PUAPAR);
233 } 233 }
234} 234}
235 235