diff options
author | Paul Sokolovsky <pmiscml@gmail.com> | 2006-08-27 07:54:56 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-08-27 07:54:56 -0400 |
commit | 8f1bf8743c459399685f5df43021acd156548c22 (patch) | |
tree | 3eab5454e3dd04765f0f8b8d9f490596260d0ec5 | |
parent | b53a2b41f156a9c9b62c14502037cbc15bc08b54 (diff) |
[ARM] 3760/1: This patch adds timeouts while working with SSP registers. Such timeouts were en
Patch from Paul Sokolovsky
This patch adds timeouts while working with SSP registers. Such
timeouts were envisioned by docstrings in ssp.c, but were not
implemented. There were actual lockups while accessing
touchscreen for iPaqs h1910, h4000 due to lack of the timeouts.
This is updated version of previously submitted patch: 3738/1.
Signed-off-by: Paul Sokolovsky <pmiscml@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-pxa/corgi_ssp.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-pxa/ssp.c | 35 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/ssp.c | 46 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/ssp.h | 4 | ||||
-rw-r--r-- | include/asm-arm/hardware/ssp.h | 4 |
5 files changed, 82 insertions, 27 deletions
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index f9421318cb7a..ff6b4ee037f5 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c | |||
@@ -47,14 +47,15 @@ static struct corgissp_machinfo *ssp_machinfo; | |||
47 | */ | 47 | */ |
48 | unsigned long corgi_ssp_ads7846_putget(ulong data) | 48 | unsigned long corgi_ssp_ads7846_putget(ulong data) |
49 | { | 49 | { |
50 | unsigned long ret,flag; | 50 | unsigned long flag; |
51 | u32 ret = 0; | ||
51 | 52 | ||
52 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 53 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
53 | if (ssp_machinfo->cs_ads7846 >= 0) | 54 | if (ssp_machinfo->cs_ads7846 >= 0) |
54 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 55 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
55 | 56 | ||
56 | ssp_write_word(&corgi_ssp_dev,data); | 57 | ssp_write_word(&corgi_ssp_dev,data); |
57 | ret = ssp_read_word(&corgi_ssp_dev); | 58 | ssp_read_word(&corgi_ssp_dev, &ret); |
58 | 59 | ||
59 | if (ssp_machinfo->cs_ads7846 >= 0) | 60 | if (ssp_machinfo->cs_ads7846 >= 0) |
60 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 61 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
@@ -88,7 +89,9 @@ void corgi_ssp_ads7846_put(ulong data) | |||
88 | 89 | ||
89 | unsigned long corgi_ssp_ads7846_get(void) | 90 | unsigned long corgi_ssp_ads7846_get(void) |
90 | { | 91 | { |
91 | return ssp_read_word(&corgi_ssp_dev); | 92 | u32 ret = 0; |
93 | ssp_read_word(&corgi_ssp_dev, &ret); | ||
94 | return ret; | ||
92 | } | 95 | } |
93 | 96 | ||
94 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); | 97 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); |
@@ -104,6 +107,7 @@ EXPORT_SYMBOL(corgi_ssp_ads7846_get); | |||
104 | unsigned long corgi_ssp_dac_put(ulong data) | 107 | unsigned long corgi_ssp_dac_put(ulong data) |
105 | { | 108 | { |
106 | unsigned long flag, sscr1 = SSCR1_SPH; | 109 | unsigned long flag, sscr1 = SSCR1_SPH; |
110 | u32 tmp; | ||
107 | 111 | ||
108 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 112 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
109 | 113 | ||
@@ -118,7 +122,7 @@ unsigned long corgi_ssp_dac_put(ulong data) | |||
118 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 122 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
119 | ssp_write_word(&corgi_ssp_dev,data); | 123 | ssp_write_word(&corgi_ssp_dev,data); |
120 | /* Read null data back from device to prevent SSP overflow */ | 124 | /* Read null data back from device to prevent SSP overflow */ |
121 | ssp_read_word(&corgi_ssp_dev); | 125 | ssp_read_word(&corgi_ssp_dev, &tmp); |
122 | if (ssp_machinfo->cs_lcdcon >= 0) | 126 | if (ssp_machinfo->cs_lcdcon >= 0) |
123 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 127 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
124 | 128 | ||
@@ -150,7 +154,7 @@ EXPORT_SYMBOL(corgi_ssp_blduty_set); | |||
150 | int corgi_ssp_max1111_get(ulong data) | 154 | int corgi_ssp_max1111_get(ulong data) |
151 | { | 155 | { |
152 | unsigned long flag; | 156 | unsigned long flag; |
153 | int voltage,voltage1,voltage2; | 157 | long voltage = 0, voltage1 = 0, voltage2 = 0; |
154 | 158 | ||
155 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 159 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
156 | if (ssp_machinfo->cs_max1111 >= 0) | 160 | if (ssp_machinfo->cs_max1111 >= 0) |
@@ -163,15 +167,15 @@ int corgi_ssp_max1111_get(ulong data) | |||
163 | 167 | ||
164 | /* TB1/RB1 */ | 168 | /* TB1/RB1 */ |
165 | ssp_write_word(&corgi_ssp_dev,data); | 169 | ssp_write_word(&corgi_ssp_dev,data); |
166 | ssp_read_word(&corgi_ssp_dev); /* null read */ | 170 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ |
167 | 171 | ||
168 | /* TB12/RB2 */ | 172 | /* TB12/RB2 */ |
169 | ssp_write_word(&corgi_ssp_dev,0); | 173 | ssp_write_word(&corgi_ssp_dev,0); |
170 | voltage1=ssp_read_word(&corgi_ssp_dev); | 174 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); |
171 | 175 | ||
172 | /* TB13/RB3*/ | 176 | /* TB13/RB3*/ |
173 | ssp_write_word(&corgi_ssp_dev,0); | 177 | ssp_write_word(&corgi_ssp_dev,0); |
174 | voltage2=ssp_read_word(&corgi_ssp_dev); | 178 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); |
175 | 179 | ||
176 | ssp_disable(&corgi_ssp_dev); | 180 | ssp_disable(&corgi_ssp_dev); |
177 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | 181 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 93096befd017..1fddfeaa630d 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
@@ -40,6 +40,8 @@ | |||
40 | 40 | ||
41 | #define PXA_SSP_PORTS 3 | 41 | #define PXA_SSP_PORTS 3 |
42 | 42 | ||
43 | #define TIMEOUT 100000 | ||
44 | |||
43 | struct ssp_info_ { | 45 | struct ssp_info_ { |
44 | int irq; | 46 | int irq; |
45 | u32 clock; | 47 | u32 clock; |
@@ -92,13 +94,18 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
92 | * The caller is expected to perform the necessary locking. | 94 | * The caller is expected to perform the necessary locking. |
93 | * | 95 | * |
94 | * Returns: | 96 | * Returns: |
95 | * %-ETIMEDOUT timeout occurred (for future) | 97 | * %-ETIMEDOUT timeout occurred |
96 | * 0 success | 98 | * 0 success |
97 | */ | 99 | */ |
98 | int ssp_write_word(struct ssp_dev *dev, u32 data) | 100 | int ssp_write_word(struct ssp_dev *dev, u32 data) |
99 | { | 101 | { |
100 | while (!(SSSR_P(dev->port) & SSSR_TNF)) | 102 | int timeout = TIMEOUT; |
103 | |||
104 | while (!(SSSR_P(dev->port) & SSSR_TNF)) { | ||
105 | if (!--timeout) | ||
106 | return -ETIMEDOUT; | ||
101 | cpu_relax(); | 107 | cpu_relax(); |
108 | } | ||
102 | 109 | ||
103 | SSDR_P(dev->port) = data; | 110 | SSDR_P(dev->port) = data; |
104 | 111 | ||
@@ -117,15 +124,21 @@ int ssp_write_word(struct ssp_dev *dev, u32 data) | |||
117 | * The caller is expected to perform the necessary locking. | 124 | * The caller is expected to perform the necessary locking. |
118 | * | 125 | * |
119 | * Returns: | 126 | * Returns: |
120 | * %-ETIMEDOUT timeout occurred (for future) | 127 | * %-ETIMEDOUT timeout occurred |
121 | * 32-bit data success | 128 | * 32-bit data success |
122 | */ | 129 | */ |
123 | int ssp_read_word(struct ssp_dev *dev) | 130 | int ssp_read_word(struct ssp_dev *dev, u32 *data) |
124 | { | 131 | { |
125 | while (!(SSSR_P(dev->port) & SSSR_RNE)) | 132 | int timeout = TIMEOUT; |
133 | |||
134 | while (!(SSSR_P(dev->port) & SSSR_RNE)) { | ||
135 | if (!--timeout) | ||
136 | return -ETIMEDOUT; | ||
126 | cpu_relax(); | 137 | cpu_relax(); |
138 | } | ||
127 | 139 | ||
128 | return SSDR_P(dev->port); | 140 | *data = SSDR_P(dev->port); |
141 | return 0; | ||
129 | } | 142 | } |
130 | 143 | ||
131 | /** | 144 | /** |
@@ -136,13 +149,21 @@ int ssp_read_word(struct ssp_dev *dev) | |||
136 | * | 149 | * |
137 | * The caller is expected to perform the necessary locking. | 150 | * The caller is expected to perform the necessary locking. |
138 | */ | 151 | */ |
139 | void ssp_flush(struct ssp_dev *dev) | 152 | int ssp_flush(struct ssp_dev *dev) |
140 | { | 153 | { |
154 | int timeout = TIMEOUT * 2; | ||
155 | |||
141 | do { | 156 | do { |
142 | while (SSSR_P(dev->port) & SSSR_RNE) { | 157 | while (SSSR_P(dev->port) & SSSR_RNE) { |
158 | if (!--timeout) | ||
159 | return -ETIMEDOUT; | ||
143 | (void) SSDR_P(dev->port); | 160 | (void) SSDR_P(dev->port); |
144 | } | 161 | } |
162 | if (!--timeout) | ||
163 | return -ETIMEDOUT; | ||
145 | } while (SSSR_P(dev->port) & SSSR_BSY); | 164 | } while (SSSR_P(dev->port) & SSSR_BSY); |
165 | |||
166 | return 0; | ||
146 | } | 167 | } |
147 | 168 | ||
148 | /** | 169 | /** |
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 1604dadf27fc..5eba5fbbb561 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <asm/hardware.h> | 23 | #include <asm/hardware.h> |
24 | #include <asm/hardware/ssp.h> | 24 | #include <asm/hardware/ssp.h> |
25 | 25 | ||
26 | #define TIMEOUT 100000 | ||
27 | |||
26 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 28 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
27 | { | 29 | { |
28 | unsigned int status = Ser4SSSR; | 30 | unsigned int status = Ser4SSSR; |
@@ -47,18 +49,27 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
47 | * The caller is expected to perform the necessary locking. | 49 | * The caller is expected to perform the necessary locking. |
48 | * | 50 | * |
49 | * Returns: | 51 | * Returns: |
50 | * %-ETIMEDOUT timeout occurred (for future) | 52 | * %-ETIMEDOUT timeout occurred |
51 | * 0 success | 53 | * 0 success |
52 | */ | 54 | */ |
53 | int ssp_write_word(u16 data) | 55 | int ssp_write_word(u16 data) |
54 | { | 56 | { |
55 | while (!(Ser4SSSR & SSSR_TNF)) | 57 | int timeout = TIMEOUT; |
58 | |||
59 | while (!(Ser4SSSR & SSSR_TNF)) { | ||
60 | if (!--timeout) | ||
61 | return -ETIMEDOUT; | ||
56 | cpu_relax(); | 62 | cpu_relax(); |
63 | } | ||
57 | 64 | ||
58 | Ser4SSDR = data; | 65 | Ser4SSDR = data; |
59 | 66 | ||
60 | while (!(Ser4SSSR & SSSR_BSY)) | 67 | timeout = TIMEOUT; |
68 | while (!(Ser4SSSR & SSSR_BSY)) { | ||
69 | if (!--timeout) | ||
70 | return -ETIMEDOUT; | ||
61 | cpu_relax(); | 71 | cpu_relax(); |
72 | } | ||
62 | 73 | ||
63 | return 0; | 74 | return 0; |
64 | } | 75 | } |
@@ -75,15 +86,22 @@ int ssp_write_word(u16 data) | |||
75 | * The caller is expected to perform the necessary locking. | 86 | * The caller is expected to perform the necessary locking. |
76 | * | 87 | * |
77 | * Returns: | 88 | * Returns: |
78 | * %-ETIMEDOUT timeout occurred (for future) | 89 | * %-ETIMEDOUT timeout occurred |
79 | * 16-bit data success | 90 | * 16-bit data success |
80 | */ | 91 | */ |
81 | int ssp_read_word(void) | 92 | int ssp_read_word(u16 *data) |
82 | { | 93 | { |
83 | while (!(Ser4SSSR & SSSR_RNE)) | 94 | int timeout = TIMEOUT; |
95 | |||
96 | while (!(Ser4SSSR & SSSR_RNE)) { | ||
97 | if (!--timeout) | ||
98 | return -ETIMEDOUT; | ||
84 | cpu_relax(); | 99 | cpu_relax(); |
100 | } | ||
101 | |||
102 | *data = (u16)Ser4SSDR; | ||
85 | 103 | ||
86 | return Ser4SSDR; | 104 | return 0; |
87 | } | 105 | } |
88 | 106 | ||
89 | /** | 107 | /** |
@@ -93,14 +111,26 @@ int ssp_read_word(void) | |||
93 | * is empty. | 111 | * is empty. |
94 | * | 112 | * |
95 | * The caller is expected to perform the necessary locking. | 113 | * The caller is expected to perform the necessary locking. |
114 | * | ||
115 | * Returns: | ||
116 | * %-ETIMEDOUT timeout occurred | ||
117 | * 0 success | ||
96 | */ | 118 | */ |
97 | void ssp_flush(void) | 119 | int ssp_flush(void) |
98 | { | 120 | { |
121 | int timeout = TIMEOUT * 2; | ||
122 | |||
99 | do { | 123 | do { |
100 | while (Ser4SSSR & SSSR_RNE) { | 124 | while (Ser4SSSR & SSSR_RNE) { |
125 | if (!--timeout) | ||
126 | return -ETIMEDOUT; | ||
101 | (void) Ser4SSDR; | 127 | (void) Ser4SSDR; |
102 | } | 128 | } |
129 | if (!--timeout) | ||
130 | return -ETIMEDOUT; | ||
103 | } while (Ser4SSSR & SSSR_BSY); | 131 | } while (Ser4SSSR & SSSR_BSY); |
132 | |||
133 | return 0; | ||
104 | } | 134 | } |
105 | 135 | ||
106 | /** | 136 | /** |
diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h index 949878c0d908..ea200551a75f 100644 --- a/include/asm-arm/arch-pxa/ssp.h +++ b/include/asm-arm/arch-pxa/ssp.h | |||
@@ -40,8 +40,8 @@ struct ssp_dev { | |||
40 | }; | 40 | }; |
41 | 41 | ||
42 | int ssp_write_word(struct ssp_dev *dev, u32 data); | 42 | int ssp_write_word(struct ssp_dev *dev, u32 data); |
43 | int ssp_read_word(struct ssp_dev *dev); | 43 | int ssp_read_word(struct ssp_dev *dev, u32 *data); |
44 | void ssp_flush(struct ssp_dev *dev); | 44 | int ssp_flush(struct ssp_dev *dev); |
45 | void ssp_enable(struct ssp_dev *dev); | 45 | void ssp_enable(struct ssp_dev *dev); |
46 | void ssp_disable(struct ssp_dev *dev); | 46 | void ssp_disable(struct ssp_dev *dev); |
47 | void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); | 47 | void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); |
diff --git a/include/asm-arm/hardware/ssp.h b/include/asm-arm/hardware/ssp.h index 28aa11b769cd..3b42e181997c 100644 --- a/include/asm-arm/hardware/ssp.h +++ b/include/asm-arm/hardware/ssp.h | |||
@@ -16,8 +16,8 @@ struct ssp_state { | |||
16 | }; | 16 | }; |
17 | 17 | ||
18 | int ssp_write_word(u16 data); | 18 | int ssp_write_word(u16 data); |
19 | int ssp_read_word(void); | 19 | int ssp_read_word(u16 *data); |
20 | void ssp_flush(void); | 20 | int ssp_flush(void); |
21 | void ssp_enable(void); | 21 | void ssp_enable(void); |
22 | void ssp_disable(void); | 22 | void ssp_disable(void); |
23 | void ssp_save_state(struct ssp_state *ssp); | 23 | void ssp_save_state(struct ssp_state *ssp); |