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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2010-09-27 14:00:40 -0400
committerDavid S. Miller <davem@davemloft.net>2010-10-26 13:17:29 -0400
commit5d3f1a493e19f34ba427936b76f0b5624a2fc62a (patch)
treeef5dc2f973f4b8ed5450c7be1a748a51d28394bc
parentb18cae4224bde7e5a332c19bc99247b2098ea232 (diff)
hpt366: add debounce delay to cable_detect() method
Alan Cox reported that cable detection sometimes works unreliably for HPT3xxN and that the issue is fixed by adding debounce delay as used by the vendor drivers. While at it, get rid of unneeded parens/space in the vicinity... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/ide/hpt366.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
index 97d98fbf5849..c613ae170a84 100644
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -1173,8 +1173,9 @@ static u8 hpt3xx_cable_detect(ide_hwif_t *hwif)
1173 u16 mcr; 1173 u16 mcr;
1174 1174
1175 pci_read_config_word(dev, mcr_addr, &mcr); 1175 pci_read_config_word(dev, mcr_addr, &mcr);
1176 pci_write_config_word(dev, mcr_addr, (mcr | 0x8000)); 1176 pci_write_config_word(dev, mcr_addr, mcr | 0x8000);
1177 /* now read cable id register */ 1177 /* Debounce, then read cable ID register */
1178 udelay(10);
1178 pci_read_config_byte(dev, 0x5a, &scr1); 1179 pci_read_config_byte(dev, 0x5a, &scr1);
1179 pci_write_config_word(dev, mcr_addr, mcr); 1180 pci_write_config_word(dev, mcr_addr, mcr);
1180 } else if (chip_type >= HPT370) { 1181 } else if (chip_type >= HPT370) {
@@ -1185,10 +1186,11 @@ static u8 hpt3xx_cable_detect(ide_hwif_t *hwif)
1185 u8 scr2 = 0; 1186 u8 scr2 = 0;
1186 1187
1187 pci_read_config_byte(dev, 0x5b, &scr2); 1188 pci_read_config_byte(dev, 0x5b, &scr2);
1188 pci_write_config_byte(dev, 0x5b, (scr2 & ~1)); 1189 pci_write_config_byte(dev, 0x5b, scr2 & ~1);
1189 /* now read cable id register */ 1190 /* Debounce, then read cable ID register */
1191 udelay(10);
1190 pci_read_config_byte(dev, 0x5a, &scr1); 1192 pci_read_config_byte(dev, 0x5a, &scr1);
1191 pci_write_config_byte(dev, 0x5b, scr2); 1193 pci_write_config_byte(dev, 0x5b, scr2);
1192 } else 1194 } else
1193 pci_read_config_byte(dev, 0x5a, &scr1); 1195 pci_read_config_byte(dev, 0x5a, &scr1);
1194 1196