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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-03-09 10:37:07 -0500
committerEric Anholt <eric@anholt.net>2010-03-17 16:07:00 -0400
commit59f2d0fc4bdfbbfabfa3715ba17d0609e5964c7e (patch)
tree98d1edf3bc6da7aea6aab5f0b2a29189f13e5312
parent76e47c30bdc591815eeb5598f1e2a243a30bd585 (diff)
drm/i915: Fix check with IS_GEN6
IS_GEN6 missed to include SandyBridge mobile chip, which failed in i915_probe_agp() for memory config detection. Fix it with a device info flag. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1b2e95455c05..4b26919abdb2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -139,12 +139,12 @@ const static struct intel_device_info intel_ironlake_m_info = {
139 139
140const static struct intel_device_info intel_sandybridge_d_info = { 140const static struct intel_device_info intel_sandybridge_d_info = {
141 .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1, 141 .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
142 .has_hotplug = 1, 142 .has_hotplug = 1, .is_gen6 = 1,
143}; 143};
144 144
145const static struct intel_device_info intel_sandybridge_m_info = { 145const static struct intel_device_info intel_sandybridge_m_info = {
146 .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1, 146 .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
147 .has_hotplug = 1, 147 .has_hotplug = 1, .is_gen6 = 1,
148}; 148};
149 149
150const static struct pci_device_id pciidlist[] = { 150const static struct pci_device_id pciidlist[] = {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 979439cfb827..aba8260fbc5e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -205,6 +205,7 @@ struct intel_device_info {
205 u8 is_g4x : 1; 205 u8 is_g4x : 1;
206 u8 is_pineview : 1; 206 u8 is_pineview : 1;
207 u8 is_ironlake : 1; 207 u8 is_ironlake : 1;
208 u8 is_gen6 : 1;
208 u8 has_fbc : 1; 209 u8 has_fbc : 1;
209 u8 has_rc6 : 1; 210 u8 has_rc6 : 1;
210 u8 has_pipe_cxsr : 1; 211 u8 has_pipe_cxsr : 1;
@@ -1084,6 +1085,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
1084#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) 1085#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046)
1085#define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake) 1086#define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake)
1086#define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx) 1087#define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx)
1088#define IS_GEN6(dev) (INTEL_INFO(dev)->is_gen6)
1087#define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) 1089#define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
1088 1090
1089#define IS_GEN3(dev) (IS_I915G(dev) || \ 1091#define IS_GEN3(dev) (IS_I915G(dev) || \
@@ -1107,8 +1109,6 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
1107 1109
1108#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) 1110#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
1109 1111
1110#define IS_GEN6(dev) ((dev)->pci_device == 0x0102)
1111
1112/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte 1112/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
1113 * rows, which changed the alignment requirements and fence programming. 1113 * rows, which changed the alignment requirements and fence programming.
1114 */ 1114 */