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authorMike Frysinger <vapier@gentoo.org>2009-10-14 23:14:09 -0400
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:14:36 -0500
commit341a1fc0d1efbb202a77aa69f4c7d97a507b1056 (patch)
tree3e18e04c41240b9a523177c4f517b018b209b52b
parent1915b6c0aedbba3bc5042e2b9bdbf7734579352d (diff)
Blackfin: scrub unused watchdog mmr masks
The watchdog code doesn't need these, and the other parts had these punted, so keep the global namespace clean. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF51x_base.h34
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h34
-rw-r--r--arch/blackfin/mach-bf538/include/mach/defBF539.h35
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF54x_base.h6
4 files changed, 0 insertions, 109 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index 48c702d2aee3..83e8c34547b3 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -756,40 +756,6 @@
756#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */ 756#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */
757 757
758 758
759/* ********* WATCHDOG TIMER MASKS ******************** */
760
761/* Watchdog Timer WDOG_CTL Register Masks */
762
763#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
764#define WDEV_RESET 0x0000 /* generate reset event on roll over */
765#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
766#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
767#define WDEV_NONE 0x0006 /* no event on roll over */
768#define WDEN 0x0FF0 /* enable watchdog */
769#define WDDIS 0x0AD0 /* disable watchdog */
770#define WDRO 0x8000 /* watchdog rolled over latch */
771
772/* depreciated WDOG_CTL Register Masks for legacy code */
773
774
775#define ICTL WDEV
776#define ENABLE_RESET WDEV_RESET
777#define WDOG_RESET WDEV_RESET
778#define ENABLE_NMI WDEV_NMI
779#define WDOG_NMI WDEV_NMI
780#define ENABLE_GPI WDEV_GPI
781#define WDOG_GPI WDEV_GPI
782#define DISABLE_EVT WDEV_NONE
783#define WDOG_NONE WDEV_NONE
784
785#define TMR_EN WDEN
786#define TMR_DIS WDDIS
787#define TRO WDRO
788#define ICTL_P0 0x01
789 #define ICTL_P1 0x02
790#define TRO_P 0x0F
791
792
793/* ************** UART CONTROLLER MASKS *************************/ 759/* ************** UART CONTROLLER MASKS *************************/
794/* UARTx_LCR Masks */ 760/* UARTx_LCR Masks */
795#define WLS(x) (((x)-5) & 0x03) /* Word Length Select */ 761#define WLS(x) (((x)-5) & 0x03) /* Word Length Select */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index 51bdea2075b6..3dda2b8e8512 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -757,40 +757,6 @@
757#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */ 757#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << ((x)&0x1F))) /* Wakeup Disable Peripheral #x */
758 758
759 759
760/* ********* WATCHDOG TIMER MASKS ******************** */
761
762/* Watchdog Timer WDOG_CTL Register Masks */
763
764#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
765#define WDEV_RESET 0x0000 /* generate reset event on roll over */
766#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
767#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
768#define WDEV_NONE 0x0006 /* no event on roll over */
769#define WDEN 0x0FF0 /* enable watchdog */
770#define WDDIS 0x0AD0 /* disable watchdog */
771#define WDRO 0x8000 /* watchdog rolled over latch */
772
773/* depreciated WDOG_CTL Register Masks for legacy code */
774
775
776#define ICTL WDEV
777#define ENABLE_RESET WDEV_RESET
778#define WDOG_RESET WDEV_RESET
779#define ENABLE_NMI WDEV_NMI
780#define WDOG_NMI WDEV_NMI
781#define ENABLE_GPI WDEV_GPI
782#define WDOG_GPI WDEV_GPI
783#define DISABLE_EVT WDEV_NONE
784#define WDOG_NONE WDEV_NONE
785
786#define TMR_EN WDEN
787#define TMR_DIS WDDIS
788#define TRO WDRO
789#define ICTL_P0 0x01
790 #define ICTL_P1 0x02
791#define TRO_P 0x0F
792
793
794/* ************** UART CONTROLLER MASKS *************************/ 760/* ************** UART CONTROLLER MASKS *************************/
795/* UARTx_LCR Masks */ 761/* UARTx_LCR Masks */
796#define WLS(x) (((x)-5) & 0x03) /* Word Length Select */ 762#define WLS(x) (((x)-5) & 0x03) /* Word Length Select */
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index bfe94dd8340c..5a9d0d56ea75 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -1609,41 +1609,6 @@
1609#endif /* _MISRA_RULES */ 1609#endif /* _MISRA_RULES */
1610 1610
1611 1611
1612/* ********* WATCHDOG TIMER MASKS ******************** */
1613/* Watchdog Timer WDOG_CTL Register Masks */
1614#ifdef _MISRA_RULES
1615#define WDEV(x) (((x)<<1) & 0x0006u) /* event generated on roll over */
1616#else
1617#define WDEV(x) (((x)<<1) & 0x0006) /* event generated on roll over */
1618#endif /* _MISRA_RULES */
1619#define WDEV_RESET 0x0000 /* generate reset event on roll over */
1620#define WDEV_NMI 0x0002 /* generate NMI event on roll over */
1621#define WDEV_GPI 0x0004 /* generate GP IRQ on roll over */
1622#define WDEV_NONE 0x0006 /* no event on roll over */
1623#define WDEN 0x0FF0 /* enable watchdog */
1624#define WDDIS 0x0AD0 /* disable watchdog */
1625#define WDRO 0x8000 /* watchdog rolled over latch */
1626
1627/* deprecated WDOG_CTL Register Masks for legacy code */
1628#define ICTL WDEV
1629#define ENABLE_RESET WDEV_RESET
1630#define WDOG_RESET WDEV_RESET
1631#define ENABLE_NMI WDEV_NMI
1632#define WDOG_NMI WDEV_NMI
1633#define ENABLE_GPI WDEV_GPI
1634#define WDOG_GPI WDEV_GPI
1635#define DISABLE_EVT WDEV_NONE
1636#define WDOG_NONE WDEV_NONE
1637
1638#define TMR_EN WDEN
1639#define WDOG_DISABLE WDDIS
1640#define TRO WDRO
1641
1642#define ICTL_P0 0x01
1643#define ICTL_P1 0x02
1644#define TRO_P 0x0F
1645
1646
1647/* ***************************** UART CONTROLLER MASKS ********************** */ 1612/* ***************************** UART CONTROLLER MASKS ********************** */
1648/* UARTx_LCR Register */ 1613/* UARTx_LCR Register */
1649#ifdef _MISRA_RULES 1614#ifdef _MISRA_RULES
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
index 0d89f2262418..3ce5ce6c4971 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
@@ -2092,12 +2092,6 @@
2092#define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */ 2092#define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */
2093#define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */ 2093#define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */
2094 2094
2095/* Bit masks for WDOG_CTL */
2096
2097#define WDEV 0x6 /* Watchdog Event */
2098#define WDEN 0xff0 /* Watchdog Enable */
2099#define WDRO 0x8000 /* Watchdog Rolled Over */
2100
2101/* Bit masks for CNT_CONFIG */ 2095/* Bit masks for CNT_CONFIG */
2102 2096
2103#define CNTE 0x1 /* Counter Enable */ 2097#define CNTE 0x1 /* Counter Enable */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 22:27:18 -0500