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authorTimur Tabi <timur@freescale.com>2011-01-10 14:28:32 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-01-10 17:32:24 -0500
commit11b8fca53a84992c74f05a091102c32eb40f1a08 (patch)
tree479984c80ec8bda61b11ea8963c9bee3ef44f627
parentb60fc60ceab36cbba218888b52e87998fca06936 (diff)
ASoC: cs4270: use the built-in register cache support
Update the CS4270 driver to use ASoC's internal codec register cache feature. This change allows ASoC to perform the low-level I2C operations necessary to read the register cache. Support is also added for initializing the register cache with an array of known power-on default values. The CS4270 driver was handling the register cache itself, but somwhere along the conversion to multi-compaonent, this feature broke. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/cs4270.c161
1 files changed, 48 insertions, 113 deletions
diff --git a/sound/soc/codecs/cs4270.c b/sound/soc/codecs/cs4270.c
index 3a582caa6ef9..8b51245f2318 100644
--- a/sound/soc/codecs/cs4270.c
+++ b/sound/soc/codecs/cs4270.c
@@ -106,6 +106,21 @@
106#define CS4270_MUTE_DAC_A 0x01 106#define CS4270_MUTE_DAC_A 0x01
107#define CS4270_MUTE_DAC_B 0x02 107#define CS4270_MUTE_DAC_B 0x02
108 108
109/* Power-on default values for the registers
110 *
111 * This array contains the power-on default values of the registers, with the
112 * exception of the "CHIPID" register (01h). The lower four bits of that
113 * register contain the hardware revision, so it is treated as volatile.
114 *
115 * Also note that on the CS4270, the first readable register is 1, but ASoC
116 * assumes the first register is 0. Therfore, the array must have an entry for
117 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
118 * be read.
119 */
120static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
121 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
122};
123
109static const char *supply_names[] = { 124static const char *supply_names[] = {
110 "va", "vd", "vlc" 125 "va", "vd", "vlc"
111}; 126};
@@ -178,6 +193,20 @@ static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
178/* The number of MCLK/LRCK ratios supported by the CS4270 */ 193/* The number of MCLK/LRCK ratios supported by the CS4270 */
179#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) 194#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
180 195
196static int cs4270_reg_is_readable(unsigned int reg)
197{
198 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
199}
200
201static int cs4270_reg_is_volatile(unsigned int reg)
202{
203 /* Unreadable registers are considered volatile */
204 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
205 return 1;
206
207 return reg == CS4270_CHIPID;
208}
209
181/** 210/**
182 * cs4270_set_dai_sysclk - determine the CS4270 samples rates. 211 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
183 * @codec_dai: the codec DAI 212 * @codec_dai: the codec DAI
@@ -263,97 +292,6 @@ static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
263} 292}
264 293
265/** 294/**
266 * cs4270_fill_cache - pre-fill the CS4270 register cache.
267 * @codec: the codec for this CS4270
268 *
269 * This function fills in the CS4270 register cache by reading the register
270 * values from the hardware.
271 *
272 * This CS4270 registers are cached to avoid excessive I2C I/O operations.
273 * After the initial read to pre-fill the cache, the CS4270 never updates
274 * the register values, so we won't have a cache coherency problem.
275 *
276 * We use the auto-increment feature of the CS4270 to read all registers in
277 * one shot.
278 */
279static int cs4270_fill_cache(struct snd_soc_codec *codec)
280{
281 u8 *cache = codec->reg_cache;
282 struct i2c_client *i2c_client = codec->control_data;
283 s32 length;
284
285 length = i2c_smbus_read_i2c_block_data(i2c_client,
286 CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache);
287
288 if (length != CS4270_NUMREGS) {
289 dev_err(codec->dev, "i2c read failure, addr=0x%x\n",
290 i2c_client->addr);
291 return -EIO;
292 }
293
294 return 0;
295}
296
297/**
298 * cs4270_read_reg_cache - read from the CS4270 register cache.
299 * @codec: the codec for this CS4270
300 * @reg: the register to read
301 *
302 * This function returns the value for a given register. It reads only from
303 * the register cache, not the hardware itself.
304 *
305 * This CS4270 registers are cached to avoid excessive I2C I/O operations.
306 * After the initial read to pre-fill the cache, the CS4270 never updates
307 * the register values, so we won't have a cache coherency problem.
308 */
309static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,
310 unsigned int reg)
311{
312 u8 *cache = codec->reg_cache;
313
314 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
315 return -EIO;
316
317 return cache[reg - CS4270_FIRSTREG];
318}
319
320/**
321 * cs4270_i2c_write - write to a CS4270 register via the I2C bus.
322 * @codec: the codec for this CS4270
323 * @reg: the register to write
324 * @value: the value to write to the register
325 *
326 * This function writes the given value to the given CS4270 register, and
327 * also updates the register cache.
328 *
329 * Note that we don't use the hw_write function pointer of snd_soc_codec.
330 * That's because it's too clunky: the hw_write_t prototype does not match
331 * i2c_smbus_write_byte_data(), and it's just another layer of overhead.
332 */
333static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg,
334 unsigned int value)
335{
336 u8 *cache = codec->reg_cache;
337
338 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
339 return -EIO;
340
341 /* Only perform an I2C operation if the new value is different */
342 if (cache[reg - CS4270_FIRSTREG] != value) {
343 struct i2c_client *client = codec->control_data;
344 if (i2c_smbus_write_byte_data(client, reg, value)) {
345 dev_err(codec->dev, "i2c write failed\n");
346 return -EIO;
347 }
348
349 /* We've written to the hardware, so update the cache */
350 cache[reg - CS4270_FIRSTREG] = value;
351 }
352
353 return 0;
354}
355
356/**
357 * cs4270_hw_params - program the CS4270 with the given hardware parameters. 295 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
358 * @substream: the audio stream 296 * @substream: the audio stream
359 * @params: the hardware parameters to set 297 * @params: the hardware parameters to set
@@ -550,15 +488,16 @@ static struct snd_soc_dai_driver cs4270_dai = {
550static int cs4270_probe(struct snd_soc_codec *codec) 488static int cs4270_probe(struct snd_soc_codec *codec)
551{ 489{
552 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec); 490 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
553 int i, ret, reg; 491 int i, ret;
554 492
555 codec->control_data = cs4270->control_data; 493 codec->control_data = cs4270->control_data;
556 494
557 /* The I2C interface is set up, so pre-fill our register cache */ 495 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
558 496 * then do the I2C transactions itself.
559 ret = cs4270_fill_cache(codec); 497 */
498 ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
560 if (ret < 0) { 499 if (ret < 0) {
561 dev_err(codec->dev, "failed to fill register cache\n"); 500 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
562 return ret; 501 return ret;
563 } 502 }
564 503
@@ -567,10 +506,7 @@ static int cs4270_probe(struct snd_soc_codec *codec)
567 * this feature disabled by default. An application (e.g. alsactl) can 506 * this feature disabled by default. An application (e.g. alsactl) can
568 * re-enabled it by using the controls. 507 * re-enabled it by using the controls.
569 */ 508 */
570 509 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
571 reg = cs4270_read_reg_cache(codec, CS4270_MUTE);
572 reg &= ~CS4270_MUTE_AUTO;
573 ret = cs4270_i2c_write(codec, CS4270_MUTE, reg);
574 if (ret < 0) { 510 if (ret < 0) {
575 dev_err(codec->dev, "i2c write failed\n"); 511 dev_err(codec->dev, "i2c write failed\n");
576 return ret; 512 return ret;
@@ -581,10 +517,8 @@ static int cs4270_probe(struct snd_soc_codec *codec)
581 * playback has started. An application (e.g. alsactl) can 517 * playback has started. An application (e.g. alsactl) can
582 * re-enabled it by using the controls. 518 * re-enabled it by using the controls.
583 */ 519 */
584 520 ret = snd_soc_update_bits(codec, CS4270_TRANS,
585 reg = cs4270_read_reg_cache(codec, CS4270_TRANS); 521 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
586 reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
587 ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
588 if (ret < 0) { 522 if (ret < 0) {
589 dev_err(codec->dev, "i2c write failed\n"); 523 dev_err(codec->dev, "i2c write failed\n");
590 return ret; 524 return ret;
@@ -707,15 +641,16 @@ static int cs4270_soc_resume(struct snd_soc_codec *codec)
707 * Assign this variable to the codec_dev field of the machine driver's 641 * Assign this variable to the codec_dev field of the machine driver's
708 * snd_soc_device structure. 642 * snd_soc_device structure.
709 */ 643 */
710static struct snd_soc_codec_driver soc_codec_device_cs4270 = { 644static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
711 .probe = cs4270_probe, 645 .probe = cs4270_probe,
712 .remove = cs4270_remove, 646 .remove = cs4270_remove,
713 .suspend = cs4270_soc_suspend, 647 .suspend = cs4270_soc_suspend,
714 .resume = cs4270_soc_resume, 648 .resume = cs4270_soc_resume,
715 .read = cs4270_read_reg_cache, 649 .volatile_register = cs4270_reg_is_volatile,
716 .write = cs4270_i2c_write, 650 .readable_register = cs4270_reg_is_readable,
717 .reg_cache_size = CS4270_NUMREGS, 651 .reg_cache_size = CS4270_LASTREG + 1,
718 .reg_word_size = sizeof(u8), 652 .reg_word_size = sizeof(u8),
653 .reg_cache_default = cs4270_default_reg_cache,
719}; 654};
720 655
721/** 656/**