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authorOlof Johansson <olof@lixom.net>2015-01-15 18:47:22 -0500
committerOlof Johansson <olof@lixom.net>2015-01-15 18:47:22 -0500
commitff3a45b6185d734e7eb3aee6f01d93ad773935e3 (patch)
tree7489ad1bed1d57c7d5b82547c9d0b30f9859fb53
parenteaa27f34e91a14cdceed26ed6c6793ec1d186115 (diff)
parent6f56eef1f9aba3747c811780a4768618167d5c97 (diff)
Merge tag 'samsung-dt-64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/arm64
Merge "Samsung exynos7 updates for v3.20" from Kukjin Kim: - to support ARMv8 based exynos7 SoC : add initial device tree for pinctrl, PMU, mmc, i2c, rtc, watchdog, and adc nodes for exynos7 SoC and exynos7 based espresso board. * tag 'samsung-dt-64' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: arm64: Enable ARMv8 based exynos7 SoC support arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7 arm64: dts: Add PMU DT node for exynos7 SoC arm64: dts: Add initial pinctrl support to exynos7 arm64: dts: Add initial device tree support for exynos7 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/samsung/pmu.txt1
-rw-r--r--arch/arm64/Kconfig17
-rw-r--r--arch/arm64/boot/dts/Makefile1
-rw-r--r--arch/arm64/boot/dts/exynos/Makefile5
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-espresso.dts84
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi588
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7.dtsi530
7 files changed, 1226 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b229ff..67b211381f2b 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
10 - "samsung,exynos5260-pmu" - for Exynos5260 SoC. 10 - "samsung,exynos5260-pmu" - for Exynos5260 SoC.
11 - "samsung,exynos5410-pmu" - for Exynos5410 SoC, 11 - "samsung,exynos5410-pmu" - for Exynos5410 SoC,
12 - "samsung,exynos5420-pmu" - for Exynos5420 SoC. 12 - "samsung,exynos5420-pmu" - for Exynos5420 SoC.
13 - "samsung,exynos7-pmu" - for Exynos7 SoC.
13 second value must be always "syscon". 14 second value must be always "syscon".
14 15
15 - reg : offset and length of the register set. 16 - reg : offset and length of the register set.
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b1f9a20a3677..15e8e7469ffd 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -148,6 +148,23 @@ source "kernel/Kconfig.freezer"
148 148
149menu "Platform selection" 149menu "Platform selection"
150 150
151config ARCH_EXYNOS
152 bool
153 help
154 This enables support for Samsung Exynos SoC family
155
156config ARCH_EXYNOS7
157 bool "ARMv8 based Samsung Exynos7"
158 select ARCH_EXYNOS
159 select COMMON_CLK_SAMSUNG
160 select HAVE_S3C2410_WATCHDOG if WATCHDOG
161 select HAVE_S3C_RTC if RTC_CLASS
162 select PINCTRL
163 select PINCTRL_EXYNOS
164
165 help
166 This enables support for Samsung Exynos7 SoC family
167
151config ARCH_SEATTLE 168config ARCH_SEATTLE
152 bool "AMD Seattle SoC Family" 169 bool "AMD Seattle SoC Family"
153 help 170 help
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 3b8d427c3985..b4112518552f 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -2,6 +2,7 @@ dts-dirs += amd
2dts-dirs += apm 2dts-dirs += apm
3dts-dirs += arm 3dts-dirs += arm
4dts-dirs += cavium 4dts-dirs += cavium
5dts-dirs += exynos
5 6
6always := $(dtb-y) 7always := $(dtb-y)
7subdir-y := $(dts-dirs) 8subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile
new file mode 100644
index 000000000000..20310e5b6d6f
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/Makefile
@@ -0,0 +1,5 @@
1dtb-$(CONFIG_ARCH_EXYNOS7) += exynos7-espresso.dtb
2
3always := $(dtb-y)
4subdir-y := $(dts-dirs)
5clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
new file mode 100644
index 000000000000..5424cc450f72
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -0,0 +1,84 @@
1/*
2 * SAMSUNG Exynos7 Espresso board device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos7.dtsi"
14
15/ {
16 model = "Samsung Exynos7 Espresso board based on EXYNOS7";
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
18
19 aliases {
20 serial0 = &serial_2;
21 mshc0 = &mmc_0;
22 mshc2 = &mmc_2;
23 };
24
25 chosen {
26 linux,stdout-path = &serial_2;
27 };
28
29 memory@40000000 {
30 device_type = "memory";
31 reg = <0x0 0x40000000 0x0 0xC0000000>;
32 };
33};
34
35&fin_pll {
36 clock-frequency = <24000000>;
37};
38
39&serial_2 {
40 status = "okay";
41};
42
43&rtc {
44 status = "okay";
45};
46
47&watchdog {
48 status = "okay";
49};
50
51&adc {
52 status = "okay";
53};
54
55&mmc_0 {
56 status = "okay";
57 num-slots = <1>;
58 broken-cd;
59 cap-mmc-highspeed;
60 non-removable;
61 card-detect-delay = <200>;
62 clock-frequency = <800000000>;
63 samsung,dw-mshc-ciu-div = <3>;
64 samsung,dw-mshc-sdr-timing = <0 4>;
65 samsung,dw-mshc-ddr-timing = <0 2>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 &sd0_bus8>;
68 bus-width = <8>;
69};
70
71&mmc_2 {
72 status = "okay";
73 num-slots = <1>;
74 cap-sd-highspeed;
75 card-detect-delay = <200>;
76 clock-frequency = <400000000>;
77 samsung,dw-mshc-ciu-div = <3>;
78 samsung,dw-mshc-sdr-timing = <2 3>;
79 samsung,dw-mshc-ddr-timing = <1 2>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
82 bus-width = <4>;
83 disable-wp;
84};
diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
new file mode 100644
index 000000000000..2eef4a279131
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
@@ -0,0 +1,588 @@
1/*
2 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
8 * device tree nodes in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15&pinctrl_alive {
16 gpa0: gpa0 {
17 gpio-controller;
18 #gpio-cells = <2>;
19
20 interrupt-controller;
21 interrupt-parent = <&gic>;
22 #interrupt-cells = <2>;
23 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
24 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>;
25 };
26
27 gpa1: gpa1 {
28 gpio-controller;
29 #gpio-cells = <2>;
30
31 interrupt-controller;
32 interrupt-parent = <&gic>;
33 #interrupt-cells = <2>;
34 interrupts = <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
35 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
36 };
37
38 gpa2: gpa2 {
39 gpio-controller;
40 #gpio-cells = <2>;
41
42 interrupt-controller;
43 #interrupt-cells = <2>;
44 };
45
46 gpa3: gpa3 {
47 gpio-controller;
48 #gpio-cells = <2>;
49
50 interrupt-controller;
51 #interrupt-cells = <2>;
52 };
53};
54
55&pinctrl_bus0 {
56 gpb0: gpb0 {
57 gpio-controller;
58 #gpio-cells = <2>;
59
60 interrupt-controller;
61 #interrupt-cells = <2>;
62 };
63
64 gpc0: gpc0 {
65 gpio-controller;
66 #gpio-cells = <2>;
67
68 interrupt-controller;
69 #interrupt-cells = <2>;
70 };
71
72 gpc1: gpc1 {
73 gpio-controller;
74 #gpio-cells = <2>;
75
76 interrupt-controller;
77 #interrupt-cells = <2>;
78 };
79
80 gpc2: gpc2 {
81 gpio-controller;
82 #gpio-cells = <2>;
83
84 interrupt-controller;
85 #interrupt-cells = <2>;
86 };
87
88 gpc3: gpc3 {
89 gpio-controller;
90 #gpio-cells = <2>;
91
92 interrupt-controller;
93 #interrupt-cells = <2>;
94 };
95
96 gpd0: gpd0 {
97 gpio-controller;
98 #gpio-cells = <2>;
99
100 interrupt-controller;
101 #interrupt-cells = <2>;
102 };
103
104 gpd1: gpd1 {
105 gpio-controller;
106 #gpio-cells = <2>;
107
108 interrupt-controller;
109 #interrupt-cells = <2>;
110 };
111
112 gpd2: gpd2 {
113 gpio-controller;
114 #gpio-cells = <2>;
115
116 interrupt-controller;
117 #interrupt-cells = <2>;
118 };
119
120 gpd4: gpd4 {
121 gpio-controller;
122 #gpio-cells = <2>;
123
124 interrupt-controller;
125 #interrupt-cells = <2>;
126 };
127
128 gpd5: gpd5 {
129 gpio-controller;
130 #gpio-cells = <2>;
131
132 interrupt-controller;
133 #interrupt-cells = <2>;
134 };
135
136 gpd6: gpd6 {
137 gpio-controller;
138 #gpio-cells = <2>;
139
140 interrupt-controller;
141 #interrupt-cells = <2>;
142 };
143
144 gpd7: gpd7 {
145 gpio-controller;
146 #gpio-cells = <2>;
147
148 interrupt-controller;
149 #interrupt-cells = <2>;
150 };
151
152 gpd8: gpd8 {
153 gpio-controller;
154 #gpio-cells = <2>;
155
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 };
159
160 gpg0: gpg0 {
161 gpio-controller;
162 #gpio-cells = <2>;
163
164 interrupt-controller;
165 #interrupt-cells = <2>;
166 };
167
168 gpg3: gpg3 {
169 gpio-controller;
170 #gpio-cells = <2>;
171
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 };
175
176 hs_i2c10_bus: hs-i2c10-bus {
177 samsung,pins = "gpb0-1", "gpb0-0";
178 samsung,pin-function = <2>;
179 samsung,pin-pud = <3>;
180 samsung,pin-drv = <0>;
181 };
182
183 hs_i2c11_bus: hs-i2c11-bus {
184 samsung,pins = "gpb0-3", "gpb0-2";
185 samsung,pin-function = <2>;
186 samsung,pin-pud = <3>;
187 samsung,pin-drv = <0>;
188 };
189
190 hs_i2c2_bus: hs-i2c2-bus {
191 samsung,pins = "gpd0-3", "gpd0-2";
192 samsung,pin-function = <3>;
193 samsung,pin-pud = <3>;
194 samsung,pin-drv = <0>;
195 };
196
197 uart0_data: uart0-data {
198 samsung,pins = "gpd0-0", "gpd0-1";
199 samsung,pin-function = <2>;
200 samsung,pin-pud = <0>;
201 samsung,pin-drv = <0>;
202 };
203
204 uart0_fctl: uart0-fctl {
205 samsung,pins = "gpd0-2", "gpd0-3";
206 samsung,pin-function = <2>;
207 samsung,pin-pud = <0>;
208 samsung,pin-drv = <0>;
209 };
210
211 uart2_data: uart2-data {
212 samsung,pins = "gpd1-4", "gpd1-5";
213 samsung,pin-function = <2>;
214 samsung,pin-pud = <0>;
215 samsung,pin-drv = <0>;
216 };
217
218 hs_i2c3_bus: hs-i2c3-bus {
219 samsung,pins = "gpd1-3", "gpd1-2";
220 samsung,pin-function = <3>;
221 samsung,pin-pud = <3>;
222 samsung,pin-drv = <0>;
223 };
224
225 uart1_data: uart1-data {
226 samsung,pins = "gpd1-0", "gpd1-1";
227 samsung,pin-function = <2>;
228 samsung,pin-pud = <0>;
229 samsung,pin-drv = <0>;
230 };
231
232 uart1_fctl: uart1-fctl {
233 samsung,pins = "gpd1-2", "gpd1-3";
234 samsung,pin-function = <2>;
235 samsung,pin-pud = <0>;
236 samsung,pin-drv = <0>;
237 };
238
239 hs_i2c0_bus: hs-i2c0-bus {
240 samsung,pins = "gpd2-1", "gpd2-0";
241 samsung,pin-function = <2>;
242 samsung,pin-pud = <3>;
243 samsung,pin-drv = <0>;
244 };
245
246 hs_i2c1_bus: hs-i2c1-bus {
247 samsung,pins = "gpd2-3", "gpd2-2";
248 samsung,pin-function = <2>;
249 samsung,pin-pud = <3>;
250 samsung,pin-drv = <0>;
251 };
252
253 hs_i2c9_bus: hs-i2c9-bus {
254 samsung,pins = "gpd2-7", "gpd2-6";
255 samsung,pin-function = <3>;
256 samsung,pin-pud = <3>;
257 samsung,pin-drv = <0>;
258 };
259
260 pwm0_out: pwm0-out {
261 samsung,pins = "gpd2-4";
262 samsung,pin-function = <2>;
263 samsung,pin-pud = <0>;
264 samsung,pin-drv = <0>;
265 };
266
267 pwm1_out: pwm1-out {
268 samsung,pins = "gpd2-5";
269 samsung,pin-function = <2>;
270 samsung,pin-pud = <0>;
271 samsung,pin-drv = <0>;
272 };
273
274 pwm2_out: pwm2-out {
275 samsung,pins = "gpd2-6";
276 samsung,pin-function = <2>;
277 samsung,pin-pud = <0>;
278 samsung,pin-drv = <0>;
279 };
280
281 pwm3_out: pwm3-out {
282 samsung,pins = "gpd2-7";
283 samsung,pin-function = <2>;
284 samsung,pin-pud = <0>;
285 samsung,pin-drv = <0>;
286 };
287
288 hs_i2c8_bus: hs-i2c8-bus {
289 samsung,pins = "gpd5-3", "gpd5-2";
290 samsung,pin-function = <3>;
291 samsung,pin-pud = <3>;
292 samsung,pin-drv = <0>;
293 };
294
295 uart3_data: uart3-data {
296 samsung,pins = "gpd5-0", "gpd5-1";
297 samsung,pin-function = <3>;
298 samsung,pin-pud = <0>;
299 samsung,pin-drv = <0>;
300 };
301
302 spi2_bus: spi2-bus {
303 samsung,pins = "gpd5-0", "gpd5-1", "gpd5-2", "gpd5-3";
304 samsung,pin-function = <2>;
305 samsung,pin-pud = <3>;
306 samsung,pin-drv = <0>;
307 };
308
309 spi1_bus: spi1-bus {
310 samsung,pins = "gpd6-2", "gpd6-3", "gpd6-4", "gpd6-5";
311 samsung,pin-function = <2>;
312 samsung,pin-pud = <3>;
313 samsung,pin-drv = <0>;
314 };
315
316 spi0_bus: spi0-bus {
317 samsung,pins = "gpd8-0", "gpd8-1", "gpd6-0", "gpd6-1";
318 samsung,pin-function = <2>;
319 samsung,pin-pud = <3>;
320 samsung,pin-drv = <0>;
321 };
322
323 hs_i2c4_bus: hs-i2c4-bus {
324 samsung,pins = "gpg3-1", "gpg3-0";
325 samsung,pin-function = <2>;
326 samsung,pin-pud = <3>;
327 samsung,pin-drv = <0>;
328 };
329
330 hs_i2c5_bus: hs-i2c5-bus {
331 samsung,pins = "gpg3-3", "gpg3-2";
332 samsung,pin-function = <2>;
333 samsung,pin-pud = <3>;
334 samsung,pin-drv = <0>;
335 };
336};
337
338&pinctrl_nfc {
339 gpj0: gpj0 {
340 gpio-controller;
341 #gpio-cells = <2>;
342
343 interrupt-controller;
344 #interrupt-cells = <2>;
345 };
346
347 hs_i2c6_bus: hs-i2c6-bus {
348 samsung,pins = "gpj0-1", "gpj0-0";
349 samsung,pin-function = <2>;
350 samsung,pin-pud = <3>;
351 samsung,pin-drv = <0>;
352 };
353};
354
355&pinctrl_touch {
356 gpj1: gpj1 {
357 gpio-controller;
358 #gpio-cells = <2>;
359
360 interrupt-controller;
361 #interrupt-cells = <2>;
362 };
363
364 hs_i2c7_bus: hs-i2c7-bus {
365 samsung,pins = "gpj1-1", "gpj1-0";
366 samsung,pin-function = <2>;
367 samsung,pin-pud = <3>;
368 samsung,pin-drv = <0>;
369 };
370};
371
372&pinctrl_ff {
373 gpg4: gpg4 {
374 gpio-controller;
375 #gpio-cells = <2>;
376
377 interrupt-controller;
378 #interrupt-cells = <2>;
379 };
380
381 spi3_bus: spi3-bus {
382 samsung,pins = "gpg4-0", "gpg4-1", "gpg4-2", "gpg4-3";
383 samsung,pin-function = <2>;
384 samsung,pin-pud = <3>;
385 samsung,pin-drv = <0>;
386 };
387};
388
389&pinctrl_ese {
390 gpv7: gpv7 {
391 gpio-controller;
392 #gpio-cells = <2>;
393
394 interrupt-controller;
395 #interrupt-cells = <2>;
396 };
397
398 spi4_bus: spi4-bus {
399 samsung,pins = "gpv7-0", "gpv7-1", "gpv7-2", "gpv7-3";
400 samsung,pin-function = <2>;
401 samsung,pin-pud = <3>;
402 samsung,pin-drv = <0>;
403 };
404};
405
406&pinctrl_fsys0 {
407 gpr4: gpr4 {
408 gpio-controller;
409 #gpio-cells = <2>;
410
411 interrupt-controller;
412 #interrupt-cells = <2>;
413 };
414
415 sd2_clk: sd2-clk {
416 samsung,pins = "gpr4-0";
417 samsung,pin-function = <2>;
418 samsung,pin-pud = <0>;
419 samsung,pin-drv = <3>;
420 };
421
422 sd2_cmd: sd2-cmd {
423 samsung,pins = "gpr4-1";
424 samsung,pin-function = <2>;
425 samsung,pin-pud = <0>;
426 samsung,pin-drv = <3>;
427 };
428
429 sd2_cd: sd2-cd {
430 samsung,pins = "gpr4-2";
431 samsung,pin-function = <2>;
432 samsung,pin-pud = <3>;
433 samsung,pin-drv = <3>;
434 };
435
436 sd2_bus1: sd2-bus-width1 {
437 samsung,pins = "gpr4-3";
438 samsung,pin-function = <2>;
439 samsung,pin-pud = <3>;
440 samsung,pin-drv = <3>;
441 };
442
443 sd2_bus4: sd2-bus-width4 {
444 samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
445 samsung,pin-function = <2>;
446 samsung,pin-pud = <3>;
447 samsung,pin-drv = <3>;
448 };
449};
450
451&pinctrl_fsys1 {
452 gpr0: gpr0 {
453 gpio-controller;
454 #gpio-cells = <2>;
455
456 interrupt-controller;
457 #interrupt-cells = <2>;
458 };
459
460 gpr1: gpr1 {
461 gpio-controller;
462 #gpio-cells = <2>;
463
464 interrupt-controller;
465 #interrupt-cells = <2>;
466 };
467
468 gpr2: gpr2 {
469 gpio-controller;
470 #gpio-cells = <2>;
471
472 interrupt-controller;
473 #interrupt-cells = <2>;
474 };
475
476 gpr3: gpr3 {
477 gpio-controller;
478 #gpio-cells = <2>;
479
480 interrupt-controller;
481 #interrupt-cells = <2>;
482 };
483
484 sd0_clk: sd0-clk {
485 samsung,pins = "gpr0-0";
486 samsung,pin-function = <2>;
487 samsung,pin-pud = <0>;
488 samsung,pin-drv = <3>;
489 };
490
491 sd0_cmd: sd0-cmd {
492 samsung,pins = "gpr0-1";
493 samsung,pin-function = <2>;
494 samsung,pin-pud = <3>;
495 samsung,pin-drv = <3>;
496 };
497
498 sd0_ds: sd0-ds {
499 samsung,pins = "gpr0-2";
500 samsung,pin-function = <2>;
501 samsung,pin-pud = <1>;
502 samsung,pin-drv = <3>;
503 };
504
505 sd0_qrdy: sd0-qrdy {
506 samsung,pins = "gpr0-3";
507 samsung,pin-function = <2>;
508 samsung,pin-pud = <1>;
509 samsung,pin-drv = <3>;
510 };
511
512 sd0_bus1: sd0-bus-width1 {
513 samsung,pins = "gpr1-0";
514 samsung,pin-function = <2>;
515 samsung,pin-pud = <3>;
516 samsung,pin-drv = <3>;
517 };
518
519 sd0_bus4: sd0-bus-width4 {
520 samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
521 samsung,pin-function = <2>;
522 samsung,pin-pud = <3>;
523 samsung,pin-drv = <3>;
524 };
525
526 sd0_bus8: sd0-bus-width8 {
527 samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
528 samsung,pin-function = <2>;
529 samsung,pin-pud = <3>;
530 samsung,pin-drv = <3>;
531 };
532
533 sd1_clk: sd1-clk {
534 samsung,pins = "gpr2-0";
535 samsung,pin-function = <2>;
536 samsung,pin-pud = <0>;
537 samsung,pin-drv = <2>;
538 };
539
540 sd1_cmd: sd1-cmd {
541 samsung,pins = "gpr2-1";
542 samsung,pin-function = <2>;
543 samsung,pin-pud = <0>;
544 samsung,pin-drv = <2>;
545 };
546
547 sd1_ds: sd1-ds {
548 samsung,pins = "gpr2-2";
549 samsung,pin-function = <2>;
550 samsung,pin-pud = <1>;
551 samsung,pin-drv = <6>;
552 };
553
554 sd1_qrdy: sd1-qrdy {
555 samsung,pins = "gpr2-3";
556 samsung,pin-function = <2>;
557 samsung,pin-pud = <1>;
558 samsung,pin-drv = <6>;
559 };
560
561 sd1_int: sd1-int {
562 samsung,pins = "gpr2-4";
563 samsung,pin-function = <2>;
564 samsung,pin-pud = <1>;
565 samsung,pin-drv = <6>;
566 };
567
568 sd1_bus1: sd1-bus-width1 {
569 samsung,pins = "gpr3-0";
570 samsung,pin-function = <2>;
571 samsung,pin-pud = <3>;
572 samsung,pin-drv = <2>;
573 };
574
575 sd1_bus4: sd1-bus-width4 {
576 samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
577 samsung,pin-function = <2>;
578 samsung,pin-pud = <3>;
579 samsung,pin-drv = <2>;
580 };
581
582 sd1_bus8: sd1-bus-width8 {
583 samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
584 samsung,pin-function = <2>;
585 samsung,pin-pud = <3>;
586 samsung,pin-drv = <2>;
587 };
588};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
new file mode 100644
index 000000000000..d7a37c3a6b52
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -0,0 +1,530 @@
1/*
2 * SAMSUNG EXYNOS7 SoC device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <dt-bindings/clock/exynos7-clk.h>
13
14/ {
15 compatible = "samsung,exynos7";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 pinctrl0 = &pinctrl_alive;
22 pinctrl1 = &pinctrl_bus0;
23 pinctrl2 = &pinctrl_nfc;
24 pinctrl3 = &pinctrl_touch;
25 pinctrl4 = &pinctrl_ff;
26 pinctrl5 = &pinctrl_ese;
27 pinctrl6 = &pinctrl_fsys0;
28 pinctrl7 = &pinctrl_fsys1;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 compatible = "arm,cortex-a57", "arm,armv8";
38 reg = <0x0>;
39 enable-method = "psci";
40 };
41
42 cpu@1 {
43 device_type = "cpu";
44 compatible = "arm,cortex-a57", "arm,armv8";
45 reg = <0x1>;
46 enable-method = "psci";
47 };
48
49 cpu@2 {
50 device_type = "cpu";
51 compatible = "arm,cortex-a57", "arm,armv8";
52 reg = <0x2>;
53 enable-method = "psci";
54 };
55
56 cpu@3 {
57 device_type = "cpu";
58 compatible = "arm,cortex-a57", "arm,armv8";
59 reg = <0x3>;
60 enable-method = "psci";
61 };
62 };
63
64 psci {
65 compatible = "arm,psci-0.2";
66 method = "smc";
67 };
68
69 soc: soc {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges = <0 0 0 0x18000000>;
74
75 chipid@10000000 {
76 compatible = "samsung,exynos4210-chipid";
77 reg = <0x10000000 0x100>;
78 };
79
80 fin_pll: xxti {
81 compatible = "fixed-clock";
82 clock-output-names = "fin_pll";
83 #clock-cells = <0>;
84 };
85
86 gic: interrupt-controller@11001000 {
87 compatible = "arm,gic-400";
88 #interrupt-cells = <3>;
89 #address-cells = <0>;
90 interrupt-controller;
91 reg = <0x11001000 0x1000>,
92 <0x11002000 0x1000>,
93 <0x11004000 0x2000>,
94 <0x11006000 0x2000>;
95 };
96
97 clock_topc: clock-controller@10570000 {
98 compatible = "samsung,exynos7-clock-topc";
99 reg = <0x10570000 0x10000>;
100 #clock-cells = <1>;
101 };
102
103 clock_top0: clock-controller@105d0000 {
104 compatible = "samsung,exynos7-clock-top0";
105 reg = <0x105d0000 0xb000>;
106 #clock-cells = <1>;
107 clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
108 <&clock_topc DOUT_SCLK_BUS1_PLL>,
109 <&clock_topc DOUT_SCLK_CC_PLL>,
110 <&clock_topc DOUT_SCLK_MFC_PLL>;
111 clock-names = "fin_pll", "dout_sclk_bus0_pll",
112 "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
113 "dout_sclk_mfc_pll";
114 };
115
116 clock_top1: clock-controller@105e0000 {
117 compatible = "samsung,exynos7-clock-top1";
118 reg = <0x105e0000 0xb000>;
119 #clock-cells = <1>;
120 clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
121 <&clock_topc DOUT_SCLK_BUS1_PLL>,
122 <&clock_topc DOUT_SCLK_CC_PLL>,
123 <&clock_topc DOUT_SCLK_MFC_PLL>;
124 clock-names = "fin_pll", "dout_sclk_bus0_pll",
125 "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
126 "dout_sclk_mfc_pll";
127 };
128
129 clock_ccore: clock-controller@105b0000 {
130 compatible = "samsung,exynos7-clock-ccore";
131 reg = <0x105b0000 0xd00>;
132 #clock-cells = <1>;
133 clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_CCORE_133>;
134 clock-names = "fin_pll", "dout_aclk_ccore_133";
135 };
136
137 clock_peric0: clock-controller@13610000 {
138 compatible = "samsung,exynos7-clock-peric0";
139 reg = <0x13610000 0xd00>;
140 #clock-cells = <1>;
141 clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC0>,
142 <&clock_top0 CLK_SCLK_UART0>;
143 clock-names = "fin_pll", "dout_aclk_peric0_66",
144 "sclk_uart0";
145 };
146
147 clock_peric1: clock-controller@14c80000 {
148 compatible = "samsung,exynos7-clock-peric1";
149 reg = <0x14c80000 0xd00>;
150 #clock-cells = <1>;
151 clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>,
152 <&clock_top0 CLK_SCLK_UART1>,
153 <&clock_top0 CLK_SCLK_UART2>,
154 <&clock_top0 CLK_SCLK_UART3>;
155 clock-names = "fin_pll", "dout_aclk_peric1_66",
156 "sclk_uart1", "sclk_uart2", "sclk_uart3";
157 };
158
159 clock_peris: clock-controller@10040000 {
160 compatible = "samsung,exynos7-clock-peris";
161 reg = <0x10040000 0xd00>;
162 #clock-cells = <1>;
163 clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_PERIS>;
164 clock-names = "fin_pll", "dout_aclk_peris_66";
165 };
166
167 clock_fsys0: clock-controller@10e90000 {
168 compatible = "samsung,exynos7-clock-fsys0";
169 reg = <0x10e90000 0xd00>;
170 #clock-cells = <1>;
171 clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS0_200>,
172 <&clock_top1 DOUT_SCLK_MMC2>;
173 clock-names = "fin_pll", "dout_aclk_fsys0_200",
174 "dout_sclk_mmc2";
175 };
176
177 clock_fsys1: clock-controller@156e0000 {
178 compatible = "samsung,exynos7-clock-fsys1";
179 reg = <0x156e0000 0xd00>;
180 #clock-cells = <1>;
181 clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
182 <&clock_top1 DOUT_SCLK_MMC0>,
183 <&clock_top1 DOUT_SCLK_MMC1>;
184 clock-names = "fin_pll", "dout_aclk_fsys1_200",
185 "dout_sclk_mmc0", "dout_sclk_mmc1";
186 };
187
188 serial_0: serial@13630000 {
189 compatible = "samsung,exynos4210-uart";
190 reg = <0x13630000 0x100>;
191 interrupts = <0 440 0>;
192 clocks = <&clock_peric0 PCLK_UART0>,
193 <&clock_peric0 SCLK_UART0>;
194 clock-names = "uart", "clk_uart_baud0";
195 status = "disabled";
196 };
197
198 serial_1: serial@14c20000 {
199 compatible = "samsung,exynos4210-uart";
200 reg = <0x14c20000 0x100>;
201 interrupts = <0 456 0>;
202 clocks = <&clock_peric1 PCLK_UART1>,
203 <&clock_peric1 SCLK_UART1>;
204 clock-names = "uart", "clk_uart_baud0";
205 status = "disabled";
206 };
207
208 serial_2: serial@14c30000 {
209 compatible = "samsung,exynos4210-uart";
210 reg = <0x14c30000 0x100>;
211 interrupts = <0 457 0>;
212 clocks = <&clock_peric1 PCLK_UART2>,
213 <&clock_peric1 SCLK_UART2>;
214 clock-names = "uart", "clk_uart_baud0";
215 status = "disabled";
216 };
217
218 serial_3: serial@14c40000 {
219 compatible = "samsung,exynos4210-uart";
220 reg = <0x14c40000 0x100>;
221 interrupts = <0 458 0>;
222 clocks = <&clock_peric1 PCLK_UART3>,
223 <&clock_peric1 SCLK_UART3>;
224 clock-names = "uart", "clk_uart_baud0";
225 status = "disabled";
226 };
227
228 pinctrl_alive: pinctrl@10580000 {
229 compatible = "samsung,exynos7-pinctrl";
230 reg = <0x10580000 0x1000>;
231
232 wakeup-interrupt-controller {
233 compatible = "samsung,exynos7-wakeup-eint";
234 interrupt-parent = <&gic>;
235 interrupts = <0 16 0>;
236 };
237 };
238
239 pinctrl_bus0: pinctrl@13470000 {
240 compatible = "samsung,exynos7-pinctrl";
241 reg = <0x13470000 0x1000>;
242 interrupts = <0 383 0>;
243 };
244
245 pinctrl_nfc: pinctrl@14cd0000 {
246 compatible = "samsung,exynos7-pinctrl";
247 reg = <0x14cd0000 0x1000>;
248 interrupts = <0 473 0>;
249 };
250
251 pinctrl_touch: pinctrl@14ce0000 {
252 compatible = "samsung,exynos7-pinctrl";
253 reg = <0x14ce0000 0x1000>;
254 interrupts = <0 474 0>;
255 };
256
257 pinctrl_ff: pinctrl@14c90000 {
258 compatible = "samsung,exynos7-pinctrl";
259 reg = <0x14c90000 0x1000>;
260 interrupts = <0 475 0>;
261 };
262
263 pinctrl_ese: pinctrl@14ca0000 {
264 compatible = "samsung,exynos7-pinctrl";
265 reg = <0x14ca0000 0x1000>;
266 interrupts = <0 476 0>;
267 };
268
269 pinctrl_fsys0: pinctrl@10e60000 {
270 compatible = "samsung,exynos7-pinctrl";
271 reg = <0x10e60000 0x1000>;
272 interrupts = <0 221 0>;
273 };
274
275 pinctrl_fsys1: pinctrl@15690000 {
276 compatible = "samsung,exynos7-pinctrl";
277 reg = <0x15690000 0x1000>;
278 interrupts = <0 203 0>;
279 };
280
281 hsi2c_0: hsi2c@13640000 {
282 compatible = "samsung,exynos7-hsi2c";
283 reg = <0x13640000 0x1000>;
284 interrupts = <0 441 0>;
285 #address-cells = <1>;
286 #size-cells = <0>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&hs_i2c0_bus>;
289 clocks = <&clock_peric0 PCLK_HSI2C0>;
290 clock-names = "hsi2c";
291 status = "disabled";
292 };
293
294 hsi2c_1: hsi2c@13650000 {
295 compatible = "samsung,exynos7-hsi2c";
296 reg = <0x13650000 0x1000>;
297 interrupts = <0 442 0>;
298 #address-cells = <1>;
299 #size-cells = <0>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&hs_i2c1_bus>;
302 clocks = <&clock_peric0 PCLK_HSI2C1>;
303 clock-names = "hsi2c";
304 status = "disabled";
305 };
306
307 hsi2c_2: hsi2c@14e60000 {
308 compatible = "samsung,exynos7-hsi2c";
309 reg = <0x14e60000 0x1000>;
310 interrupts = <0 459 0>;
311 #address-cells = <1>;
312 #size-cells = <0>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&hs_i2c2_bus>;
315 clocks = <&clock_peric1 PCLK_HSI2C2>;
316 clock-names = "hsi2c";
317 status = "disabled";
318 };
319
320 hsi2c_3: hsi2c@14e70000 {
321 compatible = "samsung,exynos7-hsi2c";
322 reg = <0x14e70000 0x1000>;
323 interrupts = <0 460 0>;
324 #address-cells = <1>;
325 #size-cells = <0>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&hs_i2c3_bus>;
328 clocks = <&clock_peric1 PCLK_HSI2C3>;
329 clock-names = "hsi2c";
330 status = "disabled";
331 };
332
333 hsi2c_4: hsi2c@13660000 {
334 compatible = "samsung,exynos7-hsi2c";
335 reg = <0x13660000 0x1000>;
336 interrupts = <0 443 0>;
337 #address-cells = <1>;
338 #size-cells = <0>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&hs_i2c4_bus>;
341 clocks = <&clock_peric0 PCLK_HSI2C4>;
342 clock-names = "hsi2c";
343 status = "disabled";
344 };
345
346 hsi2c_5: hsi2c@13670000 {
347 compatible = "samsung,exynos7-hsi2c";
348 reg = <0x13670000 0x1000>;
349 interrupts = <0 444 0>;
350 #address-cells = <1>;
351 #size-cells = <0>;
352 pinctrl-names = "default";
353 pinctrl-0 = <&hs_i2c5_bus>;
354 clocks = <&clock_peric0 PCLK_HSI2C5>;
355 clock-names = "hsi2c";
356 status = "disabled";
357 };
358
359 hsi2c_6: hsi2c@14e00000 {
360 compatible = "samsung,exynos7-hsi2c";
361 reg = <0x14e00000 0x1000>;
362 interrupts = <0 461 0>;
363 #address-cells = <1>;
364 #size-cells = <0>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&hs_i2c6_bus>;
367 clocks = <&clock_peric1 PCLK_HSI2C6>;
368 clock-names = "hsi2c";
369 status = "disabled";
370 };
371
372 hsi2c_7: hsi2c@13e10000 {
373 compatible = "samsung,exynos7-hsi2c";
374 reg = <0x13e10000 0x1000>;
375 interrupts = <0 462 0>;
376 #address-cells = <1>;
377 #size-cells = <0>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&hs_i2c7_bus>;
380 clocks = <&clock_peric1 PCLK_HSI2C7>;
381 clock-names = "hsi2c";
382 status = "disabled";
383 };
384
385 hsi2c_8: hsi2c@14e20000 {
386 compatible = "samsung,exynos7-hsi2c";
387 reg = <0x14e20000 0x1000>;
388 interrupts = <0 463 0>;
389 #address-cells = <1>;
390 #size-cells = <0>;
391 pinctrl-names = "default";
392 pinctrl-0 = <&hs_i2c8_bus>;
393 clocks = <&clock_peric1 PCLK_HSI2C8>;
394 clock-names = "hsi2c";
395 status = "disabled";
396 };
397
398 hsi2c_9: hsi2c@13680000 {
399 compatible = "samsung,exynos7-hsi2c";
400 reg = <0x13680000 0x1000>;
401 interrupts = <0 445 0>;
402 #address-cells = <1>;
403 #size-cells = <0>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&hs_i2c9_bus>;
406 clocks = <&clock_peric0 PCLK_HSI2C9>;
407 clock-names = "hsi2c";
408 status = "disabled";
409 };
410
411 hsi2c_10: hsi2c@13690000 {
412 compatible = "samsung,exynos7-hsi2c";
413 reg = <0x13690000 0x1000>;
414 interrupts = <0 446 0>;
415 #address-cells = <1>;
416 #size-cells = <0>;
417 pinctrl-names = "default";
418 pinctrl-0 = <&hs_i2c10_bus>;
419 clocks = <&clock_peric0 PCLK_HSI2C10>;
420 clock-names = "hsi2c";
421 status = "disabled";
422 };
423
424 hsi2c_11: hsi2c@136a0000 {
425 compatible = "samsung,exynos7-hsi2c";
426 reg = <0x136a0000 0x1000>;
427 interrupts = <0 447 0>;
428 #address-cells = <1>;
429 #size-cells = <0>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&hs_i2c11_bus>;
432 clocks = <&clock_peric0 PCLK_HSI2C11>;
433 clock-names = "hsi2c";
434 status = "disabled";
435 };
436
437 timer {
438 compatible = "arm,armv8-timer";
439 interrupts = <1 13 0xff01>,
440 <1 14 0xff01>,
441 <1 11 0xff01>,
442 <1 10 0xff01>;
443 };
444
445 pmu_system_controller: system-controller@105c0000 {
446 compatible = "samsung,exynos7-pmu", "syscon";
447 reg = <0x105c0000 0x5000>;
448 };
449
450 rtc: rtc@10590000 {
451 compatible = "samsung,s3c6410-rtc";
452 reg = <0x10590000 0x100>;
453 interrupts = <0 355 0>, <0 356 0>;
454 clocks = <&clock_ccore PCLK_RTC>;
455 clock-names = "rtc";
456 status = "disabled";
457 };
458
459 watchdog: watchdog@101d0000 {
460 compatible = "samsung,exynos7-wdt";
461 reg = <0x101d0000 0x100>;
462 interrupts = <0 110 0>;
463 clocks = <&clock_peris PCLK_WDT>;
464 clock-names = "watchdog";
465 samsung,syscon-phandle = <&pmu_system_controller>;
466 status = "disabled";
467 };
468
469 mmc_0: mmc@15740000 {
470 compatible = "samsung,exynos7-dw-mshc-smu";
471 interrupts = <0 201 0>;
472 #address-cells = <1>;
473 #size-cells = <0>;
474 reg = <0x15740000 0x2000>;
475 clocks = <&clock_fsys1 ACLK_MMC0>,
476 <&clock_top1 CLK_SCLK_MMC0>;
477 clock-names = "biu", "ciu";
478 fifo-depth = <0x40>;
479 status = "disabled";
480 };
481
482 mmc_1: mmc@15750000 {
483 compatible = "samsung,exynos7-dw-mshc";
484 interrupts = <0 202 0>;
485 #address-cells = <1>;
486 #size-cells = <0>;
487 reg = <0x15750000 0x2000>;
488 clocks = <&clock_fsys1 ACLK_MMC1>,
489 <&clock_top1 CLK_SCLK_MMC1>;
490 clock-names = "biu", "ciu";
491 fifo-depth = <0x40>;
492 status = "disabled";
493 };
494
495 mmc_2: mmc@15560000 {
496 compatible = "samsung,exynos7-dw-mshc-smu";
497 interrupts = <0 216 0>;
498 #address-cells = <1>;
499 #size-cells = <0>;
500 reg = <0x15560000 0x2000>;
501 clocks = <&clock_fsys0 ACLK_MMC2>,
502 <&clock_top1 CLK_SCLK_MMC2>;
503 clock-names = "biu", "ciu";
504 fifo-depth = <0x40>;
505 status = "disabled";
506 };
507
508 adc: adc@13620000 {
509 compatible = "samsung,exynos7-adc";
510 reg = <0x13620000 0x100>;
511 interrupts = <0 448 0>;
512 clocks = <&clock_peric0 PCLK_ADCIF>;
513 clock-names = "adc";
514 #io-channel-cells = <1>;
515 io-channel-ranges;
516 status = "disabled";
517 };
518
519 pwm: pwm@136c0000 {
520 compatible = "samsung,exynos4210-pwm";
521 reg = <0x136c0000 0x100>;
522 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
523 #pwm-cells = <3>;
524 clocks = <&clock_peric0 PCLK_PWM>;
525 clock-names = "timers";
526 };
527 };
528};
529
530#include "exynos7-pinctrl.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-12 20:54:56 -0500