diff options
author | Rob Herring <rob.herring@calxeda.com> | 2013-08-30 17:49:25 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-09-03 22:21:15 -0400 |
commit | f7ea10520d7dacbc416d130c4b10505c66bf4c36 (patch) | |
tree | 22fc089169eec46e71464711ee823e5c5272a2a0 | |
parent | cbe157b60c8e70d4b4dc937dfdd39525d8f47b46 (diff) |
net: calxedaxgmac: enable interrupts after napi_enable
Fix a race condition where the interrupt handler may have called
napi_schedule before napi_enable is called. This would disable interrupts
and never actually schedule napi to run.
Reported-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/calxeda/xgmac.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/ethernet/calxeda/xgmac.c b/drivers/net/ethernet/calxeda/xgmac.c index 5d0b61a5c72b..73d3f83468c4 100644 --- a/drivers/net/ethernet/calxeda/xgmac.c +++ b/drivers/net/ethernet/calxeda/xgmac.c | |||
@@ -959,9 +959,7 @@ static int xgmac_hw_init(struct net_device *dev) | |||
959 | DMA_BUS_MODE_FB | DMA_BUS_MODE_ATDS | DMA_BUS_MODE_AAL; | 959 | DMA_BUS_MODE_FB | DMA_BUS_MODE_ATDS | DMA_BUS_MODE_AAL; |
960 | writel(value, ioaddr + XGMAC_DMA_BUS_MODE); | 960 | writel(value, ioaddr + XGMAC_DMA_BUS_MODE); |
961 | 961 | ||
962 | /* Enable interrupts */ | 962 | writel(0, ioaddr + XGMAC_DMA_INTR_ENA); |
963 | writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS); | ||
964 | writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA); | ||
965 | 963 | ||
966 | /* Mask power mgt interrupt */ | 964 | /* Mask power mgt interrupt */ |
967 | writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT); | 965 | writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT); |
@@ -1029,6 +1027,10 @@ static int xgmac_open(struct net_device *dev) | |||
1029 | napi_enable(&priv->napi); | 1027 | napi_enable(&priv->napi); |
1030 | netif_start_queue(dev); | 1028 | netif_start_queue(dev); |
1031 | 1029 | ||
1030 | /* Enable interrupts */ | ||
1031 | writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS); | ||
1032 | writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA); | ||
1033 | |||
1032 | return 0; | 1034 | return 0; |
1033 | } | 1035 | } |
1034 | 1036 | ||