drm/radeon/kms: DCE6 disp eng pll updates

Rename the function to better match the functionality.
DCPLL became PLL0 on DCE6.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

4 files changed, 13 insertions, 8 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 62ddf8dd9e69..6fe4a6dc4d6e 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -737,7 +737,7 @@ union set_pixel_clock {
 /* on DCE5, make sure the voltage is high enough to support the
  * required disp clk.
  */
-static void atombios_crtc_set_dcpll(struct radeon_device *rdev,
+static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,
                                     u32 dispclk)
 {
         u8 frev, crev;
@@ -767,7 +767,10 @@ static void atombios_crtc_set_dcpll(struct radeon_device *rdev,
                          * SetPixelClock provides the dividers
                          */
                         args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
-                        args.v6.ucPpll = ATOM_DCPLL;
+                        if (ASIC_IS_DCE6(rdev))
+                                args.v6.ucPpll = ATOM_PPLL0;
+                        else
+                                args.v6.ucPpll = ATOM_DCPLL;
                         break;
                 default:
                         DRM_ERROR("Unknown table version %d %d\n", frev, crev);
@@ -1521,10 +1524,12 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
 
 }
 
-void radeon_atom_dcpll_init(struct radeon_device *rdev)
+void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev)
 {
         /* always set DCPLL */
-        if (ASIC_IS_DCE4(rdev)) {
+        if (ASIC_IS_DCE6(rdev))
+                atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);
+        else if (ASIC_IS_DCE4(rdev)) {
                 struct radeon_atom_ss ss;
                 bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss,
                                                                    ASIC_INTERNAL_SS_ON_DCPLL,
@@ -1532,7 +1537,7 @@ void radeon_atom_dcpll_init(struct radeon_device *rdev)
                 if (ss_enabled)
                         atombios_crtc_program_ss(rdev, ATOM_DISABLE, ATOM_DCPLL, &ss);
                 /* XXX: DCE5, make sure voltage, dispclk is high enough */
-                atombios_crtc_set_dcpll(rdev, rdev->clock.default_dispclk);
+                atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);
                 if (ss_enabled)
                         atombios_crtc_program_ss(rdev, ATOM_ENABLE, ATOM_DCPLL, &ss);
         }
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 9b8dace0c60c..beeefb841c0b 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -967,7 +967,7 @@ int radeon_resume_kms(struct drm_device *dev)
         /* init dig PHYs, disp eng pll */
         if (rdev->is_atom_bios) {
                 radeon_atom_encoder_init(rdev);
-                radeon_atom_dcpll_init(rdev);
+                radeon_atom_disp_eng_pll_init(rdev);
         }
         /* reset hpd state */
         radeon_hpd_init(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 1ebcef25b915..8086c96e0b06 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1296,7 +1296,7 @@ int radeon_modeset_init(struct radeon_device *rdev)
         /* init dig PHYs, disp eng pll */
         if (rdev->is_atom_bios) {
                 radeon_atom_encoder_init(rdev);
-                radeon_atom_dcpll_init(rdev);
+                radeon_atom_disp_eng_pll_init(rdev);
         }
 
         /* initialize hpd */
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 8a85598fb242..f7eb5d8b9fd3 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -491,7 +491,7 @@ extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
                                     struct drm_connector *connector);
 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
-extern void radeon_atom_dcpll_init(struct radeon_device *rdev);
+extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
                                            int action, uint8_t lane_num,
                                            uint8_t lane_set);