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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-04-08 05:36:20 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-04 08:04:01 -0400
commited3e26049e238d066841f858509b764df37c3776 (patch)
treea86df651aab20406f6dbd6ae4ce0196da61f6b0c
parent728d53f4a4a880d8961fb15e1b19c541c5fa1b0f (diff)
sh-pfc: r8a7790: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum entries from the mach/r8a7790.h header. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c90
1 files changed, 60 insertions, 30 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 51219e1b0c27..1656915a0b2c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -24,39 +24,69 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/platform_data/gpio-rcar.h> 25#include <linux/platform_data/gpio-rcar.h>
26 26
27#include <mach/r8a7790.h>
28
29#include "core.h" 27#include "core.h"
30#include "sh_pfc.h" 28#include "sh_pfc.h"
31 29
32#define CPU_32_PORT(fn, pfx, sfx) \ 30#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
33 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ 31
34 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ 32#define PORT_GP_32(bank, fn, sfx) \
35 PORT_1(fn, pfx##31, sfx) 33 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
36 34 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
37#define CPU_32_PORT1(fn, pfx, sfx) \ 35 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
38 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ 36 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
39 PORT_10(fn, pfx##2, sfx) 37 PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
40 38 PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
41#define CPU_32_PORT2(fn, pfx, sfx) \ 39 PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
42 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ 40 PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
43 PORT_10(fn, pfx##2, sfx) 41 PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
44 42 PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
45/* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */ 43 PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
46#define CPU_ALL_PORT(fn, pfx, sfx) \ 44 PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
47 CPU_32_PORT(fn, pfx##_0_, sfx), \ 45 PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
48 CPU_32_PORT1(fn, pfx##_1_, sfx), \ 46 PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
49 CPU_32_PORT2(fn, pfx##_2_, sfx), \ 47 PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
50 CPU_32_PORT(fn, pfx##_3_, sfx), \ 48 PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
51 CPU_32_PORT(fn, pfx##_4_, sfx), \ 49
52 CPU_32_PORT(fn, pfx##_5_, sfx) \ 50#define PORT_GP_32_REV(bank, fn, sfx) \
53 51 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
54#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) 52 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
55#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN) 53 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
56 54 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
57#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) 55 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
58#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) 56 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
59#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) 57 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
58 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
59 PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \
60 PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \
61 PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \
62 PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \
63 PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \
64 PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \
65 PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \
66 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
67
68#define CPU_ALL_PORT(fn, sfx) \
69 PORT_GP_32(0, fn, sfx), \
70 PORT_GP_32(1, fn, sfx), \
71 PORT_GP_32(2, fn, sfx), \
72 PORT_GP_32(3, fn, sfx), \
73 PORT_GP_32(4, fn, sfx), \
74 PORT_GP_32(5, fn, sfx)
75
76#define _GP_PORT_ALL(bank, pin, name, sfx) name##_##sfx
77
78#define _GP_GPIO(bank, pin, _name, sfx) \
79 [(bank * 32) + pin] = { \
80 .name = __stringify(_name), \
81 .enum_id = _name##_DATA, \
82 }
83
84#define _GP_DATA(bank, pin, name, sfx) \
85 PINMUX_DATA(name##_DATA, name##_FN)
86
87#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str)
88#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
89#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
60 90
61#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) 91#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
62#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ 92#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
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