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authorArnd Bergmann <arnd@arndb.de>2012-07-02 16:53:37 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-02 16:53:37 -0400
commitdf7cb455850351aa2793ffb41f6a2dcaefd83d9b (patch)
tree374f84ee13239586a6754be3cab60e81bfe7ddeb
parent6887a4131da3adaab011613776d865f4bcfb5678 (diff)
parentc4b68520dc0ec96153bc0d87bca5ffba508edfcf (diff)
Merge tag 'at91-for-next-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Nicolas Ferre <nicolas.ferre@atmel.com> writes: A series about interrupt controller cleanup. AT91 AIC is moving to fasteoi type of handler and sparse IRQ. The Device Tree support is added to take into account priority and external IRQ. In addition to that, the new AIC5 IP is introduced. Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'at91-for-next-cleanup' of git://github.com/at91linux/linux-at91: ARM: at91: add AIC5 support ARM: at91: remove mach/irqs.h ARM: at91: sparse irq support ARM: at91: at91 based machines specify their own irq handler at run time ARM: at91: remove static irq priorities for sam9x5 ARM: at91: add of irq priorities support ARM: at91: aic add dt support for external irqs ARM: at91: aic can use fast eoi handler type ARM: at91: fix at91_aic_write macro ARM: at91: remove two unused headers
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-aic.txt9
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi37
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi31
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi39
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi30
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi39
-rw-r--r--arch/arm/kernel/irq.c10
-rw-r--r--arch/arm/mach-at91/Kconfig2
-rw-r--r--arch/arm/mach-at91/at91rm9200.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c84
-rw-r--r--arch/arm/mach-at91/at91sam9260.c1
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c92
-rw-r--r--arch/arm/mach-at91/at91sam9261.c1
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c68
-rw-r--r--arch/arm/mach-at91/at91sam9263.c1
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c80
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c1
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c108
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c1
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c76
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c40
-rw-r--r--arch/arm/mach-at91/at91x40.c1
-rw-r--r--arch/arm/mach-at91/board-1arm.c2
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c2
-rw-r--r--arch/arm/mach-at91/board-cam60.c2
-rw-r--r--arch/arm/mach-at91/board-carmeva.c2
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c2
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c2
-rw-r--r--arch/arm/mach-at91/board-csb337.c2
-rw-r--r--arch/arm/mach-at91/board-csb637.c2
-rw-r--r--arch/arm/mach-at91/board-dt.c2
-rw-r--r--arch/arm/mach-at91/board-eb01.c2
-rw-r--r--arch/arm/mach-at91/board-eb9200.c2
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c2
-rw-r--r--arch/arm/mach-at91/board-eco920.c2
-rw-r--r--arch/arm/mach-at91/board-flexibity.c2
-rw-r--r--arch/arm/mach-at91/board-foxg20.c2
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c2
-rw-r--r--arch/arm/mach-at91/board-kafa.c2
-rw-r--r--arch/arm/mach-at91/board-kb9202.c2
-rw-r--r--arch/arm/mach-at91/board-neocore926.c2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c2
-rw-r--r--arch/arm/mach-at91/board-picotux200.c2
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c2
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c2
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c3
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c2
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c2
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c3
-rw-r--r--arch/arm/mach-at91/board-usb-a926x.c4
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/generic.h2
-rw-r--r--arch/arm/mach-at91/gpio.c9
-rw-r--r--arch/arm/mach-at91/include/mach/at91_aic.h36
-rw-r--r--arch/arm/mach-at91/include/mach/at91_spi.h81
-rw-r--r--arch/arm/mach-at91/include/mach/at91_ssc.h106
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S27
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h48
-rw-r--r--arch/arm/mach-at91/irq.c413
-rw-r--r--arch/arm/mach-at91/pm.c1
68 files changed, 835 insertions, 718 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt
index aabca4f83402..19078bf5cca8 100644
--- a/Documentation/devicetree/bindings/arm/atmel-aic.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt
@@ -4,7 +4,7 @@ Required properties:
4- compatible: Should be "atmel,<chip>-aic" 4- compatible: Should be "atmel,<chip>-aic"
5- interrupt-controller: Identifies the node as an interrupt controller. 5- interrupt-controller: Identifies the node as an interrupt controller.
6- interrupt-parent: For single AIC system, it is an empty property. 6- interrupt-parent: For single AIC system, it is an empty property.
7- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. 7- #interrupt-cells: The number of cells to define the interrupts. It sould be 3.
8 The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). 8 The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
9 The second cell is used to specify flags: 9 The second cell is used to specify flags:
10 bits[3:0] trigger type and level flags: 10 bits[3:0] trigger type and level flags:
@@ -14,7 +14,10 @@ Required properties:
14 8 = active low level-sensitive. 14 8 = active low level-sensitive.
15 Valid combinations are 1, 2, 3, 4, 8. 15 Valid combinations are 1, 2, 3, 4, 8.
16 Default flag for internal sources should be set to 4 (active high). 16 Default flag for internal sources should be set to 4 (active high).
17 The third cell is used to specify the irq priority from 0 (lowest) to 7
18 (highest).
17- reg: Should contain AIC registers location and length 19- reg: Should contain AIC registers location and length
20- atmel,external-irqs: u32 array of external irqs.
18 21
19Examples: 22Examples:
20 /* 23 /*
@@ -24,7 +27,7 @@ Examples:
24 compatible = "atmel,at91rm9200-aic"; 27 compatible = "atmel,at91rm9200-aic";
25 interrupt-controller; 28 interrupt-controller;
26 interrupt-parent; 29 interrupt-parent;
27 #interrupt-cells = <2>; 30 #interrupt-cells = <3>;
28 reg = <0xfffff000 0x200>; 31 reg = <0xfffff000 0x200>;
29 }; 32 };
30 33
@@ -34,5 +37,5 @@ Examples:
34 dma: dma-controller@ffffec00 { 37 dma: dma-controller@ffffec00 {
35 compatible = "atmel,at91sam9g45-dma"; 38 compatible = "atmel,at91sam9g45-dma";
36 reg = <0xffffec00 0x200>; 39 reg = <0xffffec00 0x200>;
37 interrupts = <21 4>; 40 interrupts = <21 4 5>;
38 }; 41 };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index f449efc9825f..66389c1c6f62 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -52,10 +52,11 @@
52 ranges; 52 ranges;
53 53
54 aic: interrupt-controller@fffff000 { 54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <2>; 55 #interrupt-cells = <3>;
56 compatible = "atmel,at91rm9200-aic"; 56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller; 57 interrupt-controller;
58 reg = <0xfffff000 0x200>; 58 reg = <0xfffff000 0x200>;
59 atmel,external-irqs = <29 30 31>;
59 }; 60 };
60 61
61 ramc0: ramc@ffffea00 { 62 ramc0: ramc@ffffea00 {
@@ -81,25 +82,25 @@
81 pit: timer@fffffd30 { 82 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit"; 83 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>; 84 reg = <0xfffffd30 0xf>;
84 interrupts = <1 4>; 85 interrupts = <1 4 7>;
85 }; 86 };
86 87
87 tcb0: timer@fffa0000 { 88 tcb0: timer@fffa0000 {
88 compatible = "atmel,at91rm9200-tcb"; 89 compatible = "atmel,at91rm9200-tcb";
89 reg = <0xfffa0000 0x100>; 90 reg = <0xfffa0000 0x100>;
90 interrupts = <17 4 18 4 19 4>; 91 interrupts = <17 4 0 18 4 0 19 4 0>;
91 }; 92 };
92 93
93 tcb1: timer@fffdc000 { 94 tcb1: timer@fffdc000 {
94 compatible = "atmel,at91rm9200-tcb"; 95 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfffdc000 0x100>; 96 reg = <0xfffdc000 0x100>;
96 interrupts = <26 4 27 4 28 4>; 97 interrupts = <26 4 0 27 4 0 28 4 0>;
97 }; 98 };
98 99
99 pioA: gpio@fffff400 { 100 pioA: gpio@fffff400 {
100 compatible = "atmel,at91rm9200-gpio"; 101 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff400 0x100>; 102 reg = <0xfffff400 0x100>;
102 interrupts = <2 4>; 103 interrupts = <2 4 1>;
103 #gpio-cells = <2>; 104 #gpio-cells = <2>;
104 gpio-controller; 105 gpio-controller;
105 interrupt-controller; 106 interrupt-controller;
@@ -108,7 +109,7 @@
108 pioB: gpio@fffff600 { 109 pioB: gpio@fffff600 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff600 0x100>; 111 reg = <0xfffff600 0x100>;
111 interrupts = <3 4>; 112 interrupts = <3 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioC: gpio@fffff800 { 118 pioC: gpio@fffff800 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff800 0x100>; 120 reg = <0xfffff800 0x100>;
120 interrupts = <4 4>; 121 interrupts = <4 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,14 +127,14 @@
126 dbgu: serial@fffff200 { 127 dbgu: serial@fffff200 {
127 compatible = "atmel,at91sam9260-usart"; 128 compatible = "atmel,at91sam9260-usart";
128 reg = <0xfffff200 0x200>; 129 reg = <0xfffff200 0x200>;
129 interrupts = <1 4>; 130 interrupts = <1 4 7>;
130 status = "disabled"; 131 status = "disabled";
131 }; 132 };
132 133
133 usart0: serial@fffb0000 { 134 usart0: serial@fffb0000 {
134 compatible = "atmel,at91sam9260-usart"; 135 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfffb0000 0x200>; 136 reg = <0xfffb0000 0x200>;
136 interrupts = <6 4>; 137 interrupts = <6 4 5>;
137 atmel,use-dma-rx; 138 atmel,use-dma-rx;
138 atmel,use-dma-tx; 139 atmel,use-dma-tx;
139 status = "disabled"; 140 status = "disabled";
@@ -142,7 +143,7 @@
142 usart1: serial@fffb4000 { 143 usart1: serial@fffb4000 {
143 compatible = "atmel,at91sam9260-usart"; 144 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfffb4000 0x200>; 145 reg = <0xfffb4000 0x200>;
145 interrupts = <7 4>; 146 interrupts = <7 4 5>;
146 atmel,use-dma-rx; 147 atmel,use-dma-rx;
147 atmel,use-dma-tx; 148 atmel,use-dma-tx;
148 status = "disabled"; 149 status = "disabled";
@@ -151,7 +152,7 @@
151 usart2: serial@fffb8000 { 152 usart2: serial@fffb8000 {
152 compatible = "atmel,at91sam9260-usart"; 153 compatible = "atmel,at91sam9260-usart";
153 reg = <0xfffb8000 0x200>; 154 reg = <0xfffb8000 0x200>;
154 interrupts = <8 4>; 155 interrupts = <8 4 5>;
155 atmel,use-dma-rx; 156 atmel,use-dma-rx;
156 atmel,use-dma-tx; 157 atmel,use-dma-tx;
157 status = "disabled"; 158 status = "disabled";
@@ -160,7 +161,7 @@
160 usart3: serial@fffd0000 { 161 usart3: serial@fffd0000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfffd0000 0x200>; 163 reg = <0xfffd0000 0x200>;
163 interrupts = <23 4>; 164 interrupts = <23 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,7 +170,7 @@
169 usart4: serial@fffd4000 { 170 usart4: serial@fffd4000 {
170 compatible = "atmel,at91sam9260-usart"; 171 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfffd4000 0x200>; 172 reg = <0xfffd4000 0x200>;
172 interrupts = <24 4>; 173 interrupts = <24 4 5>;
173 atmel,use-dma-rx; 174 atmel,use-dma-rx;
174 atmel,use-dma-tx; 175 atmel,use-dma-tx;
175 status = "disabled"; 176 status = "disabled";
@@ -178,7 +179,7 @@
178 usart5: serial@fffd8000 { 179 usart5: serial@fffd8000 {
179 compatible = "atmel,at91sam9260-usart"; 180 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfffd8000 0x200>; 181 reg = <0xfffd8000 0x200>;
181 interrupts = <25 4>; 182 interrupts = <25 4 5>;
182 atmel,use-dma-rx; 183 atmel,use-dma-rx;
183 atmel,use-dma-tx; 184 atmel,use-dma-tx;
184 status = "disabled"; 185 status = "disabled";
@@ -187,21 +188,21 @@
187 macb0: ethernet@fffc4000 { 188 macb0: ethernet@fffc4000 {
188 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 189 compatible = "cdns,at32ap7000-macb", "cdns,macb";
189 reg = <0xfffc4000 0x100>; 190 reg = <0xfffc4000 0x100>;
190 interrupts = <21 4>; 191 interrupts = <21 4 3>;
191 status = "disabled"; 192 status = "disabled";
192 }; 193 };
193 194
194 usb1: gadget@fffa4000 { 195 usb1: gadget@fffa4000 {
195 compatible = "atmel,at91rm9200-udc"; 196 compatible = "atmel,at91rm9200-udc";
196 reg = <0xfffa4000 0x4000>; 197 reg = <0xfffa4000 0x4000>;
197 interrupts = <10 4>; 198 interrupts = <10 4 2>;
198 status = "disabled"; 199 status = "disabled";
199 }; 200 };
200 201
201 adc0: adc@fffe0000 { 202 adc0: adc@fffe0000 {
202 compatible = "atmel,at91sam9260-adc"; 203 compatible = "atmel,at91sam9260-adc";
203 reg = <0xfffe0000 0x100>; 204 reg = <0xfffe0000 0x100>;
204 interrupts = <5 4>; 205 interrupts = <5 4 0>;
205 atmel,adc-use-external-triggers; 206 atmel,adc-use-external-triggers;
206 atmel,adc-channels-used = <0xf>; 207 atmel,adc-channels-used = <0xf>;
207 atmel,adc-vref = <3300>; 208 atmel,adc-vref = <3300>;
@@ -253,7 +254,7 @@
253 usb0: ohci@00500000 { 254 usb0: ohci@00500000 {
254 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 255 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
255 reg = <0x00500000 0x100000>; 256 reg = <0x00500000 0x100000>;
256 interrupts = <20 4>; 257 interrupts = <20 4 2>;
257 status = "disabled"; 258 status = "disabled";
258 }; 259 };
259 }; 260 };
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 0209913a65a2..b460d6ce9eb5 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -48,10 +48,11 @@
48 ranges; 48 ranges;
49 49
50 aic: interrupt-controller@fffff000 { 50 aic: interrupt-controller@fffff000 {
51 #interrupt-cells = <2>; 51 #interrupt-cells = <3>;
52 compatible = "atmel,at91rm9200-aic"; 52 compatible = "atmel,at91rm9200-aic";
53 interrupt-controller; 53 interrupt-controller;
54 reg = <0xfffff000 0x200>; 54 reg = <0xfffff000 0x200>;
55 atmel,external-irqs = <30 31>;
55 }; 56 };
56 57
57 pmc: pmc@fffffc00 { 58 pmc: pmc@fffffc00 {
@@ -68,13 +69,13 @@
68 pit: timer@fffffd30 { 69 pit: timer@fffffd30 {
69 compatible = "atmel,at91sam9260-pit"; 70 compatible = "atmel,at91sam9260-pit";
70 reg = <0xfffffd30 0xf>; 71 reg = <0xfffffd30 0xf>;
71 interrupts = <1 4>; 72 interrupts = <1 4 7>;
72 }; 73 };
73 74
74 tcb0: timer@fff7c000 { 75 tcb0: timer@fff7c000 {
75 compatible = "atmel,at91rm9200-tcb"; 76 compatible = "atmel,at91rm9200-tcb";
76 reg = <0xfff7c000 0x100>; 77 reg = <0xfff7c000 0x100>;
77 interrupts = <19 4>; 78 interrupts = <19 4 0>;
78 }; 79 };
79 80
80 rstc@fffffd00 { 81 rstc@fffffd00 {
@@ -90,7 +91,7 @@
90 pioA: gpio@fffff200 { 91 pioA: gpio@fffff200 {
91 compatible = "atmel,at91rm9200-gpio"; 92 compatible = "atmel,at91rm9200-gpio";
92 reg = <0xfffff200 0x100>; 93 reg = <0xfffff200 0x100>;
93 interrupts = <2 4>; 94 interrupts = <2 4 1>;
94 #gpio-cells = <2>; 95 #gpio-cells = <2>;
95 gpio-controller; 96 gpio-controller;
96 interrupt-controller; 97 interrupt-controller;
@@ -99,7 +100,7 @@
99 pioB: gpio@fffff400 { 100 pioB: gpio@fffff400 {
100 compatible = "atmel,at91rm9200-gpio"; 101 compatible = "atmel,at91rm9200-gpio";
101 reg = <0xfffff400 0x100>; 102 reg = <0xfffff400 0x100>;
102 interrupts = <3 4>; 103 interrupts = <3 4 1>;
103 #gpio-cells = <2>; 104 #gpio-cells = <2>;
104 gpio-controller; 105 gpio-controller;
105 interrupt-controller; 106 interrupt-controller;
@@ -108,7 +109,7 @@
108 pioC: gpio@fffff600 { 109 pioC: gpio@fffff600 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff600 0x100>; 111 reg = <0xfffff600 0x100>;
111 interrupts = <4 4>; 112 interrupts = <4 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioD: gpio@fffff800 { 118 pioD: gpio@fffff800 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff800 0x100>; 120 reg = <0xfffff800 0x100>;
120 interrupts = <4 4>; 121 interrupts = <4 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,7 +127,7 @@
126 pioE: gpio@fffffa00 { 127 pioE: gpio@fffffa00 {
127 compatible = "atmel,at91rm9200-gpio"; 128 compatible = "atmel,at91rm9200-gpio";
128 reg = <0xfffffa00 0x100>; 129 reg = <0xfffffa00 0x100>;
129 interrupts = <4 4>; 130 interrupts = <4 4 1>;
130 #gpio-cells = <2>; 131 #gpio-cells = <2>;
131 gpio-controller; 132 gpio-controller;
132 interrupt-controller; 133 interrupt-controller;
@@ -135,14 +136,14 @@
135 dbgu: serial@ffffee00 { 136 dbgu: serial@ffffee00 {
136 compatible = "atmel,at91sam9260-usart"; 137 compatible = "atmel,at91sam9260-usart";
137 reg = <0xffffee00 0x200>; 138 reg = <0xffffee00 0x200>;
138 interrupts = <1 4>; 139 interrupts = <1 4 7>;
139 status = "disabled"; 140 status = "disabled";
140 }; 141 };
141 142
142 usart0: serial@fff8c000 { 143 usart0: serial@fff8c000 {
143 compatible = "atmel,at91sam9260-usart"; 144 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfff8c000 0x200>; 145 reg = <0xfff8c000 0x200>;
145 interrupts = <7 4>; 146 interrupts = <7 4 5>;
146 atmel,use-dma-rx; 147 atmel,use-dma-rx;
147 atmel,use-dma-tx; 148 atmel,use-dma-tx;
148 status = "disabled"; 149 status = "disabled";
@@ -151,7 +152,7 @@
151 usart1: serial@fff90000 { 152 usart1: serial@fff90000 {
152 compatible = "atmel,at91sam9260-usart"; 153 compatible = "atmel,at91sam9260-usart";
153 reg = <0xfff90000 0x200>; 154 reg = <0xfff90000 0x200>;
154 interrupts = <8 4>; 155 interrupts = <8 4 5>;
155 atmel,use-dma-rx; 156 atmel,use-dma-rx;
156 atmel,use-dma-tx; 157 atmel,use-dma-tx;
157 status = "disabled"; 158 status = "disabled";
@@ -160,7 +161,7 @@
160 usart2: serial@fff94000 { 161 usart2: serial@fff94000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfff94000 0x200>; 163 reg = <0xfff94000 0x200>;
163 interrupts = <9 4>; 164 interrupts = <9 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,14 +170,14 @@
169 macb0: ethernet@fffbc000 { 170 macb0: ethernet@fffbc000 {
170 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 171 compatible = "cdns,at32ap7000-macb", "cdns,macb";
171 reg = <0xfffbc000 0x100>; 172 reg = <0xfffbc000 0x100>;
172 interrupts = <21 4>; 173 interrupts = <21 4 3>;
173 status = "disabled"; 174 status = "disabled";
174 }; 175 };
175 176
176 usb1: gadget@fff78000 { 177 usb1: gadget@fff78000 {
177 compatible = "atmel,at91rm9200-udc"; 178 compatible = "atmel,at91rm9200-udc";
178 reg = <0xfff78000 0x4000>; 179 reg = <0xfff78000 0x4000>;
179 interrupts = <24 4>; 180 interrupts = <24 4 2>;
180 status = "disabled"; 181 status = "disabled";
181 }; 182 };
182 }; 183 };
@@ -200,7 +201,7 @@
200 usb0: ohci@00a00000 { 201 usb0: ohci@00a00000 {
201 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 202 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
202 reg = <0x00a00000 0x100000>; 203 reg = <0x00a00000 0x100000>;
203 interrupts = <29 4>; 204 interrupts = <29 4 2>;
204 status = "disabled"; 205 status = "disabled";
205 }; 206 };
206 }; 207 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 7dbccaf199f7..bafa8806fc17 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -53,10 +53,11 @@
53 ranges; 53 ranges;
54 54
55 aic: interrupt-controller@fffff000 { 55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <2>; 56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <31>;
60 }; 61 };
61 62
62 ramc0: ramc@ffffe400 { 63 ramc0: ramc@ffffe400 {
@@ -78,7 +79,7 @@
78 pit: timer@fffffd30 { 79 pit: timer@fffffd30 {
79 compatible = "atmel,at91sam9260-pit"; 80 compatible = "atmel,at91sam9260-pit";
80 reg = <0xfffffd30 0xf>; 81 reg = <0xfffffd30 0xf>;
81 interrupts = <1 4>; 82 interrupts = <1 4 7>;
82 }; 83 };
83 84
84 85
@@ -90,25 +91,25 @@
90 tcb0: timer@fff7c000 { 91 tcb0: timer@fff7c000 {
91 compatible = "atmel,at91rm9200-tcb"; 92 compatible = "atmel,at91rm9200-tcb";
92 reg = <0xfff7c000 0x100>; 93 reg = <0xfff7c000 0x100>;
93 interrupts = <18 4>; 94 interrupts = <18 4 0>;
94 }; 95 };
95 96
96 tcb1: timer@fffd4000 { 97 tcb1: timer@fffd4000 {
97 compatible = "atmel,at91rm9200-tcb"; 98 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffd4000 0x100>; 99 reg = <0xfffd4000 0x100>;
99 interrupts = <18 4>; 100 interrupts = <18 4 0>;
100 }; 101 };
101 102
102 dma: dma-controller@ffffec00 { 103 dma: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma"; 104 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>; 105 reg = <0xffffec00 0x200>;
105 interrupts = <21 4>; 106 interrupts = <21 4 0>;
106 }; 107 };
107 108
108 pioA: gpio@fffff200 { 109 pioA: gpio@fffff200 {
109 compatible = "atmel,at91rm9200-gpio"; 110 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff200 0x100>; 111 reg = <0xfffff200 0x100>;
111 interrupts = <2 4>; 112 interrupts = <2 4 1>;
112 #gpio-cells = <2>; 113 #gpio-cells = <2>;
113 gpio-controller; 114 gpio-controller;
114 interrupt-controller; 115 interrupt-controller;
@@ -117,7 +118,7 @@
117 pioB: gpio@fffff400 { 118 pioB: gpio@fffff400 {
118 compatible = "atmel,at91rm9200-gpio"; 119 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff400 0x100>; 120 reg = <0xfffff400 0x100>;
120 interrupts = <3 4>; 121 interrupts = <3 4 1>;
121 #gpio-cells = <2>; 122 #gpio-cells = <2>;
122 gpio-controller; 123 gpio-controller;
123 interrupt-controller; 124 interrupt-controller;
@@ -126,7 +127,7 @@
126 pioC: gpio@fffff600 { 127 pioC: gpio@fffff600 {
127 compatible = "atmel,at91rm9200-gpio"; 128 compatible = "atmel,at91rm9200-gpio";
128 reg = <0xfffff600 0x100>; 129 reg = <0xfffff600 0x100>;
129 interrupts = <4 4>; 130 interrupts = <4 4 1>;
130 #gpio-cells = <2>; 131 #gpio-cells = <2>;
131 gpio-controller; 132 gpio-controller;
132 interrupt-controller; 133 interrupt-controller;
@@ -135,7 +136,7 @@
135 pioD: gpio@fffff800 { 136 pioD: gpio@fffff800 {
136 compatible = "atmel,at91rm9200-gpio"; 137 compatible = "atmel,at91rm9200-gpio";
137 reg = <0xfffff800 0x100>; 138 reg = <0xfffff800 0x100>;
138 interrupts = <5 4>; 139 interrupts = <5 4 1>;
139 #gpio-cells = <2>; 140 #gpio-cells = <2>;
140 gpio-controller; 141 gpio-controller;
141 interrupt-controller; 142 interrupt-controller;
@@ -144,7 +145,7 @@
144 pioE: gpio@fffffa00 { 145 pioE: gpio@fffffa00 {
145 compatible = "atmel,at91rm9200-gpio"; 146 compatible = "atmel,at91rm9200-gpio";
146 reg = <0xfffffa00 0x100>; 147 reg = <0xfffffa00 0x100>;
147 interrupts = <5 4>; 148 interrupts = <5 4 1>;
148 #gpio-cells = <2>; 149 #gpio-cells = <2>;
149 gpio-controller; 150 gpio-controller;
150 interrupt-controller; 151 interrupt-controller;
@@ -153,14 +154,14 @@
153 dbgu: serial@ffffee00 { 154 dbgu: serial@ffffee00 {
154 compatible = "atmel,at91sam9260-usart"; 155 compatible = "atmel,at91sam9260-usart";
155 reg = <0xffffee00 0x200>; 156 reg = <0xffffee00 0x200>;
156 interrupts = <1 4>; 157 interrupts = <1 4 7>;
157 status = "disabled"; 158 status = "disabled";
158 }; 159 };
159 160
160 usart0: serial@fff8c000 { 161 usart0: serial@fff8c000 {
161 compatible = "atmel,at91sam9260-usart"; 162 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfff8c000 0x200>; 163 reg = <0xfff8c000 0x200>;
163 interrupts = <7 4>; 164 interrupts = <7 4 5>;
164 atmel,use-dma-rx; 165 atmel,use-dma-rx;
165 atmel,use-dma-tx; 166 atmel,use-dma-tx;
166 status = "disabled"; 167 status = "disabled";
@@ -169,7 +170,7 @@
169 usart1: serial@fff90000 { 170 usart1: serial@fff90000 {
170 compatible = "atmel,at91sam9260-usart"; 171 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfff90000 0x200>; 172 reg = <0xfff90000 0x200>;
172 interrupts = <8 4>; 173 interrupts = <8 4 5>;
173 atmel,use-dma-rx; 174 atmel,use-dma-rx;
174 atmel,use-dma-tx; 175 atmel,use-dma-tx;
175 status = "disabled"; 176 status = "disabled";
@@ -178,7 +179,7 @@
178 usart2: serial@fff94000 { 179 usart2: serial@fff94000 {
179 compatible = "atmel,at91sam9260-usart"; 180 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfff94000 0x200>; 181 reg = <0xfff94000 0x200>;
181 interrupts = <9 4>; 182 interrupts = <9 4 5>;
182 atmel,use-dma-rx; 183 atmel,use-dma-rx;
183 atmel,use-dma-tx; 184 atmel,use-dma-tx;
184 status = "disabled"; 185 status = "disabled";
@@ -187,7 +188,7 @@
187 usart3: serial@fff98000 { 188 usart3: serial@fff98000 {
188 compatible = "atmel,at91sam9260-usart"; 189 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfff98000 0x200>; 190 reg = <0xfff98000 0x200>;
190 interrupts = <10 4>; 191 interrupts = <10 4 5>;
191 atmel,use-dma-rx; 192 atmel,use-dma-rx;
192 atmel,use-dma-tx; 193 atmel,use-dma-tx;
193 status = "disabled"; 194 status = "disabled";
@@ -196,14 +197,14 @@
196 macb0: ethernet@fffbc000 { 197 macb0: ethernet@fffbc000 {
197 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 198 compatible = "cdns,at32ap7000-macb", "cdns,macb";
198 reg = <0xfffbc000 0x100>; 199 reg = <0xfffbc000 0x100>;
199 interrupts = <25 4>; 200 interrupts = <25 4 3>;
200 status = "disabled"; 201 status = "disabled";
201 }; 202 };
202 203
203 adc0: adc@fffb0000 { 204 adc0: adc@fffb0000 {
204 compatible = "atmel,at91sam9260-adc"; 205 compatible = "atmel,at91sam9260-adc";
205 reg = <0xfffb0000 0x100>; 206 reg = <0xfffb0000 0x100>;
206 interrupts = <20 4>; 207 interrupts = <20 4 0>;
207 atmel,adc-use-external-triggers; 208 atmel,adc-use-external-triggers;
208 atmel,adc-channels-used = <0xff>; 209 atmel,adc-channels-used = <0xff>;
209 atmel,adc-vref = <3300>; 210 atmel,adc-vref = <3300>;
@@ -257,14 +258,14 @@
257 usb0: ohci@00700000 { 258 usb0: ohci@00700000 {
258 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 259 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
259 reg = <0x00700000 0x100000>; 260 reg = <0x00700000 0x100000>;
260 interrupts = <22 4>; 261 interrupts = <22 4 2>;
261 status = "disabled"; 262 status = "disabled";
262 }; 263 };
263 264
264 usb1: ehci@00800000 { 265 usb1: ehci@00800000 {
265 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 266 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
266 reg = <0x00800000 0x100000>; 267 reg = <0x00800000 0x100000>;
267 interrupts = <22 4>; 268 interrupts = <22 4 2>;
268 status = "disabled"; 269 status = "disabled";
269 }; 270 };
270 }; 271 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index cb84de791b5a..bfac0dfc332c 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -50,7 +50,7 @@
50 ranges; 50 ranges;
51 51
52 aic: interrupt-controller@fffff000 { 52 aic: interrupt-controller@fffff000 {
53 #interrupt-cells = <2>; 53 #interrupt-cells = <3>;
54 compatible = "atmel,at91rm9200-aic"; 54 compatible = "atmel,at91rm9200-aic";
55 interrupt-controller; 55 interrupt-controller;
56 reg = <0xfffff000 0x200>; 56 reg = <0xfffff000 0x200>;
@@ -74,7 +74,7 @@
74 pit: timer@fffffe30 { 74 pit: timer@fffffe30 {
75 compatible = "atmel,at91sam9260-pit"; 75 compatible = "atmel,at91sam9260-pit";
76 reg = <0xfffffe30 0xf>; 76 reg = <0xfffffe30 0xf>;
77 interrupts = <1 4>; 77 interrupts = <1 4 7>;
78 }; 78 };
79 79
80 shdwc@fffffe10 { 80 shdwc@fffffe10 {
@@ -85,25 +85,25 @@
85 tcb0: timer@f8008000 { 85 tcb0: timer@f8008000 {
86 compatible = "atmel,at91sam9x5-tcb"; 86 compatible = "atmel,at91sam9x5-tcb";
87 reg = <0xf8008000 0x100>; 87 reg = <0xf8008000 0x100>;
88 interrupts = <17 4>; 88 interrupts = <17 4 0>;
89 }; 89 };
90 90
91 tcb1: timer@f800c000 { 91 tcb1: timer@f800c000 {
92 compatible = "atmel,at91sam9x5-tcb"; 92 compatible = "atmel,at91sam9x5-tcb";
93 reg = <0xf800c000 0x100>; 93 reg = <0xf800c000 0x100>;
94 interrupts = <17 4>; 94 interrupts = <17 4 0>;
95 }; 95 };
96 96
97 dma: dma-controller@ffffec00 { 97 dma: dma-controller@ffffec00 {
98 compatible = "atmel,at91sam9g45-dma"; 98 compatible = "atmel,at91sam9g45-dma";
99 reg = <0xffffec00 0x200>; 99 reg = <0xffffec00 0x200>;
100 interrupts = <20 4>; 100 interrupts = <20 4 0>;
101 }; 101 };
102 102
103 pioA: gpio@fffff400 { 103 pioA: gpio@fffff400 {
104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 104 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
105 reg = <0xfffff400 0x100>; 105 reg = <0xfffff400 0x100>;
106 interrupts = <2 4>; 106 interrupts = <2 4 1>;
107 #gpio-cells = <2>; 107 #gpio-cells = <2>;
108 gpio-controller; 108 gpio-controller;
109 interrupt-controller; 109 interrupt-controller;
@@ -112,7 +112,7 @@
112 pioB: gpio@fffff600 { 112 pioB: gpio@fffff600 {
113 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 113 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
114 reg = <0xfffff600 0x100>; 114 reg = <0xfffff600 0x100>;
115 interrupts = <2 4>; 115 interrupts = <2 4 1>;
116 #gpio-cells = <2>; 116 #gpio-cells = <2>;
117 gpio-controller; 117 gpio-controller;
118 interrupt-controller; 118 interrupt-controller;
@@ -121,7 +121,7 @@
121 pioC: gpio@fffff800 { 121 pioC: gpio@fffff800 {
122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
123 reg = <0xfffff800 0x100>; 123 reg = <0xfffff800 0x100>;
124 interrupts = <3 4>; 124 interrupts = <3 4 1>;
125 #gpio-cells = <2>; 125 #gpio-cells = <2>;
126 gpio-controller; 126 gpio-controller;
127 interrupt-controller; 127 interrupt-controller;
@@ -130,7 +130,7 @@
130 pioD: gpio@fffffa00 { 130 pioD: gpio@fffffa00 {
131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 131 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
132 reg = <0xfffffa00 0x100>; 132 reg = <0xfffffa00 0x100>;
133 interrupts = <3 4>; 133 interrupts = <3 4 1>;
134 #gpio-cells = <2>; 134 #gpio-cells = <2>;
135 gpio-controller; 135 gpio-controller;
136 interrupt-controller; 136 interrupt-controller;
@@ -139,14 +139,14 @@
139 dbgu: serial@fffff200 { 139 dbgu: serial@fffff200 {
140 compatible = "atmel,at91sam9260-usart"; 140 compatible = "atmel,at91sam9260-usart";
141 reg = <0xfffff200 0x200>; 141 reg = <0xfffff200 0x200>;
142 interrupts = <1 4>; 142 interrupts = <1 4 7>;
143 status = "disabled"; 143 status = "disabled";
144 }; 144 };
145 145
146 usart0: serial@f801c000 { 146 usart0: serial@f801c000 {
147 compatible = "atmel,at91sam9260-usart"; 147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xf801c000 0x4000>; 148 reg = <0xf801c000 0x4000>;
149 interrupts = <5 4>; 149 interrupts = <5 4 5>;
150 atmel,use-dma-rx; 150 atmel,use-dma-rx;
151 atmel,use-dma-tx; 151 atmel,use-dma-tx;
152 status = "disabled"; 152 status = "disabled";
@@ -155,7 +155,7 @@
155 usart1: serial@f8020000 { 155 usart1: serial@f8020000 {
156 compatible = "atmel,at91sam9260-usart"; 156 compatible = "atmel,at91sam9260-usart";
157 reg = <0xf8020000 0x4000>; 157 reg = <0xf8020000 0x4000>;
158 interrupts = <6 4>; 158 interrupts = <6 4 5>;
159 atmel,use-dma-rx; 159 atmel,use-dma-rx;
160 atmel,use-dma-tx; 160 atmel,use-dma-tx;
161 status = "disabled"; 161 status = "disabled";
@@ -164,7 +164,7 @@
164 usart2: serial@f8024000 { 164 usart2: serial@f8024000 {
165 compatible = "atmel,at91sam9260-usart"; 165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xf8024000 0x4000>; 166 reg = <0xf8024000 0x4000>;
167 interrupts = <7 4>; 167 interrupts = <7 4 5>;
168 atmel,use-dma-rx; 168 atmel,use-dma-rx;
169 atmel,use-dma-tx; 169 atmel,use-dma-tx;
170 status = "disabled"; 170 status = "disabled";
@@ -173,7 +173,7 @@
173 usart3: serial@f8028000 { 173 usart3: serial@f8028000 {
174 compatible = "atmel,at91sam9260-usart"; 174 compatible = "atmel,at91sam9260-usart";
175 reg = <0xf8028000 0x4000>; 175 reg = <0xf8028000 0x4000>;
176 interrupts = <8 4>; 176 interrupts = <8 4 5>;
177 atmel,use-dma-rx; 177 atmel,use-dma-rx;
178 atmel,use-dma-tx; 178 atmel,use-dma-tx;
179 status = "disabled"; 179 status = "disabled";
@@ -201,7 +201,7 @@
201 usb0: ohci@00500000 { 201 usb0: ohci@00500000 {
202 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 202 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
203 reg = <0x00500000 0x00100000>; 203 reg = <0x00500000 0x00100000>;
204 interrupts = <22 4>; 204 interrupts = <22 4 2>;
205 status = "disabled"; 205 status = "disabled";
206 }; 206 };
207 }; 207 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 6b3ef4339ae7..4a18c393b136 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -51,10 +51,11 @@
51 ranges; 51 ranges;
52 52
53 aic: interrupt-controller@fffff000 { 53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>; 54 #interrupt-cells = <3>;
55 compatible = "atmel,at91rm9200-aic"; 55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller; 56 interrupt-controller;
57 reg = <0xfffff000 0x200>; 57 reg = <0xfffff000 0x200>;
58 atmel,external-irqs = <31>;
58 }; 59 };
59 60
60 ramc0: ramc@ffffe800 { 61 ramc0: ramc@ffffe800 {
@@ -80,37 +81,37 @@
80 pit: timer@fffffe30 { 81 pit: timer@fffffe30 {
81 compatible = "atmel,at91sam9260-pit"; 82 compatible = "atmel,at91sam9260-pit";
82 reg = <0xfffffe30 0xf>; 83 reg = <0xfffffe30 0xf>;
83 interrupts = <1 4>; 84 interrupts = <1 4 7>;
84 }; 85 };
85 86
86 tcb0: timer@f8008000 { 87 tcb0: timer@f8008000 {
87 compatible = "atmel,at91sam9x5-tcb"; 88 compatible = "atmel,at91sam9x5-tcb";
88 reg = <0xf8008000 0x100>; 89 reg = <0xf8008000 0x100>;
89 interrupts = <17 4>; 90 interrupts = <17 4 0>;
90 }; 91 };
91 92
92 tcb1: timer@f800c000 { 93 tcb1: timer@f800c000 {
93 compatible = "atmel,at91sam9x5-tcb"; 94 compatible = "atmel,at91sam9x5-tcb";
94 reg = <0xf800c000 0x100>; 95 reg = <0xf800c000 0x100>;
95 interrupts = <17 4>; 96 interrupts = <17 4 0>;
96 }; 97 };
97 98
98 dma0: dma-controller@ffffec00 { 99 dma0: dma-controller@ffffec00 {
99 compatible = "atmel,at91sam9g45-dma"; 100 compatible = "atmel,at91sam9g45-dma";
100 reg = <0xffffec00 0x200>; 101 reg = <0xffffec00 0x200>;
101 interrupts = <20 4>; 102 interrupts = <20 4 0>;
102 }; 103 };
103 104
104 dma1: dma-controller@ffffee00 { 105 dma1: dma-controller@ffffee00 {
105 compatible = "atmel,at91sam9g45-dma"; 106 compatible = "atmel,at91sam9g45-dma";
106 reg = <0xffffee00 0x200>; 107 reg = <0xffffee00 0x200>;
107 interrupts = <21 4>; 108 interrupts = <21 4 0>;
108 }; 109 };
109 110
110 pioA: gpio@fffff400 { 111 pioA: gpio@fffff400 {
111 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 112 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
112 reg = <0xfffff400 0x100>; 113 reg = <0xfffff400 0x100>;
113 interrupts = <2 4>; 114 interrupts = <2 4 1>;
114 #gpio-cells = <2>; 115 #gpio-cells = <2>;
115 gpio-controller; 116 gpio-controller;
116 interrupt-controller; 117 interrupt-controller;
@@ -119,7 +120,7 @@
119 pioB: gpio@fffff600 { 120 pioB: gpio@fffff600 {
120 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 121 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
121 reg = <0xfffff600 0x100>; 122 reg = <0xfffff600 0x100>;
122 interrupts = <2 4>; 123 interrupts = <2 4 1>;
123 #gpio-cells = <2>; 124 #gpio-cells = <2>;
124 gpio-controller; 125 gpio-controller;
125 interrupt-controller; 126 interrupt-controller;
@@ -128,7 +129,7 @@
128 pioC: gpio@fffff800 { 129 pioC: gpio@fffff800 {
129 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 130 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
130 reg = <0xfffff800 0x100>; 131 reg = <0xfffff800 0x100>;
131 interrupts = <3 4>; 132 interrupts = <3 4 1>;
132 #gpio-cells = <2>; 133 #gpio-cells = <2>;
133 gpio-controller; 134 gpio-controller;
134 interrupt-controller; 135 interrupt-controller;
@@ -137,7 +138,7 @@
137 pioD: gpio@fffffa00 { 138 pioD: gpio@fffffa00 {
138 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 139 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
139 reg = <0xfffffa00 0x100>; 140 reg = <0xfffffa00 0x100>;
140 interrupts = <3 4>; 141 interrupts = <3 4 1>;
141 #gpio-cells = <2>; 142 #gpio-cells = <2>;
142 gpio-controller; 143 gpio-controller;
143 interrupt-controller; 144 interrupt-controller;
@@ -146,14 +147,14 @@
146 dbgu: serial@fffff200 { 147 dbgu: serial@fffff200 {
147 compatible = "atmel,at91sam9260-usart"; 148 compatible = "atmel,at91sam9260-usart";
148 reg = <0xfffff200 0x200>; 149 reg = <0xfffff200 0x200>;
149 interrupts = <1 4>; 150 interrupts = <1 4 7>;
150 status = "disabled"; 151 status = "disabled";
151 }; 152 };
152 153
153 usart0: serial@f801c000 { 154 usart0: serial@f801c000 {
154 compatible = "atmel,at91sam9260-usart"; 155 compatible = "atmel,at91sam9260-usart";
155 reg = <0xf801c000 0x200>; 156 reg = <0xf801c000 0x200>;
156 interrupts = <5 4>; 157 interrupts = <5 4 5>;
157 atmel,use-dma-rx; 158 atmel,use-dma-rx;
158 atmel,use-dma-tx; 159 atmel,use-dma-tx;
159 status = "disabled"; 160 status = "disabled";
@@ -162,7 +163,7 @@
162 usart1: serial@f8020000 { 163 usart1: serial@f8020000 {
163 compatible = "atmel,at91sam9260-usart"; 164 compatible = "atmel,at91sam9260-usart";
164 reg = <0xf8020000 0x200>; 165 reg = <0xf8020000 0x200>;
165 interrupts = <6 4>; 166 interrupts = <6 4 5>;
166 atmel,use-dma-rx; 167 atmel,use-dma-rx;
167 atmel,use-dma-tx; 168 atmel,use-dma-tx;
168 status = "disabled"; 169 status = "disabled";
@@ -171,7 +172,7 @@
171 usart2: serial@f8024000 { 172 usart2: serial@f8024000 {
172 compatible = "atmel,at91sam9260-usart"; 173 compatible = "atmel,at91sam9260-usart";
173 reg = <0xf8024000 0x200>; 174 reg = <0xf8024000 0x200>;
174 interrupts = <7 4>; 175 interrupts = <7 4 5>;
175 atmel,use-dma-rx; 176 atmel,use-dma-rx;
176 atmel,use-dma-tx; 177 atmel,use-dma-tx;
177 status = "disabled"; 178 status = "disabled";
@@ -180,21 +181,21 @@
180 macb0: ethernet@f802c000 { 181 macb0: ethernet@f802c000 {
181 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 182 compatible = "cdns,at32ap7000-macb", "cdns,macb";
182 reg = <0xf802c000 0x100>; 183 reg = <0xf802c000 0x100>;
183 interrupts = <24 4>; 184 interrupts = <24 4 3>;
184 status = "disabled"; 185 status = "disabled";
185 }; 186 };
186 187
187 macb1: ethernet@f8030000 { 188 macb1: ethernet@f8030000 {
188 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 189 compatible = "cdns,at32ap7000-macb", "cdns,macb";
189 reg = <0xf8030000 0x100>; 190 reg = <0xf8030000 0x100>;
190 interrupts = <27 4>; 191 interrupts = <27 4 3>;
191 status = "disabled"; 192 status = "disabled";
192 }; 193 };
193 194
194 adc0: adc@f804c000 { 195 adc0: adc@f804c000 {
195 compatible = "atmel,at91sam9260-adc"; 196 compatible = "atmel,at91sam9260-adc";
196 reg = <0xf804c000 0x100>; 197 reg = <0xf804c000 0x100>;
197 interrupts = <19 4>; 198 interrupts = <19 4 0>;
198 atmel,adc-use-external; 199 atmel,adc-use-external;
199 atmel,adc-channels-used = <0xffff>; 200 atmel,adc-channels-used = <0xffff>;
200 atmel,adc-vref = <3300>; 201 atmel,adc-vref = <3300>;
@@ -248,14 +249,14 @@
248 usb0: ohci@00600000 { 249 usb0: ohci@00600000 {
249 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 250 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
250 reg = <0x00600000 0x100000>; 251 reg = <0x00600000 0x100000>;
251 interrupts = <22 4>; 252 interrupts = <22 4 2>;
252 status = "disabled"; 253 status = "disabled";
253 }; 254 };
254 255
255 usb1: ehci@00700000 { 256 usb1: ehci@00700000 {
256 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 257 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
257 reg = <0x00700000 0x100000>; 258 reg = <0x00700000 0x100000>;
258 interrupts = <22 4>; 259 interrupts = <22 4 2>;
259 status = "disabled"; 260 status = "disabled";
260 }; 261 };
261 }; 262 };
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 8349d4e97e2b..16cedb42c0c3 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -40,13 +40,6 @@
40#include <asm/mach/irq.h> 40#include <asm/mach/irq.h>
41#include <asm/mach/time.h> 41#include <asm/mach/time.h>
42 42
43/*
44 * No architecture-specific irq_finish function defined in arm/arch/irqs.h.
45 */
46#ifndef irq_finish
47#define irq_finish(irq) do { } while (0)
48#endif
49
50unsigned long irq_err_count; 43unsigned long irq_err_count;
51 44
52int arch_show_interrupts(struct seq_file *p, int prec) 45int arch_show_interrupts(struct seq_file *p, int prec)
@@ -85,9 +78,6 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs)
85 generic_handle_irq(irq); 78 generic_handle_irq(irq);
86 } 79 }
87 80
88 /* AT91 specific workaround */
89 irq_finish(irq);
90
91 irq_exit(); 81 irq_exit();
92 set_irq_regs(old_regs); 82 set_irq_regs(old_regs);
93} 83}
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 19505c0a3f01..7d0c40a74d4d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -29,6 +29,8 @@ comment "Atmel AT91 Processor"
29config SOC_AT91SAM9 29config SOC_AT91SAM9
30 bool 30 bool
31 select CPU_ARM926T 31 select CPU_ARM926T
32 select MULTI_IRQ_HANDLER
33 select SPARSE_IRQ
32 select AT91_SAM9_TIME 34 select AT91_SAM9_TIME
33 select AT91_SAM9_SMC 35 select AT91_SAM9_SMC
34 36
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 26917687fc30..6f50c6722276 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -17,6 +17,7 @@
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <asm/system_misc.h> 18#include <asm/system_misc.h>
19#include <mach/at91rm9200.h> 19#include <mach/at91rm9200.h>
20#include <mach/at91_aic.h>
20#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
21#include <mach/at91_st.h> 22#include <mach/at91_st.h>
22#include <mach/cpu.h> 23#include <mach/cpu.h>
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index e6b7d0533dd7..01fb7325fecc 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = {
41 .flags = IORESOURCE_MEM, 41 .flags = IORESOURCE_MEM,
42 }, 42 },
43 [1] = { 43 [1] = {
44 .start = AT91RM9200_ID_UHP, 44 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
45 .end = AT91RM9200_ID_UHP, 45 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
46 .flags = IORESOURCE_IRQ, 46 .flags = IORESOURCE_IRQ,
47 }, 47 },
48}; 48};
@@ -94,8 +94,8 @@ static struct resource udc_resources[] = {
94 .flags = IORESOURCE_MEM, 94 .flags = IORESOURCE_MEM,
95 }, 95 },
96 [1] = { 96 [1] = {
97 .start = AT91RM9200_ID_UDP, 97 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
98 .end = AT91RM9200_ID_UDP, 98 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
99 .flags = IORESOURCE_IRQ, 99 .flags = IORESOURCE_IRQ,
100 }, 100 },
101}; 101};
@@ -145,8 +145,8 @@ static struct resource eth_resources[] = {
145 .flags = IORESOURCE_MEM, 145 .flags = IORESOURCE_MEM,
146 }, 146 },
147 [1] = { 147 [1] = {
148 .start = AT91RM9200_ID_EMAC, 148 .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
149 .end = AT91RM9200_ID_EMAC, 149 .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
150 .flags = IORESOURCE_IRQ, 150 .flags = IORESOURCE_IRQ,
151 }, 151 },
152}; 152};
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
305 .flags = IORESOURCE_MEM, 305 .flags = IORESOURCE_MEM,
306 }, 306 },
307 [1] = { 307 [1] = {
308 .start = AT91RM9200_ID_MCI, 308 .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
309 .end = AT91RM9200_ID_MCI, 309 .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
310 .flags = IORESOURCE_IRQ, 310 .flags = IORESOURCE_IRQ,
311 }, 311 },
312}; 312};
@@ -488,8 +488,8 @@ static struct resource twi_resources[] = {
488 .flags = IORESOURCE_MEM, 488 .flags = IORESOURCE_MEM,
489 }, 489 },
490 [1] = { 490 [1] = {
491 .start = AT91RM9200_ID_TWI, 491 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
492 .end = AT91RM9200_ID_TWI, 492 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
493 .flags = IORESOURCE_IRQ, 493 .flags = IORESOURCE_IRQ,
494 }, 494 },
495}; 495};
@@ -532,8 +532,8 @@ static struct resource spi_resources[] = {
532 .flags = IORESOURCE_MEM, 532 .flags = IORESOURCE_MEM,
533 }, 533 },
534 [1] = { 534 [1] = {
535 .start = AT91RM9200_ID_SPI, 535 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
536 .end = AT91RM9200_ID_SPI, 536 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
537 .flags = IORESOURCE_IRQ, 537 .flags = IORESOURCE_IRQ,
538 }, 538 },
539}; 539};
@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = {
598 .flags = IORESOURCE_MEM, 598 .flags = IORESOURCE_MEM,
599 }, 599 },
600 [1] = { 600 [1] = {
601 .start = AT91RM9200_ID_TC0, 601 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
602 .end = AT91RM9200_ID_TC0, 602 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
603 .flags = IORESOURCE_IRQ, 603 .flags = IORESOURCE_IRQ,
604 }, 604 },
605 [2] = { 605 [2] = {
606 .start = AT91RM9200_ID_TC1, 606 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
607 .end = AT91RM9200_ID_TC1, 607 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
608 .flags = IORESOURCE_IRQ, 608 .flags = IORESOURCE_IRQ,
609 }, 609 },
610 [3] = { 610 [3] = {
611 .start = AT91RM9200_ID_TC2, 611 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
612 .end = AT91RM9200_ID_TC2, 612 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
613 .flags = IORESOURCE_IRQ, 613 .flags = IORESOURCE_IRQ,
614 }, 614 },
615}; 615};
@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = {
628 .flags = IORESOURCE_MEM, 628 .flags = IORESOURCE_MEM,
629 }, 629 },
630 [1] = { 630 [1] = {
631 .start = AT91RM9200_ID_TC3, 631 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
632 .end = AT91RM9200_ID_TC3, 632 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
633 .flags = IORESOURCE_IRQ, 633 .flags = IORESOURCE_IRQ,
634 }, 634 },
635 [2] = { 635 [2] = {
636 .start = AT91RM9200_ID_TC4, 636 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
637 .end = AT91RM9200_ID_TC4, 637 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
638 .flags = IORESOURCE_IRQ, 638 .flags = IORESOURCE_IRQ,
639 }, 639 },
640 [3] = { 640 [3] = {
641 .start = AT91RM9200_ID_TC5, 641 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
642 .end = AT91RM9200_ID_TC5, 642 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
643 .flags = IORESOURCE_IRQ, 643 .flags = IORESOURCE_IRQ,
644 }, 644 },
645}; 645};
@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = {
673 .flags = IORESOURCE_MEM, 673 .flags = IORESOURCE_MEM,
674 }, 674 },
675 [1] = { 675 [1] = {
676 .start = AT91_ID_SYS, 676 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
677 .end = AT91_ID_SYS, 677 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
678 .flags = IORESOURCE_IRQ, 678 .flags = IORESOURCE_IRQ,
679 }, 679 },
680}; 680};
@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = {
729 .flags = IORESOURCE_MEM, 729 .flags = IORESOURCE_MEM,
730 }, 730 },
731 [1] = { 731 [1] = {
732 .start = AT91RM9200_ID_SSC0, 732 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
733 .end = AT91RM9200_ID_SSC0, 733 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
734 .flags = IORESOURCE_IRQ, 734 .flags = IORESOURCE_IRQ,
735 }, 735 },
736}; 736};
@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = {
771 .flags = IORESOURCE_MEM, 771 .flags = IORESOURCE_MEM,
772 }, 772 },
773 [1] = { 773 [1] = {
774 .start = AT91RM9200_ID_SSC1, 774 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
775 .end = AT91RM9200_ID_SSC1, 775 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
776 .flags = IORESOURCE_IRQ, 776 .flags = IORESOURCE_IRQ,
777 }, 777 },
778}; 778};
@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = {
813 .flags = IORESOURCE_MEM, 813 .flags = IORESOURCE_MEM,
814 }, 814 },
815 [1] = { 815 [1] = {
816 .start = AT91RM9200_ID_SSC2, 816 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
817 .end = AT91RM9200_ID_SSC2, 817 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
818 .flags = IORESOURCE_IRQ, 818 .flags = IORESOURCE_IRQ,
819 }, 819 },
820}; 820};
@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = {
897 .flags = IORESOURCE_MEM, 897 .flags = IORESOURCE_MEM,
898 }, 898 },
899 [1] = { 899 [1] = {
900 .start = AT91_ID_SYS, 900 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
901 .end = AT91_ID_SYS, 901 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
902 .flags = IORESOURCE_IRQ, 902 .flags = IORESOURCE_IRQ,
903 }, 903 },
904}; 904};
@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = {
935 .flags = IORESOURCE_MEM, 935 .flags = IORESOURCE_MEM,
936 }, 936 },
937 [1] = { 937 [1] = {
938 .start = AT91RM9200_ID_US0, 938 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
939 .end = AT91RM9200_ID_US0, 939 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
940 .flags = IORESOURCE_IRQ, 940 .flags = IORESOURCE_IRQ,
941 }, 941 },
942}; 942};
@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = {
984 .flags = IORESOURCE_MEM, 984 .flags = IORESOURCE_MEM,
985 }, 985 },
986 [1] = { 986 [1] = {
987 .start = AT91RM9200_ID_US1, 987 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
988 .end = AT91RM9200_ID_US1, 988 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
989 .flags = IORESOURCE_IRQ, 989 .flags = IORESOURCE_IRQ,
990 }, 990 },
991}; 991};
@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = {
1035 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1036 }, 1036 },
1037 [1] = { 1037 [1] = {
1038 .start = AT91RM9200_ID_US2, 1038 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1039 .end = AT91RM9200_ID_US2, 1039 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1040 .flags = IORESOURCE_IRQ, 1040 .flags = IORESOURCE_IRQ,
1041 }, 1041 },
1042}; 1042};
@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = {
1078 .flags = IORESOURCE_MEM, 1078 .flags = IORESOURCE_MEM,
1079 }, 1079 },
1080 [1] = { 1080 [1] = {
1081 .start = AT91RM9200_ID_US3, 1081 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1082 .end = AT91RM9200_ID_US3, 1082 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1083 .flags = IORESOURCE_IRQ, 1083 .flags = IORESOURCE_IRQ,
1084 }, 1084 },
1085}; 1085};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 2b1e438ed878..30c7f26a4668 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -20,6 +20,7 @@
20#include <mach/cpu.h> 20#include <mach/cpu.h>
21#include <mach/at91_dbgu.h> 21#include <mach/at91_dbgu.h>
22#include <mach/at91sam9260.h> 22#include <mach/at91sam9260.h>
23#include <mach/at91_aic.h>
23#include <mach/at91_pmc.h> 24#include <mach/at91_pmc.h>
24#include <mach/at91_rstc.h> 25#include <mach/at91_rstc.h>
25 26
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 0ded951f785a..7b9c2ba396ed 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 [1] = { 47 [1] = {
48 .start = AT91SAM9260_ID_UHP, 48 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
49 .end = AT91SAM9260_ID_UHP, 49 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ,
51 }, 51 },
52}; 52};
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
98 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
99 }, 99 },
100 [1] = { 100 [1] = {
101 .start = AT91SAM9260_ID_UDP, 101 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
102 .end = AT91SAM9260_ID_UDP, 102 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103 .flags = IORESOURCE_IRQ, 103 .flags = IORESOURCE_IRQ,
104 }, 104 },
105}; 105};
@@ -149,8 +149,8 @@ static struct resource eth_resources[] = {
149 .flags = IORESOURCE_MEM, 149 .flags = IORESOURCE_MEM,
150 }, 150 },
151 [1] = { 151 [1] = {
152 .start = AT91SAM9260_ID_EMAC, 152 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
153 .end = AT91SAM9260_ID_EMAC, 153 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154 .flags = IORESOURCE_IRQ, 154 .flags = IORESOURCE_IRQ,
155 }, 155 },
156}; 156};
@@ -223,8 +223,8 @@ static struct resource mmc_resources[] = {
223 .flags = IORESOURCE_MEM, 223 .flags = IORESOURCE_MEM,
224 }, 224 },
225 [1] = { 225 [1] = {
226 .start = AT91SAM9260_ID_MCI, 226 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
227 .end = AT91SAM9260_ID_MCI, 227 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228 .flags = IORESOURCE_IRQ, 228 .flags = IORESOURCE_IRQ,
229 }, 229 },
230}; 230};
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
305 .flags = IORESOURCE_MEM, 305 .flags = IORESOURCE_MEM,
306 }, 306 },
307 [1] = { 307 [1] = {
308 .start = AT91SAM9260_ID_MCI, 308 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
309 .end = AT91SAM9260_ID_MCI, 309 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
310 .flags = IORESOURCE_IRQ, 310 .flags = IORESOURCE_IRQ,
311 }, 311 },
312}; 312};
@@ -496,8 +496,8 @@ static struct resource twi_resources[] = {
496 .flags = IORESOURCE_MEM, 496 .flags = IORESOURCE_MEM,
497 }, 497 },
498 [1] = { 498 [1] = {
499 .start = AT91SAM9260_ID_TWI, 499 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
500 .end = AT91SAM9260_ID_TWI, 500 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
501 .flags = IORESOURCE_IRQ, 501 .flags = IORESOURCE_IRQ,
502 }, 502 },
503}; 503};
@@ -540,8 +540,8 @@ static struct resource spi0_resources[] = {
540 .flags = IORESOURCE_MEM, 540 .flags = IORESOURCE_MEM,
541 }, 541 },
542 [1] = { 542 [1] = {
543 .start = AT91SAM9260_ID_SPI0, 543 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
544 .end = AT91SAM9260_ID_SPI0, 544 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
545 .flags = IORESOURCE_IRQ, 545 .flags = IORESOURCE_IRQ,
546 }, 546 },
547}; 547};
@@ -566,8 +566,8 @@ static struct resource spi1_resources[] = {
566 .flags = IORESOURCE_MEM, 566 .flags = IORESOURCE_MEM,
567 }, 567 },
568 [1] = { 568 [1] = {
569 .start = AT91SAM9260_ID_SPI1, 569 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
570 .end = AT91SAM9260_ID_SPI1, 570 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
571 .flags = IORESOURCE_IRQ, 571 .flags = IORESOURCE_IRQ,
572 }, 572 },
573}; 573};
@@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = {
652 .flags = IORESOURCE_MEM, 652 .flags = IORESOURCE_MEM,
653 }, 653 },
654 [1] = { 654 [1] = {
655 .start = AT91SAM9260_ID_TC0, 655 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
656 .end = AT91SAM9260_ID_TC0, 656 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
657 .flags = IORESOURCE_IRQ, 657 .flags = IORESOURCE_IRQ,
658 }, 658 },
659 [2] = { 659 [2] = {
660 .start = AT91SAM9260_ID_TC1, 660 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
661 .end = AT91SAM9260_ID_TC1, 661 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
662 .flags = IORESOURCE_IRQ, 662 .flags = IORESOURCE_IRQ,
663 }, 663 },
664 [3] = { 664 [3] = {
665 .start = AT91SAM9260_ID_TC2, 665 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
666 .end = AT91SAM9260_ID_TC2, 666 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
667 .flags = IORESOURCE_IRQ, 667 .flags = IORESOURCE_IRQ,
668 }, 668 },
669}; 669};
@@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = {
682 .flags = IORESOURCE_MEM, 682 .flags = IORESOURCE_MEM,
683 }, 683 },
684 [1] = { 684 [1] = {
685 .start = AT91SAM9260_ID_TC3, 685 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
686 .end = AT91SAM9260_ID_TC3, 686 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
687 .flags = IORESOURCE_IRQ, 687 .flags = IORESOURCE_IRQ,
688 }, 688 },
689 [2] = { 689 [2] = {
690 .start = AT91SAM9260_ID_TC4, 690 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
691 .end = AT91SAM9260_ID_TC4, 691 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
692 .flags = IORESOURCE_IRQ, 692 .flags = IORESOURCE_IRQ,
693 }, 693 },
694 [3] = { 694 [3] = {
695 .start = AT91SAM9260_ID_TC5, 695 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
696 .end = AT91SAM9260_ID_TC5, 696 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
697 .flags = IORESOURCE_IRQ, 697 .flags = IORESOURCE_IRQ,
698 }, 698 },
699}; 699};
@@ -807,8 +807,8 @@ static struct resource ssc_resources[] = {
807 .flags = IORESOURCE_MEM, 807 .flags = IORESOURCE_MEM,
808 }, 808 },
809 [1] = { 809 [1] = {
810 .start = AT91SAM9260_ID_SSC, 810 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
811 .end = AT91SAM9260_ID_SSC, 811 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
812 .flags = IORESOURCE_IRQ, 812 .flags = IORESOURCE_IRQ,
813 }, 813 },
814}; 814};
@@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = {
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
885 .start = AT91_ID_SYS, 885 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
886 .end = AT91_ID_SYS, 886 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
887 .flags = IORESOURCE_IRQ, 887 .flags = IORESOURCE_IRQ,
888 }, 888 },
889}; 889};
@@ -920,8 +920,8 @@ static struct resource uart0_resources[] = {
920 .flags = IORESOURCE_MEM, 920 .flags = IORESOURCE_MEM,
921 }, 921 },
922 [1] = { 922 [1] = {
923 .start = AT91SAM9260_ID_US0, 923 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
924 .end = AT91SAM9260_ID_US0, 924 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
925 .flags = IORESOURCE_IRQ, 925 .flags = IORESOURCE_IRQ,
926 }, 926 },
927}; 927};
@@ -971,8 +971,8 @@ static struct resource uart1_resources[] = {
971 .flags = IORESOURCE_MEM, 971 .flags = IORESOURCE_MEM,
972 }, 972 },
973 [1] = { 973 [1] = {
974 .start = AT91SAM9260_ID_US1, 974 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
975 .end = AT91SAM9260_ID_US1, 975 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
976 .flags = IORESOURCE_IRQ, 976 .flags = IORESOURCE_IRQ,
977 }, 977 },
978}; 978};
@@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = {
1014 .flags = IORESOURCE_MEM, 1014 .flags = IORESOURCE_MEM,
1015 }, 1015 },
1016 [1] = { 1016 [1] = {
1017 .start = AT91SAM9260_ID_US2, 1017 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1018 .end = AT91SAM9260_ID_US2, 1018 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1019 .flags = IORESOURCE_IRQ, 1019 .flags = IORESOURCE_IRQ,
1020 }, 1020 },
1021}; 1021};
@@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = {
1057 .flags = IORESOURCE_MEM, 1057 .flags = IORESOURCE_MEM,
1058 }, 1058 },
1059 [1] = { 1059 [1] = {
1060 .start = AT91SAM9260_ID_US3, 1060 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1061 .end = AT91SAM9260_ID_US3, 1061 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1062 .flags = IORESOURCE_IRQ, 1062 .flags = IORESOURCE_IRQ,
1063 }, 1063 },
1064}; 1064};
@@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = {
1100 .flags = IORESOURCE_MEM, 1100 .flags = IORESOURCE_MEM,
1101 }, 1101 },
1102 [1] = { 1102 [1] = {
1103 .start = AT91SAM9260_ID_US4, 1103 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1104 .end = AT91SAM9260_ID_US4, 1104 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1105 .flags = IORESOURCE_IRQ, 1105 .flags = IORESOURCE_IRQ,
1106 }, 1106 },
1107}; 1107};
@@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = {
1138 .flags = IORESOURCE_MEM, 1138 .flags = IORESOURCE_MEM,
1139 }, 1139 },
1140 [1] = { 1140 [1] = {
1141 .start = AT91SAM9260_ID_US5, 1141 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1142 .end = AT91SAM9260_ID_US5, 1142 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1143 .flags = IORESOURCE_IRQ, 1143 .flags = IORESOURCE_IRQ,
1144 }, 1144 },
1145}; 1145};
@@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = {
1357 .flags = IORESOURCE_MEM, 1357 .flags = IORESOURCE_MEM,
1358 }, 1358 },
1359 [1] = { 1359 [1] = {
1360 .start = AT91SAM9260_ID_ADC, 1360 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1361 .end = AT91SAM9260_ID_ADC, 1361 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1362 .flags = IORESOURCE_IRQ, 1362 .flags = IORESOURCE_IRQ,
1363 }, 1363 },
1364}; 1364};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index c77d503d09d1..f40762c5fede 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -19,6 +19,7 @@
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/cpu.h> 20#include <mach/cpu.h>
21#include <mach/at91sam9261.h> 21#include <mach/at91sam9261.h>
22#include <mach/at91_aic.h>
22#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
24 25
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 9295e90b08ff..8df5c1bdff92 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 [1] = { 47 [1] = {
48 .start = AT91SAM9261_ID_UHP, 48 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
49 .end = AT91SAM9261_ID_UHP, 49 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
50 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ,
51 }, 51 },
52}; 52};
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
98 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
99 }, 99 },
100 [1] = { 100 [1] = {
101 .start = AT91SAM9261_ID_UDP, 101 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
102 .end = AT91SAM9261_ID_UDP, 102 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
103 .flags = IORESOURCE_IRQ, 103 .flags = IORESOURCE_IRQ,
104 }, 104 },
105}; 105};
@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = {
148 .flags = IORESOURCE_MEM, 148 .flags = IORESOURCE_MEM,
149 }, 149 },
150 [1] = { 150 [1] = {
151 .start = AT91SAM9261_ID_MCI, 151 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
152 .end = AT91SAM9261_ID_MCI, 152 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
153 .flags = IORESOURCE_IRQ, 153 .flags = IORESOURCE_IRQ,
154 }, 154 },
155}; 155};
@@ -310,8 +310,8 @@ static struct resource twi_resources[] = {
310 .flags = IORESOURCE_MEM, 310 .flags = IORESOURCE_MEM,
311 }, 311 },
312 [1] = { 312 [1] = {
313 .start = AT91SAM9261_ID_TWI, 313 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
314 .end = AT91SAM9261_ID_TWI, 314 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
315 .flags = IORESOURCE_IRQ, 315 .flags = IORESOURCE_IRQ,
316 }, 316 },
317}; 317};
@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = {
354 .flags = IORESOURCE_MEM, 354 .flags = IORESOURCE_MEM,
355 }, 355 },
356 [1] = { 356 [1] = {
357 .start = AT91SAM9261_ID_SPI0, 357 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
358 .end = AT91SAM9261_ID_SPI0, 358 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
359 .flags = IORESOURCE_IRQ, 359 .flags = IORESOURCE_IRQ,
360 }, 360 },
361}; 361};
@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = {
380 .flags = IORESOURCE_MEM, 380 .flags = IORESOURCE_MEM,
381 }, 381 },
382 [1] = { 382 [1] = {
383 .start = AT91SAM9261_ID_SPI1, 383 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
384 .end = AT91SAM9261_ID_SPI1, 384 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
385 .flags = IORESOURCE_IRQ, 385 .flags = IORESOURCE_IRQ,
386 }, 386 },
387}; 387};
@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = {
468 .flags = IORESOURCE_MEM, 468 .flags = IORESOURCE_MEM,
469 }, 469 },
470 [1] = { 470 [1] = {
471 .start = AT91SAM9261_ID_LCDC, 471 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
472 .end = AT91SAM9261_ID_LCDC, 472 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
473 .flags = IORESOURCE_IRQ, 473 .flags = IORESOURCE_IRQ,
474 }, 474 },
475#if defined(CONFIG_FB_INTSRAM) 475#if defined(CONFIG_FB_INTSRAM)
@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = {
566 .flags = IORESOURCE_MEM, 566 .flags = IORESOURCE_MEM,
567 }, 567 },
568 [1] = { 568 [1] = {
569 .start = AT91SAM9261_ID_TC0, 569 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
570 .end = AT91SAM9261_ID_TC0, 570 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
571 .flags = IORESOURCE_IRQ, 571 .flags = IORESOURCE_IRQ,
572 }, 572 },
573 [2] = { 573 [2] = {
574 .start = AT91SAM9261_ID_TC1, 574 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
575 .end = AT91SAM9261_ID_TC1, 575 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
576 .flags = IORESOURCE_IRQ, 576 .flags = IORESOURCE_IRQ,
577 }, 577 },
578 [3] = { 578 [3] = {
579 .start = AT91SAM9261_ID_TC2, 579 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
580 .end = AT91SAM9261_ID_TC2, 580 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
581 .flags = IORESOURCE_IRQ, 581 .flags = IORESOURCE_IRQ,
582 }, 582 },
583}; 583};
@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = {
689 .flags = IORESOURCE_MEM, 689 .flags = IORESOURCE_MEM,
690 }, 690 },
691 [1] = { 691 [1] = {
692 .start = AT91SAM9261_ID_SSC0, 692 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
693 .end = AT91SAM9261_ID_SSC0, 693 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
694 .flags = IORESOURCE_IRQ, 694 .flags = IORESOURCE_IRQ,
695 }, 695 },
696}; 696};
@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = {
731 .flags = IORESOURCE_MEM, 731 .flags = IORESOURCE_MEM,
732 }, 732 },
733 [1] = { 733 [1] = {
734 .start = AT91SAM9261_ID_SSC1, 734 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
735 .end = AT91SAM9261_ID_SSC1, 735 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
736 .flags = IORESOURCE_IRQ, 736 .flags = IORESOURCE_IRQ,
737 }, 737 },
738}; 738};
@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = {
773 .flags = IORESOURCE_MEM, 773 .flags = IORESOURCE_MEM,
774 }, 774 },
775 [1] = { 775 [1] = {
776 .start = AT91SAM9261_ID_SSC2, 776 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
777 .end = AT91SAM9261_ID_SSC2, 777 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
778 .flags = IORESOURCE_IRQ, 778 .flags = IORESOURCE_IRQ,
779 }, 779 },
780}; 780};
@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = {
857 .flags = IORESOURCE_MEM, 857 .flags = IORESOURCE_MEM,
858 }, 858 },
859 [1] = { 859 [1] = {
860 .start = AT91_ID_SYS, 860 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
861 .end = AT91_ID_SYS, 861 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
862 .flags = IORESOURCE_IRQ, 862 .flags = IORESOURCE_IRQ,
863 }, 863 },
864}; 864};
@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = {
895 .flags = IORESOURCE_MEM, 895 .flags = IORESOURCE_MEM,
896 }, 896 },
897 [1] = { 897 [1] = {
898 .start = AT91SAM9261_ID_US0, 898 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
899 .end = AT91SAM9261_ID_US0, 899 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
900 .flags = IORESOURCE_IRQ, 900 .flags = IORESOURCE_IRQ,
901 }, 901 },
902}; 902};
@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = {
938 .flags = IORESOURCE_MEM, 938 .flags = IORESOURCE_MEM,
939 }, 939 },
940 [1] = { 940 [1] = {
941 .start = AT91SAM9261_ID_US1, 941 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
942 .end = AT91SAM9261_ID_US1, 942 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
943 .flags = IORESOURCE_IRQ, 943 .flags = IORESOURCE_IRQ,
944 }, 944 },
945}; 945};
@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = {
981 .flags = IORESOURCE_MEM, 981 .flags = IORESOURCE_MEM,
982 }, 982 },
983 [1] = { 983 [1] = {
984 .start = AT91SAM9261_ID_US2, 984 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
985 .end = AT91SAM9261_ID_US2, 985 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
986 .flags = IORESOURCE_IRQ, 986 .flags = IORESOURCE_IRQ,
987 }, 987 },
988}; 988};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index ed91c7e9f7c2..84b38105231e 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -18,6 +18,7 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/at91sam9263.h> 20#include <mach/at91sam9263.h>
21#include <mach/at91_aic.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 23#include <mach/at91_rstc.h>
23 24
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 175e0009eaa9..eb6bbf86fb9f 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = {
44 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM,
45 }, 45 },
46 [1] = { 46 [1] = {
47 .start = AT91SAM9263_ID_UHP, 47 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
48 .end = AT91SAM9263_ID_UHP, 48 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
49 .flags = IORESOURCE_IRQ, 49 .flags = IORESOURCE_IRQ,
50 }, 50 },
51}; 51};
@@ -104,8 +104,8 @@ static struct resource udc_resources[] = {
104 .flags = IORESOURCE_MEM, 104 .flags = IORESOURCE_MEM,
105 }, 105 },
106 [1] = { 106 [1] = {
107 .start = AT91SAM9263_ID_UDP, 107 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
108 .end = AT91SAM9263_ID_UDP, 108 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
109 .flags = IORESOURCE_IRQ, 109 .flags = IORESOURCE_IRQ,
110 }, 110 },
111}; 111};
@@ -155,8 +155,8 @@ static struct resource eth_resources[] = {
155 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
156 }, 156 },
157 [1] = { 157 [1] = {
158 .start = AT91SAM9263_ID_EMAC, 158 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
159 .end = AT91SAM9263_ID_EMAC, 159 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
160 .flags = IORESOURCE_IRQ, 160 .flags = IORESOURCE_IRQ,
161 }, 161 },
162}; 162};
@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = {
229 .flags = IORESOURCE_MEM, 229 .flags = IORESOURCE_MEM,
230 }, 230 },
231 [1] = { 231 [1] = {
232 .start = AT91SAM9263_ID_MCI0, 232 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
233 .end = AT91SAM9263_ID_MCI0, 233 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
234 .flags = IORESOURCE_IRQ, 234 .flags = IORESOURCE_IRQ,
235 }, 235 },
236}; 236};
@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = {
254 .flags = IORESOURCE_MEM, 254 .flags = IORESOURCE_MEM,
255 }, 255 },
256 [1] = { 256 [1] = {
257 .start = AT91SAM9263_ID_MCI1, 257 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
258 .end = AT91SAM9263_ID_MCI1, 258 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
259 .flags = IORESOURCE_IRQ, 259 .flags = IORESOURCE_IRQ,
260 }, 260 },
261}; 261};
@@ -567,8 +567,8 @@ static struct resource twi_resources[] = {
567 .flags = IORESOURCE_MEM, 567 .flags = IORESOURCE_MEM,
568 }, 568 },
569 [1] = { 569 [1] = {
570 .start = AT91SAM9263_ID_TWI, 570 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
571 .end = AT91SAM9263_ID_TWI, 571 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
572 .flags = IORESOURCE_IRQ, 572 .flags = IORESOURCE_IRQ,
573 }, 573 },
574}; 574};
@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = {
611 .flags = IORESOURCE_MEM, 611 .flags = IORESOURCE_MEM,
612 }, 612 },
613 [1] = { 613 [1] = {
614 .start = AT91SAM9263_ID_SPI0, 614 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
615 .end = AT91SAM9263_ID_SPI0, 615 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
616 .flags = IORESOURCE_IRQ, 616 .flags = IORESOURCE_IRQ,
617 }, 617 },
618}; 618};
@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = {
637 .flags = IORESOURCE_MEM, 637 .flags = IORESOURCE_MEM,
638 }, 638 },
639 [1] = { 639 [1] = {
640 .start = AT91SAM9263_ID_SPI1, 640 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
641 .end = AT91SAM9263_ID_SPI1, 641 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
642 .flags = IORESOURCE_IRQ, 642 .flags = IORESOURCE_IRQ,
643 }, 643 },
644}; 644};
@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = {
725 .flags = IORESOURCE_MEM, 725 .flags = IORESOURCE_MEM,
726 }, 726 },
727 [1] = { 727 [1] = {
728 .start = AT91SAM9263_ID_AC97C, 728 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
729 .end = AT91SAM9263_ID_AC97C, 729 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
730 .flags = IORESOURCE_IRQ, 730 .flags = IORESOURCE_IRQ,
731 }, 731 },
732}; 732};
@@ -776,8 +776,8 @@ static struct resource can_resources[] = {
776 .flags = IORESOURCE_MEM, 776 .flags = IORESOURCE_MEM,
777 }, 777 },
778 [1] = { 778 [1] = {
779 .start = AT91SAM9263_ID_CAN, 779 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
780 .end = AT91SAM9263_ID_CAN, 780 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
781 .flags = IORESOURCE_IRQ, 781 .flags = IORESOURCE_IRQ,
782 }, 782 },
783}; 783};
@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = {
816 .flags = IORESOURCE_MEM, 816 .flags = IORESOURCE_MEM,
817 }, 817 },
818 [1] = { 818 [1] = {
819 .start = AT91SAM9263_ID_LCDC, 819 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
820 .end = AT91SAM9263_ID_LCDC, 820 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
821 .flags = IORESOURCE_IRQ, 821 .flags = IORESOURCE_IRQ,
822 }, 822 },
823}; 823};
@@ -883,8 +883,8 @@ struct resource isi_resources[] = {
883 .flags = IORESOURCE_MEM, 883 .flags = IORESOURCE_MEM,
884 }, 884 },
885 [1] = { 885 [1] = {
886 .start = AT91SAM9263_ID_ISI, 886 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
887 .end = AT91SAM9263_ID_ISI, 887 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
888 .flags = IORESOURCE_IRQ, 888 .flags = IORESOURCE_IRQ,
889 }, 889 },
890}; 890};
@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = {
940 .flags = IORESOURCE_MEM, 940 .flags = IORESOURCE_MEM,
941 }, 941 },
942 [1] = { 942 [1] = {
943 .start = AT91SAM9263_ID_TCB, 943 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
944 .end = AT91SAM9263_ID_TCB, 944 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
945 .flags = IORESOURCE_IRQ, 945 .flags = IORESOURCE_IRQ,
946 }, 946 },
947}; 947};
@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = {
1108 .flags = IORESOURCE_MEM, 1108 .flags = IORESOURCE_MEM,
1109 }, 1109 },
1110 [1] = { 1110 [1] = {
1111 .start = AT91SAM9263_ID_PWMC, 1111 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1112 .end = AT91SAM9263_ID_PWMC, 1112 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1113 .flags = IORESOURCE_IRQ, 1113 .flags = IORESOURCE_IRQ,
1114 }, 1114 },
1115}; 1115};
@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = {
1161 .flags = IORESOURCE_MEM, 1161 .flags = IORESOURCE_MEM,
1162 }, 1162 },
1163 [1] = { 1163 [1] = {
1164 .start = AT91SAM9263_ID_SSC0, 1164 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1165 .end = AT91SAM9263_ID_SSC0, 1165 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1166 .flags = IORESOURCE_IRQ, 1166 .flags = IORESOURCE_IRQ,
1167 }, 1167 },
1168}; 1168};
@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = {
1203 .flags = IORESOURCE_MEM, 1203 .flags = IORESOURCE_MEM,
1204 }, 1204 },
1205 [1] = { 1205 [1] = {
1206 .start = AT91SAM9263_ID_SSC1, 1206 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1207 .end = AT91SAM9263_ID_SSC1, 1207 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1208 .flags = IORESOURCE_IRQ, 1208 .flags = IORESOURCE_IRQ,
1209 }, 1209 },
1210}; 1210};
@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = {
1284 .flags = IORESOURCE_MEM, 1284 .flags = IORESOURCE_MEM,
1285 }, 1285 },
1286 [1] = { 1286 [1] = {
1287 .start = AT91_ID_SYS, 1287 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1288 .end = AT91_ID_SYS, 1288 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1289 .flags = IORESOURCE_IRQ, 1289 .flags = IORESOURCE_IRQ,
1290 }, 1290 },
1291}; 1291};
@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = {
1322 .flags = IORESOURCE_MEM, 1322 .flags = IORESOURCE_MEM,
1323 }, 1323 },
1324 [1] = { 1324 [1] = {
1325 .start = AT91SAM9263_ID_US0, 1325 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1326 .end = AT91SAM9263_ID_US0, 1326 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1327 .flags = IORESOURCE_IRQ, 1327 .flags = IORESOURCE_IRQ,
1328 }, 1328 },
1329}; 1329};
@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = {
1365 .flags = IORESOURCE_MEM, 1365 .flags = IORESOURCE_MEM,
1366 }, 1366 },
1367 [1] = { 1367 [1] = {
1368 .start = AT91SAM9263_ID_US1, 1368 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1369 .end = AT91SAM9263_ID_US1, 1369 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1370 .flags = IORESOURCE_IRQ, 1370 .flags = IORESOURCE_IRQ,
1371 }, 1371 },
1372}; 1372};
@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = {
1408 .flags = IORESOURCE_MEM, 1408 .flags = IORESOURCE_MEM,
1409 }, 1409 },
1410 [1] = { 1410 [1] = {
1411 .start = AT91SAM9263_ID_US2, 1411 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1412 .end = AT91SAM9263_ID_US2, 1412 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1413 .flags = IORESOURCE_IRQ, 1413 .flags = IORESOURCE_IRQ,
1414 }, 1414 },
1415}; 1415};
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index a94758b42737..ffc0957d7623 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = {
137 .name = "at91_tick", 137 .name = "at91_tick",
138 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 138 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139 .handler = at91sam926x_pit_interrupt, 139 .handler = at91sam926x_pit_interrupt,
140 .irq = AT91_ID_SYS, 140 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
141}; 141};
142 142
143static void at91sam926x_pit_reset(void) 143static void at91sam926x_pit_reset(void)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 4792682d52b9..977127368a7d 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -18,6 +18,7 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/at91sam9g45.h> 20#include <mach/at91sam9g45.h>
21#include <mach/at91_aic.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/cpu.h> 23#include <mach/cpu.h>
23 24
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 933fc9afe7d0..40fb79df2de0 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = {
53 .flags = IORESOURCE_MEM, 53 .flags = IORESOURCE_MEM,
54 }, 54 },
55 [1] = { 55 [1] = {
56 .start = AT91SAM9G45_ID_DMA, 56 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
57 .end = AT91SAM9G45_ID_DMA, 57 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
58 .flags = IORESOURCE_IRQ, 58 .flags = IORESOURCE_IRQ,
59 }, 59 },
60}; 60};
@@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = {
94 .flags = IORESOURCE_MEM, 94 .flags = IORESOURCE_MEM,
95 }, 95 },
96 [1] = { 96 [1] = {
97 .start = AT91SAM9G45_ID_UHPHS, 97 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
98 .end = AT91SAM9G45_ID_UHPHS, 98 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
99 .flags = IORESOURCE_IRQ, 99 .flags = IORESOURCE_IRQ,
100 }, 100 },
101}; 101};
@@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = {
156 .flags = IORESOURCE_MEM, 156 .flags = IORESOURCE_MEM,
157 }, 157 },
158 [1] = { 158 [1] = {
159 .start = AT91SAM9G45_ID_UHPHS, 159 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
160 .end = AT91SAM9G45_ID_UHPHS, 160 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
161 .flags = IORESOURCE_IRQ, 161 .flags = IORESOURCE_IRQ,
162 }, 162 },
163}; 163};
@@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = {
213 .flags = IORESOURCE_MEM, 213 .flags = IORESOURCE_MEM,
214 }, 214 },
215 [2] = { 215 [2] = {
216 .start = AT91SAM9G45_ID_UDPHS, 216 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
217 .end = AT91SAM9G45_ID_UDPHS, 217 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
218 .flags = IORESOURCE_IRQ, 218 .flags = IORESOURCE_IRQ,
219 }, 219 },
220}; 220};
@@ -296,8 +296,8 @@ static struct resource eth_resources[] = {
296 .flags = IORESOURCE_MEM, 296 .flags = IORESOURCE_MEM,
297 }, 297 },
298 [1] = { 298 [1] = {
299 .start = AT91SAM9G45_ID_EMAC, 299 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
300 .end = AT91SAM9G45_ID_EMAC, 300 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
301 .flags = IORESOURCE_IRQ, 301 .flags = IORESOURCE_IRQ,
302 }, 302 },
303}; 303};
@@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = {
370 .flags = IORESOURCE_MEM, 370 .flags = IORESOURCE_MEM,
371 }, 371 },
372 [1] = { 372 [1] = {
373 .start = AT91SAM9G45_ID_MCI0, 373 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
374 .end = AT91SAM9G45_ID_MCI0, 374 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
375 .flags = IORESOURCE_IRQ, 375 .flags = IORESOURCE_IRQ,
376 }, 376 },
377}; 377};
@@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = {
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [1] = { 397 [1] = {
398 .start = AT91SAM9G45_ID_MCI1, 398 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
399 .end = AT91SAM9G45_ID_MCI1, 399 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
400 .flags = IORESOURCE_IRQ, 400 .flags = IORESOURCE_IRQ,
401 }, 401 },
402}; 402};
@@ -645,8 +645,8 @@ static struct resource twi0_resources[] = {
645 .flags = IORESOURCE_MEM, 645 .flags = IORESOURCE_MEM,
646 }, 646 },
647 [1] = { 647 [1] = {
648 .start = AT91SAM9G45_ID_TWI0, 648 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
649 .end = AT91SAM9G45_ID_TWI0, 649 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
650 .flags = IORESOURCE_IRQ, 650 .flags = IORESOURCE_IRQ,
651 }, 651 },
652}; 652};
@@ -665,8 +665,8 @@ static struct resource twi1_resources[] = {
665 .flags = IORESOURCE_MEM, 665 .flags = IORESOURCE_MEM,
666 }, 666 },
667 [1] = { 667 [1] = {
668 .start = AT91SAM9G45_ID_TWI1, 668 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
669 .end = AT91SAM9G45_ID_TWI1, 669 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
670 .flags = IORESOURCE_IRQ, 670 .flags = IORESOURCE_IRQ,
671 }, 671 },
672}; 672};
@@ -720,8 +720,8 @@ static struct resource spi0_resources[] = {
720 .flags = IORESOURCE_MEM, 720 .flags = IORESOURCE_MEM,
721 }, 721 },
722 [1] = { 722 [1] = {
723 .start = AT91SAM9G45_ID_SPI0, 723 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
724 .end = AT91SAM9G45_ID_SPI0, 724 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
725 .flags = IORESOURCE_IRQ, 725 .flags = IORESOURCE_IRQ,
726 }, 726 },
727}; 727};
@@ -746,8 +746,8 @@ static struct resource spi1_resources[] = {
746 .flags = IORESOURCE_MEM, 746 .flags = IORESOURCE_MEM,
747 }, 747 },
748 [1] = { 748 [1] = {
749 .start = AT91SAM9G45_ID_SPI1, 749 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
750 .end = AT91SAM9G45_ID_SPI1, 750 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
751 .flags = IORESOURCE_IRQ, 751 .flags = IORESOURCE_IRQ,
752 }, 752 },
753}; 753};
@@ -834,8 +834,8 @@ static struct resource ac97_resources[] = {
834 .flags = IORESOURCE_MEM, 834 .flags = IORESOURCE_MEM,
835 }, 835 },
836 [1] = { 836 [1] = {
837 .start = AT91SAM9G45_ID_AC97C, 837 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
838 .end = AT91SAM9G45_ID_AC97C, 838 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
839 .flags = IORESOURCE_IRQ, 839 .flags = IORESOURCE_IRQ,
840 }, 840 },
841}; 841};
@@ -887,8 +887,8 @@ struct resource isi_resources[] = {
887 .flags = IORESOURCE_MEM, 887 .flags = IORESOURCE_MEM,
888 }, 888 },
889 [1] = { 889 [1] = {
890 .start = AT91SAM9G45_ID_ISI, 890 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
891 .end = AT91SAM9G45_ID_ISI, 891 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
892 .flags = IORESOURCE_IRQ, 892 .flags = IORESOURCE_IRQ,
893 }, 893 },
894}; 894};
@@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = {
979 .flags = IORESOURCE_MEM, 979 .flags = IORESOURCE_MEM,
980 }, 980 },
981 [1] = { 981 [1] = {
982 .start = AT91SAM9G45_ID_LCDC, 982 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
983 .end = AT91SAM9G45_ID_LCDC, 983 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
984 .flags = IORESOURCE_IRQ, 984 .flags = IORESOURCE_IRQ,
985 }, 985 },
986}; 986};
@@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = {
1054 .flags = IORESOURCE_MEM, 1054 .flags = IORESOURCE_MEM,
1055 }, 1055 },
1056 [1] = { 1056 [1] = {
1057 .start = AT91SAM9G45_ID_TCB, 1057 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1058 .end = AT91SAM9G45_ID_TCB, 1058 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1059 .flags = IORESOURCE_IRQ, 1059 .flags = IORESOURCE_IRQ,
1060 }, 1060 },
1061}; 1061};
@@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = {
1075 .flags = IORESOURCE_MEM, 1075 .flags = IORESOURCE_MEM,
1076 }, 1076 },
1077 [1] = { 1077 [1] = {
1078 .start = AT91SAM9G45_ID_TCB, 1078 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1079 .end = AT91SAM9G45_ID_TCB, 1079 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1080 .flags = IORESOURCE_IRQ, 1080 .flags = IORESOURCE_IRQ,
1081 }, 1081 },
1082}; 1082};
@@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = {
1110 .flags = IORESOURCE_MEM, 1110 .flags = IORESOURCE_MEM,
1111 }, 1111 },
1112 [1] = { 1112 [1] = {
1113 .start = AT91_ID_SYS, 1113 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1114 .end = AT91_ID_SYS, 1114 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1115 .flags = IORESOURCE_IRQ, 1115 .flags = IORESOURCE_IRQ,
1116 }, 1116 },
1117}; 1117};
@@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = {
1147 .flags = IORESOURCE_MEM, 1147 .flags = IORESOURCE_MEM,
1148 }, 1148 },
1149 [1] = { 1149 [1] = {
1150 .start = AT91SAM9G45_ID_TSC, 1150 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1151 .end = AT91SAM9G45_ID_TSC, 1151 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1152 .flags = IORESOURCE_IRQ, 1152 .flags = IORESOURCE_IRQ,
1153 } 1153 }
1154}; 1154};
@@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = {
1197 .flags = IORESOURCE_MEM, 1197 .flags = IORESOURCE_MEM,
1198 }, 1198 },
1199 [1] = { 1199 [1] = {
1200 .start = AT91SAM9G45_ID_TSC, 1200 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1201 .end = AT91SAM9G45_ID_TSC, 1201 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1202 .flags = IORESOURCE_IRQ, 1202 .flags = IORESOURCE_IRQ,
1203 } 1203 }
1204}; 1204};
@@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = {
1400 .flags = IORESOURCE_MEM, 1400 .flags = IORESOURCE_MEM,
1401 }, 1401 },
1402 [1] = { 1402 [1] = {
1403 .start = AT91SAM9G45_ID_PWMC, 1403 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
1404 .end = AT91SAM9G45_ID_PWMC, 1404 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
1405 .flags = IORESOURCE_IRQ, 1405 .flags = IORESOURCE_IRQ,
1406 }, 1406 },
1407}; 1407};
@@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = {
1453 .flags = IORESOURCE_MEM, 1453 .flags = IORESOURCE_MEM,
1454 }, 1454 },
1455 [1] = { 1455 [1] = {
1456 .start = AT91SAM9G45_ID_SSC0, 1456 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
1457 .end = AT91SAM9G45_ID_SSC0, 1457 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
1458 .flags = IORESOURCE_IRQ, 1458 .flags = IORESOURCE_IRQ,
1459 }, 1459 },
1460}; 1460};
@@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = {
1495 .flags = IORESOURCE_MEM, 1495 .flags = IORESOURCE_MEM,
1496 }, 1496 },
1497 [1] = { 1497 [1] = {
1498 .start = AT91SAM9G45_ID_SSC1, 1498 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
1499 .end = AT91SAM9G45_ID_SSC1, 1499 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
1500 .flags = IORESOURCE_IRQ, 1500 .flags = IORESOURCE_IRQ,
1501 }, 1501 },
1502}; 1502};
@@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = {
1575 .flags = IORESOURCE_MEM, 1575 .flags = IORESOURCE_MEM,
1576 }, 1576 },
1577 [1] = { 1577 [1] = {
1578 .start = AT91_ID_SYS, 1578 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1579 .end = AT91_ID_SYS, 1579 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1580 .flags = IORESOURCE_IRQ, 1580 .flags = IORESOURCE_IRQ,
1581 }, 1581 },
1582}; 1582};
@@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = {
1613 .flags = IORESOURCE_MEM, 1613 .flags = IORESOURCE_MEM,
1614 }, 1614 },
1615 [1] = { 1615 [1] = {
1616 .start = AT91SAM9G45_ID_US0, 1616 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
1617 .end = AT91SAM9G45_ID_US0, 1617 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
1618 .flags = IORESOURCE_IRQ, 1618 .flags = IORESOURCE_IRQ,
1619 }, 1619 },
1620}; 1620};
@@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = {
1656 .flags = IORESOURCE_MEM, 1656 .flags = IORESOURCE_MEM,
1657 }, 1657 },
1658 [1] = { 1658 [1] = {
1659 .start = AT91SAM9G45_ID_US1, 1659 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
1660 .end = AT91SAM9G45_ID_US1, 1660 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
1661 .flags = IORESOURCE_IRQ, 1661 .flags = IORESOURCE_IRQ,
1662 }, 1662 },
1663}; 1663};
@@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = {
1699 .flags = IORESOURCE_MEM, 1699 .flags = IORESOURCE_MEM,
1700 }, 1700 },
1701 [1] = { 1701 [1] = {
1702 .start = AT91SAM9G45_ID_US2, 1702 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
1703 .end = AT91SAM9G45_ID_US2, 1703 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
1704 .flags = IORESOURCE_IRQ, 1704 .flags = IORESOURCE_IRQ,
1705 }, 1705 },
1706}; 1706};
@@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = {
1742 .flags = IORESOURCE_MEM, 1742 .flags = IORESOURCE_MEM,
1743 }, 1743 },
1744 [1] = { 1744 [1] = {
1745 .start = AT91SAM9G45_ID_US3, 1745 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
1746 .end = AT91SAM9G45_ID_US3, 1746 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
1747 .flags = IORESOURCE_IRQ, 1747 .flags = IORESOURCE_IRQ,
1748 }, 1748 },
1749}; 1749};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index e420085a57ef..72ce50a50de5 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -19,6 +19,7 @@
19#include <mach/cpu.h> 19#include <mach/cpu.h>
20#include <mach/at91_dbgu.h> 20#include <mach/at91_dbgu.h>
21#include <mach/at91sam9rl.h> 21#include <mach/at91sam9rl.h>
22#include <mach/at91_aic.h>
22#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
24 25
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 9c0b1481a9a7..f09fff932172 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = {
41 .flags = IORESOURCE_MEM, 41 .flags = IORESOURCE_MEM,
42 }, 42 },
43 [2] = { 43 [2] = {
44 .start = AT91SAM9RL_ID_DMA, 44 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
45 .end = AT91SAM9RL_ID_DMA, 45 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
46 .flags = IORESOURCE_IRQ, 46 .flags = IORESOURCE_IRQ,
47 }, 47 },
48}; 48};
@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = {
84 .flags = IORESOURCE_MEM, 84 .flags = IORESOURCE_MEM,
85 }, 85 },
86 [2] = { 86 [2] = {
87 .start = AT91SAM9RL_ID_UDPHS, 87 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
88 .end = AT91SAM9RL_ID_UDPHS, 88 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
89 .flags = IORESOURCE_IRQ, 89 .flags = IORESOURCE_IRQ,
90 }, 90 },
91}; 91};
@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = {
172 .flags = IORESOURCE_MEM, 172 .flags = IORESOURCE_MEM,
173 }, 173 },
174 [1] = { 174 [1] = {
175 .start = AT91SAM9RL_ID_MCI, 175 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
176 .end = AT91SAM9RL_ID_MCI, 176 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
177 .flags = IORESOURCE_IRQ, 177 .flags = IORESOURCE_IRQ,
178 }, 178 },
179}; 179};
@@ -339,8 +339,8 @@ static struct resource twi_resources[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [1] = { 341 [1] = {
342 .start = AT91SAM9RL_ID_TWI0, 342 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
343 .end = AT91SAM9RL_ID_TWI0, 343 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
344 .flags = IORESOURCE_IRQ, 344 .flags = IORESOURCE_IRQ,
345 }, 345 },
346}; 346};
@@ -383,8 +383,8 @@ static struct resource spi_resources[] = {
383 .flags = IORESOURCE_MEM, 383 .flags = IORESOURCE_MEM,
384 }, 384 },
385 [1] = { 385 [1] = {
386 .start = AT91SAM9RL_ID_SPI, 386 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
387 .end = AT91SAM9RL_ID_SPI, 387 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
388 .flags = IORESOURCE_IRQ, 388 .flags = IORESOURCE_IRQ,
389 }, 389 },
390}; 390};
@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = {
452 .flags = IORESOURCE_MEM, 452 .flags = IORESOURCE_MEM,
453 }, 453 },
454 [1] = { 454 [1] = {
455 .start = AT91SAM9RL_ID_AC97C, 455 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
456 .end = AT91SAM9RL_ID_AC97C, 456 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
457 .flags = IORESOURCE_IRQ, 457 .flags = IORESOURCE_IRQ,
458 }, 458 },
459}; 459};
@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = {
507 .flags = IORESOURCE_MEM, 507 .flags = IORESOURCE_MEM,
508 }, 508 },
509 [1] = { 509 [1] = {
510 .start = AT91SAM9RL_ID_LCDC, 510 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
511 .end = AT91SAM9RL_ID_LCDC, 511 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
512 .flags = IORESOURCE_IRQ, 512 .flags = IORESOURCE_IRQ,
513 }, 513 },
514}; 514};
@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = {
574 .flags = IORESOURCE_MEM, 574 .flags = IORESOURCE_MEM,
575 }, 575 },
576 [1] = { 576 [1] = {
577 .start = AT91SAM9RL_ID_TC0, 577 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
578 .end = AT91SAM9RL_ID_TC0, 578 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
579 .flags = IORESOURCE_IRQ, 579 .flags = IORESOURCE_IRQ,
580 }, 580 },
581 [2] = { 581 [2] = {
582 .start = AT91SAM9RL_ID_TC1, 582 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
583 .end = AT91SAM9RL_ID_TC1, 583 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
584 .flags = IORESOURCE_IRQ, 584 .flags = IORESOURCE_IRQ,
585 }, 585 },
586 [3] = { 586 [3] = {
587 .start = AT91SAM9RL_ID_TC2, 587 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
588 .end = AT91SAM9RL_ID_TC2, 588 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
589 .flags = IORESOURCE_IRQ, 589 .flags = IORESOURCE_IRQ,
590 }, 590 },
591}; 591};
@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = {
621 .flags = IORESOURCE_MEM, 621 .flags = IORESOURCE_MEM,
622 }, 622 },
623 [1] = { 623 [1] = {
624 .start = AT91SAM9RL_ID_TSC, 624 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
625 .end = AT91SAM9RL_ID_TSC, 625 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
626 .flags = IORESOURCE_IRQ, 626 .flags = IORESOURCE_IRQ,
627 } 627 }
628}; 628};
@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = {
768 .flags = IORESOURCE_MEM, 768 .flags = IORESOURCE_MEM,
769 }, 769 },
770 [1] = { 770 [1] = {
771 .start = AT91SAM9RL_ID_PWMC, 771 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
772 .end = AT91SAM9RL_ID_PWMC, 772 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
773 .flags = IORESOURCE_IRQ, 773 .flags = IORESOURCE_IRQ,
774 }, 774 },
775}; 775};
@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = {
821 .flags = IORESOURCE_MEM, 821 .flags = IORESOURCE_MEM,
822 }, 822 },
823 [1] = { 823 [1] = {
824 .start = AT91SAM9RL_ID_SSC0, 824 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
825 .end = AT91SAM9RL_ID_SSC0, 825 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
826 .flags = IORESOURCE_IRQ, 826 .flags = IORESOURCE_IRQ,
827 }, 827 },
828}; 828};
@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = {
863 .flags = IORESOURCE_MEM, 863 .flags = IORESOURCE_MEM,
864 }, 864 },
865 [1] = { 865 [1] = {
866 .start = AT91SAM9RL_ID_SSC1, 866 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
867 .end = AT91SAM9RL_ID_SSC1, 867 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
868 .flags = IORESOURCE_IRQ, 868 .flags = IORESOURCE_IRQ,
869 }, 869 },
870}; 870};
@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = {
943 .flags = IORESOURCE_MEM, 943 .flags = IORESOURCE_MEM,
944 }, 944 },
945 [1] = { 945 [1] = {
946 .start = AT91_ID_SYS, 946 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
947 .end = AT91_ID_SYS, 947 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
948 .flags = IORESOURCE_IRQ, 948 .flags = IORESOURCE_IRQ,
949 }, 949 },
950}; 950};
@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = {
981 .flags = IORESOURCE_MEM, 981 .flags = IORESOURCE_MEM,
982 }, 982 },
983 [1] = { 983 [1] = {
984 .start = AT91SAM9RL_ID_US0, 984 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
985 .end = AT91SAM9RL_ID_US0, 985 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
986 .flags = IORESOURCE_IRQ, 986 .flags = IORESOURCE_IRQ,
987 }, 987 },
988}; 988};
@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = {
1032 .flags = IORESOURCE_MEM, 1032 .flags = IORESOURCE_MEM,
1033 }, 1033 },
1034 [1] = { 1034 [1] = {
1035 .start = AT91SAM9RL_ID_US1, 1035 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1036 .end = AT91SAM9RL_ID_US1, 1036 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1037 .flags = IORESOURCE_IRQ, 1037 .flags = IORESOURCE_IRQ,
1038 }, 1038 },
1039}; 1039};
@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = {
1075 .flags = IORESOURCE_MEM, 1075 .flags = IORESOURCE_MEM,
1076 }, 1076 },
1077 [1] = { 1077 [1] = {
1078 .start = AT91SAM9RL_ID_US2, 1078 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1079 .end = AT91SAM9RL_ID_US2, 1079 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1080 .flags = IORESOURCE_IRQ, 1080 .flags = IORESOURCE_IRQ,
1081 }, 1081 },
1082}; 1082};
@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = {
1118 .flags = IORESOURCE_MEM, 1118 .flags = IORESOURCE_MEM,
1119 }, 1119 },
1120 [1] = { 1120 [1] = {
1121 .start = AT91SAM9RL_ID_US3, 1121 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1122 .end = AT91SAM9RL_ID_US3, 1122 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1123 .flags = IORESOURCE_IRQ, 1123 .flags = IORESOURCE_IRQ,
1124 }, 1124 },
1125}; 1125};
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 1b144b4d3ce1..477cf9d06672 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void)
312 312
313void __init at91sam9x5_initialize(void) 313void __init at91sam9x5_initialize(void)
314{ 314{
315 at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
316
317 /* Register GPIO subsystem (using DT) */ 315 /* Register GPIO subsystem (using DT) */
318 at91_gpio_init(NULL, 0); 316 at91_gpio_init(NULL, 0);
319} 317}
@@ -321,47 +319,9 @@ void __init at91sam9x5_initialize(void)
321/* -------------------------------------------------------------------- 319/* --------------------------------------------------------------------
322 * Interrupt initialization 320 * Interrupt initialization
323 * -------------------------------------------------------------------- */ 321 * -------------------------------------------------------------------- */
324/*
325 * The default interrupt priority levels (0 = lowest, 7 = highest).
326 */
327static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = {
328 7, /* Advanced Interrupt Controller (FIQ) */
329 7, /* System Peripherals */
330 1, /* Parallel IO Controller A and B */
331 1, /* Parallel IO Controller C and D */
332 4, /* Soft Modem */
333 5, /* USART 0 */
334 5, /* USART 1 */
335 5, /* USART 2 */
336 5, /* USART 3 */
337 6, /* Two-Wire Interface 0 */
338 6, /* Two-Wire Interface 1 */
339 6, /* Two-Wire Interface 2 */
340 0, /* Multimedia Card Interface 0 */
341 5, /* Serial Peripheral Interface 0 */
342 5, /* Serial Peripheral Interface 1 */
343 5, /* UART 0 */
344 5, /* UART 1 */
345 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */
346 0, /* Pulse Width Modulation Controller */
347 0, /* ADC Controller */
348 0, /* DMA Controller 0 */
349 0, /* DMA Controller 1 */
350 2, /* USB Host High Speed port */
351 2, /* USB Device High speed port */
352 3, /* Ethernet MAC 0 */
353 3, /* LDC Controller or Image Sensor Interface */
354 0, /* Multimedia Card Interface 1 */
355 3, /* Ethernet MAC 1 */
356 4, /* Synchronous Serial Interface */
357 4, /* CAN Controller 0 */
358 4, /* CAN Controller 1 */
359 0, /* Advanced Interrupt Controller (IRQ0) */
360};
361 322
362struct at91_init_soc __initdata at91sam9x5_soc = { 323struct at91_init_soc __initdata at91sam9x5_soc = {
363 .map_io = at91sam9x5_map_io, 324 .map_io = at91sam9x5_map_io,
364 .default_irq_priority = at91sam9x5_default_irq_priority,
365 .register_clocks = at91sam9x5_register_clocks, 325 .register_clocks = at91sam9x5_register_clocks,
366 .init = at91sam9x5_initialize, 326 .init = at91sam9x5_initialize,
367}; 327};
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index d62fe090d814..4c0f5fd4d850 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -17,6 +17,7 @@
17#include <asm/system_misc.h> 17#include <asm/system_misc.h>
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <mach/at91x40.h> 19#include <mach/at91x40.h>
20#include <mach/at91_aic.h>
20#include <mach/at91_st.h> 21#include <mach/at91_st.h>
21#include <mach/timex.h> 22#include <mach/timex.h>
22#include "generic.h" 23#include "generic.h"
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 271f994314a4..22d8856094f1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -36,6 +36,7 @@
36 36
37#include <mach/board.h> 37#include <mach/board.h>
38#include <mach/cpu.h> 38#include <mach/cpu.h>
39#include <mach/at91_aic.h>
39 40
40#include "generic.h" 41#include "generic.h"
41 42
@@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
91 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 92 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
92 .timer = &at91rm9200_timer, 93 .timer = &at91rm9200_timer,
93 .map_io = at91_map_io, 94 .map_io = at91_map_io,
95 .handle_irq = at91_aic_handle_irq,
94 .init_early = onearm_init_early, 96 .init_early = onearm_init_early,
95 .init_irq = at91_init_irq_default, 97 .init_irq = at91_init_irq_default,
96 .init_machine = onearm_board_init, 98 .init_machine = onearm_board_init,
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index b7d8aa7b81e6..de7be1931817 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -44,6 +44,7 @@
44#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
45 45
46#include <mach/board.h> 46#include <mach/board.h>
47#include <mach/at91_aic.h>
47 48
48#include "generic.h" 49#include "generic.h"
49 50
@@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board")
212 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ 213 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
213 .timer = &at91sam926x_timer, 214 .timer = &at91sam926x_timer,
214 .map_io = at91_map_io, 215 .map_io = at91_map_io,
216 .handle_irq = at91_aic_handle_irq,
215 .init_early = afeb9260_init_early, 217 .init_early = afeb9260_init_early,
216 .init_irq = at91_init_irq_default, 218 .init_irq = at91_init_irq_default,
217 .init_machine = afeb9260_board_init, 219 .init_machine = afeb9260_board_init,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 29d3ef0a50fb..477e708497bc 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -39,6 +39,7 @@
39#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
40 40
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/at91_aic.h>
42#include <mach/at91sam9_smc.h> 43#include <mach/at91sam9_smc.h>
43 44
44#include "sam9_smc.h" 45#include "sam9_smc.h"
@@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60")
188 /* Maintainer: KwikByte */ 189 /* Maintainer: KwikByte */
189 .timer = &at91sam926x_timer, 190 .timer = &at91sam926x_timer,
190 .map_io = at91_map_io, 191 .map_io = at91_map_io,
192 .handle_irq = at91_aic_handle_irq,
191 .init_early = cam60_init_early, 193 .init_early = cam60_init_early,
192 .init_irq = at91_init_irq_default, 194 .init_irq = at91_init_irq_default,
193 .init_machine = cam60_board_init, 195 .init_machine = cam60_board_init,
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 44328a6d4609..a5b002f32a61 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -36,6 +36,7 @@
36 36
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/at91_aic.h>
39 40
40#include "generic.h" 41#include "generic.h"
41 42
@@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva")
158 /* Maintainer: Conitec Datasystems */ 159 /* Maintainer: Conitec Datasystems */
159 .timer = &at91rm9200_timer, 160 .timer = &at91rm9200_timer,
160 .map_io = at91_map_io, 161 .map_io = at91_map_io,
162 .handle_irq = at91_aic_handle_irq,
161 .init_early = carmeva_init_early, 163 .init_early = carmeva_init_early,
162 .init_irq = at91_init_irq_default, 164 .init_irq = at91_init_irq_default,
163 .init_machine = carmeva_board_init, 165 .init_machine = carmeva_board_init,
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 69951ec7dbf3..ecbc13b594de 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -41,6 +41,7 @@
41 41
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <mach/board.h> 43#include <mach/board.h>
44#include <mach/at91_aic.h>
44#include <mach/at91sam9_smc.h> 45#include <mach/at91sam9_smc.h>
45#include <mach/at91sam9260_matrix.h> 46#include <mach/at91sam9260_matrix.h>
46#include <mach/at91_matrix.h> 47#include <mach/at91_matrix.h>
@@ -376,6 +377,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
376 /* Maintainer: Eric Benard - EUKREA Electromatique */ 377 /* Maintainer: Eric Benard - EUKREA Electromatique */
377 .timer = &at91sam926x_timer, 378 .timer = &at91sam926x_timer,
378 .map_io = at91_map_io, 379 .map_io = at91_map_io,
380 .handle_irq = at91_aic_handle_irq,
379 .init_early = cpu9krea_init_early, 381 .init_early = cpu9krea_init_early,
380 .init_irq = at91_init_irq_default, 382 .init_irq = at91_init_irq_default,
381 .init_machine = cpu9krea_board_init, 383 .init_machine = cpu9krea_board_init,
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 895cf2dba612..2e6d043c82f2 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -37,6 +37,7 @@
37#include <asm/mach/irq.h> 37#include <asm/mach/irq.h>
38 38
39#include <mach/board.h> 39#include <mach/board.h>
40#include <mach/at91_aic.h>
40#include <mach/at91rm9200_mc.h> 41#include <mach/at91rm9200_mc.h>
41#include <mach/at91_ramc.h> 42#include <mach/at91_ramc.h>
42#include <mach/cpu.h> 43#include <mach/cpu.h>
@@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea")
178 /* Maintainer: Eric Benard - EUKREA Electromatique */ 179 /* Maintainer: Eric Benard - EUKREA Electromatique */
179 .timer = &at91rm9200_timer, 180 .timer = &at91rm9200_timer,
180 .map_io = at91_map_io, 181 .map_io = at91_map_io,
182 .handle_irq = at91_aic_handle_irq,
181 .init_early = cpuat91_init_early, 183 .init_early = cpuat91_init_early,
182 .init_irq = at91_init_irq_default, 184 .init_irq = at91_init_irq_default,
183 .init_machine = cpuat91_board_init, 185 .init_machine = cpuat91_board_init,
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index cd813361cd26..462bc319cbc5 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -39,6 +39,7 @@
39 39
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/at91_aic.h>
42 43
43#include "generic.h" 44#include "generic.h"
44 45
@@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337")
252 /* Maintainer: Bill Gatliff */ 253 /* Maintainer: Bill Gatliff */
253 .timer = &at91rm9200_timer, 254 .timer = &at91rm9200_timer,
254 .map_io = at91_map_io, 255 .map_io = at91_map_io,
256 .handle_irq = at91_aic_handle_irq,
255 .init_early = csb337_init_early, 257 .init_early = csb337_init_early,
256 .init_irq = at91_init_irq_default, 258 .init_irq = at91_init_irq_default,
257 .init_machine = csb337_board_init, 259 .init_machine = csb337_board_init,
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 7c8b05a57d7f..872871ab1160 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -36,6 +36,7 @@
36 36
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/at91_aic.h>
39 40
40#include "generic.h" 41#include "generic.h"
41 42
@@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637")
133 /* Maintainer: Bill Gatliff */ 134 /* Maintainer: Bill Gatliff */
134 .timer = &at91rm9200_timer, 135 .timer = &at91rm9200_timer,
135 .map_io = at91_map_io, 136 .map_io = at91_map_io,
137 .handle_irq = at91_aic_handle_irq,
136 .init_early = csb637_init_early, 138 .init_early = csb637_init_early,
137 .init_irq = at91_init_irq_default, 139 .init_irq = at91_init_irq_default,
138 .init_machine = csb637_board_init, 140 .init_machine = csb637_board_init,
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index a1fce05aa7a5..e8f45c4e0ea8 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -16,6 +16,7 @@
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17 17
18#include <mach/board.h> 18#include <mach/board.h>
19#include <mach/at91_aic.h>
19 20
20#include <asm/setup.h> 21#include <asm/setup.h>
21#include <asm/irq.h> 22#include <asm/irq.h>
@@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
53 /* Maintainer: Atmel */ 54 /* Maintainer: Atmel */
54 .timer = &at91sam926x_timer, 55 .timer = &at91sam926x_timer,
55 .map_io = at91_map_io, 56 .map_io = at91_map_io,
57 .handle_irq = at91_aic_handle_irq,
56 .init_early = at91_dt_initialize, 58 .init_early = at91_dt_initialize,
57 .init_irq = at91_dt_init_irq, 59 .init_irq = at91_dt_init_irq,
58 .init_machine = at91_dt_device_init, 60 .init_machine = at91_dt_device_init,
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c
index d2023f27c652..01f66e99ece7 100644
--- a/arch/arm/mach-at91/board-eb01.c
+++ b/arch/arm/mach-at91/board-eb01.c
@@ -28,6 +28,7 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
30#include <mach/board.h> 30#include <mach/board.h>
31#include <mach/at91_aic.h>
31#include "generic.h" 32#include "generic.h"
32 33
33static void __init at91eb01_init_irq(void) 34static void __init at91eb01_init_irq(void)
@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void)
43MACHINE_START(AT91EB01, "Atmel AT91 EB01") 44MACHINE_START(AT91EB01, "Atmel AT91 EB01")
44 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ 45 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */
45 .timer = &at91x40_timer, 46 .timer = &at91x40_timer,
47 .handle_irq = at91_aic_handle_irq,
46 .init_early = at91eb01_init_early, 48 .init_early = at91eb01_init_early,
47 .init_irq = at91eb01_init_irq, 49 .init_irq = at91eb01_init_irq,
48MACHINE_END 50MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index bd1017297989..d1e1f3fc0a47 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -36,6 +36,7 @@
36#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
37 37
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/at91_aic.h>
39 40
40#include "generic.h" 41#include "generic.h"
41 42
@@ -118,6 +119,7 @@ static void __init eb9200_board_init(void)
118MACHINE_START(ATEB9200, "Embest ATEB9200") 119MACHINE_START(ATEB9200, "Embest ATEB9200")
119 .timer = &at91rm9200_timer, 120 .timer = &at91rm9200_timer,
120 .map_io = at91_map_io, 121 .map_io = at91_map_io,
122 .handle_irq = at91_aic_handle_irq,
121 .init_early = eb9200_init_early, 123 .init_early = eb9200_init_early,
122 .init_irq = at91_init_irq_default, 124 .init_irq = at91_init_irq_default,
123 .init_machine = eb9200_board_init, 125 .init_machine = eb9200_board_init,
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 89cc3726a9ce..9c24cb25707c 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -39,6 +39,7 @@
39 39
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/cpu.h> 41#include <mach/cpu.h>
42#include <mach/at91_aic.h>
42 43
43#include "generic.h" 44#include "generic.h"
44 45
@@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
170 /* Maintainer: emQbit.com */ 171 /* Maintainer: emQbit.com */
171 .timer = &at91rm9200_timer, 172 .timer = &at91rm9200_timer,
172 .map_io = at91_map_io, 173 .map_io = at91_map_io,
174 .handle_irq = at91_aic_handle_irq,
173 .init_early = ecb_at91init_early, 175 .init_early = ecb_at91init_early,
174 .init_irq = at91_init_irq_default, 176 .init_irq = at91_init_irq_default,
175 .init_machine = ecb_at91board_init, 177 .init_machine = ecb_at91board_init,
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 558546cf63f4..82bdfde3405f 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -25,6 +25,7 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26 26
27#include <mach/board.h> 27#include <mach/board.h>
28#include <mach/at91_aic.h>
28#include <mach/at91rm9200_mc.h> 29#include <mach/at91rm9200_mc.h>
29#include <mach/at91_ramc.h> 30#include <mach/at91_ramc.h>
30#include <mach/cpu.h> 31#include <mach/cpu.h>
@@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920")
132 /* Maintainer: Sascha Hauer */ 133 /* Maintainer: Sascha Hauer */
133 .timer = &at91rm9200_timer, 134 .timer = &at91rm9200_timer,
134 .map_io = at91_map_io, 135 .map_io = at91_map_io,
136 .handle_irq = at91_aic_handle_irq,
135 .init_early = eco920_init_early, 137 .init_early = eco920_init_early,
136 .init_irq = at91_init_irq_default, 138 .init_irq = at91_init_irq_default,
137 .init_machine = eco920_board_init, 139 .init_machine = eco920_board_init,
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 47658f78105d..6cc83a87d77c 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -34,6 +34,7 @@
34 34
35#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/board.h> 36#include <mach/board.h>
37#include <mach/at91_aic.h>
37 38
38#include "generic.h" 39#include "generic.h"
39 40
@@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect")
160 /* Maintainer: Maxim Osipov */ 161 /* Maintainer: Maxim Osipov */
161 .timer = &at91sam926x_timer, 162 .timer = &at91sam926x_timer,
162 .map_io = at91_map_io, 163 .map_io = at91_map_io,
164 .handle_irq = at91_aic_handle_irq,
163 .init_early = flexibity_init_early, 165 .init_early = flexibity_init_early,
164 .init_irq = at91_init_irq_default, 166 .init_irq = at91_init_irq_default,
165 .init_machine = flexibity_board_init, 167 .init_machine = flexibity_board_init,
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index 33411e6ecb1f..69ab1247ef81 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -42,6 +42,7 @@
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43 43
44#include <mach/board.h> 44#include <mach/board.h>
45#include <mach/at91_aic.h>
45#include <mach/at91sam9_smc.h> 46#include <mach/at91sam9_smc.h>
46 47
47#include "sam9_smc.h" 48#include "sam9_smc.h"
@@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
262 /* Maintainer: Sergio Tanzilli */ 263 /* Maintainer: Sergio Tanzilli */
263 .timer = &at91sam926x_timer, 264 .timer = &at91sam926x_timer,
264 .map_io = at91_map_io, 265 .map_io = at91_map_io,
266 .handle_irq = at91_aic_handle_irq,
265 .init_early = foxg20_init_early, 267 .init_early = foxg20_init_early,
266 .init_irq = at91_init_irq_default, 268 .init_irq = at91_init_irq_default,
267 .init_machine = foxg20_board_init, 269 .init_machine = foxg20_board_init,
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 3e0dfa643a86..a9d5e78118c5 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -31,6 +31,7 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32 32
33#include <mach/board.h> 33#include <mach/board.h>
34#include <mach/at91_aic.h>
34#include <mach/at91sam9_smc.h> 35#include <mach/at91sam9_smc.h>
35#include <mach/gsia18s.h> 36#include <mach/gsia18s.h>
36#include <mach/stamp9g20.h> 37#include <mach/stamp9g20.h>
@@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void)
575MACHINE_START(GSIA18S, "GS_IA18_S") 576MACHINE_START(GSIA18S, "GS_IA18_S")
576 .timer = &at91sam926x_timer, 577 .timer = &at91sam926x_timer,
577 .map_io = at91_map_io, 578 .map_io = at91_map_io,
579 .handle_irq = at91_aic_handle_irq,
578 .init_early = gsia18s_init_early, 580 .init_early = gsia18s_init_early,
579 .init_irq = at91_init_irq_default, 581 .init_irq = at91_init_irq_default,
580 .init_machine = gsia18s_board_init, 582 .init_machine = gsia18s_board_init,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index f260657f32bc..64c1dbf88a07 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -35,6 +35,7 @@
35#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
36 36
37#include <mach/board.h> 37#include <mach/board.h>
38#include <mach/at91_aic.h>
38#include <mach/cpu.h> 39#include <mach/cpu.h>
39 40
40#include "generic.h" 41#include "generic.h"
@@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA")
93 /* Maintainer: Sergei Sharonov */ 94 /* Maintainer: Sergei Sharonov */
94 .timer = &at91rm9200_timer, 95 .timer = &at91rm9200_timer,
95 .map_io = at91_map_io, 96 .map_io = at91_map_io,
97 .handle_irq = at91_aic_handle_irq,
96 .init_early = kafa_init_early, 98 .init_early = kafa_init_early,
97 .init_irq = at91_init_irq_default, 99 .init_irq = at91_init_irq_default,
98 .init_machine = kafa_board_init, 100 .init_machine = kafa_board_init,
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index ba39db5482b9..5d96cb85175f 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -37,6 +37,7 @@
37 37
38#include <mach/board.h> 38#include <mach/board.h>
39#include <mach/cpu.h> 39#include <mach/cpu.h>
40#include <mach/at91_aic.h>
40#include <mach/at91rm9200_mc.h> 41#include <mach/at91rm9200_mc.h>
41#include <mach/at91_ramc.h> 42#include <mach/at91_ramc.h>
42 43
@@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x")
133 /* Maintainer: KwikByte, Inc. */ 134 /* Maintainer: KwikByte, Inc. */
134 .timer = &at91rm9200_timer, 135 .timer = &at91rm9200_timer,
135 .map_io = at91_map_io, 136 .map_io = at91_map_io,
137 .handle_irq = at91_aic_handle_irq,
136 .init_early = kb9202_init_early, 138 .init_early = kb9202_init_early,
137 .init_irq = at91_init_irq_default, 139 .init_irq = at91_init_irq_default,
138 .init_machine = kb9202_board_init, 140 .init_machine = kb9202_board_init,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index d2f4cc161766..18103c5d993c 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -45,6 +45,7 @@
45 45
46#include <mach/hardware.h> 46#include <mach/hardware.h>
47#include <mach/board.h> 47#include <mach/board.h>
48#include <mach/at91_aic.h>
48#include <mach/at91sam9_smc.h> 49#include <mach/at91sam9_smc.h>
49 50
50#include "sam9_smc.h" 51#include "sam9_smc.h"
@@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
378 /* Maintainer: ADENEO */ 379 /* Maintainer: ADENEO */
379 .timer = &at91sam926x_timer, 380 .timer = &at91sam926x_timer,
380 .map_io = at91_map_io, 381 .map_io = at91_map_io,
382 .handle_irq = at91_aic_handle_irq,
381 .init_early = neocore926_init_early, 383 .init_early = neocore926_init_early,
382 .init_irq = at91_init_irq_default, 384 .init_irq = at91_init_irq_default,
383 .init_machine = neocore926_board_init, 385 .init_machine = neocore926_board_init,
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 7fe638342421..9ca3e32c54cb 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -30,6 +30,7 @@
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
32#include <mach/board.h> 32#include <mach/board.h>
33#include <mach/at91_aic.h>
33#include <mach/at91sam9_smc.h> 34#include <mach/at91sam9_smc.h>
34#include <mach/stamp9g20.h> 35#include <mach/stamp9g20.h>
35 36
@@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20")
218 /* Maintainer: pgsellmann@portner-elektronik.at */ 219 /* Maintainer: pgsellmann@portner-elektronik.at */
219 .timer = &at91sam926x_timer, 220 .timer = &at91sam926x_timer,
220 .map_io = at91_map_io, 221 .map_io = at91_map_io,
222 .handle_irq = at91_aic_handle_irq,
221 .init_early = pcontrol_g20_init_early, 223 .init_early = pcontrol_g20_init_early,
222 .init_irq = at91_init_irq_default, 224 .init_irq = at91_init_irq_default,
223 .init_machine = pcontrol_g20_board_init, 225 .init_machine = pcontrol_g20_board_init,
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index b45c0a5d5ca7..127065504508 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -38,6 +38,7 @@
38#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
39 39
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/at91_aic.h>
41#include <mach/at91rm9200_mc.h> 42#include <mach/at91rm9200_mc.h>
42#include <mach/at91_ramc.h> 43#include <mach/at91_ramc.h>
43 44
@@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200")
120 /* Maintainer: Kleinhenz Elektronik GmbH */ 121 /* Maintainer: Kleinhenz Elektronik GmbH */
121 .timer = &at91rm9200_timer, 122 .timer = &at91rm9200_timer,
122 .map_io = at91_map_io, 123 .map_io = at91_map_io,
124 .handle_irq = at91_aic_handle_irq,
123 .init_early = picotux200_init_early, 125 .init_early = picotux200_init_early,
124 .init_irq = at91_init_irq_default, 126 .init_irq = at91_init_irq_default,
125 .init_machine = picotux200_board_init, 127 .init_machine = picotux200_board_init,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 0c61bf0d272c..bf351e285422 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -41,6 +41,7 @@
41 41
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <mach/board.h> 43#include <mach/board.h>
44#include <mach/at91_aic.h>
44#include <mach/at91sam9_smc.h> 45#include <mach/at91sam9_smc.h>
45#include <mach/at91_shdwc.h> 46#include <mach/at91_shdwc.h>
46 47
@@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
258 /* Maintainer: calao-systems */ 259 /* Maintainer: calao-systems */
259 .timer = &at91sam926x_timer, 260 .timer = &at91sam926x_timer,
260 .map_io = at91_map_io, 261 .map_io = at91_map_io,
262 .handle_irq = at91_aic_handle_irq,
261 .init_early = ek_init_early, 263 .init_early = ek_init_early,
262 .init_irq = at91_init_irq_default, 264 .init_irq = at91_init_irq_default,
263 .init_machine = ek_board_init, 265 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index afd7a4713766..cc2bf9796073 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -40,6 +40,7 @@
40 40
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/at91_aic.h>
43#include <mach/at91rm9200_mc.h> 44#include <mach/at91rm9200_mc.h>
44#include <mach/at91_ramc.h> 45#include <mach/at91_ramc.h>
45 46
@@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
223 /* Maintainer: SAN People/Atmel */ 224 /* Maintainer: SAN People/Atmel */
224 .timer = &at91rm9200_timer, 225 .timer = &at91rm9200_timer,
225 .map_io = at91_map_io, 226 .map_io = at91_map_io,
227 .handle_irq = at91_aic_handle_irq,
226 .init_early = dk_init_early, 228 .init_early = dk_init_early,
227 .init_irq = at91_init_irq_default, 229 .init_irq = at91_init_irq_default,
228 .init_machine = dk_board_init, 230 .init_machine = dk_board_init,
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 2b15b8adec4c..62e19e64c9d3 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -40,6 +40,7 @@
40 40
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/board.h> 42#include <mach/board.h>
43#include <mach/at91_aic.h>
43#include <mach/at91rm9200_mc.h> 44#include <mach/at91rm9200_mc.h>
44#include <mach/at91_ramc.h> 45#include <mach/at91_ramc.h>
45 46
@@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
190 /* Maintainer: SAN People/Atmel */ 191 /* Maintainer: SAN People/Atmel */
191 .timer = &at91rm9200_timer, 192 .timer = &at91rm9200_timer,
192 .map_io = at91_map_io, 193 .map_io = at91_map_io,
194 .handle_irq = at91_aic_handle_irq,
193 .init_early = ek_init_early, 195 .init_early = ek_init_early,
194 .init_irq = at91_init_irq_default, 196 .init_irq = at91_init_irq_default,
195 .init_machine = ek_board_init, 197 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index 24ab9be7510f..c3b43aefdb75 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -26,6 +26,7 @@
26 26
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/board.h> 28#include <mach/board.h>
29#include <mach/at91_aic.h>
29 30
30#include <linux/gpio.h> 31#include <linux/gpio.h>
31 32
@@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS")
225 /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */ 226 /* Maintainer: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> */
226 .timer = &at91rm9200_timer, 227 .timer = &at91rm9200_timer,
227 .map_io = at91_map_io, 228 .map_io = at91_map_io,
229 .handle_irq = at91_aic_handle_irq,
228 .init_early = rsi_ews_init_early, 230 .init_early = rsi_ews_init_early,
229 .init_irq = at91_init_irq_default, 231 .init_irq = at91_init_irq_default,
230 .init_machine = rsi_ews_board_init, 232 .init_machine = rsi_ews_board_init,
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index cdd21f2595d2..7bf6da70d7d5 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -38,6 +38,7 @@
38#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
39 39
40#include <mach/board.h> 40#include <mach/board.h>
41#include <mach/at91_aic.h>
41#include <mach/at91sam9_smc.h> 42#include <mach/at91sam9_smc.h>
42 43
43#include "sam9_smc.h" 44#include "sam9_smc.h"
@@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
202 /* Maintainer: Olimex */ 203 /* Maintainer: Olimex */
203 .timer = &at91sam926x_timer, 204 .timer = &at91sam926x_timer,
204 .map_io = at91_map_io, 205 .map_io = at91_map_io,
206 .handle_irq = at91_aic_handle_irq,
205 .init_early = ek_init_early, 207 .init_early = ek_init_early,
206 .init_irq = at91_init_irq_default, 208 .init_irq = at91_init_irq_default,
207 .init_machine = ek_board_init, 209 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 7b3c3913551a..889c1bf71eb5 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -42,6 +42,7 @@
42 42
43#include <mach/hardware.h> 43#include <mach/hardware.h>
44#include <mach/board.h> 44#include <mach/board.h>
45#include <mach/at91_aic.h>
45#include <mach/at91sam9_smc.h> 46#include <mach/at91sam9_smc.h>
46#include <mach/at91_shdwc.h> 47#include <mach/at91_shdwc.h>
47#include <mach/system_rev.h> 48#include <mach/system_rev.h>
@@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
344 /* Maintainer: Atmel */ 345 /* Maintainer: Atmel */
345 .timer = &at91sam926x_timer, 346 .timer = &at91sam926x_timer,
346 .map_io = at91_map_io, 347 .map_io = at91_map_io,
348 .handle_irq = at91_aic_handle_irq,
347 .init_early = ek_init_early, 349 .init_early = ek_init_early,
348 .init_irq = at91_init_irq_default, 350 .init_irq = at91_init_irq_default,
349 .init_machine = ek_board_init, 351 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 2736453821b0..2269be5fa384 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -46,6 +46,7 @@
46 46
47#include <mach/hardware.h> 47#include <mach/hardware.h>
48#include <mach/board.h> 48#include <mach/board.h>
49#include <mach/at91_aic.h>
49#include <mach/at91sam9_smc.h> 50#include <mach/at91sam9_smc.h>
50#include <mach/at91_shdwc.h> 51#include <mach/at91_shdwc.h>
51#include <mach/system_rev.h> 52#include <mach/system_rev.h>
@@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
615 /* Maintainer: Atmel */ 616 /* Maintainer: Atmel */
616 .timer = &at91sam926x_timer, 617 .timer = &at91sam926x_timer,
617 .map_io = at91_map_io, 618 .map_io = at91_map_io,
619 .handle_irq = at91_aic_handle_irq,
618 .init_early = ek_init_early, 620 .init_early = ek_init_early,
619 .init_irq = at91_init_irq_default, 621 .init_irq = at91_init_irq_default,
620 .init_machine = ek_board_init, 622 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 983cb98d2465..82adf581afc2 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -45,6 +45,7 @@
45 45
46#include <mach/hardware.h> 46#include <mach/hardware.h>
47#include <mach/board.h> 47#include <mach/board.h>
48#include <mach/at91_aic.h>
48#include <mach/at91sam9_smc.h> 49#include <mach/at91sam9_smc.h>
49#include <mach/at91_shdwc.h> 50#include <mach/at91_shdwc.h>
50#include <mach/system_rev.h> 51#include <mach/system_rev.h>
@@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
443 /* Maintainer: Atmel */ 444 /* Maintainer: Atmel */
444 .timer = &at91sam926x_timer, 445 .timer = &at91sam926x_timer,
445 .map_io = at91_map_io, 446 .map_io = at91_map_io,
447 .handle_irq = at91_aic_handle_irq,
446 .init_early = ek_init_early, 448 .init_early = ek_init_early,
447 .init_irq = at91_init_irq_default, 449 .init_irq = at91_init_irq_default,
448 .init_machine = ek_board_init, 450 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 6860d3451100..4ea4ee00364b 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -44,6 +44,7 @@
44#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
45 45
46#include <mach/board.h> 46#include <mach/board.h>
47#include <mach/at91_aic.h>
47#include <mach/at91sam9_smc.h> 48#include <mach/at91sam9_smc.h>
48#include <mach/system_rev.h> 49#include <mach/system_rev.h>
49 50
@@ -413,6 +414,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
413 /* Maintainer: Atmel */ 414 /* Maintainer: Atmel */
414 .timer = &at91sam926x_timer, 415 .timer = &at91sam926x_timer,
415 .map_io = at91_map_io, 416 .map_io = at91_map_io,
417 .handle_irq = at91_aic_handle_irq,
416 .init_early = ek_init_early, 418 .init_early = ek_init_early,
417 .init_irq = at91_init_irq_default, 419 .init_irq = at91_init_irq_default,
418 .init_machine = ek_board_init, 420 .init_machine = ek_board_init,
@@ -422,6 +424,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
422 /* Maintainer: Atmel */ 424 /* Maintainer: Atmel */
423 .timer = &at91sam926x_timer, 425 .timer = &at91sam926x_timer,
424 .map_io = at91_map_io, 426 .map_io = at91_map_io,
427 .handle_irq = at91_aic_handle_irq,
425 .init_early = ek_init_early, 428 .init_early = ek_init_early,
426 .init_irq = at91_init_irq_default, 429 .init_irq = at91_init_irq_default,
427 .init_machine = ek_board_init, 430 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 63163dc7df46..3d48ec154685 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -43,6 +43,7 @@
43#include <asm/mach/irq.h> 43#include <asm/mach/irq.h>
44 44
45#include <mach/board.h> 45#include <mach/board.h>
46#include <mach/at91_aic.h>
46#include <mach/at91sam9_smc.h> 47#include <mach/at91sam9_smc.h>
47#include <mach/at91_shdwc.h> 48#include <mach/at91_shdwc.h>
48#include <mach/system_rev.h> 49#include <mach/system_rev.h>
@@ -503,6 +504,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
503 /* Maintainer: Atmel */ 504 /* Maintainer: Atmel */
504 .timer = &at91sam926x_timer, 505 .timer = &at91sam926x_timer,
505 .map_io = at91_map_io, 506 .map_io = at91_map_io,
507 .handle_irq = at91_aic_handle_irq,
506 .init_early = ek_init_early, 508 .init_early = ek_init_early,
507 .init_irq = at91_init_irq_default, 509 .init_irq = at91_init_irq_default,
508 .init_machine = ek_board_init, 510 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index be3239f13daa..e7dc3ead7045 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -31,6 +31,7 @@
31 31
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/board.h> 33#include <mach/board.h>
34#include <mach/at91_aic.h>
34#include <mach/at91sam9_smc.h> 35#include <mach/at91sam9_smc.h>
35#include <mach/at91_shdwc.h> 36#include <mach/at91_shdwc.h>
36 37
@@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
319 /* Maintainer: Atmel */ 320 /* Maintainer: Atmel */
320 .timer = &at91sam926x_timer, 321 .timer = &at91sam926x_timer,
321 .map_io = at91_map_io, 322 .map_io = at91_map_io,
323 .handle_irq = at91_aic_handle_irq,
322 .init_early = ek_init_early, 324 .init_early = ek_init_early,
323 .init_irq = at91_init_irq_default, 325 .init_irq = at91_init_irq_default,
324 .init_machine = ek_board_init, 326 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 9d446f1bb45f..a4e031a039fd 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -33,6 +33,7 @@
33 33
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/board.h> 35#include <mach/board.h>
36#include <mach/at91_aic.h>
36#include <mach/at91sam9_smc.h> 37#include <mach/at91sam9_smc.h>
37 38
38#include "sam9_smc.h" 39#include "sam9_smc.h"
@@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void)
178MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") 179MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
179 .timer = &at91sam926x_timer, 180 .timer = &at91sam926x_timer,
180 .map_io = at91_map_io, 181 .map_io = at91_map_io,
182 .handle_irq = at91_aic_handle_irq,
181 .init_early = snapper9260_init_early, 183 .init_early = snapper9260_init_early,
182 .init_irq = at91_init_irq_default, 184 .init_irq = at91_init_irq_default,
183 .init_machine = snapper9260_board_init, 185 .init_machine = snapper9260_board_init,
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index ee86f9d7ee72..29eae1626bf7 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -26,6 +26,7 @@
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27 27
28#include <mach/board.h> 28#include <mach/board.h>
29#include <mach/at91_aic.h>
29#include <mach/at91sam9_smc.h> 30#include <mach/at91sam9_smc.h>
30 31
31#include "sam9_smc.h" 32#include "sam9_smc.h"
@@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")
287 /* Maintainer: taskit GmbH */ 288 /* Maintainer: taskit GmbH */
288 .timer = &at91sam926x_timer, 289 .timer = &at91sam926x_timer,
289 .map_io = at91_map_io, 290 .map_io = at91_map_io,
291 .handle_irq = at91_aic_handle_irq,
290 .init_early = stamp9g20_init_early, 292 .init_early = stamp9g20_init_early,
291 .init_irq = at91_init_irq_default, 293 .init_irq = at91_init_irq_default,
292 .init_machine = portuxg20_board_init, 294 .init_machine = portuxg20_board_init,
@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
296 /* Maintainer: taskit GmbH */ 298 /* Maintainer: taskit GmbH */
297 .timer = &at91sam926x_timer, 299 .timer = &at91sam926x_timer,
298 .map_io = at91_map_io, 300 .map_io = at91_map_io,
301 .handle_irq = at91_aic_handle_irq,
299 .init_early = stamp9g20_init_early, 302 .init_early = stamp9g20_init_early,
300 .init_irq = at91_init_irq_default, 303 .init_irq = at91_init_irq_default,
301 .init_machine = stamp9g20evb_board_init, 304 .init_machine = stamp9g20evb_board_init,
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 95393fcaf199..c1476b9fe7b9 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -42,6 +42,7 @@
42 42
43#include <mach/hardware.h> 43#include <mach/hardware.h>
44#include <mach/board.h> 44#include <mach/board.h>
45#include <mach/at91_aic.h>
45#include <mach/at91sam9_smc.h> 46#include <mach/at91sam9_smc.h>
46#include <mach/at91_shdwc.h> 47#include <mach/at91_shdwc.h>
47 48
@@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263")
358 /* Maintainer: calao-systems */ 359 /* Maintainer: calao-systems */
359 .timer = &at91sam926x_timer, 360 .timer = &at91sam926x_timer,
360 .map_io = at91_map_io, 361 .map_io = at91_map_io,
362 .handle_irq = at91_aic_handle_irq,
361 .init_early = ek_init_early, 363 .init_early = ek_init_early,
362 .init_irq = at91_init_irq_default, 364 .init_irq = at91_init_irq_default,
363 .init_machine = ek_board_init, 365 .init_machine = ek_board_init,
@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260")
367 /* Maintainer: calao-systems */ 369 /* Maintainer: calao-systems */
368 .timer = &at91sam926x_timer, 370 .timer = &at91sam926x_timer,
369 .map_io = at91_map_io, 371 .map_io = at91_map_io,
372 .handle_irq = at91_aic_handle_irq,
370 .init_early = ek_init_early, 373 .init_early = ek_init_early,
371 .init_irq = at91_init_irq_default, 374 .init_irq = at91_init_irq_default,
372 .init_machine = ek_board_init, 375 .init_machine = ek_board_init,
@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0")
376 /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ 379 /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */
377 .timer = &at91sam926x_timer, 380 .timer = &at91sam926x_timer,
378 .map_io = at91_map_io, 381 .map_io = at91_map_io,
382 .handle_irq = at91_aic_handle_irq,
379 .init_early = ek_init_early, 383 .init_early = ek_init_early,
380 .init_irq = at91_init_irq_default, 384 .init_irq = at91_init_irq_default,
381 .init_machine = ek_board_init, 385 .init_machine = ek_board_init,
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index d56665ea4b55..516d340549d8 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -44,6 +44,7 @@
44 44
45#include <mach/hardware.h> 45#include <mach/hardware.h>
46#include <mach/board.h> 46#include <mach/board.h>
47#include <mach/at91_aic.h>
47#include <mach/at91rm9200_mc.h> 48#include <mach/at91rm9200_mc.h>
48#include <mach/at91_ramc.h> 49#include <mach/at91_ramc.h>
49#include <mach/cpu.h> 50#include <mach/cpu.h>
@@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200")
590 /* Maintainer: S.Birtles */ 591 /* Maintainer: S.Birtles */
591 .timer = &at91rm9200_timer, 592 .timer = &at91rm9200_timer,
592 .map_io = at91_map_io, 593 .map_io = at91_map_io,
594 .handle_irq = at91_aic_handle_irq,
593 .init_early = yl9200_init_early, 595 .init_early = yl9200_init_early,
594 .init_irq = at91_init_irq_default, 596 .init_irq = at91_init_irq_default,
595 .init_machine = yl9200_board_init, 597 .init_machine = yl9200_board_init,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 0a60bf837037..f49650677653 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]);
29extern void __init at91_aic_init(unsigned int priority[]); 29extern void __init at91_aic_init(unsigned int priority[]);
30extern int __init at91_aic_of_init(struct device_node *node, 30extern int __init at91_aic_of_init(struct device_node *node,
31 struct device_node *parent); 31 struct device_node *parent);
32extern int __init at91_aic5_of_init(struct device_node *node,
33 struct device_node *parent);
32 34
33 35
34 /* Timer */ 36 /* Timer */
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 325837a264c9..be42cf0e74bd 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -26,6 +26,8 @@
26#include <linux/of_irq.h> 26#include <linux/of_irq.h>
27#include <linux/of_gpio.h> 27#include <linux/of_gpio.h>
28 28
29#include <asm/mach/irq.h>
30
29#include <mach/hardware.h> 31#include <mach/hardware.h>
30#include <mach/at91_pio.h> 32#include <mach/at91_pio.h>
31 33
@@ -585,15 +587,14 @@ static struct irq_chip gpio_irqchip = {
585 587
586static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 588static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
587{ 589{
590 struct irq_chip *chip = irq_desc_get_chip(desc);
588 struct irq_data *idata = irq_desc_get_irq_data(desc); 591 struct irq_data *idata = irq_desc_get_irq_data(desc);
589 struct irq_chip *chip = irq_data_get_irq_chip(idata);
590 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); 592 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
591 void __iomem *pio = at91_gpio->regbase; 593 void __iomem *pio = at91_gpio->regbase;
592 unsigned long isr; 594 unsigned long isr;
593 int n; 595 int n;
594 596
595 /* temporarily mask (level sensitive) parent IRQ */ 597 chained_irq_enter(chip, desc);
596 chip->irq_ack(idata);
597 for (;;) { 598 for (;;) {
598 /* Reading ISR acks pending (edge triggered) GPIO interrupts. 599 /* Reading ISR acks pending (edge triggered) GPIO interrupts.
599 * When there none are pending, we're finished unless we need 600 * When there none are pending, we're finished unless we need
@@ -614,7 +615,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
614 n = find_next_bit(&isr, BITS_PER_LONG, n + 1); 615 n = find_next_bit(&isr, BITS_PER_LONG, n + 1);
615 } 616 }
616 } 617 }
617 chip->irq_unmask(idata); 618 chained_irq_exit(chip, desc);
618 /* now it may re-trigger */ 619 /* now it may re-trigger */
619} 620}
620 621
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 3045781c473f..eaea66197fa1 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -23,12 +23,23 @@ extern void __iomem *at91_aic_base;
23 __raw_readl(at91_aic_base + field) 23 __raw_readl(at91_aic_base + field)
24 24
25#define at91_aic_write(field, value) \ 25#define at91_aic_write(field, value) \
26 __raw_writel(value, at91_aic_base + field); 26 __raw_writel(value, at91_aic_base + field)
27#else 27#else
28.extern at91_aic_base 28.extern at91_aic_base
29#endif 29#endif
30 30
31/* Number of irq lines managed by AIC */
32#define NR_AIC_IRQS 32
33#define NR_AIC5_IRQS 128
34
35#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */
36#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */
37
38#define AT91_AIC_IRQ_MIN_PRIORITY 0
39#define AT91_AIC_IRQ_MAX_PRIORITY 7
40
31#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ 41#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */
42#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */
32#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ 43#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
33#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ 44#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
34#define AT91_AIC_SRCTYPE_LOW (0 << 5) 45#define AT91_AIC_SRCTYPE_LOW (0 << 5)
@@ -37,29 +48,52 @@ extern void __iomem *at91_aic_base;
37#define AT91_AIC_SRCTYPE_RISING (3 << 5) 48#define AT91_AIC_SRCTYPE_RISING (3 << 5)
38 49
39#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ 50#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
51#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */
40#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ 52#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */
53#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */
41#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ 54#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */
55#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */
42#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ 56#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */
57#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */
43#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ 58#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
44 59
45#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ 60#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */
61#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */
62#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */
63#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */
64#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */
46#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ 65#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */
66#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */
47#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ 67#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */
68#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */
48#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ 69#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
49#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ 70#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
50 71
51#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ 72#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */
73#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */
52#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ 74#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */
75#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */
53#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ 76#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */
77#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */
54#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ 78#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */
79#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */
55#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ 80#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */
81#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */
56#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ 82#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */
83#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */
57#define AT91_AIC_DCR 0x138 /* Debug Control Register */ 84#define AT91_AIC_DCR 0x138 /* Debug Control Register */
85#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */
58#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ 86#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
59#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ 87#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
60 88
61#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ 89#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */
90#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */
62#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ 91#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */
92#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */
63#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ 93#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */
94#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */
95
96void at91_aic_handle_irq(struct pt_regs *regs);
97void at91_aic5_handle_irq(struct pt_regs *regs);
64 98
65#endif 99#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_spi.h b/arch/arm/mach-at91/include/mach/at91_spi.h
deleted file mode 100644
index 2f6ba0c5636e..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_spi.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_spi.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Serial Peripheral Interface (SPI) registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_SPI_H
17#define AT91_SPI_H
18
19#define AT91_SPI_CR 0x00 /* Control Register */
20#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */
21#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */
22#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */
23#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
24
25#define AT91_SPI_MR 0x04 /* Mode Register */
26#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */
27#define AT91_SPI_PS (1 << 1) /* Peripheral Select */
28#define AT91_SPI_PS_FIXED (0 << 1)
29#define AT91_SPI_PS_VARIABLE (1 << 1)
30#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */
31#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */
32#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */
33#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */
34#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
35#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */
36
37#define AT91_SPI_RDR 0x08 /* Receive Data Register */
38#define AT91_SPI_RD (0xffff << 0) /* Receive Data */
39#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
40
41#define AT91_SPI_TDR 0x0c /* Transmit Data Register */
42#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */
43#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
44#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
45
46#define AT91_SPI_SR 0x10 /* Status Register */
47#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */
48#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */
49#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */
50#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */
51#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */
52#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */
53#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */
54#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */
55#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */
56#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */
57#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */
58
59#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */
60#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */
61#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */
62
63#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */
64#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */
65#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */
66#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */
67#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */
68#define AT91_SPI_BITS_8 (0 << 4)
69#define AT91_SPI_BITS_9 (1 << 4)
70#define AT91_SPI_BITS_10 (2 << 4)
71#define AT91_SPI_BITS_11 (3 << 4)
72#define AT91_SPI_BITS_12 (4 << 4)
73#define AT91_SPI_BITS_13 (5 << 4)
74#define AT91_SPI_BITS_14 (6 << 4)
75#define AT91_SPI_BITS_15 (7 << 4)
76#define AT91_SPI_BITS_16 (8 << 4)
77#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */
78#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */
79#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */
80
81#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_ssc.h b/arch/arm/mach-at91/include/mach/at91_ssc.h
deleted file mode 100644
index a81114c11c74..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_ssc.h
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_ssc.h
3 *
4 * Copyright (C) SAN People
5 *
6 * Serial Synchronous Controller (SSC) registers.
7 * Based on AT91RM9200 datasheet revision E.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef AT91_SSC_H
16#define AT91_SSC_H
17
18#define AT91_SSC_CR 0x00 /* Control Register */
19#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */
20#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */
21#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */
22#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */
23#define AT91_SSC_SWRST (1 << 15) /* Software Reset */
24
25#define AT91_SSC_CMR 0x04 /* Clock Mode Register */
26#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */
27
28#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */
29#define AT91_SSC_CKS (3 << 0) /* Clock Selection */
30#define AT91_SSC_CKS_DIV (0 << 0)
31#define AT91_SSC_CKS_CLOCK (1 << 0)
32#define AT91_SSC_CKS_PIN (2 << 0)
33#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */
34#define AT91_SSC_CKO_NONE (0 << 2)
35#define AT91_SSC_CKO_CONTINUOUS (1 << 2)
36#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */
37#define AT91_SSC_CKI_FALLING (0 << 5)
38#define AT91_SSC_CK_RISING (1 << 5)
39#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */
40#define AT91_SSC_CKG_NONE (0 << 6)
41#define AT91_SSC_CKG_RFLOW (1 << 6)
42#define AT91_SSC_CKG_RFHIGH (2 << 6)
43#define AT91_SSC_START (0xf << 8) /* Start Selection */
44#define AT91_SSC_START_CONTINUOUS (0 << 8)
45#define AT91_SSC_START_TX_RX (1 << 8)
46#define AT91_SSC_START_LOW_RF (2 << 8)
47#define AT91_SSC_START_HIGH_RF (3 << 8)
48#define AT91_SSC_START_FALLING_RF (4 << 8)
49#define AT91_SSC_START_RISING_RF (5 << 8)
50#define AT91_SSC_START_LEVEL_RF (6 << 8)
51#define AT91_SSC_START_EDGE_RF (7 << 8)
52#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */
53#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */
54#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */
55
56#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */
57#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */
58#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */
59#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */
60#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */
61#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */
62#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */
63#define AT91_SSC_FSOS_NONE (0 << 20)
64#define AT91_SSC_FSOS_NEGATIVE (1 << 20)
65#define AT91_SSC_FSOS_POSITIVE (2 << 20)
66#define AT91_SSC_FSOS_LOW (3 << 20)
67#define AT91_SSC_FSOS_HIGH (4 << 20)
68#define AT91_SSC_FSOS_TOGGLE (5 << 20)
69#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */
70#define AT91_SSC_FSEDGE_POSITIVE (0 << 24)
71#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24)
72
73#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */
74#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */
75#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */
76#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */
77
78#define AT91_SSC_RHR 0x20 /* Receive Holding Register */
79#define AT91_SSC_THR 0x24 /* Transmit Holding Register */
80#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */
81#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */
82
83#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */
84#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */
85
86#define AT91_SSC_SR 0x40 /* Status Register */
87#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */
88#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */
89#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */
90#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */
91#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */
92#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */
93#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */
94#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */
95#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */
96#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */
97#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */
98#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */
99#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */
100#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */
101
102#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */
103#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */
104#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */
105
106#endif
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
deleted file mode 100644
index 903bf205a333..000000000000
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/entry-macro.S
3 *
4 * Copyright (C) 2003-2005 SAN People
5 *
6 * Low-level IRQ helper macros for AT91RM9200 platforms
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <mach/hardware.h>
14#include <mach/at91_aic.h>
15
16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
18 ldr \base, [\base]
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
23 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
24 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
25 streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
26 .endm
27
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
deleted file mode 100644
index ac8b7dfc85ef..000000000000
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/irqs.h
3 *
4 * Copyright (C) 2004 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_IRQS_H
22#define __ASM_ARCH_IRQS_H
23
24#include <linux/io.h>
25#include <mach/at91_aic.h>
26
27#define NR_AIC_IRQS 32
28
29
30/*
31 * Acknowledge interrupt with AIC after interrupt has been handled.
32 * (by kernel/irq.c)
33 */
34#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
35
36
37/*
38 * IRQ interrupt symbols are the AT91xxx_ID_* symbols
39 * for IRQs handled directly through the AIC, or else the AT91_PIN_*
40 * symbols in gpio.h for ones handled indirectly as GPIOs.
41 * We make provision for 5 banks of GPIO.
42 */
43#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
44
45/* FIQ is AIC source 0. */
46#define FIQ_START AT91_ID_FIQ
47
48#endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index cfcfcbe36269..c5eaaa060bd8 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -23,6 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/mm.h> 25#include <linux/mm.h>
26#include <linux/bitmap.h>
26#include <linux/types.h> 27#include <linux/types.h>
27#include <linux/irq.h> 28#include <linux/irq.h>
28#include <linux/of.h> 29#include <linux/of.h>
@@ -30,38 +31,219 @@
30#include <linux/of_irq.h> 31#include <linux/of_irq.h>
31#include <linux/irqdomain.h> 32#include <linux/irqdomain.h>
32#include <linux/err.h> 33#include <linux/err.h>
34#include <linux/slab.h>
33 35
34#include <mach/hardware.h> 36#include <mach/hardware.h>
35#include <asm/irq.h> 37#include <asm/irq.h>
36#include <asm/setup.h> 38#include <asm/setup.h>
37 39
40#include <asm/exception.h>
38#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
39#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
40#include <asm/mach/map.h> 43#include <asm/mach/map.h>
41 44
45#include <mach/at91_aic.h>
46
42void __iomem *at91_aic_base; 47void __iomem *at91_aic_base;
43static struct irq_domain *at91_aic_domain; 48static struct irq_domain *at91_aic_domain;
44static struct device_node *at91_aic_np; 49static struct device_node *at91_aic_np;
50static unsigned int n_irqs = NR_AIC_IRQS;
51static unsigned long at91_aic_caps = 0;
52static unsigned int *at91_aic_irq_priorities;
53
54/* AIC5 introduces a Source Select Register */
55#define AT91_AIC_CAP_AIC5 (1 << 0)
56#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5)
57
58#ifdef CONFIG_PM
59
60static unsigned long *wakeups;
61static unsigned long *backups;
62
63#define set_backup(bit) set_bit(bit, backups)
64#define clear_backup(bit) clear_bit(bit, backups)
65
66static int at91_aic_pm_init(void)
67{
68 backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
69 if (!backups)
70 return -ENOMEM;
71
72 wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL);
73 if (!wakeups) {
74 kfree(backups);
75 return -ENOMEM;
76 }
77
78 return 0;
79}
80
81static int at91_aic_set_wake(struct irq_data *d, unsigned value)
82{
83 if (unlikely(d->hwirq >= n_irqs))
84 return -EINVAL;
85
86 if (value)
87 set_bit(d->hwirq, wakeups);
88 else
89 clear_bit(d->hwirq, wakeups);
90
91 return 0;
92}
93
94void at91_irq_suspend(void)
95{
96 int i = 0, bit;
97
98 if (has_aic5()) {
99 /* disable enabled irqs */
100 while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
101 at91_aic_write(AT91_AIC5_SSR,
102 bit & AT91_AIC5_INTSEL_MSK);
103 at91_aic_write(AT91_AIC5_IDCR, 1);
104 i = bit;
105 }
106 /* enable wakeup irqs */
107 i = 0;
108 while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
109 at91_aic_write(AT91_AIC5_SSR,
110 bit & AT91_AIC5_INTSEL_MSK);
111 at91_aic_write(AT91_AIC5_IECR, 1);
112 i = bit;
113 }
114 } else {
115 at91_aic_write(AT91_AIC_IDCR, *backups);
116 at91_aic_write(AT91_AIC_IECR, *wakeups);
117 }
118}
119
120void at91_irq_resume(void)
121{
122 int i = 0, bit;
123
124 if (has_aic5()) {
125 /* disable wakeup irqs */
126 while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
127 at91_aic_write(AT91_AIC5_SSR,
128 bit & AT91_AIC5_INTSEL_MSK);
129 at91_aic_write(AT91_AIC5_IDCR, 1);
130 i = bit;
131 }
132 /* enable irqs disabled for suspend */
133 i = 0;
134 while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
135 at91_aic_write(AT91_AIC5_SSR,
136 bit & AT91_AIC5_INTSEL_MSK);
137 at91_aic_write(AT91_AIC5_IECR, 1);
138 i = bit;
139 }
140 } else {
141 at91_aic_write(AT91_AIC_IDCR, *wakeups);
142 at91_aic_write(AT91_AIC_IECR, *backups);
143 }
144}
145
146#else
147static inline int at91_aic_pm_init(void)
148{
149 return 0;
150}
151
152#define set_backup(bit)
153#define clear_backup(bit)
154#define at91_aic_set_wake NULL
155
156#endif /* CONFIG_PM */
157
158asmlinkage void __exception_irq_entry
159at91_aic_handle_irq(struct pt_regs *regs)
160{
161 u32 irqnr;
162 u32 irqstat;
163
164 irqnr = at91_aic_read(AT91_AIC_IVR);
165 irqstat = at91_aic_read(AT91_AIC_ISR);
166
167 /*
168 * ISR value is 0 when there is no current interrupt or when there is
169 * a spurious interrupt
170 */
171 if (!irqstat)
172 at91_aic_write(AT91_AIC_EOICR, 0);
173 else
174 handle_IRQ(irqnr, regs);
175}
176
177asmlinkage void __exception_irq_entry
178at91_aic5_handle_irq(struct pt_regs *regs)
179{
180 u32 irqnr;
181 u32 irqstat;
182
183 irqnr = at91_aic_read(AT91_AIC5_IVR);
184 irqstat = at91_aic_read(AT91_AIC5_ISR);
185
186 if (!irqstat)
187 at91_aic_write(AT91_AIC5_EOICR, 0);
188 else
189 handle_IRQ(irqnr, regs);
190}
45 191
46static void at91_aic_mask_irq(struct irq_data *d) 192static void at91_aic_mask_irq(struct irq_data *d)
47{ 193{
48 /* Disable interrupt on AIC */ 194 /* Disable interrupt on AIC */
49 at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); 195 at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq);
196 /* Update ISR cache */
197 clear_backup(d->hwirq);
198}
199
200static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
201{
202 /* Disable interrupt on AIC5 */
203 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
204 at91_aic_write(AT91_AIC5_IDCR, 1);
205 /* Update ISR cache */
206 clear_backup(d->hwirq);
50} 207}
51 208
52static void at91_aic_unmask_irq(struct irq_data *d) 209static void at91_aic_unmask_irq(struct irq_data *d)
53{ 210{
54 /* Enable interrupt on AIC */ 211 /* Enable interrupt on AIC */
55 at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); 212 at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq);
213 /* Update ISR cache */
214 set_backup(d->hwirq);
215}
216
217static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
218{
219 /* Enable interrupt on AIC5 */
220 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
221 at91_aic_write(AT91_AIC5_IECR, 1);
222 /* Update ISR cache */
223 set_backup(d->hwirq);
56} 224}
57 225
58unsigned int at91_extern_irq; 226static void at91_aic_eoi(struct irq_data *d)
227{
228 /*
229 * Mark end-of-interrupt on AIC, the controller doesn't care about
230 * the value written. Moreover it's a write-only register.
231 */
232 at91_aic_write(AT91_AIC_EOICR, 0);
233}
234
235static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
236{
237 at91_aic_write(AT91_AIC5_EOICR, 0);
238}
59 239
60#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) 240unsigned long *at91_extern_irq;
61 241
62static int at91_aic_set_type(struct irq_data *d, unsigned type) 242#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq)
243
244static int at91_aic_compute_srctype(struct irq_data *d, unsigned type)
63{ 245{
64 unsigned int smr, srctype; 246 int srctype;
65 247
66 switch (type) { 248 switch (type) {
67 case IRQ_TYPE_LEVEL_HIGH: 249 case IRQ_TYPE_LEVEL_HIGH:
@@ -74,65 +256,51 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
74 if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ 256 if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */
75 srctype = AT91_AIC_SRCTYPE_LOW; 257 srctype = AT91_AIC_SRCTYPE_LOW;
76 else 258 else
77 return -EINVAL; 259 srctype = -EINVAL;
78 break; 260 break;
79 case IRQ_TYPE_EDGE_FALLING: 261 case IRQ_TYPE_EDGE_FALLING:
80 if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ 262 if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */
81 srctype = AT91_AIC_SRCTYPE_FALLING; 263 srctype = AT91_AIC_SRCTYPE_FALLING;
82 else 264 else
83 return -EINVAL; 265 srctype = -EINVAL;
84 break; 266 break;
85 default: 267 default:
86 return -EINVAL; 268 srctype = -EINVAL;
87 } 269 }
88 270
89 smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; 271 return srctype;
90 at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
91 return 0;
92} 272}
93 273
94#ifdef CONFIG_PM 274static int at91_aic_set_type(struct irq_data *d, unsigned type)
95
96static u32 wakeups;
97static u32 backups;
98
99static int at91_aic_set_wake(struct irq_data *d, unsigned value)
100{ 275{
101 if (unlikely(d->hwirq >= NR_AIC_IRQS)) 276 unsigned int smr;
102 return -EINVAL; 277 int srctype;
103 278
104 if (value) 279 srctype = at91_aic_compute_srctype(d, type);
105 wakeups |= (1 << d->hwirq); 280 if (srctype < 0)
106 else 281 return srctype;
107 wakeups &= ~(1 << d->hwirq); 282
283 if (has_aic5()) {
284 at91_aic_write(AT91_AIC5_SSR,
285 d->hwirq & AT91_AIC5_INTSEL_MSK);
286 smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE;
287 at91_aic_write(AT91_AIC5_SMR, smr | srctype);
288 } else {
289 smr = at91_aic_read(AT91_AIC_SMR(d->hwirq))
290 & ~AT91_AIC_SRCTYPE;
291 at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
292 }
108 293
109 return 0; 294 return 0;
110} 295}
111 296
112void at91_irq_suspend(void)
113{
114 backups = at91_aic_read(AT91_AIC_IMR);
115 at91_aic_write(AT91_AIC_IDCR, backups);
116 at91_aic_write(AT91_AIC_IECR, wakeups);
117}
118
119void at91_irq_resume(void)
120{
121 at91_aic_write(AT91_AIC_IDCR, wakeups);
122 at91_aic_write(AT91_AIC_IECR, backups);
123}
124
125#else
126#define at91_aic_set_wake NULL
127#endif
128
129static struct irq_chip at91_aic_chip = { 297static struct irq_chip at91_aic_chip = {
130 .name = "AIC", 298 .name = "AIC",
131 .irq_ack = at91_aic_mask_irq,
132 .irq_mask = at91_aic_mask_irq, 299 .irq_mask = at91_aic_mask_irq,
133 .irq_unmask = at91_aic_unmask_irq, 300 .irq_unmask = at91_aic_unmask_irq,
134 .irq_set_type = at91_aic_set_type, 301 .irq_set_type = at91_aic_set_type,
135 .irq_set_wake = at91_aic_set_wake, 302 .irq_set_wake = at91_aic_set_wake,
303 .irq_eoi = at91_aic_eoi,
136}; 304};
137 305
138static void __init at91_aic_hw_init(unsigned int spu_vector) 306static void __init at91_aic_hw_init(unsigned int spu_vector)
@@ -161,6 +329,35 @@ static void __init at91_aic_hw_init(unsigned int spu_vector)
161 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); 329 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
162} 330}
163 331
332static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector)
333{
334 int i;
335
336 /*
337 * Perform 8 End Of Interrupt Command to make sure AIC
338 * will not Lock out nIRQ
339 */
340 for (i = 0; i < 8; i++)
341 at91_aic_write(AT91_AIC5_EOICR, 0);
342
343 /*
344 * Spurious Interrupt ID in Spurious Vector Register.
345 * When there is no current interrupt, the IRQ Vector Register
346 * reads the value stored in AIC_SPU
347 */
348 at91_aic_write(AT91_AIC5_SPU, spu_vector);
349
350 /* No debugging in AIC: Debug (Protect) Control Register */
351 at91_aic_write(AT91_AIC5_DCR, 0);
352
353 /* Disable and clear all interrupts initially */
354 for (i = 0; i < n_irqs; i++) {
355 at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK);
356 at91_aic_write(AT91_AIC5_IDCR, 1);
357 at91_aic_write(AT91_AIC5_ICCR, 1);
358 }
359}
360
164#if defined(CONFIG_OF) 361#if defined(CONFIG_OF)
165static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, 362static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
166 irq_hw_number_t hw) 363 irq_hw_number_t hw)
@@ -168,34 +365,134 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
168 /* Put virq number in Source Vector Register */ 365 /* Put virq number in Source Vector Register */
169 at91_aic_write(AT91_AIC_SVR(hw), virq); 366 at91_aic_write(AT91_AIC_SVR(hw), virq);
170 367
171 /* Active Low interrupt, without priority */ 368 /* Active Low interrupt, with priority */
172 at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); 369 at91_aic_write(AT91_AIC_SMR(hw),
370 AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
371
372 irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
373 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
374
375 return 0;
376}
377
378static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq,
379 irq_hw_number_t hw)
380{
381 at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK);
382
383 /* Put virq number in Source Vector Register */
384 at91_aic_write(AT91_AIC5_SVR, virq);
173 385
174 irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); 386 /* Active Low interrupt, with priority */
387 at91_aic_write(AT91_AIC5_SMR,
388 AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
389
390 irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
175 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); 391 set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
176 392
177 return 0; 393 return 0;
178} 394}
179 395
396static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
397 const u32 *intspec, unsigned int intsize,
398 irq_hw_number_t *out_hwirq, unsigned int *out_type)
399{
400 if (WARN_ON(intsize < 3))
401 return -EINVAL;
402 if (WARN_ON(intspec[0] >= n_irqs))
403 return -EINVAL;
404 if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY)
405 || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
406 return -EINVAL;
407
408 *out_hwirq = intspec[0];
409 *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
410 at91_aic_irq_priorities[*out_hwirq] = intspec[2];
411
412 return 0;
413}
414
180static struct irq_domain_ops at91_aic_irq_ops = { 415static struct irq_domain_ops at91_aic_irq_ops = {
181 .map = at91_aic_irq_map, 416 .map = at91_aic_irq_map,
182 .xlate = irq_domain_xlate_twocell, 417 .xlate = at91_aic_irq_domain_xlate,
183}; 418};
184 419
185int __init at91_aic_of_init(struct device_node *node, 420int __init at91_aic_of_common_init(struct device_node *node,
186 struct device_node *parent) 421 struct device_node *parent)
187{ 422{
423 struct property *prop;
424 const __be32 *p;
425 u32 val;
426
427 at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
428 * sizeof(*at91_extern_irq), GFP_KERNEL);
429 if (!at91_extern_irq)
430 return -ENOMEM;
431
432 if (at91_aic_pm_init()) {
433 kfree(at91_extern_irq);
434 return -ENOMEM;
435 }
436
437 at91_aic_irq_priorities = kzalloc(n_irqs
438 * sizeof(*at91_aic_irq_priorities),
439 GFP_KERNEL);
440 if (!at91_aic_irq_priorities)
441 return -ENOMEM;
442
188 at91_aic_base = of_iomap(node, 0); 443 at91_aic_base = of_iomap(node, 0);
189 at91_aic_np = node; 444 at91_aic_np = node;
190 445
191 at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, 446 at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs,
192 &at91_aic_irq_ops, NULL); 447 &at91_aic_irq_ops, NULL);
193 if (!at91_aic_domain) 448 if (!at91_aic_domain)
194 panic("Unable to add AIC irq domain (DT)\n"); 449 panic("Unable to add AIC irq domain (DT)\n");
195 450
451 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
452 if (val >= n_irqs)
453 pr_warn("AIC: external irq %d >= %d skip it\n",
454 val, n_irqs);
455 else
456 set_bit(val, at91_extern_irq);
457 }
458
196 irq_set_default_host(at91_aic_domain); 459 irq_set_default_host(at91_aic_domain);
197 460
198 at91_aic_hw_init(NR_AIC_IRQS); 461 return 0;
462}
463
464int __init at91_aic_of_init(struct device_node *node,
465 struct device_node *parent)
466{
467 int err;
468
469 err = at91_aic_of_common_init(node, parent);
470 if (err)
471 return err;
472
473 at91_aic_hw_init(n_irqs);
474
475 return 0;
476}
477
478int __init at91_aic5_of_init(struct device_node *node,
479 struct device_node *parent)
480{
481 int err;
482
483 at91_aic_caps |= AT91_AIC_CAP_AIC5;
484 n_irqs = NR_AIC5_IRQS;
485 at91_aic_chip.irq_ack = at91_aic5_mask_irq;
486 at91_aic_chip.irq_mask = at91_aic5_mask_irq;
487 at91_aic_chip.irq_unmask = at91_aic5_unmask_irq;
488 at91_aic_chip.irq_eoi = at91_aic5_eoi;
489 at91_aic_irq_ops.map = at91_aic5_irq_map;
490
491 err = at91_aic_of_common_init(node, parent);
492 if (err)
493 return err;
494
495 at91_aic5_hw_init(n_irqs);
199 496
200 return 0; 497 return 0;
201} 498}
@@ -204,22 +501,25 @@ int __init at91_aic_of_init(struct device_node *node,
204/* 501/*
205 * Initialize the AIC interrupt controller. 502 * Initialize the AIC interrupt controller.
206 */ 503 */
207void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) 504void __init at91_aic_init(unsigned int *priority)
208{ 505{
209 unsigned int i; 506 unsigned int i;
210 int irq_base; 507 int irq_base;
211 508
509 if (at91_aic_pm_init())
510 panic("Unable to allocate bit maps\n");
511
212 at91_aic_base = ioremap(AT91_AIC, 512); 512 at91_aic_base = ioremap(AT91_AIC, 512);
213 if (!at91_aic_base) 513 if (!at91_aic_base)
214 panic("Unable to ioremap AIC registers\n"); 514 panic("Unable to ioremap AIC registers\n");
215 515
216 /* Add irq domain for AIC */ 516 /* Add irq domain for AIC */
217 irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); 517 irq_base = irq_alloc_descs(-1, 0, n_irqs, 0);
218 if (irq_base < 0) { 518 if (irq_base < 0) {
219 WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); 519 WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n");
220 irq_base = 0; 520 irq_base = 0;
221 } 521 }
222 at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, 522 at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs,
223 irq_base, 0, 523 irq_base, 0,
224 &irq_domain_simple_ops, NULL); 524 &irq_domain_simple_ops, NULL);
225 525
@@ -232,15 +532,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
232 * The IVR is used by macro get_irqnr_and_base to read and verify. 532 * The IVR is used by macro get_irqnr_and_base to read and verify.
233 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. 533 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
234 */ 534 */
235 for (i = 0; i < NR_AIC_IRQS; i++) { 535 for (i = 0; i < n_irqs; i++) {
236 /* Put hardware irq number in Source Vector Register: */ 536 /* Put hardware irq number in Source Vector Register: */
237 at91_aic_write(AT91_AIC_SVR(i), i); 537 at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i);
238 /* Active Low interrupt, with the specified priority */ 538 /* Active Low interrupt, with the specified priority */
239 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 539 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
240 540 irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);
241 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
242 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 541 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
243 } 542 }
244 543
245 at91_aic_hw_init(NR_AIC_IRQS); 544 at91_aic_hw_init(n_irqs);
246} 545}
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 1bfaad628731..2c2d86505a54 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -25,6 +25,7 @@
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
27 27
28#include <mach/at91_aic.h>
28#include <mach/at91_pmc.h> 29#include <mach/at91_pmc.h>
29#include <mach/cpu.h> 30#include <mach/cpu.h>
30 31
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 08:31:37 -0500