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authorLinus Torvalds <torvalds@linux-foundation.org>2009-07-06 17:07:00 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-07-06 17:07:00 -0400
commitdc53fffc105f68cb08ca872acd51550e89aa2e67 (patch)
tree5e2ff1ea44eb76e80f8b0bb4902d4292608d1fd1
parentf560902c2d39c255bd67c0211f5dd80edb97a712 (diff)
parent46b952a3c3a94afa339bd4961a4f3d1482436599 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: Fix IRQ swizzling for ARI-enabled devices ia64/PCI: adjust section annotation for pcibios_setup() x86/PCI: get root CRS before scanning children x86/PCI: fix boundary checking when using root CRS PCI MSI: Fix restoration of MSI/MSI-X mask states in suspend/resume PCI MSI: Unmask MSI if setup failed PCI MSI: shorten PCI_MSIX_ENTRY_* symbol names PCI: make pci_name() take const argument PCI: More PATA quirks for not entering D3 PCI: fix kernel-doc warnings PCI: check if bus has a proper bridge device before triggering SBR PCI: remove pci_dac_dma_... APIs on mn10300 PCI ECRC: Remove unnecessary semicolons PCI MSI: Return if alloc_msi_entry for MSI-X failed
-rw-r--r--arch/ia64/pci/pci.c2
-rw-r--r--arch/mn10300/include/asm/pci.h4
-rw-r--r--arch/x86/pci/acpi.c59
-rw-r--r--arch/x86/pci/amd_bus.c8
-rw-r--r--drivers/pci/hotplug/pci_hotplug_core.c2
-rw-r--r--drivers/pci/msi.c64
-rw-r--r--drivers/pci/msi.h10
-rw-r--r--drivers/pci/pci.c15
-rw-r--r--drivers/pci/pcie/aer/ecrc.c2
-rw-r--r--drivers/pci/quirks.c5
-rw-r--r--drivers/pci/slot.c4
-rw-r--r--include/linux/pci.h2
12 files changed, 104 insertions, 73 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 729298f4b234..7de76dd352fe 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -537,7 +537,7 @@ pcibios_align_resource (void *data, struct resource *res,
537/* 537/*
538 * PCI BIOS setup, always defaults to SAL interface 538 * PCI BIOS setup, always defaults to SAL interface
539 */ 539 */
540char * __devinit 540char * __init
541pcibios_setup (char *str) 541pcibios_setup (char *str)
542{ 542{
543 return str; 543 return str;
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index e58b9a46e1b1..35d2ed6396f6 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -70,10 +70,6 @@ struct pci_dev;
70 */ 70 */
71#define PCI_DMA_BUS_IS_PHYS (1) 71#define PCI_DMA_BUS_IS_PHYS (1)
72 72
73
74/* This is always fine. */
75#define pci_dac_dma_supported(pci_dev, mask) (0)
76
77/* Return the index of the PCI controller for device. */ 73/* Return the index of the PCI controller for device. */
78static inline int pci_controller_num(struct pci_dev *dev) 74static inline int pci_controller_num(struct pci_dev *dev)
79{ 75{
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index b26626dc517c..1014eb4bfc37 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -68,6 +68,10 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
68 unsigned long flags; 68 unsigned long flags;
69 struct resource *root; 69 struct resource *root;
70 int max_root_bus_resources = PCI_BUS_NUM_RESOURCES; 70 int max_root_bus_resources = PCI_BUS_NUM_RESOURCES;
71 u64 start, end;
72
73 if (bus_has_transparent_bridge(info->bus))
74 max_root_bus_resources -= 3;
71 75
72 status = resource_to_addr(acpi_res, &addr); 76 status = resource_to_addr(acpi_res, &addr);
73 if (!ACPI_SUCCESS(status)) 77 if (!ACPI_SUCCESS(status))
@@ -84,25 +88,24 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
84 } else 88 } else
85 return AE_OK; 89 return AE_OK;
86 90
87 res = &info->res[info->res_num]; 91 start = addr.minimum + addr.translation_offset;
88 res->name = info->name; 92 end = start + addr.address_length - 1;
89 res->flags = flags;
90 res->start = addr.minimum + addr.translation_offset;
91 res->end = res->start + addr.address_length - 1;
92 res->child = NULL;
93
94 if (bus_has_transparent_bridge(info->bus))
95 max_root_bus_resources -= 3;
96 if (info->res_num >= max_root_bus_resources) { 93 if (info->res_num >= max_root_bus_resources) {
97 printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx " 94 printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx "
98 "from %s for %s due to _CRS returning more than " 95 "from %s for %s due to _CRS returning more than "
99 "%d resource descriptors\n", (unsigned long) res->start, 96 "%d resource descriptors\n", (unsigned long) start,
100 (unsigned long) res->end, root->name, info->name, 97 (unsigned long) end, root->name, info->name,
101 max_root_bus_resources); 98 max_root_bus_resources);
102 info->res_num++;
103 return AE_OK; 99 return AE_OK;
104 } 100 }
105 101
102 res = &info->res[info->res_num];
103 res->name = info->name;
104 res->flags = flags;
105 res->start = start;
106 res->end = end;
107 res->child = NULL;
108
106 if (insert_resource(root, res)) { 109 if (insert_resource(root, res)) {
107 printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " 110 printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx "
108 "from %s for %s\n", (unsigned long) res->start, 111 "from %s for %s\n", (unsigned long) res->start,
@@ -115,23 +118,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
115} 118}
116 119
117static void 120static void
118adjust_transparent_bridge_resources(struct pci_bus *bus)
119{
120 struct pci_dev *dev;
121
122 list_for_each_entry(dev, &bus->devices, bus_list) {
123 int i;
124 u16 class = dev->class >> 8;
125
126 if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) {
127 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
128 dev->subordinate->resource[i] =
129 dev->bus->resource[i - 3];
130 }
131 }
132}
133
134static void
135get_current_resources(struct acpi_device *device, int busnum, 121get_current_resources(struct acpi_device *device, int busnum,
136 int domain, struct pci_bus *bus) 122 int domain, struct pci_bus *bus)
137{ 123{
@@ -158,8 +144,6 @@ get_current_resources(struct acpi_device *device, int busnum,
158 info.res_num = 0; 144 info.res_num = 0;
159 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, 145 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
160 &info); 146 &info);
161 if (info.res_num)
162 adjust_transparent_bridge_resources(bus);
163 147
164 return; 148 return;
165 149
@@ -222,8 +206,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
222 */ 206 */
223 memcpy(bus->sysdata, sd, sizeof(*sd)); 207 memcpy(bus->sysdata, sd, sizeof(*sd));
224 kfree(sd); 208 kfree(sd);
225 } else 209 } else {
226 bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); 210 bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
211 if (bus) {
212 if (pci_probe & PCI_USE__CRS)
213 get_current_resources(device, busnum, domain,
214 bus);
215 bus->subordinate = pci_scan_child_bus(bus);
216 }
217 }
227 218
228 if (!bus) 219 if (!bus)
229 kfree(sd); 220 kfree(sd);
@@ -238,8 +229,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
238#endif 229#endif
239 } 230 }
240 231
241 if (bus && (pci_probe & PCI_USE__CRS))
242 get_current_resources(device, busnum, domain, bus);
243 return bus; 232 return bus;
244} 233}
245 234
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index f893d6a6e803..3ffa10df20b9 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -100,8 +100,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
100 int j; 100 int j;
101 struct pci_root_info *info; 101 struct pci_root_info *info;
102 102
103 /* don't go for it if _CRS is used */ 103 /* don't go for it if _CRS is used already */
104 if (pci_probe & PCI_USE__CRS) 104 if (b->resource[0] != &ioport_resource ||
105 b->resource[1] != &iomem_resource)
105 return; 106 return;
106 107
107 /* if only one root bus, don't need to anything */ 108 /* if only one root bus, don't need to anything */
@@ -116,6 +117,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
116 if (i == pci_root_num) 117 if (i == pci_root_num)
117 return; 118 return;
118 119
120 printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
121 b->number);
122
119 info = &pci_root_info[i]; 123 info = &pci_root_info[i];
120 for (j = 0; j < info->res_num; j++) { 124 for (j = 0; j < info->res_num; j++) {
121 struct resource *res; 125 struct resource *res;
diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
index 844580489d4d..5c5043f239cf 100644
--- a/drivers/pci/hotplug/pci_hotplug_core.c
+++ b/drivers/pci/hotplug/pci_hotplug_core.c
@@ -555,6 +555,8 @@ static struct hotplug_slot *get_slot_from_name (const char *name)
555 * @slot: pointer to the &struct hotplug_slot to register 555 * @slot: pointer to the &struct hotplug_slot to register
556 * @devnr: device number 556 * @devnr: device number
557 * @name: name registered with kobject core 557 * @name: name registered with kobject core
558 * @owner: caller module owner
559 * @mod_name: caller module name
558 * 560 *
559 * Registers a hotplug slot with the pci hotplug subsystem, which will allow 561 * Registers a hotplug slot with the pci hotplug subsystem, which will allow
560 * userspace interaction to the slot. 562 * userspace interaction to the slot.
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index d9f06fbfa0bf..d986afb7032b 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -127,17 +127,23 @@ static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
127 * reliably as devices without an INTx disable bit will then generate a 127 * reliably as devices without an INTx disable bit will then generate a
128 * level IRQ which will never be cleared. 128 * level IRQ which will never be cleared.
129 */ 129 */
130static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 130static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
131{ 131{
132 u32 mask_bits = desc->masked; 132 u32 mask_bits = desc->masked;
133 133
134 if (!desc->msi_attrib.maskbit) 134 if (!desc->msi_attrib.maskbit)
135 return; 135 return 0;
136 136
137 mask_bits &= ~mask; 137 mask_bits &= ~mask;
138 mask_bits |= flag; 138 mask_bits |= flag;
139 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); 139 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
140 desc->masked = mask_bits; 140
141 return mask_bits;
142}
143
144static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
145{
146 desc->masked = __msi_mask_irq(desc, mask, flag);
141} 147}
142 148
143/* 149/*
@@ -147,15 +153,21 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
147 * file. This saves a few milliseconds when initialising devices with lots 153 * file. This saves a few milliseconds when initialising devices with lots
148 * of MSI-X interrupts. 154 * of MSI-X interrupts.
149 */ 155 */
150static void msix_mask_irq(struct msi_desc *desc, u32 flag) 156static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
151{ 157{
152 u32 mask_bits = desc->masked; 158 u32 mask_bits = desc->masked;
153 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + 159 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
154 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; 160 PCI_MSIX_ENTRY_VECTOR_CTRL;
155 mask_bits &= ~1; 161 mask_bits &= ~1;
156 mask_bits |= flag; 162 mask_bits |= flag;
157 writel(mask_bits, desc->mask_base + offset); 163 writel(mask_bits, desc->mask_base + offset);
158 desc->masked = mask_bits; 164
165 return mask_bits;
166}
167
168static void msix_mask_irq(struct msi_desc *desc, u32 flag)
169{
170 desc->masked = __msix_mask_irq(desc, flag);
159} 171}
160 172
161static void msi_set_mask_bit(unsigned irq, u32 flag) 173static void msi_set_mask_bit(unsigned irq, u32 flag)
@@ -188,9 +200,9 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
188 void __iomem *base = entry->mask_base + 200 void __iomem *base = entry->mask_base +
189 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 201 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
190 202
191 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); 203 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
192 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); 204 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
193 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET); 205 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
194 } else { 206 } else {
195 struct pci_dev *dev = entry->dev; 207 struct pci_dev *dev = entry->dev;
196 int pos = entry->msi_attrib.pos; 208 int pos = entry->msi_attrib.pos;
@@ -225,11 +237,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
225 base = entry->mask_base + 237 base = entry->mask_base +
226 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 238 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
227 239
228 writel(msg->address_lo, 240 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
229 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); 241 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
230 writel(msg->address_hi, 242 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
231 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
232 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
233 } else { 243 } else {
234 struct pci_dev *dev = entry->dev; 244 struct pci_dev *dev = entry->dev;
235 int pos = entry->msi_attrib.pos; 245 int pos = entry->msi_attrib.pos;
@@ -385,6 +395,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
385 /* Configure MSI capability structure */ 395 /* Configure MSI capability structure */
386 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); 396 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
387 if (ret) { 397 if (ret) {
398 msi_mask_irq(entry, mask, ~mask);
388 msi_free_irqs(dev); 399 msi_free_irqs(dev);
389 return ret; 400 return ret;
390 } 401 }
@@ -439,8 +450,14 @@ static int msix_capability_init(struct pci_dev *dev,
439 450
440 for (i = 0; i < nvec; i++) { 451 for (i = 0; i < nvec; i++) {
441 entry = alloc_msi_entry(dev); 452 entry = alloc_msi_entry(dev);
442 if (!entry) 453 if (!entry) {
443 break; 454 if (!i)
455 iounmap(base);
456 else
457 msi_free_irqs(dev);
458 /* No enough memory. Don't try again */
459 return -ENOMEM;
460 }
444 461
445 j = entries[i].entry; 462 j = entries[i].entry;
446 entry->msi_attrib.is_msix = 1; 463 entry->msi_attrib.is_msix = 1;
@@ -487,7 +504,7 @@ static int msix_capability_init(struct pci_dev *dev,
487 set_irq_msi(entry->irq, entry); 504 set_irq_msi(entry->irq, entry);
488 j = entries[i].entry; 505 j = entries[i].entry;
489 entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE + 506 entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE +
490 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); 507 PCI_MSIX_ENTRY_VECTOR_CTRL);
491 msix_mask_irq(entry, 1); 508 msix_mask_irq(entry, 1);
492 i++; 509 i++;
493 } 510 }
@@ -611,9 +628,11 @@ void pci_msi_shutdown(struct pci_dev *dev)
611 pci_intx_for_msi(dev, 1); 628 pci_intx_for_msi(dev, 1);
612 dev->msi_enabled = 0; 629 dev->msi_enabled = 0;
613 630
631 /* Return the device with MSI unmasked as initial states */
614 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl); 632 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl);
615 mask = msi_capable_mask(ctrl); 633 mask = msi_capable_mask(ctrl);
616 msi_mask_irq(desc, mask, ~mask); 634 /* Keep cached state to be restored */
635 __msi_mask_irq(desc, mask, ~mask);
617 636
618 /* Restore dev->irq to its default pin-assertion irq */ 637 /* Restore dev->irq to its default pin-assertion irq */
619 dev->irq = desc->msi_attrib.default_irq; 638 dev->irq = desc->msi_attrib.default_irq;
@@ -653,7 +672,6 @@ static int msi_free_irqs(struct pci_dev* dev)
653 672
654 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { 673 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
655 if (entry->msi_attrib.is_msix) { 674 if (entry->msi_attrib.is_msix) {
656 msix_mask_irq(entry, 1);
657 if (list_is_last(&entry->list, &dev->msi_list)) 675 if (list_is_last(&entry->list, &dev->msi_list))
658 iounmap(entry->mask_base); 676 iounmap(entry->mask_base);
659 } 677 }
@@ -741,9 +759,17 @@ static void msix_free_all_irqs(struct pci_dev *dev)
741 759
742void pci_msix_shutdown(struct pci_dev* dev) 760void pci_msix_shutdown(struct pci_dev* dev)
743{ 761{
762 struct msi_desc *entry;
763
744 if (!pci_msi_enable || !dev || !dev->msix_enabled) 764 if (!pci_msi_enable || !dev || !dev->msix_enabled)
745 return; 765 return;
746 766
767 /* Return the device with MSI-X masked as initial states */
768 list_for_each_entry(entry, &dev->msi_list, list) {
769 /* Keep cached states to be restored */
770 __msix_mask_irq(entry, 1);
771 }
772
747 msix_set_enable(dev, 0); 773 msix_set_enable(dev, 0);
748 pci_intx_for_msi(dev, 1); 774 pci_intx_for_msi(dev, 1);
749 dev->msix_enabled = 0; 775 dev->msix_enabled = 0;
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index a0662842550b..de27c1cb5a2b 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,11 +6,11 @@
6#ifndef MSI_H 6#ifndef MSI_H
7#define MSI_H 7#define MSI_H
8 8
9#define PCI_MSIX_ENTRY_SIZE 16 9#define PCI_MSIX_ENTRY_SIZE 16
10#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0 10#define PCI_MSIX_ENTRY_LOWER_ADDR 0
11#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4 11#define PCI_MSIX_ENTRY_UPPER_ADDR 4
12#define PCI_MSIX_ENTRY_DATA_OFFSET 8 12#define PCI_MSIX_ENTRY_DATA 8
13#define PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET 12 13#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
14 14
15#define msi_control_reg(base) (base + PCI_MSI_FLAGS) 15#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
16#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) 16#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6c93af5ced18..dbd0f947f497 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1517,11 +1517,20 @@ void pci_enable_ari(struct pci_dev *dev)
1517 * 1517 *
1518 * Perform INTx swizzling for a device behind one level of bridge. This is 1518 * Perform INTx swizzling for a device behind one level of bridge. This is
1519 * required by section 9.1 of the PCI-to-PCI bridge specification for devices 1519 * required by section 9.1 of the PCI-to-PCI bridge specification for devices
1520 * behind bridges on add-in cards. 1520 * behind bridges on add-in cards. For devices with ARI enabled, the slot
1521 * number is always 0 (see the Implementation Note in section 2.2.8.1 of
1522 * the PCI Express Base Specification, Revision 2.1)
1521 */ 1523 */
1522u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin) 1524u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin)
1523{ 1525{
1524 return (((pin - 1) + PCI_SLOT(dev->devfn)) % 4) + 1; 1526 int slot;
1527
1528 if (pci_ari_enabled(dev->bus))
1529 slot = 0;
1530 else
1531 slot = PCI_SLOT(dev->devfn);
1532
1533 return (((pin - 1) + slot) % 4) + 1;
1525} 1534}
1526 1535
1527int 1536int
@@ -2171,7 +2180,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
2171 u16 ctrl; 2180 u16 ctrl;
2172 struct pci_dev *pdev; 2181 struct pci_dev *pdev;
2173 2182
2174 if (dev->subordinate) 2183 if (pci_is_root_bus(dev->bus) || dev->subordinate || !dev->bus->self)
2175 return -ENOTTY; 2184 return -ENOTTY;
2176 2185
2177 list_for_each_entry(pdev, &dev->bus->devices, bus_list) 2186 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
diff --git a/drivers/pci/pcie/aer/ecrc.c b/drivers/pci/pcie/aer/ecrc.c
index ece97df4df6d..a928d8ab6bda 100644
--- a/drivers/pci/pcie/aer/ecrc.c
+++ b/drivers/pci/pcie/aer/ecrc.c
@@ -106,7 +106,7 @@ void pcie_set_ecrc_checking(struct pci_dev *dev)
106 disable_ecrc_checking(dev); 106 disable_ecrc_checking(dev);
107 break; 107 break;
108 case ECRC_POLICY_ON: 108 case ECRC_POLICY_ON:
109 enable_ecrc_checking(dev);; 109 enable_ecrc_checking(dev);
110 break; 110 break;
111 default: 111 default:
112 return; 112 return;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 56552d74abea..06b965623962 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1058,6 +1058,11 @@ static void __devinit quirk_no_ata_d3(struct pci_dev *pdev)
1058} 1058}
1059DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID, quirk_no_ata_d3); 1059DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID, quirk_no_ata_d3);
1060DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID, quirk_no_ata_d3); 1060DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID, quirk_no_ata_d3);
1061/* ALi loses some register settings that we cannot then restore */
1062DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID, quirk_no_ata_d3);
1063/* VIA comes back fine but we need to keep it alive or ACPI GTM failures
1064 occur when mode detecting */
1065DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_no_ata_d3);
1061 1066
1062/* This was originally an Alpha specific thing, but it really fits here. 1067/* This was originally an Alpha specific thing, but it really fits here.
1063 * The i82375 PCI/EISA bridge appears as non-classified. Fix that. 1068 * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index eddb0748b0ea..8c02b6c53bdb 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -311,7 +311,7 @@ EXPORT_SYMBOL_GPL(pci_destroy_slot);
311#include <linux/pci_hotplug.h> 311#include <linux/pci_hotplug.h>
312/** 312/**
313 * pci_hp_create_link - create symbolic link to the hotplug driver module. 313 * pci_hp_create_link - create symbolic link to the hotplug driver module.
314 * @slot: struct pci_slot 314 * @pci_slot: struct pci_slot
315 * 315 *
316 * Helper function for pci_hotplug_core.c to create symbolic link to 316 * Helper function for pci_hotplug_core.c to create symbolic link to
317 * the hotplug driver module. 317 * the hotplug driver module.
@@ -334,7 +334,7 @@ EXPORT_SYMBOL_GPL(pci_hp_create_module_link);
334 334
335/** 335/**
336 * pci_hp_remove_link - remove symbolic link to the hotplug driver module. 336 * pci_hp_remove_link - remove symbolic link to the hotplug driver module.
337 * @slot: struct pci_slot 337 * @pci_slot: struct pci_slot
338 * 338 *
339 * Helper function for pci_hotplug_core.c to remove symbolic link to 339 * Helper function for pci_hotplug_core.c to remove symbolic link to
340 * the hotplug driver module. 340 * the hotplug driver module.
diff --git a/include/linux/pci.h b/include/linux/pci.h
index d304ddf412d0..115fb7ba5089 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1145,7 +1145,7 @@ static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1145/* If you want to know what to call your pci_dev, ask this function. 1145/* If you want to know what to call your pci_dev, ask this function.
1146 * Again, it's a wrapper around the generic device. 1146 * Again, it's a wrapper around the generic device.
1147 */ 1147 */
1148static inline const char *pci_name(struct pci_dev *pdev) 1148static inline const char *pci_name(const struct pci_dev *pdev)
1149{ 1149{
1150 return dev_name(&pdev->dev); 1150 return dev_name(&pdev->dev);
1151} 1151}