diff options
author | Borislav Petkov <borislav.petkov@amd.com> | 2012-09-14 14:10:59 -0400 |
---|---|---|
committer | Borislav Petkov <bp@alien8.de> | 2012-11-28 05:56:17 -0500 |
commit | d824c7718b78b6a5afae7fc78731b70318cd076f (patch) | |
tree | 68eb55daac55a038394529eca750936aa9606ecd | |
parent | f89f8388cd11faa8e77992cb11ab44ac9a6abf4f (diff) |
MCE, AMD: Report decoded error type first
Instead of starting with the error details, report the decoded, readable
error type first.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
-rw-r--r-- | drivers/edac/mce_amd.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index e871a2abc802..f856a2531cec 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c | |||
@@ -676,31 +676,6 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) | |||
676 | if (amd_filter_mce(m)) | 676 | if (amd_filter_mce(m)) |
677 | return NOTIFY_STOP; | 677 | return NOTIFY_STOP; |
678 | 678 | ||
679 | pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", | ||
680 | m->extcpu, | ||
681 | c->x86, c->x86_model, c->x86_mask, | ||
682 | m->bank, | ||
683 | ((m->status & MCI_STATUS_OVER) ? "Over" : "-"), | ||
684 | ((m->status & MCI_STATUS_UC) ? "UE" : "CE"), | ||
685 | ((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"), | ||
686 | ((m->status & MCI_STATUS_PCC) ? "PCC" : "-"), | ||
687 | ((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-")); | ||
688 | |||
689 | if (c->x86 == 0x15) | ||
690 | pr_cont("|%s|%s", | ||
691 | ((m->status & BIT_64(44)) ? "Deferred" : "-"), | ||
692 | ((m->status & BIT_64(43)) ? "Poison" : "-")); | ||
693 | |||
694 | /* do the two bits[14:13] together */ | ||
695 | ecc = (m->status >> 45) & 0x3; | ||
696 | if (ecc) | ||
697 | pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); | ||
698 | |||
699 | pr_cont("]: 0x%016llx\n", m->status); | ||
700 | |||
701 | if (m->status & MCI_STATUS_ADDRV) | ||
702 | pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr); | ||
703 | |||
704 | switch (m->bank) { | 679 | switch (m->bank) { |
705 | case 0: | 680 | case 0: |
706 | decode_mc0_mce(m); | 681 | decode_mc0_mce(m); |
@@ -737,6 +712,31 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) | |||
737 | break; | 712 | break; |
738 | } | 713 | } |
739 | 714 | ||
715 | pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", | ||
716 | m->extcpu, | ||
717 | c->x86, c->x86_model, c->x86_mask, | ||
718 | m->bank, | ||
719 | ((m->status & MCI_STATUS_OVER) ? "Over" : "-"), | ||
720 | ((m->status & MCI_STATUS_UC) ? "UE" : "CE"), | ||
721 | ((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"), | ||
722 | ((m->status & MCI_STATUS_PCC) ? "PCC" : "-"), | ||
723 | ((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-")); | ||
724 | |||
725 | if (c->x86 == 0x15) | ||
726 | pr_cont("|%s|%s", | ||
727 | ((m->status & BIT_64(44)) ? "Deferred" : "-"), | ||
728 | ((m->status & BIT_64(43)) ? "Poison" : "-")); | ||
729 | |||
730 | /* do the two bits[14:13] together */ | ||
731 | ecc = (m->status >> 45) & 0x3; | ||
732 | if (ecc) | ||
733 | pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); | ||
734 | |||
735 | pr_cont("]: 0x%016llx\n", m->status); | ||
736 | |||
737 | if (m->status & MCI_STATUS_ADDRV) | ||
738 | pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr); | ||
739 | |||
740 | amd_decode_err_code(m->status & 0xffff); | 740 | amd_decode_err_code(m->status & 0xffff); |
741 | 741 | ||
742 | return NOTIFY_STOP; | 742 | return NOTIFY_STOP; |